Merge tag 'u-boot-socfpga-next-20240415' of https://source.denx.de/u-boot/custodians...

- Add option to reprogram FPGA every reboot, enable this as default in
  chameleonv3 defconfig.
- Fixes: Rename CONFIG_SPL_SOCFPGA_SEC_REG to CONFIG_SPL_SOCFPGA_DT_REG,
  so the driver can be built when CONFIG_SPL_SOCFPGA_DT_REG is set in
  defconfig.

diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 1008232cac801fbd6b709526d8cec667b458be75..6b6a162f56892e2a676b4e4ca01ef6b80a8e4ab6 100644 (file)
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -90,6 +90,14 @@ config TARGET_SOCFPGA_ARRIA10
        imply FPGA_SOCFPGA
        imply SPL_USE_TINY_PRINTF
 
+config SOCFPGA_ARRIA10_ALWAYS_REPROGRAM
+       bool "Always reprogram Arria 10 FPGA"
+       depends on TARGET_SOCFPGA_ARRIA10
+       help
+         Arria 10 FPGA is only programmed during the cold boot.
+         This option forces the FPGA to be reprogrammed every reboot,
+         allowing to change the bitstream and apply it with warm reboot.
+
 config TARGET_SOCFPGA_CYCLONE5
        bool
        select TARGET_SOCFPGA_GEN5

diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c
index 9edbbf4a29c35a35d2f0a230cec5f3e1229d5211..3981d2d4f140779f4ed2f276290d2520c2edc3dd 100644 (file)
--- a/arch/arm/mach-socfpga/spl_a10.c
+++ b/arch/arm/mach-socfpga/spl_a10.c
@@ -122,7 +122,10 @@ void spl_board_init(void)
        arch_early_init_r();
 
        /* If the full FPGA is already loaded, ie.from EPCQ, config fpga pins */
-       if (is_fpgamgr_user_mode()) {
+       if ((IS_ENABLED(CONFIG_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM) &&
+            is_regular_boot_valid()) ||
+           (!IS_ENABLED(CONFIG_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM) &&
+            is_fpgamgr_user_mode())) {
                ret = config_pins(gd->fdt_blob, "shared");
                if (ret)
                        return;
@@ -130,7 +133,8 @@ void spl_board_init(void)
                ret = config_pins(gd->fdt_blob, "fpga");
                if (ret)
                        return;
-       } else if (!is_fpgamgr_early_user_mode()) {
+       } else if (IS_ENABLED(CONFIG_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM) ||
+                  !is_fpgamgr_early_user_mode()) {
                /* Program IOSSM(early IO release) or full FPGA */
                fpgamgr_program(buf, FPGA_BUFSIZ, 0);
 

diff --git a/configs/socfpga_chameleonv3_defconfig b/configs/socfpga_chameleonv3_defconfig
index 6ea61ca6ea96fc0cb31aa5c86f89a97c448edd56..7506aa8d329a6aab64676a6dd1b6cb8a6f6f48e0 100644 (file)
--- a/configs/socfpga_chameleonv3_defconfig
+++ b/configs/socfpga_chameleonv3_defconfig
@@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_chameleonv3_480_2"
 CONFIG_SPL_TEXT_BASE=0xFFE00000
 CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_TARGET_SOCFPGA_CHAMELEONV3=y
+CONFIG_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM=y
 CONFIG_SPL_FS_FAT=y
 CONFIG_FIT=y
 CONFIG_SPL_FIT=y

diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 9e829905f123fa8a657b7fdae624a2f5ca329efd..e53d52c47b34c81e0cea096a063a579770a6d05b 100644 (file)
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -91,4 +91,4 @@ obj-$(CONFIG_K3_AVS0) += k3_avs.o
 obj-$(CONFIG_ESM_K3) += k3_esm.o
 obj-$(CONFIG_ESM_PMIC) += esm_pmic.o
 obj-$(CONFIG_SL28CPLD) += sl28cpld.o
-obj-$(CONFIG_SPL_SOCFPGA_SEC_REG) += socfpga_dtreg.o
+obj-$(CONFIG_SPL_SOCFPGA_DT_REG) += socfpga_dtreg.o