]> git.ipfire.org Git - u-boot.git/blob - include/configs/zynq-common.h
2dfac6fe6c9749e8ebcf429cf99caa6c10725025
[u-boot.git] / include / configs / zynq-common.h
1 /*
2 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
3 * (C) Copyright 2013 - 2018 Xilinx, Inc.
4 *
5 * Common configuration options for all Zynq boards.
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10 #ifndef __CONFIG_ZYNQ_COMMON_H
11 #define __CONFIG_ZYNQ_COMMON_H
12
13 /* CPU clock */
14 #ifndef CONFIG_CPU_FREQ_HZ
15 # define CONFIG_CPU_FREQ_HZ 800000000
16 #endif
17
18 /* Cache options */
19 #define CONFIG_SYS_L2CACHE_OFF
20 #ifndef CONFIG_SYS_L2CACHE_OFF
21 # define CONFIG_SYS_L2_PL310
22 # define CONFIG_SYS_PL310_BASE 0xf8f02000
23 #endif
24
25 #define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600
26 #define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR
27 #define CONFIG_SYS_TIMER_COUNTS_DOWN
28 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4)
29
30 /* Serial drivers */
31 /* The following table includes the supported baudrates */
32 #define CONFIG_SYS_BAUDRATE_TABLE \
33 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
34
35 #define CONFIG_ARM_DCC
36
37 /* Ethernet driver */
38 #if defined(CONFIG_ZYNQ_GEM)
39 # define CONFIG_MII
40 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
41 # define CONFIG_BOOTP_BOOTPATH
42 # define CONFIG_BOOTP_GATEWAY
43 # define CONFIG_BOOTP_HOSTNAME
44 # define CONFIG_BOOTP_MAY_FAIL
45 #endif
46
47 /* SPI */
48 #ifdef CONFIG_ZYNQ_SPI
49 #endif
50
51 /* QSPI */
52 #ifdef CONFIG_ZYNQ_QSPI
53 # define CONFIG_SF_DEFAULT_SPEED 30000000
54 # define CONFIG_SPI_FLASH_ISSI
55 #endif
56
57 /* NOR */
58 #ifdef CONFIG_MTD_NOR_FLASH
59 # define CONFIG_SYS_FLASH_BASE 0xE2000000
60 # define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024)
61 # define CONFIG_SYS_MAX_FLASH_BANKS 1
62 # define CONFIG_SYS_MAX_FLASH_SECT 512
63 # define CONFIG_SYS_FLASH_ERASE_TOUT 1000
64 # define CONFIG_SYS_FLASH_WRITE_TOUT 5000
65 # define CONFIG_FLASH_SHOW_PROGRESS 10
66 # define CONFIG_SYS_FLASH_CFI
67 # undef CONFIG_SYS_FLASH_EMPTY_INFO
68 # define CONFIG_FLASH_CFI_DRIVER
69 # undef CONFIG_SYS_FLASH_PROTECTION
70 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
71 #endif
72
73 #ifdef CONFIG_NAND_ZYNQ
74 #define CONFIG_SYS_MAX_NAND_DEVICE 1
75 #define CONFIG_SYS_NAND_ONFI_DETECTION
76 #define CONFIG_MTD_DEVICE
77 #endif
78
79 /* MMC */
80 #if defined(CONFIG_MMC_SDHCI_ZYNQ)
81 # define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000
82 #endif
83
84 #ifdef CONFIG_USB_EHCI_ZYNQ
85 # define CONFIG_EHCI_IS_TDI
86
87 # define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000
88 # define DFU_DEFAULT_POLL_TIMEOUT 300
89 # define CONFIG_USB_CABLE_CHECK
90 # define CONFIG_THOR_RESET_OFF
91 # define DFU_ALT_INFO_RAM \
92 "dfu_ram_info=" \
93 "set dfu_alt_info " \
94 "${kernel_image} ram 0x3000000 0x500000\\\\;" \
95 "${devicetree_image} ram 0x2A00000 0x20000\\\\;" \
96 "${ramdisk_image} ram 0x2000000 0x600000\0" \
97 "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
98 "thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
99
100 # if defined(CONFIG_MMC_SDHCI_ZYNQ)
101 # define DFU_ALT_INFO_MMC \
102 "dfu_mmc_info=" \
103 "set dfu_alt_info " \
104 "${kernel_image} fat 0 1\\\\;" \
105 "${devicetree_image} fat 0 1\\\\;" \
106 "${ramdisk_image} fat 0 1\0" \
107 "dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \
108 "thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0"
109
110 # define DFU_ALT_INFO \
111 DFU_ALT_INFO_RAM \
112 DFU_ALT_INFO_MMC
113 # else
114 # define DFU_ALT_INFO \
115 DFU_ALT_INFO_RAM
116 # endif
117 #endif
118
119 #if !defined(DFU_ALT_INFO)
120 # define DFU_ALT_INFO
121 #endif
122
123 #if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1)
124 #define CONFIG_SYS_I2C_ZYNQ
125 #endif
126
127 /* I2C */
128 #if defined(CONFIG_SYS_I2C_ZYNQ)
129 # define CONFIG_SYS_I2C
130 # define CONFIG_SYS_I2C_ZYNQ_SPEED 100000
131 # define CONFIG_SYS_I2C_ZYNQ_SLAVE 0
132 #endif
133
134 /* EEPROM */
135 #ifdef CONFIG_ZYNQ_EEPROM
136 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
137 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
138 # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
139 # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
140 # define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */
141 #endif
142
143 /* Total Size of Environment Sector */
144 #define CONFIG_ENV_SIZE (128 << 10)
145
146 /* Allow to overwrite serial and ethaddr */
147 #define CONFIG_ENV_OVERWRITE
148
149 /* Environment */
150 #ifndef CONFIG_ENV_IS_NOWHERE
151 # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
152 # define CONFIG_ENV_OFFSET 0xE0000
153 #endif
154
155 /* enable preboot to be loaded before CONFIG_BOOTDELAY */
156 #define CONFIG_PREBOOT
157
158 /* Boot configuration */
159 #define CONFIG_SYS_LOAD_ADDR 0 /* default? */
160
161 /* Distro boot enablement */
162
163 #ifdef CONFIG_SPL_BUILD
164 #define BOOTENV
165 #else
166 #include <config_distro_defaults.h>
167
168 #ifdef CONFIG_CMD_MMC
169 #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
170 #else
171 #define BOOT_TARGET_DEVICES_MMC(func)
172 #endif
173
174 #ifdef CONFIG_CMD_USB
175 #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
176 #else
177 #define BOOT_TARGET_DEVICES_USB(func)
178 #endif
179
180 #if defined(CONFIG_CMD_PXE)
181 #define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
182 #else
183 #define BOOT_TARGET_DEVICES_PXE(func)
184 #endif
185
186 #if defined(CONFIG_CMD_DHCP)
187 #define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
188 #else
189 #define BOOT_TARGET_DEVICES_DHCP(func)
190 #endif
191
192 #define BOOT_TARGET_DEVICES(func) \
193 BOOT_TARGET_DEVICES_MMC(func) \
194 BOOT_TARGET_DEVICES_USB(func) \
195 BOOT_TARGET_DEVICES_PXE(func) \
196 BOOT_TARGET_DEVICES_DHCP(func)
197
198 #include <config_distro_bootcmd.h>
199 #endif /* CONFIG_SPL_BUILD */
200
201 /* Default environment */
202 #ifndef CONFIG_EXTRA_ENV_SETTINGS
203 #define CONFIG_EXTRA_ENV_SETTINGS \
204 "fit_image=fit.itb\0" \
205 "load_addr=0x2000000\0" \
206 "fit_size=0x800000\0" \
207 "flash_off=0x100000\0" \
208 "nor_flash_off=0xE2100000\0" \
209 "fdt_high=0x20000000\0" \
210 "initrd_high=0x20000000\0" \
211 "loadbootenv_addr=0x2000000\0" \
212 "fdt_addr_r=0x1f00000\0" \
213 "pxefile_addr_r=0x2000000\0" \
214 "kernel_addr_r=0x2000000\0" \
215 "scriptaddr=0x3000000\0" \
216 "ramdisk_addr_r=0x3100000\0" \
217 "bootenv=uEnv.txt\0" \
218 "bootenv_dev=mmc\0" \
219 "loadbootenv=load ${bootenv_dev} 0 ${loadbootenv_addr} ${bootenv}\0" \
220 "importbootenv=echo Importing environment from ${bootenv_dev} ...; " \
221 "env import -t ${loadbootenv_addr} $filesize\0" \
222 "bootenv_existence_test=test -e ${bootenv_dev} 0 /${bootenv}\0" \
223 "setbootenv=if env run bootenv_existence_test; then " \
224 "if env run loadbootenv; then " \
225 "env run importbootenv; " \
226 "fi; " \
227 "fi; \0" \
228 "sd_loadbootenv=set bootenv_dev mmc && " \
229 "run setbootenv \0" \
230 "usb_loadbootenv=set bootenv_dev usb && usb start && run setbootenv \0" \
231 "preboot=if test $modeboot = sdboot; then " \
232 "run sd_loadbootenv; " \
233 "echo Checking if uenvcmd is set ...; " \
234 "if test -n $uenvcmd; then " \
235 "echo Running uenvcmd ...; " \
236 "run uenvcmd; " \
237 "fi; " \
238 "fi; \0" \
239 "norboot=echo Copying FIT from NOR flash to RAM... && " \
240 "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \
241 "bootm ${load_addr}\0" \
242 "sdboot=echo Copying FIT from SD to RAM... && " \
243 "load mmc 0 ${load_addr} ${fit_image} && " \
244 "bootm ${load_addr}\0" \
245 "jtagboot=echo TFTPing FIT to RAM... && " \
246 "tftpboot ${load_addr} ${fit_image} && " \
247 "bootm ${load_addr}\0" \
248 "usbboot=if usb start; then " \
249 "echo Copying FIT from USB to RAM... && " \
250 "load usb 0 ${load_addr} ${fit_image} && " \
251 "bootm ${load_addr}; fi\0" \
252 DFU_ALT_INFO \
253 BOOTENV
254 #endif
255
256 /* Miscellaneous configurable options */
257
258 #define CONFIG_CMDLINE_EDITING
259 #define CONFIG_AUTO_COMPLETE
260 #define CONFIG_SYS_LONGHELP
261 #define CONFIG_CLOCKS
262 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
263
264 #ifndef CONFIG_NR_DRAM_BANKS
265 # define CONFIG_NR_DRAM_BANKS 1
266 #endif
267
268 #define CONFIG_SYS_MEMTEST_START 0
269 #define CONFIG_SYS_MEMTEST_END 0x1000
270
271 #define CONFIG_SYS_MALLOC_LEN 0x1400000
272
273 #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000
274 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000
275 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
276 CONFIG_SYS_INIT_RAM_SIZE - \
277 GENERATED_GBL_DATA_SIZE)
278
279 /* Enable the PL to be downloaded */
280 #define CONFIG_FPGA_ZYNQPL
281
282 /* FIT support */
283 #define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */
284
285 /* Extend size of kernel image for uncompression */
286 #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
287
288 /* Boot FreeBSD/vxWorks from an ELF image */
289 #define CONFIG_SYS_MMC_MAX_DEVICE 1
290
291 #define CONFIG_SYS_LDSCRIPT "arch/arm/mach-zynq/u-boot.lds"
292
293 /* Commands */
294
295 /* SPL part */
296
297 /* MMC support */
298 #ifdef CONFIG_MMC_SDHCI_ZYNQ
299 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
300 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
301 #endif
302
303 /* Disable dcache for SPL just for sure */
304 #ifdef CONFIG_SPL_BUILD
305 #define CONFIG_SYS_DCACHE_OFF
306 #endif
307
308 /* Address in RAM where the parameters must be copied by SPL. */
309 #define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000
310
311 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb"
312 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
313
314 /* Not using MMC raw mode - just for compilation purpose */
315 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0
316 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0
317 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0
318
319 /* qspi mode is working fine */
320 #ifdef CONFIG_ZYNQ_QSPI
321 #define CONFIG_SPL_SPI_LOAD
322 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000
323 #define CONFIG_SYS_SPI_ARGS_OFFS 0x200000
324 #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000
325 #define CONFIG_SYS_SPI_KERNEL_OFFS (CONFIG_SYS_SPI_ARGS_OFFS + \
326 CONFIG_SYS_SPI_ARGS_SIZE)
327 #endif
328
329 /* for booting directly linux */
330
331 /* SP location before relocation, must use scratch RAM */
332 #define CONFIG_SPL_TEXT_BASE 0x0
333
334 /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
335 #define CONFIG_SPL_MAX_SIZE 0x30000
336
337 /* On the top of OCM space */
338 #define CONFIG_SYS_SPL_MALLOC_START CONFIG_SPL_STACK_R_ADDR
339 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000000
340
341 /*
342 * SPL stack position - and stack goes down
343 * 0xfffffe00 is used for putting wfi loop.
344 * Set it up as limit for now.
345 */
346 #define CONFIG_SPL_STACK 0xfffffe00
347
348 /* BSS setup */
349 #define CONFIG_SPL_BSS_START_ADDR 0x100000
350 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000
351
352 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
353
354 #endif /* __CONFIG_ZYNQ_COMMON_H */