If you do not have i2c muxes on your board, omit this define.
- - Legacy I2C Support: CONFIG_HARD_I2C
-
- NOTE: It is intended to move drivers to CONFIG_SYS_I2C which
- provides the following compelling advantages:
-
- - more than one i2c adapter is usable
- - approved multibus support
- - better i2c mux support
-
- ** Please consider updating your I2C driver now. **
-
- These enable legacy I2C serial bus commands. Defining
- CONFIG_HARD_I2C will include the appropriate I2C driver
- for the selected CPU.
-
- This will allow you to use i2c commands at the u-boot
- command line (as long as you set CONFIG_CMD_I2C in
- CONFIG_COMMANDS) and communicate with i2c based realtime
- clock chips. See common/cmd_i2c.c for a description of the
- command line interface.
-
- CONFIG_HARD_I2C selects a hardware I2C controller.
-
- There are several other quantities that must also be
- defined when you define CONFIG_HARD_I2C.
-
- In both cases you will need to define CONFIG_SYS_I2C_SPEED
- to be the frequency (in Hz) at which you wish your i2c bus
- to run and CONFIG_SYS_I2C_SLAVE to be the address of this node (ie
- the CPU's i2c node address).
-
- Now, the u-boot i2c code for the mpc8xx
- (arch/powerpc/cpu/mpc8xx/i2c.c) sets the CPU up as a master node
- and so its address should therefore be cleared to 0 (See,
- eg, MPC823e User's Manual p.16-473). So, set
- CONFIG_SYS_I2C_SLAVE to 0.
-
- CONFIG_SYS_I2C_INIT_MPC5XXX
-
- When a board is reset during an i2c bus transfer
- chips might think that the current transfer is still
- in progress. Reset the slave devices by sending start
- commands until the slave device responds.
-
- That's all that's required for CONFIG_HARD_I2C.
-
+ - Legacy I2C Support:
If you use the software i2c interface (CONFIG_SYS_I2C_SOFT)
then the following macros need to be defined (examples are
from include/configs/lwmon.h):
custom i2c_init_board() routine in boards/xxx/board.c
is run early in the boot sequence.
- CONFIG_SYS_I2C_BOARD_LATE_INIT
-
- An alternative to CONFIG_SYS_I2C_INIT_BOARD. If this option is
- defined a custom i2c_board_late_init() routine in
- boards/xxx/board.c is run AFTER the operations in i2c_init()
- is completed. This callpoint can be used to unreset i2c bus
- using CPU i2c controller register accesses for CPUs whose i2c
- controller provide such a method. It is called at the end of
- i2c_init() to allow i2c_init operations to setup the i2c bus
- controller on the CPU (e.g. setting bus speed & slave address).
-
- CONFIG_I2CFAST (PPC405GP|PPC405EP only)
-
- This option enables configuration of bi_iic_fast[] flags
- in u-boot bd_info structure based on u-boot environment
- variable "i2cfast". (see also i2cfast)
-
CONFIG_I2C_MULTI_BUS
This option allows the use of multiple I2C buses, each of which
If defined, don't allow the -f switch to env set override variable
access flags.
-- CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC (OMAP only)
- This is set by OMAP boards for the max time that reset should
- be asserted. See doc/README.omap-reset-time for details on how
- the value can be calculated on a given board.
-
- CONFIG_USE_STDINT
If stdint.h is available with your toolchain you can define this
option to enable it. You can provide option 'USE_STDINT=1' when
#endif
- /* I2C */
- #define CONFIG_HARD_I2C /* I2C with hardware support */
- #define CONFIG_I2C_MULTI_BUS
- #define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
- #define CONFIG_SYS_I2C_SLAVE 0x7F
- #if 0
- #define CONFIG_SYS_I2C_NOPROBES {{0,0x69}} /* Don't probe these addrs */
- #endif
-
/*
* IIM - IC Identification Module
*/
#undef CONFIG_FSL_IIM
- /*
- * EEPROM configuration
- */
- #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* 16-bit EEPROM address */
- #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Atmel: AT24C32A-10TQ-2.7 */
- #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10ms of delay */
- #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* 32-Byte Page Write Mode */
-
/*
* Ethernet configuration
*/
*/
#if defined(CONFIG_CMD_USB)
-#define CONFIG_USB_EHCI /* Enable EHCI Support */
#define CONFIG_USB_EHCI_FSL /* On a FSL platform */
#define CONFIG_EHCI_MMIO_BIG_ENDIAN /* With big-endian regs */
#define CONFIG_EHCI_DESC_BIG_ENDIAN
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
- #define CONFIG_CMD_EEPROM
#define CONFIG_CMD_IDE
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_REGINFO
CONFIG_DEFAULT
CONFIG_DEFAULT_CONSOLE
CONFIG_DEFAULT_IMMR
-CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC
CONFIG_DEFAULT_SPI_BUS
CONFIG_DEFAULT_SPI_CS
CONFIG_DEFAULT_SPI_MODE
CONFIG_H264_FREQ
CONFIG_H8300
CONFIG_HALEAKALA
- CONFIG_HARD_I2C
CONFIG_HARD_SPI
CONFIG_HASH_VERIFY
CONFIG_HAS_DATAFLASH
CONFIG_HW_WATCHDOG
CONFIG_HW_WATCHDOG_TIMEOUT_MS
CONFIG_I2C
- CONFIG_I2CFAST
CONFIG_I2C_CHIPADDRESS
CONFIG_I2C_CMD_TREE
CONFIG_I2C_ENV_EEPROM_BUS
CONFIG_OF_SPI_FLASH
CONFIG_OF_STDOUT_PATH
CONFIG_OF_SUPPORT_OLD_DEVICE_TREES
-CONFIG_OMAP
-CONFIG_OMAP3430
-CONFIG_OMAP3_AM3517CRANE
-CONFIG_OMAP3_DEVKIT8000
-CONFIG_OMAP3_EVM
-CONFIG_OMAP3_GPIO_2
-CONFIG_OMAP3_GPIO_3
-CONFIG_OMAP3_GPIO_4
-CONFIG_OMAP3_GPIO_5
-CONFIG_OMAP3_GPIO_6
-CONFIG_OMAP3_LOGIC_USE_NEW_PRODUCT_ID
-CONFIG_OMAP3_MCX
-CONFIG_OMAP3_MICRON_DDR
-CONFIG_OMAP3_RX51
-CONFIG_OMAP3_SPI_D0_D1_SWAPPED
-CONFIG_OMAP3_ZOOM1
-CONFIG_OMAP4430
CONFIG_OMAP_EHCI_PHY1_RESET_GPIO
CONFIG_OMAP_EHCI_PHY2_RESET_GPIO
CONFIG_OMAP_EHCI_PHY3_RESET_GPIO
-CONFIG_OMAP_GPIO
-CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC
CONFIG_OMAP_USB2PHY2_HOST
CONFIG_OMAP_USB3PHY1_HOST
CONFIG_OMAP_USB_PHY
-CONFIG_OMAP_VC_I2C_HS_MCODE
-CONFIG_OMAP_WATCHDOG
CONFIG_OPTREX_BW
CONFIG_ORIGEN
CONFIG_OS1_ENV_ADDR
CONFIG_SYS_I2C_BASE3
CONFIG_SYS_I2C_BASE4
CONFIG_SYS_I2C_BASE5
- CONFIG_SYS_I2C_BOARD_LATE_INIT
CONFIG_SYS_I2C_BOOT_EEPROM_ADDR
CONFIG_SYS_I2C_BUSES
CONFIG_SYS_I2C_BUS_MAX
CONFIG_USB_EHCI_MX5
CONFIG_USB_EHCI_MXC
CONFIG_USB_EHCI_MXS
-CONFIG_USB_EHCI_OMAP
CONFIG_USB_EHCI_PCI
CONFIG_USB_EHCI_PPC4XX
CONFIG_USB_EHCI_RMOBILE
projects / people / ms / u-boot.git / commitdiff
