]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - opcodes/ChangeLog
Automatic date update in version.in
[thirdparty/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
26916852
NC
12020-01-20 Nick Clifton <nickc@redhat.com>
2
3 * po/de.po: Updated German translation.
4 * po/pt_BR.po: Updated Brazilian Portuguese translation.
5 * po/uk.po: Updated Ukranian translation.
6
4d6cbb64
AM
72020-01-20 Alan Modra <amodra@gmail.com>
8
9 * hppa-dis.c (fput_const): Remove useless cast.
10
2bddb71a
AM
112020-01-20 Alan Modra <amodra@gmail.com>
12
13 * arm-dis.c (print_insn_arm): Wrap 'T' value.
14
1b1bb2c6
NC
152020-01-18 Nick Clifton <nickc@redhat.com>
16
17 * configure: Regenerate.
18 * po/opcodes.pot: Regenerate.
19
ae774686
NC
202020-01-18 Nick Clifton <nickc@redhat.com>
21
22 Binutils 2.34 branch created.
23
07f1f3aa
CB
242020-01-17 Christian Biesinger <cbiesinger@google.com>
25
26 * opintl.h: Fix spelling error (seperate).
27
42e04b36
L
282020-01-17 H.J. Lu <hongjiu.lu@intel.com>
29
30 * i386-opc.tbl: Add {vex} pseudo prefix.
31 * i386-tbl.h: Regenerated.
32
2da2eaf4
AV
332020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
34
35 PR 25376
36 * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
37 (neon_opcodes): Likewise.
38 (select_arm_features): Make sure we enable MVE bits when selecting
39 armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
40 any architecture.
41
d0849eed
JB
422020-01-16 Jan Beulich <jbeulich@suse.com>
43
44 * i386-opc.tbl: Drop stale comment from XOP section.
45
9cf70a44
JB
462020-01-16 Jan Beulich <jbeulich@suse.com>
47
48 * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
49 (extractps): Add VexWIG to SSE2AVX forms.
50 * i386-tbl.h: Re-generate.
51
4814632e
JB
522020-01-16 Jan Beulich <jbeulich@suse.com>
53
54 * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
55 Size64 from and use VexW1 on SSE2AVX forms.
56 (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
57 VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
58 * i386-tbl.h: Re-generate.
59
aad09917
AM
602020-01-15 Alan Modra <amodra@gmail.com>
61
62 * tic4x-dis.c (tic4x_version): Make unsigned long.
63 (optab, optab_special, registernames): New file scope vars.
64 (tic4x_print_register): Set up registernames rather than
65 malloc'd registertable.
66 (tic4x_disassemble): Delete optable and optable_special. Use
67 optab and optab_special instead. Throw away old optab,
68 optab_special and registernames when info->mach changes.
69
7a6bf3be
SB
702020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
71
72 PR 25377
73 * z80-dis.c (suffix): Use .db instruction to generate double
74 prefix.
75
ca1eaac0
AM
762020-01-14 Alan Modra <amodra@gmail.com>
77
78 * z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
79 values to unsigned before shifting.
80
1d67fe3b
TT
812020-01-13 Thomas Troeger <tstroege@gmx.de>
82
83 * arm-dis.c (print_insn_arm): Fill in insn info fields for control
84 flow instructions.
85 (print_insn_thumb16, print_insn_thumb32): Likewise.
86 (print_insn): Initialize the insn info.
87 * i386-dis.c (print_insn): Initialize the insn info fields, and
88 detect jumps.
89
5e4f7e05
CZ
902012-01-13 Claudiu Zissulescu <claziss@gmail.com>
91
92 * arc-opc.c (C_NE): Make it required.
93
b9fe6b8a
CZ
942012-01-13 Claudiu Zissulescu <claziss@gmail.com>
95
96 * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
97 reserved register name.
98
90dee485
AM
992020-01-13 Alan Modra <amodra@gmail.com>
100
101 * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
102 (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
103
febda64f
AM
1042020-01-13 Alan Modra <amodra@gmail.com>
105
106 * wasm32-dis.c (print_insn_wasm32): Localise variables. Store
107 result of wasm_read_leb128 in a uint64_t and check that bits
108 are not lost when copying to other locals. Use uint32_t for
109 most locals. Use PRId64 when printing int64_t.
110
df08b588
AM
1112020-01-13 Alan Modra <amodra@gmail.com>
112
113 * score-dis.c: Formatting.
114 * score7-dis.c: Formatting.
115
b2c759ce
AM
1162020-01-13 Alan Modra <amodra@gmail.com>
117
118 * score-dis.c (print_insn_score48): Use unsigned variables for
119 unsigned values. Don't left shift negative values.
120 (print_insn_score32): Likewise.
121 * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
122
5496abe1
AM
1232020-01-13 Alan Modra <amodra@gmail.com>
124
125 * tic4x-dis.c (tic4x_print_register): Remove dead code.
126
202e762b
AM
1272020-01-13 Alan Modra <amodra@gmail.com>
128
129 * fr30-ibld.c: Regenerate.
130
7ef412cf
AM
1312020-01-13 Alan Modra <amodra@gmail.com>
132
133 * xgate-dis.c (print_insn): Don't left shift signed value.
134 (ripBits): Formatting, use 1u.
135
7f578b95
AM
1362020-01-10 Alan Modra <amodra@gmail.com>
137
138 * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
139 * tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
140
441af85b
AM
1412020-01-10 Alan Modra <amodra@gmail.com>
142
143 * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
144 and XRREG value earlier to avoid a shift with negative exponent.
145 * m10200-dis.c (disassemble): Similarly.
146
bce58db4
NC
1472020-01-09 Nick Clifton <nickc@redhat.com>
148
149 PR 25224
150 * z80-dis.c (ld_ii_ii): Use correct cast.
151
40c75bc8
SB
1522020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
153
154 PR 25224
155 * z80-dis.c (ld_ii_ii): Use character constant when checking
156 opcode byte value.
157
d835a58b
JB
1582020-01-09 Jan Beulich <jbeulich@suse.com>
159
160 * i386-dis.c (SEP_Fixup): New.
161 (SEP): Define.
162 (dis386_twobyte): Use it for sysenter/sysexit.
163 (enum x86_64_isa): Change amd64 enumerator to value 1.
164 (OP_J): Compare isa64 against intel64 instead of amd64.
165 * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
166 forms.
167 * i386-tbl.h: Re-generate.
168
030a2e78
AM
1692020-01-08 Alan Modra <amodra@gmail.com>
170
171 * z8k-dis.c: Include libiberty.h
172 (instr_data_s): Make max_fetched unsigned.
173 (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
174 Don't exceed byte_info bounds.
175 (output_instr): Make num_bytes unsigned.
176 (unpack_instr): Likewise for nibl_count and loop.
177 * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
178 idx unsigned.
179 * z8k-opc.h: Regenerate.
180
bb82aefe
SV
1812020-01-07 Shahab Vahedi <shahab@synopsys.com>
182
183 * arc-tbl.h (llock): Use 'LLOCK' as class.
184 (llockd): Likewise.
185 (scond): Use 'SCOND' as class.
186 (scondd): Likewise.
187 (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
188 (scondd): Likewise.
189
cc6aa1a6
AM
1902020-01-06 Alan Modra <amodra@gmail.com>
191
192 * m32c-ibld.c: Regenerate.
193
660e62b1
AM
1942020-01-06 Alan Modra <amodra@gmail.com>
195
196 PR 25344
197 * z80-dis.c (suffix): Don't use a local struct buffer copy.
198 Peek at next byte to prevent recursion on repeated prefix bytes.
199 Ensure uninitialised "mybuf" is not accessed.
200 (print_insn_z80): Don't zero n_fetch and n_used here,..
201 (print_insn_z80_buf): ..do it here instead.
202
c9ae58fe
AM
2032020-01-04 Alan Modra <amodra@gmail.com>
204
205 * m32r-ibld.c: Regenerate.
206
5f57d4ec
AM
2072020-01-04 Alan Modra <amodra@gmail.com>
208
209 * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
210
2c5c1196
AM
2112020-01-04 Alan Modra <amodra@gmail.com>
212
213 * crx-dis.c (match_opcode): Avoid shift left of signed value.
214
2e98c6c5
AM
2152020-01-04 Alan Modra <amodra@gmail.com>
216
217 * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
218
567dfba2
JB
2192020-01-03 Jan Beulich <jbeulich@suse.com>
220
5437a02a
JB
221 * aarch64-tbl.h (aarch64_opcode_table): Use
222 SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
223
2242020-01-03 Jan Beulich <jbeulich@suse.com>
225
226 * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
567dfba2
JB
227 forms of SUDOT and USDOT.
228
8c45011a
JB
2292020-01-03 Jan Beulich <jbeulich@suse.com>
230
5437a02a 231 * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
8c45011a
JB
232 uzip{1,2}.
233 * opcodes/aarch64-dis-2.c: Re-generate.
234
f4950f76
JB
2352020-01-03 Jan Beulich <jbeulich@suse.com>
236
5437a02a 237 * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
f4950f76
JB
238 FMMLA encoding.
239 * opcodes/aarch64-dis-2.c: Re-generate.
240
6655dba2
SB
2412020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
242
243 * z80-dis.c: Add support for eZ80 and Z80 instructions.
244
b14ce8bf
AM
2452020-01-01 Alan Modra <amodra@gmail.com>
246
247 Update year range in copyright notice of all files.
248
0b114740 249For older changes see ChangeLog-2019
3499769a 250\f
0b114740 251Copyright (C) 2020 Free Software Foundation, Inc.
3499769a
AM
252
253Copying and distribution of this file, with or without modification,
254are permitted in any medium without royalty provided the copyright
255notice and this notice are preserved.
256
257Local Variables:
258mode: change-log
259left-margin: 8
260fill-column: 74
261version-control: never
262End: