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edece237 | 1 | /* Main simulator entry points specific to the IQ2000. |
3666a048 | 2 | Copyright (C) 2000-2021 Free Software Foundation, Inc. |
edece237 CV |
3 | Contributed by Cygnus Solutions. |
4 | ||
5 | This file is part of the GNU simulators. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
4744ac1b JB |
9 | the Free Software Foundation; either version 3 of the License, or |
10 | (at your option) any later version. | |
edece237 CV |
11 | |
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
4744ac1b JB |
17 | You should have received a copy of the GNU General Public License |
18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
edece237 | 19 | |
6df01ab8 MF |
20 | /* This must come before any other includes. */ |
21 | #include "defs.h" | |
22 | ||
edece237 | 23 | #include "sim-main.h" |
68ed2854 | 24 | |
edece237 | 25 | #include <stdlib.h> |
68ed2854 | 26 | |
edece237 CV |
27 | #include "sim-options.h" |
28 | #include "libiberty.h" | |
29 | #include "bfd.h" | |
30 | ||
31 | static void free_state (SIM_DESC); | |
edece237 CV |
32 | \f |
33 | /* Cover function for sim_cgen_disassemble_insn. */ | |
34 | ||
35 | void | |
36 | iq2000bf_disassemble_insn (SIM_CPU *cpu, const CGEN_INSN *insn, | |
37 | const ARGBUF *abuf, IADDR pc, char *buf) | |
38 | { | |
39 | sim_cgen_disassemble_insn(cpu, insn, abuf, pc, buf); | |
40 | } | |
41 | ||
42 | /* Cover function of sim_state_free to free the cpu buffers as well. */ | |
43 | ||
44 | static void | |
45 | free_state (SIM_DESC sd) | |
46 | { | |
47 | if (STATE_MODULES (sd) != NULL) | |
48 | sim_module_uninstall (sd); | |
49 | sim_cpu_free_all (sd); | |
50 | sim_state_free (sd); | |
51 | } | |
52 | ||
53 | /* Create an instance of the simulator. */ | |
54 | ||
55 | SIM_DESC | |
81e6e8ae TT |
56 | sim_open (SIM_OPEN_KIND kind, host_callback *callback, struct bfd *abfd, |
57 | char * const *argv) | |
edece237 CV |
58 | { |
59 | char c; | |
60 | int i; | |
61 | SIM_DESC sd = sim_state_alloc (kind, callback); | |
62 | ||
ba307cdd MF |
63 | /* Set default options before parsing user options. */ |
64 | current_alignment = STRICT_ALIGNMENT; | |
f9a4d543 | 65 | current_target_byte_order = BFD_ENDIAN_BIG; |
ba307cdd | 66 | |
edece237 | 67 | /* The cpu data is kept in a separately allocated chunk of memory. */ |
d5a71b11 | 68 | if (sim_cpu_alloc_all (sd, 1) != SIM_RC_OK) |
edece237 CV |
69 | { |
70 | free_state (sd); | |
71 | return 0; | |
72 | } | |
73 | ||
edece237 CV |
74 | if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK) |
75 | { | |
76 | free_state (sd); | |
77 | return 0; | |
78 | } | |
79 | ||
77cf2ef5 | 80 | /* The parser will print an error message for us, so we silently return. */ |
edece237 CV |
81 | if (sim_parse_args (sd, argv) != SIM_RC_OK) |
82 | { | |
83 | free_state (sd); | |
84 | return 0; | |
85 | } | |
86 | ||
87 | /* Allocate core managed memory. */ | |
88 | sim_do_commandf (sd, "memory region 0x%lx,0x%lx", IQ2000_INSN_VALUE, IQ2000_INSN_MEM_SIZE); | |
89 | sim_do_commandf (sd, "memory region 0x%lx,0x%lx", IQ2000_DATA_VALUE, IQ2000_DATA_MEM_SIZE); | |
90 | ||
91 | /* check for/establish the reference program image */ | |
92 | if (sim_analyze_program (sd, | |
93 | (STATE_PROG_ARGV (sd) != NULL | |
94 | ? *STATE_PROG_ARGV (sd) | |
95 | : NULL), | |
96 | abfd) != SIM_RC_OK) | |
97 | { | |
98 | free_state (sd); | |
99 | return 0; | |
100 | } | |
101 | ||
102 | /* Establish any remaining configuration options. */ | |
103 | if (sim_config (sd) != SIM_RC_OK) | |
104 | { | |
105 | free_state (sd); | |
106 | return 0; | |
107 | } | |
108 | ||
109 | if (sim_post_argv_init (sd) != SIM_RC_OK) | |
110 | { | |
111 | free_state (sd); | |
112 | return 0; | |
113 | } | |
114 | ||
115 | /* Open a copy of the cpu descriptor table. */ | |
116 | { | |
117 | CGEN_CPU_DESC cd = iq2000_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name, | |
118 | CGEN_ENDIAN_BIG); | |
119 | ||
120 | for (i = 0; i < MAX_NR_PROCESSORS; ++i) | |
121 | { | |
122 | SIM_CPU *cpu = STATE_CPU (sd, i); | |
123 | CPU_CPU_DESC (cpu) = cd; | |
124 | CPU_DISASSEMBLER (cpu) = iq2000bf_disassemble_insn; | |
125 | } | |
126 | iq2000_cgen_init_dis (cd); | |
127 | } | |
128 | ||
edece237 CV |
129 | return sd; |
130 | } | |
edece237 CV |
131 | \f |
132 | SIM_RC | |
81e6e8ae TT |
133 | sim_create_inferior (SIM_DESC sd, struct bfd *abfd, char * const *argv, |
134 | char * const *envp) | |
edece237 CV |
135 | { |
136 | SIM_CPU *current_cpu = STATE_CPU (sd, 0); | |
137 | SIM_ADDR addr; | |
138 | ||
139 | if (abfd != NULL) | |
140 | addr = bfd_get_start_address (abfd); | |
141 | else | |
142 | addr = CPU2INSN(0); | |
143 | sim_pc_set (current_cpu, addr); | |
144 | ||
0e967299 MF |
145 | /* Standalone mode (i.e. `run`) will take care of the argv for us in |
146 | sim_open() -> sim_parse_args(). But in debug mode (i.e. 'target sim' | |
147 | with `gdb`), we need to handle it because the user can change the | |
148 | argv on the fly via gdb's 'run'. */ | |
149 | if (STATE_PROG_ARGV (sd) != argv) | |
150 | { | |
151 | freeargv (STATE_PROG_ARGV (sd)); | |
152 | STATE_PROG_ARGV (sd) = dupargv (argv); | |
153 | } | |
edece237 CV |
154 | |
155 | return SIM_RC_OK; | |
156 | } |