]>
git.ipfire.org Git - thirdparty/binutils-gdb.git/blob - sim/h8300/compile.c
2 * Simulator for the Hitachi H8/300 architecture.
4 * Written by Steve Chamberlain of Cygnus Support. sac@cygnus.com
6 * This file is part of H8/300 sim
9 * THIS SOFTWARE IS NOT COPYRIGHTED
11 * Cygnus offers the following for use in the public domain. Cygnus makes no
12 * warranty with regard to the software or its performance and the user
13 * accepts the software "AS IS" with all faults.
15 * CYGNUS DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD TO THIS
16 * SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY
17 * AND FITNESS FOR A PARTICULAR PURPOSE.
30 #ifdef HAVE_SYS_PARAM_H
31 #include <sys/param.h>
35 #include "gdb/callback.h"
36 #include "gdb/remote-sim.h"
37 #include "gdb/sim-h8300.h"
39 #include "sys/types.h"
47 host_callback
*sim_callback
;
49 static SIM_OPEN_KIND sim_kind
;
52 /* FIXME: Needs to live in header file.
53 This header should also include the things in remote-sim.h.
54 One could move this to remote-sim.h but this function isn't needed
56 void sim_set_simcache_size
PARAMS ((int));
58 #define X(op, size) op * 4 + size
60 #define SP (h8300hmode ? SL : SW)
74 #define h8_opcodes ops
76 #include "opcode/h8300.h"
80 /* The rate at which to call the host's poll_quit callback. */
82 #define POLL_QUIT_INTERVAL 0x80000
84 #define LOW_BYTE(x) ((x) & 0xff)
85 #define HIGH_BYTE(x) (((x) >> 8) & 0xff)
86 #define P(X,Y) ((X << 8) | Y)
89 cpu.ccr = ((I << 7) | (UI << 6) | (H << 5) | (U << 4) \
90 | (N << 3) | (Z << 2) | (V << 1) | C);
93 if (h8300smode) cpu.exr = (trace<<7) | intMask;
96 c = (cpu.ccr >> 0) & 1;\
97 v = (cpu.ccr >> 1) & 1;\
98 nz = !((cpu.ccr >> 2) & 1);\
99 n = (cpu.ccr >> 3) & 1;\
100 u = (cpu.ccr >> 4) & 1;\
101 h = (cpu.ccr >> 5) & 1;\
102 ui = ((cpu.ccr >> 6) & 1);\
103 intMaskBit = (cpu.ccr >> 7) & 1;
108 trace = (cpu.exr >> 7) & 1; \
109 intMask = cpu.exr & 7; \
112 #ifdef __CHAR_IS_SIGNED__
113 #define SEXTCHAR(x) ((char) (x))
117 #define SEXTCHAR(x) ((x & 0x80) ? (x | ~0xff) : x & 0xff)
120 #define UEXTCHAR(x) ((x) & 0xff)
121 #define UEXTSHORT(x) ((x) & 0xffff)
122 #define SEXTSHORT(x) ((short) (x))
124 static cpu_state_type cpu
;
129 static int memory_size
;
134 return time (0); /* WinXX HAS UNIX like 'time', so why not using it? */
155 return h8300hmode
? SL
: SW
;
160 lvalue (int x
, int rn
)
167 return X (OP_IMM
, SP
);
169 return X (OP_REG
, SP
);
172 return X (OP_MEM
, SP
);
175 abort (); /* ?? May be something more usefull? */
180 decode (int addr
, unsigned char *data
, decoded_inst
*dst
)
194 /* Find the exact opcode/arg combo. */
195 for (q
= h8_opcodes
; q
->name
; q
++)
197 op_type
*nib
= q
->data
.nib
;
198 unsigned int len
= 0;
202 op_type looking_for
= *nib
;
203 int thisnib
= data
[len
>> 1];
205 thisnib
= (len
& 1) ? (thisnib
& 0xf) : ((thisnib
>> 4) & 0xf);
207 if (looking_for
< 16 && looking_for
>= 0)
209 if (looking_for
!= thisnib
)
214 if ((int) looking_for
& (int) B31
)
216 if (!(((int) thisnib
& 0x8) != 0))
219 looking_for
= (op_type
) ((int) looking_for
& ~(int) B31
);
223 if ((int) looking_for
& (int) B30
)
225 if (!(((int) thisnib
& 0x8) == 0))
228 looking_for
= (op_type
) ((int) looking_for
& ~(int) B30
);
231 if (looking_for
& DBIT
)
233 /* Exclude adds/subs by looking at bit 0 and 2, and
234 make sure the operand size, either w or l,
235 matches by looking at bit 1. */
236 if ((looking_for
& 7) != (thisnib
& 7))
239 abs
= (thisnib
& 0x8) ? 2 : 1;
241 else if (looking_for
& (REG
| IND
| INC
| DEC
))
243 if (looking_for
& REG
)
245 /* Can work out size from the register. */
246 size
= bitfrom (looking_for
);
248 if (looking_for
& SRC
)
253 else if (looking_for
& L_16
)
255 abs
= (data
[len
>> 1]) * 256 + data
[(len
+ 2) >> 1];
257 if (looking_for
& (PCREL
| DISP
))
262 else if (looking_for
& ABSJMP
)
264 abs
= (data
[1] << 16) | (data
[2] << 8) | (data
[3]);
266 else if (looking_for
& MEMIND
)
270 else if (looking_for
& L_32
)
274 abs
= (data
[i
] << 24)
275 | (data
[i
+ 1] << 16)
281 else if (looking_for
& L_24
)
285 abs
= (data
[i
] << 16) | (data
[i
+ 1] << 8) | (data
[i
+ 2]);
288 else if (looking_for
& IGNORE
)
292 else if (looking_for
& DISPREG
)
294 rdisp
= thisnib
& 0x7;
296 else if (looking_for
& KBIT
)
313 else if (looking_for
& L_8
)
317 if (looking_for
& PCREL
)
319 abs
= SEXTCHAR (data
[len
>> 1]);
321 else if (looking_for
& ABS8MEM
)
324 abs
= h8300hmode
? ~0xff0000ff : ~0xffff00ff;
325 abs
|= data
[len
>> 1] & 0xff;
329 abs
= data
[len
>> 1] & 0xff;
332 else if (looking_for
& L_3
)
338 else if (looking_for
== E
)
342 /* Fill in the args. */
344 op_type
*args
= q
->args
.nib
;
350 int rn
= (x
& DST
) ? rd
: rs
;
360 p
->type
= X (OP_IMM
, size
);
363 else if (x
& (IMM
| KBIT
| DBIT
))
365 p
->type
= X (OP_IMM
, size
);
371 Some ops (like mul) have two sizes. */
374 p
->type
= X (OP_REG
, size
);
379 p
->type
= X (OP_INC
, size
);
384 p
->type
= X (OP_DEC
, size
);
389 p
->type
= X (OP_DISP
, size
);
393 else if (x
& (ABS
| ABSJMP
| ABS8MEM
))
395 p
->type
= X (OP_DISP
, size
);
401 p
->type
= X (OP_MEM
, size
);
406 p
->type
= X (OP_PCREL
, size
);
407 p
->literal
= abs
+ addr
+ 2;
413 p
->type
= X (OP_IMM
, SP
);
418 p
->type
= X (OP_DISP
, size
);
420 p
->reg
= rdisp
& 0x7;
431 printf ("Hmmmm %x", x
);
437 /* But a jmp or a jsr gets automagically lvalued,
438 since we branch to their address not their
440 if (q
->how
== O (O_JSR
, SB
)
441 || q
->how
== O (O_JMP
, SB
))
443 dst
->src
.type
= lvalue (dst
->src
.type
, dst
->src
.reg
);
446 if (dst
->dst
.type
== -1)
449 dst
->opcode
= q
->how
;
450 dst
->cycles
= q
->time
;
452 /* And a jsr to these locations are turned into magic
455 if (dst
->opcode
== O (O_JSR
, SB
))
457 switch (dst
->src
.literal
)
460 dst
->opcode
= O (O_SYS_OPEN
, SB
);
463 dst
->opcode
= O (O_SYS_READ
, SB
);
466 dst
->opcode
= O (O_SYS_WRITE
, SB
);
469 dst
->opcode
= O (O_SYS_LSEEK
, SB
);
472 dst
->opcode
= O (O_SYS_CLOSE
, SB
);
475 dst
->opcode
= O (O_SYS_STAT
, SB
);
478 dst
->opcode
= O (O_SYS_FSTAT
, SB
);
481 /* End of Processing for system calls. */
484 dst
->next_pc
= addr
+ len
/ 2;
488 printf ("Don't understand %x \n", looking_for
);
499 /* Fell off the end. */
500 dst
->opcode
= O (O_ILL
, SB
);
508 /* Find the next cache entry to use. */
509 idx
= cpu
.cache_top
+ 1;
511 if (idx
>= cpu
.csize
)
517 /* Throw away its old meaning. */
518 cpu
.cache_idx
[cpu
.cache
[idx
].oldpc
] = 0;
520 /* Set to new address. */
521 cpu
.cache
[idx
].oldpc
= pc
;
523 /* Fill in instruction info. */
524 decode (pc
, cpu
.memory
+ pc
, cpu
.cache
+ idx
);
526 /* Point to new cache entry. */
527 cpu
.cache_idx
[pc
] = idx
;
531 static unsigned char *breg
[18];
532 static unsigned short *wreg
[18];
533 static unsigned int *lreg
[18];
535 #define GET_B_REG(x) *(breg[x])
536 #define SET_B_REG(x,y) (*(breg[x])) = (y)
537 #define GET_W_REG(x) *(wreg[x])
538 #define SET_W_REG(x,y) (*(wreg[x])) = (y)
540 #define GET_L_REG(x) *(lreg[x])
541 #define SET_L_REG(x,y) (*(lreg[x])) = (y)
543 #define GET_MEMORY_L(x) \
545 ? ((cpu.memory[x+0] << 24) | (cpu.memory[x+1] << 16) \
546 | (cpu.memory[x+2] << 8) | cpu.memory[x+3]) \
547 : ((cpu.eightbit[(x+0) & 0xff] << 24) | (cpu.eightbit[(x+1) & 0xff] << 16) \
548 | (cpu.eightbit[(x+2) & 0xff] << 8) | cpu.eightbit[(x+3) & 0xff]))
550 #define GET_MEMORY_W(x) \
552 ? ((cpu.memory[x+0] << 8) | (cpu.memory[x+1] << 0)) \
553 : ((cpu.eightbit[(x+0) & 0xff] << 8) | (cpu.eightbit[(x+1) & 0xff] << 0)))
556 #define GET_MEMORY_B(x) \
557 (x < memory_size ? (cpu.memory[x]) : (cpu.eightbit[x & 0xff]))
559 #define SET_MEMORY_L(x,y) \
560 { register unsigned char *_p; register int __y = y; \
561 _p = (x < memory_size ? cpu.memory+x : cpu.eightbit + (x & 0xff)); \
562 _p[0] = (__y)>>24; _p[1] = (__y)>>16; \
563 _p[2] = (__y)>>8; _p[3] = (__y)>>0;}
565 #define SET_MEMORY_W(x,y) \
566 { register unsigned char *_p; register int __y = y; \
567 _p = (x < memory_size ? cpu.memory+x : cpu.eightbit + (x & 0xff)); \
568 _p[0] = (__y)>>8; _p[1] =(__y);}
570 #define SET_MEMORY_B(x,y) \
571 (x < memory_size ? (cpu.memory[(x)] = y) : (cpu.eightbit[x & 0xff] = y))
577 int abs
= arg
->literal
;
584 return GET_B_REG (rn
);
586 return GET_W_REG (rn
);
588 return GET_L_REG (rn
);
599 r
= GET_MEMORY_B (t
);
608 r
= GET_MEMORY_W (t
);
616 r
= GET_MEMORY_L (t
);
623 case X (OP_DISP
, SB
):
624 t
= GET_L_REG (rn
) + abs
;
626 return GET_MEMORY_B (t
);
628 case X (OP_DISP
, SW
):
629 t
= GET_L_REG (rn
) + abs
;
631 return GET_MEMORY_W (t
);
633 case X (OP_DISP
, SL
):
634 t
= GET_L_REG (rn
) + abs
;
636 return GET_MEMORY_L (t
);
639 t
= GET_MEMORY_L (abs
);
644 t
= GET_MEMORY_W (abs
);
649 abort (); /* ?? May be something more usefull? */
656 store (ea_type
*arg
, int n
)
659 int abs
= arg
->literal
;
675 t
= GET_L_REG (rn
) - 1;
682 t
= (GET_L_REG (rn
) - 2) & cpu
.mask
;
688 t
= (GET_L_REG (rn
) - 4) & cpu
.mask
;
693 case X (OP_DISP
, SB
):
694 t
= GET_L_REG (rn
) + abs
;
699 case X (OP_DISP
, SW
):
700 t
= GET_L_REG (rn
) + abs
;
705 case X (OP_DISP
, SL
):
706 t
= GET_L_REG (rn
) + abs
;
742 memory_size
= H8300S_MSIZE
;
744 memory_size
= H8300H_MSIZE
;
746 memory_size
= H8300_MSIZE
;
747 cpu
.memory
= (unsigned char *) calloc (sizeof (char), memory_size
);
748 cpu
.cache_idx
= (unsigned short *) calloc (sizeof (short), memory_size
);
749 cpu
.eightbit
= (unsigned char *) calloc (sizeof (char), 256);
751 /* `msize' must be a power of two. */
752 if ((memory_size
& (memory_size
- 1)) != 0)
754 cpu
.mask
= memory_size
- 1;
756 for (i
= 0; i
< 9; i
++)
761 for (i
= 0; i
< 8; i
++)
763 unsigned char *p
= (unsigned char *) (cpu
.regs
+ i
);
764 unsigned char *e
= (unsigned char *) (cpu
.regs
+ i
+ 1);
765 unsigned short *q
= (unsigned short *) (cpu
.regs
+ i
);
766 unsigned short *u
= (unsigned short *) (cpu
.regs
+ i
+ 1);
767 cpu
.regs
[i
] = 0x00112233;
780 wreg
[i
] = wreg
[i
+ 8] = 0;
793 if (wreg
[i
] == 0 || wreg
[i
+ 8] == 0)
796 lreg
[i
] = &cpu
.regs
[i
];
799 lreg
[8] = &cpu
.regs
[8];
801 /* Initialize the seg registers. */
803 sim_set_simcache_size (CSIZE
);
810 cpu
.state
= SIM_STATE_STOPPED
;
811 cpu
.exception
= SIGINT
;
821 #define I (intMaskBit != 0)
824 mop (decoded_inst
*code
, int bsize
, int sign
)
834 bsize
? SEXTCHAR (GET_W_REG (code
->dst
.reg
)) :
835 SEXTSHORT (GET_W_REG (code
->dst
.reg
));
837 bsize
? SEXTCHAR (GET_B_REG (code
->src
.reg
)) :
838 SEXTSHORT (GET_W_REG (code
->src
.reg
));
842 multiplicand
= bsize
? UEXTCHAR (GET_W_REG (code
->dst
.reg
)) :
843 UEXTSHORT (GET_W_REG (code
->dst
.reg
));
845 bsize
? UEXTCHAR (GET_B_REG (code
->src
.reg
)) :
846 UEXTSHORT (GET_W_REG (code
->src
.reg
));
849 result
= multiplier
* multiplicand
;
853 n
= result
& (bsize
? 0x8000 : 0x80000000);
854 nz
= result
& (bsize
? 0xffff : 0xffffffff);
858 SET_W_REG (code
->dst
.reg
, result
);
862 SET_L_REG (code
->dst
.reg
, result
);
865 return ((n
== 1) << 1) | (nz
== 1);
869 #define ONOT(name, how) \
874 rd = GET_B_REG (code->src.reg); \
882 rd = GET_W_REG (code->src.reg); \
889 int hm = 0x80000000; \
890 rd = GET_L_REG (code->src.reg); \
895 #define OSHIFTS(name, how1, how2) \
900 rd = GET_B_REG (code->src.reg); \
901 if ((GET_MEMORY_B (pc + 1) & 0x40) == 0) \
915 rd = GET_W_REG (code->src.reg); \
916 if ((GET_MEMORY_B (pc + 1) & 0x40) == 0) \
929 int hm = 0x80000000; \
930 rd = GET_L_REG (code->src.reg); \
931 if ((GET_MEMORY_B (pc + 1) & 0x40) == 0) \
942 #define OBITOP(name,f, s, op) \
947 if (f) ea = fetch (&code->dst); \
948 m=1<< fetch (&code->src); \
950 if (s) store (&code->dst,ea); goto next; \
954 sim_stop (SIM_DESC sd
)
956 cpu
.state
= SIM_STATE_STOPPED
;
957 cpu
.exception
= SIGINT
;
970 #define SP_REGNUM R7_REGNUM /* Contains address of top of stack */
971 #define FP_REGNUM R6_REGNUM /* Contains address of executing
974 #define CCR_REGNUM 8 /* Contains processor status */
975 #define PC_REGNUM 9 /* Contains program counter */
977 #define CYCLE_REGNUM 10
979 #define EXR_REGNUM 11
980 #define INST_REGNUM 12
981 #define TICK_REGNUM 13
984 sim_resume (SIM_DESC sd
, int step
, int siggnal
)
989 int tick_start
= get_now ();
998 int c
, nz
, v
, n
, u
, h
, ui
, intMaskBit
;
1003 prev
= signal (SIGINT
, control_c
);
1007 cpu
.state
= SIM_STATE_STOPPED
;
1008 cpu
.exception
= SIGTRAP
;
1012 cpu
.state
= SIM_STATE_RUNNING
;
1018 /* The PC should never be odd. */
1034 cidx
= cpu
.cache_idx
[pc
];
1035 code
= cpu
.cache
+ cidx
;
1038 #define ALUOP(STORE, NAME, HOW) \
1039 case O (NAME, SB): HOW; if (STORE) goto alu8; else goto just_flags_alu8; \
1040 case O (NAME, SW): HOW; if (STORE) goto alu16; else goto just_flags_alu16; \
1041 case O (NAME, SL): HOW; if (STORE) goto alu32; else goto just_flags_alu32;
1044 #define LOGOP(NAME, HOW) \
1045 case O (NAME, SB): HOW; goto log8; \
1046 case O (NAME, SW): HOW; goto log16; \
1047 case O (NAME, SL): HOW; goto log32;
1054 printf ("%x %d %s\n", pc
, code
->opcode
,
1055 code
->op
? code
->op
->name
: "**");
1057 cpu
.stats
[code
->opcode
]++;
1063 cycles
+= code
->cycles
;
1067 switch (code
->opcode
)
1071 * This opcode is a fake for when we get to an
1072 * instruction which hasnt been compiled
1079 case O (O_SUBX
, SB
):
1080 rd
= fetch (&code
->dst
);
1081 ea
= fetch (&code
->src
);
1086 case O (O_ADDX
, SB
):
1087 rd
= fetch (&code
->dst
);
1088 ea
= fetch (&code
->src
);
1093 #define EA ea = fetch (&code->src);
1094 #define RD_EA ea = fetch (&code->src); rd = fetch (&code->dst);
1096 ALUOP (1, O_SUB
, RD_EA
;
1099 ALUOP (1, O_NEG
, EA
;
1105 rd
= GET_B_REG (code
->dst
.reg
);
1106 ea
= fetch (&code
->src
);
1110 rd
= GET_W_REG (code
->dst
.reg
);
1111 ea
= fetch (&code
->src
);
1115 rd
= GET_L_REG (code
->dst
.reg
);
1116 ea
= fetch (&code
->src
);
1121 LOGOP (O_AND
, RD_EA
;
1127 LOGOP (O_XOR
, RD_EA
;
1131 case O (O_MOV_TO_MEM
, SB
):
1132 res
= GET_B_REG (code
->src
.reg
);
1134 case O (O_MOV_TO_MEM
, SW
):
1135 res
= GET_W_REG (code
->src
.reg
);
1137 case O (O_MOV_TO_MEM
, SL
):
1138 res
= GET_L_REG (code
->src
.reg
);
1142 case O (O_MOV_TO_REG
, SB
):
1143 res
= fetch (&code
->src
);
1144 SET_B_REG (code
->dst
.reg
, res
);
1145 goto just_flags_log8
;
1146 case O (O_MOV_TO_REG
, SW
):
1147 res
= fetch (&code
->src
);
1148 SET_W_REG (code
->dst
.reg
, res
);
1149 goto just_flags_log16
;
1150 case O (O_MOV_TO_REG
, SL
):
1151 res
= fetch (&code
->src
);
1152 SET_L_REG (code
->dst
.reg
, res
);
1153 goto just_flags_log32
;
1155 case O (O_EEPMOV
, SB
):
1156 case O (O_EEPMOV
, SW
):
1157 if (h8300hmode
|| h8300smode
)
1159 register unsigned char *_src
, *_dst
;
1160 unsigned int count
= ((code
->opcode
== O (O_EEPMOV
, SW
))
1161 ? cpu
.regs
[R4_REGNUM
] & 0xffff
1162 : cpu
.regs
[R4_REGNUM
] & 0xff);
1164 _src
= (cpu
.regs
[R5_REGNUM
] < memory_size
1165 ? cpu
.memory
+ cpu
.regs
[R5_REGNUM
]
1166 : cpu
.eightbit
+ (cpu
.regs
[R5_REGNUM
] & 0xff));
1167 if ((_src
+ count
) >= (cpu
.memory
+ memory_size
))
1169 if ((_src
+ count
) >= (cpu
.eightbit
+ 0x100))
1172 _dst
= (cpu
.regs
[R6_REGNUM
] < memory_size
1173 ? cpu
.memory
+ cpu
.regs
[R6_REGNUM
]
1174 : cpu
.eightbit
+ (cpu
.regs
[R6_REGNUM
] & 0xff));
1175 if ((_dst
+ count
) >= (cpu
.memory
+ memory_size
))
1177 if ((_dst
+ count
) >= (cpu
.eightbit
+ 0x100))
1180 memcpy (_dst
, _src
, count
);
1182 cpu
.regs
[R5_REGNUM
] += count
;
1183 cpu
.regs
[R6_REGNUM
] += count
;
1184 cpu
.regs
[R4_REGNUM
] &= ((code
->opcode
== O (O_EEPMOV
, SW
))
1185 ? (~0xffff) : (~0xff));
1186 cycles
+= 2 * count
;
1191 case O (O_ADDS
, SL
):
1192 SET_L_REG (code
->dst
.reg
,
1193 GET_L_REG (code
->dst
.reg
)
1194 + code
->src
.literal
);
1198 case O (O_SUBS
, SL
):
1199 SET_L_REG (code
->dst
.reg
,
1200 GET_L_REG (code
->dst
.reg
)
1201 - code
->src
.literal
);
1205 rd
= fetch (&code
->dst
);
1206 ea
= fetch (&code
->src
);
1209 goto just_flags_alu8
;
1212 rd
= fetch (&code
->dst
);
1213 ea
= fetch (&code
->src
);
1216 goto just_flags_alu16
;
1219 rd
= fetch (&code
->dst
);
1220 ea
= fetch (&code
->src
);
1223 goto just_flags_alu32
;
1227 rd
= GET_B_REG (code
->src
.reg
);
1230 SET_B_REG (code
->src
.reg
, res
);
1231 goto just_flags_inc8
;
1234 rd
= GET_W_REG (code
->dst
.reg
);
1235 ea
= -code
->src
.literal
;
1237 SET_W_REG (code
->dst
.reg
, res
);
1238 goto just_flags_inc16
;
1241 rd
= GET_L_REG (code
->dst
.reg
);
1242 ea
= -code
->src
.literal
;
1244 SET_L_REG (code
->dst
.reg
, res
);
1245 goto just_flags_inc32
;
1249 rd
= GET_B_REG (code
->src
.reg
);
1252 SET_B_REG (code
->src
.reg
, res
);
1253 goto just_flags_inc8
;
1256 rd
= GET_W_REG (code
->dst
.reg
);
1257 ea
= code
->src
.literal
;
1259 SET_W_REG (code
->dst
.reg
, res
);
1260 goto just_flags_inc16
;
1263 rd
= GET_L_REG (code
->dst
.reg
);
1264 ea
= code
->src
.literal
;
1266 SET_L_REG (code
->dst
.reg
, res
);
1267 goto just_flags_inc32
;
1269 #define GET_CCR(x) BUILDSR();x = cpu.ccr
1270 #define GET_EXR(x) BUILDEXR ();x = cpu.exr
1274 res
= fetch (&code
->src
);
1278 if (code
->src
.type
== OP_CCR
)
1282 else if (code
->src
.type
== OP_EXR
&& h8300smode
)
1288 store (&code
->dst
, res
);
1291 case O (O_ANDC
, SB
):
1292 if (code
->dst
.type
== OP_CCR
)
1296 else if (code
->dst
.type
== OP_EXR
&& h8300smode
)
1302 ea
= code
->src
.literal
;
1307 if (code
->dst
.type
== OP_CCR
)
1311 else if (code
->dst
.type
== OP_EXR
&& h8300smode
)
1317 ea
= code
->src
.literal
;
1321 case O (O_XORC
, SB
):
1322 if (code
->dst
.type
== OP_CCR
)
1326 else if (code
->dst
.type
== OP_EXR
&& h8300smode
)
1332 ea
= code
->src
.literal
;
1373 if (((Z
|| (N
^ V
)) == 0))
1379 if (((Z
|| (N
^ V
)) == 1))
1413 /* System call processing starts. */
1414 case O (O_SYS_OPEN
, SB
):
1416 int len
= 0; /* Length of filename. */
1417 char *filename
; /* Filename would go here. */
1418 char temp_char
; /* Temporary character */
1419 int mode
= 0; /* Mode bits for the file. */
1420 int open_return
; /* Return value of open, file descriptor. */
1421 int i
; /* Loop counter */
1422 int filename_ptr
; /* Pointer to filename in cpu memory. */
1424 /* Setting filename_ptr to first argument of open. */
1425 filename_ptr
= h8300hmode
? GET_L_REG (0) : GET_W_REG (0);
1427 /* Trying to get mode. */
1428 if (h8300hmode
|| h8300smode
)
1430 mode
= GET_MEMORY_L (cpu
.regs
[7] + 4);
1434 mode
= GET_MEMORY_W (cpu
.regs
[7] + 2);
1437 /* Trying to find the length of the filename. */
1438 temp_char
= GET_MEMORY_B (cpu
.regs
[0]);
1441 while (temp_char
!= '\0')
1443 temp_char
= GET_MEMORY_B (filename_ptr
+ len
);
1447 /* Allocating space for the filename. */
1448 filename
= (char *) malloc (sizeof (char) * len
);
1450 /* String copying the filename from memory. */
1451 for (i
= 0; i
< len
; i
++)
1453 temp_char
= GET_MEMORY_B (filename_ptr
+ i
);
1454 filename
[i
] = temp_char
;
1457 /* Callback to open and return the file descriptor. */
1458 open_return
= sim_callback
->open (sim_callback
, filename
, mode
);
1460 /* Return value in register 0. */
1461 cpu
.regs
[0] = open_return
;
1463 /* Freeing memory used for filename. */
1468 case O (O_SYS_READ
, SB
):
1470 char *char_ptr
; /* Where characters read would be stored. */
1471 int fd
; /* File descriptor */
1472 int buf_size
; /* BUF_SIZE parameter in read. */
1473 int i
= 0; /* Temporary Loop counter */
1474 int read_return
= 0; /* Return value from callback to
1477 fd
= h8300hmode
? GET_L_REG (0) : GET_W_REG (0);
1478 buf_size
= h8300hmode
? GET_L_REG (2) : GET_W_REG (2);
1480 char_ptr
= (char *) malloc (sizeof (char) * buf_size
);
1482 /* Callback to read and return the no. of characters read. */
1484 sim_callback
->read (sim_callback
, fd
, char_ptr
, buf_size
);
1486 /* The characters read are stored in cpu memory. */
1487 for (i
= 0; i
< buf_size
; i
++)
1489 SET_MEMORY_B ((cpu
.regs
[1] + (sizeof (char) * i
)),
1490 *(char_ptr
+ (sizeof (char) * i
)));
1493 /* Return value in Register 0. */
1494 cpu
.regs
[0] = read_return
;
1496 /* Freeing memory used as buffer. */
1501 case O (O_SYS_WRITE
, SB
):
1503 int fd
; /* File descriptor */
1504 char temp_char
; /* Temporary character */
1505 int len
; /* Length of write, Parameter II to write. */
1506 int char_ptr
; /* Character Pointer, Parameter I of write. */
1507 char *ptr
; /* Where characters to be written are stored.
1509 int write_return
; /* Return value from callback to write. */
1510 int i
= 0; /* Loop counter */
1512 fd
= h8300hmode
? GET_L_REG (0) : GET_W_REG (0);
1513 char_ptr
= h8300hmode
? GET_L_REG (1) : GET_W_REG (1);
1514 len
= h8300hmode
? GET_L_REG (2) : GET_W_REG (2);
1516 /* Allocating space for the characters to be written. */
1517 ptr
= (char *) malloc (sizeof (char) * len
);
1519 /* Fetching the characters from cpu memory. */
1520 for (i
= 0; i
< len
; i
++)
1522 temp_char
= GET_MEMORY_B (char_ptr
+ i
);
1526 /* Callback write and return the no. of characters written. */
1527 write_return
= sim_callback
->write (sim_callback
, fd
, ptr
, len
);
1529 /* Return value in Register 0. */
1530 cpu
.regs
[0] = write_return
;
1532 /* Freeing memory used as buffer. */
1537 case O (O_SYS_LSEEK
, SB
):
1539 int fd
; /* File descriptor */
1540 int offset
; /* Offset */
1541 int origin
; /* Origin */
1542 int lseek_return
; /* Return value from callback to lseek. */
1544 fd
= h8300hmode
? GET_L_REG (0) : GET_W_REG (0);
1545 offset
= h8300hmode
? GET_L_REG (1) : GET_W_REG (1);
1546 origin
= h8300hmode
? GET_L_REG (2) : GET_W_REG (2);
1548 /* Callback lseek and return offset. */
1550 sim_callback
->lseek (sim_callback
, fd
, offset
, origin
);
1552 /* Return value in register 0. */
1553 cpu
.regs
[0] = lseek_return
;
1557 case O (O_SYS_CLOSE
, SB
):
1559 int fd
; /* File descriptor */
1560 int close_return
; /* Return value from callback to close. */
1562 fd
= h8300hmode
? GET_L_REG (0) : GET_W_REG (0);
1564 /* Callback close and return. */
1565 close_return
= sim_callback
->close (sim_callback
, fd
);
1567 /* Return value in register 0. */
1568 cpu
.regs
[0] = close_return
;
1572 case O (O_SYS_FSTAT
, SB
):
1574 int fd
; /* File descriptor */
1575 struct stat stat_rec
; /* Stat record */
1576 int fstat_return
; /* Return value from callback to stat. */
1577 int stat_ptr
; /* Pointer to stat record. */
1578 char *temp_stat_ptr
; /* Temporary stat_rec pointer. */
1580 fd
= h8300hmode
? GET_L_REG (0) : GET_W_REG (0);
1582 /* Setting stat_ptr to second argument of stat. */
1583 stat_ptr
= h8300hmode
? GET_L_REG (1) : GET_W_REG (1);
1585 /* Callback stat and return. */
1586 fstat_return
= sim_callback
->fstat (sim_callback
, fd
, &stat_rec
);
1588 /* Have stat_ptr point to starting of stat_rec. */
1589 temp_stat_ptr
= (char *) (&stat_rec
);
1591 /* Setting up the stat structure returned. */
1592 SET_MEMORY_W (stat_ptr
, stat_rec
.st_dev
);
1594 SET_MEMORY_W (stat_ptr
, stat_rec
.st_ino
);
1596 SET_MEMORY_L (stat_ptr
, stat_rec
.st_mode
);
1598 SET_MEMORY_W (stat_ptr
, stat_rec
.st_nlink
);
1600 SET_MEMORY_W (stat_ptr
, stat_rec
.st_uid
);
1602 SET_MEMORY_W (stat_ptr
, stat_rec
.st_gid
);
1604 SET_MEMORY_W (stat_ptr
, stat_rec
.st_rdev
);
1606 SET_MEMORY_L (stat_ptr
, stat_rec
.st_size
);
1608 SET_MEMORY_L (stat_ptr
, stat_rec
.st_atime
);
1610 SET_MEMORY_L (stat_ptr
, stat_rec
.st_mtime
);
1612 SET_MEMORY_L (stat_ptr
, stat_rec
.st_ctime
);
1614 /* Return value in register 0. */
1615 cpu
.regs
[0] = fstat_return
;
1619 case O (O_SYS_STAT
, SB
):
1621 int len
= 0; /* Length of filename. */
1622 char *filename
; /* Filename would go here. */
1623 char temp_char
; /* Temporary character */
1624 int filename_ptr
; /* Pointer to filename in cpu memory. */
1625 struct stat stat_rec
; /* Stat record */
1626 int stat_return
; /* Return value from callback to stat */
1627 int stat_ptr
; /* Pointer to stat record. */
1628 char *temp_stat_ptr
; /* Temporary stat_rec pointer. */
1629 int i
= 0; /* Loop Counter */
1631 /* Setting filename_ptr to first argument of open. */
1632 filename_ptr
= h8300hmode
? GET_L_REG (0) : GET_W_REG (0);
1634 /* Trying to find the length of the filename. */
1635 temp_char
= GET_MEMORY_B (cpu
.regs
[0]);
1638 while (temp_char
!= '\0')
1640 temp_char
= GET_MEMORY_B (filename_ptr
+ len
);
1644 /* Allocating space for the filename. */
1645 filename
= (char *) malloc (sizeof (char) * len
);
1647 /* String copying the filename from memory. */
1648 for (i
= 0; i
< len
; i
++)
1650 temp_char
= GET_MEMORY_B (filename_ptr
+ i
);
1651 filename
[i
] = temp_char
;
1654 /* Setting stat_ptr to second argument of stat. */
1655 /* stat_ptr = cpu.regs[1]; */
1656 stat_ptr
= h8300hmode
? GET_L_REG (1) : GET_W_REG (1);
1658 /* Callback stat and return. */
1660 sim_callback
->stat (sim_callback
, filename
, &stat_rec
);
1662 /* Have stat_ptr point to starting of stat_rec. */
1663 temp_stat_ptr
= (char *) (&stat_rec
);
1665 /* Freeing memory used for filename. */
1668 /* Setting up the stat structure returned. */
1669 SET_MEMORY_W (stat_ptr
, stat_rec
.st_dev
);
1671 SET_MEMORY_W (stat_ptr
, stat_rec
.st_ino
);
1673 SET_MEMORY_L (stat_ptr
, stat_rec
.st_mode
);
1675 SET_MEMORY_W (stat_ptr
, stat_rec
.st_nlink
);
1677 SET_MEMORY_W (stat_ptr
, stat_rec
.st_uid
);
1679 SET_MEMORY_W (stat_ptr
, stat_rec
.st_gid
);
1681 SET_MEMORY_W (stat_ptr
, stat_rec
.st_rdev
);
1683 SET_MEMORY_L (stat_ptr
, stat_rec
.st_size
);
1685 SET_MEMORY_L (stat_ptr
, stat_rec
.st_atime
);
1687 SET_MEMORY_L (stat_ptr
, stat_rec
.st_mtime
);
1689 SET_MEMORY_L (stat_ptr
, stat_rec
.st_ctime
);
1691 /* Return value in register 0. */
1692 cpu
.regs
[0] = stat_return
;
1695 /* End of system call processing. */
1697 ONOT (O_NOT
, rd
= ~rd
; v
= 0;);
1699 c
= rd
& hm
; v
= 0; rd
<<= 1,
1700 c
= rd
& (hm
>> 1); v
= 0; rd
<<= 2);
1702 c
= rd
& 1; v
= 0; rd
= (unsigned int) rd
>> 1,
1703 c
= rd
& 2; v
= 0; rd
= (unsigned int) rd
>> 2);
1705 c
= rd
& hm
; v
= (rd
& hm
) != ((rd
& (hm
>> 1)) << 1); rd
<<= 1,
1706 c
= rd
& (hm
>> 1); v
= (rd
& (hm
>> 1)) != ((rd
& (hm
>> 2)) << 2); rd
<<= 2);
1708 t
= rd
& hm
; c
= rd
& 1; v
= 0; rd
>>= 1; rd
|= t
,
1709 t
= rd
& hm
; c
= rd
& 2; v
= 0; rd
>>= 2; rd
|= t
| t
>> 1);
1711 c
= rd
& hm
; v
= 0; rd
<<= 1; rd
|= C
,
1712 c
= rd
& hm
; v
= 0; rd
<<= 1; rd
|= C
; c
= rd
& hm
; rd
<<= 1; rd
|= C
);
1714 c
= rd
& 1; v
= 0; rd
= (unsigned int) rd
>> 1; if (c
) rd
|= hm
,
1715 c
= rd
& 1; v
= 0; rd
= (unsigned int) rd
>> 1; if (c
) rd
|= hm
; c
= rd
& 1; rd
= (unsigned int) rd
>> 1; if (c
) rd
|= hm
);
1717 t
= rd
& hm
; rd
<<= 1; rd
|= C
; c
= t
; v
= 0,
1718 t
= rd
& hm
; rd
<<= 1; rd
|= C
; c
= t
; v
= 0; t
= rd
& hm
; rd
<<= 1; rd
|= C
; c
= t
);
1720 t
= rd
& 1; rd
= (unsigned int) rd
>> 1; if (C
) rd
|= hm
; c
= t
; v
= 0,
1721 t
= rd
& 1; rd
= (unsigned int) rd
>> 1; if (C
) rd
|= hm
; c
= t
; v
= 0; t
= rd
& 1; rd
= (unsigned int) rd
>> 1; if (C
) rd
|= hm
; c
= t
);
1725 pc
= fetch (&code
->src
);
1733 pc
= fetch (&code
->src
);
1740 SET_MEMORY_L (tmp
, code
->next_pc
);
1745 SET_MEMORY_W (tmp
, code
->next_pc
);
1752 pc
= code
->src
.literal
;
1763 pc
= GET_MEMORY_L (tmp
);
1768 pc
= GET_MEMORY_W (tmp
);
1777 cpu
.state
= SIM_STATE_STOPPED
;
1778 cpu
.exception
= SIGILL
;
1780 case O (O_SLEEP
, SN
):
1781 /* FIXME: Doesn't this break for breakpoints when r0
1782 contains just the right (er, wrong) value? */
1783 cpu
.state
= SIM_STATE_STOPPED
;
1784 /* The format of r0 is defined by target newlib. Expand
1785 the macros here instead of looking for .../sys/wait.h. */
1786 #define SIM_WIFEXITED(v) (((v) & 0xff) == 0)
1787 #define SIM_WIFSIGNALED(v) (((v) & 0x7f) > 0 && (((v) & 0x7f) < 0x7f))
1788 if (! SIM_WIFEXITED (cpu
.regs
[0]) && SIM_WIFSIGNALED (cpu
.regs
[0]))
1789 cpu
.exception
= SIGILL
;
1791 cpu
.exception
= SIGTRAP
;
1794 cpu
.state
= SIM_STATE_STOPPED
;
1795 cpu
.exception
= SIGTRAP
;
1798 OBITOP (O_BNOT
, 1, 1, ea
^= m
);
1799 OBITOP (O_BTST
, 1, 0, nz
= ea
& m
);
1800 OBITOP (O_BCLR
, 1, 1, ea
&= ~m
);
1801 OBITOP (O_BSET
, 1, 1, ea
|= m
);
1802 OBITOP (O_BLD
, 1, 0, c
= ea
& m
);
1803 OBITOP (O_BILD
, 1, 0, c
= !(ea
& m
));
1804 OBITOP (O_BST
, 1, 1, ea
&= ~m
;
1806 OBITOP (O_BIST
, 1, 1, ea
&= ~m
;
1808 OBITOP (O_BAND
, 1, 0, c
= (ea
& m
) && C
);
1809 OBITOP (O_BIAND
, 1, 0, c
= !(ea
& m
) && C
);
1810 OBITOP (O_BOR
, 1, 0, c
= (ea
& m
) || C
);
1811 OBITOP (O_BIOR
, 1, 0, c
= !(ea
& m
) || C
);
1812 OBITOP (O_BXOR
, 1, 0, c
= ((ea
& m
) != 0) != C
);
1813 OBITOP (O_BIXOR
, 1, 0, c
= !(ea
& m
) != C
);
1815 #define MOP(bsize, signed) \
1816 mop (code, bsize, signed); \
1819 case O (O_MULS
, SB
):
1822 case O (O_MULS
, SW
):
1825 case O (O_MULU
, SB
):
1828 case O (O_MULU
, SW
):
1833 if (!h8300smode
|| code
->src
.type
!= X (OP_REG
, SL
))
1835 switch (code
->src
.reg
)
1845 res
= fetch (&code
->src
);
1846 store (&code
->src
, res
| 0x80);
1847 goto just_flags_log8
;
1849 case O (O_DIVU
, SB
):
1851 rd
= GET_W_REG (code
->dst
.reg
);
1852 ea
= GET_B_REG (code
->src
.reg
);
1855 tmp
= (unsigned) rd
% ea
;
1856 rd
= (unsigned) rd
/ ea
;
1858 SET_W_REG (code
->dst
.reg
, (rd
& 0xff) | (tmp
<< 8));
1864 case O (O_DIVU
, SW
):
1866 rd
= GET_L_REG (code
->dst
.reg
);
1867 ea
= GET_W_REG (code
->src
.reg
);
1872 tmp
= (unsigned) rd
% ea
;
1873 rd
= (unsigned) rd
/ ea
;
1875 SET_L_REG (code
->dst
.reg
, (rd
& 0xffff) | (tmp
<< 16));
1879 case O (O_DIVS
, SB
):
1882 rd
= SEXTSHORT (GET_W_REG (code
->dst
.reg
));
1883 ea
= SEXTCHAR (GET_B_REG (code
->src
.reg
));
1886 tmp
= (int) rd
% (int) ea
;
1887 rd
= (int) rd
/ (int) ea
;
1893 SET_W_REG (code
->dst
.reg
, (rd
& 0xff) | (tmp
<< 8));
1896 case O (O_DIVS
, SW
):
1898 rd
= GET_L_REG (code
->dst
.reg
);
1899 ea
= SEXTSHORT (GET_W_REG (code
->src
.reg
));
1902 tmp
= (int) rd
% (int) ea
;
1903 rd
= (int) rd
/ (int) ea
;
1904 n
= rd
& 0x80000000;
1909 SET_L_REG (code
->dst
.reg
, (rd
& 0xffff) | (tmp
<< 16));
1912 case O (O_EXTS
, SW
):
1913 rd
= GET_W_REG (code
->src
.reg
) & 0xff; /* Yes, src, not dst. */
1914 ea
= rd
& 0x80 ? -256 : 0;
1917 case O (O_EXTS
, SL
):
1918 rd
= GET_W_REG (code
->src
.reg
) & 0xffff;
1919 ea
= rd
& 0x8000 ? -65536 : 0;
1922 case O (O_EXTU
, SW
):
1923 rd
= GET_W_REG (code
->src
.reg
) & 0xff;
1927 case O (O_EXTU
, SL
):
1928 rd
= GET_W_REG (code
->src
.reg
) & 0xffff;
1938 int nregs
, firstreg
, i
;
1940 nregs
= GET_MEMORY_B (pc
+ 1);
1943 firstreg
= GET_MEMORY_B (pc
+ 3);
1945 for (i
= firstreg
; i
<= firstreg
+ nregs
; i
++)
1948 SET_MEMORY_L (cpu
.regs
[7], cpu
.regs
[i
]);
1955 int nregs
, firstreg
, i
;
1957 nregs
= GET_MEMORY_B (pc
+ 1);
1960 firstreg
= GET_MEMORY_B (pc
+ 3);
1962 for (i
= firstreg
; i
>= firstreg
- nregs
; i
--)
1964 cpu
.regs
[i
] = GET_MEMORY_L (cpu
.regs
[7]);
1972 cpu
.state
= SIM_STATE_STOPPED
;
1973 cpu
.exception
= SIGILL
;
1980 if (code
->dst
.type
== OP_CCR
)
1985 else if (code
->dst
.type
== OP_EXR
&& h8300smode
)
1996 /* When a branch works */
1997 pc
= code
->src
.literal
;
2000 /* Set the cond codes from res */
2003 /* Set the flags after an 8 bit inc/dec operation */
2007 v
= (rd
& 0x7f) == 0x7f;
2011 /* Set the flags after an 16 bit inc/dec operation */
2015 v
= (rd
& 0x7fff) == 0x7fff;
2019 /* Set the flags after an 32 bit inc/dec operation */
2021 n
= res
& 0x80000000;
2022 nz
= res
& 0xffffffff;
2023 v
= (rd
& 0x7fffffff) == 0x7fffffff;
2028 /* Set flags after an 8 bit shift op, carry,overflow set in insn */
2031 SET_B_REG (code
->src
.reg
, rd
);
2035 /* Set flags after an 16 bit shift op, carry,overflow set in insn */
2038 SET_W_REG (code
->src
.reg
, rd
);
2042 /* Set flags after an 32 bit shift op, carry,overflow set in insn */
2043 n
= (rd
& 0x80000000);
2044 nz
= rd
& 0xffffffff;
2045 SET_L_REG (code
->src
.reg
, rd
);
2049 store (&code
->dst
, res
);
2051 /* flags after a 32bit logical operation */
2052 n
= res
& 0x80000000;
2053 nz
= res
& 0xffffffff;
2058 store (&code
->dst
, res
);
2060 /* flags after a 16bit logical operation */
2068 store (&code
->dst
, res
);
2076 SET_B_REG (code
->dst
.reg
, res
);
2081 switch (code
->opcode
/ 4)
2084 v
= ((rd
& 0x80) == (ea
& 0x80)
2085 && (rd
& 0x80) != (res
& 0x80));
2089 v
= ((rd
& 0x80) != (-ea
& 0x80)
2090 && (rd
& 0x80) != (res
& 0x80));
2099 SET_W_REG (code
->dst
.reg
, res
);
2103 c
= (res
& 0x10000);
2104 switch (code
->opcode
/ 4)
2107 v
= ((rd
& 0x8000) == (ea
& 0x8000)
2108 && (rd
& 0x8000) != (res
& 0x8000));
2112 v
= ((rd
& 0x8000) != (-ea
& 0x8000)
2113 && (rd
& 0x8000) != (res
& 0x8000));
2122 SET_L_REG (code
->dst
.reg
, res
);
2124 n
= res
& 0x80000000;
2125 nz
= res
& 0xffffffff;
2126 switch (code
->opcode
/ 4)
2129 v
= ((rd
& 0x80000000) == (ea
& 0x80000000)
2130 && (rd
& 0x80000000) != (res
& 0x80000000));
2131 c
= ((unsigned) res
< (unsigned) rd
) || ((unsigned) res
< (unsigned) ea
);
2135 v
= ((rd
& 0x80000000) != (-ea
& 0x80000000)
2136 && (rd
& 0x80000000) != (res
& 0x80000000));
2137 c
= (unsigned) rd
< (unsigned) -ea
;
2140 v
= (rd
== 0x80000000);
2156 if (--poll_count
< 0)
2158 poll_count
= POLL_QUIT_INTERVAL
;
2159 if ((*sim_callback
->poll_quit
) != NULL
2160 && (*sim_callback
->poll_quit
) (sim_callback
))
2165 while (cpu
.state
== SIM_STATE_RUNNING
);
2166 cpu
.ticks
+= get_now () - tick_start
;
2167 cpu
.cycles
+= cycles
;
2174 signal (SIGINT
, prev
);
2178 sim_trace (SIM_DESC sd
)
2180 /* FIXME: Unfinished. */
2185 sim_write (SIM_DESC sd
, SIM_ADDR addr
, unsigned char *buffer
, int size
)
2192 for (i
= 0; i
< size
; i
++)
2194 if (addr
< memory_size
)
2196 cpu
.memory
[addr
+ i
] = buffer
[i
];
2197 cpu
.cache_idx
[addr
+ i
] = 0;
2200 cpu
.eightbit
[(addr
+ i
) & 0xff] = buffer
[i
];
2206 sim_read (SIM_DESC sd
, SIM_ADDR addr
, unsigned char *buffer
, int size
)
2211 if (addr
< memory_size
)
2212 memcpy (buffer
, cpu
.memory
+ addr
, size
);
2214 memcpy (buffer
, cpu
.eightbit
+ (addr
& 0xff), size
);
2220 sim_store_register (SIM_DESC sd
, int rn
, unsigned char *value
, int length
)
2225 longval
= (value
[0] << 24) | (value
[1] << 16) | (value
[2] << 8) | value
[3];
2226 shortval
= (value
[0] << 8) | (value
[1]);
2227 intval
= h8300hmode
? longval
: shortval
;
2245 cpu
.regs
[rn
] = intval
;
2254 cpu
.cycles
= longval
;
2258 cpu
.insts
= longval
;
2262 cpu
.ticks
= longval
;
2269 sim_fetch_register (SIM_DESC sd
, int rn
, unsigned char *buf
, int length
)
2276 if (!h8300smode
&& rn
>= EXR_REGNUM
)
2314 if (h8300hmode
|| longreg
)
2330 sim_stop_reason (SIM_DESC sd
, enum sim_stop
*reason
, int *sigrc
)
2332 #if 0 /* FIXME: This should work but we can't use it.
2333 grep for SLEEP above. */
2336 case SIM_STATE_EXITED
: *reason
= sim_exited
; break;
2337 case SIM_STATE_SIGNALLED
: *reason
= sim_signalled
; break;
2338 case SIM_STATE_STOPPED
: *reason
= sim_stopped
; break;
2342 *reason
= sim_stopped
;
2344 *sigrc
= cpu
.exception
;
2347 /* FIXME: Rename to sim_set_mem_size. */
2352 /* Memory size is fixed. */
2356 sim_set_simcache_size (int n
)
2362 cpu
.cache
= (decoded_inst
*) malloc (sizeof (decoded_inst
) * n
);
2363 memset (cpu
.cache
, 0, sizeof (decoded_inst
) * n
);
2369 sim_info (SIM_DESC sd
, int verbose
)
2371 double timetaken
= (double) cpu
.ticks
/ (double) now_persec ();
2372 double virttime
= cpu
.cycles
/ 10.0e6
;
2374 (*sim_callback
->printf_filtered
) (sim_callback
,
2375 "\n\n#instructions executed %10d\n",
2377 (*sim_callback
->printf_filtered
) (sim_callback
,
2378 "#cycles (v approximate) %10d\n",
2380 (*sim_callback
->printf_filtered
) (sim_callback
,
2381 "#real time taken %10.4f\n",
2383 (*sim_callback
->printf_filtered
) (sim_callback
,
2384 "#virtual time taked %10.4f\n",
2386 if (timetaken
!= 0.0)
2387 (*sim_callback
->printf_filtered
) (sim_callback
,
2388 "#simulation ratio %10.4f\n",
2389 virttime
/ timetaken
);
2390 (*sim_callback
->printf_filtered
) (sim_callback
,
2393 (*sim_callback
->printf_filtered
) (sim_callback
,
2394 "#cache size %10d\n",
2398 /* This to be conditional on `what' (aka `verbose'),
2399 however it was never passed as non-zero. */
2403 for (i
= 0; i
< O_LAST
; i
++)
2406 (*sim_callback
->printf_filtered
) (sim_callback
,
2407 "%d: %d\n", i
, cpu
.stats
[i
]);
2413 /* Indicate whether the cpu is an H8/300 or H8/300H.
2414 FLAG is non-zero for the H8/300H. */
2417 set_h8300h (int h_flag
, int s_flag
)
2419 /* FIXME: Much of the code in sim_load can be moved to sim_open.
2420 This function being replaced by a sim_open:ARGV configuration
2422 h8300hmode
= h_flag
;
2423 h8300smode
= s_flag
;
2427 sim_open (SIM_OPEN_KIND kind
,
2428 struct host_callback_struct
*ptr
,
2432 /* FIXME: Much of the code in sim_load can be moved here. */
2437 /* Fudge our descriptor. */
2438 return (SIM_DESC
) 1;
2442 sim_close (SIM_DESC sd
, int quitting
)
2444 /* Nothing to do. */
2447 /* Called by gdb to load a program into memory. */
2450 sim_load (SIM_DESC sd
, char *prog
, bfd
*abfd
, int from_tty
)
2454 /* FIXME: The code below that sets a specific variant of the H8/300
2455 being simulated should be moved to sim_open(). */
2457 /* See if the file is for the H8/300 or H8/300H. */
2458 /* ??? This may not be the most efficient way. The z8k simulator
2459 does this via a different mechanism (INIT_EXTRA_SYMTAB_INFO). */
2463 prog_bfd
= bfd_openr (prog
, "coff-h8300");
2464 if (prog_bfd
!= NULL
)
2466 /* Set the cpu type. We ignore failure from bfd_check_format
2467 and bfd_openr as sim_load_file checks too. */
2468 if (bfd_check_format (prog_bfd
, bfd_object
))
2470 unsigned long mach
= bfd_get_mach (prog_bfd
);
2471 set_h8300h (mach
== bfd_mach_h8300h
|| mach
== bfd_mach_h8300s
,
2472 mach
== bfd_mach_h8300s
);
2476 /* If we're using gdb attached to the simulator, then we have to
2477 reallocate memory for the simulator.
2479 When gdb first starts, it calls fetch_registers (among other
2480 functions), which in turn calls init_pointers, which allocates
2483 The problem is when we do that, we don't know whether we're
2484 debugging an H8/300 or H8/300H program.
2486 This is the first point at which we can make that determination,
2487 so we just reallocate memory now; this will also allow us to handle
2488 switching between H8/300 and H8/300H programs without exiting
2492 memory_size
= H8300S_MSIZE
;
2493 else if (h8300hmode
)
2494 memory_size
= H8300H_MSIZE
;
2496 memory_size
= H8300_MSIZE
;
2501 free (cpu
.cache_idx
);
2503 free (cpu
.eightbit
);
2505 cpu
.memory
= (unsigned char *) calloc (sizeof (char), memory_size
);
2506 cpu
.cache_idx
= (unsigned short *) calloc (sizeof (short), memory_size
);
2507 cpu
.eightbit
= (unsigned char *) calloc (sizeof (char), 256);
2509 /* `msize' must be a power of two. */
2510 if ((memory_size
& (memory_size
- 1)) != 0)
2512 cpu
.mask
= memory_size
- 1;
2514 if (sim_load_file (sd
, myname
, sim_callback
, prog
, prog_bfd
,
2515 sim_kind
== SIM_OPEN_DEBUG
,
2519 /* Close the bfd if we opened it. */
2520 if (abfd
== NULL
&& prog_bfd
!= NULL
)
2521 bfd_close (prog_bfd
);
2525 /* Close the bfd if we opened it. */
2526 if (abfd
== NULL
&& prog_bfd
!= NULL
)
2527 bfd_close (prog_bfd
);
2532 sim_create_inferior (SIM_DESC sd
, struct bfd
*abfd
, char **argv
, char **env
)
2535 cpu
.pc
= bfd_get_start_address (abfd
);
2542 sim_do_command (SIM_DESC sd
, char *cmd
)
2544 (*sim_callback
->printf_filtered
) (sim_callback
,
2545 "This simulator does not accept any commands.\n");
2549 sim_set_callbacks (struct host_callback_struct
*ptr
)