1 2021-05-16 Mike Frysinger <vapier@gentoo.org>
3 * interp.c: Replace config.h include with defs.h.
4 * cp1.c, dsp.c, dv-tx3904cpu.c, dv-tx3904irc.c, dv-tx3904sio.c,
5 dv-tx3904tmr.c, m16run.c, mdmx.c, micromipsrun.c, sim-main.c:
8 2021-05-16 Mike Frysinger <vapier@gentoo.org>
10 * config.in, configure: Regenerate.
12 2021-05-14 Mike Frysinger <vapier@gentoo.org>
14 * interp.c: Update include path.
16 2021-05-04 Mike Frysinger <vapier@gentoo.org>
18 * dv-tx3904sio.c: Include stdlib.h.
20 2021-05-04 Mike Frysinger <vapier@gentoo.org>
22 * configure.ac (hw_extra_devices): Inline contents into
23 SIM_AC_OPTION_HARDWARE and delete.
24 * configure: Regenerate.
26 2021-05-04 Mike Frysinger <vapier@gentoo.org>
28 * Makefile.in (SIM_IGEN_OBJ): Change @mips_igen_engine@ to engine.o.
29 (MIPS_EXTRA_LIB, SIM_EXTRA_LIBS): Delete.
30 * configure.ac (mips_igen_engine, mips_extra_libs): Delete.
31 * configure: Regenerate.
33 2021-05-04 Mike Frysinger <vapier@gentoo.org>
35 * mdmx.c (qh_acc): Change 2nd AccAddAQH to AccAddLQH.
37 2021-05-04 Mike Frysinger <vapier@gentoo.org>
39 * configure: Regenerate.
41 2021-05-01 Mike Frysinger <vapier@gentoo.org>
43 * cp1.c (store_fcr): Mark static.
45 2021-05-01 Mike Frysinger <vapier@gentoo.org>
47 * config.in, configure: Regenerate.
49 2021-04-23 Mike Frysinger <vapier@gentoo.org>
51 * configure.ac (hw_enabled): Delete.
52 (SIM_AC_OPTION_HARDWARE): Delete first two args.
53 * configure: Regenerate.
55 2021-04-22 Tom Tromey <tom@tromey.com>
57 * configure, config.in: Rebuild.
59 2021-04-22 Tom Tromey <tom@tromey.com>
61 * Makefile.in (interp.o, m16run.o, micromipsrun.o, multi-run.o):
63 (SIM_EXTRA_DEPS): New variable.
65 2021-04-22 Tom Tromey <tom@tromey.com>
69 2021-04-21 Mike Frysinger <vapier@gentoo.org>
71 * aclocal.m4: Regenerate.
73 2021-04-21 Simon Marchi <simon.marchi@polymtl.ca>
75 * configure: Regenerate.
77 2021-04-18 Mike Frysinger <vapier@gentoo.org>
79 * configure: Regenerate.
81 2021-04-12 Mike Frysinger <vapier@gentoo.org>
83 * interp.c (sim_open): Delete 3rd arg to sim_cpu_alloc_all.
85 2021-04-08 Simon Marchi <simon.marchi@polymtl.ca>
87 * Makefile.in: Set ASAN_OPTIONS when running igen.
89 2021-04-04 Steve Ellcey <sellcey@mips.com>
90 Faraz Shahbazker <fshahbazker@wavecomp.com>
92 * interp.c (sim_monitor): Add switch entries for unlink (13),
93 lseek (14), and stat (15).
95 2021-04-02 Mike Frysinger <vapier@gentoo.org>
97 * Makefile.in (../igen/igen): Delete rule.
98 (tmp-igen, tmp-m16, tmp-micromips): Delete ../igen make.
100 2021-04-02 Mike Frysinger <vapier@gentoo.org>
102 * aclocal.m4, configure: Regenerate.
104 2021-02-28 Mike Frysinger <vapier@gentoo.org>
106 * configure: Regenerate.
108 2021-02-27 Mike Frysinger <vapier@gentoo.org>
110 * Makefile.in (SIM_EXTRA_ALL): Delete.
113 2021-02-21 Mike Frysinger <vapier@gentoo.org>
115 * configure.ac (AC_CONFIG_MACRO_DIRS): Replace common with m4.
116 * aclocal.m4, configure: Regenerate.
118 2021-02-13 Mike Frysinger <vapier@gentoo.org>
120 * configure.ac: Replace sinclude with AC_CONFIG_MACRO_DIRS.
121 * aclocal.m4, configure: Regenerate.
123 2021-02-06 Mike Frysinger <vapier@gentoo.org>
125 * interp.c (sim_open): Delete call to STATE_WATCHPOINTS.
127 2021-02-06 Mike Frysinger <vapier@gentoo.org>
129 * configure: Regenerate.
131 2021-01-30 Mike Frysinger <vapier@gentoo.org>
133 * interp.c (sim_open): Delete STATE_WATCHPOINTS (sd)->sizeof_pc.
135 2021-01-11 Mike Frysinger <vapier@gentoo.org>
137 * config.in, configure: Regenerate.
138 * interp.c: Delete HAVE_STRING_H, HAVE_STRINGS_H, HAVE_STDLIB_H,
139 and strings.h include.
141 2021-01-09 Mike Frysinger <vapier@gentoo.org>
143 * configure: Regenerate.
145 2021-01-09 Mike Frysinger <vapier@gentoo.org>
147 * configure.ac (SIM_AC_OPTION_WARNINGS): Pass "no".
148 * configure: Regenerate.
150 2021-01-08 Mike Frysinger <vapier@gentoo.org>
152 * configure: Regenerate.
154 2021-01-04 Mike Frysinger <vapier@gentoo.org>
156 * configure: Regenerate.
158 2020-12-31 Pavel I. Kryukov <kryukov@frtk.ru> (tiny change)
160 * sim-main.c: Include <stdlib.h>.
162 2020-12-14 Pavel I. Kryukov <kryukov@frtk.ru> (tiny change)
164 * cp1.c: Include <stdlib.h>.
166 2020-07-29 Simon Marchi <simon.marchi@efficios.com>
168 * configure: Re-generate.
170 2017-09-06 John Baldwin <jhb@FreeBSD.org>
172 * configure: Regenerate.
174 2016-11-11 Mike Frysinger <vapier@gentoo.org>
177 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Define CPU to cpu
180 2016-11-11 Mike Frysinger <vapier@gentoo.org>
183 * mips.igen (check_u64): Enable for `r3900'.
185 2016-02-05 Mike Frysinger <vapier@gentoo.org>
187 * configure.ac (sim_engine_run): Change sd->base.prog_bfd to
189 * configure: Regenerate.
191 2016-01-18 Andrew Bennett <andrew.bennett@imgtec.com>
192 Maciej W. Rozycki <macro@imgtec.com>
195 * micromips.igen (delayslot_micromips): Enable for `micromips32',
196 `micromips64' and `micromipsdsp' only.
197 (process_isa_mode): Enable for `micromips32' and `micromips64' only.
198 (do_micromips_jalr, do_micromips_jal): Likewise.
199 (compute_movep_src_reg): Likewise.
200 (compute_andi16_imm): Likewise.
201 (convert_fmt_micromips): Likewise.
202 (convert_fmt_micromips_cvt_d): Likewise.
203 (convert_fmt_micromips_cvt_s): Likewise.
204 (FMT_MICROMIPS): Likewise.
205 (FMT_MICROMIPS_CVT_D): Likewise.
206 (FMT_MICROMIPS_CVT_S): Likewise.
208 2016-01-12 Mike Frysinger <vapier@gentoo.org>
210 * interp.c: Include elf-bfd.h.
211 (sim_create_inferior): Truncate pc to 32-bits when EI_CLASS is
214 2016-01-10 Mike Frysinger <vapier@gentoo.org>
216 * config.in, configure: Regenerate.
218 2016-01-10 Mike Frysinger <vapier@gentoo.org>
220 * configure: Regenerate.
222 2016-01-10 Mike Frysinger <vapier@gentoo.org>
224 * configure: Regenerate.
226 2016-01-10 Mike Frysinger <vapier@gentoo.org>
228 * configure: Regenerate.
230 2016-01-10 Mike Frysinger <vapier@gentoo.org>
232 * configure: Regenerate.
234 2016-01-10 Mike Frysinger <vapier@gentoo.org>
236 * configure.ac (SIM_AC_OPTION_SMP): Delete call.
237 * configure: Regenerate.
239 2016-01-10 Mike Frysinger <vapier@gentoo.org>
241 * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
242 * configure: Regenerate.
244 2016-01-10 Mike Frysinger <vapier@gentoo.org>
246 * configure: Regenerate.
248 2016-01-10 Mike Frysinger <vapier@gentoo.org>
250 * configure: Regenerate.
252 2016-01-09 Mike Frysinger <vapier@gentoo.org>
254 * config.in, configure: Regenerate.
256 2016-01-06 Mike Frysinger <vapier@gentoo.org>
258 * interp.c (sim_open): Mark argv const.
259 (sim_create_inferior): Mark argv and env const.
261 2016-01-04 Mike Frysinger <vapier@gentoo.org>
263 * configure: Regenerate.
265 2016-01-03 Mike Frysinger <vapier@gentoo.org>
267 * interp.c (sim_open): Update sim_parse_args comment.
269 2016-01-03 Mike Frysinger <vapier@gentoo.org>
271 * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
272 * configure: Regenerate.
274 2016-01-02 Mike Frysinger <vapier@gentoo.org>
276 * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
277 (default_endian): Likewise. Change BIG_ENDIAN to BIG.
278 * configure: Regenerate.
279 * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
281 2016-01-02 Mike Frysinger <vapier@gentoo.org>
283 * dv-tx3904cpu.c (CPU, SD): Delete.
285 2015-12-30 Mike Frysinger <vapier@gentoo.org>
287 * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
288 (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
289 (sim_store_register): Rename to ...
290 (mips_reg_store): ... this. Delete local cpu var.
291 Update sim_io_eprintf calls.
292 (sim_fetch_register): Rename to ...
293 (mips_reg_fetch): ... this. Delete local cpu var.
294 Update sim_io_eprintf calls.
296 2015-12-27 Mike Frysinger <vapier@gentoo.org>
298 * Makefile.in (SIM_OBJS): Delete sim-hload.o.
300 2015-12-26 Mike Frysinger <vapier@gentoo.org>
302 * config.in, configure: Regenerate.
304 2015-12-26 Mike Frysinger <vapier@gentoo.org>
306 * interp.c (sim_write, sim_read): Delete.
307 (store_word): Delete call to AddressTranslation and set paddr=vaddr.
308 (load_word): Likewise.
309 * micromips.igen (cache): Likewise.
310 * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
311 do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
312 do_store_left, do_store_right, do_load_double, do_store_double):
314 (do_pref): Delete call to AddressTranslation and stub out Prefetch.
315 (do_prefx): Likewise.
316 * sim-main.c (address_translation, prefetch): Delete.
317 (ifetch32, ifetch16): Delete call to AddressTranslation and set
319 * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
320 address_translation, AddressTranslation, prefetch, Prefetch): Delete.
321 (LoadMemory, StoreMemory): Delete CCA arg.
323 2015-12-24 Mike Frysinger <vapier@gentoo.org>
325 * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
326 * configure: Regenerated.
328 2015-12-24 Mike Frysinger <vapier@gentoo.org>
330 * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
333 2015-12-24 Mike Frysinger <vapier@gentoo.org>
335 * tconfig.h (SIM_HANDLES_LMA): Delete.
337 2015-12-24 Mike Frysinger <vapier@gentoo.org>
339 * sim-main.h (WITH_WATCHPOINTS): Delete.
341 2015-12-24 Mike Frysinger <vapier@gentoo.org>
343 * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
345 2015-12-24 Mike Frysinger <vapier@gentoo.org>
347 * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
349 2015-12-15 Dominik Vogt <vogt@linux.vnet.ibm.com>
351 * micromips.igen (process_isa_mode): Fix left shift of negative
354 2015-11-17 Mike Frysinger <vapier@gentoo.org>
356 * sim-main.h (WITH_MODULO_MEMORY): Delete.
358 2015-11-15 Mike Frysinger <vapier@gentoo.org>
360 * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
362 2015-11-14 Mike Frysinger <vapier@gentoo.org>
364 * interp.c (sim_close): Rename to ...
365 (mips_sim_close): ... this. Delete calls to sim_module_uninstall and
367 * sim-main.h (mips_sim_close): Declare.
368 (SIM_CLOSE_HOOK): Define.
370 2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com>
371 Ali Lown <ali.lown@imgtec.com>
373 * Makefile.in (tmp-micromips): New rule.
374 (tmp-mach-multi): Add support for micromips.
375 * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
376 that works for both mips64 and micromips64.
377 (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
379 Add build support for micromips.
380 * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
381 do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
382 do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
383 do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
384 do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
385 do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
386 do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
387 do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
388 Refactored instruction code to use these functions.
389 * dsp2.igen: Refactored instruction code to use the new functions.
390 * interp.c (decode_coproc): Refactored to work with any instruction
392 (isa_mode): New variable
393 (RSVD_INSTRUCTION): Changed to 0x00000039.
394 * m16.igen (BREAK16): Refactored instruction to use do_break16.
395 (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
396 * micromips.dc: New file.
397 * micromips.igen: New file.
398 * micromips16.dc: New file.
399 * micromipsdsp.igen: New file.
400 * micromipsrun.c: New file.
401 * mips.igen (do_swc1): Changed to work with any instruction encoding.
402 (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
403 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
404 do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
405 do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
406 do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
407 do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
408 do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
409 do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
410 do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
411 do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
412 do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
413 do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
414 do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
415 do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
416 do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
417 do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
418 do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
419 do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
421 Refactored instruction code to use these functions.
422 (RSVD): Changed to use new reserved instruction.
423 (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
424 check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
425 do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
426 do_store_double): Added micromips32 and micromips64 models.
427 Added include for micromips.igen and micromipsdsp.igen
428 Add micromips32 and micromips64 models.
429 (DecodeCoproc): Updated to use new macro definition.
430 * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
431 do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
432 do_seb, do_seh do_rdhwr, do_wsbh): New functions.
433 Refactored instruction code to use these functions.
434 * sim-main.h (CP0_operation): New enum.
435 (DecodeCoproc): Updated macro.
436 (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
437 MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
438 MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
439 ISA_MODE_MICROMIPS): New defines.
440 (sim_state): Add isa_mode field.
442 2015-06-23 Mike Frysinger <vapier@gentoo.org>
444 * configure: Regenerate.
446 2015-06-12 Mike Frysinger <vapier@gentoo.org>
448 * configure.ac: Change configure.in to configure.ac.
449 * configure: Regenerate.
451 2015-06-12 Mike Frysinger <vapier@gentoo.org>
453 * configure: Regenerate.
455 2015-06-12 Mike Frysinger <vapier@gentoo.org>
457 * interp.c [TRACE]: Delete.
458 (TRACE): Change to WITH_TRACE_ANY_P.
459 [!WITH_TRACE_ANY_P] (open_trace): Define.
460 (mips_option_handler, open_trace, sim_close, dotrace):
461 Change defined(TRACE) to WITH_TRACE_ANY_P.
462 (sim_open): Delete TRACE ifdef check.
463 * sim-main.c (load_memory): Delete TRACE ifdef check.
464 (store_memory): Likewise.
465 * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
466 [!WITH_TRACE_ANY_P] (dotrace): Define.
468 2015-04-18 Mike Frysinger <vapier@gentoo.org>
470 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
473 2015-04-18 Mike Frysinger <vapier@gentoo.org>
475 * sim-main.h (SIM_CPU): Delete.
477 2015-04-18 Mike Frysinger <vapier@gentoo.org>
479 * sim-main.h (sim_cia): Delete.
481 2015-04-17 Mike Frysinger <vapier@gentoo.org>
483 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
485 * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
486 (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
487 * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
488 CIA_SET to CPU_PC_SET.
489 * sim-main.h (CIA_GET, CIA_SET): Delete.
491 2015-04-15 Mike Frysinger <vapier@gentoo.org>
493 * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
494 * sim-main.h (STATE_CPU): Delete.
496 2015-04-13 Mike Frysinger <vapier@gentoo.org>
498 * configure: Regenerate.
500 2015-04-13 Mike Frysinger <vapier@gentoo.org>
502 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
503 * interp.c (mips_pc_get, mips_pc_set): New functions.
504 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
505 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
506 (sim_pc_get): Delete.
507 * sim-main.h (SIM_CPU): Define.
508 (struct sim_state): Change cpu to an array of pointers.
511 2015-04-13 Mike Frysinger <vapier@gentoo.org>
513 * interp.c (mips_option_handler, open_trace, sim_close,
514 sim_write, sim_read, sim_store_register, sim_fetch_register,
515 sim_create_inferior, pr_addr, pr_uword64): Convert old style
517 (sim_open): Convert old style prototype. Change casts with
518 sim_write to unsigned char *.
519 (fetch_str): Change null to unsigned char, and change cast to
521 (sim_monitor): Change c & ch to unsigned char. Change cast to
524 2015-04-12 Mike Frysinger <vapier@gentoo.org>
526 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
528 2015-04-06 Mike Frysinger <vapier@gentoo.org>
530 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
532 2015-04-01 Mike Frysinger <vapier@gentoo.org>
534 * tconfig.h (SIM_HAVE_PROFILE): Delete.
536 2015-03-31 Mike Frysinger <vapier@gentoo.org>
538 * config.in, configure: Regenerate.
540 2015-03-24 Mike Frysinger <vapier@gentoo.org>
542 * interp.c (sim_pc_get): New function.
544 2015-03-24 Mike Frysinger <vapier@gentoo.org>
546 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
547 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
549 2015-03-24 Mike Frysinger <vapier@gentoo.org>
551 * configure: Regenerate.
553 2015-03-23 Mike Frysinger <vapier@gentoo.org>
555 * configure: Regenerate.
557 2015-03-23 Mike Frysinger <vapier@gentoo.org>
559 * configure: Regenerate.
560 * configure.ac (mips_extra_objs): Delete.
561 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
562 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
564 2015-03-23 Mike Frysinger <vapier@gentoo.org>
566 * configure: Regenerate.
567 * configure.ac: Delete sim_hw checks for dv-sockser.
569 2015-03-16 Mike Frysinger <vapier@gentoo.org>
571 * config.in, configure: Regenerate.
572 * tconfig.in: Rename file ...
573 * tconfig.h: ... here.
575 2015-03-15 Mike Frysinger <vapier@gentoo.org>
577 * tconfig.in: Delete includes.
578 [HAVE_DV_SOCKSER]: Delete.
580 2015-03-14 Mike Frysinger <vapier@gentoo.org>
582 * Makefile.in (SIM_RUN_OBJS): Delete.
584 2015-03-14 Mike Frysinger <vapier@gentoo.org>
586 * configure.ac (AC_CHECK_HEADERS): Delete.
587 * aclocal.m4, configure: Regenerate.
589 2014-08-19 Alan Modra <amodra@gmail.com>
591 * configure: Regenerate.
593 2014-08-15 Roland McGrath <mcgrathr@google.com>
595 * configure: Regenerate.
596 * config.in: Regenerate.
598 2014-03-04 Mike Frysinger <vapier@gentoo.org>
600 * configure: Regenerate.
602 2013-09-23 Alan Modra <amodra@gmail.com>
604 * configure: Regenerate.
606 2013-06-03 Mike Frysinger <vapier@gentoo.org>
608 * aclocal.m4, configure: Regenerate.
610 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
612 * configure: Rebuild.
614 2013-03-26 Mike Frysinger <vapier@gentoo.org>
616 * configure: Regenerate.
618 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
620 * configure.ac: Address use of dv-sockser.o.
621 * tconfig.in: Conditionalize use of dv_sockser_install.
622 * configure: Regenerated.
623 * config.in: Regenerated.
625 2012-10-04 Chao-ying Fu <fu@mips.com>
626 Steve Ellcey <sellcey@mips.com>
628 * mips/mips3264r2.igen (rdhwr): New.
630 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
632 * configure.ac: Always link against dv-sockser.o.
633 * configure: Regenerate.
635 2012-06-15 Joel Brobecker <brobecker@adacore.com>
637 * config.in, configure: Regenerate.
639 2012-05-18 Nick Clifton <nickc@redhat.com>
642 * interp.c: Include config.h before system header files.
644 2012-03-24 Mike Frysinger <vapier@gentoo.org>
646 * aclocal.m4, config.in, configure: Regenerate.
648 2011-12-03 Mike Frysinger <vapier@gentoo.org>
650 * aclocal.m4: New file.
651 * configure: Regenerate.
653 2011-10-19 Mike Frysinger <vapier@gentoo.org>
655 * configure: Regenerate after common/acinclude.m4 update.
657 2011-10-17 Mike Frysinger <vapier@gentoo.org>
659 * configure.ac: Change include to common/acinclude.m4.
661 2011-10-17 Mike Frysinger <vapier@gentoo.org>
663 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
664 call. Replace common.m4 include with SIM_AC_COMMON.
665 * configure: Regenerate.
667 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
669 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
671 (tmp-mach-multi): Exit early when igen fails.
673 2011-07-05 Mike Frysinger <vapier@gentoo.org>
675 * interp.c (sim_do_command): Delete.
677 2011-02-14 Mike Frysinger <vapier@gentoo.org>
679 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
680 (tx3904sio_fifo_reset): Likewise.
681 * interp.c (sim_monitor): Likewise.
683 2010-04-14 Mike Frysinger <vapier@gentoo.org>
685 * interp.c (sim_write): Add const to buffer arg.
687 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
689 * interp.c: Don't include sysdep.h
691 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
693 * configure: Regenerate.
695 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
697 * config.in: Regenerate.
698 * configure: Likewise.
700 * configure: Regenerate.
702 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
704 * configure: Regenerate to track ../common/common.m4 changes.
707 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
708 Daniel Jacobowitz <dan@codesourcery.com>
709 Joseph Myers <joseph@codesourcery.com>
711 * configure: Regenerate.
713 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
715 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
716 that unconditionally allows fmt_ps.
717 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
718 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
719 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
720 filter from 64,f to 32,f.
721 (PREFX): Change filter from 64 to 32.
722 (LDXC1, LUXC1): Provide separate mips32r2 implementations
723 that use do_load_double instead of do_load. Make both LUXC1
724 versions unpredictable if SizeFGR () != 64.
725 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
726 instead of do_store. Remove unused variable. Make both SUXC1
727 versions unpredictable if SizeFGR () != 64.
729 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
731 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
732 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
733 shifts for that case.
735 2007-09-04 Nick Clifton <nickc@redhat.com>
737 * interp.c (options enum): Add OPTION_INFO_MEMORY.
738 (display_mem_info): New static variable.
739 (mips_option_handler): Handle OPTION_INFO_MEMORY.
740 (mips_options): Add info-memory and memory-info.
741 (sim_open): After processing the command line and board
742 specification, check display_mem_info. If it is set then
743 call the real handler for the --memory-info command line
746 2007-08-24 Joel Brobecker <brobecker@adacore.com>
748 * configure.ac: Change license of multi-run.c to GPL version 3.
749 * configure: Regenerate.
751 2007-06-28 Richard Sandiford <richard@codesourcery.com>
753 * configure.ac, configure: Revert last patch.
755 2007-06-26 Richard Sandiford <richard@codesourcery.com>
757 * configure.ac (sim_mipsisa3264_configs): New variable.
758 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
759 every configuration support all four targets, using the triplet to
760 determine the default.
761 * configure: Regenerate.
763 2007-06-25 Richard Sandiford <richard@codesourcery.com>
765 * Makefile.in (m16run.o): New rule.
767 2007-05-15 Thiemo Seufer <ths@mips.com>
769 * mips3264r2.igen (DSHD): Fix compile warning.
771 2007-05-14 Thiemo Seufer <ths@mips.com>
773 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
774 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
775 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
776 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
779 2007-03-01 Thiemo Seufer <ths@mips.com>
781 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
784 2007-02-20 Thiemo Seufer <ths@mips.com>
786 * dsp.igen: Update copyright notice.
787 * dsp2.igen: Fix copyright notice.
789 2007-02-20 Thiemo Seufer <ths@mips.com>
790 Chao-Ying Fu <fu@mips.com>
792 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
793 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
794 Add dsp2 to sim_igen_machine.
795 * configure: Regenerate.
796 * dsp.igen (do_ph_op): Add MUL support when op = 2.
797 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
798 (mulq_rs.ph): Use do_ph_mulq.
799 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
800 * mips.igen: Add dsp2 model and include dsp2.igen.
801 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
802 for *mips32r2, *mips64r2, *dsp.
803 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
804 for *mips32r2, *mips64r2, *dsp2.
805 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
807 2007-02-19 Thiemo Seufer <ths@mips.com>
808 Nigel Stephens <nigel@mips.com>
810 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
811 jumps with hazard barrier.
813 2007-02-19 Thiemo Seufer <ths@mips.com>
814 Nigel Stephens <nigel@mips.com>
816 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
817 after each call to sim_io_write.
819 2007-02-19 Thiemo Seufer <ths@mips.com>
820 Nigel Stephens <nigel@mips.com>
822 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
823 supported by this simulator.
824 (decode_coproc): Recognise additional CP0 Config registers
827 2007-02-19 Thiemo Seufer <ths@mips.com>
828 Nigel Stephens <nigel@mips.com>
829 David Ung <davidu@mips.com>
831 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
832 uninterpreted formats. If fmt is one of the uninterpreted types
833 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
834 fmt_word, and fmt_uninterpreted_64 like fmt_long.
835 (store_fpr): When writing an invalid odd register, set the
836 matching even register to fmt_unknown, not the following register.
837 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
838 the the memory window at offset 0 set by --memory-size command
840 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
842 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
844 (sim_monitor): When returning the memory size to the MIPS
845 application, use the value in STATE_MEM_SIZE, not an arbitrary
847 (cop_lw): Don' mess around with FPR_STATE, just pass
848 fmt_uninterpreted_32 to StoreFPR.
850 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
852 * mips.igen (not_word_value): Single version for mips32, mips64
855 2007-02-19 Thiemo Seufer <ths@mips.com>
856 Nigel Stephens <nigel@mips.com>
858 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
861 2007-02-17 Thiemo Seufer <ths@mips.com>
863 * configure.ac (mips*-sde-elf*): Move in front of generic machine
865 * configure: Regenerate.
867 2007-02-17 Thiemo Seufer <ths@mips.com>
869 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
870 Add mdmx to sim_igen_machine.
871 (mipsisa64*-*-*): Likewise. Remove dsp.
872 (mipsisa32*-*-*): Remove dsp.
873 * configure: Regenerate.
875 2007-02-13 Thiemo Seufer <ths@mips.com>
877 * configure.ac: Add mips*-sde-elf* target.
878 * configure: Regenerate.
880 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
882 * acconfig.h: Remove.
883 * config.in, configure: Regenerate.
885 2006-11-07 Thiemo Seufer <ths@mips.com>
887 * dsp.igen (do_w_op): Fix compiler warning.
889 2006-08-29 Thiemo Seufer <ths@mips.com>
890 David Ung <davidu@mips.com>
892 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
894 * configure: Regenerate.
895 * mips.igen (model): Add smartmips.
896 (MADDU): Increment ACX if carry.
897 (do_mult): Clear ACX.
898 (ROR,RORV): Add smartmips.
899 (include): Include smartmips.igen.
900 * sim-main.h (ACX): Set to REGISTERS[89].
901 * smartmips.igen: New file.
903 2006-08-29 Thiemo Seufer <ths@mips.com>
904 David Ung <davidu@mips.com>
906 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
907 mips3264r2.igen. Add missing dependency rules.
908 * m16e.igen: Support for mips16e save/restore instructions.
910 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
912 * configure: Regenerated.
914 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
916 * configure: Regenerated.
918 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
920 * configure: Regenerated.
922 2006-05-15 Chao-ying Fu <fu@mips.com>
924 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
926 2006-04-18 Nick Clifton <nickc@redhat.com>
928 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
931 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
933 * configure: Regenerate.
935 2005-12-14 Chao-ying Fu <fu@mips.com>
937 * Makefile.in (SIM_OBJS): Add dsp.o.
938 (dsp.o): New dependency.
939 (IGEN_INCLUDE): Add dsp.igen.
940 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
941 mipsisa64*-*-*): Add dsp to sim_igen_machine.
942 * configure: Regenerate.
943 * mips.igen: Add dsp model and include dsp.igen.
944 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
945 because these instructions are extended in DSP ASE.
946 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
947 adding 6 DSP accumulator registers and 1 DSP control register.
948 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
949 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
950 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
951 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
952 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
953 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
954 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
955 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
956 DSPCR_CCOND_SMASK): New define.
957 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
958 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
960 2005-07-08 Ian Lance Taylor <ian@airs.com>
962 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
964 2005-06-16 David Ung <davidu@mips.com>
965 Nigel Stephens <nigel@mips.com>
967 * mips.igen: New mips16e model and include m16e.igen.
968 (check_u64): Add mips16e tag.
969 * m16e.igen: New file for MIPS16e instructions.
970 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
971 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
973 * configure: Regenerate.
975 2005-05-26 David Ung <davidu@mips.com>
977 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
978 tags to all instructions which are applicable to the new ISAs.
979 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
981 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
983 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
985 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
986 * configure: Regenerate.
988 2005-03-23 Mark Kettenis <kettenis@gnu.org>
990 * configure: Regenerate.
992 2005-01-14 Andrew Cagney <cagney@gnu.org>
994 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
995 explicit call to AC_CONFIG_HEADER.
996 * configure: Regenerate.
998 2005-01-12 Andrew Cagney <cagney@gnu.org>
1000 * configure.ac: Update to use ../common/common.m4.
1001 * configure: Re-generate.
1003 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
1005 * configure: Regenerated to track ../common/aclocal.m4 changes.
1007 2005-01-07 Andrew Cagney <cagney@gnu.org>
1009 * configure.ac: Rename configure.in, require autoconf 2.59.
1010 * configure: Re-generate.
1012 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
1014 * configure: Regenerate for ../common/aclocal.m4 update.
1016 2004-09-24 Monika Chaddha <monika@acmet.com>
1018 Committed by Andrew Cagney.
1019 * m16.igen (CMP, CMPI): Fix assembler.
1021 2004-08-18 Chris Demetriou <cgd@broadcom.com>
1023 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
1024 * configure: Regenerate.
1026 2004-06-25 Chris Demetriou <cgd@broadcom.com>
1028 * configure.in (sim_m16_machine): Include mipsIII.
1029 * configure: Regenerate.
1031 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
1033 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
1035 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
1037 2004-04-10 Chris Demetriou <cgd@broadcom.com>
1039 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
1041 2004-04-09 Chris Demetriou <cgd@broadcom.com>
1043 * mips.igen (check_fmt): Remove.
1044 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
1045 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
1046 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
1047 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
1048 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
1049 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
1050 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1051 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
1052 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
1053 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
1055 2004-04-09 Chris Demetriou <cgd@broadcom.com>
1057 * sb1.igen (check_sbx): New function.
1058 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
1060 2004-03-29 Chris Demetriou <cgd@broadcom.com>
1061 Richard Sandiford <rsandifo@redhat.com>
1063 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
1064 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
1065 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
1066 separate implementations for mipsIV and mipsV. Use new macros to
1067 determine whether the restrictions apply.
1069 2004-01-19 Chris Demetriou <cgd@broadcom.com>
1071 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
1072 (check_mult_hilo): Improve comments.
1073 (check_div_hilo): Likewise. Also, fork off a new version
1074 to handle mips32/mips64 (since there are no hazards to check
1077 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
1079 * mips.igen (do_dmultx): Fix check for negative operands.
1081 2003-05-16 Ian Lance Taylor <ian@airs.com>
1083 * Makefile.in (SHELL): Make sure this is defined.
1084 (various): Use $(SHELL) whenever we invoke move-if-change.
1086 2003-05-03 Chris Demetriou <cgd@broadcom.com>
1088 * cp1.c: Tweak attribution slightly.
1091 * mdmx.igen: Likewise.
1092 * mips3d.igen: Likewise.
1093 * sb1.igen: Likewise.
1095 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
1097 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
1100 2003-02-27 Andrew Cagney <cagney@redhat.com>
1102 * interp.c (sim_open): Rename _bfd to bfd.
1103 (sim_create_inferior): Ditto.
1105 2003-01-14 Chris Demetriou <cgd@broadcom.com>
1107 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
1109 2003-01-14 Chris Demetriou <cgd@broadcom.com>
1111 * mips.igen (EI, DI): Remove.
1113 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
1115 * Makefile.in (tmp-run-multi): Fix mips16 filter.
1117 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
1118 Andrew Cagney <ac131313@redhat.com>
1119 Gavin Romig-Koch <gavin@redhat.com>
1120 Graydon Hoare <graydon@redhat.com>
1121 Aldy Hernandez <aldyh@redhat.com>
1122 Dave Brolley <brolley@redhat.com>
1123 Chris Demetriou <cgd@broadcom.com>
1125 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
1126 (sim_mach_default): New variable.
1127 (mips64vr-*-*, mips64vrel-*-*): New configurations.
1128 Add a new simulator generator, MULTI.
1129 * configure: Regenerate.
1130 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
1131 (multi-run.o): New dependency.
1132 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
1133 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
1134 (tmp-multi): Combine them.
1135 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
1136 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
1137 (distclean-extra): New rule.
1138 * sim-main.h: Include bfd.h.
1139 (MIPS_MACH): New macro.
1140 * mips.igen (vr4120, vr5400, vr5500): New models.
1141 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
1142 * vr.igen: Replace with new version.
1144 2003-01-04 Chris Demetriou <cgd@broadcom.com>
1146 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
1147 * configure: Regenerate.
1149 2002-12-31 Chris Demetriou <cgd@broadcom.com>
1151 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
1152 * mips.igen: Remove all invocations of check_branch_bug and
1155 2002-12-16 Chris Demetriou <cgd@broadcom.com>
1157 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
1159 2002-07-30 Chris Demetriou <cgd@broadcom.com>
1161 * mips.igen (do_load_double, do_store_double): New functions.
1162 (LDC1, SDC1): Rename to...
1163 (LDC1b, SDC1b): respectively.
1164 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
1166 2002-07-29 Michael Snyder <msnyder@redhat.com>
1168 * cp1.c (fp_recip2): Modify initialization expression so that
1169 GCC will recognize it as constant.
1171 2002-06-18 Chris Demetriou <cgd@broadcom.com>
1173 * mdmx.c (SD_): Delete.
1174 (Unpredictable): Re-define, for now, to directly invoke
1175 unpredictable_action().
1176 (mdmx_acc_op): Fix error in .ob immediate handling.
1178 2002-06-18 Andrew Cagney <cagney@redhat.com>
1180 * interp.c (sim_firmware_command): Initialize `address'.
1182 2002-06-16 Andrew Cagney <ac131313@redhat.com>
1184 * configure: Regenerated to track ../common/aclocal.m4 changes.
1186 2002-06-14 Chris Demetriou <cgd@broadcom.com>
1187 Ed Satterthwaite <ehs@broadcom.com>
1189 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
1190 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
1191 * mips.igen: Include mips3d.igen.
1192 (mips3d): New model name for MIPS-3D ASE instructions.
1193 (CVT.W.fmt): Don't use this instruction for word (source) format
1195 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
1196 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
1197 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
1198 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
1199 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
1200 (RSquareRoot1, RSquareRoot2): New macros.
1201 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
1202 (fp_rsqrt2): New functions.
1203 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
1204 * configure: Regenerate.
1206 2002-06-13 Chris Demetriou <cgd@broadcom.com>
1207 Ed Satterthwaite <ehs@broadcom.com>
1209 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
1210 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
1211 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
1212 (convert): Note that this function is not used for paired-single
1214 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
1215 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
1216 (check_fmt_p): Enable paired-single support.
1217 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
1218 (PUU.PS): New instructions.
1219 (CVT.S.fmt): Don't use this instruction for paired-single format
1221 * sim-main.h (FP_formats): New value 'fmt_ps.'
1222 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
1223 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
1225 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1227 * mips.igen: Fix formatting of function calls in
1230 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1232 * mips.igen (MOVN, MOVZ): Trace result.
1233 (TNEI): Print "tnei" as the opcode name in traces.
1234 (CEIL.W): Add disassembly string for traces.
1235 (RSQRT.fmt): Make location of disassembly string consistent
1236 with other instructions.
1238 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1240 * mips.igen (X): Delete unused function.
1242 2002-06-08 Andrew Cagney <cagney@redhat.com>
1244 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1246 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1247 Ed Satterthwaite <ehs@broadcom.com>
1249 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1250 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1251 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1252 (fp_nmsub): New prototypes.
1253 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1254 (NegMultiplySub): New defines.
1255 * mips.igen (RSQRT.fmt): Use RSquareRoot().
1256 (MADD.D, MADD.S): Replace with...
1257 (MADD.fmt): New instruction.
1258 (MSUB.D, MSUB.S): Replace with...
1259 (MSUB.fmt): New instruction.
1260 (NMADD.D, NMADD.S): Replace with...
1261 (NMADD.fmt): New instruction.
1262 (NMSUB.D, MSUB.S): Replace with...
1263 (NMSUB.fmt): New instruction.
1265 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1266 Ed Satterthwaite <ehs@broadcom.com>
1268 * cp1.c: Fix more comment spelling and formatting.
1269 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1270 (denorm_mode): New function.
1271 (fpu_unary, fpu_binary): Round results after operation, collect
1272 status from rounding operations, and update the FCSR.
1273 (convert): Collect status from integer conversions and rounding
1274 operations, and update the FCSR. Adjust NaN values that result
1275 from conversions. Convert to use sim_io_eprintf rather than
1276 fprintf, and remove some debugging code.
1277 * cp1.h (fenr_FS): New define.
1279 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1281 * cp1.c (convert): Remove unusable debugging code, and move MIPS
1282 rounding mode to sim FP rounding mode flag conversion code into...
1283 (rounding_mode): New function.
1285 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1287 * cp1.c: Clean up formatting of a few comments.
1288 (value_fpr): Reformat switch statement.
1290 2002-06-06 Chris Demetriou <cgd@broadcom.com>
1291 Ed Satterthwaite <ehs@broadcom.com>
1294 * sim-main.h: Include cp1.h.
1295 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1296 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1297 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
1298 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1299 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1300 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1301 * cp1.c: Don't include sim-fpu.h; already included by
1302 sim-main.h. Clean up formatting of some comments.
1303 (NaN, Equal, Less): Remove.
1304 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1305 (fp_cmp): New functions.
1306 * mips.igen (do_c_cond_fmt): Remove.
1307 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1308 Compare. Add result tracing.
1309 (CxC1): Remove, replace with...
1310 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1311 (DMxC1): Remove, replace with...
1312 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1313 (MxC1): Remove, replace with...
1314 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1316 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1318 * sim-main.h (FGRIDX): Remove, replace all uses with...
1319 (FGR_BASE): New macro.
1320 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1321 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1322 (NR_FGR, FGR): Likewise.
1323 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1324 * mips.igen: Likewise.
1326 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1328 * cp1.c: Add an FSF Copyright notice to this file.
1330 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1331 Ed Satterthwaite <ehs@broadcom.com>
1333 * cp1.c (Infinity): Remove.
1334 * sim-main.h (Infinity): Likewise.
1336 * cp1.c (fp_unary, fp_binary): New functions.
1337 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1338 (fp_sqrt): New functions, implemented in terms of the above.
1339 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1340 (Recip, SquareRoot): Remove (replaced by functions above).
1341 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1342 (fp_recip, fp_sqrt): New prototypes.
1343 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1344 (Recip, SquareRoot): Replace prototypes with #defines which
1345 invoke the functions above.
1347 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1349 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1350 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1351 file, remove PARAMS from prototypes.
1352 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
1353 simulator state arguments.
1354 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
1355 pass simulator state arguments.
1356 * cp1.c (SD): Redefine as CPU_STATE(cpu).
1357 (store_fpr, convert): Remove 'sd' argument.
1358 (value_fpr): Likewise. Convert to use 'SD' instead.
1360 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1362 * cp1.c (Min, Max): Remove #if 0'd functions.
1363 * sim-main.h (Min, Max): Remove.
1365 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1367 * cp1.c: fix formatting of switch case and default labels.
1368 * interp.c: Likewise.
1369 * sim-main.c: Likewise.
1371 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1373 * cp1.c: Clean up comments which describe FP formats.
1374 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1376 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1377 Ed Satterthwaite <ehs@broadcom.com>
1379 * configure.in (mipsisa64sb1*-*-*): New target for supporting
1380 Broadcom SiByte SB-1 processor configurations.
1381 * configure: Regenerate.
1382 * sb1.igen: New file.
1383 * mips.igen: Include sb1.igen.
1385 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1386 * mdmx.igen: Add "sb1" model to all appropriate functions and
1388 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1389 (ob_func, ob_acc): Reference the above.
1390 (qh_acc): Adjust to keep the same size as ob_acc.
1391 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1392 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1394 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1396 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1398 2002-06-02 Chris Demetriou <cgd@broadcom.com>
1399 Ed Satterthwaite <ehs@broadcom.com>
1401 * mips.igen (mdmx): New (pseudo-)model.
1402 * mdmx.c, mdmx.igen: New files.
1403 * Makefile.in (SIM_OBJS): Add mdmx.o.
1404 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1406 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1407 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1408 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1409 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1410 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1411 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1412 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1413 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1414 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1415 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1416 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1417 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1418 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1419 (qh_fmtsel): New macros.
1420 (_sim_cpu): New member "acc".
1421 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1422 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1424 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1426 * interp.c: Use 'deprecated' rather than 'depreciated.'
1427 * sim-main.h: Likewise.
1429 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1431 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1432 which wouldn't compile anyway.
1433 * sim-main.h (unpredictable_action): New function prototype.
1434 (Unpredictable): Define to call igen function unpredictable().
1435 (NotWordValue): New macro to call igen function not_word_value().
1436 (UndefinedResult): Remove.
1437 * interp.c (undefined_result): Remove.
1438 (unpredictable_action): New function.
1439 * mips.igen (not_word_value, unpredictable): New functions.
1440 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1441 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1442 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1443 NotWordValue() to check for unpredictable inputs, then
1444 Unpredictable() to handle them.
1446 2002-02-24 Chris Demetriou <cgd@broadcom.com>
1448 * mips.igen: Fix formatting of calls to Unpredictable().
1450 2002-04-20 Andrew Cagney <ac131313@redhat.com>
1452 * interp.c (sim_open): Revert previous change.
1454 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
1456 * interp.c (sim_open): Disable chunk of code that wrote code in
1457 vector table entries.
1459 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1461 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1462 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1465 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1467 * cp1.c: Fix many formatting issues.
1469 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1471 * cp1.c (fpu_format_name): New function to replace...
1472 (DOFMT): This. Delete, and update all callers.
1473 (fpu_rounding_mode_name): New function to replace...
1474 (RMMODE): This. Delete, and update all callers.
1476 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1478 * interp.c: Move FPU support routines from here to...
1479 * cp1.c: Here. New file.
1480 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1481 (cp1.o): New target.
1483 2002-03-12 Chris Demetriou <cgd@broadcom.com>
1485 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1486 * mips.igen (mips32, mips64): New models, add to all instructions
1487 and functions as appropriate.
1488 (loadstore_ea, check_u64): New variant for model mips64.
1489 (check_fmt_p): New variant for models mipsV and mips64, remove
1490 mipsV model marking fro other variant.
1493 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1494 for mips32 and mips64.
1495 (DCLO, DCLZ): New instructions for mips64.
1497 2002-03-07 Chris Demetriou <cgd@broadcom.com>
1499 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1500 immediate or code as a hex value with the "%#lx" format.
1501 (ANDI): Likewise, and fix printed instruction name.
1503 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1505 * sim-main.h (UndefinedResult, Unpredictable): New macros
1506 which currently do nothing.
1508 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1510 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1511 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1512 (status_CU3): New definitions.
1514 * sim-main.h (ExceptionCause): Add new values for MIPS32
1515 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1516 for DebugBreakPoint and NMIReset to note their status in
1518 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1519 (SignalExceptionCacheErr): New exception macros.
1521 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1523 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1524 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1526 (SignalExceptionCoProcessorUnusable): Take as argument the
1527 unusable coprocessor number.
1529 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1531 * mips.igen: Fix formatting of all SignalException calls.
1533 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1535 * sim-main.h (SIGNEXTEND): Remove.
1537 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1539 * mips.igen: Remove gencode comment from top of file, fix
1540 spelling in another comment.
1542 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1544 * mips.igen (check_fmt, check_fmt_p): New functions to check
1545 whether specific floating point formats are usable.
1546 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1547 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1548 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1549 Use the new functions.
1550 (do_c_cond_fmt): Remove format checks...
1551 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1553 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1555 * mips.igen: Fix formatting of check_fpu calls.
1557 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1559 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1561 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1563 * mips.igen: Remove whitespace at end of lines.
1565 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1567 * mips.igen (loadstore_ea): New function to do effective
1568 address calculations.
1569 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1570 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1571 CACHE): Use loadstore_ea to do effective address computations.
1573 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1575 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1576 * mips.igen (LL, CxC1, MxC1): Likewise.
1578 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1580 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1581 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1582 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1583 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1584 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1585 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1586 Don't split opcode fields by hand, use the opcode field values
1589 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1591 * mips.igen (do_divu): Fix spacing.
1593 * mips.igen (do_dsllv): Move to be right before DSLLV,
1594 to match the rest of the do_<shift> functions.
1596 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1598 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1599 DSRL32, do_dsrlv): Trace inputs and results.
1601 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1603 * mips.igen (CACHE): Provide instruction-printing string.
1605 * interp.c (signal_exception): Comment tokens after #endif.
1607 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1609 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1610 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1611 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1612 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1613 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1614 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1615 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1616 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1618 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1620 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1621 instruction-printing string.
1622 (LWU): Use '64' as the filter flag.
1624 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1626 * mips.igen (SDXC1): Fix instruction-printing string.
1628 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1630 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1631 filter flags "32,f".
1633 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1635 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1638 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1640 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1641 add a comma) so that it more closely match the MIPS ISA
1642 documentation opcode partitioning.
1643 (PREF): Put useful names on opcode fields, and include
1644 instruction-printing string.
1646 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1648 * mips.igen (check_u64): New function which in the future will
1649 check whether 64-bit instructions are usable and signal an
1650 exception if not. Currently a no-op.
1651 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1652 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1653 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1654 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1656 * mips.igen (check_fpu): New function which in the future will
1657 check whether FPU instructions are usable and signal an exception
1658 if not. Currently a no-op.
1659 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1660 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1661 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1662 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1663 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1664 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1665 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1666 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1668 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1670 * mips.igen (do_load_left, do_load_right): Move to be immediately
1672 (do_store_left, do_store_right): Move to be immediately following
1675 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1677 * mips.igen (mipsV): New model name. Also, add it to
1678 all instructions and functions where it is appropriate.
1680 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1682 * mips.igen: For all functions and instructions, list model
1683 names that support that instruction one per line.
1685 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1687 * mips.igen: Add some additional comments about supported
1688 models, and about which instructions go where.
1689 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1690 order as is used in the rest of the file.
1692 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1694 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1695 indicating that ALU32_END or ALU64_END are there to check
1697 (DADD): Likewise, but also remove previous comment about
1700 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1702 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1703 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1704 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1705 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1706 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1707 fields (i.e., add and move commas) so that they more closely
1708 match the MIPS ISA documentation opcode partitioning.
1710 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1712 * mips.igen (ADDI): Print immediate value.
1713 (BREAK): Print code.
1714 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1715 (SLL): Print "nop" specially, and don't run the code
1716 that does the shift for the "nop" case.
1718 2001-11-17 Fred Fish <fnf@redhat.com>
1720 * sim-main.h (float_operation): Move enum declaration outside
1721 of _sim_cpu struct declaration.
1723 2001-04-12 Jim Blandy <jimb@redhat.com>
1725 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1726 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1728 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1729 PENDING_FILL, and you can get the intended effect gracefully by
1730 calling PENDING_SCHED directly.
1732 2001-02-23 Ben Elliston <bje@redhat.com>
1734 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1735 already defined elsewhere.
1737 2001-02-19 Ben Elliston <bje@redhat.com>
1739 * sim-main.h (sim_monitor): Return an int.
1740 * interp.c (sim_monitor): Add return values.
1741 (signal_exception): Handle error conditions from sim_monitor.
1743 2001-02-08 Ben Elliston <bje@redhat.com>
1745 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1746 (store_memory): Likewise, pass cia to sim_core_write*.
1748 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1750 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1751 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1753 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1755 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1756 * Makefile.in: Don't delete *.igen when cleaning directory.
1758 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1760 * m16.igen (break): Call SignalException not sim_engine_halt.
1762 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1764 From Jason Eckhardt:
1765 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1767 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1769 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1771 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1773 * mips.igen (do_dmultx): Fix typo.
1775 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1777 * configure: Regenerated to track ../common/aclocal.m4 changes.
1779 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1781 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1783 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1785 * sim-main.h (GPR_CLEAR): Define macro.
1787 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1789 * interp.c (decode_coproc): Output long using %lx and not %s.
1791 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1793 * interp.c (sim_open): Sort & extend dummy memory regions for
1794 --board=jmr3904 for eCos.
1796 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1798 * configure: Regenerated.
1800 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1802 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1803 calls, conditional on the simulator being in verbose mode.
1805 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1807 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1808 cache don't get ReservedInstruction traps.
1810 1999-11-29 Mark Salter <msalter@cygnus.com>
1812 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1813 to clear status bits in sdisr register. This is how the hardware works.
1815 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1816 being used by cygmon.
1818 1999-11-11 Andrew Haley <aph@cygnus.com>
1820 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1823 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1825 * mips.igen (MULT): Correct previous mis-applied patch.
1827 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1829 * mips.igen (delayslot32): Handle sequence like
1830 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1831 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1832 (MULT): Actually pass the third register...
1834 1999-09-03 Mark Salter <msalter@cygnus.com>
1836 * interp.c (sim_open): Added more memory aliases for additional
1837 hardware being touched by cygmon on jmr3904 board.
1839 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1841 * configure: Regenerated to track ../common/aclocal.m4 changes.
1843 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1845 * interp.c (sim_store_register): Handle case where client - GDB -
1846 specifies that a 4 byte register is 8 bytes in size.
1847 (sim_fetch_register): Ditto.
1849 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1851 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1852 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1853 (idt_monitor_base): Base address for IDT monitor traps.
1854 (pmon_monitor_base): Ditto for PMON.
1855 (lsipmon_monitor_base): Ditto for LSI PMON.
1856 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1857 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1858 (sim_firmware_command): New function.
1859 (mips_option_handler): Call it for OPTION_FIRMWARE.
1860 (sim_open): Allocate memory for idt_monitor region. If "--board"
1861 option was given, add no monitor by default. Add BREAK hooks only if
1862 monitors are also there.
1864 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1866 * interp.c (sim_monitor): Flush output before reading input.
1868 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1870 * tconfig.in (SIM_HANDLES_LMA): Always define.
1872 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1874 From Mark Salter <msalter@cygnus.com>:
1875 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1876 (sim_open): Add setup for BSP board.
1878 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1880 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1881 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1882 them as unimplemented.
1884 1999-05-08 Felix Lee <flee@cygnus.com>
1886 * configure: Regenerated to track ../common/aclocal.m4 changes.
1888 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1890 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1892 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1894 * configure.in: Any mips64vr5*-*-* target should have
1895 -DTARGET_ENABLE_FR=1.
1896 (default_endian): Any mips64vr*el-*-* target should default to
1898 * configure: Re-generate.
1900 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1902 * mips.igen (ldl): Extend from _16_, not 32.
1904 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1906 * interp.c (sim_store_register): Force registers written to by GDB
1907 into an un-interpreted state.
1909 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1911 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1912 CPU, start periodic background I/O polls.
1913 (tx3904sio_poll): New function: periodic I/O poller.
1915 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1917 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1919 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1921 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1924 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1926 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1927 (load_word): Call SIM_CORE_SIGNAL hook on error.
1928 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1929 starting. For exception dispatching, pass PC instead of NULL_CIA.
1930 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1931 * sim-main.h (COP0_BADVADDR): Define.
1932 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1933 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1934 (_sim_cpu): Add exc_* fields to store register value snapshots.
1935 * mips.igen (*): Replace memory-related SignalException* calls
1936 with references to SIM_CORE_SIGNAL hook.
1938 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1940 * sim-main.c (*): Minor warning cleanups.
1942 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1944 * m16.igen (DADDIU5): Correct type-o.
1946 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1948 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1951 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1953 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1955 (interp.o): Add dependency on itable.h
1956 (oengine.c, gencode): Delete remaining references.
1957 (BUILT_SRC_FROM_GEN): Clean up.
1959 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1962 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1963 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1964 tmp-run-hack) : New.
1965 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1966 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1967 Drop the "64" qualifier to get the HACK generator working.
1968 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1969 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1970 qualifier to get the hack generator working.
1971 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1972 (DSLL): Use do_dsll.
1973 (DSLLV): Use do_dsllv.
1974 (DSRA): Use do_dsra.
1975 (DSRL): Use do_dsrl.
1976 (DSRLV): Use do_dsrlv.
1977 (BC1): Move *vr4100 to get the HACK generator working.
1978 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1979 get the HACK generator working.
1980 (MACC) Rename to get the HACK generator working.
1981 (DMACC,MACCS,DMACCS): Add the 64.
1983 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1985 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1986 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1988 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1990 * mips/interp.c (DEBUG): Cleanups.
1992 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1994 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1995 (tx3904sio_tickle): fflush after a stdout character output.
1997 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1999 * interp.c (sim_close): Uninstall modules.
2001 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
2003 * sim-main.h, interp.c (sim_monitor): Change to global
2006 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2008 * configure.in (vr4100): Only include vr4100 instructions in
2010 * configure: Re-generate.
2011 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
2013 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
2015 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
2016 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
2019 * configure.in (sim_default_gen, sim_use_gen): Replace with
2021 (--enable-sim-igen): Delete config option. Always using IGEN.
2022 * configure: Re-generate.
2024 * Makefile.in (gencode): Kill, kill, kill.
2027 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
2029 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
2030 bit mips16 igen simulator.
2031 * configure: Re-generate.
2033 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
2034 as part of vr4100 ISA.
2035 * vr.igen: Mark all instructions as 64 bit only.
2037 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2039 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
2042 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
2044 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
2045 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
2046 * configure: Re-generate.
2048 * m16.igen (BREAK): Define breakpoint instruction.
2049 (JALX32): Mark instruction as mips16 and not r3900.
2050 * mips.igen (C.cond.fmt): Fix typo in instruction format.
2052 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
2054 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
2056 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
2057 insn as a debug breakpoint.
2059 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
2061 (PENDING_SCHED): Clean up trace statement.
2062 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
2063 (PENDING_FILL): Delay write by only one cycle.
2064 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
2066 * sim-main.c (pending_tick): Clean up trace statements. Add trace
2068 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
2070 (pending_tick): Move incrementing of index to FOR statement.
2071 (pending_tick): Only update PENDING_OUT after a write has occured.
2073 * configure.in: Add explicit mips-lsi-* target. Use gencode to
2075 * configure: Re-generate.
2077 * interp.c (sim_engine_run OLD): Delete explicit call to
2078 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
2080 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
2082 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
2083 interrupt level number to match changed SignalExceptionInterrupt
2086 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
2088 * interp.c: #include "itable.h" if WITH_IGEN.
2089 (get_insn_name): New function.
2090 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
2091 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
2093 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
2095 * configure: Rebuilt to inhale new common/aclocal.m4.
2097 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
2099 * dv-tx3904sio.c: Include sim-assert.h.
2101 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
2103 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
2104 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
2105 Reorganize target-specific sim-hardware checks.
2106 * configure: rebuilt.
2107 * interp.c (sim_open): For tx39 target boards, set
2108 OPERATING_ENVIRONMENT, add tx3904sio devices.
2109 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
2110 ROM executables. Install dv-sockser into sim-modules list.
2112 * dv-tx3904irc.c: Compiler warning clean-up.
2113 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
2114 frequent hw-trace messages.
2116 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
2118 * vr.igen (MulAcc): Identify as a vr4100 specific function.
2120 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2122 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
2124 * vr.igen: New file.
2125 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
2126 * mips.igen: Define vr4100 model. Include vr.igen.
2127 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
2129 * mips.igen (check_mf_hilo): Correct check.
2131 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2133 * sim-main.h (interrupt_event): Add prototype.
2135 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
2136 register_ptr, register_value.
2137 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
2139 * sim-main.h (tracefh): Make extern.
2141 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
2143 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
2144 Reduce unnecessarily high timer event frequency.
2145 * dv-tx3904cpu.c: Ditto for interrupt event.
2147 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
2149 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
2151 (interrupt_event): Made non-static.
2153 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
2154 interchange of configuration values for external vs. internal
2157 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
2159 * mips.igen (BREAK): Moved code to here for
2160 simulator-reserved break instructions.
2161 * gencode.c (build_instruction): Ditto.
2162 * interp.c (signal_exception): Code moved from here. Non-
2163 reserved instructions now use exception vector, rather
2165 * sim-main.h: Moved magic constants to here.
2167 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
2169 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
2170 register upon non-zero interrupt event level, clear upon zero
2172 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
2173 by passing zero event value.
2174 (*_io_{read,write}_buffer): Endianness fixes.
2175 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
2176 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
2178 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
2179 serial I/O and timer module at base address 0xFFFF0000.
2181 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
2183 * mips.igen (SWC1) : Correct the handling of ReverseEndian
2186 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
2188 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
2190 * configure: Update.
2192 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
2194 * dv-tx3904tmr.c: New file - implements tx3904 timer.
2195 * dv-tx3904{irc,cpu}.c: Mild reformatting.
2196 * configure.in: Include tx3904tmr in hw_device list.
2197 * configure: Rebuilt.
2198 * interp.c (sim_open): Instantiate three timer instances.
2199 Fix address typo of tx3904irc instance.
2201 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
2203 * interp.c (signal_exception): SystemCall exception now uses
2204 the exception vector.
2206 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
2208 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
2211 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2213 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
2215 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
2217 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
2219 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
2220 sim-main.h. Declare a struct hw_descriptor instead of struct
2221 hw_device_descriptor.
2223 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
2225 * mips.igen (do_store_left, do_load_left): Compute nr of left and
2226 right bits and then re-align left hand bytes to correct byte
2227 lanes. Fix incorrect computation in do_store_left when loading
2228 bytes from second word.
2230 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2232 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2233 * interp.c (sim_open): Only create a device tree when HW is
2236 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2237 * interp.c (signal_exception): Ditto.
2239 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
2241 * gencode.c: Mark BEGEZALL as LIKELY.
2243 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
2245 * sim-main.h (ALU32_END): Sign extend 32 bit results.
2246 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2248 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
2250 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2251 modules. Recognize TX39 target with "mips*tx39" pattern.
2252 * configure: Rebuilt.
2253 * sim-main.h (*): Added many macros defining bits in
2254 TX39 control registers.
2255 (SignalInterrupt): Send actual PC instead of NULL.
2256 (SignalNMIReset): New exception type.
2257 * interp.c (board): New variable for future use to identify
2258 a particular board being simulated.
2259 (mips_option_handler,mips_options): Added "--board" option.
2260 (interrupt_event): Send actual PC.
2261 (sim_open): Make memory layout conditional on board setting.
2262 (signal_exception): Initial implementation of hardware interrupt
2263 handling. Accept another break instruction variant for simulator
2265 (decode_coproc): Implement RFE instruction for TX39.
2266 (mips.igen): Decode RFE instruction as such.
2267 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2268 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2269 bbegin to implement memory map.
2270 * dv-tx3904cpu.c: New file.
2271 * dv-tx3904irc.c: New file.
2273 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
2275 * mips.igen (check_mt_hilo): Create a separate r3900 version.
2277 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
2279 * tx.igen (madd,maddu): Replace calls to check_op_hilo
2280 with calls to check_div_hilo.
2282 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
2284 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2285 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2286 Add special r3900 version of do_mult_hilo.
2287 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2288 with calls to check_mult_hilo.
2289 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2290 with calls to check_div_hilo.
2292 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
2294 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2295 Document a replacement.
2297 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
2299 * interp.c (sim_monitor): Make mon_printf work.
2301 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
2303 * sim-main.h (INSN_NAME): New arg `cpu'.
2305 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
2307 * configure: Regenerated to track ../common/aclocal.m4 changes.
2309 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
2311 * configure: Regenerated to track ../common/aclocal.m4 changes.
2314 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
2316 * acconfig.h: New file.
2317 * configure.in: Reverted change of Apr 24; use sinclude again.
2319 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
2321 * configure: Regenerated to track ../common/aclocal.m4 changes.
2324 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
2326 * configure.in: Don't call sinclude.
2328 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
2330 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2332 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2334 * mips.igen (ERET): Implement.
2336 * interp.c (decode_coproc): Return sign-extended EPC.
2338 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2340 * interp.c (signal_exception): Do not ignore Trap.
2341 (signal_exception): On TRAP, restart at exception address.
2342 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2343 (signal_exception): Update.
2344 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2345 so that TRAP instructions are caught.
2347 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
2349 * sim-main.h (struct hilo_access, struct hilo_history): Define,
2350 contains HI/LO access history.
2351 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2352 (HIACCESS, LOACCESS): Delete, replace with
2353 (HIHISTORY, LOHISTORY): New macros.
2354 (CHECKHILO): Delete all, moved to mips.igen
2356 * gencode.c (build_instruction): Do not generate checks for
2357 correct HI/LO register usage.
2359 * interp.c (old_engine_run): Delete checks for correct HI/LO
2362 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2363 check_mf_cycles): New functions.
2364 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2365 do_divu, domultx, do_mult, do_multu): Use.
2367 * tx.igen ("madd", "maddu"): Use.
2369 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
2371 * mips.igen (DSRAV): Use function do_dsrav.
2372 (SRAV): Use new function do_srav.
2374 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2375 (B): Sign extend 11 bit immediate.
2376 (EXT-B*): Shift 16 bit immediate left by 1.
2377 (ADDIU*): Don't sign extend immediate value.
2379 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2381 * m16run.c (sim_engine_run): Restore CIA after handling an event.
2383 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2386 * mips.igen (delayslot32, nullify_next_insn): New functions.
2387 (m16.igen): Always include.
2388 (do_*): Add more tracing.
2390 * m16.igen (delayslot16): Add NIA argument, could be called by a
2391 32 bit MIPS16 instruction.
2393 * interp.c (ifetch16): Move function from here.
2394 * sim-main.c (ifetch16): To here.
2396 * sim-main.c (ifetch16, ifetch32): Update to match current
2397 implementations of LH, LW.
2398 (signal_exception): Don't print out incorrect hex value of illegal
2401 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2403 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2406 * m16.igen: Implement MIPS16 instructions.
2408 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2409 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2410 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2411 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2412 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
2413 bodies of corresponding code from 32 bit insn to these. Also used
2414 by MIPS16 versions of functions.
2416 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2417 (IMEM16): Drop NR argument from macro.
2419 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2421 * Makefile.in (SIM_OBJS): Add sim-main.o.
2423 * sim-main.h (address_translation, load_memory, store_memory,
2424 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2426 (pr_addr, pr_uword64): Declare.
2427 (sim-main.c): Include when H_REVEALS_MODULE_P.
2429 * interp.c (address_translation, load_memory, store_memory,
2430 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2432 * sim-main.c: To here. Fix compilation problems.
2434 * configure.in: Enable inlining.
2435 * configure: Re-config.
2437 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2439 * configure: Regenerated to track ../common/aclocal.m4 changes.
2441 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2443 * mips.igen: Include tx.igen.
2444 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2445 * tx.igen: New file, contains MADD and MADDU.
2447 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2448 the hardwired constant `7'.
2449 (store_memory): Ditto.
2450 (LOADDRMASK): Move definition to sim-main.h.
2452 mips.igen (MTC0): Enable for r3900.
2455 mips.igen (do_load_byte): Delete.
2456 (do_load, do_store, do_load_left, do_load_write, do_store_left,
2457 do_store_right): New functions.
2458 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2460 configure.in: Let the tx39 use igen again.
2463 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2465 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2466 not an address sized quantity. Return zero for cache sizes.
2468 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
2470 * mips.igen (r3900): r3900 does not support 64 bit integer
2473 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
2475 * configure.in (mipstx39*-*-*): Use gencode simulator rather
2477 * configure : Rebuild.
2479 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
2481 * configure: Regenerated to track ../common/aclocal.m4 changes.
2483 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2485 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2487 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
2489 * configure: Regenerated to track ../common/aclocal.m4 changes.
2490 * config.in: Regenerated to track ../common/aclocal.m4 changes.
2492 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2494 * configure: Regenerated to track ../common/aclocal.m4 changes.
2496 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
2498 * interp.c (Max, Min): Comment out functions. Not yet used.
2500 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
2502 * configure: Regenerated to track ../common/aclocal.m4 changes.
2504 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
2506 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2507 configurable settings for stand-alone simulator.
2509 * configure.in: Added X11 search, just in case.
2511 * configure: Regenerated.
2513 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2515 * interp.c (sim_write, sim_read, load_memory, store_memory):
2516 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2518 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2520 * sim-main.h (GETFCC): Return an unsigned value.
2522 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2524 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2525 (DADD): Result destination is RD not RT.
2527 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2529 * sim-main.h (HIACCESS, LOACCESS): Always define.
2531 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2533 * interp.c (sim_info): Delete.
2535 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2537 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2538 (mips_option_handler): New argument `cpu'.
2539 (sim_open): Update call to sim_add_option_table.
2541 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2543 * mips.igen (CxC1): Add tracing.
2545 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2547 * sim-main.h (Max, Min): Declare.
2549 * interp.c (Max, Min): New functions.
2551 * mips.igen (BC1): Add tracing.
2553 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2555 * interp.c Added memory map for stack in vr4100
2557 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2559 * interp.c (load_memory): Add missing "break"'s.
2561 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2563 * interp.c (sim_store_register, sim_fetch_register): Pass in
2564 length parameter. Return -1.
2566 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2568 * interp.c: Added hardware init hook, fixed warnings.
2570 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2572 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2574 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2576 * interp.c (ifetch16): New function.
2578 * sim-main.h (IMEM32): Rename IMEM.
2579 (IMEM16_IMMED): Define.
2581 (DELAY_SLOT): Update.
2583 * m16run.c (sim_engine_run): New file.
2585 * m16.igen: All instructions except LB.
2586 (LB): Call do_load_byte.
2587 * mips.igen (do_load_byte): New function.
2588 (LB): Call do_load_byte.
2590 * mips.igen: Move spec for insn bit size and high bit from here.
2591 * Makefile.in (tmp-igen, tmp-m16): To here.
2593 * m16.dc: New file, decode mips16 instructions.
2595 * Makefile.in (SIM_NO_ALL): Define.
2596 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2598 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2600 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2601 point unit to 32 bit registers.
2602 * configure: Re-generate.
2604 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2606 * configure.in (sim_use_gen): Make IGEN the default simulator
2607 generator for generic 32 and 64 bit mips targets.
2608 * configure: Re-generate.
2610 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2612 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2615 * interp.c (sim_fetch_register, sim_store_register): Read/write
2616 FGR from correct location.
2617 (sim_open): Set size of FGR's according to
2618 WITH_TARGET_FLOATING_POINT_BITSIZE.
2620 * sim-main.h (FGR): Store floating point registers in a separate
2623 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2625 * configure: Regenerated to track ../common/aclocal.m4 changes.
2627 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2629 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2631 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2633 * interp.c (pending_tick): New function. Deliver pending writes.
2635 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2636 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2637 it can handle mixed sized quantites and single bits.
2639 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2641 * interp.c (oengine.h): Do not include when building with IGEN.
2642 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2643 (sim_info): Ditto for PROCESSOR_64BIT.
2644 (sim_monitor): Replace ut_reg with unsigned_word.
2645 (*): Ditto for t_reg.
2646 (LOADDRMASK): Define.
2647 (sim_open): Remove defunct check that host FP is IEEE compliant,
2648 using software to emulate floating point.
2649 (value_fpr, ...): Always compile, was conditional on HASFPU.
2651 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2653 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2656 * interp.c (SD, CPU): Define.
2657 (mips_option_handler): Set flags in each CPU.
2658 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2659 (sim_close): Do not clear STATE, deleted anyway.
2660 (sim_write, sim_read): Assume CPU zero's vm should be used for
2662 (sim_create_inferior): Set the PC for all processors.
2663 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2665 (mips16_entry): Pass correct nr of args to store_word, load_word.
2666 (ColdReset): Cold reset all cpu's.
2667 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2668 (sim_monitor, load_memory, store_memory, signal_exception): Use
2669 `CPU' instead of STATE_CPU.
2672 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2675 * sim-main.h (signal_exception): Add sim_cpu arg.
2676 (SignalException*): Pass both SD and CPU to signal_exception.
2677 * interp.c (signal_exception): Update.
2679 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2681 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2682 address_translation): Ditto
2683 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2685 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2687 * configure: Regenerated to track ../common/aclocal.m4 changes.
2689 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2691 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2693 * mips.igen (model): Map processor names onto BFD name.
2695 * sim-main.h (CPU_CIA): Delete.
2696 (SET_CIA, GET_CIA): Define
2698 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2700 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2703 * configure.in (default_endian): Configure a big-endian simulator
2705 * configure: Re-generate.
2707 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2709 * configure: Regenerated to track ../common/aclocal.m4 changes.
2711 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2713 * interp.c (sim_monitor): Handle Densan monitor outbyte
2714 and inbyte functions.
2716 1997-12-29 Felix Lee <flee@cygnus.com>
2718 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2720 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2722 * Makefile.in (tmp-igen): Arrange for $zero to always be
2723 reset to zero after every instruction.
2725 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2727 * configure: Regenerated to track ../common/aclocal.m4 changes.
2730 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2732 * mips.igen (MSUB): Fix to work like MADD.
2733 * gencode.c (MSUB): Similarly.
2735 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2737 * configure: Regenerated to track ../common/aclocal.m4 changes.
2739 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2741 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2743 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2745 * sim-main.h (sim-fpu.h): Include.
2747 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2748 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2749 using host independant sim_fpu module.
2751 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2753 * interp.c (signal_exception): Report internal errors with SIGABRT
2756 * sim-main.h (C0_CONFIG): New register.
2757 (signal.h): No longer include.
2759 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2761 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2763 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2765 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2767 * mips.igen: Tag vr5000 instructions.
2768 (ANDI): Was missing mipsIV model, fix assembler syntax.
2769 (do_c_cond_fmt): New function.
2770 (C.cond.fmt): Handle mips I-III which do not support CC field
2772 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2773 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2775 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2776 vr5000 which saves LO in a GPR separatly.
2778 * configure.in (enable-sim-igen): For vr5000, select vr5000
2779 specific instructions.
2780 * configure: Re-generate.
2782 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2784 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2786 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2787 fmt_uninterpreted_64 bit cases to switch. Convert to
2790 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2792 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2793 as specified in IV3.2 spec.
2794 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2796 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2798 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2799 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2800 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2801 PENDING_FILL versions of instructions. Simplify.
2803 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2805 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2807 (MTHI, MFHI): Disable code checking HI-LO.
2809 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2811 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2813 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2815 * gencode.c (build_mips16_operands): Replace IPC with cia.
2817 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2818 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2820 (UndefinedResult): Replace function with macro/function
2822 (sim_engine_run): Don't save PC in IPC.
2824 * sim-main.h (IPC): Delete.
2827 * interp.c (signal_exception, store_word, load_word,
2828 address_translation, load_memory, store_memory, cache_op,
2829 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2830 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2831 current instruction address - cia - argument.
2832 (sim_read, sim_write): Call address_translation directly.
2833 (sim_engine_run): Rename variable vaddr to cia.
2834 (signal_exception): Pass cia to sim_monitor
2836 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2837 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2838 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2840 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2841 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2844 * interp.c (signal_exception): Pass restart address to
2847 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2848 idecode.o): Add dependency.
2850 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2852 (DELAY_SLOT): Update NIA not PC with branch address.
2853 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2855 * mips.igen: Use CIA not PC in branch calculations.
2856 (illegal): Call SignalException.
2857 (BEQ, ADDIU): Fix assembler.
2859 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2861 * m16.igen (JALX): Was missing.
2863 * configure.in (enable-sim-igen): New configuration option.
2864 * configure: Re-generate.
2866 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2868 * interp.c (load_memory, store_memory): Delete parameter RAW.
2869 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2870 bypassing {load,store}_memory.
2872 * sim-main.h (ByteSwapMem): Delete definition.
2874 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2876 * interp.c (sim_do_command, sim_commands): Delete mips specific
2877 commands. Handled by module sim-options.
2879 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2880 (WITH_MODULO_MEMORY): Define.
2882 * interp.c (sim_info): Delete code printing memory size.
2884 * interp.c (mips_size): Nee sim_size, delete function.
2886 (monitor, monitor_base, monitor_size): Delete global variables.
2887 (sim_open, sim_close): Delete code creating monitor and other
2888 memory regions. Use sim-memopts module, via sim_do_commandf, to
2889 manage memory regions.
2890 (load_memory, store_memory): Use sim-core for memory model.
2892 * interp.c (address_translation): Delete all memory map code
2893 except line forcing 32 bit addresses.
2895 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2897 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2900 * interp.c (logfh, logfile): Delete globals.
2901 (sim_open, sim_close): Delete code opening & closing log file.
2902 (mips_option_handler): Delete -l and -n options.
2903 (OPTION mips_options): Ditto.
2905 * interp.c (OPTION mips_options): Rename option trace to dinero.
2906 (mips_option_handler): Update.
2908 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2910 * interp.c (fetch_str): New function.
2911 (sim_monitor): Rewrite using sim_read & sim_write.
2912 (sim_open): Check magic number.
2913 (sim_open): Write monitor vectors into memory using sim_write.
2914 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2915 (sim_read, sim_write): Simplify - transfer data one byte at a
2917 (load_memory, store_memory): Clarify meaning of parameter RAW.
2919 * sim-main.h (isHOST): Defete definition.
2920 (isTARGET): Mark as depreciated.
2921 (address_translation): Delete parameter HOST.
2923 * interp.c (address_translation): Delete parameter HOST.
2925 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2929 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2930 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2932 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2934 * mips.igen: Add model filter field to records.
2936 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2938 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2940 interp.c (sim_engine_run): Do not compile function sim_engine_run
2941 when WITH_IGEN == 1.
2943 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2944 target architecture.
2946 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2947 igen. Replace with configuration variables sim_igen_flags /
2950 * m16.igen: New file. Copy mips16 insns here.
2951 * mips.igen: From here.
2953 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2955 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2957 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2959 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2961 * gencode.c (build_instruction): Follow sim_write's lead in using
2962 BigEndianMem instead of !ByteSwapMem.
2964 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2966 * configure.in (sim_gen): Dependent on target, select type of
2967 generator. Always select old style generator.
2969 configure: Re-generate.
2971 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2973 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2974 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2975 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2976 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2977 SIM_@sim_gen@_*, set by autoconf.
2979 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2981 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2983 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2984 CURRENT_FLOATING_POINT instead.
2986 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2987 (address_translation): Raise exception InstructionFetch when
2988 translation fails and isINSTRUCTION.
2990 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2991 sim_engine_run): Change type of of vaddr and paddr to
2993 (address_translation, prefetch, load_memory, store_memory,
2994 cache_op): Change type of vAddr and pAddr to address_word.
2996 * gencode.c (build_instruction): Change type of vaddr and paddr to
2999 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
3001 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
3002 macro to obtain result of ALU op.
3004 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3006 * interp.c (sim_info): Call profile_print.
3008 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3010 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
3012 * sim-main.h (WITH_PROFILE): Do not define, defined in
3013 common/sim-config.h. Use sim-profile module.
3014 (simPROFILE): Delete defintion.
3016 * interp.c (PROFILE): Delete definition.
3017 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
3018 (sim_close): Delete code writing profile histogram.
3019 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
3021 (sim_engine_run): Delete code profiling the PC.
3023 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3025 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
3027 * interp.c (sim_monitor): Make register pointers of type
3030 * sim-main.h: Make registers of type unsigned_word not
3033 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3035 * interp.c (sync_operation): Rename from SyncOperation, make
3036 global, add SD argument.
3037 (prefetch): Rename from Prefetch, make global, add SD argument.
3038 (decode_coproc): Make global.
3040 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
3042 * gencode.c (build_instruction): Generate DecodeCoproc not
3043 decode_coproc calls.
3045 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
3046 (SizeFGR): Move to sim-main.h
3047 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
3048 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
3049 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
3051 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
3052 FP_RM_TOMINF, GETRM): Move to sim-main.h.
3053 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
3054 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
3055 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
3056 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
3058 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
3060 (sim-alu.h): Include.
3061 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
3062 (sim_cia): Typedef to instruction_address.
3064 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
3066 * Makefile.in (interp.o): Rename generated file engine.c to
3071 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
3073 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
3075 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3077 * gencode.c (build_instruction): For "FPSQRT", output correct
3078 number of arguments to Recip.
3080 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
3082 * Makefile.in (interp.o): Depends on sim-main.h
3084 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
3086 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
3087 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
3088 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
3089 STATE, DSSTATE): Define
3090 (GPR, FGRIDX, ..): Define.
3092 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
3093 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
3094 (GPR, FGRIDX, ...): Delete macros.
3096 * interp.c: Update names to match defines from sim-main.h
3098 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
3100 * interp.c (sim_monitor): Add SD argument.
3101 (sim_warning): Delete. Replace calls with calls to
3103 (sim_error): Delete. Replace calls with sim_io_error.
3104 (open_trace, writeout32, writeout16, getnum): Add SD argument.
3105 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
3106 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
3108 (mips_size): Rename from sim_size. Add SD argument.
3110 * interp.c (simulator): Delete global variable.
3111 (callback): Delete global variable.
3112 (mips_option_handler, sim_open, sim_write, sim_read,
3113 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
3114 sim_size,sim_monitor): Use sim_io_* not callback->*.
3115 (sim_open): ZALLOC simulator struct.
3116 (PROFILE): Do not define.
3118 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3120 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
3121 support.h with corresponding code.
3123 * sim-main.h (word64, uword64), support.h: Move definition to
3125 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
3128 * Makefile.in: Update dependencies
3129 * interp.c: Do not include.
3131 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3133 * interp.c (address_translation, load_memory, store_memory,
3134 cache_op): Rename to from AddressTranslation et.al., make global,
3137 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
3140 * interp.c (SignalException): Rename to signal_exception, make
3143 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
3145 * sim-main.h (SignalException, SignalExceptionInterrupt,
3146 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
3147 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
3148 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
3151 * interp.c, support.h: Use.
3153 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3155 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
3156 to value_fpr / store_fpr. Add SD argument.
3157 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
3158 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
3160 * sim-main.h (ValueFPR, StoreFPR): Define.
3162 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
3164 * interp.c (sim_engine_run): Check consistency between configure
3165 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
3168 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
3169 (mips_fpu): Configure WITH_FLOATING_POINT.
3170 (mips_endian): Configure WITH_TARGET_ENDIAN.
3171 * configure: Update.
3173 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3175 * configure: Regenerated to track ../common/aclocal.m4 changes.
3177 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
3179 * configure: Regenerated.
3181 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
3183 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
3185 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3187 * gencode.c (print_igen_insn_models): Assume certain architectures
3188 include all mips* instructions.
3189 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
3192 * Makefile.in (tmp.igen): Add target. Generate igen input from
3195 * gencode.c (FEATURE_IGEN): Define.
3196 (main): Add --igen option. Generate output in igen format.
3197 (process_instructions): Format output according to igen option.
3198 (print_igen_insn_format): New function.
3199 (print_igen_insn_models): New function.
3200 (process_instructions): Only issue warnings and ignore
3201 instructions when no FEATURE_IGEN.
3203 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3205 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
3208 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3210 * configure: Regenerated to track ../common/aclocal.m4 changes.
3212 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
3214 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
3215 SIM_RESERVED_BITS): Delete, moved to common.
3216 (SIM_EXTRA_CFLAGS): Update.
3218 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3220 * configure.in: Configure non-strict memory alignment.
3221 * configure: Regenerated to track ../common/aclocal.m4 changes.
3223 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
3225 * configure: Regenerated to track ../common/aclocal.m4 changes.
3227 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
3229 * gencode.c (SDBBP,DERET): Added (3900) insns.
3230 (RFE): Turn on for 3900.
3231 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
3232 (dsstate): Made global.
3233 (SUBTARGET_R3900): Added.
3234 (CANCELDELAYSLOT): New.
3235 (SignalException): Ignore SystemCall rather than ignore and
3236 terminate. Add DebugBreakPoint handling.
3237 (decode_coproc): New insns RFE, DERET; and new registers Debug
3238 and DEPC protected by SUBTARGET_R3900.
3239 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3241 * Makefile.in,configure.in: Add mips subtarget option.
3242 * configure: Update.
3244 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
3246 * gencode.c: Add r3900 (tx39).
3249 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
3251 * gencode.c (build_instruction): Don't need to subtract 4 for
3254 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
3256 * interp.c: Correct some HASFPU problems.
3258 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
3260 * configure: Regenerated to track ../common/aclocal.m4 changes.
3262 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3264 * interp.c (mips_options): Fix samples option short form, should
3267 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
3269 * interp.c (sim_info): Enable info code. Was just returning.
3271 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3273 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3276 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
3278 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3280 (build_instruction): Ditto for LL.
3282 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
3284 * configure: Regenerated to track ../common/aclocal.m4 changes.
3286 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3288 * configure: Regenerated to track ../common/aclocal.m4 changes.
3291 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
3293 * interp.c (sim_open): Add call to sim_analyze_program, update
3296 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
3298 * interp.c (sim_kill): Delete.
3299 (sim_create_inferior): Add ABFD argument. Set PC from same.
3300 (sim_load): Move code initializing trap handlers from here.
3301 (sim_open): To here.
3302 (sim_load): Delete, use sim-hload.c.
3304 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3306 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3308 * configure: Regenerated to track ../common/aclocal.m4 changes.
3311 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3313 * interp.c (sim_open): Add ABFD argument.
3314 (sim_load): Move call to sim_config from here.
3315 (sim_open): To here. Check return status.
3317 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
3319 * gencode.c (build_instruction): Two arg MADD should
3320 not assign result to $0.
3322 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
3324 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3325 * sim/mips/configure.in: Regenerate.
3327 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
3329 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3330 signed8, unsigned8 et.al. types.
3332 * interp.c (SUB_REG_FETCH): Handle both little and big endian
3333 hosts when selecting subreg.
3335 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
3337 * interp.c (sim_engine_run): Reset the ZERO register to zero
3338 regardless of FEATURE_WARN_ZERO.
3339 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3341 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3343 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3344 (SignalException): For BreakPoints ignore any mode bits and just
3346 (SignalException): Always set the CAUSE register.
3348 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
3350 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3351 exception has been taken.
3353 * interp.c: Implement the ERET and mt/f sr instructions.
3355 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
3357 * interp.c (SignalException): Don't bother restarting an
3360 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3362 * interp.c (SignalException): Really take an interrupt.
3363 (interrupt_event): Only deliver interrupts when enabled.
3365 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3367 * interp.c (sim_info): Only print info when verbose.
3368 (sim_info) Use sim_io_printf for output.
3370 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3372 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3375 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3377 * interp.c (sim_do_command): Check for common commands if a
3378 simulator specific command fails.
3380 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
3382 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3383 and simBE when DEBUG is defined.
3385 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
3387 * interp.c (interrupt_event): New function. Pass exception event
3388 onto exception handler.
3390 * configure.in: Check for stdlib.h.
3391 * configure: Regenerate.
3393 * gencode.c (build_instruction): Add UNUSED attribute to tempS
3394 variable declaration.
3395 (build_instruction): Initialize memval1.
3396 (build_instruction): Add UNUSED attribute to byte, bigend,
3398 (build_operands): Ditto.
3400 * interp.c: Fix GCC warnings.
3401 (sim_get_quit_code): Delete.
3403 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3404 * Makefile.in: Ditto.
3405 * configure: Re-generate.
3407 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3409 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3411 * interp.c (mips_option_handler): New function parse argumes using
3413 (myname): Replace with STATE_MY_NAME.
3414 (sim_open): Delete check for host endianness - performed by
3416 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3417 (sim_open): Move much of the initialization from here.
3418 (sim_load): To here. After the image has been loaded and
3420 (sim_open): Move ColdReset from here.
3421 (sim_create_inferior): To here.
3422 (sim_open): Make FP check less dependant on host endianness.
3424 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3426 * interp.c (sim_set_callbacks): Delete.
3428 * interp.c (membank, membank_base, membank_size): Replace with
3429 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3430 (sim_open): Remove call to callback->init. gdb/run do this.
3434 * sim-main.h (SIM_HAVE_FLATMEM): Define.
3436 * interp.c (big_endian_p): Delete, replaced by
3437 current_target_byte_order.
3439 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3441 * interp.c (host_read_long, host_read_word, host_swap_word,
3442 host_swap_long): Delete. Using common sim-endian.
3443 (sim_fetch_register, sim_store_register): Use H2T.
3444 (pipeline_ticks): Delete. Handled by sim-events.
3446 (sim_engine_run): Update.
3448 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
3450 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3452 (SignalException): To here. Signal using sim_engine_halt.
3453 (sim_stop_reason): Delete, moved to common.
3455 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
3457 * interp.c (sim_open): Add callback argument.
3458 (sim_set_callbacks): Delete SIM_DESC argument.
3461 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3463 * Makefile.in (SIM_OBJS): Add common modules.
3465 * interp.c (sim_set_callbacks): Also set SD callback.
3466 (set_endianness, xfer_*, swap_*): Delete.
3467 (host_read_word, host_read_long, host_swap_word, host_swap_long):
3468 Change to functions using sim-endian macros.
3469 (control_c, sim_stop): Delete, use common version.
3470 (simulate): Convert into.
3471 (sim_engine_run): This function.
3472 (sim_resume): Delete.
3474 * interp.c (simulation): New variable - the simulator object.
3475 (sim_kind): Delete global - merged into simulation.
3476 (sim_load): Cleanup. Move PC assignment from here.
3477 (sim_create_inferior): To here.
3479 * sim-main.h: New file.
3480 * interp.c (sim-main.h): Include.
3482 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
3484 * configure: Regenerated to track ../common/aclocal.m4 changes.
3486 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
3488 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3490 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
3492 * gencode.c (build_instruction): DIV instructions: check
3493 for division by zero and integer overflow before using
3494 host's division operation.
3496 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
3498 * Makefile.in (SIM_OBJS): Add sim-load.o.
3499 * interp.c: #include bfd.h.
3500 (target_byte_order): Delete.
3501 (sim_kind, myname, big_endian_p): New static locals.
3502 (sim_open): Set sim_kind, myname. Move call to set_endianness to
3503 after argument parsing. Recognize -E arg, set endianness accordingly.
3504 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
3505 load file into simulator. Set PC from bfd.
3506 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
3507 (set_endianness): Use big_endian_p instead of target_byte_order.
3509 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3511 * interp.c (sim_size): Delete prototype - conflicts with
3512 definition in remote-sim.h. Correct definition.
3514 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3516 * configure: Regenerated to track ../common/aclocal.m4 changes.
3519 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3521 * interp.c (sim_open): New arg `kind'.
3523 * configure: Regenerated to track ../common/aclocal.m4 changes.
3525 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3527 * configure: Regenerated to track ../common/aclocal.m4 changes.
3529 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3531 * interp.c (sim_open): Set optind to 0 before calling getopt.
3533 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3535 * configure: Regenerated to track ../common/aclocal.m4 changes.
3537 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3539 * interp.c : Replace uses of pr_addr with pr_uword64
3540 where the bit length is always 64 independent of SIM_ADDR.
3541 (pr_uword64) : added.
3543 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3545 * configure: Re-generate.
3547 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3549 * configure: Regenerate to track ../common/aclocal.m4 changes.
3551 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3553 * interp.c (sim_open): New SIM_DESC result. Argument is now
3555 (other sim_*): New SIM_DESC argument.
3557 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3559 * interp.c: Fix printing of addresses for non-64-bit targets.
3560 (pr_addr): Add function to print address based on size.
3562 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3564 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3566 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3568 * gencode.c (build_mips16_operands): Correct computation of base
3569 address for extended PC relative instruction.
3571 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3573 * interp.c (mips16_entry): Add support for floating point cases.
3574 (SignalException): Pass floating point cases to mips16_entry.
3575 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3577 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3579 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3580 and then set the state to fmt_uninterpreted.
3581 (COP_SW): Temporarily set the state to fmt_word while calling
3584 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3586 * gencode.c (build_instruction): The high order may be set in the
3587 comparison flags at any ISA level, not just ISA 4.
3589 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3591 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3592 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3593 * configure.in: sinclude ../common/aclocal.m4.
3594 * configure: Regenerated.
3596 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3598 * configure: Rebuild after change to aclocal.m4.
3600 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3602 * configure configure.in Makefile.in: Update to new configure
3603 scheme which is more compatible with WinGDB builds.
3604 * configure.in: Improve comment on how to run autoconf.
3605 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3606 * Makefile.in: Use autoconf substitution to install common
3609 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3611 * gencode.c (build_instruction): Use BigEndianCPU instead of
3614 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3616 * interp.c (sim_monitor): Make output to stdout visible in
3617 wingdb's I/O log window.
3619 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3621 * support.h: Undo previous change to SIGTRAP
3624 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3626 * interp.c (store_word, load_word): New static functions.
3627 (mips16_entry): New static function.
3628 (SignalException): Look for mips16 entry and exit instructions.
3629 (simulate): Use the correct index when setting fpr_state after
3630 doing a pending move.
3632 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3634 * interp.c: Fix byte-swapping code throughout to work on
3635 both little- and big-endian hosts.
3637 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3639 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3640 with gdb/config/i386/xm-windows.h.
3642 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3644 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3645 that messes up arithmetic shifts.
3647 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3649 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3650 SIGTRAP and SIGQUIT for _WIN32.
3652 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3654 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3655 force a 64 bit multiplication.
3656 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3657 destination register is 0, since that is the default mips16 nop
3660 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3662 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3663 (build_endian_shift): Don't check proc64.
3664 (build_instruction): Always set memval to uword64. Cast op2 to
3665 uword64 when shifting it left in memory instructions. Always use
3666 the same code for stores--don't special case proc64.
3668 * gencode.c (build_mips16_operands): Fix base PC value for PC
3670 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3672 * interp.c (simJALDELAYSLOT): Define.
3673 (JALDELAYSLOT): Define.
3674 (INDELAYSLOT, INJALDELAYSLOT): Define.
3675 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3677 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3679 * interp.c (sim_open): add flush_cache as a PMON routine
3680 (sim_monitor): handle flush_cache by ignoring it
3682 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3684 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3686 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3687 (BigEndianMem): Rename to ByteSwapMem and change sense.
3688 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3689 BigEndianMem references to !ByteSwapMem.
3690 (set_endianness): New function, with prototype.
3691 (sim_open): Call set_endianness.
3692 (sim_info): Use simBE instead of BigEndianMem.
3693 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3694 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3695 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3696 ifdefs, keeping the prototype declaration.
3697 (swap_word): Rewrite correctly.
3698 (ColdReset): Delete references to CONFIG. Delete endianness related
3699 code; moved to set_endianness.
3701 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3703 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3704 * interp.c (CHECKHILO): Define away.
3705 (simSIGINT): New macro.
3706 (membank_size): Increase from 1MB to 2MB.
3707 (control_c): New function.
3708 (sim_resume): Rename parameter signal to signal_number. Add local
3709 variable prev. Call signal before and after simulate.
3710 (sim_stop_reason): Add simSIGINT support.
3711 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3713 (sim_warning): Delete call to SignalException. Do call printf_filtered
3715 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3716 a call to sim_warning.
3718 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3720 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3721 16 bit instructions.
3723 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3725 Add support for mips16 (16 bit MIPS implementation):
3726 * gencode.c (inst_type): Add mips16 instruction encoding types.
3727 (GETDATASIZEINSN): Define.
3728 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3729 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3731 (MIPS16_DECODE): New table, for mips16 instructions.
3732 (bitmap_val): New static function.
3733 (struct mips16_op): Define.
3734 (mips16_op_table): New table, for mips16 operands.
3735 (build_mips16_operands): New static function.
3736 (process_instructions): If PC is odd, decode a mips16
3737 instruction. Break out instruction handling into new
3738 build_instruction function.
3739 (build_instruction): New static function, broken out of
3740 process_instructions. Check modifiers rather than flags for SHIFT
3741 bit count and m[ft]{hi,lo} direction.
3742 (usage): Pass program name to fprintf.
3743 (main): Remove unused variable this_option_optind. Change
3744 ``*loptarg++'' to ``loptarg++''.
3745 (my_strtoul): Parenthesize && within ||.
3746 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3747 (simulate): If PC is odd, fetch a 16 bit instruction, and
3748 increment PC by 2 rather than 4.
3749 * configure.in: Add case for mips16*-*-*.
3750 * configure: Rebuild.
3752 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3754 * interp.c: Allow -t to enable tracing in standalone simulator.
3755 Fix garbage output in trace file and error messages.
3757 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3759 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3760 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3761 * configure.in: Simplify using macros in ../common/aclocal.m4.
3762 * configure: Regenerated.
3763 * tconfig.in: New file.
3765 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3767 * interp.c: Fix bugs in 64-bit port.
3768 Use ansi function declarations for msvc compiler.
3769 Initialize and test file pointer in trace code.
3770 Prevent duplicate definition of LAST_EMED_REGNUM.
3772 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3774 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3776 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3778 * interp.c (SignalException): Check for explicit terminating
3780 * gencode.c: Pass instruction value through SignalException()
3781 calls for Trap, Breakpoint and Syscall.
3783 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3785 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3786 only used on those hosts that provide it.
3787 * configure.in: Add sqrt() to list of functions to be checked for.
3788 * config.in: Re-generated.
3789 * configure: Re-generated.
3791 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3793 * gencode.c (process_instructions): Call build_endian_shift when
3794 expanding STORE RIGHT, to fix swr.
3795 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3796 clear the high bits.
3797 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3798 Fix float to int conversions to produce signed values.
3800 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3802 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3803 (process_instructions): Correct handling of nor instruction.
3804 Correct shift count for 32 bit shift instructions. Correct sign
3805 extension for arithmetic shifts to not shift the number of bits in
3806 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3807 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3809 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3810 It's OK to have a mult follow a mult. What's not OK is to have a
3811 mult follow an mfhi.
3812 (Convert): Comment out incorrect rounding code.
3814 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3816 * interp.c (sim_monitor): Improved monitor printf
3817 simulation. Tidied up simulator warnings, and added "--log" option
3818 for directing warning message output.
3819 * gencode.c: Use sim_warning() rather than WARNING macro.
3821 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3823 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3824 getopt1.o, rather than on gencode.c. Link objects together.
3825 Don't link against -liberty.
3826 (gencode.o, getopt.o, getopt1.o): New targets.
3827 * gencode.c: Include <ctype.h> and "ansidecl.h".
3828 (AND): Undefine after including "ansidecl.h".
3829 (ULONG_MAX): Define if not defined.
3830 (OP_*): Don't define macros; now defined in opcode/mips.h.
3831 (main): Call my_strtoul rather than strtoul.
3832 (my_strtoul): New static function.
3834 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3836 * gencode.c (process_instructions): Generate word64 and uword64
3837 instead of `long long' and `unsigned long long' data types.
3838 * interp.c: #include sysdep.h to get signals, and define default
3840 * (Convert): Work around for Visual-C++ compiler bug with type
3842 * support.h: Make things compile under Visual-C++ by using
3843 __int64 instead of `long long'. Change many refs to long long
3844 into word64/uword64 typedefs.
3846 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3848 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3849 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3851 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3852 (AC_PROG_INSTALL): Added.
3853 (AC_PROG_CC): Moved to before configure.host call.
3854 * configure: Rebuilt.
3856 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3858 * configure.in: Define @SIMCONF@ depending on mips target.
3859 * configure: Rebuild.
3860 * Makefile.in (run): Add @SIMCONF@ to control simulator
3862 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3863 * interp.c: Remove some debugging, provide more detailed error
3864 messages, update memory accesses to use LOADDRMASK.
3866 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3868 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3869 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3871 * configure: Rebuild.
3872 * config.in: New file, generated by autoheader.
3873 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3874 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3875 HAVE_ANINT and HAVE_AINT, as appropriate.
3876 * Makefile.in (run): Use @LIBS@ rather than -lm.
3877 (interp.o): Depend upon config.h.
3878 (Makefile): Just rebuild Makefile.
3879 (clean): Remove stamp-h.
3880 (mostlyclean): Make the same as clean, not as distclean.
3881 (config.h, stamp-h): New targets.
3883 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3885 * interp.c (ColdReset): Fix boolean test. Make all simulator
3888 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3890 * interp.c (xfer_direct_word, xfer_direct_long,
3891 swap_direct_word, swap_direct_long, xfer_big_word,
3892 xfer_big_long, xfer_little_word, xfer_little_long,
3893 swap_word,swap_long): Added.
3894 * interp.c (ColdReset): Provide function indirection to
3895 host<->simulated_target transfer routines.
3896 * interp.c (sim_store_register, sim_fetch_register): Updated to
3897 make use of indirected transfer routines.
3899 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3901 * gencode.c (process_instructions): Ensure FP ABS instruction
3903 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3904 system call support.
3906 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3908 * interp.c (sim_do_command): Complain if callback structure not
3911 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3913 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3914 support for Sun hosts.
3915 * Makefile.in (gencode): Ensure the host compiler and libraries
3916 used for cross-hosted build.
3918 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3920 * interp.c, gencode.c: Some more (TODO) tidying.
3922 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3924 * gencode.c, interp.c: Replaced explicit long long references with
3925 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3926 * support.h (SET64LO, SET64HI): Macros added.
3928 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3930 * configure: Regenerate with autoconf 2.7.
3932 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3934 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3935 * support.h: Remove superfluous "1" from #if.
3936 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3938 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3940 * interp.c (StoreFPR): Control UndefinedResult() call on
3941 WARN_RESULT manifest.
3943 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3945 * gencode.c: Tidied instruction decoding, and added FP instruction
3948 * interp.c: Added dineroIII, and BSD profiling support. Also
3949 run-time FP handling.
3951 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3953 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3954 gencode.c, interp.c, support.h: created.
projects / thirdparty / binutils-gdb.git / blob