sim/mn10300/op_utils.c

   1 /* This must come before any other includes.  */
   2 #include "defs.h"
   3
   4 #include "sim-main.h"
   5 #include "sim-syscall.h"
   6 #include "targ-vals.h"
   7
   8 #include <time.h>
   9 #ifdef HAVE_UNISTD_H
  10 #include <unistd.h>
  11 #endif
  12 #include <string.h>
  13 #include <sys/stat.h>
  14 #include <sys/time.h>
  15
  16
  17
  18 #define REG0(X) ((X) & 0x3)
  19 #define REG1(X) (((X) & 0xc) >> 2)
  20 #define REG0_4(X) (((X) & 0x30) >> 4)
  21 #define REG0_8(X) (((X) & 0x300) >> 8)
  22 #define REG1_8(X) (((X) & 0xc00) >> 10)
  23 #define REG0_16(X) (((X) & 0x30000) >> 16)
  24 #define REG1_16(X) (((X) & 0xc0000) >> 18)
  25
  26
  27 INLINE_SIM_MAIN (void)
  28 genericAdd(unsigned32 source, unsigned32 destReg)
  29 {
  30   int z, c, n, v;
  31   unsigned32 dest, sum;
  32
  33   dest = State.regs[destReg];
  34   sum = source + dest;
  35   State.regs[destReg] = sum;
  36
  37   z = (sum == 0);
  38   n = (sum & 0x80000000);
  39   c = (sum < source) || (sum < dest);
  40   v = ((dest & 0x80000000) == (source & 0x80000000)
  41        && (dest & 0x80000000) != (sum & 0x80000000));
  42
  43   PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
  44   PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
  45           | (c ? PSW_C : 0) | (v ? PSW_V : 0));
  46 }
  47
  48
  49
  50
  51 INLINE_SIM_MAIN (void)
  52 genericSub(unsigned32 source, unsigned32 destReg)
  53 {
  54   int z, c, n, v;
  55   unsigned32 dest, difference;
  56
  57   dest = State.regs[destReg];
  58   difference = dest - source;
  59   State.regs[destReg] = difference;
  60
  61   z = (difference == 0);
  62   n = (difference & 0x80000000);
  63   c = (source > dest);
  64   v = ((dest & 0x80000000) != (source & 0x80000000)
  65        && (dest & 0x80000000) != (difference & 0x80000000));
  66
  67   PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
  68   PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
  69           | (c ? PSW_C : 0) | (v ? PSW_V : 0));
  70 }
  71
  72 INLINE_SIM_MAIN (void)
  73 genericCmp(unsigned32 leftOpnd, unsigned32 rightOpnd)
  74 {
  75   int z, c, n, v;
  76   unsigned32 value;
  77
  78   value = rightOpnd - leftOpnd;
  79
  80   z = (value == 0);
  81   n = (value & 0x80000000);
  82   c = (leftOpnd > rightOpnd);
  83   v = ((rightOpnd & 0x80000000) != (leftOpnd & 0x80000000)
  84        && (rightOpnd & 0x80000000) != (value & 0x80000000));
  85
  86   PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
  87   PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
  88           | (c ? PSW_C : 0) | (v ? PSW_V : 0));
  89 }
  90
  91
  92 INLINE_SIM_MAIN (void)
  93 genericOr(unsigned32 source, unsigned32 destReg)
  94 {
  95   int n, z;
  96
  97   State.regs[destReg] |= source;
  98   z = (State.regs[destReg] == 0);
  99   n = (State.regs[destReg] & 0x80000000) != 0;
 100   PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
 101   PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
 102 }
 103
 104
 105 INLINE_SIM_MAIN (void)
 106 genericXor(unsigned32 source, unsigned32 destReg)
 107 {
 108   int n, z;
 109
 110   State.regs[destReg] ^= source;
 111   z = (State.regs[destReg] == 0);
 112   n = (State.regs[destReg] & 0x80000000) != 0;
 113   PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
 114   PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
 115 }
 116
 117
 118 INLINE_SIM_MAIN (void)
 119 genericBtst(unsigned32 leftOpnd, unsigned32 rightOpnd)
 120 {
 121   unsigned32 temp;
 122   int z, n;
 123
 124   temp = rightOpnd;
 125   temp &= leftOpnd;
 126   n = (temp & 0x80000000) != 0;
 127   z = (temp == 0);
 128   PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
 129   PSW |= (z ? PSW_Z : 0) | (n ? PSW_N : 0);
 130 }
 131
 132 /* syscall */
 133 INLINE_SIM_MAIN (void)
 134 do_syscall (void)
 135 {
 136   /* Registers passed to trap 0.  */
 137
 138   /* Function number.  */
 139   reg_t func = State.regs[0];
 140   /* Parameters.  */
 141   reg_t parm1 = State.regs[1];
 142   reg_t parm2 = load_word (State.regs[REG_SP] + 12);
 143   reg_t parm3 = load_word (State.regs[REG_SP] + 16);
 144   reg_t parm4 = load_word (State.regs[REG_SP] + 20);
 145
 146   /* We use this for simulated system calls; we may need to change
 147      it to a reserved instruction if we conflict with uses at
 148      Matsushita.  */
 149   int save_errno = errno;
 150   errno = 0;
 151
 152   if (func == TARGET_SYS_exit)
 153     {
 154       /* EXIT - caller can look in parm1 to work out the reason */
 155       sim_engine_halt (simulator, STATE_CPU (simulator, 0), NULL, PC,
 156                        (parm1 == 0xdead ? SIM_SIGABRT : sim_exited), parm1);
 157     }
 158   else
 159     {
 160       long result, result2;
 161       int errcode;
 162
 163       sim_syscall_multi (STATE_CPU (simulator, 0), func, parm1, parm2,
 164                          parm3, parm4, &result, &result2, &errcode);
 165
 166       /* Registers set by trap 0.  */
 167       State.regs[0] = errcode;
 168       State.regs[1] = result;
 169     }
 170
 171   errno = save_errno;
 172 }