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252b5132 1/* 32-bit ELF support for ARM
e44a2c9c 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
f6ebfac0 3 2008, 2009, 2010 Free Software Foundation, Inc.
252b5132
RH		 4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
6e6718a3 22#include "sysdep.h"
2468f9c9
PB		 23#include <limits.h>
24
3db64b00 25#include "bfd.h"
00a97672 26#include "libiberty.h"
7f266840
DJ		 27#include "libbfd.h"
28#include "elf-bfd.h"
00a97672 29#include "elf-vxworks.h"
ee065d83 30#include "elf/arm.h"
7f266840 31
00a97672
RS		 32/* Return the relocation section associated with NAME. HTAB is the
33 bfd's elf32_arm_link_hash_entry. */
34#define RELOC_SECTION(HTAB, NAME) \
35 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
36
37/* Return size of a relocation entry. HTAB is the bfd's
38 elf32_arm_link_hash_entry. */
39#define RELOC_SIZE(HTAB) \
40 ((HTAB)->use_rel \
41 ? sizeof (Elf32_External_Rel) \
42 : sizeof (Elf32_External_Rela))
43
44/* Return function to swap relocations in. HTAB is the bfd's
45 elf32_arm_link_hash_entry. */
46#define SWAP_RELOC_IN(HTAB) \
47 ((HTAB)->use_rel \
48 ? bfd_elf32_swap_reloc_in \
49 : bfd_elf32_swap_reloca_in)
50
51/* Return function to swap relocations out. HTAB is the bfd's
52 elf32_arm_link_hash_entry. */
53#define SWAP_RELOC_OUT(HTAB) \
54 ((HTAB)->use_rel \
55 ? bfd_elf32_swap_reloc_out \
56 : bfd_elf32_swap_reloca_out)
57
7f266840
DJ		 58#define elf_info_to_howto 0
59#define elf_info_to_howto_rel elf32_arm_info_to_howto
60
61#define ARM_ELF_ABI_VERSION 0
62#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
63
3e6b1042
DJ		 64static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
65 struct bfd_link_info *link_info,
66 asection *sec,
67 bfd_byte *contents);
68
7f266840
DJ		 69/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
70 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
71 in that slot. */
72
c19d1205 73static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840 74{
8029a119 75 /* No relocation. */
7f266840
DJ		 76 HOWTO (R_ARM_NONE, /* type */
77 0, /* rightshift */
78 0, /* size (0 = byte, 1 = short, 2 = long) */
79 0, /* bitsize */
80 FALSE, /* pc_relative */
81 0, /* bitpos */
82 complain_overflow_dont,/* complain_on_overflow */
83 bfd_elf_generic_reloc, /* special_function */
84 "R_ARM_NONE", /* name */
85 FALSE, /* partial_inplace */
86 0, /* src_mask */
87 0, /* dst_mask */
88 FALSE), /* pcrel_offset */
89
90 HOWTO (R_ARM_PC24, /* type */
91 2, /* rightshift */
92 2, /* size (0 = byte, 1 = short, 2 = long) */
93 24, /* bitsize */
94 TRUE, /* pc_relative */
95 0, /* bitpos */
96 complain_overflow_signed,/* complain_on_overflow */
97 bfd_elf_generic_reloc, /* special_function */
98 "R_ARM_PC24", /* name */
99 FALSE, /* partial_inplace */
100 0x00ffffff, /* src_mask */
101 0x00ffffff, /* dst_mask */
102 TRUE), /* pcrel_offset */
103
104 /* 32 bit absolute */
105 HOWTO (R_ARM_ABS32, /* type */
106 0, /* rightshift */
107 2, /* size (0 = byte, 1 = short, 2 = long) */
108 32, /* bitsize */
109 FALSE, /* pc_relative */
110 0, /* bitpos */
111 complain_overflow_bitfield,/* complain_on_overflow */
112 bfd_elf_generic_reloc, /* special_function */
113 "R_ARM_ABS32", /* name */
114 FALSE, /* partial_inplace */
115 0xffffffff, /* src_mask */
116 0xffffffff, /* dst_mask */
117 FALSE), /* pcrel_offset */
118
119 /* standard 32bit pc-relative reloc */
120 HOWTO (R_ARM_REL32, /* type */
121 0, /* rightshift */
122 2, /* size (0 = byte, 1 = short, 2 = long) */
123 32, /* bitsize */
124 TRUE, /* pc_relative */
125 0, /* bitpos */
126 complain_overflow_bitfield,/* complain_on_overflow */
127 bfd_elf_generic_reloc, /* special_function */
128 "R_ARM_REL32", /* name */
129 FALSE, /* partial_inplace */
130 0xffffffff, /* src_mask */
131 0xffffffff, /* dst_mask */
132 TRUE), /* pcrel_offset */
133
c19d1205 134 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 135 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 136 0, /* rightshift */
137 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 138 32, /* bitsize */
139 TRUE, /* pc_relative */
7f266840 140 0, /* bitpos */
4962c51a 141 complain_overflow_dont,/* complain_on_overflow */
7f266840 142 bfd_elf_generic_reloc, /* special_function */
4962c51a 143 "R_ARM_LDR_PC_G0", /* name */
7f266840 144 FALSE, /* partial_inplace */
4962c51a
MS		 145 0xffffffff, /* src_mask */
146 0xffffffff, /* dst_mask */
147 TRUE), /* pcrel_offset */
7f266840
DJ		 148
149 /* 16 bit absolute */
150 HOWTO (R_ARM_ABS16, /* type */
151 0, /* rightshift */
152 1, /* size (0 = byte, 1 = short, 2 = long) */
153 16, /* bitsize */
154 FALSE, /* pc_relative */
155 0, /* bitpos */
156 complain_overflow_bitfield,/* complain_on_overflow */
157 bfd_elf_generic_reloc, /* special_function */
158 "R_ARM_ABS16", /* name */
159 FALSE, /* partial_inplace */
160 0x0000ffff, /* src_mask */
161 0x0000ffff, /* dst_mask */
162 FALSE), /* pcrel_offset */
163
164 /* 12 bit absolute */
165 HOWTO (R_ARM_ABS12, /* type */
166 0, /* rightshift */
167 2, /* size (0 = byte, 1 = short, 2 = long) */
168 12, /* bitsize */
169 FALSE, /* pc_relative */
170 0, /* bitpos */
171 complain_overflow_bitfield,/* complain_on_overflow */
172 bfd_elf_generic_reloc, /* special_function */
173 "R_ARM_ABS12", /* name */
174 FALSE, /* partial_inplace */
00a97672
RS		 175 0x00000fff, /* src_mask */
176 0x00000fff, /* dst_mask */
7f266840
DJ		 177 FALSE), /* pcrel_offset */
178
179 HOWTO (R_ARM_THM_ABS5, /* type */
180 6, /* rightshift */
181 1, /* size (0 = byte, 1 = short, 2 = long) */
182 5, /* bitsize */
183 FALSE, /* pc_relative */
184 0, /* bitpos */
185 complain_overflow_bitfield,/* complain_on_overflow */
186 bfd_elf_generic_reloc, /* special_function */
187 "R_ARM_THM_ABS5", /* name */
188 FALSE, /* partial_inplace */
189 0x000007e0, /* src_mask */
190 0x000007e0, /* dst_mask */
191 FALSE), /* pcrel_offset */
192
193 /* 8 bit absolute */
194 HOWTO (R_ARM_ABS8, /* type */
195 0, /* rightshift */
196 0, /* size (0 = byte, 1 = short, 2 = long) */
197 8, /* bitsize */
198 FALSE, /* pc_relative */
199 0, /* bitpos */
200 complain_overflow_bitfield,/* complain_on_overflow */
201 bfd_elf_generic_reloc, /* special_function */
202 "R_ARM_ABS8", /* name */
203 FALSE, /* partial_inplace */
204 0x000000ff, /* src_mask */
205 0x000000ff, /* dst_mask */
206 FALSE), /* pcrel_offset */
207
208 HOWTO (R_ARM_SBREL32, /* type */
209 0, /* rightshift */
210 2, /* size (0 = byte, 1 = short, 2 = long) */
211 32, /* bitsize */
212 FALSE, /* pc_relative */
213 0, /* bitpos */
214 complain_overflow_dont,/* complain_on_overflow */
215 bfd_elf_generic_reloc, /* special_function */
216 "R_ARM_SBREL32", /* name */
217 FALSE, /* partial_inplace */
218 0xffffffff, /* src_mask */
219 0xffffffff, /* dst_mask */
220 FALSE), /* pcrel_offset */
221
c19d1205 222 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 223 1, /* rightshift */
224 2, /* size (0 = byte, 1 = short, 2 = long) */
f6ebfac0 225 24, /* bitsize */
7f266840
DJ		 226 TRUE, /* pc_relative */
227 0, /* bitpos */
228 complain_overflow_signed,/* complain_on_overflow */
229 bfd_elf_generic_reloc, /* special_function */
c19d1205 230 "R_ARM_THM_CALL", /* name */
7f266840
DJ		 231 FALSE, /* partial_inplace */
232 0x07ff07ff, /* src_mask */
233 0x07ff07ff, /* dst_mask */
234 TRUE), /* pcrel_offset */
235
236 HOWTO (R_ARM_THM_PC8, /* type */
237 1, /* rightshift */
238 1, /* size (0 = byte, 1 = short, 2 = long) */
239 8, /* bitsize */
240 TRUE, /* pc_relative */
241 0, /* bitpos */
242 complain_overflow_signed,/* complain_on_overflow */
243 bfd_elf_generic_reloc, /* special_function */
244 "R_ARM_THM_PC8", /* name */
245 FALSE, /* partial_inplace */
246 0x000000ff, /* src_mask */
247 0x000000ff, /* dst_mask */
248 TRUE), /* pcrel_offset */
249
c19d1205 250 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 251 1, /* rightshift */
252 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 253 32, /* bitsize */
254 FALSE, /* pc_relative */
7f266840
DJ		 255 0, /* bitpos */
256 complain_overflow_signed,/* complain_on_overflow */
257 bfd_elf_generic_reloc, /* special_function */
c19d1205 258 "R_ARM_BREL_ADJ", /* name */
7f266840 259 FALSE, /* partial_inplace */
c19d1205
ZW		 260 0xffffffff, /* src_mask */
261 0xffffffff, /* dst_mask */
262 FALSE), /* pcrel_offset */
7f266840
DJ		 263
264 HOWTO (R_ARM_SWI24, /* type */
265 0, /* rightshift */
266 0, /* size (0 = byte, 1 = short, 2 = long) */
267 0, /* bitsize */
268 FALSE, /* pc_relative */
269 0, /* bitpos */
270 complain_overflow_signed,/* complain_on_overflow */
271 bfd_elf_generic_reloc, /* special_function */
272 "R_ARM_SWI24", /* name */
273 FALSE, /* partial_inplace */
274 0x00000000, /* src_mask */
275 0x00000000, /* dst_mask */
276 FALSE), /* pcrel_offset */
277
278 HOWTO (R_ARM_THM_SWI8, /* type */
279 0, /* rightshift */
280 0, /* size (0 = byte, 1 = short, 2 = long) */
281 0, /* bitsize */
282 FALSE, /* pc_relative */
283 0, /* bitpos */
284 complain_overflow_signed,/* complain_on_overflow */
285 bfd_elf_generic_reloc, /* special_function */
286 "R_ARM_SWI8", /* name */
287 FALSE, /* partial_inplace */
288 0x00000000, /* src_mask */
289 0x00000000, /* dst_mask */
290 FALSE), /* pcrel_offset */
291
292 /* BLX instruction for the ARM. */
293 HOWTO (R_ARM_XPC25, /* type */
294 2, /* rightshift */
295 2, /* size (0 = byte, 1 = short, 2 = long) */
296 25, /* bitsize */
297 TRUE, /* pc_relative */
298 0, /* bitpos */
299 complain_overflow_signed,/* complain_on_overflow */
300 bfd_elf_generic_reloc, /* special_function */
301 "R_ARM_XPC25", /* name */
302 FALSE, /* partial_inplace */
303 0x00ffffff, /* src_mask */
304 0x00ffffff, /* dst_mask */
305 TRUE), /* pcrel_offset */
306
307 /* BLX instruction for the Thumb. */
308 HOWTO (R_ARM_THM_XPC22, /* type */
309 2, /* rightshift */
310 2, /* size (0 = byte, 1 = short, 2 = long) */
311 22, /* bitsize */
312 TRUE, /* pc_relative */
313 0, /* bitpos */
314 complain_overflow_signed,/* complain_on_overflow */
315 bfd_elf_generic_reloc, /* special_function */
316 "R_ARM_THM_XPC22", /* name */
317 FALSE, /* partial_inplace */
318 0x07ff07ff, /* src_mask */
319 0x07ff07ff, /* dst_mask */
320 TRUE), /* pcrel_offset */
321
ba93b8ac 322 /* Dynamic TLS relocations. */
7f266840 323
ba93b8ac
DJ		 324 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
325 0, /* rightshift */
326 2, /* size (0 = byte, 1 = short, 2 = long) */
327 32, /* bitsize */
328 FALSE, /* pc_relative */
329 0, /* bitpos */
330 complain_overflow_bitfield,/* complain_on_overflow */
331 bfd_elf_generic_reloc, /* special_function */
332 "R_ARM_TLS_DTPMOD32", /* name */
333 TRUE, /* partial_inplace */
334 0xffffffff, /* src_mask */
335 0xffffffff, /* dst_mask */
336 FALSE), /* pcrel_offset */
7f266840 337
ba93b8ac
DJ		 338 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
339 0, /* rightshift */
340 2, /* size (0 = byte, 1 = short, 2 = long) */
341 32, /* bitsize */
342 FALSE, /* pc_relative */
343 0, /* bitpos */
344 complain_overflow_bitfield,/* complain_on_overflow */
345 bfd_elf_generic_reloc, /* special_function */
346 "R_ARM_TLS_DTPOFF32", /* name */
347 TRUE, /* partial_inplace */
348 0xffffffff, /* src_mask */
349 0xffffffff, /* dst_mask */
350 FALSE), /* pcrel_offset */
7f266840 351
ba93b8ac
DJ		 352 HOWTO (R_ARM_TLS_TPOFF32, /* type */
353 0, /* rightshift */
354 2, /* size (0 = byte, 1 = short, 2 = long) */
355 32, /* bitsize */
356 FALSE, /* pc_relative */
357 0, /* bitpos */
358 complain_overflow_bitfield,/* complain_on_overflow */
359 bfd_elf_generic_reloc, /* special_function */
360 "R_ARM_TLS_TPOFF32", /* name */
361 TRUE, /* partial_inplace */
362 0xffffffff, /* src_mask */
363 0xffffffff, /* dst_mask */
364 FALSE), /* pcrel_offset */
7f266840
DJ		 365
366 /* Relocs used in ARM Linux */
367
368 HOWTO (R_ARM_COPY, /* type */
369 0, /* rightshift */
370 2, /* size (0 = byte, 1 = short, 2 = long) */
371 32, /* bitsize */
372 FALSE, /* pc_relative */
373 0, /* bitpos */
374 complain_overflow_bitfield,/* complain_on_overflow */
375 bfd_elf_generic_reloc, /* special_function */
376 "R_ARM_COPY", /* name */
377 TRUE, /* partial_inplace */
378 0xffffffff, /* src_mask */
379 0xffffffff, /* dst_mask */
380 FALSE), /* pcrel_offset */
381
382 HOWTO (R_ARM_GLOB_DAT, /* type */
383 0, /* rightshift */
384 2, /* size (0 = byte, 1 = short, 2 = long) */
385 32, /* bitsize */
386 FALSE, /* pc_relative */
387 0, /* bitpos */
388 complain_overflow_bitfield,/* complain_on_overflow */
389 bfd_elf_generic_reloc, /* special_function */
390 "R_ARM_GLOB_DAT", /* name */
391 TRUE, /* partial_inplace */
392 0xffffffff, /* src_mask */
393 0xffffffff, /* dst_mask */
394 FALSE), /* pcrel_offset */
395
396 HOWTO (R_ARM_JUMP_SLOT, /* type */
397 0, /* rightshift */
398 2, /* size (0 = byte, 1 = short, 2 = long) */
399 32, /* bitsize */
400 FALSE, /* pc_relative */
401 0, /* bitpos */
402 complain_overflow_bitfield,/* complain_on_overflow */
403 bfd_elf_generic_reloc, /* special_function */
404 "R_ARM_JUMP_SLOT", /* name */
405 TRUE, /* partial_inplace */
406 0xffffffff, /* src_mask */
407 0xffffffff, /* dst_mask */
408 FALSE), /* pcrel_offset */
409
410 HOWTO (R_ARM_RELATIVE, /* type */
411 0, /* rightshift */
412 2, /* size (0 = byte, 1 = short, 2 = long) */
413 32, /* bitsize */
414 FALSE, /* pc_relative */
415 0, /* bitpos */
416 complain_overflow_bitfield,/* complain_on_overflow */
417 bfd_elf_generic_reloc, /* special_function */
418 "R_ARM_RELATIVE", /* name */
419 TRUE, /* partial_inplace */
420 0xffffffff, /* src_mask */
421 0xffffffff, /* dst_mask */
422 FALSE), /* pcrel_offset */
423
c19d1205 424 HOWTO (R_ARM_GOTOFF32, /* type */
7f266840
DJ		 425 0, /* rightshift */
426 2, /* size (0 = byte, 1 = short, 2 = long) */
427 32, /* bitsize */
428 FALSE, /* pc_relative */
429 0, /* bitpos */
430 complain_overflow_bitfield,/* complain_on_overflow */
431 bfd_elf_generic_reloc, /* special_function */
c19d1205 432 "R_ARM_GOTOFF32", /* name */
7f266840
DJ		 433 TRUE, /* partial_inplace */
434 0xffffffff, /* src_mask */
435 0xffffffff, /* dst_mask */
436 FALSE), /* pcrel_offset */
437
438 HOWTO (R_ARM_GOTPC, /* type */
439 0, /* rightshift */
440 2, /* size (0 = byte, 1 = short, 2 = long) */
441 32, /* bitsize */
442 TRUE, /* pc_relative */
443 0, /* bitpos */
444 complain_overflow_bitfield,/* complain_on_overflow */
445 bfd_elf_generic_reloc, /* special_function */
446 "R_ARM_GOTPC", /* name */
447 TRUE, /* partial_inplace */
448 0xffffffff, /* src_mask */
449 0xffffffff, /* dst_mask */
450 TRUE), /* pcrel_offset */
451
452 HOWTO (R_ARM_GOT32, /* type */
453 0, /* rightshift */
454 2, /* size (0 = byte, 1 = short, 2 = long) */
455 32, /* bitsize */
456 FALSE, /* pc_relative */
457 0, /* bitpos */
458 complain_overflow_bitfield,/* complain_on_overflow */
459 bfd_elf_generic_reloc, /* special_function */
460 "R_ARM_GOT32", /* name */
461 TRUE, /* partial_inplace */
462 0xffffffff, /* src_mask */
463 0xffffffff, /* dst_mask */
464 FALSE), /* pcrel_offset */
465
466 HOWTO (R_ARM_PLT32, /* type */
467 2, /* rightshift */
468 2, /* size (0 = byte, 1 = short, 2 = long) */
ce490eda 469 24, /* bitsize */
7f266840
DJ		 470 TRUE, /* pc_relative */
471 0, /* bitpos */
472 complain_overflow_bitfield,/* complain_on_overflow */
473 bfd_elf_generic_reloc, /* special_function */
474 "R_ARM_PLT32", /* name */
ce490eda 475 FALSE, /* partial_inplace */
7f266840
DJ		 476 0x00ffffff, /* src_mask */
477 0x00ffffff, /* dst_mask */
478 TRUE), /* pcrel_offset */
479
480 HOWTO (R_ARM_CALL, /* type */
481 2, /* rightshift */
482 2, /* size (0 = byte, 1 = short, 2 = long) */
483 24, /* bitsize */
484 TRUE, /* pc_relative */
485 0, /* bitpos */
486 complain_overflow_signed,/* complain_on_overflow */
487 bfd_elf_generic_reloc, /* special_function */
488 "R_ARM_CALL", /* name */
489 FALSE, /* partial_inplace */
490 0x00ffffff, /* src_mask */
491 0x00ffffff, /* dst_mask */
492 TRUE), /* pcrel_offset */
493
494 HOWTO (R_ARM_JUMP24, /* type */
495 2, /* rightshift */
496 2, /* size (0 = byte, 1 = short, 2 = long) */
497 24, /* bitsize */
498 TRUE, /* pc_relative */
499 0, /* bitpos */
500 complain_overflow_signed,/* complain_on_overflow */
501 bfd_elf_generic_reloc, /* special_function */
502 "R_ARM_JUMP24", /* name */
503 FALSE, /* partial_inplace */
504 0x00ffffff, /* src_mask */
505 0x00ffffff, /* dst_mask */
506 TRUE), /* pcrel_offset */
507
c19d1205
ZW		 508 HOWTO (R_ARM_THM_JUMP24, /* type */
509 1, /* rightshift */
510 2, /* size (0 = byte, 1 = short, 2 = long) */
511 24, /* bitsize */
512 TRUE, /* pc_relative */
7f266840 513 0, /* bitpos */
c19d1205 514 complain_overflow_signed,/* complain_on_overflow */
7f266840 515 bfd_elf_generic_reloc, /* special_function */
c19d1205 516 "R_ARM_THM_JUMP24", /* name */
7f266840 517 FALSE, /* partial_inplace */
c19d1205
ZW		 518 0x07ff2fff, /* src_mask */
519 0x07ff2fff, /* dst_mask */
520 TRUE), /* pcrel_offset */
7f266840 521
c19d1205 522 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 523 0, /* rightshift */
c19d1205
ZW		 524 2, /* size (0 = byte, 1 = short, 2 = long) */
525 32, /* bitsize */
7f266840
DJ		 526 FALSE, /* pc_relative */
527 0, /* bitpos */
528 complain_overflow_dont,/* complain_on_overflow */
529 bfd_elf_generic_reloc, /* special_function */
c19d1205 530 "R_ARM_BASE_ABS", /* name */
7f266840 531 FALSE, /* partial_inplace */
c19d1205
ZW		 532 0xffffffff, /* src_mask */
533 0xffffffff, /* dst_mask */
7f266840
DJ		 534 FALSE), /* pcrel_offset */
535
536 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
537 0, /* rightshift */
538 2, /* size (0 = byte, 1 = short, 2 = long) */
539 12, /* bitsize */
540 TRUE, /* pc_relative */
541 0, /* bitpos */
542 complain_overflow_dont,/* complain_on_overflow */
543 bfd_elf_generic_reloc, /* special_function */
544 "R_ARM_ALU_PCREL_7_0", /* name */
545 FALSE, /* partial_inplace */
546 0x00000fff, /* src_mask */
547 0x00000fff, /* dst_mask */
548 TRUE), /* pcrel_offset */
549
550 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
551 0, /* rightshift */
552 2, /* size (0 = byte, 1 = short, 2 = long) */
553 12, /* bitsize */
554 TRUE, /* pc_relative */
555 8, /* bitpos */
556 complain_overflow_dont,/* complain_on_overflow */
557 bfd_elf_generic_reloc, /* special_function */
558 "R_ARM_ALU_PCREL_15_8",/* name */
559 FALSE, /* partial_inplace */
560 0x00000fff, /* src_mask */
561 0x00000fff, /* dst_mask */
562 TRUE), /* pcrel_offset */
563
564 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
565 0, /* rightshift */
566 2, /* size (0 = byte, 1 = short, 2 = long) */
567 12, /* bitsize */
568 TRUE, /* pc_relative */
569 16, /* bitpos */
570 complain_overflow_dont,/* complain_on_overflow */
571 bfd_elf_generic_reloc, /* special_function */
572 "R_ARM_ALU_PCREL_23_15",/* name */
573 FALSE, /* partial_inplace */
574 0x00000fff, /* src_mask */
575 0x00000fff, /* dst_mask */
576 TRUE), /* pcrel_offset */
577
578 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
579 0, /* rightshift */
580 2, /* size (0 = byte, 1 = short, 2 = long) */
581 12, /* bitsize */
582 FALSE, /* pc_relative */
583 0, /* bitpos */
584 complain_overflow_dont,/* complain_on_overflow */
585 bfd_elf_generic_reloc, /* special_function */
586 "R_ARM_LDR_SBREL_11_0",/* name */
587 FALSE, /* partial_inplace */
588 0x00000fff, /* src_mask */
589 0x00000fff, /* dst_mask */
590 FALSE), /* pcrel_offset */
591
592 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
593 0, /* rightshift */
594 2, /* size (0 = byte, 1 = short, 2 = long) */
595 8, /* bitsize */
596 FALSE, /* pc_relative */
597 12, /* bitpos */
598 complain_overflow_dont,/* complain_on_overflow */
599 bfd_elf_generic_reloc, /* special_function */
600 "R_ARM_ALU_SBREL_19_12",/* name */
601 FALSE, /* partial_inplace */
602 0x000ff000, /* src_mask */
603 0x000ff000, /* dst_mask */
604 FALSE), /* pcrel_offset */
605
606 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
607 0, /* rightshift */
608 2, /* size (0 = byte, 1 = short, 2 = long) */
609 8, /* bitsize */
610 FALSE, /* pc_relative */
611 20, /* bitpos */
612 complain_overflow_dont,/* complain_on_overflow */
613 bfd_elf_generic_reloc, /* special_function */
614 "R_ARM_ALU_SBREL_27_20",/* name */
615 FALSE, /* partial_inplace */
616 0x0ff00000, /* src_mask */
617 0x0ff00000, /* dst_mask */
618 FALSE), /* pcrel_offset */
619
620 HOWTO (R_ARM_TARGET1, /* type */
621 0, /* rightshift */
622 2, /* size (0 = byte, 1 = short, 2 = long) */
623 32, /* bitsize */
624 FALSE, /* pc_relative */
625 0, /* bitpos */
626 complain_overflow_dont,/* complain_on_overflow */
627 bfd_elf_generic_reloc, /* special_function */
628 "R_ARM_TARGET1", /* name */
629 FALSE, /* partial_inplace */
630 0xffffffff, /* src_mask */
631 0xffffffff, /* dst_mask */
632 FALSE), /* pcrel_offset */
633
634 HOWTO (R_ARM_ROSEGREL32, /* type */
635 0, /* rightshift */
636 2, /* size (0 = byte, 1 = short, 2 = long) */
637 32, /* bitsize */
638 FALSE, /* pc_relative */
639 0, /* bitpos */
640 complain_overflow_dont,/* complain_on_overflow */
641 bfd_elf_generic_reloc, /* special_function */
642 "R_ARM_ROSEGREL32", /* name */
643 FALSE, /* partial_inplace */
644 0xffffffff, /* src_mask */
645 0xffffffff, /* dst_mask */
646 FALSE), /* pcrel_offset */
647
648 HOWTO (R_ARM_V4BX, /* type */
649 0, /* rightshift */
650 2, /* size (0 = byte, 1 = short, 2 = long) */
651 32, /* bitsize */
652 FALSE, /* pc_relative */
653 0, /* bitpos */
654 complain_overflow_dont,/* complain_on_overflow */
655 bfd_elf_generic_reloc, /* special_function */
656 "R_ARM_V4BX", /* name */
657 FALSE, /* partial_inplace */
658 0xffffffff, /* src_mask */
659 0xffffffff, /* dst_mask */
660 FALSE), /* pcrel_offset */
661
662 HOWTO (R_ARM_TARGET2, /* type */
663 0, /* rightshift */
664 2, /* size (0 = byte, 1 = short, 2 = long) */
665 32, /* bitsize */
666 FALSE, /* pc_relative */
667 0, /* bitpos */
668 complain_overflow_signed,/* complain_on_overflow */
669 bfd_elf_generic_reloc, /* special_function */
670 "R_ARM_TARGET2", /* name */
671 FALSE, /* partial_inplace */
672 0xffffffff, /* src_mask */
673 0xffffffff, /* dst_mask */
674 TRUE), /* pcrel_offset */
675
676 HOWTO (R_ARM_PREL31, /* type */
677 0, /* rightshift */
678 2, /* size (0 = byte, 1 = short, 2 = long) */
679 31, /* bitsize */
680 TRUE, /* pc_relative */
681 0, /* bitpos */
682 complain_overflow_signed,/* complain_on_overflow */
683 bfd_elf_generic_reloc, /* special_function */
684 "R_ARM_PREL31", /* name */
685 FALSE, /* partial_inplace */
686 0x7fffffff, /* src_mask */
687 0x7fffffff, /* dst_mask */
688 TRUE), /* pcrel_offset */
c19d1205
ZW		 689
690 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
691 0, /* rightshift */
692 2, /* size (0 = byte, 1 = short, 2 = long) */
693 16, /* bitsize */
694 FALSE, /* pc_relative */
695 0, /* bitpos */
696 complain_overflow_dont,/* complain_on_overflow */
697 bfd_elf_generic_reloc, /* special_function */
698 "R_ARM_MOVW_ABS_NC", /* name */
699 FALSE, /* partial_inplace */
39623e12
PB		 700 0x000f0fff, /* src_mask */
701 0x000f0fff, /* dst_mask */
c19d1205
ZW		 702 FALSE), /* pcrel_offset */
703
704 HOWTO (R_ARM_MOVT_ABS, /* type */
705 0, /* rightshift */
706 2, /* size (0 = byte, 1 = short, 2 = long) */
707 16, /* bitsize */
708 FALSE, /* pc_relative */
709 0, /* bitpos */
710 complain_overflow_bitfield,/* complain_on_overflow */
711 bfd_elf_generic_reloc, /* special_function */
712 "R_ARM_MOVT_ABS", /* name */
713 FALSE, /* partial_inplace */
39623e12
PB		 714 0x000f0fff, /* src_mask */
715 0x000f0fff, /* dst_mask */
c19d1205
ZW		 716 FALSE), /* pcrel_offset */
717
718 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
719 0, /* rightshift */
720 2, /* size (0 = byte, 1 = short, 2 = long) */
721 16, /* bitsize */
722 TRUE, /* pc_relative */
723 0, /* bitpos */
724 complain_overflow_dont,/* complain_on_overflow */
725 bfd_elf_generic_reloc, /* special_function */
726 "R_ARM_MOVW_PREL_NC", /* name */
727 FALSE, /* partial_inplace */
39623e12
PB		 728 0x000f0fff, /* src_mask */
729 0x000f0fff, /* dst_mask */
c19d1205
ZW		 730 TRUE), /* pcrel_offset */
731
732 HOWTO (R_ARM_MOVT_PREL, /* type */
733 0, /* rightshift */
734 2, /* size (0 = byte, 1 = short, 2 = long) */
735 16, /* bitsize */
736 TRUE, /* pc_relative */
737 0, /* bitpos */
738 complain_overflow_bitfield,/* complain_on_overflow */
739 bfd_elf_generic_reloc, /* special_function */
740 "R_ARM_MOVT_PREL", /* name */
741 FALSE, /* partial_inplace */
39623e12
PB		 742 0x000f0fff, /* src_mask */
743 0x000f0fff, /* dst_mask */
c19d1205
ZW		 744 TRUE), /* pcrel_offset */
745
746 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
747 0, /* rightshift */
748 2, /* size (0 = byte, 1 = short, 2 = long) */
749 16, /* bitsize */
750 FALSE, /* pc_relative */
751 0, /* bitpos */
752 complain_overflow_dont,/* complain_on_overflow */
753 bfd_elf_generic_reloc, /* special_function */
754 "R_ARM_THM_MOVW_ABS_NC",/* name */
755 FALSE, /* partial_inplace */
756 0x040f70ff, /* src_mask */
757 0x040f70ff, /* dst_mask */
758 FALSE), /* pcrel_offset */
759
760 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
761 0, /* rightshift */
762 2, /* size (0 = byte, 1 = short, 2 = long) */
763 16, /* bitsize */
764 FALSE, /* pc_relative */
765 0, /* bitpos */
766 complain_overflow_bitfield,/* complain_on_overflow */
767 bfd_elf_generic_reloc, /* special_function */
768 "R_ARM_THM_MOVT_ABS", /* name */
769 FALSE, /* partial_inplace */
770 0x040f70ff, /* src_mask */
771 0x040f70ff, /* dst_mask */
772 FALSE), /* pcrel_offset */
773
774 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
775 0, /* rightshift */
776 2, /* size (0 = byte, 1 = short, 2 = long) */
777 16, /* bitsize */
778 TRUE, /* pc_relative */
779 0, /* bitpos */
780 complain_overflow_dont,/* complain_on_overflow */
781 bfd_elf_generic_reloc, /* special_function */
782 "R_ARM_THM_MOVW_PREL_NC",/* name */
783 FALSE, /* partial_inplace */
784 0x040f70ff, /* src_mask */
785 0x040f70ff, /* dst_mask */
786 TRUE), /* pcrel_offset */
787
788 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
789 0, /* rightshift */
790 2, /* size (0 = byte, 1 = short, 2 = long) */
791 16, /* bitsize */
792 TRUE, /* pc_relative */
793 0, /* bitpos */
794 complain_overflow_bitfield,/* complain_on_overflow */
795 bfd_elf_generic_reloc, /* special_function */
796 "R_ARM_THM_MOVT_PREL", /* name */
797 FALSE, /* partial_inplace */
798 0x040f70ff, /* src_mask */
799 0x040f70ff, /* dst_mask */
800 TRUE), /* pcrel_offset */
801
802 HOWTO (R_ARM_THM_JUMP19, /* type */
803 1, /* rightshift */
804 2, /* size (0 = byte, 1 = short, 2 = long) */
805 19, /* bitsize */
806 TRUE, /* pc_relative */
807 0, /* bitpos */
808 complain_overflow_signed,/* complain_on_overflow */
809 bfd_elf_generic_reloc, /* special_function */
810 "R_ARM_THM_JUMP19", /* name */
811 FALSE, /* partial_inplace */
812 0x043f2fff, /* src_mask */
813 0x043f2fff, /* dst_mask */
814 TRUE), /* pcrel_offset */
815
816 HOWTO (R_ARM_THM_JUMP6, /* type */
817 1, /* rightshift */
818 1, /* size (0 = byte, 1 = short, 2 = long) */
819 6, /* bitsize */
820 TRUE, /* pc_relative */
821 0, /* bitpos */
822 complain_overflow_unsigned,/* complain_on_overflow */
823 bfd_elf_generic_reloc, /* special_function */
824 "R_ARM_THM_JUMP6", /* name */
825 FALSE, /* partial_inplace */
826 0x02f8, /* src_mask */
827 0x02f8, /* dst_mask */
828 TRUE), /* pcrel_offset */
829
830 /* These are declared as 13-bit signed relocations because we can
831 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
832 versa. */
833 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
834 0, /* rightshift */
835 2, /* size (0 = byte, 1 = short, 2 = long) */
836 13, /* bitsize */
837 TRUE, /* pc_relative */
838 0, /* bitpos */
2cab6cc3 839 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 840 bfd_elf_generic_reloc, /* special_function */
841 "R_ARM_THM_ALU_PREL_11_0",/* name */
842 FALSE, /* partial_inplace */
2cab6cc3
MS		 843 0xffffffff, /* src_mask */
844 0xffffffff, /* dst_mask */
c19d1205
ZW		 845 TRUE), /* pcrel_offset */
846
847 HOWTO (R_ARM_THM_PC12, /* type */
848 0, /* rightshift */
849 2, /* size (0 = byte, 1 = short, 2 = long) */
850 13, /* bitsize */
851 TRUE, /* pc_relative */
852 0, /* bitpos */
2cab6cc3 853 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 854 bfd_elf_generic_reloc, /* special_function */
855 "R_ARM_THM_PC12", /* name */
856 FALSE, /* partial_inplace */
2cab6cc3
MS		 857 0xffffffff, /* src_mask */
858 0xffffffff, /* dst_mask */
c19d1205
ZW		 859 TRUE), /* pcrel_offset */
860
861 HOWTO (R_ARM_ABS32_NOI, /* type */
862 0, /* rightshift */
863 2, /* size (0 = byte, 1 = short, 2 = long) */
864 32, /* bitsize */
865 FALSE, /* pc_relative */
866 0, /* bitpos */
867 complain_overflow_dont,/* complain_on_overflow */
868 bfd_elf_generic_reloc, /* special_function */
869 "R_ARM_ABS32_NOI", /* name */
870 FALSE, /* partial_inplace */
871 0xffffffff, /* src_mask */
872 0xffffffff, /* dst_mask */
873 FALSE), /* pcrel_offset */
874
875 HOWTO (R_ARM_REL32_NOI, /* type */
876 0, /* rightshift */
877 2, /* size (0 = byte, 1 = short, 2 = long) */
878 32, /* bitsize */
879 TRUE, /* pc_relative */
880 0, /* bitpos */
881 complain_overflow_dont,/* complain_on_overflow */
882 bfd_elf_generic_reloc, /* special_function */
883 "R_ARM_REL32_NOI", /* name */
884 FALSE, /* partial_inplace */
885 0xffffffff, /* src_mask */
886 0xffffffff, /* dst_mask */
887 FALSE), /* pcrel_offset */
7f266840 888
4962c51a
MS		 889 /* Group relocations. */
890
891 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
892 0, /* rightshift */
893 2, /* size (0 = byte, 1 = short, 2 = long) */
894 32, /* bitsize */
895 TRUE, /* pc_relative */
896 0, /* bitpos */
897 complain_overflow_dont,/* complain_on_overflow */
898 bfd_elf_generic_reloc, /* special_function */
899 "R_ARM_ALU_PC_G0_NC", /* name */
900 FALSE, /* partial_inplace */
901 0xffffffff, /* src_mask */
902 0xffffffff, /* dst_mask */
903 TRUE), /* pcrel_offset */
904
905 HOWTO (R_ARM_ALU_PC_G0, /* type */
906 0, /* rightshift */
907 2, /* size (0 = byte, 1 = short, 2 = long) */
908 32, /* bitsize */
909 TRUE, /* pc_relative */
910 0, /* bitpos */
911 complain_overflow_dont,/* complain_on_overflow */
912 bfd_elf_generic_reloc, /* special_function */
913 "R_ARM_ALU_PC_G0", /* name */
914 FALSE, /* partial_inplace */
915 0xffffffff, /* src_mask */
916 0xffffffff, /* dst_mask */
917 TRUE), /* pcrel_offset */
918
919 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
920 0, /* rightshift */
921 2, /* size (0 = byte, 1 = short, 2 = long) */
922 32, /* bitsize */
923 TRUE, /* pc_relative */
924 0, /* bitpos */
925 complain_overflow_dont,/* complain_on_overflow */
926 bfd_elf_generic_reloc, /* special_function */
927 "R_ARM_ALU_PC_G1_NC", /* name */
928 FALSE, /* partial_inplace */
929 0xffffffff, /* src_mask */
930 0xffffffff, /* dst_mask */
931 TRUE), /* pcrel_offset */
932
933 HOWTO (R_ARM_ALU_PC_G1, /* type */
934 0, /* rightshift */
935 2, /* size (0 = byte, 1 = short, 2 = long) */
936 32, /* bitsize */
937 TRUE, /* pc_relative */
938 0, /* bitpos */
939 complain_overflow_dont,/* complain_on_overflow */
940 bfd_elf_generic_reloc, /* special_function */
941 "R_ARM_ALU_PC_G1", /* name */
942 FALSE, /* partial_inplace */
943 0xffffffff, /* src_mask */
944 0xffffffff, /* dst_mask */
945 TRUE), /* pcrel_offset */
946
947 HOWTO (R_ARM_ALU_PC_G2, /* type */
948 0, /* rightshift */
949 2, /* size (0 = byte, 1 = short, 2 = long) */
950 32, /* bitsize */
951 TRUE, /* pc_relative */
952 0, /* bitpos */
953 complain_overflow_dont,/* complain_on_overflow */
954 bfd_elf_generic_reloc, /* special_function */
955 "R_ARM_ALU_PC_G2", /* name */
956 FALSE, /* partial_inplace */
957 0xffffffff, /* src_mask */
958 0xffffffff, /* dst_mask */
959 TRUE), /* pcrel_offset */
960
961 HOWTO (R_ARM_LDR_PC_G1, /* type */
962 0, /* rightshift */
963 2, /* size (0 = byte, 1 = short, 2 = long) */
964 32, /* bitsize */
965 TRUE, /* pc_relative */
966 0, /* bitpos */
967 complain_overflow_dont,/* complain_on_overflow */
968 bfd_elf_generic_reloc, /* special_function */
969 "R_ARM_LDR_PC_G1", /* name */
970 FALSE, /* partial_inplace */
971 0xffffffff, /* src_mask */
972 0xffffffff, /* dst_mask */
973 TRUE), /* pcrel_offset */
974
975 HOWTO (R_ARM_LDR_PC_G2, /* type */
976 0, /* rightshift */
977 2, /* size (0 = byte, 1 = short, 2 = long) */
978 32, /* bitsize */
979 TRUE, /* pc_relative */
980 0, /* bitpos */
981 complain_overflow_dont,/* complain_on_overflow */
982 bfd_elf_generic_reloc, /* special_function */
983 "R_ARM_LDR_PC_G2", /* name */
984 FALSE, /* partial_inplace */
985 0xffffffff, /* src_mask */
986 0xffffffff, /* dst_mask */
987 TRUE), /* pcrel_offset */
988
989 HOWTO (R_ARM_LDRS_PC_G0, /* type */
990 0, /* rightshift */
991 2, /* size (0 = byte, 1 = short, 2 = long) */
992 32, /* bitsize */
993 TRUE, /* pc_relative */
994 0, /* bitpos */
995 complain_overflow_dont,/* complain_on_overflow */
996 bfd_elf_generic_reloc, /* special_function */
997 "R_ARM_LDRS_PC_G0", /* name */
998 FALSE, /* partial_inplace */
999 0xffffffff, /* src_mask */
1000 0xffffffff, /* dst_mask */
1001 TRUE), /* pcrel_offset */
1002
1003 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1004 0, /* rightshift */
1005 2, /* size (0 = byte, 1 = short, 2 = long) */
1006 32, /* bitsize */
1007 TRUE, /* pc_relative */
1008 0, /* bitpos */
1009 complain_overflow_dont,/* complain_on_overflow */
1010 bfd_elf_generic_reloc, /* special_function */
1011 "R_ARM_LDRS_PC_G1", /* name */
1012 FALSE, /* partial_inplace */
1013 0xffffffff, /* src_mask */
1014 0xffffffff, /* dst_mask */
1015 TRUE), /* pcrel_offset */
1016
1017 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1018 0, /* rightshift */
1019 2, /* size (0 = byte, 1 = short, 2 = long) */
1020 32, /* bitsize */
1021 TRUE, /* pc_relative */
1022 0, /* bitpos */
1023 complain_overflow_dont,/* complain_on_overflow */
1024 bfd_elf_generic_reloc, /* special_function */
1025 "R_ARM_LDRS_PC_G2", /* name */
1026 FALSE, /* partial_inplace */
1027 0xffffffff, /* src_mask */
1028 0xffffffff, /* dst_mask */
1029 TRUE), /* pcrel_offset */
1030
1031 HOWTO (R_ARM_LDC_PC_G0, /* type */
1032 0, /* rightshift */
1033 2, /* size (0 = byte, 1 = short, 2 = long) */
1034 32, /* bitsize */
1035 TRUE, /* pc_relative */
1036 0, /* bitpos */
1037 complain_overflow_dont,/* complain_on_overflow */
1038 bfd_elf_generic_reloc, /* special_function */
1039 "R_ARM_LDC_PC_G0", /* name */
1040 FALSE, /* partial_inplace */
1041 0xffffffff, /* src_mask */
1042 0xffffffff, /* dst_mask */
1043 TRUE), /* pcrel_offset */
1044
1045 HOWTO (R_ARM_LDC_PC_G1, /* type */
1046 0, /* rightshift */
1047 2, /* size (0 = byte, 1 = short, 2 = long) */
1048 32, /* bitsize */
1049 TRUE, /* pc_relative */
1050 0, /* bitpos */
1051 complain_overflow_dont,/* complain_on_overflow */
1052 bfd_elf_generic_reloc, /* special_function */
1053 "R_ARM_LDC_PC_G1", /* name */
1054 FALSE, /* partial_inplace */
1055 0xffffffff, /* src_mask */
1056 0xffffffff, /* dst_mask */
1057 TRUE), /* pcrel_offset */
1058
1059 HOWTO (R_ARM_LDC_PC_G2, /* type */
1060 0, /* rightshift */
1061 2, /* size (0 = byte, 1 = short, 2 = long) */
1062 32, /* bitsize */
1063 TRUE, /* pc_relative */
1064 0, /* bitpos */
1065 complain_overflow_dont,/* complain_on_overflow */
1066 bfd_elf_generic_reloc, /* special_function */
1067 "R_ARM_LDC_PC_G2", /* name */
1068 FALSE, /* partial_inplace */
1069 0xffffffff, /* src_mask */
1070 0xffffffff, /* dst_mask */
1071 TRUE), /* pcrel_offset */
1072
1073 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1074 0, /* rightshift */
1075 2, /* size (0 = byte, 1 = short, 2 = long) */
1076 32, /* bitsize */
1077 TRUE, /* pc_relative */
1078 0, /* bitpos */
1079 complain_overflow_dont,/* complain_on_overflow */
1080 bfd_elf_generic_reloc, /* special_function */
1081 "R_ARM_ALU_SB_G0_NC", /* name */
1082 FALSE, /* partial_inplace */
1083 0xffffffff, /* src_mask */
1084 0xffffffff, /* dst_mask */
1085 TRUE), /* pcrel_offset */
1086
1087 HOWTO (R_ARM_ALU_SB_G0, /* type */
1088 0, /* rightshift */
1089 2, /* size (0 = byte, 1 = short, 2 = long) */
1090 32, /* bitsize */
1091 TRUE, /* pc_relative */
1092 0, /* bitpos */
1093 complain_overflow_dont,/* complain_on_overflow */
1094 bfd_elf_generic_reloc, /* special_function */
1095 "R_ARM_ALU_SB_G0", /* name */
1096 FALSE, /* partial_inplace */
1097 0xffffffff, /* src_mask */
1098 0xffffffff, /* dst_mask */
1099 TRUE), /* pcrel_offset */
1100
1101 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1102 0, /* rightshift */
1103 2, /* size (0 = byte, 1 = short, 2 = long) */
1104 32, /* bitsize */
1105 TRUE, /* pc_relative */
1106 0, /* bitpos */
1107 complain_overflow_dont,/* complain_on_overflow */
1108 bfd_elf_generic_reloc, /* special_function */
1109 "R_ARM_ALU_SB_G1_NC", /* name */
1110 FALSE, /* partial_inplace */
1111 0xffffffff, /* src_mask */
1112 0xffffffff, /* dst_mask */
1113 TRUE), /* pcrel_offset */
1114
1115 HOWTO (R_ARM_ALU_SB_G1, /* type */
1116 0, /* rightshift */
1117 2, /* size (0 = byte, 1 = short, 2 = long) */
1118 32, /* bitsize */
1119 TRUE, /* pc_relative */
1120 0, /* bitpos */
1121 complain_overflow_dont,/* complain_on_overflow */
1122 bfd_elf_generic_reloc, /* special_function */
1123 "R_ARM_ALU_SB_G1", /* name */
1124 FALSE, /* partial_inplace */
1125 0xffffffff, /* src_mask */
1126 0xffffffff, /* dst_mask */
1127 TRUE), /* pcrel_offset */
1128
1129 HOWTO (R_ARM_ALU_SB_G2, /* type */
1130 0, /* rightshift */
1131 2, /* size (0 = byte, 1 = short, 2 = long) */
1132 32, /* bitsize */
1133 TRUE, /* pc_relative */
1134 0, /* bitpos */
1135 complain_overflow_dont,/* complain_on_overflow */
1136 bfd_elf_generic_reloc, /* special_function */
1137 "R_ARM_ALU_SB_G2", /* name */
1138 FALSE, /* partial_inplace */
1139 0xffffffff, /* src_mask */
1140 0xffffffff, /* dst_mask */
1141 TRUE), /* pcrel_offset */
1142
1143 HOWTO (R_ARM_LDR_SB_G0, /* type */
1144 0, /* rightshift */
1145 2, /* size (0 = byte, 1 = short, 2 = long) */
1146 32, /* bitsize */
1147 TRUE, /* pc_relative */
1148 0, /* bitpos */
1149 complain_overflow_dont,/* complain_on_overflow */
1150 bfd_elf_generic_reloc, /* special_function */
1151 "R_ARM_LDR_SB_G0", /* name */
1152 FALSE, /* partial_inplace */
1153 0xffffffff, /* src_mask */
1154 0xffffffff, /* dst_mask */
1155 TRUE), /* pcrel_offset */
1156
1157 HOWTO (R_ARM_LDR_SB_G1, /* type */
1158 0, /* rightshift */
1159 2, /* size (0 = byte, 1 = short, 2 = long) */
1160 32, /* bitsize */
1161 TRUE, /* pc_relative */
1162 0, /* bitpos */
1163 complain_overflow_dont,/* complain_on_overflow */
1164 bfd_elf_generic_reloc, /* special_function */
1165 "R_ARM_LDR_SB_G1", /* name */
1166 FALSE, /* partial_inplace */
1167 0xffffffff, /* src_mask */
1168 0xffffffff, /* dst_mask */
1169 TRUE), /* pcrel_offset */
1170
1171 HOWTO (R_ARM_LDR_SB_G2, /* type */
1172 0, /* rightshift */
1173 2, /* size (0 = byte, 1 = short, 2 = long) */
1174 32, /* bitsize */
1175 TRUE, /* pc_relative */
1176 0, /* bitpos */
1177 complain_overflow_dont,/* complain_on_overflow */
1178 bfd_elf_generic_reloc, /* special_function */
1179 "R_ARM_LDR_SB_G2", /* name */
1180 FALSE, /* partial_inplace */
1181 0xffffffff, /* src_mask */
1182 0xffffffff, /* dst_mask */
1183 TRUE), /* pcrel_offset */
1184
1185 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1186 0, /* rightshift */
1187 2, /* size (0 = byte, 1 = short, 2 = long) */
1188 32, /* bitsize */
1189 TRUE, /* pc_relative */
1190 0, /* bitpos */
1191 complain_overflow_dont,/* complain_on_overflow */
1192 bfd_elf_generic_reloc, /* special_function */
1193 "R_ARM_LDRS_SB_G0", /* name */
1194 FALSE, /* partial_inplace */
1195 0xffffffff, /* src_mask */
1196 0xffffffff, /* dst_mask */
1197 TRUE), /* pcrel_offset */
1198
1199 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1200 0, /* rightshift */
1201 2, /* size (0 = byte, 1 = short, 2 = long) */
1202 32, /* bitsize */
1203 TRUE, /* pc_relative */
1204 0, /* bitpos */
1205 complain_overflow_dont,/* complain_on_overflow */
1206 bfd_elf_generic_reloc, /* special_function */
1207 "R_ARM_LDRS_SB_G1", /* name */
1208 FALSE, /* partial_inplace */
1209 0xffffffff, /* src_mask */
1210 0xffffffff, /* dst_mask */
1211 TRUE), /* pcrel_offset */
1212
1213 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1214 0, /* rightshift */
1215 2, /* size (0 = byte, 1 = short, 2 = long) */
1216 32, /* bitsize */
1217 TRUE, /* pc_relative */
1218 0, /* bitpos */
1219 complain_overflow_dont,/* complain_on_overflow */
1220 bfd_elf_generic_reloc, /* special_function */
1221 "R_ARM_LDRS_SB_G2", /* name */
1222 FALSE, /* partial_inplace */
1223 0xffffffff, /* src_mask */
1224 0xffffffff, /* dst_mask */
1225 TRUE), /* pcrel_offset */
1226
1227 HOWTO (R_ARM_LDC_SB_G0, /* type */
1228 0, /* rightshift */
1229 2, /* size (0 = byte, 1 = short, 2 = long) */
1230 32, /* bitsize */
1231 TRUE, /* pc_relative */
1232 0, /* bitpos */
1233 complain_overflow_dont,/* complain_on_overflow */
1234 bfd_elf_generic_reloc, /* special_function */
1235 "R_ARM_LDC_SB_G0", /* name */
1236 FALSE, /* partial_inplace */
1237 0xffffffff, /* src_mask */
1238 0xffffffff, /* dst_mask */
1239 TRUE), /* pcrel_offset */
1240
1241 HOWTO (R_ARM_LDC_SB_G1, /* type */
1242 0, /* rightshift */
1243 2, /* size (0 = byte, 1 = short, 2 = long) */
1244 32, /* bitsize */
1245 TRUE, /* pc_relative */
1246 0, /* bitpos */
1247 complain_overflow_dont,/* complain_on_overflow */
1248 bfd_elf_generic_reloc, /* special_function */
1249 "R_ARM_LDC_SB_G1", /* name */
1250 FALSE, /* partial_inplace */
1251 0xffffffff, /* src_mask */
1252 0xffffffff, /* dst_mask */
1253 TRUE), /* pcrel_offset */
1254
1255 HOWTO (R_ARM_LDC_SB_G2, /* type */
1256 0, /* rightshift */
1257 2, /* size (0 = byte, 1 = short, 2 = long) */
1258 32, /* bitsize */
1259 TRUE, /* pc_relative */
1260 0, /* bitpos */
1261 complain_overflow_dont,/* complain_on_overflow */
1262 bfd_elf_generic_reloc, /* special_function */
1263 "R_ARM_LDC_SB_G2", /* name */
1264 FALSE, /* partial_inplace */
1265 0xffffffff, /* src_mask */
1266 0xffffffff, /* dst_mask */
1267 TRUE), /* pcrel_offset */
1268
1269 /* End of group relocations. */
c19d1205 1270
c19d1205
ZW		 1271 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1272 0, /* rightshift */
1273 2, /* size (0 = byte, 1 = short, 2 = long) */
1274 16, /* bitsize */
1275 FALSE, /* pc_relative */
1276 0, /* bitpos */
1277 complain_overflow_dont,/* complain_on_overflow */
1278 bfd_elf_generic_reloc, /* special_function */
1279 "R_ARM_MOVW_BREL_NC", /* name */
1280 FALSE, /* partial_inplace */
1281 0x0000ffff, /* src_mask */
1282 0x0000ffff, /* dst_mask */
1283 FALSE), /* pcrel_offset */
1284
1285 HOWTO (R_ARM_MOVT_BREL, /* type */
1286 0, /* rightshift */
1287 2, /* size (0 = byte, 1 = short, 2 = long) */
1288 16, /* bitsize */
1289 FALSE, /* pc_relative */
1290 0, /* bitpos */
1291 complain_overflow_bitfield,/* complain_on_overflow */
1292 bfd_elf_generic_reloc, /* special_function */
1293 "R_ARM_MOVT_BREL", /* name */
1294 FALSE, /* partial_inplace */
1295 0x0000ffff, /* src_mask */
1296 0x0000ffff, /* dst_mask */
1297 FALSE), /* pcrel_offset */
1298
1299 HOWTO (R_ARM_MOVW_BREL, /* type */
1300 0, /* rightshift */
1301 2, /* size (0 = byte, 1 = short, 2 = long) */
1302 16, /* bitsize */
1303 FALSE, /* pc_relative */
1304 0, /* bitpos */
1305 complain_overflow_dont,/* complain_on_overflow */
1306 bfd_elf_generic_reloc, /* special_function */
1307 "R_ARM_MOVW_BREL", /* name */
1308 FALSE, /* partial_inplace */
1309 0x0000ffff, /* src_mask */
1310 0x0000ffff, /* dst_mask */
1311 FALSE), /* pcrel_offset */
1312
1313 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1314 0, /* rightshift */
1315 2, /* size (0 = byte, 1 = short, 2 = long) */
1316 16, /* bitsize */
1317 FALSE, /* pc_relative */
1318 0, /* bitpos */
1319 complain_overflow_dont,/* complain_on_overflow */
1320 bfd_elf_generic_reloc, /* special_function */
1321 "R_ARM_THM_MOVW_BREL_NC",/* name */
1322 FALSE, /* partial_inplace */
1323 0x040f70ff, /* src_mask */
1324 0x040f70ff, /* dst_mask */
1325 FALSE), /* pcrel_offset */
1326
1327 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1328 0, /* rightshift */
1329 2, /* size (0 = byte, 1 = short, 2 = long) */
1330 16, /* bitsize */
1331 FALSE, /* pc_relative */
1332 0, /* bitpos */
1333 complain_overflow_bitfield,/* complain_on_overflow */
1334 bfd_elf_generic_reloc, /* special_function */
1335 "R_ARM_THM_MOVT_BREL", /* name */
1336 FALSE, /* partial_inplace */
1337 0x040f70ff, /* src_mask */
1338 0x040f70ff, /* dst_mask */
1339 FALSE), /* pcrel_offset */
1340
1341 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1342 0, /* rightshift */
1343 2, /* size (0 = byte, 1 = short, 2 = long) */
1344 16, /* bitsize */
1345 FALSE, /* pc_relative */
1346 0, /* bitpos */
1347 complain_overflow_dont,/* complain_on_overflow */
1348 bfd_elf_generic_reloc, /* special_function */
1349 "R_ARM_THM_MOVW_BREL", /* name */
1350 FALSE, /* partial_inplace */
1351 0x040f70ff, /* src_mask */
1352 0x040f70ff, /* dst_mask */
1353 FALSE), /* pcrel_offset */
1354
8029a119 1355 EMPTY_HOWTO (90), /* Unallocated. */
c19d1205
ZW		 1356 EMPTY_HOWTO (91),
1357 EMPTY_HOWTO (92),
1358 EMPTY_HOWTO (93),
1359
1360 HOWTO (R_ARM_PLT32_ABS, /* type */
1361 0, /* rightshift */
1362 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 32, /* bitsize */
1364 FALSE, /* pc_relative */
1365 0, /* bitpos */
1366 complain_overflow_dont,/* complain_on_overflow */
1367 bfd_elf_generic_reloc, /* special_function */
1368 "R_ARM_PLT32_ABS", /* name */
1369 FALSE, /* partial_inplace */
1370 0xffffffff, /* src_mask */
1371 0xffffffff, /* dst_mask */
1372 FALSE), /* pcrel_offset */
1373
1374 HOWTO (R_ARM_GOT_ABS, /* type */
1375 0, /* rightshift */
1376 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 32, /* bitsize */
1378 FALSE, /* pc_relative */
1379 0, /* bitpos */
1380 complain_overflow_dont,/* complain_on_overflow */
1381 bfd_elf_generic_reloc, /* special_function */
1382 "R_ARM_GOT_ABS", /* name */
1383 FALSE, /* partial_inplace */
1384 0xffffffff, /* src_mask */
1385 0xffffffff, /* dst_mask */
1386 FALSE), /* pcrel_offset */
1387
1388 HOWTO (R_ARM_GOT_PREL, /* type */
1389 0, /* rightshift */
1390 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 32, /* bitsize */
1392 TRUE, /* pc_relative */
1393 0, /* bitpos */
1394 complain_overflow_dont, /* complain_on_overflow */
1395 bfd_elf_generic_reloc, /* special_function */
1396 "R_ARM_GOT_PREL", /* name */
1397 FALSE, /* partial_inplace */
1398 0xffffffff, /* src_mask */
1399 0xffffffff, /* dst_mask */
1400 TRUE), /* pcrel_offset */
1401
1402 HOWTO (R_ARM_GOT_BREL12, /* type */
1403 0, /* rightshift */
1404 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 12, /* bitsize */
1406 FALSE, /* pc_relative */
1407 0, /* bitpos */
1408 complain_overflow_bitfield,/* complain_on_overflow */
1409 bfd_elf_generic_reloc, /* special_function */
1410 "R_ARM_GOT_BREL12", /* name */
1411 FALSE, /* partial_inplace */
1412 0x00000fff, /* src_mask */
1413 0x00000fff, /* dst_mask */
1414 FALSE), /* pcrel_offset */
1415
1416 HOWTO (R_ARM_GOTOFF12, /* type */
1417 0, /* rightshift */
1418 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 12, /* bitsize */
1420 FALSE, /* pc_relative */
1421 0, /* bitpos */
1422 complain_overflow_bitfield,/* complain_on_overflow */
1423 bfd_elf_generic_reloc, /* special_function */
1424 "R_ARM_GOTOFF12", /* name */
1425 FALSE, /* partial_inplace */
1426 0x00000fff, /* src_mask */
1427 0x00000fff, /* dst_mask */
1428 FALSE), /* pcrel_offset */
1429
1430 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1431
1432 /* GNU extension to record C++ vtable member usage */
1433 HOWTO (R_ARM_GNU_VTENTRY, /* type */
ba93b8ac
DJ		 1434 0, /* rightshift */
1435 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1436 0, /* bitsize */
ba93b8ac
DJ		 1437 FALSE, /* pc_relative */
1438 0, /* bitpos */
c19d1205
ZW		 1439 complain_overflow_dont, /* complain_on_overflow */
1440 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1441 "R_ARM_GNU_VTENTRY", /* name */
1442 FALSE, /* partial_inplace */
1443 0, /* src_mask */
1444 0, /* dst_mask */
1445 FALSE), /* pcrel_offset */
1446
1447 /* GNU extension to record C++ vtable hierarchy */
1448 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1449 0, /* rightshift */
1450 2, /* size (0 = byte, 1 = short, 2 = long) */
1451 0, /* bitsize */
1452 FALSE, /* pc_relative */
1453 0, /* bitpos */
1454 complain_overflow_dont, /* complain_on_overflow */
1455 NULL, /* special_function */
1456 "R_ARM_GNU_VTINHERIT", /* name */
1457 FALSE, /* partial_inplace */
1458 0, /* src_mask */
1459 0, /* dst_mask */
1460 FALSE), /* pcrel_offset */
1461
1462 HOWTO (R_ARM_THM_JUMP11, /* type */
1463 1, /* rightshift */
1464 1, /* size (0 = byte, 1 = short, 2 = long) */
1465 11, /* bitsize */
1466 TRUE, /* pc_relative */
1467 0, /* bitpos */
1468 complain_overflow_signed, /* complain_on_overflow */
1469 bfd_elf_generic_reloc, /* special_function */
1470 "R_ARM_THM_JUMP11", /* name */
1471 FALSE, /* partial_inplace */
1472 0x000007ff, /* src_mask */
1473 0x000007ff, /* dst_mask */
1474 TRUE), /* pcrel_offset */
1475
1476 HOWTO (R_ARM_THM_JUMP8, /* type */
1477 1, /* rightshift */
1478 1, /* size (0 = byte, 1 = short, 2 = long) */
1479 8, /* bitsize */
1480 TRUE, /* pc_relative */
1481 0, /* bitpos */
1482 complain_overflow_signed, /* complain_on_overflow */
1483 bfd_elf_generic_reloc, /* special_function */
1484 "R_ARM_THM_JUMP8", /* name */
1485 FALSE, /* partial_inplace */
1486 0x000000ff, /* src_mask */
1487 0x000000ff, /* dst_mask */
1488 TRUE), /* pcrel_offset */
ba93b8ac 1489
c19d1205
ZW		 1490 /* TLS relocations */
1491 HOWTO (R_ARM_TLS_GD32, /* type */
ba93b8ac
DJ		 1492 0, /* rightshift */
1493 2, /* size (0 = byte, 1 = short, 2 = long) */
1494 32, /* bitsize */
1495 FALSE, /* pc_relative */
1496 0, /* bitpos */
1497 complain_overflow_bitfield,/* complain_on_overflow */
c19d1205
ZW		 1498 NULL, /* special_function */
1499 "R_ARM_TLS_GD32", /* name */
ba93b8ac
DJ		 1500 TRUE, /* partial_inplace */
1501 0xffffffff, /* src_mask */
1502 0xffffffff, /* dst_mask */
c19d1205 1503 FALSE), /* pcrel_offset */
ba93b8ac 1504
ba93b8ac
DJ		 1505 HOWTO (R_ARM_TLS_LDM32, /* type */
1506 0, /* rightshift */
1507 2, /* size (0 = byte, 1 = short, 2 = long) */
1508 32, /* bitsize */
1509 FALSE, /* pc_relative */
1510 0, /* bitpos */
1511 complain_overflow_bitfield,/* complain_on_overflow */
1512 bfd_elf_generic_reloc, /* special_function */
1513 "R_ARM_TLS_LDM32", /* name */
1514 TRUE, /* partial_inplace */
1515 0xffffffff, /* src_mask */
1516 0xffffffff, /* dst_mask */
c19d1205 1517 FALSE), /* pcrel_offset */
ba93b8ac 1518
c19d1205 1519 HOWTO (R_ARM_TLS_LDO32, /* type */
ba93b8ac
DJ		 1520 0, /* rightshift */
1521 2, /* size (0 = byte, 1 = short, 2 = long) */
1522 32, /* bitsize */
1523 FALSE, /* pc_relative */
1524 0, /* bitpos */
1525 complain_overflow_bitfield,/* complain_on_overflow */
1526 bfd_elf_generic_reloc, /* special_function */
c19d1205 1527 "R_ARM_TLS_LDO32", /* name */
ba93b8ac
DJ		 1528 TRUE, /* partial_inplace */
1529 0xffffffff, /* src_mask */
1530 0xffffffff, /* dst_mask */
c19d1205 1531 FALSE), /* pcrel_offset */
ba93b8ac 1532
ba93b8ac
DJ		 1533 HOWTO (R_ARM_TLS_IE32, /* type */
1534 0, /* rightshift */
1535 2, /* size (0 = byte, 1 = short, 2 = long) */
1536 32, /* bitsize */
1537 FALSE, /* pc_relative */
1538 0, /* bitpos */
1539 complain_overflow_bitfield,/* complain_on_overflow */
1540 NULL, /* special_function */
1541 "R_ARM_TLS_IE32", /* name */
1542 TRUE, /* partial_inplace */
1543 0xffffffff, /* src_mask */
1544 0xffffffff, /* dst_mask */
c19d1205 1545 FALSE), /* pcrel_offset */
7f266840 1546
c19d1205 1547 HOWTO (R_ARM_TLS_LE32, /* type */
7f266840
DJ		 1548 0, /* rightshift */
1549 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1550 32, /* bitsize */
7f266840
DJ		 1551 FALSE, /* pc_relative */
1552 0, /* bitpos */
c19d1205
ZW		 1553 complain_overflow_bitfield,/* complain_on_overflow */
1554 bfd_elf_generic_reloc, /* special_function */
1555 "R_ARM_TLS_LE32", /* name */
1556 TRUE, /* partial_inplace */
1557 0xffffffff, /* src_mask */
1558 0xffffffff, /* dst_mask */
1559 FALSE), /* pcrel_offset */
7f266840 1560
c19d1205
ZW		 1561 HOWTO (R_ARM_TLS_LDO12, /* type */
1562 0, /* rightshift */
1563 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 12, /* bitsize */
1565 FALSE, /* pc_relative */
7f266840 1566 0, /* bitpos */
c19d1205 1567 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1568 bfd_elf_generic_reloc, /* special_function */
c19d1205 1569 "R_ARM_TLS_LDO12", /* name */
7f266840 1570 FALSE, /* partial_inplace */
c19d1205
ZW		 1571 0x00000fff, /* src_mask */
1572 0x00000fff, /* dst_mask */
1573 FALSE), /* pcrel_offset */
7f266840 1574
c19d1205
ZW		 1575 HOWTO (R_ARM_TLS_LE12, /* type */
1576 0, /* rightshift */
1577 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 12, /* bitsize */
1579 FALSE, /* pc_relative */
7f266840 1580 0, /* bitpos */
c19d1205 1581 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1582 bfd_elf_generic_reloc, /* special_function */
c19d1205 1583 "R_ARM_TLS_LE12", /* name */
7f266840 1584 FALSE, /* partial_inplace */
c19d1205
ZW		 1585 0x00000fff, /* src_mask */
1586 0x00000fff, /* dst_mask */
1587 FALSE), /* pcrel_offset */
7f266840 1588
c19d1205 1589 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1590 0, /* rightshift */
1591 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1592 12, /* bitsize */
1593 FALSE, /* pc_relative */
7f266840 1594 0, /* bitpos */
c19d1205 1595 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1596 bfd_elf_generic_reloc, /* special_function */
c19d1205 1597 "R_ARM_TLS_IE12GP", /* name */
7f266840 1598 FALSE, /* partial_inplace */
c19d1205
ZW		 1599 0x00000fff, /* src_mask */
1600 0x00000fff, /* dst_mask */
1601 FALSE), /* pcrel_offset */
1602};
1603
1604/* 112-127 private relocations
1605 128 R_ARM_ME_TOO, obsolete
1606 129-255 unallocated in AAELF.
7f266840 1607
c19d1205
ZW		 1608 249-255 extended, currently unused, relocations: */
1609
4962c51a 1610static reloc_howto_type elf32_arm_howto_table_2[4] =
7f266840
DJ		 1611{
1612 HOWTO (R_ARM_RREL32, /* type */
1613 0, /* rightshift */
1614 0, /* size (0 = byte, 1 = short, 2 = long) */
1615 0, /* bitsize */
1616 FALSE, /* pc_relative */
1617 0, /* bitpos */
1618 complain_overflow_dont,/* complain_on_overflow */
1619 bfd_elf_generic_reloc, /* special_function */
1620 "R_ARM_RREL32", /* name */
1621 FALSE, /* partial_inplace */
1622 0, /* src_mask */
1623 0, /* dst_mask */
1624 FALSE), /* pcrel_offset */
1625
1626 HOWTO (R_ARM_RABS32, /* type */
1627 0, /* rightshift */
1628 0, /* size (0 = byte, 1 = short, 2 = long) */
1629 0, /* bitsize */
1630 FALSE, /* pc_relative */
1631 0, /* bitpos */
1632 complain_overflow_dont,/* complain_on_overflow */
1633 bfd_elf_generic_reloc, /* special_function */
1634 "R_ARM_RABS32", /* name */
1635 FALSE, /* partial_inplace */
1636 0, /* src_mask */
1637 0, /* dst_mask */
1638 FALSE), /* pcrel_offset */
1639
1640 HOWTO (R_ARM_RPC24, /* type */
1641 0, /* rightshift */
1642 0, /* size (0 = byte, 1 = short, 2 = long) */
1643 0, /* bitsize */
1644 FALSE, /* pc_relative */
1645 0, /* bitpos */
1646 complain_overflow_dont,/* complain_on_overflow */
1647 bfd_elf_generic_reloc, /* special_function */
1648 "R_ARM_RPC24", /* name */
1649 FALSE, /* partial_inplace */
1650 0, /* src_mask */
1651 0, /* dst_mask */
1652 FALSE), /* pcrel_offset */
1653
1654 HOWTO (R_ARM_RBASE, /* type */
1655 0, /* rightshift */
1656 0, /* size (0 = byte, 1 = short, 2 = long) */
1657 0, /* bitsize */
1658 FALSE, /* pc_relative */
1659 0, /* bitpos */
1660 complain_overflow_dont,/* complain_on_overflow */
1661 bfd_elf_generic_reloc, /* special_function */
1662 "R_ARM_RBASE", /* name */
1663 FALSE, /* partial_inplace */
1664 0, /* src_mask */
1665 0, /* dst_mask */
1666 FALSE) /* pcrel_offset */
1667};
1668
1669static reloc_howto_type *
1670elf32_arm_howto_from_type (unsigned int r_type)
1671{
906e58ca 1672 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
c19d1205 1673 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1674
c19d1205 1675 if (r_type >= R_ARM_RREL32
906e58ca 1676 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_2))
4962c51a 1677 return &elf32_arm_howto_table_2[r_type - R_ARM_RREL32];
7f266840 1678
c19d1205 1679 return NULL;
7f266840
DJ		 1680}
1681
1682static void
1683elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1684 Elf_Internal_Rela * elf_reloc)
1685{
1686 unsigned int r_type;
1687
1688 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1689 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1690}
1691
1692struct elf32_arm_reloc_map
1693 {
1694 bfd_reloc_code_real_type bfd_reloc_val;
1695 unsigned char elf_reloc_val;
1696 };
1697
1698/* All entries in this list must also be present in elf32_arm_howto_table. */
1699static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1700 {
1701 {BFD_RELOC_NONE, R_ARM_NONE},
1702 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1703 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1704 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1705 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1706 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1707 {BFD_RELOC_32, R_ARM_ABS32},
1708 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1709 {BFD_RELOC_8, R_ARM_ABS8},
1710 {BFD_RELOC_16, R_ARM_ABS16},
1711 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1712 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1713 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1714 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1715 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1716 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1717 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1718 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1719 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1720 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1721 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1722 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840 1723 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
b43420e6 1724 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
7f266840
DJ		 1725 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1726 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1727 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1728 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1729 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1730 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1731 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1732 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1733 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1734 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1735 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1736 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1737 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1738 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1739 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1740 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
c19d1205
ZW		 1741 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1742 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1743 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1744 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1745 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1746 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1747 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1748 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1749 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1750 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1751 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1752 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1753 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1754 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1755 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1756 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1757 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1758 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1759 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1760 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1761 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1762 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1763 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1764 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1765 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1766 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1767 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1768 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1769 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1770 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1771 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1772 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1773 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1774 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1775 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1776 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1777 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1778 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1779 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1780 };
1781
1782static reloc_howto_type *
f1c71a59
ZW		 1783elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1784 bfd_reloc_code_real_type code)
7f266840
DJ		 1785{
1786 unsigned int i;
8029a119 1787
906e58ca 1788 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
c19d1205
ZW		 1789 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1790 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1791
c19d1205 1792 return NULL;
7f266840
DJ		 1793}
1794
157090f7
AM		 1795static reloc_howto_type *
1796elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1797 const char *r_name)
1798{
1799 unsigned int i;
1800
906e58ca 1801 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
157090f7
AM		 1802 if (elf32_arm_howto_table_1[i].name != NULL
1803 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1804 return &elf32_arm_howto_table_1[i];
1805
906e58ca 1806 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
157090f7
AM		 1807 if (elf32_arm_howto_table_2[i].name != NULL
1808 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1809 return &elf32_arm_howto_table_2[i];
1810
1811 return NULL;
1812}
1813
906e58ca
NC		 1814/* Support for core dump NOTE sections. */
1815
7f266840 1816static bfd_boolean
f1c71a59 1817elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1818{
1819 int offset;
1820 size_t size;
1821
1822 switch (note->descsz)
1823 {
1824 default:
1825 return FALSE;
1826
8029a119 1827 case 148: /* Linux/ARM 32-bit. */
7f266840
DJ		 1828 /* pr_cursig */
1829 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1830
1831 /* pr_pid */
261b8d08 1832 elf_tdata (abfd)->core_lwpid = bfd_get_32 (abfd, note->descdata + 24);
7f266840
DJ		 1833
1834 /* pr_reg */
1835 offset = 72;
1836 size = 72;
1837
1838 break;
1839 }
1840
1841 /* Make a ".reg/999" section. */
1842 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1843 size, note->descpos + offset);
1844}
1845
1846static bfd_boolean
f1c71a59 1847elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1848{
1849 switch (note->descsz)
1850 {
1851 default:
1852 return FALSE;
1853
8029a119 1854 case 124: /* Linux/ARM elf_prpsinfo. */
7f266840
DJ		 1855 elf_tdata (abfd)->core_program
1856 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1857 elf_tdata (abfd)->core_command
1858 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1859 }
1860
1861 /* Note that for some reason, a spurious space is tacked
1862 onto the end of the args in some (at least one anyway)
1863 implementations, so strip it off if it exists. */
7f266840
DJ		 1864 {
1865 char *command = elf_tdata (abfd)->core_command;
1866 int n = strlen (command);
1867
1868 if (0 < n && command[n - 1] == ' ')
1869 command[n - 1] = '\0';
1870 }
1871
1872 return TRUE;
1873}
1874
1875#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1876#define TARGET_LITTLE_NAME "elf32-littlearm"
1877#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1878#define TARGET_BIG_NAME "elf32-bigarm"
1879
1880#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1881#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1882
252b5132
RH		 1883typedef unsigned long int insn32;
1884typedef unsigned short int insn16;
1885
3a4a14e9
PB		 1886/* In lieu of proper flags, assume all EABIv4 or later objects are
1887 interworkable. */
57e8b36a 1888#define INTERWORK_FLAG(abfd) \
3a4a14e9 1889 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
3e6b1042
DJ		 1890 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
1891 || ((abfd)->flags & BFD_LINKER_CREATED))
9b485d32 1892
252b5132
RH		 1893/* The linker script knows the section names for placement.
1894 The entry_names are used to do simple name mangling on the stubs.
1895 Given a function name, and its type, the stub can be found. The
9b485d32 1896 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 1897#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
1898#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
1899
1900#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
1901#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
1902
c7b8f16e
JB		 1903#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
1904#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
1905
845b51d6
PB		 1906#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
1907#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
1908
7413f23f
DJ		 1909#define STUB_ENTRY_NAME "__%s_veneer"
1910
252b5132
RH		 1911/* The name of the dynamic interpreter. This is put in the .interp
1912 section. */
1913#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
1914
5e681ec4
PB		 1915#ifdef FOUR_WORD_PLT
1916
252b5132
RH		 1917/* The first entry in a procedure linkage table looks like
1918 this. It is set up so that any shared library function that is
59f2c4e7 1919 called before the relocation has been set up calls the dynamic
9b485d32 1920 linker first. */
e5a52504 1921static const bfd_vma elf32_arm_plt0_entry [] =
5e681ec4
PB		 1922 {
1923 0xe52de004, /* str lr, [sp, #-4]! */
1924 0xe59fe010, /* ldr lr, [pc, #16] */
1925 0xe08fe00e, /* add lr, pc, lr */
1926 0xe5bef008, /* ldr pc, [lr, #8]! */
1927 };
1928
1929/* Subsequent entries in a procedure linkage table look like
1930 this. */
e5a52504 1931static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1932 {
1933 0xe28fc600, /* add ip, pc, #NN */
1934 0xe28cca00, /* add ip, ip, #NN */
1935 0xe5bcf000, /* ldr pc, [ip, #NN]! */
1936 0x00000000, /* unused */
1937 };
1938
1939#else
1940
5e681ec4
PB		 1941/* The first entry in a procedure linkage table looks like
1942 this. It is set up so that any shared library function that is
1943 called before the relocation has been set up calls the dynamic
1944 linker first. */
e5a52504 1945static const bfd_vma elf32_arm_plt0_entry [] =
917583ad 1946 {
5e681ec4
PB		 1947 0xe52de004, /* str lr, [sp, #-4]! */
1948 0xe59fe004, /* ldr lr, [pc, #4] */
1949 0xe08fe00e, /* add lr, pc, lr */
1950 0xe5bef008, /* ldr pc, [lr, #8]! */
1951 0x00000000, /* &GOT[0] - . */
917583ad 1952 };
252b5132
RH		 1953
1954/* Subsequent entries in a procedure linkage table look like
1955 this. */
e5a52504 1956static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1957 {
1958 0xe28fc600, /* add ip, pc, #0xNN00000 */
1959 0xe28cca00, /* add ip, ip, #0xNN000 */
1960 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
1961 };
1962
1963#endif
252b5132 1964
00a97672
RS		 1965/* The format of the first entry in the procedure linkage table
1966 for a VxWorks executable. */
1967static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
1968 {
1969 0xe52dc008, /* str ip,[sp,#-8]! */
1970 0xe59fc000, /* ldr ip,[pc] */
1971 0xe59cf008, /* ldr pc,[ip,#8] */
1972 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
1973 };
1974
1975/* The format of subsequent entries in a VxWorks executable. */
1976static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
1977 {
1978 0xe59fc000, /* ldr ip,[pc] */
1979 0xe59cf000, /* ldr pc,[ip] */
1980 0x00000000, /* .long @got */
1981 0xe59fc000, /* ldr ip,[pc] */
1982 0xea000000, /* b _PLT */
1983 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1984 };
1985
1986/* The format of entries in a VxWorks shared library. */
1987static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
1988 {
1989 0xe59fc000, /* ldr ip,[pc] */
1990 0xe79cf009, /* ldr pc,[ip,r9] */
1991 0x00000000, /* .long @got */
1992 0xe59fc000, /* ldr ip,[pc] */
1993 0xe599f008, /* ldr pc,[r9,#8] */
1994 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1995 };
1996
b7693d02
DJ		 1997/* An initial stub used if the PLT entry is referenced from Thumb code. */
1998#define PLT_THUMB_STUB_SIZE 4
1999static const bfd_vma elf32_arm_plt_thumb_stub [] =
2000 {
2001 0x4778, /* bx pc */
2002 0x46c0 /* nop */
2003 };
2004
e5a52504
MM		 2005/* The entries in a PLT when using a DLL-based target with multiple
2006 address spaces. */
906e58ca 2007static const bfd_vma elf32_arm_symbian_plt_entry [] =
e5a52504 2008 {
83a358aa 2009 0xe51ff004, /* ldr pc, [pc, #-4] */
e5a52504
MM		 2010 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2011 };
2012
906e58ca
NC		 2013#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2014#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2015#define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2016#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2017#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2018#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2019
461a49ca
DJ		 2020enum stub_insn_type
2021 {
2022 THUMB16_TYPE = 1,
2023 THUMB32_TYPE,
2024 ARM_TYPE,
2025 DATA_TYPE
2026 };
2027
48229727
JB		 2028#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2029/* A bit of a hack. A Thumb conditional branch, in which the proper condition
2030 is inserted in arm_build_one_stub(). */
2031#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2032#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2033#define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2034#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2035#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2036#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
461a49ca
DJ		 2037
2038typedef struct
2039{
2040 bfd_vma data;
2041 enum stub_insn_type type;
ebe24dd4 2042 unsigned int r_type;
461a49ca
DJ		 2043 int reloc_addend;
2044} insn_sequence;
2045
fea2b4d6
CL		 2046/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2047 to reach the stub if necessary. */
461a49ca 2048static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
906e58ca 2049 {
461a49ca
DJ		 2050 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2051 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2052 };
2053
fea2b4d6
CL		 2054/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2055 available. */
461a49ca 2056static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
906e58ca 2057 {
461a49ca
DJ		 2058 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2059 ARM_INSN(0xe12fff1c), /* bx ip */
2060 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2061 };
2062
d3626fb0 2063/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
461a49ca 2064static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
906e58ca 2065 {
461a49ca
DJ		 2066 THUMB16_INSN(0xb401), /* push {r0} */
2067 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2068 THUMB16_INSN(0x4684), /* mov ip, r0 */
2069 THUMB16_INSN(0xbc01), /* pop {r0} */
2070 THUMB16_INSN(0x4760), /* bx ip */
2071 THUMB16_INSN(0xbf00), /* nop */
2072 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2073 };
2074
d3626fb0
CL		 2075/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2076 allowed. */
2077static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2078 {
2079 THUMB16_INSN(0x4778), /* bx pc */
2080 THUMB16_INSN(0x46c0), /* nop */
2081 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2082 ARM_INSN(0xe12fff1c), /* bx ip */
2083 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2084 };
2085
fea2b4d6
CL		 2086/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2087 available. */
461a49ca 2088static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
906e58ca 2089 {
461a49ca
DJ		 2090 THUMB16_INSN(0x4778), /* bx pc */
2091 THUMB16_INSN(0x46c0), /* nop */
2092 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2093 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2094 };
2095
fea2b4d6
CL		 2096/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2097 one, when the destination is close enough. */
461a49ca 2098static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
c820be07 2099 {
461a49ca
DJ		 2100 THUMB16_INSN(0x4778), /* bx pc */
2101 THUMB16_INSN(0x46c0), /* nop */
2102 ARM_REL_INSN(0xea000000, -8), /* b (X-8) */
c820be07
NC		 2103 };
2104
cf3eccff 2105/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
fea2b4d6 2106 blx to reach the stub if necessary. */
cf3eccff 2107static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
906e58ca 2108 {
9ae92b05 2109 ARM_INSN(0xe59fc000), /* ldr ip, [pc] */
461a49ca
DJ		 2110 ARM_INSN(0xe08ff00c), /* add pc, pc, ip */
2111 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
906e58ca
NC		 2112 };
2113
cf3eccff
DJ		 2114/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2115 blx to reach the stub if necessary. We can not add into pc;
2116 it is not guaranteed to mode switch (different in ARMv6 and
2117 ARMv7). */
2118static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2119 {
9ae92b05 2120 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
cf3eccff
DJ		 2121 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2122 ARM_INSN(0xe12fff1c), /* bx ip */
2123 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2124 };
2125
ebe24dd4
CL		 2126/* V4T ARM -> ARM long branch stub, PIC. */
2127static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2128 {
2129 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2130 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2131 ARM_INSN(0xe12fff1c), /* bx ip */
2132 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2133 };
2134
2135/* V4T Thumb -> ARM long branch stub, PIC. */
2136static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2137 {
2138 THUMB16_INSN(0x4778), /* bx pc */
2139 THUMB16_INSN(0x46c0), /* nop */
2140 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2141 ARM_INSN(0xe08cf00f), /* add pc, ip, pc */
2142 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2143 };
2144
d3626fb0
CL		 2145/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2146 architectures. */
ebe24dd4
CL		 2147static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2148 {
2149 THUMB16_INSN(0xb401), /* push {r0} */
2150 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2151 THUMB16_INSN(0x46fc), /* mov ip, pc */
2152 THUMB16_INSN(0x4484), /* add ip, r0 */
2153 THUMB16_INSN(0xbc01), /* pop {r0} */
2154 THUMB16_INSN(0x4760), /* bx ip */
2155 DATA_WORD(0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2156 };
2157
d3626fb0
CL		 2158/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2159 allowed. */
2160static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2161 {
2162 THUMB16_INSN(0x4778), /* bx pc */
2163 THUMB16_INSN(0x46c0), /* nop */
2164 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2165 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2166 ARM_INSN(0xe12fff1c), /* bx ip */
2167 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2168 };
2169
48229727
JB		 2170/* Cortex-A8 erratum-workaround stubs. */
2171
2172/* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2173 can't use a conditional branch to reach this stub). */
2174
2175static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2176 {
2177 THUMB16_BCOND_INSN(0xd001), /* b<cond>.n true. */
2178 THUMB32_B_INSN(0xf000b800, -4), /* b.w insn_after_original_branch. */
2179 THUMB32_B_INSN(0xf000b800, -4) /* true: b.w original_branch_dest. */
2180 };
2181
2182/* Stub used for b.w and bl.w instructions. */
2183
2184static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2185 {
2186 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2187 };
2188
2189static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2190 {
2191 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2192 };
2193
2194/* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2195 instruction (which switches to ARM mode) to point to this stub. Jump to the
2196 real destination using an ARM-mode branch. */
2197
2198static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2199 {
2200 ARM_REL_INSN(0xea000000, -8) /* b original_branch_dest. */
2201 };
2202
906e58ca
NC		 2203/* Section name for stubs is the associated section name plus this
2204 string. */
2205#define STUB_SUFFIX ".stub"
2206
738a79f6
CL		 2207/* One entry per long/short branch stub defined above. */
2208#define DEF_STUBS \
2209 DEF_STUB(long_branch_any_any) \
2210 DEF_STUB(long_branch_v4t_arm_thumb) \
2211 DEF_STUB(long_branch_thumb_only) \
2212 DEF_STUB(long_branch_v4t_thumb_thumb) \
2213 DEF_STUB(long_branch_v4t_thumb_arm) \
2214 DEF_STUB(short_branch_v4t_thumb_arm) \
2215 DEF_STUB(long_branch_any_arm_pic) \
2216 DEF_STUB(long_branch_any_thumb_pic) \
2217 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2218 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2219 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
48229727
JB		 2220 DEF_STUB(long_branch_thumb_only_pic) \
2221 DEF_STUB(a8_veneer_b_cond) \
2222 DEF_STUB(a8_veneer_b) \
2223 DEF_STUB(a8_veneer_bl) \
2224 DEF_STUB(a8_veneer_blx)
738a79f6
CL		 2225
2226#define DEF_STUB(x) arm_stub_##x,
2227enum elf32_arm_stub_type {
906e58ca 2228 arm_stub_none,
738a79f6 2229 DEF_STUBS
eb7c4339
NS		 2230 /* Note the first a8_veneer type */
2231 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
738a79f6
CL		 2232};
2233#undef DEF_STUB
2234
2235typedef struct
2236{
d3ce72d0 2237 const insn_sequence* template_sequence;
738a79f6
CL		 2238 int template_size;
2239} stub_def;
2240
2241#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2242static const stub_def stub_definitions[] = {
2243 {NULL, 0},
2244 DEF_STUBS
906e58ca
NC		 2245};
2246
2247struct elf32_arm_stub_hash_entry
2248{
2249 /* Base hash table entry structure. */
2250 struct bfd_hash_entry root;
2251
2252 /* The stub section. */
2253 asection *stub_sec;
2254
2255 /* Offset within stub_sec of the beginning of this stub. */
2256 bfd_vma stub_offset;
2257
2258 /* Given the symbol's value and its section we can determine its final
2259 value when building the stubs (so the stub knows where to jump). */
2260 bfd_vma target_value;
2261 asection *target_section;
2262
48229727
JB		 2263 /* Offset to apply to relocation referencing target_value. */
2264 bfd_vma target_addend;
2265
2266 /* The instruction which caused this stub to be generated (only valid for
2267 Cortex-A8 erratum workaround stubs at present). */
2268 unsigned long orig_insn;
2269
461a49ca 2270 /* The stub type. */
906e58ca 2271 enum elf32_arm_stub_type stub_type;
461a49ca
DJ		 2272 /* Its encoding size in bytes. */
2273 int stub_size;
2274 /* Its template. */
2275 const insn_sequence *stub_template;
2276 /* The size of the template (number of entries). */
2277 int stub_template_size;
906e58ca
NC		 2278
2279 /* The symbol table entry, if any, that this was derived from. */
2280 struct elf32_arm_link_hash_entry *h;
2281
2282 /* Destination symbol type (STT_ARM_TFUNC, ...) */
2283 unsigned char st_type;
2284
2285 /* Where this stub is being called from, or, in the case of combined
2286 stub sections, the first input section in the group. */
2287 asection *id_sec;
7413f23f
DJ		 2288
2289 /* The name for the local symbol at the start of this stub. The
2290 stub name in the hash table has to be unique; this does not, so
2291 it can be friendlier. */
2292 char *output_name;
906e58ca
NC		 2293};
2294
e489d0ae
PB		 2295/* Used to build a map of a section. This is required for mixed-endian
2296 code/data. */
2297
2298typedef struct elf32_elf_section_map
2299{
2300 bfd_vma vma;
2301 char type;
2302}
2303elf32_arm_section_map;
2304
c7b8f16e
JB		 2305/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2306
2307typedef enum
2308{
2309 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2310 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2311 VFP11_ERRATUM_ARM_VENEER,
2312 VFP11_ERRATUM_THUMB_VENEER
2313}
2314elf32_vfp11_erratum_type;
2315
2316typedef struct elf32_vfp11_erratum_list
2317{
2318 struct elf32_vfp11_erratum_list *next;
2319 bfd_vma vma;
2320 union
2321 {
2322 struct
2323 {
2324 struct elf32_vfp11_erratum_list *veneer;
2325 unsigned int vfp_insn;
2326 } b;
2327 struct
2328 {
2329 struct elf32_vfp11_erratum_list *branch;
2330 unsigned int id;
2331 } v;
2332 } u;
2333 elf32_vfp11_erratum_type type;
2334}
2335elf32_vfp11_erratum_list;
2336
2468f9c9
PB		 2337typedef enum
2338{
2339 DELETE_EXIDX_ENTRY,
2340 INSERT_EXIDX_CANTUNWIND_AT_END
2341}
2342arm_unwind_edit_type;
2343
2344/* A (sorted) list of edits to apply to an unwind table. */
2345typedef struct arm_unwind_table_edit
2346{
2347 arm_unwind_edit_type type;
2348 /* Note: we sometimes want to insert an unwind entry corresponding to a
2349 section different from the one we're currently writing out, so record the
2350 (text) section this edit relates to here. */
2351 asection *linked_section;
2352 unsigned int index;
2353 struct arm_unwind_table_edit *next;
2354}
2355arm_unwind_table_edit;
2356
8e3de13a 2357typedef struct _arm_elf_section_data
e489d0ae 2358{
2468f9c9 2359 /* Information about mapping symbols. */
e489d0ae 2360 struct bfd_elf_section_data elf;
8e3de13a 2361 unsigned int mapcount;
c7b8f16e 2362 unsigned int mapsize;
e489d0ae 2363 elf32_arm_section_map *map;
2468f9c9 2364 /* Information about CPU errata. */
c7b8f16e
JB		 2365 unsigned int erratumcount;
2366 elf32_vfp11_erratum_list *erratumlist;
2468f9c9
PB		 2367 /* Information about unwind tables. */
2368 union
2369 {
2370 /* Unwind info attached to a text section. */
2371 struct
2372 {
2373 asection *arm_exidx_sec;
2374 } text;
2375
2376 /* Unwind info attached to an .ARM.exidx section. */
2377 struct
2378 {
2379 arm_unwind_table_edit *unwind_edit_list;
2380 arm_unwind_table_edit *unwind_edit_tail;
2381 } exidx;
2382 } u;
8e3de13a
NC		 2383}
2384_arm_elf_section_data;
e489d0ae
PB		 2385
2386#define elf32_arm_section_data(sec) \
8e3de13a 2387 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2388
48229727
JB		 2389/* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2390 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2391 so may be created multiple times: we use an array of these entries whilst
2392 relaxing which we can refresh easily, then create stubs for each potentially
2393 erratum-triggering instruction once we've settled on a solution. */
2394
2395struct a8_erratum_fix {
2396 bfd *input_bfd;
2397 asection *section;
2398 bfd_vma offset;
2399 bfd_vma addend;
2400 unsigned long orig_insn;
2401 char *stub_name;
2402 enum elf32_arm_stub_type stub_type;
fe33d2fa 2403 int st_type;
48229727
JB		 2404};
2405
2406/* A table of relocs applied to branches which might trigger Cortex-A8
2407 erratum. */
2408
2409struct a8_erratum_reloc {
2410 bfd_vma from;
2411 bfd_vma destination;
92750f34
DJ		 2412 struct elf32_arm_link_hash_entry *hash;
2413 const char *sym_name;
48229727
JB		 2414 unsigned int r_type;
2415 unsigned char st_type;
48229727
JB		 2416 bfd_boolean non_a8_stub;
2417};
2418
ba93b8ac
DJ		 2419/* The size of the thread control block. */
2420#define TCB_SIZE 8
2421
0ffa91dd 2422struct elf_arm_obj_tdata
ba93b8ac
DJ		 2423{
2424 struct elf_obj_tdata root;
2425
2426 /* tls_type for each local got entry. */
2427 char *local_got_tls_type;
ee065d83 2428
bf21ed78
MS		 2429 /* Zero to warn when linking objects with incompatible enum sizes. */
2430 int no_enum_size_warning;
a9dc9481
JM		 2431
2432 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2433 int no_wchar_size_warning;
ba93b8ac
DJ		 2434};
2435
0ffa91dd
NC		 2436#define elf_arm_tdata(bfd) \
2437 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2438
0ffa91dd
NC		 2439#define elf32_arm_local_got_tls_type(bfd) \
2440 (elf_arm_tdata (bfd)->local_got_tls_type)
2441
2442#define is_arm_elf(bfd) \
2443 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2444 && elf_tdata (bfd) != NULL \
4dfe6ac6 2445 && elf_object_id (bfd) == ARM_ELF_DATA)
ba93b8ac
DJ		 2446
2447static bfd_boolean
2448elf32_arm_mkobject (bfd *abfd)
2449{
0ffa91dd 2450 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
4dfe6ac6 2451 ARM_ELF_DATA);
ba93b8ac
DJ		 2452}
2453
ba93b8ac
DJ		 2454#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2455
ba96a88f 2456/* Arm ELF linker hash entry. */
252b5132 2457struct elf32_arm_link_hash_entry
917583ad
NC		 2458 {
2459 struct elf_link_hash_entry root;
252b5132 2460
0bdcacaf
RS		 2461 /* Track dynamic relocs copied for this symbol. */
2462 struct elf_dyn_relocs *dyn_relocs;
b7693d02
DJ		 2463
2464 /* We reference count Thumb references to a PLT entry separately,
2465 so that we can emit the Thumb trampoline only if needed. */
2466 bfd_signed_vma plt_thumb_refcount;
2467
bd97cb95
DJ		 2468 /* Some references from Thumb code may be eliminated by BL->BLX
2469 conversion, so record them separately. */
2470 bfd_signed_vma plt_maybe_thumb_refcount;
2471
b7693d02
DJ		 2472 /* Since PLT entries have variable size if the Thumb prologue is
2473 used, we need to record the index into .got.plt instead of
2474 recomputing it from the PLT offset. */
2475 bfd_signed_vma plt_got_offset;
ba93b8ac
DJ		 2476
2477#define GOT_UNKNOWN 0
2478#define GOT_NORMAL 1
2479#define GOT_TLS_GD 2
2480#define GOT_TLS_IE 4
2481 unsigned char tls_type;
a4fd1a8e
PB		 2482
2483 /* The symbol marking the real symbol location for exported thumb
2484 symbols with Arm stubs. */
2485 struct elf_link_hash_entry *export_glue;
906e58ca 2486
da5938a2 2487 /* A pointer to the most recently used stub hash entry against this
8029a119 2488 symbol. */
da5938a2 2489 struct elf32_arm_stub_hash_entry *stub_cache;
917583ad 2490 };
252b5132 2491
252b5132 2492/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2493#define elf32_arm_link_hash_traverse(table, func, info) \
2494 (elf_link_hash_traverse \
2495 (&(table)->root, \
b7693d02 2496 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2497 (info)))
2498
2499/* Get the ARM elf linker hash table from a link_info structure. */
2500#define elf32_arm_hash_table(info) \
4dfe6ac6
NC		 2501 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2502 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
252b5132 2503
906e58ca
NC		 2504#define arm_stub_hash_lookup(table, string, create, copy) \
2505 ((struct elf32_arm_stub_hash_entry *) \
2506 bfd_hash_lookup ((table), (string), (create), (copy)))
2507
21d799b5
NC		 2508/* Array to keep track of which stub sections have been created, and
2509 information on stub grouping. */
2510struct map_stub
2511{
2512 /* This is the section to which stubs in the group will be
2513 attached. */
2514 asection *link_sec;
2515 /* The stub section. */
2516 asection *stub_sec;
2517};
2518
9b485d32 2519/* ARM ELF linker hash table. */
252b5132 2520struct elf32_arm_link_hash_table
906e58ca
NC		 2521{
2522 /* The main hash table. */
2523 struct elf_link_hash_table root;
252b5132 2524
906e58ca
NC		 2525 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2526 bfd_size_type thumb_glue_size;
252b5132 2527
906e58ca
NC		 2528 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2529 bfd_size_type arm_glue_size;
252b5132 2530
906e58ca
NC		 2531 /* The size in bytes of section containing the ARMv4 BX veneers. */
2532 bfd_size_type bx_glue_size;
845b51d6 2533
906e58ca
NC		 2534 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2535 veneer has been populated. */
2536 bfd_vma bx_glue_offset[15];
845b51d6 2537
906e58ca
NC		 2538 /* The size in bytes of the section containing glue for VFP11 erratum
2539 veneers. */
2540 bfd_size_type vfp11_erratum_glue_size;
c7b8f16e 2541
48229727
JB		 2542 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2543 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2544 elf32_arm_write_section(). */
2545 struct a8_erratum_fix *a8_erratum_fixes;
2546 unsigned int num_a8_erratum_fixes;
2547
906e58ca
NC		 2548 /* An arbitrary input BFD chosen to hold the glue sections. */
2549 bfd * bfd_of_glue_owner;
ba96a88f 2550
906e58ca
NC		 2551 /* Nonzero to output a BE8 image. */
2552 int byteswap_code;
e489d0ae 2553
906e58ca
NC		 2554 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2555 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2556 int target1_is_rel;
9c504268 2557
906e58ca
NC		 2558 /* The relocation to use for R_ARM_TARGET2 relocations. */
2559 int target2_reloc;
eb043451 2560
906e58ca
NC		 2561 /* 0 = Ignore R_ARM_V4BX.
2562 1 = Convert BX to MOV PC.
2563 2 = Generate v4 interworing stubs. */
2564 int fix_v4bx;
319850b4 2565
48229727
JB		 2566 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2567 int fix_cortex_a8;
2568
906e58ca
NC		 2569 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2570 int use_blx;
33bfe774 2571
906e58ca
NC		 2572 /* What sort of code sequences we should look for which may trigger the
2573 VFP11 denorm erratum. */
2574 bfd_arm_vfp11_fix vfp11_fix;
c7b8f16e 2575
906e58ca
NC		 2576 /* Global counter for the number of fixes we have emitted. */
2577 int num_vfp11_fixes;
c7b8f16e 2578
906e58ca
NC		 2579 /* Nonzero to force PIC branch veneers. */
2580 int pic_veneer;
27e55c4d 2581
906e58ca
NC		 2582 /* The number of bytes in the initial entry in the PLT. */
2583 bfd_size_type plt_header_size;
e5a52504 2584
906e58ca
NC		 2585 /* The number of bytes in the subsequent PLT etries. */
2586 bfd_size_type plt_entry_size;
e5a52504 2587
906e58ca
NC		 2588 /* True if the target system is VxWorks. */
2589 int vxworks_p;
00a97672 2590
906e58ca
NC		 2591 /* True if the target system is Symbian OS. */
2592 int symbian_p;
e5a52504 2593
906e58ca
NC		 2594 /* True if the target uses REL relocations. */
2595 int use_rel;
4e7fd91e 2596
906e58ca
NC		 2597 /* Short-cuts to get to dynamic linker sections. */
2598 asection *sgot;
2599 asection *sgotplt;
2600 asection *srelgot;
2601 asection *splt;
2602 asection *srelplt;
2603 asection *sdynbss;
2604 asection *srelbss;
5e681ec4 2605
906e58ca
NC		 2606 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2607 asection *srelplt2;
00a97672 2608
906e58ca
NC		 2609 /* Data for R_ARM_TLS_LDM32 relocations. */
2610 union
2611 {
2612 bfd_signed_vma refcount;
2613 bfd_vma offset;
2614 } tls_ldm_got;
b7693d02 2615
87d72d41
AM		 2616 /* Small local sym cache. */
2617 struct sym_cache sym_cache;
906e58ca
NC		 2618
2619 /* For convenience in allocate_dynrelocs. */
2620 bfd * obfd;
2621
2622 /* The stub hash table. */
2623 struct bfd_hash_table stub_hash_table;
2624
2625 /* Linker stub bfd. */
2626 bfd *stub_bfd;
2627
2628 /* Linker call-backs. */
2629 asection * (*add_stub_section) (const char *, asection *);
2630 void (*layout_sections_again) (void);
2631
2632 /* Array to keep track of which stub sections have been created, and
2633 information on stub grouping. */
21d799b5 2634 struct map_stub *stub_group;
906e58ca 2635
fe33d2fa
CL		 2636 /* Number of elements in stub_group. */
2637 int top_id;
2638
906e58ca
NC		 2639 /* Assorted information used by elf32_arm_size_stubs. */
2640 unsigned int bfd_count;
2641 int top_index;
2642 asection **input_list;
2643};
252b5132 2644
780a67af
NC		 2645/* Create an entry in an ARM ELF linker hash table. */
2646
2647static struct bfd_hash_entry *
57e8b36a
NC		 2648elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
2649 struct bfd_hash_table * table,
2650 const char * string)
780a67af
NC		 2651{
2652 struct elf32_arm_link_hash_entry * ret =
2653 (struct elf32_arm_link_hash_entry *) entry;
2654
2655 /* Allocate the structure if it has not already been allocated by a
2656 subclass. */
906e58ca 2657 if (ret == NULL)
21d799b5
NC		 2658 ret = (struct elf32_arm_link_hash_entry *)
2659 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
57e8b36a 2660 if (ret == NULL)
780a67af
NC		 2661 return (struct bfd_hash_entry *) ret;
2662
2663 /* Call the allocation method of the superclass. */
2664 ret = ((struct elf32_arm_link_hash_entry *)
2665 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
2666 table, string));
57e8b36a 2667 if (ret != NULL)
b7693d02 2668 {
0bdcacaf 2669 ret->dyn_relocs = NULL;
ba93b8ac 2670 ret->tls_type = GOT_UNKNOWN;
b7693d02 2671 ret->plt_thumb_refcount = 0;
bd97cb95 2672 ret->plt_maybe_thumb_refcount = 0;
b7693d02 2673 ret->plt_got_offset = -1;
a4fd1a8e 2674 ret->export_glue = NULL;
906e58ca
NC		 2675
2676 ret->stub_cache = NULL;
b7693d02 2677 }
780a67af
NC		 2678
2679 return (struct bfd_hash_entry *) ret;
2680}
2681
906e58ca
NC		 2682/* Initialize an entry in the stub hash table. */
2683
2684static struct bfd_hash_entry *
2685stub_hash_newfunc (struct bfd_hash_entry *entry,
2686 struct bfd_hash_table *table,
2687 const char *string)
2688{
2689 /* Allocate the structure if it has not already been allocated by a
2690 subclass. */
2691 if (entry == NULL)
2692 {
21d799b5
NC		 2693 entry = (struct bfd_hash_entry *)
2694 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
906e58ca
NC		 2695 if (entry == NULL)
2696 return entry;
2697 }
2698
2699 /* Call the allocation method of the superclass. */
2700 entry = bfd_hash_newfunc (entry, table, string);
2701 if (entry != NULL)
2702 {
2703 struct elf32_arm_stub_hash_entry *eh;
2704
2705 /* Initialize the local fields. */
2706 eh = (struct elf32_arm_stub_hash_entry *) entry;
2707 eh->stub_sec = NULL;
2708 eh->stub_offset = 0;
2709 eh->target_value = 0;
2710 eh->target_section = NULL;
cedfb179
DK		 2711 eh->target_addend = 0;
2712 eh->orig_insn = 0;
906e58ca 2713 eh->stub_type = arm_stub_none;
461a49ca
DJ		 2714 eh->stub_size = 0;
2715 eh->stub_template = NULL;
2716 eh->stub_template_size = 0;
906e58ca
NC		 2717 eh->h = NULL;
2718 eh->id_sec = NULL;
d8d2f433 2719 eh->output_name = NULL;
906e58ca
NC		 2720 }
2721
2722 return entry;
2723}
2724
00a97672 2725/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 2726 shortcuts to them in our hash table. */
2727
2728static bfd_boolean
57e8b36a 2729create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2730{
2731 struct elf32_arm_link_hash_table *htab;
2732
e5a52504 2733 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 2734 if (htab == NULL)
2735 return FALSE;
2736
e5a52504
MM		 2737 /* BPABI objects never have a GOT, or associated sections. */
2738 if (htab->symbian_p)
2739 return TRUE;
2740
5e681ec4
PB		 2741 if (! _bfd_elf_create_got_section (dynobj, info))
2742 return FALSE;
2743
5e681ec4
PB		 2744 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
2745 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
2746 if (!htab->sgot || !htab->sgotplt)
2747 abort ();
2748
64e77c6d
L		 2749 htab->srelgot = bfd_get_section_by_name (dynobj,
2750 RELOC_SECTION (htab, ".got"));
2751 if (htab->srelgot == NULL)
5e681ec4
PB		 2752 return FALSE;
2753 return TRUE;
2754}
2755
00a97672
RS		 2756/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
2757 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 2758 hash table. */
2759
2760static bfd_boolean
57e8b36a 2761elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2762{
2763 struct elf32_arm_link_hash_table *htab;
2764
2765 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 2766 if (htab == NULL)
2767 return FALSE;
2768
5e681ec4
PB		 2769 if (!htab->sgot && !create_got_section (dynobj, info))
2770 return FALSE;
2771
2772 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
2773 return FALSE;
2774
2775 htab->splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672
RS		 2776 htab->srelplt = bfd_get_section_by_name (dynobj,
2777 RELOC_SECTION (htab, ".plt"));
5e681ec4
PB		 2778 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
2779 if (!info->shared)
00a97672
RS		 2780 htab->srelbss = bfd_get_section_by_name (dynobj,
2781 RELOC_SECTION (htab, ".bss"));
2782
2783 if (htab->vxworks_p)
2784 {
2785 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
2786 return FALSE;
2787
2788 if (info->shared)
2789 {
2790 htab->plt_header_size = 0;
2791 htab->plt_entry_size
2792 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
2793 }
2794 else
2795 {
2796 htab->plt_header_size
2797 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
2798 htab->plt_entry_size
2799 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
2800 }
2801 }
5e681ec4 2802
906e58ca 2803 if (!htab->splt
e5a52504
MM		 2804 || !htab->srelplt
2805 || !htab->sdynbss
5e681ec4
PB		 2806 || (!info->shared && !htab->srelbss))
2807 abort ();
2808
2809 return TRUE;
2810}
2811
906e58ca
NC		 2812/* Copy the extra info we tack onto an elf_link_hash_entry. */
2813
2814static void
2815elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
2816 struct elf_link_hash_entry *dir,
2817 struct elf_link_hash_entry *ind)
2818{
2819 struct elf32_arm_link_hash_entry *edir, *eind;
2820
2821 edir = (struct elf32_arm_link_hash_entry *) dir;
2822 eind = (struct elf32_arm_link_hash_entry *) ind;
2823
0bdcacaf 2824 if (eind->dyn_relocs != NULL)
906e58ca 2825 {
0bdcacaf 2826 if (edir->dyn_relocs != NULL)
906e58ca 2827 {
0bdcacaf
RS		 2828 struct elf_dyn_relocs **pp;
2829 struct elf_dyn_relocs *p;
906e58ca
NC		 2830
2831 /* Add reloc counts against the indirect sym to the direct sym
2832 list. Merge any entries against the same section. */
0bdcacaf 2833 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
906e58ca 2834 {
0bdcacaf 2835 struct elf_dyn_relocs *q;
906e58ca 2836
0bdcacaf
RS		 2837 for (q = edir->dyn_relocs; q != NULL; q = q->next)
2838 if (q->sec == p->sec)
906e58ca
NC		 2839 {
2840 q->pc_count += p->pc_count;
2841 q->count += p->count;
2842 *pp = p->next;
2843 break;
2844 }
2845 if (q == NULL)
2846 pp = &p->next;
2847 }
0bdcacaf 2848 *pp = edir->dyn_relocs;
906e58ca
NC		 2849 }
2850
0bdcacaf
RS		 2851 edir->dyn_relocs = eind->dyn_relocs;
2852 eind->dyn_relocs = NULL;
906e58ca
NC		 2853 }
2854
2855 if (ind->root.type == bfd_link_hash_indirect)
2856 {
2857 /* Copy over PLT info. */
2858 edir->plt_thumb_refcount += eind->plt_thumb_refcount;
2859 eind->plt_thumb_refcount = 0;
2860 edir->plt_maybe_thumb_refcount += eind->plt_maybe_thumb_refcount;
2861 eind->plt_maybe_thumb_refcount = 0;
2862
2863 if (dir->got.refcount <= 0)
2864 {
2865 edir->tls_type = eind->tls_type;
2866 eind->tls_type = GOT_UNKNOWN;
2867 }
2868 }
2869
2870 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
2871}
2872
2873/* Create an ARM elf linker hash table. */
2874
2875static struct bfd_link_hash_table *
2876elf32_arm_link_hash_table_create (bfd *abfd)
2877{
2878 struct elf32_arm_link_hash_table *ret;
2879 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
2880
21d799b5 2881 ret = (struct elf32_arm_link_hash_table *) bfd_malloc (amt);
906e58ca
NC		 2882 if (ret == NULL)
2883 return NULL;
2884
2885 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
2886 elf32_arm_link_hash_newfunc,
4dfe6ac6
NC		 2887 sizeof (struct elf32_arm_link_hash_entry),
2888 ARM_ELF_DATA))
906e58ca
NC		 2889 {
2890 free (ret);
2891 return NULL;
2892 }
2893
2894 ret->sgot = NULL;
2895 ret->sgotplt = NULL;
2896 ret->srelgot = NULL;
2897 ret->splt = NULL;
2898 ret->srelplt = NULL;
2899 ret->sdynbss = NULL;
2900 ret->srelbss = NULL;
2901 ret->srelplt2 = NULL;
2902 ret->thumb_glue_size = 0;
2903 ret->arm_glue_size = 0;
2904 ret->bx_glue_size = 0;
2905 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
2906 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
2907 ret->vfp11_erratum_glue_size = 0;
2908 ret->num_vfp11_fixes = 0;
48229727 2909 ret->fix_cortex_a8 = 0;
906e58ca
NC		 2910 ret->bfd_of_glue_owner = NULL;
2911 ret->byteswap_code = 0;
2912 ret->target1_is_rel = 0;
2913 ret->target2_reloc = R_ARM_NONE;
2914#ifdef FOUR_WORD_PLT
2915 ret->plt_header_size = 16;
2916 ret->plt_entry_size = 16;
2917#else
2918 ret->plt_header_size = 20;
2919 ret->plt_entry_size = 12;
2920#endif
2921 ret->fix_v4bx = 0;
2922 ret->use_blx = 0;
2923 ret->vxworks_p = 0;
2924 ret->symbian_p = 0;
2925 ret->use_rel = 1;
87d72d41 2926 ret->sym_cache.abfd = NULL;
906e58ca
NC		 2927 ret->obfd = abfd;
2928 ret->tls_ldm_got.refcount = 0;
6cee0a6f
L		 2929 ret->stub_bfd = NULL;
2930 ret->add_stub_section = NULL;
2931 ret->layout_sections_again = NULL;
2932 ret->stub_group = NULL;
fe33d2fa 2933 ret->top_id = 0;
6cee0a6f
L		 2934 ret->bfd_count = 0;
2935 ret->top_index = 0;
2936 ret->input_list = NULL;
906e58ca
NC		 2937
2938 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
2939 sizeof (struct elf32_arm_stub_hash_entry)))
2940 {
2941 free (ret);
2942 return NULL;
2943 }
2944
2945 return &ret->root.root;
2946}
2947
2948/* Free the derived linker hash table. */
2949
2950static void
2951elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
2952{
2953 struct elf32_arm_link_hash_table *ret
2954 = (struct elf32_arm_link_hash_table *) hash;
2955
2956 bfd_hash_table_free (&ret->stub_hash_table);
2957 _bfd_generic_link_hash_table_free (hash);
2958}
2959
2960/* Determine if we're dealing with a Thumb only architecture. */
2961
2962static bfd_boolean
2963using_thumb_only (struct elf32_arm_link_hash_table *globals)
2964{
2965 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2966 Tag_CPU_arch);
2967 int profile;
2968
41ed1ee7
DJ		 2969 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
2970 return TRUE;
2971
9e3c6df6 2972 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
906e58ca
NC		 2973 return FALSE;
2974
2975 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2976 Tag_CPU_arch_profile);
2977
2978 return profile == 'M';
2979}
2980
2981/* Determine if we're dealing with a Thumb-2 object. */
2982
2983static bfd_boolean
2984using_thumb2 (struct elf32_arm_link_hash_table *globals)
2985{
2986 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2987 Tag_CPU_arch);
2988 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
2989}
2990
cd1dac3d
DG		 2991/* Determine what kind of NOPs are available. */
2992
2993static bfd_boolean
2994arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
2995{
2996 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2997 Tag_CPU_arch);
2998 return arch == TAG_CPU_ARCH_V6T2
2999 || arch == TAG_CPU_ARCH_V6K
9e3c6df6
PB		 3000 || arch == TAG_CPU_ARCH_V7
3001 || arch == TAG_CPU_ARCH_V7E_M;
cd1dac3d
DG		 3002}
3003
3004static bfd_boolean
3005arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3006{
3007 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3008 Tag_CPU_arch);
9e3c6df6
PB		 3009 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3010 || arch == TAG_CPU_ARCH_V7E_M);
cd1dac3d
DG		 3011}
3012
f4ac8484
DJ		 3013static bfd_boolean
3014arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3015{
3016 switch (stub_type)
3017 {
fea2b4d6
CL		 3018 case arm_stub_long_branch_thumb_only:
3019 case arm_stub_long_branch_v4t_thumb_arm:
3020 case arm_stub_short_branch_v4t_thumb_arm:
ebe24dd4
CL		 3021 case arm_stub_long_branch_v4t_thumb_arm_pic:
3022 case arm_stub_long_branch_thumb_only_pic:
f4ac8484
DJ		 3023 return TRUE;
3024 case arm_stub_none:
3025 BFD_FAIL ();
3026 return FALSE;
3027 break;
3028 default:
3029 return FALSE;
3030 }
3031}
3032
906e58ca
NC		 3033/* Determine the type of stub needed, if any, for a call. */
3034
3035static enum elf32_arm_stub_type
3036arm_type_of_stub (struct bfd_link_info *info,
3037 asection *input_sec,
3038 const Elf_Internal_Rela *rel,
fe33d2fa 3039 int *actual_st_type,
906e58ca 3040 struct elf32_arm_link_hash_entry *hash,
c820be07
NC		 3041 bfd_vma destination,
3042 asection *sym_sec,
3043 bfd *input_bfd,
3044 const char *name)
906e58ca
NC		 3045{
3046 bfd_vma location;
3047 bfd_signed_vma branch_offset;
3048 unsigned int r_type;
3049 struct elf32_arm_link_hash_table * globals;
3050 int thumb2;
3051 int thumb_only;
3052 enum elf32_arm_stub_type stub_type = arm_stub_none;
5fa9e92f 3053 int use_plt = 0;
fe33d2fa 3054 int st_type = *actual_st_type;
906e58ca 3055
da5938a2 3056 /* We don't know the actual type of destination in case it is of
8029a119 3057 type STT_SECTION: give up. */
da5938a2
NC		 3058 if (st_type == STT_SECTION)
3059 return stub_type;
3060
906e58ca 3061 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3062 if (globals == NULL)
3063 return stub_type;
906e58ca
NC		 3064
3065 thumb_only = using_thumb_only (globals);
3066
3067 thumb2 = using_thumb2 (globals);
3068
3069 /* Determine where the call point is. */
3070 location = (input_sec->output_offset
3071 + input_sec->output_section->vma
3072 + rel->r_offset);
3073
906e58ca
NC		 3074 r_type = ELF32_R_TYPE (rel->r_info);
3075
5fa9e92f 3076 /* Keep a simpler condition, for the sake of clarity. */
fe33d2fa
CL		 3077 if (globals->splt != NULL
3078 && hash != NULL
3079 && hash->root.plt.offset != (bfd_vma) -1)
5fa9e92f
CL		 3080 {
3081 use_plt = 1;
fe33d2fa 3082
5fa9e92f
CL		 3083 /* Note when dealing with PLT entries: the main PLT stub is in
3084 ARM mode, so if the branch is in Thumb mode, another
3085 Thumb->ARM stub will be inserted later just before the ARM
3086 PLT stub. We don't take this extra distance into account
3087 here, because if a long branch stub is needed, we'll add a
3088 Thumb->Arm one and branch directly to the ARM PLT entry
3089 because it avoids spreading offset corrections in several
3090 places. */
fe33d2fa
CL		 3091
3092 destination = (globals->splt->output_section->vma
3093 + globals->splt->output_offset
3094 + hash->root.plt.offset);
3095 st_type = STT_FUNC;
5fa9e92f 3096 }
906e58ca 3097
fe33d2fa
CL		 3098 branch_offset = (bfd_signed_vma)(destination - location);
3099
155d87d7 3100 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca 3101 {
5fa9e92f
CL		 3102 /* Handle cases where:
3103 - this call goes too far (different Thumb/Thumb2 max
3104 distance)
155d87d7
CL		 3105 - it's a Thumb->Arm call and blx is not available, or it's a
3106 Thumb->Arm branch (not bl). A stub is needed in this case,
3107 but only if this call is not through a PLT entry. Indeed,
3108 PLT stubs handle mode switching already.
5fa9e92f 3109 */
906e58ca
NC		 3110 if ((!thumb2
3111 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3112 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3113 || (thumb2
3114 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3115 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
5fa9e92f 3116 || ((st_type != STT_ARM_TFUNC)
155d87d7
CL		 3117 && (((r_type == R_ARM_THM_CALL) && !globals->use_blx)
3118 || (r_type == R_ARM_THM_JUMP24))
5fa9e92f 3119 && !use_plt))
906e58ca
NC		 3120 {
3121 if (st_type == STT_ARM_TFUNC)
3122 {
3123 /* Thumb to thumb. */
3124 if (!thumb_only)
3125 {
3126 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3127 /* PIC stubs. */
155d87d7
CL		 3128 ? ((globals->use_blx
3129 && (r_type ==R_ARM_THM_CALL))
3130 /* V5T and above. Stub starts with ARM code, so
3131 we must be able to switch mode before
3132 reaching it, which is only possible for 'bl'
3133 (ie R_ARM_THM_CALL relocation). */
cf3eccff 3134 ? arm_stub_long_branch_any_thumb_pic
ebe24dd4 3135 /* On V4T, use Thumb code only. */
d3626fb0 3136 : arm_stub_long_branch_v4t_thumb_thumb_pic)
c2b4a39d
CL		 3137
3138 /* non-PIC stubs. */
155d87d7
CL		 3139 : ((globals->use_blx
3140 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3141 /* V5T and above. */
3142 ? arm_stub_long_branch_any_any
3143 /* V4T. */
d3626fb0 3144 : arm_stub_long_branch_v4t_thumb_thumb);
906e58ca
NC		 3145 }
3146 else
3147 {
3148 stub_type = (info->shared | globals->pic_veneer)
ebe24dd4
CL		 3149 /* PIC stub. */
3150 ? arm_stub_long_branch_thumb_only_pic
c2b4a39d
CL		 3151 /* non-PIC stub. */
3152 : arm_stub_long_branch_thumb_only;
906e58ca
NC		 3153 }
3154 }
3155 else
3156 {
3157 /* Thumb to arm. */
c820be07
NC		 3158 if (sym_sec != NULL
3159 && sym_sec->owner != NULL
3160 && !INTERWORK_FLAG (sym_sec->owner))
3161 {
3162 (*_bfd_error_handler)
3163 (_("%B(%s): warning: interworking not enabled.\n"
3164 " first occurrence: %B: Thumb call to ARM"),
3165 sym_sec->owner, input_bfd, name);
3166 }
3167
906e58ca 3168 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3169 /* PIC stubs. */
155d87d7
CL		 3170 ? ((globals->use_blx
3171 && (r_type ==R_ARM_THM_CALL))
c2b4a39d 3172 /* V5T and above. */
cf3eccff 3173 ? arm_stub_long_branch_any_arm_pic
ebe24dd4
CL		 3174 /* V4T PIC stub. */
3175 : arm_stub_long_branch_v4t_thumb_arm_pic)
c2b4a39d
CL		 3176
3177 /* non-PIC stubs. */
155d87d7
CL		 3178 : ((globals->use_blx
3179 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3180 /* V5T and above. */
3181 ? arm_stub_long_branch_any_any
3182 /* V4T. */
3183 : arm_stub_long_branch_v4t_thumb_arm);
c820be07
NC		 3184
3185 /* Handle v4t short branches. */
fea2b4d6 3186 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
c820be07
NC		 3187 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3188 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
fea2b4d6 3189 stub_type = arm_stub_short_branch_v4t_thumb_arm;
906e58ca
NC		 3190 }
3191 }
3192 }
fe33d2fa
CL		 3193 else if (r_type == R_ARM_CALL
3194 || r_type == R_ARM_JUMP24
3195 || r_type == R_ARM_PLT32)
906e58ca
NC		 3196 {
3197 if (st_type == STT_ARM_TFUNC)
3198 {
3199 /* Arm to thumb. */
c820be07
NC		 3200
3201 if (sym_sec != NULL
3202 && sym_sec->owner != NULL
3203 && !INTERWORK_FLAG (sym_sec->owner))
3204 {
3205 (*_bfd_error_handler)
3206 (_("%B(%s): warning: interworking not enabled.\n"
c2b4a39d 3207 " first occurrence: %B: ARM call to Thumb"),
c820be07
NC		 3208 sym_sec->owner, input_bfd, name);
3209 }
3210
3211 /* We have an extra 2-bytes reach because of
3212 the mode change (bit 24 (H) of BLX encoding). */
4116d8d7
PB		 3213 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3214 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3215 || ((r_type == R_ARM_CALL) && !globals->use_blx)
3216 || (r_type == R_ARM_JUMP24)
3217 || (r_type == R_ARM_PLT32))
906e58ca
NC		 3218 {
3219 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3220 /* PIC stubs. */
ebe24dd4
CL		 3221 ? ((globals->use_blx)
3222 /* V5T and above. */
3223 ? arm_stub_long_branch_any_thumb_pic
3224 /* V4T stub. */
3225 : arm_stub_long_branch_v4t_arm_thumb_pic)
3226
c2b4a39d
CL		 3227 /* non-PIC stubs. */
3228 : ((globals->use_blx)
3229 /* V5T and above. */
3230 ? arm_stub_long_branch_any_any
3231 /* V4T. */
3232 : arm_stub_long_branch_v4t_arm_thumb);
906e58ca
NC		 3233 }
3234 }
3235 else
3236 {
3237 /* Arm to arm. */
3238 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3239 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3240 {
3241 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3242 /* PIC stubs. */
cf3eccff 3243 ? arm_stub_long_branch_any_arm_pic
c2b4a39d 3244 /* non-PIC stubs. */
fea2b4d6 3245 : arm_stub_long_branch_any_any;
906e58ca
NC		 3246 }
3247 }
3248 }
3249
fe33d2fa
CL		 3250 /* If a stub is needed, record the actual destination type. */
3251 if (stub_type != arm_stub_none)
9ae92b05 3252 *actual_st_type = st_type;
fe33d2fa 3253
906e58ca
NC		 3254 return stub_type;
3255}
3256
3257/* Build a name for an entry in the stub hash table. */
3258
3259static char *
3260elf32_arm_stub_name (const asection *input_section,
3261 const asection *sym_sec,
3262 const struct elf32_arm_link_hash_entry *hash,
fe33d2fa
CL		 3263 const Elf_Internal_Rela *rel,
3264 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3265{
3266 char *stub_name;
3267 bfd_size_type len;
3268
3269 if (hash)
3270 {
fe33d2fa 3271 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
21d799b5 3272 stub_name = (char *) bfd_malloc (len);
906e58ca 3273 if (stub_name != NULL)
fe33d2fa 3274 sprintf (stub_name, "%08x_%s+%x_%d",
906e58ca
NC		 3275 input_section->id & 0xffffffff,
3276 hash->root.root.root.string,
fe33d2fa
CL		 3277 (int) rel->r_addend & 0xffffffff,
3278 (int) stub_type);
906e58ca
NC		 3279 }
3280 else
3281 {
fe33d2fa 3282 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
21d799b5 3283 stub_name = (char *) bfd_malloc (len);
906e58ca 3284 if (stub_name != NULL)
fe33d2fa 3285 sprintf (stub_name, "%08x_%x:%x+%x_%d",
906e58ca
NC		 3286 input_section->id & 0xffffffff,
3287 sym_sec->id & 0xffffffff,
3288 (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
fe33d2fa
CL		 3289 (int) rel->r_addend & 0xffffffff,
3290 (int) stub_type);
906e58ca
NC		 3291 }
3292
3293 return stub_name;
3294}
3295
3296/* Look up an entry in the stub hash. Stub entries are cached because
3297 creating the stub name takes a bit of time. */
3298
3299static struct elf32_arm_stub_hash_entry *
3300elf32_arm_get_stub_entry (const asection *input_section,
3301 const asection *sym_sec,
3302 struct elf_link_hash_entry *hash,
3303 const Elf_Internal_Rela *rel,
fe33d2fa
CL		 3304 struct elf32_arm_link_hash_table *htab,
3305 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3306{
3307 struct elf32_arm_stub_hash_entry *stub_entry;
3308 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3309 const asection *id_sec;
3310
3311 if ((input_section->flags & SEC_CODE) == 0)
3312 return NULL;
3313
3314 /* If this input section is part of a group of sections sharing one
3315 stub section, then use the id of the first section in the group.
3316 Stub names need to include a section id, as there may well be
3317 more than one stub used to reach say, printf, and we need to
3318 distinguish between them. */
3319 id_sec = htab->stub_group[input_section->id].link_sec;
3320
3321 if (h != NULL && h->stub_cache != NULL
3322 && h->stub_cache->h == h
fe33d2fa
CL		 3323 && h->stub_cache->id_sec == id_sec
3324 && h->stub_cache->stub_type == stub_type)
906e58ca
NC		 3325 {
3326 stub_entry = h->stub_cache;
3327 }
3328 else
3329 {
3330 char *stub_name;
3331
fe33d2fa 3332 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
906e58ca
NC		 3333 if (stub_name == NULL)
3334 return NULL;
3335
3336 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3337 stub_name, FALSE, FALSE);
3338 if (h != NULL)
3339 h->stub_cache = stub_entry;
3340
3341 free (stub_name);
3342 }
3343
3344 return stub_entry;
3345}
3346
48229727
JB		 3347/* Find or create a stub section. Returns a pointer to the stub section, and
3348 the section to which the stub section will be attached (in *LINK_SEC_P).
3349 LINK_SEC_P may be NULL. */
906e58ca 3350
48229727
JB		 3351static asection *
3352elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3353 struct elf32_arm_link_hash_table *htab)
906e58ca
NC		 3354{
3355 asection *link_sec;
3356 asection *stub_sec;
906e58ca
NC		 3357
3358 link_sec = htab->stub_group[section->id].link_sec;
3359 stub_sec = htab->stub_group[section->id].stub_sec;
3360 if (stub_sec == NULL)
3361 {
3362 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3363 if (stub_sec == NULL)
3364 {
3365 size_t namelen;
3366 bfd_size_type len;
3367 char *s_name;
3368
3369 namelen = strlen (link_sec->name);
3370 len = namelen + sizeof (STUB_SUFFIX);
21d799b5 3371 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
906e58ca
NC		 3372 if (s_name == NULL)
3373 return NULL;
3374
3375 memcpy (s_name, link_sec->name, namelen);
3376 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3377 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3378 if (stub_sec == NULL)
3379 return NULL;
3380 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3381 }
3382 htab->stub_group[section->id].stub_sec = stub_sec;
3383 }
48229727
JB		 3384
3385 if (link_sec_p)
3386 *link_sec_p = link_sec;
3387
3388 return stub_sec;
3389}
3390
3391/* Add a new stub entry to the stub hash. Not all fields of the new
3392 stub entry are initialised. */
3393
3394static struct elf32_arm_stub_hash_entry *
3395elf32_arm_add_stub (const char *stub_name,
3396 asection *section,
3397 struct elf32_arm_link_hash_table *htab)
3398{
3399 asection *link_sec;
3400 asection *stub_sec;
3401 struct elf32_arm_stub_hash_entry *stub_entry;
3402
3403 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3404 if (stub_sec == NULL)
3405 return NULL;
906e58ca
NC		 3406
3407 /* Enter this entry into the linker stub hash table. */
3408 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3409 TRUE, FALSE);
3410 if (stub_entry == NULL)
3411 {
3412 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3413 section->owner,
3414 stub_name);
3415 return NULL;
3416 }
3417
3418 stub_entry->stub_sec = stub_sec;
3419 stub_entry->stub_offset = 0;
3420 stub_entry->id_sec = link_sec;
3421
906e58ca
NC		 3422 return stub_entry;
3423}
3424
3425/* Store an Arm insn into an output section not processed by
3426 elf32_arm_write_section. */
3427
3428static void
8029a119
NC		 3429put_arm_insn (struct elf32_arm_link_hash_table * htab,
3430 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3431{
3432 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3433 bfd_putl32 (val, ptr);
3434 else
3435 bfd_putb32 (val, ptr);
3436}
3437
3438/* Store a 16-bit Thumb insn into an output section not processed by
3439 elf32_arm_write_section. */
3440
3441static void
8029a119
NC		 3442put_thumb_insn (struct elf32_arm_link_hash_table * htab,
3443 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3444{
3445 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3446 bfd_putl16 (val, ptr);
3447 else
3448 bfd_putb16 (val, ptr);
3449}
3450
48229727
JB		 3451static bfd_reloc_status_type elf32_arm_final_link_relocate
3452 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
3453 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
3454 const char *, int, struct elf_link_hash_entry *, bfd_boolean *, char **);
3455
4563a860
JB		 3456static unsigned int
3457arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
3458{
3459 switch (stub_type)
3460 {
3461 case arm_stub_a8_veneer_b_cond:
3462 case arm_stub_a8_veneer_b:
3463 case arm_stub_a8_veneer_bl:
3464 return 2;
3465
3466 case arm_stub_long_branch_any_any:
3467 case arm_stub_long_branch_v4t_arm_thumb:
3468 case arm_stub_long_branch_thumb_only:
3469 case arm_stub_long_branch_v4t_thumb_thumb:
3470 case arm_stub_long_branch_v4t_thumb_arm:
3471 case arm_stub_short_branch_v4t_thumb_arm:
3472 case arm_stub_long_branch_any_arm_pic:
3473 case arm_stub_long_branch_any_thumb_pic:
3474 case arm_stub_long_branch_v4t_thumb_thumb_pic:
3475 case arm_stub_long_branch_v4t_arm_thumb_pic:
3476 case arm_stub_long_branch_v4t_thumb_arm_pic:
3477 case arm_stub_long_branch_thumb_only_pic:
3478 case arm_stub_a8_veneer_blx:
3479 return 4;
3480
3481 default:
3482 abort (); /* Should be unreachable. */
3483 }
3484}
3485
906e58ca
NC		 3486static bfd_boolean
3487arm_build_one_stub (struct bfd_hash_entry *gen_entry,
3488 void * in_arg)
3489{
48229727 3490#define MAXRELOCS 2
906e58ca 3491 struct elf32_arm_stub_hash_entry *stub_entry;
4dfe6ac6 3492 struct elf32_arm_link_hash_table *globals;
906e58ca 3493 struct bfd_link_info *info;
906e58ca
NC		 3494 asection *stub_sec;
3495 bfd *stub_bfd;
906e58ca
NC		 3496 bfd_byte *loc;
3497 bfd_vma sym_value;
3498 int template_size;
3499 int size;
d3ce72d0 3500 const insn_sequence *template_sequence;
906e58ca 3501 int i;
48229727
JB		 3502 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
3503 int stub_reloc_offset[MAXRELOCS] = {0, 0};
3504 int nrelocs = 0;
906e58ca
NC		 3505
3506 /* Massage our args to the form they really have. */
3507 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3508 info = (struct bfd_link_info *) in_arg;
3509
3510 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3511 if (globals == NULL)
3512 return FALSE;
906e58ca 3513
906e58ca
NC		 3514 stub_sec = stub_entry->stub_sec;
3515
4dfe6ac6 3516 if ((globals->fix_cortex_a8 < 0)
4563a860
JB		 3517 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
3518 /* We have to do less-strictly-aligned fixes last. */
eb7c4339 3519 return TRUE;
fe33d2fa 3520
906e58ca
NC		 3521 /* Make a note of the offset within the stubs for this entry. */
3522 stub_entry->stub_offset = stub_sec->size;
3523 loc = stub_sec->contents + stub_entry->stub_offset;
3524
3525 stub_bfd = stub_sec->owner;
3526
906e58ca
NC		 3527 /* This is the address of the stub destination. */
3528 sym_value = (stub_entry->target_value
3529 + stub_entry->target_section->output_offset
3530 + stub_entry->target_section->output_section->vma);
3531
d3ce72d0 3532 template_sequence = stub_entry->stub_template;
461a49ca 3533 template_size = stub_entry->stub_template_size;
906e58ca
NC		 3534
3535 size = 0;
461a49ca 3536 for (i = 0; i < template_size; i++)
906e58ca 3537 {
d3ce72d0 3538 switch (template_sequence[i].type)
461a49ca
DJ		 3539 {
3540 case THUMB16_TYPE:
48229727 3541 {
d3ce72d0
NC		 3542 bfd_vma data = (bfd_vma) template_sequence[i].data;
3543 if (template_sequence[i].reloc_addend != 0)
48229727
JB		 3544 {
3545 /* We've borrowed the reloc_addend field to mean we should
3546 insert a condition code into this (Thumb-1 branch)
3547 instruction. See THUMB16_BCOND_INSN. */
3548 BFD_ASSERT ((data & 0xff00) == 0xd000);
3549 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
3550 }
fe33d2fa 3551 bfd_put_16 (stub_bfd, data, loc + size);
48229727
JB		 3552 size += 2;
3553 }
461a49ca 3554 break;
906e58ca 3555
48229727 3556 case THUMB32_TYPE:
fe33d2fa
CL		 3557 bfd_put_16 (stub_bfd,
3558 (template_sequence[i].data >> 16) & 0xffff,
3559 loc + size);
3560 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
3561 loc + size + 2);
d3ce72d0 3562 if (template_sequence[i].r_type != R_ARM_NONE)
48229727
JB		 3563 {
3564 stub_reloc_idx[nrelocs] = i;
3565 stub_reloc_offset[nrelocs++] = size;
3566 }
3567 size += 4;
3568 break;
3569
461a49ca 3570 case ARM_TYPE:
fe33d2fa
CL		 3571 bfd_put_32 (stub_bfd, template_sequence[i].data,
3572 loc + size);
461a49ca
DJ		 3573 /* Handle cases where the target is encoded within the
3574 instruction. */
d3ce72d0 3575 if (template_sequence[i].r_type == R_ARM_JUMP24)
461a49ca 3576 {
48229727
JB		 3577 stub_reloc_idx[nrelocs] = i;
3578 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3579 }
3580 size += 4;
3581 break;
3582
3583 case DATA_TYPE:
d3ce72d0 3584 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
48229727
JB		 3585 stub_reloc_idx[nrelocs] = i;
3586 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3587 size += 4;
3588 break;
3589
3590 default:
3591 BFD_FAIL ();
3592 return FALSE;
3593 }
906e58ca 3594 }
461a49ca 3595
906e58ca
NC		 3596 stub_sec->size += size;
3597
461a49ca
DJ		 3598 /* Stub size has already been computed in arm_size_one_stub. Check
3599 consistency. */
3600 BFD_ASSERT (size == stub_entry->stub_size);
3601
906e58ca
NC		 3602 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
3603 if (stub_entry->st_type == STT_ARM_TFUNC)
3604 sym_value |= 1;
3605
48229727
JB		 3606 /* Assume there is at least one and at most MAXRELOCS entries to relocate
3607 in each stub. */
3608 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
c820be07 3609
48229727 3610 for (i = 0; i < nrelocs; i++)
d3ce72d0
NC		 3611 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
3612 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
3613 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
3614 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
48229727
JB		 3615 {
3616 Elf_Internal_Rela rel;
3617 bfd_boolean unresolved_reloc;
3618 char *error_message;
3619 int sym_flags
d3ce72d0 3620 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22)
48229727
JB		 3621 ? STT_ARM_TFUNC : 0;
3622 bfd_vma points_to = sym_value + stub_entry->target_addend;
3623
3624 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
d3ce72d0
NC		 3625 rel.r_info = ELF32_R_INFO (0,
3626 template_sequence[stub_reloc_idx[i]].r_type);
3627 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
48229727
JB		 3628
3629 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
3630 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
3631 template should refer back to the instruction after the original
3632 branch. */
3633 points_to = sym_value;
3634
33c6a8fc
JB		 3635 /* There may be unintended consequences if this is not true. */
3636 BFD_ASSERT (stub_entry->h == NULL);
3637
48229727
JB		 3638 /* Note: _bfd_final_link_relocate doesn't handle these relocations
3639 properly. We should probably use this function unconditionally,
3640 rather than only for certain relocations listed in the enclosing
3641 conditional, for the sake of consistency. */
3642 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
d3ce72d0 3643 (template_sequence[stub_reloc_idx[i]].r_type),
48229727
JB		 3644 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
3645 points_to, info, stub_entry->target_section, "", sym_flags,
33c6a8fc 3646 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
48229727
JB		 3647 &error_message);
3648 }
3649 else
3650 {
fe33d2fa
CL		 3651 Elf_Internal_Rela rel;
3652 bfd_boolean unresolved_reloc;
3653 char *error_message;
3654 bfd_vma points_to = sym_value + stub_entry->target_addend
3655 + template_sequence[stub_reloc_idx[i]].reloc_addend;
3656
3657 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
3658 rel.r_info = ELF32_R_INFO (0,
3659 template_sequence[stub_reloc_idx[i]].r_type);
3660 rel.r_addend = 0;
3661
3662 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
3663 (template_sequence[stub_reloc_idx[i]].r_type),
3664 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
3665 points_to, info, stub_entry->target_section, "", stub_entry->st_type,
3666 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
3667 &error_message);
48229727 3668 }
906e58ca
NC		 3669
3670 return TRUE;
48229727 3671#undef MAXRELOCS
906e58ca
NC		 3672}
3673
48229727
JB		 3674/* Calculate the template, template size and instruction size for a stub.
3675 Return value is the instruction size. */
906e58ca 3676
48229727
JB		 3677static unsigned int
3678find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
3679 const insn_sequence **stub_template,
3680 int *stub_template_size)
906e58ca 3681{
d3ce72d0 3682 const insn_sequence *template_sequence = NULL;
48229727
JB		 3683 int template_size = 0, i;
3684 unsigned int size;
906e58ca 3685
d3ce72d0 3686 template_sequence = stub_definitions[stub_type].template_sequence;
2a229407
AM		 3687 if (stub_template)
3688 *stub_template = template_sequence;
3689
48229727 3690 template_size = stub_definitions[stub_type].template_size;
2a229407
AM		 3691 if (stub_template_size)
3692 *stub_template_size = template_size;
906e58ca
NC		 3693
3694 size = 0;
461a49ca
DJ		 3695 for (i = 0; i < template_size; i++)
3696 {
d3ce72d0 3697 switch (template_sequence[i].type)
461a49ca
DJ		 3698 {
3699 case THUMB16_TYPE:
3700 size += 2;
3701 break;
3702
3703 case ARM_TYPE:
48229727 3704 case THUMB32_TYPE:
461a49ca
DJ		 3705 case DATA_TYPE:
3706 size += 4;
3707 break;
3708
3709 default:
3710 BFD_FAIL ();
2a229407 3711 return 0;
461a49ca
DJ		 3712 }
3713 }
3714
48229727
JB		 3715 return size;
3716}
3717
3718/* As above, but don't actually build the stub. Just bump offset so
3719 we know stub section sizes. */
3720
3721static bfd_boolean
3722arm_size_one_stub (struct bfd_hash_entry *gen_entry,
c7e2358a 3723 void *in_arg ATTRIBUTE_UNUSED)
48229727
JB		 3724{
3725 struct elf32_arm_stub_hash_entry *stub_entry;
d3ce72d0 3726 const insn_sequence *template_sequence;
48229727
JB		 3727 int template_size, size;
3728
3729 /* Massage our args to the form they really have. */
3730 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
48229727
JB		 3731
3732 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
3733 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
3734
d3ce72d0 3735 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
48229727
JB		 3736 &template_size);
3737
461a49ca 3738 stub_entry->stub_size = size;
d3ce72d0 3739 stub_entry->stub_template = template_sequence;
461a49ca
DJ		 3740 stub_entry->stub_template_size = template_size;
3741
906e58ca
NC		 3742 size = (size + 7) & ~7;
3743 stub_entry->stub_sec->size += size;
461a49ca 3744
906e58ca
NC		 3745 return TRUE;
3746}
3747
3748/* External entry points for sizing and building linker stubs. */
3749
3750/* Set up various things so that we can make a list of input sections
3751 for each output section included in the link. Returns -1 on error,
3752 0 when no stubs will be needed, and 1 on success. */
3753
3754int
3755elf32_arm_setup_section_lists (bfd *output_bfd,
3756 struct bfd_link_info *info)
3757{
3758 bfd *input_bfd;
3759 unsigned int bfd_count;
3760 int top_id, top_index;
3761 asection *section;
3762 asection **input_list, **list;
3763 bfd_size_type amt;
3764 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3765
4dfe6ac6
NC		 3766 if (htab == NULL)
3767 return 0;
906e58ca
NC		 3768 if (! is_elf_hash_table (htab))
3769 return 0;
3770
3771 /* Count the number of input BFDs and find the top input section id. */
3772 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
3773 input_bfd != NULL;
3774 input_bfd = input_bfd->link_next)
3775 {
3776 bfd_count += 1;
3777 for (section = input_bfd->sections;
3778 section != NULL;
3779 section = section->next)
3780 {
3781 if (top_id < section->id)
3782 top_id = section->id;
3783 }
3784 }
3785 htab->bfd_count = bfd_count;
3786
3787 amt = sizeof (struct map_stub) * (top_id + 1);
21d799b5 3788 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
906e58ca
NC		 3789 if (htab->stub_group == NULL)
3790 return -1;
fe33d2fa 3791 htab->top_id = top_id;
906e58ca
NC		 3792
3793 /* We can't use output_bfd->section_count here to find the top output
3794 section index as some sections may have been removed, and
3795 _bfd_strip_section_from_output doesn't renumber the indices. */
3796 for (section = output_bfd->sections, top_index = 0;
3797 section != NULL;
3798 section = section->next)
3799 {
3800 if (top_index < section->index)
3801 top_index = section->index;
3802 }
3803
3804 htab->top_index = top_index;
3805 amt = sizeof (asection *) * (top_index + 1);
21d799b5 3806 input_list = (asection **) bfd_malloc (amt);
906e58ca
NC		 3807 htab->input_list = input_list;
3808 if (input_list == NULL)
3809 return -1;
3810
3811 /* For sections we aren't interested in, mark their entries with a
3812 value we can check later. */
3813 list = input_list + top_index;
3814 do
3815 *list = bfd_abs_section_ptr;
3816 while (list-- != input_list);
3817
3818 for (section = output_bfd->sections;
3819 section != NULL;
3820 section = section->next)
3821 {
3822 if ((section->flags & SEC_CODE) != 0)
3823 input_list[section->index] = NULL;
3824 }
3825
3826 return 1;
3827}
3828
3829/* The linker repeatedly calls this function for each input section,
3830 in the order that input sections are linked into output sections.
3831 Build lists of input sections to determine groupings between which
3832 we may insert linker stubs. */
3833
3834void
3835elf32_arm_next_input_section (struct bfd_link_info *info,
3836 asection *isec)
3837{
3838 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3839
4dfe6ac6
NC		 3840 if (htab == NULL)
3841 return;
3842
906e58ca
NC		 3843 if (isec->output_section->index <= htab->top_index)
3844 {
3845 asection **list = htab->input_list + isec->output_section->index;
3846
a7470592 3847 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
906e58ca
NC		 3848 {
3849 /* Steal the link_sec pointer for our list. */
3850#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
3851 /* This happens to make the list in reverse order,
07d72278 3852 which we reverse later. */
906e58ca
NC		 3853 PREV_SEC (isec) = *list;
3854 *list = isec;
3855 }
3856 }
3857}
3858
3859/* See whether we can group stub sections together. Grouping stub
3860 sections may result in fewer stubs. More importantly, we need to
07d72278 3861 put all .init* and .fini* stubs at the end of the .init or
906e58ca
NC		 3862 .fini output sections respectively, because glibc splits the
3863 _init and _fini functions into multiple parts. Putting a stub in
3864 the middle of a function is not a good idea. */
3865
3866static void
3867group_sections (struct elf32_arm_link_hash_table *htab,
3868 bfd_size_type stub_group_size,
07d72278 3869 bfd_boolean stubs_always_after_branch)
906e58ca 3870{
07d72278 3871 asection **list = htab->input_list;
906e58ca
NC		 3872
3873 do
3874 {
3875 asection *tail = *list;
07d72278 3876 asection *head;
906e58ca
NC		 3877
3878 if (tail == bfd_abs_section_ptr)
3879 continue;
3880
07d72278
DJ		 3881 /* Reverse the list: we must avoid placing stubs at the
3882 beginning of the section because the beginning of the text
3883 section may be required for an interrupt vector in bare metal
3884 code. */
3885#define NEXT_SEC PREV_SEC
e780aef2
CL		 3886 head = NULL;
3887 while (tail != NULL)
3888 {
3889 /* Pop from tail. */
3890 asection *item = tail;
3891 tail = PREV_SEC (item);
3892
3893 /* Push on head. */
3894 NEXT_SEC (item) = head;
3895 head = item;
3896 }
07d72278
DJ		 3897
3898 while (head != NULL)
906e58ca
NC		 3899 {
3900 asection *curr;
07d72278 3901 asection *next;
e780aef2
CL		 3902 bfd_vma stub_group_start = head->output_offset;
3903 bfd_vma end_of_next;
906e58ca 3904
07d72278 3905 curr = head;
e780aef2 3906 while (NEXT_SEC (curr) != NULL)
8cd931b7 3907 {
e780aef2
CL		 3908 next = NEXT_SEC (curr);
3909 end_of_next = next->output_offset + next->size;
3910 if (end_of_next - stub_group_start >= stub_group_size)
3911 /* End of NEXT is too far from start, so stop. */
8cd931b7 3912 break;
e780aef2
CL		 3913 /* Add NEXT to the group. */
3914 curr = next;
8cd931b7 3915 }
906e58ca 3916
07d72278 3917 /* OK, the size from the start to the start of CURR is less
906e58ca 3918 than stub_group_size and thus can be handled by one stub
07d72278 3919 section. (Or the head section is itself larger than
906e58ca
NC		 3920 stub_group_size, in which case we may be toast.)
3921 We should really be keeping track of the total size of
3922 stubs added here, as stubs contribute to the final output
7fb9f789 3923 section size. */
906e58ca
NC		 3924 do
3925 {
07d72278 3926 next = NEXT_SEC (head);
906e58ca 3927 /* Set up this stub group. */
07d72278 3928 htab->stub_group[head->id].link_sec = curr;
906e58ca 3929 }
07d72278 3930 while (head != curr && (head = next) != NULL);
906e58ca
NC		 3931
3932 /* But wait, there's more! Input sections up to stub_group_size
07d72278
DJ		 3933 bytes after the stub section can be handled by it too. */
3934 if (!stubs_always_after_branch)
906e58ca 3935 {
e780aef2
CL		 3936 stub_group_start = curr->output_offset + curr->size;
3937
8cd931b7 3938 while (next != NULL)
906e58ca 3939 {
e780aef2
CL		 3940 end_of_next = next->output_offset + next->size;
3941 if (end_of_next - stub_group_start >= stub_group_size)
3942 /* End of NEXT is too far from stubs, so stop. */
8cd931b7 3943 break;
e780aef2 3944 /* Add NEXT to the stub group. */
07d72278
DJ		 3945 head = next;
3946 next = NEXT_SEC (head);
3947 htab->stub_group[head->id].link_sec = curr;
906e58ca
NC		 3948 }
3949 }
07d72278 3950 head = next;
906e58ca
NC		 3951 }
3952 }
07d72278 3953 while (list++ != htab->input_list + htab->top_index);
906e58ca
NC		 3954
3955 free (htab->input_list);
3956#undef PREV_SEC
07d72278 3957#undef NEXT_SEC
906e58ca
NC		 3958}
3959
48229727
JB		 3960/* Comparison function for sorting/searching relocations relating to Cortex-A8
3961 erratum fix. */
3962
3963static int
3964a8_reloc_compare (const void *a, const void *b)
3965{
21d799b5
NC		 3966 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
3967 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
48229727
JB		 3968
3969 if (ra->from < rb->from)
3970 return -1;
3971 else if (ra->from > rb->from)
3972 return 1;
3973 else
3974 return 0;
3975}
3976
3977static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
3978 const char *, char **);
3979
3980/* Helper function to scan code for sequences which might trigger the Cortex-A8
3981 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
81694485 3982 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
48229727
JB		 3983 otherwise. */
3984
81694485
NC		 3985static bfd_boolean
3986cortex_a8_erratum_scan (bfd *input_bfd,
3987 struct bfd_link_info *info,
48229727
JB		 3988 struct a8_erratum_fix **a8_fixes_p,
3989 unsigned int *num_a8_fixes_p,
3990 unsigned int *a8_fix_table_size_p,
3991 struct a8_erratum_reloc *a8_relocs,
eb7c4339
NS		 3992 unsigned int num_a8_relocs,
3993 unsigned prev_num_a8_fixes,
3994 bfd_boolean *stub_changed_p)
48229727
JB		 3995{
3996 asection *section;
3997 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3998 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
3999 unsigned int num_a8_fixes = *num_a8_fixes_p;
4000 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4001
4dfe6ac6
NC		 4002 if (htab == NULL)
4003 return FALSE;
4004
48229727
JB		 4005 for (section = input_bfd->sections;
4006 section != NULL;
4007 section = section->next)
4008 {
4009 bfd_byte *contents = NULL;
4010 struct _arm_elf_section_data *sec_data;
4011 unsigned int span;
4012 bfd_vma base_vma;
4013
4014 if (elf_section_type (section) != SHT_PROGBITS
4015 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4016 || (section->flags & SEC_EXCLUDE) != 0
4017 || (section->sec_info_type == ELF_INFO_TYPE_JUST_SYMS)
4018 || (section->output_section == bfd_abs_section_ptr))
4019 continue;
4020
4021 base_vma = section->output_section->vma + section->output_offset;
4022
4023 if (elf_section_data (section)->this_hdr.contents != NULL)
4024 contents = elf_section_data (section)->this_hdr.contents;
4025 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
81694485 4026 return TRUE;
48229727
JB		 4027
4028 sec_data = elf32_arm_section_data (section);
4029
4030 for (span = 0; span < sec_data->mapcount; span++)
4031 {
4032 unsigned int span_start = sec_data->map[span].vma;
4033 unsigned int span_end = (span == sec_data->mapcount - 1)
4034 ? section->size : sec_data->map[span + 1].vma;
4035 unsigned int i;
4036 char span_type = sec_data->map[span].type;
4037 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4038
4039 if (span_type != 't')
4040 continue;
4041
4042 /* Span is entirely within a single 4KB region: skip scanning. */
4043 if (((base_vma + span_start) & ~0xfff)
4044 == ((base_vma + span_end) & ~0xfff))
4045 continue;
4046
4047 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4048
4049 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4050 * The branch target is in the same 4KB region as the
4051 first half of the branch.
4052 * The instruction before the branch is a 32-bit
81694485 4053 length non-branch instruction. */
48229727
JB		 4054 for (i = span_start; i < span_end;)
4055 {
4056 unsigned int insn = bfd_getl16 (&contents[i]);
4057 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4058 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4059
4060 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4061 insn_32bit = TRUE;
4062
4063 if (insn_32bit)
4064 {
4065 /* Load the rest of the insn (in manual-friendly order). */
4066 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4067
4068 /* Encoding T4: B<c>.W. */
4069 is_b = (insn & 0xf800d000) == 0xf0009000;
4070 /* Encoding T1: BL<c>.W. */
4071 is_bl = (insn & 0xf800d000) == 0xf000d000;
4072 /* Encoding T2: BLX<c>.W. */
4073 is_blx = (insn & 0xf800d000) == 0xf000c000;
4074 /* Encoding T3: B<c>.W (not permitted in IT block). */
4075 is_bcc = (insn & 0xf800d000) == 0xf0008000
4076 && (insn & 0x07f00000) != 0x03800000;
4077 }
4078
4079 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
fe33d2fa 4080
81694485
NC		 4081 if (((base_vma + i) & 0xfff) == 0xffe
4082 && insn_32bit
4083 && is_32bit_branch
4084 && last_was_32bit
4085 && ! last_was_branch)
48229727 4086 {
8f73510c 4087 bfd_signed_vma offset = 0;
48229727
JB		 4088 bfd_boolean force_target_arm = FALSE;
4089 bfd_boolean force_target_thumb = FALSE;
4090 bfd_vma target;
4091 enum elf32_arm_stub_type stub_type = arm_stub_none;
4092 struct a8_erratum_reloc key, *found;
4093
4094 key.from = base_vma + i;
21d799b5
NC		 4095 found = (struct a8_erratum_reloc *)
4096 bsearch (&key, a8_relocs, num_a8_relocs,
4097 sizeof (struct a8_erratum_reloc),
4098 &a8_reloc_compare);
48229727
JB		 4099
4100 if (found)
4101 {
4102 char *error_message = NULL;
4103 struct elf_link_hash_entry *entry;
92750f34 4104 bfd_boolean use_plt = FALSE;
48229727
JB		 4105
4106 /* We don't care about the error returned from this
4107 function, only if there is glue or not. */
4108 entry = find_thumb_glue (info, found->sym_name,
4109 &error_message);
4110
4111 if (entry)
4112 found->non_a8_stub = TRUE;
4113
92750f34
DJ		 4114 /* Keep a simpler condition, for the sake of clarity. */
4115 if (htab->splt != NULL && found->hash != NULL
4116 && found->hash->root.plt.offset != (bfd_vma) -1)
4117 use_plt = TRUE;
4118
4119 if (found->r_type == R_ARM_THM_CALL)
4120 {
4121 if (found->st_type != STT_ARM_TFUNC || use_plt)
4122 force_target_arm = TRUE;
4123 else
4124 force_target_thumb = TRUE;
4125 }
48229727
JB		 4126 }
4127
4128 /* Check if we have an offending branch instruction. */
4129
4130 if (found && found->non_a8_stub)
4131 /* We've already made a stub for this instruction, e.g.
4132 it's a long branch or a Thumb->ARM stub. Assume that
4133 stub will suffice to work around the A8 erratum (see
4134 setting of always_after_branch above). */
4135 ;
4136 else if (is_bcc)
4137 {
4138 offset = (insn & 0x7ff) << 1;
4139 offset |= (insn & 0x3f0000) >> 4;
4140 offset |= (insn & 0x2000) ? 0x40000 : 0;
4141 offset |= (insn & 0x800) ? 0x80000 : 0;
4142 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4143 if (offset & 0x100000)
81694485 4144 offset |= ~ ((bfd_signed_vma) 0xfffff);
48229727
JB		 4145 stub_type = arm_stub_a8_veneer_b_cond;
4146 }
4147 else if (is_b || is_bl || is_blx)
4148 {
4149 int s = (insn & 0x4000000) != 0;
4150 int j1 = (insn & 0x2000) != 0;
4151 int j2 = (insn & 0x800) != 0;
4152 int i1 = !(j1 ^ s);
4153 int i2 = !(j2 ^ s);
4154
4155 offset = (insn & 0x7ff) << 1;
4156 offset |= (insn & 0x3ff0000) >> 4;
4157 offset |= i2 << 22;
4158 offset |= i1 << 23;
4159 offset |= s << 24;
4160 if (offset & 0x1000000)
81694485 4161 offset |= ~ ((bfd_signed_vma) 0xffffff);
48229727
JB		 4162
4163 if (is_blx)
81694485 4164 offset &= ~ ((bfd_signed_vma) 3);
48229727
JB		 4165
4166 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4167 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4168 }
4169
4170 if (stub_type != arm_stub_none)
4171 {
4172 bfd_vma pc_for_insn = base_vma + i + 4;
4173
4174 /* The original instruction is a BL, but the target is
4175 an ARM instruction. If we were not making a stub,
4176 the BL would have been converted to a BLX. Use the
4177 BLX stub instead in that case. */
4178 if (htab->use_blx && force_target_arm
4179 && stub_type == arm_stub_a8_veneer_bl)
4180 {
4181 stub_type = arm_stub_a8_veneer_blx;
4182 is_blx = TRUE;
4183 is_bl = FALSE;
4184 }
4185 /* Conversely, if the original instruction was
4186 BLX but the target is Thumb mode, use the BL
4187 stub. */
4188 else if (force_target_thumb
4189 && stub_type == arm_stub_a8_veneer_blx)
4190 {
4191 stub_type = arm_stub_a8_veneer_bl;
4192 is_blx = FALSE;
4193 is_bl = TRUE;
4194 }
4195
4196 if (is_blx)
81694485 4197 pc_for_insn &= ~ ((bfd_vma) 3);
48229727
JB		 4198
4199 /* If we found a relocation, use the proper destination,
4200 not the offset in the (unrelocated) instruction.
4201 Note this is always done if we switched the stub type
4202 above. */
4203 if (found)
81694485
NC		 4204 offset =
4205 (bfd_signed_vma) (found->destination - pc_for_insn);
48229727
JB		 4206
4207 target = pc_for_insn + offset;
4208
4209 /* The BLX stub is ARM-mode code. Adjust the offset to
4210 take the different PC value (+8 instead of +4) into
4211 account. */
4212 if (stub_type == arm_stub_a8_veneer_blx)
4213 offset += 4;
4214
4215 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4216 {
eb7c4339 4217 char *stub_name = NULL;
48229727
JB		 4218
4219 if (num_a8_fixes == a8_fix_table_size)
4220 {
4221 a8_fix_table_size *= 2;
21d799b5
NC		 4222 a8_fixes = (struct a8_erratum_fix *)
4223 bfd_realloc (a8_fixes,
4224 sizeof (struct a8_erratum_fix)
4225 * a8_fix_table_size);
48229727
JB		 4226 }
4227
eb7c4339
NS		 4228 if (num_a8_fixes < prev_num_a8_fixes)
4229 {
4230 /* If we're doing a subsequent scan,
4231 check if we've found the same fix as
4232 before, and try and reuse the stub
4233 name. */
4234 stub_name = a8_fixes[num_a8_fixes].stub_name;
4235 if ((a8_fixes[num_a8_fixes].section != section)
4236 || (a8_fixes[num_a8_fixes].offset != i))
4237 {
4238 free (stub_name);
4239 stub_name = NULL;
4240 *stub_changed_p = TRUE;
4241 }
4242 }
4243
4244 if (!stub_name)
4245 {
21d799b5 4246 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
eb7c4339
NS		 4247 if (stub_name != NULL)
4248 sprintf (stub_name, "%x:%x", section->id, i);
4249 }
48229727
JB		 4250
4251 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4252 a8_fixes[num_a8_fixes].section = section;
4253 a8_fixes[num_a8_fixes].offset = i;
4254 a8_fixes[num_a8_fixes].addend = offset;
4255 a8_fixes[num_a8_fixes].orig_insn = insn;
4256 a8_fixes[num_a8_fixes].stub_name = stub_name;
4257 a8_fixes[num_a8_fixes].stub_type = stub_type;
fe33d2fa
CL		 4258 a8_fixes[num_a8_fixes].st_type =
4259 is_blx ? STT_FUNC : STT_ARM_TFUNC;
48229727
JB		 4260
4261 num_a8_fixes++;
4262 }
4263 }
4264 }
4265
4266 i += insn_32bit ? 4 : 2;
4267 last_was_32bit = insn_32bit;
4268 last_was_branch = is_32bit_branch;
4269 }
4270 }
4271
4272 if (elf_section_data (section)->this_hdr.contents == NULL)
4273 free (contents);
4274 }
fe33d2fa 4275
48229727
JB		 4276 *a8_fixes_p = a8_fixes;
4277 *num_a8_fixes_p = num_a8_fixes;
4278 *a8_fix_table_size_p = a8_fix_table_size;
fe33d2fa 4279
81694485 4280 return FALSE;
48229727
JB		 4281}
4282
906e58ca
NC		 4283/* Determine and set the size of the stub section for a final link.
4284
4285 The basic idea here is to examine all the relocations looking for
4286 PC-relative calls to a target that is unreachable with a "bl"
4287 instruction. */
4288
4289bfd_boolean
4290elf32_arm_size_stubs (bfd *output_bfd,
4291 bfd *stub_bfd,
4292 struct bfd_link_info *info,
4293 bfd_signed_vma group_size,
4294 asection * (*add_stub_section) (const char *, asection *),
4295 void (*layout_sections_again) (void))
4296{
4297 bfd_size_type stub_group_size;
07d72278 4298 bfd_boolean stubs_always_after_branch;
906e58ca 4299 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
48229727 4300 struct a8_erratum_fix *a8_fixes = NULL;
eb7c4339 4301 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
48229727
JB		 4302 struct a8_erratum_reloc *a8_relocs = NULL;
4303 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4304
4dfe6ac6
NC		 4305 if (htab == NULL)
4306 return FALSE;
4307
48229727
JB		 4308 if (htab->fix_cortex_a8)
4309 {
21d799b5
NC		 4310 a8_fixes = (struct a8_erratum_fix *)
4311 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
4312 a8_relocs = (struct a8_erratum_reloc *)
4313 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
48229727 4314 }
906e58ca
NC		 4315
4316 /* Propagate mach to stub bfd, because it may not have been
4317 finalized when we created stub_bfd. */
4318 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4319 bfd_get_mach (output_bfd));
4320
4321 /* Stash our params away. */
4322 htab->stub_bfd = stub_bfd;
4323 htab->add_stub_section = add_stub_section;
4324 htab->layout_sections_again = layout_sections_again;
07d72278 4325 stubs_always_after_branch = group_size < 0;
48229727
JB		 4326
4327 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4328 as the first half of a 32-bit branch straddling two 4K pages. This is a
4329 crude way of enforcing that. */
4330 if (htab->fix_cortex_a8)
4331 stubs_always_after_branch = 1;
4332
906e58ca
NC		 4333 if (group_size < 0)
4334 stub_group_size = -group_size;
4335 else
4336 stub_group_size = group_size;
4337
4338 if (stub_group_size == 1)
4339 {
4340 /* Default values. */
4341 /* Thumb branch range is +-4MB has to be used as the default
4342 maximum size (a given section can contain both ARM and Thumb
4343 code, so the worst case has to be taken into account).
4344
4345 This value is 24K less than that, which allows for 2025
4346 12-byte stubs. If we exceed that, then we will fail to link.
4347 The user will have to relink with an explicit group size
4348 option. */
4349 stub_group_size = 4170000;
4350 }
4351
07d72278 4352 group_sections (htab, stub_group_size, stubs_always_after_branch);
906e58ca 4353
3ae046cc
NS		 4354 /* If we're applying the cortex A8 fix, we need to determine the
4355 program header size now, because we cannot change it later --
4356 that could alter section placements. Notice the A8 erratum fix
4357 ends up requiring the section addresses to remain unchanged
4358 modulo the page size. That's something we cannot represent
4359 inside BFD, and we don't want to force the section alignment to
4360 be the page size. */
4361 if (htab->fix_cortex_a8)
4362 (*htab->layout_sections_again) ();
4363
906e58ca
NC		 4364 while (1)
4365 {
4366 bfd *input_bfd;
4367 unsigned int bfd_indx;
4368 asection *stub_sec;
eb7c4339
NS		 4369 bfd_boolean stub_changed = FALSE;
4370 unsigned prev_num_a8_fixes = num_a8_fixes;
906e58ca 4371
48229727 4372 num_a8_fixes = 0;
906e58ca
NC		 4373 for (input_bfd = info->input_bfds, bfd_indx = 0;
4374 input_bfd != NULL;
4375 input_bfd = input_bfd->link_next, bfd_indx++)
4376 {
4377 Elf_Internal_Shdr *symtab_hdr;
4378 asection *section;
4379 Elf_Internal_Sym *local_syms = NULL;
4380
48229727
JB		 4381 num_a8_relocs = 0;
4382
906e58ca
NC		 4383 /* We'll need the symbol table in a second. */
4384 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4385 if (symtab_hdr->sh_info == 0)
4386 continue;
4387
4388 /* Walk over each section attached to the input bfd. */
4389 for (section = input_bfd->sections;
4390 section != NULL;
4391 section = section->next)
4392 {
4393 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
4394
4395 /* If there aren't any relocs, then there's nothing more
4396 to do. */
4397 if ((section->flags & SEC_RELOC) == 0
4398 || section->reloc_count == 0
4399 || (section->flags & SEC_CODE) == 0)
4400 continue;
4401
4402 /* If this section is a link-once section that will be
4403 discarded, then don't create any stubs. */
4404 if (section->output_section == NULL
4405 || section->output_section->owner != output_bfd)
4406 continue;
4407
4408 /* Get the relocs. */
4409 internal_relocs
4410 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
4411 NULL, info->keep_memory);
4412 if (internal_relocs == NULL)
4413 goto error_ret_free_local;
4414
4415 /* Now examine each relocation. */
4416 irela = internal_relocs;
4417 irelaend = irela + section->reloc_count;
4418 for (; irela < irelaend; irela++)
4419 {
4420 unsigned int r_type, r_indx;
4421 enum elf32_arm_stub_type stub_type;
4422 struct elf32_arm_stub_hash_entry *stub_entry;
4423 asection *sym_sec;
4424 bfd_vma sym_value;
4425 bfd_vma destination;
4426 struct elf32_arm_link_hash_entry *hash;
7413f23f 4427 const char *sym_name;
906e58ca
NC		 4428 char *stub_name;
4429 const asection *id_sec;
fe33d2fa 4430 int st_type;
48229727 4431 bfd_boolean created_stub = FALSE;
906e58ca
NC		 4432
4433 r_type = ELF32_R_TYPE (irela->r_info);
4434 r_indx = ELF32_R_SYM (irela->r_info);
4435
4436 if (r_type >= (unsigned int) R_ARM_max)
4437 {
4438 bfd_set_error (bfd_error_bad_value);
4439 error_ret_free_internal:
4440 if (elf_section_data (section)->relocs == NULL)
4441 free (internal_relocs);
4442 goto error_ret_free_local;
4443 }
4444
155d87d7 4445 /* Only look for stubs on branch instructions. */
906e58ca 4446 if ((r_type != (unsigned int) R_ARM_CALL)
155d87d7
CL		 4447 && (r_type != (unsigned int) R_ARM_THM_CALL)
4448 && (r_type != (unsigned int) R_ARM_JUMP24)
48229727
JB		 4449 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
4450 && (r_type != (unsigned int) R_ARM_THM_XPC22)
155d87d7
CL		 4451 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
4452 && (r_type != (unsigned int) R_ARM_PLT32))
906e58ca
NC		 4453 continue;
4454
4455 /* Now determine the call target, its name, value,
4456 section. */
4457 sym_sec = NULL;
4458 sym_value = 0;
4459 destination = 0;
4460 hash = NULL;
7413f23f 4461 sym_name = NULL;
906e58ca
NC		 4462 if (r_indx < symtab_hdr->sh_info)
4463 {
4464 /* It's a local symbol. */
4465 Elf_Internal_Sym *sym;
906e58ca
NC		 4466
4467 if (local_syms == NULL)
4468 {
4469 local_syms
4470 = (Elf_Internal_Sym *) symtab_hdr->contents;
4471 if (local_syms == NULL)
4472 local_syms
4473 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
4474 symtab_hdr->sh_info, 0,
4475 NULL, NULL, NULL);
4476 if (local_syms == NULL)
4477 goto error_ret_free_internal;
4478 }
4479
4480 sym = local_syms + r_indx;
f6d250ce
TS		 4481 if (sym->st_shndx == SHN_UNDEF)
4482 sym_sec = bfd_und_section_ptr;
4483 else if (sym->st_shndx == SHN_ABS)
4484 sym_sec = bfd_abs_section_ptr;
4485 else if (sym->st_shndx == SHN_COMMON)
4486 sym_sec = bfd_com_section_ptr;
4487 else
4488 sym_sec =
4489 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
4490
ffcb4889
NS		 4491 if (!sym_sec)
4492 /* This is an undefined symbol. It can never
4493 be resolved. */
4494 continue;
fe33d2fa 4495
906e58ca
NC		 4496 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
4497 sym_value = sym->st_value;
4498 destination = (sym_value + irela->r_addend
4499 + sym_sec->output_offset
4500 + sym_sec->output_section->vma);
4501 st_type = ELF_ST_TYPE (sym->st_info);
7413f23f
DJ		 4502 sym_name
4503 = bfd_elf_string_from_elf_section (input_bfd,
4504 symtab_hdr->sh_link,
4505 sym->st_name);
906e58ca
NC		 4506 }
4507 else
4508 {
4509 /* It's an external symbol. */
4510 int e_indx;
4511
4512 e_indx = r_indx - symtab_hdr->sh_info;
4513 hash = ((struct elf32_arm_link_hash_entry *)
4514 elf_sym_hashes (input_bfd)[e_indx]);
4515
4516 while (hash->root.root.type == bfd_link_hash_indirect
4517 || hash->root.root.type == bfd_link_hash_warning)
4518 hash = ((struct elf32_arm_link_hash_entry *)
4519 hash->root.root.u.i.link);
4520
4521 if (hash->root.root.type == bfd_link_hash_defined
4522 || hash->root.root.type == bfd_link_hash_defweak)
4523 {
4524 sym_sec = hash->root.root.u.def.section;
4525 sym_value = hash->root.root.u.def.value;
022f8312
CL		 4526
4527 struct elf32_arm_link_hash_table *globals =
4528 elf32_arm_hash_table (info);
4529
4530 /* For a destination in a shared library,
4531 use the PLT stub as target address to
4532 decide whether a branch stub is
4533 needed. */
4dfe6ac6
NC		 4534 if (globals != NULL
4535 && globals->splt != NULL
4536 && hash != NULL
022f8312
CL		 4537 && hash->root.plt.offset != (bfd_vma) -1)
4538 {
4539 sym_sec = globals->splt;
4540 sym_value = hash->root.plt.offset;
4541 if (sym_sec->output_section != NULL)
4542 destination = (sym_value
4543 + sym_sec->output_offset
4544 + sym_sec->output_section->vma);
4545 }
4546 else if (sym_sec->output_section != NULL)
906e58ca
NC		 4547 destination = (sym_value + irela->r_addend
4548 + sym_sec->output_offset
4549 + sym_sec->output_section->vma);
4550 }
69c5861e
CL		 4551 else if ((hash->root.root.type == bfd_link_hash_undefined)
4552 || (hash->root.root.type == bfd_link_hash_undefweak))
4553 {
4554 /* For a shared library, use the PLT stub as
4555 target address to decide whether a long
4556 branch stub is needed.
4557 For absolute code, they cannot be handled. */
4558 struct elf32_arm_link_hash_table *globals =
4559 elf32_arm_hash_table (info);
4560
4dfe6ac6
NC		 4561 if (globals != NULL
4562 && globals->splt != NULL
4563 && hash != NULL
69c5861e
CL		 4564 && hash->root.plt.offset != (bfd_vma) -1)
4565 {
4566 sym_sec = globals->splt;
4567 sym_value = hash->root.plt.offset;
4568 if (sym_sec->output_section != NULL)
4569 destination = (sym_value
4570 + sym_sec->output_offset
4571 + sym_sec->output_section->vma);
4572 }
4573 else
4574 continue;
4575 }
906e58ca
NC		 4576 else
4577 {
4578 bfd_set_error (bfd_error_bad_value);
4579 goto error_ret_free_internal;
4580 }
4581 st_type = ELF_ST_TYPE (hash->root.type);
7413f23f 4582 sym_name = hash->root.root.root.string;
906e58ca
NC		 4583 }
4584
48229727 4585 do
7413f23f 4586 {
48229727
JB		 4587 /* Determine what (if any) linker stub is needed. */
4588 stub_type = arm_type_of_stub (info, section, irela,
fe33d2fa 4589 &st_type, hash,
48229727
JB		 4590 destination, sym_sec,
4591 input_bfd, sym_name);
4592 if (stub_type == arm_stub_none)
4593 break;
4594
4595 /* Support for grouping stub sections. */
4596 id_sec = htab->stub_group[section->id].link_sec;
4597
4598 /* Get the name of this stub. */
4599 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
fe33d2fa 4600 irela, stub_type);
48229727
JB		 4601 if (!stub_name)
4602 goto error_ret_free_internal;
4603
4604 /* We've either created a stub for this reloc already,
4605 or we are about to. */
4606 created_stub = TRUE;
4607
4608 stub_entry = arm_stub_hash_lookup
4609 (&htab->stub_hash_table, stub_name,
4610 FALSE, FALSE);
4611 if (stub_entry != NULL)
4612 {
4613 /* The proper stub has already been created. */
4614 free (stub_name);
eb7c4339 4615 stub_entry->target_value = sym_value;
48229727
JB		 4616 break;
4617 }
7413f23f 4618
48229727
JB		 4619 stub_entry = elf32_arm_add_stub (stub_name, section,
4620 htab);
4621 if (stub_entry == NULL)
4622 {
4623 free (stub_name);
4624 goto error_ret_free_internal;
4625 }
7413f23f 4626
48229727
JB		 4627 stub_entry->target_value = sym_value;
4628 stub_entry->target_section = sym_sec;
4629 stub_entry->stub_type = stub_type;
4630 stub_entry->h = hash;
4631 stub_entry->st_type = st_type;
4632
4633 if (sym_name == NULL)
4634 sym_name = "unnamed";
21d799b5
NC		 4635 stub_entry->output_name = (char *)
4636 bfd_alloc (htab->stub_bfd,
48229727
JB		 4637 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
4638 + strlen (sym_name));
4639 if (stub_entry->output_name == NULL)
4640 {
4641 free (stub_name);
4642 goto error_ret_free_internal;
4643 }
4644
4645 /* For historical reasons, use the existing names for
4646 ARM-to-Thumb and Thumb-to-ARM stubs. */
4647 if ( ((r_type == (unsigned int) R_ARM_THM_CALL)
4648 || (r_type == (unsigned int) R_ARM_THM_JUMP24))
4649 && st_type != STT_ARM_TFUNC)
4650 sprintf (stub_entry->output_name,
4651 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
4652 else if ( ((r_type == (unsigned int) R_ARM_CALL)
4653 || (r_type == (unsigned int) R_ARM_JUMP24))
4654 && st_type == STT_ARM_TFUNC)
4655 sprintf (stub_entry->output_name,
4656 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
4657 else
4658 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
4659 sym_name);
4660
4661 stub_changed = TRUE;
4662 }
4663 while (0);
4664
4665 /* Look for relocations which might trigger Cortex-A8
4666 erratum. */
4667 if (htab->fix_cortex_a8
4668 && (r_type == (unsigned int) R_ARM_THM_JUMP24
4669 || r_type == (unsigned int) R_ARM_THM_JUMP19
4670 || r_type == (unsigned int) R_ARM_THM_CALL
4671 || r_type == (unsigned int) R_ARM_THM_XPC22))
4672 {
4673 bfd_vma from = section->output_section->vma
4674 + section->output_offset
4675 + irela->r_offset;
4676
4677 if ((from & 0xfff) == 0xffe)
4678 {
4679 /* Found a candidate. Note we haven't checked the
4680 destination is within 4K here: if we do so (and
4681 don't create an entry in a8_relocs) we can't tell
4682 that a branch should have been relocated when
4683 scanning later. */
4684 if (num_a8_relocs == a8_reloc_table_size)
4685 {
4686 a8_reloc_table_size *= 2;
21d799b5
NC		 4687 a8_relocs = (struct a8_erratum_reloc *)
4688 bfd_realloc (a8_relocs,
4689 sizeof (struct a8_erratum_reloc)
4690 * a8_reloc_table_size);
48229727
JB		 4691 }
4692
4693 a8_relocs[num_a8_relocs].from = from;
4694 a8_relocs[num_a8_relocs].destination = destination;
4695 a8_relocs[num_a8_relocs].r_type = r_type;
4696 a8_relocs[num_a8_relocs].st_type = st_type;
4697 a8_relocs[num_a8_relocs].sym_name = sym_name;
4698 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
92750f34 4699 a8_relocs[num_a8_relocs].hash = hash;
48229727
JB		 4700
4701 num_a8_relocs++;
4702 }
4703 }
906e58ca
NC		 4704 }
4705
48229727
JB		 4706 /* We're done with the internal relocs, free them. */
4707 if (elf_section_data (section)->relocs == NULL)
4708 free (internal_relocs);
4709 }
4710
4711 if (htab->fix_cortex_a8)
4712 {
4713 /* Sort relocs which might apply to Cortex-A8 erratum. */
eb7c4339
NS		 4714 qsort (a8_relocs, num_a8_relocs,
4715 sizeof (struct a8_erratum_reloc),
48229727
JB		 4716 &a8_reloc_compare);
4717
4718 /* Scan for branches which might trigger Cortex-A8 erratum. */
4719 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
4720 &num_a8_fixes, &a8_fix_table_size,
eb7c4339
NS		 4721 a8_relocs, num_a8_relocs,
4722 prev_num_a8_fixes, &stub_changed)
4723 != 0)
48229727 4724 goto error_ret_free_local;
5e681ec4 4725 }
5e681ec4
PB		 4726 }
4727
eb7c4339 4728 if (prev_num_a8_fixes != num_a8_fixes)
48229727
JB		 4729 stub_changed = TRUE;
4730
906e58ca
NC		 4731 if (!stub_changed)
4732 break;
5e681ec4 4733
906e58ca
NC		 4734 /* OK, we've added some stubs. Find out the new size of the
4735 stub sections. */
4736 for (stub_sec = htab->stub_bfd->sections;
4737 stub_sec != NULL;
4738 stub_sec = stub_sec->next)
3e6b1042
DJ		 4739 {
4740 /* Ignore non-stub sections. */
4741 if (!strstr (stub_sec->name, STUB_SUFFIX))
4742 continue;
4743
4744 stub_sec->size = 0;
4745 }
b34b2d70 4746
906e58ca
NC		 4747 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
4748
48229727
JB		 4749 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
4750 if (htab->fix_cortex_a8)
4751 for (i = 0; i < num_a8_fixes; i++)
4752 {
4753 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
4754 a8_fixes[i].section, htab);
4755
4756 if (stub_sec == NULL)
4757 goto error_ret_free_local;
4758
4759 stub_sec->size
4760 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
4761 NULL);
4762 }
4763
4764
906e58ca
NC		 4765 /* Ask the linker to do its stuff. */
4766 (*htab->layout_sections_again) ();
ba93b8ac
DJ		 4767 }
4768
48229727
JB		 4769 /* Add stubs for Cortex-A8 erratum fixes now. */
4770 if (htab->fix_cortex_a8)
4771 {
4772 for (i = 0; i < num_a8_fixes; i++)
4773 {
4774 struct elf32_arm_stub_hash_entry *stub_entry;
4775 char *stub_name = a8_fixes[i].stub_name;
4776 asection *section = a8_fixes[i].section;
4777 unsigned int section_id = a8_fixes[i].section->id;
4778 asection *link_sec = htab->stub_group[section_id].link_sec;
4779 asection *stub_sec = htab->stub_group[section_id].stub_sec;
d3ce72d0 4780 const insn_sequence *template_sequence;
48229727
JB		 4781 int template_size, size = 0;
4782
4783 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4784 TRUE, FALSE);
4785 if (stub_entry == NULL)
4786 {
4787 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
4788 section->owner,
4789 stub_name);
4790 return FALSE;
4791 }
4792
4793 stub_entry->stub_sec = stub_sec;
4794 stub_entry->stub_offset = 0;
4795 stub_entry->id_sec = link_sec;
4796 stub_entry->stub_type = a8_fixes[i].stub_type;
4797 stub_entry->target_section = a8_fixes[i].section;
4798 stub_entry->target_value = a8_fixes[i].offset;
4799 stub_entry->target_addend = a8_fixes[i].addend;
4800 stub_entry->orig_insn = a8_fixes[i].orig_insn;
fe33d2fa 4801 stub_entry->st_type = a8_fixes[i].st_type;
48229727 4802
d3ce72d0
NC		 4803 size = find_stub_size_and_template (a8_fixes[i].stub_type,
4804 &template_sequence,
48229727
JB		 4805 &template_size);
4806
4807 stub_entry->stub_size = size;
d3ce72d0 4808 stub_entry->stub_template = template_sequence;
48229727
JB		 4809 stub_entry->stub_template_size = template_size;
4810 }
4811
4812 /* Stash the Cortex-A8 erratum fix array for use later in
4813 elf32_arm_write_section(). */
4814 htab->a8_erratum_fixes = a8_fixes;
4815 htab->num_a8_erratum_fixes = num_a8_fixes;
4816 }
4817 else
4818 {
4819 htab->a8_erratum_fixes = NULL;
4820 htab->num_a8_erratum_fixes = 0;
4821 }
906e58ca
NC		 4822 return TRUE;
4823
4824 error_ret_free_local:
4825 return FALSE;
5e681ec4
PB		 4826}
4827
906e58ca
NC		 4828/* Build all the stubs associated with the current output file. The
4829 stubs are kept in a hash table attached to the main linker hash
4830 table. We also set up the .plt entries for statically linked PIC
4831 functions here. This function is called via arm_elf_finish in the
4832 linker. */
252b5132 4833
906e58ca
NC		 4834bfd_boolean
4835elf32_arm_build_stubs (struct bfd_link_info *info)
252b5132 4836{
906e58ca
NC		 4837 asection *stub_sec;
4838 struct bfd_hash_table *table;
4839 struct elf32_arm_link_hash_table *htab;
252b5132 4840
906e58ca 4841 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 4842 if (htab == NULL)
4843 return FALSE;
252b5132 4844
906e58ca
NC		 4845 for (stub_sec = htab->stub_bfd->sections;
4846 stub_sec != NULL;
4847 stub_sec = stub_sec->next)
252b5132 4848 {
906e58ca
NC		 4849 bfd_size_type size;
4850
8029a119 4851 /* Ignore non-stub sections. */
906e58ca
NC		 4852 if (!strstr (stub_sec->name, STUB_SUFFIX))
4853 continue;
4854
4855 /* Allocate memory to hold the linker stubs. */
4856 size = stub_sec->size;
21d799b5 4857 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
906e58ca
NC		 4858 if (stub_sec->contents == NULL && size != 0)
4859 return FALSE;
4860 stub_sec->size = 0;
252b5132
RH		 4861 }
4862
906e58ca
NC		 4863 /* Build the stubs as directed by the stub hash table. */
4864 table = &htab->stub_hash_table;
4865 bfd_hash_traverse (table, arm_build_one_stub, info);
eb7c4339
NS		 4866 if (htab->fix_cortex_a8)
4867 {
4868 /* Place the cortex a8 stubs last. */
4869 htab->fix_cortex_a8 = -1;
4870 bfd_hash_traverse (table, arm_build_one_stub, info);
4871 }
252b5132 4872
906e58ca 4873 return TRUE;
252b5132
RH		 4874}
4875
9b485d32
NC		 4876/* Locate the Thumb encoded calling stub for NAME. */
4877
252b5132 4878static struct elf_link_hash_entry *
57e8b36a
NC		 4879find_thumb_glue (struct bfd_link_info *link_info,
4880 const char *name,
f2a9dd69 4881 char **error_message)
252b5132
RH		 4882{
4883 char *tmp_name;
4884 struct elf_link_hash_entry *hash;
4885 struct elf32_arm_link_hash_table *hash_table;
4886
4887 /* We need a pointer to the armelf specific hash table. */
4888 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 4889 if (hash_table == NULL)
4890 return NULL;
252b5132 4891
21d799b5
NC		 4892 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
4893 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4894
4895 BFD_ASSERT (tmp_name);
4896
4897 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
4898
4899 hash = elf_link_hash_lookup
b34976b6 4900 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4901
b1657152
AM		 4902 if (hash == NULL
4903 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
4904 tmp_name, name) == -1)
4905 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4906
4907 free (tmp_name);
4908
4909 return hash;
4910}
4911
9b485d32
NC		 4912/* Locate the ARM encoded calling stub for NAME. */
4913
252b5132 4914static struct elf_link_hash_entry *
57e8b36a
NC		 4915find_arm_glue (struct bfd_link_info *link_info,
4916 const char *name,
f2a9dd69 4917 char **error_message)
252b5132
RH		 4918{
4919 char *tmp_name;
4920 struct elf_link_hash_entry *myh;
4921 struct elf32_arm_link_hash_table *hash_table;
4922
4923 /* We need a pointer to the elfarm specific hash table. */
4924 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 4925 if (hash_table == NULL)
4926 return NULL;
252b5132 4927
21d799b5
NC		 4928 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
4929 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4930
4931 BFD_ASSERT (tmp_name);
4932
4933 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
4934
4935 myh = elf_link_hash_lookup
b34976b6 4936 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4937
b1657152
AM		 4938 if (myh == NULL
4939 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
4940 tmp_name, name) == -1)
4941 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4942
4943 free (tmp_name);
4944
4945 return myh;
4946}
4947
8f6277f5 4948/* ARM->Thumb glue (static images):
252b5132
RH		 4949
4950 .arm
4951 __func_from_arm:
4952 ldr r12, __func_addr
4953 bx r12
4954 __func_addr:
906e58ca 4955 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 4956
26079076
PB		 4957 (v5t static images)
4958 .arm
4959 __func_from_arm:
4960 ldr pc, __func_addr
4961 __func_addr:
906e58ca 4962 .word func @ behave as if you saw a ARM_32 reloc.
26079076 4963
8f6277f5
PB		 4964 (relocatable images)
4965 .arm
4966 __func_from_arm:
4967 ldr r12, __func_offset
4968 add r12, r12, pc
4969 bx r12
4970 __func_offset:
8029a119 4971 .word func - . */
8f6277f5
PB		 4972
4973#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 4974static const insn32 a2t1_ldr_insn = 0xe59fc000;
4975static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
4976static const insn32 a2t3_func_addr_insn = 0x00000001;
4977
26079076
PB		 4978#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
4979static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
4980static const insn32 a2t2v5_func_addr_insn = 0x00000001;
4981
8f6277f5
PB		 4982#define ARM2THUMB_PIC_GLUE_SIZE 16
4983static const insn32 a2t1p_ldr_insn = 0xe59fc004;
4984static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
4985static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
4986
9b485d32 4987/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132 4988
8029a119
NC		 4989 .thumb .thumb
4990 .align 2 .align 2
4991 __func_from_thumb: __func_from_thumb:
4992 bx pc push {r6, lr}
4993 nop ldr r6, __func_addr
4994 .arm mov lr, pc
4995 b func bx r6
fcef9eb7
NC		 4996 .arm
4997 ;; back_to_thumb
4998 ldmia r13! {r6, lr}
4999 bx lr
8029a119
NC		 5000 __func_addr:
5001 .word func */
252b5132
RH		 5002
5003#define THUMB2ARM_GLUE_SIZE 8
5004static const insn16 t2a1_bx_pc_insn = 0x4778;
5005static const insn16 t2a2_noop_insn = 0x46c0;
5006static const insn32 t2a3_b_insn = 0xea000000;
5007
c7b8f16e
JB		 5008#define VFP11_ERRATUM_VENEER_SIZE 8
5009
845b51d6
PB		 5010#define ARM_BX_VENEER_SIZE 12
5011static const insn32 armbx1_tst_insn = 0xe3100001;
5012static const insn32 armbx2_moveq_insn = 0x01a0f000;
5013static const insn32 armbx3_bx_insn = 0xe12fff10;
5014
7e392df6 5015#ifndef ELFARM_NABI_C_INCLUDED
8029a119
NC		 5016static void
5017arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
252b5132
RH		 5018{
5019 asection * s;
8029a119 5020 bfd_byte * contents;
252b5132 5021
8029a119 5022 if (size == 0)
3e6b1042
DJ		 5023 {
5024 /* Do not include empty glue sections in the output. */
5025 if (abfd != NULL)
5026 {
5027 s = bfd_get_section_by_name (abfd, name);
5028 if (s != NULL)
5029 s->flags |= SEC_EXCLUDE;
5030 }
5031 return;
5032 }
252b5132 5033
8029a119 5034 BFD_ASSERT (abfd != NULL);
252b5132 5035
8029a119
NC		 5036 s = bfd_get_section_by_name (abfd, name);
5037 BFD_ASSERT (s != NULL);
252b5132 5038
21d799b5 5039 contents = (bfd_byte *) bfd_alloc (abfd, size);
252b5132 5040
8029a119
NC		 5041 BFD_ASSERT (s->size == size);
5042 s->contents = contents;
5043}
906e58ca 5044
8029a119
NC		 5045bfd_boolean
5046bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5047{
5048 struct elf32_arm_link_hash_table * globals;
906e58ca 5049
8029a119
NC		 5050 globals = elf32_arm_hash_table (info);
5051 BFD_ASSERT (globals != NULL);
906e58ca 5052
8029a119
NC		 5053 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5054 globals->arm_glue_size,
5055 ARM2THUMB_GLUE_SECTION_NAME);
906e58ca 5056
8029a119
NC		 5057 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5058 globals->thumb_glue_size,
5059 THUMB2ARM_GLUE_SECTION_NAME);
252b5132 5060
8029a119
NC		 5061 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5062 globals->vfp11_erratum_glue_size,
5063 VFP11_ERRATUM_VENEER_SECTION_NAME);
845b51d6 5064
8029a119
NC		 5065 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5066 globals->bx_glue_size,
845b51d6
PB		 5067 ARM_BX_GLUE_SECTION_NAME);
5068
b34976b6 5069 return TRUE;
252b5132
RH		 5070}
5071
a4fd1a8e 5072/* Allocate space and symbols for calling a Thumb function from Arm mode.
906e58ca
NC		 5073 returns the symbol identifying the stub. */
5074
a4fd1a8e 5075static struct elf_link_hash_entry *
57e8b36a
NC		 5076record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5077 struct elf_link_hash_entry * h)
252b5132
RH		 5078{
5079 const char * name = h->root.root.string;
63b0f745 5080 asection * s;
252b5132
RH		 5081 char * tmp_name;
5082 struct elf_link_hash_entry * myh;
14a793b2 5083 struct bfd_link_hash_entry * bh;
252b5132 5084 struct elf32_arm_link_hash_table * globals;
dc810e39 5085 bfd_vma val;
2f475487 5086 bfd_size_type size;
252b5132
RH		 5087
5088 globals = elf32_arm_hash_table (link_info);
252b5132
RH		 5089 BFD_ASSERT (globals != NULL);
5090 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5091
5092 s = bfd_get_section_by_name
5093 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5094
252b5132
RH		 5095 BFD_ASSERT (s != NULL);
5096
21d799b5
NC		 5097 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5098 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5099
5100 BFD_ASSERT (tmp_name);
5101
5102 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5103
5104 myh = elf_link_hash_lookup
b34976b6 5105 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 5106
5107 if (myh != NULL)
5108 {
9b485d32 5109 /* We've already seen this guy. */
252b5132 5110 free (tmp_name);
a4fd1a8e 5111 return myh;
252b5132
RH		 5112 }
5113
57e8b36a
NC		 5114 /* The only trick here is using hash_table->arm_glue_size as the value.
5115 Even though the section isn't allocated yet, this is where we will be
3dccd7b7
DJ		 5116 putting it. The +1 on the value marks that the stub has not been
5117 output yet - not that it is a Thumb function. */
14a793b2 5118 bh = NULL;
dc810e39
AM		 5119 val = globals->arm_glue_size + 1;
5120 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5121 tmp_name, BSF_GLOBAL, s, val,
b34976b6 5122 NULL, TRUE, FALSE, &bh);
252b5132 5123
b7693d02
DJ		 5124 myh = (struct elf_link_hash_entry *) bh;
5125 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5126 myh->forced_local = 1;
5127
252b5132
RH		 5128 free (tmp_name);
5129
27e55c4d
PB		 5130 if (link_info->shared || globals->root.is_relocatable_executable
5131 || globals->pic_veneer)
2f475487 5132 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 5133 else if (globals->use_blx)
5134 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 5135 else
2f475487
AM		 5136 size = ARM2THUMB_STATIC_GLUE_SIZE;
5137
5138 s->size += size;
5139 globals->arm_glue_size += size;
252b5132 5140
a4fd1a8e 5141 return myh;
252b5132
RH		 5142}
5143
845b51d6
PB		 5144/* Allocate space for ARMv4 BX veneers. */
5145
5146static void
5147record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5148{
5149 asection * s;
5150 struct elf32_arm_link_hash_table *globals;
5151 char *tmp_name;
5152 struct elf_link_hash_entry *myh;
5153 struct bfd_link_hash_entry *bh;
5154 bfd_vma val;
5155
5156 /* BX PC does not need a veneer. */
5157 if (reg == 15)
5158 return;
5159
5160 globals = elf32_arm_hash_table (link_info);
845b51d6
PB		 5161 BFD_ASSERT (globals != NULL);
5162 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5163
5164 /* Check if this veneer has already been allocated. */
5165 if (globals->bx_glue_offset[reg])
5166 return;
5167
5168 s = bfd_get_section_by_name
5169 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5170
5171 BFD_ASSERT (s != NULL);
5172
5173 /* Add symbol for veneer. */
21d799b5
NC		 5174 tmp_name = (char *)
5175 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
906e58ca 5176
845b51d6 5177 BFD_ASSERT (tmp_name);
906e58ca 5178
845b51d6 5179 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
906e58ca 5180
845b51d6
PB		 5181 myh = elf_link_hash_lookup
5182 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5183
845b51d6 5184 BFD_ASSERT (myh == NULL);
906e58ca 5185
845b51d6
PB		 5186 bh = NULL;
5187 val = globals->bx_glue_size;
5188 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5189 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5190 NULL, TRUE, FALSE, &bh);
5191
5192 myh = (struct elf_link_hash_entry *) bh;
5193 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5194 myh->forced_local = 1;
5195
5196 s->size += ARM_BX_VENEER_SIZE;
5197 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5198 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5199}
5200
5201
c7b8f16e
JB		 5202/* Add an entry to the code/data map for section SEC. */
5203
5204static void
5205elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5206{
5207 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5208 unsigned int newidx;
906e58ca 5209
c7b8f16e
JB		 5210 if (sec_data->map == NULL)
5211 {
21d799b5
NC		 5212 sec_data->map = (elf32_arm_section_map *)
5213 bfd_malloc (sizeof (elf32_arm_section_map));
c7b8f16e
JB		 5214 sec_data->mapcount = 0;
5215 sec_data->mapsize = 1;
5216 }
906e58ca 5217
c7b8f16e 5218 newidx = sec_data->mapcount++;
906e58ca 5219
c7b8f16e
JB		 5220 if (sec_data->mapcount > sec_data->mapsize)
5221 {
5222 sec_data->mapsize *= 2;
21d799b5
NC		 5223 sec_data->map = (elf32_arm_section_map *)
5224 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5225 * sizeof (elf32_arm_section_map));
515ef31d
NC		 5226 }
5227
5228 if (sec_data->map)
5229 {
5230 sec_data->map[newidx].vma = vma;
5231 sec_data->map[newidx].type = type;
c7b8f16e 5232 }
c7b8f16e
JB		 5233}
5234
5235
5236/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5237 veneers are handled for now. */
5238
5239static bfd_vma
5240record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5241 elf32_vfp11_erratum_list *branch,
5242 bfd *branch_bfd,
5243 asection *branch_sec,
5244 unsigned int offset)
5245{
5246 asection *s;
5247 struct elf32_arm_link_hash_table *hash_table;
5248 char *tmp_name;
5249 struct elf_link_hash_entry *myh;
5250 struct bfd_link_hash_entry *bh;
5251 bfd_vma val;
5252 struct _arm_elf_section_data *sec_data;
c7b8f16e 5253 elf32_vfp11_erratum_list *newerr;
906e58ca 5254
c7b8f16e 5255 hash_table = elf32_arm_hash_table (link_info);
c7b8f16e
JB		 5256 BFD_ASSERT (hash_table != NULL);
5257 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
906e58ca 5258
c7b8f16e
JB		 5259 s = bfd_get_section_by_name
5260 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
906e58ca 5261
c7b8f16e 5262 sec_data = elf32_arm_section_data (s);
906e58ca 5263
c7b8f16e 5264 BFD_ASSERT (s != NULL);
906e58ca 5265
21d799b5
NC		 5266 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
5267 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
906e58ca 5268
c7b8f16e 5269 BFD_ASSERT (tmp_name);
906e58ca 5270
c7b8f16e
JB		 5271 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5272 hash_table->num_vfp11_fixes);
906e58ca 5273
c7b8f16e
JB		 5274 myh = elf_link_hash_lookup
5275 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5276
c7b8f16e 5277 BFD_ASSERT (myh == NULL);
906e58ca 5278
c7b8f16e
JB		 5279 bh = NULL;
5280 val = hash_table->vfp11_erratum_glue_size;
5281 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5282 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5283 NULL, TRUE, FALSE, &bh);
5284
5285 myh = (struct elf_link_hash_entry *) bh;
5286 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5287 myh->forced_local = 1;
5288
5289 /* Link veneer back to calling location. */
c7e2358a 5290 sec_data->erratumcount += 1;
21d799b5
NC		 5291 newerr = (elf32_vfp11_erratum_list *)
5292 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
906e58ca 5293
c7b8f16e
JB		 5294 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5295 newerr->vma = -1;
5296 newerr->u.v.branch = branch;
5297 newerr->u.v.id = hash_table->num_vfp11_fixes;
5298 branch->u.b.veneer = newerr;
5299
5300 newerr->next = sec_data->erratumlist;
5301 sec_data->erratumlist = newerr;
5302
5303 /* A symbol for the return from the veneer. */
5304 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5305 hash_table->num_vfp11_fixes);
5306
5307 myh = elf_link_hash_lookup
5308 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5309
c7b8f16e
JB		 5310 if (myh != NULL)
5311 abort ();
5312
5313 bh = NULL;
5314 val = offset + 4;
5315 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5316 branch_sec, val, NULL, TRUE, FALSE, &bh);
906e58ca 5317
c7b8f16e
JB		 5318 myh = (struct elf_link_hash_entry *) bh;
5319 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5320 myh->forced_local = 1;
5321
5322 free (tmp_name);
906e58ca 5323
c7b8f16e
JB		 5324 /* Generate a mapping symbol for the veneer section, and explicitly add an
5325 entry for that symbol to the code/data map for the section. */
5326 if (hash_table->vfp11_erratum_glue_size == 0)
5327 {
5328 bh = NULL;
5329 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5330 ever requires this erratum fix. */
5331 _bfd_generic_link_add_one_symbol (link_info,
5332 hash_table->bfd_of_glue_owner, "$a",
5333 BSF_LOCAL, s, 0, NULL,
5334 TRUE, FALSE, &bh);
5335
5336 myh = (struct elf_link_hash_entry *) bh;
5337 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5338 myh->forced_local = 1;
906e58ca 5339
c7b8f16e
JB		 5340 /* The elf32_arm_init_maps function only cares about symbols from input
5341 BFDs. We must make a note of this generated mapping symbol
5342 ourselves so that code byteswapping works properly in
5343 elf32_arm_write_section. */
5344 elf32_arm_section_map_add (s, 'a', 0);
5345 }
906e58ca 5346
c7b8f16e
JB		 5347 s->size += VFP11_ERRATUM_VENEER_SIZE;
5348 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5349 hash_table->num_vfp11_fixes++;
906e58ca 5350
c7b8f16e
JB		 5351 /* The offset of the veneer. */
5352 return val;
5353}
5354
8029a119 5355#define ARM_GLUE_SECTION_FLAGS \
3e6b1042
DJ		 5356 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5357 | SEC_READONLY | SEC_LINKER_CREATED)
8029a119
NC		 5358
5359/* Create a fake section for use by the ARM backend of the linker. */
5360
5361static bfd_boolean
5362arm_make_glue_section (bfd * abfd, const char * name)
5363{
5364 asection * sec;
5365
5366 sec = bfd_get_section_by_name (abfd, name);
5367 if (sec != NULL)
5368 /* Already made. */
5369 return TRUE;
5370
5371 sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
5372
5373 if (sec == NULL
5374 || !bfd_set_section_alignment (abfd, sec, 2))
5375 return FALSE;
5376
5377 /* Set the gc mark to prevent the section from being removed by garbage
5378 collection, despite the fact that no relocs refer to this section. */
5379 sec->gc_mark = 1;
5380
5381 return TRUE;
5382}
5383
8afb0e02
NC		 5384/* Add the glue sections to ABFD. This function is called from the
5385 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 5386
b34976b6 5387bfd_boolean
57e8b36a
NC		 5388bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
5389 struct bfd_link_info *info)
252b5132 5390{
8afb0e02
NC		 5391 /* If we are only performing a partial
5392 link do not bother adding the glue. */
1049f94e 5393 if (info->relocatable)
b34976b6 5394 return TRUE;
252b5132 5395
8029a119
NC		 5396 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
5397 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
5398 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
5399 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
8afb0e02
NC		 5400}
5401
5402/* Select a BFD to be used to hold the sections used by the glue code.
5403 This function is called from the linker scripts in ld/emultempl/
8029a119 5404 {armelf/pe}.em. */
8afb0e02 5405
b34976b6 5406bfd_boolean
57e8b36a 5407bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 5408{
5409 struct elf32_arm_link_hash_table *globals;
5410
5411 /* If we are only performing a partial link
5412 do not bother getting a bfd to hold the glue. */
1049f94e 5413 if (info->relocatable)
b34976b6 5414 return TRUE;
8afb0e02 5415
b7693d02
DJ		 5416 /* Make sure we don't attach the glue sections to a dynamic object. */
5417 BFD_ASSERT (!(abfd->flags & DYNAMIC));
5418
8afb0e02 5419 globals = elf32_arm_hash_table (info);
8afb0e02
NC		 5420 BFD_ASSERT (globals != NULL);
5421
5422 if (globals->bfd_of_glue_owner != NULL)
b34976b6 5423 return TRUE;
8afb0e02 5424
252b5132
RH		 5425 /* Save the bfd for later use. */
5426 globals->bfd_of_glue_owner = abfd;
cedb70c5 5427
b34976b6 5428 return TRUE;
252b5132
RH		 5429}
5430
906e58ca
NC		 5431static void
5432check_use_blx (struct elf32_arm_link_hash_table *globals)
39b41c9c 5433{
104d59d1
JM		 5434 if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
5435 Tag_CPU_arch) > 2)
39b41c9c
PB		 5436 globals->use_blx = 1;
5437}
5438
b34976b6 5439bfd_boolean
57e8b36a 5440bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 5441 struct bfd_link_info *link_info)
252b5132
RH		 5442{
5443 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 5444 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 5445 Elf_Internal_Rela *irel, *irelend;
5446 bfd_byte *contents = NULL;
252b5132
RH		 5447
5448 asection *sec;
5449 struct elf32_arm_link_hash_table *globals;
5450
5451 /* If we are only performing a partial link do not bother
5452 to construct any glue. */
1049f94e 5453 if (link_info->relocatable)
b34976b6 5454 return TRUE;
252b5132 5455
39ce1a6a
NC		 5456 /* Here we have a bfd that is to be included on the link. We have a
5457 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132 5458 globals = elf32_arm_hash_table (link_info);
252b5132 5459 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 5460
5461 check_use_blx (globals);
252b5132 5462
d504ffc8 5463 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 5464 {
d003868e
AM		 5465 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
5466 abfd);
e489d0ae
PB		 5467 return FALSE;
5468 }
f21f3fe0 5469
39ce1a6a
NC		 5470 /* PR 5398: If we have not decided to include any loadable sections in
5471 the output then we will not have a glue owner bfd. This is OK, it
5472 just means that there is nothing else for us to do here. */
5473 if (globals->bfd_of_glue_owner == NULL)
5474 return TRUE;
5475
252b5132
RH		 5476 /* Rummage around all the relocs and map the glue vectors. */
5477 sec = abfd->sections;
5478
5479 if (sec == NULL)
b34976b6 5480 return TRUE;
252b5132
RH		 5481
5482 for (; sec != NULL; sec = sec->next)
5483 {
5484 if (sec->reloc_count == 0)
5485 continue;
5486
2f475487
AM		 5487 if ((sec->flags & SEC_EXCLUDE) != 0)
5488 continue;
5489
0ffa91dd 5490 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 5491
9b485d32 5492 /* Load the relocs. */
6cdc0ccc 5493 internal_relocs
906e58ca 5494 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
252b5132 5495
6cdc0ccc
AM		 5496 if (internal_relocs == NULL)
5497 goto error_return;
252b5132 5498
6cdc0ccc
AM		 5499 irelend = internal_relocs + sec->reloc_count;
5500 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 5501 {
5502 long r_type;
5503 unsigned long r_index;
252b5132
RH		 5504
5505 struct elf_link_hash_entry *h;
5506
5507 r_type = ELF32_R_TYPE (irel->r_info);
5508 r_index = ELF32_R_SYM (irel->r_info);
5509
9b485d32 5510 /* These are the only relocation types we care about. */
ba96a88f 5511 if ( r_type != R_ARM_PC24
845b51d6 5512 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 5513 continue;
5514
5515 /* Get the section contents if we haven't done so already. */
5516 if (contents == NULL)
5517 {
5518 /* Get cached copy if it exists. */
5519 if (elf_section_data (sec)->this_hdr.contents != NULL)
5520 contents = elf_section_data (sec)->this_hdr.contents;
5521 else
5522 {
5523 /* Go get them off disk. */
57e8b36a 5524 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 5525 goto error_return;
5526 }
5527 }
5528
845b51d6
PB		 5529 if (r_type == R_ARM_V4BX)
5530 {
5531 int reg;
5532
5533 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
5534 record_arm_bx_glue (link_info, reg);
5535 continue;
5536 }
5537
a7c10850 5538 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 5539 h = NULL;
5540
9b485d32 5541 /* We don't care about local symbols. */
252b5132
RH		 5542 if (r_index < symtab_hdr->sh_info)
5543 continue;
5544
9b485d32 5545 /* This is an external symbol. */
252b5132
RH		 5546 r_index -= symtab_hdr->sh_info;
5547 h = (struct elf_link_hash_entry *)
5548 elf_sym_hashes (abfd)[r_index];
5549
5550 /* If the relocation is against a static symbol it must be within
5551 the current section and so cannot be a cross ARM/Thumb relocation. */
5552 if (h == NULL)
5553 continue;
5554
d504ffc8
DJ		 5555 /* If the call will go through a PLT entry then we do not need
5556 glue. */
5557 if (globals->splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 5558 continue;
5559
252b5132
RH		 5560 switch (r_type)
5561 {
5562 case R_ARM_PC24:
5563 /* This one is a call from arm code. We need to look up
2f0ca46a 5564 the target of the call. If it is a thumb target, we
252b5132 5565 insert glue. */
ebe24dd4 5566 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
252b5132
RH		 5567 record_arm_to_thumb_glue (link_info, h);
5568 break;
5569
252b5132 5570 default:
c6596c5e 5571 abort ();
252b5132
RH		 5572 }
5573 }
6cdc0ccc
AM		 5574
5575 if (contents != NULL
5576 && elf_section_data (sec)->this_hdr.contents != contents)
5577 free (contents);
5578 contents = NULL;
5579
5580 if (internal_relocs != NULL
5581 && elf_section_data (sec)->relocs != internal_relocs)
5582 free (internal_relocs);
5583 internal_relocs = NULL;
252b5132
RH		 5584 }
5585
b34976b6 5586 return TRUE;
9a5aca8c 5587
252b5132 5588error_return:
6cdc0ccc
AM		 5589 if (contents != NULL
5590 && elf_section_data (sec)->this_hdr.contents != contents)
5591 free (contents);
5592 if (internal_relocs != NULL
5593 && elf_section_data (sec)->relocs != internal_relocs)
5594 free (internal_relocs);
9a5aca8c 5595
b34976b6 5596 return FALSE;
252b5132 5597}
7e392df6 5598#endif
252b5132 5599
eb043451 5600
c7b8f16e
JB		 5601/* Initialise maps of ARM/Thumb/data for input BFDs. */
5602
5603void
5604bfd_elf32_arm_init_maps (bfd *abfd)
5605{
5606 Elf_Internal_Sym *isymbuf;
5607 Elf_Internal_Shdr *hdr;
5608 unsigned int i, localsyms;
5609
af1f4419
NC		 5610 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
5611 if (! is_arm_elf (abfd))
5612 return;
5613
c7b8f16e
JB		 5614 if ((abfd->flags & DYNAMIC) != 0)
5615 return;
5616
0ffa91dd 5617 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 5618 localsyms = hdr->sh_info;
5619
5620 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
5621 should contain the number of local symbols, which should come before any
5622 global symbols. Mapping symbols are always local. */
5623 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
5624 NULL);
5625
5626 /* No internal symbols read? Skip this BFD. */
5627 if (isymbuf == NULL)
5628 return;
5629
5630 for (i = 0; i < localsyms; i++)
5631 {
5632 Elf_Internal_Sym *isym = &isymbuf[i];
5633 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
5634 const char *name;
906e58ca 5635
c7b8f16e
JB		 5636 if (sec != NULL
5637 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
5638 {
5639 name = bfd_elf_string_from_elf_section (abfd,
5640 hdr->sh_link, isym->st_name);
906e58ca 5641
c7b8f16e
JB		 5642 if (bfd_is_arm_special_symbol_name (name,
5643 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
5644 elf32_arm_section_map_add (sec, name[1], isym->st_value);
5645 }
5646 }
5647}
5648
5649
48229727
JB		 5650/* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
5651 say what they wanted. */
5652
5653void
5654bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
5655{
5656 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5657 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
5658
4dfe6ac6
NC		 5659 if (globals == NULL)
5660 return;
5661
48229727
JB		 5662 if (globals->fix_cortex_a8 == -1)
5663 {
5664 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
5665 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
5666 && (out_attr[Tag_CPU_arch_profile].i == 'A'
5667 || out_attr[Tag_CPU_arch_profile].i == 0))
5668 globals->fix_cortex_a8 = 1;
5669 else
5670 globals->fix_cortex_a8 = 0;
5671 }
5672}
5673
5674
c7b8f16e
JB		 5675void
5676bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
5677{
5678 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 5679 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
906e58ca 5680
4dfe6ac6
NC		 5681 if (globals == NULL)
5682 return;
c7b8f16e
JB		 5683 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
5684 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
5685 {
5686 switch (globals->vfp11_fix)
5687 {
5688 case BFD_ARM_VFP11_FIX_DEFAULT:
5689 case BFD_ARM_VFP11_FIX_NONE:
5690 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5691 break;
906e58ca 5692
c7b8f16e
JB		 5693 default:
5694 /* Give a warning, but do as the user requests anyway. */
5695 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
5696 "workaround is not necessary for target architecture"), obfd);
5697 }
5698 }
5699 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
5700 /* For earlier architectures, we might need the workaround, but do not
5701 enable it by default. If users is running with broken hardware, they
5702 must enable the erratum fix explicitly. */
5703 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5704}
5705
5706
906e58ca
NC		 5707enum bfd_arm_vfp11_pipe
5708{
c7b8f16e
JB		 5709 VFP11_FMAC,
5710 VFP11_LS,
5711 VFP11_DS,
5712 VFP11_BAD
5713};
5714
5715/* Return a VFP register number. This is encoded as RX:X for single-precision
5716 registers, or X:RX for double-precision registers, where RX is the group of
5717 four bits in the instruction encoding and X is the single extension bit.
5718 RX and X fields are specified using their lowest (starting) bit. The return
5719 value is:
5720
5721 0...31: single-precision registers s0...s31
5722 32...63: double-precision registers d0...d31.
906e58ca 5723
c7b8f16e
JB		 5724 Although X should be zero for VFP11 (encoding d0...d15 only), we might
5725 encounter VFP3 instructions, so we allow the full range for DP registers. */
906e58ca 5726
c7b8f16e
JB		 5727static unsigned int
5728bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
5729 unsigned int x)
5730{
5731 if (is_double)
5732 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
5733 else
5734 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
5735}
5736
5737/* Set bits in *WMASK according to a register number REG as encoded by
5738 bfd_arm_vfp11_regno(). Ignore d16-d31. */
5739
5740static void
5741bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
5742{
5743 if (reg < 32)
5744 *wmask |= 1 << reg;
5745 else if (reg < 48)
5746 *wmask |= 3 << ((reg - 32) * 2);
5747}
5748
5749/* Return TRUE if WMASK overwrites anything in REGS. */
5750
5751static bfd_boolean
5752bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
5753{
5754 int i;
906e58ca 5755
c7b8f16e
JB		 5756 for (i = 0; i < numregs; i++)
5757 {
5758 unsigned int reg = regs[i];
5759
5760 if (reg < 32 && (wmask & (1 << reg)) != 0)
5761 return TRUE;
906e58ca 5762
c7b8f16e
JB		 5763 reg -= 32;
5764
5765 if (reg >= 16)
5766 continue;
906e58ca 5767
c7b8f16e
JB		 5768 if ((wmask & (3 << (reg * 2))) != 0)
5769 return TRUE;
5770 }
906e58ca 5771
c7b8f16e
JB		 5772 return FALSE;
5773}
5774
5775/* In this function, we're interested in two things: finding input registers
5776 for VFP data-processing instructions, and finding the set of registers which
5777 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
5778 hold the written set, so FLDM etc. are easy to deal with (we're only
5779 interested in 32 SP registers or 16 dp registers, due to the VFP version
5780 implemented by the chip in question). DP registers are marked by setting
5781 both SP registers in the write mask). */
5782
5783static enum bfd_arm_vfp11_pipe
5784bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
5785 int *numregs)
5786{
91d6fa6a 5787 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
c7b8f16e
JB		 5788 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
5789
5790 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
5791 {
5792 unsigned int pqrs;
5793 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5794 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
5795
5796 pqrs = ((insn & 0x00800000) >> 20)
5797 | ((insn & 0x00300000) >> 19)
5798 | ((insn & 0x00000040) >> 6);
5799
5800 switch (pqrs)
5801 {
5802 case 0: /* fmac[sd]. */
5803 case 1: /* fnmac[sd]. */
5804 case 2: /* fmsc[sd]. */
5805 case 3: /* fnmsc[sd]. */
91d6fa6a 5806 vpipe = VFP11_FMAC;
c7b8f16e
JB		 5807 bfd_arm_vfp11_write_mask (destmask, fd);
5808 regs[0] = fd;
5809 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
5810 regs[2] = fm;
5811 *numregs = 3;
5812 break;
5813
5814 case 4: /* fmul[sd]. */
5815 case 5: /* fnmul[sd]. */
5816 case 6: /* fadd[sd]. */
5817 case 7: /* fsub[sd]. */
91d6fa6a 5818 vpipe = VFP11_FMAC;
c7b8f16e
JB		 5819 goto vfp_binop;
5820
5821 case 8: /* fdiv[sd]. */
91d6fa6a 5822 vpipe = VFP11_DS;
c7b8f16e
JB		 5823 vfp_binop:
5824 bfd_arm_vfp11_write_mask (destmask, fd);
5825 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
5826 regs[1] = fm;
5827 *numregs = 2;
5828 break;
5829
5830 case 15: /* extended opcode. */
5831 {
5832 unsigned int extn = ((insn >> 15) & 0x1e)
5833 | ((insn >> 7) & 1);
5834
5835 switch (extn)
5836 {
5837 case 0: /* fcpy[sd]. */
5838 case 1: /* fabs[sd]. */
5839 case 2: /* fneg[sd]. */
5840 case 8: /* fcmp[sd]. */
5841 case 9: /* fcmpe[sd]. */
5842 case 10: /* fcmpz[sd]. */
5843 case 11: /* fcmpez[sd]. */
5844 case 16: /* fuito[sd]. */
5845 case 17: /* fsito[sd]. */
5846 case 24: /* ftoui[sd]. */
5847 case 25: /* ftouiz[sd]. */
5848 case 26: /* ftosi[sd]. */
5849 case 27: /* ftosiz[sd]. */
5850 /* These instructions will not bounce due to underflow. */
5851 *numregs = 0;
91d6fa6a 5852 vpipe = VFP11_FMAC;
c7b8f16e
JB		 5853 break;
5854
5855 case 3: /* fsqrt[sd]. */
5856 /* fsqrt cannot underflow, but it can (perhaps) overwrite
5857 registers to cause the erratum in previous instructions. */
5858 bfd_arm_vfp11_write_mask (destmask, fd);
91d6fa6a 5859 vpipe = VFP11_DS;
c7b8f16e
JB		 5860 break;
5861
5862 case 15: /* fcvt{ds,sd}. */
5863 {
5864 int rnum = 0;
5865
5866 bfd_arm_vfp11_write_mask (destmask, fd);
5867
5868 /* Only FCVTSD can underflow. */
5869 if ((insn & 0x100) != 0)
5870 regs[rnum++] = fm;
5871
5872 *numregs = rnum;
5873
91d6fa6a 5874 vpipe = VFP11_FMAC;
c7b8f16e
JB		 5875 }
5876 break;
5877
5878 default:
5879 return VFP11_BAD;
5880 }
5881 }
5882 break;
5883
5884 default:
5885 return VFP11_BAD;
5886 }
5887 }
5888 /* Two-register transfer. */
5889 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
5890 {
5891 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
906e58ca 5892
c7b8f16e
JB		 5893 if ((insn & 0x100000) == 0)
5894 {
5895 if (is_double)
5896 bfd_arm_vfp11_write_mask (destmask, fm);
5897 else
5898 {
5899 bfd_arm_vfp11_write_mask (destmask, fm);
5900 bfd_arm_vfp11_write_mask (destmask, fm + 1);
5901 }
5902 }
5903
91d6fa6a 5904 vpipe = VFP11_LS;
c7b8f16e
JB		 5905 }
5906 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
5907 {
5908 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5909 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
906e58ca 5910
c7b8f16e
JB		 5911 switch (puw)
5912 {
5913 case 0: /* Two-reg transfer. We should catch these above. */
5914 abort ();
906e58ca 5915
c7b8f16e
JB		 5916 case 2: /* fldm[sdx]. */
5917 case 3:
5918 case 5:
5919 {
5920 unsigned int i, offset = insn & 0xff;
5921
5922 if (is_double)
5923 offset >>= 1;
5924
5925 for (i = fd; i < fd + offset; i++)
5926 bfd_arm_vfp11_write_mask (destmask, i);
5927 }
5928 break;
906e58ca 5929
c7b8f16e
JB		 5930 case 4: /* fld[sd]. */
5931 case 6:
5932 bfd_arm_vfp11_write_mask (destmask, fd);
5933 break;
906e58ca 5934
c7b8f16e
JB		 5935 default:
5936 return VFP11_BAD;
5937 }
5938
91d6fa6a 5939 vpipe = VFP11_LS;
c7b8f16e
JB		 5940 }
5941 /* Single-register transfer. Note L==0. */
5942 else if ((insn & 0x0f100e10) == 0x0e000a10)
5943 {
5944 unsigned int opcode = (insn >> 21) & 7;
5945 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
5946
5947 switch (opcode)
5948 {
5949 case 0: /* fmsr/fmdlr. */
5950 case 1: /* fmdhr. */
5951 /* Mark fmdhr and fmdlr as writing to the whole of the DP
5952 destination register. I don't know if this is exactly right,
5953 but it is the conservative choice. */
5954 bfd_arm_vfp11_write_mask (destmask, fn);
5955 break;
5956
5957 case 7: /* fmxr. */
5958 break;
5959 }
5960
91d6fa6a 5961 vpipe = VFP11_LS;
c7b8f16e
JB		 5962 }
5963
91d6fa6a 5964 return vpipe;
c7b8f16e
JB		 5965}
5966
5967
5968static int elf32_arm_compare_mapping (const void * a, const void * b);
5969
5970
5971/* Look for potentially-troublesome code sequences which might trigger the
5972 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
5973 (available from ARM) for details of the erratum. A short version is
5974 described in ld.texinfo. */
5975
5976bfd_boolean
5977bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
5978{
5979 asection *sec;
5980 bfd_byte *contents = NULL;
5981 int state = 0;
5982 int regs[3], numregs = 0;
5983 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5984 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
906e58ca 5985
4dfe6ac6
NC		 5986 if (globals == NULL)
5987 return FALSE;
5988
c7b8f16e
JB		 5989 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
5990 The states transition as follows:
906e58ca 5991
c7b8f16e
JB		 5992 0 -> 1 (vector) or 0 -> 2 (scalar)
5993 A VFP FMAC-pipeline instruction has been seen. Fill
5994 regs[0]..regs[numregs-1] with its input operands. Remember this
5995 instruction in 'first_fmac'.
5996
5997 1 -> 2
5998 Any instruction, except for a VFP instruction which overwrites
5999 regs[*].
906e58ca 6000
c7b8f16e
JB		 6001 1 -> 3 [ -> 0 ] or
6002 2 -> 3 [ -> 0 ]
6003 A VFP instruction has been seen which overwrites any of regs[*].
6004 We must make a veneer! Reset state to 0 before examining next
6005 instruction.
906e58ca 6006
c7b8f16e
JB		 6007 2 -> 0
6008 If we fail to match anything in state 2, reset to state 0 and reset
6009 the instruction pointer to the instruction after 'first_fmac'.
6010
6011 If the VFP11 vector mode is in use, there must be at least two unrelated
6012 instructions between anti-dependent VFP11 instructions to properly avoid
906e58ca 6013 triggering the erratum, hence the use of the extra state 1. */
c7b8f16e
JB		 6014
6015 /* If we are only performing a partial link do not bother
6016 to construct any glue. */
6017 if (link_info->relocatable)
6018 return TRUE;
6019
0ffa91dd
NC		 6020 /* Skip if this bfd does not correspond to an ELF image. */
6021 if (! is_arm_elf (abfd))
6022 return TRUE;
906e58ca 6023
c7b8f16e
JB		 6024 /* We should have chosen a fix type by the time we get here. */
6025 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6026
6027 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6028 return TRUE;
2e6030b9 6029
33a7ffc2
JM		 6030 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6031 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6032 return TRUE;
6033
c7b8f16e
JB		 6034 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6035 {
6036 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6037 struct _arm_elf_section_data *sec_data;
6038
6039 /* If we don't have executable progbits, we're not interested in this
6040 section. Also skip if section is to be excluded. */
6041 if (elf_section_type (sec) != SHT_PROGBITS
6042 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6043 || (sec->flags & SEC_EXCLUDE) != 0
33a7ffc2
JM		 6044 || sec->sec_info_type == ELF_INFO_TYPE_JUST_SYMS
6045 || sec->output_section == bfd_abs_section_ptr
c7b8f16e
JB		 6046 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6047 continue;
6048
6049 sec_data = elf32_arm_section_data (sec);
906e58ca 6050
c7b8f16e
JB		 6051 if (sec_data->mapcount == 0)
6052 continue;
906e58ca 6053
c7b8f16e
JB		 6054 if (elf_section_data (sec)->this_hdr.contents != NULL)
6055 contents = elf_section_data (sec)->this_hdr.contents;
6056 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6057 goto error_return;
6058
6059 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6060 elf32_arm_compare_mapping);
6061
6062 for (span = 0; span < sec_data->mapcount; span++)
6063 {
6064 unsigned int span_start = sec_data->map[span].vma;
6065 unsigned int span_end = (span == sec_data->mapcount - 1)
6066 ? sec->size : sec_data->map[span + 1].vma;
6067 char span_type = sec_data->map[span].type;
906e58ca 6068
c7b8f16e
JB		 6069 /* FIXME: Only ARM mode is supported at present. We may need to
6070 support Thumb-2 mode also at some point. */
6071 if (span_type != 'a')
6072 continue;
6073
6074 for (i = span_start; i < span_end;)
6075 {
6076 unsigned int next_i = i + 4;
6077 unsigned int insn = bfd_big_endian (abfd)
6078 ? (contents[i] << 24)
6079 | (contents[i + 1] << 16)
6080 | (contents[i + 2] << 8)
6081 | contents[i + 3]
6082 : (contents[i + 3] << 24)
6083 | (contents[i + 2] << 16)
6084 | (contents[i + 1] << 8)
6085 | contents[i];
6086 unsigned int writemask = 0;
91d6fa6a 6087 enum bfd_arm_vfp11_pipe vpipe;
c7b8f16e
JB		 6088
6089 switch (state)
6090 {
6091 case 0:
91d6fa6a 6092 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
c7b8f16e
JB		 6093 &numregs);
6094 /* I'm assuming the VFP11 erratum can trigger with denorm
6095 operands on either the FMAC or the DS pipeline. This might
6096 lead to slightly overenthusiastic veneer insertion. */
91d6fa6a 6097 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
c7b8f16e
JB		 6098 {
6099 state = use_vector ? 1 : 2;
6100 first_fmac = i;
6101 veneer_of_insn = insn;
6102 }
6103 break;
6104
6105 case 1:
6106 {
6107 int other_regs[3], other_numregs;
91d6fa6a 6108 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6109 other_regs,
6110 &other_numregs);
91d6fa6a 6111 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6112 && bfd_arm_vfp11_antidependency (writemask, regs,
6113 numregs))
6114 state = 3;
6115 else
6116 state = 2;
6117 }
6118 break;
6119
6120 case 2:
6121 {
6122 int other_regs[3], other_numregs;
91d6fa6a 6123 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6124 other_regs,
6125 &other_numregs);
91d6fa6a 6126 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6127 && bfd_arm_vfp11_antidependency (writemask, regs,
6128 numregs))
6129 state = 3;
6130 else
6131 {
6132 state = 0;
6133 next_i = first_fmac + 4;
6134 }
6135 }
6136 break;
6137
6138 case 3:
6139 abort (); /* Should be unreachable. */
6140 }
6141
6142 if (state == 3)
6143 {
21d799b5
NC		 6144 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6145 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
c7b8f16e 6146
c7e2358a 6147 elf32_arm_section_data (sec)->erratumcount += 1;
c7b8f16e
JB		 6148
6149 newerr->u.b.vfp_insn = veneer_of_insn;
6150
6151 switch (span_type)
6152 {
6153 case 'a':
6154 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6155 break;
906e58ca 6156
c7b8f16e
JB		 6157 default:
6158 abort ();
6159 }
6160
6161 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6162 first_fmac);
6163
6164 newerr->vma = -1;
6165
6166 newerr->next = sec_data->erratumlist;
6167 sec_data->erratumlist = newerr;
6168
6169 state = 0;
6170 }
6171
6172 i = next_i;
6173 }
6174 }
906e58ca 6175
c7b8f16e
JB		 6176 if (contents != NULL
6177 && elf_section_data (sec)->this_hdr.contents != contents)
6178 free (contents);
6179 contents = NULL;
6180 }
6181
6182 return TRUE;
6183
6184error_return:
6185 if (contents != NULL
6186 && elf_section_data (sec)->this_hdr.contents != contents)
6187 free (contents);
906e58ca 6188
c7b8f16e
JB		 6189 return FALSE;
6190}
6191
6192/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6193 after sections have been laid out, using specially-named symbols. */
6194
6195void
6196bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6197 struct bfd_link_info *link_info)
6198{
6199 asection *sec;
6200 struct elf32_arm_link_hash_table *globals;
6201 char *tmp_name;
906e58ca 6202
c7b8f16e
JB		 6203 if (link_info->relocatable)
6204 return;
2e6030b9
MS		 6205
6206 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 6207 if (! is_arm_elf (abfd))
2e6030b9
MS		 6208 return;
6209
c7b8f16e 6210 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6211 if (globals == NULL)
6212 return;
906e58ca 6213
21d799b5
NC		 6214 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6215 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
c7b8f16e
JB		 6216
6217 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6218 {
6219 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6220 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
906e58ca 6221
c7b8f16e
JB		 6222 for (; errnode != NULL; errnode = errnode->next)
6223 {
6224 struct elf_link_hash_entry *myh;
6225 bfd_vma vma;
6226
6227 switch (errnode->type)
6228 {
6229 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6230 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6231 /* Find veneer symbol. */
6232 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6233 errnode->u.b.veneer->u.v.id);
6234
6235 myh = elf_link_hash_lookup
6236 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6237
6238 if (myh == NULL)
6239 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6240 "`%s'"), abfd, tmp_name);
6241
6242 vma = myh->root.u.def.section->output_section->vma
6243 + myh->root.u.def.section->output_offset
6244 + myh->root.u.def.value;
6245
6246 errnode->u.b.veneer->vma = vma;
6247 break;
6248
6249 case VFP11_ERRATUM_ARM_VENEER:
6250 case VFP11_ERRATUM_THUMB_VENEER:
6251 /* Find return location. */
6252 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6253 errnode->u.v.id);
6254
6255 myh = elf_link_hash_lookup
6256 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6257
6258 if (myh == NULL)
6259 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6260 "`%s'"), abfd, tmp_name);
6261
6262 vma = myh->root.u.def.section->output_section->vma
6263 + myh->root.u.def.section->output_offset
6264 + myh->root.u.def.value;
6265
6266 errnode->u.v.branch->vma = vma;
6267 break;
906e58ca 6268
c7b8f16e
JB		 6269 default:
6270 abort ();
6271 }
6272 }
6273 }
906e58ca 6274
c7b8f16e
JB		 6275 free (tmp_name);
6276}
6277
6278
eb043451
PB		 6279/* Set target relocation values needed during linking. */
6280
6281void
bf21ed78
MS		 6282bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6283 struct bfd_link_info *link_info,
eb043451 6284 int target1_is_rel,
319850b4 6285 char * target2_type,
33bfe774 6286 int fix_v4bx,
c7b8f16e 6287 int use_blx,
bf21ed78 6288 bfd_arm_vfp11_fix vfp11_fix,
a9dc9481 6289 int no_enum_warn, int no_wchar_warn,
48229727 6290 int pic_veneer, int fix_cortex_a8)
eb043451
PB		 6291{
6292 struct elf32_arm_link_hash_table *globals;
6293
6294 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6295 if (globals == NULL)
6296 return;
eb043451
PB		 6297
6298 globals->target1_is_rel = target1_is_rel;
6299 if (strcmp (target2_type, "rel") == 0)
6300 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 6301 else if (strcmp (target2_type, "abs") == 0)
6302 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 6303 else if (strcmp (target2_type, "got-rel") == 0)
6304 globals->target2_reloc = R_ARM_GOT_PREL;
6305 else
6306 {
6307 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6308 target2_type);
6309 }
319850b4 6310 globals->fix_v4bx = fix_v4bx;
33bfe774 6311 globals->use_blx |= use_blx;
c7b8f16e 6312 globals->vfp11_fix = vfp11_fix;
27e55c4d 6313 globals->pic_veneer = pic_veneer;
48229727 6314 globals->fix_cortex_a8 = fix_cortex_a8;
bf21ed78 6315
0ffa91dd
NC		 6316 BFD_ASSERT (is_arm_elf (output_bfd));
6317 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
a9dc9481 6318 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
eb043451 6319}
eb043451 6320
12a0a0fd 6321/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 6322
12a0a0fd
PB		 6323static void
6324insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6325{
6326 bfd_vma upper;
6327 bfd_vma lower;
6328 int reloc_sign;
6329
6330 BFD_ASSERT ((offset & 1) == 0);
6331
6332 upper = bfd_get_16 (abfd, insn);
6333 lower = bfd_get_16 (abfd, insn + 2);
6334 reloc_sign = (offset < 0) ? 1 : 0;
6335 upper = (upper & ~(bfd_vma) 0x7ff)
6336 | ((offset >> 12) & 0x3ff)
6337 | (reloc_sign << 10);
906e58ca 6338 lower = (lower & ~(bfd_vma) 0x2fff)
12a0a0fd
PB		 6339 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6340 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6341 | ((offset >> 1) & 0x7ff);
6342 bfd_put_16 (abfd, upper, insn);
6343 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 6344}
6345
9b485d32
NC		 6346/* Thumb code calling an ARM function. */
6347
252b5132 6348static int
57e8b36a
NC		 6349elf32_thumb_to_arm_stub (struct bfd_link_info * info,
6350 const char * name,
6351 bfd * input_bfd,
6352 bfd * output_bfd,
6353 asection * input_section,
6354 bfd_byte * hit_data,
6355 asection * sym_sec,
6356 bfd_vma offset,
6357 bfd_signed_vma addend,
f2a9dd69
DJ		 6358 bfd_vma val,
6359 char **error_message)
252b5132 6360{
bcbdc74c 6361 asection * s = 0;
dc810e39 6362 bfd_vma my_offset;
252b5132 6363 long int ret_offset;
bcbdc74c
NC		 6364 struct elf_link_hash_entry * myh;
6365 struct elf32_arm_link_hash_table * globals;
252b5132 6366
f2a9dd69 6367 myh = find_thumb_glue (info, name, error_message);
252b5132 6368 if (myh == NULL)
b34976b6 6369 return FALSE;
252b5132
RH		 6370
6371 globals = elf32_arm_hash_table (info);
252b5132
RH		 6372 BFD_ASSERT (globals != NULL);
6373 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6374
6375 my_offset = myh->root.u.def.value;
6376
6377 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6378 THUMB2ARM_GLUE_SECTION_NAME);
6379
6380 BFD_ASSERT (s != NULL);
6381 BFD_ASSERT (s->contents != NULL);
6382 BFD_ASSERT (s->output_section != NULL);
6383
6384 if ((my_offset & 0x01) == 0x01)
6385 {
6386 if (sym_sec != NULL
6387 && sym_sec->owner != NULL
6388 && !INTERWORK_FLAG (sym_sec->owner))
6389 {
8f615d07 6390 (*_bfd_error_handler)
d003868e
AM		 6391 (_("%B(%s): warning: interworking not enabled.\n"
6392 " first occurrence: %B: thumb call to arm"),
6393 sym_sec->owner, input_bfd, name);
252b5132 6394
b34976b6 6395 return FALSE;
252b5132
RH		 6396 }
6397
6398 --my_offset;
6399 myh->root.u.def.value = my_offset;
6400
52ab56c2
PB		 6401 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
6402 s->contents + my_offset);
252b5132 6403
52ab56c2
PB		 6404 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
6405 s->contents + my_offset + 2);
252b5132
RH		 6406
6407 ret_offset =
9b485d32
NC		 6408 /* Address of destination of the stub. */
6409 ((bfd_signed_vma) val)
252b5132 6410 - ((bfd_signed_vma)
57e8b36a
NC		 6411 /* Offset from the start of the current section
6412 to the start of the stubs. */
9b485d32
NC		 6413 (s->output_offset
6414 /* Offset of the start of this stub from the start of the stubs. */
6415 + my_offset
6416 /* Address of the start of the current section. */
6417 + s->output_section->vma)
6418 /* The branch instruction is 4 bytes into the stub. */
6419 + 4
6420 /* ARM branches work from the pc of the instruction + 8. */
6421 + 8);
252b5132 6422
52ab56c2
PB		 6423 put_arm_insn (globals, output_bfd,
6424 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
6425 s->contents + my_offset + 4);
252b5132
RH		 6426 }
6427
6428 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
6429
427bfd90
NC		 6430 /* Now go back and fix up the original BL insn to point to here. */
6431 ret_offset =
6432 /* Address of where the stub is located. */
6433 (s->output_section->vma + s->output_offset + my_offset)
6434 /* Address of where the BL is located. */
57e8b36a
NC		 6435 - (input_section->output_section->vma + input_section->output_offset
6436 + offset)
427bfd90
NC		 6437 /* Addend in the relocation. */
6438 - addend
6439 /* Biassing for PC-relative addressing. */
6440 - 8;
252b5132 6441
12a0a0fd 6442 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 6443
b34976b6 6444 return TRUE;
252b5132
RH		 6445}
6446
a4fd1a8e 6447/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 6448
a4fd1a8e
PB		 6449static struct elf_link_hash_entry *
6450elf32_arm_create_thumb_stub (struct bfd_link_info * info,
6451 const char * name,
6452 bfd * input_bfd,
6453 bfd * output_bfd,
6454 asection * sym_sec,
6455 bfd_vma val,
8029a119
NC		 6456 asection * s,
6457 char ** error_message)
252b5132 6458{
dc810e39 6459 bfd_vma my_offset;
252b5132 6460 long int ret_offset;
bcbdc74c
NC		 6461 struct elf_link_hash_entry * myh;
6462 struct elf32_arm_link_hash_table * globals;
252b5132 6463
f2a9dd69 6464 myh = find_arm_glue (info, name, error_message);
252b5132 6465 if (myh == NULL)
a4fd1a8e 6466 return NULL;
252b5132
RH		 6467
6468 globals = elf32_arm_hash_table (info);
252b5132
RH		 6469 BFD_ASSERT (globals != NULL);
6470 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6471
6472 my_offset = myh->root.u.def.value;
252b5132
RH		 6473
6474 if ((my_offset & 0x01) == 0x01)
6475 {
6476 if (sym_sec != NULL
6477 && sym_sec->owner != NULL
6478 && !INTERWORK_FLAG (sym_sec->owner))
6479 {
8f615d07 6480 (*_bfd_error_handler)
d003868e
AM		 6481 (_("%B(%s): warning: interworking not enabled.\n"
6482 " first occurrence: %B: arm call to thumb"),
6483 sym_sec->owner, input_bfd, name);
252b5132 6484 }
9b485d32 6485
252b5132
RH		 6486 --my_offset;
6487 myh->root.u.def.value = my_offset;
6488
27e55c4d
PB		 6489 if (info->shared || globals->root.is_relocatable_executable
6490 || globals->pic_veneer)
8f6277f5
PB		 6491 {
6492 /* For relocatable objects we can't use absolute addresses,
6493 so construct the address from a relative offset. */
6494 /* TODO: If the offset is small it's probably worth
6495 constructing the address with adds. */
52ab56c2
PB		 6496 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
6497 s->contents + my_offset);
6498 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
6499 s->contents + my_offset + 4);
6500 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
6501 s->contents + my_offset + 8);
8f6277f5
PB		 6502 /* Adjust the offset by 4 for the position of the add,
6503 and 8 for the pipeline offset. */
6504 ret_offset = (val - (s->output_offset
6505 + s->output_section->vma
6506 + my_offset + 12))
6507 | 1;
6508 bfd_put_32 (output_bfd, ret_offset,
6509 s->contents + my_offset + 12);
6510 }
26079076
PB		 6511 else if (globals->use_blx)
6512 {
6513 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
6514 s->contents + my_offset);
6515
6516 /* It's a thumb address. Add the low order bit. */
6517 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
6518 s->contents + my_offset + 4);
6519 }
8f6277f5
PB		 6520 else
6521 {
52ab56c2
PB		 6522 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
6523 s->contents + my_offset);
252b5132 6524
52ab56c2
PB		 6525 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
6526 s->contents + my_offset + 4);
252b5132 6527
8f6277f5
PB		 6528 /* It's a thumb address. Add the low order bit. */
6529 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
6530 s->contents + my_offset + 8);
8029a119
NC		 6531
6532 my_offset += 12;
8f6277f5 6533 }
252b5132
RH		 6534 }
6535
6536 BFD_ASSERT (my_offset <= globals->arm_glue_size);
6537
a4fd1a8e
PB		 6538 return myh;
6539}
6540
6541/* Arm code calling a Thumb function. */
6542
6543static int
6544elf32_arm_to_thumb_stub (struct bfd_link_info * info,
6545 const char * name,
6546 bfd * input_bfd,
6547 bfd * output_bfd,
6548 asection * input_section,
6549 bfd_byte * hit_data,
6550 asection * sym_sec,
6551 bfd_vma offset,
6552 bfd_signed_vma addend,
f2a9dd69
DJ		 6553 bfd_vma val,
6554 char **error_message)
a4fd1a8e
PB		 6555{
6556 unsigned long int tmp;
6557 bfd_vma my_offset;
6558 asection * s;
6559 long int ret_offset;
6560 struct elf_link_hash_entry * myh;
6561 struct elf32_arm_link_hash_table * globals;
6562
6563 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 6564 BFD_ASSERT (globals != NULL);
6565 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6566
6567 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6568 ARM2THUMB_GLUE_SECTION_NAME);
6569 BFD_ASSERT (s != NULL);
6570 BFD_ASSERT (s->contents != NULL);
6571 BFD_ASSERT (s->output_section != NULL);
6572
6573 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 6574 sym_sec, val, s, error_message);
a4fd1a8e
PB		 6575 if (!myh)
6576 return FALSE;
6577
6578 my_offset = myh->root.u.def.value;
252b5132
RH		 6579 tmp = bfd_get_32 (input_bfd, hit_data);
6580 tmp = tmp & 0xFF000000;
6581
9b485d32 6582 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 6583 ret_offset = (s->output_offset
6584 + my_offset
6585 + s->output_section->vma
6586 - (input_section->output_offset
6587 + input_section->output_section->vma
6588 + offset + addend)
6589 - 8);
9a5aca8c 6590
252b5132
RH		 6591 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
6592
dc810e39 6593 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 6594
b34976b6 6595 return TRUE;
252b5132
RH		 6596}
6597
a4fd1a8e
PB		 6598/* Populate Arm stub for an exported Thumb function. */
6599
6600static bfd_boolean
6601elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
6602{
6603 struct bfd_link_info * info = (struct bfd_link_info *) inf;
6604 asection * s;
6605 struct elf_link_hash_entry * myh;
6606 struct elf32_arm_link_hash_entry *eh;
6607 struct elf32_arm_link_hash_table * globals;
6608 asection *sec;
6609 bfd_vma val;
f2a9dd69 6610 char *error_message;
a4fd1a8e 6611
906e58ca 6612 eh = elf32_arm_hash_entry (h);
a4fd1a8e
PB		 6613 /* Allocate stubs for exported Thumb functions on v4t. */
6614 if (eh->export_glue == NULL)
6615 return TRUE;
6616
6617 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 6618 BFD_ASSERT (globals != NULL);
6619 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6620
6621 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6622 ARM2THUMB_GLUE_SECTION_NAME);
6623 BFD_ASSERT (s != NULL);
6624 BFD_ASSERT (s->contents != NULL);
6625 BFD_ASSERT (s->output_section != NULL);
6626
6627 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 6628
6629 BFD_ASSERT (sec->output_section != NULL);
6630
a4fd1a8e
PB		 6631 val = eh->export_glue->root.u.def.value + sec->output_offset
6632 + sec->output_section->vma;
8029a119 6633
a4fd1a8e
PB		 6634 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
6635 h->root.u.def.section->owner,
f2a9dd69
DJ		 6636 globals->obfd, sec, val, s,
6637 &error_message);
a4fd1a8e
PB		 6638 BFD_ASSERT (myh);
6639 return TRUE;
6640}
6641
845b51d6
PB		 6642/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
6643
6644static bfd_vma
6645elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
6646{
6647 bfd_byte *p;
6648 bfd_vma glue_addr;
6649 asection *s;
6650 struct elf32_arm_link_hash_table *globals;
6651
6652 globals = elf32_arm_hash_table (info);
845b51d6
PB		 6653 BFD_ASSERT (globals != NULL);
6654 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6655
6656 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6657 ARM_BX_GLUE_SECTION_NAME);
6658 BFD_ASSERT (s != NULL);
6659 BFD_ASSERT (s->contents != NULL);
6660 BFD_ASSERT (s->output_section != NULL);
6661
6662 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
6663
6664 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
6665
6666 if ((globals->bx_glue_offset[reg] & 1) == 0)
6667 {
6668 p = s->contents + glue_addr;
6669 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
6670 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
6671 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
6672 globals->bx_glue_offset[reg] |= 1;
6673 }
6674
6675 return glue_addr + s->output_section->vma + s->output_offset;
6676}
6677
a4fd1a8e
PB		 6678/* Generate Arm stubs for exported Thumb symbols. */
6679static void
906e58ca 6680elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
a4fd1a8e
PB		 6681 struct bfd_link_info *link_info)
6682{
6683 struct elf32_arm_link_hash_table * globals;
6684
8029a119
NC		 6685 if (link_info == NULL)
6686 /* Ignore this if we are not called by the ELF backend linker. */
a4fd1a8e
PB		 6687 return;
6688
6689 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6690 if (globals == NULL)
6691 return;
6692
84c08195
PB		 6693 /* If blx is available then exported Thumb symbols are OK and there is
6694 nothing to do. */
a4fd1a8e
PB		 6695 if (globals->use_blx)
6696 return;
6697
6698 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
6699 link_info);
6700}
6701
eb043451
PB		 6702/* Some relocations map to different relocations depending on the
6703 target. Return the real relocation. */
8029a119 6704
eb043451
PB		 6705static int
6706arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
6707 int r_type)
6708{
6709 switch (r_type)
6710 {
6711 case R_ARM_TARGET1:
6712 if (globals->target1_is_rel)
6713 return R_ARM_REL32;
6714 else
6715 return R_ARM_ABS32;
6716
6717 case R_ARM_TARGET2:
6718 return globals->target2_reloc;
6719
6720 default:
6721 return r_type;
6722 }
6723}
eb043451 6724
ba93b8ac
DJ		 6725/* Return the base VMA address which should be subtracted from real addresses
6726 when resolving @dtpoff relocation.
6727 This is PT_TLS segment p_vaddr. */
6728
6729static bfd_vma
6730dtpoff_base (struct bfd_link_info *info)
6731{
6732 /* If tls_sec is NULL, we should have signalled an error already. */
6733 if (elf_hash_table (info)->tls_sec == NULL)
6734 return 0;
6735 return elf_hash_table (info)->tls_sec->vma;
6736}
6737
6738/* Return the relocation value for @tpoff relocation
6739 if STT_TLS virtual address is ADDRESS. */
6740
6741static bfd_vma
6742tpoff (struct bfd_link_info *info, bfd_vma address)
6743{
6744 struct elf_link_hash_table *htab = elf_hash_table (info);
6745 bfd_vma base;
6746
6747 /* If tls_sec is NULL, we should have signalled an error already. */
6748 if (htab->tls_sec == NULL)
6749 return 0;
6750 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
6751 return address - htab->tls_sec->vma + base;
6752}
6753
00a97672
RS		 6754/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
6755 VALUE is the relocation value. */
6756
6757static bfd_reloc_status_type
6758elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
6759{
6760 if (value > 0xfff)
6761 return bfd_reloc_overflow;
6762
6763 value |= bfd_get_32 (abfd, data) & 0xfffff000;
6764 bfd_put_32 (abfd, value, data);
6765 return bfd_reloc_ok;
6766}
6767
4962c51a
MS		 6768/* For a given value of n, calculate the value of G_n as required to
6769 deal with group relocations. We return it in the form of an
6770 encoded constant-and-rotation, together with the final residual. If n is
6771 specified as less than zero, then final_residual is filled with the
6772 input value and no further action is performed. */
6773
6774static bfd_vma
6775calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
6776{
6777 int current_n;
6778 bfd_vma g_n;
6779 bfd_vma encoded_g_n = 0;
6780 bfd_vma residual = value; /* Also known as Y_n. */
6781
6782 for (current_n = 0; current_n <= n; current_n++)
6783 {
6784 int shift;
6785
6786 /* Calculate which part of the value to mask. */
6787 if (residual == 0)
6788 shift = 0;
6789 else
6790 {
6791 int msb;
6792
6793 /* Determine the most significant bit in the residual and
6794 align the resulting value to a 2-bit boundary. */
6795 for (msb = 30; msb >= 0; msb -= 2)
6796 if (residual & (3 << msb))
6797 break;
6798
6799 /* The desired shift is now (msb - 6), or zero, whichever
6800 is the greater. */
6801 shift = msb - 6;
6802 if (shift < 0)
6803 shift = 0;
6804 }
6805
6806 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
6807 g_n = residual & (0xff << shift);
6808 encoded_g_n = (g_n >> shift)
6809 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
6810
6811 /* Calculate the residual for the next time around. */
6812 residual &= ~g_n;
6813 }
6814
6815 *final_residual = residual;
6816
6817 return encoded_g_n;
6818}
6819
6820/* Given an ARM instruction, determine whether it is an ADD or a SUB.
6821 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
906e58ca 6822
4962c51a 6823static int
906e58ca 6824identify_add_or_sub (bfd_vma insn)
4962c51a
MS		 6825{
6826 int opcode = insn & 0x1e00000;
6827
6828 if (opcode == 1 << 23) /* ADD */
6829 return 1;
6830
6831 if (opcode == 1 << 22) /* SUB */
6832 return -1;
6833
6834 return 0;
6835}
6836
252b5132 6837/* Perform a relocation as part of a final link. */
9b485d32 6838
252b5132 6839static bfd_reloc_status_type
57e8b36a
NC		 6840elf32_arm_final_link_relocate (reloc_howto_type * howto,
6841 bfd * input_bfd,
6842 bfd * output_bfd,
6843 asection * input_section,
6844 bfd_byte * contents,
6845 Elf_Internal_Rela * rel,
6846 bfd_vma value,
6847 struct bfd_link_info * info,
6848 asection * sym_sec,
6849 const char * sym_name,
6850 int sym_flags,
0945cdfd 6851 struct elf_link_hash_entry * h,
f2a9dd69 6852 bfd_boolean * unresolved_reloc_p,
8029a119 6853 char ** error_message)
252b5132
RH		 6854{
6855 unsigned long r_type = howto->type;
6856 unsigned long r_symndx;
6857 bfd_byte * hit_data = contents + rel->r_offset;
6858 bfd * dynobj = NULL;
252b5132
RH		 6859 bfd_vma * local_got_offsets;
6860 asection * sgot = NULL;
6861 asection * splt = NULL;
6862 asection * sreloc = NULL;
252b5132 6863 bfd_vma addend;
ba96a88f
NC		 6864 bfd_signed_vma signed_addend;
6865 struct elf32_arm_link_hash_table * globals;
f21f3fe0 6866
9c504268 6867 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 6868 if (globals == NULL)
6869 return bfd_reloc_notsupported;
9c504268 6870
0ffa91dd
NC		 6871 BFD_ASSERT (is_arm_elf (input_bfd));
6872
6873 /* Some relocation types map to different relocations depending on the
9c504268 6874 target. We pick the right one here. */
eb043451
PB		 6875 r_type = arm_real_reloc_type (globals, r_type);
6876 if (r_type != howto->type)
6877 howto = elf32_arm_howto_from_type (r_type);
9c504268 6878
cac15327
NC		 6879 /* If the start address has been set, then set the EF_ARM_HASENTRY
6880 flag. Setting this more than once is redundant, but the cost is
6881 not too high, and it keeps the code simple.
99e4ae17 6882
cac15327
NC		 6883 The test is done here, rather than somewhere else, because the
6884 start address is only set just before the final link commences.
6885
6886 Note - if the user deliberately sets a start address of 0, the
6887 flag will not be set. */
6888 if (bfd_get_start_address (output_bfd) != 0)
6889 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 6890
252b5132
RH		 6891 dynobj = elf_hash_table (info)->dynobj;
6892 if (dynobj)
6893 {
6894 sgot = bfd_get_section_by_name (dynobj, ".got");
6895 splt = bfd_get_section_by_name (dynobj, ".plt");
6896 }
252b5132
RH		 6897 local_got_offsets = elf_local_got_offsets (input_bfd);
6898 r_symndx = ELF32_R_SYM (rel->r_info);
6899
4e7fd91e 6900 if (globals->use_rel)
ba96a88f 6901 {
4e7fd91e
PB		 6902 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
6903
6904 if (addend & ((howto->src_mask + 1) >> 1))
6905 {
6906 signed_addend = -1;
6907 signed_addend &= ~ howto->src_mask;
6908 signed_addend |= addend;
6909 }
6910 else
6911 signed_addend = addend;
ba96a88f
NC		 6912 }
6913 else
4e7fd91e 6914 addend = signed_addend = rel->r_addend;
f21f3fe0 6915
252b5132
RH		 6916 switch (r_type)
6917 {
6918 case R_ARM_NONE:
28a094c2
DJ		 6919 /* We don't need to find a value for this symbol. It's just a
6920 marker. */
6921 *unresolved_reloc_p = FALSE;
252b5132
RH		 6922 return bfd_reloc_ok;
6923
00a97672
RS		 6924 case R_ARM_ABS12:
6925 if (!globals->vxworks_p)
6926 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
6927
252b5132
RH		 6928 case R_ARM_PC24:
6929 case R_ARM_ABS32:
bb224fc3 6930 case R_ARM_ABS32_NOI:
252b5132 6931 case R_ARM_REL32:
bb224fc3 6932 case R_ARM_REL32_NOI:
5b5bb741
PB		 6933 case R_ARM_CALL:
6934 case R_ARM_JUMP24:
dfc5f959 6935 case R_ARM_XPC25:
eb043451 6936 case R_ARM_PREL31:
7359ea65 6937 case R_ARM_PLT32:
7359ea65
DJ		 6938 /* Handle relocations which should use the PLT entry. ABS32/REL32
6939 will use the symbol's value, which may point to a PLT entry, but we
6940 don't need to handle that here. If we created a PLT entry, all
5fa9e92f
CL		 6941 branches in this object should go to it, except if the PLT is too
6942 far away, in which case a long branch stub should be inserted. */
bb224fc3 6943 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
5fa9e92f 6944 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
155d87d7
CL		 6945 && r_type != R_ARM_CALL
6946 && r_type != R_ARM_JUMP24
6947 && r_type != R_ARM_PLT32)
7359ea65 6948 && h != NULL
c84cd8ee 6949 && splt != NULL
7359ea65
DJ		 6950 && h->plt.offset != (bfd_vma) -1)
6951 {
c84cd8ee
DJ		 6952 /* If we've created a .plt section, and assigned a PLT entry to
6953 this function, it should not be known to bind locally. If
6954 it were, we would have cleared the PLT entry. */
7359ea65
DJ		 6955 BFD_ASSERT (!SYMBOL_CALLS_LOCAL (info, h));
6956
6957 value = (splt->output_section->vma
6958 + splt->output_offset
6959 + h->plt.offset);
0945cdfd 6960 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 6961 return _bfd_final_link_relocate (howto, input_bfd, input_section,
6962 contents, rel->r_offset, value,
00a97672 6963 rel->r_addend);
7359ea65
DJ		 6964 }
6965
67687978
PB		 6966 /* When generating a shared object or relocatable executable, these
6967 relocations are copied into the output file to be resolved at
6968 run time. */
6969 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 6970 && (input_section->flags & SEC_ALLOC)
4dfe6ac6 6971 && !(globals->vxworks_p
3348747a
NS		 6972 && strcmp (input_section->output_section->name,
6973 ".tls_vars") == 0)
bb224fc3 6974 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 6975 || !SYMBOL_CALLS_LOCAL (info, h))
fe33d2fa 6976 && (!strstr (input_section->name, STUB_SUFFIX))
7359ea65
DJ		 6977 && (h == NULL
6978 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
6979 || h->root.type != bfd_link_hash_undefweak)
6980 && r_type != R_ARM_PC24
5b5bb741
PB		 6981 && r_type != R_ARM_CALL
6982 && r_type != R_ARM_JUMP24
ee06dc07 6983 && r_type != R_ARM_PREL31
7359ea65 6984 && r_type != R_ARM_PLT32)
252b5132 6985 {
947216bf
AM		 6986 Elf_Internal_Rela outrel;
6987 bfd_byte *loc;
b34976b6 6988 bfd_boolean skip, relocate;
f21f3fe0 6989
0945cdfd
DJ		 6990 *unresolved_reloc_p = FALSE;
6991
252b5132
RH		 6992 if (sreloc == NULL)
6993 {
83bac4b0
NC		 6994 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
6995 ! globals->use_rel);
f21f3fe0 6996
83bac4b0 6997 if (sreloc == NULL)
252b5132 6998 return bfd_reloc_notsupported;
252b5132 6999 }
f21f3fe0 7000
b34976b6
AM		 7001 skip = FALSE;
7002 relocate = FALSE;
f21f3fe0 7003
00a97672 7004 outrel.r_addend = addend;
c629eae0
JJ		 7005 outrel.r_offset =
7006 _bfd_elf_section_offset (output_bfd, info, input_section,
7007 rel->r_offset);
7008 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 7009 skip = TRUE;
0bb2d96a 7010 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 7011 skip = TRUE, relocate = TRUE;
252b5132
RH		 7012 outrel.r_offset += (input_section->output_section->vma
7013 + input_section->output_offset);
f21f3fe0 7014
252b5132 7015 if (skip)
0bb2d96a 7016 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 7017 else if (h != NULL
7018 && h->dynindx != -1
7359ea65 7019 && (!info->shared
5e681ec4 7020 || !info->symbolic
f5385ebf 7021 || !h->def_regular))
5e681ec4 7022 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 7023 else
7024 {
a16385dc
MM		 7025 int symbol;
7026
5e681ec4 7027 /* This symbol is local, or marked to become local. */
b7693d02
DJ		 7028 if (sym_flags == STT_ARM_TFUNC)
7029 value |= 1;
a16385dc 7030 if (globals->symbian_p)
6366ff1e 7031 {
74541ad4
AM		 7032 asection *osec;
7033
6366ff1e
MM		 7034 /* On Symbian OS, the data segment and text segement
7035 can be relocated independently. Therefore, we
7036 must indicate the segment to which this
7037 relocation is relative. The BPABI allows us to
7038 use any symbol in the right segment; we just use
7039 the section symbol as it is convenient. (We
7040 cannot use the symbol given by "h" directly as it
74541ad4
AM		 7041 will not appear in the dynamic symbol table.)
7042
7043 Note that the dynamic linker ignores the section
7044 symbol value, so we don't subtract osec->vma
7045 from the emitted reloc addend. */
10dbd1f3 7046 if (sym_sec)
74541ad4 7047 osec = sym_sec->output_section;
10dbd1f3 7048 else
74541ad4
AM		 7049 osec = input_section->output_section;
7050 symbol = elf_section_data (osec)->dynindx;
7051 if (symbol == 0)
7052 {
7053 struct elf_link_hash_table *htab = elf_hash_table (info);
7054
7055 if ((osec->flags & SEC_READONLY) == 0
7056 && htab->data_index_section != NULL)
7057 osec = htab->data_index_section;
7058 else
7059 osec = htab->text_index_section;
7060 symbol = elf_section_data (osec)->dynindx;
7061 }
6366ff1e
MM		 7062 BFD_ASSERT (symbol != 0);
7063 }
a16385dc
MM		 7064 else
7065 /* On SVR4-ish systems, the dynamic loader cannot
7066 relocate the text and data segments independently,
7067 so the symbol does not matter. */
7068 symbol = 0;
7069 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 7070 if (globals->use_rel)
7071 relocate = TRUE;
7072 else
7073 outrel.r_addend += value;
252b5132 7074 }
f21f3fe0 7075
947216bf 7076 loc = sreloc->contents;
00a97672
RS		 7077 loc += sreloc->reloc_count++ * RELOC_SIZE (globals);
7078 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9a5aca8c 7079
f21f3fe0 7080 /* If this reloc is against an external symbol, we do not want to
252b5132 7081 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 7082 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 7083 if (! relocate)
7084 return bfd_reloc_ok;
9a5aca8c 7085
f21f3fe0 7086 return _bfd_final_link_relocate (howto, input_bfd, input_section,
252b5132
RH		 7087 contents, rel->r_offset, value,
7088 (bfd_vma) 0);
7089 }
7090 else switch (r_type)
7091 {
00a97672
RS		 7092 case R_ARM_ABS12:
7093 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
7094
dfc5f959 7095 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 7096 case R_ARM_CALL:
7097 case R_ARM_JUMP24:
8029a119 7098 case R_ARM_PC24: /* Arm B/BL instruction. */
7359ea65 7099 case R_ARM_PLT32:
906e58ca 7100 {
906e58ca
NC		 7101 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
7102
dfc5f959 7103 if (r_type == R_ARM_XPC25)
252b5132 7104 {
dfc5f959
NC		 7105 /* Check for Arm calling Arm function. */
7106 /* FIXME: Should we translate the instruction into a BL
7107 instruction instead ? */
7108 if (sym_flags != STT_ARM_TFUNC)
d003868e
AM		 7109 (*_bfd_error_handler)
7110 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
7111 input_bfd,
7112 h ? h->root.root.string : "(local)");
dfc5f959 7113 }
155d87d7 7114 else if (r_type == R_ARM_PC24)
dfc5f959
NC		 7115 {
7116 /* Check for Arm calling Thumb function. */
7117 if (sym_flags == STT_ARM_TFUNC)
7118 {
f2a9dd69
DJ		 7119 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
7120 output_bfd, input_section,
7121 hit_data, sym_sec, rel->r_offset,
7122 signed_addend, value,
7123 error_message))
7124 return bfd_reloc_ok;
7125 else
7126 return bfd_reloc_dangerous;
dfc5f959 7127 }
252b5132 7128 }
ba96a88f 7129
906e58ca 7130 /* Check if a stub has to be inserted because the
8029a119 7131 destination is too far or we are changing mode. */
155d87d7
CL		 7132 if ( r_type == R_ARM_CALL
7133 || r_type == R_ARM_JUMP24
7134 || r_type == R_ARM_PLT32)
906e58ca 7135 {
fe33d2fa
CL		 7136 enum elf32_arm_stub_type stub_type = arm_stub_none;
7137 struct elf32_arm_link_hash_entry *hash;
7138
7139 hash = (struct elf32_arm_link_hash_entry *) h;
7140 stub_type = arm_type_of_stub (info, input_section, rel,
7141 &sym_flags, hash,
7142 value, sym_sec,
7143 input_bfd, sym_name);
5fa9e92f 7144
fe33d2fa 7145 if (stub_type != arm_stub_none)
906e58ca
NC		 7146 {
7147 /* The target is out of reach, so redirect the
7148 branch to the local stub for this function. */
7149
7150 stub_entry = elf32_arm_get_stub_entry (input_section,
7151 sym_sec, h,
fe33d2fa
CL		 7152 rel, globals,
7153 stub_type);
906e58ca
NC		 7154 if (stub_entry != NULL)
7155 value = (stub_entry->stub_offset
7156 + stub_entry->stub_sec->output_offset
7157 + stub_entry->stub_sec->output_section->vma);
7158 }
fe33d2fa
CL		 7159 else
7160 {
7161 /* If the call goes through a PLT entry, make sure to
7162 check distance to the right destination address. */
7163 if (h != NULL
7164 && splt != NULL
7165 && h->plt.offset != (bfd_vma) -1)
7166 {
7167 value = (splt->output_section->vma
7168 + splt->output_offset
7169 + h->plt.offset);
7170 *unresolved_reloc_p = FALSE;
7171 /* The PLT entry is in ARM mode, regardless of the
7172 target function. */
7173 sym_flags = STT_FUNC;
7174 }
7175 }
906e58ca
NC		 7176 }
7177
dea514f5
PB		 7178 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
7179 where:
7180 S is the address of the symbol in the relocation.
7181 P is address of the instruction being relocated.
7182 A is the addend (extracted from the instruction) in bytes.
7183
7184 S is held in 'value'.
7185 P is the base address of the section containing the
7186 instruction plus the offset of the reloc into that
7187 section, ie:
7188 (input_section->output_section->vma +
7189 input_section->output_offset +
7190 rel->r_offset).
7191 A is the addend, converted into bytes, ie:
7192 (signed_addend * 4)
7193
7194 Note: None of these operations have knowledge of the pipeline
7195 size of the processor, thus it is up to the assembler to
7196 encode this information into the addend. */
7197 value -= (input_section->output_section->vma
7198 + input_section->output_offset);
7199 value -= rel->r_offset;
4e7fd91e
PB		 7200 if (globals->use_rel)
7201 value += (signed_addend << howto->size);
7202 else
7203 /* RELA addends do not have to be adjusted by howto->size. */
7204 value += signed_addend;
23080146 7205
dcb5e6e6
NC		 7206 signed_addend = value;
7207 signed_addend >>= howto->rightshift;
9a5aca8c 7208
5ab79981 7209 /* A branch to an undefined weak symbol is turned into a jump to
ffcb4889 7210 the next instruction unless a PLT entry will be created.
77b4f08f 7211 Do the same for local undefined symbols (but not for STN_UNDEF).
cd1dac3d
DG		 7212 The jump to the next instruction is optimized as a NOP depending
7213 on the architecture. */
ffcb4889
NS		 7214 if (h ? (h->root.type == bfd_link_hash_undefweak
7215 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
77b4f08f 7216 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
5ab79981 7217 {
cd1dac3d
DG		 7218 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
7219
7220 if (arch_has_arm_nop (globals))
7221 value |= 0x0320f000;
7222 else
7223 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
5ab79981
PB		 7224 }
7225 else
59f2c4e7 7226 {
9b485d32 7227 /* Perform a signed range check. */
dcb5e6e6 7228 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 7229 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
7230 return bfd_reloc_overflow;
9a5aca8c 7231
5ab79981 7232 addend = (value & 2);
39b41c9c 7233
5ab79981
PB		 7234 value = (signed_addend & howto->dst_mask)
7235 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 7236
5ab79981
PB		 7237 if (r_type == R_ARM_CALL)
7238 {
155d87d7
CL		 7239 /* Set the H bit in the BLX instruction. */
7240 if (sym_flags == STT_ARM_TFUNC)
7241 {
7242 if (addend)
7243 value |= (1 << 24);
7244 else
7245 value &= ~(bfd_vma)(1 << 24);
7246 }
7247
5ab79981 7248 /* Select the correct instruction (BL or BLX). */
906e58ca 7249 /* Only if we are not handling a BL to a stub. In this
8029a119 7250 case, mode switching is performed by the stub. */
906e58ca 7251 if (sym_flags == STT_ARM_TFUNC && !stub_entry)
5ab79981
PB		 7252 value |= (1 << 28);
7253 else
7254 {
7255 value &= ~(bfd_vma)(1 << 28);
7256 value |= (1 << 24);
7257 }
39b41c9c
PB		 7258 }
7259 }
906e58ca 7260 }
252b5132 7261 break;
f21f3fe0 7262
252b5132
RH		 7263 case R_ARM_ABS32:
7264 value += addend;
7265 if (sym_flags == STT_ARM_TFUNC)
7266 value |= 1;
7267 break;
f21f3fe0 7268
bb224fc3
MS		 7269 case R_ARM_ABS32_NOI:
7270 value += addend;
7271 break;
7272
252b5132 7273 case R_ARM_REL32:
a8bc6c78
PB		 7274 value += addend;
7275 if (sym_flags == STT_ARM_TFUNC)
7276 value |= 1;
252b5132 7277 value -= (input_section->output_section->vma
62efb346 7278 + input_section->output_offset + rel->r_offset);
252b5132 7279 break;
eb043451 7280
bb224fc3
MS		 7281 case R_ARM_REL32_NOI:
7282 value += addend;
7283 value -= (input_section->output_section->vma
7284 + input_section->output_offset + rel->r_offset);
7285 break;
7286
eb043451
PB		 7287 case R_ARM_PREL31:
7288 value -= (input_section->output_section->vma
7289 + input_section->output_offset + rel->r_offset);
7290 value += signed_addend;
7291 if (! h || h->root.type != bfd_link_hash_undefweak)
7292 {
8029a119 7293 /* Check for overflow. */
eb043451
PB		 7294 if ((value ^ (value >> 1)) & (1 << 30))
7295 return bfd_reloc_overflow;
7296 }
7297 value &= 0x7fffffff;
7298 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
7299 if (sym_flags == STT_ARM_TFUNC)
7300 value |= 1;
7301 break;
252b5132 7302 }
f21f3fe0 7303
252b5132
RH		 7304 bfd_put_32 (input_bfd, value, hit_data);
7305 return bfd_reloc_ok;
7306
7307 case R_ARM_ABS8:
7308 value += addend;
4e67d4ca
DG		 7309
7310 /* There is no way to tell whether the user intended to use a signed or
7311 unsigned addend. When checking for overflow we accept either,
7312 as specified by the AAELF. */
7313 if ((long) value > 0xff || (long) value < -0x80)
252b5132
RH		 7314 return bfd_reloc_overflow;
7315
7316 bfd_put_8 (input_bfd, value, hit_data);
7317 return bfd_reloc_ok;
7318
7319 case R_ARM_ABS16:
7320 value += addend;
7321
4e67d4ca
DG		 7322 /* See comment for R_ARM_ABS8. */
7323 if ((long) value > 0xffff || (long) value < -0x8000)
252b5132
RH		 7324 return bfd_reloc_overflow;
7325
7326 bfd_put_16 (input_bfd, value, hit_data);
7327 return bfd_reloc_ok;
7328
252b5132 7329 case R_ARM_THM_ABS5:
9b485d32 7330 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 7331 if (globals->use_rel)
7332 {
7333 /* Need to refetch addend. */
7334 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7335 /* ??? Need to determine shift amount from operand size. */
7336 addend >>= howto->rightshift;
7337 }
252b5132
RH		 7338 value += addend;
7339
7340 /* ??? Isn't value unsigned? */
7341 if ((long) value > 0x1f || (long) value < -0x10)
7342 return bfd_reloc_overflow;
7343
7344 /* ??? Value needs to be properly shifted into place first. */
7345 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
7346 bfd_put_16 (input_bfd, value, hit_data);
7347 return bfd_reloc_ok;
7348
2cab6cc3
MS		 7349 case R_ARM_THM_ALU_PREL_11_0:
7350 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
7351 {
7352 bfd_vma insn;
7353 bfd_signed_vma relocation;
7354
7355 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7356 | bfd_get_16 (input_bfd, hit_data + 2);
7357
7358 if (globals->use_rel)
7359 {
7360 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
7361 | ((insn & (1 << 26)) >> 15);
7362 if (insn & 0xf00000)
7363 signed_addend = -signed_addend;
7364 }
7365
7366 relocation = value + signed_addend;
7367 relocation -= (input_section->output_section->vma
7368 + input_section->output_offset
7369 + rel->r_offset);
7370
7371 value = abs (relocation);
7372
7373 if (value >= 0x1000)
7374 return bfd_reloc_overflow;
7375
7376 insn = (insn & 0xfb0f8f00) | (value & 0xff)
7377 | ((value & 0x700) << 4)
7378 | ((value & 0x800) << 15);
7379 if (relocation < 0)
7380 insn |= 0xa00000;
7381
7382 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7383 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7384
7385 return bfd_reloc_ok;
7386 }
7387
e1ec24c6
NC		 7388 case R_ARM_THM_PC8:
7389 /* PR 10073: This reloc is not generated by the GNU toolchain,
7390 but it is supported for compatibility with third party libraries
7391 generated by other compilers, specifically the ARM/IAR. */
7392 {
7393 bfd_vma insn;
7394 bfd_signed_vma relocation;
7395
7396 insn = bfd_get_16 (input_bfd, hit_data);
7397
7398 if (globals->use_rel)
7399 addend = (insn & 0x00ff) << 2;
7400
7401 relocation = value + addend;
7402 relocation -= (input_section->output_section->vma
7403 + input_section->output_offset
7404 + rel->r_offset);
7405
7406 value = abs (relocation);
7407
7408 /* We do not check for overflow of this reloc. Although strictly
7409 speaking this is incorrect, it appears to be necessary in order
7410 to work with IAR generated relocs. Since GCC and GAS do not
7411 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
7412 a problem for them. */
7413 value &= 0x3fc;
7414
7415 insn = (insn & 0xff00) | (value >> 2);
7416
7417 bfd_put_16 (input_bfd, insn, hit_data);
7418
7419 return bfd_reloc_ok;
7420 }
7421
2cab6cc3
MS		 7422 case R_ARM_THM_PC12:
7423 /* Corresponds to: ldr.w reg, [pc, #offset]. */
7424 {
7425 bfd_vma insn;
7426 bfd_signed_vma relocation;
7427
7428 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7429 | bfd_get_16 (input_bfd, hit_data + 2);
7430
7431 if (globals->use_rel)
7432 {
7433 signed_addend = insn & 0xfff;
7434 if (!(insn & (1 << 23)))
7435 signed_addend = -signed_addend;
7436 }
7437
7438 relocation = value + signed_addend;
7439 relocation -= (input_section->output_section->vma
7440 + input_section->output_offset
7441 + rel->r_offset);
7442
7443 value = abs (relocation);
7444
7445 if (value >= 0x1000)
7446 return bfd_reloc_overflow;
7447
7448 insn = (insn & 0xff7ff000) | value;
7449 if (relocation >= 0)
7450 insn |= (1 << 23);
7451
7452 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7453 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7454
7455 return bfd_reloc_ok;
7456 }
7457
dfc5f959 7458 case R_ARM_THM_XPC22:
c19d1205 7459 case R_ARM_THM_CALL:
bd97cb95 7460 case R_ARM_THM_JUMP24:
dfc5f959 7461 /* Thumb BL (branch long instruction). */
252b5132 7462 {
b34976b6 7463 bfd_vma relocation;
e95de063 7464 bfd_vma reloc_sign;
b34976b6
AM		 7465 bfd_boolean overflow = FALSE;
7466 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7467 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 7468 bfd_signed_vma reloc_signed_max;
7469 bfd_signed_vma reloc_signed_min;
b34976b6 7470 bfd_vma check;
252b5132 7471 bfd_signed_vma signed_check;
e95de063 7472 int bitsize;
cd1dac3d 7473 const int thumb2 = using_thumb2 (globals);
252b5132 7474
5ab79981 7475 /* A branch to an undefined weak symbol is turned into a jump to
cd1dac3d
DG		 7476 the next instruction unless a PLT entry will be created.
7477 The jump to the next instruction is optimized as a NOP.W for
7478 Thumb-2 enabled architectures. */
19540007
JM		 7479 if (h && h->root.type == bfd_link_hash_undefweak
7480 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
5ab79981 7481 {
cd1dac3d
DG		 7482 if (arch_has_thumb2_nop (globals))
7483 {
7484 bfd_put_16 (input_bfd, 0xf3af, hit_data);
7485 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
7486 }
7487 else
7488 {
7489 bfd_put_16 (input_bfd, 0xe000, hit_data);
7490 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
7491 }
5ab79981
PB		 7492 return bfd_reloc_ok;
7493 }
7494
e95de063
MS		 7495 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
7496 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 7497 if (globals->use_rel)
7498 {
e95de063
MS		 7499 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
7500 bfd_vma upper = upper_insn & 0x3ff;
7501 bfd_vma lower = lower_insn & 0x7ff;
7502 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
7503 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
7504 bfd_vma i1 = j1 ^ s ? 0 : 1;
7505 bfd_vma i2 = j2 ^ s ? 0 : 1;
7506
7507 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
7508 /* Sign extend. */
7509 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
7510
4e7fd91e
PB		 7511 signed_addend = addend;
7512 }
cb1afa5c 7513
dfc5f959
NC		 7514 if (r_type == R_ARM_THM_XPC22)
7515 {
7516 /* Check for Thumb to Thumb call. */
7517 /* FIXME: Should we translate the instruction into a BL
7518 instruction instead ? */
7519 if (sym_flags == STT_ARM_TFUNC)
d003868e
AM		 7520 (*_bfd_error_handler)
7521 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
7522 input_bfd,
7523 h ? h->root.root.string : "(local)");
dfc5f959
NC		 7524 }
7525 else
252b5132 7526 {
dfc5f959
NC		 7527 /* If it is not a call to Thumb, assume call to Arm.
7528 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 7529 function call at all, but rather a long jump. Calls through
7530 the PLT do not require stubs. */
7531 if (sym_flags != STT_ARM_TFUNC && sym_flags != STT_SECTION
7532 && (h == NULL || splt == NULL
7533 || h->plt.offset == (bfd_vma) -1))
dfc5f959 7534 {
bd97cb95 7535 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7536 {
7537 /* Convert BL to BLX. */
7538 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7539 }
155d87d7
CL		 7540 else if (( r_type != R_ARM_THM_CALL)
7541 && (r_type != R_ARM_THM_JUMP24))
8029a119
NC		 7542 {
7543 if (elf32_thumb_to_arm_stub
7544 (info, sym_name, input_bfd, output_bfd, input_section,
7545 hit_data, sym_sec, rel->r_offset, signed_addend, value,
7546 error_message))
7547 return bfd_reloc_ok;
7548 else
7549 return bfd_reloc_dangerous;
7550 }
da5938a2 7551 }
bd97cb95
DJ		 7552 else if (sym_flags == STT_ARM_TFUNC && globals->use_blx
7553 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7554 {
7555 /* Make sure this is a BL. */
7556 lower_insn |= 0x1800;
7557 }
252b5132 7558 }
f21f3fe0 7559
fe33d2fa 7560 enum elf32_arm_stub_type stub_type = arm_stub_none;
155d87d7 7561 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca
NC		 7562 {
7563 /* Check if a stub has to be inserted because the destination
8029a119 7564 is too far. */
fe33d2fa
CL		 7565 struct elf32_arm_stub_hash_entry *stub_entry;
7566 struct elf32_arm_link_hash_entry *hash;
7567
7568 hash = (struct elf32_arm_link_hash_entry *) h;
7569
7570 stub_type = arm_type_of_stub (info, input_section, rel,
7571 &sym_flags, hash, value, sym_sec,
7572 input_bfd, sym_name);
7573
7574 if (stub_type != arm_stub_none)
906e58ca
NC		 7575 {
7576 /* The target is out of reach or we are changing modes, so
7577 redirect the branch to the local stub for this
7578 function. */
7579 stub_entry = elf32_arm_get_stub_entry (input_section,
7580 sym_sec, h,
fe33d2fa
CL		 7581 rel, globals,
7582 stub_type);
906e58ca
NC		 7583 if (stub_entry != NULL)
7584 value = (stub_entry->stub_offset
7585 + stub_entry->stub_sec->output_offset
7586 + stub_entry->stub_sec->output_section->vma);
7587
f4ac8484 7588 /* If this call becomes a call to Arm, force BLX. */
155d87d7 7589 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
f4ac8484
DJ		 7590 {
7591 if ((stub_entry
7592 && !arm_stub_is_thumb (stub_entry->stub_type))
7593 || (sym_flags != STT_ARM_TFUNC))
7594 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7595 }
906e58ca
NC		 7596 }
7597 }
7598
fe33d2fa
CL		 7599 /* Handle calls via the PLT. */
7600 if (stub_type == arm_stub_none
7601 && h != NULL
7602 && splt != NULL
7603 && h->plt.offset != (bfd_vma) -1)
7604 {
7605 value = (splt->output_section->vma
7606 + splt->output_offset
7607 + h->plt.offset);
7608
7609 if (globals->use_blx && r_type == R_ARM_THM_CALL)
7610 {
7611 /* If the Thumb BLX instruction is available, convert
7612 the BL to a BLX instruction to call the ARM-mode
7613 PLT entry. */
7614 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7615 sym_flags = STT_FUNC;
7616 }
7617 else
7618 {
7619 /* Target the Thumb stub before the ARM PLT entry. */
7620 value -= PLT_THUMB_STUB_SIZE;
7621 sym_flags = STT_ARM_TFUNC;
7622 }
7623 *unresolved_reloc_p = FALSE;
7624 }
7625
ba96a88f 7626 relocation = value + signed_addend;
f21f3fe0 7627
252b5132 7628 relocation -= (input_section->output_section->vma
ba96a88f
NC		 7629 + input_section->output_offset
7630 + rel->r_offset);
9a5aca8c 7631
252b5132
RH		 7632 check = relocation >> howto->rightshift;
7633
7634 /* If this is a signed value, the rightshift just dropped
7635 leading 1 bits (assuming twos complement). */
7636 if ((bfd_signed_vma) relocation >= 0)
7637 signed_check = check;
7638 else
7639 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
7640
e95de063
MS		 7641 /* Calculate the permissable maximum and minimum values for
7642 this relocation according to whether we're relocating for
7643 Thumb-2 or not. */
7644 bitsize = howto->bitsize;
7645 if (!thumb2)
7646 bitsize -= 2;
f6ebfac0 7647 reloc_signed_max = (1 << (bitsize - 1)) - 1;
e95de063
MS		 7648 reloc_signed_min = ~reloc_signed_max;
7649
252b5132 7650 /* Assumes two's complement. */
ba96a88f 7651 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 7652 overflow = TRUE;
252b5132 7653
bd97cb95 7654 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 7655 /* For a BLX instruction, make sure that the relocation is rounded up
7656 to a word boundary. This follows the semantics of the instruction
7657 which specifies that bit 1 of the target address will come from bit
7658 1 of the base address. */
7659 relocation = (relocation + 2) & ~ 3;
cb1afa5c 7660
e95de063
MS		 7661 /* Put RELOCATION back into the insn. Assumes two's complement.
7662 We use the Thumb-2 encoding, which is safe even if dealing with
7663 a Thumb-1 instruction by virtue of our overflow check above. */
7664 reloc_sign = (signed_check < 0) ? 1 : 0;
7665 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
7666 | ((relocation >> 12) & 0x3ff)
7667 | (reloc_sign << 10);
906e58ca 7668 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
e95de063
MS		 7669 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
7670 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
7671 | ((relocation >> 1) & 0x7ff);
c62e1cc3 7672
252b5132
RH		 7673 /* Put the relocated value back in the object file: */
7674 bfd_put_16 (input_bfd, upper_insn, hit_data);
7675 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
7676
7677 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
7678 }
7679 break;
7680
c19d1205
ZW		 7681 case R_ARM_THM_JUMP19:
7682 /* Thumb32 conditional branch instruction. */
7683 {
7684 bfd_vma relocation;
7685 bfd_boolean overflow = FALSE;
7686 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7687 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 7688 bfd_signed_vma reloc_signed_max = 0xffffe;
7689 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 7690 bfd_signed_vma signed_check;
7691
7692 /* Need to refetch the addend, reconstruct the top three bits,
7693 and squish the two 11 bit pieces together. */
7694 if (globals->use_rel)
7695 {
7696 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 7697 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 7698 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
7699 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
7700 bfd_vma lower = (lower_insn & 0x07ff);
7701
a00a1f35
MS		 7702 upper |= J1 << 6;
7703 upper |= J2 << 7;
7704 upper |= (!S) << 8;
c19d1205
ZW		 7705 upper -= 0x0100; /* Sign extend. */
7706
7707 addend = (upper << 12) | (lower << 1);
7708 signed_addend = addend;
7709 }
7710
bd97cb95
DJ		 7711 /* Handle calls via the PLT. */
7712 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
7713 {
7714 value = (splt->output_section->vma
7715 + splt->output_offset
7716 + h->plt.offset);
7717 /* Target the Thumb stub before the ARM PLT entry. */
7718 value -= PLT_THUMB_STUB_SIZE;
7719 *unresolved_reloc_p = FALSE;
7720 }
7721
c19d1205
ZW		 7722 /* ??? Should handle interworking? GCC might someday try to
7723 use this for tail calls. */
7724
7725 relocation = value + signed_addend;
7726 relocation -= (input_section->output_section->vma
7727 + input_section->output_offset
7728 + rel->r_offset);
a00a1f35 7729 signed_check = (bfd_signed_vma) relocation;
c19d1205 7730
c19d1205
ZW		 7731 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
7732 overflow = TRUE;
7733
7734 /* Put RELOCATION back into the insn. */
7735 {
7736 bfd_vma S = (relocation & 0x00100000) >> 20;
7737 bfd_vma J2 = (relocation & 0x00080000) >> 19;
7738 bfd_vma J1 = (relocation & 0x00040000) >> 18;
7739 bfd_vma hi = (relocation & 0x0003f000) >> 12;
7740 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
7741
a00a1f35 7742 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 7743 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
7744 }
7745
7746 /* Put the relocated value back in the object file: */
7747 bfd_put_16 (input_bfd, upper_insn, hit_data);
7748 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
7749
7750 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
7751 }
7752
7753 case R_ARM_THM_JUMP11:
7754 case R_ARM_THM_JUMP8:
7755 case R_ARM_THM_JUMP6:
51c5503b
NC		 7756 /* Thumb B (branch) instruction). */
7757 {
6cf9e9fe 7758 bfd_signed_vma relocation;
51c5503b
NC		 7759 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
7760 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 7761 bfd_signed_vma signed_check;
7762
c19d1205
ZW		 7763 /* CZB cannot jump backward. */
7764 if (r_type == R_ARM_THM_JUMP6)
7765 reloc_signed_min = 0;
7766
4e7fd91e 7767 if (globals->use_rel)
6cf9e9fe 7768 {
4e7fd91e
PB		 7769 /* Need to refetch addend. */
7770 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7771 if (addend & ((howto->src_mask + 1) >> 1))
7772 {
7773 signed_addend = -1;
7774 signed_addend &= ~ howto->src_mask;
7775 signed_addend |= addend;
7776 }
7777 else
7778 signed_addend = addend;
7779 /* The value in the insn has been right shifted. We need to
7780 undo this, so that we can perform the address calculation
7781 in terms of bytes. */
7782 signed_addend <<= howto->rightshift;
6cf9e9fe 7783 }
6cf9e9fe 7784 relocation = value + signed_addend;
51c5503b
NC		 7785
7786 relocation -= (input_section->output_section->vma
7787 + input_section->output_offset
7788 + rel->r_offset);
7789
6cf9e9fe
NC		 7790 relocation >>= howto->rightshift;
7791 signed_check = relocation;
c19d1205
ZW		 7792
7793 if (r_type == R_ARM_THM_JUMP6)
7794 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
7795 else
7796 relocation &= howto->dst_mask;
51c5503b 7797 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 7798
51c5503b
NC		 7799 bfd_put_16 (input_bfd, relocation, hit_data);
7800
7801 /* Assumes two's complement. */
7802 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
7803 return bfd_reloc_overflow;
7804
7805 return bfd_reloc_ok;
7806 }
cedb70c5 7807
8375c36b
PB		 7808 case R_ARM_ALU_PCREL7_0:
7809 case R_ARM_ALU_PCREL15_8:
7810 case R_ARM_ALU_PCREL23_15:
7811 {
7812 bfd_vma insn;
7813 bfd_vma relocation;
7814
7815 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 7816 if (globals->use_rel)
7817 {
7818 /* Extract the addend. */
7819 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
7820 signed_addend = addend;
7821 }
8375c36b
PB		 7822 relocation = value + signed_addend;
7823
7824 relocation -= (input_section->output_section->vma
7825 + input_section->output_offset
7826 + rel->r_offset);
7827 insn = (insn & ~0xfff)
7828 | ((howto->bitpos << 7) & 0xf00)
7829 | ((relocation >> howto->bitpos) & 0xff);
7830 bfd_put_32 (input_bfd, value, hit_data);
7831 }
7832 return bfd_reloc_ok;
7833
252b5132
RH		 7834 case R_ARM_GNU_VTINHERIT:
7835 case R_ARM_GNU_VTENTRY:
7836 return bfd_reloc_ok;
7837
c19d1205 7838 case R_ARM_GOTOFF32:
252b5132
RH		 7839 /* Relocation is relative to the start of the
7840 global offset table. */
7841
7842 BFD_ASSERT (sgot != NULL);
7843 if (sgot == NULL)
7844 return bfd_reloc_notsupported;
9a5aca8c 7845
cedb70c5 7846 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 7847 address by one, so that attempts to call the function pointer will
7848 correctly interpret it as Thumb code. */
7849 if (sym_flags == STT_ARM_TFUNC)
7850 value += 1;
7851
252b5132
RH		 7852 /* Note that sgot->output_offset is not involved in this
7853 calculation. We always want the start of .got. If we
7854 define _GLOBAL_OFFSET_TABLE in a different way, as is
7855 permitted by the ABI, we might have to change this
9b485d32 7856 calculation. */
252b5132 7857 value -= sgot->output_section->vma;
f21f3fe0 7858 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7859 contents, rel->r_offset, value,
00a97672 7860 rel->r_addend);
252b5132
RH		 7861
7862 case R_ARM_GOTPC:
a7c10850 7863 /* Use global offset table as symbol value. */
252b5132 7864 BFD_ASSERT (sgot != NULL);
f21f3fe0 7865
252b5132
RH		 7866 if (sgot == NULL)
7867 return bfd_reloc_notsupported;
7868
0945cdfd 7869 *unresolved_reloc_p = FALSE;
252b5132 7870 value = sgot->output_section->vma;
f21f3fe0 7871 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7872 contents, rel->r_offset, value,
00a97672 7873 rel->r_addend);
f21f3fe0 7874
252b5132 7875 case R_ARM_GOT32:
eb043451 7876 case R_ARM_GOT_PREL:
252b5132 7877 /* Relocation is to the entry for this symbol in the
9b485d32 7878 global offset table. */
252b5132
RH		 7879 if (sgot == NULL)
7880 return bfd_reloc_notsupported;
f21f3fe0 7881
252b5132
RH		 7882 if (h != NULL)
7883 {
7884 bfd_vma off;
5e681ec4 7885 bfd_boolean dyn;
f21f3fe0 7886
252b5132
RH		 7887 off = h->got.offset;
7888 BFD_ASSERT (off != (bfd_vma) -1);
5e681ec4 7889 dyn = globals->root.dynamic_sections_created;
f21f3fe0 7890
5e681ec4 7891 if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
50d6c878 7892 || (info->shared
5e681ec4
PB		 7893 && SYMBOL_REFERENCES_LOCAL (info, h))
7894 || (ELF_ST_VISIBILITY (h->other)
7895 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 7896 {
7897 /* This is actually a static link, or it is a -Bsymbolic link
7898 and the symbol is defined locally. We must initialize this
7899 entry in the global offset table. Since the offset must
7900 always be a multiple of 4, we use the least significant bit
7901 to record whether we have initialized it already.
f21f3fe0 7902
00a97672 7903 When doing a dynamic link, we create a .rel(a).got relocation
f21f3fe0 7904 entry to initialize the value. This is done in the
9b485d32 7905 finish_dynamic_symbol routine. */
252b5132
RH		 7906 if ((off & 1) != 0)
7907 off &= ~1;
7908 else
7909 {
ee29b9fb
RE		 7910 /* If we are addressing a Thumb function, we need to
7911 adjust the address by one, so that attempts to
7912 call the function pointer will correctly
7913 interpret it as Thumb code. */
7914 if (sym_flags == STT_ARM_TFUNC)
7915 value |= 1;
7916
252b5132
RH		 7917 bfd_put_32 (output_bfd, value, sgot->contents + off);
7918 h->got.offset |= 1;
7919 }
7920 }
0945cdfd
DJ		 7921 else
7922 *unresolved_reloc_p = FALSE;
f21f3fe0 7923
252b5132
RH		 7924 value = sgot->output_offset + off;
7925 }
7926 else
7927 {
7928 bfd_vma off;
f21f3fe0 7929
252b5132
RH		 7930 BFD_ASSERT (local_got_offsets != NULL &&
7931 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 7932
252b5132 7933 off = local_got_offsets[r_symndx];
f21f3fe0 7934
252b5132
RH		 7935 /* The offset must always be a multiple of 4. We use the
7936 least significant bit to record whether we have already
9b485d32 7937 generated the necessary reloc. */
252b5132
RH		 7938 if ((off & 1) != 0)
7939 off &= ~1;
7940 else
7941 {
b7693d02
DJ		 7942 /* If we are addressing a Thumb function, we need to
7943 adjust the address by one, so that attempts to
7944 call the function pointer will correctly
7945 interpret it as Thumb code. */
7946 if (sym_flags == STT_ARM_TFUNC)
7947 value |= 1;
7948
00a97672
RS		 7949 if (globals->use_rel)
7950 bfd_put_32 (output_bfd, value, sgot->contents + off);
f21f3fe0 7951
252b5132
RH		 7952 if (info->shared)
7953 {
7954 asection * srelgot;
947216bf
AM		 7955 Elf_Internal_Rela outrel;
7956 bfd_byte *loc;
f21f3fe0 7957
00a97672
RS		 7958 srelgot = (bfd_get_section_by_name
7959 (dynobj, RELOC_SECTION (globals, ".got")));
252b5132 7960 BFD_ASSERT (srelgot != NULL);
f21f3fe0 7961
00a97672 7962 outrel.r_addend = addend + value;
252b5132 7963 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 7964 + sgot->output_offset
252b5132
RH		 7965 + off);
7966 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
947216bf 7967 loc = srelgot->contents;
00a97672
RS		 7968 loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
7969 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
252b5132 7970 }
f21f3fe0 7971
252b5132
RH		 7972 local_got_offsets[r_symndx] |= 1;
7973 }
f21f3fe0 7974
252b5132
RH		 7975 value = sgot->output_offset + off;
7976 }
eb043451
PB		 7977 if (r_type != R_ARM_GOT32)
7978 value += sgot->output_section->vma;
9a5aca8c 7979
f21f3fe0 7980 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7981 contents, rel->r_offset, value,
00a97672 7982 rel->r_addend);
f21f3fe0 7983
ba93b8ac
DJ		 7984 case R_ARM_TLS_LDO32:
7985 value = value - dtpoff_base (info);
7986
7987 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 7988 contents, rel->r_offset, value,
7989 rel->r_addend);
ba93b8ac
DJ		 7990
7991 case R_ARM_TLS_LDM32:
7992 {
7993 bfd_vma off;
7994
7995 if (globals->sgot == NULL)
7996 abort ();
7997
7998 off = globals->tls_ldm_got.offset;
7999
8000 if ((off & 1) != 0)
8001 off &= ~1;
8002 else
8003 {
8004 /* If we don't know the module number, create a relocation
8005 for it. */
8006 if (info->shared)
8007 {
8008 Elf_Internal_Rela outrel;
8009 bfd_byte *loc;
8010
8011 if (globals->srelgot == NULL)
8012 abort ();
8013
00a97672 8014 outrel.r_addend = 0;
ba93b8ac
DJ		 8015 outrel.r_offset = (globals->sgot->output_section->vma
8016 + globals->sgot->output_offset + off);
8017 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
8018
00a97672
RS		 8019 if (globals->use_rel)
8020 bfd_put_32 (output_bfd, outrel.r_addend,
8021 globals->sgot->contents + off);
ba93b8ac
DJ		 8022
8023 loc = globals->srelgot->contents;
00a97672
RS		 8024 loc += globals->srelgot->reloc_count++ * RELOC_SIZE (globals);
8025 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac
DJ		 8026 }
8027 else
8028 bfd_put_32 (output_bfd, 1, globals->sgot->contents + off);
8029
8030 globals->tls_ldm_got.offset |= 1;
8031 }
8032
906e58ca 8033 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
ba93b8ac
DJ		 8034 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
8035
8036 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8037 contents, rel->r_offset, value,
00a97672 8038 rel->r_addend);
ba93b8ac
DJ		 8039 }
8040
8041 case R_ARM_TLS_GD32:
8042 case R_ARM_TLS_IE32:
8043 {
8044 bfd_vma off;
8045 int indx;
8046 char tls_type;
8047
8048 if (globals->sgot == NULL)
8049 abort ();
8050
8051 indx = 0;
8052 if (h != NULL)
8053 {
8054 bfd_boolean dyn;
8055 dyn = globals->root.dynamic_sections_created;
8056 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
8057 && (!info->shared
8058 || !SYMBOL_REFERENCES_LOCAL (info, h)))
8059 {
8060 *unresolved_reloc_p = FALSE;
8061 indx = h->dynindx;
8062 }
8063 off = h->got.offset;
8064 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
8065 }
8066 else
8067 {
8068 if (local_got_offsets == NULL)
8069 abort ();
8070 off = local_got_offsets[r_symndx];
8071 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
8072 }
8073
8074 if (tls_type == GOT_UNKNOWN)
8075 abort ();
8076
8077 if ((off & 1) != 0)
8078 off &= ~1;
8079 else
8080 {
8081 bfd_boolean need_relocs = FALSE;
8082 Elf_Internal_Rela outrel;
8083 bfd_byte *loc = NULL;
8084 int cur_off = off;
8085
8086 /* The GOT entries have not been initialized yet. Do it
8087 now, and emit any relocations. If both an IE GOT and a
8088 GD GOT are necessary, we emit the GD first. */
8089
8090 if ((info->shared || indx != 0)
8091 && (h == NULL
8092 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8093 || h->root.type != bfd_link_hash_undefweak))
8094 {
8095 need_relocs = TRUE;
8096 if (globals->srelgot == NULL)
8097 abort ();
8098 loc = globals->srelgot->contents;
00a97672 8099 loc += globals->srelgot->reloc_count * RELOC_SIZE (globals);
ba93b8ac
DJ		 8100 }
8101
8102 if (tls_type & GOT_TLS_GD)
8103 {
8104 if (need_relocs)
8105 {
00a97672 8106 outrel.r_addend = 0;
ba93b8ac 8107 outrel.r_offset = (globals->sgot->output_section->vma
00a97672
RS		 8108 + globals->sgot->output_offset
8109 + cur_off);
ba93b8ac 8110 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 8111
00a97672
RS		 8112 if (globals->use_rel)
8113 bfd_put_32 (output_bfd, outrel.r_addend,
8114 globals->sgot->contents + cur_off);
8115
8116 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 8117 globals->srelgot->reloc_count++;
00a97672 8118 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 8119
8120 if (indx == 0)
8121 bfd_put_32 (output_bfd, value - dtpoff_base (info),
8122 globals->sgot->contents + cur_off + 4);
8123 else
8124 {
00a97672 8125 outrel.r_addend = 0;
ba93b8ac
DJ		 8126 outrel.r_info = ELF32_R_INFO (indx,
8127 R_ARM_TLS_DTPOFF32);
8128 outrel.r_offset += 4;
00a97672
RS		 8129
8130 if (globals->use_rel)
8131 bfd_put_32 (output_bfd, outrel.r_addend,
8132 globals->sgot->contents + cur_off + 4);
8133
8134
8135 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 8136 globals->srelgot->reloc_count++;
00a97672 8137 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 8138 }
8139 }
8140 else
8141 {
8142 /* If we are not emitting relocations for a
8143 general dynamic reference, then we must be in a
8144 static link or an executable link with the
8145 symbol binding locally. Mark it as belonging
8146 to module 1, the executable. */
8147 bfd_put_32 (output_bfd, 1,
8148 globals->sgot->contents + cur_off);
8149 bfd_put_32 (output_bfd, value - dtpoff_base (info),
8150 globals->sgot->contents + cur_off + 4);
8151 }
8152
8153 cur_off += 8;
8154 }
8155
8156 if (tls_type & GOT_TLS_IE)
8157 {
8158 if (need_relocs)
8159 {
00a97672
RS		 8160 if (indx == 0)
8161 outrel.r_addend = value - dtpoff_base (info);
8162 else
8163 outrel.r_addend = 0;
ba93b8ac
DJ		 8164 outrel.r_offset = (globals->sgot->output_section->vma
8165 + globals->sgot->output_offset
8166 + cur_off);
8167 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
8168
00a97672
RS		 8169 if (globals->use_rel)
8170 bfd_put_32 (output_bfd, outrel.r_addend,
ba93b8ac
DJ		 8171 globals->sgot->contents + cur_off);
8172
00a97672 8173 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 8174 globals->srelgot->reloc_count++;
00a97672 8175 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 8176 }
8177 else
8178 bfd_put_32 (output_bfd, tpoff (info, value),
8179 globals->sgot->contents + cur_off);
8180 cur_off += 4;
8181 }
8182
8183 if (h != NULL)
8184 h->got.offset |= 1;
8185 else
8186 local_got_offsets[r_symndx] |= 1;
8187 }
8188
8189 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
8190 off += 8;
906e58ca 8191 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
ba93b8ac
DJ		 8192 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
8193
8194 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8195 contents, rel->r_offset, value,
00a97672 8196 rel->r_addend);
ba93b8ac
DJ		 8197 }
8198
8199 case R_ARM_TLS_LE32:
8200 if (info->shared)
8201 {
8202 (*_bfd_error_handler)
8203 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
8204 input_bfd, input_section,
8205 (long) rel->r_offset, howto->name);
21d799b5 8206 return (bfd_reloc_status_type) FALSE;
ba93b8ac
DJ		 8207 }
8208 else
8209 value = tpoff (info, value);
906e58ca 8210
ba93b8ac 8211 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 8212 contents, rel->r_offset, value,
8213 rel->r_addend);
ba93b8ac 8214
319850b4
JB		 8215 case R_ARM_V4BX:
8216 if (globals->fix_v4bx)
845b51d6
PB		 8217 {
8218 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 8219
845b51d6
PB		 8220 /* Ensure that we have a BX instruction. */
8221 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 8222
845b51d6
PB		 8223 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
8224 {
8225 /* Branch to veneer. */
8226 bfd_vma glue_addr;
8227 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
8228 glue_addr -= input_section->output_section->vma
8229 + input_section->output_offset
8230 + rel->r_offset + 8;
8231 insn = (insn & 0xf0000000) | 0x0a000000
8232 | ((glue_addr >> 2) & 0x00ffffff);
8233 }
8234 else
8235 {
8236 /* Preserve Rm (lowest four bits) and the condition code
8237 (highest four bits). Other bits encode MOV PC,Rm. */
8238 insn = (insn & 0xf000000f) | 0x01a0f000;
8239 }
319850b4 8240
845b51d6
PB		 8241 bfd_put_32 (input_bfd, insn, hit_data);
8242 }
319850b4
JB		 8243 return bfd_reloc_ok;
8244
b6895b4f
PB		 8245 case R_ARM_MOVW_ABS_NC:
8246 case R_ARM_MOVT_ABS:
8247 case R_ARM_MOVW_PREL_NC:
8248 case R_ARM_MOVT_PREL:
92f5d02b
MS		 8249 /* Until we properly support segment-base-relative addressing then
8250 we assume the segment base to be zero, as for the group relocations.
8251 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
8252 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
8253 case R_ARM_MOVW_BREL_NC:
8254 case R_ARM_MOVW_BREL:
8255 case R_ARM_MOVT_BREL:
b6895b4f
PB		 8256 {
8257 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8258
8259 if (globals->use_rel)
8260 {
8261 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 8262 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 8263 }
92f5d02b 8264
b6895b4f 8265 value += signed_addend;
b6895b4f
PB		 8266
8267 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
8268 value -= (input_section->output_section->vma
8269 + input_section->output_offset + rel->r_offset);
8270
92f5d02b
MS		 8271 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
8272 return bfd_reloc_overflow;
8273
8274 if (sym_flags == STT_ARM_TFUNC)
8275 value |= 1;
8276
8277 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
8278 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 8279 value >>= 16;
8280
8281 insn &= 0xfff0f000;
8282 insn |= value & 0xfff;
8283 insn |= (value & 0xf000) << 4;
8284 bfd_put_32 (input_bfd, insn, hit_data);
8285 }
8286 return bfd_reloc_ok;
8287
8288 case R_ARM_THM_MOVW_ABS_NC:
8289 case R_ARM_THM_MOVT_ABS:
8290 case R_ARM_THM_MOVW_PREL_NC:
8291 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 8292 /* Until we properly support segment-base-relative addressing then
8293 we assume the segment base to be zero, as for the above relocations.
8294 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
8295 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
8296 as R_ARM_THM_MOVT_ABS. */
8297 case R_ARM_THM_MOVW_BREL_NC:
8298 case R_ARM_THM_MOVW_BREL:
8299 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 8300 {
8301 bfd_vma insn;
906e58ca 8302
b6895b4f
PB		 8303 insn = bfd_get_16 (input_bfd, hit_data) << 16;
8304 insn |= bfd_get_16 (input_bfd, hit_data + 2);
8305
8306 if (globals->use_rel)
8307 {
8308 addend = ((insn >> 4) & 0xf000)
8309 | ((insn >> 15) & 0x0800)
8310 | ((insn >> 4) & 0x0700)
8311 | (insn & 0x00ff);
39623e12 8312 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 8313 }
92f5d02b 8314
b6895b4f 8315 value += signed_addend;
b6895b4f
PB		 8316
8317 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
8318 value -= (input_section->output_section->vma
8319 + input_section->output_offset + rel->r_offset);
8320
92f5d02b
MS		 8321 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
8322 return bfd_reloc_overflow;
8323
8324 if (sym_flags == STT_ARM_TFUNC)
8325 value |= 1;
8326
8327 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
8328 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 8329 value >>= 16;
8330
8331 insn &= 0xfbf08f00;
8332 insn |= (value & 0xf000) << 4;
8333 insn |= (value & 0x0800) << 15;
8334 insn |= (value & 0x0700) << 4;
8335 insn |= (value & 0x00ff);
8336
8337 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8338 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8339 }
8340 return bfd_reloc_ok;
8341
4962c51a
MS		 8342 case R_ARM_ALU_PC_G0_NC:
8343 case R_ARM_ALU_PC_G1_NC:
8344 case R_ARM_ALU_PC_G0:
8345 case R_ARM_ALU_PC_G1:
8346 case R_ARM_ALU_PC_G2:
8347 case R_ARM_ALU_SB_G0_NC:
8348 case R_ARM_ALU_SB_G1_NC:
8349 case R_ARM_ALU_SB_G0:
8350 case R_ARM_ALU_SB_G1:
8351 case R_ARM_ALU_SB_G2:
8352 {
8353 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8354 bfd_vma pc = input_section->output_section->vma
8355 + input_section->output_offset + rel->r_offset;
8356 /* sb should be the origin of the *segment* containing the symbol.
8357 It is not clear how to obtain this OS-dependent value, so we
8358 make an arbitrary choice of zero. */
8359 bfd_vma sb = 0;
8360 bfd_vma residual;
8361 bfd_vma g_n;
8362 bfd_signed_vma signed_value;
8363 int group = 0;
8364
8365 /* Determine which group of bits to select. */
8366 switch (r_type)
8367 {
8368 case R_ARM_ALU_PC_G0_NC:
8369 case R_ARM_ALU_PC_G0:
8370 case R_ARM_ALU_SB_G0_NC:
8371 case R_ARM_ALU_SB_G0:
8372 group = 0;
8373 break;
8374
8375 case R_ARM_ALU_PC_G1_NC:
8376 case R_ARM_ALU_PC_G1:
8377 case R_ARM_ALU_SB_G1_NC:
8378 case R_ARM_ALU_SB_G1:
8379 group = 1;
8380 break;
8381
8382 case R_ARM_ALU_PC_G2:
8383 case R_ARM_ALU_SB_G2:
8384 group = 2;
8385 break;
8386
8387 default:
906e58ca 8388 abort ();
4962c51a
MS		 8389 }
8390
8391 /* If REL, extract the addend from the insn. If RELA, it will
8392 have already been fetched for us. */
8393 if (globals->use_rel)
8394 {
8395 int negative;
8396 bfd_vma constant = insn & 0xff;
8397 bfd_vma rotation = (insn & 0xf00) >> 8;
8398
8399 if (rotation == 0)
8400 signed_addend = constant;
8401 else
8402 {
8403 /* Compensate for the fact that in the instruction, the
8404 rotation is stored in multiples of 2 bits. */
8405 rotation *= 2;
8406
8407 /* Rotate "constant" right by "rotation" bits. */
8408 signed_addend = (constant >> rotation) |
8409 (constant << (8 * sizeof (bfd_vma) - rotation));
8410 }
8411
8412 /* Determine if the instruction is an ADD or a SUB.
8413 (For REL, this determines the sign of the addend.) */
8414 negative = identify_add_or_sub (insn);
8415 if (negative == 0)
8416 {
8417 (*_bfd_error_handler)
8418 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
8419 input_bfd, input_section,
8420 (long) rel->r_offset, howto->name);
906e58ca 8421 return bfd_reloc_overflow;
4962c51a
MS		 8422 }
8423
8424 signed_addend *= negative;
8425 }
8426
8427 /* Compute the value (X) to go in the place. */
8428 if (r_type == R_ARM_ALU_PC_G0_NC
8429 || r_type == R_ARM_ALU_PC_G1_NC
8430 || r_type == R_ARM_ALU_PC_G0
8431 || r_type == R_ARM_ALU_PC_G1
8432 || r_type == R_ARM_ALU_PC_G2)
8433 /* PC relative. */
8434 signed_value = value - pc + signed_addend;
8435 else
8436 /* Section base relative. */
8437 signed_value = value - sb + signed_addend;
8438
8439 /* If the target symbol is a Thumb function, then set the
8440 Thumb bit in the address. */
8441 if (sym_flags == STT_ARM_TFUNC)
8442 signed_value |= 1;
8443
8444 /* Calculate the value of the relevant G_n, in encoded
8445 constant-with-rotation format. */
8446 g_n = calculate_group_reloc_mask (abs (signed_value), group,
8447 &residual);
8448
8449 /* Check for overflow if required. */
8450 if ((r_type == R_ARM_ALU_PC_G0
8451 || r_type == R_ARM_ALU_PC_G1
8452 || r_type == R_ARM_ALU_PC_G2
8453 || r_type == R_ARM_ALU_SB_G0
8454 || r_type == R_ARM_ALU_SB_G1
8455 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
8456 {
8457 (*_bfd_error_handler)
8458 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8459 input_bfd, input_section,
8460 (long) rel->r_offset, abs (signed_value), howto->name);
8461 return bfd_reloc_overflow;
8462 }
8463
8464 /* Mask out the value and the ADD/SUB part of the opcode; take care
8465 not to destroy the S bit. */
8466 insn &= 0xff1ff000;
8467
8468 /* Set the opcode according to whether the value to go in the
8469 place is negative. */
8470 if (signed_value < 0)
8471 insn |= 1 << 22;
8472 else
8473 insn |= 1 << 23;
8474
8475 /* Encode the offset. */
8476 insn |= g_n;
8477
8478 bfd_put_32 (input_bfd, insn, hit_data);
8479 }
8480 return bfd_reloc_ok;
8481
8482 case R_ARM_LDR_PC_G0:
8483 case R_ARM_LDR_PC_G1:
8484 case R_ARM_LDR_PC_G2:
8485 case R_ARM_LDR_SB_G0:
8486 case R_ARM_LDR_SB_G1:
8487 case R_ARM_LDR_SB_G2:
8488 {
8489 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8490 bfd_vma pc = input_section->output_section->vma
8491 + input_section->output_offset + rel->r_offset;
8492 bfd_vma sb = 0; /* See note above. */
8493 bfd_vma residual;
8494 bfd_signed_vma signed_value;
8495 int group = 0;
8496
8497 /* Determine which groups of bits to calculate. */
8498 switch (r_type)
8499 {
8500 case R_ARM_LDR_PC_G0:
8501 case R_ARM_LDR_SB_G0:
8502 group = 0;
8503 break;
8504
8505 case R_ARM_LDR_PC_G1:
8506 case R_ARM_LDR_SB_G1:
8507 group = 1;
8508 break;
8509
8510 case R_ARM_LDR_PC_G2:
8511 case R_ARM_LDR_SB_G2:
8512 group = 2;
8513 break;
8514
8515 default:
906e58ca 8516 abort ();
4962c51a
MS		 8517 }
8518
8519 /* If REL, extract the addend from the insn. If RELA, it will
8520 have already been fetched for us. */
8521 if (globals->use_rel)
8522 {
8523 int negative = (insn & (1 << 23)) ? 1 : -1;
8524 signed_addend = negative * (insn & 0xfff);
8525 }
8526
8527 /* Compute the value (X) to go in the place. */
8528 if (r_type == R_ARM_LDR_PC_G0
8529 || r_type == R_ARM_LDR_PC_G1
8530 || r_type == R_ARM_LDR_PC_G2)
8531 /* PC relative. */
8532 signed_value = value - pc + signed_addend;
8533 else
8534 /* Section base relative. */
8535 signed_value = value - sb + signed_addend;
8536
8537 /* Calculate the value of the relevant G_{n-1} to obtain
8538 the residual at that stage. */
8539 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8540
8541 /* Check for overflow. */
8542 if (residual >= 0x1000)
8543 {
8544 (*_bfd_error_handler)
8545 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8546 input_bfd, input_section,
8547 (long) rel->r_offset, abs (signed_value), howto->name);
8548 return bfd_reloc_overflow;
8549 }
8550
8551 /* Mask out the value and U bit. */
8552 insn &= 0xff7ff000;
8553
8554 /* Set the U bit if the value to go in the place is non-negative. */
8555 if (signed_value >= 0)
8556 insn |= 1 << 23;
8557
8558 /* Encode the offset. */
8559 insn |= residual;
8560
8561 bfd_put_32 (input_bfd, insn, hit_data);
8562 }
8563 return bfd_reloc_ok;
8564
8565 case R_ARM_LDRS_PC_G0:
8566 case R_ARM_LDRS_PC_G1:
8567 case R_ARM_LDRS_PC_G2:
8568 case R_ARM_LDRS_SB_G0:
8569 case R_ARM_LDRS_SB_G1:
8570 case R_ARM_LDRS_SB_G2:
8571 {
8572 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8573 bfd_vma pc = input_section->output_section->vma
8574 + input_section->output_offset + rel->r_offset;
8575 bfd_vma sb = 0; /* See note above. */
8576 bfd_vma residual;
8577 bfd_signed_vma signed_value;
8578 int group = 0;
8579
8580 /* Determine which groups of bits to calculate. */
8581 switch (r_type)
8582 {
8583 case R_ARM_LDRS_PC_G0:
8584 case R_ARM_LDRS_SB_G0:
8585 group = 0;
8586 break;
8587
8588 case R_ARM_LDRS_PC_G1:
8589 case R_ARM_LDRS_SB_G1:
8590 group = 1;
8591 break;
8592
8593 case R_ARM_LDRS_PC_G2:
8594 case R_ARM_LDRS_SB_G2:
8595 group = 2;
8596 break;
8597
8598 default:
906e58ca 8599 abort ();
4962c51a
MS		 8600 }
8601
8602 /* If REL, extract the addend from the insn. If RELA, it will
8603 have already been fetched for us. */
8604 if (globals->use_rel)
8605 {
8606 int negative = (insn & (1 << 23)) ? 1 : -1;
8607 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
8608 }
8609
8610 /* Compute the value (X) to go in the place. */
8611 if (r_type == R_ARM_LDRS_PC_G0
8612 || r_type == R_ARM_LDRS_PC_G1
8613 || r_type == R_ARM_LDRS_PC_G2)
8614 /* PC relative. */
8615 signed_value = value - pc + signed_addend;
8616 else
8617 /* Section base relative. */
8618 signed_value = value - sb + signed_addend;
8619
8620 /* Calculate the value of the relevant G_{n-1} to obtain
8621 the residual at that stage. */
8622 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8623
8624 /* Check for overflow. */
8625 if (residual >= 0x100)
8626 {
8627 (*_bfd_error_handler)
8628 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8629 input_bfd, input_section,
8630 (long) rel->r_offset, abs (signed_value), howto->name);
8631 return bfd_reloc_overflow;
8632 }
8633
8634 /* Mask out the value and U bit. */
8635 insn &= 0xff7ff0f0;
8636
8637 /* Set the U bit if the value to go in the place is non-negative. */
8638 if (signed_value >= 0)
8639 insn |= 1 << 23;
8640
8641 /* Encode the offset. */
8642 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
8643
8644 bfd_put_32 (input_bfd, insn, hit_data);
8645 }
8646 return bfd_reloc_ok;
8647
8648 case R_ARM_LDC_PC_G0:
8649 case R_ARM_LDC_PC_G1:
8650 case R_ARM_LDC_PC_G2:
8651 case R_ARM_LDC_SB_G0:
8652 case R_ARM_LDC_SB_G1:
8653 case R_ARM_LDC_SB_G2:
8654 {
8655 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8656 bfd_vma pc = input_section->output_section->vma
8657 + input_section->output_offset + rel->r_offset;
8658 bfd_vma sb = 0; /* See note above. */
8659 bfd_vma residual;
8660 bfd_signed_vma signed_value;
8661 int group = 0;
8662
8663 /* Determine which groups of bits to calculate. */
8664 switch (r_type)
8665 {
8666 case R_ARM_LDC_PC_G0:
8667 case R_ARM_LDC_SB_G0:
8668 group = 0;
8669 break;
8670
8671 case R_ARM_LDC_PC_G1:
8672 case R_ARM_LDC_SB_G1:
8673 group = 1;
8674 break;
8675
8676 case R_ARM_LDC_PC_G2:
8677 case R_ARM_LDC_SB_G2:
8678 group = 2;
8679 break;
8680
8681 default:
906e58ca 8682 abort ();
4962c51a
MS		 8683 }
8684
8685 /* If REL, extract the addend from the insn. If RELA, it will
8686 have already been fetched for us. */
8687 if (globals->use_rel)
8688 {
8689 int negative = (insn & (1 << 23)) ? 1 : -1;
8690 signed_addend = negative * ((insn & 0xff) << 2);
8691 }
8692
8693 /* Compute the value (X) to go in the place. */
8694 if (r_type == R_ARM_LDC_PC_G0
8695 || r_type == R_ARM_LDC_PC_G1
8696 || r_type == R_ARM_LDC_PC_G2)
8697 /* PC relative. */
8698 signed_value = value - pc + signed_addend;
8699 else
8700 /* Section base relative. */
8701 signed_value = value - sb + signed_addend;
8702
8703 /* Calculate the value of the relevant G_{n-1} to obtain
8704 the residual at that stage. */
8705 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8706
8707 /* Check for overflow. (The absolute value to go in the place must be
8708 divisible by four and, after having been divided by four, must
8709 fit in eight bits.) */
8710 if ((residual & 0x3) != 0 || residual >= 0x400)
8711 {
8712 (*_bfd_error_handler)
8713 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8714 input_bfd, input_section,
8715 (long) rel->r_offset, abs (signed_value), howto->name);
8716 return bfd_reloc_overflow;
8717 }
8718
8719 /* Mask out the value and U bit. */
8720 insn &= 0xff7fff00;
8721
8722 /* Set the U bit if the value to go in the place is non-negative. */
8723 if (signed_value >= 0)
8724 insn |= 1 << 23;
8725
8726 /* Encode the offset. */
8727 insn |= residual >> 2;
8728
8729 bfd_put_32 (input_bfd, insn, hit_data);
8730 }
8731 return bfd_reloc_ok;
8732
252b5132
RH		 8733 default:
8734 return bfd_reloc_notsupported;
8735 }
8736}
8737
98c1d4aa
NC		 8738/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
8739static void
57e8b36a
NC		 8740arm_add_to_rel (bfd * abfd,
8741 bfd_byte * address,
8742 reloc_howto_type * howto,
8743 bfd_signed_vma increment)
98c1d4aa 8744{
98c1d4aa
NC		 8745 bfd_signed_vma addend;
8746
bd97cb95
DJ		 8747 if (howto->type == R_ARM_THM_CALL
8748 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 8749 {
9a5aca8c
AM		 8750 int upper_insn, lower_insn;
8751 int upper, lower;
98c1d4aa 8752
9a5aca8c
AM		 8753 upper_insn = bfd_get_16 (abfd, address);
8754 lower_insn = bfd_get_16 (abfd, address + 2);
8755 upper = upper_insn & 0x7ff;
8756 lower = lower_insn & 0x7ff;
8757
8758 addend = (upper << 12) | (lower << 1);
ddda4409 8759 addend += increment;
9a5aca8c 8760 addend >>= 1;
98c1d4aa 8761
9a5aca8c
AM		 8762 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
8763 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
8764
dc810e39
AM		 8765 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
8766 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 8767 }
8768 else
8769 {
8770 bfd_vma contents;
8771
8772 contents = bfd_get_32 (abfd, address);
8773
8774 /* Get the (signed) value from the instruction. */
8775 addend = contents & howto->src_mask;
8776 if (addend & ((howto->src_mask + 1) >> 1))
8777 {
8778 bfd_signed_vma mask;
8779
8780 mask = -1;
8781 mask &= ~ howto->src_mask;
8782 addend |= mask;
8783 }
8784
8785 /* Add in the increment, (which is a byte value). */
8786 switch (howto->type)
8787 {
8788 default:
8789 addend += increment;
8790 break;
8791
8792 case R_ARM_PC24:
c6596c5e 8793 case R_ARM_PLT32:
5b5bb741
PB		 8794 case R_ARM_CALL:
8795 case R_ARM_JUMP24:
9a5aca8c 8796 addend <<= howto->size;
dc810e39 8797 addend += increment;
9a5aca8c
AM		 8798
8799 /* Should we check for overflow here ? */
8800
8801 /* Drop any undesired bits. */
8802 addend >>= howto->rightshift;
8803 break;
8804 }
8805
8806 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
8807
8808 bfd_put_32 (abfd, contents, address);
ddda4409 8809 }
98c1d4aa 8810}
252b5132 8811
ba93b8ac
DJ		 8812#define IS_ARM_TLS_RELOC(R_TYPE) \
8813 ((R_TYPE) == R_ARM_TLS_GD32 \
8814 || (R_TYPE) == R_ARM_TLS_LDO32 \
8815 || (R_TYPE) == R_ARM_TLS_LDM32 \
8816 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
8817 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
8818 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
8819 || (R_TYPE) == R_ARM_TLS_LE32 \
8820 || (R_TYPE) == R_ARM_TLS_IE32)
8821
252b5132 8822/* Relocate an ARM ELF section. */
906e58ca 8823
b34976b6 8824static bfd_boolean
57e8b36a
NC		 8825elf32_arm_relocate_section (bfd * output_bfd,
8826 struct bfd_link_info * info,
8827 bfd * input_bfd,
8828 asection * input_section,
8829 bfd_byte * contents,
8830 Elf_Internal_Rela * relocs,
8831 Elf_Internal_Sym * local_syms,
8832 asection ** local_sections)
252b5132 8833{
b34976b6
AM		 8834 Elf_Internal_Shdr *symtab_hdr;
8835 struct elf_link_hash_entry **sym_hashes;
8836 Elf_Internal_Rela *rel;
8837 Elf_Internal_Rela *relend;
8838 const char *name;
b32d3aa2 8839 struct elf32_arm_link_hash_table * globals;
252b5132 8840
4e7fd91e 8841 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 8842 if (globals == NULL)
8843 return FALSE;
b491616a 8844
0ffa91dd 8845 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 8846 sym_hashes = elf_sym_hashes (input_bfd);
8847
8848 rel = relocs;
8849 relend = relocs + input_section->reloc_count;
8850 for (; rel < relend; rel++)
8851 {
ba96a88f
NC		 8852 int r_type;
8853 reloc_howto_type * howto;
8854 unsigned long r_symndx;
8855 Elf_Internal_Sym * sym;
8856 asection * sec;
252b5132 8857 struct elf_link_hash_entry * h;
ba96a88f
NC		 8858 bfd_vma relocation;
8859 bfd_reloc_status_type r;
8860 arelent bfd_reloc;
ba93b8ac 8861 char sym_type;
0945cdfd 8862 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 8863 char *error_message = NULL;
f21f3fe0 8864
252b5132 8865 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 8866 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 8867 r_type = arm_real_reloc_type (globals, r_type);
252b5132 8868
ba96a88f
NC		 8869 if ( r_type == R_ARM_GNU_VTENTRY
8870 || r_type == R_ARM_GNU_VTINHERIT)
252b5132
RH		 8871 continue;
8872
b32d3aa2 8873 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 8874 howto = bfd_reloc.howto;
252b5132 8875
252b5132
RH		 8876 h = NULL;
8877 sym = NULL;
8878 sec = NULL;
9b485d32 8879
252b5132
RH		 8880 if (r_symndx < symtab_hdr->sh_info)
8881 {
8882 sym = local_syms + r_symndx;
ba93b8ac 8883 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 8884 sec = local_sections[r_symndx];
ffcb4889
NS		 8885
8886 /* An object file might have a reference to a local
8887 undefined symbol. This is a daft object file, but we
8888 should at least do something about it. V4BX & NONE
8889 relocations do not use the symbol and are explicitly
77b4f08f
TS		 8890 allowed to use the undefined symbol, so allow those.
8891 Likewise for relocations against STN_UNDEF. */
ffcb4889
NS		 8892 if (r_type != R_ARM_V4BX
8893 && r_type != R_ARM_NONE
77b4f08f 8894 && r_symndx != STN_UNDEF
ffcb4889
NS		 8895 && bfd_is_und_section (sec)
8896 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
8897 {
8898 if (!info->callbacks->undefined_symbol
8899 (info, bfd_elf_string_from_elf_section
8900 (input_bfd, symtab_hdr->sh_link, sym->st_name),
8901 input_bfd, input_section,
8902 rel->r_offset, TRUE))
8903 return FALSE;
8904 }
8905
4e7fd91e 8906 if (globals->use_rel)
f8df10f4 8907 {
4e7fd91e
PB		 8908 relocation = (sec->output_section->vma
8909 + sec->output_offset
8910 + sym->st_value);
ab96bf03
AM		 8911 if (!info->relocatable
8912 && (sec->flags & SEC_MERGE)
8913 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 8914 {
4e7fd91e
PB		 8915 asection *msec;
8916 bfd_vma addend, value;
8917
39623e12 8918 switch (r_type)
4e7fd91e 8919 {
39623e12
PB		 8920 case R_ARM_MOVW_ABS_NC:
8921 case R_ARM_MOVT_ABS:
8922 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
8923 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
8924 addend = (addend ^ 0x8000) - 0x8000;
8925 break;
f8df10f4 8926
39623e12
PB		 8927 case R_ARM_THM_MOVW_ABS_NC:
8928 case R_ARM_THM_MOVT_ABS:
8929 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
8930 << 16;
8931 value |= bfd_get_16 (input_bfd,
8932 contents + rel->r_offset + 2);
8933 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
8934 | ((value & 0x04000000) >> 15);
8935 addend = (addend ^ 0x8000) - 0x8000;
8936 break;
f8df10f4 8937
39623e12
PB		 8938 default:
8939 if (howto->rightshift
8940 || (howto->src_mask & (howto->src_mask + 1)))
8941 {
8942 (*_bfd_error_handler)
8943 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
8944 input_bfd, input_section,
8945 (long) rel->r_offset, howto->name);
8946 return FALSE;
8947 }
8948
8949 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
8950
8951 /* Get the (signed) value from the instruction. */
8952 addend = value & howto->src_mask;
8953 if (addend & ((howto->src_mask + 1) >> 1))
8954 {
8955 bfd_signed_vma mask;
8956
8957 mask = -1;
8958 mask &= ~ howto->src_mask;
8959 addend |= mask;
8960 }
8961 break;
4e7fd91e 8962 }
39623e12 8963
4e7fd91e
PB		 8964 msec = sec;
8965 addend =
8966 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
8967 - relocation;
8968 addend += msec->output_section->vma + msec->output_offset;
39623e12
PB		 8969
8970 /* Cases here must match those in the preceeding
8971 switch statement. */
8972 switch (r_type)
8973 {
8974 case R_ARM_MOVW_ABS_NC:
8975 case R_ARM_MOVT_ABS:
8976 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
8977 | (addend & 0xfff);
8978 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8979 break;
8980
8981 case R_ARM_THM_MOVW_ABS_NC:
8982 case R_ARM_THM_MOVT_ABS:
8983 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
8984 | (addend & 0xff) | ((addend & 0x0800) << 15);
8985 bfd_put_16 (input_bfd, value >> 16,
8986 contents + rel->r_offset);
8987 bfd_put_16 (input_bfd, value,
8988 contents + rel->r_offset + 2);
8989 break;
8990
8991 default:
8992 value = (value & ~ howto->dst_mask)
8993 | (addend & howto->dst_mask);
8994 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8995 break;
8996 }
f8df10f4 8997 }
f8df10f4 8998 }
4e7fd91e
PB		 8999 else
9000 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 9001 }
9002 else
9003 {
560e09e9 9004 bfd_boolean warned;
560e09e9 9005
b2a8e766
AM		 9006 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
9007 r_symndx, symtab_hdr, sym_hashes,
9008 h, sec, relocation,
9009 unresolved_reloc, warned);
ba93b8ac
DJ		 9010
9011 sym_type = h->type;
252b5132
RH		 9012 }
9013
ab96bf03 9014 if (sec != NULL && elf_discarded_section (sec))
e4067dbb
DJ		 9015 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
9016 rel, relend, howto, contents);
ab96bf03
AM		 9017
9018 if (info->relocatable)
9019 {
9020 /* This is a relocatable link. We don't have to change
9021 anything, unless the reloc is against a section symbol,
9022 in which case we have to adjust according to where the
9023 section symbol winds up in the output section. */
9024 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
9025 {
9026 if (globals->use_rel)
9027 arm_add_to_rel (input_bfd, contents + rel->r_offset,
9028 howto, (bfd_signed_vma) sec->output_offset);
9029 else
9030 rel->r_addend += sec->output_offset;
9031 }
9032 continue;
9033 }
9034
252b5132
RH		 9035 if (h != NULL)
9036 name = h->root.root.string;
9037 else
9038 {
9039 name = (bfd_elf_string_from_elf_section
9040 (input_bfd, symtab_hdr->sh_link, sym->st_name));
9041 if (name == NULL || *name == '\0')
9042 name = bfd_section_name (input_bfd, sec);
9043 }
f21f3fe0 9044
cf35638d 9045 if (r_symndx != STN_UNDEF
ba93b8ac
DJ		 9046 && r_type != R_ARM_NONE
9047 && (h == NULL
9048 || h->root.type == bfd_link_hash_defined
9049 || h->root.type == bfd_link_hash_defweak)
9050 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
9051 {
9052 (*_bfd_error_handler)
9053 ((sym_type == STT_TLS
9054 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
9055 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
9056 input_bfd,
9057 input_section,
9058 (long) rel->r_offset,
9059 howto->name,
9060 name);
9061 }
9062
252b5132
RH		 9063 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
9064 input_section, contents, rel,
9065 relocation, info, sec, name,
9066 (h ? ELF_ST_TYPE (h->type) :
0945cdfd 9067 ELF_ST_TYPE (sym->st_info)), h,
f2a9dd69 9068 &unresolved_reloc, &error_message);
0945cdfd
DJ		 9069
9070 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
9071 because such sections are not SEC_ALLOC and thus ld.so will
9072 not process them. */
9073 if (unresolved_reloc
9074 && !((input_section->flags & SEC_DEBUGGING) != 0
9075 && h->def_dynamic))
9076 {
9077 (*_bfd_error_handler)
843fe662
L		 9078 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
9079 input_bfd,
9080 input_section,
9081 (long) rel->r_offset,
9082 howto->name,
9083 h->root.root.string);
0945cdfd
DJ		 9084 return FALSE;
9085 }
252b5132
RH		 9086
9087 if (r != bfd_reloc_ok)
9088 {
252b5132
RH		 9089 switch (r)
9090 {
9091 case bfd_reloc_overflow:
cf919dfd
PB		 9092 /* If the overflowing reloc was to an undefined symbol,
9093 we have already printed one error message and there
9094 is no point complaining again. */
9095 if ((! h ||
9096 h->root.type != bfd_link_hash_undefined)
9097 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 9098 (info, (h ? &h->root : NULL), name, howto->name,
9099 (bfd_vma) 0, input_bfd, input_section,
9100 rel->r_offset))))
b34976b6 9101 return FALSE;
252b5132
RH		 9102 break;
9103
9104 case bfd_reloc_undefined:
9105 if (!((*info->callbacks->undefined_symbol)
9106 (info, name, input_bfd, input_section,
b34976b6
AM		 9107 rel->r_offset, TRUE)))
9108 return FALSE;
252b5132
RH		 9109 break;
9110
9111 case bfd_reloc_outofrange:
f2a9dd69 9112 error_message = _("out of range");
252b5132
RH		 9113 goto common_error;
9114
9115 case bfd_reloc_notsupported:
f2a9dd69 9116 error_message = _("unsupported relocation");
252b5132
RH		 9117 goto common_error;
9118
9119 case bfd_reloc_dangerous:
f2a9dd69 9120 /* error_message should already be set. */
252b5132
RH		 9121 goto common_error;
9122
9123 default:
f2a9dd69 9124 error_message = _("unknown error");
8029a119 9125 /* Fall through. */
252b5132
RH		 9126
9127 common_error:
f2a9dd69
DJ		 9128 BFD_ASSERT (error_message != NULL);
9129 if (!((*info->callbacks->reloc_dangerous)
9130 (info, error_message, input_bfd, input_section,
252b5132 9131 rel->r_offset)))
b34976b6 9132 return FALSE;
252b5132
RH		 9133 break;
9134 }
9135 }
9136 }
9137
b34976b6 9138 return TRUE;
252b5132
RH		 9139}
9140
91d6fa6a 9141/* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
2468f9c9 9142 adds the edit to the start of the list. (The list must be built in order of
91d6fa6a 9143 ascending TINDEX: the function's callers are primarily responsible for
2468f9c9
PB		 9144 maintaining that condition). */
9145
9146static void
9147add_unwind_table_edit (arm_unwind_table_edit **head,
9148 arm_unwind_table_edit **tail,
9149 arm_unwind_edit_type type,
9150 asection *linked_section,
91d6fa6a 9151 unsigned int tindex)
2468f9c9 9152{
21d799b5
NC		 9153 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
9154 xmalloc (sizeof (arm_unwind_table_edit));
2468f9c9
PB		 9155
9156 new_edit->type = type;
9157 new_edit->linked_section = linked_section;
91d6fa6a 9158 new_edit->index = tindex;
2468f9c9 9159
91d6fa6a 9160 if (tindex > 0)
2468f9c9
PB		 9161 {
9162 new_edit->next = NULL;
9163
9164 if (*tail)
9165 (*tail)->next = new_edit;
9166
9167 (*tail) = new_edit;
9168
9169 if (!*head)
9170 (*head) = new_edit;
9171 }
9172 else
9173 {
9174 new_edit->next = *head;
9175
9176 if (!*tail)
9177 *tail = new_edit;
9178
9179 *head = new_edit;
9180 }
9181}
9182
9183static _arm_elf_section_data *get_arm_elf_section_data (asection *);
9184
9185/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
9186static void
9187adjust_exidx_size(asection *exidx_sec, int adjust)
9188{
9189 asection *out_sec;
9190
9191 if (!exidx_sec->rawsize)
9192 exidx_sec->rawsize = exidx_sec->size;
9193
9194 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
9195 out_sec = exidx_sec->output_section;
9196 /* Adjust size of output section. */
9197 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
9198}
9199
9200/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
9201static void
9202insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
9203{
9204 struct _arm_elf_section_data *exidx_arm_data;
9205
9206 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9207 add_unwind_table_edit (
9208 &exidx_arm_data->u.exidx.unwind_edit_list,
9209 &exidx_arm_data->u.exidx.unwind_edit_tail,
9210 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
9211
9212 adjust_exidx_size(exidx_sec, 8);
9213}
9214
9215/* Scan .ARM.exidx tables, and create a list describing edits which should be
9216 made to those tables, such that:
9217
9218 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
9219 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
9220 codes which have been inlined into the index).
9221
85fdf906
AH		 9222 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
9223
2468f9c9
PB		 9224 The edits are applied when the tables are written
9225 (in elf32_arm_write_section).
9226*/
9227
9228bfd_boolean
9229elf32_arm_fix_exidx_coverage (asection **text_section_order,
9230 unsigned int num_text_sections,
85fdf906
AH		 9231 struct bfd_link_info *info,
9232 bfd_boolean merge_exidx_entries)
2468f9c9
PB		 9233{
9234 bfd *inp;
9235 unsigned int last_second_word = 0, i;
9236 asection *last_exidx_sec = NULL;
9237 asection *last_text_sec = NULL;
9238 int last_unwind_type = -1;
9239
9240 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
9241 text sections. */
9242 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
9243 {
9244 asection *sec;
9245
9246 for (sec = inp->sections; sec != NULL; sec = sec->next)
9247 {
9248 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
9249 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
9250
dec9d5df 9251 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
2468f9c9
PB		 9252 continue;
9253
9254 if (elf_sec->linked_to)
9255 {
9256 Elf_Internal_Shdr *linked_hdr
9257 = &elf_section_data (elf_sec->linked_to)->this_hdr;
9258 struct _arm_elf_section_data *linked_sec_arm_data
9259 = get_arm_elf_section_data (linked_hdr->bfd_section);
9260
9261 if (linked_sec_arm_data == NULL)
9262 continue;
9263
9264 /* Link this .ARM.exidx section back from the text section it
9265 describes. */
9266 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
9267 }
9268 }
9269 }
9270
9271 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
9272 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
91d6fa6a 9273 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
2468f9c9
PB		 9274
9275 for (i = 0; i < num_text_sections; i++)
9276 {
9277 asection *sec = text_section_order[i];
9278 asection *exidx_sec;
9279 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
9280 struct _arm_elf_section_data *exidx_arm_data;
9281 bfd_byte *contents = NULL;
9282 int deleted_exidx_bytes = 0;
9283 bfd_vma j;
9284 arm_unwind_table_edit *unwind_edit_head = NULL;
9285 arm_unwind_table_edit *unwind_edit_tail = NULL;
9286 Elf_Internal_Shdr *hdr;
9287 bfd *ibfd;
9288
9289 if (arm_data == NULL)
9290 continue;
9291
9292 exidx_sec = arm_data->u.text.arm_exidx_sec;
9293 if (exidx_sec == NULL)
9294 {
9295 /* Section has no unwind data. */
9296 if (last_unwind_type == 0 || !last_exidx_sec)
9297 continue;
9298
9299 /* Ignore zero sized sections. */
9300 if (sec->size == 0)
9301 continue;
9302
9303 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9304 last_unwind_type = 0;
9305 continue;
9306 }
9307
22a8f80e
PB		 9308 /* Skip /DISCARD/ sections. */
9309 if (bfd_is_abs_section (exidx_sec->output_section))
9310 continue;
9311
2468f9c9
PB		 9312 hdr = &elf_section_data (exidx_sec)->this_hdr;
9313 if (hdr->sh_type != SHT_ARM_EXIDX)
9314 continue;
9315
9316 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9317 if (exidx_arm_data == NULL)
9318 continue;
9319
9320 ibfd = exidx_sec->owner;
9321
9322 if (hdr->contents != NULL)
9323 contents = hdr->contents;
9324 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
9325 /* An error? */
9326 continue;
9327
9328 for (j = 0; j < hdr->sh_size; j += 8)
9329 {
9330 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
9331 int unwind_type;
9332 int elide = 0;
9333
9334 /* An EXIDX_CANTUNWIND entry. */
9335 if (second_word == 1)
9336 {
9337 if (last_unwind_type == 0)
9338 elide = 1;
9339 unwind_type = 0;
9340 }
9341 /* Inlined unwinding data. Merge if equal to previous. */
9342 else if ((second_word & 0x80000000) != 0)
9343 {
85fdf906
AH		 9344 if (merge_exidx_entries
9345 && last_second_word == second_word && last_unwind_type == 1)
2468f9c9
PB		 9346 elide = 1;
9347 unwind_type = 1;
9348 last_second_word = second_word;
9349 }
9350 /* Normal table entry. In theory we could merge these too,
9351 but duplicate entries are likely to be much less common. */
9352 else
9353 unwind_type = 2;
9354
9355 if (elide)
9356 {
9357 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
9358 DELETE_EXIDX_ENTRY, NULL, j / 8);
9359
9360 deleted_exidx_bytes += 8;
9361 }
9362
9363 last_unwind_type = unwind_type;
9364 }
9365
9366 /* Free contents if we allocated it ourselves. */
9367 if (contents != hdr->contents)
9368 free (contents);
9369
9370 /* Record edits to be applied later (in elf32_arm_write_section). */
9371 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
9372 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
9373
9374 if (deleted_exidx_bytes > 0)
9375 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
9376
9377 last_exidx_sec = exidx_sec;
9378 last_text_sec = sec;
9379 }
9380
9381 /* Add terminating CANTUNWIND entry. */
9382 if (last_exidx_sec && last_unwind_type != 0)
9383 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9384
9385 return TRUE;
9386}
9387
3e6b1042
DJ		 9388static bfd_boolean
9389elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
9390 bfd *ibfd, const char *name)
9391{
9392 asection *sec, *osec;
9393
9394 sec = bfd_get_section_by_name (ibfd, name);
9395 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
9396 return TRUE;
9397
9398 osec = sec->output_section;
9399 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
9400 return TRUE;
9401
9402 if (! bfd_set_section_contents (obfd, osec, sec->contents,
9403 sec->output_offset, sec->size))
9404 return FALSE;
9405
9406 return TRUE;
9407}
9408
9409static bfd_boolean
9410elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
9411{
9412 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
fe33d2fa 9413 asection *sec, *osec;
3e6b1042 9414
4dfe6ac6
NC		 9415 if (globals == NULL)
9416 return FALSE;
9417
3e6b1042
DJ		 9418 /* Invoke the regular ELF backend linker to do all the work. */
9419 if (!bfd_elf_final_link (abfd, info))
9420 return FALSE;
9421
fe33d2fa
CL		 9422 /* Process stub sections (eg BE8 encoding, ...). */
9423 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
9424 int i;
cdb21a0a
NS		 9425 for (i=0; i<htab->top_id; i++)
9426 {
9427 sec = htab->stub_group[i].stub_sec;
9428 /* Only process it once, in its link_sec slot. */
9429 if (sec && i == htab->stub_group[i].link_sec->id)
9430 {
9431 osec = sec->output_section;
9432 elf32_arm_write_section (abfd, info, sec, sec->contents);
9433 if (! bfd_set_section_contents (abfd, osec, sec->contents,
9434 sec->output_offset, sec->size))
9435 return FALSE;
9436 }
fe33d2fa 9437 }
fe33d2fa 9438
3e6b1042
DJ		 9439 /* Write out any glue sections now that we have created all the
9440 stubs. */
9441 if (globals->bfd_of_glue_owner != NULL)
9442 {
9443 if (! elf32_arm_output_glue_section (info, abfd,
9444 globals->bfd_of_glue_owner,
9445 ARM2THUMB_GLUE_SECTION_NAME))
9446 return FALSE;
9447
9448 if (! elf32_arm_output_glue_section (info, abfd,
9449 globals->bfd_of_glue_owner,
9450 THUMB2ARM_GLUE_SECTION_NAME))
9451 return FALSE;
9452
9453 if (! elf32_arm_output_glue_section (info, abfd,
9454 globals->bfd_of_glue_owner,
9455 VFP11_ERRATUM_VENEER_SECTION_NAME))
9456 return FALSE;
9457
9458 if (! elf32_arm_output_glue_section (info, abfd,
9459 globals->bfd_of_glue_owner,
9460 ARM_BX_GLUE_SECTION_NAME))
9461 return FALSE;
9462 }
9463
9464 return TRUE;
9465}
9466
c178919b
NC		 9467/* Set the right machine number. */
9468
9469static bfd_boolean
57e8b36a 9470elf32_arm_object_p (bfd *abfd)
c178919b 9471{
5a6c6817 9472 unsigned int mach;
57e8b36a 9473
5a6c6817 9474 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 9475
5a6c6817
NC		 9476 if (mach != bfd_mach_arm_unknown)
9477 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
9478
9479 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
9480 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
e16bb312 9481
e16bb312 9482 else
5a6c6817 9483 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 9484
9485 return TRUE;
9486}
9487
fc830a83 9488/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 9489
b34976b6 9490static bfd_boolean
57e8b36a 9491elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 9492{
9493 if (elf_flags_init (abfd)
9494 && elf_elfheader (abfd)->e_flags != flags)
9495 {
fc830a83
NC		 9496 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
9497 {
fd2ec330 9498 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 9499 (*_bfd_error_handler)
9500 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
9501 abfd);
fc830a83 9502 else
d003868e
AM		 9503 _bfd_error_handler
9504 (_("Warning: Clearing the interworking flag of %B due to outside request"),
9505 abfd);
fc830a83 9506 }
252b5132
RH		 9507 }
9508 else
9509 {
9510 elf_elfheader (abfd)->e_flags = flags;
b34976b6 9511 elf_flags_init (abfd) = TRUE;
252b5132
RH		 9512 }
9513
b34976b6 9514 return TRUE;
252b5132
RH		 9515}
9516
fc830a83 9517/* Copy backend specific data from one object module to another. */
9b485d32 9518
b34976b6 9519static bfd_boolean
57e8b36a 9520elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 9521{
9522 flagword in_flags;
9523 flagword out_flags;
9524
0ffa91dd 9525 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 9526 return TRUE;
252b5132 9527
fc830a83 9528 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 9529 out_flags = elf_elfheader (obfd)->e_flags;
9530
fc830a83
NC		 9531 if (elf_flags_init (obfd)
9532 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
9533 && in_flags != out_flags)
252b5132 9534 {
252b5132 9535 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 9536 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 9537 return FALSE;
252b5132
RH		 9538
9539 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 9540 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 9541 return FALSE;
252b5132
RH		 9542
9543 /* If the src and dest have different interworking flags
9544 then turn off the interworking bit. */
fd2ec330 9545 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 9546 {
fd2ec330 9547 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 9548 _bfd_error_handler
9549 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
9550 obfd, ibfd);
252b5132 9551
fd2ec330 9552 in_flags &= ~EF_ARM_INTERWORK;
252b5132 9553 }
1006ba19
PB		 9554
9555 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 9556 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
9557 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 9558 }
9559
9560 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 9561 elf_flags_init (obfd) = TRUE;
252b5132 9562
94a3258f
PB		 9563 /* Also copy the EI_OSABI field. */
9564 elf_elfheader (obfd)->e_ident[EI_OSABI] =
9565 elf_elfheader (ibfd)->e_ident[EI_OSABI];
9566
104d59d1
JM		 9567 /* Copy object attributes. */
9568 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB		 9569
9570 return TRUE;
9571}
9572
9573/* Values for Tag_ABI_PCS_R9_use. */
9574enum
9575{
9576 AEABI_R9_V6,
9577 AEABI_R9_SB,
9578 AEABI_R9_TLS,
9579 AEABI_R9_unused
9580};
9581
9582/* Values for Tag_ABI_PCS_RW_data. */
9583enum
9584{
9585 AEABI_PCS_RW_data_absolute,
9586 AEABI_PCS_RW_data_PCrel,
9587 AEABI_PCS_RW_data_SBrel,
9588 AEABI_PCS_RW_data_unused
9589};
9590
9591/* Values for Tag_ABI_enum_size. */
9592enum
9593{
9594 AEABI_enum_unused,
9595 AEABI_enum_short,
9596 AEABI_enum_wide,
9597 AEABI_enum_forced_wide
9598};
9599
104d59d1
JM		 9600/* Determine whether an object attribute tag takes an integer, a
9601 string or both. */
906e58ca 9602
104d59d1
JM		 9603static int
9604elf32_arm_obj_attrs_arg_type (int tag)
9605{
9606 if (tag == Tag_compatibility)
3483fe2e 9607 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
2d0bb761 9608 else if (tag == Tag_nodefaults)
3483fe2e
AS		 9609 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
9610 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
9611 return ATTR_TYPE_FLAG_STR_VAL;
104d59d1 9612 else if (tag < 32)
3483fe2e 9613 return ATTR_TYPE_FLAG_INT_VAL;
104d59d1 9614 else
3483fe2e 9615 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
104d59d1
JM		 9616}
9617
5aa6ff7c
AS		 9618/* The ABI defines that Tag_conformance should be emitted first, and that
9619 Tag_nodefaults should be second (if either is defined). This sets those
9620 two positions, and bumps up the position of all the remaining tags to
9621 compensate. */
9622static int
9623elf32_arm_obj_attrs_order (int num)
9624{
3de4a297 9625 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
5aa6ff7c 9626 return Tag_conformance;
3de4a297 9627 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
5aa6ff7c
AS		 9628 return Tag_nodefaults;
9629 if ((num - 2) < Tag_nodefaults)
9630 return num - 2;
9631 if ((num - 1) < Tag_conformance)
9632 return num - 1;
9633 return num;
9634}
9635
e8b36cd1
JM		 9636/* Attribute numbers >=64 (mod 128) can be safely ignored. */
9637static bfd_boolean
9638elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
9639{
9640 if ((tag & 127) < 64)
9641 {
9642 _bfd_error_handler
9643 (_("%B: Unknown mandatory EABI object attribute %d"),
9644 abfd, tag);
9645 bfd_set_error (bfd_error_bad_value);
9646 return FALSE;
9647 }
9648 else
9649 {
9650 _bfd_error_handler
9651 (_("Warning: %B: Unknown EABI object attribute %d"),
9652 abfd, tag);
9653 return TRUE;
9654 }
9655}
9656
91e22acd
AS		 9657/* Read the architecture from the Tag_also_compatible_with attribute, if any.
9658 Returns -1 if no architecture could be read. */
9659
9660static int
9661get_secondary_compatible_arch (bfd *abfd)
9662{
9663 obj_attribute *attr =
9664 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
9665
9666 /* Note: the tag and its argument below are uleb128 values, though
9667 currently-defined values fit in one byte for each. */
9668 if (attr->s
9669 && attr->s[0] == Tag_CPU_arch
9670 && (attr->s[1] & 128) != 128
9671 && attr->s[2] == 0)
9672 return attr->s[1];
9673
9674 /* This tag is "safely ignorable", so don't complain if it looks funny. */
9675 return -1;
9676}
9677
9678/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
9679 The tag is removed if ARCH is -1. */
9680
8e79c3df 9681static void
91e22acd 9682set_secondary_compatible_arch (bfd *abfd, int arch)
8e79c3df 9683{
91e22acd
AS		 9684 obj_attribute *attr =
9685 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8e79c3df 9686
91e22acd
AS		 9687 if (arch == -1)
9688 {
9689 attr->s = NULL;
9690 return;
8e79c3df 9691 }
91e22acd
AS		 9692
9693 /* Note: the tag and its argument below are uleb128 values, though
9694 currently-defined values fit in one byte for each. */
9695 if (!attr->s)
21d799b5 9696 attr->s = (char *) bfd_alloc (abfd, 3);
91e22acd
AS		 9697 attr->s[0] = Tag_CPU_arch;
9698 attr->s[1] = arch;
9699 attr->s[2] = '\0';
8e79c3df
CM		 9700}
9701
91e22acd
AS		 9702/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
9703 into account. */
9704
9705static int
9706tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
9707 int newtag, int secondary_compat)
8e79c3df 9708{
91e22acd
AS		 9709#define T(X) TAG_CPU_ARCH_##X
9710 int tagl, tagh, result;
9711 const int v6t2[] =
9712 {
9713 T(V6T2), /* PRE_V4. */
9714 T(V6T2), /* V4. */
9715 T(V6T2), /* V4T. */
9716 T(V6T2), /* V5T. */
9717 T(V6T2), /* V5TE. */
9718 T(V6T2), /* V5TEJ. */
9719 T(V6T2), /* V6. */
9720 T(V7), /* V6KZ. */
9721 T(V6T2) /* V6T2. */
9722 };
9723 const int v6k[] =
9724 {
9725 T(V6K), /* PRE_V4. */
9726 T(V6K), /* V4. */
9727 T(V6K), /* V4T. */
9728 T(V6K), /* V5T. */
9729 T(V6K), /* V5TE. */
9730 T(V6K), /* V5TEJ. */
9731 T(V6K), /* V6. */
9732 T(V6KZ), /* V6KZ. */
9733 T(V7), /* V6T2. */
9734 T(V6K) /* V6K. */
9735 };
9736 const int v7[] =
9737 {
9738 T(V7), /* PRE_V4. */
9739 T(V7), /* V4. */
9740 T(V7), /* V4T. */
9741 T(V7), /* V5T. */
9742 T(V7), /* V5TE. */
9743 T(V7), /* V5TEJ. */
9744 T(V7), /* V6. */
9745 T(V7), /* V6KZ. */
9746 T(V7), /* V6T2. */
9747 T(V7), /* V6K. */
9748 T(V7) /* V7. */
9749 };
9750 const int v6_m[] =
9751 {
9752 -1, /* PRE_V4. */
9753 -1, /* V4. */
9754 T(V6K), /* V4T. */
9755 T(V6K), /* V5T. */
9756 T(V6K), /* V5TE. */
9757 T(V6K), /* V5TEJ. */
9758 T(V6K), /* V6. */
9759 T(V6KZ), /* V6KZ. */
9760 T(V7), /* V6T2. */
9761 T(V6K), /* V6K. */
9762 T(V7), /* V7. */
9763 T(V6_M) /* V6_M. */
9764 };
9765 const int v6s_m[] =
9766 {
9767 -1, /* PRE_V4. */
9768 -1, /* V4. */
9769 T(V6K), /* V4T. */
9770 T(V6K), /* V5T. */
9771 T(V6K), /* V5TE. */
9772 T(V6K), /* V5TEJ. */
9773 T(V6K), /* V6. */
9774 T(V6KZ), /* V6KZ. */
9775 T(V7), /* V6T2. */
9776 T(V6K), /* V6K. */
9777 T(V7), /* V7. */
9778 T(V6S_M), /* V6_M. */
9779 T(V6S_M) /* V6S_M. */
9780 };
9e3c6df6
PB		 9781 const int v7e_m[] =
9782 {
9783 -1, /* PRE_V4. */
9784 -1, /* V4. */
9785 T(V7E_M), /* V4T. */
9786 T(V7E_M), /* V5T. */
9787 T(V7E_M), /* V5TE. */
9788 T(V7E_M), /* V5TEJ. */
9789 T(V7E_M), /* V6. */
9790 T(V7E_M), /* V6KZ. */
9791 T(V7E_M), /* V6T2. */
9792 T(V7E_M), /* V6K. */
9793 T(V7E_M), /* V7. */
9794 T(V7E_M), /* V6_M. */
9795 T(V7E_M), /* V6S_M. */
9796 T(V7E_M) /* V7E_M. */
9797 };
91e22acd
AS		 9798 const int v4t_plus_v6_m[] =
9799 {
9800 -1, /* PRE_V4. */
9801 -1, /* V4. */
9802 T(V4T), /* V4T. */
9803 T(V5T), /* V5T. */
9804 T(V5TE), /* V5TE. */
9805 T(V5TEJ), /* V5TEJ. */
9806 T(V6), /* V6. */
9807 T(V6KZ), /* V6KZ. */
9808 T(V6T2), /* V6T2. */
9809 T(V6K), /* V6K. */
9810 T(V7), /* V7. */
9811 T(V6_M), /* V6_M. */
9812 T(V6S_M), /* V6S_M. */
9e3c6df6 9813 T(V7E_M), /* V7E_M. */
91e22acd
AS		 9814 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
9815 };
9816 const int *comb[] =
9817 {
9818 v6t2,
9819 v6k,
9820 v7,
9821 v6_m,
9822 v6s_m,
9e3c6df6 9823 v7e_m,
91e22acd
AS		 9824 /* Pseudo-architecture. */
9825 v4t_plus_v6_m
9826 };
9827
9828 /* Check we've not got a higher architecture than we know about. */
9829
9e3c6df6 9830 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
91e22acd 9831 {
3895f852 9832 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
91e22acd
AS		 9833 return -1;
9834 }
9835
9836 /* Override old tag if we have a Tag_also_compatible_with on the output. */
9837
9838 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
9839 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
9840 oldtag = T(V4T_PLUS_V6_M);
9841
9842 /* And override the new tag if we have a Tag_also_compatible_with on the
9843 input. */
9844
9845 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
9846 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
9847 newtag = T(V4T_PLUS_V6_M);
9848
9849 tagl = (oldtag < newtag) ? oldtag : newtag;
9850 result = tagh = (oldtag > newtag) ? oldtag : newtag;
9851
9852 /* Architectures before V6KZ add features monotonically. */
9853 if (tagh <= TAG_CPU_ARCH_V6KZ)
9854 return result;
9855
9856 result = comb[tagh - T(V6T2)][tagl];
9857
9858 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
9859 as the canonical version. */
9860 if (result == T(V4T_PLUS_V6_M))
9861 {
9862 result = T(V4T);
9863 *secondary_compat_out = T(V6_M);
9864 }
9865 else
9866 *secondary_compat_out = -1;
9867
9868 if (result == -1)
9869 {
3895f852 9870 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
91e22acd
AS		 9871 ibfd, oldtag, newtag);
9872 return -1;
9873 }
9874
9875 return result;
9876#undef T
8e79c3df
CM		 9877}
9878
ee065d83
PB		 9879/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
9880 are conflicting attributes. */
906e58ca 9881
ee065d83
PB		 9882static bfd_boolean
9883elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
9884{
104d59d1
JM		 9885 obj_attribute *in_attr;
9886 obj_attribute *out_attr;
ee065d83
PB		 9887 /* Some tags have 0 = don't care, 1 = strong requirement,
9888 2 = weak requirement. */
91e22acd 9889 static const int order_021[3] = {0, 2, 1};
ee065d83 9890 int i;
91e22acd 9891 bfd_boolean result = TRUE;
ee065d83 9892
3e6b1042
DJ		 9893 /* Skip the linker stubs file. This preserves previous behavior
9894 of accepting unknown attributes in the first input file - but
9895 is that a bug? */
9896 if (ibfd->flags & BFD_LINKER_CREATED)
9897 return TRUE;
9898
104d59d1 9899 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 9900 {
9901 /* This is the first object. Copy the attributes. */
104d59d1 9902 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526 9903
cd21e546
MGD		 9904 out_attr = elf_known_obj_attributes_proc (obfd);
9905
004ae526
PB		 9906 /* Use the Tag_null value to indicate the attributes have been
9907 initialized. */
cd21e546 9908 out_attr[0].i = 1;
004ae526 9909
cd21e546
MGD		 9910 /* We do not output objects with Tag_MPextension_use_legacy - we move
9911 the attribute's value to Tag_MPextension_use. */
9912 if (out_attr[Tag_MPextension_use_legacy].i != 0)
9913 {
9914 if (out_attr[Tag_MPextension_use].i != 0
9915 && out_attr[Tag_MPextension_use_legacy].i
9916 != out_attr[Tag_MPextension_use].i)
9917 {
9918 _bfd_error_handler
9919 (_("Error: %B has both the current and legacy "
9920 "Tag_MPextension_use attributes"), ibfd);
9921 result = FALSE;
9922 }
9923
9924 out_attr[Tag_MPextension_use] =
9925 out_attr[Tag_MPextension_use_legacy];
9926 out_attr[Tag_MPextension_use_legacy].type = 0;
9927 out_attr[Tag_MPextension_use_legacy].i = 0;
9928 }
9929
9930 return result;
ee065d83
PB		 9931 }
9932
104d59d1
JM		 9933 in_attr = elf_known_obj_attributes_proc (ibfd);
9934 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 9935 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
9936 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
9937 {
8e79c3df 9938 /* Ignore mismatches if the object doesn't use floating point. */
ee065d83
PB		 9939 if (out_attr[Tag_ABI_FP_number_model].i == 0)
9940 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
9941 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
9942 {
9943 _bfd_error_handler
3895f852 9944 (_("error: %B uses VFP register arguments, %B does not"),
deddc40b
NS		 9945 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
9946 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
91e22acd 9947 result = FALSE;
ee065d83
PB		 9948 }
9949 }
9950
3de4a297 9951 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 9952 {
9953 /* Merge this attribute with existing attributes. */
9954 switch (i)
9955 {
9956 case Tag_CPU_raw_name:
9957 case Tag_CPU_name:
91e22acd 9958 /* These are merged after Tag_CPU_arch. */
ee065d83
PB		 9959 break;
9960
9961 case Tag_ABI_optimization_goals:
9962 case Tag_ABI_FP_optimization_goals:
9963 /* Use the first value seen. */
9964 break;
9965
9966 case Tag_CPU_arch:
91e22acd
AS		 9967 {
9968 int secondary_compat = -1, secondary_compat_out = -1;
9969 unsigned int saved_out_attr = out_attr[i].i;
9970 static const char *name_table[] = {
9971 /* These aren't real CPU names, but we can't guess
9972 that from the architecture version alone. */
9973 "Pre v4",
9974 "ARM v4",
9975 "ARM v4T",
9976 "ARM v5T",
9977 "ARM v5TE",
9978 "ARM v5TEJ",
9979 "ARM v6",
9980 "ARM v6KZ",
9981 "ARM v6T2",
9982 "ARM v6K",
9983 "ARM v7",
9984 "ARM v6-M",
9985 "ARM v6S-M"
9986 };
9987
9988 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
9989 secondary_compat = get_secondary_compatible_arch (ibfd);
9990 secondary_compat_out = get_secondary_compatible_arch (obfd);
9991 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
9992 &secondary_compat_out,
9993 in_attr[i].i,
9994 secondary_compat);
9995 set_secondary_compatible_arch (obfd, secondary_compat_out);
9996
9997 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
9998 if (out_attr[i].i == saved_out_attr)
9999 ; /* Leave the names alone. */
10000 else if (out_attr[i].i == in_attr[i].i)
10001 {
10002 /* The output architecture has been changed to match the
10003 input architecture. Use the input names. */
10004 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
10005 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
10006 : NULL;
10007 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
10008 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
10009 : NULL;
10010 }
10011 else
10012 {
10013 out_attr[Tag_CPU_name].s = NULL;
10014 out_attr[Tag_CPU_raw_name].s = NULL;
10015 }
10016
10017 /* If we still don't have a value for Tag_CPU_name,
10018 make one up now. Tag_CPU_raw_name remains blank. */
10019 if (out_attr[Tag_CPU_name].s == NULL
10020 && out_attr[i].i < ARRAY_SIZE (name_table))
10021 out_attr[Tag_CPU_name].s =
10022 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
10023 }
10024 break;
10025
ee065d83
PB		 10026 case Tag_ARM_ISA_use:
10027 case Tag_THUMB_ISA_use:
ee065d83 10028 case Tag_WMMX_arch:
91e22acd
AS		 10029 case Tag_Advanced_SIMD_arch:
10030 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
ee065d83 10031 case Tag_ABI_FP_rounding:
ee065d83
PB		 10032 case Tag_ABI_FP_exceptions:
10033 case Tag_ABI_FP_user_exceptions:
10034 case Tag_ABI_FP_number_model:
75375b3e 10035 case Tag_FP_HP_extension:
91e22acd
AS		 10036 case Tag_CPU_unaligned_access:
10037 case Tag_T2EE_use:
91e22acd 10038 case Tag_MPextension_use:
ee065d83
PB		 10039 /* Use the largest value specified. */
10040 if (in_attr[i].i > out_attr[i].i)
10041 out_attr[i].i = in_attr[i].i;
10042 break;
10043
75375b3e 10044 case Tag_ABI_align_preserved:
91e22acd
AS		 10045 case Tag_ABI_PCS_RO_data:
10046 /* Use the smallest value specified. */
10047 if (in_attr[i].i < out_attr[i].i)
10048 out_attr[i].i = in_attr[i].i;
10049 break;
10050
75375b3e 10051 case Tag_ABI_align_needed:
91e22acd 10052 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
75375b3e
MGD		 10053 && (in_attr[Tag_ABI_align_preserved].i == 0
10054 || out_attr[Tag_ABI_align_preserved].i == 0))
ee065d83 10055 {
91e22acd
AS		 10056 /* This error message should be enabled once all non-conformant
10057 binaries in the toolchain have had the attributes set
10058 properly.
ee065d83 10059 _bfd_error_handler
3895f852 10060 (_("error: %B: 8-byte data alignment conflicts with %B"),
91e22acd
AS		 10061 obfd, ibfd);
10062 result = FALSE; */
ee065d83 10063 }
91e22acd
AS		 10064 /* Fall through. */
10065 case Tag_ABI_FP_denormal:
10066 case Tag_ABI_PCS_GOT_use:
10067 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
10068 value if greater than 2 (for future-proofing). */
10069 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
10070 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
10071 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
ee065d83
PB		 10072 out_attr[i].i = in_attr[i].i;
10073 break;
91e22acd 10074
75375b3e
MGD		 10075 case Tag_Virtualization_use:
10076 /* The virtualization tag effectively stores two bits of
10077 information: the intended use of TrustZone (in bit 0), and the
10078 intended use of Virtualization (in bit 1). */
10079 if (out_attr[i].i == 0)
10080 out_attr[i].i = in_attr[i].i;
10081 else if (in_attr[i].i != 0
10082 && in_attr[i].i != out_attr[i].i)
10083 {
10084 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
10085 out_attr[i].i = 3;
10086 else
10087 {
10088 _bfd_error_handler
10089 (_("error: %B: unable to merge virtualization attributes "
10090 "with %B"),
10091 obfd, ibfd);
10092 result = FALSE;
10093 }
10094 }
10095 break;
91e22acd
AS		 10096
10097 case Tag_CPU_arch_profile:
10098 if (out_attr[i].i != in_attr[i].i)
10099 {
10100 /* 0 will merge with anything.
10101 'A' and 'S' merge to 'A'.
10102 'R' and 'S' merge to 'R'.
10103 'M' and 'A|R|S' is an error. */
10104 if (out_attr[i].i == 0
10105 || (out_attr[i].i == 'S'
10106 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
10107 out_attr[i].i = in_attr[i].i;
10108 else if (in_attr[i].i == 0
10109 || (in_attr[i].i == 'S'
10110 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
10111 ; /* Do nothing. */
10112 else
10113 {
10114 _bfd_error_handler
3895f852 10115 (_("error: %B: Conflicting architecture profiles %c/%c"),
91e22acd
AS		 10116 ibfd,
10117 in_attr[i].i ? in_attr[i].i : '0',
10118 out_attr[i].i ? out_attr[i].i : '0');
10119 result = FALSE;
10120 }
10121 }
10122 break;
75375b3e 10123 case Tag_FP_arch:
62f3b8c8 10124 {
4547cb56
NC		 10125 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
10126 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
10127 when it's 0. It might mean absence of FP hardware if
10128 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
10129
62f3b8c8
PB		 10130 static const struct
10131 {
10132 int ver;
10133 int regs;
10134 } vfp_versions[7] =
10135 {
10136 {0, 0},
10137 {1, 16},
10138 {2, 16},
10139 {3, 32},
10140 {3, 16},
10141 {4, 32},
10142 {4, 16}
10143 };
10144 int ver;
10145 int regs;
10146 int newval;
10147
4547cb56
NC		 10148 /* If the output has no requirement about FP hardware,
10149 follow the requirement of the input. */
10150 if (out_attr[i].i == 0)
10151 {
10152 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
10153 out_attr[i].i = in_attr[i].i;
10154 out_attr[Tag_ABI_HardFP_use].i
10155 = in_attr[Tag_ABI_HardFP_use].i;
10156 break;
10157 }
10158 /* If the input has no requirement about FP hardware, do
10159 nothing. */
10160 else if (in_attr[i].i == 0)
10161 {
10162 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
10163 break;
10164 }
10165
10166 /* Both the input and the output have nonzero Tag_FP_arch.
10167 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
10168
10169 /* If both the input and the output have zero Tag_ABI_HardFP_use,
10170 do nothing. */
10171 if (in_attr[Tag_ABI_HardFP_use].i == 0
10172 && out_attr[Tag_ABI_HardFP_use].i == 0)
10173 ;
10174 /* If the input and the output have different Tag_ABI_HardFP_use,
10175 the combination of them is 3 (SP & DP). */
10176 else if (in_attr[Tag_ABI_HardFP_use].i
10177 != out_attr[Tag_ABI_HardFP_use].i)
10178 out_attr[Tag_ABI_HardFP_use].i = 3;
10179
10180 /* Now we can handle Tag_FP_arch. */
10181
62f3b8c8
PB		 10182 /* Values greater than 6 aren't defined, so just pick the
10183 biggest */
10184 if (in_attr[i].i > 6 && in_attr[i].i > out_attr[i].i)
10185 {
10186 out_attr[i] = in_attr[i];
10187 break;
10188 }
10189 /* The output uses the superset of input features
10190 (ISA version) and registers. */
10191 ver = vfp_versions[in_attr[i].i].ver;
10192 if (ver < vfp_versions[out_attr[i].i].ver)
10193 ver = vfp_versions[out_attr[i].i].ver;
10194 regs = vfp_versions[in_attr[i].i].regs;
10195 if (regs < vfp_versions[out_attr[i].i].regs)
10196 regs = vfp_versions[out_attr[i].i].regs;
10197 /* This assumes all possible supersets are also a valid
10198 options. */
10199 for (newval = 6; newval > 0; newval--)
10200 {
10201 if (regs == vfp_versions[newval].regs
10202 && ver == vfp_versions[newval].ver)
10203 break;
10204 }
10205 out_attr[i].i = newval;
10206 }
b1cc4aeb 10207 break;
ee065d83
PB		 10208 case Tag_PCS_config:
10209 if (out_attr[i].i == 0)
10210 out_attr[i].i = in_attr[i].i;
10211 else if (in_attr[i].i != 0 && out_attr[i].i != 0)
10212 {
10213 /* It's sometimes ok to mix different configs, so this is only
10214 a warning. */
10215 _bfd_error_handler
10216 (_("Warning: %B: Conflicting platform configuration"), ibfd);
10217 }
10218 break;
10219 case Tag_ABI_PCS_R9_use:
004ae526
PB		 10220 if (in_attr[i].i != out_attr[i].i
10221 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 10222 && in_attr[i].i != AEABI_R9_unused)
10223 {
10224 _bfd_error_handler
3895f852 10225 (_("error: %B: Conflicting use of R9"), ibfd);
91e22acd 10226 result = FALSE;
ee065d83
PB		 10227 }
10228 if (out_attr[i].i == AEABI_R9_unused)
10229 out_attr[i].i = in_attr[i].i;
10230 break;
10231 case Tag_ABI_PCS_RW_data:
10232 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
10233 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
10234 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
10235 {
10236 _bfd_error_handler
3895f852 10237 (_("error: %B: SB relative addressing conflicts with use of R9"),
ee065d83 10238 ibfd);
91e22acd 10239 result = FALSE;
ee065d83
PB		 10240 }
10241 /* Use the smallest value specified. */
10242 if (in_attr[i].i < out_attr[i].i)
10243 out_attr[i].i = in_attr[i].i;
10244 break;
ee065d83 10245 case Tag_ABI_PCS_wchar_t:
a9dc9481
JM		 10246 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
10247 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
ee065d83
PB		 10248 {
10249 _bfd_error_handler
a9dc9481
JM		 10250 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
10251 ibfd, in_attr[i].i, out_attr[i].i);
ee065d83 10252 }
a9dc9481 10253 else if (in_attr[i].i && !out_attr[i].i)
ee065d83
PB		 10254 out_attr[i].i = in_attr[i].i;
10255 break;
ee065d83
PB		 10256 case Tag_ABI_enum_size:
10257 if (in_attr[i].i != AEABI_enum_unused)
10258 {
10259 if (out_attr[i].i == AEABI_enum_unused
10260 || out_attr[i].i == AEABI_enum_forced_wide)
10261 {
10262 /* The existing object is compatible with anything.
10263 Use whatever requirements the new object has. */
10264 out_attr[i].i = in_attr[i].i;
10265 }
10266 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 10267 && out_attr[i].i != in_attr[i].i
0ffa91dd 10268 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 10269 {
91e22acd 10270 static const char *aeabi_enum_names[] =
bf21ed78 10271 { "", "variable-size", "32-bit", "" };
91e22acd
AS		 10272 const char *in_name =
10273 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
10274 ? aeabi_enum_names[in_attr[i].i]
10275 : "<unknown>";
10276 const char *out_name =
10277 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
10278 ? aeabi_enum_names[out_attr[i].i]
10279 : "<unknown>";
ee065d83 10280 _bfd_error_handler
bf21ed78 10281 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
91e22acd 10282 ibfd, in_name, out_name);
ee065d83
PB		 10283 }
10284 }
10285 break;
10286 case Tag_ABI_VFP_args:
10287 /* Aready done. */
10288 break;
10289 case Tag_ABI_WMMX_args:
10290 if (in_attr[i].i != out_attr[i].i)
10291 {
10292 _bfd_error_handler
3895f852 10293 (_("error: %B uses iWMMXt register arguments, %B does not"),
ee065d83 10294 ibfd, obfd);
91e22acd 10295 result = FALSE;
ee065d83
PB		 10296 }
10297 break;
7b86a9fa
AS		 10298 case Tag_compatibility:
10299 /* Merged in target-independent code. */
10300 break;
91e22acd 10301 case Tag_ABI_HardFP_use:
4547cb56 10302 /* This is handled along with Tag_FP_arch. */
91e22acd
AS		 10303 break;
10304 case Tag_ABI_FP_16bit_format:
10305 if (in_attr[i].i != 0 && out_attr[i].i != 0)
10306 {
10307 if (in_attr[i].i != out_attr[i].i)
10308 {
10309 _bfd_error_handler
3895f852 10310 (_("error: fp16 format mismatch between %B and %B"),
91e22acd
AS		 10311 ibfd, obfd);
10312 result = FALSE;
10313 }
10314 }
10315 if (in_attr[i].i != 0)
10316 out_attr[i].i = in_attr[i].i;
10317 break;
7b86a9fa 10318
cd21e546
MGD		 10319 case Tag_DIV_use:
10320 /* This tag is set to zero if we can use UDIV and SDIV in Thumb
10321 mode on a v7-M or v7-R CPU; to one if we can not use UDIV or
10322 SDIV at all; and to two if we can use UDIV or SDIV on a v7-A
10323 CPU. We will merge as follows: If the input attribute's value
10324 is one then the output attribute's value remains unchanged. If
10325 the input attribute's value is zero or two then if the output
10326 attribute's value is one the output value is set to the input
10327 value, otherwise the output value must be the same as the
10328 inputs. */
10329 if (in_attr[i].i != 1 && out_attr[i].i != 1)
10330 {
10331 if (in_attr[i].i != out_attr[i].i)
10332 {
10333 _bfd_error_handler
10334 (_("DIV usage mismatch between %B and %B"),
10335 ibfd, obfd);
10336 result = FALSE;
10337 }
10338 }
10339
10340 if (in_attr[i].i != 1)
10341 out_attr[i].i = in_attr[i].i;
10342
10343 break;
10344
10345 case Tag_MPextension_use_legacy:
10346 /* We don't output objects with Tag_MPextension_use_legacy - we
10347 move the value to Tag_MPextension_use. */
10348 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
10349 {
10350 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
10351 {
10352 _bfd_error_handler
10353 (_("%B has has both the current and legacy "
10354 "Tag_MPextension_use attributes"),
10355 ibfd);
10356 result = FALSE;
10357 }
10358 }
10359
10360 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
10361 out_attr[Tag_MPextension_use] = in_attr[i];
10362
10363 break;
10364
91e22acd 10365 case Tag_nodefaults:
2d0bb761
AS		 10366 /* This tag is set if it exists, but the value is unused (and is
10367 typically zero). We don't actually need to do anything here -
10368 the merge happens automatically when the type flags are merged
10369 below. */
91e22acd
AS		 10370 break;
10371 case Tag_also_compatible_with:
10372 /* Already done in Tag_CPU_arch. */
10373 break;
10374 case Tag_conformance:
10375 /* Keep the attribute if it matches. Throw it away otherwise.
10376 No attribute means no claim to conform. */
10377 if (!in_attr[i].s || !out_attr[i].s
10378 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
10379 out_attr[i].s = NULL;
10380 break;
3cfad14c 10381
91e22acd 10382 default:
e8b36cd1
JM		 10383 result
10384 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
91e22acd
AS		 10385 }
10386
10387 /* If out_attr was copied from in_attr then it won't have a type yet. */
10388 if (in_attr[i].type && !out_attr[i].type)
10389 out_attr[i].type = in_attr[i].type;
ee065d83
PB		 10390 }
10391
104d59d1 10392 /* Merge Tag_compatibility attributes and any common GNU ones. */
5488d830
MGD		 10393 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
10394 return FALSE;
ee065d83 10395
104d59d1 10396 /* Check for any attributes not known on ARM. */
e8b36cd1 10397 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
91e22acd 10398
91e22acd 10399 return result;
252b5132
RH		 10400}
10401
3a4a14e9
PB		 10402
10403/* Return TRUE if the two EABI versions are incompatible. */
10404
10405static bfd_boolean
10406elf32_arm_versions_compatible (unsigned iver, unsigned over)
10407{
10408 /* v4 and v5 are the same spec before and after it was released,
10409 so allow mixing them. */
10410 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
10411 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
10412 return TRUE;
10413
10414 return (iver == over);
10415}
10416
252b5132
RH		 10417/* Merge backend specific data from an object file to the output
10418 object file when linking. */
9b485d32 10419
b34976b6 10420static bfd_boolean
21d799b5 10421elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
252b5132 10422
9b485d32
NC		 10423/* Display the flags field. */
10424
b34976b6 10425static bfd_boolean
57e8b36a 10426elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 10427{
fc830a83
NC		 10428 FILE * file = (FILE *) ptr;
10429 unsigned long flags;
252b5132
RH		 10430
10431 BFD_ASSERT (abfd != NULL && ptr != NULL);
10432
10433 /* Print normal ELF private data. */
10434 _bfd_elf_print_private_bfd_data (abfd, ptr);
10435
fc830a83 10436 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 10437 /* Ignore init flag - it may not be set, despite the flags field
10438 containing valid data. */
252b5132
RH		 10439
10440 /* xgettext:c-format */
9b485d32 10441 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 10442
fc830a83
NC		 10443 switch (EF_ARM_EABI_VERSION (flags))
10444 {
10445 case EF_ARM_EABI_UNKNOWN:
4cc11e76 10446 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 10447 official ARM ELF extended ABI. Hence they are only decoded if
10448 the EABI version is not set. */
fd2ec330 10449 if (flags & EF_ARM_INTERWORK)
9b485d32 10450 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 10451
fd2ec330 10452 if (flags & EF_ARM_APCS_26)
6c571f00 10453 fprintf (file, " [APCS-26]");
fc830a83 10454 else
6c571f00 10455 fprintf (file, " [APCS-32]");
9a5aca8c 10456
96a846ea
RE		 10457 if (flags & EF_ARM_VFP_FLOAT)
10458 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 10459 else if (flags & EF_ARM_MAVERICK_FLOAT)
10460 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 10461 else
10462 fprintf (file, _(" [FPA float format]"));
10463
fd2ec330 10464 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 10465 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 10466
fd2ec330 10467 if (flags & EF_ARM_PIC)
9b485d32 10468 fprintf (file, _(" [position independent]"));
fc830a83 10469
fd2ec330 10470 if (flags & EF_ARM_NEW_ABI)
9b485d32 10471 fprintf (file, _(" [new ABI]"));
9a5aca8c 10472
fd2ec330 10473 if (flags & EF_ARM_OLD_ABI)
9b485d32 10474 fprintf (file, _(" [old ABI]"));
9a5aca8c 10475
fd2ec330 10476 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 10477 fprintf (file, _(" [software FP]"));
9a5aca8c 10478
96a846ea
RE		 10479 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
10480 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 10481 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
10482 | EF_ARM_MAVERICK_FLOAT);
fc830a83 10483 break;
9a5aca8c 10484
fc830a83 10485 case EF_ARM_EABI_VER1:
9b485d32 10486 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 10487
fc830a83 10488 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 10489 fprintf (file, _(" [sorted symbol table]"));
fc830a83 10490 else
9b485d32 10491 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 10492
fc830a83
NC		 10493 flags &= ~ EF_ARM_SYMSARESORTED;
10494 break;
9a5aca8c 10495
fd2ec330
PB		 10496 case EF_ARM_EABI_VER2:
10497 fprintf (file, _(" [Version2 EABI]"));
10498
10499 if (flags & EF_ARM_SYMSARESORTED)
10500 fprintf (file, _(" [sorted symbol table]"));
10501 else
10502 fprintf (file, _(" [unsorted symbol table]"));
10503
10504 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
10505 fprintf (file, _(" [dynamic symbols use segment index]"));
10506
10507 if (flags & EF_ARM_MAPSYMSFIRST)
10508 fprintf (file, _(" [mapping symbols precede others]"));
10509
99e4ae17 10510 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 10511 | EF_ARM_MAPSYMSFIRST);
10512 break;
10513
d507cf36
PB		 10514 case EF_ARM_EABI_VER3:
10515 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 10516 break;
10517
10518 case EF_ARM_EABI_VER4:
10519 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 10520 goto eabi;
d507cf36 10521
3a4a14e9
PB		 10522 case EF_ARM_EABI_VER5:
10523 fprintf (file, _(" [Version5 EABI]"));
10524 eabi:
d507cf36
PB		 10525 if (flags & EF_ARM_BE8)
10526 fprintf (file, _(" [BE8]"));
10527
10528 if (flags & EF_ARM_LE8)
10529 fprintf (file, _(" [LE8]"));
10530
10531 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
10532 break;
10533
fc830a83 10534 default:
9b485d32 10535 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 10536 break;
10537 }
252b5132 10538
fc830a83 10539 flags &= ~ EF_ARM_EABIMASK;
252b5132 10540
fc830a83 10541 if (flags & EF_ARM_RELEXEC)
9b485d32 10542 fprintf (file, _(" [relocatable executable]"));
252b5132 10543
fc830a83 10544 if (flags & EF_ARM_HASENTRY)
9b485d32 10545 fprintf (file, _(" [has entry point]"));
252b5132 10546
fc830a83
NC		 10547 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
10548
10549 if (flags)
9b485d32 10550 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 10551
252b5132
RH		 10552 fputc ('\n', file);
10553
b34976b6 10554 return TRUE;
252b5132
RH		 10555}
10556
10557static int
57e8b36a 10558elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 10559{
2f0ca46a
NC		 10560 switch (ELF_ST_TYPE (elf_sym->st_info))
10561 {
10562 case STT_ARM_TFUNC:
10563 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 10564
2f0ca46a
NC		 10565 case STT_ARM_16BIT:
10566 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
10567 This allows us to distinguish between data used by Thumb instructions
10568 and non-data (which is probably code) inside Thumb regions of an
10569 executable. */
1a0eb693 10570 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 10571 return ELF_ST_TYPE (elf_sym->st_info);
10572 break;
9a5aca8c 10573
ce855c42
NC		 10574 default:
10575 break;
2f0ca46a
NC		 10576 }
10577
10578 return type;
252b5132 10579}
f21f3fe0 10580
252b5132 10581static asection *
07adf181
AM		 10582elf32_arm_gc_mark_hook (asection *sec,
10583 struct bfd_link_info *info,
10584 Elf_Internal_Rela *rel,
10585 struct elf_link_hash_entry *h,
10586 Elf_Internal_Sym *sym)
252b5132
RH		 10587{
10588 if (h != NULL)
07adf181 10589 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 10590 {
10591 case R_ARM_GNU_VTINHERIT:
10592 case R_ARM_GNU_VTENTRY:
07adf181
AM		 10593 return NULL;
10594 }
9ad5cbcf 10595
07adf181 10596 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 10597}
10598
780a67af
NC		 10599/* Update the got entry reference counts for the section being removed. */
10600
b34976b6 10601static bfd_boolean
ba93b8ac
DJ		 10602elf32_arm_gc_sweep_hook (bfd * abfd,
10603 struct bfd_link_info * info,
10604 asection * sec,
10605 const Elf_Internal_Rela * relocs)
252b5132 10606{
5e681ec4
PB		 10607 Elf_Internal_Shdr *symtab_hdr;
10608 struct elf_link_hash_entry **sym_hashes;
10609 bfd_signed_vma *local_got_refcounts;
10610 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 10611 struct elf32_arm_link_hash_table * globals;
10612
7dda2462
TG		 10613 if (info->relocatable)
10614 return TRUE;
10615
eb043451 10616 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 10617 if (globals == NULL)
10618 return FALSE;
5e681ec4
PB		 10619
10620 elf_section_data (sec)->local_dynrel = NULL;
10621
0ffa91dd 10622 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 10623 sym_hashes = elf_sym_hashes (abfd);
10624 local_got_refcounts = elf_local_got_refcounts (abfd);
10625
906e58ca 10626 check_use_blx (globals);
bd97cb95 10627
5e681ec4
PB		 10628 relend = relocs + sec->reloc_count;
10629 for (rel = relocs; rel < relend; rel++)
eb043451 10630 {
3eb128b2
AM		 10631 unsigned long r_symndx;
10632 struct elf_link_hash_entry *h = NULL;
eb043451 10633 int r_type;
5e681ec4 10634
3eb128b2
AM		 10635 r_symndx = ELF32_R_SYM (rel->r_info);
10636 if (r_symndx >= symtab_hdr->sh_info)
10637 {
10638 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
10639 while (h->root.type == bfd_link_hash_indirect
10640 || h->root.type == bfd_link_hash_warning)
10641 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10642 }
10643
eb043451 10644 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 10645 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 10646 switch (r_type)
10647 {
10648 case R_ARM_GOT32:
eb043451 10649 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 10650 case R_ARM_TLS_GD32:
10651 case R_ARM_TLS_IE32:
3eb128b2 10652 if (h != NULL)
eb043451 10653 {
eb043451
PB		 10654 if (h->got.refcount > 0)
10655 h->got.refcount -= 1;
10656 }
10657 else if (local_got_refcounts != NULL)
10658 {
10659 if (local_got_refcounts[r_symndx] > 0)
10660 local_got_refcounts[r_symndx] -= 1;
10661 }
10662 break;
10663
ba93b8ac 10664 case R_ARM_TLS_LDM32:
4dfe6ac6 10665 globals->tls_ldm_got.refcount -= 1;
ba93b8ac
DJ		 10666 break;
10667
eb043451 10668 case R_ARM_ABS32:
bb224fc3 10669 case R_ARM_ABS32_NOI:
eb043451 10670 case R_ARM_REL32:
bb224fc3 10671 case R_ARM_REL32_NOI:
eb043451
PB		 10672 case R_ARM_PC24:
10673 case R_ARM_PLT32:
5b5bb741
PB		 10674 case R_ARM_CALL:
10675 case R_ARM_JUMP24:
eb043451 10676 case R_ARM_PREL31:
c19d1205 10677 case R_ARM_THM_CALL:
bd97cb95
DJ		 10678 case R_ARM_THM_JUMP24:
10679 case R_ARM_THM_JUMP19:
b6895b4f
PB		 10680 case R_ARM_MOVW_ABS_NC:
10681 case R_ARM_MOVT_ABS:
10682 case R_ARM_MOVW_PREL_NC:
10683 case R_ARM_MOVT_PREL:
10684 case R_ARM_THM_MOVW_ABS_NC:
10685 case R_ARM_THM_MOVT_ABS:
10686 case R_ARM_THM_MOVW_PREL_NC:
10687 case R_ARM_THM_MOVT_PREL:
b7693d02
DJ		 10688 /* Should the interworking branches be here also? */
10689
3eb128b2 10690 if (h != NULL)
eb043451
PB		 10691 {
10692 struct elf32_arm_link_hash_entry *eh;
0bdcacaf
RS		 10693 struct elf_dyn_relocs **pp;
10694 struct elf_dyn_relocs *p;
5e681ec4 10695
b7693d02 10696 eh = (struct elf32_arm_link_hash_entry *) h;
5e681ec4 10697
eb043451 10698 if (h->plt.refcount > 0)
b7693d02
DJ		 10699 {
10700 h->plt.refcount -= 1;
bd97cb95
DJ		 10701 if (r_type == R_ARM_THM_CALL)
10702 eh->plt_maybe_thumb_refcount--;
10703
10704 if (r_type == R_ARM_THM_JUMP24
10705 || r_type == R_ARM_THM_JUMP19)
b7693d02
DJ		 10706 eh->plt_thumb_refcount--;
10707 }
5e681ec4 10708
eb043451 10709 if (r_type == R_ARM_ABS32
bb224fc3
MS		 10710 || r_type == R_ARM_REL32
10711 || r_type == R_ARM_ABS32_NOI
10712 || r_type == R_ARM_REL32_NOI)
0bdcacaf
RS		 10713 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; pp = &p->next)
10714 if (p->sec == sec)
eb043451
PB		 10715 {
10716 p->count -= 1;
bb224fc3 10717 if (ELF32_R_TYPE (rel->r_info) == R_ARM_REL32
0bdcacaf 10718 || ELF32_R_TYPE (rel->r_info) == R_ARM_REL32_NOI)
ba93b8ac 10719 p->pc_count -= 1;
eb043451
PB		 10720 if (p->count == 0)
10721 *pp = p->next;
10722 break;
10723 }
eb043451
PB		 10724 }
10725 break;
5e681ec4 10726
eb043451
PB		 10727 default:
10728 break;
10729 }
10730 }
5e681ec4 10731
b34976b6 10732 return TRUE;
252b5132
RH		 10733}
10734
780a67af
NC		 10735/* Look through the relocs for a section during the first phase. */
10736
b34976b6 10737static bfd_boolean
57e8b36a
NC		 10738elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
10739 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 10740{
b34976b6
AM		 10741 Elf_Internal_Shdr *symtab_hdr;
10742 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 10743 const Elf_Internal_Rela *rel;
10744 const Elf_Internal_Rela *rel_end;
10745 bfd *dynobj;
5e681ec4 10746 asection *sreloc;
5e681ec4 10747 struct elf32_arm_link_hash_table *htab;
39623e12 10748 bfd_boolean needs_plt;
ce98a316 10749 unsigned long nsyms;
9a5aca8c 10750
1049f94e 10751 if (info->relocatable)
b34976b6 10752 return TRUE;
9a5aca8c 10753
0ffa91dd
NC		 10754 BFD_ASSERT (is_arm_elf (abfd));
10755
5e681ec4 10756 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 10757 if (htab == NULL)
10758 return FALSE;
10759
5e681ec4 10760 sreloc = NULL;
9a5aca8c 10761
67687978
PB		 10762 /* Create dynamic sections for relocatable executables so that we can
10763 copy relocations. */
10764 if (htab->root.is_relocatable_executable
10765 && ! htab->root.dynamic_sections_created)
10766 {
10767 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
10768 return FALSE;
10769 }
10770
252b5132 10771 dynobj = elf_hash_table (info)->dynobj;
0ffa91dd 10772 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 10773 sym_hashes = elf_sym_hashes (abfd);
ce98a316
NC		 10774 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
10775
252b5132
RH		 10776 rel_end = relocs + sec->reloc_count;
10777 for (rel = relocs; rel < rel_end; rel++)
10778 {
10779 struct elf_link_hash_entry *h;
b7693d02 10780 struct elf32_arm_link_hash_entry *eh;
252b5132 10781 unsigned long r_symndx;
eb043451 10782 int r_type;
9a5aca8c 10783
252b5132 10784 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 10785 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 10786 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac 10787
ce98a316
NC		 10788 if (r_symndx >= nsyms
10789 /* PR 9934: It is possible to have relocations that do not
10790 refer to symbols, thus it is also possible to have an
10791 object file containing relocations but no symbol table. */
cf35638d 10792 && (r_symndx > STN_UNDEF || nsyms > 0))
ba93b8ac
DJ		 10793 {
10794 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
ce98a316 10795 r_symndx);
ba93b8ac
DJ		 10796 return FALSE;
10797 }
10798
ce98a316 10799 if (nsyms == 0 || r_symndx < symtab_hdr->sh_info)
252b5132
RH		 10800 h = NULL;
10801 else
973a3492
L		 10802 {
10803 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
10804 while (h->root.type == bfd_link_hash_indirect
10805 || h->root.type == bfd_link_hash_warning)
10806 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10807 }
9a5aca8c 10808
b7693d02
DJ		 10809 eh = (struct elf32_arm_link_hash_entry *) h;
10810
eb043451 10811 switch (r_type)
252b5132 10812 {
5e681ec4 10813 case R_ARM_GOT32:
eb043451 10814 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 10815 case R_ARM_TLS_GD32:
10816 case R_ARM_TLS_IE32:
5e681ec4 10817 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 10818 {
10819 int tls_type, old_tls_type;
5e681ec4 10820
ba93b8ac
DJ		 10821 switch (r_type)
10822 {
10823 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
10824 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
10825 default: tls_type = GOT_NORMAL; break;
10826 }
252b5132 10827
ba93b8ac
DJ		 10828 if (h != NULL)
10829 {
10830 h->got.refcount++;
10831 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
10832 }
10833 else
10834 {
10835 bfd_signed_vma *local_got_refcounts;
10836
10837 /* This is a global offset table entry for a local symbol. */
10838 local_got_refcounts = elf_local_got_refcounts (abfd);
10839 if (local_got_refcounts == NULL)
10840 {
10841 bfd_size_type size;
906e58ca 10842
ba93b8ac 10843 size = symtab_hdr->sh_info;
906e58ca 10844 size *= (sizeof (bfd_signed_vma) + sizeof (char));
21d799b5
NC		 10845 local_got_refcounts = (bfd_signed_vma *)
10846 bfd_zalloc (abfd, size);
ba93b8ac
DJ		 10847 if (local_got_refcounts == NULL)
10848 return FALSE;
10849 elf_local_got_refcounts (abfd) = local_got_refcounts;
10850 elf32_arm_local_got_tls_type (abfd)
10851 = (char *) (local_got_refcounts + symtab_hdr->sh_info);
10852 }
10853 local_got_refcounts[r_symndx] += 1;
10854 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
10855 }
10856
10857 /* We will already have issued an error message if there is a
10858 TLS / non-TLS mismatch, based on the symbol type. We don't
10859 support any linker relaxations. So just combine any TLS
10860 types needed. */
10861 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
10862 && tls_type != GOT_NORMAL)
10863 tls_type |= old_tls_type;
10864
10865 if (old_tls_type != tls_type)
10866 {
10867 if (h != NULL)
10868 elf32_arm_hash_entry (h)->tls_type = tls_type;
10869 else
10870 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
10871 }
10872 }
8029a119 10873 /* Fall through. */
ba93b8ac
DJ		 10874
10875 case R_ARM_TLS_LDM32:
10876 if (r_type == R_ARM_TLS_LDM32)
10877 htab->tls_ldm_got.refcount++;
8029a119 10878 /* Fall through. */
252b5132 10879
c19d1205 10880 case R_ARM_GOTOFF32:
5e681ec4
PB		 10881 case R_ARM_GOTPC:
10882 if (htab->sgot == NULL)
10883 {
10884 if (htab->root.dynobj == NULL)
10885 htab->root.dynobj = abfd;
10886 if (!create_got_section (htab->root.dynobj, info))
10887 return FALSE;
10888 }
252b5132
RH		 10889 break;
10890
00a97672
RS		 10891 case R_ARM_ABS12:
10892 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
10893 ldr __GOTT_INDEX__ offsets. */
10894 if (!htab->vxworks_p)
10895 break;
8029a119 10896 /* Fall through. */
00a97672 10897
252b5132 10898 case R_ARM_PC24:
7359ea65 10899 case R_ARM_PLT32:
5b5bb741
PB		 10900 case R_ARM_CALL:
10901 case R_ARM_JUMP24:
eb043451 10902 case R_ARM_PREL31:
c19d1205 10903 case R_ARM_THM_CALL:
bd97cb95
DJ		 10904 case R_ARM_THM_JUMP24:
10905 case R_ARM_THM_JUMP19:
39623e12
PB		 10906 needs_plt = 1;
10907 goto normal_reloc;
10908
96c23d59
JM		 10909 case R_ARM_MOVW_ABS_NC:
10910 case R_ARM_MOVT_ABS:
10911 case R_ARM_THM_MOVW_ABS_NC:
10912 case R_ARM_THM_MOVT_ABS:
10913 if (info->shared)
10914 {
10915 (*_bfd_error_handler)
10916 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
10917 abfd, elf32_arm_howto_table_1[r_type].name,
10918 (h) ? h->root.root.string : "a local symbol");
10919 bfd_set_error (bfd_error_bad_value);
10920 return FALSE;
10921 }
10922
10923 /* Fall through. */
39623e12
PB		 10924 case R_ARM_ABS32:
10925 case R_ARM_ABS32_NOI:
10926 case R_ARM_REL32:
10927 case R_ARM_REL32_NOI:
b6895b4f
PB		 10928 case R_ARM_MOVW_PREL_NC:
10929 case R_ARM_MOVT_PREL:
b6895b4f
PB		 10930 case R_ARM_THM_MOVW_PREL_NC:
10931 case R_ARM_THM_MOVT_PREL:
39623e12
PB		 10932 needs_plt = 0;
10933 normal_reloc:
10934
b7693d02 10935 /* Should the interworking branches be listed here? */
7359ea65 10936 if (h != NULL)
5e681ec4
PB		 10937 {
10938 /* If this reloc is in a read-only section, we might
10939 need a copy reloc. We can't check reliably at this
10940 stage whether the section is read-only, as input
10941 sections have not yet been mapped to output sections.
10942 Tentatively set the flag for now, and correct in
10943 adjust_dynamic_symbol. */
7359ea65 10944 if (!info->shared)
f5385ebf 10945 h->non_got_ref = 1;
7359ea65 10946
5e681ec4 10947 /* We may need a .plt entry if the function this reloc
c84cd8ee
DJ		 10948 refers to is in a different object. We can't tell for
10949 sure yet, because something later might force the
10950 symbol local. */
39623e12 10951 if (needs_plt)
f5385ebf 10952 h->needs_plt = 1;
4f199be3
DJ		 10953
10954 /* If we create a PLT entry, this relocation will reference
10955 it, even if it's an ABS32 relocation. */
10956 h->plt.refcount += 1;
b7693d02 10957
bd97cb95
DJ		 10958 /* It's too early to use htab->use_blx here, so we have to
10959 record possible blx references separately from
10960 relocs that definitely need a thumb stub. */
10961
c19d1205 10962 if (r_type == R_ARM_THM_CALL)
bd97cb95
DJ		 10963 eh->plt_maybe_thumb_refcount += 1;
10964
10965 if (r_type == R_ARM_THM_JUMP24
10966 || r_type == R_ARM_THM_JUMP19)
b7693d02 10967 eh->plt_thumb_refcount += 1;
5e681ec4
PB		 10968 }
10969
67687978
PB		 10970 /* If we are creating a shared library or relocatable executable,
10971 and this is a reloc against a global symbol, or a non PC
10972 relative reloc against a local symbol, then we need to copy
10973 the reloc into the shared library. However, if we are linking
10974 with -Bsymbolic, we do not need to copy a reloc against a
252b5132
RH		 10975 global symbol which is defined in an object we are
10976 including in the link (i.e., DEF_REGULAR is set). At
10977 this point we have not seen all the input files, so it is
10978 possible that DEF_REGULAR is not set now but will be set
10979 later (it is never cleared). We account for that
10980 possibility below by storing information in the
0bdcacaf 10981 dyn_relocs field of the hash table entry. */
67687978 10982 if ((info->shared || htab->root.is_relocatable_executable)
5e681ec4 10983 && (sec->flags & SEC_ALLOC) != 0
bb224fc3 10984 && ((r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI)
71a976dd
DJ		 10985 || (h != NULL && ! h->needs_plt
10986 && (! info->symbolic || ! h->def_regular))))
252b5132 10987 {
0bdcacaf 10988 struct elf_dyn_relocs *p, **head;
5e681ec4 10989
252b5132
RH		 10990 /* When creating a shared object, we must copy these
10991 reloc types into the output file. We create a reloc
10992 section in dynobj and make room for this reloc. */
83bac4b0 10993 if (sreloc == NULL)
252b5132 10994 {
83bac4b0
NC		 10995 sreloc = _bfd_elf_make_dynamic_reloc_section
10996 (sec, dynobj, 2, abfd, ! htab->use_rel);
252b5132 10997
83bac4b0 10998 if (sreloc == NULL)
b34976b6 10999 return FALSE;
252b5132 11000
83bac4b0 11001 /* BPABI objects never have dynamic relocations mapped. */
a89e6478 11002 if (htab->symbian_p)
252b5132 11003 {
83bac4b0 11004 flagword flags;
5e681ec4 11005
83bac4b0 11006 flags = bfd_get_section_flags (dynobj, sreloc);
a89e6478 11007 flags &= ~(SEC_LOAD | SEC_ALLOC);
83bac4b0
NC		 11008 bfd_set_section_flags (dynobj, sreloc, flags);
11009 }
252b5132
RH		 11010 }
11011
5e681ec4
PB		 11012 /* If this is a global symbol, we count the number of
11013 relocations we need for this symbol. */
11014 if (h != NULL)
252b5132 11015 {
0bdcacaf 11016 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
5e681ec4
PB		 11017 }
11018 else
11019 {
11020 /* Track dynamic relocs needed for local syms too.
11021 We really need local syms available to do this
11022 easily. Oh well. */
5e681ec4 11023 asection *s;
6edfbbad 11024 void *vpp;
87d72d41 11025 Elf_Internal_Sym *isym;
6edfbbad 11026
87d72d41
AM		 11027 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
11028 abfd, r_symndx);
11029 if (isym == NULL)
5e681ec4 11030 return FALSE;
57e8b36a 11031
87d72d41
AM		 11032 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
11033 if (s == NULL)
11034 s = sec;
11035
6edfbbad 11036 vpp = &elf_section_data (s)->local_dynrel;
0bdcacaf 11037 head = (struct elf_dyn_relocs **) vpp;
5e681ec4 11038 }
57e8b36a 11039
5e681ec4 11040 p = *head;
0bdcacaf 11041 if (p == NULL || p->sec != sec)
5e681ec4
PB		 11042 {
11043 bfd_size_type amt = sizeof *p;
57e8b36a 11044
0bdcacaf 11045 p = (struct elf_dyn_relocs *)
21d799b5 11046 bfd_alloc (htab->root.dynobj, amt);
252b5132 11047 if (p == NULL)
5e681ec4
PB		 11048 return FALSE;
11049 p->next = *head;
11050 *head = p;
0bdcacaf 11051 p->sec = sec;
5e681ec4 11052 p->count = 0;
ba93b8ac 11053 p->pc_count = 0;
252b5132 11054 }
57e8b36a 11055
bb224fc3 11056 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
ba93b8ac 11057 p->pc_count += 1;
71a976dd 11058 p->count += 1;
252b5132
RH		 11059 }
11060 break;
11061
11062 /* This relocation describes the C++ object vtable hierarchy.
11063 Reconstruct it for later use during GC. */
11064 case R_ARM_GNU_VTINHERIT:
c152c796 11065 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 11066 return FALSE;
252b5132 11067 break;
9a5aca8c 11068
252b5132
RH		 11069 /* This relocation describes which C++ vtable entries are actually
11070 used. Record for later use during GC. */
11071 case R_ARM_GNU_VTENTRY:
d17e0c6e
JB		 11072 BFD_ASSERT (h != NULL);
11073 if (h != NULL
11074 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
b34976b6 11075 return FALSE;
252b5132
RH		 11076 break;
11077 }
11078 }
f21f3fe0 11079
b34976b6 11080 return TRUE;
252b5132
RH		 11081}
11082
6a5bb875
PB		 11083/* Unwinding tables are not referenced directly. This pass marks them as
11084 required if the corresponding code section is marked. */
11085
11086static bfd_boolean
906e58ca
NC		 11087elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
11088 elf_gc_mark_hook_fn gc_mark_hook)
6a5bb875
PB		 11089{
11090 bfd *sub;
11091 Elf_Internal_Shdr **elf_shdrp;
11092 bfd_boolean again;
11093
11094 /* Marking EH data may cause additional code sections to be marked,
11095 requiring multiple passes. */
11096 again = TRUE;
11097 while (again)
11098 {
11099 again = FALSE;
11100 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
11101 {
11102 asection *o;
11103
0ffa91dd 11104 if (! is_arm_elf (sub))
6a5bb875
PB		 11105 continue;
11106
11107 elf_shdrp = elf_elfsections (sub);
11108 for (o = sub->sections; o != NULL; o = o->next)
11109 {
11110 Elf_Internal_Shdr *hdr;
0ffa91dd 11111
6a5bb875 11112 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 11113 if (hdr->sh_type == SHT_ARM_EXIDX
11114 && hdr->sh_link
11115 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 11116 && !o->gc_mark
11117 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
11118 {
11119 again = TRUE;
11120 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
11121 return FALSE;
11122 }
11123 }
11124 }
11125 }
11126
11127 return TRUE;
11128}
11129
3c9458e9
NC		 11130/* Treat mapping symbols as special target symbols. */
11131
11132static bfd_boolean
11133elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
11134{
b0796911
PB		 11135 return bfd_is_arm_special_symbol_name (sym->name,
11136 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 11137}
11138
0367ecfb
NC		 11139/* This is a copy of elf_find_function() from elf.c except that
11140 ARM mapping symbols are ignored when looking for function names
11141 and STT_ARM_TFUNC is considered to a function type. */
252b5132 11142
0367ecfb
NC		 11143static bfd_boolean
11144arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
11145 asection * section,
11146 asymbol ** symbols,
11147 bfd_vma offset,
11148 const char ** filename_ptr,
11149 const char ** functionname_ptr)
11150{
11151 const char * filename = NULL;
11152 asymbol * func = NULL;
11153 bfd_vma low_func = 0;
11154 asymbol ** p;
252b5132
RH		 11155
11156 for (p = symbols; *p != NULL; p++)
11157 {
11158 elf_symbol_type *q;
11159
11160 q = (elf_symbol_type *) *p;
11161
252b5132
RH		 11162 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
11163 {
11164 default:
11165 break;
11166 case STT_FILE:
11167 filename = bfd_asymbol_name (&q->symbol);
11168 break;
252b5132
RH		 11169 case STT_FUNC:
11170 case STT_ARM_TFUNC:
9d2da7ca 11171 case STT_NOTYPE:
b0796911 11172 /* Skip mapping symbols. */
0367ecfb 11173 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 11174 && bfd_is_arm_special_symbol_name (q->symbol.name,
11175 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 11176 continue;
11177 /* Fall through. */
6b40fcba 11178 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 11179 && q->symbol.value >= low_func
11180 && q->symbol.value <= offset)
11181 {
11182 func = (asymbol *) q;
11183 low_func = q->symbol.value;
11184 }
11185 break;
11186 }
11187 }
11188
11189 if (func == NULL)
b34976b6 11190 return FALSE;
252b5132 11191
0367ecfb
NC		 11192 if (filename_ptr)
11193 *filename_ptr = filename;
11194 if (functionname_ptr)
11195 *functionname_ptr = bfd_asymbol_name (func);
11196
11197 return TRUE;
906e58ca 11198}
0367ecfb
NC		 11199
11200
11201/* Find the nearest line to a particular section and offset, for error
11202 reporting. This code is a duplicate of the code in elf.c, except
11203 that it uses arm_elf_find_function. */
11204
11205static bfd_boolean
11206elf32_arm_find_nearest_line (bfd * abfd,
11207 asection * section,
11208 asymbol ** symbols,
11209 bfd_vma offset,
11210 const char ** filename_ptr,
11211 const char ** functionname_ptr,
11212 unsigned int * line_ptr)
11213{
11214 bfd_boolean found = FALSE;
11215
11216 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
11217
11218 if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset,
11219 filename_ptr, functionname_ptr,
11220 line_ptr, 0,
11221 & elf_tdata (abfd)->dwarf2_find_line_info))
11222 {
11223 if (!*functionname_ptr)
11224 arm_elf_find_function (abfd, section, symbols, offset,
11225 *filename_ptr ? NULL : filename_ptr,
11226 functionname_ptr);
f21f3fe0 11227
0367ecfb
NC		 11228 return TRUE;
11229 }
11230
11231 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
11232 & found, filename_ptr,
11233 functionname_ptr, line_ptr,
11234 & elf_tdata (abfd)->line_info))
11235 return FALSE;
11236
11237 if (found && (*functionname_ptr || *line_ptr))
11238 return TRUE;
11239
11240 if (symbols == NULL)
11241 return FALSE;
11242
11243 if (! arm_elf_find_function (abfd, section, symbols, offset,
11244 filename_ptr, functionname_ptr))
11245 return FALSE;
11246
11247 *line_ptr = 0;
b34976b6 11248 return TRUE;
252b5132
RH		 11249}
11250
4ab527b0
FF		 11251static bfd_boolean
11252elf32_arm_find_inliner_info (bfd * abfd,
11253 const char ** filename_ptr,
11254 const char ** functionname_ptr,
11255 unsigned int * line_ptr)
11256{
11257 bfd_boolean found;
11258 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
11259 functionname_ptr, line_ptr,
11260 & elf_tdata (abfd)->dwarf2_find_line_info);
11261 return found;
11262}
11263
252b5132
RH		 11264/* Adjust a symbol defined by a dynamic object and referenced by a
11265 regular object. The current definition is in some section of the
11266 dynamic object, but we're not including those sections. We have to
11267 change the definition to something the rest of the link can
11268 understand. */
11269
b34976b6 11270static bfd_boolean
57e8b36a
NC		 11271elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
11272 struct elf_link_hash_entry * h)
252b5132
RH		 11273{
11274 bfd * dynobj;
11275 asection * s;
b7693d02 11276 struct elf32_arm_link_hash_entry * eh;
67687978 11277 struct elf32_arm_link_hash_table *globals;
252b5132 11278
67687978 11279 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11280 if (globals == NULL)
11281 return FALSE;
11282
252b5132
RH		 11283 dynobj = elf_hash_table (info)->dynobj;
11284
11285 /* Make sure we know what is going on here. */
11286 BFD_ASSERT (dynobj != NULL
f5385ebf 11287 && (h->needs_plt
f6e332e6 11288 || h->u.weakdef != NULL
f5385ebf
AM		 11289 || (h->def_dynamic
11290 && h->ref_regular
11291 && !h->def_regular)));
252b5132 11292
b7693d02
DJ		 11293 eh = (struct elf32_arm_link_hash_entry *) h;
11294
252b5132
RH		 11295 /* If this is a function, put it in the procedure linkage table. We
11296 will fill in the contents of the procedure linkage table later,
11297 when we know the address of the .got section. */
0f88be7a 11298 if (h->type == STT_FUNC || h->type == STT_ARM_TFUNC
f5385ebf 11299 || h->needs_plt)
252b5132 11300 {
5e681ec4
PB		 11301 if (h->plt.refcount <= 0
11302 || SYMBOL_CALLS_LOCAL (info, h)
11303 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
11304 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 11305 {
11306 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 11307 file, but the symbol was never referred to by a dynamic
11308 object, or if all references were garbage collected. In
11309 such a case, we don't actually need to build a procedure
11310 linkage table, and we can just do a PC24 reloc instead. */
11311 h->plt.offset = (bfd_vma) -1;
b7693d02 11312 eh->plt_thumb_refcount = 0;
bd97cb95 11313 eh->plt_maybe_thumb_refcount = 0;
f5385ebf 11314 h->needs_plt = 0;
252b5132
RH		 11315 }
11316
b34976b6 11317 return TRUE;
252b5132 11318 }
5e681ec4 11319 else
b7693d02
DJ		 11320 {
11321 /* It's possible that we incorrectly decided a .plt reloc was
11322 needed for an R_ARM_PC24 or similar reloc to a non-function sym
11323 in check_relocs. We can't decide accurately between function
11324 and non-function syms in check-relocs; Objects loaded later in
11325 the link may change h->type. So fix it now. */
11326 h->plt.offset = (bfd_vma) -1;
11327 eh->plt_thumb_refcount = 0;
bd97cb95 11328 eh->plt_maybe_thumb_refcount = 0;
b7693d02 11329 }
252b5132
RH		 11330
11331 /* If this is a weak symbol, and there is a real definition, the
11332 processor independent code will have arranged for us to see the
11333 real definition first, and we can just use the same value. */
f6e332e6 11334 if (h->u.weakdef != NULL)
252b5132 11335 {
f6e332e6
AM		 11336 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
11337 || h->u.weakdef->root.type == bfd_link_hash_defweak);
11338 h->root.u.def.section = h->u.weakdef->root.u.def.section;
11339 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 11340 return TRUE;
252b5132
RH		 11341 }
11342
ba93b8ac
DJ		 11343 /* If there are no non-GOT references, we do not need a copy
11344 relocation. */
11345 if (!h->non_got_ref)
11346 return TRUE;
11347
252b5132
RH		 11348 /* This is a reference to a symbol defined by a dynamic object which
11349 is not a function. */
11350
11351 /* If we are creating a shared library, we must presume that the
11352 only references to the symbol are via the global offset table.
11353 For such cases we need not do anything here; the relocations will
67687978
PB		 11354 be handled correctly by relocate_section. Relocatable executables
11355 can reference data in shared objects directly, so we don't need to
11356 do anything here. */
11357 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 11358 return TRUE;
252b5132 11359
909272ee
AM		 11360 if (h->size == 0)
11361 {
11362 (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
11363 h->root.root.string);
11364 return TRUE;
11365 }
11366
252b5132
RH		 11367 /* We must allocate the symbol in our .dynbss section, which will
11368 become part of the .bss section of the executable. There will be
11369 an entry for this symbol in the .dynsym section. The dynamic
11370 object will contain position independent code, so all references
11371 from the dynamic object to this symbol will go through the global
11372 offset table. The dynamic linker will use the .dynsym entry to
11373 determine the address it must put in the global offset table, so
11374 both the dynamic object and the regular object will refer to the
11375 same memory location for the variable. */
252b5132
RH		 11376 s = bfd_get_section_by_name (dynobj, ".dynbss");
11377 BFD_ASSERT (s != NULL);
11378
11379 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
11380 copy the initial value out of the dynamic object and into the
11381 runtime process image. We need to remember the offset into the
00a97672 11382 .rel(a).bss section we are going to use. */
252b5132
RH		 11383 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
11384 {
11385 asection *srel;
11386
00a97672 11387 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
252b5132 11388 BFD_ASSERT (srel != NULL);
00a97672 11389 srel->size += RELOC_SIZE (globals);
f5385ebf 11390 h->needs_copy = 1;
252b5132
RH		 11391 }
11392
027297b7 11393 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 11394}
11395
5e681ec4
PB		 11396/* Allocate space in .plt, .got and associated reloc sections for
11397 dynamic relocs. */
11398
11399static bfd_boolean
57e8b36a 11400allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 11401{
11402 struct bfd_link_info *info;
11403 struct elf32_arm_link_hash_table *htab;
11404 struct elf32_arm_link_hash_entry *eh;
0bdcacaf 11405 struct elf_dyn_relocs *p;
bd97cb95 11406 bfd_signed_vma thumb_refs;
5e681ec4 11407
b7693d02
DJ		 11408 eh = (struct elf32_arm_link_hash_entry *) h;
11409
5e681ec4
PB		 11410 if (h->root.type == bfd_link_hash_indirect)
11411 return TRUE;
11412
11413 if (h->root.type == bfd_link_hash_warning)
11414 /* When warning symbols are created, they **replace** the "real"
11415 entry in the hash table, thus we never get to see the real
11416 symbol in a hash traversal. So look at it now. */
11417 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11418
11419 info = (struct bfd_link_info *) inf;
11420 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11421 if (htab == NULL)
11422 return FALSE;
5e681ec4
PB		 11423
11424 if (htab->root.dynamic_sections_created
11425 && h->plt.refcount > 0)
11426 {
11427 /* Make sure this symbol is output as a dynamic symbol.
11428 Undefined weak syms won't yet be marked as dynamic. */
11429 if (h->dynindx == -1
f5385ebf 11430 && !h->forced_local)
5e681ec4 11431 {
c152c796 11432 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11433 return FALSE;
11434 }
11435
11436 if (info->shared
7359ea65 11437 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4
PB		 11438 {
11439 asection *s = htab->splt;
11440
11441 /* If this is the first .plt entry, make room for the special
11442 first entry. */
eea6121a 11443 if (s->size == 0)
e5a52504 11444 s->size += htab->plt_header_size;
5e681ec4 11445
eea6121a 11446 h->plt.offset = s->size;
5e681ec4 11447
b7693d02
DJ		 11448 /* If we will insert a Thumb trampoline before this PLT, leave room
11449 for it. */
bd97cb95
DJ		 11450 thumb_refs = eh->plt_thumb_refcount;
11451 if (!htab->use_blx)
11452 thumb_refs += eh->plt_maybe_thumb_refcount;
11453
11454 if (thumb_refs > 0)
b7693d02
DJ		 11455 {
11456 h->plt.offset += PLT_THUMB_STUB_SIZE;
11457 s->size += PLT_THUMB_STUB_SIZE;
11458 }
11459
5e681ec4
PB		 11460 /* If this symbol is not defined in a regular file, and we are
11461 not generating a shared library, then set the symbol to this
11462 location in the .plt. This is required to make function
11463 pointers compare as equal between the normal executable and
11464 the shared library. */
11465 if (! info->shared
f5385ebf 11466 && !h->def_regular)
5e681ec4
PB		 11467 {
11468 h->root.u.def.section = s;
11469 h->root.u.def.value = h->plt.offset;
5e681ec4 11470
67d74e43
DJ		 11471 /* Make sure the function is not marked as Thumb, in case
11472 it is the target of an ABS32 relocation, which will
11473 point to the PLT entry. */
11474 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
11475 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
11476 }
022f8312 11477
5e681ec4 11478 /* Make room for this entry. */
e5a52504 11479 s->size += htab->plt_entry_size;
5e681ec4 11480
e5a52504 11481 if (!htab->symbian_p)
b7693d02
DJ		 11482 {
11483 /* We also need to make an entry in the .got.plt section, which
11484 will be placed in the .got section by the linker script. */
11485 eh->plt_got_offset = htab->sgotplt->size;
11486 htab->sgotplt->size += 4;
11487 }
5e681ec4 11488
00a97672
RS		 11489 /* We also need to make an entry in the .rel(a).plt section. */
11490 htab->srelplt->size += RELOC_SIZE (htab);
11491
11492 /* VxWorks executables have a second set of relocations for
11493 each PLT entry. They go in a separate relocation section,
11494 which is processed by the kernel loader. */
11495 if (htab->vxworks_p && !info->shared)
11496 {
11497 /* There is a relocation for the initial PLT entry:
11498 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
11499 if (h->plt.offset == htab->plt_header_size)
11500 htab->srelplt2->size += RELOC_SIZE (htab);
11501
11502 /* There are two extra relocations for each subsequent
11503 PLT entry: an R_ARM_32 relocation for the GOT entry,
11504 and an R_ARM_32 relocation for the PLT entry. */
11505 htab->srelplt2->size += RELOC_SIZE (htab) * 2;
11506 }
5e681ec4
PB		 11507 }
11508 else
11509 {
11510 h->plt.offset = (bfd_vma) -1;
f5385ebf 11511 h->needs_plt = 0;
5e681ec4
PB		 11512 }
11513 }
11514 else
11515 {
11516 h->plt.offset = (bfd_vma) -1;
f5385ebf 11517 h->needs_plt = 0;
5e681ec4
PB		 11518 }
11519
11520 if (h->got.refcount > 0)
11521 {
11522 asection *s;
11523 bfd_boolean dyn;
ba93b8ac
DJ		 11524 int tls_type = elf32_arm_hash_entry (h)->tls_type;
11525 int indx;
5e681ec4
PB		 11526
11527 /* Make sure this symbol is output as a dynamic symbol.
11528 Undefined weak syms won't yet be marked as dynamic. */
11529 if (h->dynindx == -1
f5385ebf 11530 && !h->forced_local)
5e681ec4 11531 {
c152c796 11532 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11533 return FALSE;
11534 }
11535
e5a52504
MM		 11536 if (!htab->symbian_p)
11537 {
11538 s = htab->sgot;
11539 h->got.offset = s->size;
ba93b8ac
DJ		 11540
11541 if (tls_type == GOT_UNKNOWN)
11542 abort ();
11543
11544 if (tls_type == GOT_NORMAL)
11545 /* Non-TLS symbols need one GOT slot. */
11546 s->size += 4;
11547 else
11548 {
11549 if (tls_type & GOT_TLS_GD)
11550 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. */
11551 s->size += 8;
11552 if (tls_type & GOT_TLS_IE)
11553 /* R_ARM_TLS_IE32 needs one GOT slot. */
11554 s->size += 4;
11555 }
11556
e5a52504 11557 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 11558
11559 indx = 0;
11560 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
11561 && (!info->shared
11562 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11563 indx = h->dynindx;
11564
11565 if (tls_type != GOT_NORMAL
11566 && (info->shared || indx != 0)
11567 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11568 || h->root.type != bfd_link_hash_undefweak))
11569 {
11570 if (tls_type & GOT_TLS_IE)
00a97672 11571 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11572
11573 if (tls_type & GOT_TLS_GD)
00a97672 11574 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11575
11576 if ((tls_type & GOT_TLS_GD) && indx != 0)
00a97672 11577 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11578 }
11579 else if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11580 || h->root.type != bfd_link_hash_undefweak)
11581 && (info->shared
11582 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)))
00a97672 11583 htab->srelgot->size += RELOC_SIZE (htab);
e5a52504 11584 }
5e681ec4
PB		 11585 }
11586 else
11587 h->got.offset = (bfd_vma) -1;
11588
a4fd1a8e
PB		 11589 /* Allocate stubs for exported Thumb functions on v4t. */
11590 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 11591 && h->def_regular
a4fd1a8e
PB		 11592 && ELF_ST_TYPE (h->type) == STT_ARM_TFUNC
11593 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
11594 {
11595 struct elf_link_hash_entry * th;
11596 struct bfd_link_hash_entry * bh;
11597 struct elf_link_hash_entry * myh;
11598 char name[1024];
11599 asection *s;
11600 bh = NULL;
11601 /* Create a new symbol to regist the real location of the function. */
11602 s = h->root.u.def.section;
906e58ca 11603 sprintf (name, "__real_%s", h->root.root.string);
a4fd1a8e
PB		 11604 _bfd_generic_link_add_one_symbol (info, s->owner,
11605 name, BSF_GLOBAL, s,
11606 h->root.u.def.value,
11607 NULL, TRUE, FALSE, &bh);
11608
11609 myh = (struct elf_link_hash_entry *) bh;
11610 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
11611 myh->forced_local = 1;
11612 eh->export_glue = myh;
11613 th = record_arm_to_thumb_glue (info, h);
11614 /* Point the symbol at the stub. */
11615 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
11616 h->root.u.def.section = th->root.u.def.section;
11617 h->root.u.def.value = th->root.u.def.value & ~1;
11618 }
11619
0bdcacaf 11620 if (eh->dyn_relocs == NULL)
5e681ec4
PB		 11621 return TRUE;
11622
11623 /* In the shared -Bsymbolic case, discard space allocated for
11624 dynamic pc-relative relocs against symbols which turn out to be
11625 defined in regular objects. For the normal shared case, discard
11626 space for pc-relative relocs that have become local due to symbol
11627 visibility changes. */
11628
67687978 11629 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 11630 {
7bdca076 11631 /* The only relocs that use pc_count are R_ARM_REL32 and
bb224fc3
MS		 11632 R_ARM_REL32_NOI, which will appear on something like
11633 ".long foo - .". We want calls to protected symbols to resolve
11634 directly to the function rather than going via the plt. If people
11635 want function pointer comparisons to work as expected then they
11636 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 11637 if (SYMBOL_CALLS_LOCAL (info, h))
11638 {
0bdcacaf 11639 struct elf_dyn_relocs **pp;
ba93b8ac 11640
0bdcacaf 11641 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
ba93b8ac
DJ		 11642 {
11643 p->count -= p->pc_count;
11644 p->pc_count = 0;
11645 if (p->count == 0)
11646 *pp = p->next;
11647 else
11648 pp = &p->next;
11649 }
11650 }
11651
4dfe6ac6 11652 if (htab->vxworks_p)
3348747a 11653 {
0bdcacaf 11654 struct elf_dyn_relocs **pp;
3348747a 11655
0bdcacaf 11656 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
3348747a 11657 {
0bdcacaf 11658 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
3348747a
NS		 11659 *pp = p->next;
11660 else
11661 pp = &p->next;
11662 }
11663 }
11664
ba93b8ac 11665 /* Also discard relocs on undefined weak syms with non-default
7359ea65 11666 visibility. */
0bdcacaf 11667 if (eh->dyn_relocs != NULL
5e681ec4 11668 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 11669 {
11670 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
0bdcacaf 11671 eh->dyn_relocs = NULL;
22d606e9
AM		 11672
11673 /* Make sure undefined weak symbols are output as a dynamic
11674 symbol in PIEs. */
11675 else if (h->dynindx == -1
11676 && !h->forced_local)
11677 {
11678 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11679 return FALSE;
11680 }
11681 }
11682
67687978
PB		 11683 else if (htab->root.is_relocatable_executable && h->dynindx == -1
11684 && h->root.type == bfd_link_hash_new)
11685 {
11686 /* Output absolute symbols so that we can create relocations
11687 against them. For normal symbols we output a relocation
11688 against the section that contains them. */
11689 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11690 return FALSE;
11691 }
11692
5e681ec4
PB		 11693 }
11694 else
11695 {
11696 /* For the non-shared case, discard space for relocs against
11697 symbols which turn out to need copy relocs or are not
11698 dynamic. */
11699
f5385ebf
AM		 11700 if (!h->non_got_ref
11701 && ((h->def_dynamic
11702 && !h->def_regular)
5e681ec4
PB		 11703 || (htab->root.dynamic_sections_created
11704 && (h->root.type == bfd_link_hash_undefweak
11705 || h->root.type == bfd_link_hash_undefined))))
11706 {
11707 /* Make sure this symbol is output as a dynamic symbol.
11708 Undefined weak syms won't yet be marked as dynamic. */
11709 if (h->dynindx == -1
f5385ebf 11710 && !h->forced_local)
5e681ec4 11711 {
c152c796 11712 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11713 return FALSE;
11714 }
11715
11716 /* If that succeeded, we know we'll be keeping all the
11717 relocs. */
11718 if (h->dynindx != -1)
11719 goto keep;
11720 }
11721
0bdcacaf 11722 eh->dyn_relocs = NULL;
5e681ec4
PB		 11723
11724 keep: ;
11725 }
11726
11727 /* Finally, allocate space. */
0bdcacaf 11728 for (p = eh->dyn_relocs; p != NULL; p = p->next)
5e681ec4 11729 {
0bdcacaf 11730 asection *sreloc = elf_section_data (p->sec)->sreloc;
00a97672 11731 sreloc->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 11732 }
11733
11734 return TRUE;
11735}
11736
08d1f311
DJ		 11737/* Find any dynamic relocs that apply to read-only sections. */
11738
11739static bfd_boolean
8029a119 11740elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
08d1f311 11741{
8029a119 11742 struct elf32_arm_link_hash_entry * eh;
0bdcacaf 11743 struct elf_dyn_relocs * p;
08d1f311
DJ		 11744
11745 if (h->root.type == bfd_link_hash_warning)
11746 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11747
11748 eh = (struct elf32_arm_link_hash_entry *) h;
0bdcacaf 11749 for (p = eh->dyn_relocs; p != NULL; p = p->next)
08d1f311 11750 {
0bdcacaf 11751 asection *s = p->sec;
08d1f311
DJ		 11752
11753 if (s != NULL && (s->flags & SEC_READONLY) != 0)
11754 {
11755 struct bfd_link_info *info = (struct bfd_link_info *) inf;
11756
11757 info->flags |= DF_TEXTREL;
11758
11759 /* Not an error, just cut short the traversal. */
11760 return FALSE;
11761 }
11762 }
11763 return TRUE;
11764}
11765
d504ffc8
DJ		 11766void
11767bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
11768 int byteswap_code)
11769{
11770 struct elf32_arm_link_hash_table *globals;
11771
11772 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11773 if (globals == NULL)
11774 return;
11775
d504ffc8
DJ		 11776 globals->byteswap_code = byteswap_code;
11777}
11778
252b5132
RH		 11779/* Set the sizes of the dynamic sections. */
11780
b34976b6 11781static bfd_boolean
57e8b36a
NC		 11782elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
11783 struct bfd_link_info * info)
252b5132
RH		 11784{
11785 bfd * dynobj;
11786 asection * s;
b34976b6
AM		 11787 bfd_boolean plt;
11788 bfd_boolean relocs;
5e681ec4
PB		 11789 bfd *ibfd;
11790 struct elf32_arm_link_hash_table *htab;
252b5132 11791
5e681ec4 11792 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11793 if (htab == NULL)
11794 return FALSE;
11795
252b5132
RH		 11796 dynobj = elf_hash_table (info)->dynobj;
11797 BFD_ASSERT (dynobj != NULL);
39b41c9c 11798 check_use_blx (htab);
252b5132
RH		 11799
11800 if (elf_hash_table (info)->dynamic_sections_created)
11801 {
11802 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 11803 if (info->executable)
252b5132
RH		 11804 {
11805 s = bfd_get_section_by_name (dynobj, ".interp");
11806 BFD_ASSERT (s != NULL);
eea6121a 11807 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 11808 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
11809 }
11810 }
5e681ec4
PB		 11811
11812 /* Set up .got offsets for local syms, and space for local dynamic
11813 relocs. */
11814 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 11815 {
5e681ec4
PB		 11816 bfd_signed_vma *local_got;
11817 bfd_signed_vma *end_local_got;
11818 char *local_tls_type;
11819 bfd_size_type locsymcount;
11820 Elf_Internal_Shdr *symtab_hdr;
11821 asection *srel;
4dfe6ac6 11822 bfd_boolean is_vxworks = htab->vxworks_p;
5e681ec4 11823
0ffa91dd 11824 if (! is_arm_elf (ibfd))
5e681ec4
PB		 11825 continue;
11826
11827 for (s = ibfd->sections; s != NULL; s = s->next)
11828 {
0bdcacaf 11829 struct elf_dyn_relocs *p;
5e681ec4 11830
0bdcacaf 11831 for (p = (struct elf_dyn_relocs *)
21d799b5 11832 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4 11833 {
0bdcacaf
RS		 11834 if (!bfd_is_abs_section (p->sec)
11835 && bfd_is_abs_section (p->sec->output_section))
5e681ec4
PB		 11836 {
11837 /* Input section has been discarded, either because
11838 it is a copy of a linkonce section or due to
11839 linker script /DISCARD/, so we'll be discarding
11840 the relocs too. */
11841 }
3348747a 11842 else if (is_vxworks
0bdcacaf 11843 && strcmp (p->sec->output_section->name,
3348747a
NS		 11844 ".tls_vars") == 0)
11845 {
11846 /* Relocations in vxworks .tls_vars sections are
11847 handled specially by the loader. */
11848 }
5e681ec4
PB		 11849 else if (p->count != 0)
11850 {
0bdcacaf 11851 srel = elf_section_data (p->sec)->sreloc;
00a97672 11852 srel->size += p->count * RELOC_SIZE (htab);
0bdcacaf 11853 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
5e681ec4
PB		 11854 info->flags |= DF_TEXTREL;
11855 }
11856 }
11857 }
11858
11859 local_got = elf_local_got_refcounts (ibfd);
11860 if (!local_got)
11861 continue;
11862
0ffa91dd 11863 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 11864 locsymcount = symtab_hdr->sh_info;
11865 end_local_got = local_got + locsymcount;
ba93b8ac 11866 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
5e681ec4
PB		 11867 s = htab->sgot;
11868 srel = htab->srelgot;
11869 for (; local_got < end_local_got; ++local_got, ++local_tls_type)
11870 {
11871 if (*local_got > 0)
11872 {
eea6121a 11873 *local_got = s->size;
ba93b8ac
DJ		 11874 if (*local_tls_type & GOT_TLS_GD)
11875 /* TLS_GD relocs need an 8-byte structure in the GOT. */
11876 s->size += 8;
11877 if (*local_tls_type & GOT_TLS_IE)
11878 s->size += 4;
11879 if (*local_tls_type == GOT_NORMAL)
11880 s->size += 4;
11881
11882 if (info->shared || *local_tls_type == GOT_TLS_GD)
00a97672 11883 srel->size += RELOC_SIZE (htab);
5e681ec4
PB		 11884 }
11885 else
11886 *local_got = (bfd_vma) -1;
11887 }
252b5132
RH		 11888 }
11889
ba93b8ac
DJ		 11890 if (htab->tls_ldm_got.refcount > 0)
11891 {
11892 /* Allocate two GOT entries and one dynamic relocation (if necessary)
11893 for R_ARM_TLS_LDM32 relocations. */
11894 htab->tls_ldm_got.offset = htab->sgot->size;
11895 htab->sgot->size += 8;
11896 if (info->shared)
00a97672 11897 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11898 }
11899 else
11900 htab->tls_ldm_got.offset = -1;
11901
5e681ec4
PB		 11902 /* Allocate global sym .plt and .got entries, and space for global
11903 sym dynamic relocs. */
57e8b36a 11904 elf_link_hash_traverse (& htab->root, allocate_dynrelocs, info);
252b5132 11905
d504ffc8
DJ		 11906 /* Here we rummage through the found bfds to collect glue information. */
11907 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e 11908 {
0ffa91dd 11909 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 11910 continue;
11911
c7b8f16e
JB		 11912 /* Initialise mapping tables for code/data. */
11913 bfd_elf32_arm_init_maps (ibfd);
906e58ca 11914
c7b8f16e
JB		 11915 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
11916 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
11917 /* xgettext:c-format */
11918 _bfd_error_handler (_("Errors encountered processing file %s"),
11919 ibfd->filename);
11920 }
d504ffc8 11921
3e6b1042
DJ		 11922 /* Allocate space for the glue sections now that we've sized them. */
11923 bfd_elf32_arm_allocate_interworking_sections (info);
11924
252b5132
RH		 11925 /* The check_relocs and adjust_dynamic_symbol entry points have
11926 determined the sizes of the various dynamic sections. Allocate
11927 memory for them. */
b34976b6
AM		 11928 plt = FALSE;
11929 relocs = FALSE;
252b5132
RH		 11930 for (s = dynobj->sections; s != NULL; s = s->next)
11931 {
11932 const char * name;
252b5132
RH		 11933
11934 if ((s->flags & SEC_LINKER_CREATED) == 0)
11935 continue;
11936
11937 /* It's OK to base decisions on the section name, because none
11938 of the dynobj section names depend upon the input files. */
11939 name = bfd_get_section_name (dynobj, s);
11940
24a1ba0f 11941 if (strcmp (name, ".plt") == 0)
252b5132 11942 {
c456f082
AM		 11943 /* Remember whether there is a PLT. */
11944 plt = s->size != 0;
252b5132 11945 }
0112cd26 11946 else if (CONST_STRNEQ (name, ".rel"))
252b5132 11947 {
c456f082 11948 if (s->size != 0)
252b5132 11949 {
252b5132 11950 /* Remember whether there are any reloc sections other
00a97672
RS		 11951 than .rel(a).plt and .rela.plt.unloaded. */
11952 if (s != htab->srelplt && s != htab->srelplt2)
b34976b6 11953 relocs = TRUE;
252b5132
RH		 11954
11955 /* We use the reloc_count field as a counter if we need
11956 to copy relocs into the output file. */
11957 s->reloc_count = 0;
11958 }
11959 }
0112cd26 11960 else if (! CONST_STRNEQ (name, ".got")
c456f082 11961 && strcmp (name, ".dynbss") != 0)
252b5132
RH		 11962 {
11963 /* It's not one of our sections, so don't allocate space. */
11964 continue;
11965 }
11966
c456f082 11967 if (s->size == 0)
252b5132 11968 {
c456f082 11969 /* If we don't need this section, strip it from the
00a97672
RS		 11970 output file. This is mostly to handle .rel(a).bss and
11971 .rel(a).plt. We must create both sections in
c456f082
AM		 11972 create_dynamic_sections, because they must be created
11973 before the linker maps input sections to output
11974 sections. The linker does that before
11975 adjust_dynamic_symbol is called, and it is that
11976 function which decides whether anything needs to go
11977 into these sections. */
8423293d 11978 s->flags |= SEC_EXCLUDE;
252b5132
RH		 11979 continue;
11980 }
11981
c456f082
AM		 11982 if ((s->flags & SEC_HAS_CONTENTS) == 0)
11983 continue;
11984
252b5132 11985 /* Allocate memory for the section contents. */
21d799b5 11986 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
c456f082 11987 if (s->contents == NULL)
b34976b6 11988 return FALSE;
252b5132
RH		 11989 }
11990
11991 if (elf_hash_table (info)->dynamic_sections_created)
11992 {
11993 /* Add some entries to the .dynamic section. We fill in the
11994 values later, in elf32_arm_finish_dynamic_sections, but we
11995 must add the entries now so that we get the correct size for
11996 the .dynamic section. The DT_DEBUG entry is filled in by the
11997 dynamic linker and used by the debugger. */
dc810e39 11998#define add_dynamic_entry(TAG, VAL) \
5a580b3a 11999 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 12000
8532796c 12001 if (info->executable)
252b5132 12002 {
dc810e39 12003 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 12004 return FALSE;
252b5132
RH		 12005 }
12006
12007 if (plt)
12008 {
dc810e39
AM		 12009 if ( !add_dynamic_entry (DT_PLTGOT, 0)
12010 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 12011 || !add_dynamic_entry (DT_PLTREL,
12012 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 12013 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 12014 return FALSE;
252b5132
RH		 12015 }
12016
12017 if (relocs)
12018 {
00a97672
RS		 12019 if (htab->use_rel)
12020 {
12021 if (!add_dynamic_entry (DT_REL, 0)
12022 || !add_dynamic_entry (DT_RELSZ, 0)
12023 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
12024 return FALSE;
12025 }
12026 else
12027 {
12028 if (!add_dynamic_entry (DT_RELA, 0)
12029 || !add_dynamic_entry (DT_RELASZ, 0)
12030 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
12031 return FALSE;
12032 }
252b5132
RH		 12033 }
12034
08d1f311
DJ		 12035 /* If any dynamic relocs apply to a read-only section,
12036 then we need a DT_TEXTREL entry. */
12037 if ((info->flags & DF_TEXTREL) == 0)
8029a119
NC		 12038 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
12039 info);
08d1f311 12040
99e4ae17 12041 if ((info->flags & DF_TEXTREL) != 0)
252b5132 12042 {
dc810e39 12043 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 12044 return FALSE;
252b5132 12045 }
7a2b07ff
NS		 12046 if (htab->vxworks_p
12047 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
12048 return FALSE;
252b5132 12049 }
8532796c 12050#undef add_dynamic_entry
252b5132 12051
b34976b6 12052 return TRUE;
252b5132
RH		 12053}
12054
252b5132
RH		 12055/* Finish up dynamic symbol handling. We set the contents of various
12056 dynamic sections here. */
12057
b34976b6 12058static bfd_boolean
906e58ca
NC		 12059elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
12060 struct bfd_link_info * info,
12061 struct elf_link_hash_entry * h,
12062 Elf_Internal_Sym * sym)
252b5132
RH		 12063{
12064 bfd * dynobj;
e5a52504 12065 struct elf32_arm_link_hash_table *htab;
b7693d02 12066 struct elf32_arm_link_hash_entry *eh;
252b5132
RH		 12067
12068 dynobj = elf_hash_table (info)->dynobj;
e5a52504 12069 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12070 if (htab == NULL)
12071 return FALSE;
12072
b7693d02 12073 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 12074
12075 if (h->plt.offset != (bfd_vma) -1)
12076 {
12077 asection * splt;
252b5132 12078 asection * srel;
e5a52504 12079 bfd_byte *loc;
24a1ba0f 12080 bfd_vma plt_index;
947216bf 12081 Elf_Internal_Rela rel;
252b5132
RH		 12082
12083 /* This symbol has an entry in the procedure linkage table. Set
12084 it up. */
12085
12086 BFD_ASSERT (h->dynindx != -1);
12087
12088 splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672 12089 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".plt"));
e5a52504 12090 BFD_ASSERT (splt != NULL && srel != NULL);
252b5132 12091
e5a52504
MM		 12092 /* Fill in the entry in the procedure linkage table. */
12093 if (htab->symbian_p)
12094 {
906e58ca 12095 put_arm_insn (htab, output_bfd,
52ab56c2
PB		 12096 elf32_arm_symbian_plt_entry[0],
12097 splt->contents + h->plt.offset);
906e58ca 12098 bfd_put_32 (output_bfd,
52ab56c2
PB		 12099 elf32_arm_symbian_plt_entry[1],
12100 splt->contents + h->plt.offset + 4);
906e58ca 12101
e5a52504 12102 /* Fill in the entry in the .rel.plt section. */
2a1b9a48
MM		 12103 rel.r_offset = (splt->output_section->vma
12104 + splt->output_offset
52ab56c2 12105 + h->plt.offset + 4);
e5a52504 12106 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
b7693d02
DJ		 12107
12108 /* Get the index in the procedure linkage table which
12109 corresponds to this symbol. This is the index of this symbol
12110 in all the symbols for which we are making plt entries. The
12111 first entry in the procedure linkage table is reserved. */
906e58ca 12112 plt_index = ((h->plt.offset - htab->plt_header_size)
b7693d02 12113 / htab->plt_entry_size);
e5a52504
MM		 12114 }
12115 else
12116 {
00a97672 12117 bfd_vma got_offset, got_address, plt_address;
e5a52504
MM		 12118 bfd_vma got_displacement;
12119 asection * sgot;
52ab56c2 12120 bfd_byte * ptr;
906e58ca 12121
e5a52504
MM		 12122 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
12123 BFD_ASSERT (sgot != NULL);
12124
b7693d02
DJ		 12125 /* Get the offset into the .got.plt table of the entry that
12126 corresponds to this function. */
12127 got_offset = eh->plt_got_offset;
12128
12129 /* Get the index in the procedure linkage table which
12130 corresponds to this symbol. This is the index of this symbol
12131 in all the symbols for which we are making plt entries. The
12132 first three entries in .got.plt are reserved; after that
12133 symbols appear in the same order as in .plt. */
12134 plt_index = (got_offset - 12) / 4;
e5a52504 12135
00a97672
RS		 12136 /* Calculate the address of the GOT entry. */
12137 got_address = (sgot->output_section->vma
12138 + sgot->output_offset
12139 + got_offset);
5e681ec4 12140
00a97672
RS		 12141 /* ...and the address of the PLT entry. */
12142 plt_address = (splt->output_section->vma
12143 + splt->output_offset
12144 + h->plt.offset);
5e681ec4 12145
52ab56c2 12146 ptr = htab->splt->contents + h->plt.offset;
00a97672
RS		 12147 if (htab->vxworks_p && info->shared)
12148 {
12149 unsigned int i;
12150 bfd_vma val;
12151
52ab56c2 12152 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 12153 {
12154 val = elf32_arm_vxworks_shared_plt_entry[i];
12155 if (i == 2)
12156 val |= got_address - sgot->output_section->vma;
12157 if (i == 5)
12158 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 12159 if (i == 2 || i == 5)
12160 bfd_put_32 (output_bfd, val, ptr);
12161 else
12162 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 12163 }
12164 }
12165 else if (htab->vxworks_p)
b7693d02 12166 {
00a97672
RS		 12167 unsigned int i;
12168 bfd_vma val;
12169
d3753b85 12170 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 12171 {
12172 val = elf32_arm_vxworks_exec_plt_entry[i];
12173 if (i == 2)
12174 val |= got_address;
12175 if (i == 4)
12176 val |= 0xffffff & -((h->plt.offset + i * 4 + 8) >> 2);
12177 if (i == 5)
12178 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 12179 if (i == 2 || i == 5)
12180 bfd_put_32 (output_bfd, val, ptr);
12181 else
12182 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 12183 }
12184
12185 loc = (htab->srelplt2->contents
12186 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
12187
12188 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
12189 referencing the GOT for this PLT entry. */
12190 rel.r_offset = plt_address + 8;
12191 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12192 rel.r_addend = got_offset;
12193 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
12194 loc += RELOC_SIZE (htab);
12195
12196 /* Create the R_ARM_ABS32 relocation referencing the
12197 beginning of the PLT for this GOT entry. */
12198 rel.r_offset = got_address;
12199 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12200 rel.r_addend = 0;
12201 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
b7693d02 12202 }
00a97672
RS		 12203 else
12204 {
bd97cb95 12205 bfd_signed_vma thumb_refs;
00a97672
RS		 12206 /* Calculate the displacement between the PLT slot and the
12207 entry in the GOT. The eight-byte offset accounts for the
12208 value produced by adding to pc in the first instruction
12209 of the PLT stub. */
12210 got_displacement = got_address - (plt_address + 8);
b7693d02 12211
00a97672
RS		 12212 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
12213
bd97cb95
DJ		 12214 thumb_refs = eh->plt_thumb_refcount;
12215 if (!htab->use_blx)
12216 thumb_refs += eh->plt_maybe_thumb_refcount;
12217
12218 if (thumb_refs > 0)
00a97672 12219 {
52ab56c2
PB		 12220 put_thumb_insn (htab, output_bfd,
12221 elf32_arm_plt_thumb_stub[0], ptr - 4);
12222 put_thumb_insn (htab, output_bfd,
12223 elf32_arm_plt_thumb_stub[1], ptr - 2);
00a97672
RS		 12224 }
12225
52ab56c2
PB		 12226 put_arm_insn (htab, output_bfd,
12227 elf32_arm_plt_entry[0]
12228 | ((got_displacement & 0x0ff00000) >> 20),
12229 ptr + 0);
12230 put_arm_insn (htab, output_bfd,
12231 elf32_arm_plt_entry[1]
12232 | ((got_displacement & 0x000ff000) >> 12),
12233 ptr+ 4);
12234 put_arm_insn (htab, output_bfd,
12235 elf32_arm_plt_entry[2]
12236 | (got_displacement & 0x00000fff),
12237 ptr + 8);
5e681ec4 12238#ifdef FOUR_WORD_PLT
52ab56c2 12239 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
5e681ec4 12240#endif
00a97672 12241 }
252b5132 12242
e5a52504
MM		 12243 /* Fill in the entry in the global offset table. */
12244 bfd_put_32 (output_bfd,
12245 (splt->output_section->vma
12246 + splt->output_offset),
12247 sgot->contents + got_offset);
906e58ca 12248
00a97672
RS		 12249 /* Fill in the entry in the .rel(a).plt section. */
12250 rel.r_addend = 0;
12251 rel.r_offset = got_address;
e5a52504
MM		 12252 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_JUMP_SLOT);
12253 }
57e8b36a 12254
00a97672
RS		 12255 loc = srel->contents + plt_index * RELOC_SIZE (htab);
12256 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132 12257
f5385ebf 12258 if (!h->def_regular)
252b5132
RH		 12259 {
12260 /* Mark the symbol as undefined, rather than as defined in
12261 the .plt section. Leave the value alone. */
12262 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 12263 /* If the symbol is weak, we do need to clear the value.
12264 Otherwise, the PLT entry would provide a definition for
12265 the symbol even if the symbol wasn't defined anywhere,
12266 and so the symbol would never be NULL. */
f5385ebf 12267 if (!h->ref_regular_nonweak)
d982ba73 12268 sym->st_value = 0;
252b5132
RH		 12269 }
12270 }
12271
ba93b8ac
DJ		 12272 if (h->got.offset != (bfd_vma) -1
12273 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_GD) == 0
12274 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_IE) == 0)
252b5132
RH		 12275 {
12276 asection * sgot;
12277 asection * srel;
947216bf
AM		 12278 Elf_Internal_Rela rel;
12279 bfd_byte *loc;
00a97672 12280 bfd_vma offset;
252b5132
RH		 12281
12282 /* This symbol has an entry in the global offset table. Set it
12283 up. */
252b5132 12284 sgot = bfd_get_section_by_name (dynobj, ".got");
00a97672 12285 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".got"));
252b5132
RH		 12286 BFD_ASSERT (sgot != NULL && srel != NULL);
12287
00a97672
RS		 12288 offset = (h->got.offset & ~(bfd_vma) 1);
12289 rel.r_addend = 0;
252b5132
RH		 12290 rel.r_offset = (sgot->output_section->vma
12291 + sgot->output_offset
00a97672 12292 + offset);
252b5132 12293
5e681ec4
PB		 12294 /* If this is a static link, or it is a -Bsymbolic link and the
12295 symbol is defined locally or was forced to be local because
12296 of a version file, we just want to emit a RELATIVE reloc.
12297 The entry in the global offset table will already have been
12298 initialized in the relocate_section function. */
252b5132 12299 if (info->shared
5e681ec4
PB		 12300 && SYMBOL_REFERENCES_LOCAL (info, h))
12301 {
906e58ca 12302 BFD_ASSERT ((h->got.offset & 1) != 0);
5e681ec4 12303 rel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
00a97672
RS		 12304 if (!htab->use_rel)
12305 {
12306 rel.r_addend = bfd_get_32 (output_bfd, sgot->contents + offset);
12307 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
12308 }
5e681ec4 12309 }
252b5132
RH		 12310 else
12311 {
906e58ca 12312 BFD_ASSERT ((h->got.offset & 1) == 0);
00a97672 12313 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
252b5132
RH		 12314 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
12315 }
12316
00a97672
RS		 12317 loc = srel->contents + srel->reloc_count++ * RELOC_SIZE (htab);
12318 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 12319 }
12320
f5385ebf 12321 if (h->needs_copy)
252b5132
RH		 12322 {
12323 asection * s;
947216bf
AM		 12324 Elf_Internal_Rela rel;
12325 bfd_byte *loc;
252b5132
RH		 12326
12327 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 12328 BFD_ASSERT (h->dynindx != -1
12329 && (h->root.type == bfd_link_hash_defined
12330 || h->root.type == bfd_link_hash_defweak));
12331
12332 s = bfd_get_section_by_name (h->root.u.def.section->owner,
00a97672 12333 RELOC_SECTION (htab, ".bss"));
252b5132
RH		 12334 BFD_ASSERT (s != NULL);
12335
00a97672 12336 rel.r_addend = 0;
252b5132
RH		 12337 rel.r_offset = (h->root.u.def.value
12338 + h->root.u.def.section->output_section->vma
12339 + h->root.u.def.section->output_offset);
12340 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
00a97672
RS		 12341 loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
12342 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 12343 }
12344
00a97672
RS		 12345 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
12346 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
12347 to the ".got" section. */
252b5132 12348 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
00a97672 12349 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 12350 sym->st_shndx = SHN_ABS;
12351
b34976b6 12352 return TRUE;
252b5132
RH		 12353}
12354
12355/* Finish up the dynamic sections. */
12356
b34976b6 12357static bfd_boolean
57e8b36a 12358elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 12359{
12360 bfd * dynobj;
12361 asection * sgot;
12362 asection * sdyn;
4dfe6ac6
NC		 12363 struct elf32_arm_link_hash_table *htab;
12364
12365 htab = elf32_arm_hash_table (info);
12366 if (htab == NULL)
12367 return FALSE;
252b5132
RH		 12368
12369 dynobj = elf_hash_table (info)->dynobj;
12370
12371 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
4dfe6ac6 12372 BFD_ASSERT (htab->symbian_p || sgot != NULL);
252b5132
RH		 12373 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
12374
12375 if (elf_hash_table (info)->dynamic_sections_created)
12376 {
12377 asection *splt;
12378 Elf32_External_Dyn *dyncon, *dynconend;
12379
12380 splt = bfd_get_section_by_name (dynobj, ".plt");
24a1ba0f 12381 BFD_ASSERT (splt != NULL && sdyn != NULL);
252b5132
RH		 12382
12383 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 12384 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 12385
252b5132
RH		 12386 for (; dyncon < dynconend; dyncon++)
12387 {
12388 Elf_Internal_Dyn dyn;
12389 const char * name;
12390 asection * s;
12391
12392 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
12393
12394 switch (dyn.d_tag)
12395 {
229fcec5
MM		 12396 unsigned int type;
12397
252b5132 12398 default:
7a2b07ff
NS		 12399 if (htab->vxworks_p
12400 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
12401 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 12402 break;
12403
229fcec5
MM		 12404 case DT_HASH:
12405 name = ".hash";
12406 goto get_vma_if_bpabi;
12407 case DT_STRTAB:
12408 name = ".dynstr";
12409 goto get_vma_if_bpabi;
12410 case DT_SYMTAB:
12411 name = ".dynsym";
12412 goto get_vma_if_bpabi;
c0042f5d
MM		 12413 case DT_VERSYM:
12414 name = ".gnu.version";
12415 goto get_vma_if_bpabi;
12416 case DT_VERDEF:
12417 name = ".gnu.version_d";
12418 goto get_vma_if_bpabi;
12419 case DT_VERNEED:
12420 name = ".gnu.version_r";
12421 goto get_vma_if_bpabi;
12422
252b5132
RH		 12423 case DT_PLTGOT:
12424 name = ".got";
12425 goto get_vma;
12426 case DT_JMPREL:
00a97672 12427 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 12428 get_vma:
12429 s = bfd_get_section_by_name (output_bfd, name);
12430 BFD_ASSERT (s != NULL);
229fcec5
MM		 12431 if (!htab->symbian_p)
12432 dyn.d_un.d_ptr = s->vma;
12433 else
12434 /* In the BPABI, tags in the PT_DYNAMIC section point
12435 at the file offset, not the memory address, for the
12436 convenience of the post linker. */
12437 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 12438 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12439 break;
12440
229fcec5
MM		 12441 get_vma_if_bpabi:
12442 if (htab->symbian_p)
12443 goto get_vma;
12444 break;
12445
252b5132 12446 case DT_PLTRELSZ:
00a97672
RS		 12447 s = bfd_get_section_by_name (output_bfd,
12448 RELOC_SECTION (htab, ".plt"));
252b5132 12449 BFD_ASSERT (s != NULL);
eea6121a 12450 dyn.d_un.d_val = s->size;
252b5132
RH		 12451 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12452 break;
906e58ca 12453
252b5132 12454 case DT_RELSZ:
00a97672 12455 case DT_RELASZ:
229fcec5
MM		 12456 if (!htab->symbian_p)
12457 {
12458 /* My reading of the SVR4 ABI indicates that the
12459 procedure linkage table relocs (DT_JMPREL) should be
12460 included in the overall relocs (DT_REL). This is
12461 what Solaris does. However, UnixWare can not handle
12462 that case. Therefore, we override the DT_RELSZ entry
12463 here to make it not include the JMPREL relocs. Since
00a97672 12464 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 12465 other relocation sections, we don't have to worry
12466 about changing the DT_REL entry. */
00a97672
RS		 12467 s = bfd_get_section_by_name (output_bfd,
12468 RELOC_SECTION (htab, ".plt"));
229fcec5
MM		 12469 if (s != NULL)
12470 dyn.d_un.d_val -= s->size;
12471 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12472 break;
12473 }
8029a119 12474 /* Fall through. */
229fcec5
MM		 12475
12476 case DT_REL:
12477 case DT_RELA:
229fcec5
MM		 12478 /* In the BPABI, the DT_REL tag must point at the file
12479 offset, not the VMA, of the first relocation
12480 section. So, we use code similar to that in
12481 elflink.c, but do not check for SHF_ALLOC on the
12482 relcoation section, since relocations sections are
12483 never allocated under the BPABI. The comments above
12484 about Unixware notwithstanding, we include all of the
12485 relocations here. */
12486 if (htab->symbian_p)
12487 {
12488 unsigned int i;
12489 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
12490 ? SHT_REL : SHT_RELA);
12491 dyn.d_un.d_val = 0;
12492 for (i = 1; i < elf_numsections (output_bfd); i++)
12493 {
906e58ca 12494 Elf_Internal_Shdr *hdr
229fcec5
MM		 12495 = elf_elfsections (output_bfd)[i];
12496 if (hdr->sh_type == type)
12497 {
906e58ca 12498 if (dyn.d_tag == DT_RELSZ
229fcec5
MM		 12499 || dyn.d_tag == DT_RELASZ)
12500 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 12501 else if ((ufile_ptr) hdr->sh_offset
12502 <= dyn.d_un.d_val - 1)
229fcec5
MM		 12503 dyn.d_un.d_val = hdr->sh_offset;
12504 }
12505 }
12506 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12507 }
252b5132 12508 break;
88f7bcd5
NC		 12509
12510 /* Set the bottom bit of DT_INIT/FINI if the
12511 corresponding function is Thumb. */
12512 case DT_INIT:
12513 name = info->init_function;
12514 goto get_sym;
12515 case DT_FINI:
12516 name = info->fini_function;
12517 get_sym:
12518 /* If it wasn't set by elf_bfd_final_link
4cc11e76 12519 then there is nothing to adjust. */
88f7bcd5
NC		 12520 if (dyn.d_un.d_val != 0)
12521 {
12522 struct elf_link_hash_entry * eh;
12523
12524 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 12525 FALSE, FALSE, TRUE);
906e58ca 12526 if (eh != NULL
88f7bcd5
NC		 12527 && ELF_ST_TYPE (eh->type) == STT_ARM_TFUNC)
12528 {
12529 dyn.d_un.d_val |= 1;
b34976b6 12530 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 12531 }
12532 }
12533 break;
252b5132
RH		 12534 }
12535 }
12536
24a1ba0f 12537 /* Fill in the first entry in the procedure linkage table. */
4dfe6ac6 12538 if (splt->size > 0 && htab->plt_header_size)
f7a74f8c 12539 {
00a97672
RS		 12540 const bfd_vma *plt0_entry;
12541 bfd_vma got_address, plt_address, got_displacement;
12542
12543 /* Calculate the addresses of the GOT and PLT. */
12544 got_address = sgot->output_section->vma + sgot->output_offset;
12545 plt_address = splt->output_section->vma + splt->output_offset;
12546
12547 if (htab->vxworks_p)
12548 {
12549 /* The VxWorks GOT is relocated by the dynamic linker.
12550 Therefore, we must emit relocations rather than simply
12551 computing the values now. */
12552 Elf_Internal_Rela rel;
12553
12554 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 12555 put_arm_insn (htab, output_bfd, plt0_entry[0],
12556 splt->contents + 0);
12557 put_arm_insn (htab, output_bfd, plt0_entry[1],
12558 splt->contents + 4);
12559 put_arm_insn (htab, output_bfd, plt0_entry[2],
12560 splt->contents + 8);
00a97672
RS		 12561 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
12562
8029a119 12563 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
00a97672
RS		 12564 rel.r_offset = plt_address + 12;
12565 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12566 rel.r_addend = 0;
12567 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
12568 htab->srelplt2->contents);
12569 }
12570 else
12571 {
12572 got_displacement = got_address - (plt_address + 16);
12573
12574 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 12575 put_arm_insn (htab, output_bfd, plt0_entry[0],
12576 splt->contents + 0);
12577 put_arm_insn (htab, output_bfd, plt0_entry[1],
12578 splt->contents + 4);
12579 put_arm_insn (htab, output_bfd, plt0_entry[2],
12580 splt->contents + 8);
12581 put_arm_insn (htab, output_bfd, plt0_entry[3],
12582 splt->contents + 12);
5e681ec4 12583
5e681ec4 12584#ifdef FOUR_WORD_PLT
00a97672
RS		 12585 /* The displacement value goes in the otherwise-unused
12586 last word of the second entry. */
12587 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 12588#else
00a97672 12589 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 12590#endif
00a97672 12591 }
f7a74f8c 12592 }
252b5132
RH		 12593
12594 /* UnixWare sets the entsize of .plt to 4, although that doesn't
12595 really seem like the right value. */
74541ad4
AM		 12596 if (splt->output_section->owner == output_bfd)
12597 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672
RS		 12598
12599 if (htab->vxworks_p && !info->shared && htab->splt->size > 0)
12600 {
12601 /* Correct the .rel(a).plt.unloaded relocations. They will have
12602 incorrect symbol indexes. */
12603 int num_plts;
eed62c48 12604 unsigned char *p;
00a97672
RS		 12605
12606 num_plts = ((htab->splt->size - htab->plt_header_size)
12607 / htab->plt_entry_size);
12608 p = htab->srelplt2->contents + RELOC_SIZE (htab);
12609
12610 for (; num_plts; num_plts--)
12611 {
12612 Elf_Internal_Rela rel;
12613
12614 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
12615 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12616 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
12617 p += RELOC_SIZE (htab);
12618
12619 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
12620 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12621 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
12622 p += RELOC_SIZE (htab);
12623 }
12624 }
252b5132
RH		 12625 }
12626
12627 /* Fill in the first three entries in the global offset table. */
229fcec5 12628 if (sgot)
252b5132 12629 {
229fcec5
MM		 12630 if (sgot->size > 0)
12631 {
12632 if (sdyn == NULL)
12633 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
12634 else
12635 bfd_put_32 (output_bfd,
12636 sdyn->output_section->vma + sdyn->output_offset,
12637 sgot->contents);
12638 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
12639 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
12640 }
252b5132 12641
229fcec5
MM		 12642 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
12643 }
252b5132 12644
b34976b6 12645 return TRUE;
252b5132
RH		 12646}
12647
ba96a88f 12648static void
57e8b36a 12649elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 12650{
9b485d32 12651 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 12652 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 12653
12654 i_ehdrp = elf_elfheader (abfd);
12655
94a3258f
PB		 12656 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
12657 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
12658 else
12659 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 12660 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 12661
93204d3a
PB		 12662 if (link_info)
12663 {
12664 globals = elf32_arm_hash_table (link_info);
4dfe6ac6 12665 if (globals != NULL && globals->byteswap_code)
93204d3a
PB		 12666 i_ehdrp->e_flags |= EF_ARM_BE8;
12667 }
ba96a88f
NC		 12668}
12669
99e4ae17 12670static enum elf_reloc_type_class
57e8b36a 12671elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
99e4ae17 12672{
f51e552e 12673 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 12674 {
12675 case R_ARM_RELATIVE:
12676 return reloc_class_relative;
12677 case R_ARM_JUMP_SLOT:
12678 return reloc_class_plt;
12679 case R_ARM_COPY:
12680 return reloc_class_copy;
12681 default:
12682 return reloc_class_normal;
12683 }
12684}
12685
e16bb312
NC		 12686/* Set the right machine number for an Arm ELF file. */
12687
12688static bfd_boolean
57e8b36a 12689elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr)
e16bb312
NC		 12690{
12691 if (hdr->sh_type == SHT_NOTE)
12692 *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS;
12693
12694 return TRUE;
12695}
12696
e489d0ae 12697static void
57e8b36a 12698elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 12699{
5a6c6817 12700 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 12701}
12702
40a18ebd
NC		 12703/* Return TRUE if this is an unwinding table entry. */
12704
12705static bfd_boolean
12706is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
12707{
0112cd26
NC		 12708 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
12709 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 12710}
12711
12712
12713/* Set the type and flags for an ARM section. We do this by
12714 the section name, which is a hack, but ought to work. */
12715
12716static bfd_boolean
12717elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
12718{
12719 const char * name;
12720
12721 name = bfd_get_section_name (abfd, sec);
12722
12723 if (is_arm_elf_unwind_section_name (abfd, name))
12724 {
12725 hdr->sh_type = SHT_ARM_EXIDX;
12726 hdr->sh_flags |= SHF_LINK_ORDER;
12727 }
12728 return TRUE;
12729}
12730
6dc132d9
L		 12731/* Handle an ARM specific section when reading an object file. This is
12732 called when bfd_section_from_shdr finds a section with an unknown
12733 type. */
40a18ebd
NC		 12734
12735static bfd_boolean
12736elf32_arm_section_from_shdr (bfd *abfd,
12737 Elf_Internal_Shdr * hdr,
6dc132d9
L		 12738 const char *name,
12739 int shindex)
40a18ebd
NC		 12740{
12741 /* There ought to be a place to keep ELF backend specific flags, but
12742 at the moment there isn't one. We just keep track of the
12743 sections by their name, instead. Fortunately, the ABI gives
12744 names for all the ARM specific sections, so we will probably get
12745 away with this. */
12746 switch (hdr->sh_type)
12747 {
12748 case SHT_ARM_EXIDX:
0951f019
RE		 12749 case SHT_ARM_PREEMPTMAP:
12750 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 12751 break;
12752
12753 default:
12754 return FALSE;
12755 }
12756
6dc132d9 12757 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 12758 return FALSE;
12759
12760 return TRUE;
12761}
e489d0ae 12762
44444f50
NC		 12763static _arm_elf_section_data *
12764get_arm_elf_section_data (asection * sec)
12765{
47b2e99c
JZ		 12766 if (sec && sec->owner && is_arm_elf (sec->owner))
12767 return elf32_arm_section_data (sec);
44444f50
NC		 12768 else
12769 return NULL;
8e3de13a
NC		 12770}
12771
4e617b1e
PB		 12772typedef struct
12773{
12774 void *finfo;
12775 struct bfd_link_info *info;
91a5743d
PB		 12776 asection *sec;
12777 int sec_shndx;
6e0b88f1
AM		 12778 int (*func) (void *, const char *, Elf_Internal_Sym *,
12779 asection *, struct elf_link_hash_entry *);
4e617b1e
PB		 12780} output_arch_syminfo;
12781
12782enum map_symbol_type
12783{
12784 ARM_MAP_ARM,
12785 ARM_MAP_THUMB,
12786 ARM_MAP_DATA
12787};
12788
12789
7413f23f 12790/* Output a single mapping symbol. */
4e617b1e
PB		 12791
12792static bfd_boolean
7413f23f
DJ		 12793elf32_arm_output_map_sym (output_arch_syminfo *osi,
12794 enum map_symbol_type type,
12795 bfd_vma offset)
4e617b1e
PB		 12796{
12797 static const char *names[3] = {"$a", "$t", "$d"};
4e617b1e
PB		 12798 Elf_Internal_Sym sym;
12799
91a5743d
PB		 12800 sym.st_value = osi->sec->output_section->vma
12801 + osi->sec->output_offset
12802 + offset;
4e617b1e
PB		 12803 sym.st_size = 0;
12804 sym.st_other = 0;
12805 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d 12806 sym.st_shndx = osi->sec_shndx;
fe33d2fa 12807 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
6e0b88f1 12808 return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
4e617b1e
PB		 12809}
12810
12811
12812/* Output mapping symbols for PLT entries associated with H. */
12813
12814static bfd_boolean
12815elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
12816{
12817 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
12818 struct elf32_arm_link_hash_table *htab;
12819 struct elf32_arm_link_hash_entry *eh;
12820 bfd_vma addr;
12821
4e617b1e
PB		 12822 if (h->root.type == bfd_link_hash_indirect)
12823 return TRUE;
12824
12825 if (h->root.type == bfd_link_hash_warning)
12826 /* When warning symbols are created, they **replace** the "real"
12827 entry in the hash table, thus we never get to see the real
12828 symbol in a hash traversal. So look at it now. */
12829 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12830
12831 if (h->plt.offset == (bfd_vma) -1)
12832 return TRUE;
12833
4dfe6ac6
NC		 12834 htab = elf32_arm_hash_table (osi->info);
12835 if (htab == NULL)
12836 return FALSE;
12837
4e617b1e
PB		 12838 eh = (struct elf32_arm_link_hash_entry *) h;
12839 addr = h->plt.offset;
12840 if (htab->symbian_p)
12841 {
7413f23f 12842 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12843 return FALSE;
7413f23f 12844 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
4e617b1e
PB		 12845 return FALSE;
12846 }
12847 else if (htab->vxworks_p)
12848 {
7413f23f 12849 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12850 return FALSE;
7413f23f 12851 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
4e617b1e 12852 return FALSE;
7413f23f 12853 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
4e617b1e 12854 return FALSE;
7413f23f 12855 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
4e617b1e
PB		 12856 return FALSE;
12857 }
12858 else
12859 {
bd97cb95
DJ		 12860 bfd_signed_vma thumb_refs;
12861
12862 thumb_refs = eh->plt_thumb_refcount;
12863 if (!htab->use_blx)
12864 thumb_refs += eh->plt_maybe_thumb_refcount;
4e617b1e 12865
bd97cb95 12866 if (thumb_refs > 0)
4e617b1e 12867 {
7413f23f 12868 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
4e617b1e
PB		 12869 return FALSE;
12870 }
12871#ifdef FOUR_WORD_PLT
7413f23f 12872 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12873 return FALSE;
7413f23f 12874 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
4e617b1e
PB		 12875 return FALSE;
12876#else
906e58ca 12877 /* A three-word PLT with no Thumb thunk contains only Arm code,
4e617b1e
PB		 12878 so only need to output a mapping symbol for the first PLT entry and
12879 entries with thumb thunks. */
bd97cb95 12880 if (thumb_refs > 0 || addr == 20)
4e617b1e 12881 {
7413f23f 12882 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e
PB		 12883 return FALSE;
12884 }
12885#endif
12886 }
12887
12888 return TRUE;
12889}
12890
7413f23f
DJ		 12891/* Output a single local symbol for a generated stub. */
12892
12893static bfd_boolean
12894elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
12895 bfd_vma offset, bfd_vma size)
12896{
7413f23f
DJ		 12897 Elf_Internal_Sym sym;
12898
7413f23f
DJ		 12899 sym.st_value = osi->sec->output_section->vma
12900 + osi->sec->output_offset
12901 + offset;
12902 sym.st_size = size;
12903 sym.st_other = 0;
12904 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
12905 sym.st_shndx = osi->sec_shndx;
6e0b88f1 12906 return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1;
7413f23f 12907}
4e617b1e 12908
da5938a2 12909static bfd_boolean
8029a119
NC		 12910arm_map_one_stub (struct bfd_hash_entry * gen_entry,
12911 void * in_arg)
da5938a2
NC		 12912{
12913 struct elf32_arm_stub_hash_entry *stub_entry;
da5938a2
NC		 12914 asection *stub_sec;
12915 bfd_vma addr;
7413f23f 12916 char *stub_name;
9a008db3 12917 output_arch_syminfo *osi;
d3ce72d0 12918 const insn_sequence *template_sequence;
461a49ca
DJ		 12919 enum stub_insn_type prev_type;
12920 int size;
12921 int i;
12922 enum map_symbol_type sym_type;
da5938a2
NC		 12923
12924 /* Massage our args to the form they really have. */
12925 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
9a008db3 12926 osi = (output_arch_syminfo *) in_arg;
da5938a2 12927
da5938a2
NC		 12928 stub_sec = stub_entry->stub_sec;
12929
12930 /* Ensure this stub is attached to the current section being
7413f23f 12931 processed. */
da5938a2
NC		 12932 if (stub_sec != osi->sec)
12933 return TRUE;
12934
7413f23f
DJ		 12935 addr = (bfd_vma) stub_entry->stub_offset;
12936 stub_name = stub_entry->output_name;
da5938a2 12937
d3ce72d0
NC		 12938 template_sequence = stub_entry->stub_template;
12939 switch (template_sequence[0].type)
7413f23f 12940 {
461a49ca
DJ		 12941 case ARM_TYPE:
12942 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
da5938a2
NC		 12943 return FALSE;
12944 break;
461a49ca 12945 case THUMB16_TYPE:
48229727 12946 case THUMB32_TYPE:
461a49ca
DJ		 12947 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
12948 stub_entry->stub_size))
da5938a2
NC		 12949 return FALSE;
12950 break;
12951 default:
12952 BFD_FAIL ();
48229727 12953 return 0;
7413f23f 12954 }
da5938a2 12955
461a49ca
DJ		 12956 prev_type = DATA_TYPE;
12957 size = 0;
12958 for (i = 0; i < stub_entry->stub_template_size; i++)
12959 {
d3ce72d0 12960 switch (template_sequence[i].type)
461a49ca
DJ		 12961 {
12962 case ARM_TYPE:
12963 sym_type = ARM_MAP_ARM;
12964 break;
12965
12966 case THUMB16_TYPE:
48229727 12967 case THUMB32_TYPE:
461a49ca
DJ		 12968 sym_type = ARM_MAP_THUMB;
12969 break;
12970
12971 case DATA_TYPE:
12972 sym_type = ARM_MAP_DATA;
12973 break;
12974
12975 default:
12976 BFD_FAIL ();
4e31c731 12977 return FALSE;
461a49ca
DJ		 12978 }
12979
d3ce72d0 12980 if (template_sequence[i].type != prev_type)
461a49ca 12981 {
d3ce72d0 12982 prev_type = template_sequence[i].type;
461a49ca
DJ		 12983 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
12984 return FALSE;
12985 }
12986
d3ce72d0 12987 switch (template_sequence[i].type)
461a49ca
DJ		 12988 {
12989 case ARM_TYPE:
48229727 12990 case THUMB32_TYPE:
461a49ca
DJ		 12991 size += 4;
12992 break;
12993
12994 case THUMB16_TYPE:
12995 size += 2;
12996 break;
12997
12998 case DATA_TYPE:
12999 size += 4;
13000 break;
13001
13002 default:
13003 BFD_FAIL ();
4e31c731 13004 return FALSE;
461a49ca
DJ		 13005 }
13006 }
13007
da5938a2
NC		 13008 return TRUE;
13009}
13010
33811162
DG		 13011/* Output mapping symbols for linker generated sections,
13012 and for those data-only sections that do not have a
13013 $d. */
4e617b1e
PB		 13014
13015static bfd_boolean
13016elf32_arm_output_arch_local_syms (bfd *output_bfd,
906e58ca
NC		 13017 struct bfd_link_info *info,
13018 void *finfo,
6e0b88f1
AM		 13019 int (*func) (void *, const char *,
13020 Elf_Internal_Sym *,
13021 asection *,
13022 struct elf_link_hash_entry *))
4e617b1e
PB		 13023{
13024 output_arch_syminfo osi;
13025 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 13026 bfd_vma offset;
13027 bfd_size_type size;
33811162 13028 bfd *input_bfd;
4e617b1e
PB		 13029
13030 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13031 if (htab == NULL)
13032 return FALSE;
13033
906e58ca 13034 check_use_blx (htab);
91a5743d 13035
4e617b1e
PB		 13036 osi.finfo = finfo;
13037 osi.info = info;
13038 osi.func = func;
906e58ca 13039
33811162
DG		 13040 /* Add a $d mapping symbol to data-only sections that
13041 don't have any mapping symbol. This may result in (harmless) redundant
13042 mapping symbols. */
13043 for (input_bfd = info->input_bfds;
13044 input_bfd != NULL;
13045 input_bfd = input_bfd->link_next)
13046 {
13047 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
13048 for (osi.sec = input_bfd->sections;
13049 osi.sec != NULL;
13050 osi.sec = osi.sec->next)
13051 {
13052 if (osi.sec->output_section != NULL
f7dd8c79
DJ		 13053 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
13054 != 0)
33811162
DG		 13055 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
13056 == SEC_HAS_CONTENTS
13057 && get_arm_elf_section_data (osi.sec) != NULL
501abfe0
DJ		 13058 && get_arm_elf_section_data (osi.sec)->mapcount == 0
13059 && osi.sec->size > 0)
33811162
DG		 13060 {
13061 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13062 (output_bfd, osi.sec->output_section);
13063 if (osi.sec_shndx != (int)SHN_BAD)
13064 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
13065 }
13066 }
13067 }
13068
91a5743d
PB		 13069 /* ARM->Thumb glue. */
13070 if (htab->arm_glue_size > 0)
13071 {
13072 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13073 ARM2THUMB_GLUE_SECTION_NAME);
13074
13075 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13076 (output_bfd, osi.sec->output_section);
13077 if (info->shared || htab->root.is_relocatable_executable
13078 || htab->pic_veneer)
13079 size = ARM2THUMB_PIC_GLUE_SIZE;
13080 else if (htab->use_blx)
13081 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
13082 else
13083 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 13084
91a5743d
PB		 13085 for (offset = 0; offset < htab->arm_glue_size; offset += size)
13086 {
7413f23f
DJ		 13087 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
13088 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
91a5743d
PB		 13089 }
13090 }
13091
13092 /* Thumb->ARM glue. */
13093 if (htab->thumb_glue_size > 0)
13094 {
13095 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13096 THUMB2ARM_GLUE_SECTION_NAME);
13097
13098 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13099 (output_bfd, osi.sec->output_section);
13100 size = THUMB2ARM_GLUE_SIZE;
13101
13102 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
13103 {
7413f23f
DJ		 13104 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
13105 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
91a5743d
PB		 13106 }
13107 }
13108
845b51d6
PB		 13109 /* ARMv4 BX veneers. */
13110 if (htab->bx_glue_size > 0)
13111 {
13112 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13113 ARM_BX_GLUE_SECTION_NAME);
13114
13115 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13116 (output_bfd, osi.sec->output_section);
13117
7413f23f 13118 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
845b51d6
PB		 13119 }
13120
8029a119
NC		 13121 /* Long calls stubs. */
13122 if (htab->stub_bfd && htab->stub_bfd->sections)
13123 {
da5938a2 13124 asection* stub_sec;
8029a119 13125
da5938a2
NC		 13126 for (stub_sec = htab->stub_bfd->sections;
13127 stub_sec != NULL;
8029a119
NC		 13128 stub_sec = stub_sec->next)
13129 {
13130 /* Ignore non-stub sections. */
13131 if (!strstr (stub_sec->name, STUB_SUFFIX))
13132 continue;
da5938a2 13133
8029a119 13134 osi.sec = stub_sec;
da5938a2 13135
8029a119
NC		 13136 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13137 (output_bfd, osi.sec->output_section);
da5938a2 13138
8029a119
NC		 13139 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
13140 }
13141 }
da5938a2 13142
91a5743d
PB		 13143 /* Finally, output mapping symbols for the PLT. */
13144 if (!htab->splt || htab->splt->size == 0)
13145 return TRUE;
13146
13147 osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd,
8029a119 13148 htab->splt->output_section);
91a5743d 13149 osi.sec = htab->splt;
4e617b1e
PB		 13150 /* Output mapping symbols for the plt header. SymbianOS does not have a
13151 plt header. */
13152 if (htab->vxworks_p)
13153 {
13154 /* VxWorks shared libraries have no PLT header. */
13155 if (!info->shared)
13156 {
7413f23f 13157 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e 13158 return FALSE;
7413f23f 13159 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
4e617b1e
PB		 13160 return FALSE;
13161 }
13162 }
13163 else if (!htab->symbian_p)
13164 {
7413f23f 13165 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e
PB		 13166 return FALSE;
13167#ifndef FOUR_WORD_PLT
7413f23f 13168 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
4e617b1e
PB		 13169 return FALSE;
13170#endif
13171 }
13172
13173 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, (void *) &osi);
13174 return TRUE;
13175}
13176
e489d0ae
PB		 13177/* Allocate target specific section data. */
13178
13179static bfd_boolean
13180elf32_arm_new_section_hook (bfd *abfd, asection *sec)
13181{
f592407e
AM		 13182 if (!sec->used_by_bfd)
13183 {
13184 _arm_elf_section_data *sdata;
13185 bfd_size_type amt = sizeof (*sdata);
e489d0ae 13186
21d799b5 13187 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
f592407e
AM		 13188 if (sdata == NULL)
13189 return FALSE;
13190 sec->used_by_bfd = sdata;
13191 }
e489d0ae
PB		 13192
13193 return _bfd_elf_new_section_hook (abfd, sec);
13194}
13195
13196
13197/* Used to order a list of mapping symbols by address. */
13198
13199static int
13200elf32_arm_compare_mapping (const void * a, const void * b)
13201{
7f6a71ff
JM		 13202 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
13203 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
13204
13205 if (amap->vma > bmap->vma)
13206 return 1;
13207 else if (amap->vma < bmap->vma)
13208 return -1;
13209 else if (amap->type > bmap->type)
13210 /* Ensure results do not depend on the host qsort for objects with
13211 multiple mapping symbols at the same address by sorting on type
13212 after vma. */
13213 return 1;
13214 else if (amap->type < bmap->type)
13215 return -1;
13216 else
13217 return 0;
e489d0ae
PB		 13218}
13219
2468f9c9
PB		 13220/* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
13221
13222static unsigned long
13223offset_prel31 (unsigned long addr, bfd_vma offset)
13224{
13225 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
13226}
13227
13228/* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
13229 relocations. */
13230
13231static void
13232copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
13233{
13234 unsigned long first_word = bfd_get_32 (output_bfd, from);
13235 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
13236
13237 /* High bit of first word is supposed to be zero. */
13238 if ((first_word & 0x80000000ul) == 0)
13239 first_word = offset_prel31 (first_word, offset);
13240
13241 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
13242 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
13243 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
13244 second_word = offset_prel31 (second_word, offset);
13245
13246 bfd_put_32 (output_bfd, first_word, to);
13247 bfd_put_32 (output_bfd, second_word, to + 4);
13248}
e489d0ae 13249
48229727
JB		 13250/* Data for make_branch_to_a8_stub(). */
13251
13252struct a8_branch_to_stub_data {
13253 asection *writing_section;
13254 bfd_byte *contents;
13255};
13256
13257
13258/* Helper to insert branches to Cortex-A8 erratum stubs in the right
13259 places for a particular section. */
13260
13261static bfd_boolean
13262make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
13263 void *in_arg)
13264{
13265 struct elf32_arm_stub_hash_entry *stub_entry;
13266 struct a8_branch_to_stub_data *data;
13267 bfd_byte *contents;
13268 unsigned long branch_insn;
13269 bfd_vma veneered_insn_loc, veneer_entry_loc;
13270 bfd_signed_vma branch_offset;
13271 bfd *abfd;
91d6fa6a 13272 unsigned int target;
48229727
JB		 13273
13274 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
13275 data = (struct a8_branch_to_stub_data *) in_arg;
13276
13277 if (stub_entry->target_section != data->writing_section
4563a860 13278 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
48229727
JB		 13279 return TRUE;
13280
13281 contents = data->contents;
13282
13283 veneered_insn_loc = stub_entry->target_section->output_section->vma
13284 + stub_entry->target_section->output_offset
13285 + stub_entry->target_value;
13286
13287 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
13288 + stub_entry->stub_sec->output_offset
13289 + stub_entry->stub_offset;
13290
13291 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
13292 veneered_insn_loc &= ~3u;
13293
13294 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
13295
13296 abfd = stub_entry->target_section->owner;
91d6fa6a 13297 target = stub_entry->target_value;
48229727
JB		 13298
13299 /* We attempt to avoid this condition by setting stubs_always_after_branch
13300 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
13301 This check is just to be on the safe side... */
13302 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
13303 {
13304 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
13305 "allocated in unsafe location"), abfd);
13306 return FALSE;
13307 }
13308
13309 switch (stub_entry->stub_type)
13310 {
13311 case arm_stub_a8_veneer_b:
13312 case arm_stub_a8_veneer_b_cond:
13313 branch_insn = 0xf0009000;
13314 goto jump24;
13315
13316 case arm_stub_a8_veneer_blx:
13317 branch_insn = 0xf000e800;
13318 goto jump24;
13319
13320 case arm_stub_a8_veneer_bl:
13321 {
13322 unsigned int i1, j1, i2, j2, s;
13323
13324 branch_insn = 0xf000d000;
13325
13326 jump24:
13327 if (branch_offset < -16777216 || branch_offset > 16777214)
13328 {
13329 /* There's not much we can do apart from complain if this
13330 happens. */
13331 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
13332 "of range (input file too large)"), abfd);
13333 return FALSE;
13334 }
13335
13336 /* i1 = not(j1 eor s), so:
13337 not i1 = j1 eor s
13338 j1 = (not i1) eor s. */
13339
13340 branch_insn |= (branch_offset >> 1) & 0x7ff;
13341 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
13342 i2 = (branch_offset >> 22) & 1;
13343 i1 = (branch_offset >> 23) & 1;
13344 s = (branch_offset >> 24) & 1;
13345 j1 = (!i1) ^ s;
13346 j2 = (!i2) ^ s;
13347 branch_insn |= j2 << 11;
13348 branch_insn |= j1 << 13;
13349 branch_insn |= s << 26;
13350 }
13351 break;
13352
13353 default:
13354 BFD_FAIL ();
13355 return FALSE;
13356 }
13357
91d6fa6a
NC		 13358 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
13359 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
48229727
JB		 13360
13361 return TRUE;
13362}
13363
e489d0ae
PB		 13364/* Do code byteswapping. Return FALSE afterwards so that the section is
13365 written out as normal. */
13366
13367static bfd_boolean
c7b8f16e 13368elf32_arm_write_section (bfd *output_bfd,
8029a119
NC		 13369 struct bfd_link_info *link_info,
13370 asection *sec,
e489d0ae
PB		 13371 bfd_byte *contents)
13372{
48229727 13373 unsigned int mapcount, errcount;
8e3de13a 13374 _arm_elf_section_data *arm_data;
c7b8f16e 13375 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 13376 elf32_arm_section_map *map;
c7b8f16e 13377 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 13378 bfd_vma ptr;
13379 bfd_vma end;
c7b8f16e 13380 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae 13381 bfd_byte tmp;
48229727 13382 unsigned int i;
57e8b36a 13383
4dfe6ac6
NC		 13384 if (globals == NULL)
13385 return FALSE;
13386
8e3de13a
NC		 13387 /* If this section has not been allocated an _arm_elf_section_data
13388 structure then we cannot record anything. */
13389 arm_data = get_arm_elf_section_data (sec);
13390 if (arm_data == NULL)
13391 return FALSE;
13392
13393 mapcount = arm_data->mapcount;
13394 map = arm_data->map;
c7b8f16e
JB		 13395 errcount = arm_data->erratumcount;
13396
13397 if (errcount != 0)
13398 {
13399 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
13400
13401 for (errnode = arm_data->erratumlist; errnode != 0;
13402 errnode = errnode->next)
13403 {
91d6fa6a 13404 bfd_vma target = errnode->vma - offset;
c7b8f16e
JB		 13405
13406 switch (errnode->type)
13407 {
13408 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
13409 {
13410 bfd_vma branch_to_veneer;
13411 /* Original condition code of instruction, plus bit mask for
13412 ARM B instruction. */
13413 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
13414 | 0x0a000000;
13415
13416 /* The instruction is before the label. */
91d6fa6a 13417 target -= 4;
c7b8f16e
JB		 13418
13419 /* Above offset included in -4 below. */
13420 branch_to_veneer = errnode->u.b.veneer->vma
13421 - errnode->vma - 4;
13422
13423 if ((signed) branch_to_veneer < -(1 << 25)
13424 || (signed) branch_to_veneer >= (1 << 25))
13425 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
13426 "range"), output_bfd);
13427
13428 insn |= (branch_to_veneer >> 2) & 0xffffff;
91d6fa6a
NC		 13429 contents[endianflip ^ target] = insn & 0xff;
13430 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
13431 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
13432 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 13433 }
13434 break;
13435
13436 case VFP11_ERRATUM_ARM_VENEER:
13437 {
13438 bfd_vma branch_from_veneer;
13439 unsigned int insn;
13440
13441 /* Take size of veneer into account. */
13442 branch_from_veneer = errnode->u.v.branch->vma
13443 - errnode->vma - 12;
13444
13445 if ((signed) branch_from_veneer < -(1 << 25)
13446 || (signed) branch_from_veneer >= (1 << 25))
13447 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
13448 "range"), output_bfd);
13449
13450 /* Original instruction. */
13451 insn = errnode->u.v.branch->u.b.vfp_insn;
91d6fa6a
NC		 13452 contents[endianflip ^ target] = insn & 0xff;
13453 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
13454 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
13455 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 13456
13457 /* Branch back to insn after original insn. */
13458 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
91d6fa6a
NC		 13459 contents[endianflip ^ (target + 4)] = insn & 0xff;
13460 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
13461 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
13462 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 13463 }
13464 break;
13465
13466 default:
13467 abort ();
13468 }
13469 }
13470 }
e489d0ae 13471
2468f9c9
PB		 13472 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
13473 {
13474 arm_unwind_table_edit *edit_node
13475 = arm_data->u.exidx.unwind_edit_list;
13476 /* Now, sec->size is the size of the section we will write. The original
13477 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
13478 markers) was sec->rawsize. (This isn't the case if we perform no
13479 edits, then rawsize will be zero and we should use size). */
21d799b5 13480 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
2468f9c9
PB		 13481 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
13482 unsigned int in_index, out_index;
13483 bfd_vma add_to_offsets = 0;
13484
13485 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
13486 {
13487 if (edit_node)
13488 {
13489 unsigned int edit_index = edit_node->index;
13490
13491 if (in_index < edit_index && in_index * 8 < input_size)
13492 {
13493 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
13494 contents + in_index * 8, add_to_offsets);
13495 out_index++;
13496 in_index++;
13497 }
13498 else if (in_index == edit_index
13499 || (in_index * 8 >= input_size
13500 && edit_index == UINT_MAX))
13501 {
13502 switch (edit_node->type)
13503 {
13504 case DELETE_EXIDX_ENTRY:
13505 in_index++;
13506 add_to_offsets += 8;
13507 break;
13508
13509 case INSERT_EXIDX_CANTUNWIND_AT_END:
13510 {
13511 asection *text_sec = edit_node->linked_section;
13512 bfd_vma text_offset = text_sec->output_section->vma
13513 + text_sec->output_offset
13514 + text_sec->size;
13515 bfd_vma exidx_offset = offset + out_index * 8;
13516 unsigned long prel31_offset;
13517
13518 /* Note: this is meant to be equivalent to an
13519 R_ARM_PREL31 relocation. These synthetic
13520 EXIDX_CANTUNWIND markers are not relocated by the
13521 usual BFD method. */
13522 prel31_offset = (text_offset - exidx_offset)
13523 & 0x7ffffffful;
13524
13525 /* First address we can't unwind. */
13526 bfd_put_32 (output_bfd, prel31_offset,
13527 &edited_contents[out_index * 8]);
13528
13529 /* Code for EXIDX_CANTUNWIND. */
13530 bfd_put_32 (output_bfd, 0x1,
13531 &edited_contents[out_index * 8 + 4]);
13532
13533 out_index++;
13534 add_to_offsets -= 8;
13535 }
13536 break;
13537 }
13538
13539 edit_node = edit_node->next;
13540 }
13541 }
13542 else
13543 {
13544 /* No more edits, copy remaining entries verbatim. */
13545 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
13546 contents + in_index * 8, add_to_offsets);
13547 out_index++;
13548 in_index++;
13549 }
13550 }
13551
13552 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
13553 bfd_set_section_contents (output_bfd, sec->output_section,
13554 edited_contents,
13555 (file_ptr) sec->output_offset, sec->size);
13556
13557 return TRUE;
13558 }
13559
48229727
JB		 13560 /* Fix code to point to Cortex-A8 erratum stubs. */
13561 if (globals->fix_cortex_a8)
13562 {
13563 struct a8_branch_to_stub_data data;
13564
13565 data.writing_section = sec;
13566 data.contents = contents;
13567
13568 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
13569 &data);
13570 }
13571
e489d0ae
PB		 13572 if (mapcount == 0)
13573 return FALSE;
13574
c7b8f16e 13575 if (globals->byteswap_code)
e489d0ae 13576 {
c7b8f16e 13577 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 13578
c7b8f16e
JB		 13579 ptr = map[0].vma;
13580 for (i = 0; i < mapcount; i++)
13581 {
13582 if (i == mapcount - 1)
13583 end = sec->size;
13584 else
13585 end = map[i + 1].vma;
e489d0ae 13586
c7b8f16e 13587 switch (map[i].type)
e489d0ae 13588 {
c7b8f16e
JB		 13589 case 'a':
13590 /* Byte swap code words. */
13591 while (ptr + 3 < end)
13592 {
13593 tmp = contents[ptr];
13594 contents[ptr] = contents[ptr + 3];
13595 contents[ptr + 3] = tmp;
13596 tmp = contents[ptr + 1];
13597 contents[ptr + 1] = contents[ptr + 2];
13598 contents[ptr + 2] = tmp;
13599 ptr += 4;
13600 }
13601 break;
e489d0ae 13602
c7b8f16e
JB		 13603 case 't':
13604 /* Byte swap code halfwords. */
13605 while (ptr + 1 < end)
13606 {
13607 tmp = contents[ptr];
13608 contents[ptr] = contents[ptr + 1];
13609 contents[ptr + 1] = tmp;
13610 ptr += 2;
13611 }
13612 break;
13613
13614 case 'd':
13615 /* Leave data alone. */
13616 break;
13617 }
13618 ptr = end;
13619 }
e489d0ae 13620 }
8e3de13a 13621
93204d3a 13622 free (map);
47b2e99c 13623 arm_data->mapcount = -1;
c7b8f16e 13624 arm_data->mapsize = 0;
8e3de13a 13625 arm_data->map = NULL;
8e3de13a 13626
e489d0ae
PB		 13627 return FALSE;
13628}
13629
b7693d02
DJ		 13630/* Display STT_ARM_TFUNC symbols as functions. */
13631
13632static void
13633elf32_arm_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED,
13634 asymbol *asym)
13635{
13636 elf_symbol_type *elfsym = (elf_symbol_type *) asym;
13637
13638 if (ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_ARM_TFUNC)
13639 elfsym->symbol.flags |= BSF_FUNCTION;
13640}
13641
0beaef2b
PB		 13642
13643/* Mangle thumb function symbols as we read them in. */
13644
8384fb8f 13645static bfd_boolean
0beaef2b
PB		 13646elf32_arm_swap_symbol_in (bfd * abfd,
13647 const void *psrc,
13648 const void *pshn,
13649 Elf_Internal_Sym *dst)
13650{
8384fb8f
AM		 13651 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
13652 return FALSE;
0beaef2b
PB		 13653
13654 /* New EABI objects mark thumb function symbols by setting the low bit of
13655 the address. Turn these into STT_ARM_TFUNC. */
0f88be7a 13656 if ((ELF_ST_TYPE (dst->st_info) == STT_FUNC)
0beaef2b
PB		 13657 && (dst->st_value & 1))
13658 {
13659 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_ARM_TFUNC);
13660 dst->st_value &= ~(bfd_vma) 1;
13661 }
8384fb8f 13662 return TRUE;
0beaef2b
PB		 13663}
13664
13665
13666/* Mangle thumb function symbols as we write them out. */
13667
13668static void
13669elf32_arm_swap_symbol_out (bfd *abfd,
13670 const Elf_Internal_Sym *src,
13671 void *cdst,
13672 void *shndx)
13673{
13674 Elf_Internal_Sym newsym;
13675
13676 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
13677 of the address set, as per the new EABI. We do this unconditionally
13678 because objcopy does not set the elf header flags until after
13679 it writes out the symbol table. */
13680 if (ELF_ST_TYPE (src->st_info) == STT_ARM_TFUNC)
13681 {
13682 newsym = *src;
13683 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad
PB		 13684 if (newsym.st_shndx != SHN_UNDEF)
13685 {
13686 /* Do this only for defined symbols. At link type, the static
13687 linker will simulate the work of dynamic linker of resolving
13688 symbols and will carry over the thumbness of found symbols to
13689 the output symbol table. It's not clear how it happens, but
b0fead2b 13690 the thumbness of undefined symbols can well be different at
0fa3dcad
PB		 13691 runtime, and writing '1' for them will be confusing for users
13692 and possibly for dynamic linker itself.
13693 */
13694 newsym.st_value |= 1;
13695 }
906e58ca 13696
0beaef2b
PB		 13697 src = &newsym;
13698 }
13699 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
13700}
13701
b294bdf8
MM		 13702/* Add the PT_ARM_EXIDX program header. */
13703
13704static bfd_boolean
906e58ca 13705elf32_arm_modify_segment_map (bfd *abfd,
b294bdf8
MM		 13706 struct bfd_link_info *info ATTRIBUTE_UNUSED)
13707{
13708 struct elf_segment_map *m;
13709 asection *sec;
13710
13711 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
13712 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
13713 {
13714 /* If there is already a PT_ARM_EXIDX header, then we do not
13715 want to add another one. This situation arises when running
13716 "strip"; the input binary already has the header. */
13717 m = elf_tdata (abfd)->segment_map;
13718 while (m && m->p_type != PT_ARM_EXIDX)
13719 m = m->next;
13720 if (!m)
13721 {
21d799b5
NC		 13722 m = (struct elf_segment_map *)
13723 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
b294bdf8
MM		 13724 if (m == NULL)
13725 return FALSE;
13726 m->p_type = PT_ARM_EXIDX;
13727 m->count = 1;
13728 m->sections[0] = sec;
13729
13730 m->next = elf_tdata (abfd)->segment_map;
13731 elf_tdata (abfd)->segment_map = m;
13732 }
13733 }
13734
13735 return TRUE;
13736}
13737
13738/* We may add a PT_ARM_EXIDX program header. */
13739
13740static int
a6b96beb
AM		 13741elf32_arm_additional_program_headers (bfd *abfd,
13742 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 13743{
13744 asection *sec;
13745
13746 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
13747 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
13748 return 1;
13749 else
13750 return 0;
13751}
13752
fcb93ecf 13753/* We have two function types: STT_FUNC and STT_ARM_TFUNC. */
906e58ca 13754
fcb93ecf
PB		 13755static bfd_boolean
13756elf32_arm_is_function_type (unsigned int type)
13757{
0f88be7a 13758 return (type == STT_FUNC) || (type == STT_ARM_TFUNC);
fcb93ecf
PB		 13759}
13760
0beaef2b 13761/* We use this to override swap_symbol_in and swap_symbol_out. */
906e58ca
NC		 13762const struct elf_size_info elf32_arm_size_info =
13763{
0beaef2b
PB		 13764 sizeof (Elf32_External_Ehdr),
13765 sizeof (Elf32_External_Phdr),
13766 sizeof (Elf32_External_Shdr),
13767 sizeof (Elf32_External_Rel),
13768 sizeof (Elf32_External_Rela),
13769 sizeof (Elf32_External_Sym),
13770 sizeof (Elf32_External_Dyn),
13771 sizeof (Elf_External_Note),
13772 4,
13773 1,
13774 32, 2,
13775 ELFCLASS32, EV_CURRENT,
13776 bfd_elf32_write_out_phdrs,
13777 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 13778 bfd_elf32_checksum_contents,
0beaef2b
PB		 13779 bfd_elf32_write_relocs,
13780 elf32_arm_swap_symbol_in,
13781 elf32_arm_swap_symbol_out,
13782 bfd_elf32_slurp_reloc_table,
13783 bfd_elf32_slurp_symbol_table,
13784 bfd_elf32_swap_dyn_in,
13785 bfd_elf32_swap_dyn_out,
13786 bfd_elf32_swap_reloc_in,
13787 bfd_elf32_swap_reloc_out,
13788 bfd_elf32_swap_reloca_in,
13789 bfd_elf32_swap_reloca_out
13790};
13791
252b5132 13792#define ELF_ARCH bfd_arch_arm
ae95ffa6 13793#define ELF_TARGET_ID ARM_ELF_DATA
252b5132 13794#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 13795#ifdef __QNXTARGET__
13796#define ELF_MAXPAGESIZE 0x1000
13797#else
f21f3fe0 13798#define ELF_MAXPAGESIZE 0x8000
d0facd1b 13799#endif
b1342370 13800#define ELF_MINPAGESIZE 0x1000
24718e3b 13801#define ELF_COMMONPAGESIZE 0x1000
252b5132 13802
ba93b8ac
DJ		 13803#define bfd_elf32_mkobject elf32_arm_mkobject
13804
99e4ae17
AJ		 13805#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
13806#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 13807#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
13808#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
13809#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
906e58ca 13810#define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
dc810e39 13811#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
157090f7 13812#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 13813#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 13814#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 13815#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 13816#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
3e6b1042 13817#define bfd_elf32_bfd_final_link elf32_arm_final_link
252b5132
RH		 13818
13819#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
13820#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 13821#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 13822#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
13823#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 13824#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 13825#define elf_backend_write_section elf32_arm_write_section
252b5132 13826#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 13827#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 13828#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
13829#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
13830#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
74541ad4 13831#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 13832#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 13833#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 13834#define elf_backend_object_p elf32_arm_object_p
e16bb312 13835#define elf_backend_section_flags elf32_arm_section_flags
40a18ebd
NC		 13836#define elf_backend_fake_sections elf32_arm_fake_sections
13837#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 13838#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 13839#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
b7693d02 13840#define elf_backend_symbol_processing elf32_arm_symbol_processing
0beaef2b 13841#define elf_backend_size_info elf32_arm_size_info
b294bdf8 13842#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
906e58ca
NC		 13843#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
13844#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
13845#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
13846#define elf_backend_is_function_type elf32_arm_is_function_type
13847
13848#define elf_backend_can_refcount 1
13849#define elf_backend_can_gc_sections 1
13850#define elf_backend_plt_readonly 1
13851#define elf_backend_want_got_plt 1
13852#define elf_backend_want_plt_sym 0
13853#define elf_backend_may_use_rel_p 1
13854#define elf_backend_may_use_rela_p 0
4e7fd91e 13855#define elf_backend_default_use_rela_p 0
252b5132 13856
04f7c78d 13857#define elf_backend_got_header_size 12
04f7c78d 13858
906e58ca
NC		 13859#undef elf_backend_obj_attrs_vendor
13860#define elf_backend_obj_attrs_vendor "aeabi"
13861#undef elf_backend_obj_attrs_section
13862#define elf_backend_obj_attrs_section ".ARM.attributes"
13863#undef elf_backend_obj_attrs_arg_type
13864#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
13865#undef elf_backend_obj_attrs_section_type
104d59d1 13866#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
5aa6ff7c 13867#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
e8b36cd1 13868#define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
104d59d1 13869
252b5132 13870#include "elf32-target.h"
7f266840 13871
906e58ca 13872/* VxWorks Targets. */
4e7fd91e 13873
906e58ca 13874#undef TARGET_LITTLE_SYM
4e7fd91e 13875#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
906e58ca 13876#undef TARGET_LITTLE_NAME
4e7fd91e 13877#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
906e58ca 13878#undef TARGET_BIG_SYM
4e7fd91e 13879#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
906e58ca 13880#undef TARGET_BIG_NAME
4e7fd91e
PB		 13881#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
13882
13883/* Like elf32_arm_link_hash_table_create -- but overrides
13884 appropriately for VxWorks. */
906e58ca 13885
4e7fd91e
PB		 13886static struct bfd_link_hash_table *
13887elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
13888{
13889 struct bfd_link_hash_table *ret;
13890
13891 ret = elf32_arm_link_hash_table_create (abfd);
13892 if (ret)
13893 {
13894 struct elf32_arm_link_hash_table *htab
00a97672 13895 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 13896 htab->use_rel = 0;
00a97672 13897 htab->vxworks_p = 1;
4e7fd91e
PB		 13898 }
13899 return ret;
906e58ca 13900}
4e7fd91e 13901
00a97672
RS		 13902static void
13903elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
13904{
13905 elf32_arm_final_write_processing (abfd, linker);
13906 elf_vxworks_final_write_processing (abfd, linker);
13907}
13908
906e58ca 13909#undef elf32_bed
4e7fd91e
PB		 13910#define elf32_bed elf32_arm_vxworks_bed
13911
906e58ca
NC		 13912#undef bfd_elf32_bfd_link_hash_table_create
13913#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
13914#undef elf_backend_add_symbol_hook
13915#define elf_backend_add_symbol_hook elf_vxworks_add_symbol_hook
13916#undef elf_backend_final_write_processing
13917#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
13918#undef elf_backend_emit_relocs
13919#define elf_backend_emit_relocs elf_vxworks_emit_relocs
4e7fd91e 13920
906e58ca 13921#undef elf_backend_may_use_rel_p
00a97672 13922#define elf_backend_may_use_rel_p 0
906e58ca 13923#undef elf_backend_may_use_rela_p
00a97672 13924#define elf_backend_may_use_rela_p 1
906e58ca 13925#undef elf_backend_default_use_rela_p
00a97672 13926#define elf_backend_default_use_rela_p 1
906e58ca 13927#undef elf_backend_want_plt_sym
00a97672 13928#define elf_backend_want_plt_sym 1
906e58ca 13929#undef ELF_MAXPAGESIZE
00a97672 13930#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 13931
13932#include "elf32-target.h"
13933
13934
21d799b5
NC		 13935/* Merge backend specific data from an object file to the output
13936 object file when linking. */
13937
13938static bfd_boolean
13939elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
13940{
13941 flagword out_flags;
13942 flagword in_flags;
13943 bfd_boolean flags_compatible = TRUE;
13944 asection *sec;
13945
13946 /* Check if we have the same endianess. */
13947 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
13948 return FALSE;
13949
13950 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
13951 return TRUE;
13952
13953 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
13954 return FALSE;
13955
13956 /* The input BFD must have had its flags initialised. */
13957 /* The following seems bogus to me -- The flags are initialized in
13958 the assembler but I don't think an elf_flags_init field is
13959 written into the object. */
13960 /* BFD_ASSERT (elf_flags_init (ibfd)); */
13961
13962 in_flags = elf_elfheader (ibfd)->e_flags;
13963 out_flags = elf_elfheader (obfd)->e_flags;
13964
13965 /* In theory there is no reason why we couldn't handle this. However
13966 in practice it isn't even close to working and there is no real
13967 reason to want it. */
13968 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
13969 && !(ibfd->flags & DYNAMIC)
13970 && (in_flags & EF_ARM_BE8))
13971 {
13972 _bfd_error_handler (_("error: %B is already in final BE8 format"),
13973 ibfd);
13974 return FALSE;
13975 }
13976
13977 if (!elf_flags_init (obfd))
13978 {
13979 /* If the input is the default architecture and had the default
13980 flags then do not bother setting the flags for the output
13981 architecture, instead allow future merges to do this. If no
13982 future merges ever set these flags then they will retain their
13983 uninitialised values, which surprise surprise, correspond
13984 to the default values. */
13985 if (bfd_get_arch_info (ibfd)->the_default
13986 && elf_elfheader (ibfd)->e_flags == 0)
13987 return TRUE;
13988
13989 elf_flags_init (obfd) = TRUE;
13990 elf_elfheader (obfd)->e_flags = in_flags;
13991
13992 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
13993 && bfd_get_arch_info (obfd)->the_default)
13994 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
13995
13996 return TRUE;
13997 }
13998
13999 /* Determine what should happen if the input ARM architecture
14000 does not match the output ARM architecture. */
14001 if (! bfd_arm_merge_machines (ibfd, obfd))
14002 return FALSE;
14003
14004 /* Identical flags must be compatible. */
14005 if (in_flags == out_flags)
14006 return TRUE;
14007
14008 /* Check to see if the input BFD actually contains any sections. If
14009 not, its flags may not have been initialised either, but it
14010 cannot actually cause any incompatiblity. Do not short-circuit
14011 dynamic objects; their section list may be emptied by
14012 elf_link_add_object_symbols.
14013
14014 Also check to see if there are no code sections in the input.
14015 In this case there is no need to check for code specific flags.
14016 XXX - do we need to worry about floating-point format compatability
14017 in data sections ? */
14018 if (!(ibfd->flags & DYNAMIC))
14019 {
14020 bfd_boolean null_input_bfd = TRUE;
14021 bfd_boolean only_data_sections = TRUE;
14022
14023 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
14024 {
14025 /* Ignore synthetic glue sections. */
14026 if (strcmp (sec->name, ".glue_7")
14027 && strcmp (sec->name, ".glue_7t"))
14028 {
14029 if ((bfd_get_section_flags (ibfd, sec)
14030 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
14031 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
14032 only_data_sections = FALSE;
14033
14034 null_input_bfd = FALSE;
14035 break;
14036 }
14037 }
14038
14039 if (null_input_bfd || only_data_sections)
14040 return TRUE;
14041 }
14042
14043 /* Complain about various flag mismatches. */
14044 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
14045 EF_ARM_EABI_VERSION (out_flags)))
14046 {
14047 _bfd_error_handler
14048 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
14049 ibfd, obfd,
14050 (in_flags & EF_ARM_EABIMASK) >> 24,
14051 (out_flags & EF_ARM_EABIMASK) >> 24);
14052 return FALSE;
14053 }
14054
14055 /* Not sure what needs to be checked for EABI versions >= 1. */
14056 /* VxWorks libraries do not use these flags. */
14057 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
14058 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
14059 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
14060 {
14061 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
14062 {
14063 _bfd_error_handler
14064 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
14065 ibfd, obfd,
14066 in_flags & EF_ARM_APCS_26 ? 26 : 32,
14067 out_flags & EF_ARM_APCS_26 ? 26 : 32);
14068 flags_compatible = FALSE;
14069 }
14070
14071 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
14072 {
14073 if (in_flags & EF_ARM_APCS_FLOAT)
14074 _bfd_error_handler
14075 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
14076 ibfd, obfd);
14077 else
14078 _bfd_error_handler
14079 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
14080 ibfd, obfd);
14081
14082 flags_compatible = FALSE;
14083 }
14084
14085 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
14086 {
14087 if (in_flags & EF_ARM_VFP_FLOAT)
14088 _bfd_error_handler
14089 (_("error: %B uses VFP instructions, whereas %B does not"),
14090 ibfd, obfd);
14091 else
14092 _bfd_error_handler
14093 (_("error: %B uses FPA instructions, whereas %B does not"),
14094 ibfd, obfd);
14095
14096 flags_compatible = FALSE;
14097 }
14098
14099 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
14100 {
14101 if (in_flags & EF_ARM_MAVERICK_FLOAT)
14102 _bfd_error_handler
14103 (_("error: %B uses Maverick instructions, whereas %B does not"),
14104 ibfd, obfd);
14105 else
14106 _bfd_error_handler
14107 (_("error: %B does not use Maverick instructions, whereas %B does"),
14108 ibfd, obfd);
14109
14110 flags_compatible = FALSE;
14111 }
14112
14113#ifdef EF_ARM_SOFT_FLOAT
14114 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
14115 {
14116 /* We can allow interworking between code that is VFP format
14117 layout, and uses either soft float or integer regs for
14118 passing floating point arguments and results. We already
14119 know that the APCS_FLOAT flags match; similarly for VFP
14120 flags. */
14121 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
14122 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
14123 {
14124 if (in_flags & EF_ARM_SOFT_FLOAT)
14125 _bfd_error_handler
14126 (_("error: %B uses software FP, whereas %B uses hardware FP"),
14127 ibfd, obfd);
14128 else
14129 _bfd_error_handler
14130 (_("error: %B uses hardware FP, whereas %B uses software FP"),
14131 ibfd, obfd);
14132
14133 flags_compatible = FALSE;
14134 }
14135 }
14136#endif
14137
14138 /* Interworking mismatch is only a warning. */
14139 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
14140 {
14141 if (in_flags & EF_ARM_INTERWORK)
14142 {
14143 _bfd_error_handler
14144 (_("Warning: %B supports interworking, whereas %B does not"),
14145 ibfd, obfd);
14146 }
14147 else
14148 {
14149 _bfd_error_handler
14150 (_("Warning: %B does not support interworking, whereas %B does"),
14151 ibfd, obfd);
14152 }
14153 }
14154 }
14155
14156 return flags_compatible;
14157}
14158
14159
906e58ca 14160/* Symbian OS Targets. */
7f266840 14161
906e58ca 14162#undef TARGET_LITTLE_SYM
7f266840 14163#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
906e58ca 14164#undef TARGET_LITTLE_NAME
7f266840 14165#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
906e58ca 14166#undef TARGET_BIG_SYM
7f266840 14167#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
906e58ca 14168#undef TARGET_BIG_NAME
7f266840
DJ		 14169#define TARGET_BIG_NAME "elf32-bigarm-symbian"
14170
14171/* Like elf32_arm_link_hash_table_create -- but overrides
14172 appropriately for Symbian OS. */
906e58ca 14173
7f266840
DJ		 14174static struct bfd_link_hash_table *
14175elf32_arm_symbian_link_hash_table_create (bfd *abfd)
14176{
14177 struct bfd_link_hash_table *ret;
14178
14179 ret = elf32_arm_link_hash_table_create (abfd);
14180 if (ret)
14181 {
14182 struct elf32_arm_link_hash_table *htab
14183 = (struct elf32_arm_link_hash_table *)ret;
14184 /* There is no PLT header for Symbian OS. */
14185 htab->plt_header_size = 0;
95720a86
DJ		 14186 /* The PLT entries are each one instruction and one word. */
14187 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
7f266840 14188 htab->symbian_p = 1;
33bfe774
JB		 14189 /* Symbian uses armv5t or above, so use_blx is always true. */
14190 htab->use_blx = 1;
67687978 14191 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 14192 }
14193 return ret;
906e58ca 14194}
7f266840 14195
b35d266b 14196static const struct bfd_elf_special_section
551b43fd 14197elf32_arm_symbian_special_sections[] =
7f266840 14198{
5cd3778d
MM		 14199 /* In a BPABI executable, the dynamic linking sections do not go in
14200 the loadable read-only segment. The post-linker may wish to
14201 refer to these sections, but they are not part of the final
14202 program image. */
0112cd26
NC		 14203 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
14204 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
14205 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
14206 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
14207 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 14208 /* These sections do not need to be writable as the SymbianOS
14209 postlinker will arrange things so that no dynamic relocation is
14210 required. */
0112cd26
NC		 14211 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
14212 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
14213 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
14214 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 14215};
14216
c3c76620 14217static void
906e58ca 14218elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 14219 struct bfd_link_info *link_info)
c3c76620
MM		 14220{
14221 /* BPABI objects are never loaded directly by an OS kernel; they are
14222 processed by a postlinker first, into an OS-specific format. If
14223 the D_PAGED bit is set on the file, BFD will align segments on
14224 page boundaries, so that an OS can directly map the file. With
14225 BPABI objects, that just results in wasted space. In addition,
14226 because we clear the D_PAGED bit, map_sections_to_segments will
14227 recognize that the program headers should not be mapped into any
14228 loadable segment. */
14229 abfd->flags &= ~D_PAGED;
906e58ca 14230 elf32_arm_begin_write_processing (abfd, link_info);
c3c76620 14231}
7f266840
DJ		 14232
14233static bfd_boolean
906e58ca 14234elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 14235 struct bfd_link_info *info)
7f266840
DJ		 14236{
14237 struct elf_segment_map *m;
14238 asection *dynsec;
14239
7f266840
DJ		 14240 /* BPABI shared libraries and executables should have a PT_DYNAMIC
14241 segment. However, because the .dynamic section is not marked
14242 with SEC_LOAD, the generic ELF code will not create such a
14243 segment. */
14244 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
14245 if (dynsec)
14246 {
8ded5a0f
AM		 14247 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
14248 if (m->p_type == PT_DYNAMIC)
14249 break;
14250
14251 if (m == NULL)
14252 {
14253 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
14254 m->next = elf_tdata (abfd)->segment_map;
14255 elf_tdata (abfd)->segment_map = m;
14256 }
7f266840
DJ		 14257 }
14258
b294bdf8
MM		 14259 /* Also call the generic arm routine. */
14260 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 14261}
14262
95720a86
DJ		 14263/* Return address for Ith PLT stub in section PLT, for relocation REL
14264 or (bfd_vma) -1 if it should not be included. */
14265
14266static bfd_vma
14267elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
14268 const arelent *rel ATTRIBUTE_UNUSED)
14269{
14270 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
14271}
14272
14273
8029a119 14274#undef elf32_bed
7f266840
DJ		 14275#define elf32_bed elf32_arm_symbian_bed
14276
14277/* The dynamic sections are not allocated on SymbianOS; the postlinker
14278 will process them and then discard them. */
906e58ca 14279#undef ELF_DYNAMIC_SEC_FLAGS
7f266840
DJ		 14280#define ELF_DYNAMIC_SEC_FLAGS \
14281 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
14282
00a97672 14283#undef elf_backend_add_symbol_hook
00a97672 14284#undef elf_backend_emit_relocs
c3c76620 14285
906e58ca
NC		 14286#undef bfd_elf32_bfd_link_hash_table_create
14287#define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
14288#undef elf_backend_special_sections
14289#define elf_backend_special_sections elf32_arm_symbian_special_sections
14290#undef elf_backend_begin_write_processing
14291#define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
14292#undef elf_backend_final_write_processing
14293#define elf_backend_final_write_processing elf32_arm_final_write_processing
14294
14295#undef elf_backend_modify_segment_map
7f266840
DJ		 14296#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
14297
14298/* There is no .got section for BPABI objects, and hence no header. */
906e58ca 14299#undef elf_backend_got_header_size
7f266840
DJ		 14300#define elf_backend_got_header_size 0
14301
14302/* Similarly, there is no .got.plt section. */
906e58ca 14303#undef elf_backend_want_got_plt
7f266840
DJ		 14304#define elf_backend_want_got_plt 0
14305
906e58ca 14306#undef elf_backend_plt_sym_val
95720a86
DJ		 14307#define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
14308
906e58ca 14309#undef elf_backend_may_use_rel_p
00a97672 14310#define elf_backend_may_use_rel_p 1
906e58ca 14311#undef elf_backend_may_use_rela_p
00a97672 14312#define elf_backend_may_use_rela_p 0
906e58ca 14313#undef elf_backend_default_use_rela_p
00a97672 14314#define elf_backend_default_use_rela_p 0
906e58ca 14315#undef elf_backend_want_plt_sym
00a97672 14316#define elf_backend_want_plt_sym 0
906e58ca 14317#undef ELF_MAXPAGESIZE
00a97672 14318#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 14319
7f266840 14320#include "elf32-target.h"
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