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* readelf.c (get_arm_section_type_name): Added support for
[thirdparty/binutils-gdb.git] / bfd / elf32-arm.c
CommitLineData
252b5132 1/* 32-bit ELF support for ARM
e44a2c9c 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
81694485 3 2008, 2009 Free Software Foundation, Inc.
252b5132
RH		 4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
6e6718a3 22#include "sysdep.h"
2468f9c9
PB		 23#include <limits.h>
24
3db64b00 25#include "bfd.h"
00a97672 26#include "libiberty.h"
7f266840
DJ		 27#include "libbfd.h"
28#include "elf-bfd.h"
00a97672 29#include "elf-vxworks.h"
ee065d83 30#include "elf/arm.h"
7f266840 31
00a97672
RS		 32/* Return the relocation section associated with NAME. HTAB is the
33 bfd's elf32_arm_link_hash_entry. */
34#define RELOC_SECTION(HTAB, NAME) \
35 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
36
37/* Return size of a relocation entry. HTAB is the bfd's
38 elf32_arm_link_hash_entry. */
39#define RELOC_SIZE(HTAB) \
40 ((HTAB)->use_rel \
41 ? sizeof (Elf32_External_Rel) \
42 : sizeof (Elf32_External_Rela))
43
44/* Return function to swap relocations in. HTAB is the bfd's
45 elf32_arm_link_hash_entry. */
46#define SWAP_RELOC_IN(HTAB) \
47 ((HTAB)->use_rel \
48 ? bfd_elf32_swap_reloc_in \
49 : bfd_elf32_swap_reloca_in)
50
51/* Return function to swap relocations out. HTAB is the bfd's
52 elf32_arm_link_hash_entry. */
53#define SWAP_RELOC_OUT(HTAB) \
54 ((HTAB)->use_rel \
55 ? bfd_elf32_swap_reloc_out \
56 : bfd_elf32_swap_reloca_out)
57
7f266840
DJ		 58#define elf_info_to_howto 0
59#define elf_info_to_howto_rel elf32_arm_info_to_howto
60
61#define ARM_ELF_ABI_VERSION 0
62#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
63
24718e3b 64static struct elf_backend_data elf32_arm_vxworks_bed;
00a97672 65
3e6b1042
DJ		 66static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
67 struct bfd_link_info *link_info,
68 asection *sec,
69 bfd_byte *contents);
70
7f266840
DJ		 71/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
72 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
73 in that slot. */
74
c19d1205 75static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840 76{
8029a119 77 /* No relocation. */
7f266840
DJ		 78 HOWTO (R_ARM_NONE, /* type */
79 0, /* rightshift */
80 0, /* size (0 = byte, 1 = short, 2 = long) */
81 0, /* bitsize */
82 FALSE, /* pc_relative */
83 0, /* bitpos */
84 complain_overflow_dont,/* complain_on_overflow */
85 bfd_elf_generic_reloc, /* special_function */
86 "R_ARM_NONE", /* name */
87 FALSE, /* partial_inplace */
88 0, /* src_mask */
89 0, /* dst_mask */
90 FALSE), /* pcrel_offset */
91
92 HOWTO (R_ARM_PC24, /* type */
93 2, /* rightshift */
94 2, /* size (0 = byte, 1 = short, 2 = long) */
95 24, /* bitsize */
96 TRUE, /* pc_relative */
97 0, /* bitpos */
98 complain_overflow_signed,/* complain_on_overflow */
99 bfd_elf_generic_reloc, /* special_function */
100 "R_ARM_PC24", /* name */
101 FALSE, /* partial_inplace */
102 0x00ffffff, /* src_mask */
103 0x00ffffff, /* dst_mask */
104 TRUE), /* pcrel_offset */
105
106 /* 32 bit absolute */
107 HOWTO (R_ARM_ABS32, /* type */
108 0, /* rightshift */
109 2, /* size (0 = byte, 1 = short, 2 = long) */
110 32, /* bitsize */
111 FALSE, /* pc_relative */
112 0, /* bitpos */
113 complain_overflow_bitfield,/* complain_on_overflow */
114 bfd_elf_generic_reloc, /* special_function */
115 "R_ARM_ABS32", /* name */
116 FALSE, /* partial_inplace */
117 0xffffffff, /* src_mask */
118 0xffffffff, /* dst_mask */
119 FALSE), /* pcrel_offset */
120
121 /* standard 32bit pc-relative reloc */
122 HOWTO (R_ARM_REL32, /* type */
123 0, /* rightshift */
124 2, /* size (0 = byte, 1 = short, 2 = long) */
125 32, /* bitsize */
126 TRUE, /* pc_relative */
127 0, /* bitpos */
128 complain_overflow_bitfield,/* complain_on_overflow */
129 bfd_elf_generic_reloc, /* special_function */
130 "R_ARM_REL32", /* name */
131 FALSE, /* partial_inplace */
132 0xffffffff, /* src_mask */
133 0xffffffff, /* dst_mask */
134 TRUE), /* pcrel_offset */
135
c19d1205 136 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 137 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 138 0, /* rightshift */
139 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 140 32, /* bitsize */
141 TRUE, /* pc_relative */
7f266840 142 0, /* bitpos */
4962c51a 143 complain_overflow_dont,/* complain_on_overflow */
7f266840 144 bfd_elf_generic_reloc, /* special_function */
4962c51a 145 "R_ARM_LDR_PC_G0", /* name */
7f266840 146 FALSE, /* partial_inplace */
4962c51a
MS		 147 0xffffffff, /* src_mask */
148 0xffffffff, /* dst_mask */
149 TRUE), /* pcrel_offset */
7f266840
DJ		 150
151 /* 16 bit absolute */
152 HOWTO (R_ARM_ABS16, /* type */
153 0, /* rightshift */
154 1, /* size (0 = byte, 1 = short, 2 = long) */
155 16, /* bitsize */
156 FALSE, /* pc_relative */
157 0, /* bitpos */
158 complain_overflow_bitfield,/* complain_on_overflow */
159 bfd_elf_generic_reloc, /* special_function */
160 "R_ARM_ABS16", /* name */
161 FALSE, /* partial_inplace */
162 0x0000ffff, /* src_mask */
163 0x0000ffff, /* dst_mask */
164 FALSE), /* pcrel_offset */
165
166 /* 12 bit absolute */
167 HOWTO (R_ARM_ABS12, /* type */
168 0, /* rightshift */
169 2, /* size (0 = byte, 1 = short, 2 = long) */
170 12, /* bitsize */
171 FALSE, /* pc_relative */
172 0, /* bitpos */
173 complain_overflow_bitfield,/* complain_on_overflow */
174 bfd_elf_generic_reloc, /* special_function */
175 "R_ARM_ABS12", /* name */
176 FALSE, /* partial_inplace */
00a97672
RS		 177 0x00000fff, /* src_mask */
178 0x00000fff, /* dst_mask */
7f266840
DJ		 179 FALSE), /* pcrel_offset */
180
181 HOWTO (R_ARM_THM_ABS5, /* type */
182 6, /* rightshift */
183 1, /* size (0 = byte, 1 = short, 2 = long) */
184 5, /* bitsize */
185 FALSE, /* pc_relative */
186 0, /* bitpos */
187 complain_overflow_bitfield,/* complain_on_overflow */
188 bfd_elf_generic_reloc, /* special_function */
189 "R_ARM_THM_ABS5", /* name */
190 FALSE, /* partial_inplace */
191 0x000007e0, /* src_mask */
192 0x000007e0, /* dst_mask */
193 FALSE), /* pcrel_offset */
194
195 /* 8 bit absolute */
196 HOWTO (R_ARM_ABS8, /* type */
197 0, /* rightshift */
198 0, /* size (0 = byte, 1 = short, 2 = long) */
199 8, /* bitsize */
200 FALSE, /* pc_relative */
201 0, /* bitpos */
202 complain_overflow_bitfield,/* complain_on_overflow */
203 bfd_elf_generic_reloc, /* special_function */
204 "R_ARM_ABS8", /* name */
205 FALSE, /* partial_inplace */
206 0x000000ff, /* src_mask */
207 0x000000ff, /* dst_mask */
208 FALSE), /* pcrel_offset */
209
210 HOWTO (R_ARM_SBREL32, /* type */
211 0, /* rightshift */
212 2, /* size (0 = byte, 1 = short, 2 = long) */
213 32, /* bitsize */
214 FALSE, /* pc_relative */
215 0, /* bitpos */
216 complain_overflow_dont,/* complain_on_overflow */
217 bfd_elf_generic_reloc, /* special_function */
218 "R_ARM_SBREL32", /* name */
219 FALSE, /* partial_inplace */
220 0xffffffff, /* src_mask */
221 0xffffffff, /* dst_mask */
222 FALSE), /* pcrel_offset */
223
c19d1205 224 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 225 1, /* rightshift */
226 2, /* size (0 = byte, 1 = short, 2 = long) */
e95de063 227 25, /* bitsize */
7f266840
DJ		 228 TRUE, /* pc_relative */
229 0, /* bitpos */
230 complain_overflow_signed,/* complain_on_overflow */
231 bfd_elf_generic_reloc, /* special_function */
c19d1205 232 "R_ARM_THM_CALL", /* name */
7f266840
DJ		 233 FALSE, /* partial_inplace */
234 0x07ff07ff, /* src_mask */
235 0x07ff07ff, /* dst_mask */
236 TRUE), /* pcrel_offset */
237
238 HOWTO (R_ARM_THM_PC8, /* type */
239 1, /* rightshift */
240 1, /* size (0 = byte, 1 = short, 2 = long) */
241 8, /* bitsize */
242 TRUE, /* pc_relative */
243 0, /* bitpos */
244 complain_overflow_signed,/* complain_on_overflow */
245 bfd_elf_generic_reloc, /* special_function */
246 "R_ARM_THM_PC8", /* name */
247 FALSE, /* partial_inplace */
248 0x000000ff, /* src_mask */
249 0x000000ff, /* dst_mask */
250 TRUE), /* pcrel_offset */
251
c19d1205 252 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 253 1, /* rightshift */
254 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 255 32, /* bitsize */
256 FALSE, /* pc_relative */
7f266840
DJ		 257 0, /* bitpos */
258 complain_overflow_signed,/* complain_on_overflow */
259 bfd_elf_generic_reloc, /* special_function */
c19d1205 260 "R_ARM_BREL_ADJ", /* name */
7f266840 261 FALSE, /* partial_inplace */
c19d1205
ZW		 262 0xffffffff, /* src_mask */
263 0xffffffff, /* dst_mask */
264 FALSE), /* pcrel_offset */
7f266840
DJ		 265
266 HOWTO (R_ARM_SWI24, /* type */
267 0, /* rightshift */
268 0, /* size (0 = byte, 1 = short, 2 = long) */
269 0, /* bitsize */
270 FALSE, /* pc_relative */
271 0, /* bitpos */
272 complain_overflow_signed,/* complain_on_overflow */
273 bfd_elf_generic_reloc, /* special_function */
274 "R_ARM_SWI24", /* name */
275 FALSE, /* partial_inplace */
276 0x00000000, /* src_mask */
277 0x00000000, /* dst_mask */
278 FALSE), /* pcrel_offset */
279
280 HOWTO (R_ARM_THM_SWI8, /* type */
281 0, /* rightshift */
282 0, /* size (0 = byte, 1 = short, 2 = long) */
283 0, /* bitsize */
284 FALSE, /* pc_relative */
285 0, /* bitpos */
286 complain_overflow_signed,/* complain_on_overflow */
287 bfd_elf_generic_reloc, /* special_function */
288 "R_ARM_SWI8", /* name */
289 FALSE, /* partial_inplace */
290 0x00000000, /* src_mask */
291 0x00000000, /* dst_mask */
292 FALSE), /* pcrel_offset */
293
294 /* BLX instruction for the ARM. */
295 HOWTO (R_ARM_XPC25, /* type */
296 2, /* rightshift */
297 2, /* size (0 = byte, 1 = short, 2 = long) */
298 25, /* bitsize */
299 TRUE, /* pc_relative */
300 0, /* bitpos */
301 complain_overflow_signed,/* complain_on_overflow */
302 bfd_elf_generic_reloc, /* special_function */
303 "R_ARM_XPC25", /* name */
304 FALSE, /* partial_inplace */
305 0x00ffffff, /* src_mask */
306 0x00ffffff, /* dst_mask */
307 TRUE), /* pcrel_offset */
308
309 /* BLX instruction for the Thumb. */
310 HOWTO (R_ARM_THM_XPC22, /* type */
311 2, /* rightshift */
312 2, /* size (0 = byte, 1 = short, 2 = long) */
313 22, /* bitsize */
314 TRUE, /* pc_relative */
315 0, /* bitpos */
316 complain_overflow_signed,/* complain_on_overflow */
317 bfd_elf_generic_reloc, /* special_function */
318 "R_ARM_THM_XPC22", /* name */
319 FALSE, /* partial_inplace */
320 0x07ff07ff, /* src_mask */
321 0x07ff07ff, /* dst_mask */
322 TRUE), /* pcrel_offset */
323
ba93b8ac 324 /* Dynamic TLS relocations. */
7f266840 325
ba93b8ac
DJ		 326 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
327 0, /* rightshift */
328 2, /* size (0 = byte, 1 = short, 2 = long) */
329 32, /* bitsize */
330 FALSE, /* pc_relative */
331 0, /* bitpos */
332 complain_overflow_bitfield,/* complain_on_overflow */
333 bfd_elf_generic_reloc, /* special_function */
334 "R_ARM_TLS_DTPMOD32", /* name */
335 TRUE, /* partial_inplace */
336 0xffffffff, /* src_mask */
337 0xffffffff, /* dst_mask */
338 FALSE), /* pcrel_offset */
7f266840 339
ba93b8ac
DJ		 340 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
341 0, /* rightshift */
342 2, /* size (0 = byte, 1 = short, 2 = long) */
343 32, /* bitsize */
344 FALSE, /* pc_relative */
345 0, /* bitpos */
346 complain_overflow_bitfield,/* complain_on_overflow */
347 bfd_elf_generic_reloc, /* special_function */
348 "R_ARM_TLS_DTPOFF32", /* name */
349 TRUE, /* partial_inplace */
350 0xffffffff, /* src_mask */
351 0xffffffff, /* dst_mask */
352 FALSE), /* pcrel_offset */
7f266840 353
ba93b8ac
DJ		 354 HOWTO (R_ARM_TLS_TPOFF32, /* type */
355 0, /* rightshift */
356 2, /* size (0 = byte, 1 = short, 2 = long) */
357 32, /* bitsize */
358 FALSE, /* pc_relative */
359 0, /* bitpos */
360 complain_overflow_bitfield,/* complain_on_overflow */
361 bfd_elf_generic_reloc, /* special_function */
362 "R_ARM_TLS_TPOFF32", /* name */
363 TRUE, /* partial_inplace */
364 0xffffffff, /* src_mask */
365 0xffffffff, /* dst_mask */
366 FALSE), /* pcrel_offset */
7f266840
DJ		 367
368 /* Relocs used in ARM Linux */
369
370 HOWTO (R_ARM_COPY, /* type */
371 0, /* rightshift */
372 2, /* size (0 = byte, 1 = short, 2 = long) */
373 32, /* bitsize */
374 FALSE, /* pc_relative */
375 0, /* bitpos */
376 complain_overflow_bitfield,/* complain_on_overflow */
377 bfd_elf_generic_reloc, /* special_function */
378 "R_ARM_COPY", /* name */
379 TRUE, /* partial_inplace */
380 0xffffffff, /* src_mask */
381 0xffffffff, /* dst_mask */
382 FALSE), /* pcrel_offset */
383
384 HOWTO (R_ARM_GLOB_DAT, /* type */
385 0, /* rightshift */
386 2, /* size (0 = byte, 1 = short, 2 = long) */
387 32, /* bitsize */
388 FALSE, /* pc_relative */
389 0, /* bitpos */
390 complain_overflow_bitfield,/* complain_on_overflow */
391 bfd_elf_generic_reloc, /* special_function */
392 "R_ARM_GLOB_DAT", /* name */
393 TRUE, /* partial_inplace */
394 0xffffffff, /* src_mask */
395 0xffffffff, /* dst_mask */
396 FALSE), /* pcrel_offset */
397
398 HOWTO (R_ARM_JUMP_SLOT, /* type */
399 0, /* rightshift */
400 2, /* size (0 = byte, 1 = short, 2 = long) */
401 32, /* bitsize */
402 FALSE, /* pc_relative */
403 0, /* bitpos */
404 complain_overflow_bitfield,/* complain_on_overflow */
405 bfd_elf_generic_reloc, /* special_function */
406 "R_ARM_JUMP_SLOT", /* name */
407 TRUE, /* partial_inplace */
408 0xffffffff, /* src_mask */
409 0xffffffff, /* dst_mask */
410 FALSE), /* pcrel_offset */
411
412 HOWTO (R_ARM_RELATIVE, /* type */
413 0, /* rightshift */
414 2, /* size (0 = byte, 1 = short, 2 = long) */
415 32, /* bitsize */
416 FALSE, /* pc_relative */
417 0, /* bitpos */
418 complain_overflow_bitfield,/* complain_on_overflow */
419 bfd_elf_generic_reloc, /* special_function */
420 "R_ARM_RELATIVE", /* name */
421 TRUE, /* partial_inplace */
422 0xffffffff, /* src_mask */
423 0xffffffff, /* dst_mask */
424 FALSE), /* pcrel_offset */
425
c19d1205 426 HOWTO (R_ARM_GOTOFF32, /* type */
7f266840
DJ		 427 0, /* rightshift */
428 2, /* size (0 = byte, 1 = short, 2 = long) */
429 32, /* bitsize */
430 FALSE, /* pc_relative */
431 0, /* bitpos */
432 complain_overflow_bitfield,/* complain_on_overflow */
433 bfd_elf_generic_reloc, /* special_function */
c19d1205 434 "R_ARM_GOTOFF32", /* name */
7f266840
DJ		 435 TRUE, /* partial_inplace */
436 0xffffffff, /* src_mask */
437 0xffffffff, /* dst_mask */
438 FALSE), /* pcrel_offset */
439
440 HOWTO (R_ARM_GOTPC, /* type */
441 0, /* rightshift */
442 2, /* size (0 = byte, 1 = short, 2 = long) */
443 32, /* bitsize */
444 TRUE, /* pc_relative */
445 0, /* bitpos */
446 complain_overflow_bitfield,/* complain_on_overflow */
447 bfd_elf_generic_reloc, /* special_function */
448 "R_ARM_GOTPC", /* name */
449 TRUE, /* partial_inplace */
450 0xffffffff, /* src_mask */
451 0xffffffff, /* dst_mask */
452 TRUE), /* pcrel_offset */
453
454 HOWTO (R_ARM_GOT32, /* type */
455 0, /* rightshift */
456 2, /* size (0 = byte, 1 = short, 2 = long) */
457 32, /* bitsize */
458 FALSE, /* pc_relative */
459 0, /* bitpos */
460 complain_overflow_bitfield,/* complain_on_overflow */
461 bfd_elf_generic_reloc, /* special_function */
462 "R_ARM_GOT32", /* name */
463 TRUE, /* partial_inplace */
464 0xffffffff, /* src_mask */
465 0xffffffff, /* dst_mask */
466 FALSE), /* pcrel_offset */
467
468 HOWTO (R_ARM_PLT32, /* type */
469 2, /* rightshift */
470 2, /* size (0 = byte, 1 = short, 2 = long) */
ce490eda 471 24, /* bitsize */
7f266840
DJ		 472 TRUE, /* pc_relative */
473 0, /* bitpos */
474 complain_overflow_bitfield,/* complain_on_overflow */
475 bfd_elf_generic_reloc, /* special_function */
476 "R_ARM_PLT32", /* name */
ce490eda 477 FALSE, /* partial_inplace */
7f266840
DJ		 478 0x00ffffff, /* src_mask */
479 0x00ffffff, /* dst_mask */
480 TRUE), /* pcrel_offset */
481
482 HOWTO (R_ARM_CALL, /* type */
483 2, /* rightshift */
484 2, /* size (0 = byte, 1 = short, 2 = long) */
485 24, /* bitsize */
486 TRUE, /* pc_relative */
487 0, /* bitpos */
488 complain_overflow_signed,/* complain_on_overflow */
489 bfd_elf_generic_reloc, /* special_function */
490 "R_ARM_CALL", /* name */
491 FALSE, /* partial_inplace */
492 0x00ffffff, /* src_mask */
493 0x00ffffff, /* dst_mask */
494 TRUE), /* pcrel_offset */
495
496 HOWTO (R_ARM_JUMP24, /* type */
497 2, /* rightshift */
498 2, /* size (0 = byte, 1 = short, 2 = long) */
499 24, /* bitsize */
500 TRUE, /* pc_relative */
501 0, /* bitpos */
502 complain_overflow_signed,/* complain_on_overflow */
503 bfd_elf_generic_reloc, /* special_function */
504 "R_ARM_JUMP24", /* name */
505 FALSE, /* partial_inplace */
506 0x00ffffff, /* src_mask */
507 0x00ffffff, /* dst_mask */
508 TRUE), /* pcrel_offset */
509
c19d1205
ZW		 510 HOWTO (R_ARM_THM_JUMP24, /* type */
511 1, /* rightshift */
512 2, /* size (0 = byte, 1 = short, 2 = long) */
513 24, /* bitsize */
514 TRUE, /* pc_relative */
7f266840 515 0, /* bitpos */
c19d1205 516 complain_overflow_signed,/* complain_on_overflow */
7f266840 517 bfd_elf_generic_reloc, /* special_function */
c19d1205 518 "R_ARM_THM_JUMP24", /* name */
7f266840 519 FALSE, /* partial_inplace */
c19d1205
ZW		 520 0x07ff2fff, /* src_mask */
521 0x07ff2fff, /* dst_mask */
522 TRUE), /* pcrel_offset */
7f266840 523
c19d1205 524 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 525 0, /* rightshift */
c19d1205
ZW		 526 2, /* size (0 = byte, 1 = short, 2 = long) */
527 32, /* bitsize */
7f266840
DJ		 528 FALSE, /* pc_relative */
529 0, /* bitpos */
530 complain_overflow_dont,/* complain_on_overflow */
531 bfd_elf_generic_reloc, /* special_function */
c19d1205 532 "R_ARM_BASE_ABS", /* name */
7f266840 533 FALSE, /* partial_inplace */
c19d1205
ZW		 534 0xffffffff, /* src_mask */
535 0xffffffff, /* dst_mask */
7f266840
DJ		 536 FALSE), /* pcrel_offset */
537
538 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
539 0, /* rightshift */
540 2, /* size (0 = byte, 1 = short, 2 = long) */
541 12, /* bitsize */
542 TRUE, /* pc_relative */
543 0, /* bitpos */
544 complain_overflow_dont,/* complain_on_overflow */
545 bfd_elf_generic_reloc, /* special_function */
546 "R_ARM_ALU_PCREL_7_0", /* name */
547 FALSE, /* partial_inplace */
548 0x00000fff, /* src_mask */
549 0x00000fff, /* dst_mask */
550 TRUE), /* pcrel_offset */
551
552 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
553 0, /* rightshift */
554 2, /* size (0 = byte, 1 = short, 2 = long) */
555 12, /* bitsize */
556 TRUE, /* pc_relative */
557 8, /* bitpos */
558 complain_overflow_dont,/* complain_on_overflow */
559 bfd_elf_generic_reloc, /* special_function */
560 "R_ARM_ALU_PCREL_15_8",/* name */
561 FALSE, /* partial_inplace */
562 0x00000fff, /* src_mask */
563 0x00000fff, /* dst_mask */
564 TRUE), /* pcrel_offset */
565
566 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
567 0, /* rightshift */
568 2, /* size (0 = byte, 1 = short, 2 = long) */
569 12, /* bitsize */
570 TRUE, /* pc_relative */
571 16, /* bitpos */
572 complain_overflow_dont,/* complain_on_overflow */
573 bfd_elf_generic_reloc, /* special_function */
574 "R_ARM_ALU_PCREL_23_15",/* name */
575 FALSE, /* partial_inplace */
576 0x00000fff, /* src_mask */
577 0x00000fff, /* dst_mask */
578 TRUE), /* pcrel_offset */
579
580 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
581 0, /* rightshift */
582 2, /* size (0 = byte, 1 = short, 2 = long) */
583 12, /* bitsize */
584 FALSE, /* pc_relative */
585 0, /* bitpos */
586 complain_overflow_dont,/* complain_on_overflow */
587 bfd_elf_generic_reloc, /* special_function */
588 "R_ARM_LDR_SBREL_11_0",/* name */
589 FALSE, /* partial_inplace */
590 0x00000fff, /* src_mask */
591 0x00000fff, /* dst_mask */
592 FALSE), /* pcrel_offset */
593
594 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
595 0, /* rightshift */
596 2, /* size (0 = byte, 1 = short, 2 = long) */
597 8, /* bitsize */
598 FALSE, /* pc_relative */
599 12, /* bitpos */
600 complain_overflow_dont,/* complain_on_overflow */
601 bfd_elf_generic_reloc, /* special_function */
602 "R_ARM_ALU_SBREL_19_12",/* name */
603 FALSE, /* partial_inplace */
604 0x000ff000, /* src_mask */
605 0x000ff000, /* dst_mask */
606 FALSE), /* pcrel_offset */
607
608 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
609 0, /* rightshift */
610 2, /* size (0 = byte, 1 = short, 2 = long) */
611 8, /* bitsize */
612 FALSE, /* pc_relative */
613 20, /* bitpos */
614 complain_overflow_dont,/* complain_on_overflow */
615 bfd_elf_generic_reloc, /* special_function */
616 "R_ARM_ALU_SBREL_27_20",/* name */
617 FALSE, /* partial_inplace */
618 0x0ff00000, /* src_mask */
619 0x0ff00000, /* dst_mask */
620 FALSE), /* pcrel_offset */
621
622 HOWTO (R_ARM_TARGET1, /* type */
623 0, /* rightshift */
624 2, /* size (0 = byte, 1 = short, 2 = long) */
625 32, /* bitsize */
626 FALSE, /* pc_relative */
627 0, /* bitpos */
628 complain_overflow_dont,/* complain_on_overflow */
629 bfd_elf_generic_reloc, /* special_function */
630 "R_ARM_TARGET1", /* name */
631 FALSE, /* partial_inplace */
632 0xffffffff, /* src_mask */
633 0xffffffff, /* dst_mask */
634 FALSE), /* pcrel_offset */
635
636 HOWTO (R_ARM_ROSEGREL32, /* type */
637 0, /* rightshift */
638 2, /* size (0 = byte, 1 = short, 2 = long) */
639 32, /* bitsize */
640 FALSE, /* pc_relative */
641 0, /* bitpos */
642 complain_overflow_dont,/* complain_on_overflow */
643 bfd_elf_generic_reloc, /* special_function */
644 "R_ARM_ROSEGREL32", /* name */
645 FALSE, /* partial_inplace */
646 0xffffffff, /* src_mask */
647 0xffffffff, /* dst_mask */
648 FALSE), /* pcrel_offset */
649
650 HOWTO (R_ARM_V4BX, /* type */
651 0, /* rightshift */
652 2, /* size (0 = byte, 1 = short, 2 = long) */
653 32, /* bitsize */
654 FALSE, /* pc_relative */
655 0, /* bitpos */
656 complain_overflow_dont,/* complain_on_overflow */
657 bfd_elf_generic_reloc, /* special_function */
658 "R_ARM_V4BX", /* name */
659 FALSE, /* partial_inplace */
660 0xffffffff, /* src_mask */
661 0xffffffff, /* dst_mask */
662 FALSE), /* pcrel_offset */
663
664 HOWTO (R_ARM_TARGET2, /* type */
665 0, /* rightshift */
666 2, /* size (0 = byte, 1 = short, 2 = long) */
667 32, /* bitsize */
668 FALSE, /* pc_relative */
669 0, /* bitpos */
670 complain_overflow_signed,/* complain_on_overflow */
671 bfd_elf_generic_reloc, /* special_function */
672 "R_ARM_TARGET2", /* name */
673 FALSE, /* partial_inplace */
674 0xffffffff, /* src_mask */
675 0xffffffff, /* dst_mask */
676 TRUE), /* pcrel_offset */
677
678 HOWTO (R_ARM_PREL31, /* type */
679 0, /* rightshift */
680 2, /* size (0 = byte, 1 = short, 2 = long) */
681 31, /* bitsize */
682 TRUE, /* pc_relative */
683 0, /* bitpos */
684 complain_overflow_signed,/* complain_on_overflow */
685 bfd_elf_generic_reloc, /* special_function */
686 "R_ARM_PREL31", /* name */
687 FALSE, /* partial_inplace */
688 0x7fffffff, /* src_mask */
689 0x7fffffff, /* dst_mask */
690 TRUE), /* pcrel_offset */
c19d1205
ZW		 691
692 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
693 0, /* rightshift */
694 2, /* size (0 = byte, 1 = short, 2 = long) */
695 16, /* bitsize */
696 FALSE, /* pc_relative */
697 0, /* bitpos */
698 complain_overflow_dont,/* complain_on_overflow */
699 bfd_elf_generic_reloc, /* special_function */
700 "R_ARM_MOVW_ABS_NC", /* name */
701 FALSE, /* partial_inplace */
39623e12
PB		 702 0x000f0fff, /* src_mask */
703 0x000f0fff, /* dst_mask */
c19d1205
ZW		 704 FALSE), /* pcrel_offset */
705
706 HOWTO (R_ARM_MOVT_ABS, /* type */
707 0, /* rightshift */
708 2, /* size (0 = byte, 1 = short, 2 = long) */
709 16, /* bitsize */
710 FALSE, /* pc_relative */
711 0, /* bitpos */
712 complain_overflow_bitfield,/* complain_on_overflow */
713 bfd_elf_generic_reloc, /* special_function */
714 "R_ARM_MOVT_ABS", /* name */
715 FALSE, /* partial_inplace */
39623e12
PB		 716 0x000f0fff, /* src_mask */
717 0x000f0fff, /* dst_mask */
c19d1205
ZW		 718 FALSE), /* pcrel_offset */
719
720 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
721 0, /* rightshift */
722 2, /* size (0 = byte, 1 = short, 2 = long) */
723 16, /* bitsize */
724 TRUE, /* pc_relative */
725 0, /* bitpos */
726 complain_overflow_dont,/* complain_on_overflow */
727 bfd_elf_generic_reloc, /* special_function */
728 "R_ARM_MOVW_PREL_NC", /* name */
729 FALSE, /* partial_inplace */
39623e12
PB		 730 0x000f0fff, /* src_mask */
731 0x000f0fff, /* dst_mask */
c19d1205
ZW		 732 TRUE), /* pcrel_offset */
733
734 HOWTO (R_ARM_MOVT_PREL, /* type */
735 0, /* rightshift */
736 2, /* size (0 = byte, 1 = short, 2 = long) */
737 16, /* bitsize */
738 TRUE, /* pc_relative */
739 0, /* bitpos */
740 complain_overflow_bitfield,/* complain_on_overflow */
741 bfd_elf_generic_reloc, /* special_function */
742 "R_ARM_MOVT_PREL", /* name */
743 FALSE, /* partial_inplace */
39623e12
PB		 744 0x000f0fff, /* src_mask */
745 0x000f0fff, /* dst_mask */
c19d1205
ZW		 746 TRUE), /* pcrel_offset */
747
748 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
749 0, /* rightshift */
750 2, /* size (0 = byte, 1 = short, 2 = long) */
751 16, /* bitsize */
752 FALSE, /* pc_relative */
753 0, /* bitpos */
754 complain_overflow_dont,/* complain_on_overflow */
755 bfd_elf_generic_reloc, /* special_function */
756 "R_ARM_THM_MOVW_ABS_NC",/* name */
757 FALSE, /* partial_inplace */
758 0x040f70ff, /* src_mask */
759 0x040f70ff, /* dst_mask */
760 FALSE), /* pcrel_offset */
761
762 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
763 0, /* rightshift */
764 2, /* size (0 = byte, 1 = short, 2 = long) */
765 16, /* bitsize */
766 FALSE, /* pc_relative */
767 0, /* bitpos */
768 complain_overflow_bitfield,/* complain_on_overflow */
769 bfd_elf_generic_reloc, /* special_function */
770 "R_ARM_THM_MOVT_ABS", /* name */
771 FALSE, /* partial_inplace */
772 0x040f70ff, /* src_mask */
773 0x040f70ff, /* dst_mask */
774 FALSE), /* pcrel_offset */
775
776 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
777 0, /* rightshift */
778 2, /* size (0 = byte, 1 = short, 2 = long) */
779 16, /* bitsize */
780 TRUE, /* pc_relative */
781 0, /* bitpos */
782 complain_overflow_dont,/* complain_on_overflow */
783 bfd_elf_generic_reloc, /* special_function */
784 "R_ARM_THM_MOVW_PREL_NC",/* name */
785 FALSE, /* partial_inplace */
786 0x040f70ff, /* src_mask */
787 0x040f70ff, /* dst_mask */
788 TRUE), /* pcrel_offset */
789
790 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
791 0, /* rightshift */
792 2, /* size (0 = byte, 1 = short, 2 = long) */
793 16, /* bitsize */
794 TRUE, /* pc_relative */
795 0, /* bitpos */
796 complain_overflow_bitfield,/* complain_on_overflow */
797 bfd_elf_generic_reloc, /* special_function */
798 "R_ARM_THM_MOVT_PREL", /* name */
799 FALSE, /* partial_inplace */
800 0x040f70ff, /* src_mask */
801 0x040f70ff, /* dst_mask */
802 TRUE), /* pcrel_offset */
803
804 HOWTO (R_ARM_THM_JUMP19, /* type */
805 1, /* rightshift */
806 2, /* size (0 = byte, 1 = short, 2 = long) */
807 19, /* bitsize */
808 TRUE, /* pc_relative */
809 0, /* bitpos */
810 complain_overflow_signed,/* complain_on_overflow */
811 bfd_elf_generic_reloc, /* special_function */
812 "R_ARM_THM_JUMP19", /* name */
813 FALSE, /* partial_inplace */
814 0x043f2fff, /* src_mask */
815 0x043f2fff, /* dst_mask */
816 TRUE), /* pcrel_offset */
817
818 HOWTO (R_ARM_THM_JUMP6, /* type */
819 1, /* rightshift */
820 1, /* size (0 = byte, 1 = short, 2 = long) */
821 6, /* bitsize */
822 TRUE, /* pc_relative */
823 0, /* bitpos */
824 complain_overflow_unsigned,/* complain_on_overflow */
825 bfd_elf_generic_reloc, /* special_function */
826 "R_ARM_THM_JUMP6", /* name */
827 FALSE, /* partial_inplace */
828 0x02f8, /* src_mask */
829 0x02f8, /* dst_mask */
830 TRUE), /* pcrel_offset */
831
832 /* These are declared as 13-bit signed relocations because we can
833 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
834 versa. */
835 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
836 0, /* rightshift */
837 2, /* size (0 = byte, 1 = short, 2 = long) */
838 13, /* bitsize */
839 TRUE, /* pc_relative */
840 0, /* bitpos */
2cab6cc3 841 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 842 bfd_elf_generic_reloc, /* special_function */
843 "R_ARM_THM_ALU_PREL_11_0",/* name */
844 FALSE, /* partial_inplace */
2cab6cc3
MS		 845 0xffffffff, /* src_mask */
846 0xffffffff, /* dst_mask */
c19d1205
ZW		 847 TRUE), /* pcrel_offset */
848
849 HOWTO (R_ARM_THM_PC12, /* type */
850 0, /* rightshift */
851 2, /* size (0 = byte, 1 = short, 2 = long) */
852 13, /* bitsize */
853 TRUE, /* pc_relative */
854 0, /* bitpos */
2cab6cc3 855 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 856 bfd_elf_generic_reloc, /* special_function */
857 "R_ARM_THM_PC12", /* name */
858 FALSE, /* partial_inplace */
2cab6cc3
MS		 859 0xffffffff, /* src_mask */
860 0xffffffff, /* dst_mask */
c19d1205
ZW		 861 TRUE), /* pcrel_offset */
862
863 HOWTO (R_ARM_ABS32_NOI, /* type */
864 0, /* rightshift */
865 2, /* size (0 = byte, 1 = short, 2 = long) */
866 32, /* bitsize */
867 FALSE, /* pc_relative */
868 0, /* bitpos */
869 complain_overflow_dont,/* complain_on_overflow */
870 bfd_elf_generic_reloc, /* special_function */
871 "R_ARM_ABS32_NOI", /* name */
872 FALSE, /* partial_inplace */
873 0xffffffff, /* src_mask */
874 0xffffffff, /* dst_mask */
875 FALSE), /* pcrel_offset */
876
877 HOWTO (R_ARM_REL32_NOI, /* type */
878 0, /* rightshift */
879 2, /* size (0 = byte, 1 = short, 2 = long) */
880 32, /* bitsize */
881 TRUE, /* pc_relative */
882 0, /* bitpos */
883 complain_overflow_dont,/* complain_on_overflow */
884 bfd_elf_generic_reloc, /* special_function */
885 "R_ARM_REL32_NOI", /* name */
886 FALSE, /* partial_inplace */
887 0xffffffff, /* src_mask */
888 0xffffffff, /* dst_mask */
889 FALSE), /* pcrel_offset */
7f266840 890
4962c51a
MS		 891 /* Group relocations. */
892
893 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
894 0, /* rightshift */
895 2, /* size (0 = byte, 1 = short, 2 = long) */
896 32, /* bitsize */
897 TRUE, /* pc_relative */
898 0, /* bitpos */
899 complain_overflow_dont,/* complain_on_overflow */
900 bfd_elf_generic_reloc, /* special_function */
901 "R_ARM_ALU_PC_G0_NC", /* name */
902 FALSE, /* partial_inplace */
903 0xffffffff, /* src_mask */
904 0xffffffff, /* dst_mask */
905 TRUE), /* pcrel_offset */
906
907 HOWTO (R_ARM_ALU_PC_G0, /* type */
908 0, /* rightshift */
909 2, /* size (0 = byte, 1 = short, 2 = long) */
910 32, /* bitsize */
911 TRUE, /* pc_relative */
912 0, /* bitpos */
913 complain_overflow_dont,/* complain_on_overflow */
914 bfd_elf_generic_reloc, /* special_function */
915 "R_ARM_ALU_PC_G0", /* name */
916 FALSE, /* partial_inplace */
917 0xffffffff, /* src_mask */
918 0xffffffff, /* dst_mask */
919 TRUE), /* pcrel_offset */
920
921 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
922 0, /* rightshift */
923 2, /* size (0 = byte, 1 = short, 2 = long) */
924 32, /* bitsize */
925 TRUE, /* pc_relative */
926 0, /* bitpos */
927 complain_overflow_dont,/* complain_on_overflow */
928 bfd_elf_generic_reloc, /* special_function */
929 "R_ARM_ALU_PC_G1_NC", /* name */
930 FALSE, /* partial_inplace */
931 0xffffffff, /* src_mask */
932 0xffffffff, /* dst_mask */
933 TRUE), /* pcrel_offset */
934
935 HOWTO (R_ARM_ALU_PC_G1, /* type */
936 0, /* rightshift */
937 2, /* size (0 = byte, 1 = short, 2 = long) */
938 32, /* bitsize */
939 TRUE, /* pc_relative */
940 0, /* bitpos */
941 complain_overflow_dont,/* complain_on_overflow */
942 bfd_elf_generic_reloc, /* special_function */
943 "R_ARM_ALU_PC_G1", /* name */
944 FALSE, /* partial_inplace */
945 0xffffffff, /* src_mask */
946 0xffffffff, /* dst_mask */
947 TRUE), /* pcrel_offset */
948
949 HOWTO (R_ARM_ALU_PC_G2, /* type */
950 0, /* rightshift */
951 2, /* size (0 = byte, 1 = short, 2 = long) */
952 32, /* bitsize */
953 TRUE, /* pc_relative */
954 0, /* bitpos */
955 complain_overflow_dont,/* complain_on_overflow */
956 bfd_elf_generic_reloc, /* special_function */
957 "R_ARM_ALU_PC_G2", /* name */
958 FALSE, /* partial_inplace */
959 0xffffffff, /* src_mask */
960 0xffffffff, /* dst_mask */
961 TRUE), /* pcrel_offset */
962
963 HOWTO (R_ARM_LDR_PC_G1, /* type */
964 0, /* rightshift */
965 2, /* size (0 = byte, 1 = short, 2 = long) */
966 32, /* bitsize */
967 TRUE, /* pc_relative */
968 0, /* bitpos */
969 complain_overflow_dont,/* complain_on_overflow */
970 bfd_elf_generic_reloc, /* special_function */
971 "R_ARM_LDR_PC_G1", /* name */
972 FALSE, /* partial_inplace */
973 0xffffffff, /* src_mask */
974 0xffffffff, /* dst_mask */
975 TRUE), /* pcrel_offset */
976
977 HOWTO (R_ARM_LDR_PC_G2, /* type */
978 0, /* rightshift */
979 2, /* size (0 = byte, 1 = short, 2 = long) */
980 32, /* bitsize */
981 TRUE, /* pc_relative */
982 0, /* bitpos */
983 complain_overflow_dont,/* complain_on_overflow */
984 bfd_elf_generic_reloc, /* special_function */
985 "R_ARM_LDR_PC_G2", /* name */
986 FALSE, /* partial_inplace */
987 0xffffffff, /* src_mask */
988 0xffffffff, /* dst_mask */
989 TRUE), /* pcrel_offset */
990
991 HOWTO (R_ARM_LDRS_PC_G0, /* type */
992 0, /* rightshift */
993 2, /* size (0 = byte, 1 = short, 2 = long) */
994 32, /* bitsize */
995 TRUE, /* pc_relative */
996 0, /* bitpos */
997 complain_overflow_dont,/* complain_on_overflow */
998 bfd_elf_generic_reloc, /* special_function */
999 "R_ARM_LDRS_PC_G0", /* name */
1000 FALSE, /* partial_inplace */
1001 0xffffffff, /* src_mask */
1002 0xffffffff, /* dst_mask */
1003 TRUE), /* pcrel_offset */
1004
1005 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1006 0, /* rightshift */
1007 2, /* size (0 = byte, 1 = short, 2 = long) */
1008 32, /* bitsize */
1009 TRUE, /* pc_relative */
1010 0, /* bitpos */
1011 complain_overflow_dont,/* complain_on_overflow */
1012 bfd_elf_generic_reloc, /* special_function */
1013 "R_ARM_LDRS_PC_G1", /* name */
1014 FALSE, /* partial_inplace */
1015 0xffffffff, /* src_mask */
1016 0xffffffff, /* dst_mask */
1017 TRUE), /* pcrel_offset */
1018
1019 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1020 0, /* rightshift */
1021 2, /* size (0 = byte, 1 = short, 2 = long) */
1022 32, /* bitsize */
1023 TRUE, /* pc_relative */
1024 0, /* bitpos */
1025 complain_overflow_dont,/* complain_on_overflow */
1026 bfd_elf_generic_reloc, /* special_function */
1027 "R_ARM_LDRS_PC_G2", /* name */
1028 FALSE, /* partial_inplace */
1029 0xffffffff, /* src_mask */
1030 0xffffffff, /* dst_mask */
1031 TRUE), /* pcrel_offset */
1032
1033 HOWTO (R_ARM_LDC_PC_G0, /* type */
1034 0, /* rightshift */
1035 2, /* size (0 = byte, 1 = short, 2 = long) */
1036 32, /* bitsize */
1037 TRUE, /* pc_relative */
1038 0, /* bitpos */
1039 complain_overflow_dont,/* complain_on_overflow */
1040 bfd_elf_generic_reloc, /* special_function */
1041 "R_ARM_LDC_PC_G0", /* name */
1042 FALSE, /* partial_inplace */
1043 0xffffffff, /* src_mask */
1044 0xffffffff, /* dst_mask */
1045 TRUE), /* pcrel_offset */
1046
1047 HOWTO (R_ARM_LDC_PC_G1, /* type */
1048 0, /* rightshift */
1049 2, /* size (0 = byte, 1 = short, 2 = long) */
1050 32, /* bitsize */
1051 TRUE, /* pc_relative */
1052 0, /* bitpos */
1053 complain_overflow_dont,/* complain_on_overflow */
1054 bfd_elf_generic_reloc, /* special_function */
1055 "R_ARM_LDC_PC_G1", /* name */
1056 FALSE, /* partial_inplace */
1057 0xffffffff, /* src_mask */
1058 0xffffffff, /* dst_mask */
1059 TRUE), /* pcrel_offset */
1060
1061 HOWTO (R_ARM_LDC_PC_G2, /* type */
1062 0, /* rightshift */
1063 2, /* size (0 = byte, 1 = short, 2 = long) */
1064 32, /* bitsize */
1065 TRUE, /* pc_relative */
1066 0, /* bitpos */
1067 complain_overflow_dont,/* complain_on_overflow */
1068 bfd_elf_generic_reloc, /* special_function */
1069 "R_ARM_LDC_PC_G2", /* name */
1070 FALSE, /* partial_inplace */
1071 0xffffffff, /* src_mask */
1072 0xffffffff, /* dst_mask */
1073 TRUE), /* pcrel_offset */
1074
1075 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1076 0, /* rightshift */
1077 2, /* size (0 = byte, 1 = short, 2 = long) */
1078 32, /* bitsize */
1079 TRUE, /* pc_relative */
1080 0, /* bitpos */
1081 complain_overflow_dont,/* complain_on_overflow */
1082 bfd_elf_generic_reloc, /* special_function */
1083 "R_ARM_ALU_SB_G0_NC", /* name */
1084 FALSE, /* partial_inplace */
1085 0xffffffff, /* src_mask */
1086 0xffffffff, /* dst_mask */
1087 TRUE), /* pcrel_offset */
1088
1089 HOWTO (R_ARM_ALU_SB_G0, /* type */
1090 0, /* rightshift */
1091 2, /* size (0 = byte, 1 = short, 2 = long) */
1092 32, /* bitsize */
1093 TRUE, /* pc_relative */
1094 0, /* bitpos */
1095 complain_overflow_dont,/* complain_on_overflow */
1096 bfd_elf_generic_reloc, /* special_function */
1097 "R_ARM_ALU_SB_G0", /* name */
1098 FALSE, /* partial_inplace */
1099 0xffffffff, /* src_mask */
1100 0xffffffff, /* dst_mask */
1101 TRUE), /* pcrel_offset */
1102
1103 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1104 0, /* rightshift */
1105 2, /* size (0 = byte, 1 = short, 2 = long) */
1106 32, /* bitsize */
1107 TRUE, /* pc_relative */
1108 0, /* bitpos */
1109 complain_overflow_dont,/* complain_on_overflow */
1110 bfd_elf_generic_reloc, /* special_function */
1111 "R_ARM_ALU_SB_G1_NC", /* name */
1112 FALSE, /* partial_inplace */
1113 0xffffffff, /* src_mask */
1114 0xffffffff, /* dst_mask */
1115 TRUE), /* pcrel_offset */
1116
1117 HOWTO (R_ARM_ALU_SB_G1, /* type */
1118 0, /* rightshift */
1119 2, /* size (0 = byte, 1 = short, 2 = long) */
1120 32, /* bitsize */
1121 TRUE, /* pc_relative */
1122 0, /* bitpos */
1123 complain_overflow_dont,/* complain_on_overflow */
1124 bfd_elf_generic_reloc, /* special_function */
1125 "R_ARM_ALU_SB_G1", /* name */
1126 FALSE, /* partial_inplace */
1127 0xffffffff, /* src_mask */
1128 0xffffffff, /* dst_mask */
1129 TRUE), /* pcrel_offset */
1130
1131 HOWTO (R_ARM_ALU_SB_G2, /* type */
1132 0, /* rightshift */
1133 2, /* size (0 = byte, 1 = short, 2 = long) */
1134 32, /* bitsize */
1135 TRUE, /* pc_relative */
1136 0, /* bitpos */
1137 complain_overflow_dont,/* complain_on_overflow */
1138 bfd_elf_generic_reloc, /* special_function */
1139 "R_ARM_ALU_SB_G2", /* name */
1140 FALSE, /* partial_inplace */
1141 0xffffffff, /* src_mask */
1142 0xffffffff, /* dst_mask */
1143 TRUE), /* pcrel_offset */
1144
1145 HOWTO (R_ARM_LDR_SB_G0, /* type */
1146 0, /* rightshift */
1147 2, /* size (0 = byte, 1 = short, 2 = long) */
1148 32, /* bitsize */
1149 TRUE, /* pc_relative */
1150 0, /* bitpos */
1151 complain_overflow_dont,/* complain_on_overflow */
1152 bfd_elf_generic_reloc, /* special_function */
1153 "R_ARM_LDR_SB_G0", /* name */
1154 FALSE, /* partial_inplace */
1155 0xffffffff, /* src_mask */
1156 0xffffffff, /* dst_mask */
1157 TRUE), /* pcrel_offset */
1158
1159 HOWTO (R_ARM_LDR_SB_G1, /* type */
1160 0, /* rightshift */
1161 2, /* size (0 = byte, 1 = short, 2 = long) */
1162 32, /* bitsize */
1163 TRUE, /* pc_relative */
1164 0, /* bitpos */
1165 complain_overflow_dont,/* complain_on_overflow */
1166 bfd_elf_generic_reloc, /* special_function */
1167 "R_ARM_LDR_SB_G1", /* name */
1168 FALSE, /* partial_inplace */
1169 0xffffffff, /* src_mask */
1170 0xffffffff, /* dst_mask */
1171 TRUE), /* pcrel_offset */
1172
1173 HOWTO (R_ARM_LDR_SB_G2, /* type */
1174 0, /* rightshift */
1175 2, /* size (0 = byte, 1 = short, 2 = long) */
1176 32, /* bitsize */
1177 TRUE, /* pc_relative */
1178 0, /* bitpos */
1179 complain_overflow_dont,/* complain_on_overflow */
1180 bfd_elf_generic_reloc, /* special_function */
1181 "R_ARM_LDR_SB_G2", /* name */
1182 FALSE, /* partial_inplace */
1183 0xffffffff, /* src_mask */
1184 0xffffffff, /* dst_mask */
1185 TRUE), /* pcrel_offset */
1186
1187 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1188 0, /* rightshift */
1189 2, /* size (0 = byte, 1 = short, 2 = long) */
1190 32, /* bitsize */
1191 TRUE, /* pc_relative */
1192 0, /* bitpos */
1193 complain_overflow_dont,/* complain_on_overflow */
1194 bfd_elf_generic_reloc, /* special_function */
1195 "R_ARM_LDRS_SB_G0", /* name */
1196 FALSE, /* partial_inplace */
1197 0xffffffff, /* src_mask */
1198 0xffffffff, /* dst_mask */
1199 TRUE), /* pcrel_offset */
1200
1201 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1202 0, /* rightshift */
1203 2, /* size (0 = byte, 1 = short, 2 = long) */
1204 32, /* bitsize */
1205 TRUE, /* pc_relative */
1206 0, /* bitpos */
1207 complain_overflow_dont,/* complain_on_overflow */
1208 bfd_elf_generic_reloc, /* special_function */
1209 "R_ARM_LDRS_SB_G1", /* name */
1210 FALSE, /* partial_inplace */
1211 0xffffffff, /* src_mask */
1212 0xffffffff, /* dst_mask */
1213 TRUE), /* pcrel_offset */
1214
1215 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1216 0, /* rightshift */
1217 2, /* size (0 = byte, 1 = short, 2 = long) */
1218 32, /* bitsize */
1219 TRUE, /* pc_relative */
1220 0, /* bitpos */
1221 complain_overflow_dont,/* complain_on_overflow */
1222 bfd_elf_generic_reloc, /* special_function */
1223 "R_ARM_LDRS_SB_G2", /* name */
1224 FALSE, /* partial_inplace */
1225 0xffffffff, /* src_mask */
1226 0xffffffff, /* dst_mask */
1227 TRUE), /* pcrel_offset */
1228
1229 HOWTO (R_ARM_LDC_SB_G0, /* type */
1230 0, /* rightshift */
1231 2, /* size (0 = byte, 1 = short, 2 = long) */
1232 32, /* bitsize */
1233 TRUE, /* pc_relative */
1234 0, /* bitpos */
1235 complain_overflow_dont,/* complain_on_overflow */
1236 bfd_elf_generic_reloc, /* special_function */
1237 "R_ARM_LDC_SB_G0", /* name */
1238 FALSE, /* partial_inplace */
1239 0xffffffff, /* src_mask */
1240 0xffffffff, /* dst_mask */
1241 TRUE), /* pcrel_offset */
1242
1243 HOWTO (R_ARM_LDC_SB_G1, /* type */
1244 0, /* rightshift */
1245 2, /* size (0 = byte, 1 = short, 2 = long) */
1246 32, /* bitsize */
1247 TRUE, /* pc_relative */
1248 0, /* bitpos */
1249 complain_overflow_dont,/* complain_on_overflow */
1250 bfd_elf_generic_reloc, /* special_function */
1251 "R_ARM_LDC_SB_G1", /* name */
1252 FALSE, /* partial_inplace */
1253 0xffffffff, /* src_mask */
1254 0xffffffff, /* dst_mask */
1255 TRUE), /* pcrel_offset */
1256
1257 HOWTO (R_ARM_LDC_SB_G2, /* type */
1258 0, /* rightshift */
1259 2, /* size (0 = byte, 1 = short, 2 = long) */
1260 32, /* bitsize */
1261 TRUE, /* pc_relative */
1262 0, /* bitpos */
1263 complain_overflow_dont,/* complain_on_overflow */
1264 bfd_elf_generic_reloc, /* special_function */
1265 "R_ARM_LDC_SB_G2", /* name */
1266 FALSE, /* partial_inplace */
1267 0xffffffff, /* src_mask */
1268 0xffffffff, /* dst_mask */
1269 TRUE), /* pcrel_offset */
1270
1271 /* End of group relocations. */
c19d1205 1272
c19d1205
ZW		 1273 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1274 0, /* rightshift */
1275 2, /* size (0 = byte, 1 = short, 2 = long) */
1276 16, /* bitsize */
1277 FALSE, /* pc_relative */
1278 0, /* bitpos */
1279 complain_overflow_dont,/* complain_on_overflow */
1280 bfd_elf_generic_reloc, /* special_function */
1281 "R_ARM_MOVW_BREL_NC", /* name */
1282 FALSE, /* partial_inplace */
1283 0x0000ffff, /* src_mask */
1284 0x0000ffff, /* dst_mask */
1285 FALSE), /* pcrel_offset */
1286
1287 HOWTO (R_ARM_MOVT_BREL, /* type */
1288 0, /* rightshift */
1289 2, /* size (0 = byte, 1 = short, 2 = long) */
1290 16, /* bitsize */
1291 FALSE, /* pc_relative */
1292 0, /* bitpos */
1293 complain_overflow_bitfield,/* complain_on_overflow */
1294 bfd_elf_generic_reloc, /* special_function */
1295 "R_ARM_MOVT_BREL", /* name */
1296 FALSE, /* partial_inplace */
1297 0x0000ffff, /* src_mask */
1298 0x0000ffff, /* dst_mask */
1299 FALSE), /* pcrel_offset */
1300
1301 HOWTO (R_ARM_MOVW_BREL, /* type */
1302 0, /* rightshift */
1303 2, /* size (0 = byte, 1 = short, 2 = long) */
1304 16, /* bitsize */
1305 FALSE, /* pc_relative */
1306 0, /* bitpos */
1307 complain_overflow_dont,/* complain_on_overflow */
1308 bfd_elf_generic_reloc, /* special_function */
1309 "R_ARM_MOVW_BREL", /* name */
1310 FALSE, /* partial_inplace */
1311 0x0000ffff, /* src_mask */
1312 0x0000ffff, /* dst_mask */
1313 FALSE), /* pcrel_offset */
1314
1315 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1316 0, /* rightshift */
1317 2, /* size (0 = byte, 1 = short, 2 = long) */
1318 16, /* bitsize */
1319 FALSE, /* pc_relative */
1320 0, /* bitpos */
1321 complain_overflow_dont,/* complain_on_overflow */
1322 bfd_elf_generic_reloc, /* special_function */
1323 "R_ARM_THM_MOVW_BREL_NC",/* name */
1324 FALSE, /* partial_inplace */
1325 0x040f70ff, /* src_mask */
1326 0x040f70ff, /* dst_mask */
1327 FALSE), /* pcrel_offset */
1328
1329 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1330 0, /* rightshift */
1331 2, /* size (0 = byte, 1 = short, 2 = long) */
1332 16, /* bitsize */
1333 FALSE, /* pc_relative */
1334 0, /* bitpos */
1335 complain_overflow_bitfield,/* complain_on_overflow */
1336 bfd_elf_generic_reloc, /* special_function */
1337 "R_ARM_THM_MOVT_BREL", /* name */
1338 FALSE, /* partial_inplace */
1339 0x040f70ff, /* src_mask */
1340 0x040f70ff, /* dst_mask */
1341 FALSE), /* pcrel_offset */
1342
1343 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1344 0, /* rightshift */
1345 2, /* size (0 = byte, 1 = short, 2 = long) */
1346 16, /* bitsize */
1347 FALSE, /* pc_relative */
1348 0, /* bitpos */
1349 complain_overflow_dont,/* complain_on_overflow */
1350 bfd_elf_generic_reloc, /* special_function */
1351 "R_ARM_THM_MOVW_BREL", /* name */
1352 FALSE, /* partial_inplace */
1353 0x040f70ff, /* src_mask */
1354 0x040f70ff, /* dst_mask */
1355 FALSE), /* pcrel_offset */
1356
8029a119 1357 EMPTY_HOWTO (90), /* Unallocated. */
c19d1205
ZW		 1358 EMPTY_HOWTO (91),
1359 EMPTY_HOWTO (92),
1360 EMPTY_HOWTO (93),
1361
1362 HOWTO (R_ARM_PLT32_ABS, /* type */
1363 0, /* rightshift */
1364 2, /* size (0 = byte, 1 = short, 2 = long) */
1365 32, /* bitsize */
1366 FALSE, /* pc_relative */
1367 0, /* bitpos */
1368 complain_overflow_dont,/* complain_on_overflow */
1369 bfd_elf_generic_reloc, /* special_function */
1370 "R_ARM_PLT32_ABS", /* name */
1371 FALSE, /* partial_inplace */
1372 0xffffffff, /* src_mask */
1373 0xffffffff, /* dst_mask */
1374 FALSE), /* pcrel_offset */
1375
1376 HOWTO (R_ARM_GOT_ABS, /* type */
1377 0, /* rightshift */
1378 2, /* size (0 = byte, 1 = short, 2 = long) */
1379 32, /* bitsize */
1380 FALSE, /* pc_relative */
1381 0, /* bitpos */
1382 complain_overflow_dont,/* complain_on_overflow */
1383 bfd_elf_generic_reloc, /* special_function */
1384 "R_ARM_GOT_ABS", /* name */
1385 FALSE, /* partial_inplace */
1386 0xffffffff, /* src_mask */
1387 0xffffffff, /* dst_mask */
1388 FALSE), /* pcrel_offset */
1389
1390 HOWTO (R_ARM_GOT_PREL, /* type */
1391 0, /* rightshift */
1392 2, /* size (0 = byte, 1 = short, 2 = long) */
1393 32, /* bitsize */
1394 TRUE, /* pc_relative */
1395 0, /* bitpos */
1396 complain_overflow_dont, /* complain_on_overflow */
1397 bfd_elf_generic_reloc, /* special_function */
1398 "R_ARM_GOT_PREL", /* name */
1399 FALSE, /* partial_inplace */
1400 0xffffffff, /* src_mask */
1401 0xffffffff, /* dst_mask */
1402 TRUE), /* pcrel_offset */
1403
1404 HOWTO (R_ARM_GOT_BREL12, /* type */
1405 0, /* rightshift */
1406 2, /* size (0 = byte, 1 = short, 2 = long) */
1407 12, /* bitsize */
1408 FALSE, /* pc_relative */
1409 0, /* bitpos */
1410 complain_overflow_bitfield,/* complain_on_overflow */
1411 bfd_elf_generic_reloc, /* special_function */
1412 "R_ARM_GOT_BREL12", /* name */
1413 FALSE, /* partial_inplace */
1414 0x00000fff, /* src_mask */
1415 0x00000fff, /* dst_mask */
1416 FALSE), /* pcrel_offset */
1417
1418 HOWTO (R_ARM_GOTOFF12, /* type */
1419 0, /* rightshift */
1420 2, /* size (0 = byte, 1 = short, 2 = long) */
1421 12, /* bitsize */
1422 FALSE, /* pc_relative */
1423 0, /* bitpos */
1424 complain_overflow_bitfield,/* complain_on_overflow */
1425 bfd_elf_generic_reloc, /* special_function */
1426 "R_ARM_GOTOFF12", /* name */
1427 FALSE, /* partial_inplace */
1428 0x00000fff, /* src_mask */
1429 0x00000fff, /* dst_mask */
1430 FALSE), /* pcrel_offset */
1431
1432 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1433
1434 /* GNU extension to record C++ vtable member usage */
1435 HOWTO (R_ARM_GNU_VTENTRY, /* type */
ba93b8ac
DJ		 1436 0, /* rightshift */
1437 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1438 0, /* bitsize */
ba93b8ac
DJ		 1439 FALSE, /* pc_relative */
1440 0, /* bitpos */
c19d1205
ZW		 1441 complain_overflow_dont, /* complain_on_overflow */
1442 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1443 "R_ARM_GNU_VTENTRY", /* name */
1444 FALSE, /* partial_inplace */
1445 0, /* src_mask */
1446 0, /* dst_mask */
1447 FALSE), /* pcrel_offset */
1448
1449 /* GNU extension to record C++ vtable hierarchy */
1450 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1451 0, /* rightshift */
1452 2, /* size (0 = byte, 1 = short, 2 = long) */
1453 0, /* bitsize */
1454 FALSE, /* pc_relative */
1455 0, /* bitpos */
1456 complain_overflow_dont, /* complain_on_overflow */
1457 NULL, /* special_function */
1458 "R_ARM_GNU_VTINHERIT", /* name */
1459 FALSE, /* partial_inplace */
1460 0, /* src_mask */
1461 0, /* dst_mask */
1462 FALSE), /* pcrel_offset */
1463
1464 HOWTO (R_ARM_THM_JUMP11, /* type */
1465 1, /* rightshift */
1466 1, /* size (0 = byte, 1 = short, 2 = long) */
1467 11, /* bitsize */
1468 TRUE, /* pc_relative */
1469 0, /* bitpos */
1470 complain_overflow_signed, /* complain_on_overflow */
1471 bfd_elf_generic_reloc, /* special_function */
1472 "R_ARM_THM_JUMP11", /* name */
1473 FALSE, /* partial_inplace */
1474 0x000007ff, /* src_mask */
1475 0x000007ff, /* dst_mask */
1476 TRUE), /* pcrel_offset */
1477
1478 HOWTO (R_ARM_THM_JUMP8, /* type */
1479 1, /* rightshift */
1480 1, /* size (0 = byte, 1 = short, 2 = long) */
1481 8, /* bitsize */
1482 TRUE, /* pc_relative */
1483 0, /* bitpos */
1484 complain_overflow_signed, /* complain_on_overflow */
1485 bfd_elf_generic_reloc, /* special_function */
1486 "R_ARM_THM_JUMP8", /* name */
1487 FALSE, /* partial_inplace */
1488 0x000000ff, /* src_mask */
1489 0x000000ff, /* dst_mask */
1490 TRUE), /* pcrel_offset */
ba93b8ac 1491
c19d1205
ZW		 1492 /* TLS relocations */
1493 HOWTO (R_ARM_TLS_GD32, /* type */
ba93b8ac
DJ		 1494 0, /* rightshift */
1495 2, /* size (0 = byte, 1 = short, 2 = long) */
1496 32, /* bitsize */
1497 FALSE, /* pc_relative */
1498 0, /* bitpos */
1499 complain_overflow_bitfield,/* complain_on_overflow */
c19d1205
ZW		 1500 NULL, /* special_function */
1501 "R_ARM_TLS_GD32", /* name */
ba93b8ac
DJ		 1502 TRUE, /* partial_inplace */
1503 0xffffffff, /* src_mask */
1504 0xffffffff, /* dst_mask */
c19d1205 1505 FALSE), /* pcrel_offset */
ba93b8ac 1506
ba93b8ac
DJ		 1507 HOWTO (R_ARM_TLS_LDM32, /* type */
1508 0, /* rightshift */
1509 2, /* size (0 = byte, 1 = short, 2 = long) */
1510 32, /* bitsize */
1511 FALSE, /* pc_relative */
1512 0, /* bitpos */
1513 complain_overflow_bitfield,/* complain_on_overflow */
1514 bfd_elf_generic_reloc, /* special_function */
1515 "R_ARM_TLS_LDM32", /* name */
1516 TRUE, /* partial_inplace */
1517 0xffffffff, /* src_mask */
1518 0xffffffff, /* dst_mask */
c19d1205 1519 FALSE), /* pcrel_offset */
ba93b8ac 1520
c19d1205 1521 HOWTO (R_ARM_TLS_LDO32, /* type */
ba93b8ac
DJ		 1522 0, /* rightshift */
1523 2, /* size (0 = byte, 1 = short, 2 = long) */
1524 32, /* bitsize */
1525 FALSE, /* pc_relative */
1526 0, /* bitpos */
1527 complain_overflow_bitfield,/* complain_on_overflow */
1528 bfd_elf_generic_reloc, /* special_function */
c19d1205 1529 "R_ARM_TLS_LDO32", /* name */
ba93b8ac
DJ		 1530 TRUE, /* partial_inplace */
1531 0xffffffff, /* src_mask */
1532 0xffffffff, /* dst_mask */
c19d1205 1533 FALSE), /* pcrel_offset */
ba93b8ac 1534
ba93b8ac
DJ		 1535 HOWTO (R_ARM_TLS_IE32, /* type */
1536 0, /* rightshift */
1537 2, /* size (0 = byte, 1 = short, 2 = long) */
1538 32, /* bitsize */
1539 FALSE, /* pc_relative */
1540 0, /* bitpos */
1541 complain_overflow_bitfield,/* complain_on_overflow */
1542 NULL, /* special_function */
1543 "R_ARM_TLS_IE32", /* name */
1544 TRUE, /* partial_inplace */
1545 0xffffffff, /* src_mask */
1546 0xffffffff, /* dst_mask */
c19d1205 1547 FALSE), /* pcrel_offset */
7f266840 1548
c19d1205 1549 HOWTO (R_ARM_TLS_LE32, /* type */
7f266840
DJ		 1550 0, /* rightshift */
1551 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1552 32, /* bitsize */
7f266840
DJ		 1553 FALSE, /* pc_relative */
1554 0, /* bitpos */
c19d1205
ZW		 1555 complain_overflow_bitfield,/* complain_on_overflow */
1556 bfd_elf_generic_reloc, /* special_function */
1557 "R_ARM_TLS_LE32", /* name */
1558 TRUE, /* partial_inplace */
1559 0xffffffff, /* src_mask */
1560 0xffffffff, /* dst_mask */
1561 FALSE), /* pcrel_offset */
7f266840 1562
c19d1205
ZW		 1563 HOWTO (R_ARM_TLS_LDO12, /* type */
1564 0, /* rightshift */
1565 2, /* size (0 = byte, 1 = short, 2 = long) */
1566 12, /* bitsize */
1567 FALSE, /* pc_relative */
7f266840 1568 0, /* bitpos */
c19d1205 1569 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1570 bfd_elf_generic_reloc, /* special_function */
c19d1205 1571 "R_ARM_TLS_LDO12", /* name */
7f266840 1572 FALSE, /* partial_inplace */
c19d1205
ZW		 1573 0x00000fff, /* src_mask */
1574 0x00000fff, /* dst_mask */
1575 FALSE), /* pcrel_offset */
7f266840 1576
c19d1205
ZW		 1577 HOWTO (R_ARM_TLS_LE12, /* type */
1578 0, /* rightshift */
1579 2, /* size (0 = byte, 1 = short, 2 = long) */
1580 12, /* bitsize */
1581 FALSE, /* pc_relative */
7f266840 1582 0, /* bitpos */
c19d1205 1583 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1584 bfd_elf_generic_reloc, /* special_function */
c19d1205 1585 "R_ARM_TLS_LE12", /* name */
7f266840 1586 FALSE, /* partial_inplace */
c19d1205
ZW		 1587 0x00000fff, /* src_mask */
1588 0x00000fff, /* dst_mask */
1589 FALSE), /* pcrel_offset */
7f266840 1590
c19d1205 1591 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1592 0, /* rightshift */
1593 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1594 12, /* bitsize */
1595 FALSE, /* pc_relative */
7f266840 1596 0, /* bitpos */
c19d1205 1597 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1598 bfd_elf_generic_reloc, /* special_function */
c19d1205 1599 "R_ARM_TLS_IE12GP", /* name */
7f266840 1600 FALSE, /* partial_inplace */
c19d1205
ZW		 1601 0x00000fff, /* src_mask */
1602 0x00000fff, /* dst_mask */
1603 FALSE), /* pcrel_offset */
1604};
1605
1606/* 112-127 private relocations
1607 128 R_ARM_ME_TOO, obsolete
1608 129-255 unallocated in AAELF.
7f266840 1609
c19d1205
ZW		 1610 249-255 extended, currently unused, relocations: */
1611
4962c51a 1612static reloc_howto_type elf32_arm_howto_table_2[4] =
7f266840
DJ		 1613{
1614 HOWTO (R_ARM_RREL32, /* type */
1615 0, /* rightshift */
1616 0, /* size (0 = byte, 1 = short, 2 = long) */
1617 0, /* bitsize */
1618 FALSE, /* pc_relative */
1619 0, /* bitpos */
1620 complain_overflow_dont,/* complain_on_overflow */
1621 bfd_elf_generic_reloc, /* special_function */
1622 "R_ARM_RREL32", /* name */
1623 FALSE, /* partial_inplace */
1624 0, /* src_mask */
1625 0, /* dst_mask */
1626 FALSE), /* pcrel_offset */
1627
1628 HOWTO (R_ARM_RABS32, /* type */
1629 0, /* rightshift */
1630 0, /* size (0 = byte, 1 = short, 2 = long) */
1631 0, /* bitsize */
1632 FALSE, /* pc_relative */
1633 0, /* bitpos */
1634 complain_overflow_dont,/* complain_on_overflow */
1635 bfd_elf_generic_reloc, /* special_function */
1636 "R_ARM_RABS32", /* name */
1637 FALSE, /* partial_inplace */
1638 0, /* src_mask */
1639 0, /* dst_mask */
1640 FALSE), /* pcrel_offset */
1641
1642 HOWTO (R_ARM_RPC24, /* type */
1643 0, /* rightshift */
1644 0, /* size (0 = byte, 1 = short, 2 = long) */
1645 0, /* bitsize */
1646 FALSE, /* pc_relative */
1647 0, /* bitpos */
1648 complain_overflow_dont,/* complain_on_overflow */
1649 bfd_elf_generic_reloc, /* special_function */
1650 "R_ARM_RPC24", /* name */
1651 FALSE, /* partial_inplace */
1652 0, /* src_mask */
1653 0, /* dst_mask */
1654 FALSE), /* pcrel_offset */
1655
1656 HOWTO (R_ARM_RBASE, /* type */
1657 0, /* rightshift */
1658 0, /* size (0 = byte, 1 = short, 2 = long) */
1659 0, /* bitsize */
1660 FALSE, /* pc_relative */
1661 0, /* bitpos */
1662 complain_overflow_dont,/* complain_on_overflow */
1663 bfd_elf_generic_reloc, /* special_function */
1664 "R_ARM_RBASE", /* name */
1665 FALSE, /* partial_inplace */
1666 0, /* src_mask */
1667 0, /* dst_mask */
1668 FALSE) /* pcrel_offset */
1669};
1670
1671static reloc_howto_type *
1672elf32_arm_howto_from_type (unsigned int r_type)
1673{
906e58ca 1674 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
c19d1205 1675 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1676
c19d1205 1677 if (r_type >= R_ARM_RREL32
906e58ca 1678 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_2))
4962c51a 1679 return &elf32_arm_howto_table_2[r_type - R_ARM_RREL32];
7f266840 1680
c19d1205 1681 return NULL;
7f266840
DJ		 1682}
1683
1684static void
1685elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1686 Elf_Internal_Rela * elf_reloc)
1687{
1688 unsigned int r_type;
1689
1690 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1691 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1692}
1693
1694struct elf32_arm_reloc_map
1695 {
1696 bfd_reloc_code_real_type bfd_reloc_val;
1697 unsigned char elf_reloc_val;
1698 };
1699
1700/* All entries in this list must also be present in elf32_arm_howto_table. */
1701static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1702 {
1703 {BFD_RELOC_NONE, R_ARM_NONE},
1704 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1705 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1706 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1707 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1708 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1709 {BFD_RELOC_32, R_ARM_ABS32},
1710 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1711 {BFD_RELOC_8, R_ARM_ABS8},
1712 {BFD_RELOC_16, R_ARM_ABS16},
1713 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1714 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1715 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1716 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1717 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1718 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1719 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1720 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1721 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1722 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1723 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1724 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840
DJ		 1725 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1726 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1727 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1728 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1729 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1730 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1731 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1732 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1733 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1734 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1735 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1736 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1737 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1738 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1739 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1740 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1741 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
c19d1205
ZW		 1742 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1743 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1744 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1745 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1746 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1747 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1748 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1749 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1750 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1751 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1752 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1753 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1754 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1755 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1756 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1757 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1758 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1759 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1760 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1761 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1762 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1763 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1764 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1765 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1766 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1767 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1768 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1769 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1770 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1771 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1772 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1773 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1774 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1775 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1776 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1777 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1778 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1779 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1780 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1781 };
1782
1783static reloc_howto_type *
f1c71a59
ZW		 1784elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1785 bfd_reloc_code_real_type code)
7f266840
DJ		 1786{
1787 unsigned int i;
8029a119 1788
906e58ca 1789 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
c19d1205
ZW		 1790 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1791 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1792
c19d1205 1793 return NULL;
7f266840
DJ		 1794}
1795
157090f7
AM		 1796static reloc_howto_type *
1797elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1798 const char *r_name)
1799{
1800 unsigned int i;
1801
906e58ca 1802 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
157090f7
AM		 1803 if (elf32_arm_howto_table_1[i].name != NULL
1804 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1805 return &elf32_arm_howto_table_1[i];
1806
906e58ca 1807 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
157090f7
AM		 1808 if (elf32_arm_howto_table_2[i].name != NULL
1809 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1810 return &elf32_arm_howto_table_2[i];
1811
1812 return NULL;
1813}
1814
906e58ca
NC		 1815/* Support for core dump NOTE sections. */
1816
7f266840 1817static bfd_boolean
f1c71a59 1818elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1819{
1820 int offset;
1821 size_t size;
1822
1823 switch (note->descsz)
1824 {
1825 default:
1826 return FALSE;
1827
8029a119 1828 case 148: /* Linux/ARM 32-bit. */
7f266840
DJ		 1829 /* pr_cursig */
1830 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1831
1832 /* pr_pid */
1833 elf_tdata (abfd)->core_pid = bfd_get_32 (abfd, note->descdata + 24);
1834
1835 /* pr_reg */
1836 offset = 72;
1837 size = 72;
1838
1839 break;
1840 }
1841
1842 /* Make a ".reg/999" section. */
1843 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1844 size, note->descpos + offset);
1845}
1846
1847static bfd_boolean
f1c71a59 1848elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1849{
1850 switch (note->descsz)
1851 {
1852 default:
1853 return FALSE;
1854
8029a119 1855 case 124: /* Linux/ARM elf_prpsinfo. */
7f266840
DJ		 1856 elf_tdata (abfd)->core_program
1857 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1858 elf_tdata (abfd)->core_command
1859 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1860 }
1861
1862 /* Note that for some reason, a spurious space is tacked
1863 onto the end of the args in some (at least one anyway)
1864 implementations, so strip it off if it exists. */
7f266840
DJ		 1865 {
1866 char *command = elf_tdata (abfd)->core_command;
1867 int n = strlen (command);
1868
1869 if (0 < n && command[n - 1] == ' ')
1870 command[n - 1] = '\0';
1871 }
1872
1873 return TRUE;
1874}
1875
1876#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1877#define TARGET_LITTLE_NAME "elf32-littlearm"
1878#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1879#define TARGET_BIG_NAME "elf32-bigarm"
1880
1881#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1882#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1883
252b5132
RH		 1884typedef unsigned long int insn32;
1885typedef unsigned short int insn16;
1886
3a4a14e9
PB		 1887/* In lieu of proper flags, assume all EABIv4 or later objects are
1888 interworkable. */
57e8b36a 1889#define INTERWORK_FLAG(abfd) \
3a4a14e9 1890 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
3e6b1042
DJ		 1891 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
1892 || ((abfd)->flags & BFD_LINKER_CREATED))
9b485d32 1893
252b5132
RH		 1894/* The linker script knows the section names for placement.
1895 The entry_names are used to do simple name mangling on the stubs.
1896 Given a function name, and its type, the stub can be found. The
9b485d32 1897 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 1898#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
1899#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
1900
1901#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
1902#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
1903
c7b8f16e
JB		 1904#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
1905#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
1906
845b51d6
PB		 1907#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
1908#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
1909
7413f23f
DJ		 1910#define STUB_ENTRY_NAME "__%s_veneer"
1911
252b5132
RH		 1912/* The name of the dynamic interpreter. This is put in the .interp
1913 section. */
1914#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
1915
5e681ec4
PB		 1916#ifdef FOUR_WORD_PLT
1917
252b5132
RH		 1918/* The first entry in a procedure linkage table looks like
1919 this. It is set up so that any shared library function that is
59f2c4e7 1920 called before the relocation has been set up calls the dynamic
9b485d32 1921 linker first. */
e5a52504 1922static const bfd_vma elf32_arm_plt0_entry [] =
5e681ec4
PB		 1923 {
1924 0xe52de004, /* str lr, [sp, #-4]! */
1925 0xe59fe010, /* ldr lr, [pc, #16] */
1926 0xe08fe00e, /* add lr, pc, lr */
1927 0xe5bef008, /* ldr pc, [lr, #8]! */
1928 };
1929
1930/* Subsequent entries in a procedure linkage table look like
1931 this. */
e5a52504 1932static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1933 {
1934 0xe28fc600, /* add ip, pc, #NN */
1935 0xe28cca00, /* add ip, ip, #NN */
1936 0xe5bcf000, /* ldr pc, [ip, #NN]! */
1937 0x00000000, /* unused */
1938 };
1939
1940#else
1941
5e681ec4
PB		 1942/* The first entry in a procedure linkage table looks like
1943 this. It is set up so that any shared library function that is
1944 called before the relocation has been set up calls the dynamic
1945 linker first. */
e5a52504 1946static const bfd_vma elf32_arm_plt0_entry [] =
917583ad 1947 {
5e681ec4
PB		 1948 0xe52de004, /* str lr, [sp, #-4]! */
1949 0xe59fe004, /* ldr lr, [pc, #4] */
1950 0xe08fe00e, /* add lr, pc, lr */
1951 0xe5bef008, /* ldr pc, [lr, #8]! */
1952 0x00000000, /* &GOT[0] - . */
917583ad 1953 };
252b5132
RH		 1954
1955/* Subsequent entries in a procedure linkage table look like
1956 this. */
e5a52504 1957static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1958 {
1959 0xe28fc600, /* add ip, pc, #0xNN00000 */
1960 0xe28cca00, /* add ip, ip, #0xNN000 */
1961 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
1962 };
1963
1964#endif
252b5132 1965
00a97672
RS		 1966/* The format of the first entry in the procedure linkage table
1967 for a VxWorks executable. */
1968static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
1969 {
1970 0xe52dc008, /* str ip,[sp,#-8]! */
1971 0xe59fc000, /* ldr ip,[pc] */
1972 0xe59cf008, /* ldr pc,[ip,#8] */
1973 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
1974 };
1975
1976/* The format of subsequent entries in a VxWorks executable. */
1977static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
1978 {
1979 0xe59fc000, /* ldr ip,[pc] */
1980 0xe59cf000, /* ldr pc,[ip] */
1981 0x00000000, /* .long @got */
1982 0xe59fc000, /* ldr ip,[pc] */
1983 0xea000000, /* b _PLT */
1984 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1985 };
1986
1987/* The format of entries in a VxWorks shared library. */
1988static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
1989 {
1990 0xe59fc000, /* ldr ip,[pc] */
1991 0xe79cf009, /* ldr pc,[ip,r9] */
1992 0x00000000, /* .long @got */
1993 0xe59fc000, /* ldr ip,[pc] */
1994 0xe599f008, /* ldr pc,[r9,#8] */
1995 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1996 };
1997
b7693d02
DJ		 1998/* An initial stub used if the PLT entry is referenced from Thumb code. */
1999#define PLT_THUMB_STUB_SIZE 4
2000static const bfd_vma elf32_arm_plt_thumb_stub [] =
2001 {
2002 0x4778, /* bx pc */
2003 0x46c0 /* nop */
2004 };
2005
e5a52504
MM		 2006/* The entries in a PLT when using a DLL-based target with multiple
2007 address spaces. */
906e58ca 2008static const bfd_vma elf32_arm_symbian_plt_entry [] =
e5a52504 2009 {
83a358aa 2010 0xe51ff004, /* ldr pc, [pc, #-4] */
e5a52504
MM		 2011 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2012 };
2013
906e58ca
NC		 2014#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2015#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2016#define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2017#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2018#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2019#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2020
461a49ca
DJ		 2021enum stub_insn_type
2022 {
2023 THUMB16_TYPE = 1,
2024 THUMB32_TYPE,
2025 ARM_TYPE,
2026 DATA_TYPE
2027 };
2028
48229727
JB		 2029#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2030/* A bit of a hack. A Thumb conditional branch, in which the proper condition
2031 is inserted in arm_build_one_stub(). */
2032#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2033#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2034#define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2035#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2036#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2037#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
461a49ca
DJ		 2038
2039typedef struct
2040{
2041 bfd_vma data;
2042 enum stub_insn_type type;
ebe24dd4 2043 unsigned int r_type;
461a49ca
DJ		 2044 int reloc_addend;
2045} insn_sequence;
2046
fea2b4d6
CL		 2047/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2048 to reach the stub if necessary. */
461a49ca 2049static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
906e58ca 2050 {
461a49ca
DJ		 2051 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2052 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2053 };
2054
fea2b4d6
CL		 2055/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2056 available. */
461a49ca 2057static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
906e58ca 2058 {
461a49ca
DJ		 2059 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2060 ARM_INSN(0xe12fff1c), /* bx ip */
2061 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2062 };
2063
d3626fb0 2064/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
461a49ca 2065static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
906e58ca 2066 {
461a49ca
DJ		 2067 THUMB16_INSN(0xb401), /* push {r0} */
2068 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2069 THUMB16_INSN(0x4684), /* mov ip, r0 */
2070 THUMB16_INSN(0xbc01), /* pop {r0} */
2071 THUMB16_INSN(0x4760), /* bx ip */
2072 THUMB16_INSN(0xbf00), /* nop */
2073 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2074 };
2075
d3626fb0
CL		 2076/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2077 allowed. */
2078static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2079 {
2080 THUMB16_INSN(0x4778), /* bx pc */
2081 THUMB16_INSN(0x46c0), /* nop */
2082 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2083 ARM_INSN(0xe12fff1c), /* bx ip */
2084 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2085 };
2086
fea2b4d6
CL		 2087/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2088 available. */
461a49ca 2089static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
906e58ca 2090 {
461a49ca
DJ		 2091 THUMB16_INSN(0x4778), /* bx pc */
2092 THUMB16_INSN(0x46c0), /* nop */
2093 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2094 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2095 };
2096
fea2b4d6
CL		 2097/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2098 one, when the destination is close enough. */
461a49ca 2099static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
c820be07 2100 {
461a49ca
DJ		 2101 THUMB16_INSN(0x4778), /* bx pc */
2102 THUMB16_INSN(0x46c0), /* nop */
2103 ARM_REL_INSN(0xea000000, -8), /* b (X-8) */
c820be07
NC		 2104 };
2105
cf3eccff 2106/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
fea2b4d6 2107 blx to reach the stub if necessary. */
cf3eccff 2108static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
906e58ca 2109 {
461a49ca
DJ		 2110 ARM_INSN(0xe59fc000), /* ldr r12, [pc] */
2111 ARM_INSN(0xe08ff00c), /* add pc, pc, ip */
2112 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
906e58ca
NC		 2113 };
2114
cf3eccff
DJ		 2115/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2116 blx to reach the stub if necessary. We can not add into pc;
2117 it is not guaranteed to mode switch (different in ARMv6 and
2118 ARMv7). */
2119static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2120 {
2121 ARM_INSN(0xe59fc004), /* ldr r12, [pc, #4] */
2122 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2123 ARM_INSN(0xe12fff1c), /* bx ip */
2124 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2125 };
2126
ebe24dd4
CL		 2127/* V4T ARM -> ARM long branch stub, PIC. */
2128static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2129 {
2130 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2131 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2132 ARM_INSN(0xe12fff1c), /* bx ip */
2133 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2134 };
2135
2136/* V4T Thumb -> ARM long branch stub, PIC. */
2137static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2138 {
2139 THUMB16_INSN(0x4778), /* bx pc */
2140 THUMB16_INSN(0x46c0), /* nop */
2141 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2142 ARM_INSN(0xe08cf00f), /* add pc, ip, pc */
2143 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2144 };
2145
d3626fb0
CL		 2146/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2147 architectures. */
ebe24dd4
CL		 2148static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2149 {
2150 THUMB16_INSN(0xb401), /* push {r0} */
2151 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2152 THUMB16_INSN(0x46fc), /* mov ip, pc */
2153 THUMB16_INSN(0x4484), /* add ip, r0 */
2154 THUMB16_INSN(0xbc01), /* pop {r0} */
2155 THUMB16_INSN(0x4760), /* bx ip */
2156 DATA_WORD(0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2157 };
2158
d3626fb0
CL		 2159/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2160 allowed. */
2161static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2162 {
2163 THUMB16_INSN(0x4778), /* bx pc */
2164 THUMB16_INSN(0x46c0), /* nop */
2165 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2166 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2167 ARM_INSN(0xe12fff1c), /* bx ip */
2168 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2169 };
2170
48229727
JB		 2171/* Cortex-A8 erratum-workaround stubs. */
2172
2173/* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2174 can't use a conditional branch to reach this stub). */
2175
2176static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2177 {
2178 THUMB16_BCOND_INSN(0xd001), /* b<cond>.n true. */
2179 THUMB32_B_INSN(0xf000b800, -4), /* b.w insn_after_original_branch. */
2180 THUMB32_B_INSN(0xf000b800, -4) /* true: b.w original_branch_dest. */
2181 };
2182
2183/* Stub used for b.w and bl.w instructions. */
2184
2185static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2186 {
2187 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2188 };
2189
2190static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2191 {
2192 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2193 };
2194
2195/* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2196 instruction (which switches to ARM mode) to point to this stub. Jump to the
2197 real destination using an ARM-mode branch. */
2198
2199static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2200 {
2201 ARM_REL_INSN(0xea000000, -8) /* b original_branch_dest. */
2202 };
2203
906e58ca
NC		 2204/* Section name for stubs is the associated section name plus this
2205 string. */
2206#define STUB_SUFFIX ".stub"
2207
738a79f6
CL		 2208/* One entry per long/short branch stub defined above. */
2209#define DEF_STUBS \
2210 DEF_STUB(long_branch_any_any) \
2211 DEF_STUB(long_branch_v4t_arm_thumb) \
2212 DEF_STUB(long_branch_thumb_only) \
2213 DEF_STUB(long_branch_v4t_thumb_thumb) \
2214 DEF_STUB(long_branch_v4t_thumb_arm) \
2215 DEF_STUB(short_branch_v4t_thumb_arm) \
2216 DEF_STUB(long_branch_any_arm_pic) \
2217 DEF_STUB(long_branch_any_thumb_pic) \
2218 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2219 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2220 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
48229727
JB		 2221 DEF_STUB(long_branch_thumb_only_pic) \
2222 DEF_STUB(a8_veneer_b_cond) \
2223 DEF_STUB(a8_veneer_b) \
2224 DEF_STUB(a8_veneer_bl) \
2225 DEF_STUB(a8_veneer_blx)
738a79f6
CL		 2226
2227#define DEF_STUB(x) arm_stub_##x,
2228enum elf32_arm_stub_type {
906e58ca 2229 arm_stub_none,
738a79f6 2230 DEF_STUBS
eb7c4339
NS		 2231 /* Note the first a8_veneer type */
2232 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
738a79f6
CL		 2233};
2234#undef DEF_STUB
2235
2236typedef struct
2237{
2238 const insn_sequence* template;
2239 int template_size;
2240} stub_def;
2241
2242#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2243static const stub_def stub_definitions[] = {
2244 {NULL, 0},
2245 DEF_STUBS
906e58ca
NC		 2246};
2247
2248struct elf32_arm_stub_hash_entry
2249{
2250 /* Base hash table entry structure. */
2251 struct bfd_hash_entry root;
2252
2253 /* The stub section. */
2254 asection *stub_sec;
2255
2256 /* Offset within stub_sec of the beginning of this stub. */
2257 bfd_vma stub_offset;
2258
2259 /* Given the symbol's value and its section we can determine its final
2260 value when building the stubs (so the stub knows where to jump). */
2261 bfd_vma target_value;
2262 asection *target_section;
2263
48229727
JB		 2264 /* Offset to apply to relocation referencing target_value. */
2265 bfd_vma target_addend;
2266
2267 /* The instruction which caused this stub to be generated (only valid for
2268 Cortex-A8 erratum workaround stubs at present). */
2269 unsigned long orig_insn;
2270
461a49ca 2271 /* The stub type. */
906e58ca 2272 enum elf32_arm_stub_type stub_type;
461a49ca
DJ		 2273 /* Its encoding size in bytes. */
2274 int stub_size;
2275 /* Its template. */
2276 const insn_sequence *stub_template;
2277 /* The size of the template (number of entries). */
2278 int stub_template_size;
906e58ca
NC		 2279
2280 /* The symbol table entry, if any, that this was derived from. */
2281 struct elf32_arm_link_hash_entry *h;
2282
2283 /* Destination symbol type (STT_ARM_TFUNC, ...) */
2284 unsigned char st_type;
2285
2286 /* Where this stub is being called from, or, in the case of combined
2287 stub sections, the first input section in the group. */
2288 asection *id_sec;
7413f23f
DJ		 2289
2290 /* The name for the local symbol at the start of this stub. The
2291 stub name in the hash table has to be unique; this does not, so
2292 it can be friendlier. */
2293 char *output_name;
906e58ca
NC		 2294};
2295
e489d0ae
PB		 2296/* Used to build a map of a section. This is required for mixed-endian
2297 code/data. */
2298
2299typedef struct elf32_elf_section_map
2300{
2301 bfd_vma vma;
2302 char type;
2303}
2304elf32_arm_section_map;
2305
c7b8f16e
JB		 2306/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2307
2308typedef enum
2309{
2310 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2311 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2312 VFP11_ERRATUM_ARM_VENEER,
2313 VFP11_ERRATUM_THUMB_VENEER
2314}
2315elf32_vfp11_erratum_type;
2316
2317typedef struct elf32_vfp11_erratum_list
2318{
2319 struct elf32_vfp11_erratum_list *next;
2320 bfd_vma vma;
2321 union
2322 {
2323 struct
2324 {
2325 struct elf32_vfp11_erratum_list *veneer;
2326 unsigned int vfp_insn;
2327 } b;
2328 struct
2329 {
2330 struct elf32_vfp11_erratum_list *branch;
2331 unsigned int id;
2332 } v;
2333 } u;
2334 elf32_vfp11_erratum_type type;
2335}
2336elf32_vfp11_erratum_list;
2337
2468f9c9
PB		 2338typedef enum
2339{
2340 DELETE_EXIDX_ENTRY,
2341 INSERT_EXIDX_CANTUNWIND_AT_END
2342}
2343arm_unwind_edit_type;
2344
2345/* A (sorted) list of edits to apply to an unwind table. */
2346typedef struct arm_unwind_table_edit
2347{
2348 arm_unwind_edit_type type;
2349 /* Note: we sometimes want to insert an unwind entry corresponding to a
2350 section different from the one we're currently writing out, so record the
2351 (text) section this edit relates to here. */
2352 asection *linked_section;
2353 unsigned int index;
2354 struct arm_unwind_table_edit *next;
2355}
2356arm_unwind_table_edit;
2357
8e3de13a 2358typedef struct _arm_elf_section_data
e489d0ae 2359{
2468f9c9 2360 /* Information about mapping symbols. */
e489d0ae 2361 struct bfd_elf_section_data elf;
8e3de13a 2362 unsigned int mapcount;
c7b8f16e 2363 unsigned int mapsize;
e489d0ae 2364 elf32_arm_section_map *map;
2468f9c9 2365 /* Information about CPU errata. */
c7b8f16e
JB		 2366 unsigned int erratumcount;
2367 elf32_vfp11_erratum_list *erratumlist;
2468f9c9
PB		 2368 /* Information about unwind tables. */
2369 union
2370 {
2371 /* Unwind info attached to a text section. */
2372 struct
2373 {
2374 asection *arm_exidx_sec;
2375 } text;
2376
2377 /* Unwind info attached to an .ARM.exidx section. */
2378 struct
2379 {
2380 arm_unwind_table_edit *unwind_edit_list;
2381 arm_unwind_table_edit *unwind_edit_tail;
2382 } exidx;
2383 } u;
8e3de13a
NC		 2384}
2385_arm_elf_section_data;
e489d0ae
PB		 2386
2387#define elf32_arm_section_data(sec) \
8e3de13a 2388 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2389
48229727
JB		 2390/* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2391 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2392 so may be created multiple times: we use an array of these entries whilst
2393 relaxing which we can refresh easily, then create stubs for each potentially
2394 erratum-triggering instruction once we've settled on a solution. */
2395
2396struct a8_erratum_fix {
2397 bfd *input_bfd;
2398 asection *section;
2399 bfd_vma offset;
2400 bfd_vma addend;
2401 unsigned long orig_insn;
2402 char *stub_name;
2403 enum elf32_arm_stub_type stub_type;
2404};
2405
2406/* A table of relocs applied to branches which might trigger Cortex-A8
2407 erratum. */
2408
2409struct a8_erratum_reloc {
2410 bfd_vma from;
2411 bfd_vma destination;
2412 unsigned int r_type;
2413 unsigned char st_type;
2414 const char *sym_name;
2415 bfd_boolean non_a8_stub;
2416};
2417
ba93b8ac
DJ		 2418/* The size of the thread control block. */
2419#define TCB_SIZE 8
2420
0ffa91dd 2421struct elf_arm_obj_tdata
ba93b8ac
DJ		 2422{
2423 struct elf_obj_tdata root;
2424
2425 /* tls_type for each local got entry. */
2426 char *local_got_tls_type;
ee065d83 2427
bf21ed78
MS		 2428 /* Zero to warn when linking objects with incompatible enum sizes. */
2429 int no_enum_size_warning;
a9dc9481
JM		 2430
2431 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2432 int no_wchar_size_warning;
ba93b8ac
DJ		 2433};
2434
0ffa91dd
NC		 2435#define elf_arm_tdata(bfd) \
2436 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2437
0ffa91dd
NC		 2438#define elf32_arm_local_got_tls_type(bfd) \
2439 (elf_arm_tdata (bfd)->local_got_tls_type)
2440
2441#define is_arm_elf(bfd) \
2442 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2443 && elf_tdata (bfd) != NULL \
2444 && elf_object_id (bfd) == ARM_ELF_TDATA)
ba93b8ac
DJ		 2445
2446static bfd_boolean
2447elf32_arm_mkobject (bfd *abfd)
2448{
0ffa91dd
NC		 2449 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2450 ARM_ELF_TDATA);
ba93b8ac
DJ		 2451}
2452
252b5132
RH		 2453/* The ARM linker needs to keep track of the number of relocs that it
2454 decides to copy in check_relocs for each symbol. This is so that
2455 it can discard PC relative relocs if it doesn't need them when
2456 linking with -Bsymbolic. We store the information in a field
2457 extending the regular ELF linker hash table. */
2458
ba93b8ac
DJ		 2459/* This structure keeps track of the number of relocs we have copied
2460 for a given symbol. */
5e681ec4 2461struct elf32_arm_relocs_copied
917583ad
NC		 2462 {
2463 /* Next section. */
5e681ec4 2464 struct elf32_arm_relocs_copied * next;
917583ad
NC		 2465 /* A section in dynobj. */
2466 asection * section;
2467 /* Number of relocs copied in this section. */
2468 bfd_size_type count;
ba93b8ac
DJ		 2469 /* Number of PC-relative relocs copied in this section. */
2470 bfd_size_type pc_count;
917583ad 2471 };
252b5132 2472
ba93b8ac
DJ		 2473#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2474
ba96a88f 2475/* Arm ELF linker hash entry. */
252b5132 2476struct elf32_arm_link_hash_entry
917583ad
NC		 2477 {
2478 struct elf_link_hash_entry root;
252b5132 2479
917583ad 2480 /* Number of PC relative relocs copied for this symbol. */
5e681ec4 2481 struct elf32_arm_relocs_copied * relocs_copied;
b7693d02
DJ		 2482
2483 /* We reference count Thumb references to a PLT entry separately,
2484 so that we can emit the Thumb trampoline only if needed. */
2485 bfd_signed_vma plt_thumb_refcount;
2486
bd97cb95
DJ		 2487 /* Some references from Thumb code may be eliminated by BL->BLX
2488 conversion, so record them separately. */
2489 bfd_signed_vma plt_maybe_thumb_refcount;
2490
b7693d02
DJ		 2491 /* Since PLT entries have variable size if the Thumb prologue is
2492 used, we need to record the index into .got.plt instead of
2493 recomputing it from the PLT offset. */
2494 bfd_signed_vma plt_got_offset;
ba93b8ac
DJ		 2495
2496#define GOT_UNKNOWN 0
2497#define GOT_NORMAL 1
2498#define GOT_TLS_GD 2
2499#define GOT_TLS_IE 4
2500 unsigned char tls_type;
a4fd1a8e
PB		 2501
2502 /* The symbol marking the real symbol location for exported thumb
2503 symbols with Arm stubs. */
2504 struct elf_link_hash_entry *export_glue;
906e58ca 2505
da5938a2 2506 /* A pointer to the most recently used stub hash entry against this
8029a119 2507 symbol. */
da5938a2 2508 struct elf32_arm_stub_hash_entry *stub_cache;
917583ad 2509 };
252b5132 2510
252b5132 2511/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2512#define elf32_arm_link_hash_traverse(table, func, info) \
2513 (elf_link_hash_traverse \
2514 (&(table)->root, \
b7693d02 2515 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2516 (info)))
2517
2518/* Get the ARM elf linker hash table from a link_info structure. */
2519#define elf32_arm_hash_table(info) \
2520 ((struct elf32_arm_link_hash_table *) ((info)->hash))
2521
906e58ca
NC		 2522#define arm_stub_hash_lookup(table, string, create, copy) \
2523 ((struct elf32_arm_stub_hash_entry *) \
2524 bfd_hash_lookup ((table), (string), (create), (copy)))
2525
9b485d32 2526/* ARM ELF linker hash table. */
252b5132 2527struct elf32_arm_link_hash_table
906e58ca
NC		 2528{
2529 /* The main hash table. */
2530 struct elf_link_hash_table root;
252b5132 2531
906e58ca
NC		 2532 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2533 bfd_size_type thumb_glue_size;
252b5132 2534
906e58ca
NC		 2535 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2536 bfd_size_type arm_glue_size;
252b5132 2537
906e58ca
NC		 2538 /* The size in bytes of section containing the ARMv4 BX veneers. */
2539 bfd_size_type bx_glue_size;
845b51d6 2540
906e58ca
NC		 2541 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2542 veneer has been populated. */
2543 bfd_vma bx_glue_offset[15];
845b51d6 2544
906e58ca
NC		 2545 /* The size in bytes of the section containing glue for VFP11 erratum
2546 veneers. */
2547 bfd_size_type vfp11_erratum_glue_size;
c7b8f16e 2548
48229727
JB		 2549 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2550 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2551 elf32_arm_write_section(). */
2552 struct a8_erratum_fix *a8_erratum_fixes;
2553 unsigned int num_a8_erratum_fixes;
2554
906e58ca
NC		 2555 /* An arbitrary input BFD chosen to hold the glue sections. */
2556 bfd * bfd_of_glue_owner;
ba96a88f 2557
906e58ca
NC		 2558 /* Nonzero to output a BE8 image. */
2559 int byteswap_code;
e489d0ae 2560
906e58ca
NC		 2561 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2562 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2563 int target1_is_rel;
9c504268 2564
906e58ca
NC		 2565 /* The relocation to use for R_ARM_TARGET2 relocations. */
2566 int target2_reloc;
eb043451 2567
906e58ca
NC		 2568 /* 0 = Ignore R_ARM_V4BX.
2569 1 = Convert BX to MOV PC.
2570 2 = Generate v4 interworing stubs. */
2571 int fix_v4bx;
319850b4 2572
48229727
JB		 2573 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2574 int fix_cortex_a8;
2575
906e58ca
NC		 2576 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2577 int use_blx;
33bfe774 2578
906e58ca
NC		 2579 /* What sort of code sequences we should look for which may trigger the
2580 VFP11 denorm erratum. */
2581 bfd_arm_vfp11_fix vfp11_fix;
c7b8f16e 2582
906e58ca
NC		 2583 /* Global counter for the number of fixes we have emitted. */
2584 int num_vfp11_fixes;
c7b8f16e 2585
906e58ca
NC		 2586 /* Nonzero to force PIC branch veneers. */
2587 int pic_veneer;
27e55c4d 2588
906e58ca
NC		 2589 /* The number of bytes in the initial entry in the PLT. */
2590 bfd_size_type plt_header_size;
e5a52504 2591
906e58ca
NC		 2592 /* The number of bytes in the subsequent PLT etries. */
2593 bfd_size_type plt_entry_size;
e5a52504 2594
906e58ca
NC		 2595 /* True if the target system is VxWorks. */
2596 int vxworks_p;
00a97672 2597
906e58ca
NC		 2598 /* True if the target system is Symbian OS. */
2599 int symbian_p;
e5a52504 2600
906e58ca
NC		 2601 /* True if the target uses REL relocations. */
2602 int use_rel;
4e7fd91e 2603
906e58ca
NC		 2604 /* Short-cuts to get to dynamic linker sections. */
2605 asection *sgot;
2606 asection *sgotplt;
2607 asection *srelgot;
2608 asection *splt;
2609 asection *srelplt;
2610 asection *sdynbss;
2611 asection *srelbss;
5e681ec4 2612
906e58ca
NC		 2613 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2614 asection *srelplt2;
00a97672 2615
906e58ca
NC		 2616 /* Data for R_ARM_TLS_LDM32 relocations. */
2617 union
2618 {
2619 bfd_signed_vma refcount;
2620 bfd_vma offset;
2621 } tls_ldm_got;
b7693d02 2622
87d72d41
AM		 2623 /* Small local sym cache. */
2624 struct sym_cache sym_cache;
906e58ca
NC		 2625
2626 /* For convenience in allocate_dynrelocs. */
2627 bfd * obfd;
2628
2629 /* The stub hash table. */
2630 struct bfd_hash_table stub_hash_table;
2631
2632 /* Linker stub bfd. */
2633 bfd *stub_bfd;
2634
2635 /* Linker call-backs. */
2636 asection * (*add_stub_section) (const char *, asection *);
2637 void (*layout_sections_again) (void);
2638
2639 /* Array to keep track of which stub sections have been created, and
2640 information on stub grouping. */
2641 struct map_stub
2642 {
2643 /* This is the section to which stubs in the group will be
2644 attached. */
2645 asection *link_sec;
2646 /* The stub section. */
2647 asection *stub_sec;
2648 } *stub_group;
2649
2650 /* Assorted information used by elf32_arm_size_stubs. */
2651 unsigned int bfd_count;
2652 int top_index;
2653 asection **input_list;
2654};
252b5132 2655
780a67af
NC		 2656/* Create an entry in an ARM ELF linker hash table. */
2657
2658static struct bfd_hash_entry *
57e8b36a
NC		 2659elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
2660 struct bfd_hash_table * table,
2661 const char * string)
780a67af
NC		 2662{
2663 struct elf32_arm_link_hash_entry * ret =
2664 (struct elf32_arm_link_hash_entry *) entry;
2665
2666 /* Allocate the structure if it has not already been allocated by a
2667 subclass. */
906e58ca 2668 if (ret == NULL)
57e8b36a
NC		 2669 ret = bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
2670 if (ret == NULL)
780a67af
NC		 2671 return (struct bfd_hash_entry *) ret;
2672
2673 /* Call the allocation method of the superclass. */
2674 ret = ((struct elf32_arm_link_hash_entry *)
2675 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
2676 table, string));
57e8b36a 2677 if (ret != NULL)
b7693d02
DJ		 2678 {
2679 ret->relocs_copied = NULL;
ba93b8ac 2680 ret->tls_type = GOT_UNKNOWN;
b7693d02 2681 ret->plt_thumb_refcount = 0;
bd97cb95 2682 ret->plt_maybe_thumb_refcount = 0;
b7693d02 2683 ret->plt_got_offset = -1;
a4fd1a8e 2684 ret->export_glue = NULL;
906e58ca
NC		 2685
2686 ret->stub_cache = NULL;
b7693d02 2687 }
780a67af
NC		 2688
2689 return (struct bfd_hash_entry *) ret;
2690}
2691
906e58ca
NC		 2692/* Initialize an entry in the stub hash table. */
2693
2694static struct bfd_hash_entry *
2695stub_hash_newfunc (struct bfd_hash_entry *entry,
2696 struct bfd_hash_table *table,
2697 const char *string)
2698{
2699 /* Allocate the structure if it has not already been allocated by a
2700 subclass. */
2701 if (entry == NULL)
2702 {
2703 entry = bfd_hash_allocate (table,
2704 sizeof (struct elf32_arm_stub_hash_entry));
2705 if (entry == NULL)
2706 return entry;
2707 }
2708
2709 /* Call the allocation method of the superclass. */
2710 entry = bfd_hash_newfunc (entry, table, string);
2711 if (entry != NULL)
2712 {
2713 struct elf32_arm_stub_hash_entry *eh;
2714
2715 /* Initialize the local fields. */
2716 eh = (struct elf32_arm_stub_hash_entry *) entry;
2717 eh->stub_sec = NULL;
2718 eh->stub_offset = 0;
2719 eh->target_value = 0;
2720 eh->target_section = NULL;
cedfb179
DK		 2721 eh->target_addend = 0;
2722 eh->orig_insn = 0;
906e58ca 2723 eh->stub_type = arm_stub_none;
461a49ca
DJ		 2724 eh->stub_size = 0;
2725 eh->stub_template = NULL;
2726 eh->stub_template_size = 0;
906e58ca
NC		 2727 eh->h = NULL;
2728 eh->id_sec = NULL;
d8d2f433 2729 eh->output_name = NULL;
906e58ca
NC		 2730 }
2731
2732 return entry;
2733}
2734
00a97672 2735/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 2736 shortcuts to them in our hash table. */
2737
2738static bfd_boolean
57e8b36a 2739create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2740{
2741 struct elf32_arm_link_hash_table *htab;
2742
e5a52504
MM		 2743 htab = elf32_arm_hash_table (info);
2744 /* BPABI objects never have a GOT, or associated sections. */
2745 if (htab->symbian_p)
2746 return TRUE;
2747
5e681ec4
PB		 2748 if (! _bfd_elf_create_got_section (dynobj, info))
2749 return FALSE;
2750
5e681ec4
PB		 2751 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
2752 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
2753 if (!htab->sgot || !htab->sgotplt)
2754 abort ();
2755
64e77c6d
L		 2756 htab->srelgot = bfd_get_section_by_name (dynobj,
2757 RELOC_SECTION (htab, ".got"));
2758 if (htab->srelgot == NULL)
5e681ec4
PB		 2759 return FALSE;
2760 return TRUE;
2761}
2762
00a97672
RS		 2763/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
2764 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 2765 hash table. */
2766
2767static bfd_boolean
57e8b36a 2768elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2769{
2770 struct elf32_arm_link_hash_table *htab;
2771
2772 htab = elf32_arm_hash_table (info);
2773 if (!htab->sgot && !create_got_section (dynobj, info))
2774 return FALSE;
2775
2776 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
2777 return FALSE;
2778
2779 htab->splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672
RS		 2780 htab->srelplt = bfd_get_section_by_name (dynobj,
2781 RELOC_SECTION (htab, ".plt"));
5e681ec4
PB		 2782 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
2783 if (!info->shared)
00a97672
RS		 2784 htab->srelbss = bfd_get_section_by_name (dynobj,
2785 RELOC_SECTION (htab, ".bss"));
2786
2787 if (htab->vxworks_p)
2788 {
2789 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
2790 return FALSE;
2791
2792 if (info->shared)
2793 {
2794 htab->plt_header_size = 0;
2795 htab->plt_entry_size
2796 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
2797 }
2798 else
2799 {
2800 htab->plt_header_size
2801 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
2802 htab->plt_entry_size
2803 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
2804 }
2805 }
5e681ec4 2806
906e58ca 2807 if (!htab->splt
e5a52504
MM		 2808 || !htab->srelplt
2809 || !htab->sdynbss
5e681ec4
PB		 2810 || (!info->shared && !htab->srelbss))
2811 abort ();
2812
2813 return TRUE;
2814}
2815
906e58ca
NC		 2816/* Copy the extra info we tack onto an elf_link_hash_entry. */
2817
2818static void
2819elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
2820 struct elf_link_hash_entry *dir,
2821 struct elf_link_hash_entry *ind)
2822{
2823 struct elf32_arm_link_hash_entry *edir, *eind;
2824
2825 edir = (struct elf32_arm_link_hash_entry *) dir;
2826 eind = (struct elf32_arm_link_hash_entry *) ind;
2827
2828 if (eind->relocs_copied != NULL)
2829 {
2830 if (edir->relocs_copied != NULL)
2831 {
2832 struct elf32_arm_relocs_copied **pp;
2833 struct elf32_arm_relocs_copied *p;
2834
2835 /* Add reloc counts against the indirect sym to the direct sym
2836 list. Merge any entries against the same section. */
2837 for (pp = &eind->relocs_copied; (p = *pp) != NULL; )
2838 {
2839 struct elf32_arm_relocs_copied *q;
2840
2841 for (q = edir->relocs_copied; q != NULL; q = q->next)
2842 if (q->section == p->section)
2843 {
2844 q->pc_count += p->pc_count;
2845 q->count += p->count;
2846 *pp = p->next;
2847 break;
2848 }
2849 if (q == NULL)
2850 pp = &p->next;
2851 }
2852 *pp = edir->relocs_copied;
2853 }
2854
2855 edir->relocs_copied = eind->relocs_copied;
2856 eind->relocs_copied = NULL;
2857 }
2858
2859 if (ind->root.type == bfd_link_hash_indirect)
2860 {
2861 /* Copy over PLT info. */
2862 edir->plt_thumb_refcount += eind->plt_thumb_refcount;
2863 eind->plt_thumb_refcount = 0;
2864 edir->plt_maybe_thumb_refcount += eind->plt_maybe_thumb_refcount;
2865 eind->plt_maybe_thumb_refcount = 0;
2866
2867 if (dir->got.refcount <= 0)
2868 {
2869 edir->tls_type = eind->tls_type;
2870 eind->tls_type = GOT_UNKNOWN;
2871 }
2872 }
2873
2874 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
2875}
2876
2877/* Create an ARM elf linker hash table. */
2878
2879static struct bfd_link_hash_table *
2880elf32_arm_link_hash_table_create (bfd *abfd)
2881{
2882 struct elf32_arm_link_hash_table *ret;
2883 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
2884
2885 ret = bfd_malloc (amt);
2886 if (ret == NULL)
2887 return NULL;
2888
2889 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
2890 elf32_arm_link_hash_newfunc,
2891 sizeof (struct elf32_arm_link_hash_entry)))
2892 {
2893 free (ret);
2894 return NULL;
2895 }
2896
2897 ret->sgot = NULL;
2898 ret->sgotplt = NULL;
2899 ret->srelgot = NULL;
2900 ret->splt = NULL;
2901 ret->srelplt = NULL;
2902 ret->sdynbss = NULL;
2903 ret->srelbss = NULL;
2904 ret->srelplt2 = NULL;
2905 ret->thumb_glue_size = 0;
2906 ret->arm_glue_size = 0;
2907 ret->bx_glue_size = 0;
2908 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
2909 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
2910 ret->vfp11_erratum_glue_size = 0;
2911 ret->num_vfp11_fixes = 0;
48229727 2912 ret->fix_cortex_a8 = 0;
906e58ca
NC		 2913 ret->bfd_of_glue_owner = NULL;
2914 ret->byteswap_code = 0;
2915 ret->target1_is_rel = 0;
2916 ret->target2_reloc = R_ARM_NONE;
2917#ifdef FOUR_WORD_PLT
2918 ret->plt_header_size = 16;
2919 ret->plt_entry_size = 16;
2920#else
2921 ret->plt_header_size = 20;
2922 ret->plt_entry_size = 12;
2923#endif
2924 ret->fix_v4bx = 0;
2925 ret->use_blx = 0;
2926 ret->vxworks_p = 0;
2927 ret->symbian_p = 0;
2928 ret->use_rel = 1;
87d72d41 2929 ret->sym_cache.abfd = NULL;
906e58ca
NC		 2930 ret->obfd = abfd;
2931 ret->tls_ldm_got.refcount = 0;
6cee0a6f
L		 2932 ret->stub_bfd = NULL;
2933 ret->add_stub_section = NULL;
2934 ret->layout_sections_again = NULL;
2935 ret->stub_group = NULL;
2936 ret->bfd_count = 0;
2937 ret->top_index = 0;
2938 ret->input_list = NULL;
906e58ca
NC		 2939
2940 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
2941 sizeof (struct elf32_arm_stub_hash_entry)))
2942 {
2943 free (ret);
2944 return NULL;
2945 }
2946
2947 return &ret->root.root;
2948}
2949
2950/* Free the derived linker hash table. */
2951
2952static void
2953elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
2954{
2955 struct elf32_arm_link_hash_table *ret
2956 = (struct elf32_arm_link_hash_table *) hash;
2957
2958 bfd_hash_table_free (&ret->stub_hash_table);
2959 _bfd_generic_link_hash_table_free (hash);
2960}
2961
2962/* Determine if we're dealing with a Thumb only architecture. */
2963
2964static bfd_boolean
2965using_thumb_only (struct elf32_arm_link_hash_table *globals)
2966{
2967 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2968 Tag_CPU_arch);
2969 int profile;
2970
2971 if (arch != TAG_CPU_ARCH_V7)
2972 return FALSE;
2973
2974 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2975 Tag_CPU_arch_profile);
2976
2977 return profile == 'M';
2978}
2979
2980/* Determine if we're dealing with a Thumb-2 object. */
2981
2982static bfd_boolean
2983using_thumb2 (struct elf32_arm_link_hash_table *globals)
2984{
2985 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2986 Tag_CPU_arch);
2987 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
2988}
2989
f4ac8484
DJ		 2990static bfd_boolean
2991arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
2992{
2993 switch (stub_type)
2994 {
fea2b4d6
CL		 2995 case arm_stub_long_branch_thumb_only:
2996 case arm_stub_long_branch_v4t_thumb_arm:
2997 case arm_stub_short_branch_v4t_thumb_arm:
ebe24dd4
CL		 2998 case arm_stub_long_branch_v4t_thumb_arm_pic:
2999 case arm_stub_long_branch_thumb_only_pic:
f4ac8484
DJ		 3000 return TRUE;
3001 case arm_stub_none:
3002 BFD_FAIL ();
3003 return FALSE;
3004 break;
3005 default:
3006 return FALSE;
3007 }
3008}
3009
906e58ca
NC		 3010/* Determine the type of stub needed, if any, for a call. */
3011
3012static enum elf32_arm_stub_type
3013arm_type_of_stub (struct bfd_link_info *info,
3014 asection *input_sec,
3015 const Elf_Internal_Rela *rel,
3016 unsigned char st_type,
3017 struct elf32_arm_link_hash_entry *hash,
c820be07
NC		 3018 bfd_vma destination,
3019 asection *sym_sec,
3020 bfd *input_bfd,
3021 const char *name)
906e58ca
NC		 3022{
3023 bfd_vma location;
3024 bfd_signed_vma branch_offset;
3025 unsigned int r_type;
3026 struct elf32_arm_link_hash_table * globals;
3027 int thumb2;
3028 int thumb_only;
3029 enum elf32_arm_stub_type stub_type = arm_stub_none;
5fa9e92f 3030 int use_plt = 0;
906e58ca 3031
da5938a2 3032 /* We don't know the actual type of destination in case it is of
8029a119 3033 type STT_SECTION: give up. */
da5938a2
NC		 3034 if (st_type == STT_SECTION)
3035 return stub_type;
3036
906e58ca
NC		 3037 globals = elf32_arm_hash_table (info);
3038
3039 thumb_only = using_thumb_only (globals);
3040
3041 thumb2 = using_thumb2 (globals);
3042
3043 /* Determine where the call point is. */
3044 location = (input_sec->output_offset
3045 + input_sec->output_section->vma
3046 + rel->r_offset);
3047
3048 branch_offset = (bfd_signed_vma)(destination - location);
3049
3050 r_type = ELF32_R_TYPE (rel->r_info);
3051
5fa9e92f 3052 /* Keep a simpler condition, for the sake of clarity. */
329dcd78 3053 if (globals->splt != NULL && hash != NULL && hash->root.plt.offset != (bfd_vma) -1)
5fa9e92f
CL		 3054 {
3055 use_plt = 1;
3056 /* Note when dealing with PLT entries: the main PLT stub is in
3057 ARM mode, so if the branch is in Thumb mode, another
3058 Thumb->ARM stub will be inserted later just before the ARM
3059 PLT stub. We don't take this extra distance into account
3060 here, because if a long branch stub is needed, we'll add a
3061 Thumb->Arm one and branch directly to the ARM PLT entry
3062 because it avoids spreading offset corrections in several
3063 places. */
3064 }
906e58ca 3065
155d87d7 3066 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca 3067 {
5fa9e92f
CL		 3068 /* Handle cases where:
3069 - this call goes too far (different Thumb/Thumb2 max
3070 distance)
155d87d7
CL		 3071 - it's a Thumb->Arm call and blx is not available, or it's a
3072 Thumb->Arm branch (not bl). A stub is needed in this case,
3073 but only if this call is not through a PLT entry. Indeed,
3074 PLT stubs handle mode switching already.
5fa9e92f 3075 */
906e58ca
NC		 3076 if ((!thumb2
3077 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3078 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3079 || (thumb2
3080 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3081 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
5fa9e92f 3082 || ((st_type != STT_ARM_TFUNC)
155d87d7
CL		 3083 && (((r_type == R_ARM_THM_CALL) && !globals->use_blx)
3084 || (r_type == R_ARM_THM_JUMP24))
5fa9e92f 3085 && !use_plt))
906e58ca
NC		 3086 {
3087 if (st_type == STT_ARM_TFUNC)
3088 {
3089 /* Thumb to thumb. */
3090 if (!thumb_only)
3091 {
3092 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3093 /* PIC stubs. */
155d87d7
CL		 3094 ? ((globals->use_blx
3095 && (r_type ==R_ARM_THM_CALL))
3096 /* V5T and above. Stub starts with ARM code, so
3097 we must be able to switch mode before
3098 reaching it, which is only possible for 'bl'
3099 (ie R_ARM_THM_CALL relocation). */
cf3eccff 3100 ? arm_stub_long_branch_any_thumb_pic
ebe24dd4 3101 /* On V4T, use Thumb code only. */
d3626fb0 3102 : arm_stub_long_branch_v4t_thumb_thumb_pic)
c2b4a39d
CL		 3103
3104 /* non-PIC stubs. */
155d87d7
CL		 3105 : ((globals->use_blx
3106 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3107 /* V5T and above. */
3108 ? arm_stub_long_branch_any_any
3109 /* V4T. */
d3626fb0 3110 : arm_stub_long_branch_v4t_thumb_thumb);
906e58ca
NC		 3111 }
3112 else
3113 {
3114 stub_type = (info->shared | globals->pic_veneer)
ebe24dd4
CL		 3115 /* PIC stub. */
3116 ? arm_stub_long_branch_thumb_only_pic
c2b4a39d
CL		 3117 /* non-PIC stub. */
3118 : arm_stub_long_branch_thumb_only;
906e58ca
NC		 3119 }
3120 }
3121 else
3122 {
3123 /* Thumb to arm. */
c820be07
NC		 3124 if (sym_sec != NULL
3125 && sym_sec->owner != NULL
3126 && !INTERWORK_FLAG (sym_sec->owner))
3127 {
3128 (*_bfd_error_handler)
3129 (_("%B(%s): warning: interworking not enabled.\n"
3130 " first occurrence: %B: Thumb call to ARM"),
3131 sym_sec->owner, input_bfd, name);
3132 }
3133
906e58ca 3134 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3135 /* PIC stubs. */
155d87d7
CL		 3136 ? ((globals->use_blx
3137 && (r_type ==R_ARM_THM_CALL))
c2b4a39d 3138 /* V5T and above. */
cf3eccff 3139 ? arm_stub_long_branch_any_arm_pic
ebe24dd4
CL		 3140 /* V4T PIC stub. */
3141 : arm_stub_long_branch_v4t_thumb_arm_pic)
c2b4a39d
CL		 3142
3143 /* non-PIC stubs. */
155d87d7
CL		 3144 : ((globals->use_blx
3145 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3146 /* V5T and above. */
3147 ? arm_stub_long_branch_any_any
3148 /* V4T. */
3149 : arm_stub_long_branch_v4t_thumb_arm);
c820be07
NC		 3150
3151 /* Handle v4t short branches. */
fea2b4d6 3152 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
c820be07
NC		 3153 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3154 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
fea2b4d6 3155 stub_type = arm_stub_short_branch_v4t_thumb_arm;
906e58ca
NC		 3156 }
3157 }
3158 }
155d87d7 3159 else if (r_type == R_ARM_CALL || r_type == R_ARM_JUMP24 || r_type == R_ARM_PLT32)
906e58ca
NC		 3160 {
3161 if (st_type == STT_ARM_TFUNC)
3162 {
3163 /* Arm to thumb. */
c820be07
NC		 3164
3165 if (sym_sec != NULL
3166 && sym_sec->owner != NULL
3167 && !INTERWORK_FLAG (sym_sec->owner))
3168 {
3169 (*_bfd_error_handler)
3170 (_("%B(%s): warning: interworking not enabled.\n"
c2b4a39d 3171 " first occurrence: %B: ARM call to Thumb"),
c820be07
NC		 3172 sym_sec->owner, input_bfd, name);
3173 }
3174
3175 /* We have an extra 2-bytes reach because of
3176 the mode change (bit 24 (H) of BLX encoding). */
4116d8d7
PB		 3177 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3178 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3179 || ((r_type == R_ARM_CALL) && !globals->use_blx)
3180 || (r_type == R_ARM_JUMP24)
3181 || (r_type == R_ARM_PLT32))
906e58ca
NC		 3182 {
3183 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3184 /* PIC stubs. */
ebe24dd4
CL		 3185 ? ((globals->use_blx)
3186 /* V5T and above. */
3187 ? arm_stub_long_branch_any_thumb_pic
3188 /* V4T stub. */
3189 : arm_stub_long_branch_v4t_arm_thumb_pic)
3190
c2b4a39d
CL		 3191 /* non-PIC stubs. */
3192 : ((globals->use_blx)
3193 /* V5T and above. */
3194 ? arm_stub_long_branch_any_any
3195 /* V4T. */
3196 : arm_stub_long_branch_v4t_arm_thumb);
906e58ca
NC		 3197 }
3198 }
3199 else
3200 {
3201 /* Arm to arm. */
3202 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3203 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3204 {
3205 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3206 /* PIC stubs. */
cf3eccff 3207 ? arm_stub_long_branch_any_arm_pic
c2b4a39d 3208 /* non-PIC stubs. */
fea2b4d6 3209 : arm_stub_long_branch_any_any;
906e58ca
NC		 3210 }
3211 }
3212 }
3213
3214 return stub_type;
3215}
3216
3217/* Build a name for an entry in the stub hash table. */
3218
3219static char *
3220elf32_arm_stub_name (const asection *input_section,
3221 const asection *sym_sec,
3222 const struct elf32_arm_link_hash_entry *hash,
3223 const Elf_Internal_Rela *rel)
3224{
3225 char *stub_name;
3226 bfd_size_type len;
3227
3228 if (hash)
3229 {
3230 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1;
3231 stub_name = bfd_malloc (len);
3232 if (stub_name != NULL)
3233 sprintf (stub_name, "%08x_%s+%x",
3234 input_section->id & 0xffffffff,
3235 hash->root.root.root.string,
3236 (int) rel->r_addend & 0xffffffff);
3237 }
3238 else
3239 {
3240 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1;
3241 stub_name = bfd_malloc (len);
3242 if (stub_name != NULL)
3243 sprintf (stub_name, "%08x_%x:%x+%x",
3244 input_section->id & 0xffffffff,
3245 sym_sec->id & 0xffffffff,
3246 (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
3247 (int) rel->r_addend & 0xffffffff);
3248 }
3249
3250 return stub_name;
3251}
3252
3253/* Look up an entry in the stub hash. Stub entries are cached because
3254 creating the stub name takes a bit of time. */
3255
3256static struct elf32_arm_stub_hash_entry *
3257elf32_arm_get_stub_entry (const asection *input_section,
3258 const asection *sym_sec,
3259 struct elf_link_hash_entry *hash,
3260 const Elf_Internal_Rela *rel,
3261 struct elf32_arm_link_hash_table *htab)
3262{
3263 struct elf32_arm_stub_hash_entry *stub_entry;
3264 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3265 const asection *id_sec;
3266
3267 if ((input_section->flags & SEC_CODE) == 0)
3268 return NULL;
3269
3270 /* If this input section is part of a group of sections sharing one
3271 stub section, then use the id of the first section in the group.
3272 Stub names need to include a section id, as there may well be
3273 more than one stub used to reach say, printf, and we need to
3274 distinguish between them. */
3275 id_sec = htab->stub_group[input_section->id].link_sec;
3276
3277 if (h != NULL && h->stub_cache != NULL
3278 && h->stub_cache->h == h
3279 && h->stub_cache->id_sec == id_sec)
3280 {
3281 stub_entry = h->stub_cache;
3282 }
3283 else
3284 {
3285 char *stub_name;
3286
3287 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel);
3288 if (stub_name == NULL)
3289 return NULL;
3290
3291 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3292 stub_name, FALSE, FALSE);
3293 if (h != NULL)
3294 h->stub_cache = stub_entry;
3295
3296 free (stub_name);
3297 }
3298
3299 return stub_entry;
3300}
3301
48229727
JB		 3302/* Find or create a stub section. Returns a pointer to the stub section, and
3303 the section to which the stub section will be attached (in *LINK_SEC_P).
3304 LINK_SEC_P may be NULL. */
906e58ca 3305
48229727
JB		 3306static asection *
3307elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3308 struct elf32_arm_link_hash_table *htab)
906e58ca
NC		 3309{
3310 asection *link_sec;
3311 asection *stub_sec;
906e58ca
NC		 3312
3313 link_sec = htab->stub_group[section->id].link_sec;
3314 stub_sec = htab->stub_group[section->id].stub_sec;
3315 if (stub_sec == NULL)
3316 {
3317 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3318 if (stub_sec == NULL)
3319 {
3320 size_t namelen;
3321 bfd_size_type len;
3322 char *s_name;
3323
3324 namelen = strlen (link_sec->name);
3325 len = namelen + sizeof (STUB_SUFFIX);
3326 s_name = bfd_alloc (htab->stub_bfd, len);
3327 if (s_name == NULL)
3328 return NULL;
3329
3330 memcpy (s_name, link_sec->name, namelen);
3331 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3332 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3333 if (stub_sec == NULL)
3334 return NULL;
3335 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3336 }
3337 htab->stub_group[section->id].stub_sec = stub_sec;
3338 }
48229727
JB		 3339
3340 if (link_sec_p)
3341 *link_sec_p = link_sec;
3342
3343 return stub_sec;
3344}
3345
3346/* Add a new stub entry to the stub hash. Not all fields of the new
3347 stub entry are initialised. */
3348
3349static struct elf32_arm_stub_hash_entry *
3350elf32_arm_add_stub (const char *stub_name,
3351 asection *section,
3352 struct elf32_arm_link_hash_table *htab)
3353{
3354 asection *link_sec;
3355 asection *stub_sec;
3356 struct elf32_arm_stub_hash_entry *stub_entry;
3357
3358 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3359 if (stub_sec == NULL)
3360 return NULL;
906e58ca
NC		 3361
3362 /* Enter this entry into the linker stub hash table. */
3363 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3364 TRUE, FALSE);
3365 if (stub_entry == NULL)
3366 {
3367 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3368 section->owner,
3369 stub_name);
3370 return NULL;
3371 }
3372
3373 stub_entry->stub_sec = stub_sec;
3374 stub_entry->stub_offset = 0;
3375 stub_entry->id_sec = link_sec;
3376
906e58ca
NC		 3377 return stub_entry;
3378}
3379
3380/* Store an Arm insn into an output section not processed by
3381 elf32_arm_write_section. */
3382
3383static void
8029a119
NC		 3384put_arm_insn (struct elf32_arm_link_hash_table * htab,
3385 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3386{
3387 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3388 bfd_putl32 (val, ptr);
3389 else
3390 bfd_putb32 (val, ptr);
3391}
3392
3393/* Store a 16-bit Thumb insn into an output section not processed by
3394 elf32_arm_write_section. */
3395
3396static void
8029a119
NC		 3397put_thumb_insn (struct elf32_arm_link_hash_table * htab,
3398 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3399{
3400 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3401 bfd_putl16 (val, ptr);
3402 else
3403 bfd_putb16 (val, ptr);
3404}
3405
48229727
JB		 3406static bfd_reloc_status_type elf32_arm_final_link_relocate
3407 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
3408 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
3409 const char *, int, struct elf_link_hash_entry *, bfd_boolean *, char **);
3410
906e58ca
NC		 3411static bfd_boolean
3412arm_build_one_stub (struct bfd_hash_entry *gen_entry,
3413 void * in_arg)
3414{
48229727 3415#define MAXRELOCS 2
906e58ca
NC		 3416 struct elf32_arm_stub_hash_entry *stub_entry;
3417 struct bfd_link_info *info;
3418 struct elf32_arm_link_hash_table *htab;
3419 asection *stub_sec;
3420 bfd *stub_bfd;
3421 bfd_vma stub_addr;
3422 bfd_byte *loc;
3423 bfd_vma sym_value;
3424 int template_size;
3425 int size;
461a49ca 3426 const insn_sequence *template;
906e58ca
NC		 3427 int i;
3428 struct elf32_arm_link_hash_table * globals;
48229727
JB		 3429 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
3430 int stub_reloc_offset[MAXRELOCS] = {0, 0};
3431 int nrelocs = 0;
906e58ca
NC		 3432
3433 /* Massage our args to the form they really have. */
3434 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3435 info = (struct bfd_link_info *) in_arg;
3436
3437 globals = elf32_arm_hash_table (info);
3438
3439 htab = elf32_arm_hash_table (info);
3440 stub_sec = stub_entry->stub_sec;
3441
eb7c4339
NS		 3442 if ((htab->fix_cortex_a8 < 0)
3443 != (stub_entry->stub_type >= arm_stub_a8_veneer_lwm))
3444 /* We have to do the a8 fixes last, as they are less aligned than
3445 the other veneers. */
3446 return TRUE;
3447
906e58ca
NC		 3448 /* Make a note of the offset within the stubs for this entry. */
3449 stub_entry->stub_offset = stub_sec->size;
3450 loc = stub_sec->contents + stub_entry->stub_offset;
3451
3452 stub_bfd = stub_sec->owner;
3453
3454 /* This is the address of the start of the stub. */
3455 stub_addr = stub_sec->output_section->vma + stub_sec->output_offset
3456 + stub_entry->stub_offset;
3457
3458 /* This is the address of the stub destination. */
3459 sym_value = (stub_entry->target_value
3460 + stub_entry->target_section->output_offset
3461 + stub_entry->target_section->output_section->vma);
3462
461a49ca
DJ		 3463 template = stub_entry->stub_template;
3464 template_size = stub_entry->stub_template_size;
906e58ca
NC		 3465
3466 size = 0;
461a49ca 3467 for (i = 0; i < template_size; i++)
906e58ca 3468 {
4e31c731 3469 switch (template[i].type)
461a49ca
DJ		 3470 {
3471 case THUMB16_TYPE:
48229727
JB		 3472 {
3473 bfd_vma data = template[i].data;
3474 if (template[i].reloc_addend != 0)
3475 {
3476 /* We've borrowed the reloc_addend field to mean we should
3477 insert a condition code into this (Thumb-1 branch)
3478 instruction. See THUMB16_BCOND_INSN. */
3479 BFD_ASSERT ((data & 0xff00) == 0xd000);
3480 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
3481 }
3482 put_thumb_insn (globals, stub_bfd, data, loc + size);
3483 size += 2;
3484 }
461a49ca 3485 break;
906e58ca 3486
48229727
JB		 3487 case THUMB32_TYPE:
3488 put_thumb_insn (globals, stub_bfd, (template[i].data >> 16) & 0xffff,
3489 loc + size);
3490 put_thumb_insn (globals, stub_bfd, template[i].data & 0xffff,
3491 loc + size + 2);
3492 if (template[i].r_type != R_ARM_NONE)
3493 {
3494 stub_reloc_idx[nrelocs] = i;
3495 stub_reloc_offset[nrelocs++] = size;
3496 }
3497 size += 4;
3498 break;
3499
461a49ca
DJ		 3500 case ARM_TYPE:
3501 put_arm_insn (globals, stub_bfd, template[i].data, loc + size);
3502 /* Handle cases where the target is encoded within the
3503 instruction. */
ebe24dd4 3504 if (template[i].r_type == R_ARM_JUMP24)
461a49ca 3505 {
48229727
JB		 3506 stub_reloc_idx[nrelocs] = i;
3507 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3508 }
3509 size += 4;
3510 break;
3511
3512 case DATA_TYPE:
3513 bfd_put_32 (stub_bfd, template[i].data, loc + size);
48229727
JB		 3514 stub_reloc_idx[nrelocs] = i;
3515 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3516 size += 4;
3517 break;
3518
3519 default:
3520 BFD_FAIL ();
3521 return FALSE;
3522 }
906e58ca 3523 }
461a49ca 3524
906e58ca
NC		 3525 stub_sec->size += size;
3526
461a49ca
DJ		 3527 /* Stub size has already been computed in arm_size_one_stub. Check
3528 consistency. */
3529 BFD_ASSERT (size == stub_entry->stub_size);
3530
906e58ca
NC		 3531 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
3532 if (stub_entry->st_type == STT_ARM_TFUNC)
3533 sym_value |= 1;
3534
48229727
JB		 3535 /* Assume there is at least one and at most MAXRELOCS entries to relocate
3536 in each stub. */
3537 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
c820be07 3538
48229727
JB		 3539 for (i = 0; i < nrelocs; i++)
3540 if (template[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
3541 || template[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
3542 || template[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
3543 || template[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
3544 {
3545 Elf_Internal_Rela rel;
3546 bfd_boolean unresolved_reloc;
3547 char *error_message;
3548 int sym_flags
3549 = (template[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22)
3550 ? STT_ARM_TFUNC : 0;
3551 bfd_vma points_to = sym_value + stub_entry->target_addend;
3552
3553 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
3554 rel.r_info = ELF32_R_INFO (0, template[stub_reloc_idx[i]].r_type);
3555 rel.r_addend = template[stub_reloc_idx[i]].reloc_addend;
3556
3557 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
3558 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
3559 template should refer back to the instruction after the original
3560 branch. */
3561 points_to = sym_value;
3562
33c6a8fc
JB		 3563 /* There may be unintended consequences if this is not true. */
3564 BFD_ASSERT (stub_entry->h == NULL);
3565
48229727
JB		 3566 /* Note: _bfd_final_link_relocate doesn't handle these relocations
3567 properly. We should probably use this function unconditionally,
3568 rather than only for certain relocations listed in the enclosing
3569 conditional, for the sake of consistency. */
3570 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
3571 (template[stub_reloc_idx[i]].r_type),
3572 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
3573 points_to, info, stub_entry->target_section, "", sym_flags,
33c6a8fc 3574 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
48229727
JB		 3575 &error_message);
3576 }
3577 else
3578 {
3579 _bfd_final_link_relocate (elf32_arm_howto_from_type
3580 (template[stub_reloc_idx[i]].r_type), stub_bfd, stub_sec,
3581 stub_sec->contents, stub_entry->stub_offset + stub_reloc_offset[i],
3582 sym_value + stub_entry->target_addend,
3583 template[stub_reloc_idx[i]].reloc_addend);
3584 }
906e58ca
NC		 3585
3586 return TRUE;
48229727 3587#undef MAXRELOCS
906e58ca
NC		 3588}
3589
48229727
JB		 3590/* Calculate the template, template size and instruction size for a stub.
3591 Return value is the instruction size. */
906e58ca 3592
48229727
JB		 3593static unsigned int
3594find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
3595 const insn_sequence **stub_template,
3596 int *stub_template_size)
906e58ca 3597{
48229727
JB		 3598 const insn_sequence *template = NULL;
3599 int template_size = 0, i;
3600 unsigned int size;
906e58ca 3601
48229727
JB		 3602 template = stub_definitions[stub_type].template;
3603 template_size = stub_definitions[stub_type].template_size;
906e58ca
NC		 3604
3605 size = 0;
461a49ca
DJ		 3606 for (i = 0; i < template_size; i++)
3607 {
4e31c731 3608 switch (template[i].type)
461a49ca
DJ		 3609 {
3610 case THUMB16_TYPE:
3611 size += 2;
3612 break;
3613
3614 case ARM_TYPE:
48229727 3615 case THUMB32_TYPE:
461a49ca
DJ		 3616 case DATA_TYPE:
3617 size += 4;
3618 break;
3619
3620 default:
3621 BFD_FAIL ();
3622 return FALSE;
3623 }
3624 }
3625
48229727
JB		 3626 if (stub_template)
3627 *stub_template = template;
3628
3629 if (stub_template_size)
3630 *stub_template_size = template_size;
3631
3632 return size;
3633}
3634
3635/* As above, but don't actually build the stub. Just bump offset so
3636 we know stub section sizes. */
3637
3638static bfd_boolean
3639arm_size_one_stub (struct bfd_hash_entry *gen_entry,
3640 void * in_arg)
3641{
3642 struct elf32_arm_stub_hash_entry *stub_entry;
3643 struct elf32_arm_link_hash_table *htab;
3644 const insn_sequence *template;
3645 int template_size, size;
3646
3647 /* Massage our args to the form they really have. */
3648 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3649 htab = (struct elf32_arm_link_hash_table *) in_arg;
3650
3651 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
3652 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
3653
3654 size = find_stub_size_and_template (stub_entry->stub_type, &template,
3655 &template_size);
3656
461a49ca
DJ		 3657 stub_entry->stub_size = size;
3658 stub_entry->stub_template = template;
3659 stub_entry->stub_template_size = template_size;
3660
906e58ca
NC		 3661 size = (size + 7) & ~7;
3662 stub_entry->stub_sec->size += size;
461a49ca 3663
906e58ca
NC		 3664 return TRUE;
3665}
3666
3667/* External entry points for sizing and building linker stubs. */
3668
3669/* Set up various things so that we can make a list of input sections
3670 for each output section included in the link. Returns -1 on error,
3671 0 when no stubs will be needed, and 1 on success. */
3672
3673int
3674elf32_arm_setup_section_lists (bfd *output_bfd,
3675 struct bfd_link_info *info)
3676{
3677 bfd *input_bfd;
3678 unsigned int bfd_count;
3679 int top_id, top_index;
3680 asection *section;
3681 asection **input_list, **list;
3682 bfd_size_type amt;
3683 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3684
3685 if (! is_elf_hash_table (htab))
3686 return 0;
3687
3688 /* Count the number of input BFDs and find the top input section id. */
3689 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
3690 input_bfd != NULL;
3691 input_bfd = input_bfd->link_next)
3692 {
3693 bfd_count += 1;
3694 for (section = input_bfd->sections;
3695 section != NULL;
3696 section = section->next)
3697 {
3698 if (top_id < section->id)
3699 top_id = section->id;
3700 }
3701 }
3702 htab->bfd_count = bfd_count;
3703
3704 amt = sizeof (struct map_stub) * (top_id + 1);
3705 htab->stub_group = bfd_zmalloc (amt);
3706 if (htab->stub_group == NULL)
3707 return -1;
3708
3709 /* We can't use output_bfd->section_count here to find the top output
3710 section index as some sections may have been removed, and
3711 _bfd_strip_section_from_output doesn't renumber the indices. */
3712 for (section = output_bfd->sections, top_index = 0;
3713 section != NULL;
3714 section = section->next)
3715 {
3716 if (top_index < section->index)
3717 top_index = section->index;
3718 }
3719
3720 htab->top_index = top_index;
3721 amt = sizeof (asection *) * (top_index + 1);
3722 input_list = bfd_malloc (amt);
3723 htab->input_list = input_list;
3724 if (input_list == NULL)
3725 return -1;
3726
3727 /* For sections we aren't interested in, mark their entries with a
3728 value we can check later. */
3729 list = input_list + top_index;
3730 do
3731 *list = bfd_abs_section_ptr;
3732 while (list-- != input_list);
3733
3734 for (section = output_bfd->sections;
3735 section != NULL;
3736 section = section->next)
3737 {
3738 if ((section->flags & SEC_CODE) != 0)
3739 input_list[section->index] = NULL;
3740 }
3741
3742 return 1;
3743}
3744
3745/* The linker repeatedly calls this function for each input section,
3746 in the order that input sections are linked into output sections.
3747 Build lists of input sections to determine groupings between which
3748 we may insert linker stubs. */
3749
3750void
3751elf32_arm_next_input_section (struct bfd_link_info *info,
3752 asection *isec)
3753{
3754 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3755
3756 if (isec->output_section->index <= htab->top_index)
3757 {
3758 asection **list = htab->input_list + isec->output_section->index;
3759
3760 if (*list != bfd_abs_section_ptr)
3761 {
3762 /* Steal the link_sec pointer for our list. */
3763#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
3764 /* This happens to make the list in reverse order,
07d72278 3765 which we reverse later. */
906e58ca
NC		 3766 PREV_SEC (isec) = *list;
3767 *list = isec;
3768 }
3769 }
3770}
3771
3772/* See whether we can group stub sections together. Grouping stub
3773 sections may result in fewer stubs. More importantly, we need to
07d72278 3774 put all .init* and .fini* stubs at the end of the .init or
906e58ca
NC		 3775 .fini output sections respectively, because glibc splits the
3776 _init and _fini functions into multiple parts. Putting a stub in
3777 the middle of a function is not a good idea. */
3778
3779static void
3780group_sections (struct elf32_arm_link_hash_table *htab,
3781 bfd_size_type stub_group_size,
07d72278 3782 bfd_boolean stubs_always_after_branch)
906e58ca 3783{
07d72278 3784 asection **list = htab->input_list;
906e58ca
NC		 3785
3786 do
3787 {
3788 asection *tail = *list;
07d72278 3789 asection *head;
906e58ca
NC		 3790
3791 if (tail == bfd_abs_section_ptr)
3792 continue;
3793
07d72278
DJ		 3794 /* Reverse the list: we must avoid placing stubs at the
3795 beginning of the section because the beginning of the text
3796 section may be required for an interrupt vector in bare metal
3797 code. */
3798#define NEXT_SEC PREV_SEC
e780aef2
CL		 3799 head = NULL;
3800 while (tail != NULL)
3801 {
3802 /* Pop from tail. */
3803 asection *item = tail;
3804 tail = PREV_SEC (item);
3805
3806 /* Push on head. */
3807 NEXT_SEC (item) = head;
3808 head = item;
3809 }
07d72278
DJ		 3810
3811 while (head != NULL)
906e58ca
NC		 3812 {
3813 asection *curr;
07d72278 3814 asection *next;
e780aef2
CL		 3815 bfd_vma stub_group_start = head->output_offset;
3816 bfd_vma end_of_next;
906e58ca 3817
07d72278 3818 curr = head;
e780aef2 3819 while (NEXT_SEC (curr) != NULL)
8cd931b7 3820 {
e780aef2
CL		 3821 next = NEXT_SEC (curr);
3822 end_of_next = next->output_offset + next->size;
3823 if (end_of_next - stub_group_start >= stub_group_size)
3824 /* End of NEXT is too far from start, so stop. */
8cd931b7 3825 break;
e780aef2
CL		 3826 /* Add NEXT to the group. */
3827 curr = next;
8cd931b7 3828 }
906e58ca 3829
07d72278 3830 /* OK, the size from the start to the start of CURR is less
906e58ca 3831 than stub_group_size and thus can be handled by one stub
07d72278 3832 section. (Or the head section is itself larger than
906e58ca
NC		 3833 stub_group_size, in which case we may be toast.)
3834 We should really be keeping track of the total size of
3835 stubs added here, as stubs contribute to the final output
7fb9f789 3836 section size. */
906e58ca
NC		 3837 do
3838 {
07d72278 3839 next = NEXT_SEC (head);
906e58ca 3840 /* Set up this stub group. */
07d72278 3841 htab->stub_group[head->id].link_sec = curr;
906e58ca 3842 }
07d72278 3843 while (head != curr && (head = next) != NULL);
906e58ca
NC		 3844
3845 /* But wait, there's more! Input sections up to stub_group_size
07d72278
DJ		 3846 bytes after the stub section can be handled by it too. */
3847 if (!stubs_always_after_branch)
906e58ca 3848 {
e780aef2
CL		 3849 stub_group_start = curr->output_offset + curr->size;
3850
8cd931b7 3851 while (next != NULL)
906e58ca 3852 {
e780aef2
CL		 3853 end_of_next = next->output_offset + next->size;
3854 if (end_of_next - stub_group_start >= stub_group_size)
3855 /* End of NEXT is too far from stubs, so stop. */
8cd931b7 3856 break;
e780aef2 3857 /* Add NEXT to the stub group. */
07d72278
DJ		 3858 head = next;
3859 next = NEXT_SEC (head);
3860 htab->stub_group[head->id].link_sec = curr;
906e58ca
NC		 3861 }
3862 }
07d72278 3863 head = next;
906e58ca
NC		 3864 }
3865 }
07d72278 3866 while (list++ != htab->input_list + htab->top_index);
906e58ca
NC		 3867
3868 free (htab->input_list);
3869#undef PREV_SEC
07d72278 3870#undef NEXT_SEC
906e58ca
NC		 3871}
3872
48229727
JB		 3873/* Comparison function for sorting/searching relocations relating to Cortex-A8
3874 erratum fix. */
3875
3876static int
3877a8_reloc_compare (const void *a, const void *b)
3878{
3879 const struct a8_erratum_reloc *ra = a, *rb = b;
3880
3881 if (ra->from < rb->from)
3882 return -1;
3883 else if (ra->from > rb->from)
3884 return 1;
3885 else
3886 return 0;
3887}
3888
3889static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
3890 const char *, char **);
3891
3892/* Helper function to scan code for sequences which might trigger the Cortex-A8
3893 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
81694485 3894 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
48229727
JB		 3895 otherwise. */
3896
81694485
NC		 3897static bfd_boolean
3898cortex_a8_erratum_scan (bfd *input_bfd,
3899 struct bfd_link_info *info,
48229727
JB		 3900 struct a8_erratum_fix **a8_fixes_p,
3901 unsigned int *num_a8_fixes_p,
3902 unsigned int *a8_fix_table_size_p,
3903 struct a8_erratum_reloc *a8_relocs,
eb7c4339
NS		 3904 unsigned int num_a8_relocs,
3905 unsigned prev_num_a8_fixes,
3906 bfd_boolean *stub_changed_p)
48229727
JB		 3907{
3908 asection *section;
3909 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3910 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
3911 unsigned int num_a8_fixes = *num_a8_fixes_p;
3912 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
3913
3914 for (section = input_bfd->sections;
3915 section != NULL;
3916 section = section->next)
3917 {
3918 bfd_byte *contents = NULL;
3919 struct _arm_elf_section_data *sec_data;
3920 unsigned int span;
3921 bfd_vma base_vma;
3922
3923 if (elf_section_type (section) != SHT_PROGBITS
3924 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
3925 || (section->flags & SEC_EXCLUDE) != 0
3926 || (section->sec_info_type == ELF_INFO_TYPE_JUST_SYMS)
3927 || (section->output_section == bfd_abs_section_ptr))
3928 continue;
3929
3930 base_vma = section->output_section->vma + section->output_offset;
3931
3932 if (elf_section_data (section)->this_hdr.contents != NULL)
3933 contents = elf_section_data (section)->this_hdr.contents;
3934 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
81694485 3935 return TRUE;
48229727
JB		 3936
3937 sec_data = elf32_arm_section_data (section);
3938
3939 for (span = 0; span < sec_data->mapcount; span++)
3940 {
3941 unsigned int span_start = sec_data->map[span].vma;
3942 unsigned int span_end = (span == sec_data->mapcount - 1)
3943 ? section->size : sec_data->map[span + 1].vma;
3944 unsigned int i;
3945 char span_type = sec_data->map[span].type;
3946 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
3947
3948 if (span_type != 't')
3949 continue;
3950
3951 /* Span is entirely within a single 4KB region: skip scanning. */
3952 if (((base_vma + span_start) & ~0xfff)
3953 == ((base_vma + span_end) & ~0xfff))
3954 continue;
3955
3956 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
3957
3958 * The opcode is BLX.W, BL.W, B.W, Bcc.W
3959 * The branch target is in the same 4KB region as the
3960 first half of the branch.
3961 * The instruction before the branch is a 32-bit
81694485 3962 length non-branch instruction. */
48229727
JB		 3963 for (i = span_start; i < span_end;)
3964 {
3965 unsigned int insn = bfd_getl16 (&contents[i]);
3966 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
3967 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
3968
3969 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
3970 insn_32bit = TRUE;
3971
3972 if (insn_32bit)
3973 {
3974 /* Load the rest of the insn (in manual-friendly order). */
3975 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
3976
3977 /* Encoding T4: B<c>.W. */
3978 is_b = (insn & 0xf800d000) == 0xf0009000;
3979 /* Encoding T1: BL<c>.W. */
3980 is_bl = (insn & 0xf800d000) == 0xf000d000;
3981 /* Encoding T2: BLX<c>.W. */
3982 is_blx = (insn & 0xf800d000) == 0xf000c000;
3983 /* Encoding T3: B<c>.W (not permitted in IT block). */
3984 is_bcc = (insn & 0xf800d000) == 0xf0008000
3985 && (insn & 0x07f00000) != 0x03800000;
3986 }
3987
3988 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
3989
81694485
NC		 3990 if (((base_vma + i) & 0xfff) == 0xffe
3991 && insn_32bit
3992 && is_32bit_branch
3993 && last_was_32bit
3994 && ! last_was_branch)
48229727 3995 {
81694485 3996 bfd_signed_vma offset;
48229727
JB		 3997 bfd_boolean force_target_arm = FALSE;
3998 bfd_boolean force_target_thumb = FALSE;
3999 bfd_vma target;
4000 enum elf32_arm_stub_type stub_type = arm_stub_none;
4001 struct a8_erratum_reloc key, *found;
4002
4003 key.from = base_vma + i;
4004 found = bsearch (&key, a8_relocs, num_a8_relocs,
4005 sizeof (struct a8_erratum_reloc),
4006 &a8_reloc_compare);
4007
4008 if (found)
4009 {
4010 char *error_message = NULL;
4011 struct elf_link_hash_entry *entry;
4012
4013 /* We don't care about the error returned from this
4014 function, only if there is glue or not. */
4015 entry = find_thumb_glue (info, found->sym_name,
4016 &error_message);
4017
4018 if (entry)
4019 found->non_a8_stub = TRUE;
4020
4021 if (found->r_type == R_ARM_THM_CALL
4022 && found->st_type != STT_ARM_TFUNC)
4023 force_target_arm = TRUE;
4024 else if (found->r_type == R_ARM_THM_CALL
4025 && found->st_type == STT_ARM_TFUNC)
4026 force_target_thumb = TRUE;
4027 }
4028
4029 /* Check if we have an offending branch instruction. */
4030
4031 if (found && found->non_a8_stub)
4032 /* We've already made a stub for this instruction, e.g.
4033 it's a long branch or a Thumb->ARM stub. Assume that
4034 stub will suffice to work around the A8 erratum (see
4035 setting of always_after_branch above). */
4036 ;
4037 else if (is_bcc)
4038 {
4039 offset = (insn & 0x7ff) << 1;
4040 offset |= (insn & 0x3f0000) >> 4;
4041 offset |= (insn & 0x2000) ? 0x40000 : 0;
4042 offset |= (insn & 0x800) ? 0x80000 : 0;
4043 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4044 if (offset & 0x100000)
81694485 4045 offset |= ~ ((bfd_signed_vma) 0xfffff);
48229727
JB		 4046 stub_type = arm_stub_a8_veneer_b_cond;
4047 }
4048 else if (is_b || is_bl || is_blx)
4049 {
4050 int s = (insn & 0x4000000) != 0;
4051 int j1 = (insn & 0x2000) != 0;
4052 int j2 = (insn & 0x800) != 0;
4053 int i1 = !(j1 ^ s);
4054 int i2 = !(j2 ^ s);
4055
4056 offset = (insn & 0x7ff) << 1;
4057 offset |= (insn & 0x3ff0000) >> 4;
4058 offset |= i2 << 22;
4059 offset |= i1 << 23;
4060 offset |= s << 24;
4061 if (offset & 0x1000000)
81694485 4062 offset |= ~ ((bfd_signed_vma) 0xffffff);
48229727
JB		 4063
4064 if (is_blx)
81694485 4065 offset &= ~ ((bfd_signed_vma) 3);
48229727
JB		 4066
4067 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4068 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4069 }
4070
4071 if (stub_type != arm_stub_none)
4072 {
4073 bfd_vma pc_for_insn = base_vma + i + 4;
4074
4075 /* The original instruction is a BL, but the target is
4076 an ARM instruction. If we were not making a stub,
4077 the BL would have been converted to a BLX. Use the
4078 BLX stub instead in that case. */
4079 if (htab->use_blx && force_target_arm
4080 && stub_type == arm_stub_a8_veneer_bl)
4081 {
4082 stub_type = arm_stub_a8_veneer_blx;
4083 is_blx = TRUE;
4084 is_bl = FALSE;
4085 }
4086 /* Conversely, if the original instruction was
4087 BLX but the target is Thumb mode, use the BL
4088 stub. */
4089 else if (force_target_thumb
4090 && stub_type == arm_stub_a8_veneer_blx)
4091 {
4092 stub_type = arm_stub_a8_veneer_bl;
4093 is_blx = FALSE;
4094 is_bl = TRUE;
4095 }
4096
4097 if (is_blx)
81694485 4098 pc_for_insn &= ~ ((bfd_vma) 3);
48229727
JB		 4099
4100 /* If we found a relocation, use the proper destination,
4101 not the offset in the (unrelocated) instruction.
4102 Note this is always done if we switched the stub type
4103 above. */
4104 if (found)
81694485
NC		 4105 offset =
4106 (bfd_signed_vma) (found->destination - pc_for_insn);
48229727
JB		 4107
4108 target = pc_for_insn + offset;
4109
4110 /* The BLX stub is ARM-mode code. Adjust the offset to
4111 take the different PC value (+8 instead of +4) into
4112 account. */
4113 if (stub_type == arm_stub_a8_veneer_blx)
4114 offset += 4;
4115
4116 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4117 {
eb7c4339 4118 char *stub_name = NULL;
48229727
JB		 4119
4120 if (num_a8_fixes == a8_fix_table_size)
4121 {
4122 a8_fix_table_size *= 2;
4123 a8_fixes = bfd_realloc (a8_fixes,
4124 sizeof (struct a8_erratum_fix)
4125 * a8_fix_table_size);
4126 }
4127
eb7c4339
NS		 4128 if (num_a8_fixes < prev_num_a8_fixes)
4129 {
4130 /* If we're doing a subsequent scan,
4131 check if we've found the same fix as
4132 before, and try and reuse the stub
4133 name. */
4134 stub_name = a8_fixes[num_a8_fixes].stub_name;
4135 if ((a8_fixes[num_a8_fixes].section != section)
4136 || (a8_fixes[num_a8_fixes].offset != i))
4137 {
4138 free (stub_name);
4139 stub_name = NULL;
4140 *stub_changed_p = TRUE;
4141 }
4142 }
4143
4144 if (!stub_name)
4145 {
4146 stub_name = bfd_malloc (8 + 1 + 8 + 1);
4147 if (stub_name != NULL)
4148 sprintf (stub_name, "%x:%x", section->id, i);
4149 }
48229727
JB		 4150
4151 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4152 a8_fixes[num_a8_fixes].section = section;
4153 a8_fixes[num_a8_fixes].offset = i;
4154 a8_fixes[num_a8_fixes].addend = offset;
4155 a8_fixes[num_a8_fixes].orig_insn = insn;
4156 a8_fixes[num_a8_fixes].stub_name = stub_name;
4157 a8_fixes[num_a8_fixes].stub_type = stub_type;
4158
4159 num_a8_fixes++;
4160 }
4161 }
4162 }
4163
4164 i += insn_32bit ? 4 : 2;
4165 last_was_32bit = insn_32bit;
4166 last_was_branch = is_32bit_branch;
4167 }
4168 }
4169
4170 if (elf_section_data (section)->this_hdr.contents == NULL)
4171 free (contents);
4172 }
4173
4174 *a8_fixes_p = a8_fixes;
4175 *num_a8_fixes_p = num_a8_fixes;
4176 *a8_fix_table_size_p = a8_fix_table_size;
4177
81694485 4178 return FALSE;
48229727
JB		 4179}
4180
906e58ca
NC		 4181/* Determine and set the size of the stub section for a final link.
4182
4183 The basic idea here is to examine all the relocations looking for
4184 PC-relative calls to a target that is unreachable with a "bl"
4185 instruction. */
4186
4187bfd_boolean
4188elf32_arm_size_stubs (bfd *output_bfd,
4189 bfd *stub_bfd,
4190 struct bfd_link_info *info,
4191 bfd_signed_vma group_size,
4192 asection * (*add_stub_section) (const char *, asection *),
4193 void (*layout_sections_again) (void))
4194{
4195 bfd_size_type stub_group_size;
07d72278 4196 bfd_boolean stubs_always_after_branch;
906e58ca 4197 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
48229727 4198 struct a8_erratum_fix *a8_fixes = NULL;
eb7c4339 4199 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
48229727
JB		 4200 struct a8_erratum_reloc *a8_relocs = NULL;
4201 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4202
4203 if (htab->fix_cortex_a8)
4204 {
4205 a8_fixes = bfd_zmalloc (sizeof (struct a8_erratum_fix)
4206 * a8_fix_table_size);
4207 a8_relocs = bfd_zmalloc (sizeof (struct a8_erratum_reloc)
4208 * a8_reloc_table_size);
4209 }
906e58ca
NC		 4210
4211 /* Propagate mach to stub bfd, because it may not have been
4212 finalized when we created stub_bfd. */
4213 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4214 bfd_get_mach (output_bfd));
4215
4216 /* Stash our params away. */
4217 htab->stub_bfd = stub_bfd;
4218 htab->add_stub_section = add_stub_section;
4219 htab->layout_sections_again = layout_sections_again;
07d72278 4220 stubs_always_after_branch = group_size < 0;
48229727
JB		 4221
4222 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4223 as the first half of a 32-bit branch straddling two 4K pages. This is a
4224 crude way of enforcing that. */
4225 if (htab->fix_cortex_a8)
4226 stubs_always_after_branch = 1;
4227
906e58ca
NC		 4228 if (group_size < 0)
4229 stub_group_size = -group_size;
4230 else
4231 stub_group_size = group_size;
4232
4233 if (stub_group_size == 1)
4234 {
4235 /* Default values. */
4236 /* Thumb branch range is +-4MB has to be used as the default
4237 maximum size (a given section can contain both ARM and Thumb
4238 code, so the worst case has to be taken into account).
4239
4240 This value is 24K less than that, which allows for 2025
4241 12-byte stubs. If we exceed that, then we will fail to link.
4242 The user will have to relink with an explicit group size
4243 option. */
4244 stub_group_size = 4170000;
4245 }
4246
07d72278 4247 group_sections (htab, stub_group_size, stubs_always_after_branch);
906e58ca 4248
3ae046cc
NS		 4249 /* If we're applying the cortex A8 fix, we need to determine the
4250 program header size now, because we cannot change it later --
4251 that could alter section placements. Notice the A8 erratum fix
4252 ends up requiring the section addresses to remain unchanged
4253 modulo the page size. That's something we cannot represent
4254 inside BFD, and we don't want to force the section alignment to
4255 be the page size. */
4256 if (htab->fix_cortex_a8)
4257 (*htab->layout_sections_again) ();
4258
906e58ca
NC		 4259 while (1)
4260 {
4261 bfd *input_bfd;
4262 unsigned int bfd_indx;
4263 asection *stub_sec;
eb7c4339
NS		 4264 bfd_boolean stub_changed = FALSE;
4265 unsigned prev_num_a8_fixes = num_a8_fixes;
906e58ca 4266
48229727 4267 num_a8_fixes = 0;
906e58ca
NC		 4268 for (input_bfd = info->input_bfds, bfd_indx = 0;
4269 input_bfd != NULL;
4270 input_bfd = input_bfd->link_next, bfd_indx++)
4271 {
4272 Elf_Internal_Shdr *symtab_hdr;
4273 asection *section;
4274 Elf_Internal_Sym *local_syms = NULL;
4275
48229727
JB		 4276 num_a8_relocs = 0;
4277
906e58ca
NC		 4278 /* We'll need the symbol table in a second. */
4279 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4280 if (symtab_hdr->sh_info == 0)
4281 continue;
4282
4283 /* Walk over each section attached to the input bfd. */
4284 for (section = input_bfd->sections;
4285 section != NULL;
4286 section = section->next)
4287 {
4288 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
4289
4290 /* If there aren't any relocs, then there's nothing more
4291 to do. */
4292 if ((section->flags & SEC_RELOC) == 0
4293 || section->reloc_count == 0
4294 || (section->flags & SEC_CODE) == 0)
4295 continue;
4296
4297 /* If this section is a link-once section that will be
4298 discarded, then don't create any stubs. */
4299 if (section->output_section == NULL
4300 || section->output_section->owner != output_bfd)
4301 continue;
4302
4303 /* Get the relocs. */
4304 internal_relocs
4305 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
4306 NULL, info->keep_memory);
4307 if (internal_relocs == NULL)
4308 goto error_ret_free_local;
4309
4310 /* Now examine each relocation. */
4311 irela = internal_relocs;
4312 irelaend = irela + section->reloc_count;
4313 for (; irela < irelaend; irela++)
4314 {
4315 unsigned int r_type, r_indx;
4316 enum elf32_arm_stub_type stub_type;
4317 struct elf32_arm_stub_hash_entry *stub_entry;
4318 asection *sym_sec;
4319 bfd_vma sym_value;
4320 bfd_vma destination;
4321 struct elf32_arm_link_hash_entry *hash;
7413f23f 4322 const char *sym_name;
906e58ca
NC		 4323 char *stub_name;
4324 const asection *id_sec;
4325 unsigned char st_type;
48229727 4326 bfd_boolean created_stub = FALSE;
906e58ca
NC		 4327
4328 r_type = ELF32_R_TYPE (irela->r_info);
4329 r_indx = ELF32_R_SYM (irela->r_info);
4330
4331 if (r_type >= (unsigned int) R_ARM_max)
4332 {
4333 bfd_set_error (bfd_error_bad_value);
4334 error_ret_free_internal:
4335 if (elf_section_data (section)->relocs == NULL)
4336 free (internal_relocs);
4337 goto error_ret_free_local;
4338 }
4339
155d87d7 4340 /* Only look for stubs on branch instructions. */
906e58ca 4341 if ((r_type != (unsigned int) R_ARM_CALL)
155d87d7
CL		 4342 && (r_type != (unsigned int) R_ARM_THM_CALL)
4343 && (r_type != (unsigned int) R_ARM_JUMP24)
48229727
JB		 4344 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
4345 && (r_type != (unsigned int) R_ARM_THM_XPC22)
155d87d7
CL		 4346 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
4347 && (r_type != (unsigned int) R_ARM_PLT32))
906e58ca
NC		 4348 continue;
4349
4350 /* Now determine the call target, its name, value,
4351 section. */
4352 sym_sec = NULL;
4353 sym_value = 0;
4354 destination = 0;
4355 hash = NULL;
7413f23f 4356 sym_name = NULL;
906e58ca
NC		 4357 if (r_indx < symtab_hdr->sh_info)
4358 {
4359 /* It's a local symbol. */
4360 Elf_Internal_Sym *sym;
4361 Elf_Internal_Shdr *hdr;
4362
4363 if (local_syms == NULL)
4364 {
4365 local_syms
4366 = (Elf_Internal_Sym *) symtab_hdr->contents;
4367 if (local_syms == NULL)
4368 local_syms
4369 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
4370 symtab_hdr->sh_info, 0,
4371 NULL, NULL, NULL);
4372 if (local_syms == NULL)
4373 goto error_ret_free_internal;
4374 }
4375
4376 sym = local_syms + r_indx;
4377 hdr = elf_elfsections (input_bfd)[sym->st_shndx];
4378 sym_sec = hdr->bfd_section;
4379 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
4380 sym_value = sym->st_value;
4381 destination = (sym_value + irela->r_addend
4382 + sym_sec->output_offset
4383 + sym_sec->output_section->vma);
4384 st_type = ELF_ST_TYPE (sym->st_info);
7413f23f
DJ		 4385 sym_name
4386 = bfd_elf_string_from_elf_section (input_bfd,
4387 symtab_hdr->sh_link,
4388 sym->st_name);
906e58ca
NC		 4389 }
4390 else
4391 {
4392 /* It's an external symbol. */
4393 int e_indx;
4394
4395 e_indx = r_indx - symtab_hdr->sh_info;
4396 hash = ((struct elf32_arm_link_hash_entry *)
4397 elf_sym_hashes (input_bfd)[e_indx]);
4398
4399 while (hash->root.root.type == bfd_link_hash_indirect
4400 || hash->root.root.type == bfd_link_hash_warning)
4401 hash = ((struct elf32_arm_link_hash_entry *)
4402 hash->root.root.u.i.link);
4403
4404 if (hash->root.root.type == bfd_link_hash_defined
4405 || hash->root.root.type == bfd_link_hash_defweak)
4406 {
4407 sym_sec = hash->root.root.u.def.section;
4408 sym_value = hash->root.root.u.def.value;
022f8312
CL		 4409
4410 struct elf32_arm_link_hash_table *globals =
4411 elf32_arm_hash_table (info);
4412
4413 /* For a destination in a shared library,
4414 use the PLT stub as target address to
4415 decide whether a branch stub is
4416 needed. */
4417 if (globals->splt != NULL && hash != NULL
4418 && hash->root.plt.offset != (bfd_vma) -1)
4419 {
4420 sym_sec = globals->splt;
4421 sym_value = hash->root.plt.offset;
4422 if (sym_sec->output_section != NULL)
4423 destination = (sym_value
4424 + sym_sec->output_offset
4425 + sym_sec->output_section->vma);
4426 }
4427 else if (sym_sec->output_section != NULL)
906e58ca
NC		 4428 destination = (sym_value + irela->r_addend
4429 + sym_sec->output_offset
4430 + sym_sec->output_section->vma);
4431 }
69c5861e
CL		 4432 else if ((hash->root.root.type == bfd_link_hash_undefined)
4433 || (hash->root.root.type == bfd_link_hash_undefweak))
4434 {
4435 /* For a shared library, use the PLT stub as
4436 target address to decide whether a long
4437 branch stub is needed.
4438 For absolute code, they cannot be handled. */
4439 struct elf32_arm_link_hash_table *globals =
4440 elf32_arm_hash_table (info);
4441
4442 if (globals->splt != NULL && hash != NULL
4443 && hash->root.plt.offset != (bfd_vma) -1)
4444 {
4445 sym_sec = globals->splt;
4446 sym_value = hash->root.plt.offset;
4447 if (sym_sec->output_section != NULL)
4448 destination = (sym_value
4449 + sym_sec->output_offset
4450 + sym_sec->output_section->vma);
4451 }
4452 else
4453 continue;
4454 }
906e58ca
NC		 4455 else
4456 {
4457 bfd_set_error (bfd_error_bad_value);
4458 goto error_ret_free_internal;
4459 }
4460 st_type = ELF_ST_TYPE (hash->root.type);
7413f23f 4461 sym_name = hash->root.root.root.string;
906e58ca
NC		 4462 }
4463
48229727 4464 do
7413f23f 4465 {
48229727
JB		 4466 /* Determine what (if any) linker stub is needed. */
4467 stub_type = arm_type_of_stub (info, section, irela,
4468 st_type, hash,
4469 destination, sym_sec,
4470 input_bfd, sym_name);
4471 if (stub_type == arm_stub_none)
4472 break;
4473
4474 /* Support for grouping stub sections. */
4475 id_sec = htab->stub_group[section->id].link_sec;
4476
4477 /* Get the name of this stub. */
4478 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
4479 irela);
4480 if (!stub_name)
4481 goto error_ret_free_internal;
4482
4483 /* We've either created a stub for this reloc already,
4484 or we are about to. */
4485 created_stub = TRUE;
4486
4487 stub_entry = arm_stub_hash_lookup
4488 (&htab->stub_hash_table, stub_name,
4489 FALSE, FALSE);
4490 if (stub_entry != NULL)
4491 {
4492 /* The proper stub has already been created. */
4493 free (stub_name);
eb7c4339 4494 stub_entry->target_value = sym_value;
48229727
JB		 4495 break;
4496 }
7413f23f 4497
48229727
JB		 4498 stub_entry = elf32_arm_add_stub (stub_name, section,
4499 htab);
4500 if (stub_entry == NULL)
4501 {
4502 free (stub_name);
4503 goto error_ret_free_internal;
4504 }
7413f23f 4505
48229727
JB		 4506 stub_entry->target_value = sym_value;
4507 stub_entry->target_section = sym_sec;
4508 stub_entry->stub_type = stub_type;
4509 stub_entry->h = hash;
4510 stub_entry->st_type = st_type;
4511
4512 if (sym_name == NULL)
4513 sym_name = "unnamed";
4514 stub_entry->output_name
4515 = bfd_alloc (htab->stub_bfd,
4516 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
4517 + strlen (sym_name));
4518 if (stub_entry->output_name == NULL)
4519 {
4520 free (stub_name);
4521 goto error_ret_free_internal;
4522 }
4523
4524 /* For historical reasons, use the existing names for
4525 ARM-to-Thumb and Thumb-to-ARM stubs. */
4526 if ( ((r_type == (unsigned int) R_ARM_THM_CALL)
4527 || (r_type == (unsigned int) R_ARM_THM_JUMP24))
4528 && st_type != STT_ARM_TFUNC)
4529 sprintf (stub_entry->output_name,
4530 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
4531 else if ( ((r_type == (unsigned int) R_ARM_CALL)
4532 || (r_type == (unsigned int) R_ARM_JUMP24))
4533 && st_type == STT_ARM_TFUNC)
4534 sprintf (stub_entry->output_name,
4535 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
4536 else
4537 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
4538 sym_name);
4539
4540 stub_changed = TRUE;
4541 }
4542 while (0);
4543
4544 /* Look for relocations which might trigger Cortex-A8
4545 erratum. */
4546 if (htab->fix_cortex_a8
4547 && (r_type == (unsigned int) R_ARM_THM_JUMP24
4548 || r_type == (unsigned int) R_ARM_THM_JUMP19
4549 || r_type == (unsigned int) R_ARM_THM_CALL
4550 || r_type == (unsigned int) R_ARM_THM_XPC22))
4551 {
4552 bfd_vma from = section->output_section->vma
4553 + section->output_offset
4554 + irela->r_offset;
4555
4556 if ((from & 0xfff) == 0xffe)
4557 {
4558 /* Found a candidate. Note we haven't checked the
4559 destination is within 4K here: if we do so (and
4560 don't create an entry in a8_relocs) we can't tell
4561 that a branch should have been relocated when
4562 scanning later. */
4563 if (num_a8_relocs == a8_reloc_table_size)
4564 {
4565 a8_reloc_table_size *= 2;
4566 a8_relocs = bfd_realloc (a8_relocs,
4567 sizeof (struct a8_erratum_reloc)
4568 * a8_reloc_table_size);
4569 }
4570
4571 a8_relocs[num_a8_relocs].from = from;
4572 a8_relocs[num_a8_relocs].destination = destination;
4573 a8_relocs[num_a8_relocs].r_type = r_type;
4574 a8_relocs[num_a8_relocs].st_type = st_type;
4575 a8_relocs[num_a8_relocs].sym_name = sym_name;
4576 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
4577
4578 num_a8_relocs++;
4579 }
4580 }
906e58ca
NC		 4581 }
4582
48229727
JB		 4583 /* We're done with the internal relocs, free them. */
4584 if (elf_section_data (section)->relocs == NULL)
4585 free (internal_relocs);
4586 }
4587
4588 if (htab->fix_cortex_a8)
4589 {
4590 /* Sort relocs which might apply to Cortex-A8 erratum. */
eb7c4339
NS		 4591 qsort (a8_relocs, num_a8_relocs,
4592 sizeof (struct a8_erratum_reloc),
48229727
JB		 4593 &a8_reloc_compare);
4594
4595 /* Scan for branches which might trigger Cortex-A8 erratum. */
4596 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
4597 &num_a8_fixes, &a8_fix_table_size,
eb7c4339
NS		 4598 a8_relocs, num_a8_relocs,
4599 prev_num_a8_fixes, &stub_changed)
4600 != 0)
48229727 4601 goto error_ret_free_local;
5e681ec4 4602 }
5e681ec4
PB		 4603 }
4604
eb7c4339 4605 if (prev_num_a8_fixes != num_a8_fixes)
48229727
JB		 4606 stub_changed = TRUE;
4607
906e58ca
NC		 4608 if (!stub_changed)
4609 break;
5e681ec4 4610
906e58ca
NC		 4611 /* OK, we've added some stubs. Find out the new size of the
4612 stub sections. */
4613 for (stub_sec = htab->stub_bfd->sections;
4614 stub_sec != NULL;
4615 stub_sec = stub_sec->next)
3e6b1042
DJ		 4616 {
4617 /* Ignore non-stub sections. */
4618 if (!strstr (stub_sec->name, STUB_SUFFIX))
4619 continue;
4620
4621 stub_sec->size = 0;
4622 }
b34b2d70 4623
906e58ca
NC		 4624 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
4625
48229727
JB		 4626 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
4627 if (htab->fix_cortex_a8)
4628 for (i = 0; i < num_a8_fixes; i++)
4629 {
4630 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
4631 a8_fixes[i].section, htab);
4632
4633 if (stub_sec == NULL)
4634 goto error_ret_free_local;
4635
4636 stub_sec->size
4637 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
4638 NULL);
4639 }
4640
4641
906e58ca
NC		 4642 /* Ask the linker to do its stuff. */
4643 (*htab->layout_sections_again) ();
ba93b8ac
DJ		 4644 }
4645
48229727
JB		 4646 /* Add stubs for Cortex-A8 erratum fixes now. */
4647 if (htab->fix_cortex_a8)
4648 {
4649 for (i = 0; i < num_a8_fixes; i++)
4650 {
4651 struct elf32_arm_stub_hash_entry *stub_entry;
4652 char *stub_name = a8_fixes[i].stub_name;
4653 asection *section = a8_fixes[i].section;
4654 unsigned int section_id = a8_fixes[i].section->id;
4655 asection *link_sec = htab->stub_group[section_id].link_sec;
4656 asection *stub_sec = htab->stub_group[section_id].stub_sec;
4657 const insn_sequence *template;
4658 int template_size, size = 0;
4659
4660 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4661 TRUE, FALSE);
4662 if (stub_entry == NULL)
4663 {
4664 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
4665 section->owner,
4666 stub_name);
4667 return FALSE;
4668 }
4669
4670 stub_entry->stub_sec = stub_sec;
4671 stub_entry->stub_offset = 0;
4672 stub_entry->id_sec = link_sec;
4673 stub_entry->stub_type = a8_fixes[i].stub_type;
4674 stub_entry->target_section = a8_fixes[i].section;
4675 stub_entry->target_value = a8_fixes[i].offset;
4676 stub_entry->target_addend = a8_fixes[i].addend;
4677 stub_entry->orig_insn = a8_fixes[i].orig_insn;
4678 stub_entry->st_type = STT_ARM_TFUNC;
4679
4680 size = find_stub_size_and_template (a8_fixes[i].stub_type, &template,
4681 &template_size);
4682
4683 stub_entry->stub_size = size;
4684 stub_entry->stub_template = template;
4685 stub_entry->stub_template_size = template_size;
4686 }
4687
4688 /* Stash the Cortex-A8 erratum fix array for use later in
4689 elf32_arm_write_section(). */
4690 htab->a8_erratum_fixes = a8_fixes;
4691 htab->num_a8_erratum_fixes = num_a8_fixes;
4692 }
4693 else
4694 {
4695 htab->a8_erratum_fixes = NULL;
4696 htab->num_a8_erratum_fixes = 0;
4697 }
906e58ca
NC		 4698 return TRUE;
4699
4700 error_ret_free_local:
4701 return FALSE;
5e681ec4
PB		 4702}
4703
906e58ca
NC		 4704/* Build all the stubs associated with the current output file. The
4705 stubs are kept in a hash table attached to the main linker hash
4706 table. We also set up the .plt entries for statically linked PIC
4707 functions here. This function is called via arm_elf_finish in the
4708 linker. */
252b5132 4709
906e58ca
NC		 4710bfd_boolean
4711elf32_arm_build_stubs (struct bfd_link_info *info)
252b5132 4712{
906e58ca
NC		 4713 asection *stub_sec;
4714 struct bfd_hash_table *table;
4715 struct elf32_arm_link_hash_table *htab;
252b5132 4716
906e58ca 4717 htab = elf32_arm_hash_table (info);
252b5132 4718
906e58ca
NC		 4719 for (stub_sec = htab->stub_bfd->sections;
4720 stub_sec != NULL;
4721 stub_sec = stub_sec->next)
252b5132 4722 {
906e58ca
NC		 4723 bfd_size_type size;
4724
8029a119 4725 /* Ignore non-stub sections. */
906e58ca
NC		 4726 if (!strstr (stub_sec->name, STUB_SUFFIX))
4727 continue;
4728
4729 /* Allocate memory to hold the linker stubs. */
4730 size = stub_sec->size;
4731 stub_sec->contents = bfd_zalloc (htab->stub_bfd, size);
4732 if (stub_sec->contents == NULL && size != 0)
4733 return FALSE;
4734 stub_sec->size = 0;
252b5132
RH		 4735 }
4736
906e58ca
NC		 4737 /* Build the stubs as directed by the stub hash table. */
4738 table = &htab->stub_hash_table;
4739 bfd_hash_traverse (table, arm_build_one_stub, info);
eb7c4339
NS		 4740 if (htab->fix_cortex_a8)
4741 {
4742 /* Place the cortex a8 stubs last. */
4743 htab->fix_cortex_a8 = -1;
4744 bfd_hash_traverse (table, arm_build_one_stub, info);
4745 }
252b5132 4746
906e58ca 4747 return TRUE;
252b5132
RH		 4748}
4749
9b485d32
NC		 4750/* Locate the Thumb encoded calling stub for NAME. */
4751
252b5132 4752static struct elf_link_hash_entry *
57e8b36a
NC		 4753find_thumb_glue (struct bfd_link_info *link_info,
4754 const char *name,
f2a9dd69 4755 char **error_message)
252b5132
RH		 4756{
4757 char *tmp_name;
4758 struct elf_link_hash_entry *hash;
4759 struct elf32_arm_link_hash_table *hash_table;
4760
4761 /* We need a pointer to the armelf specific hash table. */
4762 hash_table = elf32_arm_hash_table (link_info);
4763
57e8b36a
NC		 4764 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
4765 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4766
4767 BFD_ASSERT (tmp_name);
4768
4769 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
4770
4771 hash = elf_link_hash_lookup
b34976b6 4772 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4773
b1657152
AM		 4774 if (hash == NULL
4775 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
4776 tmp_name, name) == -1)
4777 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4778
4779 free (tmp_name);
4780
4781 return hash;
4782}
4783
9b485d32
NC		 4784/* Locate the ARM encoded calling stub for NAME. */
4785
252b5132 4786static struct elf_link_hash_entry *
57e8b36a
NC		 4787find_arm_glue (struct bfd_link_info *link_info,
4788 const char *name,
f2a9dd69 4789 char **error_message)
252b5132
RH		 4790{
4791 char *tmp_name;
4792 struct elf_link_hash_entry *myh;
4793 struct elf32_arm_link_hash_table *hash_table;
4794
4795 /* We need a pointer to the elfarm specific hash table. */
4796 hash_table = elf32_arm_hash_table (link_info);
4797
57e8b36a
NC		 4798 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
4799 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4800
4801 BFD_ASSERT (tmp_name);
4802
4803 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
4804
4805 myh = elf_link_hash_lookup
b34976b6 4806 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4807
b1657152
AM		 4808 if (myh == NULL
4809 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
4810 tmp_name, name) == -1)
4811 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4812
4813 free (tmp_name);
4814
4815 return myh;
4816}
4817
8f6277f5 4818/* ARM->Thumb glue (static images):
252b5132
RH		 4819
4820 .arm
4821 __func_from_arm:
4822 ldr r12, __func_addr
4823 bx r12
4824 __func_addr:
906e58ca 4825 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 4826
26079076
PB		 4827 (v5t static images)
4828 .arm
4829 __func_from_arm:
4830 ldr pc, __func_addr
4831 __func_addr:
906e58ca 4832 .word func @ behave as if you saw a ARM_32 reloc.
26079076 4833
8f6277f5
PB		 4834 (relocatable images)
4835 .arm
4836 __func_from_arm:
4837 ldr r12, __func_offset
4838 add r12, r12, pc
4839 bx r12
4840 __func_offset:
8029a119 4841 .word func - . */
8f6277f5
PB		 4842
4843#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 4844static const insn32 a2t1_ldr_insn = 0xe59fc000;
4845static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
4846static const insn32 a2t3_func_addr_insn = 0x00000001;
4847
26079076
PB		 4848#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
4849static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
4850static const insn32 a2t2v5_func_addr_insn = 0x00000001;
4851
8f6277f5
PB		 4852#define ARM2THUMB_PIC_GLUE_SIZE 16
4853static const insn32 a2t1p_ldr_insn = 0xe59fc004;
4854static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
4855static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
4856
9b485d32 4857/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132 4858
8029a119
NC		 4859 .thumb .thumb
4860 .align 2 .align 2
4861 __func_from_thumb: __func_from_thumb:
4862 bx pc push {r6, lr}
4863 nop ldr r6, __func_addr
4864 .arm mov lr, pc
4865 b func bx r6
fcef9eb7
NC		 4866 .arm
4867 ;; back_to_thumb
4868 ldmia r13! {r6, lr}
4869 bx lr
8029a119
NC		 4870 __func_addr:
4871 .word func */
252b5132
RH		 4872
4873#define THUMB2ARM_GLUE_SIZE 8
4874static const insn16 t2a1_bx_pc_insn = 0x4778;
4875static const insn16 t2a2_noop_insn = 0x46c0;
4876static const insn32 t2a3_b_insn = 0xea000000;
4877
c7b8f16e
JB		 4878#define VFP11_ERRATUM_VENEER_SIZE 8
4879
845b51d6
PB		 4880#define ARM_BX_VENEER_SIZE 12
4881static const insn32 armbx1_tst_insn = 0xe3100001;
4882static const insn32 armbx2_moveq_insn = 0x01a0f000;
4883static const insn32 armbx3_bx_insn = 0xe12fff10;
4884
7e392df6 4885#ifndef ELFARM_NABI_C_INCLUDED
8029a119
NC		 4886static void
4887arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
252b5132
RH		 4888{
4889 asection * s;
8029a119 4890 bfd_byte * contents;
252b5132 4891
8029a119 4892 if (size == 0)
3e6b1042
DJ		 4893 {
4894 /* Do not include empty glue sections in the output. */
4895 if (abfd != NULL)
4896 {
4897 s = bfd_get_section_by_name (abfd, name);
4898 if (s != NULL)
4899 s->flags |= SEC_EXCLUDE;
4900 }
4901 return;
4902 }
252b5132 4903
8029a119 4904 BFD_ASSERT (abfd != NULL);
252b5132 4905
8029a119
NC		 4906 s = bfd_get_section_by_name (abfd, name);
4907 BFD_ASSERT (s != NULL);
252b5132 4908
8029a119 4909 contents = bfd_alloc (abfd, size);
252b5132 4910
8029a119
NC		 4911 BFD_ASSERT (s->size == size);
4912 s->contents = contents;
4913}
906e58ca 4914
8029a119
NC		 4915bfd_boolean
4916bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
4917{
4918 struct elf32_arm_link_hash_table * globals;
906e58ca 4919
8029a119
NC		 4920 globals = elf32_arm_hash_table (info);
4921 BFD_ASSERT (globals != NULL);
906e58ca 4922
8029a119
NC		 4923 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4924 globals->arm_glue_size,
4925 ARM2THUMB_GLUE_SECTION_NAME);
906e58ca 4926
8029a119
NC		 4927 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4928 globals->thumb_glue_size,
4929 THUMB2ARM_GLUE_SECTION_NAME);
252b5132 4930
8029a119
NC		 4931 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4932 globals->vfp11_erratum_glue_size,
4933 VFP11_ERRATUM_VENEER_SECTION_NAME);
845b51d6 4934
8029a119
NC		 4935 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4936 globals->bx_glue_size,
845b51d6
PB		 4937 ARM_BX_GLUE_SECTION_NAME);
4938
b34976b6 4939 return TRUE;
252b5132
RH		 4940}
4941
a4fd1a8e 4942/* Allocate space and symbols for calling a Thumb function from Arm mode.
906e58ca
NC		 4943 returns the symbol identifying the stub. */
4944
a4fd1a8e 4945static struct elf_link_hash_entry *
57e8b36a
NC		 4946record_arm_to_thumb_glue (struct bfd_link_info * link_info,
4947 struct elf_link_hash_entry * h)
252b5132
RH		 4948{
4949 const char * name = h->root.root.string;
63b0f745 4950 asection * s;
252b5132
RH		 4951 char * tmp_name;
4952 struct elf_link_hash_entry * myh;
14a793b2 4953 struct bfd_link_hash_entry * bh;
252b5132 4954 struct elf32_arm_link_hash_table * globals;
dc810e39 4955 bfd_vma val;
2f475487 4956 bfd_size_type size;
252b5132
RH		 4957
4958 globals = elf32_arm_hash_table (link_info);
4959
4960 BFD_ASSERT (globals != NULL);
4961 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4962
4963 s = bfd_get_section_by_name
4964 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
4965
252b5132
RH		 4966 BFD_ASSERT (s != NULL);
4967
57e8b36a 4968 tmp_name = bfd_malloc ((bfd_size_type) strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4969
4970 BFD_ASSERT (tmp_name);
4971
4972 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
4973
4974 myh = elf_link_hash_lookup
b34976b6 4975 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 4976
4977 if (myh != NULL)
4978 {
9b485d32 4979 /* We've already seen this guy. */
252b5132 4980 free (tmp_name);
a4fd1a8e 4981 return myh;
252b5132
RH		 4982 }
4983
57e8b36a
NC		 4984 /* The only trick here is using hash_table->arm_glue_size as the value.
4985 Even though the section isn't allocated yet, this is where we will be
3dccd7b7
DJ		 4986 putting it. The +1 on the value marks that the stub has not been
4987 output yet - not that it is a Thumb function. */
14a793b2 4988 bh = NULL;
dc810e39
AM		 4989 val = globals->arm_glue_size + 1;
4990 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
4991 tmp_name, BSF_GLOBAL, s, val,
b34976b6 4992 NULL, TRUE, FALSE, &bh);
252b5132 4993
b7693d02
DJ		 4994 myh = (struct elf_link_hash_entry *) bh;
4995 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
4996 myh->forced_local = 1;
4997
252b5132
RH		 4998 free (tmp_name);
4999
27e55c4d
PB		 5000 if (link_info->shared || globals->root.is_relocatable_executable
5001 || globals->pic_veneer)
2f475487 5002 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 5003 else if (globals->use_blx)
5004 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 5005 else
2f475487
AM		 5006 size = ARM2THUMB_STATIC_GLUE_SIZE;
5007
5008 s->size += size;
5009 globals->arm_glue_size += size;
252b5132 5010
a4fd1a8e 5011 return myh;
252b5132
RH		 5012}
5013
845b51d6
PB		 5014/* Allocate space for ARMv4 BX veneers. */
5015
5016static void
5017record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5018{
5019 asection * s;
5020 struct elf32_arm_link_hash_table *globals;
5021 char *tmp_name;
5022 struct elf_link_hash_entry *myh;
5023 struct bfd_link_hash_entry *bh;
5024 bfd_vma val;
5025
5026 /* BX PC does not need a veneer. */
5027 if (reg == 15)
5028 return;
5029
5030 globals = elf32_arm_hash_table (link_info);
5031
5032 BFD_ASSERT (globals != NULL);
5033 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5034
5035 /* Check if this veneer has already been allocated. */
5036 if (globals->bx_glue_offset[reg])
5037 return;
5038
5039 s = bfd_get_section_by_name
5040 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5041
5042 BFD_ASSERT (s != NULL);
5043
5044 /* Add symbol for veneer. */
5045 tmp_name = bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
906e58ca 5046
845b51d6 5047 BFD_ASSERT (tmp_name);
906e58ca 5048
845b51d6 5049 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
906e58ca 5050
845b51d6
PB		 5051 myh = elf_link_hash_lookup
5052 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5053
845b51d6 5054 BFD_ASSERT (myh == NULL);
906e58ca 5055
845b51d6
PB		 5056 bh = NULL;
5057 val = globals->bx_glue_size;
5058 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5059 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5060 NULL, TRUE, FALSE, &bh);
5061
5062 myh = (struct elf_link_hash_entry *) bh;
5063 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5064 myh->forced_local = 1;
5065
5066 s->size += ARM_BX_VENEER_SIZE;
5067 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5068 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5069}
5070
5071
c7b8f16e
JB		 5072/* Add an entry to the code/data map for section SEC. */
5073
5074static void
5075elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5076{
5077 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5078 unsigned int newidx;
906e58ca 5079
c7b8f16e
JB		 5080 if (sec_data->map == NULL)
5081 {
5082 sec_data->map = bfd_malloc (sizeof (elf32_arm_section_map));
5083 sec_data->mapcount = 0;
5084 sec_data->mapsize = 1;
5085 }
906e58ca 5086
c7b8f16e 5087 newidx = sec_data->mapcount++;
906e58ca 5088
c7b8f16e
JB		 5089 if (sec_data->mapcount > sec_data->mapsize)
5090 {
5091 sec_data->mapsize *= 2;
515ef31d
NC		 5092 sec_data->map = bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5093 * sizeof (elf32_arm_section_map));
5094 }
5095
5096 if (sec_data->map)
5097 {
5098 sec_data->map[newidx].vma = vma;
5099 sec_data->map[newidx].type = type;
c7b8f16e 5100 }
c7b8f16e
JB		 5101}
5102
5103
5104/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5105 veneers are handled for now. */
5106
5107static bfd_vma
5108record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5109 elf32_vfp11_erratum_list *branch,
5110 bfd *branch_bfd,
5111 asection *branch_sec,
5112 unsigned int offset)
5113{
5114 asection *s;
5115 struct elf32_arm_link_hash_table *hash_table;
5116 char *tmp_name;
5117 struct elf_link_hash_entry *myh;
5118 struct bfd_link_hash_entry *bh;
5119 bfd_vma val;
5120 struct _arm_elf_section_data *sec_data;
5121 int errcount;
5122 elf32_vfp11_erratum_list *newerr;
906e58ca 5123
c7b8f16e 5124 hash_table = elf32_arm_hash_table (link_info);
906e58ca 5125
c7b8f16e
JB		 5126 BFD_ASSERT (hash_table != NULL);
5127 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
906e58ca 5128
c7b8f16e
JB		 5129 s = bfd_get_section_by_name
5130 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
906e58ca 5131
c7b8f16e 5132 sec_data = elf32_arm_section_data (s);
906e58ca 5133
c7b8f16e 5134 BFD_ASSERT (s != NULL);
906e58ca 5135
c7b8f16e
JB		 5136 tmp_name = bfd_malloc ((bfd_size_type) strlen
5137 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
906e58ca 5138
c7b8f16e 5139 BFD_ASSERT (tmp_name);
906e58ca 5140
c7b8f16e
JB		 5141 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5142 hash_table->num_vfp11_fixes);
906e58ca 5143
c7b8f16e
JB		 5144 myh = elf_link_hash_lookup
5145 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5146
c7b8f16e 5147 BFD_ASSERT (myh == NULL);
906e58ca 5148
c7b8f16e
JB		 5149 bh = NULL;
5150 val = hash_table->vfp11_erratum_glue_size;
5151 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5152 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5153 NULL, TRUE, FALSE, &bh);
5154
5155 myh = (struct elf_link_hash_entry *) bh;
5156 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5157 myh->forced_local = 1;
5158
5159 /* Link veneer back to calling location. */
5160 errcount = ++(sec_data->erratumcount);
5161 newerr = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
906e58ca 5162
c7b8f16e
JB		 5163 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5164 newerr->vma = -1;
5165 newerr->u.v.branch = branch;
5166 newerr->u.v.id = hash_table->num_vfp11_fixes;
5167 branch->u.b.veneer = newerr;
5168
5169 newerr->next = sec_data->erratumlist;
5170 sec_data->erratumlist = newerr;
5171
5172 /* A symbol for the return from the veneer. */
5173 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5174 hash_table->num_vfp11_fixes);
5175
5176 myh = elf_link_hash_lookup
5177 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5178
c7b8f16e
JB		 5179 if (myh != NULL)
5180 abort ();
5181
5182 bh = NULL;
5183 val = offset + 4;
5184 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5185 branch_sec, val, NULL, TRUE, FALSE, &bh);
906e58ca 5186
c7b8f16e
JB		 5187 myh = (struct elf_link_hash_entry *) bh;
5188 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5189 myh->forced_local = 1;
5190
5191 free (tmp_name);
906e58ca 5192
c7b8f16e
JB		 5193 /* Generate a mapping symbol for the veneer section, and explicitly add an
5194 entry for that symbol to the code/data map for the section. */
5195 if (hash_table->vfp11_erratum_glue_size == 0)
5196 {
5197 bh = NULL;
5198 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5199 ever requires this erratum fix. */
5200 _bfd_generic_link_add_one_symbol (link_info,
5201 hash_table->bfd_of_glue_owner, "$a",
5202 BSF_LOCAL, s, 0, NULL,
5203 TRUE, FALSE, &bh);
5204
5205 myh = (struct elf_link_hash_entry *) bh;
5206 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5207 myh->forced_local = 1;
906e58ca 5208
c7b8f16e
JB		 5209 /* The elf32_arm_init_maps function only cares about symbols from input
5210 BFDs. We must make a note of this generated mapping symbol
5211 ourselves so that code byteswapping works properly in
5212 elf32_arm_write_section. */
5213 elf32_arm_section_map_add (s, 'a', 0);
5214 }
906e58ca 5215
c7b8f16e
JB		 5216 s->size += VFP11_ERRATUM_VENEER_SIZE;
5217 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5218 hash_table->num_vfp11_fixes++;
906e58ca 5219
c7b8f16e
JB		 5220 /* The offset of the veneer. */
5221 return val;
5222}
5223
8029a119 5224#define ARM_GLUE_SECTION_FLAGS \
3e6b1042
DJ		 5225 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5226 | SEC_READONLY | SEC_LINKER_CREATED)
8029a119
NC		 5227
5228/* Create a fake section for use by the ARM backend of the linker. */
5229
5230static bfd_boolean
5231arm_make_glue_section (bfd * abfd, const char * name)
5232{
5233 asection * sec;
5234
5235 sec = bfd_get_section_by_name (abfd, name);
5236 if (sec != NULL)
5237 /* Already made. */
5238 return TRUE;
5239
5240 sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
5241
5242 if (sec == NULL
5243 || !bfd_set_section_alignment (abfd, sec, 2))
5244 return FALSE;
5245
5246 /* Set the gc mark to prevent the section from being removed by garbage
5247 collection, despite the fact that no relocs refer to this section. */
5248 sec->gc_mark = 1;
5249
5250 return TRUE;
5251}
5252
8afb0e02
NC		 5253/* Add the glue sections to ABFD. This function is called from the
5254 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 5255
b34976b6 5256bfd_boolean
57e8b36a
NC		 5257bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
5258 struct bfd_link_info *info)
252b5132 5259{
8afb0e02
NC		 5260 /* If we are only performing a partial
5261 link do not bother adding the glue. */
1049f94e 5262 if (info->relocatable)
b34976b6 5263 return TRUE;
252b5132 5264
8029a119
NC		 5265 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
5266 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
5267 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
5268 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
8afb0e02
NC		 5269}
5270
5271/* Select a BFD to be used to hold the sections used by the glue code.
5272 This function is called from the linker scripts in ld/emultempl/
8029a119 5273 {armelf/pe}.em. */
8afb0e02 5274
b34976b6 5275bfd_boolean
57e8b36a 5276bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 5277{
5278 struct elf32_arm_link_hash_table *globals;
5279
5280 /* If we are only performing a partial link
5281 do not bother getting a bfd to hold the glue. */
1049f94e 5282 if (info->relocatable)
b34976b6 5283 return TRUE;
8afb0e02 5284
b7693d02
DJ		 5285 /* Make sure we don't attach the glue sections to a dynamic object. */
5286 BFD_ASSERT (!(abfd->flags & DYNAMIC));
5287
8afb0e02
NC		 5288 globals = elf32_arm_hash_table (info);
5289
5290 BFD_ASSERT (globals != NULL);
5291
5292 if (globals->bfd_of_glue_owner != NULL)
b34976b6 5293 return TRUE;
8afb0e02 5294
252b5132
RH		 5295 /* Save the bfd for later use. */
5296 globals->bfd_of_glue_owner = abfd;
cedb70c5 5297
b34976b6 5298 return TRUE;
252b5132
RH		 5299}
5300
906e58ca
NC		 5301static void
5302check_use_blx (struct elf32_arm_link_hash_table *globals)
39b41c9c 5303{
104d59d1
JM		 5304 if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
5305 Tag_CPU_arch) > 2)
39b41c9c
PB		 5306 globals->use_blx = 1;
5307}
5308
b34976b6 5309bfd_boolean
57e8b36a 5310bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 5311 struct bfd_link_info *link_info)
252b5132
RH		 5312{
5313 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 5314 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 5315 Elf_Internal_Rela *irel, *irelend;
5316 bfd_byte *contents = NULL;
252b5132
RH		 5317
5318 asection *sec;
5319 struct elf32_arm_link_hash_table *globals;
5320
5321 /* If we are only performing a partial link do not bother
5322 to construct any glue. */
1049f94e 5323 if (link_info->relocatable)
b34976b6 5324 return TRUE;
252b5132 5325
39ce1a6a
NC		 5326 /* Here we have a bfd that is to be included on the link. We have a
5327 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132
RH		 5328 globals = elf32_arm_hash_table (link_info);
5329
5330 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 5331
5332 check_use_blx (globals);
252b5132 5333
d504ffc8 5334 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 5335 {
d003868e
AM		 5336 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
5337 abfd);
e489d0ae
PB		 5338 return FALSE;
5339 }
f21f3fe0 5340
39ce1a6a
NC		 5341 /* PR 5398: If we have not decided to include any loadable sections in
5342 the output then we will not have a glue owner bfd. This is OK, it
5343 just means that there is nothing else for us to do here. */
5344 if (globals->bfd_of_glue_owner == NULL)
5345 return TRUE;
5346
252b5132
RH		 5347 /* Rummage around all the relocs and map the glue vectors. */
5348 sec = abfd->sections;
5349
5350 if (sec == NULL)
b34976b6 5351 return TRUE;
252b5132
RH		 5352
5353 for (; sec != NULL; sec = sec->next)
5354 {
5355 if (sec->reloc_count == 0)
5356 continue;
5357
2f475487
AM		 5358 if ((sec->flags & SEC_EXCLUDE) != 0)
5359 continue;
5360
0ffa91dd 5361 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 5362
9b485d32 5363 /* Load the relocs. */
6cdc0ccc 5364 internal_relocs
906e58ca 5365 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
252b5132 5366
6cdc0ccc
AM		 5367 if (internal_relocs == NULL)
5368 goto error_return;
252b5132 5369
6cdc0ccc
AM		 5370 irelend = internal_relocs + sec->reloc_count;
5371 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 5372 {
5373 long r_type;
5374 unsigned long r_index;
252b5132
RH		 5375
5376 struct elf_link_hash_entry *h;
5377
5378 r_type = ELF32_R_TYPE (irel->r_info);
5379 r_index = ELF32_R_SYM (irel->r_info);
5380
9b485d32 5381 /* These are the only relocation types we care about. */
ba96a88f 5382 if ( r_type != R_ARM_PC24
845b51d6 5383 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 5384 continue;
5385
5386 /* Get the section contents if we haven't done so already. */
5387 if (contents == NULL)
5388 {
5389 /* Get cached copy if it exists. */
5390 if (elf_section_data (sec)->this_hdr.contents != NULL)
5391 contents = elf_section_data (sec)->this_hdr.contents;
5392 else
5393 {
5394 /* Go get them off disk. */
57e8b36a 5395 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 5396 goto error_return;
5397 }
5398 }
5399
845b51d6
PB		 5400 if (r_type == R_ARM_V4BX)
5401 {
5402 int reg;
5403
5404 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
5405 record_arm_bx_glue (link_info, reg);
5406 continue;
5407 }
5408
a7c10850 5409 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 5410 h = NULL;
5411
9b485d32 5412 /* We don't care about local symbols. */
252b5132
RH		 5413 if (r_index < symtab_hdr->sh_info)
5414 continue;
5415
9b485d32 5416 /* This is an external symbol. */
252b5132
RH		 5417 r_index -= symtab_hdr->sh_info;
5418 h = (struct elf_link_hash_entry *)
5419 elf_sym_hashes (abfd)[r_index];
5420
5421 /* If the relocation is against a static symbol it must be within
5422 the current section and so cannot be a cross ARM/Thumb relocation. */
5423 if (h == NULL)
5424 continue;
5425
d504ffc8
DJ		 5426 /* If the call will go through a PLT entry then we do not need
5427 glue. */
5428 if (globals->splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 5429 continue;
5430
252b5132
RH		 5431 switch (r_type)
5432 {
5433 case R_ARM_PC24:
5434 /* This one is a call from arm code. We need to look up
2f0ca46a 5435 the target of the call. If it is a thumb target, we
252b5132 5436 insert glue. */
ebe24dd4 5437 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
252b5132
RH		 5438 record_arm_to_thumb_glue (link_info, h);
5439 break;
5440
252b5132 5441 default:
c6596c5e 5442 abort ();
252b5132
RH		 5443 }
5444 }
6cdc0ccc
AM		 5445
5446 if (contents != NULL
5447 && elf_section_data (sec)->this_hdr.contents != contents)
5448 free (contents);
5449 contents = NULL;
5450
5451 if (internal_relocs != NULL
5452 && elf_section_data (sec)->relocs != internal_relocs)
5453 free (internal_relocs);
5454 internal_relocs = NULL;
252b5132
RH		 5455 }
5456
b34976b6 5457 return TRUE;
9a5aca8c 5458
252b5132 5459error_return:
6cdc0ccc
AM		 5460 if (contents != NULL
5461 && elf_section_data (sec)->this_hdr.contents != contents)
5462 free (contents);
5463 if (internal_relocs != NULL
5464 && elf_section_data (sec)->relocs != internal_relocs)
5465 free (internal_relocs);
9a5aca8c 5466
b34976b6 5467 return FALSE;
252b5132 5468}
7e392df6 5469#endif
252b5132 5470
eb043451 5471
c7b8f16e
JB		 5472/* Initialise maps of ARM/Thumb/data for input BFDs. */
5473
5474void
5475bfd_elf32_arm_init_maps (bfd *abfd)
5476{
5477 Elf_Internal_Sym *isymbuf;
5478 Elf_Internal_Shdr *hdr;
5479 unsigned int i, localsyms;
5480
af1f4419
NC		 5481 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
5482 if (! is_arm_elf (abfd))
5483 return;
5484
c7b8f16e
JB		 5485 if ((abfd->flags & DYNAMIC) != 0)
5486 return;
5487
0ffa91dd 5488 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 5489 localsyms = hdr->sh_info;
5490
5491 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
5492 should contain the number of local symbols, which should come before any
5493 global symbols. Mapping symbols are always local. */
5494 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
5495 NULL);
5496
5497 /* No internal symbols read? Skip this BFD. */
5498 if (isymbuf == NULL)
5499 return;
5500
5501 for (i = 0; i < localsyms; i++)
5502 {
5503 Elf_Internal_Sym *isym = &isymbuf[i];
5504 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
5505 const char *name;
906e58ca 5506
c7b8f16e
JB		 5507 if (sec != NULL
5508 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
5509 {
5510 name = bfd_elf_string_from_elf_section (abfd,
5511 hdr->sh_link, isym->st_name);
906e58ca 5512
c7b8f16e
JB		 5513 if (bfd_is_arm_special_symbol_name (name,
5514 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
5515 elf32_arm_section_map_add (sec, name[1], isym->st_value);
5516 }
5517 }
5518}
5519
5520
48229727
JB		 5521/* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
5522 say what they wanted. */
5523
5524void
5525bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
5526{
5527 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5528 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
5529
5530 if (globals->fix_cortex_a8 == -1)
5531 {
5532 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
5533 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
5534 && (out_attr[Tag_CPU_arch_profile].i == 'A'
5535 || out_attr[Tag_CPU_arch_profile].i == 0))
5536 globals->fix_cortex_a8 = 1;
5537 else
5538 globals->fix_cortex_a8 = 0;
5539 }
5540}
5541
5542
c7b8f16e
JB		 5543void
5544bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
5545{
5546 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 5547 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
906e58ca 5548
c7b8f16e
JB		 5549 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
5550 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
5551 {
5552 switch (globals->vfp11_fix)
5553 {
5554 case BFD_ARM_VFP11_FIX_DEFAULT:
5555 case BFD_ARM_VFP11_FIX_NONE:
5556 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5557 break;
906e58ca 5558
c7b8f16e
JB		 5559 default:
5560 /* Give a warning, but do as the user requests anyway. */
5561 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
5562 "workaround is not necessary for target architecture"), obfd);
5563 }
5564 }
5565 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
5566 /* For earlier architectures, we might need the workaround, but do not
5567 enable it by default. If users is running with broken hardware, they
5568 must enable the erratum fix explicitly. */
5569 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5570}
5571
5572
906e58ca
NC		 5573enum bfd_arm_vfp11_pipe
5574{
c7b8f16e
JB		 5575 VFP11_FMAC,
5576 VFP11_LS,
5577 VFP11_DS,
5578 VFP11_BAD
5579};
5580
5581/* Return a VFP register number. This is encoded as RX:X for single-precision
5582 registers, or X:RX for double-precision registers, where RX is the group of
5583 four bits in the instruction encoding and X is the single extension bit.
5584 RX and X fields are specified using their lowest (starting) bit. The return
5585 value is:
5586
5587 0...31: single-precision registers s0...s31
5588 32...63: double-precision registers d0...d31.
906e58ca 5589
c7b8f16e
JB		 5590 Although X should be zero for VFP11 (encoding d0...d15 only), we might
5591 encounter VFP3 instructions, so we allow the full range for DP registers. */
906e58ca 5592
c7b8f16e
JB		 5593static unsigned int
5594bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
5595 unsigned int x)
5596{
5597 if (is_double)
5598 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
5599 else
5600 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
5601}
5602
5603/* Set bits in *WMASK according to a register number REG as encoded by
5604 bfd_arm_vfp11_regno(). Ignore d16-d31. */
5605
5606static void
5607bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
5608{
5609 if (reg < 32)
5610 *wmask |= 1 << reg;
5611 else if (reg < 48)
5612 *wmask |= 3 << ((reg - 32) * 2);
5613}
5614
5615/* Return TRUE if WMASK overwrites anything in REGS. */
5616
5617static bfd_boolean
5618bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
5619{
5620 int i;
906e58ca 5621
c7b8f16e
JB		 5622 for (i = 0; i < numregs; i++)
5623 {
5624 unsigned int reg = regs[i];
5625
5626 if (reg < 32 && (wmask & (1 << reg)) != 0)
5627 return TRUE;
906e58ca 5628
c7b8f16e
JB		 5629 reg -= 32;
5630
5631 if (reg >= 16)
5632 continue;
906e58ca 5633
c7b8f16e
JB		 5634 if ((wmask & (3 << (reg * 2))) != 0)
5635 return TRUE;
5636 }
906e58ca 5637
c7b8f16e
JB		 5638 return FALSE;
5639}
5640
5641/* In this function, we're interested in two things: finding input registers
5642 for VFP data-processing instructions, and finding the set of registers which
5643 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
5644 hold the written set, so FLDM etc. are easy to deal with (we're only
5645 interested in 32 SP registers or 16 dp registers, due to the VFP version
5646 implemented by the chip in question). DP registers are marked by setting
5647 both SP registers in the write mask). */
5648
5649static enum bfd_arm_vfp11_pipe
5650bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
5651 int *numregs)
5652{
5653 enum bfd_arm_vfp11_pipe pipe = VFP11_BAD;
5654 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
5655
5656 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
5657 {
5658 unsigned int pqrs;
5659 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5660 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
5661
5662 pqrs = ((insn & 0x00800000) >> 20)
5663 | ((insn & 0x00300000) >> 19)
5664 | ((insn & 0x00000040) >> 6);
5665
5666 switch (pqrs)
5667 {
5668 case 0: /* fmac[sd]. */
5669 case 1: /* fnmac[sd]. */
5670 case 2: /* fmsc[sd]. */
5671 case 3: /* fnmsc[sd]. */
5672 pipe = VFP11_FMAC;
5673 bfd_arm_vfp11_write_mask (destmask, fd);
5674 regs[0] = fd;
5675 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
5676 regs[2] = fm;
5677 *numregs = 3;
5678 break;
5679
5680 case 4: /* fmul[sd]. */
5681 case 5: /* fnmul[sd]. */
5682 case 6: /* fadd[sd]. */
5683 case 7: /* fsub[sd]. */
5684 pipe = VFP11_FMAC;
5685 goto vfp_binop;
5686
5687 case 8: /* fdiv[sd]. */
5688 pipe = VFP11_DS;
5689 vfp_binop:
5690 bfd_arm_vfp11_write_mask (destmask, fd);
5691 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
5692 regs[1] = fm;
5693 *numregs = 2;
5694 break;
5695
5696 case 15: /* extended opcode. */
5697 {
5698 unsigned int extn = ((insn >> 15) & 0x1e)
5699 | ((insn >> 7) & 1);
5700
5701 switch (extn)
5702 {
5703 case 0: /* fcpy[sd]. */
5704 case 1: /* fabs[sd]. */
5705 case 2: /* fneg[sd]. */
5706 case 8: /* fcmp[sd]. */
5707 case 9: /* fcmpe[sd]. */
5708 case 10: /* fcmpz[sd]. */
5709 case 11: /* fcmpez[sd]. */
5710 case 16: /* fuito[sd]. */
5711 case 17: /* fsito[sd]. */
5712 case 24: /* ftoui[sd]. */
5713 case 25: /* ftouiz[sd]. */
5714 case 26: /* ftosi[sd]. */
5715 case 27: /* ftosiz[sd]. */
5716 /* These instructions will not bounce due to underflow. */
5717 *numregs = 0;
5718 pipe = VFP11_FMAC;
5719 break;
5720
5721 case 3: /* fsqrt[sd]. */
5722 /* fsqrt cannot underflow, but it can (perhaps) overwrite
5723 registers to cause the erratum in previous instructions. */
5724 bfd_arm_vfp11_write_mask (destmask, fd);
5725 pipe = VFP11_DS;
5726 break;
5727
5728 case 15: /* fcvt{ds,sd}. */
5729 {
5730 int rnum = 0;
5731
5732 bfd_arm_vfp11_write_mask (destmask, fd);
5733
5734 /* Only FCVTSD can underflow. */
5735 if ((insn & 0x100) != 0)
5736 regs[rnum++] = fm;
5737
5738 *numregs = rnum;
5739
5740 pipe = VFP11_FMAC;
5741 }
5742 break;
5743
5744 default:
5745 return VFP11_BAD;
5746 }
5747 }
5748 break;
5749
5750 default:
5751 return VFP11_BAD;
5752 }
5753 }
5754 /* Two-register transfer. */
5755 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
5756 {
5757 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
906e58ca 5758
c7b8f16e
JB		 5759 if ((insn & 0x100000) == 0)
5760 {
5761 if (is_double)
5762 bfd_arm_vfp11_write_mask (destmask, fm);
5763 else
5764 {
5765 bfd_arm_vfp11_write_mask (destmask, fm);
5766 bfd_arm_vfp11_write_mask (destmask, fm + 1);
5767 }
5768 }
5769
5770 pipe = VFP11_LS;
5771 }
5772 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
5773 {
5774 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5775 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
906e58ca 5776
c7b8f16e
JB		 5777 switch (puw)
5778 {
5779 case 0: /* Two-reg transfer. We should catch these above. */
5780 abort ();
906e58ca 5781
c7b8f16e
JB		 5782 case 2: /* fldm[sdx]. */
5783 case 3:
5784 case 5:
5785 {
5786 unsigned int i, offset = insn & 0xff;
5787
5788 if (is_double)
5789 offset >>= 1;
5790
5791 for (i = fd; i < fd + offset; i++)
5792 bfd_arm_vfp11_write_mask (destmask, i);
5793 }
5794 break;
906e58ca 5795
c7b8f16e
JB		 5796 case 4: /* fld[sd]. */
5797 case 6:
5798 bfd_arm_vfp11_write_mask (destmask, fd);
5799 break;
906e58ca 5800
c7b8f16e
JB		 5801 default:
5802 return VFP11_BAD;
5803 }
5804
5805 pipe = VFP11_LS;
5806 }
5807 /* Single-register transfer. Note L==0. */
5808 else if ((insn & 0x0f100e10) == 0x0e000a10)
5809 {
5810 unsigned int opcode = (insn >> 21) & 7;
5811 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
5812
5813 switch (opcode)
5814 {
5815 case 0: /* fmsr/fmdlr. */
5816 case 1: /* fmdhr. */
5817 /* Mark fmdhr and fmdlr as writing to the whole of the DP
5818 destination register. I don't know if this is exactly right,
5819 but it is the conservative choice. */
5820 bfd_arm_vfp11_write_mask (destmask, fn);
5821 break;
5822
5823 case 7: /* fmxr. */
5824 break;
5825 }
5826
5827 pipe = VFP11_LS;
5828 }
5829
5830 return pipe;
5831}
5832
5833
5834static int elf32_arm_compare_mapping (const void * a, const void * b);
5835
5836
5837/* Look for potentially-troublesome code sequences which might trigger the
5838 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
5839 (available from ARM) for details of the erratum. A short version is
5840 described in ld.texinfo. */
5841
5842bfd_boolean
5843bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
5844{
5845 asection *sec;
5846 bfd_byte *contents = NULL;
5847 int state = 0;
5848 int regs[3], numregs = 0;
5849 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5850 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
906e58ca 5851
c7b8f16e
JB		 5852 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
5853 The states transition as follows:
906e58ca 5854
c7b8f16e
JB		 5855 0 -> 1 (vector) or 0 -> 2 (scalar)
5856 A VFP FMAC-pipeline instruction has been seen. Fill
5857 regs[0]..regs[numregs-1] with its input operands. Remember this
5858 instruction in 'first_fmac'.
5859
5860 1 -> 2
5861 Any instruction, except for a VFP instruction which overwrites
5862 regs[*].
906e58ca 5863
c7b8f16e
JB		 5864 1 -> 3 [ -> 0 ] or
5865 2 -> 3 [ -> 0 ]
5866 A VFP instruction has been seen which overwrites any of regs[*].
5867 We must make a veneer! Reset state to 0 before examining next
5868 instruction.
906e58ca 5869
c7b8f16e
JB		 5870 2 -> 0
5871 If we fail to match anything in state 2, reset to state 0 and reset
5872 the instruction pointer to the instruction after 'first_fmac'.
5873
5874 If the VFP11 vector mode is in use, there must be at least two unrelated
5875 instructions between anti-dependent VFP11 instructions to properly avoid
906e58ca 5876 triggering the erratum, hence the use of the extra state 1. */
c7b8f16e
JB		 5877
5878 /* If we are only performing a partial link do not bother
5879 to construct any glue. */
5880 if (link_info->relocatable)
5881 return TRUE;
5882
0ffa91dd
NC		 5883 /* Skip if this bfd does not correspond to an ELF image. */
5884 if (! is_arm_elf (abfd))
5885 return TRUE;
906e58ca 5886
c7b8f16e
JB		 5887 /* We should have chosen a fix type by the time we get here. */
5888 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
5889
5890 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
5891 return TRUE;
2e6030b9 5892
33a7ffc2
JM		 5893 /* Skip this BFD if it corresponds to an executable or dynamic object. */
5894 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
5895 return TRUE;
5896
c7b8f16e
JB		 5897 for (sec = abfd->sections; sec != NULL; sec = sec->next)
5898 {
5899 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
5900 struct _arm_elf_section_data *sec_data;
5901
5902 /* If we don't have executable progbits, we're not interested in this
5903 section. Also skip if section is to be excluded. */
5904 if (elf_section_type (sec) != SHT_PROGBITS
5905 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
5906 || (sec->flags & SEC_EXCLUDE) != 0
33a7ffc2
JM		 5907 || sec->sec_info_type == ELF_INFO_TYPE_JUST_SYMS
5908 || sec->output_section == bfd_abs_section_ptr
c7b8f16e
JB		 5909 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
5910 continue;
5911
5912 sec_data = elf32_arm_section_data (sec);
906e58ca 5913
c7b8f16e
JB		 5914 if (sec_data->mapcount == 0)
5915 continue;
906e58ca 5916
c7b8f16e
JB		 5917 if (elf_section_data (sec)->this_hdr.contents != NULL)
5918 contents = elf_section_data (sec)->this_hdr.contents;
5919 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
5920 goto error_return;
5921
5922 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
5923 elf32_arm_compare_mapping);
5924
5925 for (span = 0; span < sec_data->mapcount; span++)
5926 {
5927 unsigned int span_start = sec_data->map[span].vma;
5928 unsigned int span_end = (span == sec_data->mapcount - 1)
5929 ? sec->size : sec_data->map[span + 1].vma;
5930 char span_type = sec_data->map[span].type;
906e58ca 5931
c7b8f16e
JB		 5932 /* FIXME: Only ARM mode is supported at present. We may need to
5933 support Thumb-2 mode also at some point. */
5934 if (span_type != 'a')
5935 continue;
5936
5937 for (i = span_start; i < span_end;)
5938 {
5939 unsigned int next_i = i + 4;
5940 unsigned int insn = bfd_big_endian (abfd)
5941 ? (contents[i] << 24)
5942 | (contents[i + 1] << 16)
5943 | (contents[i + 2] << 8)
5944 | contents[i + 3]
5945 : (contents[i + 3] << 24)
5946 | (contents[i + 2] << 16)
5947 | (contents[i + 1] << 8)
5948 | contents[i];
5949 unsigned int writemask = 0;
5950 enum bfd_arm_vfp11_pipe pipe;
5951
5952 switch (state)
5953 {
5954 case 0:
5955 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
5956 &numregs);
5957 /* I'm assuming the VFP11 erratum can trigger with denorm
5958 operands on either the FMAC or the DS pipeline. This might
5959 lead to slightly overenthusiastic veneer insertion. */
5960 if (pipe == VFP11_FMAC || pipe == VFP11_DS)
5961 {
5962 state = use_vector ? 1 : 2;
5963 first_fmac = i;
5964 veneer_of_insn = insn;
5965 }
5966 break;
5967
5968 case 1:
5969 {
5970 int other_regs[3], other_numregs;
5971 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
5972 other_regs,
5973 &other_numregs);
5974 if (pipe != VFP11_BAD
5975 && bfd_arm_vfp11_antidependency (writemask, regs,
5976 numregs))
5977 state = 3;
5978 else
5979 state = 2;
5980 }
5981 break;
5982
5983 case 2:
5984 {
5985 int other_regs[3], other_numregs;
5986 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
5987 other_regs,
5988 &other_numregs);
5989 if (pipe != VFP11_BAD
5990 && bfd_arm_vfp11_antidependency (writemask, regs,
5991 numregs))
5992 state = 3;
5993 else
5994 {
5995 state = 0;
5996 next_i = first_fmac + 4;
5997 }
5998 }
5999 break;
6000
6001 case 3:
6002 abort (); /* Should be unreachable. */
6003 }
6004
6005 if (state == 3)
6006 {
6007 elf32_vfp11_erratum_list *newerr
6008 = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
6009 int errcount;
6010
6011 errcount = ++(elf32_arm_section_data (sec)->erratumcount);
6012
6013 newerr->u.b.vfp_insn = veneer_of_insn;
6014
6015 switch (span_type)
6016 {
6017 case 'a':
6018 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6019 break;
906e58ca 6020
c7b8f16e
JB		 6021 default:
6022 abort ();
6023 }
6024
6025 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6026 first_fmac);
6027
6028 newerr->vma = -1;
6029
6030 newerr->next = sec_data->erratumlist;
6031 sec_data->erratumlist = newerr;
6032
6033 state = 0;
6034 }
6035
6036 i = next_i;
6037 }
6038 }
906e58ca 6039
c7b8f16e
JB		 6040 if (contents != NULL
6041 && elf_section_data (sec)->this_hdr.contents != contents)
6042 free (contents);
6043 contents = NULL;
6044 }
6045
6046 return TRUE;
6047
6048error_return:
6049 if (contents != NULL
6050 && elf_section_data (sec)->this_hdr.contents != contents)
6051 free (contents);
906e58ca 6052
c7b8f16e
JB		 6053 return FALSE;
6054}
6055
6056/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6057 after sections have been laid out, using specially-named symbols. */
6058
6059void
6060bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6061 struct bfd_link_info *link_info)
6062{
6063 asection *sec;
6064 struct elf32_arm_link_hash_table *globals;
6065 char *tmp_name;
906e58ca 6066
c7b8f16e
JB		 6067 if (link_info->relocatable)
6068 return;
2e6030b9
MS		 6069
6070 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 6071 if (! is_arm_elf (abfd))
2e6030b9
MS		 6072 return;
6073
c7b8f16e 6074 globals = elf32_arm_hash_table (link_info);
906e58ca 6075
c7b8f16e
JB		 6076 tmp_name = bfd_malloc ((bfd_size_type) strlen
6077 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
6078
6079 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6080 {
6081 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6082 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
906e58ca 6083
c7b8f16e
JB		 6084 for (; errnode != NULL; errnode = errnode->next)
6085 {
6086 struct elf_link_hash_entry *myh;
6087 bfd_vma vma;
6088
6089 switch (errnode->type)
6090 {
6091 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6092 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6093 /* Find veneer symbol. */
6094 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6095 errnode->u.b.veneer->u.v.id);
6096
6097 myh = elf_link_hash_lookup
6098 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6099
6100 if (myh == NULL)
6101 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6102 "`%s'"), abfd, tmp_name);
6103
6104 vma = myh->root.u.def.section->output_section->vma
6105 + myh->root.u.def.section->output_offset
6106 + myh->root.u.def.value;
6107
6108 errnode->u.b.veneer->vma = vma;
6109 break;
6110
6111 case VFP11_ERRATUM_ARM_VENEER:
6112 case VFP11_ERRATUM_THUMB_VENEER:
6113 /* Find return location. */
6114 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6115 errnode->u.v.id);
6116
6117 myh = elf_link_hash_lookup
6118 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6119
6120 if (myh == NULL)
6121 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6122 "`%s'"), abfd, tmp_name);
6123
6124 vma = myh->root.u.def.section->output_section->vma
6125 + myh->root.u.def.section->output_offset
6126 + myh->root.u.def.value;
6127
6128 errnode->u.v.branch->vma = vma;
6129 break;
906e58ca 6130
c7b8f16e
JB		 6131 default:
6132 abort ();
6133 }
6134 }
6135 }
906e58ca 6136
c7b8f16e
JB		 6137 free (tmp_name);
6138}
6139
6140
eb043451
PB		 6141/* Set target relocation values needed during linking. */
6142
6143void
bf21ed78
MS		 6144bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6145 struct bfd_link_info *link_info,
eb043451 6146 int target1_is_rel,
319850b4 6147 char * target2_type,
33bfe774 6148 int fix_v4bx,
c7b8f16e 6149 int use_blx,
bf21ed78 6150 bfd_arm_vfp11_fix vfp11_fix,
a9dc9481 6151 int no_enum_warn, int no_wchar_warn,
48229727 6152 int pic_veneer, int fix_cortex_a8)
eb043451
PB		 6153{
6154 struct elf32_arm_link_hash_table *globals;
6155
6156 globals = elf32_arm_hash_table (link_info);
6157
6158 globals->target1_is_rel = target1_is_rel;
6159 if (strcmp (target2_type, "rel") == 0)
6160 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 6161 else if (strcmp (target2_type, "abs") == 0)
6162 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 6163 else if (strcmp (target2_type, "got-rel") == 0)
6164 globals->target2_reloc = R_ARM_GOT_PREL;
6165 else
6166 {
6167 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6168 target2_type);
6169 }
319850b4 6170 globals->fix_v4bx = fix_v4bx;
33bfe774 6171 globals->use_blx |= use_blx;
c7b8f16e 6172 globals->vfp11_fix = vfp11_fix;
27e55c4d 6173 globals->pic_veneer = pic_veneer;
48229727 6174 globals->fix_cortex_a8 = fix_cortex_a8;
bf21ed78 6175
0ffa91dd
NC		 6176 BFD_ASSERT (is_arm_elf (output_bfd));
6177 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
a9dc9481 6178 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
eb043451 6179}
eb043451 6180
12a0a0fd 6181/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 6182
12a0a0fd
PB		 6183static void
6184insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6185{
6186 bfd_vma upper;
6187 bfd_vma lower;
6188 int reloc_sign;
6189
6190 BFD_ASSERT ((offset & 1) == 0);
6191
6192 upper = bfd_get_16 (abfd, insn);
6193 lower = bfd_get_16 (abfd, insn + 2);
6194 reloc_sign = (offset < 0) ? 1 : 0;
6195 upper = (upper & ~(bfd_vma) 0x7ff)
6196 | ((offset >> 12) & 0x3ff)
6197 | (reloc_sign << 10);
906e58ca 6198 lower = (lower & ~(bfd_vma) 0x2fff)
12a0a0fd
PB		 6199 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6200 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6201 | ((offset >> 1) & 0x7ff);
6202 bfd_put_16 (abfd, upper, insn);
6203 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 6204}
6205
9b485d32
NC		 6206/* Thumb code calling an ARM function. */
6207
252b5132 6208static int
57e8b36a
NC		 6209elf32_thumb_to_arm_stub (struct bfd_link_info * info,
6210 const char * name,
6211 bfd * input_bfd,
6212 bfd * output_bfd,
6213 asection * input_section,
6214 bfd_byte * hit_data,
6215 asection * sym_sec,
6216 bfd_vma offset,
6217 bfd_signed_vma addend,
f2a9dd69
DJ		 6218 bfd_vma val,
6219 char **error_message)
252b5132 6220{
bcbdc74c 6221 asection * s = 0;
dc810e39 6222 bfd_vma my_offset;
252b5132 6223 long int ret_offset;
bcbdc74c
NC		 6224 struct elf_link_hash_entry * myh;
6225 struct elf32_arm_link_hash_table * globals;
252b5132 6226
f2a9dd69 6227 myh = find_thumb_glue (info, name, error_message);
252b5132 6228 if (myh == NULL)
b34976b6 6229 return FALSE;
252b5132
RH		 6230
6231 globals = elf32_arm_hash_table (info);
6232
6233 BFD_ASSERT (globals != NULL);
6234 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6235
6236 my_offset = myh->root.u.def.value;
6237
6238 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6239 THUMB2ARM_GLUE_SECTION_NAME);
6240
6241 BFD_ASSERT (s != NULL);
6242 BFD_ASSERT (s->contents != NULL);
6243 BFD_ASSERT (s->output_section != NULL);
6244
6245 if ((my_offset & 0x01) == 0x01)
6246 {
6247 if (sym_sec != NULL
6248 && sym_sec->owner != NULL
6249 && !INTERWORK_FLAG (sym_sec->owner))
6250 {
8f615d07 6251 (*_bfd_error_handler)
d003868e
AM		 6252 (_("%B(%s): warning: interworking not enabled.\n"
6253 " first occurrence: %B: thumb call to arm"),
6254 sym_sec->owner, input_bfd, name);
252b5132 6255
b34976b6 6256 return FALSE;
252b5132
RH		 6257 }
6258
6259 --my_offset;
6260 myh->root.u.def.value = my_offset;
6261
52ab56c2
PB		 6262 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
6263 s->contents + my_offset);
252b5132 6264
52ab56c2
PB		 6265 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
6266 s->contents + my_offset + 2);
252b5132
RH		 6267
6268 ret_offset =
9b485d32
NC		 6269 /* Address of destination of the stub. */
6270 ((bfd_signed_vma) val)
252b5132 6271 - ((bfd_signed_vma)
57e8b36a
NC		 6272 /* Offset from the start of the current section
6273 to the start of the stubs. */
9b485d32
NC		 6274 (s->output_offset
6275 /* Offset of the start of this stub from the start of the stubs. */
6276 + my_offset
6277 /* Address of the start of the current section. */
6278 + s->output_section->vma)
6279 /* The branch instruction is 4 bytes into the stub. */
6280 + 4
6281 /* ARM branches work from the pc of the instruction + 8. */
6282 + 8);
252b5132 6283
52ab56c2
PB		 6284 put_arm_insn (globals, output_bfd,
6285 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
6286 s->contents + my_offset + 4);
252b5132
RH		 6287 }
6288
6289 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
6290
427bfd90
NC		 6291 /* Now go back and fix up the original BL insn to point to here. */
6292 ret_offset =
6293 /* Address of where the stub is located. */
6294 (s->output_section->vma + s->output_offset + my_offset)
6295 /* Address of where the BL is located. */
57e8b36a
NC		 6296 - (input_section->output_section->vma + input_section->output_offset
6297 + offset)
427bfd90
NC		 6298 /* Addend in the relocation. */
6299 - addend
6300 /* Biassing for PC-relative addressing. */
6301 - 8;
252b5132 6302
12a0a0fd 6303 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 6304
b34976b6 6305 return TRUE;
252b5132
RH		 6306}
6307
a4fd1a8e 6308/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 6309
a4fd1a8e
PB		 6310static struct elf_link_hash_entry *
6311elf32_arm_create_thumb_stub (struct bfd_link_info * info,
6312 const char * name,
6313 bfd * input_bfd,
6314 bfd * output_bfd,
6315 asection * sym_sec,
6316 bfd_vma val,
8029a119
NC		 6317 asection * s,
6318 char ** error_message)
252b5132 6319{
dc810e39 6320 bfd_vma my_offset;
252b5132 6321 long int ret_offset;
bcbdc74c
NC		 6322 struct elf_link_hash_entry * myh;
6323 struct elf32_arm_link_hash_table * globals;
252b5132 6324
f2a9dd69 6325 myh = find_arm_glue (info, name, error_message);
252b5132 6326 if (myh == NULL)
a4fd1a8e 6327 return NULL;
252b5132
RH		 6328
6329 globals = elf32_arm_hash_table (info);
6330
6331 BFD_ASSERT (globals != NULL);
6332 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6333
6334 my_offset = myh->root.u.def.value;
252b5132
RH		 6335
6336 if ((my_offset & 0x01) == 0x01)
6337 {
6338 if (sym_sec != NULL
6339 && sym_sec->owner != NULL
6340 && !INTERWORK_FLAG (sym_sec->owner))
6341 {
8f615d07 6342 (*_bfd_error_handler)
d003868e
AM		 6343 (_("%B(%s): warning: interworking not enabled.\n"
6344 " first occurrence: %B: arm call to thumb"),
6345 sym_sec->owner, input_bfd, name);
252b5132 6346 }
9b485d32 6347
252b5132
RH		 6348 --my_offset;
6349 myh->root.u.def.value = my_offset;
6350
27e55c4d
PB		 6351 if (info->shared || globals->root.is_relocatable_executable
6352 || globals->pic_veneer)
8f6277f5
PB		 6353 {
6354 /* For relocatable objects we can't use absolute addresses,
6355 so construct the address from a relative offset. */
6356 /* TODO: If the offset is small it's probably worth
6357 constructing the address with adds. */
52ab56c2
PB		 6358 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
6359 s->contents + my_offset);
6360 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
6361 s->contents + my_offset + 4);
6362 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
6363 s->contents + my_offset + 8);
8f6277f5
PB		 6364 /* Adjust the offset by 4 for the position of the add,
6365 and 8 for the pipeline offset. */
6366 ret_offset = (val - (s->output_offset
6367 + s->output_section->vma
6368 + my_offset + 12))
6369 | 1;
6370 bfd_put_32 (output_bfd, ret_offset,
6371 s->contents + my_offset + 12);
6372 }
26079076
PB		 6373 else if (globals->use_blx)
6374 {
6375 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
6376 s->contents + my_offset);
6377
6378 /* It's a thumb address. Add the low order bit. */
6379 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
6380 s->contents + my_offset + 4);
6381 }
8f6277f5
PB		 6382 else
6383 {
52ab56c2
PB		 6384 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
6385 s->contents + my_offset);
252b5132 6386
52ab56c2
PB		 6387 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
6388 s->contents + my_offset + 4);
252b5132 6389
8f6277f5
PB		 6390 /* It's a thumb address. Add the low order bit. */
6391 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
6392 s->contents + my_offset + 8);
8029a119
NC		 6393
6394 my_offset += 12;
8f6277f5 6395 }
252b5132
RH		 6396 }
6397
6398 BFD_ASSERT (my_offset <= globals->arm_glue_size);
6399
a4fd1a8e
PB		 6400 return myh;
6401}
6402
6403/* Arm code calling a Thumb function. */
6404
6405static int
6406elf32_arm_to_thumb_stub (struct bfd_link_info * info,
6407 const char * name,
6408 bfd * input_bfd,
6409 bfd * output_bfd,
6410 asection * input_section,
6411 bfd_byte * hit_data,
6412 asection * sym_sec,
6413 bfd_vma offset,
6414 bfd_signed_vma addend,
f2a9dd69
DJ		 6415 bfd_vma val,
6416 char **error_message)
a4fd1a8e
PB		 6417{
6418 unsigned long int tmp;
6419 bfd_vma my_offset;
6420 asection * s;
6421 long int ret_offset;
6422 struct elf_link_hash_entry * myh;
6423 struct elf32_arm_link_hash_table * globals;
6424
6425 globals = elf32_arm_hash_table (info);
6426
6427 BFD_ASSERT (globals != NULL);
6428 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6429
6430 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6431 ARM2THUMB_GLUE_SECTION_NAME);
6432 BFD_ASSERT (s != NULL);
6433 BFD_ASSERT (s->contents != NULL);
6434 BFD_ASSERT (s->output_section != NULL);
6435
6436 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 6437 sym_sec, val, s, error_message);
a4fd1a8e
PB		 6438 if (!myh)
6439 return FALSE;
6440
6441 my_offset = myh->root.u.def.value;
252b5132
RH		 6442 tmp = bfd_get_32 (input_bfd, hit_data);
6443 tmp = tmp & 0xFF000000;
6444
9b485d32 6445 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 6446 ret_offset = (s->output_offset
6447 + my_offset
6448 + s->output_section->vma
6449 - (input_section->output_offset
6450 + input_section->output_section->vma
6451 + offset + addend)
6452 - 8);
9a5aca8c 6453
252b5132
RH		 6454 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
6455
dc810e39 6456 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 6457
b34976b6 6458 return TRUE;
252b5132
RH		 6459}
6460
a4fd1a8e
PB		 6461/* Populate Arm stub for an exported Thumb function. */
6462
6463static bfd_boolean
6464elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
6465{
6466 struct bfd_link_info * info = (struct bfd_link_info *) inf;
6467 asection * s;
6468 struct elf_link_hash_entry * myh;
6469 struct elf32_arm_link_hash_entry *eh;
6470 struct elf32_arm_link_hash_table * globals;
6471 asection *sec;
6472 bfd_vma val;
f2a9dd69 6473 char *error_message;
a4fd1a8e 6474
906e58ca 6475 eh = elf32_arm_hash_entry (h);
a4fd1a8e
PB		 6476 /* Allocate stubs for exported Thumb functions on v4t. */
6477 if (eh->export_glue == NULL)
6478 return TRUE;
6479
6480 globals = elf32_arm_hash_table (info);
6481
6482 BFD_ASSERT (globals != NULL);
6483 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6484
6485 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6486 ARM2THUMB_GLUE_SECTION_NAME);
6487 BFD_ASSERT (s != NULL);
6488 BFD_ASSERT (s->contents != NULL);
6489 BFD_ASSERT (s->output_section != NULL);
6490
6491 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 6492
6493 BFD_ASSERT (sec->output_section != NULL);
6494
a4fd1a8e
PB		 6495 val = eh->export_glue->root.u.def.value + sec->output_offset
6496 + sec->output_section->vma;
8029a119 6497
a4fd1a8e
PB		 6498 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
6499 h->root.u.def.section->owner,
f2a9dd69
DJ		 6500 globals->obfd, sec, val, s,
6501 &error_message);
a4fd1a8e
PB		 6502 BFD_ASSERT (myh);
6503 return TRUE;
6504}
6505
845b51d6
PB		 6506/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
6507
6508static bfd_vma
6509elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
6510{
6511 bfd_byte *p;
6512 bfd_vma glue_addr;
6513 asection *s;
6514 struct elf32_arm_link_hash_table *globals;
6515
6516 globals = elf32_arm_hash_table (info);
6517
6518 BFD_ASSERT (globals != NULL);
6519 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6520
6521 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6522 ARM_BX_GLUE_SECTION_NAME);
6523 BFD_ASSERT (s != NULL);
6524 BFD_ASSERT (s->contents != NULL);
6525 BFD_ASSERT (s->output_section != NULL);
6526
6527 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
6528
6529 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
6530
6531 if ((globals->bx_glue_offset[reg] & 1) == 0)
6532 {
6533 p = s->contents + glue_addr;
6534 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
6535 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
6536 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
6537 globals->bx_glue_offset[reg] |= 1;
6538 }
6539
6540 return glue_addr + s->output_section->vma + s->output_offset;
6541}
6542
a4fd1a8e
PB		 6543/* Generate Arm stubs for exported Thumb symbols. */
6544static void
906e58ca 6545elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
a4fd1a8e
PB		 6546 struct bfd_link_info *link_info)
6547{
6548 struct elf32_arm_link_hash_table * globals;
6549
8029a119
NC		 6550 if (link_info == NULL)
6551 /* Ignore this if we are not called by the ELF backend linker. */
a4fd1a8e
PB		 6552 return;
6553
6554 globals = elf32_arm_hash_table (link_info);
84c08195
PB		 6555 /* If blx is available then exported Thumb symbols are OK and there is
6556 nothing to do. */
a4fd1a8e
PB		 6557 if (globals->use_blx)
6558 return;
6559
6560 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
6561 link_info);
6562}
6563
eb043451
PB		 6564/* Some relocations map to different relocations depending on the
6565 target. Return the real relocation. */
8029a119 6566
eb043451
PB		 6567static int
6568arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
6569 int r_type)
6570{
6571 switch (r_type)
6572 {
6573 case R_ARM_TARGET1:
6574 if (globals->target1_is_rel)
6575 return R_ARM_REL32;
6576 else
6577 return R_ARM_ABS32;
6578
6579 case R_ARM_TARGET2:
6580 return globals->target2_reloc;
6581
6582 default:
6583 return r_type;
6584 }
6585}
eb043451 6586
ba93b8ac
DJ		 6587/* Return the base VMA address which should be subtracted from real addresses
6588 when resolving @dtpoff relocation.
6589 This is PT_TLS segment p_vaddr. */
6590
6591static bfd_vma
6592dtpoff_base (struct bfd_link_info *info)
6593{
6594 /* If tls_sec is NULL, we should have signalled an error already. */
6595 if (elf_hash_table (info)->tls_sec == NULL)
6596 return 0;
6597 return elf_hash_table (info)->tls_sec->vma;
6598}
6599
6600/* Return the relocation value for @tpoff relocation
6601 if STT_TLS virtual address is ADDRESS. */
6602
6603static bfd_vma
6604tpoff (struct bfd_link_info *info, bfd_vma address)
6605{
6606 struct elf_link_hash_table *htab = elf_hash_table (info);
6607 bfd_vma base;
6608
6609 /* If tls_sec is NULL, we should have signalled an error already. */
6610 if (htab->tls_sec == NULL)
6611 return 0;
6612 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
6613 return address - htab->tls_sec->vma + base;
6614}
6615
00a97672
RS		 6616/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
6617 VALUE is the relocation value. */
6618
6619static bfd_reloc_status_type
6620elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
6621{
6622 if (value > 0xfff)
6623 return bfd_reloc_overflow;
6624
6625 value |= bfd_get_32 (abfd, data) & 0xfffff000;
6626 bfd_put_32 (abfd, value, data);
6627 return bfd_reloc_ok;
6628}
6629
4962c51a
MS		 6630/* For a given value of n, calculate the value of G_n as required to
6631 deal with group relocations. We return it in the form of an
6632 encoded constant-and-rotation, together with the final residual. If n is
6633 specified as less than zero, then final_residual is filled with the
6634 input value and no further action is performed. */
6635
6636static bfd_vma
6637calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
6638{
6639 int current_n;
6640 bfd_vma g_n;
6641 bfd_vma encoded_g_n = 0;
6642 bfd_vma residual = value; /* Also known as Y_n. */
6643
6644 for (current_n = 0; current_n <= n; current_n++)
6645 {
6646 int shift;
6647
6648 /* Calculate which part of the value to mask. */
6649 if (residual == 0)
6650 shift = 0;
6651 else
6652 {
6653 int msb;
6654
6655 /* Determine the most significant bit in the residual and
6656 align the resulting value to a 2-bit boundary. */
6657 for (msb = 30; msb >= 0; msb -= 2)
6658 if (residual & (3 << msb))
6659 break;
6660
6661 /* The desired shift is now (msb - 6), or zero, whichever
6662 is the greater. */
6663 shift = msb - 6;
6664 if (shift < 0)
6665 shift = 0;
6666 }
6667
6668 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
6669 g_n = residual & (0xff << shift);
6670 encoded_g_n = (g_n >> shift)
6671 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
6672
6673 /* Calculate the residual for the next time around. */
6674 residual &= ~g_n;
6675 }
6676
6677 *final_residual = residual;
6678
6679 return encoded_g_n;
6680}
6681
6682/* Given an ARM instruction, determine whether it is an ADD or a SUB.
6683 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
906e58ca 6684
4962c51a 6685static int
906e58ca 6686identify_add_or_sub (bfd_vma insn)
4962c51a
MS		 6687{
6688 int opcode = insn & 0x1e00000;
6689
6690 if (opcode == 1 << 23) /* ADD */
6691 return 1;
6692
6693 if (opcode == 1 << 22) /* SUB */
6694 return -1;
6695
6696 return 0;
6697}
6698
252b5132 6699/* Perform a relocation as part of a final link. */
9b485d32 6700
252b5132 6701static bfd_reloc_status_type
57e8b36a
NC		 6702elf32_arm_final_link_relocate (reloc_howto_type * howto,
6703 bfd * input_bfd,
6704 bfd * output_bfd,
6705 asection * input_section,
6706 bfd_byte * contents,
6707 Elf_Internal_Rela * rel,
6708 bfd_vma value,
6709 struct bfd_link_info * info,
6710 asection * sym_sec,
6711 const char * sym_name,
6712 int sym_flags,
0945cdfd 6713 struct elf_link_hash_entry * h,
f2a9dd69 6714 bfd_boolean * unresolved_reloc_p,
8029a119 6715 char ** error_message)
252b5132
RH		 6716{
6717 unsigned long r_type = howto->type;
6718 unsigned long r_symndx;
6719 bfd_byte * hit_data = contents + rel->r_offset;
6720 bfd * dynobj = NULL;
6721 Elf_Internal_Shdr * symtab_hdr;
6722 struct elf_link_hash_entry ** sym_hashes;
6723 bfd_vma * local_got_offsets;
6724 asection * sgot = NULL;
6725 asection * splt = NULL;
6726 asection * sreloc = NULL;
252b5132 6727 bfd_vma addend;
ba96a88f
NC		 6728 bfd_signed_vma signed_addend;
6729 struct elf32_arm_link_hash_table * globals;
f21f3fe0 6730
9c504268
PB		 6731 globals = elf32_arm_hash_table (info);
6732
0ffa91dd
NC		 6733 BFD_ASSERT (is_arm_elf (input_bfd));
6734
6735 /* Some relocation types map to different relocations depending on the
9c504268 6736 target. We pick the right one here. */
eb043451
PB		 6737 r_type = arm_real_reloc_type (globals, r_type);
6738 if (r_type != howto->type)
6739 howto = elf32_arm_howto_from_type (r_type);
9c504268 6740
cac15327
NC		 6741 /* If the start address has been set, then set the EF_ARM_HASENTRY
6742 flag. Setting this more than once is redundant, but the cost is
6743 not too high, and it keeps the code simple.
99e4ae17 6744
cac15327
NC		 6745 The test is done here, rather than somewhere else, because the
6746 start address is only set just before the final link commences.
6747
6748 Note - if the user deliberately sets a start address of 0, the
6749 flag will not be set. */
6750 if (bfd_get_start_address (output_bfd) != 0)
6751 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 6752
252b5132
RH		 6753 dynobj = elf_hash_table (info)->dynobj;
6754 if (dynobj)
6755 {
6756 sgot = bfd_get_section_by_name (dynobj, ".got");
6757 splt = bfd_get_section_by_name (dynobj, ".plt");
6758 }
0ffa91dd 6759 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 6760 sym_hashes = elf_sym_hashes (input_bfd);
6761 local_got_offsets = elf_local_got_offsets (input_bfd);
6762 r_symndx = ELF32_R_SYM (rel->r_info);
6763
4e7fd91e 6764 if (globals->use_rel)
ba96a88f 6765 {
4e7fd91e
PB		 6766 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
6767
6768 if (addend & ((howto->src_mask + 1) >> 1))
6769 {
6770 signed_addend = -1;
6771 signed_addend &= ~ howto->src_mask;
6772 signed_addend |= addend;
6773 }
6774 else
6775 signed_addend = addend;
ba96a88f
NC		 6776 }
6777 else
4e7fd91e 6778 addend = signed_addend = rel->r_addend;
f21f3fe0 6779
252b5132
RH		 6780 switch (r_type)
6781 {
6782 case R_ARM_NONE:
28a094c2
DJ		 6783 /* We don't need to find a value for this symbol. It's just a
6784 marker. */
6785 *unresolved_reloc_p = FALSE;
252b5132
RH		 6786 return bfd_reloc_ok;
6787
00a97672
RS		 6788 case R_ARM_ABS12:
6789 if (!globals->vxworks_p)
6790 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
6791
252b5132
RH		 6792 case R_ARM_PC24:
6793 case R_ARM_ABS32:
bb224fc3 6794 case R_ARM_ABS32_NOI:
252b5132 6795 case R_ARM_REL32:
bb224fc3 6796 case R_ARM_REL32_NOI:
5b5bb741
PB		 6797 case R_ARM_CALL:
6798 case R_ARM_JUMP24:
dfc5f959 6799 case R_ARM_XPC25:
eb043451 6800 case R_ARM_PREL31:
7359ea65 6801 case R_ARM_PLT32:
7359ea65
DJ		 6802 /* Handle relocations which should use the PLT entry. ABS32/REL32
6803 will use the symbol's value, which may point to a PLT entry, but we
6804 don't need to handle that here. If we created a PLT entry, all
5fa9e92f
CL		 6805 branches in this object should go to it, except if the PLT is too
6806 far away, in which case a long branch stub should be inserted. */
bb224fc3 6807 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
5fa9e92f 6808 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
155d87d7
CL		 6809 && r_type != R_ARM_CALL
6810 && r_type != R_ARM_JUMP24
6811 && r_type != R_ARM_PLT32)
7359ea65 6812 && h != NULL
c84cd8ee 6813 && splt != NULL
7359ea65
DJ		 6814 && h->plt.offset != (bfd_vma) -1)
6815 {
c84cd8ee
DJ		 6816 /* If we've created a .plt section, and assigned a PLT entry to
6817 this function, it should not be known to bind locally. If
6818 it were, we would have cleared the PLT entry. */
7359ea65
DJ		 6819 BFD_ASSERT (!SYMBOL_CALLS_LOCAL (info, h));
6820
6821 value = (splt->output_section->vma
6822 + splt->output_offset
6823 + h->plt.offset);
0945cdfd 6824 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 6825 return _bfd_final_link_relocate (howto, input_bfd, input_section,
6826 contents, rel->r_offset, value,
00a97672 6827 rel->r_addend);
7359ea65
DJ		 6828 }
6829
67687978
PB		 6830 /* When generating a shared object or relocatable executable, these
6831 relocations are copied into the output file to be resolved at
6832 run time. */
6833 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 6834 && (input_section->flags & SEC_ALLOC)
3348747a
NS		 6835 && !(elf32_arm_hash_table (info)->vxworks_p
6836 && strcmp (input_section->output_section->name,
6837 ".tls_vars") == 0)
bb224fc3 6838 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 6839 || !SYMBOL_CALLS_LOCAL (info, h))
7359ea65
DJ		 6840 && (h == NULL
6841 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
6842 || h->root.type != bfd_link_hash_undefweak)
6843 && r_type != R_ARM_PC24
5b5bb741
PB		 6844 && r_type != R_ARM_CALL
6845 && r_type != R_ARM_JUMP24
ee06dc07 6846 && r_type != R_ARM_PREL31
7359ea65 6847 && r_type != R_ARM_PLT32)
252b5132 6848 {
947216bf
AM		 6849 Elf_Internal_Rela outrel;
6850 bfd_byte *loc;
b34976b6 6851 bfd_boolean skip, relocate;
f21f3fe0 6852
0945cdfd
DJ		 6853 *unresolved_reloc_p = FALSE;
6854
252b5132
RH		 6855 if (sreloc == NULL)
6856 {
83bac4b0
NC		 6857 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
6858 ! globals->use_rel);
f21f3fe0 6859
83bac4b0 6860 if (sreloc == NULL)
252b5132 6861 return bfd_reloc_notsupported;
252b5132 6862 }
f21f3fe0 6863
b34976b6
AM		 6864 skip = FALSE;
6865 relocate = FALSE;
f21f3fe0 6866
00a97672 6867 outrel.r_addend = addend;
c629eae0
JJ		 6868 outrel.r_offset =
6869 _bfd_elf_section_offset (output_bfd, info, input_section,
6870 rel->r_offset);
6871 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 6872 skip = TRUE;
0bb2d96a 6873 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 6874 skip = TRUE, relocate = TRUE;
252b5132
RH		 6875 outrel.r_offset += (input_section->output_section->vma
6876 + input_section->output_offset);
f21f3fe0 6877
252b5132 6878 if (skip)
0bb2d96a 6879 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 6880 else if (h != NULL
6881 && h->dynindx != -1
7359ea65 6882 && (!info->shared
5e681ec4 6883 || !info->symbolic
f5385ebf 6884 || !h->def_regular))
5e681ec4 6885 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 6886 else
6887 {
a16385dc
MM		 6888 int symbol;
6889
5e681ec4 6890 /* This symbol is local, or marked to become local. */
b7693d02
DJ		 6891 if (sym_flags == STT_ARM_TFUNC)
6892 value |= 1;
a16385dc 6893 if (globals->symbian_p)
6366ff1e 6894 {
74541ad4
AM		 6895 asection *osec;
6896
6366ff1e
MM		 6897 /* On Symbian OS, the data segment and text segement
6898 can be relocated independently. Therefore, we
6899 must indicate the segment to which this
6900 relocation is relative. The BPABI allows us to
6901 use any symbol in the right segment; we just use
6902 the section symbol as it is convenient. (We
6903 cannot use the symbol given by "h" directly as it
74541ad4
AM		 6904 will not appear in the dynamic symbol table.)
6905
6906 Note that the dynamic linker ignores the section
6907 symbol value, so we don't subtract osec->vma
6908 from the emitted reloc addend. */
10dbd1f3 6909 if (sym_sec)
74541ad4 6910 osec = sym_sec->output_section;
10dbd1f3 6911 else
74541ad4
AM		 6912 osec = input_section->output_section;
6913 symbol = elf_section_data (osec)->dynindx;
6914 if (symbol == 0)
6915 {
6916 struct elf_link_hash_table *htab = elf_hash_table (info);
6917
6918 if ((osec->flags & SEC_READONLY) == 0
6919 && htab->data_index_section != NULL)
6920 osec = htab->data_index_section;
6921 else
6922 osec = htab->text_index_section;
6923 symbol = elf_section_data (osec)->dynindx;
6924 }
6366ff1e
MM		 6925 BFD_ASSERT (symbol != 0);
6926 }
a16385dc
MM		 6927 else
6928 /* On SVR4-ish systems, the dynamic loader cannot
6929 relocate the text and data segments independently,
6930 so the symbol does not matter. */
6931 symbol = 0;
6932 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 6933 if (globals->use_rel)
6934 relocate = TRUE;
6935 else
6936 outrel.r_addend += value;
252b5132 6937 }
f21f3fe0 6938
947216bf 6939 loc = sreloc->contents;
00a97672
RS		 6940 loc += sreloc->reloc_count++ * RELOC_SIZE (globals);
6941 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9a5aca8c 6942
f21f3fe0 6943 /* If this reloc is against an external symbol, we do not want to
252b5132 6944 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 6945 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 6946 if (! relocate)
6947 return bfd_reloc_ok;
9a5aca8c 6948
f21f3fe0 6949 return _bfd_final_link_relocate (howto, input_bfd, input_section,
252b5132
RH		 6950 contents, rel->r_offset, value,
6951 (bfd_vma) 0);
6952 }
6953 else switch (r_type)
6954 {
00a97672
RS		 6955 case R_ARM_ABS12:
6956 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
6957
dfc5f959 6958 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 6959 case R_ARM_CALL:
6960 case R_ARM_JUMP24:
8029a119 6961 case R_ARM_PC24: /* Arm B/BL instruction. */
7359ea65 6962 case R_ARM_PLT32:
906e58ca
NC		 6963 {
6964 bfd_vma from;
6965 bfd_signed_vma branch_offset;
6966 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
6967
dfc5f959 6968 if (r_type == R_ARM_XPC25)
252b5132 6969 {
dfc5f959
NC		 6970 /* Check for Arm calling Arm function. */
6971 /* FIXME: Should we translate the instruction into a BL
6972 instruction instead ? */
6973 if (sym_flags != STT_ARM_TFUNC)
d003868e
AM		 6974 (*_bfd_error_handler)
6975 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
6976 input_bfd,
6977 h ? h->root.root.string : "(local)");
dfc5f959 6978 }
155d87d7 6979 else if (r_type == R_ARM_PC24)
dfc5f959
NC		 6980 {
6981 /* Check for Arm calling Thumb function. */
6982 if (sym_flags == STT_ARM_TFUNC)
6983 {
f2a9dd69
DJ		 6984 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
6985 output_bfd, input_section,
6986 hit_data, sym_sec, rel->r_offset,
6987 signed_addend, value,
6988 error_message))
6989 return bfd_reloc_ok;
6990 else
6991 return bfd_reloc_dangerous;
dfc5f959 6992 }
252b5132 6993 }
ba96a88f 6994
906e58ca 6995 /* Check if a stub has to be inserted because the
8029a119 6996 destination is too far or we are changing mode. */
155d87d7
CL		 6997 if ( r_type == R_ARM_CALL
6998 || r_type == R_ARM_JUMP24
6999 || r_type == R_ARM_PLT32)
906e58ca 7000 {
5fa9e92f
CL		 7001 /* If the call goes through a PLT entry, make sure to
7002 check distance to the right destination address. */
7003 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
7004 {
7005 value = (splt->output_section->vma
7006 + splt->output_offset
7007 + h->plt.offset);
7008 *unresolved_reloc_p = FALSE;
7009 }
7010
7011 from = (input_section->output_section->vma
7012 + input_section->output_offset
7013 + rel->r_offset);
7014 branch_offset = (bfd_signed_vma)(value - from);
7015
906e58ca
NC		 7016 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
7017 || branch_offset < ARM_MAX_BWD_BRANCH_OFFSET
155d87d7
CL		 7018 || ((sym_flags == STT_ARM_TFUNC)
7019 && (((r_type == R_ARM_CALL) && !globals->use_blx)
7020 || (r_type == R_ARM_JUMP24)
7021 || (r_type == R_ARM_PLT32) ))
7022 )
906e58ca
NC		 7023 {
7024 /* The target is out of reach, so redirect the
7025 branch to the local stub for this function. */
7026
7027 stub_entry = elf32_arm_get_stub_entry (input_section,
7028 sym_sec, h,
7029 rel, globals);
7030 if (stub_entry != NULL)
7031 value = (stub_entry->stub_offset
7032 + stub_entry->stub_sec->output_offset
7033 + stub_entry->stub_sec->output_section->vma);
7034 }
7035 }
7036
dea514f5
PB		 7037 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
7038 where:
7039 S is the address of the symbol in the relocation.
7040 P is address of the instruction being relocated.
7041 A is the addend (extracted from the instruction) in bytes.
7042
7043 S is held in 'value'.
7044 P is the base address of the section containing the
7045 instruction plus the offset of the reloc into that
7046 section, ie:
7047 (input_section->output_section->vma +
7048 input_section->output_offset +
7049 rel->r_offset).
7050 A is the addend, converted into bytes, ie:
7051 (signed_addend * 4)
7052
7053 Note: None of these operations have knowledge of the pipeline
7054 size of the processor, thus it is up to the assembler to
7055 encode this information into the addend. */
7056 value -= (input_section->output_section->vma
7057 + input_section->output_offset);
7058 value -= rel->r_offset;
4e7fd91e
PB		 7059 if (globals->use_rel)
7060 value += (signed_addend << howto->size);
7061 else
7062 /* RELA addends do not have to be adjusted by howto->size. */
7063 value += signed_addend;
23080146 7064
dcb5e6e6
NC		 7065 signed_addend = value;
7066 signed_addend >>= howto->rightshift;
9a5aca8c 7067
5ab79981 7068 /* A branch to an undefined weak symbol is turned into a jump to
82b5c97a
CL		 7069 the next instruction unless a PLT entry will be created. */
7070 if (h && h->root.type == bfd_link_hash_undefweak
7071 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
5ab79981
PB		 7072 {
7073 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000)
7074 | 0x0affffff;
7075 }
7076 else
59f2c4e7 7077 {
9b485d32 7078 /* Perform a signed range check. */
dcb5e6e6 7079 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 7080 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
7081 return bfd_reloc_overflow;
9a5aca8c 7082
5ab79981 7083 addend = (value & 2);
39b41c9c 7084
5ab79981
PB		 7085 value = (signed_addend & howto->dst_mask)
7086 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 7087
5ab79981
PB		 7088 if (r_type == R_ARM_CALL)
7089 {
155d87d7
CL		 7090 /* Set the H bit in the BLX instruction. */
7091 if (sym_flags == STT_ARM_TFUNC)
7092 {
7093 if (addend)
7094 value |= (1 << 24);
7095 else
7096 value &= ~(bfd_vma)(1 << 24);
7097 }
7098
5ab79981 7099 /* Select the correct instruction (BL or BLX). */
906e58ca 7100 /* Only if we are not handling a BL to a stub. In this
8029a119 7101 case, mode switching is performed by the stub. */
906e58ca 7102 if (sym_flags == STT_ARM_TFUNC && !stub_entry)
5ab79981
PB		 7103 value |= (1 << 28);
7104 else
7105 {
7106 value &= ~(bfd_vma)(1 << 28);
7107 value |= (1 << 24);
7108 }
39b41c9c
PB		 7109 }
7110 }
906e58ca 7111 }
252b5132 7112 break;
f21f3fe0 7113
252b5132
RH		 7114 case R_ARM_ABS32:
7115 value += addend;
7116 if (sym_flags == STT_ARM_TFUNC)
7117 value |= 1;
7118 break;
f21f3fe0 7119
bb224fc3
MS		 7120 case R_ARM_ABS32_NOI:
7121 value += addend;
7122 break;
7123
252b5132 7124 case R_ARM_REL32:
a8bc6c78
PB		 7125 value += addend;
7126 if (sym_flags == STT_ARM_TFUNC)
7127 value |= 1;
252b5132 7128 value -= (input_section->output_section->vma
62efb346 7129 + input_section->output_offset + rel->r_offset);
252b5132 7130 break;
eb043451 7131
bb224fc3
MS		 7132 case R_ARM_REL32_NOI:
7133 value += addend;
7134 value -= (input_section->output_section->vma
7135 + input_section->output_offset + rel->r_offset);
7136 break;
7137
eb043451
PB		 7138 case R_ARM_PREL31:
7139 value -= (input_section->output_section->vma
7140 + input_section->output_offset + rel->r_offset);
7141 value += signed_addend;
7142 if (! h || h->root.type != bfd_link_hash_undefweak)
7143 {
8029a119 7144 /* Check for overflow. */
eb043451
PB		 7145 if ((value ^ (value >> 1)) & (1 << 30))
7146 return bfd_reloc_overflow;
7147 }
7148 value &= 0x7fffffff;
7149 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
7150 if (sym_flags == STT_ARM_TFUNC)
7151 value |= 1;
7152 break;
252b5132 7153 }
f21f3fe0 7154
252b5132
RH		 7155 bfd_put_32 (input_bfd, value, hit_data);
7156 return bfd_reloc_ok;
7157
7158 case R_ARM_ABS8:
7159 value += addend;
7160 if ((long) value > 0x7f || (long) value < -0x80)
7161 return bfd_reloc_overflow;
7162
7163 bfd_put_8 (input_bfd, value, hit_data);
7164 return bfd_reloc_ok;
7165
7166 case R_ARM_ABS16:
7167 value += addend;
7168
7169 if ((long) value > 0x7fff || (long) value < -0x8000)
7170 return bfd_reloc_overflow;
7171
7172 bfd_put_16 (input_bfd, value, hit_data);
7173 return bfd_reloc_ok;
7174
252b5132 7175 case R_ARM_THM_ABS5:
9b485d32 7176 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 7177 if (globals->use_rel)
7178 {
7179 /* Need to refetch addend. */
7180 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7181 /* ??? Need to determine shift amount from operand size. */
7182 addend >>= howto->rightshift;
7183 }
252b5132
RH		 7184 value += addend;
7185
7186 /* ??? Isn't value unsigned? */
7187 if ((long) value > 0x1f || (long) value < -0x10)
7188 return bfd_reloc_overflow;
7189
7190 /* ??? Value needs to be properly shifted into place first. */
7191 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
7192 bfd_put_16 (input_bfd, value, hit_data);
7193 return bfd_reloc_ok;
7194
2cab6cc3
MS		 7195 case R_ARM_THM_ALU_PREL_11_0:
7196 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
7197 {
7198 bfd_vma insn;
7199 bfd_signed_vma relocation;
7200
7201 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7202 | bfd_get_16 (input_bfd, hit_data + 2);
7203
7204 if (globals->use_rel)
7205 {
7206 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
7207 | ((insn & (1 << 26)) >> 15);
7208 if (insn & 0xf00000)
7209 signed_addend = -signed_addend;
7210 }
7211
7212 relocation = value + signed_addend;
7213 relocation -= (input_section->output_section->vma
7214 + input_section->output_offset
7215 + rel->r_offset);
7216
7217 value = abs (relocation);
7218
7219 if (value >= 0x1000)
7220 return bfd_reloc_overflow;
7221
7222 insn = (insn & 0xfb0f8f00) | (value & 0xff)
7223 | ((value & 0x700) << 4)
7224 | ((value & 0x800) << 15);
7225 if (relocation < 0)
7226 insn |= 0xa00000;
7227
7228 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7229 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7230
7231 return bfd_reloc_ok;
7232 }
7233
e1ec24c6
NC		 7234 case R_ARM_THM_PC8:
7235 /* PR 10073: This reloc is not generated by the GNU toolchain,
7236 but it is supported for compatibility with third party libraries
7237 generated by other compilers, specifically the ARM/IAR. */
7238 {
7239 bfd_vma insn;
7240 bfd_signed_vma relocation;
7241
7242 insn = bfd_get_16 (input_bfd, hit_data);
7243
7244 if (globals->use_rel)
7245 addend = (insn & 0x00ff) << 2;
7246
7247 relocation = value + addend;
7248 relocation -= (input_section->output_section->vma
7249 + input_section->output_offset
7250 + rel->r_offset);
7251
7252 value = abs (relocation);
7253
7254 /* We do not check for overflow of this reloc. Although strictly
7255 speaking this is incorrect, it appears to be necessary in order
7256 to work with IAR generated relocs. Since GCC and GAS do not
7257 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
7258 a problem for them. */
7259 value &= 0x3fc;
7260
7261 insn = (insn & 0xff00) | (value >> 2);
7262
7263 bfd_put_16 (input_bfd, insn, hit_data);
7264
7265 return bfd_reloc_ok;
7266 }
7267
2cab6cc3
MS		 7268 case R_ARM_THM_PC12:
7269 /* Corresponds to: ldr.w reg, [pc, #offset]. */
7270 {
7271 bfd_vma insn;
7272 bfd_signed_vma relocation;
7273
7274 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7275 | bfd_get_16 (input_bfd, hit_data + 2);
7276
7277 if (globals->use_rel)
7278 {
7279 signed_addend = insn & 0xfff;
7280 if (!(insn & (1 << 23)))
7281 signed_addend = -signed_addend;
7282 }
7283
7284 relocation = value + signed_addend;
7285 relocation -= (input_section->output_section->vma
7286 + input_section->output_offset
7287 + rel->r_offset);
7288
7289 value = abs (relocation);
7290
7291 if (value >= 0x1000)
7292 return bfd_reloc_overflow;
7293
7294 insn = (insn & 0xff7ff000) | value;
7295 if (relocation >= 0)
7296 insn |= (1 << 23);
7297
7298 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7299 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7300
7301 return bfd_reloc_ok;
7302 }
7303
dfc5f959 7304 case R_ARM_THM_XPC22:
c19d1205 7305 case R_ARM_THM_CALL:
bd97cb95 7306 case R_ARM_THM_JUMP24:
dfc5f959 7307 /* Thumb BL (branch long instruction). */
252b5132 7308 {
b34976b6 7309 bfd_vma relocation;
e95de063 7310 bfd_vma reloc_sign;
b34976b6
AM		 7311 bfd_boolean overflow = FALSE;
7312 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7313 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 7314 bfd_signed_vma reloc_signed_max;
7315 bfd_signed_vma reloc_signed_min;
b34976b6 7316 bfd_vma check;
252b5132 7317 bfd_signed_vma signed_check;
e95de063
MS		 7318 int bitsize;
7319 int thumb2 = using_thumb2 (globals);
252b5132 7320
5ab79981 7321 /* A branch to an undefined weak symbol is turned into a jump to
19540007
JM		 7322 the next instruction unless a PLT entry will be created. */
7323 if (h && h->root.type == bfd_link_hash_undefweak
7324 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
5ab79981
PB		 7325 {
7326 bfd_put_16 (input_bfd, 0xe000, hit_data);
7327 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
7328 return bfd_reloc_ok;
7329 }
7330
e95de063
MS		 7331 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
7332 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 7333 if (globals->use_rel)
7334 {
e95de063
MS		 7335 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
7336 bfd_vma upper = upper_insn & 0x3ff;
7337 bfd_vma lower = lower_insn & 0x7ff;
7338 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
7339 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
7340 bfd_vma i1 = j1 ^ s ? 0 : 1;
7341 bfd_vma i2 = j2 ^ s ? 0 : 1;
7342
7343 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
7344 /* Sign extend. */
7345 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
7346
4e7fd91e
PB		 7347 signed_addend = addend;
7348 }
cb1afa5c 7349
dfc5f959
NC		 7350 if (r_type == R_ARM_THM_XPC22)
7351 {
7352 /* Check for Thumb to Thumb call. */
7353 /* FIXME: Should we translate the instruction into a BL
7354 instruction instead ? */
7355 if (sym_flags == STT_ARM_TFUNC)
d003868e
AM		 7356 (*_bfd_error_handler)
7357 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
7358 input_bfd,
7359 h ? h->root.root.string : "(local)");
dfc5f959
NC		 7360 }
7361 else
252b5132 7362 {
dfc5f959
NC		 7363 /* If it is not a call to Thumb, assume call to Arm.
7364 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 7365 function call at all, but rather a long jump. Calls through
7366 the PLT do not require stubs. */
7367 if (sym_flags != STT_ARM_TFUNC && sym_flags != STT_SECTION
7368 && (h == NULL || splt == NULL
7369 || h->plt.offset == (bfd_vma) -1))
dfc5f959 7370 {
bd97cb95 7371 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7372 {
7373 /* Convert BL to BLX. */
7374 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7375 }
155d87d7
CL		 7376 else if (( r_type != R_ARM_THM_CALL)
7377 && (r_type != R_ARM_THM_JUMP24))
8029a119
NC		 7378 {
7379 if (elf32_thumb_to_arm_stub
7380 (info, sym_name, input_bfd, output_bfd, input_section,
7381 hit_data, sym_sec, rel->r_offset, signed_addend, value,
7382 error_message))
7383 return bfd_reloc_ok;
7384 else
7385 return bfd_reloc_dangerous;
7386 }
da5938a2 7387 }
bd97cb95
DJ		 7388 else if (sym_flags == STT_ARM_TFUNC && globals->use_blx
7389 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7390 {
7391 /* Make sure this is a BL. */
7392 lower_insn |= 0x1800;
7393 }
252b5132 7394 }
f21f3fe0 7395
b7693d02
DJ		 7396 /* Handle calls via the PLT. */
7397 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
7398 {
7399 value = (splt->output_section->vma
7400 + splt->output_offset
7401 + h->plt.offset);
bd97cb95 7402 if (globals->use_blx && r_type == R_ARM_THM_CALL)
33bfe774
JB		 7403 {
7404 /* If the Thumb BLX instruction is available, convert the
7405 BL to a BLX instruction to call the ARM-mode PLT entry. */
39b41c9c 7406 lower_insn = (lower_insn & ~0x1000) | 0x0800;
33bfe774
JB		 7407 }
7408 else
7409 /* Target the Thumb stub before the ARM PLT entry. */
7410 value -= PLT_THUMB_STUB_SIZE;
0945cdfd 7411 *unresolved_reloc_p = FALSE;
b7693d02
DJ		 7412 }
7413
155d87d7 7414 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca
NC		 7415 {
7416 /* Check if a stub has to be inserted because the destination
8029a119 7417 is too far. */
906e58ca
NC		 7418 bfd_vma from;
7419 bfd_signed_vma branch_offset;
7420 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
7421
7422 from = (input_section->output_section->vma
7423 + input_section->output_offset
7424 + rel->r_offset);
7425 branch_offset = (bfd_signed_vma)(value - from);
7426
7427 if ((!thumb2
7428 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
7429 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
7430 ||
7431 (thumb2
7432 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
f4ac8484 7433 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
155d87d7
CL		 7434 || ((sym_flags != STT_ARM_TFUNC)
7435 && (((r_type == R_ARM_THM_CALL) && !globals->use_blx)
7436 || r_type == R_ARM_THM_JUMP24)))
906e58ca
NC		 7437 {
7438 /* The target is out of reach or we are changing modes, so
7439 redirect the branch to the local stub for this
7440 function. */
7441 stub_entry = elf32_arm_get_stub_entry (input_section,
7442 sym_sec, h,
7443 rel, globals);
7444 if (stub_entry != NULL)
7445 value = (stub_entry->stub_offset
7446 + stub_entry->stub_sec->output_offset
7447 + stub_entry->stub_sec->output_section->vma);
7448
f4ac8484 7449 /* If this call becomes a call to Arm, force BLX. */
155d87d7 7450 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
f4ac8484
DJ		 7451 {
7452 if ((stub_entry
7453 && !arm_stub_is_thumb (stub_entry->stub_type))
7454 || (sym_flags != STT_ARM_TFUNC))
7455 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7456 }
906e58ca
NC		 7457 }
7458 }
7459
ba96a88f 7460 relocation = value + signed_addend;
f21f3fe0 7461
252b5132 7462 relocation -= (input_section->output_section->vma
ba96a88f
NC		 7463 + input_section->output_offset
7464 + rel->r_offset);
9a5aca8c 7465
252b5132
RH		 7466 check = relocation >> howto->rightshift;
7467
7468 /* If this is a signed value, the rightshift just dropped
7469 leading 1 bits (assuming twos complement). */
7470 if ((bfd_signed_vma) relocation >= 0)
7471 signed_check = check;
7472 else
7473 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
7474
e95de063
MS		 7475 /* Calculate the permissable maximum and minimum values for
7476 this relocation according to whether we're relocating for
7477 Thumb-2 or not. */
7478 bitsize = howto->bitsize;
7479 if (!thumb2)
7480 bitsize -= 2;
7481 reloc_signed_max = ((1 << (bitsize - 1)) - 1) >> howto->rightshift;
7482 reloc_signed_min = ~reloc_signed_max;
7483
252b5132 7484 /* Assumes two's complement. */
ba96a88f 7485 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 7486 overflow = TRUE;
252b5132 7487
bd97cb95 7488 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 7489 /* For a BLX instruction, make sure that the relocation is rounded up
7490 to a word boundary. This follows the semantics of the instruction
7491 which specifies that bit 1 of the target address will come from bit
7492 1 of the base address. */
7493 relocation = (relocation + 2) & ~ 3;
cb1afa5c 7494
e95de063
MS		 7495 /* Put RELOCATION back into the insn. Assumes two's complement.
7496 We use the Thumb-2 encoding, which is safe even if dealing with
7497 a Thumb-1 instruction by virtue of our overflow check above. */
7498 reloc_sign = (signed_check < 0) ? 1 : 0;
7499 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
7500 | ((relocation >> 12) & 0x3ff)
7501 | (reloc_sign << 10);
906e58ca 7502 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
e95de063
MS		 7503 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
7504 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
7505 | ((relocation >> 1) & 0x7ff);
c62e1cc3 7506
252b5132
RH		 7507 /* Put the relocated value back in the object file: */
7508 bfd_put_16 (input_bfd, upper_insn, hit_data);
7509 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
7510
7511 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
7512 }
7513 break;
7514
c19d1205
ZW		 7515 case R_ARM_THM_JUMP19:
7516 /* Thumb32 conditional branch instruction. */
7517 {
7518 bfd_vma relocation;
7519 bfd_boolean overflow = FALSE;
7520 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7521 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 7522 bfd_signed_vma reloc_signed_max = 0xffffe;
7523 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 7524 bfd_signed_vma signed_check;
7525
7526 /* Need to refetch the addend, reconstruct the top three bits,
7527 and squish the two 11 bit pieces together. */
7528 if (globals->use_rel)
7529 {
7530 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 7531 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 7532 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
7533 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
7534 bfd_vma lower = (lower_insn & 0x07ff);
7535
a00a1f35
MS		 7536 upper |= J1 << 6;
7537 upper |= J2 << 7;
7538 upper |= (!S) << 8;
c19d1205
ZW		 7539 upper -= 0x0100; /* Sign extend. */
7540
7541 addend = (upper << 12) | (lower << 1);
7542 signed_addend = addend;
7543 }
7544
bd97cb95
DJ		 7545 /* Handle calls via the PLT. */
7546 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
7547 {
7548 value = (splt->output_section->vma
7549 + splt->output_offset
7550 + h->plt.offset);
7551 /* Target the Thumb stub before the ARM PLT entry. */
7552 value -= PLT_THUMB_STUB_SIZE;
7553 *unresolved_reloc_p = FALSE;
7554 }
7555
c19d1205
ZW		 7556 /* ??? Should handle interworking? GCC might someday try to
7557 use this for tail calls. */
7558
7559 relocation = value + signed_addend;
7560 relocation -= (input_section->output_section->vma
7561 + input_section->output_offset
7562 + rel->r_offset);
a00a1f35 7563 signed_check = (bfd_signed_vma) relocation;
c19d1205 7564
c19d1205
ZW		 7565 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
7566 overflow = TRUE;
7567
7568 /* Put RELOCATION back into the insn. */
7569 {
7570 bfd_vma S = (relocation & 0x00100000) >> 20;
7571 bfd_vma J2 = (relocation & 0x00080000) >> 19;
7572 bfd_vma J1 = (relocation & 0x00040000) >> 18;
7573 bfd_vma hi = (relocation & 0x0003f000) >> 12;
7574 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
7575
a00a1f35 7576 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 7577 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
7578 }
7579
7580 /* Put the relocated value back in the object file: */
7581 bfd_put_16 (input_bfd, upper_insn, hit_data);
7582 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
7583
7584 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
7585 }
7586
7587 case R_ARM_THM_JUMP11:
7588 case R_ARM_THM_JUMP8:
7589 case R_ARM_THM_JUMP6:
51c5503b
NC		 7590 /* Thumb B (branch) instruction). */
7591 {
6cf9e9fe 7592 bfd_signed_vma relocation;
51c5503b
NC		 7593 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
7594 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 7595 bfd_signed_vma signed_check;
7596
c19d1205
ZW		 7597 /* CZB cannot jump backward. */
7598 if (r_type == R_ARM_THM_JUMP6)
7599 reloc_signed_min = 0;
7600
4e7fd91e 7601 if (globals->use_rel)
6cf9e9fe 7602 {
4e7fd91e
PB		 7603 /* Need to refetch addend. */
7604 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7605 if (addend & ((howto->src_mask + 1) >> 1))
7606 {
7607 signed_addend = -1;
7608 signed_addend &= ~ howto->src_mask;
7609 signed_addend |= addend;
7610 }
7611 else
7612 signed_addend = addend;
7613 /* The value in the insn has been right shifted. We need to
7614 undo this, so that we can perform the address calculation
7615 in terms of bytes. */
7616 signed_addend <<= howto->rightshift;
6cf9e9fe 7617 }
6cf9e9fe 7618 relocation = value + signed_addend;
51c5503b
NC		 7619
7620 relocation -= (input_section->output_section->vma
7621 + input_section->output_offset
7622 + rel->r_offset);
7623
6cf9e9fe
NC		 7624 relocation >>= howto->rightshift;
7625 signed_check = relocation;
c19d1205
ZW		 7626
7627 if (r_type == R_ARM_THM_JUMP6)
7628 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
7629 else
7630 relocation &= howto->dst_mask;
51c5503b 7631 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 7632
51c5503b
NC		 7633 bfd_put_16 (input_bfd, relocation, hit_data);
7634
7635 /* Assumes two's complement. */
7636 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
7637 return bfd_reloc_overflow;
7638
7639 return bfd_reloc_ok;
7640 }
cedb70c5 7641
8375c36b
PB		 7642 case R_ARM_ALU_PCREL7_0:
7643 case R_ARM_ALU_PCREL15_8:
7644 case R_ARM_ALU_PCREL23_15:
7645 {
7646 bfd_vma insn;
7647 bfd_vma relocation;
7648
7649 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 7650 if (globals->use_rel)
7651 {
7652 /* Extract the addend. */
7653 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
7654 signed_addend = addend;
7655 }
8375c36b
PB		 7656 relocation = value + signed_addend;
7657
7658 relocation -= (input_section->output_section->vma
7659 + input_section->output_offset
7660 + rel->r_offset);
7661 insn = (insn & ~0xfff)
7662 | ((howto->bitpos << 7) & 0xf00)
7663 | ((relocation >> howto->bitpos) & 0xff);
7664 bfd_put_32 (input_bfd, value, hit_data);
7665 }
7666 return bfd_reloc_ok;
7667
252b5132
RH		 7668 case R_ARM_GNU_VTINHERIT:
7669 case R_ARM_GNU_VTENTRY:
7670 return bfd_reloc_ok;
7671
c19d1205 7672 case R_ARM_GOTOFF32:
252b5132
RH		 7673 /* Relocation is relative to the start of the
7674 global offset table. */
7675
7676 BFD_ASSERT (sgot != NULL);
7677 if (sgot == NULL)
7678 return bfd_reloc_notsupported;
9a5aca8c 7679
cedb70c5 7680 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 7681 address by one, so that attempts to call the function pointer will
7682 correctly interpret it as Thumb code. */
7683 if (sym_flags == STT_ARM_TFUNC)
7684 value += 1;
7685
252b5132
RH		 7686 /* Note that sgot->output_offset is not involved in this
7687 calculation. We always want the start of .got. If we
7688 define _GLOBAL_OFFSET_TABLE in a different way, as is
7689 permitted by the ABI, we might have to change this
9b485d32 7690 calculation. */
252b5132 7691 value -= sgot->output_section->vma;
f21f3fe0 7692 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7693 contents, rel->r_offset, value,
00a97672 7694 rel->r_addend);
252b5132
RH		 7695
7696 case R_ARM_GOTPC:
a7c10850 7697 /* Use global offset table as symbol value. */
252b5132 7698 BFD_ASSERT (sgot != NULL);
f21f3fe0 7699
252b5132
RH		 7700 if (sgot == NULL)
7701 return bfd_reloc_notsupported;
7702
0945cdfd 7703 *unresolved_reloc_p = FALSE;
252b5132 7704 value = sgot->output_section->vma;
f21f3fe0 7705 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7706 contents, rel->r_offset, value,
00a97672 7707 rel->r_addend);
f21f3fe0 7708
252b5132 7709 case R_ARM_GOT32:
eb043451 7710 case R_ARM_GOT_PREL:
252b5132 7711 /* Relocation is to the entry for this symbol in the
9b485d32 7712 global offset table. */
252b5132
RH		 7713 if (sgot == NULL)
7714 return bfd_reloc_notsupported;
f21f3fe0 7715
252b5132
RH		 7716 if (h != NULL)
7717 {
7718 bfd_vma off;
5e681ec4 7719 bfd_boolean dyn;
f21f3fe0 7720
252b5132
RH		 7721 off = h->got.offset;
7722 BFD_ASSERT (off != (bfd_vma) -1);
5e681ec4 7723 dyn = globals->root.dynamic_sections_created;
f21f3fe0 7724
5e681ec4 7725 if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
50d6c878 7726 || (info->shared
5e681ec4
PB		 7727 && SYMBOL_REFERENCES_LOCAL (info, h))
7728 || (ELF_ST_VISIBILITY (h->other)
7729 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 7730 {
7731 /* This is actually a static link, or it is a -Bsymbolic link
7732 and the symbol is defined locally. We must initialize this
7733 entry in the global offset table. Since the offset must
7734 always be a multiple of 4, we use the least significant bit
7735 to record whether we have initialized it already.
f21f3fe0 7736
00a97672 7737 When doing a dynamic link, we create a .rel(a).got relocation
f21f3fe0 7738 entry to initialize the value. This is done in the
9b485d32 7739 finish_dynamic_symbol routine. */
252b5132
RH		 7740 if ((off & 1) != 0)
7741 off &= ~1;
7742 else
7743 {
ee29b9fb
RE		 7744 /* If we are addressing a Thumb function, we need to
7745 adjust the address by one, so that attempts to
7746 call the function pointer will correctly
7747 interpret it as Thumb code. */
7748 if (sym_flags == STT_ARM_TFUNC)
7749 value |= 1;
7750
252b5132
RH		 7751 bfd_put_32 (output_bfd, value, sgot->contents + off);
7752 h->got.offset |= 1;
7753 }
7754 }
0945cdfd
DJ		 7755 else
7756 *unresolved_reloc_p = FALSE;
f21f3fe0 7757
252b5132
RH		 7758 value = sgot->output_offset + off;
7759 }
7760 else
7761 {
7762 bfd_vma off;
f21f3fe0 7763
252b5132
RH		 7764 BFD_ASSERT (local_got_offsets != NULL &&
7765 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 7766
252b5132 7767 off = local_got_offsets[r_symndx];
f21f3fe0 7768
252b5132
RH		 7769 /* The offset must always be a multiple of 4. We use the
7770 least significant bit to record whether we have already
9b485d32 7771 generated the necessary reloc. */
252b5132
RH		 7772 if ((off & 1) != 0)
7773 off &= ~1;
7774 else
7775 {
b7693d02
DJ		 7776 /* If we are addressing a Thumb function, we need to
7777 adjust the address by one, so that attempts to
7778 call the function pointer will correctly
7779 interpret it as Thumb code. */
7780 if (sym_flags == STT_ARM_TFUNC)
7781 value |= 1;
7782
00a97672
RS		 7783 if (globals->use_rel)
7784 bfd_put_32 (output_bfd, value, sgot->contents + off);
f21f3fe0 7785
252b5132
RH		 7786 if (info->shared)
7787 {
7788 asection * srelgot;
947216bf
AM		 7789 Elf_Internal_Rela outrel;
7790 bfd_byte *loc;
f21f3fe0 7791
00a97672
RS		 7792 srelgot = (bfd_get_section_by_name
7793 (dynobj, RELOC_SECTION (globals, ".got")));
252b5132 7794 BFD_ASSERT (srelgot != NULL);
f21f3fe0 7795
00a97672 7796 outrel.r_addend = addend + value;
252b5132 7797 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 7798 + sgot->output_offset
252b5132
RH		 7799 + off);
7800 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
947216bf 7801 loc = srelgot->contents;
00a97672
RS		 7802 loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
7803 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
252b5132 7804 }
f21f3fe0 7805
252b5132
RH		 7806 local_got_offsets[r_symndx] |= 1;
7807 }
f21f3fe0 7808
252b5132
RH		 7809 value = sgot->output_offset + off;
7810 }
eb043451
PB		 7811 if (r_type != R_ARM_GOT32)
7812 value += sgot->output_section->vma;
9a5aca8c 7813
f21f3fe0 7814 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7815 contents, rel->r_offset, value,
00a97672 7816 rel->r_addend);
f21f3fe0 7817
ba93b8ac
DJ		 7818 case R_ARM_TLS_LDO32:
7819 value = value - dtpoff_base (info);
7820
7821 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 7822 contents, rel->r_offset, value,
7823 rel->r_addend);
ba93b8ac
DJ		 7824
7825 case R_ARM_TLS_LDM32:
7826 {
7827 bfd_vma off;
7828
7829 if (globals->sgot == NULL)
7830 abort ();
7831
7832 off = globals->tls_ldm_got.offset;
7833
7834 if ((off & 1) != 0)
7835 off &= ~1;
7836 else
7837 {
7838 /* If we don't know the module number, create a relocation
7839 for it. */
7840 if (info->shared)
7841 {
7842 Elf_Internal_Rela outrel;
7843 bfd_byte *loc;
7844
7845 if (globals->srelgot == NULL)
7846 abort ();
7847
00a97672 7848 outrel.r_addend = 0;
ba93b8ac
DJ		 7849 outrel.r_offset = (globals->sgot->output_section->vma
7850 + globals->sgot->output_offset + off);
7851 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
7852
00a97672
RS		 7853 if (globals->use_rel)
7854 bfd_put_32 (output_bfd, outrel.r_addend,
7855 globals->sgot->contents + off);
ba93b8ac
DJ		 7856
7857 loc = globals->srelgot->contents;
00a97672
RS		 7858 loc += globals->srelgot->reloc_count++ * RELOC_SIZE (globals);
7859 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac
DJ		 7860 }
7861 else
7862 bfd_put_32 (output_bfd, 1, globals->sgot->contents + off);
7863
7864 globals->tls_ldm_got.offset |= 1;
7865 }
7866
906e58ca 7867 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
ba93b8ac
DJ		 7868 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
7869
7870 return _bfd_final_link_relocate (howto, input_bfd, input_section,
7871 contents, rel->r_offset, value,
00a97672 7872 rel->r_addend);
ba93b8ac
DJ		 7873 }
7874
7875 case R_ARM_TLS_GD32:
7876 case R_ARM_TLS_IE32:
7877 {
7878 bfd_vma off;
7879 int indx;
7880 char tls_type;
7881
7882 if (globals->sgot == NULL)
7883 abort ();
7884
7885 indx = 0;
7886 if (h != NULL)
7887 {
7888 bfd_boolean dyn;
7889 dyn = globals->root.dynamic_sections_created;
7890 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
7891 && (!info->shared
7892 || !SYMBOL_REFERENCES_LOCAL (info, h)))
7893 {
7894 *unresolved_reloc_p = FALSE;
7895 indx = h->dynindx;
7896 }
7897 off = h->got.offset;
7898 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
7899 }
7900 else
7901 {
7902 if (local_got_offsets == NULL)
7903 abort ();
7904 off = local_got_offsets[r_symndx];
7905 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
7906 }
7907
7908 if (tls_type == GOT_UNKNOWN)
7909 abort ();
7910
7911 if ((off & 1) != 0)
7912 off &= ~1;
7913 else
7914 {
7915 bfd_boolean need_relocs = FALSE;
7916 Elf_Internal_Rela outrel;
7917 bfd_byte *loc = NULL;
7918 int cur_off = off;
7919
7920 /* The GOT entries have not been initialized yet. Do it
7921 now, and emit any relocations. If both an IE GOT and a
7922 GD GOT are necessary, we emit the GD first. */
7923
7924 if ((info->shared || indx != 0)
7925 && (h == NULL
7926 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
7927 || h->root.type != bfd_link_hash_undefweak))
7928 {
7929 need_relocs = TRUE;
7930 if (globals->srelgot == NULL)
7931 abort ();
7932 loc = globals->srelgot->contents;
00a97672 7933 loc += globals->srelgot->reloc_count * RELOC_SIZE (globals);
ba93b8ac
DJ		 7934 }
7935
7936 if (tls_type & GOT_TLS_GD)
7937 {
7938 if (need_relocs)
7939 {
00a97672 7940 outrel.r_addend = 0;
ba93b8ac 7941 outrel.r_offset = (globals->sgot->output_section->vma
00a97672
RS		 7942 + globals->sgot->output_offset
7943 + cur_off);
ba93b8ac 7944 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 7945
00a97672
RS		 7946 if (globals->use_rel)
7947 bfd_put_32 (output_bfd, outrel.r_addend,
7948 globals->sgot->contents + cur_off);
7949
7950 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 7951 globals->srelgot->reloc_count++;
00a97672 7952 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 7953
7954 if (indx == 0)
7955 bfd_put_32 (output_bfd, value - dtpoff_base (info),
7956 globals->sgot->contents + cur_off + 4);
7957 else
7958 {
00a97672 7959 outrel.r_addend = 0;
ba93b8ac
DJ		 7960 outrel.r_info = ELF32_R_INFO (indx,
7961 R_ARM_TLS_DTPOFF32);
7962 outrel.r_offset += 4;
00a97672
RS		 7963
7964 if (globals->use_rel)
7965 bfd_put_32 (output_bfd, outrel.r_addend,
7966 globals->sgot->contents + cur_off + 4);
7967
7968
7969 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 7970 globals->srelgot->reloc_count++;
00a97672 7971 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 7972 }
7973 }
7974 else
7975 {
7976 /* If we are not emitting relocations for a
7977 general dynamic reference, then we must be in a
7978 static link or an executable link with the
7979 symbol binding locally. Mark it as belonging
7980 to module 1, the executable. */
7981 bfd_put_32 (output_bfd, 1,
7982 globals->sgot->contents + cur_off);
7983 bfd_put_32 (output_bfd, value - dtpoff_base (info),
7984 globals->sgot->contents + cur_off + 4);
7985 }
7986
7987 cur_off += 8;
7988 }
7989
7990 if (tls_type & GOT_TLS_IE)
7991 {
7992 if (need_relocs)
7993 {
00a97672
RS		 7994 if (indx == 0)
7995 outrel.r_addend = value - dtpoff_base (info);
7996 else
7997 outrel.r_addend = 0;
ba93b8ac
DJ		 7998 outrel.r_offset = (globals->sgot->output_section->vma
7999 + globals->sgot->output_offset
8000 + cur_off);
8001 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
8002
00a97672
RS		 8003 if (globals->use_rel)
8004 bfd_put_32 (output_bfd, outrel.r_addend,
ba93b8ac
DJ		 8005 globals->sgot->contents + cur_off);
8006
00a97672 8007 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 8008 globals->srelgot->reloc_count++;
00a97672 8009 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 8010 }
8011 else
8012 bfd_put_32 (output_bfd, tpoff (info, value),
8013 globals->sgot->contents + cur_off);
8014 cur_off += 4;
8015 }
8016
8017 if (h != NULL)
8018 h->got.offset |= 1;
8019 else
8020 local_got_offsets[r_symndx] |= 1;
8021 }
8022
8023 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
8024 off += 8;
906e58ca 8025 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
ba93b8ac
DJ		 8026 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
8027
8028 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8029 contents, rel->r_offset, value,
00a97672 8030 rel->r_addend);
ba93b8ac
DJ		 8031 }
8032
8033 case R_ARM_TLS_LE32:
8034 if (info->shared)
8035 {
8036 (*_bfd_error_handler)
8037 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
8038 input_bfd, input_section,
8039 (long) rel->r_offset, howto->name);
906e58ca 8040 return FALSE;
ba93b8ac
DJ		 8041 }
8042 else
8043 value = tpoff (info, value);
906e58ca 8044
ba93b8ac 8045 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 8046 contents, rel->r_offset, value,
8047 rel->r_addend);
ba93b8ac 8048
319850b4
JB		 8049 case R_ARM_V4BX:
8050 if (globals->fix_v4bx)
845b51d6
PB		 8051 {
8052 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 8053
845b51d6
PB		 8054 /* Ensure that we have a BX instruction. */
8055 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 8056
845b51d6
PB		 8057 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
8058 {
8059 /* Branch to veneer. */
8060 bfd_vma glue_addr;
8061 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
8062 glue_addr -= input_section->output_section->vma
8063 + input_section->output_offset
8064 + rel->r_offset + 8;
8065 insn = (insn & 0xf0000000) | 0x0a000000
8066 | ((glue_addr >> 2) & 0x00ffffff);
8067 }
8068 else
8069 {
8070 /* Preserve Rm (lowest four bits) and the condition code
8071 (highest four bits). Other bits encode MOV PC,Rm. */
8072 insn = (insn & 0xf000000f) | 0x01a0f000;
8073 }
319850b4 8074
845b51d6
PB		 8075 bfd_put_32 (input_bfd, insn, hit_data);
8076 }
319850b4
JB		 8077 return bfd_reloc_ok;
8078
b6895b4f
PB		 8079 case R_ARM_MOVW_ABS_NC:
8080 case R_ARM_MOVT_ABS:
8081 case R_ARM_MOVW_PREL_NC:
8082 case R_ARM_MOVT_PREL:
92f5d02b
MS		 8083 /* Until we properly support segment-base-relative addressing then
8084 we assume the segment base to be zero, as for the group relocations.
8085 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
8086 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
8087 case R_ARM_MOVW_BREL_NC:
8088 case R_ARM_MOVW_BREL:
8089 case R_ARM_MOVT_BREL:
b6895b4f
PB		 8090 {
8091 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8092
8093 if (globals->use_rel)
8094 {
8095 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 8096 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 8097 }
92f5d02b 8098
b6895b4f 8099 value += signed_addend;
b6895b4f
PB		 8100
8101 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
8102 value -= (input_section->output_section->vma
8103 + input_section->output_offset + rel->r_offset);
8104
92f5d02b
MS		 8105 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
8106 return bfd_reloc_overflow;
8107
8108 if (sym_flags == STT_ARM_TFUNC)
8109 value |= 1;
8110
8111 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
8112 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 8113 value >>= 16;
8114
8115 insn &= 0xfff0f000;
8116 insn |= value & 0xfff;
8117 insn |= (value & 0xf000) << 4;
8118 bfd_put_32 (input_bfd, insn, hit_data);
8119 }
8120 return bfd_reloc_ok;
8121
8122 case R_ARM_THM_MOVW_ABS_NC:
8123 case R_ARM_THM_MOVT_ABS:
8124 case R_ARM_THM_MOVW_PREL_NC:
8125 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 8126 /* Until we properly support segment-base-relative addressing then
8127 we assume the segment base to be zero, as for the above relocations.
8128 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
8129 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
8130 as R_ARM_THM_MOVT_ABS. */
8131 case R_ARM_THM_MOVW_BREL_NC:
8132 case R_ARM_THM_MOVW_BREL:
8133 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 8134 {
8135 bfd_vma insn;
906e58ca 8136
b6895b4f
PB		 8137 insn = bfd_get_16 (input_bfd, hit_data) << 16;
8138 insn |= bfd_get_16 (input_bfd, hit_data + 2);
8139
8140 if (globals->use_rel)
8141 {
8142 addend = ((insn >> 4) & 0xf000)
8143 | ((insn >> 15) & 0x0800)
8144 | ((insn >> 4) & 0x0700)
8145 | (insn & 0x00ff);
39623e12 8146 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 8147 }
92f5d02b 8148
b6895b4f 8149 value += signed_addend;
b6895b4f
PB		 8150
8151 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
8152 value -= (input_section->output_section->vma
8153 + input_section->output_offset + rel->r_offset);
8154
92f5d02b
MS		 8155 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
8156 return bfd_reloc_overflow;
8157
8158 if (sym_flags == STT_ARM_TFUNC)
8159 value |= 1;
8160
8161 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
8162 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 8163 value >>= 16;
8164
8165 insn &= 0xfbf08f00;
8166 insn |= (value & 0xf000) << 4;
8167 insn |= (value & 0x0800) << 15;
8168 insn |= (value & 0x0700) << 4;
8169 insn |= (value & 0x00ff);
8170
8171 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8172 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8173 }
8174 return bfd_reloc_ok;
8175
4962c51a
MS		 8176 case R_ARM_ALU_PC_G0_NC:
8177 case R_ARM_ALU_PC_G1_NC:
8178 case R_ARM_ALU_PC_G0:
8179 case R_ARM_ALU_PC_G1:
8180 case R_ARM_ALU_PC_G2:
8181 case R_ARM_ALU_SB_G0_NC:
8182 case R_ARM_ALU_SB_G1_NC:
8183 case R_ARM_ALU_SB_G0:
8184 case R_ARM_ALU_SB_G1:
8185 case R_ARM_ALU_SB_G2:
8186 {
8187 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8188 bfd_vma pc = input_section->output_section->vma
8189 + input_section->output_offset + rel->r_offset;
8190 /* sb should be the origin of the *segment* containing the symbol.
8191 It is not clear how to obtain this OS-dependent value, so we
8192 make an arbitrary choice of zero. */
8193 bfd_vma sb = 0;
8194 bfd_vma residual;
8195 bfd_vma g_n;
8196 bfd_signed_vma signed_value;
8197 int group = 0;
8198
8199 /* Determine which group of bits to select. */
8200 switch (r_type)
8201 {
8202 case R_ARM_ALU_PC_G0_NC:
8203 case R_ARM_ALU_PC_G0:
8204 case R_ARM_ALU_SB_G0_NC:
8205 case R_ARM_ALU_SB_G0:
8206 group = 0;
8207 break;
8208
8209 case R_ARM_ALU_PC_G1_NC:
8210 case R_ARM_ALU_PC_G1:
8211 case R_ARM_ALU_SB_G1_NC:
8212 case R_ARM_ALU_SB_G1:
8213 group = 1;
8214 break;
8215
8216 case R_ARM_ALU_PC_G2:
8217 case R_ARM_ALU_SB_G2:
8218 group = 2;
8219 break;
8220
8221 default:
906e58ca 8222 abort ();
4962c51a
MS		 8223 }
8224
8225 /* If REL, extract the addend from the insn. If RELA, it will
8226 have already been fetched for us. */
8227 if (globals->use_rel)
8228 {
8229 int negative;
8230 bfd_vma constant = insn & 0xff;
8231 bfd_vma rotation = (insn & 0xf00) >> 8;
8232
8233 if (rotation == 0)
8234 signed_addend = constant;
8235 else
8236 {
8237 /* Compensate for the fact that in the instruction, the
8238 rotation is stored in multiples of 2 bits. */
8239 rotation *= 2;
8240
8241 /* Rotate "constant" right by "rotation" bits. */
8242 signed_addend = (constant >> rotation) |
8243 (constant << (8 * sizeof (bfd_vma) - rotation));
8244 }
8245
8246 /* Determine if the instruction is an ADD or a SUB.
8247 (For REL, this determines the sign of the addend.) */
8248 negative = identify_add_or_sub (insn);
8249 if (negative == 0)
8250 {
8251 (*_bfd_error_handler)
8252 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
8253 input_bfd, input_section,
8254 (long) rel->r_offset, howto->name);
906e58ca 8255 return bfd_reloc_overflow;
4962c51a
MS		 8256 }
8257
8258 signed_addend *= negative;
8259 }
8260
8261 /* Compute the value (X) to go in the place. */
8262 if (r_type == R_ARM_ALU_PC_G0_NC
8263 || r_type == R_ARM_ALU_PC_G1_NC
8264 || r_type == R_ARM_ALU_PC_G0
8265 || r_type == R_ARM_ALU_PC_G1
8266 || r_type == R_ARM_ALU_PC_G2)
8267 /* PC relative. */
8268 signed_value = value - pc + signed_addend;
8269 else
8270 /* Section base relative. */
8271 signed_value = value - sb + signed_addend;
8272
8273 /* If the target symbol is a Thumb function, then set the
8274 Thumb bit in the address. */
8275 if (sym_flags == STT_ARM_TFUNC)
8276 signed_value |= 1;
8277
8278 /* Calculate the value of the relevant G_n, in encoded
8279 constant-with-rotation format. */
8280 g_n = calculate_group_reloc_mask (abs (signed_value), group,
8281 &residual);
8282
8283 /* Check for overflow if required. */
8284 if ((r_type == R_ARM_ALU_PC_G0
8285 || r_type == R_ARM_ALU_PC_G1
8286 || r_type == R_ARM_ALU_PC_G2
8287 || r_type == R_ARM_ALU_SB_G0
8288 || r_type == R_ARM_ALU_SB_G1
8289 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
8290 {
8291 (*_bfd_error_handler)
8292 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8293 input_bfd, input_section,
8294 (long) rel->r_offset, abs (signed_value), howto->name);
8295 return bfd_reloc_overflow;
8296 }
8297
8298 /* Mask out the value and the ADD/SUB part of the opcode; take care
8299 not to destroy the S bit. */
8300 insn &= 0xff1ff000;
8301
8302 /* Set the opcode according to whether the value to go in the
8303 place is negative. */
8304 if (signed_value < 0)
8305 insn |= 1 << 22;
8306 else
8307 insn |= 1 << 23;
8308
8309 /* Encode the offset. */
8310 insn |= g_n;
8311
8312 bfd_put_32 (input_bfd, insn, hit_data);
8313 }
8314 return bfd_reloc_ok;
8315
8316 case R_ARM_LDR_PC_G0:
8317 case R_ARM_LDR_PC_G1:
8318 case R_ARM_LDR_PC_G2:
8319 case R_ARM_LDR_SB_G0:
8320 case R_ARM_LDR_SB_G1:
8321 case R_ARM_LDR_SB_G2:
8322 {
8323 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8324 bfd_vma pc = input_section->output_section->vma
8325 + input_section->output_offset + rel->r_offset;
8326 bfd_vma sb = 0; /* See note above. */
8327 bfd_vma residual;
8328 bfd_signed_vma signed_value;
8329 int group = 0;
8330
8331 /* Determine which groups of bits to calculate. */
8332 switch (r_type)
8333 {
8334 case R_ARM_LDR_PC_G0:
8335 case R_ARM_LDR_SB_G0:
8336 group = 0;
8337 break;
8338
8339 case R_ARM_LDR_PC_G1:
8340 case R_ARM_LDR_SB_G1:
8341 group = 1;
8342 break;
8343
8344 case R_ARM_LDR_PC_G2:
8345 case R_ARM_LDR_SB_G2:
8346 group = 2;
8347 break;
8348
8349 default:
906e58ca 8350 abort ();
4962c51a
MS		 8351 }
8352
8353 /* If REL, extract the addend from the insn. If RELA, it will
8354 have already been fetched for us. */
8355 if (globals->use_rel)
8356 {
8357 int negative = (insn & (1 << 23)) ? 1 : -1;
8358 signed_addend = negative * (insn & 0xfff);
8359 }
8360
8361 /* Compute the value (X) to go in the place. */
8362 if (r_type == R_ARM_LDR_PC_G0
8363 || r_type == R_ARM_LDR_PC_G1
8364 || r_type == R_ARM_LDR_PC_G2)
8365 /* PC relative. */
8366 signed_value = value - pc + signed_addend;
8367 else
8368 /* Section base relative. */
8369 signed_value = value - sb + signed_addend;
8370
8371 /* Calculate the value of the relevant G_{n-1} to obtain
8372 the residual at that stage. */
8373 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8374
8375 /* Check for overflow. */
8376 if (residual >= 0x1000)
8377 {
8378 (*_bfd_error_handler)
8379 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8380 input_bfd, input_section,
8381 (long) rel->r_offset, abs (signed_value), howto->name);
8382 return bfd_reloc_overflow;
8383 }
8384
8385 /* Mask out the value and U bit. */
8386 insn &= 0xff7ff000;
8387
8388 /* Set the U bit if the value to go in the place is non-negative. */
8389 if (signed_value >= 0)
8390 insn |= 1 << 23;
8391
8392 /* Encode the offset. */
8393 insn |= residual;
8394
8395 bfd_put_32 (input_bfd, insn, hit_data);
8396 }
8397 return bfd_reloc_ok;
8398
8399 case R_ARM_LDRS_PC_G0:
8400 case R_ARM_LDRS_PC_G1:
8401 case R_ARM_LDRS_PC_G2:
8402 case R_ARM_LDRS_SB_G0:
8403 case R_ARM_LDRS_SB_G1:
8404 case R_ARM_LDRS_SB_G2:
8405 {
8406 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8407 bfd_vma pc = input_section->output_section->vma
8408 + input_section->output_offset + rel->r_offset;
8409 bfd_vma sb = 0; /* See note above. */
8410 bfd_vma residual;
8411 bfd_signed_vma signed_value;
8412 int group = 0;
8413
8414 /* Determine which groups of bits to calculate. */
8415 switch (r_type)
8416 {
8417 case R_ARM_LDRS_PC_G0:
8418 case R_ARM_LDRS_SB_G0:
8419 group = 0;
8420 break;
8421
8422 case R_ARM_LDRS_PC_G1:
8423 case R_ARM_LDRS_SB_G1:
8424 group = 1;
8425 break;
8426
8427 case R_ARM_LDRS_PC_G2:
8428 case R_ARM_LDRS_SB_G2:
8429 group = 2;
8430 break;
8431
8432 default:
906e58ca 8433 abort ();
4962c51a
MS		 8434 }
8435
8436 /* If REL, extract the addend from the insn. If RELA, it will
8437 have already been fetched for us. */
8438 if (globals->use_rel)
8439 {
8440 int negative = (insn & (1 << 23)) ? 1 : -1;
8441 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
8442 }
8443
8444 /* Compute the value (X) to go in the place. */
8445 if (r_type == R_ARM_LDRS_PC_G0
8446 || r_type == R_ARM_LDRS_PC_G1
8447 || r_type == R_ARM_LDRS_PC_G2)
8448 /* PC relative. */
8449 signed_value = value - pc + signed_addend;
8450 else
8451 /* Section base relative. */
8452 signed_value = value - sb + signed_addend;
8453
8454 /* Calculate the value of the relevant G_{n-1} to obtain
8455 the residual at that stage. */
8456 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8457
8458 /* Check for overflow. */
8459 if (residual >= 0x100)
8460 {
8461 (*_bfd_error_handler)
8462 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8463 input_bfd, input_section,
8464 (long) rel->r_offset, abs (signed_value), howto->name);
8465 return bfd_reloc_overflow;
8466 }
8467
8468 /* Mask out the value and U bit. */
8469 insn &= 0xff7ff0f0;
8470
8471 /* Set the U bit if the value to go in the place is non-negative. */
8472 if (signed_value >= 0)
8473 insn |= 1 << 23;
8474
8475 /* Encode the offset. */
8476 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
8477
8478 bfd_put_32 (input_bfd, insn, hit_data);
8479 }
8480 return bfd_reloc_ok;
8481
8482 case R_ARM_LDC_PC_G0:
8483 case R_ARM_LDC_PC_G1:
8484 case R_ARM_LDC_PC_G2:
8485 case R_ARM_LDC_SB_G0:
8486 case R_ARM_LDC_SB_G1:
8487 case R_ARM_LDC_SB_G2:
8488 {
8489 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8490 bfd_vma pc = input_section->output_section->vma
8491 + input_section->output_offset + rel->r_offset;
8492 bfd_vma sb = 0; /* See note above. */
8493 bfd_vma residual;
8494 bfd_signed_vma signed_value;
8495 int group = 0;
8496
8497 /* Determine which groups of bits to calculate. */
8498 switch (r_type)
8499 {
8500 case R_ARM_LDC_PC_G0:
8501 case R_ARM_LDC_SB_G0:
8502 group = 0;
8503 break;
8504
8505 case R_ARM_LDC_PC_G1:
8506 case R_ARM_LDC_SB_G1:
8507 group = 1;
8508 break;
8509
8510 case R_ARM_LDC_PC_G2:
8511 case R_ARM_LDC_SB_G2:
8512 group = 2;
8513 break;
8514
8515 default:
906e58ca 8516 abort ();
4962c51a
MS		 8517 }
8518
8519 /* If REL, extract the addend from the insn. If RELA, it will
8520 have already been fetched for us. */
8521 if (globals->use_rel)
8522 {
8523 int negative = (insn & (1 << 23)) ? 1 : -1;
8524 signed_addend = negative * ((insn & 0xff) << 2);
8525 }
8526
8527 /* Compute the value (X) to go in the place. */
8528 if (r_type == R_ARM_LDC_PC_G0
8529 || r_type == R_ARM_LDC_PC_G1
8530 || r_type == R_ARM_LDC_PC_G2)
8531 /* PC relative. */
8532 signed_value = value - pc + signed_addend;
8533 else
8534 /* Section base relative. */
8535 signed_value = value - sb + signed_addend;
8536
8537 /* Calculate the value of the relevant G_{n-1} to obtain
8538 the residual at that stage. */
8539 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8540
8541 /* Check for overflow. (The absolute value to go in the place must be
8542 divisible by four and, after having been divided by four, must
8543 fit in eight bits.) */
8544 if ((residual & 0x3) != 0 || residual >= 0x400)
8545 {
8546 (*_bfd_error_handler)
8547 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8548 input_bfd, input_section,
8549 (long) rel->r_offset, abs (signed_value), howto->name);
8550 return bfd_reloc_overflow;
8551 }
8552
8553 /* Mask out the value and U bit. */
8554 insn &= 0xff7fff00;
8555
8556 /* Set the U bit if the value to go in the place is non-negative. */
8557 if (signed_value >= 0)
8558 insn |= 1 << 23;
8559
8560 /* Encode the offset. */
8561 insn |= residual >> 2;
8562
8563 bfd_put_32 (input_bfd, insn, hit_data);
8564 }
8565 return bfd_reloc_ok;
8566
252b5132
RH		 8567 default:
8568 return bfd_reloc_notsupported;
8569 }
8570}
8571
98c1d4aa
NC		 8572/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
8573static void
57e8b36a
NC		 8574arm_add_to_rel (bfd * abfd,
8575 bfd_byte * address,
8576 reloc_howto_type * howto,
8577 bfd_signed_vma increment)
98c1d4aa 8578{
98c1d4aa
NC		 8579 bfd_signed_vma addend;
8580
bd97cb95
DJ		 8581 if (howto->type == R_ARM_THM_CALL
8582 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 8583 {
9a5aca8c
AM		 8584 int upper_insn, lower_insn;
8585 int upper, lower;
98c1d4aa 8586
9a5aca8c
AM		 8587 upper_insn = bfd_get_16 (abfd, address);
8588 lower_insn = bfd_get_16 (abfd, address + 2);
8589 upper = upper_insn & 0x7ff;
8590 lower = lower_insn & 0x7ff;
8591
8592 addend = (upper << 12) | (lower << 1);
ddda4409 8593 addend += increment;
9a5aca8c 8594 addend >>= 1;
98c1d4aa 8595
9a5aca8c
AM		 8596 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
8597 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
8598
dc810e39
AM		 8599 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
8600 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 8601 }
8602 else
8603 {
8604 bfd_vma contents;
8605
8606 contents = bfd_get_32 (abfd, address);
8607
8608 /* Get the (signed) value from the instruction. */
8609 addend = contents & howto->src_mask;
8610 if (addend & ((howto->src_mask + 1) >> 1))
8611 {
8612 bfd_signed_vma mask;
8613
8614 mask = -1;
8615 mask &= ~ howto->src_mask;
8616 addend |= mask;
8617 }
8618
8619 /* Add in the increment, (which is a byte value). */
8620 switch (howto->type)
8621 {
8622 default:
8623 addend += increment;
8624 break;
8625
8626 case R_ARM_PC24:
c6596c5e 8627 case R_ARM_PLT32:
5b5bb741
PB		 8628 case R_ARM_CALL:
8629 case R_ARM_JUMP24:
9a5aca8c 8630 addend <<= howto->size;
dc810e39 8631 addend += increment;
9a5aca8c
AM		 8632
8633 /* Should we check for overflow here ? */
8634
8635 /* Drop any undesired bits. */
8636 addend >>= howto->rightshift;
8637 break;
8638 }
8639
8640 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
8641
8642 bfd_put_32 (abfd, contents, address);
ddda4409 8643 }
98c1d4aa 8644}
252b5132 8645
ba93b8ac
DJ		 8646#define IS_ARM_TLS_RELOC(R_TYPE) \
8647 ((R_TYPE) == R_ARM_TLS_GD32 \
8648 || (R_TYPE) == R_ARM_TLS_LDO32 \
8649 || (R_TYPE) == R_ARM_TLS_LDM32 \
8650 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
8651 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
8652 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
8653 || (R_TYPE) == R_ARM_TLS_LE32 \
8654 || (R_TYPE) == R_ARM_TLS_IE32)
8655
252b5132 8656/* Relocate an ARM ELF section. */
906e58ca 8657
b34976b6 8658static bfd_boolean
57e8b36a
NC		 8659elf32_arm_relocate_section (bfd * output_bfd,
8660 struct bfd_link_info * info,
8661 bfd * input_bfd,
8662 asection * input_section,
8663 bfd_byte * contents,
8664 Elf_Internal_Rela * relocs,
8665 Elf_Internal_Sym * local_syms,
8666 asection ** local_sections)
252b5132 8667{
b34976b6
AM		 8668 Elf_Internal_Shdr *symtab_hdr;
8669 struct elf_link_hash_entry **sym_hashes;
8670 Elf_Internal_Rela *rel;
8671 Elf_Internal_Rela *relend;
8672 const char *name;
b32d3aa2 8673 struct elf32_arm_link_hash_table * globals;
252b5132 8674
4e7fd91e 8675 globals = elf32_arm_hash_table (info);
b491616a 8676
0ffa91dd 8677 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 8678 sym_hashes = elf_sym_hashes (input_bfd);
8679
8680 rel = relocs;
8681 relend = relocs + input_section->reloc_count;
8682 for (; rel < relend; rel++)
8683 {
ba96a88f
NC		 8684 int r_type;
8685 reloc_howto_type * howto;
8686 unsigned long r_symndx;
8687 Elf_Internal_Sym * sym;
8688 asection * sec;
252b5132 8689 struct elf_link_hash_entry * h;
ba96a88f
NC		 8690 bfd_vma relocation;
8691 bfd_reloc_status_type r;
8692 arelent bfd_reloc;
ba93b8ac 8693 char sym_type;
0945cdfd 8694 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 8695 char *error_message = NULL;
f21f3fe0 8696
252b5132 8697 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 8698 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 8699 r_type = arm_real_reloc_type (globals, r_type);
252b5132 8700
ba96a88f
NC		 8701 if ( r_type == R_ARM_GNU_VTENTRY
8702 || r_type == R_ARM_GNU_VTINHERIT)
252b5132
RH		 8703 continue;
8704
b32d3aa2 8705 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 8706 howto = bfd_reloc.howto;
252b5132 8707
252b5132
RH		 8708 h = NULL;
8709 sym = NULL;
8710 sec = NULL;
9b485d32 8711
252b5132
RH		 8712 if (r_symndx < symtab_hdr->sh_info)
8713 {
8714 sym = local_syms + r_symndx;
ba93b8ac 8715 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 8716 sec = local_sections[r_symndx];
4e7fd91e 8717 if (globals->use_rel)
f8df10f4 8718 {
4e7fd91e
PB		 8719 relocation = (sec->output_section->vma
8720 + sec->output_offset
8721 + sym->st_value);
ab96bf03
AM		 8722 if (!info->relocatable
8723 && (sec->flags & SEC_MERGE)
8724 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 8725 {
4e7fd91e
PB		 8726 asection *msec;
8727 bfd_vma addend, value;
8728
39623e12 8729 switch (r_type)
4e7fd91e 8730 {
39623e12
PB		 8731 case R_ARM_MOVW_ABS_NC:
8732 case R_ARM_MOVT_ABS:
8733 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
8734 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
8735 addend = (addend ^ 0x8000) - 0x8000;
8736 break;
f8df10f4 8737
39623e12
PB		 8738 case R_ARM_THM_MOVW_ABS_NC:
8739 case R_ARM_THM_MOVT_ABS:
8740 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
8741 << 16;
8742 value |= bfd_get_16 (input_bfd,
8743 contents + rel->r_offset + 2);
8744 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
8745 | ((value & 0x04000000) >> 15);
8746 addend = (addend ^ 0x8000) - 0x8000;
8747 break;
f8df10f4 8748
39623e12
PB		 8749 default:
8750 if (howto->rightshift
8751 || (howto->src_mask & (howto->src_mask + 1)))
8752 {
8753 (*_bfd_error_handler)
8754 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
8755 input_bfd, input_section,
8756 (long) rel->r_offset, howto->name);
8757 return FALSE;
8758 }
8759
8760 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
8761
8762 /* Get the (signed) value from the instruction. */
8763 addend = value & howto->src_mask;
8764 if (addend & ((howto->src_mask + 1) >> 1))
8765 {
8766 bfd_signed_vma mask;
8767
8768 mask = -1;
8769 mask &= ~ howto->src_mask;
8770 addend |= mask;
8771 }
8772 break;
4e7fd91e 8773 }
39623e12 8774
4e7fd91e
PB		 8775 msec = sec;
8776 addend =
8777 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
8778 - relocation;
8779 addend += msec->output_section->vma + msec->output_offset;
39623e12
PB		 8780
8781 /* Cases here must match those in the preceeding
8782 switch statement. */
8783 switch (r_type)
8784 {
8785 case R_ARM_MOVW_ABS_NC:
8786 case R_ARM_MOVT_ABS:
8787 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
8788 | (addend & 0xfff);
8789 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8790 break;
8791
8792 case R_ARM_THM_MOVW_ABS_NC:
8793 case R_ARM_THM_MOVT_ABS:
8794 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
8795 | (addend & 0xff) | ((addend & 0x0800) << 15);
8796 bfd_put_16 (input_bfd, value >> 16,
8797 contents + rel->r_offset);
8798 bfd_put_16 (input_bfd, value,
8799 contents + rel->r_offset + 2);
8800 break;
8801
8802 default:
8803 value = (value & ~ howto->dst_mask)
8804 | (addend & howto->dst_mask);
8805 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8806 break;
8807 }
f8df10f4 8808 }
f8df10f4 8809 }
4e7fd91e
PB		 8810 else
8811 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 8812 }
8813 else
8814 {
560e09e9 8815 bfd_boolean warned;
560e09e9 8816
b2a8e766
AM		 8817 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
8818 r_symndx, symtab_hdr, sym_hashes,
8819 h, sec, relocation,
8820 unresolved_reloc, warned);
ba93b8ac
DJ		 8821
8822 sym_type = h->type;
252b5132
RH		 8823 }
8824
ab96bf03
AM		 8825 if (sec != NULL && elf_discarded_section (sec))
8826 {
8827 /* For relocs against symbols from removed linkonce sections,
8828 or sections discarded by a linker script, we just want the
8829 section contents zeroed. Avoid any special processing. */
8830 _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
8831 rel->r_info = 0;
8832 rel->r_addend = 0;
8833 continue;
8834 }
8835
8836 if (info->relocatable)
8837 {
8838 /* This is a relocatable link. We don't have to change
8839 anything, unless the reloc is against a section symbol,
8840 in which case we have to adjust according to where the
8841 section symbol winds up in the output section. */
8842 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
8843 {
8844 if (globals->use_rel)
8845 arm_add_to_rel (input_bfd, contents + rel->r_offset,
8846 howto, (bfd_signed_vma) sec->output_offset);
8847 else
8848 rel->r_addend += sec->output_offset;
8849 }
8850 continue;
8851 }
8852
252b5132
RH		 8853 if (h != NULL)
8854 name = h->root.root.string;
8855 else
8856 {
8857 name = (bfd_elf_string_from_elf_section
8858 (input_bfd, symtab_hdr->sh_link, sym->st_name));
8859 if (name == NULL || *name == '\0')
8860 name = bfd_section_name (input_bfd, sec);
8861 }
f21f3fe0 8862
ba93b8ac
DJ		 8863 if (r_symndx != 0
8864 && r_type != R_ARM_NONE
8865 && (h == NULL
8866 || h->root.type == bfd_link_hash_defined
8867 || h->root.type == bfd_link_hash_defweak)
8868 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
8869 {
8870 (*_bfd_error_handler)
8871 ((sym_type == STT_TLS
8872 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
8873 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
8874 input_bfd,
8875 input_section,
8876 (long) rel->r_offset,
8877 howto->name,
8878 name);
8879 }
8880
252b5132
RH		 8881 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
8882 input_section, contents, rel,
8883 relocation, info, sec, name,
8884 (h ? ELF_ST_TYPE (h->type) :
0945cdfd 8885 ELF_ST_TYPE (sym->st_info)), h,
f2a9dd69 8886 &unresolved_reloc, &error_message);
0945cdfd
DJ		 8887
8888 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
8889 because such sections are not SEC_ALLOC and thus ld.so will
8890 not process them. */
8891 if (unresolved_reloc
8892 && !((input_section->flags & SEC_DEBUGGING) != 0
8893 && h->def_dynamic))
8894 {
8895 (*_bfd_error_handler)
843fe662
L		 8896 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
8897 input_bfd,
8898 input_section,
8899 (long) rel->r_offset,
8900 howto->name,
8901 h->root.root.string);
0945cdfd
DJ		 8902 return FALSE;
8903 }
252b5132
RH		 8904
8905 if (r != bfd_reloc_ok)
8906 {
252b5132
RH		 8907 switch (r)
8908 {
8909 case bfd_reloc_overflow:
cf919dfd
PB		 8910 /* If the overflowing reloc was to an undefined symbol,
8911 we have already printed one error message and there
8912 is no point complaining again. */
8913 if ((! h ||
8914 h->root.type != bfd_link_hash_undefined)
8915 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 8916 (info, (h ? &h->root : NULL), name, howto->name,
8917 (bfd_vma) 0, input_bfd, input_section,
8918 rel->r_offset))))
b34976b6 8919 return FALSE;
252b5132
RH		 8920 break;
8921
8922 case bfd_reloc_undefined:
8923 if (!((*info->callbacks->undefined_symbol)
8924 (info, name, input_bfd, input_section,
b34976b6
AM		 8925 rel->r_offset, TRUE)))
8926 return FALSE;
252b5132
RH		 8927 break;
8928
8929 case bfd_reloc_outofrange:
f2a9dd69 8930 error_message = _("out of range");
252b5132
RH		 8931 goto common_error;
8932
8933 case bfd_reloc_notsupported:
f2a9dd69 8934 error_message = _("unsupported relocation");
252b5132
RH		 8935 goto common_error;
8936
8937 case bfd_reloc_dangerous:
f2a9dd69 8938 /* error_message should already be set. */
252b5132
RH		 8939 goto common_error;
8940
8941 default:
f2a9dd69 8942 error_message = _("unknown error");
8029a119 8943 /* Fall through. */
252b5132
RH		 8944
8945 common_error:
f2a9dd69
DJ		 8946 BFD_ASSERT (error_message != NULL);
8947 if (!((*info->callbacks->reloc_dangerous)
8948 (info, error_message, input_bfd, input_section,
252b5132 8949 rel->r_offset)))
b34976b6 8950 return FALSE;
252b5132
RH		 8951 break;
8952 }
8953 }
8954 }
8955
b34976b6 8956 return TRUE;
252b5132
RH		 8957}
8958
2468f9c9
PB		 8959/* Add a new unwind edit to the list described by HEAD, TAIL. If INDEX is zero,
8960 adds the edit to the start of the list. (The list must be built in order of
8961 ascending INDEX: the function's callers are primarily responsible for
8962 maintaining that condition). */
8963
8964static void
8965add_unwind_table_edit (arm_unwind_table_edit **head,
8966 arm_unwind_table_edit **tail,
8967 arm_unwind_edit_type type,
8968 asection *linked_section,
8969 unsigned int index)
8970{
8971 arm_unwind_table_edit *new_edit = xmalloc (sizeof (arm_unwind_table_edit));
8972
8973 new_edit->type = type;
8974 new_edit->linked_section = linked_section;
8975 new_edit->index = index;
8976
8977 if (index > 0)
8978 {
8979 new_edit->next = NULL;
8980
8981 if (*tail)
8982 (*tail)->next = new_edit;
8983
8984 (*tail) = new_edit;
8985
8986 if (!*head)
8987 (*head) = new_edit;
8988 }
8989 else
8990 {
8991 new_edit->next = *head;
8992
8993 if (!*tail)
8994 *tail = new_edit;
8995
8996 *head = new_edit;
8997 }
8998}
8999
9000static _arm_elf_section_data *get_arm_elf_section_data (asection *);
9001
9002/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
9003static void
9004adjust_exidx_size(asection *exidx_sec, int adjust)
9005{
9006 asection *out_sec;
9007
9008 if (!exidx_sec->rawsize)
9009 exidx_sec->rawsize = exidx_sec->size;
9010
9011 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
9012 out_sec = exidx_sec->output_section;
9013 /* Adjust size of output section. */
9014 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
9015}
9016
9017/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
9018static void
9019insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
9020{
9021 struct _arm_elf_section_data *exidx_arm_data;
9022
9023 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9024 add_unwind_table_edit (
9025 &exidx_arm_data->u.exidx.unwind_edit_list,
9026 &exidx_arm_data->u.exidx.unwind_edit_tail,
9027 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
9028
9029 adjust_exidx_size(exidx_sec, 8);
9030}
9031
9032/* Scan .ARM.exidx tables, and create a list describing edits which should be
9033 made to those tables, such that:
9034
9035 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
9036 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
9037 codes which have been inlined into the index).
9038
9039 The edits are applied when the tables are written
9040 (in elf32_arm_write_section).
9041*/
9042
9043bfd_boolean
9044elf32_arm_fix_exidx_coverage (asection **text_section_order,
9045 unsigned int num_text_sections,
9046 struct bfd_link_info *info)
9047{
9048 bfd *inp;
9049 unsigned int last_second_word = 0, i;
9050 asection *last_exidx_sec = NULL;
9051 asection *last_text_sec = NULL;
9052 int last_unwind_type = -1;
9053
9054 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
9055 text sections. */
9056 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
9057 {
9058 asection *sec;
9059
9060 for (sec = inp->sections; sec != NULL; sec = sec->next)
9061 {
9062 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
9063 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
9064
dec9d5df 9065 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
2468f9c9
PB		 9066 continue;
9067
9068 if (elf_sec->linked_to)
9069 {
9070 Elf_Internal_Shdr *linked_hdr
9071 = &elf_section_data (elf_sec->linked_to)->this_hdr;
9072 struct _arm_elf_section_data *linked_sec_arm_data
9073 = get_arm_elf_section_data (linked_hdr->bfd_section);
9074
9075 if (linked_sec_arm_data == NULL)
9076 continue;
9077
9078 /* Link this .ARM.exidx section back from the text section it
9079 describes. */
9080 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
9081 }
9082 }
9083 }
9084
9085 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
9086 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
9087 and add EXIDX_CANTUNWIND entries for sections with no unwind table data.
9088 */
9089
9090 for (i = 0; i < num_text_sections; i++)
9091 {
9092 asection *sec = text_section_order[i];
9093 asection *exidx_sec;
9094 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
9095 struct _arm_elf_section_data *exidx_arm_data;
9096 bfd_byte *contents = NULL;
9097 int deleted_exidx_bytes = 0;
9098 bfd_vma j;
9099 arm_unwind_table_edit *unwind_edit_head = NULL;
9100 arm_unwind_table_edit *unwind_edit_tail = NULL;
9101 Elf_Internal_Shdr *hdr;
9102 bfd *ibfd;
9103
9104 if (arm_data == NULL)
9105 continue;
9106
9107 exidx_sec = arm_data->u.text.arm_exidx_sec;
9108 if (exidx_sec == NULL)
9109 {
9110 /* Section has no unwind data. */
9111 if (last_unwind_type == 0 || !last_exidx_sec)
9112 continue;
9113
9114 /* Ignore zero sized sections. */
9115 if (sec->size == 0)
9116 continue;
9117
9118 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9119 last_unwind_type = 0;
9120 continue;
9121 }
9122
22a8f80e
PB		 9123 /* Skip /DISCARD/ sections. */
9124 if (bfd_is_abs_section (exidx_sec->output_section))
9125 continue;
9126
2468f9c9
PB		 9127 hdr = &elf_section_data (exidx_sec)->this_hdr;
9128 if (hdr->sh_type != SHT_ARM_EXIDX)
9129 continue;
9130
9131 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9132 if (exidx_arm_data == NULL)
9133 continue;
9134
9135 ibfd = exidx_sec->owner;
9136
9137 if (hdr->contents != NULL)
9138 contents = hdr->contents;
9139 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
9140 /* An error? */
9141 continue;
9142
9143 for (j = 0; j < hdr->sh_size; j += 8)
9144 {
9145 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
9146 int unwind_type;
9147 int elide = 0;
9148
9149 /* An EXIDX_CANTUNWIND entry. */
9150 if (second_word == 1)
9151 {
9152 if (last_unwind_type == 0)
9153 elide = 1;
9154 unwind_type = 0;
9155 }
9156 /* Inlined unwinding data. Merge if equal to previous. */
9157 else if ((second_word & 0x80000000) != 0)
9158 {
9159 if (last_second_word == second_word && last_unwind_type == 1)
9160 elide = 1;
9161 unwind_type = 1;
9162 last_second_word = second_word;
9163 }
9164 /* Normal table entry. In theory we could merge these too,
9165 but duplicate entries are likely to be much less common. */
9166 else
9167 unwind_type = 2;
9168
9169 if (elide)
9170 {
9171 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
9172 DELETE_EXIDX_ENTRY, NULL, j / 8);
9173
9174 deleted_exidx_bytes += 8;
9175 }
9176
9177 last_unwind_type = unwind_type;
9178 }
9179
9180 /* Free contents if we allocated it ourselves. */
9181 if (contents != hdr->contents)
9182 free (contents);
9183
9184 /* Record edits to be applied later (in elf32_arm_write_section). */
9185 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
9186 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
9187
9188 if (deleted_exidx_bytes > 0)
9189 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
9190
9191 last_exidx_sec = exidx_sec;
9192 last_text_sec = sec;
9193 }
9194
9195 /* Add terminating CANTUNWIND entry. */
9196 if (last_exidx_sec && last_unwind_type != 0)
9197 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9198
9199 return TRUE;
9200}
9201
3e6b1042
DJ		 9202static bfd_boolean
9203elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
9204 bfd *ibfd, const char *name)
9205{
9206 asection *sec, *osec;
9207
9208 sec = bfd_get_section_by_name (ibfd, name);
9209 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
9210 return TRUE;
9211
9212 osec = sec->output_section;
9213 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
9214 return TRUE;
9215
9216 if (! bfd_set_section_contents (obfd, osec, sec->contents,
9217 sec->output_offset, sec->size))
9218 return FALSE;
9219
9220 return TRUE;
9221}
9222
9223static bfd_boolean
9224elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
9225{
9226 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
9227
9228 /* Invoke the regular ELF backend linker to do all the work. */
9229 if (!bfd_elf_final_link (abfd, info))
9230 return FALSE;
9231
9232 /* Write out any glue sections now that we have created all the
9233 stubs. */
9234 if (globals->bfd_of_glue_owner != NULL)
9235 {
9236 if (! elf32_arm_output_glue_section (info, abfd,
9237 globals->bfd_of_glue_owner,
9238 ARM2THUMB_GLUE_SECTION_NAME))
9239 return FALSE;
9240
9241 if (! elf32_arm_output_glue_section (info, abfd,
9242 globals->bfd_of_glue_owner,
9243 THUMB2ARM_GLUE_SECTION_NAME))
9244 return FALSE;
9245
9246 if (! elf32_arm_output_glue_section (info, abfd,
9247 globals->bfd_of_glue_owner,
9248 VFP11_ERRATUM_VENEER_SECTION_NAME))
9249 return FALSE;
9250
9251 if (! elf32_arm_output_glue_section (info, abfd,
9252 globals->bfd_of_glue_owner,
9253 ARM_BX_GLUE_SECTION_NAME))
9254 return FALSE;
9255 }
9256
9257 return TRUE;
9258}
9259
c178919b
NC		 9260/* Set the right machine number. */
9261
9262static bfd_boolean
57e8b36a 9263elf32_arm_object_p (bfd *abfd)
c178919b 9264{
5a6c6817 9265 unsigned int mach;
57e8b36a 9266
5a6c6817 9267 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 9268
5a6c6817
NC		 9269 if (mach != bfd_mach_arm_unknown)
9270 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
9271
9272 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
9273 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
e16bb312 9274
e16bb312 9275 else
5a6c6817 9276 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 9277
9278 return TRUE;
9279}
9280
fc830a83 9281/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 9282
b34976b6 9283static bfd_boolean
57e8b36a 9284elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 9285{
9286 if (elf_flags_init (abfd)
9287 && elf_elfheader (abfd)->e_flags != flags)
9288 {
fc830a83
NC		 9289 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
9290 {
fd2ec330 9291 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 9292 (*_bfd_error_handler)
9293 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
9294 abfd);
fc830a83 9295 else
d003868e
AM		 9296 _bfd_error_handler
9297 (_("Warning: Clearing the interworking flag of %B due to outside request"),
9298 abfd);
fc830a83 9299 }
252b5132
RH		 9300 }
9301 else
9302 {
9303 elf_elfheader (abfd)->e_flags = flags;
b34976b6 9304 elf_flags_init (abfd) = TRUE;
252b5132
RH		 9305 }
9306
b34976b6 9307 return TRUE;
252b5132
RH		 9308}
9309
fc830a83 9310/* Copy backend specific data from one object module to another. */
9b485d32 9311
b34976b6 9312static bfd_boolean
57e8b36a 9313elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 9314{
9315 flagword in_flags;
9316 flagword out_flags;
9317
0ffa91dd 9318 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 9319 return TRUE;
252b5132 9320
fc830a83 9321 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 9322 out_flags = elf_elfheader (obfd)->e_flags;
9323
fc830a83
NC		 9324 if (elf_flags_init (obfd)
9325 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
9326 && in_flags != out_flags)
252b5132 9327 {
252b5132 9328 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 9329 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 9330 return FALSE;
252b5132
RH		 9331
9332 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 9333 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 9334 return FALSE;
252b5132
RH		 9335
9336 /* If the src and dest have different interworking flags
9337 then turn off the interworking bit. */
fd2ec330 9338 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 9339 {
fd2ec330 9340 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 9341 _bfd_error_handler
9342 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
9343 obfd, ibfd);
252b5132 9344
fd2ec330 9345 in_flags &= ~EF_ARM_INTERWORK;
252b5132 9346 }
1006ba19
PB		 9347
9348 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 9349 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
9350 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 9351 }
9352
9353 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 9354 elf_flags_init (obfd) = TRUE;
252b5132 9355
94a3258f
PB		 9356 /* Also copy the EI_OSABI field. */
9357 elf_elfheader (obfd)->e_ident[EI_OSABI] =
9358 elf_elfheader (ibfd)->e_ident[EI_OSABI];
9359
104d59d1
JM		 9360 /* Copy object attributes. */
9361 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB		 9362
9363 return TRUE;
9364}
9365
9366/* Values for Tag_ABI_PCS_R9_use. */
9367enum
9368{
9369 AEABI_R9_V6,
9370 AEABI_R9_SB,
9371 AEABI_R9_TLS,
9372 AEABI_R9_unused
9373};
9374
9375/* Values for Tag_ABI_PCS_RW_data. */
9376enum
9377{
9378 AEABI_PCS_RW_data_absolute,
9379 AEABI_PCS_RW_data_PCrel,
9380 AEABI_PCS_RW_data_SBrel,
9381 AEABI_PCS_RW_data_unused
9382};
9383
9384/* Values for Tag_ABI_enum_size. */
9385enum
9386{
9387 AEABI_enum_unused,
9388 AEABI_enum_short,
9389 AEABI_enum_wide,
9390 AEABI_enum_forced_wide
9391};
9392
104d59d1
JM		 9393/* Determine whether an object attribute tag takes an integer, a
9394 string or both. */
906e58ca 9395
104d59d1
JM		 9396static int
9397elf32_arm_obj_attrs_arg_type (int tag)
9398{
9399 if (tag == Tag_compatibility)
3483fe2e 9400 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
2d0bb761 9401 else if (tag == Tag_nodefaults)
3483fe2e
AS		 9402 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
9403 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
9404 return ATTR_TYPE_FLAG_STR_VAL;
104d59d1 9405 else if (tag < 32)
3483fe2e 9406 return ATTR_TYPE_FLAG_INT_VAL;
104d59d1 9407 else
3483fe2e 9408 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
104d59d1
JM		 9409}
9410
5aa6ff7c
AS		 9411/* The ABI defines that Tag_conformance should be emitted first, and that
9412 Tag_nodefaults should be second (if either is defined). This sets those
9413 two positions, and bumps up the position of all the remaining tags to
9414 compensate. */
9415static int
9416elf32_arm_obj_attrs_order (int num)
9417{
9418 if (num == 4)
9419 return Tag_conformance;
9420 if (num == 5)
9421 return Tag_nodefaults;
9422 if ((num - 2) < Tag_nodefaults)
9423 return num - 2;
9424 if ((num - 1) < Tag_conformance)
9425 return num - 1;
9426 return num;
9427}
9428
91e22acd
AS		 9429/* Read the architecture from the Tag_also_compatible_with attribute, if any.
9430 Returns -1 if no architecture could be read. */
9431
9432static int
9433get_secondary_compatible_arch (bfd *abfd)
9434{
9435 obj_attribute *attr =
9436 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
9437
9438 /* Note: the tag and its argument below are uleb128 values, though
9439 currently-defined values fit in one byte for each. */
9440 if (attr->s
9441 && attr->s[0] == Tag_CPU_arch
9442 && (attr->s[1] & 128) != 128
9443 && attr->s[2] == 0)
9444 return attr->s[1];
9445
9446 /* This tag is "safely ignorable", so don't complain if it looks funny. */
9447 return -1;
9448}
9449
9450/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
9451 The tag is removed if ARCH is -1. */
9452
8e79c3df 9453static void
91e22acd 9454set_secondary_compatible_arch (bfd *abfd, int arch)
8e79c3df 9455{
91e22acd
AS		 9456 obj_attribute *attr =
9457 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8e79c3df 9458
91e22acd
AS		 9459 if (arch == -1)
9460 {
9461 attr->s = NULL;
9462 return;
8e79c3df 9463 }
91e22acd
AS		 9464
9465 /* Note: the tag and its argument below are uleb128 values, though
9466 currently-defined values fit in one byte for each. */
9467 if (!attr->s)
9468 attr->s = bfd_alloc (abfd, 3);
9469 attr->s[0] = Tag_CPU_arch;
9470 attr->s[1] = arch;
9471 attr->s[2] = '\0';
8e79c3df
CM		 9472}
9473
91e22acd
AS		 9474/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
9475 into account. */
9476
9477static int
9478tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
9479 int newtag, int secondary_compat)
8e79c3df 9480{
91e22acd
AS		 9481#define T(X) TAG_CPU_ARCH_##X
9482 int tagl, tagh, result;
9483 const int v6t2[] =
9484 {
9485 T(V6T2), /* PRE_V4. */
9486 T(V6T2), /* V4. */
9487 T(V6T2), /* V4T. */
9488 T(V6T2), /* V5T. */
9489 T(V6T2), /* V5TE. */
9490 T(V6T2), /* V5TEJ. */
9491 T(V6T2), /* V6. */
9492 T(V7), /* V6KZ. */
9493 T(V6T2) /* V6T2. */
9494 };
9495 const int v6k[] =
9496 {
9497 T(V6K), /* PRE_V4. */
9498 T(V6K), /* V4. */
9499 T(V6K), /* V4T. */
9500 T(V6K), /* V5T. */
9501 T(V6K), /* V5TE. */
9502 T(V6K), /* V5TEJ. */
9503 T(V6K), /* V6. */
9504 T(V6KZ), /* V6KZ. */
9505 T(V7), /* V6T2. */
9506 T(V6K) /* V6K. */
9507 };
9508 const int v7[] =
9509 {
9510 T(V7), /* PRE_V4. */
9511 T(V7), /* V4. */
9512 T(V7), /* V4T. */
9513 T(V7), /* V5T. */
9514 T(V7), /* V5TE. */
9515 T(V7), /* V5TEJ. */
9516 T(V7), /* V6. */
9517 T(V7), /* V6KZ. */
9518 T(V7), /* V6T2. */
9519 T(V7), /* V6K. */
9520 T(V7) /* V7. */
9521 };
9522 const int v6_m[] =
9523 {
9524 -1, /* PRE_V4. */
9525 -1, /* V4. */
9526 T(V6K), /* V4T. */
9527 T(V6K), /* V5T. */
9528 T(V6K), /* V5TE. */
9529 T(V6K), /* V5TEJ. */
9530 T(V6K), /* V6. */
9531 T(V6KZ), /* V6KZ. */
9532 T(V7), /* V6T2. */
9533 T(V6K), /* V6K. */
9534 T(V7), /* V7. */
9535 T(V6_M) /* V6_M. */
9536 };
9537 const int v6s_m[] =
9538 {
9539 -1, /* PRE_V4. */
9540 -1, /* V4. */
9541 T(V6K), /* V4T. */
9542 T(V6K), /* V5T. */
9543 T(V6K), /* V5TE. */
9544 T(V6K), /* V5TEJ. */
9545 T(V6K), /* V6. */
9546 T(V6KZ), /* V6KZ. */
9547 T(V7), /* V6T2. */
9548 T(V6K), /* V6K. */
9549 T(V7), /* V7. */
9550 T(V6S_M), /* V6_M. */
9551 T(V6S_M) /* V6S_M. */
9552 };
9553 const int v4t_plus_v6_m[] =
9554 {
9555 -1, /* PRE_V4. */
9556 -1, /* V4. */
9557 T(V4T), /* V4T. */
9558 T(V5T), /* V5T. */
9559 T(V5TE), /* V5TE. */
9560 T(V5TEJ), /* V5TEJ. */
9561 T(V6), /* V6. */
9562 T(V6KZ), /* V6KZ. */
9563 T(V6T2), /* V6T2. */
9564 T(V6K), /* V6K. */
9565 T(V7), /* V7. */
9566 T(V6_M), /* V6_M. */
9567 T(V6S_M), /* V6S_M. */
9568 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
9569 };
9570 const int *comb[] =
9571 {
9572 v6t2,
9573 v6k,
9574 v7,
9575 v6_m,
9576 v6s_m,
9577 /* Pseudo-architecture. */
9578 v4t_plus_v6_m
9579 };
9580
9581 /* Check we've not got a higher architecture than we know about. */
9582
9583 if (oldtag >= MAX_TAG_CPU_ARCH || newtag >= MAX_TAG_CPU_ARCH)
9584 {
3895f852 9585 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
91e22acd
AS		 9586 return -1;
9587 }
9588
9589 /* Override old tag if we have a Tag_also_compatible_with on the output. */
9590
9591 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
9592 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
9593 oldtag = T(V4T_PLUS_V6_M);
9594
9595 /* And override the new tag if we have a Tag_also_compatible_with on the
9596 input. */
9597
9598 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
9599 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
9600 newtag = T(V4T_PLUS_V6_M);
9601
9602 tagl = (oldtag < newtag) ? oldtag : newtag;
9603 result = tagh = (oldtag > newtag) ? oldtag : newtag;
9604
9605 /* Architectures before V6KZ add features monotonically. */
9606 if (tagh <= TAG_CPU_ARCH_V6KZ)
9607 return result;
9608
9609 result = comb[tagh - T(V6T2)][tagl];
9610
9611 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
9612 as the canonical version. */
9613 if (result == T(V4T_PLUS_V6_M))
9614 {
9615 result = T(V4T);
9616 *secondary_compat_out = T(V6_M);
9617 }
9618 else
9619 *secondary_compat_out = -1;
9620
9621 if (result == -1)
9622 {
3895f852 9623 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
91e22acd
AS		 9624 ibfd, oldtag, newtag);
9625 return -1;
9626 }
9627
9628 return result;
9629#undef T
8e79c3df
CM		 9630}
9631
ee065d83
PB		 9632/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
9633 are conflicting attributes. */
906e58ca 9634
ee065d83
PB		 9635static bfd_boolean
9636elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
9637{
104d59d1
JM		 9638 obj_attribute *in_attr;
9639 obj_attribute *out_attr;
9640 obj_attribute_list *in_list;
8e79c3df 9641 obj_attribute_list *out_list;
91e22acd 9642 obj_attribute_list **out_listp;
ee065d83
PB		 9643 /* Some tags have 0 = don't care, 1 = strong requirement,
9644 2 = weak requirement. */
91e22acd 9645 static const int order_021[3] = {0, 2, 1};
b1cc4aeb
PB		 9646 /* For use with Tag_VFP_arch. */
9647 static const int order_01243[5] = {0, 1, 2, 4, 3};
ee065d83 9648 int i;
91e22acd 9649 bfd_boolean result = TRUE;
ee065d83 9650
3e6b1042
DJ		 9651 /* Skip the linker stubs file. This preserves previous behavior
9652 of accepting unknown attributes in the first input file - but
9653 is that a bug? */
9654 if (ibfd->flags & BFD_LINKER_CREATED)
9655 return TRUE;
9656
104d59d1 9657 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 9658 {
9659 /* This is the first object. Copy the attributes. */
104d59d1 9660 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526
PB		 9661
9662 /* Use the Tag_null value to indicate the attributes have been
9663 initialized. */
104d59d1 9664 elf_known_obj_attributes_proc (obfd)[0].i = 1;
004ae526 9665
ee065d83
PB		 9666 return TRUE;
9667 }
9668
104d59d1
JM		 9669 in_attr = elf_known_obj_attributes_proc (ibfd);
9670 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 9671 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
9672 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
9673 {
8e79c3df 9674 /* Ignore mismatches if the object doesn't use floating point. */
ee065d83
PB		 9675 if (out_attr[Tag_ABI_FP_number_model].i == 0)
9676 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
9677 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
9678 {
9679 _bfd_error_handler
3895f852 9680 (_("error: %B uses VFP register arguments, %B does not"),
ee065d83 9681 ibfd, obfd);
91e22acd 9682 result = FALSE;
ee065d83
PB		 9683 }
9684 }
9685
104d59d1 9686 for (i = 4; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 9687 {
9688 /* Merge this attribute with existing attributes. */
9689 switch (i)
9690 {
9691 case Tag_CPU_raw_name:
9692 case Tag_CPU_name:
91e22acd 9693 /* These are merged after Tag_CPU_arch. */
ee065d83
PB		 9694 break;
9695
9696 case Tag_ABI_optimization_goals:
9697 case Tag_ABI_FP_optimization_goals:
9698 /* Use the first value seen. */
9699 break;
9700
9701 case Tag_CPU_arch:
91e22acd
AS		 9702 {
9703 int secondary_compat = -1, secondary_compat_out = -1;
9704 unsigned int saved_out_attr = out_attr[i].i;
9705 static const char *name_table[] = {
9706 /* These aren't real CPU names, but we can't guess
9707 that from the architecture version alone. */
9708 "Pre v4",
9709 "ARM v4",
9710 "ARM v4T",
9711 "ARM v5T",
9712 "ARM v5TE",
9713 "ARM v5TEJ",
9714 "ARM v6",
9715 "ARM v6KZ",
9716 "ARM v6T2",
9717 "ARM v6K",
9718 "ARM v7",
9719 "ARM v6-M",
9720 "ARM v6S-M"
9721 };
9722
9723 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
9724 secondary_compat = get_secondary_compatible_arch (ibfd);
9725 secondary_compat_out = get_secondary_compatible_arch (obfd);
9726 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
9727 &secondary_compat_out,
9728 in_attr[i].i,
9729 secondary_compat);
9730 set_secondary_compatible_arch (obfd, secondary_compat_out);
9731
9732 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
9733 if (out_attr[i].i == saved_out_attr)
9734 ; /* Leave the names alone. */
9735 else if (out_attr[i].i == in_attr[i].i)
9736 {
9737 /* The output architecture has been changed to match the
9738 input architecture. Use the input names. */
9739 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
9740 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
9741 : NULL;
9742 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
9743 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
9744 : NULL;
9745 }
9746 else
9747 {
9748 out_attr[Tag_CPU_name].s = NULL;
9749 out_attr[Tag_CPU_raw_name].s = NULL;
9750 }
9751
9752 /* If we still don't have a value for Tag_CPU_name,
9753 make one up now. Tag_CPU_raw_name remains blank. */
9754 if (out_attr[Tag_CPU_name].s == NULL
9755 && out_attr[i].i < ARRAY_SIZE (name_table))
9756 out_attr[Tag_CPU_name].s =
9757 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
9758 }
9759 break;
9760
ee065d83
PB		 9761 case Tag_ARM_ISA_use:
9762 case Tag_THUMB_ISA_use:
ee065d83 9763 case Tag_WMMX_arch:
91e22acd
AS		 9764 case Tag_Advanced_SIMD_arch:
9765 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
ee065d83 9766 case Tag_ABI_FP_rounding:
ee065d83
PB		 9767 case Tag_ABI_FP_exceptions:
9768 case Tag_ABI_FP_user_exceptions:
9769 case Tag_ABI_FP_number_model:
91e22acd
AS		 9770 case Tag_VFP_HP_extension:
9771 case Tag_CPU_unaligned_access:
9772 case Tag_T2EE_use:
9773 case Tag_Virtualization_use:
9774 case Tag_MPextension_use:
ee065d83
PB		 9775 /* Use the largest value specified. */
9776 if (in_attr[i].i > out_attr[i].i)
9777 out_attr[i].i = in_attr[i].i;
9778 break;
9779
91e22acd
AS		 9780 case Tag_ABI_align8_preserved:
9781 case Tag_ABI_PCS_RO_data:
9782 /* Use the smallest value specified. */
9783 if (in_attr[i].i < out_attr[i].i)
9784 out_attr[i].i = in_attr[i].i;
9785 break;
9786
9787 case Tag_ABI_align8_needed:
9788 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
9789 && (in_attr[Tag_ABI_align8_preserved].i == 0
9790 || out_attr[Tag_ABI_align8_preserved].i == 0))
ee065d83 9791 {
91e22acd
AS		 9792 /* This error message should be enabled once all non-conformant
9793 binaries in the toolchain have had the attributes set
9794 properly.
ee065d83 9795 _bfd_error_handler
3895f852 9796 (_("error: %B: 8-byte data alignment conflicts with %B"),
91e22acd
AS		 9797 obfd, ibfd);
9798 result = FALSE; */
ee065d83 9799 }
91e22acd
AS		 9800 /* Fall through. */
9801 case Tag_ABI_FP_denormal:
9802 case Tag_ABI_PCS_GOT_use:
9803 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
9804 value if greater than 2 (for future-proofing). */
9805 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
9806 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
9807 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
ee065d83
PB		 9808 out_attr[i].i = in_attr[i].i;
9809 break;
91e22acd
AS		 9810
9811
9812 case Tag_CPU_arch_profile:
9813 if (out_attr[i].i != in_attr[i].i)
9814 {
9815 /* 0 will merge with anything.
9816 'A' and 'S' merge to 'A'.
9817 'R' and 'S' merge to 'R'.
9818 'M' and 'A|R|S' is an error. */
9819 if (out_attr[i].i == 0
9820 || (out_attr[i].i == 'S'
9821 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
9822 out_attr[i].i = in_attr[i].i;
9823 else if (in_attr[i].i == 0
9824 || (in_attr[i].i == 'S'
9825 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
9826 ; /* Do nothing. */
9827 else
9828 {
9829 _bfd_error_handler
3895f852 9830 (_("error: %B: Conflicting architecture profiles %c/%c"),
91e22acd
AS		 9831 ibfd,
9832 in_attr[i].i ? in_attr[i].i : '0',
9833 out_attr[i].i ? out_attr[i].i : '0');
9834 result = FALSE;
9835 }
9836 }
9837 break;
b1cc4aeb 9838 case Tag_VFP_arch:
91e22acd
AS		 9839 /* Use the "greatest" from the sequence 0, 1, 2, 4, 3, or the
9840 largest value if greater than 4 (for future-proofing). */
9841 if ((in_attr[i].i > 4 && in_attr[i].i > out_attr[i].i)
9842 || (in_attr[i].i <= 4 && out_attr[i].i <= 4
9843 && order_01243[in_attr[i].i] > order_01243[out_attr[i].i]))
b1cc4aeb
PB		 9844 out_attr[i].i = in_attr[i].i;
9845 break;
ee065d83
PB		 9846 case Tag_PCS_config:
9847 if (out_attr[i].i == 0)
9848 out_attr[i].i = in_attr[i].i;
9849 else if (in_attr[i].i != 0 && out_attr[i].i != 0)
9850 {
9851 /* It's sometimes ok to mix different configs, so this is only
9852 a warning. */
9853 _bfd_error_handler
9854 (_("Warning: %B: Conflicting platform configuration"), ibfd);
9855 }
9856 break;
9857 case Tag_ABI_PCS_R9_use:
004ae526
PB		 9858 if (in_attr[i].i != out_attr[i].i
9859 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 9860 && in_attr[i].i != AEABI_R9_unused)
9861 {
9862 _bfd_error_handler
3895f852 9863 (_("error: %B: Conflicting use of R9"), ibfd);
91e22acd 9864 result = FALSE;
ee065d83
PB		 9865 }
9866 if (out_attr[i].i == AEABI_R9_unused)
9867 out_attr[i].i = in_attr[i].i;
9868 break;
9869 case Tag_ABI_PCS_RW_data:
9870 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
9871 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
9872 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
9873 {
9874 _bfd_error_handler
3895f852 9875 (_("error: %B: SB relative addressing conflicts with use of R9"),
ee065d83 9876 ibfd);
91e22acd 9877 result = FALSE;
ee065d83
PB		 9878 }
9879 /* Use the smallest value specified. */
9880 if (in_attr[i].i < out_attr[i].i)
9881 out_attr[i].i = in_attr[i].i;
9882 break;
ee065d83 9883 case Tag_ABI_PCS_wchar_t:
a9dc9481
JM		 9884 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
9885 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
ee065d83
PB		 9886 {
9887 _bfd_error_handler
a9dc9481
JM		 9888 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
9889 ibfd, in_attr[i].i, out_attr[i].i);
ee065d83 9890 }
a9dc9481 9891 else if (in_attr[i].i && !out_attr[i].i)
ee065d83
PB		 9892 out_attr[i].i = in_attr[i].i;
9893 break;
ee065d83
PB		 9894 case Tag_ABI_enum_size:
9895 if (in_attr[i].i != AEABI_enum_unused)
9896 {
9897 if (out_attr[i].i == AEABI_enum_unused
9898 || out_attr[i].i == AEABI_enum_forced_wide)
9899 {
9900 /* The existing object is compatible with anything.
9901 Use whatever requirements the new object has. */
9902 out_attr[i].i = in_attr[i].i;
9903 }
9904 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 9905 && out_attr[i].i != in_attr[i].i
0ffa91dd 9906 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 9907 {
91e22acd 9908 static const char *aeabi_enum_names[] =
bf21ed78 9909 { "", "variable-size", "32-bit", "" };
91e22acd
AS		 9910 const char *in_name =
9911 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
9912 ? aeabi_enum_names[in_attr[i].i]
9913 : "<unknown>";
9914 const char *out_name =
9915 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
9916 ? aeabi_enum_names[out_attr[i].i]
9917 : "<unknown>";
ee065d83 9918 _bfd_error_handler
bf21ed78 9919 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
91e22acd 9920 ibfd, in_name, out_name);
ee065d83
PB		 9921 }
9922 }
9923 break;
9924 case Tag_ABI_VFP_args:
9925 /* Aready done. */
9926 break;
9927 case Tag_ABI_WMMX_args:
9928 if (in_attr[i].i != out_attr[i].i)
9929 {
9930 _bfd_error_handler
3895f852 9931 (_("error: %B uses iWMMXt register arguments, %B does not"),
ee065d83 9932 ibfd, obfd);
91e22acd 9933 result = FALSE;
ee065d83
PB		 9934 }
9935 break;
7b86a9fa
AS		 9936 case Tag_compatibility:
9937 /* Merged in target-independent code. */
9938 break;
91e22acd
AS		 9939 case Tag_ABI_HardFP_use:
9940 /* 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP). */
9941 if ((in_attr[i].i == 1 && out_attr[i].i == 2)
9942 || (in_attr[i].i == 2 && out_attr[i].i == 1))
9943 out_attr[i].i = 3;
9944 else if (in_attr[i].i > out_attr[i].i)
9945 out_attr[i].i = in_attr[i].i;
9946 break;
9947 case Tag_ABI_FP_16bit_format:
9948 if (in_attr[i].i != 0 && out_attr[i].i != 0)
9949 {
9950 if (in_attr[i].i != out_attr[i].i)
9951 {
9952 _bfd_error_handler
3895f852 9953 (_("error: fp16 format mismatch between %B and %B"),
91e22acd
AS		 9954 ibfd, obfd);
9955 result = FALSE;
9956 }
9957 }
9958 if (in_attr[i].i != 0)
9959 out_attr[i].i = in_attr[i].i;
9960 break;
7b86a9fa 9961
91e22acd 9962 case Tag_nodefaults:
2d0bb761
AS		 9963 /* This tag is set if it exists, but the value is unused (and is
9964 typically zero). We don't actually need to do anything here -
9965 the merge happens automatically when the type flags are merged
9966 below. */
91e22acd
AS		 9967 break;
9968 case Tag_also_compatible_with:
9969 /* Already done in Tag_CPU_arch. */
9970 break;
9971 case Tag_conformance:
9972 /* Keep the attribute if it matches. Throw it away otherwise.
9973 No attribute means no claim to conform. */
9974 if (!in_attr[i].s || !out_attr[i].s
9975 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
9976 out_attr[i].s = NULL;
9977 break;
3cfad14c 9978
91e22acd 9979 default:
3cfad14c 9980 {
91e22acd
AS		 9981 bfd *err_bfd = NULL;
9982
9983 /* The "known_obj_attributes" table does contain some undefined
9984 attributes. Ensure that there are unused. */
9985 if (out_attr[i].i != 0 || out_attr[i].s != NULL)
9986 err_bfd = obfd;
9987 else if (in_attr[i].i != 0 || in_attr[i].s != NULL)
9988 err_bfd = ibfd;
9989
9990 if (err_bfd != NULL)
9991 {
9992 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
9993 if ((i & 127) < 64)
9994 {
9995 _bfd_error_handler
9996 (_("%B: Unknown mandatory EABI object attribute %d"),
9997 err_bfd, i);
9998 bfd_set_error (bfd_error_bad_value);
9999 result = FALSE;
10000 }
10001 else
10002 {
10003 _bfd_error_handler
10004 (_("Warning: %B: Unknown EABI object attribute %d"),
10005 err_bfd, i);
10006 }
10007 }
10008
10009 /* Only pass on attributes that match in both inputs. */
10010 if (in_attr[i].i != out_attr[i].i
10011 || in_attr[i].s != out_attr[i].s
10012 || (in_attr[i].s != NULL && out_attr[i].s != NULL
10013 && strcmp (in_attr[i].s, out_attr[i].s) != 0))
10014 {
10015 out_attr[i].i = 0;
10016 out_attr[i].s = NULL;
10017 }
3cfad14c 10018 }
91e22acd
AS		 10019 }
10020
10021 /* If out_attr was copied from in_attr then it won't have a type yet. */
10022 if (in_attr[i].type && !out_attr[i].type)
10023 out_attr[i].type = in_attr[i].type;
ee065d83
PB		 10024 }
10025
104d59d1
JM		 10026 /* Merge Tag_compatibility attributes and any common GNU ones. */
10027 _bfd_elf_merge_object_attributes (ibfd, obfd);
ee065d83 10028
104d59d1
JM		 10029 /* Check for any attributes not known on ARM. */
10030 in_list = elf_other_obj_attributes_proc (ibfd);
91e22acd
AS		 10031 out_listp = &elf_other_obj_attributes_proc (obfd);
10032 out_list = *out_listp;
8e79c3df 10033
91e22acd 10034 for (; in_list || out_list; )
ee065d83 10035 {
91e22acd
AS		 10036 bfd *err_bfd = NULL;
10037 int err_tag = 0;
8e79c3df
CM		 10038
10039 /* The tags for each list are in numerical order. */
10040 /* If the tags are equal, then merge. */
91e22acd 10041 if (out_list && (!in_list || in_list->tag > out_list->tag))
8e79c3df 10042 {
91e22acd
AS		 10043 /* This attribute only exists in obfd. We can't merge, and we don't
10044 know what the tag means, so delete it. */
10045 err_bfd = obfd;
10046 err_tag = out_list->tag;
10047 *out_listp = out_list->next;
10048 out_list = *out_listp;
8e79c3df 10049 }
91e22acd 10050 else if (in_list && (!out_list || in_list->tag < out_list->tag))
8e79c3df 10051 {
91e22acd
AS		 10052 /* This attribute only exists in ibfd. We can't merge, and we don't
10053 know what the tag means, so ignore it. */
10054 err_bfd = ibfd;
10055 err_tag = in_list->tag;
8e79c3df 10056 in_list = in_list->next;
eb111b1f 10057 }
91e22acd
AS		 10058 else /* The tags are equal. */
10059 {
10060 /* As present, all attributes in the list are unknown, and
10061 therefore can't be merged meaningfully. */
10062 err_bfd = obfd;
10063 err_tag = out_list->tag;
10064
10065 /* Only pass on attributes that match in both inputs. */
10066 if (in_list->attr.i != out_list->attr.i
10067 || in_list->attr.s != out_list->attr.s
10068 || (in_list->attr.s && out_list->attr.s
10069 && strcmp (in_list->attr.s, out_list->attr.s) != 0))
10070 {
10071 /* No match. Delete the attribute. */
10072 *out_listp = out_list->next;
10073 out_list = *out_listp;
10074 }
10075 else
10076 {
10077 /* Matched. Keep the attribute and move to the next. */
10078 out_list = out_list->next;
10079 in_list = in_list->next;
10080 }
10081 }
10082
10083 if (err_bfd)
10084 {
10085 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
10086 if ((err_tag & 127) < 64)
10087 {
10088 _bfd_error_handler
10089 (_("%B: Unknown mandatory EABI object attribute %d"),
10090 err_bfd, err_tag);
10091 bfd_set_error (bfd_error_bad_value);
10092 result = FALSE;
10093 }
10094 else
10095 {
10096 _bfd_error_handler
10097 (_("Warning: %B: Unknown EABI object attribute %d"),
10098 err_bfd, err_tag);
10099 }
10100 }
ee065d83 10101 }
91e22acd 10102 return result;
252b5132
RH		 10103}
10104
3a4a14e9
PB		 10105
10106/* Return TRUE if the two EABI versions are incompatible. */
10107
10108static bfd_boolean
10109elf32_arm_versions_compatible (unsigned iver, unsigned over)
10110{
10111 /* v4 and v5 are the same spec before and after it was released,
10112 so allow mixing them. */
10113 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
10114 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
10115 return TRUE;
10116
10117 return (iver == over);
10118}
10119
252b5132
RH		 10120/* Merge backend specific data from an object file to the output
10121 object file when linking. */
9b485d32 10122
b34976b6 10123static bfd_boolean
57e8b36a 10124elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
252b5132
RH		 10125{
10126 flagword out_flags;
10127 flagword in_flags;
b34976b6 10128 bfd_boolean flags_compatible = TRUE;
cf919dfd 10129 asection *sec;
252b5132 10130
9b485d32 10131 /* Check if we have the same endianess. */
82e51918 10132 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
b34976b6 10133 return FALSE;
1fe494a5 10134
0ffa91dd 10135 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 10136 return TRUE;
252b5132 10137
ee065d83
PB		 10138 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
10139 return FALSE;
10140
252b5132
RH		 10141 /* The input BFD must have had its flags initialised. */
10142 /* The following seems bogus to me -- The flags are initialized in
10143 the assembler but I don't think an elf_flags_init field is
9b485d32 10144 written into the object. */
252b5132
RH		 10145 /* BFD_ASSERT (elf_flags_init (ibfd)); */
10146
10147 in_flags = elf_elfheader (ibfd)->e_flags;
10148 out_flags = elf_elfheader (obfd)->e_flags;
10149
23684067
PB		 10150 /* In theory there is no reason why we couldn't handle this. However
10151 in practice it isn't even close to working and there is no real
10152 reason to want it. */
10153 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
c13bb2ea 10154 && !(ibfd->flags & DYNAMIC)
23684067
PB		 10155 && (in_flags & EF_ARM_BE8))
10156 {
3895f852 10157 _bfd_error_handler (_("error: %B is already in final BE8 format"),
23684067
PB		 10158 ibfd);
10159 return FALSE;
10160 }
10161
252b5132
RH		 10162 if (!elf_flags_init (obfd))
10163 {
fe077fa6
NC		 10164 /* If the input is the default architecture and had the default
10165 flags then do not bother setting the flags for the output
10166 architecture, instead allow future merges to do this. If no
10167 future merges ever set these flags then they will retain their
10168 uninitialised values, which surprise surprise, correspond
252b5132 10169 to the default values. */
fe077fa6
NC		 10170 if (bfd_get_arch_info (ibfd)->the_default
10171 && elf_elfheader (ibfd)->e_flags == 0)
b34976b6 10172 return TRUE;
252b5132 10173
b34976b6 10174 elf_flags_init (obfd) = TRUE;
252b5132
RH		 10175 elf_elfheader (obfd)->e_flags = in_flags;
10176
10177 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
10178 && bfd_get_arch_info (obfd)->the_default)
10179 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
10180
b34976b6 10181 return TRUE;
252b5132
RH		 10182 }
10183
5a6c6817
NC		 10184 /* Determine what should happen if the input ARM architecture
10185 does not match the output ARM architecture. */
10186 if (! bfd_arm_merge_machines (ibfd, obfd))
10187 return FALSE;
e16bb312 10188
1006ba19 10189 /* Identical flags must be compatible. */
252b5132 10190 if (in_flags == out_flags)
b34976b6 10191 return TRUE;
252b5132 10192
35a0f415
DJ		 10193 /* Check to see if the input BFD actually contains any sections. If
10194 not, its flags may not have been initialised either, but it
8e3de13a 10195 cannot actually cause any incompatiblity. Do not short-circuit
35a0f415 10196 dynamic objects; their section list may be emptied by
d1f161ea 10197 elf_link_add_object_symbols.
35a0f415 10198
d1f161ea
NC		 10199 Also check to see if there are no code sections in the input.
10200 In this case there is no need to check for code specific flags.
10201 XXX - do we need to worry about floating-point format compatability
10202 in data sections ? */
35a0f415 10203 if (!(ibfd->flags & DYNAMIC))
cf919dfd 10204 {
35a0f415 10205 bfd_boolean null_input_bfd = TRUE;
d1f161ea 10206 bfd_boolean only_data_sections = TRUE;
35a0f415
DJ		 10207
10208 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
cf919dfd 10209 {
35a0f415
DJ		 10210 /* Ignore synthetic glue sections. */
10211 if (strcmp (sec->name, ".glue_7")
10212 && strcmp (sec->name, ".glue_7t"))
10213 {
d1f161ea
NC		 10214 if ((bfd_get_section_flags (ibfd, sec)
10215 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
10216 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
10217 only_data_sections = FALSE;
10218
35a0f415
DJ		 10219 null_input_bfd = FALSE;
10220 break;
10221 }
cf919dfd 10222 }
d1f161ea
NC		 10223
10224 if (null_input_bfd || only_data_sections)
35a0f415 10225 return TRUE;
cf919dfd 10226 }
cf919dfd 10227
252b5132 10228 /* Complain about various flag mismatches. */
3a4a14e9
PB		 10229 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
10230 EF_ARM_EABI_VERSION (out_flags)))
fc830a83 10231 {
d003868e 10232 _bfd_error_handler
3895f852 10233 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
d003868e
AM		 10234 ibfd, obfd,
10235 (in_flags & EF_ARM_EABIMASK) >> 24,
10236 (out_flags & EF_ARM_EABIMASK) >> 24);
b34976b6 10237 return FALSE;
fc830a83 10238 }
252b5132 10239
1006ba19 10240 /* Not sure what needs to be checked for EABI versions >= 1. */
00a97672
RS		 10241 /* VxWorks libraries do not use these flags. */
10242 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
10243 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
10244 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
1006ba19 10245 {
fd2ec330 10246 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
1006ba19 10247 {
d003868e 10248 _bfd_error_handler
3895f852 10249 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
d003868e
AM		 10250 ibfd, obfd,
10251 in_flags & EF_ARM_APCS_26 ? 26 : 32,
10252 out_flags & EF_ARM_APCS_26 ? 26 : 32);
b34976b6 10253 flags_compatible = FALSE;
1006ba19 10254 }
252b5132 10255
fd2ec330 10256 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
1006ba19 10257 {
5eefb65f 10258 if (in_flags & EF_ARM_APCS_FLOAT)
d003868e 10259 _bfd_error_handler
3895f852 10260 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
d003868e 10261 ibfd, obfd);
5eefb65f 10262 else
d003868e 10263 _bfd_error_handler
3895f852 10264 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
d003868e 10265 ibfd, obfd);
63b0f745 10266
b34976b6 10267 flags_compatible = FALSE;
1006ba19 10268 }
252b5132 10269
96a846ea 10270 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
1006ba19 10271 {
96a846ea 10272 if (in_flags & EF_ARM_VFP_FLOAT)
d003868e 10273 _bfd_error_handler
3895f852 10274 (_("error: %B uses VFP instructions, whereas %B does not"),
d003868e 10275 ibfd, obfd);
5eefb65f 10276 else
d003868e 10277 _bfd_error_handler
3895f852 10278 (_("error: %B uses FPA instructions, whereas %B does not"),
d003868e 10279 ibfd, obfd);
fde78edd
NC		 10280
10281 flags_compatible = FALSE;
10282 }
10283
10284 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
10285 {
10286 if (in_flags & EF_ARM_MAVERICK_FLOAT)
d003868e 10287 _bfd_error_handler
3895f852 10288 (_("error: %B uses Maverick instructions, whereas %B does not"),
d003868e 10289 ibfd, obfd);
fde78edd 10290 else
d003868e 10291 _bfd_error_handler
3895f852 10292 (_("error: %B does not use Maverick instructions, whereas %B does"),
d003868e 10293 ibfd, obfd);
63b0f745 10294
b34976b6 10295 flags_compatible = FALSE;
1006ba19 10296 }
96a846ea
RE		 10297
10298#ifdef EF_ARM_SOFT_FLOAT
10299 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
10300 {
10301 /* We can allow interworking between code that is VFP format
10302 layout, and uses either soft float or integer regs for
10303 passing floating point arguments and results. We already
10304 know that the APCS_FLOAT flags match; similarly for VFP
10305 flags. */
10306 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
10307 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
10308 {
10309 if (in_flags & EF_ARM_SOFT_FLOAT)
d003868e 10310 _bfd_error_handler
3895f852 10311 (_("error: %B uses software FP, whereas %B uses hardware FP"),
d003868e 10312 ibfd, obfd);
96a846ea 10313 else
d003868e 10314 _bfd_error_handler
3895f852 10315 (_("error: %B uses hardware FP, whereas %B uses software FP"),
d003868e 10316 ibfd, obfd);
96a846ea 10317
b34976b6 10318 flags_compatible = FALSE;
96a846ea
RE		 10319 }
10320 }
ee43f35e 10321#endif
252b5132 10322
1006ba19 10323 /* Interworking mismatch is only a warning. */
fd2ec330 10324 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
8f615d07 10325 {
e3c8793a
NC		 10326 if (in_flags & EF_ARM_INTERWORK)
10327 {
d003868e
AM		 10328 _bfd_error_handler
10329 (_("Warning: %B supports interworking, whereas %B does not"),
10330 ibfd, obfd);
e3c8793a
NC		 10331 }
10332 else
10333 {
d003868e
AM		 10334 _bfd_error_handler
10335 (_("Warning: %B does not support interworking, whereas %B does"),
10336 ibfd, obfd);
e3c8793a 10337 }
8f615d07 10338 }
252b5132 10339 }
63b0f745 10340
1006ba19 10341 return flags_compatible;
252b5132
RH		 10342}
10343
9b485d32
NC		 10344/* Display the flags field. */
10345
b34976b6 10346static bfd_boolean
57e8b36a 10347elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 10348{
fc830a83
NC		 10349 FILE * file = (FILE *) ptr;
10350 unsigned long flags;
252b5132
RH		 10351
10352 BFD_ASSERT (abfd != NULL && ptr != NULL);
10353
10354 /* Print normal ELF private data. */
10355 _bfd_elf_print_private_bfd_data (abfd, ptr);
10356
fc830a83 10357 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 10358 /* Ignore init flag - it may not be set, despite the flags field
10359 containing valid data. */
252b5132
RH		 10360
10361 /* xgettext:c-format */
9b485d32 10362 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 10363
fc830a83
NC		 10364 switch (EF_ARM_EABI_VERSION (flags))
10365 {
10366 case EF_ARM_EABI_UNKNOWN:
4cc11e76 10367 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 10368 official ARM ELF extended ABI. Hence they are only decoded if
10369 the EABI version is not set. */
fd2ec330 10370 if (flags & EF_ARM_INTERWORK)
9b485d32 10371 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 10372
fd2ec330 10373 if (flags & EF_ARM_APCS_26)
6c571f00 10374 fprintf (file, " [APCS-26]");
fc830a83 10375 else
6c571f00 10376 fprintf (file, " [APCS-32]");
9a5aca8c 10377
96a846ea
RE		 10378 if (flags & EF_ARM_VFP_FLOAT)
10379 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 10380 else if (flags & EF_ARM_MAVERICK_FLOAT)
10381 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 10382 else
10383 fprintf (file, _(" [FPA float format]"));
10384
fd2ec330 10385 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 10386 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 10387
fd2ec330 10388 if (flags & EF_ARM_PIC)
9b485d32 10389 fprintf (file, _(" [position independent]"));
fc830a83 10390
fd2ec330 10391 if (flags & EF_ARM_NEW_ABI)
9b485d32 10392 fprintf (file, _(" [new ABI]"));
9a5aca8c 10393
fd2ec330 10394 if (flags & EF_ARM_OLD_ABI)
9b485d32 10395 fprintf (file, _(" [old ABI]"));
9a5aca8c 10396
fd2ec330 10397 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 10398 fprintf (file, _(" [software FP]"));
9a5aca8c 10399
96a846ea
RE		 10400 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
10401 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 10402 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
10403 | EF_ARM_MAVERICK_FLOAT);
fc830a83 10404 break;
9a5aca8c 10405
fc830a83 10406 case EF_ARM_EABI_VER1:
9b485d32 10407 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 10408
fc830a83 10409 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 10410 fprintf (file, _(" [sorted symbol table]"));
fc830a83 10411 else
9b485d32 10412 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 10413
fc830a83
NC		 10414 flags &= ~ EF_ARM_SYMSARESORTED;
10415 break;
9a5aca8c 10416
fd2ec330
PB		 10417 case EF_ARM_EABI_VER2:
10418 fprintf (file, _(" [Version2 EABI]"));
10419
10420 if (flags & EF_ARM_SYMSARESORTED)
10421 fprintf (file, _(" [sorted symbol table]"));
10422 else
10423 fprintf (file, _(" [unsorted symbol table]"));
10424
10425 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
10426 fprintf (file, _(" [dynamic symbols use segment index]"));
10427
10428 if (flags & EF_ARM_MAPSYMSFIRST)
10429 fprintf (file, _(" [mapping symbols precede others]"));
10430
99e4ae17 10431 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 10432 | EF_ARM_MAPSYMSFIRST);
10433 break;
10434
d507cf36
PB		 10435 case EF_ARM_EABI_VER3:
10436 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 10437 break;
10438
10439 case EF_ARM_EABI_VER4:
10440 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 10441 goto eabi;
d507cf36 10442
3a4a14e9
PB		 10443 case EF_ARM_EABI_VER5:
10444 fprintf (file, _(" [Version5 EABI]"));
10445 eabi:
d507cf36
PB		 10446 if (flags & EF_ARM_BE8)
10447 fprintf (file, _(" [BE8]"));
10448
10449 if (flags & EF_ARM_LE8)
10450 fprintf (file, _(" [LE8]"));
10451
10452 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
10453 break;
10454
fc830a83 10455 default:
9b485d32 10456 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 10457 break;
10458 }
252b5132 10459
fc830a83 10460 flags &= ~ EF_ARM_EABIMASK;
252b5132 10461
fc830a83 10462 if (flags & EF_ARM_RELEXEC)
9b485d32 10463 fprintf (file, _(" [relocatable executable]"));
252b5132 10464
fc830a83 10465 if (flags & EF_ARM_HASENTRY)
9b485d32 10466 fprintf (file, _(" [has entry point]"));
252b5132 10467
fc830a83
NC		 10468 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
10469
10470 if (flags)
9b485d32 10471 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 10472
252b5132
RH		 10473 fputc ('\n', file);
10474
b34976b6 10475 return TRUE;
252b5132
RH		 10476}
10477
10478static int
57e8b36a 10479elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 10480{
2f0ca46a
NC		 10481 switch (ELF_ST_TYPE (elf_sym->st_info))
10482 {
10483 case STT_ARM_TFUNC:
10484 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 10485
2f0ca46a
NC		 10486 case STT_ARM_16BIT:
10487 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
10488 This allows us to distinguish between data used by Thumb instructions
10489 and non-data (which is probably code) inside Thumb regions of an
10490 executable. */
1a0eb693 10491 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 10492 return ELF_ST_TYPE (elf_sym->st_info);
10493 break;
9a5aca8c 10494
ce855c42
NC		 10495 default:
10496 break;
2f0ca46a
NC		 10497 }
10498
10499 return type;
252b5132 10500}
f21f3fe0 10501
252b5132 10502static asection *
07adf181
AM		 10503elf32_arm_gc_mark_hook (asection *sec,
10504 struct bfd_link_info *info,
10505 Elf_Internal_Rela *rel,
10506 struct elf_link_hash_entry *h,
10507 Elf_Internal_Sym *sym)
252b5132
RH		 10508{
10509 if (h != NULL)
07adf181 10510 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 10511 {
10512 case R_ARM_GNU_VTINHERIT:
10513 case R_ARM_GNU_VTENTRY:
07adf181
AM		 10514 return NULL;
10515 }
9ad5cbcf 10516
07adf181 10517 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 10518}
10519
780a67af
NC		 10520/* Update the got entry reference counts for the section being removed. */
10521
b34976b6 10522static bfd_boolean
ba93b8ac
DJ		 10523elf32_arm_gc_sweep_hook (bfd * abfd,
10524 struct bfd_link_info * info,
10525 asection * sec,
10526 const Elf_Internal_Rela * relocs)
252b5132 10527{
5e681ec4
PB		 10528 Elf_Internal_Shdr *symtab_hdr;
10529 struct elf_link_hash_entry **sym_hashes;
10530 bfd_signed_vma *local_got_refcounts;
10531 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 10532 struct elf32_arm_link_hash_table * globals;
10533
7dda2462
TG		 10534 if (info->relocatable)
10535 return TRUE;
10536
eb043451 10537 globals = elf32_arm_hash_table (info);
5e681ec4
PB		 10538
10539 elf_section_data (sec)->local_dynrel = NULL;
10540
0ffa91dd 10541 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 10542 sym_hashes = elf_sym_hashes (abfd);
10543 local_got_refcounts = elf_local_got_refcounts (abfd);
10544
906e58ca 10545 check_use_blx (globals);
bd97cb95 10546
5e681ec4
PB		 10547 relend = relocs + sec->reloc_count;
10548 for (rel = relocs; rel < relend; rel++)
eb043451 10549 {
3eb128b2
AM		 10550 unsigned long r_symndx;
10551 struct elf_link_hash_entry *h = NULL;
eb043451 10552 int r_type;
5e681ec4 10553
3eb128b2
AM		 10554 r_symndx = ELF32_R_SYM (rel->r_info);
10555 if (r_symndx >= symtab_hdr->sh_info)
10556 {
10557 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
10558 while (h->root.type == bfd_link_hash_indirect
10559 || h->root.type == bfd_link_hash_warning)
10560 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10561 }
10562
eb043451 10563 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 10564 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 10565 switch (r_type)
10566 {
10567 case R_ARM_GOT32:
eb043451 10568 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 10569 case R_ARM_TLS_GD32:
10570 case R_ARM_TLS_IE32:
3eb128b2 10571 if (h != NULL)
eb043451 10572 {
eb043451
PB		 10573 if (h->got.refcount > 0)
10574 h->got.refcount -= 1;
10575 }
10576 else if (local_got_refcounts != NULL)
10577 {
10578 if (local_got_refcounts[r_symndx] > 0)
10579 local_got_refcounts[r_symndx] -= 1;
10580 }
10581 break;
10582
ba93b8ac
DJ		 10583 case R_ARM_TLS_LDM32:
10584 elf32_arm_hash_table (info)->tls_ldm_got.refcount -= 1;
10585 break;
10586
eb043451 10587 case R_ARM_ABS32:
bb224fc3 10588 case R_ARM_ABS32_NOI:
eb043451 10589 case R_ARM_REL32:
bb224fc3 10590 case R_ARM_REL32_NOI:
eb043451
PB		 10591 case R_ARM_PC24:
10592 case R_ARM_PLT32:
5b5bb741
PB		 10593 case R_ARM_CALL:
10594 case R_ARM_JUMP24:
eb043451 10595 case R_ARM_PREL31:
c19d1205 10596 case R_ARM_THM_CALL:
bd97cb95
DJ		 10597 case R_ARM_THM_JUMP24:
10598 case R_ARM_THM_JUMP19:
b6895b4f
PB		 10599 case R_ARM_MOVW_ABS_NC:
10600 case R_ARM_MOVT_ABS:
10601 case R_ARM_MOVW_PREL_NC:
10602 case R_ARM_MOVT_PREL:
10603 case R_ARM_THM_MOVW_ABS_NC:
10604 case R_ARM_THM_MOVT_ABS:
10605 case R_ARM_THM_MOVW_PREL_NC:
10606 case R_ARM_THM_MOVT_PREL:
b7693d02
DJ		 10607 /* Should the interworking branches be here also? */
10608
3eb128b2 10609 if (h != NULL)
eb043451
PB		 10610 {
10611 struct elf32_arm_link_hash_entry *eh;
10612 struct elf32_arm_relocs_copied **pp;
10613 struct elf32_arm_relocs_copied *p;
5e681ec4 10614
b7693d02 10615 eh = (struct elf32_arm_link_hash_entry *) h;
5e681ec4 10616
eb043451 10617 if (h->plt.refcount > 0)
b7693d02
DJ		 10618 {
10619 h->plt.refcount -= 1;
bd97cb95
DJ		 10620 if (r_type == R_ARM_THM_CALL)
10621 eh->plt_maybe_thumb_refcount--;
10622
10623 if (r_type == R_ARM_THM_JUMP24
10624 || r_type == R_ARM_THM_JUMP19)
b7693d02
DJ		 10625 eh->plt_thumb_refcount--;
10626 }
5e681ec4 10627
eb043451 10628 if (r_type == R_ARM_ABS32
bb224fc3
MS		 10629 || r_type == R_ARM_REL32
10630 || r_type == R_ARM_ABS32_NOI
10631 || r_type == R_ARM_REL32_NOI)
eb043451 10632 {
eb043451
PB		 10633 for (pp = &eh->relocs_copied; (p = *pp) != NULL;
10634 pp = &p->next)
10635 if (p->section == sec)
10636 {
10637 p->count -= 1;
bb224fc3
MS		 10638 if (ELF32_R_TYPE (rel->r_info) == R_ARM_REL32
10639 || ELF32_R_TYPE (rel->r_info) == R_ARM_REL32_NOI)
ba93b8ac 10640 p->pc_count -= 1;
eb043451
PB		 10641 if (p->count == 0)
10642 *pp = p->next;
10643 break;
10644 }
10645 }
10646 }
10647 break;
5e681ec4 10648
eb043451
PB		 10649 default:
10650 break;
10651 }
10652 }
5e681ec4 10653
b34976b6 10654 return TRUE;
252b5132
RH		 10655}
10656
780a67af
NC		 10657/* Look through the relocs for a section during the first phase. */
10658
b34976b6 10659static bfd_boolean
57e8b36a
NC		 10660elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
10661 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 10662{
b34976b6
AM		 10663 Elf_Internal_Shdr *symtab_hdr;
10664 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 10665 const Elf_Internal_Rela *rel;
10666 const Elf_Internal_Rela *rel_end;
10667 bfd *dynobj;
5e681ec4 10668 asection *sreloc;
b34976b6 10669 bfd_vma *local_got_offsets;
5e681ec4 10670 struct elf32_arm_link_hash_table *htab;
39623e12 10671 bfd_boolean needs_plt;
ce98a316 10672 unsigned long nsyms;
9a5aca8c 10673
1049f94e 10674 if (info->relocatable)
b34976b6 10675 return TRUE;
9a5aca8c 10676
0ffa91dd
NC		 10677 BFD_ASSERT (is_arm_elf (abfd));
10678
5e681ec4
PB		 10679 htab = elf32_arm_hash_table (info);
10680 sreloc = NULL;
9a5aca8c 10681
67687978
PB		 10682 /* Create dynamic sections for relocatable executables so that we can
10683 copy relocations. */
10684 if (htab->root.is_relocatable_executable
10685 && ! htab->root.dynamic_sections_created)
10686 {
10687 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
10688 return FALSE;
10689 }
10690
252b5132
RH		 10691 dynobj = elf_hash_table (info)->dynobj;
10692 local_got_offsets = elf_local_got_offsets (abfd);
f21f3fe0 10693
0ffa91dd 10694 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 10695 sym_hashes = elf_sym_hashes (abfd);
ce98a316
NC		 10696 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
10697
252b5132
RH		 10698 rel_end = relocs + sec->reloc_count;
10699 for (rel = relocs; rel < rel_end; rel++)
10700 {
10701 struct elf_link_hash_entry *h;
b7693d02 10702 struct elf32_arm_link_hash_entry *eh;
252b5132 10703 unsigned long r_symndx;
eb043451 10704 int r_type;
9a5aca8c 10705
252b5132 10706 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 10707 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 10708 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac 10709
ce98a316
NC		 10710 if (r_symndx >= nsyms
10711 /* PR 9934: It is possible to have relocations that do not
10712 refer to symbols, thus it is also possible to have an
10713 object file containing relocations but no symbol table. */
10714 && (r_symndx > 0 || nsyms > 0))
ba93b8ac
DJ		 10715 {
10716 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
ce98a316 10717 r_symndx);
ba93b8ac
DJ		 10718 return FALSE;
10719 }
10720
ce98a316 10721 if (nsyms == 0 || r_symndx < symtab_hdr->sh_info)
252b5132
RH		 10722 h = NULL;
10723 else
973a3492
L		 10724 {
10725 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
10726 while (h->root.type == bfd_link_hash_indirect
10727 || h->root.type == bfd_link_hash_warning)
10728 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10729 }
9a5aca8c 10730
b7693d02
DJ		 10731 eh = (struct elf32_arm_link_hash_entry *) h;
10732
eb043451 10733 switch (r_type)
252b5132 10734 {
5e681ec4 10735 case R_ARM_GOT32:
eb043451 10736 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 10737 case R_ARM_TLS_GD32:
10738 case R_ARM_TLS_IE32:
5e681ec4 10739 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 10740 {
10741 int tls_type, old_tls_type;
5e681ec4 10742
ba93b8ac
DJ		 10743 switch (r_type)
10744 {
10745 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
10746 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
10747 default: tls_type = GOT_NORMAL; break;
10748 }
252b5132 10749
ba93b8ac
DJ		 10750 if (h != NULL)
10751 {
10752 h->got.refcount++;
10753 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
10754 }
10755 else
10756 {
10757 bfd_signed_vma *local_got_refcounts;
10758
10759 /* This is a global offset table entry for a local symbol. */
10760 local_got_refcounts = elf_local_got_refcounts (abfd);
10761 if (local_got_refcounts == NULL)
10762 {
10763 bfd_size_type size;
906e58ca 10764
ba93b8ac 10765 size = symtab_hdr->sh_info;
906e58ca 10766 size *= (sizeof (bfd_signed_vma) + sizeof (char));
ba93b8ac
DJ		 10767 local_got_refcounts = bfd_zalloc (abfd, size);
10768 if (local_got_refcounts == NULL)
10769 return FALSE;
10770 elf_local_got_refcounts (abfd) = local_got_refcounts;
10771 elf32_arm_local_got_tls_type (abfd)
10772 = (char *) (local_got_refcounts + symtab_hdr->sh_info);
10773 }
10774 local_got_refcounts[r_symndx] += 1;
10775 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
10776 }
10777
10778 /* We will already have issued an error message if there is a
10779 TLS / non-TLS mismatch, based on the symbol type. We don't
10780 support any linker relaxations. So just combine any TLS
10781 types needed. */
10782 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
10783 && tls_type != GOT_NORMAL)
10784 tls_type |= old_tls_type;
10785
10786 if (old_tls_type != tls_type)
10787 {
10788 if (h != NULL)
10789 elf32_arm_hash_entry (h)->tls_type = tls_type;
10790 else
10791 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
10792 }
10793 }
8029a119 10794 /* Fall through. */
ba93b8ac
DJ		 10795
10796 case R_ARM_TLS_LDM32:
10797 if (r_type == R_ARM_TLS_LDM32)
10798 htab->tls_ldm_got.refcount++;
8029a119 10799 /* Fall through. */
252b5132 10800
c19d1205 10801 case R_ARM_GOTOFF32:
5e681ec4
PB		 10802 case R_ARM_GOTPC:
10803 if (htab->sgot == NULL)
10804 {
10805 if (htab->root.dynobj == NULL)
10806 htab->root.dynobj = abfd;
10807 if (!create_got_section (htab->root.dynobj, info))
10808 return FALSE;
10809 }
252b5132
RH		 10810 break;
10811
00a97672
RS		 10812 case R_ARM_ABS12:
10813 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
10814 ldr __GOTT_INDEX__ offsets. */
10815 if (!htab->vxworks_p)
10816 break;
8029a119 10817 /* Fall through. */
00a97672 10818
252b5132 10819 case R_ARM_PC24:
7359ea65 10820 case R_ARM_PLT32:
5b5bb741
PB		 10821 case R_ARM_CALL:
10822 case R_ARM_JUMP24:
eb043451 10823 case R_ARM_PREL31:
c19d1205 10824 case R_ARM_THM_CALL:
bd97cb95
DJ		 10825 case R_ARM_THM_JUMP24:
10826 case R_ARM_THM_JUMP19:
39623e12
PB		 10827 needs_plt = 1;
10828 goto normal_reloc;
10829
96c23d59
JM		 10830 case R_ARM_MOVW_ABS_NC:
10831 case R_ARM_MOVT_ABS:
10832 case R_ARM_THM_MOVW_ABS_NC:
10833 case R_ARM_THM_MOVT_ABS:
10834 if (info->shared)
10835 {
10836 (*_bfd_error_handler)
10837 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
10838 abfd, elf32_arm_howto_table_1[r_type].name,
10839 (h) ? h->root.root.string : "a local symbol");
10840 bfd_set_error (bfd_error_bad_value);
10841 return FALSE;
10842 }
10843
10844 /* Fall through. */
39623e12
PB		 10845 case R_ARM_ABS32:
10846 case R_ARM_ABS32_NOI:
10847 case R_ARM_REL32:
10848 case R_ARM_REL32_NOI:
b6895b4f
PB		 10849 case R_ARM_MOVW_PREL_NC:
10850 case R_ARM_MOVT_PREL:
b6895b4f
PB		 10851 case R_ARM_THM_MOVW_PREL_NC:
10852 case R_ARM_THM_MOVT_PREL:
39623e12
PB		 10853 needs_plt = 0;
10854 normal_reloc:
10855
b7693d02 10856 /* Should the interworking branches be listed here? */
7359ea65 10857 if (h != NULL)
5e681ec4
PB		 10858 {
10859 /* If this reloc is in a read-only section, we might
10860 need a copy reloc. We can't check reliably at this
10861 stage whether the section is read-only, as input
10862 sections have not yet been mapped to output sections.
10863 Tentatively set the flag for now, and correct in
10864 adjust_dynamic_symbol. */
7359ea65 10865 if (!info->shared)
f5385ebf 10866 h->non_got_ref = 1;
7359ea65 10867
5e681ec4 10868 /* We may need a .plt entry if the function this reloc
c84cd8ee
DJ		 10869 refers to is in a different object. We can't tell for
10870 sure yet, because something later might force the
10871 symbol local. */
39623e12 10872 if (needs_plt)
f5385ebf 10873 h->needs_plt = 1;
4f199be3
DJ		 10874
10875 /* If we create a PLT entry, this relocation will reference
10876 it, even if it's an ABS32 relocation. */
10877 h->plt.refcount += 1;
b7693d02 10878
bd97cb95
DJ		 10879 /* It's too early to use htab->use_blx here, so we have to
10880 record possible blx references separately from
10881 relocs that definitely need a thumb stub. */
10882
c19d1205 10883 if (r_type == R_ARM_THM_CALL)
bd97cb95
DJ		 10884 eh->plt_maybe_thumb_refcount += 1;
10885
10886 if (r_type == R_ARM_THM_JUMP24
10887 || r_type == R_ARM_THM_JUMP19)
b7693d02 10888 eh->plt_thumb_refcount += 1;
5e681ec4
PB		 10889 }
10890
67687978
PB		 10891 /* If we are creating a shared library or relocatable executable,
10892 and this is a reloc against a global symbol, or a non PC
10893 relative reloc against a local symbol, then we need to copy
10894 the reloc into the shared library. However, if we are linking
10895 with -Bsymbolic, we do not need to copy a reloc against a
252b5132
RH		 10896 global symbol which is defined in an object we are
10897 including in the link (i.e., DEF_REGULAR is set). At
10898 this point we have not seen all the input files, so it is
10899 possible that DEF_REGULAR is not set now but will be set
10900 later (it is never cleared). We account for that
10901 possibility below by storing information in the
5e681ec4 10902 relocs_copied field of the hash table entry. */
67687978 10903 if ((info->shared || htab->root.is_relocatable_executable)
5e681ec4 10904 && (sec->flags & SEC_ALLOC) != 0
bb224fc3 10905 && ((r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI)
71a976dd
DJ		 10906 || (h != NULL && ! h->needs_plt
10907 && (! info->symbolic || ! h->def_regular))))
252b5132 10908 {
5e681ec4
PB		 10909 struct elf32_arm_relocs_copied *p, **head;
10910
252b5132
RH		 10911 /* When creating a shared object, we must copy these
10912 reloc types into the output file. We create a reloc
10913 section in dynobj and make room for this reloc. */
83bac4b0 10914 if (sreloc == NULL)
252b5132 10915 {
83bac4b0
NC		 10916 sreloc = _bfd_elf_make_dynamic_reloc_section
10917 (sec, dynobj, 2, abfd, ! htab->use_rel);
252b5132 10918
83bac4b0 10919 if (sreloc == NULL)
b34976b6 10920 return FALSE;
252b5132 10921
83bac4b0 10922 /* BPABI objects never have dynamic relocations mapped. */
a89e6478 10923 if (htab->symbian_p)
252b5132 10924 {
83bac4b0 10925 flagword flags;
5e681ec4 10926
83bac4b0 10927 flags = bfd_get_section_flags (dynobj, sreloc);
a89e6478 10928 flags &= ~(SEC_LOAD | SEC_ALLOC);
83bac4b0
NC		 10929 bfd_set_section_flags (dynobj, sreloc, flags);
10930 }
252b5132
RH		 10931 }
10932
5e681ec4
PB		 10933 /* If this is a global symbol, we count the number of
10934 relocations we need for this symbol. */
10935 if (h != NULL)
252b5132 10936 {
5e681ec4
PB		 10937 head = &((struct elf32_arm_link_hash_entry *) h)->relocs_copied;
10938 }
10939 else
10940 {
10941 /* Track dynamic relocs needed for local syms too.
10942 We really need local syms available to do this
10943 easily. Oh well. */
5e681ec4 10944 asection *s;
6edfbbad 10945 void *vpp;
87d72d41 10946 Elf_Internal_Sym *isym;
6edfbbad 10947
87d72d41
AM		 10948 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
10949 abfd, r_symndx);
10950 if (isym == NULL)
5e681ec4 10951 return FALSE;
57e8b36a 10952
87d72d41
AM		 10953 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
10954 if (s == NULL)
10955 s = sec;
10956
6edfbbad
DJ		 10957 vpp = &elf_section_data (s)->local_dynrel;
10958 head = (struct elf32_arm_relocs_copied **) vpp;
5e681ec4 10959 }
57e8b36a 10960
5e681ec4
PB		 10961 p = *head;
10962 if (p == NULL || p->section != sec)
10963 {
10964 bfd_size_type amt = sizeof *p;
57e8b36a 10965
5e681ec4 10966 p = bfd_alloc (htab->root.dynobj, amt);
252b5132 10967 if (p == NULL)
5e681ec4
PB		 10968 return FALSE;
10969 p->next = *head;
10970 *head = p;
10971 p->section = sec;
10972 p->count = 0;
ba93b8ac 10973 p->pc_count = 0;
252b5132 10974 }
57e8b36a 10975
bb224fc3 10976 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
ba93b8ac 10977 p->pc_count += 1;
71a976dd 10978 p->count += 1;
252b5132
RH		 10979 }
10980 break;
10981
10982 /* This relocation describes the C++ object vtable hierarchy.
10983 Reconstruct it for later use during GC. */
10984 case R_ARM_GNU_VTINHERIT:
c152c796 10985 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 10986 return FALSE;
252b5132 10987 break;
9a5aca8c 10988
252b5132
RH		 10989 /* This relocation describes which C++ vtable entries are actually
10990 used. Record for later use during GC. */
10991 case R_ARM_GNU_VTENTRY:
d17e0c6e
JB		 10992 BFD_ASSERT (h != NULL);
10993 if (h != NULL
10994 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
b34976b6 10995 return FALSE;
252b5132
RH		 10996 break;
10997 }
10998 }
f21f3fe0 10999
b34976b6 11000 return TRUE;
252b5132
RH		 11001}
11002
6a5bb875
PB		 11003/* Unwinding tables are not referenced directly. This pass marks them as
11004 required if the corresponding code section is marked. */
11005
11006static bfd_boolean
906e58ca
NC		 11007elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
11008 elf_gc_mark_hook_fn gc_mark_hook)
6a5bb875
PB		 11009{
11010 bfd *sub;
11011 Elf_Internal_Shdr **elf_shdrp;
11012 bfd_boolean again;
11013
11014 /* Marking EH data may cause additional code sections to be marked,
11015 requiring multiple passes. */
11016 again = TRUE;
11017 while (again)
11018 {
11019 again = FALSE;
11020 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
11021 {
11022 asection *o;
11023
0ffa91dd 11024 if (! is_arm_elf (sub))
6a5bb875
PB		 11025 continue;
11026
11027 elf_shdrp = elf_elfsections (sub);
11028 for (o = sub->sections; o != NULL; o = o->next)
11029 {
11030 Elf_Internal_Shdr *hdr;
0ffa91dd 11031
6a5bb875 11032 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 11033 if (hdr->sh_type == SHT_ARM_EXIDX
11034 && hdr->sh_link
11035 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 11036 && !o->gc_mark
11037 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
11038 {
11039 again = TRUE;
11040 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
11041 return FALSE;
11042 }
11043 }
11044 }
11045 }
11046
11047 return TRUE;
11048}
11049
3c9458e9
NC		 11050/* Treat mapping symbols as special target symbols. */
11051
11052static bfd_boolean
11053elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
11054{
b0796911
PB		 11055 return bfd_is_arm_special_symbol_name (sym->name,
11056 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 11057}
11058
0367ecfb
NC		 11059/* This is a copy of elf_find_function() from elf.c except that
11060 ARM mapping symbols are ignored when looking for function names
11061 and STT_ARM_TFUNC is considered to a function type. */
252b5132 11062
0367ecfb
NC		 11063static bfd_boolean
11064arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
11065 asection * section,
11066 asymbol ** symbols,
11067 bfd_vma offset,
11068 const char ** filename_ptr,
11069 const char ** functionname_ptr)
11070{
11071 const char * filename = NULL;
11072 asymbol * func = NULL;
11073 bfd_vma low_func = 0;
11074 asymbol ** p;
252b5132
RH		 11075
11076 for (p = symbols; *p != NULL; p++)
11077 {
11078 elf_symbol_type *q;
11079
11080 q = (elf_symbol_type *) *p;
11081
252b5132
RH		 11082 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
11083 {
11084 default:
11085 break;
11086 case STT_FILE:
11087 filename = bfd_asymbol_name (&q->symbol);
11088 break;
252b5132
RH		 11089 case STT_FUNC:
11090 case STT_ARM_TFUNC:
9d2da7ca 11091 case STT_NOTYPE:
b0796911 11092 /* Skip mapping symbols. */
0367ecfb 11093 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 11094 && bfd_is_arm_special_symbol_name (q->symbol.name,
11095 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 11096 continue;
11097 /* Fall through. */
6b40fcba 11098 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 11099 && q->symbol.value >= low_func
11100 && q->symbol.value <= offset)
11101 {
11102 func = (asymbol *) q;
11103 low_func = q->symbol.value;
11104 }
11105 break;
11106 }
11107 }
11108
11109 if (func == NULL)
b34976b6 11110 return FALSE;
252b5132 11111
0367ecfb
NC		 11112 if (filename_ptr)
11113 *filename_ptr = filename;
11114 if (functionname_ptr)
11115 *functionname_ptr = bfd_asymbol_name (func);
11116
11117 return TRUE;
906e58ca 11118}
0367ecfb
NC		 11119
11120
11121/* Find the nearest line to a particular section and offset, for error
11122 reporting. This code is a duplicate of the code in elf.c, except
11123 that it uses arm_elf_find_function. */
11124
11125static bfd_boolean
11126elf32_arm_find_nearest_line (bfd * abfd,
11127 asection * section,
11128 asymbol ** symbols,
11129 bfd_vma offset,
11130 const char ** filename_ptr,
11131 const char ** functionname_ptr,
11132 unsigned int * line_ptr)
11133{
11134 bfd_boolean found = FALSE;
11135
11136 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
11137
11138 if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset,
11139 filename_ptr, functionname_ptr,
11140 line_ptr, 0,
11141 & elf_tdata (abfd)->dwarf2_find_line_info))
11142 {
11143 if (!*functionname_ptr)
11144 arm_elf_find_function (abfd, section, symbols, offset,
11145 *filename_ptr ? NULL : filename_ptr,
11146 functionname_ptr);
f21f3fe0 11147
0367ecfb
NC		 11148 return TRUE;
11149 }
11150
11151 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
11152 & found, filename_ptr,
11153 functionname_ptr, line_ptr,
11154 & elf_tdata (abfd)->line_info))
11155 return FALSE;
11156
11157 if (found && (*functionname_ptr || *line_ptr))
11158 return TRUE;
11159
11160 if (symbols == NULL)
11161 return FALSE;
11162
11163 if (! arm_elf_find_function (abfd, section, symbols, offset,
11164 filename_ptr, functionname_ptr))
11165 return FALSE;
11166
11167 *line_ptr = 0;
b34976b6 11168 return TRUE;
252b5132
RH		 11169}
11170
4ab527b0
FF		 11171static bfd_boolean
11172elf32_arm_find_inliner_info (bfd * abfd,
11173 const char ** filename_ptr,
11174 const char ** functionname_ptr,
11175 unsigned int * line_ptr)
11176{
11177 bfd_boolean found;
11178 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
11179 functionname_ptr, line_ptr,
11180 & elf_tdata (abfd)->dwarf2_find_line_info);
11181 return found;
11182}
11183
252b5132
RH		 11184/* Adjust a symbol defined by a dynamic object and referenced by a
11185 regular object. The current definition is in some section of the
11186 dynamic object, but we're not including those sections. We have to
11187 change the definition to something the rest of the link can
11188 understand. */
11189
b34976b6 11190static bfd_boolean
57e8b36a
NC		 11191elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
11192 struct elf_link_hash_entry * h)
252b5132
RH		 11193{
11194 bfd * dynobj;
11195 asection * s;
b7693d02 11196 struct elf32_arm_link_hash_entry * eh;
67687978 11197 struct elf32_arm_link_hash_table *globals;
252b5132 11198
67687978 11199 globals = elf32_arm_hash_table (info);
252b5132
RH		 11200 dynobj = elf_hash_table (info)->dynobj;
11201
11202 /* Make sure we know what is going on here. */
11203 BFD_ASSERT (dynobj != NULL
f5385ebf 11204 && (h->needs_plt
f6e332e6 11205 || h->u.weakdef != NULL
f5385ebf
AM		 11206 || (h->def_dynamic
11207 && h->ref_regular
11208 && !h->def_regular)));
252b5132 11209
b7693d02
DJ		 11210 eh = (struct elf32_arm_link_hash_entry *) h;
11211
252b5132
RH		 11212 /* If this is a function, put it in the procedure linkage table. We
11213 will fill in the contents of the procedure linkage table later,
11214 when we know the address of the .got section. */
0f88be7a 11215 if (h->type == STT_FUNC || h->type == STT_ARM_TFUNC
f5385ebf 11216 || h->needs_plt)
252b5132 11217 {
5e681ec4
PB		 11218 if (h->plt.refcount <= 0
11219 || SYMBOL_CALLS_LOCAL (info, h)
11220 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
11221 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 11222 {
11223 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 11224 file, but the symbol was never referred to by a dynamic
11225 object, or if all references were garbage collected. In
11226 such a case, we don't actually need to build a procedure
11227 linkage table, and we can just do a PC24 reloc instead. */
11228 h->plt.offset = (bfd_vma) -1;
b7693d02 11229 eh->plt_thumb_refcount = 0;
bd97cb95 11230 eh->plt_maybe_thumb_refcount = 0;
f5385ebf 11231 h->needs_plt = 0;
252b5132
RH		 11232 }
11233
b34976b6 11234 return TRUE;
252b5132 11235 }
5e681ec4 11236 else
b7693d02
DJ		 11237 {
11238 /* It's possible that we incorrectly decided a .plt reloc was
11239 needed for an R_ARM_PC24 or similar reloc to a non-function sym
11240 in check_relocs. We can't decide accurately between function
11241 and non-function syms in check-relocs; Objects loaded later in
11242 the link may change h->type. So fix it now. */
11243 h->plt.offset = (bfd_vma) -1;
11244 eh->plt_thumb_refcount = 0;
bd97cb95 11245 eh->plt_maybe_thumb_refcount = 0;
b7693d02 11246 }
252b5132
RH		 11247
11248 /* If this is a weak symbol, and there is a real definition, the
11249 processor independent code will have arranged for us to see the
11250 real definition first, and we can just use the same value. */
f6e332e6 11251 if (h->u.weakdef != NULL)
252b5132 11252 {
f6e332e6
AM		 11253 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
11254 || h->u.weakdef->root.type == bfd_link_hash_defweak);
11255 h->root.u.def.section = h->u.weakdef->root.u.def.section;
11256 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 11257 return TRUE;
252b5132
RH		 11258 }
11259
ba93b8ac
DJ		 11260 /* If there are no non-GOT references, we do not need a copy
11261 relocation. */
11262 if (!h->non_got_ref)
11263 return TRUE;
11264
252b5132
RH		 11265 /* This is a reference to a symbol defined by a dynamic object which
11266 is not a function. */
11267
11268 /* If we are creating a shared library, we must presume that the
11269 only references to the symbol are via the global offset table.
11270 For such cases we need not do anything here; the relocations will
67687978
PB		 11271 be handled correctly by relocate_section. Relocatable executables
11272 can reference data in shared objects directly, so we don't need to
11273 do anything here. */
11274 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 11275 return TRUE;
252b5132 11276
909272ee
AM		 11277 if (h->size == 0)
11278 {
11279 (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
11280 h->root.root.string);
11281 return TRUE;
11282 }
11283
252b5132
RH		 11284 /* We must allocate the symbol in our .dynbss section, which will
11285 become part of the .bss section of the executable. There will be
11286 an entry for this symbol in the .dynsym section. The dynamic
11287 object will contain position independent code, so all references
11288 from the dynamic object to this symbol will go through the global
11289 offset table. The dynamic linker will use the .dynsym entry to
11290 determine the address it must put in the global offset table, so
11291 both the dynamic object and the regular object will refer to the
11292 same memory location for the variable. */
252b5132
RH		 11293 s = bfd_get_section_by_name (dynobj, ".dynbss");
11294 BFD_ASSERT (s != NULL);
11295
11296 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
11297 copy the initial value out of the dynamic object and into the
11298 runtime process image. We need to remember the offset into the
00a97672 11299 .rel(a).bss section we are going to use. */
252b5132
RH		 11300 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
11301 {
11302 asection *srel;
11303
00a97672 11304 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
252b5132 11305 BFD_ASSERT (srel != NULL);
00a97672 11306 srel->size += RELOC_SIZE (globals);
f5385ebf 11307 h->needs_copy = 1;
252b5132
RH		 11308 }
11309
027297b7 11310 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 11311}
11312
5e681ec4
PB		 11313/* Allocate space in .plt, .got and associated reloc sections for
11314 dynamic relocs. */
11315
11316static bfd_boolean
57e8b36a 11317allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 11318{
11319 struct bfd_link_info *info;
11320 struct elf32_arm_link_hash_table *htab;
11321 struct elf32_arm_link_hash_entry *eh;
11322 struct elf32_arm_relocs_copied *p;
bd97cb95 11323 bfd_signed_vma thumb_refs;
5e681ec4 11324
b7693d02
DJ		 11325 eh = (struct elf32_arm_link_hash_entry *) h;
11326
5e681ec4
PB		 11327 if (h->root.type == bfd_link_hash_indirect)
11328 return TRUE;
11329
11330 if (h->root.type == bfd_link_hash_warning)
11331 /* When warning symbols are created, they **replace** the "real"
11332 entry in the hash table, thus we never get to see the real
11333 symbol in a hash traversal. So look at it now. */
11334 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11335
11336 info = (struct bfd_link_info *) inf;
11337 htab = elf32_arm_hash_table (info);
11338
11339 if (htab->root.dynamic_sections_created
11340 && h->plt.refcount > 0)
11341 {
11342 /* Make sure this symbol is output as a dynamic symbol.
11343 Undefined weak syms won't yet be marked as dynamic. */
11344 if (h->dynindx == -1
f5385ebf 11345 && !h->forced_local)
5e681ec4 11346 {
c152c796 11347 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11348 return FALSE;
11349 }
11350
11351 if (info->shared
7359ea65 11352 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4
PB		 11353 {
11354 asection *s = htab->splt;
11355
11356 /* If this is the first .plt entry, make room for the special
11357 first entry. */
eea6121a 11358 if (s->size == 0)
e5a52504 11359 s->size += htab->plt_header_size;
5e681ec4 11360
eea6121a 11361 h->plt.offset = s->size;
5e681ec4 11362
b7693d02
DJ		 11363 /* If we will insert a Thumb trampoline before this PLT, leave room
11364 for it. */
bd97cb95
DJ		 11365 thumb_refs = eh->plt_thumb_refcount;
11366 if (!htab->use_blx)
11367 thumb_refs += eh->plt_maybe_thumb_refcount;
11368
11369 if (thumb_refs > 0)
b7693d02
DJ		 11370 {
11371 h->plt.offset += PLT_THUMB_STUB_SIZE;
11372 s->size += PLT_THUMB_STUB_SIZE;
11373 }
11374
5e681ec4
PB		 11375 /* If this symbol is not defined in a regular file, and we are
11376 not generating a shared library, then set the symbol to this
11377 location in the .plt. This is required to make function
11378 pointers compare as equal between the normal executable and
11379 the shared library. */
11380 if (! info->shared
f5385ebf 11381 && !h->def_regular)
5e681ec4
PB		 11382 {
11383 h->root.u.def.section = s;
11384 h->root.u.def.value = h->plt.offset;
11385 }
11386
022f8312
CL		 11387 /* Make sure the function is not marked as Thumb, in case
11388 it is the target of an ABS32 relocation, which will
11389 point to the PLT entry. */
11390 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
11391 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
11392
5e681ec4 11393 /* Make room for this entry. */
e5a52504 11394 s->size += htab->plt_entry_size;
5e681ec4 11395
e5a52504 11396 if (!htab->symbian_p)
b7693d02
DJ		 11397 {
11398 /* We also need to make an entry in the .got.plt section, which
11399 will be placed in the .got section by the linker script. */
11400 eh->plt_got_offset = htab->sgotplt->size;
11401 htab->sgotplt->size += 4;
11402 }
5e681ec4 11403
00a97672
RS		 11404 /* We also need to make an entry in the .rel(a).plt section. */
11405 htab->srelplt->size += RELOC_SIZE (htab);
11406
11407 /* VxWorks executables have a second set of relocations for
11408 each PLT entry. They go in a separate relocation section,
11409 which is processed by the kernel loader. */
11410 if (htab->vxworks_p && !info->shared)
11411 {
11412 /* There is a relocation for the initial PLT entry:
11413 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
11414 if (h->plt.offset == htab->plt_header_size)
11415 htab->srelplt2->size += RELOC_SIZE (htab);
11416
11417 /* There are two extra relocations for each subsequent
11418 PLT entry: an R_ARM_32 relocation for the GOT entry,
11419 and an R_ARM_32 relocation for the PLT entry. */
11420 htab->srelplt2->size += RELOC_SIZE (htab) * 2;
11421 }
5e681ec4
PB		 11422 }
11423 else
11424 {
11425 h->plt.offset = (bfd_vma) -1;
f5385ebf 11426 h->needs_plt = 0;
5e681ec4
PB		 11427 }
11428 }
11429 else
11430 {
11431 h->plt.offset = (bfd_vma) -1;
f5385ebf 11432 h->needs_plt = 0;
5e681ec4
PB		 11433 }
11434
11435 if (h->got.refcount > 0)
11436 {
11437 asection *s;
11438 bfd_boolean dyn;
ba93b8ac
DJ		 11439 int tls_type = elf32_arm_hash_entry (h)->tls_type;
11440 int indx;
5e681ec4
PB		 11441
11442 /* Make sure this symbol is output as a dynamic symbol.
11443 Undefined weak syms won't yet be marked as dynamic. */
11444 if (h->dynindx == -1
f5385ebf 11445 && !h->forced_local)
5e681ec4 11446 {
c152c796 11447 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11448 return FALSE;
11449 }
11450
e5a52504
MM		 11451 if (!htab->symbian_p)
11452 {
11453 s = htab->sgot;
11454 h->got.offset = s->size;
ba93b8ac
DJ		 11455
11456 if (tls_type == GOT_UNKNOWN)
11457 abort ();
11458
11459 if (tls_type == GOT_NORMAL)
11460 /* Non-TLS symbols need one GOT slot. */
11461 s->size += 4;
11462 else
11463 {
11464 if (tls_type & GOT_TLS_GD)
11465 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. */
11466 s->size += 8;
11467 if (tls_type & GOT_TLS_IE)
11468 /* R_ARM_TLS_IE32 needs one GOT slot. */
11469 s->size += 4;
11470 }
11471
e5a52504 11472 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 11473
11474 indx = 0;
11475 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
11476 && (!info->shared
11477 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11478 indx = h->dynindx;
11479
11480 if (tls_type != GOT_NORMAL
11481 && (info->shared || indx != 0)
11482 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11483 || h->root.type != bfd_link_hash_undefweak))
11484 {
11485 if (tls_type & GOT_TLS_IE)
00a97672 11486 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11487
11488 if (tls_type & GOT_TLS_GD)
00a97672 11489 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11490
11491 if ((tls_type & GOT_TLS_GD) && indx != 0)
00a97672 11492 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11493 }
11494 else if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11495 || h->root.type != bfd_link_hash_undefweak)
11496 && (info->shared
11497 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)))
00a97672 11498 htab->srelgot->size += RELOC_SIZE (htab);
e5a52504 11499 }
5e681ec4
PB		 11500 }
11501 else
11502 h->got.offset = (bfd_vma) -1;
11503
a4fd1a8e
PB		 11504 /* Allocate stubs for exported Thumb functions on v4t. */
11505 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 11506 && h->def_regular
a4fd1a8e
PB		 11507 && ELF_ST_TYPE (h->type) == STT_ARM_TFUNC
11508 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
11509 {
11510 struct elf_link_hash_entry * th;
11511 struct bfd_link_hash_entry * bh;
11512 struct elf_link_hash_entry * myh;
11513 char name[1024];
11514 asection *s;
11515 bh = NULL;
11516 /* Create a new symbol to regist the real location of the function. */
11517 s = h->root.u.def.section;
906e58ca 11518 sprintf (name, "__real_%s", h->root.root.string);
a4fd1a8e
PB		 11519 _bfd_generic_link_add_one_symbol (info, s->owner,
11520 name, BSF_GLOBAL, s,
11521 h->root.u.def.value,
11522 NULL, TRUE, FALSE, &bh);
11523
11524 myh = (struct elf_link_hash_entry *) bh;
11525 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
11526 myh->forced_local = 1;
11527 eh->export_glue = myh;
11528 th = record_arm_to_thumb_glue (info, h);
11529 /* Point the symbol at the stub. */
11530 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
11531 h->root.u.def.section = th->root.u.def.section;
11532 h->root.u.def.value = th->root.u.def.value & ~1;
11533 }
11534
5e681ec4
PB		 11535 if (eh->relocs_copied == NULL)
11536 return TRUE;
11537
11538 /* In the shared -Bsymbolic case, discard space allocated for
11539 dynamic pc-relative relocs against symbols which turn out to be
11540 defined in regular objects. For the normal shared case, discard
11541 space for pc-relative relocs that have become local due to symbol
11542 visibility changes. */
11543
67687978 11544 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 11545 {
7bdca076 11546 /* The only relocs that use pc_count are R_ARM_REL32 and
bb224fc3
MS		 11547 R_ARM_REL32_NOI, which will appear on something like
11548 ".long foo - .". We want calls to protected symbols to resolve
11549 directly to the function rather than going via the plt. If people
11550 want function pointer comparisons to work as expected then they
11551 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 11552 if (SYMBOL_CALLS_LOCAL (info, h))
11553 {
11554 struct elf32_arm_relocs_copied **pp;
11555
11556 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
11557 {
11558 p->count -= p->pc_count;
11559 p->pc_count = 0;
11560 if (p->count == 0)
11561 *pp = p->next;
11562 else
11563 pp = &p->next;
11564 }
11565 }
11566
3348747a
NS		 11567 if (elf32_arm_hash_table (info)->vxworks_p)
11568 {
11569 struct elf32_arm_relocs_copied **pp;
11570
11571 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
11572 {
11573 if (strcmp (p->section->output_section->name, ".tls_vars") == 0)
11574 *pp = p->next;
11575 else
11576 pp = &p->next;
11577 }
11578 }
11579
ba93b8ac 11580 /* Also discard relocs on undefined weak syms with non-default
7359ea65 11581 visibility. */
22d606e9 11582 if (eh->relocs_copied != NULL
5e681ec4 11583 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 11584 {
11585 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
11586 eh->relocs_copied = NULL;
11587
11588 /* Make sure undefined weak symbols are output as a dynamic
11589 symbol in PIEs. */
11590 else if (h->dynindx == -1
11591 && !h->forced_local)
11592 {
11593 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11594 return FALSE;
11595 }
11596 }
11597
67687978
PB		 11598 else if (htab->root.is_relocatable_executable && h->dynindx == -1
11599 && h->root.type == bfd_link_hash_new)
11600 {
11601 /* Output absolute symbols so that we can create relocations
11602 against them. For normal symbols we output a relocation
11603 against the section that contains them. */
11604 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11605 return FALSE;
11606 }
11607
5e681ec4
PB		 11608 }
11609 else
11610 {
11611 /* For the non-shared case, discard space for relocs against
11612 symbols which turn out to need copy relocs or are not
11613 dynamic. */
11614
f5385ebf
AM		 11615 if (!h->non_got_ref
11616 && ((h->def_dynamic
11617 && !h->def_regular)
5e681ec4
PB		 11618 || (htab->root.dynamic_sections_created
11619 && (h->root.type == bfd_link_hash_undefweak
11620 || h->root.type == bfd_link_hash_undefined))))
11621 {
11622 /* Make sure this symbol is output as a dynamic symbol.
11623 Undefined weak syms won't yet be marked as dynamic. */
11624 if (h->dynindx == -1
f5385ebf 11625 && !h->forced_local)
5e681ec4 11626 {
c152c796 11627 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11628 return FALSE;
11629 }
11630
11631 /* If that succeeded, we know we'll be keeping all the
11632 relocs. */
11633 if (h->dynindx != -1)
11634 goto keep;
11635 }
11636
11637 eh->relocs_copied = NULL;
11638
11639 keep: ;
11640 }
11641
11642 /* Finally, allocate space. */
11643 for (p = eh->relocs_copied; p != NULL; p = p->next)
11644 {
11645 asection *sreloc = elf_section_data (p->section)->sreloc;
00a97672 11646 sreloc->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 11647 }
11648
11649 return TRUE;
11650}
11651
08d1f311
DJ		 11652/* Find any dynamic relocs that apply to read-only sections. */
11653
11654static bfd_boolean
8029a119 11655elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
08d1f311 11656{
8029a119
NC		 11657 struct elf32_arm_link_hash_entry * eh;
11658 struct elf32_arm_relocs_copied * p;
08d1f311
DJ		 11659
11660 if (h->root.type == bfd_link_hash_warning)
11661 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11662
11663 eh = (struct elf32_arm_link_hash_entry *) h;
11664 for (p = eh->relocs_copied; p != NULL; p = p->next)
11665 {
11666 asection *s = p->section;
11667
11668 if (s != NULL && (s->flags & SEC_READONLY) != 0)
11669 {
11670 struct bfd_link_info *info = (struct bfd_link_info *) inf;
11671
11672 info->flags |= DF_TEXTREL;
11673
11674 /* Not an error, just cut short the traversal. */
11675 return FALSE;
11676 }
11677 }
11678 return TRUE;
11679}
11680
d504ffc8
DJ		 11681void
11682bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
11683 int byteswap_code)
11684{
11685 struct elf32_arm_link_hash_table *globals;
11686
11687 globals = elf32_arm_hash_table (info);
11688 globals->byteswap_code = byteswap_code;
11689}
11690
252b5132
RH		 11691/* Set the sizes of the dynamic sections. */
11692
b34976b6 11693static bfd_boolean
57e8b36a
NC		 11694elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
11695 struct bfd_link_info * info)
252b5132
RH		 11696{
11697 bfd * dynobj;
11698 asection * s;
b34976b6
AM		 11699 bfd_boolean plt;
11700 bfd_boolean relocs;
5e681ec4
PB		 11701 bfd *ibfd;
11702 struct elf32_arm_link_hash_table *htab;
252b5132 11703
5e681ec4 11704 htab = elf32_arm_hash_table (info);
252b5132
RH		 11705 dynobj = elf_hash_table (info)->dynobj;
11706 BFD_ASSERT (dynobj != NULL);
39b41c9c 11707 check_use_blx (htab);
252b5132
RH		 11708
11709 if (elf_hash_table (info)->dynamic_sections_created)
11710 {
11711 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 11712 if (info->executable)
252b5132
RH		 11713 {
11714 s = bfd_get_section_by_name (dynobj, ".interp");
11715 BFD_ASSERT (s != NULL);
eea6121a 11716 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 11717 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
11718 }
11719 }
5e681ec4
PB		 11720
11721 /* Set up .got offsets for local syms, and space for local dynamic
11722 relocs. */
11723 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 11724 {
5e681ec4
PB		 11725 bfd_signed_vma *local_got;
11726 bfd_signed_vma *end_local_got;
11727 char *local_tls_type;
11728 bfd_size_type locsymcount;
11729 Elf_Internal_Shdr *symtab_hdr;
11730 asection *srel;
3348747a 11731 bfd_boolean is_vxworks = elf32_arm_hash_table (info)->vxworks_p;
5e681ec4 11732
0ffa91dd 11733 if (! is_arm_elf (ibfd))
5e681ec4
PB		 11734 continue;
11735
11736 for (s = ibfd->sections; s != NULL; s = s->next)
11737 {
11738 struct elf32_arm_relocs_copied *p;
11739
6edfbbad 11740 for (p = elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4
PB		 11741 {
11742 if (!bfd_is_abs_section (p->section)
11743 && bfd_is_abs_section (p->section->output_section))
11744 {
11745 /* Input section has been discarded, either because
11746 it is a copy of a linkonce section or due to
11747 linker script /DISCARD/, so we'll be discarding
11748 the relocs too. */
11749 }
3348747a
NS		 11750 else if (is_vxworks
11751 && strcmp (p->section->output_section->name,
11752 ".tls_vars") == 0)
11753 {
11754 /* Relocations in vxworks .tls_vars sections are
11755 handled specially by the loader. */
11756 }
5e681ec4
PB		 11757 else if (p->count != 0)
11758 {
11759 srel = elf_section_data (p->section)->sreloc;
00a97672 11760 srel->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 11761 if ((p->section->output_section->flags & SEC_READONLY) != 0)
11762 info->flags |= DF_TEXTREL;
11763 }
11764 }
11765 }
11766
11767 local_got = elf_local_got_refcounts (ibfd);
11768 if (!local_got)
11769 continue;
11770
0ffa91dd 11771 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 11772 locsymcount = symtab_hdr->sh_info;
11773 end_local_got = local_got + locsymcount;
ba93b8ac 11774 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
5e681ec4
PB		 11775 s = htab->sgot;
11776 srel = htab->srelgot;
11777 for (; local_got < end_local_got; ++local_got, ++local_tls_type)
11778 {
11779 if (*local_got > 0)
11780 {
eea6121a 11781 *local_got = s->size;
ba93b8ac
DJ		 11782 if (*local_tls_type & GOT_TLS_GD)
11783 /* TLS_GD relocs need an 8-byte structure in the GOT. */
11784 s->size += 8;
11785 if (*local_tls_type & GOT_TLS_IE)
11786 s->size += 4;
11787 if (*local_tls_type == GOT_NORMAL)
11788 s->size += 4;
11789
11790 if (info->shared || *local_tls_type == GOT_TLS_GD)
00a97672 11791 srel->size += RELOC_SIZE (htab);
5e681ec4
PB		 11792 }
11793 else
11794 *local_got = (bfd_vma) -1;
11795 }
252b5132
RH		 11796 }
11797
ba93b8ac
DJ		 11798 if (htab->tls_ldm_got.refcount > 0)
11799 {
11800 /* Allocate two GOT entries and one dynamic relocation (if necessary)
11801 for R_ARM_TLS_LDM32 relocations. */
11802 htab->tls_ldm_got.offset = htab->sgot->size;
11803 htab->sgot->size += 8;
11804 if (info->shared)
00a97672 11805 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11806 }
11807 else
11808 htab->tls_ldm_got.offset = -1;
11809
5e681ec4
PB		 11810 /* Allocate global sym .plt and .got entries, and space for global
11811 sym dynamic relocs. */
57e8b36a 11812 elf_link_hash_traverse (& htab->root, allocate_dynrelocs, info);
252b5132 11813
d504ffc8
DJ		 11814 /* Here we rummage through the found bfds to collect glue information. */
11815 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e 11816 {
0ffa91dd 11817 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 11818 continue;
11819
c7b8f16e
JB		 11820 /* Initialise mapping tables for code/data. */
11821 bfd_elf32_arm_init_maps (ibfd);
906e58ca 11822
c7b8f16e
JB		 11823 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
11824 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
11825 /* xgettext:c-format */
11826 _bfd_error_handler (_("Errors encountered processing file %s"),
11827 ibfd->filename);
11828 }
d504ffc8 11829
3e6b1042
DJ		 11830 /* Allocate space for the glue sections now that we've sized them. */
11831 bfd_elf32_arm_allocate_interworking_sections (info);
11832
252b5132
RH		 11833 /* The check_relocs and adjust_dynamic_symbol entry points have
11834 determined the sizes of the various dynamic sections. Allocate
11835 memory for them. */
b34976b6
AM		 11836 plt = FALSE;
11837 relocs = FALSE;
252b5132
RH		 11838 for (s = dynobj->sections; s != NULL; s = s->next)
11839 {
11840 const char * name;
252b5132
RH		 11841
11842 if ((s->flags & SEC_LINKER_CREATED) == 0)
11843 continue;
11844
11845 /* It's OK to base decisions on the section name, because none
11846 of the dynobj section names depend upon the input files. */
11847 name = bfd_get_section_name (dynobj, s);
11848
24a1ba0f 11849 if (strcmp (name, ".plt") == 0)
252b5132 11850 {
c456f082
AM		 11851 /* Remember whether there is a PLT. */
11852 plt = s->size != 0;
252b5132 11853 }
0112cd26 11854 else if (CONST_STRNEQ (name, ".rel"))
252b5132 11855 {
c456f082 11856 if (s->size != 0)
252b5132 11857 {
252b5132 11858 /* Remember whether there are any reloc sections other
00a97672
RS		 11859 than .rel(a).plt and .rela.plt.unloaded. */
11860 if (s != htab->srelplt && s != htab->srelplt2)
b34976b6 11861 relocs = TRUE;
252b5132
RH		 11862
11863 /* We use the reloc_count field as a counter if we need
11864 to copy relocs into the output file. */
11865 s->reloc_count = 0;
11866 }
11867 }
0112cd26 11868 else if (! CONST_STRNEQ (name, ".got")
c456f082 11869 && strcmp (name, ".dynbss") != 0)
252b5132
RH		 11870 {
11871 /* It's not one of our sections, so don't allocate space. */
11872 continue;
11873 }
11874
c456f082 11875 if (s->size == 0)
252b5132 11876 {
c456f082 11877 /* If we don't need this section, strip it from the
00a97672
RS		 11878 output file. This is mostly to handle .rel(a).bss and
11879 .rel(a).plt. We must create both sections in
c456f082
AM		 11880 create_dynamic_sections, because they must be created
11881 before the linker maps input sections to output
11882 sections. The linker does that before
11883 adjust_dynamic_symbol is called, and it is that
11884 function which decides whether anything needs to go
11885 into these sections. */
8423293d 11886 s->flags |= SEC_EXCLUDE;
252b5132
RH		 11887 continue;
11888 }
11889
c456f082
AM		 11890 if ((s->flags & SEC_HAS_CONTENTS) == 0)
11891 continue;
11892
252b5132 11893 /* Allocate memory for the section contents. */
906e58ca 11894 s->contents = bfd_zalloc (dynobj, s->size);
c456f082 11895 if (s->contents == NULL)
b34976b6 11896 return FALSE;
252b5132
RH		 11897 }
11898
11899 if (elf_hash_table (info)->dynamic_sections_created)
11900 {
11901 /* Add some entries to the .dynamic section. We fill in the
11902 values later, in elf32_arm_finish_dynamic_sections, but we
11903 must add the entries now so that we get the correct size for
11904 the .dynamic section. The DT_DEBUG entry is filled in by the
11905 dynamic linker and used by the debugger. */
dc810e39 11906#define add_dynamic_entry(TAG, VAL) \
5a580b3a 11907 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 11908
8532796c 11909 if (info->executable)
252b5132 11910 {
dc810e39 11911 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 11912 return FALSE;
252b5132
RH		 11913 }
11914
11915 if (plt)
11916 {
dc810e39
AM		 11917 if ( !add_dynamic_entry (DT_PLTGOT, 0)
11918 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 11919 || !add_dynamic_entry (DT_PLTREL,
11920 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 11921 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 11922 return FALSE;
252b5132
RH		 11923 }
11924
11925 if (relocs)
11926 {
00a97672
RS		 11927 if (htab->use_rel)
11928 {
11929 if (!add_dynamic_entry (DT_REL, 0)
11930 || !add_dynamic_entry (DT_RELSZ, 0)
11931 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
11932 return FALSE;
11933 }
11934 else
11935 {
11936 if (!add_dynamic_entry (DT_RELA, 0)
11937 || !add_dynamic_entry (DT_RELASZ, 0)
11938 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
11939 return FALSE;
11940 }
252b5132
RH		 11941 }
11942
08d1f311
DJ		 11943 /* If any dynamic relocs apply to a read-only section,
11944 then we need a DT_TEXTREL entry. */
11945 if ((info->flags & DF_TEXTREL) == 0)
8029a119
NC		 11946 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
11947 info);
08d1f311 11948
99e4ae17 11949 if ((info->flags & DF_TEXTREL) != 0)
252b5132 11950 {
dc810e39 11951 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 11952 return FALSE;
252b5132 11953 }
7a2b07ff
NS		 11954 if (htab->vxworks_p
11955 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
11956 return FALSE;
252b5132 11957 }
8532796c 11958#undef add_dynamic_entry
252b5132 11959
b34976b6 11960 return TRUE;
252b5132
RH		 11961}
11962
252b5132
RH		 11963/* Finish up dynamic symbol handling. We set the contents of various
11964 dynamic sections here. */
11965
b34976b6 11966static bfd_boolean
906e58ca
NC		 11967elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
11968 struct bfd_link_info * info,
11969 struct elf_link_hash_entry * h,
11970 Elf_Internal_Sym * sym)
252b5132
RH		 11971{
11972 bfd * dynobj;
e5a52504 11973 struct elf32_arm_link_hash_table *htab;
b7693d02 11974 struct elf32_arm_link_hash_entry *eh;
252b5132
RH		 11975
11976 dynobj = elf_hash_table (info)->dynobj;
e5a52504 11977 htab = elf32_arm_hash_table (info);
b7693d02 11978 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 11979
11980 if (h->plt.offset != (bfd_vma) -1)
11981 {
11982 asection * splt;
252b5132 11983 asection * srel;
e5a52504 11984 bfd_byte *loc;
24a1ba0f 11985 bfd_vma plt_index;
947216bf 11986 Elf_Internal_Rela rel;
252b5132
RH		 11987
11988 /* This symbol has an entry in the procedure linkage table. Set
11989 it up. */
11990
11991 BFD_ASSERT (h->dynindx != -1);
11992
11993 splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672 11994 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".plt"));
e5a52504 11995 BFD_ASSERT (splt != NULL && srel != NULL);
252b5132 11996
e5a52504
MM		 11997 /* Fill in the entry in the procedure linkage table. */
11998 if (htab->symbian_p)
11999 {
906e58ca 12000 put_arm_insn (htab, output_bfd,
52ab56c2
PB		 12001 elf32_arm_symbian_plt_entry[0],
12002 splt->contents + h->plt.offset);
906e58ca 12003 bfd_put_32 (output_bfd,
52ab56c2
PB		 12004 elf32_arm_symbian_plt_entry[1],
12005 splt->contents + h->plt.offset + 4);
906e58ca 12006
e5a52504 12007 /* Fill in the entry in the .rel.plt section. */
2a1b9a48
MM		 12008 rel.r_offset = (splt->output_section->vma
12009 + splt->output_offset
52ab56c2 12010 + h->plt.offset + 4);
e5a52504 12011 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
b7693d02
DJ		 12012
12013 /* Get the index in the procedure linkage table which
12014 corresponds to this symbol. This is the index of this symbol
12015 in all the symbols for which we are making plt entries. The
12016 first entry in the procedure linkage table is reserved. */
906e58ca 12017 plt_index = ((h->plt.offset - htab->plt_header_size)
b7693d02 12018 / htab->plt_entry_size);
e5a52504
MM		 12019 }
12020 else
12021 {
00a97672 12022 bfd_vma got_offset, got_address, plt_address;
e5a52504
MM		 12023 bfd_vma got_displacement;
12024 asection * sgot;
52ab56c2 12025 bfd_byte * ptr;
906e58ca 12026
e5a52504
MM		 12027 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
12028 BFD_ASSERT (sgot != NULL);
12029
b7693d02
DJ		 12030 /* Get the offset into the .got.plt table of the entry that
12031 corresponds to this function. */
12032 got_offset = eh->plt_got_offset;
12033
12034 /* Get the index in the procedure linkage table which
12035 corresponds to this symbol. This is the index of this symbol
12036 in all the symbols for which we are making plt entries. The
12037 first three entries in .got.plt are reserved; after that
12038 symbols appear in the same order as in .plt. */
12039 plt_index = (got_offset - 12) / 4;
e5a52504 12040
00a97672
RS		 12041 /* Calculate the address of the GOT entry. */
12042 got_address = (sgot->output_section->vma
12043 + sgot->output_offset
12044 + got_offset);
5e681ec4 12045
00a97672
RS		 12046 /* ...and the address of the PLT entry. */
12047 plt_address = (splt->output_section->vma
12048 + splt->output_offset
12049 + h->plt.offset);
5e681ec4 12050
52ab56c2 12051 ptr = htab->splt->contents + h->plt.offset;
00a97672
RS		 12052 if (htab->vxworks_p && info->shared)
12053 {
12054 unsigned int i;
12055 bfd_vma val;
12056
52ab56c2 12057 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 12058 {
12059 val = elf32_arm_vxworks_shared_plt_entry[i];
12060 if (i == 2)
12061 val |= got_address - sgot->output_section->vma;
12062 if (i == 5)
12063 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 12064 if (i == 2 || i == 5)
12065 bfd_put_32 (output_bfd, val, ptr);
12066 else
12067 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 12068 }
12069 }
12070 else if (htab->vxworks_p)
b7693d02 12071 {
00a97672
RS		 12072 unsigned int i;
12073 bfd_vma val;
12074
d3753b85 12075 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 12076 {
12077 val = elf32_arm_vxworks_exec_plt_entry[i];
12078 if (i == 2)
12079 val |= got_address;
12080 if (i == 4)
12081 val |= 0xffffff & -((h->plt.offset + i * 4 + 8) >> 2);
12082 if (i == 5)
12083 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 12084 if (i == 2 || i == 5)
12085 bfd_put_32 (output_bfd, val, ptr);
12086 else
12087 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 12088 }
12089
12090 loc = (htab->srelplt2->contents
12091 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
12092
12093 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
12094 referencing the GOT for this PLT entry. */
12095 rel.r_offset = plt_address + 8;
12096 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12097 rel.r_addend = got_offset;
12098 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
12099 loc += RELOC_SIZE (htab);
12100
12101 /* Create the R_ARM_ABS32 relocation referencing the
12102 beginning of the PLT for this GOT entry. */
12103 rel.r_offset = got_address;
12104 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12105 rel.r_addend = 0;
12106 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
b7693d02 12107 }
00a97672
RS		 12108 else
12109 {
bd97cb95 12110 bfd_signed_vma thumb_refs;
00a97672
RS		 12111 /* Calculate the displacement between the PLT slot and the
12112 entry in the GOT. The eight-byte offset accounts for the
12113 value produced by adding to pc in the first instruction
12114 of the PLT stub. */
12115 got_displacement = got_address - (plt_address + 8);
b7693d02 12116
00a97672
RS		 12117 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
12118
bd97cb95
DJ		 12119 thumb_refs = eh->plt_thumb_refcount;
12120 if (!htab->use_blx)
12121 thumb_refs += eh->plt_maybe_thumb_refcount;
12122
12123 if (thumb_refs > 0)
00a97672 12124 {
52ab56c2
PB		 12125 put_thumb_insn (htab, output_bfd,
12126 elf32_arm_plt_thumb_stub[0], ptr - 4);
12127 put_thumb_insn (htab, output_bfd,
12128 elf32_arm_plt_thumb_stub[1], ptr - 2);
00a97672
RS		 12129 }
12130
52ab56c2
PB		 12131 put_arm_insn (htab, output_bfd,
12132 elf32_arm_plt_entry[0]
12133 | ((got_displacement & 0x0ff00000) >> 20),
12134 ptr + 0);
12135 put_arm_insn (htab, output_bfd,
12136 elf32_arm_plt_entry[1]
12137 | ((got_displacement & 0x000ff000) >> 12),
12138 ptr+ 4);
12139 put_arm_insn (htab, output_bfd,
12140 elf32_arm_plt_entry[2]
12141 | (got_displacement & 0x00000fff),
12142 ptr + 8);
5e681ec4 12143#ifdef FOUR_WORD_PLT
52ab56c2 12144 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
5e681ec4 12145#endif
00a97672 12146 }
252b5132 12147
e5a52504
MM		 12148 /* Fill in the entry in the global offset table. */
12149 bfd_put_32 (output_bfd,
12150 (splt->output_section->vma
12151 + splt->output_offset),
12152 sgot->contents + got_offset);
906e58ca 12153
00a97672
RS		 12154 /* Fill in the entry in the .rel(a).plt section. */
12155 rel.r_addend = 0;
12156 rel.r_offset = got_address;
e5a52504
MM		 12157 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_JUMP_SLOT);
12158 }
57e8b36a 12159
00a97672
RS		 12160 loc = srel->contents + plt_index * RELOC_SIZE (htab);
12161 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132 12162
f5385ebf 12163 if (!h->def_regular)
252b5132
RH		 12164 {
12165 /* Mark the symbol as undefined, rather than as defined in
12166 the .plt section. Leave the value alone. */
12167 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 12168 /* If the symbol is weak, we do need to clear the value.
12169 Otherwise, the PLT entry would provide a definition for
12170 the symbol even if the symbol wasn't defined anywhere,
12171 and so the symbol would never be NULL. */
f5385ebf 12172 if (!h->ref_regular_nonweak)
d982ba73 12173 sym->st_value = 0;
252b5132
RH		 12174 }
12175 }
12176
ba93b8ac
DJ		 12177 if (h->got.offset != (bfd_vma) -1
12178 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_GD) == 0
12179 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_IE) == 0)
252b5132
RH		 12180 {
12181 asection * sgot;
12182 asection * srel;
947216bf
AM		 12183 Elf_Internal_Rela rel;
12184 bfd_byte *loc;
00a97672 12185 bfd_vma offset;
252b5132
RH		 12186
12187 /* This symbol has an entry in the global offset table. Set it
12188 up. */
252b5132 12189 sgot = bfd_get_section_by_name (dynobj, ".got");
00a97672 12190 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".got"));
252b5132
RH		 12191 BFD_ASSERT (sgot != NULL && srel != NULL);
12192
00a97672
RS		 12193 offset = (h->got.offset & ~(bfd_vma) 1);
12194 rel.r_addend = 0;
252b5132
RH		 12195 rel.r_offset = (sgot->output_section->vma
12196 + sgot->output_offset
00a97672 12197 + offset);
252b5132 12198
5e681ec4
PB		 12199 /* If this is a static link, or it is a -Bsymbolic link and the
12200 symbol is defined locally or was forced to be local because
12201 of a version file, we just want to emit a RELATIVE reloc.
12202 The entry in the global offset table will already have been
12203 initialized in the relocate_section function. */
252b5132 12204 if (info->shared
5e681ec4
PB		 12205 && SYMBOL_REFERENCES_LOCAL (info, h))
12206 {
906e58ca 12207 BFD_ASSERT ((h->got.offset & 1) != 0);
5e681ec4 12208 rel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
00a97672
RS		 12209 if (!htab->use_rel)
12210 {
12211 rel.r_addend = bfd_get_32 (output_bfd, sgot->contents + offset);
12212 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
12213 }
5e681ec4 12214 }
252b5132
RH		 12215 else
12216 {
906e58ca 12217 BFD_ASSERT ((h->got.offset & 1) == 0);
00a97672 12218 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
252b5132
RH		 12219 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
12220 }
12221
00a97672
RS		 12222 loc = srel->contents + srel->reloc_count++ * RELOC_SIZE (htab);
12223 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 12224 }
12225
f5385ebf 12226 if (h->needs_copy)
252b5132
RH		 12227 {
12228 asection * s;
947216bf
AM		 12229 Elf_Internal_Rela rel;
12230 bfd_byte *loc;
252b5132
RH		 12231
12232 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 12233 BFD_ASSERT (h->dynindx != -1
12234 && (h->root.type == bfd_link_hash_defined
12235 || h->root.type == bfd_link_hash_defweak));
12236
12237 s = bfd_get_section_by_name (h->root.u.def.section->owner,
00a97672 12238 RELOC_SECTION (htab, ".bss"));
252b5132
RH		 12239 BFD_ASSERT (s != NULL);
12240
00a97672 12241 rel.r_addend = 0;
252b5132
RH		 12242 rel.r_offset = (h->root.u.def.value
12243 + h->root.u.def.section->output_section->vma
12244 + h->root.u.def.section->output_offset);
12245 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
00a97672
RS		 12246 loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
12247 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 12248 }
12249
00a97672
RS		 12250 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
12251 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
12252 to the ".got" section. */
252b5132 12253 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
00a97672 12254 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 12255 sym->st_shndx = SHN_ABS;
12256
b34976b6 12257 return TRUE;
252b5132
RH		 12258}
12259
12260/* Finish up the dynamic sections. */
12261
b34976b6 12262static bfd_boolean
57e8b36a 12263elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 12264{
12265 bfd * dynobj;
12266 asection * sgot;
12267 asection * sdyn;
12268
12269 dynobj = elf_hash_table (info)->dynobj;
12270
12271 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
229fcec5 12272 BFD_ASSERT (elf32_arm_hash_table (info)->symbian_p || sgot != NULL);
252b5132
RH		 12273 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
12274
12275 if (elf_hash_table (info)->dynamic_sections_created)
12276 {
12277 asection *splt;
12278 Elf32_External_Dyn *dyncon, *dynconend;
229fcec5 12279 struct elf32_arm_link_hash_table *htab;
252b5132 12280
229fcec5 12281 htab = elf32_arm_hash_table (info);
252b5132 12282 splt = bfd_get_section_by_name (dynobj, ".plt");
24a1ba0f 12283 BFD_ASSERT (splt != NULL && sdyn != NULL);
252b5132
RH		 12284
12285 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 12286 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 12287
252b5132
RH		 12288 for (; dyncon < dynconend; dyncon++)
12289 {
12290 Elf_Internal_Dyn dyn;
12291 const char * name;
12292 asection * s;
12293
12294 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
12295
12296 switch (dyn.d_tag)
12297 {
229fcec5
MM		 12298 unsigned int type;
12299
252b5132 12300 default:
7a2b07ff
NS		 12301 if (htab->vxworks_p
12302 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
12303 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 12304 break;
12305
229fcec5
MM		 12306 case DT_HASH:
12307 name = ".hash";
12308 goto get_vma_if_bpabi;
12309 case DT_STRTAB:
12310 name = ".dynstr";
12311 goto get_vma_if_bpabi;
12312 case DT_SYMTAB:
12313 name = ".dynsym";
12314 goto get_vma_if_bpabi;
c0042f5d
MM		 12315 case DT_VERSYM:
12316 name = ".gnu.version";
12317 goto get_vma_if_bpabi;
12318 case DT_VERDEF:
12319 name = ".gnu.version_d";
12320 goto get_vma_if_bpabi;
12321 case DT_VERNEED:
12322 name = ".gnu.version_r";
12323 goto get_vma_if_bpabi;
12324
252b5132
RH		 12325 case DT_PLTGOT:
12326 name = ".got";
12327 goto get_vma;
12328 case DT_JMPREL:
00a97672 12329 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 12330 get_vma:
12331 s = bfd_get_section_by_name (output_bfd, name);
12332 BFD_ASSERT (s != NULL);
229fcec5
MM		 12333 if (!htab->symbian_p)
12334 dyn.d_un.d_ptr = s->vma;
12335 else
12336 /* In the BPABI, tags in the PT_DYNAMIC section point
12337 at the file offset, not the memory address, for the
12338 convenience of the post linker. */
12339 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 12340 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12341 break;
12342
229fcec5
MM		 12343 get_vma_if_bpabi:
12344 if (htab->symbian_p)
12345 goto get_vma;
12346 break;
12347
252b5132 12348 case DT_PLTRELSZ:
00a97672
RS		 12349 s = bfd_get_section_by_name (output_bfd,
12350 RELOC_SECTION (htab, ".plt"));
252b5132 12351 BFD_ASSERT (s != NULL);
eea6121a 12352 dyn.d_un.d_val = s->size;
252b5132
RH		 12353 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12354 break;
906e58ca 12355
252b5132 12356 case DT_RELSZ:
00a97672 12357 case DT_RELASZ:
229fcec5
MM		 12358 if (!htab->symbian_p)
12359 {
12360 /* My reading of the SVR4 ABI indicates that the
12361 procedure linkage table relocs (DT_JMPREL) should be
12362 included in the overall relocs (DT_REL). This is
12363 what Solaris does. However, UnixWare can not handle
12364 that case. Therefore, we override the DT_RELSZ entry
12365 here to make it not include the JMPREL relocs. Since
00a97672 12366 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 12367 other relocation sections, we don't have to worry
12368 about changing the DT_REL entry. */
00a97672
RS		 12369 s = bfd_get_section_by_name (output_bfd,
12370 RELOC_SECTION (htab, ".plt"));
229fcec5
MM		 12371 if (s != NULL)
12372 dyn.d_un.d_val -= s->size;
12373 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12374 break;
12375 }
8029a119 12376 /* Fall through. */
229fcec5
MM		 12377
12378 case DT_REL:
12379 case DT_RELA:
229fcec5
MM		 12380 /* In the BPABI, the DT_REL tag must point at the file
12381 offset, not the VMA, of the first relocation
12382 section. So, we use code similar to that in
12383 elflink.c, but do not check for SHF_ALLOC on the
12384 relcoation section, since relocations sections are
12385 never allocated under the BPABI. The comments above
12386 about Unixware notwithstanding, we include all of the
12387 relocations here. */
12388 if (htab->symbian_p)
12389 {
12390 unsigned int i;
12391 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
12392 ? SHT_REL : SHT_RELA);
12393 dyn.d_un.d_val = 0;
12394 for (i = 1; i < elf_numsections (output_bfd); i++)
12395 {
906e58ca 12396 Elf_Internal_Shdr *hdr
229fcec5
MM		 12397 = elf_elfsections (output_bfd)[i];
12398 if (hdr->sh_type == type)
12399 {
906e58ca 12400 if (dyn.d_tag == DT_RELSZ
229fcec5
MM		 12401 || dyn.d_tag == DT_RELASZ)
12402 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 12403 else if ((ufile_ptr) hdr->sh_offset
12404 <= dyn.d_un.d_val - 1)
229fcec5
MM		 12405 dyn.d_un.d_val = hdr->sh_offset;
12406 }
12407 }
12408 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12409 }
252b5132 12410 break;
88f7bcd5
NC		 12411
12412 /* Set the bottom bit of DT_INIT/FINI if the
12413 corresponding function is Thumb. */
12414 case DT_INIT:
12415 name = info->init_function;
12416 goto get_sym;
12417 case DT_FINI:
12418 name = info->fini_function;
12419 get_sym:
12420 /* If it wasn't set by elf_bfd_final_link
4cc11e76 12421 then there is nothing to adjust. */
88f7bcd5
NC		 12422 if (dyn.d_un.d_val != 0)
12423 {
12424 struct elf_link_hash_entry * eh;
12425
12426 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 12427 FALSE, FALSE, TRUE);
906e58ca 12428 if (eh != NULL
88f7bcd5
NC		 12429 && ELF_ST_TYPE (eh->type) == STT_ARM_TFUNC)
12430 {
12431 dyn.d_un.d_val |= 1;
b34976b6 12432 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 12433 }
12434 }
12435 break;
252b5132
RH		 12436 }
12437 }
12438
24a1ba0f 12439 /* Fill in the first entry in the procedure linkage table. */
e5a52504 12440 if (splt->size > 0 && elf32_arm_hash_table (info)->plt_header_size)
f7a74f8c 12441 {
00a97672
RS		 12442 const bfd_vma *plt0_entry;
12443 bfd_vma got_address, plt_address, got_displacement;
12444
12445 /* Calculate the addresses of the GOT and PLT. */
12446 got_address = sgot->output_section->vma + sgot->output_offset;
12447 plt_address = splt->output_section->vma + splt->output_offset;
12448
12449 if (htab->vxworks_p)
12450 {
12451 /* The VxWorks GOT is relocated by the dynamic linker.
12452 Therefore, we must emit relocations rather than simply
12453 computing the values now. */
12454 Elf_Internal_Rela rel;
12455
12456 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 12457 put_arm_insn (htab, output_bfd, plt0_entry[0],
12458 splt->contents + 0);
12459 put_arm_insn (htab, output_bfd, plt0_entry[1],
12460 splt->contents + 4);
12461 put_arm_insn (htab, output_bfd, plt0_entry[2],
12462 splt->contents + 8);
00a97672
RS		 12463 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
12464
8029a119 12465 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
00a97672
RS		 12466 rel.r_offset = plt_address + 12;
12467 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12468 rel.r_addend = 0;
12469 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
12470 htab->srelplt2->contents);
12471 }
12472 else
12473 {
12474 got_displacement = got_address - (plt_address + 16);
12475
12476 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 12477 put_arm_insn (htab, output_bfd, plt0_entry[0],
12478 splt->contents + 0);
12479 put_arm_insn (htab, output_bfd, plt0_entry[1],
12480 splt->contents + 4);
12481 put_arm_insn (htab, output_bfd, plt0_entry[2],
12482 splt->contents + 8);
12483 put_arm_insn (htab, output_bfd, plt0_entry[3],
12484 splt->contents + 12);
5e681ec4 12485
5e681ec4 12486#ifdef FOUR_WORD_PLT
00a97672
RS		 12487 /* The displacement value goes in the otherwise-unused
12488 last word of the second entry. */
12489 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 12490#else
00a97672 12491 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 12492#endif
00a97672 12493 }
f7a74f8c 12494 }
252b5132
RH		 12495
12496 /* UnixWare sets the entsize of .plt to 4, although that doesn't
12497 really seem like the right value. */
74541ad4
AM		 12498 if (splt->output_section->owner == output_bfd)
12499 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672
RS		 12500
12501 if (htab->vxworks_p && !info->shared && htab->splt->size > 0)
12502 {
12503 /* Correct the .rel(a).plt.unloaded relocations. They will have
12504 incorrect symbol indexes. */
12505 int num_plts;
eed62c48 12506 unsigned char *p;
00a97672
RS		 12507
12508 num_plts = ((htab->splt->size - htab->plt_header_size)
12509 / htab->plt_entry_size);
12510 p = htab->srelplt2->contents + RELOC_SIZE (htab);
12511
12512 for (; num_plts; num_plts--)
12513 {
12514 Elf_Internal_Rela rel;
12515
12516 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
12517 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12518 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
12519 p += RELOC_SIZE (htab);
12520
12521 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
12522 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12523 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
12524 p += RELOC_SIZE (htab);
12525 }
12526 }
252b5132
RH		 12527 }
12528
12529 /* Fill in the first three entries in the global offset table. */
229fcec5 12530 if (sgot)
252b5132 12531 {
229fcec5
MM		 12532 if (sgot->size > 0)
12533 {
12534 if (sdyn == NULL)
12535 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
12536 else
12537 bfd_put_32 (output_bfd,
12538 sdyn->output_section->vma + sdyn->output_offset,
12539 sgot->contents);
12540 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
12541 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
12542 }
252b5132 12543
229fcec5
MM		 12544 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
12545 }
252b5132 12546
b34976b6 12547 return TRUE;
252b5132
RH		 12548}
12549
ba96a88f 12550static void
57e8b36a 12551elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 12552{
9b485d32 12553 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 12554 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 12555
12556 i_ehdrp = elf_elfheader (abfd);
12557
94a3258f
PB		 12558 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
12559 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
12560 else
12561 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 12562 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 12563
93204d3a
PB		 12564 if (link_info)
12565 {
12566 globals = elf32_arm_hash_table (link_info);
12567 if (globals->byteswap_code)
12568 i_ehdrp->e_flags |= EF_ARM_BE8;
12569 }
ba96a88f
NC		 12570}
12571
99e4ae17 12572static enum elf_reloc_type_class
57e8b36a 12573elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
99e4ae17 12574{
f51e552e 12575 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 12576 {
12577 case R_ARM_RELATIVE:
12578 return reloc_class_relative;
12579 case R_ARM_JUMP_SLOT:
12580 return reloc_class_plt;
12581 case R_ARM_COPY:
12582 return reloc_class_copy;
12583 default:
12584 return reloc_class_normal;
12585 }
12586}
12587
e16bb312
NC		 12588/* Set the right machine number for an Arm ELF file. */
12589
12590static bfd_boolean
57e8b36a 12591elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr)
e16bb312
NC		 12592{
12593 if (hdr->sh_type == SHT_NOTE)
12594 *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS;
12595
12596 return TRUE;
12597}
12598
e489d0ae 12599static void
57e8b36a 12600elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 12601{
5a6c6817 12602 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 12603}
12604
40a18ebd
NC		 12605/* Return TRUE if this is an unwinding table entry. */
12606
12607static bfd_boolean
12608is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
12609{
0112cd26
NC		 12610 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
12611 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 12612}
12613
12614
12615/* Set the type and flags for an ARM section. We do this by
12616 the section name, which is a hack, but ought to work. */
12617
12618static bfd_boolean
12619elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
12620{
12621 const char * name;
12622
12623 name = bfd_get_section_name (abfd, sec);
12624
12625 if (is_arm_elf_unwind_section_name (abfd, name))
12626 {
12627 hdr->sh_type = SHT_ARM_EXIDX;
12628 hdr->sh_flags |= SHF_LINK_ORDER;
12629 }
12630 return TRUE;
12631}
12632
6dc132d9
L		 12633/* Handle an ARM specific section when reading an object file. This is
12634 called when bfd_section_from_shdr finds a section with an unknown
12635 type. */
40a18ebd
NC		 12636
12637static bfd_boolean
12638elf32_arm_section_from_shdr (bfd *abfd,
12639 Elf_Internal_Shdr * hdr,
6dc132d9
L		 12640 const char *name,
12641 int shindex)
40a18ebd
NC		 12642{
12643 /* There ought to be a place to keep ELF backend specific flags, but
12644 at the moment there isn't one. We just keep track of the
12645 sections by their name, instead. Fortunately, the ABI gives
12646 names for all the ARM specific sections, so we will probably get
12647 away with this. */
12648 switch (hdr->sh_type)
12649 {
12650 case SHT_ARM_EXIDX:
0951f019
RE		 12651 case SHT_ARM_PREEMPTMAP:
12652 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 12653 break;
12654
12655 default:
12656 return FALSE;
12657 }
12658
6dc132d9 12659 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 12660 return FALSE;
12661
12662 return TRUE;
12663}
e489d0ae 12664
8e3de13a
NC		 12665/* A structure used to record a list of sections, independently
12666 of the next and prev fields in the asection structure. */
12667typedef struct section_list
12668{
12669 asection * sec;
12670 struct section_list * next;
12671 struct section_list * prev;
12672}
12673section_list;
12674
12675/* Unfortunately we need to keep a list of sections for which
12676 an _arm_elf_section_data structure has been allocated. This
12677 is because it is possible for functions like elf32_arm_write_section
12678 to be called on a section which has had an elf_data_structure
12679 allocated for it (and so the used_by_bfd field is valid) but
12680 for which the ARM extended version of this structure - the
12681 _arm_elf_section_data structure - has not been allocated. */
12682static section_list * sections_with_arm_elf_section_data = NULL;
12683
12684static void
957c6e41 12685record_section_with_arm_elf_section_data (asection * sec)
8e3de13a
NC		 12686{
12687 struct section_list * entry;
12688
957c6e41 12689 entry = bfd_malloc (sizeof (* entry));
8e3de13a
NC		 12690 if (entry == NULL)
12691 return;
12692 entry->sec = sec;
12693 entry->next = sections_with_arm_elf_section_data;
12694 entry->prev = NULL;
12695 if (entry->next != NULL)
12696 entry->next->prev = entry;
12697 sections_with_arm_elf_section_data = entry;
12698}
12699
44444f50
NC		 12700static struct section_list *
12701find_arm_elf_section_entry (asection * sec)
8e3de13a
NC		 12702{
12703 struct section_list * entry;
bd4aae00 12704 static struct section_list * last_entry = NULL;
8e3de13a 12705
bd4aae00
NC		 12706 /* This is a short cut for the typical case where the sections are added
12707 to the sections_with_arm_elf_section_data list in forward order and
12708 then looked up here in backwards order. This makes a real difference
12709 to the ld-srec/sec64k.exp linker test. */
44444f50 12710 entry = sections_with_arm_elf_section_data;
bd4aae00
NC		 12711 if (last_entry != NULL)
12712 {
12713 if (last_entry->sec == sec)
44444f50
NC		 12714 entry = last_entry;
12715 else if (last_entry->next != NULL
12716 && last_entry->next->sec == sec)
12717 entry = last_entry->next;
bd4aae00 12718 }
44444f50
NC		 12719
12720 for (; entry; entry = entry->next)
8e3de13a 12721 if (entry->sec == sec)
44444f50 12722 break;
bd4aae00 12723
44444f50
NC		 12724 if (entry)
12725 /* Record the entry prior to this one - it is the entry we are most
12726 likely to want to locate next time. Also this way if we have been
12727 called from unrecord_section_with_arm_elf_section_data() we will not
12728 be caching a pointer that is about to be freed. */
12729 last_entry = entry->prev;
12730
12731 return entry;
12732}
12733
12734static _arm_elf_section_data *
12735get_arm_elf_section_data (asection * sec)
12736{
12737 struct section_list * entry;
12738
12739 entry = find_arm_elf_section_entry (sec);
12740
12741 if (entry)
12742 return elf32_arm_section_data (entry->sec);
12743 else
12744 return NULL;
8e3de13a
NC		 12745}
12746
12747static void
12748unrecord_section_with_arm_elf_section_data (asection * sec)
12749{
12750 struct section_list * entry;
12751
44444f50
NC		 12752 entry = find_arm_elf_section_entry (sec);
12753
12754 if (entry)
12755 {
12756 if (entry->prev != NULL)
12757 entry->prev->next = entry->next;
12758 if (entry->next != NULL)
12759 entry->next->prev = entry->prev;
12760 if (entry == sections_with_arm_elf_section_data)
12761 sections_with_arm_elf_section_data = entry->next;
12762 free (entry);
12763 }
8e3de13a
NC		 12764}
12765
e489d0ae 12766
4e617b1e
PB		 12767typedef struct
12768{
12769 void *finfo;
12770 struct bfd_link_info *info;
91a5743d
PB		 12771 asection *sec;
12772 int sec_shndx;
6e0b88f1
AM		 12773 int (*func) (void *, const char *, Elf_Internal_Sym *,
12774 asection *, struct elf_link_hash_entry *);
4e617b1e
PB		 12775} output_arch_syminfo;
12776
12777enum map_symbol_type
12778{
12779 ARM_MAP_ARM,
12780 ARM_MAP_THUMB,
12781 ARM_MAP_DATA
12782};
12783
12784
7413f23f 12785/* Output a single mapping symbol. */
4e617b1e
PB		 12786
12787static bfd_boolean
7413f23f
DJ		 12788elf32_arm_output_map_sym (output_arch_syminfo *osi,
12789 enum map_symbol_type type,
12790 bfd_vma offset)
4e617b1e
PB		 12791{
12792 static const char *names[3] = {"$a", "$t", "$d"};
12793 struct elf32_arm_link_hash_table *htab;
12794 Elf_Internal_Sym sym;
12795
12796 htab = elf32_arm_hash_table (osi->info);
91a5743d
PB		 12797 sym.st_value = osi->sec->output_section->vma
12798 + osi->sec->output_offset
12799 + offset;
4e617b1e
PB		 12800 sym.st_size = 0;
12801 sym.st_other = 0;
12802 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d 12803 sym.st_shndx = osi->sec_shndx;
6e0b88f1 12804 return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
4e617b1e
PB		 12805}
12806
12807
12808/* Output mapping symbols for PLT entries associated with H. */
12809
12810static bfd_boolean
12811elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
12812{
12813 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
12814 struct elf32_arm_link_hash_table *htab;
12815 struct elf32_arm_link_hash_entry *eh;
12816 bfd_vma addr;
12817
12818 htab = elf32_arm_hash_table (osi->info);
12819
12820 if (h->root.type == bfd_link_hash_indirect)
12821 return TRUE;
12822
12823 if (h->root.type == bfd_link_hash_warning)
12824 /* When warning symbols are created, they **replace** the "real"
12825 entry in the hash table, thus we never get to see the real
12826 symbol in a hash traversal. So look at it now. */
12827 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12828
12829 if (h->plt.offset == (bfd_vma) -1)
12830 return TRUE;
12831
12832 eh = (struct elf32_arm_link_hash_entry *) h;
12833 addr = h->plt.offset;
12834 if (htab->symbian_p)
12835 {
7413f23f 12836 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12837 return FALSE;
7413f23f 12838 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
4e617b1e
PB		 12839 return FALSE;
12840 }
12841 else if (htab->vxworks_p)
12842 {
7413f23f 12843 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12844 return FALSE;
7413f23f 12845 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
4e617b1e 12846 return FALSE;
7413f23f 12847 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
4e617b1e 12848 return FALSE;
7413f23f 12849 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
4e617b1e
PB		 12850 return FALSE;
12851 }
12852 else
12853 {
bd97cb95
DJ		 12854 bfd_signed_vma thumb_refs;
12855
12856 thumb_refs = eh->plt_thumb_refcount;
12857 if (!htab->use_blx)
12858 thumb_refs += eh->plt_maybe_thumb_refcount;
4e617b1e 12859
bd97cb95 12860 if (thumb_refs > 0)
4e617b1e 12861 {
7413f23f 12862 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
4e617b1e
PB		 12863 return FALSE;
12864 }
12865#ifdef FOUR_WORD_PLT
7413f23f 12866 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12867 return FALSE;
7413f23f 12868 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
4e617b1e
PB		 12869 return FALSE;
12870#else
906e58ca 12871 /* A three-word PLT with no Thumb thunk contains only Arm code,
4e617b1e
PB		 12872 so only need to output a mapping symbol for the first PLT entry and
12873 entries with thumb thunks. */
bd97cb95 12874 if (thumb_refs > 0 || addr == 20)
4e617b1e 12875 {
7413f23f 12876 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e
PB		 12877 return FALSE;
12878 }
12879#endif
12880 }
12881
12882 return TRUE;
12883}
12884
7413f23f
DJ		 12885/* Output a single local symbol for a generated stub. */
12886
12887static bfd_boolean
12888elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
12889 bfd_vma offset, bfd_vma size)
12890{
12891 struct elf32_arm_link_hash_table *htab;
12892 Elf_Internal_Sym sym;
12893
12894 htab = elf32_arm_hash_table (osi->info);
12895 sym.st_value = osi->sec->output_section->vma
12896 + osi->sec->output_offset
12897 + offset;
12898 sym.st_size = size;
12899 sym.st_other = 0;
12900 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
12901 sym.st_shndx = osi->sec_shndx;
6e0b88f1 12902 return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1;
7413f23f 12903}
4e617b1e 12904
da5938a2 12905static bfd_boolean
8029a119
NC		 12906arm_map_one_stub (struct bfd_hash_entry * gen_entry,
12907 void * in_arg)
da5938a2
NC		 12908{
12909 struct elf32_arm_stub_hash_entry *stub_entry;
12910 struct bfd_link_info *info;
12911 struct elf32_arm_link_hash_table *htab;
12912 asection *stub_sec;
12913 bfd_vma addr;
7413f23f 12914 char *stub_name;
9a008db3 12915 output_arch_syminfo *osi;
461a49ca
DJ		 12916 const insn_sequence *template;
12917 enum stub_insn_type prev_type;
12918 int size;
12919 int i;
12920 enum map_symbol_type sym_type;
da5938a2
NC		 12921
12922 /* Massage our args to the form they really have. */
12923 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
9a008db3 12924 osi = (output_arch_syminfo *) in_arg;
da5938a2 12925
da5938a2
NC		 12926 info = osi->info;
12927
12928 htab = elf32_arm_hash_table (info);
12929 stub_sec = stub_entry->stub_sec;
12930
12931 /* Ensure this stub is attached to the current section being
7413f23f 12932 processed. */
da5938a2
NC		 12933 if (stub_sec != osi->sec)
12934 return TRUE;
12935
7413f23f
DJ		 12936 addr = (bfd_vma) stub_entry->stub_offset;
12937 stub_name = stub_entry->output_name;
da5938a2 12938
461a49ca 12939 template = stub_entry->stub_template;
4e31c731 12940 switch (template[0].type)
7413f23f 12941 {
461a49ca
DJ		 12942 case ARM_TYPE:
12943 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
da5938a2
NC		 12944 return FALSE;
12945 break;
461a49ca 12946 case THUMB16_TYPE:
48229727 12947 case THUMB32_TYPE:
461a49ca
DJ		 12948 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
12949 stub_entry->stub_size))
da5938a2
NC		 12950 return FALSE;
12951 break;
12952 default:
12953 BFD_FAIL ();
48229727 12954 return 0;
7413f23f 12955 }
da5938a2 12956
461a49ca
DJ		 12957 prev_type = DATA_TYPE;
12958 size = 0;
12959 for (i = 0; i < stub_entry->stub_template_size; i++)
12960 {
4e31c731 12961 switch (template[i].type)
461a49ca
DJ		 12962 {
12963 case ARM_TYPE:
12964 sym_type = ARM_MAP_ARM;
12965 break;
12966
12967 case THUMB16_TYPE:
48229727 12968 case THUMB32_TYPE:
461a49ca
DJ		 12969 sym_type = ARM_MAP_THUMB;
12970 break;
12971
12972 case DATA_TYPE:
12973 sym_type = ARM_MAP_DATA;
12974 break;
12975
12976 default:
12977 BFD_FAIL ();
4e31c731 12978 return FALSE;
461a49ca
DJ		 12979 }
12980
12981 if (template[i].type != prev_type)
12982 {
12983 prev_type = template[i].type;
12984 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
12985 return FALSE;
12986 }
12987
4e31c731 12988 switch (template[i].type)
461a49ca
DJ		 12989 {
12990 case ARM_TYPE:
48229727 12991 case THUMB32_TYPE:
461a49ca
DJ		 12992 size += 4;
12993 break;
12994
12995 case THUMB16_TYPE:
12996 size += 2;
12997 break;
12998
12999 case DATA_TYPE:
13000 size += 4;
13001 break;
13002
13003 default:
13004 BFD_FAIL ();
4e31c731 13005 return FALSE;
461a49ca
DJ		 13006 }
13007 }
13008
da5938a2
NC		 13009 return TRUE;
13010}
13011
91a5743d 13012/* Output mapping symbols for linker generated sections. */
4e617b1e
PB		 13013
13014static bfd_boolean
13015elf32_arm_output_arch_local_syms (bfd *output_bfd,
906e58ca
NC		 13016 struct bfd_link_info *info,
13017 void *finfo,
6e0b88f1
AM		 13018 int (*func) (void *, const char *,
13019 Elf_Internal_Sym *,
13020 asection *,
13021 struct elf_link_hash_entry *))
4e617b1e
PB		 13022{
13023 output_arch_syminfo osi;
13024 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 13025 bfd_vma offset;
13026 bfd_size_type size;
4e617b1e
PB		 13027
13028 htab = elf32_arm_hash_table (info);
906e58ca 13029 check_use_blx (htab);
91a5743d 13030
4e617b1e
PB		 13031 osi.finfo = finfo;
13032 osi.info = info;
13033 osi.func = func;
906e58ca 13034
91a5743d
PB		 13035 /* ARM->Thumb glue. */
13036 if (htab->arm_glue_size > 0)
13037 {
13038 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13039 ARM2THUMB_GLUE_SECTION_NAME);
13040
13041 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13042 (output_bfd, osi.sec->output_section);
13043 if (info->shared || htab->root.is_relocatable_executable
13044 || htab->pic_veneer)
13045 size = ARM2THUMB_PIC_GLUE_SIZE;
13046 else if (htab->use_blx)
13047 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
13048 else
13049 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 13050
91a5743d
PB		 13051 for (offset = 0; offset < htab->arm_glue_size; offset += size)
13052 {
7413f23f
DJ		 13053 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
13054 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
91a5743d
PB		 13055 }
13056 }
13057
13058 /* Thumb->ARM glue. */
13059 if (htab->thumb_glue_size > 0)
13060 {
13061 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13062 THUMB2ARM_GLUE_SECTION_NAME);
13063
13064 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13065 (output_bfd, osi.sec->output_section);
13066 size = THUMB2ARM_GLUE_SIZE;
13067
13068 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
13069 {
7413f23f
DJ		 13070 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
13071 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
91a5743d
PB		 13072 }
13073 }
13074
845b51d6
PB		 13075 /* ARMv4 BX veneers. */
13076 if (htab->bx_glue_size > 0)
13077 {
13078 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13079 ARM_BX_GLUE_SECTION_NAME);
13080
13081 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13082 (output_bfd, osi.sec->output_section);
13083
7413f23f 13084 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
845b51d6
PB		 13085 }
13086
8029a119
NC		 13087 /* Long calls stubs. */
13088 if (htab->stub_bfd && htab->stub_bfd->sections)
13089 {
da5938a2 13090 asection* stub_sec;
8029a119 13091
da5938a2
NC		 13092 for (stub_sec = htab->stub_bfd->sections;
13093 stub_sec != NULL;
8029a119
NC		 13094 stub_sec = stub_sec->next)
13095 {
13096 /* Ignore non-stub sections. */
13097 if (!strstr (stub_sec->name, STUB_SUFFIX))
13098 continue;
da5938a2 13099
8029a119 13100 osi.sec = stub_sec;
da5938a2 13101
8029a119
NC		 13102 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13103 (output_bfd, osi.sec->output_section);
da5938a2 13104
8029a119
NC		 13105 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
13106 }
13107 }
da5938a2 13108
91a5743d
PB		 13109 /* Finally, output mapping symbols for the PLT. */
13110 if (!htab->splt || htab->splt->size == 0)
13111 return TRUE;
13112
13113 osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd,
8029a119 13114 htab->splt->output_section);
91a5743d 13115 osi.sec = htab->splt;
4e617b1e
PB		 13116 /* Output mapping symbols for the plt header. SymbianOS does not have a
13117 plt header. */
13118 if (htab->vxworks_p)
13119 {
13120 /* VxWorks shared libraries have no PLT header. */
13121 if (!info->shared)
13122 {
7413f23f 13123 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e 13124 return FALSE;
7413f23f 13125 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
4e617b1e
PB		 13126 return FALSE;
13127 }
13128 }
13129 else if (!htab->symbian_p)
13130 {
7413f23f 13131 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e
PB		 13132 return FALSE;
13133#ifndef FOUR_WORD_PLT
7413f23f 13134 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
4e617b1e
PB		 13135 return FALSE;
13136#endif
13137 }
13138
13139 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, (void *) &osi);
13140 return TRUE;
13141}
13142
e489d0ae
PB		 13143/* Allocate target specific section data. */
13144
13145static bfd_boolean
13146elf32_arm_new_section_hook (bfd *abfd, asection *sec)
13147{
f592407e
AM		 13148 if (!sec->used_by_bfd)
13149 {
13150 _arm_elf_section_data *sdata;
13151 bfd_size_type amt = sizeof (*sdata);
e489d0ae 13152
f592407e
AM		 13153 sdata = bfd_zalloc (abfd, amt);
13154 if (sdata == NULL)
13155 return FALSE;
13156 sec->used_by_bfd = sdata;
13157 }
e489d0ae 13158
957c6e41 13159 record_section_with_arm_elf_section_data (sec);
8e3de13a 13160
e489d0ae
PB		 13161 return _bfd_elf_new_section_hook (abfd, sec);
13162}
13163
13164
13165/* Used to order a list of mapping symbols by address. */
13166
13167static int
13168elf32_arm_compare_mapping (const void * a, const void * b)
13169{
7f6a71ff
JM		 13170 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
13171 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
13172
13173 if (amap->vma > bmap->vma)
13174 return 1;
13175 else if (amap->vma < bmap->vma)
13176 return -1;
13177 else if (amap->type > bmap->type)
13178 /* Ensure results do not depend on the host qsort for objects with
13179 multiple mapping symbols at the same address by sorting on type
13180 after vma. */
13181 return 1;
13182 else if (amap->type < bmap->type)
13183 return -1;
13184 else
13185 return 0;
e489d0ae
PB		 13186}
13187
2468f9c9
PB		 13188/* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
13189
13190static unsigned long
13191offset_prel31 (unsigned long addr, bfd_vma offset)
13192{
13193 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
13194}
13195
13196/* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
13197 relocations. */
13198
13199static void
13200copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
13201{
13202 unsigned long first_word = bfd_get_32 (output_bfd, from);
13203 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
13204
13205 /* High bit of first word is supposed to be zero. */
13206 if ((first_word & 0x80000000ul) == 0)
13207 first_word = offset_prel31 (first_word, offset);
13208
13209 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
13210 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
13211 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
13212 second_word = offset_prel31 (second_word, offset);
13213
13214 bfd_put_32 (output_bfd, first_word, to);
13215 bfd_put_32 (output_bfd, second_word, to + 4);
13216}
e489d0ae 13217
48229727
JB		 13218/* Data for make_branch_to_a8_stub(). */
13219
13220struct a8_branch_to_stub_data {
13221 asection *writing_section;
13222 bfd_byte *contents;
13223};
13224
13225
13226/* Helper to insert branches to Cortex-A8 erratum stubs in the right
13227 places for a particular section. */
13228
13229static bfd_boolean
13230make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
13231 void *in_arg)
13232{
13233 struct elf32_arm_stub_hash_entry *stub_entry;
13234 struct a8_branch_to_stub_data *data;
13235 bfd_byte *contents;
13236 unsigned long branch_insn;
13237 bfd_vma veneered_insn_loc, veneer_entry_loc;
13238 bfd_signed_vma branch_offset;
13239 bfd *abfd;
13240 unsigned int index;
13241
13242 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
13243 data = (struct a8_branch_to_stub_data *) in_arg;
13244
13245 if (stub_entry->target_section != data->writing_section
13246 || stub_entry->stub_type < arm_stub_a8_veneer_b_cond)
13247 return TRUE;
13248
13249 contents = data->contents;
13250
13251 veneered_insn_loc = stub_entry->target_section->output_section->vma
13252 + stub_entry->target_section->output_offset
13253 + stub_entry->target_value;
13254
13255 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
13256 + stub_entry->stub_sec->output_offset
13257 + stub_entry->stub_offset;
13258
13259 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
13260 veneered_insn_loc &= ~3u;
13261
13262 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
13263
13264 abfd = stub_entry->target_section->owner;
13265 index = stub_entry->target_value;
13266
13267 /* We attempt to avoid this condition by setting stubs_always_after_branch
13268 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
13269 This check is just to be on the safe side... */
13270 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
13271 {
13272 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
13273 "allocated in unsafe location"), abfd);
13274 return FALSE;
13275 }
13276
13277 switch (stub_entry->stub_type)
13278 {
13279 case arm_stub_a8_veneer_b:
13280 case arm_stub_a8_veneer_b_cond:
13281 branch_insn = 0xf0009000;
13282 goto jump24;
13283
13284 case arm_stub_a8_veneer_blx:
13285 branch_insn = 0xf000e800;
13286 goto jump24;
13287
13288 case arm_stub_a8_veneer_bl:
13289 {
13290 unsigned int i1, j1, i2, j2, s;
13291
13292 branch_insn = 0xf000d000;
13293
13294 jump24:
13295 if (branch_offset < -16777216 || branch_offset > 16777214)
13296 {
13297 /* There's not much we can do apart from complain if this
13298 happens. */
13299 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
13300 "of range (input file too large)"), abfd);
13301 return FALSE;
13302 }
13303
13304 /* i1 = not(j1 eor s), so:
13305 not i1 = j1 eor s
13306 j1 = (not i1) eor s. */
13307
13308 branch_insn |= (branch_offset >> 1) & 0x7ff;
13309 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
13310 i2 = (branch_offset >> 22) & 1;
13311 i1 = (branch_offset >> 23) & 1;
13312 s = (branch_offset >> 24) & 1;
13313 j1 = (!i1) ^ s;
13314 j2 = (!i2) ^ s;
13315 branch_insn |= j2 << 11;
13316 branch_insn |= j1 << 13;
13317 branch_insn |= s << 26;
13318 }
13319 break;
13320
13321 default:
13322 BFD_FAIL ();
13323 return FALSE;
13324 }
13325
13326 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[index]);
13327 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[index + 2]);
13328
13329 return TRUE;
13330}
13331
e489d0ae
PB		 13332/* Do code byteswapping. Return FALSE afterwards so that the section is
13333 written out as normal. */
13334
13335static bfd_boolean
c7b8f16e 13336elf32_arm_write_section (bfd *output_bfd,
8029a119
NC		 13337 struct bfd_link_info *link_info,
13338 asection *sec,
e489d0ae
PB		 13339 bfd_byte *contents)
13340{
48229727 13341 unsigned int mapcount, errcount;
8e3de13a 13342 _arm_elf_section_data *arm_data;
c7b8f16e 13343 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 13344 elf32_arm_section_map *map;
c7b8f16e 13345 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 13346 bfd_vma ptr;
13347 bfd_vma end;
c7b8f16e 13348 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae 13349 bfd_byte tmp;
48229727 13350 unsigned int i;
57e8b36a 13351
8e3de13a
NC		 13352 /* If this section has not been allocated an _arm_elf_section_data
13353 structure then we cannot record anything. */
13354 arm_data = get_arm_elf_section_data (sec);
13355 if (arm_data == NULL)
13356 return FALSE;
13357
13358 mapcount = arm_data->mapcount;
13359 map = arm_data->map;
c7b8f16e
JB		 13360 errcount = arm_data->erratumcount;
13361
13362 if (errcount != 0)
13363 {
13364 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
13365
13366 for (errnode = arm_data->erratumlist; errnode != 0;
13367 errnode = errnode->next)
13368 {
13369 bfd_vma index = errnode->vma - offset;
13370
13371 switch (errnode->type)
13372 {
13373 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
13374 {
13375 bfd_vma branch_to_veneer;
13376 /* Original condition code of instruction, plus bit mask for
13377 ARM B instruction. */
13378 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
13379 | 0x0a000000;
13380
13381 /* The instruction is before the label. */
13382 index -= 4;
13383
13384 /* Above offset included in -4 below. */
13385 branch_to_veneer = errnode->u.b.veneer->vma
13386 - errnode->vma - 4;
13387
13388 if ((signed) branch_to_veneer < -(1 << 25)
13389 || (signed) branch_to_veneer >= (1 << 25))
13390 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
13391 "range"), output_bfd);
13392
13393 insn |= (branch_to_veneer >> 2) & 0xffffff;
13394 contents[endianflip ^ index] = insn & 0xff;
13395 contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
13396 contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
13397 contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
13398 }
13399 break;
13400
13401 case VFP11_ERRATUM_ARM_VENEER:
13402 {
13403 bfd_vma branch_from_veneer;
13404 unsigned int insn;
13405
13406 /* Take size of veneer into account. */
13407 branch_from_veneer = errnode->u.v.branch->vma
13408 - errnode->vma - 12;
13409
13410 if ((signed) branch_from_veneer < -(1 << 25)
13411 || (signed) branch_from_veneer >= (1 << 25))
13412 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
13413 "range"), output_bfd);
13414
13415 /* Original instruction. */
13416 insn = errnode->u.v.branch->u.b.vfp_insn;
13417 contents[endianflip ^ index] = insn & 0xff;
13418 contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
13419 contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
13420 contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
13421
13422 /* Branch back to insn after original insn. */
13423 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
13424 contents[endianflip ^ (index + 4)] = insn & 0xff;
13425 contents[endianflip ^ (index + 5)] = (insn >> 8) & 0xff;
13426 contents[endianflip ^ (index + 6)] = (insn >> 16) & 0xff;
13427 contents[endianflip ^ (index + 7)] = (insn >> 24) & 0xff;
13428 }
13429 break;
13430
13431 default:
13432 abort ();
13433 }
13434 }
13435 }
e489d0ae 13436
2468f9c9
PB		 13437 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
13438 {
13439 arm_unwind_table_edit *edit_node
13440 = arm_data->u.exidx.unwind_edit_list;
13441 /* Now, sec->size is the size of the section we will write. The original
13442 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
13443 markers) was sec->rawsize. (This isn't the case if we perform no
13444 edits, then rawsize will be zero and we should use size). */
13445 bfd_byte *edited_contents = bfd_malloc (sec->size);
13446 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
13447 unsigned int in_index, out_index;
13448 bfd_vma add_to_offsets = 0;
13449
13450 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
13451 {
13452 if (edit_node)
13453 {
13454 unsigned int edit_index = edit_node->index;
13455
13456 if (in_index < edit_index && in_index * 8 < input_size)
13457 {
13458 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
13459 contents + in_index * 8, add_to_offsets);
13460 out_index++;
13461 in_index++;
13462 }
13463 else if (in_index == edit_index
13464 || (in_index * 8 >= input_size
13465 && edit_index == UINT_MAX))
13466 {
13467 switch (edit_node->type)
13468 {
13469 case DELETE_EXIDX_ENTRY:
13470 in_index++;
13471 add_to_offsets += 8;
13472 break;
13473
13474 case INSERT_EXIDX_CANTUNWIND_AT_END:
13475 {
13476 asection *text_sec = edit_node->linked_section;
13477 bfd_vma text_offset = text_sec->output_section->vma
13478 + text_sec->output_offset
13479 + text_sec->size;
13480 bfd_vma exidx_offset = offset + out_index * 8;
13481 unsigned long prel31_offset;
13482
13483 /* Note: this is meant to be equivalent to an
13484 R_ARM_PREL31 relocation. These synthetic
13485 EXIDX_CANTUNWIND markers are not relocated by the
13486 usual BFD method. */
13487 prel31_offset = (text_offset - exidx_offset)
13488 & 0x7ffffffful;
13489
13490 /* First address we can't unwind. */
13491 bfd_put_32 (output_bfd, prel31_offset,
13492 &edited_contents[out_index * 8]);
13493
13494 /* Code for EXIDX_CANTUNWIND. */
13495 bfd_put_32 (output_bfd, 0x1,
13496 &edited_contents[out_index * 8 + 4]);
13497
13498 out_index++;
13499 add_to_offsets -= 8;
13500 }
13501 break;
13502 }
13503
13504 edit_node = edit_node->next;
13505 }
13506 }
13507 else
13508 {
13509 /* No more edits, copy remaining entries verbatim. */
13510 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
13511 contents + in_index * 8, add_to_offsets);
13512 out_index++;
13513 in_index++;
13514 }
13515 }
13516
13517 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
13518 bfd_set_section_contents (output_bfd, sec->output_section,
13519 edited_contents,
13520 (file_ptr) sec->output_offset, sec->size);
13521
13522 return TRUE;
13523 }
13524
48229727
JB		 13525 /* Fix code to point to Cortex-A8 erratum stubs. */
13526 if (globals->fix_cortex_a8)
13527 {
13528 struct a8_branch_to_stub_data data;
13529
13530 data.writing_section = sec;
13531 data.contents = contents;
13532
13533 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
13534 &data);
13535 }
13536
e489d0ae
PB		 13537 if (mapcount == 0)
13538 return FALSE;
13539
c7b8f16e 13540 if (globals->byteswap_code)
e489d0ae 13541 {
c7b8f16e 13542 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 13543
c7b8f16e
JB		 13544 ptr = map[0].vma;
13545 for (i = 0; i < mapcount; i++)
13546 {
13547 if (i == mapcount - 1)
13548 end = sec->size;
13549 else
13550 end = map[i + 1].vma;
e489d0ae 13551
c7b8f16e 13552 switch (map[i].type)
e489d0ae 13553 {
c7b8f16e
JB		 13554 case 'a':
13555 /* Byte swap code words. */
13556 while (ptr + 3 < end)
13557 {
13558 tmp = contents[ptr];
13559 contents[ptr] = contents[ptr + 3];
13560 contents[ptr + 3] = tmp;
13561 tmp = contents[ptr + 1];
13562 contents[ptr + 1] = contents[ptr + 2];
13563 contents[ptr + 2] = tmp;
13564 ptr += 4;
13565 }
13566 break;
e489d0ae 13567
c7b8f16e
JB		 13568 case 't':
13569 /* Byte swap code halfwords. */
13570 while (ptr + 1 < end)
13571 {
13572 tmp = contents[ptr];
13573 contents[ptr] = contents[ptr + 1];
13574 contents[ptr + 1] = tmp;
13575 ptr += 2;
13576 }
13577 break;
13578
13579 case 'd':
13580 /* Leave data alone. */
13581 break;
13582 }
13583 ptr = end;
13584 }
e489d0ae 13585 }
8e3de13a 13586
93204d3a 13587 free (map);
8e3de13a 13588 arm_data->mapcount = 0;
c7b8f16e 13589 arm_data->mapsize = 0;
8e3de13a
NC		 13590 arm_data->map = NULL;
13591 unrecord_section_with_arm_elf_section_data (sec);
13592
e489d0ae
PB		 13593 return FALSE;
13594}
13595
957c6e41
NC		 13596static void
13597unrecord_section_via_map_over_sections (bfd * abfd ATTRIBUTE_UNUSED,
13598 asection * sec,
13599 void * ignore ATTRIBUTE_UNUSED)
13600{
13601 unrecord_section_with_arm_elf_section_data (sec);
13602}
13603
13604static bfd_boolean
13605elf32_arm_close_and_cleanup (bfd * abfd)
13606{
b25e3d87
L		 13607 if (abfd->sections)
13608 bfd_map_over_sections (abfd,
13609 unrecord_section_via_map_over_sections,
13610 NULL);
957c6e41
NC		 13611
13612 return _bfd_elf_close_and_cleanup (abfd);
13613}
13614
b25e3d87
L		 13615static bfd_boolean
13616elf32_arm_bfd_free_cached_info (bfd * abfd)
13617{
13618 if (abfd->sections)
13619 bfd_map_over_sections (abfd,
13620 unrecord_section_via_map_over_sections,
13621 NULL);
13622
13623 return _bfd_free_cached_info (abfd);
13624}
13625
b7693d02
DJ		 13626/* Display STT_ARM_TFUNC symbols as functions. */
13627
13628static void
13629elf32_arm_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED,
13630 asymbol *asym)
13631{
13632 elf_symbol_type *elfsym = (elf_symbol_type *) asym;
13633
13634 if (ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_ARM_TFUNC)
13635 elfsym->symbol.flags |= BSF_FUNCTION;
13636}
13637
0beaef2b
PB		 13638
13639/* Mangle thumb function symbols as we read them in. */
13640
8384fb8f 13641static bfd_boolean
0beaef2b
PB		 13642elf32_arm_swap_symbol_in (bfd * abfd,
13643 const void *psrc,
13644 const void *pshn,
13645 Elf_Internal_Sym *dst)
13646{
8384fb8f
AM		 13647 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
13648 return FALSE;
0beaef2b
PB		 13649
13650 /* New EABI objects mark thumb function symbols by setting the low bit of
13651 the address. Turn these into STT_ARM_TFUNC. */
0f88be7a 13652 if ((ELF_ST_TYPE (dst->st_info) == STT_FUNC)
0beaef2b
PB		 13653 && (dst->st_value & 1))
13654 {
13655 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_ARM_TFUNC);
13656 dst->st_value &= ~(bfd_vma) 1;
13657 }
8384fb8f 13658 return TRUE;
0beaef2b
PB		 13659}
13660
13661
13662/* Mangle thumb function symbols as we write them out. */
13663
13664static void
13665elf32_arm_swap_symbol_out (bfd *abfd,
13666 const Elf_Internal_Sym *src,
13667 void *cdst,
13668 void *shndx)
13669{
13670 Elf_Internal_Sym newsym;
13671
13672 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
13673 of the address set, as per the new EABI. We do this unconditionally
13674 because objcopy does not set the elf header flags until after
13675 it writes out the symbol table. */
13676 if (ELF_ST_TYPE (src->st_info) == STT_ARM_TFUNC)
13677 {
13678 newsym = *src;
13679 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad
PB		 13680 if (newsym.st_shndx != SHN_UNDEF)
13681 {
13682 /* Do this only for defined symbols. At link type, the static
13683 linker will simulate the work of dynamic linker of resolving
13684 symbols and will carry over the thumbness of found symbols to
13685 the output symbol table. It's not clear how it happens, but
b0fead2b 13686 the thumbness of undefined symbols can well be different at
0fa3dcad
PB		 13687 runtime, and writing '1' for them will be confusing for users
13688 and possibly for dynamic linker itself.
13689 */
13690 newsym.st_value |= 1;
13691 }
906e58ca 13692
0beaef2b
PB		 13693 src = &newsym;
13694 }
13695 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
13696}
13697
b294bdf8
MM		 13698/* Add the PT_ARM_EXIDX program header. */
13699
13700static bfd_boolean
906e58ca 13701elf32_arm_modify_segment_map (bfd *abfd,
b294bdf8
MM		 13702 struct bfd_link_info *info ATTRIBUTE_UNUSED)
13703{
13704 struct elf_segment_map *m;
13705 asection *sec;
13706
13707 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
13708 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
13709 {
13710 /* If there is already a PT_ARM_EXIDX header, then we do not
13711 want to add another one. This situation arises when running
13712 "strip"; the input binary already has the header. */
13713 m = elf_tdata (abfd)->segment_map;
13714 while (m && m->p_type != PT_ARM_EXIDX)
13715 m = m->next;
13716 if (!m)
13717 {
13718 m = bfd_zalloc (abfd, sizeof (struct elf_segment_map));
13719 if (m == NULL)
13720 return FALSE;
13721 m->p_type = PT_ARM_EXIDX;
13722 m->count = 1;
13723 m->sections[0] = sec;
13724
13725 m->next = elf_tdata (abfd)->segment_map;
13726 elf_tdata (abfd)->segment_map = m;
13727 }
13728 }
13729
13730 return TRUE;
13731}
13732
13733/* We may add a PT_ARM_EXIDX program header. */
13734
13735static int
a6b96beb
AM		 13736elf32_arm_additional_program_headers (bfd *abfd,
13737 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 13738{
13739 asection *sec;
13740
13741 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
13742 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
13743 return 1;
13744 else
13745 return 0;
13746}
13747
fcb93ecf 13748/* We have two function types: STT_FUNC and STT_ARM_TFUNC. */
906e58ca 13749
fcb93ecf
PB		 13750static bfd_boolean
13751elf32_arm_is_function_type (unsigned int type)
13752{
0f88be7a 13753 return (type == STT_FUNC) || (type == STT_ARM_TFUNC);
fcb93ecf
PB		 13754}
13755
0beaef2b 13756/* We use this to override swap_symbol_in and swap_symbol_out. */
906e58ca
NC		 13757const struct elf_size_info elf32_arm_size_info =
13758{
0beaef2b
PB		 13759 sizeof (Elf32_External_Ehdr),
13760 sizeof (Elf32_External_Phdr),
13761 sizeof (Elf32_External_Shdr),
13762 sizeof (Elf32_External_Rel),
13763 sizeof (Elf32_External_Rela),
13764 sizeof (Elf32_External_Sym),
13765 sizeof (Elf32_External_Dyn),
13766 sizeof (Elf_External_Note),
13767 4,
13768 1,
13769 32, 2,
13770 ELFCLASS32, EV_CURRENT,
13771 bfd_elf32_write_out_phdrs,
13772 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 13773 bfd_elf32_checksum_contents,
0beaef2b
PB		 13774 bfd_elf32_write_relocs,
13775 elf32_arm_swap_symbol_in,
13776 elf32_arm_swap_symbol_out,
13777 bfd_elf32_slurp_reloc_table,
13778 bfd_elf32_slurp_symbol_table,
13779 bfd_elf32_swap_dyn_in,
13780 bfd_elf32_swap_dyn_out,
13781 bfd_elf32_swap_reloc_in,
13782 bfd_elf32_swap_reloc_out,
13783 bfd_elf32_swap_reloca_in,
13784 bfd_elf32_swap_reloca_out
13785};
13786
252b5132
RH		 13787#define ELF_ARCH bfd_arch_arm
13788#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 13789#ifdef __QNXTARGET__
13790#define ELF_MAXPAGESIZE 0x1000
13791#else
f21f3fe0 13792#define ELF_MAXPAGESIZE 0x8000
d0facd1b 13793#endif
b1342370 13794#define ELF_MINPAGESIZE 0x1000
24718e3b 13795#define ELF_COMMONPAGESIZE 0x1000
252b5132 13796
ba93b8ac
DJ		 13797#define bfd_elf32_mkobject elf32_arm_mkobject
13798
99e4ae17
AJ		 13799#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
13800#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 13801#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
13802#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
13803#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
906e58ca 13804#define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
dc810e39 13805#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
157090f7 13806#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 13807#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 13808#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 13809#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 13810#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
957c6e41 13811#define bfd_elf32_close_and_cleanup elf32_arm_close_and_cleanup
b25e3d87 13812#define bfd_elf32_bfd_free_cached_info elf32_arm_bfd_free_cached_info
3e6b1042 13813#define bfd_elf32_bfd_final_link elf32_arm_final_link
252b5132
RH		 13814
13815#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
13816#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 13817#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 13818#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
13819#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 13820#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 13821#define elf_backend_write_section elf32_arm_write_section
252b5132 13822#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 13823#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 13824#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
13825#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
13826#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
74541ad4 13827#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 13828#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 13829#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 13830#define elf_backend_object_p elf32_arm_object_p
e16bb312 13831#define elf_backend_section_flags elf32_arm_section_flags
40a18ebd
NC		 13832#define elf_backend_fake_sections elf32_arm_fake_sections
13833#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 13834#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 13835#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
b7693d02 13836#define elf_backend_symbol_processing elf32_arm_symbol_processing
0beaef2b 13837#define elf_backend_size_info elf32_arm_size_info
b294bdf8 13838#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
906e58ca
NC		 13839#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
13840#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
13841#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
13842#define elf_backend_is_function_type elf32_arm_is_function_type
13843
13844#define elf_backend_can_refcount 1
13845#define elf_backend_can_gc_sections 1
13846#define elf_backend_plt_readonly 1
13847#define elf_backend_want_got_plt 1
13848#define elf_backend_want_plt_sym 0
13849#define elf_backend_may_use_rel_p 1
13850#define elf_backend_may_use_rela_p 0
4e7fd91e 13851#define elf_backend_default_use_rela_p 0
252b5132 13852
04f7c78d 13853#define elf_backend_got_header_size 12
04f7c78d 13854
906e58ca
NC		 13855#undef elf_backend_obj_attrs_vendor
13856#define elf_backend_obj_attrs_vendor "aeabi"
13857#undef elf_backend_obj_attrs_section
13858#define elf_backend_obj_attrs_section ".ARM.attributes"
13859#undef elf_backend_obj_attrs_arg_type
13860#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
13861#undef elf_backend_obj_attrs_section_type
104d59d1 13862#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
5aa6ff7c 13863#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
104d59d1 13864
252b5132 13865#include "elf32-target.h"
7f266840 13866
906e58ca 13867/* VxWorks Targets. */
4e7fd91e 13868
906e58ca 13869#undef TARGET_LITTLE_SYM
4e7fd91e 13870#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
906e58ca 13871#undef TARGET_LITTLE_NAME
4e7fd91e 13872#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
906e58ca 13873#undef TARGET_BIG_SYM
4e7fd91e 13874#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
906e58ca 13875#undef TARGET_BIG_NAME
4e7fd91e
PB		 13876#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
13877
13878/* Like elf32_arm_link_hash_table_create -- but overrides
13879 appropriately for VxWorks. */
906e58ca 13880
4e7fd91e
PB		 13881static struct bfd_link_hash_table *
13882elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
13883{
13884 struct bfd_link_hash_table *ret;
13885
13886 ret = elf32_arm_link_hash_table_create (abfd);
13887 if (ret)
13888 {
13889 struct elf32_arm_link_hash_table *htab
00a97672 13890 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 13891 htab->use_rel = 0;
00a97672 13892 htab->vxworks_p = 1;
4e7fd91e
PB		 13893 }
13894 return ret;
906e58ca 13895}
4e7fd91e 13896
00a97672
RS		 13897static void
13898elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
13899{
13900 elf32_arm_final_write_processing (abfd, linker);
13901 elf_vxworks_final_write_processing (abfd, linker);
13902}
13903
906e58ca 13904#undef elf32_bed
4e7fd91e
PB		 13905#define elf32_bed elf32_arm_vxworks_bed
13906
906e58ca
NC		 13907#undef bfd_elf32_bfd_link_hash_table_create
13908#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
13909#undef elf_backend_add_symbol_hook
13910#define elf_backend_add_symbol_hook elf_vxworks_add_symbol_hook
13911#undef elf_backend_final_write_processing
13912#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
13913#undef elf_backend_emit_relocs
13914#define elf_backend_emit_relocs elf_vxworks_emit_relocs
4e7fd91e 13915
906e58ca 13916#undef elf_backend_may_use_rel_p
00a97672 13917#define elf_backend_may_use_rel_p 0
906e58ca 13918#undef elf_backend_may_use_rela_p
00a97672 13919#define elf_backend_may_use_rela_p 1
906e58ca 13920#undef elf_backend_default_use_rela_p
00a97672 13921#define elf_backend_default_use_rela_p 1
906e58ca 13922#undef elf_backend_want_plt_sym
00a97672 13923#define elf_backend_want_plt_sym 1
906e58ca 13924#undef ELF_MAXPAGESIZE
00a97672 13925#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 13926
13927#include "elf32-target.h"
13928
13929
906e58ca 13930/* Symbian OS Targets. */
7f266840 13931
906e58ca 13932#undef TARGET_LITTLE_SYM
7f266840 13933#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
906e58ca 13934#undef TARGET_LITTLE_NAME
7f266840 13935#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
906e58ca 13936#undef TARGET_BIG_SYM
7f266840 13937#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
906e58ca 13938#undef TARGET_BIG_NAME
7f266840
DJ		 13939#define TARGET_BIG_NAME "elf32-bigarm-symbian"
13940
13941/* Like elf32_arm_link_hash_table_create -- but overrides
13942 appropriately for Symbian OS. */
906e58ca 13943
7f266840
DJ		 13944static struct bfd_link_hash_table *
13945elf32_arm_symbian_link_hash_table_create (bfd *abfd)
13946{
13947 struct bfd_link_hash_table *ret;
13948
13949 ret = elf32_arm_link_hash_table_create (abfd);
13950 if (ret)
13951 {
13952 struct elf32_arm_link_hash_table *htab
13953 = (struct elf32_arm_link_hash_table *)ret;
13954 /* There is no PLT header for Symbian OS. */
13955 htab->plt_header_size = 0;
95720a86
DJ		 13956 /* The PLT entries are each one instruction and one word. */
13957 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
7f266840 13958 htab->symbian_p = 1;
33bfe774
JB		 13959 /* Symbian uses armv5t or above, so use_blx is always true. */
13960 htab->use_blx = 1;
67687978 13961 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 13962 }
13963 return ret;
906e58ca 13964}
7f266840 13965
b35d266b 13966static const struct bfd_elf_special_section
551b43fd 13967elf32_arm_symbian_special_sections[] =
7f266840 13968{
5cd3778d
MM		 13969 /* In a BPABI executable, the dynamic linking sections do not go in
13970 the loadable read-only segment. The post-linker may wish to
13971 refer to these sections, but they are not part of the final
13972 program image. */
0112cd26
NC		 13973 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
13974 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
13975 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
13976 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
13977 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 13978 /* These sections do not need to be writable as the SymbianOS
13979 postlinker will arrange things so that no dynamic relocation is
13980 required. */
0112cd26
NC		 13981 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
13982 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
13983 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
13984 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 13985};
13986
c3c76620 13987static void
906e58ca 13988elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 13989 struct bfd_link_info *link_info)
c3c76620
MM		 13990{
13991 /* BPABI objects are never loaded directly by an OS kernel; they are
13992 processed by a postlinker first, into an OS-specific format. If
13993 the D_PAGED bit is set on the file, BFD will align segments on
13994 page boundaries, so that an OS can directly map the file. With
13995 BPABI objects, that just results in wasted space. In addition,
13996 because we clear the D_PAGED bit, map_sections_to_segments will
13997 recognize that the program headers should not be mapped into any
13998 loadable segment. */
13999 abfd->flags &= ~D_PAGED;
906e58ca 14000 elf32_arm_begin_write_processing (abfd, link_info);
c3c76620 14001}
7f266840
DJ		 14002
14003static bfd_boolean
906e58ca 14004elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 14005 struct bfd_link_info *info)
7f266840
DJ		 14006{
14007 struct elf_segment_map *m;
14008 asection *dynsec;
14009
7f266840
DJ		 14010 /* BPABI shared libraries and executables should have a PT_DYNAMIC
14011 segment. However, because the .dynamic section is not marked
14012 with SEC_LOAD, the generic ELF code will not create such a
14013 segment. */
14014 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
14015 if (dynsec)
14016 {
8ded5a0f
AM		 14017 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
14018 if (m->p_type == PT_DYNAMIC)
14019 break;
14020
14021 if (m == NULL)
14022 {
14023 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
14024 m->next = elf_tdata (abfd)->segment_map;
14025 elf_tdata (abfd)->segment_map = m;
14026 }
7f266840
DJ		 14027 }
14028
b294bdf8
MM		 14029 /* Also call the generic arm routine. */
14030 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 14031}
14032
95720a86
DJ		 14033/* Return address for Ith PLT stub in section PLT, for relocation REL
14034 or (bfd_vma) -1 if it should not be included. */
14035
14036static bfd_vma
14037elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
14038 const arelent *rel ATTRIBUTE_UNUSED)
14039{
14040 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
14041}
14042
14043
8029a119 14044#undef elf32_bed
7f266840
DJ		 14045#define elf32_bed elf32_arm_symbian_bed
14046
14047/* The dynamic sections are not allocated on SymbianOS; the postlinker
14048 will process them and then discard them. */
906e58ca 14049#undef ELF_DYNAMIC_SEC_FLAGS
7f266840
DJ		 14050#define ELF_DYNAMIC_SEC_FLAGS \
14051 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
14052
00a97672 14053#undef elf_backend_add_symbol_hook
00a97672 14054#undef elf_backend_emit_relocs
c3c76620 14055
906e58ca
NC		 14056#undef bfd_elf32_bfd_link_hash_table_create
14057#define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
14058#undef elf_backend_special_sections
14059#define elf_backend_special_sections elf32_arm_symbian_special_sections
14060#undef elf_backend_begin_write_processing
14061#define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
14062#undef elf_backend_final_write_processing
14063#define elf_backend_final_write_processing elf32_arm_final_write_processing
14064
14065#undef elf_backend_modify_segment_map
7f266840
DJ		 14066#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
14067
14068/* There is no .got section for BPABI objects, and hence no header. */
906e58ca 14069#undef elf_backend_got_header_size
7f266840
DJ		 14070#define elf_backend_got_header_size 0
14071
14072/* Similarly, there is no .got.plt section. */
906e58ca 14073#undef elf_backend_want_got_plt
7f266840
DJ		 14074#define elf_backend_want_got_plt 0
14075
906e58ca 14076#undef elf_backend_plt_sym_val
95720a86
DJ		 14077#define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
14078
906e58ca 14079#undef elf_backend_may_use_rel_p
00a97672 14080#define elf_backend_may_use_rel_p 1
906e58ca 14081#undef elf_backend_may_use_rela_p
00a97672 14082#define elf_backend_may_use_rela_p 0
906e58ca 14083#undef elf_backend_default_use_rela_p
00a97672 14084#define elf_backend_default_use_rela_p 0
906e58ca 14085#undef elf_backend_want_plt_sym
00a97672 14086#define elf_backend_want_plt_sym 0
906e58ca 14087#undef ELF_MAXPAGESIZE
00a97672 14088#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 14089
7f266840 14090#include "elf32-target.h"
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