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252b5132 | 1 | /* 32-bit ELF support for ARM |
a2c58332 | 2 | Copyright (C) 1998-2022 Free Software Foundation, Inc. |
252b5132 RH |
3 | |
4 | This file is part of BFD, the Binary File Descriptor library. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
cd123cb7 | 8 | the Free Software Foundation; either version 3 of the License, or |
252b5132 RH |
9 | (at your option) any later version. |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
cd123cb7 NC |
18 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, |
19 | MA 02110-1301, USA. */ | |
252b5132 | 20 | |
6e6718a3 | 21 | #include "sysdep.h" |
2468f9c9 PB |
22 | #include <limits.h> |
23 | ||
3db64b00 | 24 | #include "bfd.h" |
00a97672 | 25 | #include "libiberty.h" |
7f266840 DJ |
26 | #include "libbfd.h" |
27 | #include "elf-bfd.h" | |
b38cadfb | 28 | #include "elf-nacl.h" |
00a97672 | 29 | #include "elf-vxworks.h" |
ee065d83 | 30 | #include "elf/arm.h" |
f37164d7 AM |
31 | #include "elf32-arm.h" |
32 | #include "cpu-arm.h" | |
7f266840 | 33 | |
00a97672 RS |
34 | /* Return the relocation section associated with NAME. HTAB is the |
35 | bfd's elf32_arm_link_hash_entry. */ | |
36 | #define RELOC_SECTION(HTAB, NAME) \ | |
37 | ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME) | |
38 | ||
39 | /* Return size of a relocation entry. HTAB is the bfd's | |
40 | elf32_arm_link_hash_entry. */ | |
41 | #define RELOC_SIZE(HTAB) \ | |
42 | ((HTAB)->use_rel \ | |
43 | ? sizeof (Elf32_External_Rel) \ | |
44 | : sizeof (Elf32_External_Rela)) | |
45 | ||
46 | /* Return function to swap relocations in. HTAB is the bfd's | |
47 | elf32_arm_link_hash_entry. */ | |
48 | #define SWAP_RELOC_IN(HTAB) \ | |
49 | ((HTAB)->use_rel \ | |
50 | ? bfd_elf32_swap_reloc_in \ | |
51 | : bfd_elf32_swap_reloca_in) | |
52 | ||
53 | /* Return function to swap relocations out. HTAB is the bfd's | |
54 | elf32_arm_link_hash_entry. */ | |
55 | #define SWAP_RELOC_OUT(HTAB) \ | |
56 | ((HTAB)->use_rel \ | |
57 | ? bfd_elf32_swap_reloc_out \ | |
58 | : bfd_elf32_swap_reloca_out) | |
59 | ||
f3185997 | 60 | #define elf_info_to_howto NULL |
07d6d2b8 | 61 | #define elf_info_to_howto_rel elf32_arm_info_to_howto |
7f266840 DJ |
62 | |
63 | #define ARM_ELF_ABI_VERSION 0 | |
64 | #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM | |
65 | ||
79f08007 YZ |
66 | /* The Adjusted Place, as defined by AAELF. */ |
67 | #define Pa(X) ((X) & 0xfffffffc) | |
68 | ||
0a1b45a2 AM |
69 | static bool elf32_arm_write_section (bfd *output_bfd, |
70 | struct bfd_link_info *link_info, | |
71 | asection *sec, | |
72 | bfd_byte *contents); | |
3e6b1042 | 73 | |
7f266840 DJ |
74 | /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g. |
75 | R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO | |
76 | in that slot. */ | |
77 | ||
c19d1205 | 78 | static reloc_howto_type elf32_arm_howto_table_1[] = |
7f266840 | 79 | { |
8029a119 | 80 | /* No relocation. */ |
7f266840 DJ |
81 | HOWTO (R_ARM_NONE, /* type */ |
82 | 0, /* rightshift */ | |
c94cb026 | 83 | 0, /* size */ |
7f266840 | 84 | 0, /* bitsize */ |
0a1b45a2 | 85 | false, /* pc_relative */ |
7f266840 DJ |
86 | 0, /* bitpos */ |
87 | complain_overflow_dont,/* complain_on_overflow */ | |
88 | bfd_elf_generic_reloc, /* special_function */ | |
89 | "R_ARM_NONE", /* name */ | |
0a1b45a2 | 90 | false, /* partial_inplace */ |
7f266840 DJ |
91 | 0, /* src_mask */ |
92 | 0, /* dst_mask */ | |
0a1b45a2 | 93 | false), /* pcrel_offset */ |
7f266840 DJ |
94 | |
95 | HOWTO (R_ARM_PC24, /* type */ | |
96 | 2, /* rightshift */ | |
c94cb026 | 97 | 4, /* size */ |
7f266840 | 98 | 24, /* bitsize */ |
0a1b45a2 | 99 | true, /* pc_relative */ |
7f266840 DJ |
100 | 0, /* bitpos */ |
101 | complain_overflow_signed,/* complain_on_overflow */ | |
102 | bfd_elf_generic_reloc, /* special_function */ | |
103 | "R_ARM_PC24", /* name */ | |
0a1b45a2 | 104 | false, /* partial_inplace */ |
7f266840 DJ |
105 | 0x00ffffff, /* src_mask */ |
106 | 0x00ffffff, /* dst_mask */ | |
0a1b45a2 | 107 | true), /* pcrel_offset */ |
7f266840 DJ |
108 | |
109 | /* 32 bit absolute */ | |
110 | HOWTO (R_ARM_ABS32, /* type */ | |
111 | 0, /* rightshift */ | |
c94cb026 | 112 | 4, /* size */ |
7f266840 | 113 | 32, /* bitsize */ |
0a1b45a2 | 114 | false, /* pc_relative */ |
7f266840 DJ |
115 | 0, /* bitpos */ |
116 | complain_overflow_bitfield,/* complain_on_overflow */ | |
117 | bfd_elf_generic_reloc, /* special_function */ | |
118 | "R_ARM_ABS32", /* name */ | |
0a1b45a2 | 119 | false, /* partial_inplace */ |
7f266840 DJ |
120 | 0xffffffff, /* src_mask */ |
121 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 122 | false), /* pcrel_offset */ |
7f266840 DJ |
123 | |
124 | /* standard 32bit pc-relative reloc */ | |
125 | HOWTO (R_ARM_REL32, /* type */ | |
126 | 0, /* rightshift */ | |
c94cb026 | 127 | 4, /* size */ |
7f266840 | 128 | 32, /* bitsize */ |
0a1b45a2 | 129 | true, /* pc_relative */ |
7f266840 DJ |
130 | 0, /* bitpos */ |
131 | complain_overflow_bitfield,/* complain_on_overflow */ | |
132 | bfd_elf_generic_reloc, /* special_function */ | |
133 | "R_ARM_REL32", /* name */ | |
0a1b45a2 | 134 | false, /* partial_inplace */ |
7f266840 DJ |
135 | 0xffffffff, /* src_mask */ |
136 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 137 | true), /* pcrel_offset */ |
7f266840 | 138 | |
c19d1205 | 139 | /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */ |
4962c51a | 140 | HOWTO (R_ARM_LDR_PC_G0, /* type */ |
7f266840 | 141 | 0, /* rightshift */ |
c94cb026 | 142 | 1, /* size */ |
4962c51a | 143 | 32, /* bitsize */ |
0a1b45a2 | 144 | true, /* pc_relative */ |
7f266840 | 145 | 0, /* bitpos */ |
4962c51a | 146 | complain_overflow_dont,/* complain_on_overflow */ |
7f266840 | 147 | bfd_elf_generic_reloc, /* special_function */ |
4962c51a | 148 | "R_ARM_LDR_PC_G0", /* name */ |
0a1b45a2 | 149 | false, /* partial_inplace */ |
4962c51a MS |
150 | 0xffffffff, /* src_mask */ |
151 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 152 | true), /* pcrel_offset */ |
7f266840 DJ |
153 | |
154 | /* 16 bit absolute */ | |
155 | HOWTO (R_ARM_ABS16, /* type */ | |
156 | 0, /* rightshift */ | |
c94cb026 | 157 | 2, /* size */ |
7f266840 | 158 | 16, /* bitsize */ |
0a1b45a2 | 159 | false, /* pc_relative */ |
7f266840 DJ |
160 | 0, /* bitpos */ |
161 | complain_overflow_bitfield,/* complain_on_overflow */ | |
162 | bfd_elf_generic_reloc, /* special_function */ | |
163 | "R_ARM_ABS16", /* name */ | |
0a1b45a2 | 164 | false, /* partial_inplace */ |
7f266840 DJ |
165 | 0x0000ffff, /* src_mask */ |
166 | 0x0000ffff, /* dst_mask */ | |
0a1b45a2 | 167 | false), /* pcrel_offset */ |
7f266840 DJ |
168 | |
169 | /* 12 bit absolute */ | |
170 | HOWTO (R_ARM_ABS12, /* type */ | |
171 | 0, /* rightshift */ | |
c94cb026 | 172 | 4, /* size */ |
7f266840 | 173 | 12, /* bitsize */ |
0a1b45a2 | 174 | false, /* pc_relative */ |
7f266840 DJ |
175 | 0, /* bitpos */ |
176 | complain_overflow_bitfield,/* complain_on_overflow */ | |
177 | bfd_elf_generic_reloc, /* special_function */ | |
178 | "R_ARM_ABS12", /* name */ | |
0a1b45a2 | 179 | false, /* partial_inplace */ |
00a97672 RS |
180 | 0x00000fff, /* src_mask */ |
181 | 0x00000fff, /* dst_mask */ | |
0a1b45a2 | 182 | false), /* pcrel_offset */ |
7f266840 DJ |
183 | |
184 | HOWTO (R_ARM_THM_ABS5, /* type */ | |
185 | 6, /* rightshift */ | |
c94cb026 | 186 | 2, /* size */ |
7f266840 | 187 | 5, /* bitsize */ |
0a1b45a2 | 188 | false, /* pc_relative */ |
7f266840 DJ |
189 | 0, /* bitpos */ |
190 | complain_overflow_bitfield,/* complain_on_overflow */ | |
191 | bfd_elf_generic_reloc, /* special_function */ | |
192 | "R_ARM_THM_ABS5", /* name */ | |
0a1b45a2 | 193 | false, /* partial_inplace */ |
7f266840 DJ |
194 | 0x000007e0, /* src_mask */ |
195 | 0x000007e0, /* dst_mask */ | |
0a1b45a2 | 196 | false), /* pcrel_offset */ |
7f266840 DJ |
197 | |
198 | /* 8 bit absolute */ | |
199 | HOWTO (R_ARM_ABS8, /* type */ | |
200 | 0, /* rightshift */ | |
c94cb026 | 201 | 1, /* size */ |
7f266840 | 202 | 8, /* bitsize */ |
0a1b45a2 | 203 | false, /* pc_relative */ |
7f266840 DJ |
204 | 0, /* bitpos */ |
205 | complain_overflow_bitfield,/* complain_on_overflow */ | |
206 | bfd_elf_generic_reloc, /* special_function */ | |
207 | "R_ARM_ABS8", /* name */ | |
0a1b45a2 | 208 | false, /* partial_inplace */ |
7f266840 DJ |
209 | 0x000000ff, /* src_mask */ |
210 | 0x000000ff, /* dst_mask */ | |
0a1b45a2 | 211 | false), /* pcrel_offset */ |
7f266840 DJ |
212 | |
213 | HOWTO (R_ARM_SBREL32, /* type */ | |
214 | 0, /* rightshift */ | |
c94cb026 | 215 | 4, /* size */ |
7f266840 | 216 | 32, /* bitsize */ |
0a1b45a2 | 217 | false, /* pc_relative */ |
7f266840 DJ |
218 | 0, /* bitpos */ |
219 | complain_overflow_dont,/* complain_on_overflow */ | |
220 | bfd_elf_generic_reloc, /* special_function */ | |
221 | "R_ARM_SBREL32", /* name */ | |
0a1b45a2 | 222 | false, /* partial_inplace */ |
7f266840 DJ |
223 | 0xffffffff, /* src_mask */ |
224 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 225 | false), /* pcrel_offset */ |
7f266840 | 226 | |
c19d1205 | 227 | HOWTO (R_ARM_THM_CALL, /* type */ |
7f266840 | 228 | 1, /* rightshift */ |
c94cb026 | 229 | 4, /* size */ |
f6ebfac0 | 230 | 24, /* bitsize */ |
0a1b45a2 | 231 | true, /* pc_relative */ |
7f266840 DJ |
232 | 0, /* bitpos */ |
233 | complain_overflow_signed,/* complain_on_overflow */ | |
234 | bfd_elf_generic_reloc, /* special_function */ | |
c19d1205 | 235 | "R_ARM_THM_CALL", /* name */ |
0a1b45a2 | 236 | false, /* partial_inplace */ |
7f6ab9f8 AM |
237 | 0x07ff2fff, /* src_mask */ |
238 | 0x07ff2fff, /* dst_mask */ | |
0a1b45a2 | 239 | true), /* pcrel_offset */ |
7f266840 | 240 | |
07d6d2b8 | 241 | HOWTO (R_ARM_THM_PC8, /* type */ |
7f266840 | 242 | 1, /* rightshift */ |
c94cb026 | 243 | 2, /* size */ |
7f266840 | 244 | 8, /* bitsize */ |
0a1b45a2 | 245 | true, /* pc_relative */ |
7f266840 DJ |
246 | 0, /* bitpos */ |
247 | complain_overflow_signed,/* complain_on_overflow */ | |
248 | bfd_elf_generic_reloc, /* special_function */ | |
249 | "R_ARM_THM_PC8", /* name */ | |
0a1b45a2 | 250 | false, /* partial_inplace */ |
7f266840 DJ |
251 | 0x000000ff, /* src_mask */ |
252 | 0x000000ff, /* dst_mask */ | |
0a1b45a2 | 253 | true), /* pcrel_offset */ |
7f266840 | 254 | |
c19d1205 | 255 | HOWTO (R_ARM_BREL_ADJ, /* type */ |
7f266840 | 256 | 1, /* rightshift */ |
c94cb026 | 257 | 2, /* size */ |
c19d1205 | 258 | 32, /* bitsize */ |
0a1b45a2 | 259 | false, /* pc_relative */ |
7f266840 DJ |
260 | 0, /* bitpos */ |
261 | complain_overflow_signed,/* complain_on_overflow */ | |
262 | bfd_elf_generic_reloc, /* special_function */ | |
c19d1205 | 263 | "R_ARM_BREL_ADJ", /* name */ |
0a1b45a2 | 264 | false, /* partial_inplace */ |
c19d1205 ZW |
265 | 0xffffffff, /* src_mask */ |
266 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 267 | false), /* pcrel_offset */ |
7f266840 | 268 | |
0855e32b | 269 | HOWTO (R_ARM_TLS_DESC, /* type */ |
7f266840 | 270 | 0, /* rightshift */ |
c94cb026 | 271 | 4, /* size */ |
0855e32b | 272 | 32, /* bitsize */ |
0a1b45a2 | 273 | false, /* pc_relative */ |
7f266840 | 274 | 0, /* bitpos */ |
0855e32b | 275 | complain_overflow_bitfield,/* complain_on_overflow */ |
7f266840 | 276 | bfd_elf_generic_reloc, /* special_function */ |
0855e32b | 277 | "R_ARM_TLS_DESC", /* name */ |
0a1b45a2 | 278 | false, /* partial_inplace */ |
0855e32b NS |
279 | 0xffffffff, /* src_mask */ |
280 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 281 | false), /* pcrel_offset */ |
7f266840 DJ |
282 | |
283 | HOWTO (R_ARM_THM_SWI8, /* type */ | |
284 | 0, /* rightshift */ | |
5d0feb98 | 285 | 0, /* size */ |
7f266840 | 286 | 0, /* bitsize */ |
0a1b45a2 | 287 | false, /* pc_relative */ |
7f266840 DJ |
288 | 0, /* bitpos */ |
289 | complain_overflow_signed,/* complain_on_overflow */ | |
290 | bfd_elf_generic_reloc, /* special_function */ | |
291 | "R_ARM_SWI8", /* name */ | |
0a1b45a2 | 292 | false, /* partial_inplace */ |
7f266840 DJ |
293 | 0x00000000, /* src_mask */ |
294 | 0x00000000, /* dst_mask */ | |
0a1b45a2 | 295 | false), /* pcrel_offset */ |
7f266840 DJ |
296 | |
297 | /* BLX instruction for the ARM. */ | |
298 | HOWTO (R_ARM_XPC25, /* type */ | |
299 | 2, /* rightshift */ | |
c94cb026 | 300 | 4, /* size */ |
7f6ab9f8 | 301 | 24, /* bitsize */ |
0a1b45a2 | 302 | true, /* pc_relative */ |
7f266840 DJ |
303 | 0, /* bitpos */ |
304 | complain_overflow_signed,/* complain_on_overflow */ | |
305 | bfd_elf_generic_reloc, /* special_function */ | |
306 | "R_ARM_XPC25", /* name */ | |
0a1b45a2 | 307 | false, /* partial_inplace */ |
7f266840 DJ |
308 | 0x00ffffff, /* src_mask */ |
309 | 0x00ffffff, /* dst_mask */ | |
0a1b45a2 | 310 | true), /* pcrel_offset */ |
7f266840 DJ |
311 | |
312 | /* BLX instruction for the Thumb. */ | |
313 | HOWTO (R_ARM_THM_XPC22, /* type */ | |
314 | 2, /* rightshift */ | |
c94cb026 | 315 | 4, /* size */ |
7f6ab9f8 | 316 | 24, /* bitsize */ |
0a1b45a2 | 317 | true, /* pc_relative */ |
7f266840 DJ |
318 | 0, /* bitpos */ |
319 | complain_overflow_signed,/* complain_on_overflow */ | |
320 | bfd_elf_generic_reloc, /* special_function */ | |
321 | "R_ARM_THM_XPC22", /* name */ | |
0a1b45a2 | 322 | false, /* partial_inplace */ |
7f6ab9f8 AM |
323 | 0x07ff2fff, /* src_mask */ |
324 | 0x07ff2fff, /* dst_mask */ | |
0a1b45a2 | 325 | true), /* pcrel_offset */ |
7f266840 | 326 | |
ba93b8ac | 327 | /* Dynamic TLS relocations. */ |
7f266840 | 328 | |
ba93b8ac | 329 | HOWTO (R_ARM_TLS_DTPMOD32, /* type */ |
07d6d2b8 | 330 | 0, /* rightshift */ |
c94cb026 | 331 | 4, /* size */ |
07d6d2b8 | 332 | 32, /* bitsize */ |
0a1b45a2 | 333 | false, /* pc_relative */ |
07d6d2b8 | 334 | 0, /* bitpos */ |
99059e56 RM |
335 | complain_overflow_bitfield,/* complain_on_overflow */ |
336 | bfd_elf_generic_reloc, /* special_function */ | |
337 | "R_ARM_TLS_DTPMOD32", /* name */ | |
0a1b45a2 | 338 | true, /* partial_inplace */ |
99059e56 RM |
339 | 0xffffffff, /* src_mask */ |
340 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 341 | false), /* pcrel_offset */ |
7f266840 | 342 | |
ba93b8ac | 343 | HOWTO (R_ARM_TLS_DTPOFF32, /* type */ |
07d6d2b8 | 344 | 0, /* rightshift */ |
c94cb026 | 345 | 4, /* size */ |
07d6d2b8 | 346 | 32, /* bitsize */ |
0a1b45a2 | 347 | false, /* pc_relative */ |
07d6d2b8 | 348 | 0, /* bitpos */ |
99059e56 RM |
349 | complain_overflow_bitfield,/* complain_on_overflow */ |
350 | bfd_elf_generic_reloc, /* special_function */ | |
351 | "R_ARM_TLS_DTPOFF32", /* name */ | |
0a1b45a2 | 352 | true, /* partial_inplace */ |
99059e56 RM |
353 | 0xffffffff, /* src_mask */ |
354 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 355 | false), /* pcrel_offset */ |
7f266840 | 356 | |
ba93b8ac | 357 | HOWTO (R_ARM_TLS_TPOFF32, /* type */ |
07d6d2b8 | 358 | 0, /* rightshift */ |
c94cb026 | 359 | 4, /* size */ |
07d6d2b8 | 360 | 32, /* bitsize */ |
0a1b45a2 | 361 | false, /* pc_relative */ |
07d6d2b8 | 362 | 0, /* bitpos */ |
99059e56 RM |
363 | complain_overflow_bitfield,/* complain_on_overflow */ |
364 | bfd_elf_generic_reloc, /* special_function */ | |
365 | "R_ARM_TLS_TPOFF32", /* name */ | |
0a1b45a2 | 366 | true, /* partial_inplace */ |
99059e56 RM |
367 | 0xffffffff, /* src_mask */ |
368 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 369 | false), /* pcrel_offset */ |
7f266840 DJ |
370 | |
371 | /* Relocs used in ARM Linux */ | |
372 | ||
373 | HOWTO (R_ARM_COPY, /* type */ | |
07d6d2b8 | 374 | 0, /* rightshift */ |
c94cb026 | 375 | 4, /* size */ |
07d6d2b8 | 376 | 32, /* bitsize */ |
0a1b45a2 | 377 | false, /* pc_relative */ |
07d6d2b8 | 378 | 0, /* bitpos */ |
99059e56 RM |
379 | complain_overflow_bitfield,/* complain_on_overflow */ |
380 | bfd_elf_generic_reloc, /* special_function */ | |
381 | "R_ARM_COPY", /* name */ | |
0a1b45a2 | 382 | true, /* partial_inplace */ |
99059e56 RM |
383 | 0xffffffff, /* src_mask */ |
384 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 385 | false), /* pcrel_offset */ |
7f266840 DJ |
386 | |
387 | HOWTO (R_ARM_GLOB_DAT, /* type */ | |
07d6d2b8 | 388 | 0, /* rightshift */ |
c94cb026 | 389 | 4, /* size */ |
07d6d2b8 | 390 | 32, /* bitsize */ |
0a1b45a2 | 391 | false, /* pc_relative */ |
07d6d2b8 | 392 | 0, /* bitpos */ |
99059e56 RM |
393 | complain_overflow_bitfield,/* complain_on_overflow */ |
394 | bfd_elf_generic_reloc, /* special_function */ | |
395 | "R_ARM_GLOB_DAT", /* name */ | |
0a1b45a2 | 396 | true, /* partial_inplace */ |
99059e56 RM |
397 | 0xffffffff, /* src_mask */ |
398 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 399 | false), /* pcrel_offset */ |
7f266840 DJ |
400 | |
401 | HOWTO (R_ARM_JUMP_SLOT, /* type */ | |
07d6d2b8 | 402 | 0, /* rightshift */ |
c94cb026 | 403 | 4, /* size */ |
07d6d2b8 | 404 | 32, /* bitsize */ |
0a1b45a2 | 405 | false, /* pc_relative */ |
07d6d2b8 | 406 | 0, /* bitpos */ |
99059e56 RM |
407 | complain_overflow_bitfield,/* complain_on_overflow */ |
408 | bfd_elf_generic_reloc, /* special_function */ | |
409 | "R_ARM_JUMP_SLOT", /* name */ | |
0a1b45a2 | 410 | true, /* partial_inplace */ |
99059e56 RM |
411 | 0xffffffff, /* src_mask */ |
412 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 413 | false), /* pcrel_offset */ |
7f266840 DJ |
414 | |
415 | HOWTO (R_ARM_RELATIVE, /* type */ | |
07d6d2b8 | 416 | 0, /* rightshift */ |
c94cb026 | 417 | 4, /* size */ |
07d6d2b8 | 418 | 32, /* bitsize */ |
0a1b45a2 | 419 | false, /* pc_relative */ |
07d6d2b8 | 420 | 0, /* bitpos */ |
99059e56 RM |
421 | complain_overflow_bitfield,/* complain_on_overflow */ |
422 | bfd_elf_generic_reloc, /* special_function */ | |
423 | "R_ARM_RELATIVE", /* name */ | |
0a1b45a2 | 424 | true, /* partial_inplace */ |
99059e56 RM |
425 | 0xffffffff, /* src_mask */ |
426 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 427 | false), /* pcrel_offset */ |
7f266840 | 428 | |
c19d1205 | 429 | HOWTO (R_ARM_GOTOFF32, /* type */ |
07d6d2b8 | 430 | 0, /* rightshift */ |
c94cb026 | 431 | 4, /* size */ |
07d6d2b8 | 432 | 32, /* bitsize */ |
0a1b45a2 | 433 | false, /* pc_relative */ |
07d6d2b8 | 434 | 0, /* bitpos */ |
99059e56 RM |
435 | complain_overflow_bitfield,/* complain_on_overflow */ |
436 | bfd_elf_generic_reloc, /* special_function */ | |
437 | "R_ARM_GOTOFF32", /* name */ | |
0a1b45a2 | 438 | true, /* partial_inplace */ |
99059e56 RM |
439 | 0xffffffff, /* src_mask */ |
440 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 441 | false), /* pcrel_offset */ |
7f266840 DJ |
442 | |
443 | HOWTO (R_ARM_GOTPC, /* type */ | |
07d6d2b8 | 444 | 0, /* rightshift */ |
c94cb026 | 445 | 4, /* size */ |
07d6d2b8 | 446 | 32, /* bitsize */ |
0a1b45a2 | 447 | true, /* pc_relative */ |
07d6d2b8 | 448 | 0, /* bitpos */ |
99059e56 RM |
449 | complain_overflow_bitfield,/* complain_on_overflow */ |
450 | bfd_elf_generic_reloc, /* special_function */ | |
451 | "R_ARM_GOTPC", /* name */ | |
0a1b45a2 | 452 | true, /* partial_inplace */ |
99059e56 RM |
453 | 0xffffffff, /* src_mask */ |
454 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 455 | true), /* pcrel_offset */ |
7f266840 DJ |
456 | |
457 | HOWTO (R_ARM_GOT32, /* type */ | |
07d6d2b8 | 458 | 0, /* rightshift */ |
c94cb026 | 459 | 4, /* size */ |
07d6d2b8 | 460 | 32, /* bitsize */ |
0a1b45a2 | 461 | false, /* pc_relative */ |
07d6d2b8 | 462 | 0, /* bitpos */ |
99059e56 RM |
463 | complain_overflow_bitfield,/* complain_on_overflow */ |
464 | bfd_elf_generic_reloc, /* special_function */ | |
465 | "R_ARM_GOT32", /* name */ | |
0a1b45a2 | 466 | true, /* partial_inplace */ |
99059e56 RM |
467 | 0xffffffff, /* src_mask */ |
468 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 469 | false), /* pcrel_offset */ |
7f266840 DJ |
470 | |
471 | HOWTO (R_ARM_PLT32, /* type */ | |
07d6d2b8 | 472 | 2, /* rightshift */ |
c94cb026 | 473 | 4, /* size */ |
07d6d2b8 | 474 | 24, /* bitsize */ |
0a1b45a2 | 475 | true, /* pc_relative */ |
07d6d2b8 | 476 | 0, /* bitpos */ |
99059e56 RM |
477 | complain_overflow_bitfield,/* complain_on_overflow */ |
478 | bfd_elf_generic_reloc, /* special_function */ | |
479 | "R_ARM_PLT32", /* name */ | |
0a1b45a2 | 480 | false, /* partial_inplace */ |
99059e56 RM |
481 | 0x00ffffff, /* src_mask */ |
482 | 0x00ffffff, /* dst_mask */ | |
0a1b45a2 | 483 | true), /* pcrel_offset */ |
7f266840 DJ |
484 | |
485 | HOWTO (R_ARM_CALL, /* type */ | |
486 | 2, /* rightshift */ | |
c94cb026 | 487 | 4, /* size */ |
7f266840 | 488 | 24, /* bitsize */ |
0a1b45a2 | 489 | true, /* pc_relative */ |
7f266840 DJ |
490 | 0, /* bitpos */ |
491 | complain_overflow_signed,/* complain_on_overflow */ | |
492 | bfd_elf_generic_reloc, /* special_function */ | |
493 | "R_ARM_CALL", /* name */ | |
0a1b45a2 | 494 | false, /* partial_inplace */ |
7f266840 DJ |
495 | 0x00ffffff, /* src_mask */ |
496 | 0x00ffffff, /* dst_mask */ | |
0a1b45a2 | 497 | true), /* pcrel_offset */ |
7f266840 DJ |
498 | |
499 | HOWTO (R_ARM_JUMP24, /* type */ | |
500 | 2, /* rightshift */ | |
c94cb026 | 501 | 4, /* size */ |
7f266840 | 502 | 24, /* bitsize */ |
0a1b45a2 | 503 | true, /* pc_relative */ |
7f266840 DJ |
504 | 0, /* bitpos */ |
505 | complain_overflow_signed,/* complain_on_overflow */ | |
506 | bfd_elf_generic_reloc, /* special_function */ | |
507 | "R_ARM_JUMP24", /* name */ | |
0a1b45a2 | 508 | false, /* partial_inplace */ |
7f266840 DJ |
509 | 0x00ffffff, /* src_mask */ |
510 | 0x00ffffff, /* dst_mask */ | |
0a1b45a2 | 511 | true), /* pcrel_offset */ |
7f266840 | 512 | |
c19d1205 ZW |
513 | HOWTO (R_ARM_THM_JUMP24, /* type */ |
514 | 1, /* rightshift */ | |
c94cb026 | 515 | 4, /* size */ |
c19d1205 | 516 | 24, /* bitsize */ |
0a1b45a2 | 517 | true, /* pc_relative */ |
7f266840 | 518 | 0, /* bitpos */ |
c19d1205 | 519 | complain_overflow_signed,/* complain_on_overflow */ |
7f266840 | 520 | bfd_elf_generic_reloc, /* special_function */ |
c19d1205 | 521 | "R_ARM_THM_JUMP24", /* name */ |
0a1b45a2 | 522 | false, /* partial_inplace */ |
c19d1205 ZW |
523 | 0x07ff2fff, /* src_mask */ |
524 | 0x07ff2fff, /* dst_mask */ | |
0a1b45a2 | 525 | true), /* pcrel_offset */ |
7f266840 | 526 | |
c19d1205 | 527 | HOWTO (R_ARM_BASE_ABS, /* type */ |
7f266840 | 528 | 0, /* rightshift */ |
c94cb026 | 529 | 4, /* size */ |
c19d1205 | 530 | 32, /* bitsize */ |
0a1b45a2 | 531 | false, /* pc_relative */ |
7f266840 DJ |
532 | 0, /* bitpos */ |
533 | complain_overflow_dont,/* complain_on_overflow */ | |
534 | bfd_elf_generic_reloc, /* special_function */ | |
c19d1205 | 535 | "R_ARM_BASE_ABS", /* name */ |
0a1b45a2 | 536 | false, /* partial_inplace */ |
c19d1205 ZW |
537 | 0xffffffff, /* src_mask */ |
538 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 539 | false), /* pcrel_offset */ |
7f266840 DJ |
540 | |
541 | HOWTO (R_ARM_ALU_PCREL7_0, /* type */ | |
542 | 0, /* rightshift */ | |
c94cb026 | 543 | 4, /* size */ |
7f266840 | 544 | 12, /* bitsize */ |
0a1b45a2 | 545 | true, /* pc_relative */ |
7f266840 DJ |
546 | 0, /* bitpos */ |
547 | complain_overflow_dont,/* complain_on_overflow */ | |
548 | bfd_elf_generic_reloc, /* special_function */ | |
549 | "R_ARM_ALU_PCREL_7_0", /* name */ | |
0a1b45a2 | 550 | false, /* partial_inplace */ |
7f266840 DJ |
551 | 0x00000fff, /* src_mask */ |
552 | 0x00000fff, /* dst_mask */ | |
0a1b45a2 | 553 | true), /* pcrel_offset */ |
7f266840 DJ |
554 | |
555 | HOWTO (R_ARM_ALU_PCREL15_8, /* type */ | |
556 | 0, /* rightshift */ | |
c94cb026 | 557 | 4, /* size */ |
7f266840 | 558 | 12, /* bitsize */ |
0a1b45a2 | 559 | true, /* pc_relative */ |
7f266840 DJ |
560 | 8, /* bitpos */ |
561 | complain_overflow_dont,/* complain_on_overflow */ | |
562 | bfd_elf_generic_reloc, /* special_function */ | |
563 | "R_ARM_ALU_PCREL_15_8",/* name */ | |
0a1b45a2 | 564 | false, /* partial_inplace */ |
7f266840 DJ |
565 | 0x00000fff, /* src_mask */ |
566 | 0x00000fff, /* dst_mask */ | |
0a1b45a2 | 567 | true), /* pcrel_offset */ |
7f266840 DJ |
568 | |
569 | HOWTO (R_ARM_ALU_PCREL23_15, /* type */ | |
570 | 0, /* rightshift */ | |
c94cb026 | 571 | 4, /* size */ |
7f266840 | 572 | 12, /* bitsize */ |
0a1b45a2 | 573 | true, /* pc_relative */ |
7f266840 DJ |
574 | 16, /* bitpos */ |
575 | complain_overflow_dont,/* complain_on_overflow */ | |
576 | bfd_elf_generic_reloc, /* special_function */ | |
577 | "R_ARM_ALU_PCREL_23_15",/* name */ | |
0a1b45a2 | 578 | false, /* partial_inplace */ |
7f266840 DJ |
579 | 0x00000fff, /* src_mask */ |
580 | 0x00000fff, /* dst_mask */ | |
0a1b45a2 | 581 | true), /* pcrel_offset */ |
7f266840 DJ |
582 | |
583 | HOWTO (R_ARM_LDR_SBREL_11_0, /* type */ | |
584 | 0, /* rightshift */ | |
c94cb026 | 585 | 4, /* size */ |
7f266840 | 586 | 12, /* bitsize */ |
0a1b45a2 | 587 | false, /* pc_relative */ |
7f266840 DJ |
588 | 0, /* bitpos */ |
589 | complain_overflow_dont,/* complain_on_overflow */ | |
590 | bfd_elf_generic_reloc, /* special_function */ | |
591 | "R_ARM_LDR_SBREL_11_0",/* name */ | |
0a1b45a2 | 592 | false, /* partial_inplace */ |
7f266840 DJ |
593 | 0x00000fff, /* src_mask */ |
594 | 0x00000fff, /* dst_mask */ | |
0a1b45a2 | 595 | false), /* pcrel_offset */ |
7f266840 DJ |
596 | |
597 | HOWTO (R_ARM_ALU_SBREL_19_12, /* type */ | |
598 | 0, /* rightshift */ | |
c94cb026 | 599 | 4, /* size */ |
7f266840 | 600 | 8, /* bitsize */ |
0a1b45a2 | 601 | false, /* pc_relative */ |
7f266840 DJ |
602 | 12, /* bitpos */ |
603 | complain_overflow_dont,/* complain_on_overflow */ | |
604 | bfd_elf_generic_reloc, /* special_function */ | |
605 | "R_ARM_ALU_SBREL_19_12",/* name */ | |
0a1b45a2 | 606 | false, /* partial_inplace */ |
7f266840 DJ |
607 | 0x000ff000, /* src_mask */ |
608 | 0x000ff000, /* dst_mask */ | |
0a1b45a2 | 609 | false), /* pcrel_offset */ |
7f266840 DJ |
610 | |
611 | HOWTO (R_ARM_ALU_SBREL_27_20, /* type */ | |
612 | 0, /* rightshift */ | |
c94cb026 | 613 | 4, /* size */ |
7f266840 | 614 | 8, /* bitsize */ |
0a1b45a2 | 615 | false, /* pc_relative */ |
7f266840 DJ |
616 | 20, /* bitpos */ |
617 | complain_overflow_dont,/* complain_on_overflow */ | |
618 | bfd_elf_generic_reloc, /* special_function */ | |
619 | "R_ARM_ALU_SBREL_27_20",/* name */ | |
0a1b45a2 | 620 | false, /* partial_inplace */ |
7f266840 DJ |
621 | 0x0ff00000, /* src_mask */ |
622 | 0x0ff00000, /* dst_mask */ | |
0a1b45a2 | 623 | false), /* pcrel_offset */ |
7f266840 DJ |
624 | |
625 | HOWTO (R_ARM_TARGET1, /* type */ | |
626 | 0, /* rightshift */ | |
c94cb026 | 627 | 4, /* size */ |
7f266840 | 628 | 32, /* bitsize */ |
0a1b45a2 | 629 | false, /* pc_relative */ |
7f266840 DJ |
630 | 0, /* bitpos */ |
631 | complain_overflow_dont,/* complain_on_overflow */ | |
632 | bfd_elf_generic_reloc, /* special_function */ | |
633 | "R_ARM_TARGET1", /* name */ | |
0a1b45a2 | 634 | false, /* partial_inplace */ |
7f266840 DJ |
635 | 0xffffffff, /* src_mask */ |
636 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 637 | false), /* pcrel_offset */ |
7f266840 DJ |
638 | |
639 | HOWTO (R_ARM_ROSEGREL32, /* type */ | |
640 | 0, /* rightshift */ | |
c94cb026 | 641 | 4, /* size */ |
7f266840 | 642 | 32, /* bitsize */ |
0a1b45a2 | 643 | false, /* pc_relative */ |
7f266840 DJ |
644 | 0, /* bitpos */ |
645 | complain_overflow_dont,/* complain_on_overflow */ | |
646 | bfd_elf_generic_reloc, /* special_function */ | |
647 | "R_ARM_ROSEGREL32", /* name */ | |
0a1b45a2 | 648 | false, /* partial_inplace */ |
7f266840 DJ |
649 | 0xffffffff, /* src_mask */ |
650 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 651 | false), /* pcrel_offset */ |
7f266840 DJ |
652 | |
653 | HOWTO (R_ARM_V4BX, /* type */ | |
654 | 0, /* rightshift */ | |
c94cb026 | 655 | 4, /* size */ |
7f266840 | 656 | 32, /* bitsize */ |
0a1b45a2 | 657 | false, /* pc_relative */ |
7f266840 DJ |
658 | 0, /* bitpos */ |
659 | complain_overflow_dont,/* complain_on_overflow */ | |
660 | bfd_elf_generic_reloc, /* special_function */ | |
661 | "R_ARM_V4BX", /* name */ | |
0a1b45a2 | 662 | false, /* partial_inplace */ |
7f266840 DJ |
663 | 0xffffffff, /* src_mask */ |
664 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 665 | false), /* pcrel_offset */ |
7f266840 DJ |
666 | |
667 | HOWTO (R_ARM_TARGET2, /* type */ | |
668 | 0, /* rightshift */ | |
c94cb026 | 669 | 4, /* size */ |
7f266840 | 670 | 32, /* bitsize */ |
0a1b45a2 | 671 | false, /* pc_relative */ |
7f266840 DJ |
672 | 0, /* bitpos */ |
673 | complain_overflow_signed,/* complain_on_overflow */ | |
674 | bfd_elf_generic_reloc, /* special_function */ | |
675 | "R_ARM_TARGET2", /* name */ | |
0a1b45a2 | 676 | false, /* partial_inplace */ |
7f266840 DJ |
677 | 0xffffffff, /* src_mask */ |
678 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 679 | true), /* pcrel_offset */ |
7f266840 DJ |
680 | |
681 | HOWTO (R_ARM_PREL31, /* type */ | |
682 | 0, /* rightshift */ | |
c94cb026 | 683 | 4, /* size */ |
7f266840 | 684 | 31, /* bitsize */ |
0a1b45a2 | 685 | true, /* pc_relative */ |
7f266840 DJ |
686 | 0, /* bitpos */ |
687 | complain_overflow_signed,/* complain_on_overflow */ | |
688 | bfd_elf_generic_reloc, /* special_function */ | |
689 | "R_ARM_PREL31", /* name */ | |
0a1b45a2 | 690 | false, /* partial_inplace */ |
7f266840 DJ |
691 | 0x7fffffff, /* src_mask */ |
692 | 0x7fffffff, /* dst_mask */ | |
0a1b45a2 | 693 | true), /* pcrel_offset */ |
c19d1205 ZW |
694 | |
695 | HOWTO (R_ARM_MOVW_ABS_NC, /* type */ | |
696 | 0, /* rightshift */ | |
c94cb026 | 697 | 4, /* size */ |
c19d1205 | 698 | 16, /* bitsize */ |
0a1b45a2 | 699 | false, /* pc_relative */ |
c19d1205 ZW |
700 | 0, /* bitpos */ |
701 | complain_overflow_dont,/* complain_on_overflow */ | |
702 | bfd_elf_generic_reloc, /* special_function */ | |
703 | "R_ARM_MOVW_ABS_NC", /* name */ | |
0a1b45a2 | 704 | false, /* partial_inplace */ |
39623e12 PB |
705 | 0x000f0fff, /* src_mask */ |
706 | 0x000f0fff, /* dst_mask */ | |
0a1b45a2 | 707 | false), /* pcrel_offset */ |
c19d1205 ZW |
708 | |
709 | HOWTO (R_ARM_MOVT_ABS, /* type */ | |
710 | 0, /* rightshift */ | |
c94cb026 | 711 | 4, /* size */ |
c19d1205 | 712 | 16, /* bitsize */ |
0a1b45a2 | 713 | false, /* pc_relative */ |
c19d1205 ZW |
714 | 0, /* bitpos */ |
715 | complain_overflow_bitfield,/* complain_on_overflow */ | |
716 | bfd_elf_generic_reloc, /* special_function */ | |
717 | "R_ARM_MOVT_ABS", /* name */ | |
0a1b45a2 | 718 | false, /* partial_inplace */ |
39623e12 PB |
719 | 0x000f0fff, /* src_mask */ |
720 | 0x000f0fff, /* dst_mask */ | |
0a1b45a2 | 721 | false), /* pcrel_offset */ |
c19d1205 ZW |
722 | |
723 | HOWTO (R_ARM_MOVW_PREL_NC, /* type */ | |
724 | 0, /* rightshift */ | |
c94cb026 | 725 | 4, /* size */ |
c19d1205 | 726 | 16, /* bitsize */ |
0a1b45a2 | 727 | true, /* pc_relative */ |
c19d1205 ZW |
728 | 0, /* bitpos */ |
729 | complain_overflow_dont,/* complain_on_overflow */ | |
730 | bfd_elf_generic_reloc, /* special_function */ | |
731 | "R_ARM_MOVW_PREL_NC", /* name */ | |
0a1b45a2 | 732 | false, /* partial_inplace */ |
39623e12 PB |
733 | 0x000f0fff, /* src_mask */ |
734 | 0x000f0fff, /* dst_mask */ | |
0a1b45a2 | 735 | true), /* pcrel_offset */ |
c19d1205 ZW |
736 | |
737 | HOWTO (R_ARM_MOVT_PREL, /* type */ | |
738 | 0, /* rightshift */ | |
c94cb026 | 739 | 4, /* size */ |
c19d1205 | 740 | 16, /* bitsize */ |
0a1b45a2 | 741 | true, /* pc_relative */ |
c19d1205 ZW |
742 | 0, /* bitpos */ |
743 | complain_overflow_bitfield,/* complain_on_overflow */ | |
744 | bfd_elf_generic_reloc, /* special_function */ | |
745 | "R_ARM_MOVT_PREL", /* name */ | |
0a1b45a2 | 746 | false, /* partial_inplace */ |
39623e12 PB |
747 | 0x000f0fff, /* src_mask */ |
748 | 0x000f0fff, /* dst_mask */ | |
0a1b45a2 | 749 | true), /* pcrel_offset */ |
c19d1205 ZW |
750 | |
751 | HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */ | |
752 | 0, /* rightshift */ | |
c94cb026 | 753 | 4, /* size */ |
c19d1205 | 754 | 16, /* bitsize */ |
0a1b45a2 | 755 | false, /* pc_relative */ |
c19d1205 ZW |
756 | 0, /* bitpos */ |
757 | complain_overflow_dont,/* complain_on_overflow */ | |
758 | bfd_elf_generic_reloc, /* special_function */ | |
759 | "R_ARM_THM_MOVW_ABS_NC",/* name */ | |
0a1b45a2 | 760 | false, /* partial_inplace */ |
c19d1205 ZW |
761 | 0x040f70ff, /* src_mask */ |
762 | 0x040f70ff, /* dst_mask */ | |
0a1b45a2 | 763 | false), /* pcrel_offset */ |
c19d1205 ZW |
764 | |
765 | HOWTO (R_ARM_THM_MOVT_ABS, /* type */ | |
766 | 0, /* rightshift */ | |
c94cb026 | 767 | 4, /* size */ |
c19d1205 | 768 | 16, /* bitsize */ |
0a1b45a2 | 769 | false, /* pc_relative */ |
c19d1205 ZW |
770 | 0, /* bitpos */ |
771 | complain_overflow_bitfield,/* complain_on_overflow */ | |
772 | bfd_elf_generic_reloc, /* special_function */ | |
773 | "R_ARM_THM_MOVT_ABS", /* name */ | |
0a1b45a2 | 774 | false, /* partial_inplace */ |
c19d1205 ZW |
775 | 0x040f70ff, /* src_mask */ |
776 | 0x040f70ff, /* dst_mask */ | |
0a1b45a2 | 777 | false), /* pcrel_offset */ |
c19d1205 ZW |
778 | |
779 | HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */ | |
780 | 0, /* rightshift */ | |
c94cb026 | 781 | 4, /* size */ |
c19d1205 | 782 | 16, /* bitsize */ |
0a1b45a2 | 783 | true, /* pc_relative */ |
c19d1205 ZW |
784 | 0, /* bitpos */ |
785 | complain_overflow_dont,/* complain_on_overflow */ | |
786 | bfd_elf_generic_reloc, /* special_function */ | |
787 | "R_ARM_THM_MOVW_PREL_NC",/* name */ | |
0a1b45a2 | 788 | false, /* partial_inplace */ |
c19d1205 ZW |
789 | 0x040f70ff, /* src_mask */ |
790 | 0x040f70ff, /* dst_mask */ | |
0a1b45a2 | 791 | true), /* pcrel_offset */ |
c19d1205 ZW |
792 | |
793 | HOWTO (R_ARM_THM_MOVT_PREL, /* type */ | |
794 | 0, /* rightshift */ | |
c94cb026 | 795 | 4, /* size */ |
c19d1205 | 796 | 16, /* bitsize */ |
0a1b45a2 | 797 | true, /* pc_relative */ |
c19d1205 ZW |
798 | 0, /* bitpos */ |
799 | complain_overflow_bitfield,/* complain_on_overflow */ | |
800 | bfd_elf_generic_reloc, /* special_function */ | |
801 | "R_ARM_THM_MOVT_PREL", /* name */ | |
0a1b45a2 | 802 | false, /* partial_inplace */ |
c19d1205 ZW |
803 | 0x040f70ff, /* src_mask */ |
804 | 0x040f70ff, /* dst_mask */ | |
0a1b45a2 | 805 | true), /* pcrel_offset */ |
c19d1205 ZW |
806 | |
807 | HOWTO (R_ARM_THM_JUMP19, /* type */ | |
808 | 1, /* rightshift */ | |
c94cb026 | 809 | 4, /* size */ |
c19d1205 | 810 | 19, /* bitsize */ |
0a1b45a2 | 811 | true, /* pc_relative */ |
c19d1205 ZW |
812 | 0, /* bitpos */ |
813 | complain_overflow_signed,/* complain_on_overflow */ | |
814 | bfd_elf_generic_reloc, /* special_function */ | |
815 | "R_ARM_THM_JUMP19", /* name */ | |
0a1b45a2 | 816 | false, /* partial_inplace */ |
c19d1205 ZW |
817 | 0x043f2fff, /* src_mask */ |
818 | 0x043f2fff, /* dst_mask */ | |
0a1b45a2 | 819 | true), /* pcrel_offset */ |
c19d1205 ZW |
820 | |
821 | HOWTO (R_ARM_THM_JUMP6, /* type */ | |
822 | 1, /* rightshift */ | |
c94cb026 | 823 | 2, /* size */ |
c19d1205 | 824 | 6, /* bitsize */ |
0a1b45a2 | 825 | true, /* pc_relative */ |
c19d1205 ZW |
826 | 0, /* bitpos */ |
827 | complain_overflow_unsigned,/* complain_on_overflow */ | |
828 | bfd_elf_generic_reloc, /* special_function */ | |
829 | "R_ARM_THM_JUMP6", /* name */ | |
0a1b45a2 | 830 | false, /* partial_inplace */ |
c19d1205 ZW |
831 | 0x02f8, /* src_mask */ |
832 | 0x02f8, /* dst_mask */ | |
0a1b45a2 | 833 | true), /* pcrel_offset */ |
c19d1205 ZW |
834 | |
835 | /* These are declared as 13-bit signed relocations because we can | |
836 | address -4095 .. 4095(base) by altering ADDW to SUBW or vice | |
837 | versa. */ | |
838 | HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */ | |
839 | 0, /* rightshift */ | |
c94cb026 | 840 | 4, /* size */ |
c19d1205 | 841 | 13, /* bitsize */ |
0a1b45a2 | 842 | true, /* pc_relative */ |
c19d1205 | 843 | 0, /* bitpos */ |
2cab6cc3 | 844 | complain_overflow_dont,/* complain_on_overflow */ |
c19d1205 ZW |
845 | bfd_elf_generic_reloc, /* special_function */ |
846 | "R_ARM_THM_ALU_PREL_11_0",/* name */ | |
0a1b45a2 | 847 | false, /* partial_inplace */ |
2cab6cc3 MS |
848 | 0xffffffff, /* src_mask */ |
849 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 850 | true), /* pcrel_offset */ |
c19d1205 ZW |
851 | |
852 | HOWTO (R_ARM_THM_PC12, /* type */ | |
853 | 0, /* rightshift */ | |
c94cb026 | 854 | 4, /* size */ |
c19d1205 | 855 | 13, /* bitsize */ |
0a1b45a2 | 856 | true, /* pc_relative */ |
c19d1205 | 857 | 0, /* bitpos */ |
2cab6cc3 | 858 | complain_overflow_dont,/* complain_on_overflow */ |
c19d1205 ZW |
859 | bfd_elf_generic_reloc, /* special_function */ |
860 | "R_ARM_THM_PC12", /* name */ | |
0a1b45a2 | 861 | false, /* partial_inplace */ |
2cab6cc3 MS |
862 | 0xffffffff, /* src_mask */ |
863 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 864 | true), /* pcrel_offset */ |
c19d1205 ZW |
865 | |
866 | HOWTO (R_ARM_ABS32_NOI, /* type */ | |
867 | 0, /* rightshift */ | |
c94cb026 | 868 | 4, /* size */ |
c19d1205 | 869 | 32, /* bitsize */ |
0a1b45a2 | 870 | false, /* pc_relative */ |
c19d1205 ZW |
871 | 0, /* bitpos */ |
872 | complain_overflow_dont,/* complain_on_overflow */ | |
873 | bfd_elf_generic_reloc, /* special_function */ | |
874 | "R_ARM_ABS32_NOI", /* name */ | |
0a1b45a2 | 875 | false, /* partial_inplace */ |
c19d1205 ZW |
876 | 0xffffffff, /* src_mask */ |
877 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 878 | false), /* pcrel_offset */ |
c19d1205 ZW |
879 | |
880 | HOWTO (R_ARM_REL32_NOI, /* type */ | |
881 | 0, /* rightshift */ | |
c94cb026 | 882 | 4, /* size */ |
c19d1205 | 883 | 32, /* bitsize */ |
0a1b45a2 | 884 | true, /* pc_relative */ |
c19d1205 ZW |
885 | 0, /* bitpos */ |
886 | complain_overflow_dont,/* complain_on_overflow */ | |
887 | bfd_elf_generic_reloc, /* special_function */ | |
888 | "R_ARM_REL32_NOI", /* name */ | |
0a1b45a2 | 889 | false, /* partial_inplace */ |
c19d1205 ZW |
890 | 0xffffffff, /* src_mask */ |
891 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 892 | false), /* pcrel_offset */ |
7f266840 | 893 | |
4962c51a MS |
894 | /* Group relocations. */ |
895 | ||
896 | HOWTO (R_ARM_ALU_PC_G0_NC, /* type */ | |
897 | 0, /* rightshift */ | |
c94cb026 | 898 | 4, /* size */ |
4962c51a | 899 | 32, /* bitsize */ |
0a1b45a2 | 900 | true, /* pc_relative */ |
4962c51a MS |
901 | 0, /* bitpos */ |
902 | complain_overflow_dont,/* complain_on_overflow */ | |
903 | bfd_elf_generic_reloc, /* special_function */ | |
904 | "R_ARM_ALU_PC_G0_NC", /* name */ | |
0a1b45a2 | 905 | false, /* partial_inplace */ |
4962c51a MS |
906 | 0xffffffff, /* src_mask */ |
907 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 908 | true), /* pcrel_offset */ |
4962c51a | 909 | |
07d6d2b8 | 910 | HOWTO (R_ARM_ALU_PC_G0, /* type */ |
4962c51a | 911 | 0, /* rightshift */ |
c94cb026 | 912 | 4, /* size */ |
4962c51a | 913 | 32, /* bitsize */ |
0a1b45a2 | 914 | true, /* pc_relative */ |
4962c51a MS |
915 | 0, /* bitpos */ |
916 | complain_overflow_dont,/* complain_on_overflow */ | |
917 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 918 | "R_ARM_ALU_PC_G0", /* name */ |
0a1b45a2 | 919 | false, /* partial_inplace */ |
4962c51a MS |
920 | 0xffffffff, /* src_mask */ |
921 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 922 | true), /* pcrel_offset */ |
4962c51a MS |
923 | |
924 | HOWTO (R_ARM_ALU_PC_G1_NC, /* type */ | |
925 | 0, /* rightshift */ | |
c94cb026 | 926 | 4, /* size */ |
4962c51a | 927 | 32, /* bitsize */ |
0a1b45a2 | 928 | true, /* pc_relative */ |
4962c51a MS |
929 | 0, /* bitpos */ |
930 | complain_overflow_dont,/* complain_on_overflow */ | |
931 | bfd_elf_generic_reloc, /* special_function */ | |
932 | "R_ARM_ALU_PC_G1_NC", /* name */ | |
0a1b45a2 | 933 | false, /* partial_inplace */ |
4962c51a MS |
934 | 0xffffffff, /* src_mask */ |
935 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 936 | true), /* pcrel_offset */ |
4962c51a | 937 | |
07d6d2b8 | 938 | HOWTO (R_ARM_ALU_PC_G1, /* type */ |
4962c51a | 939 | 0, /* rightshift */ |
c94cb026 | 940 | 4, /* size */ |
4962c51a | 941 | 32, /* bitsize */ |
0a1b45a2 | 942 | true, /* pc_relative */ |
4962c51a MS |
943 | 0, /* bitpos */ |
944 | complain_overflow_dont,/* complain_on_overflow */ | |
945 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 946 | "R_ARM_ALU_PC_G1", /* name */ |
0a1b45a2 | 947 | false, /* partial_inplace */ |
4962c51a MS |
948 | 0xffffffff, /* src_mask */ |
949 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 950 | true), /* pcrel_offset */ |
4962c51a | 951 | |
07d6d2b8 | 952 | HOWTO (R_ARM_ALU_PC_G2, /* type */ |
4962c51a | 953 | 0, /* rightshift */ |
c94cb026 | 954 | 4, /* size */ |
4962c51a | 955 | 32, /* bitsize */ |
0a1b45a2 | 956 | true, /* pc_relative */ |
4962c51a MS |
957 | 0, /* bitpos */ |
958 | complain_overflow_dont,/* complain_on_overflow */ | |
959 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 960 | "R_ARM_ALU_PC_G2", /* name */ |
0a1b45a2 | 961 | false, /* partial_inplace */ |
4962c51a MS |
962 | 0xffffffff, /* src_mask */ |
963 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 964 | true), /* pcrel_offset */ |
4962c51a | 965 | |
07d6d2b8 | 966 | HOWTO (R_ARM_LDR_PC_G1, /* type */ |
4962c51a | 967 | 0, /* rightshift */ |
c94cb026 | 968 | 4, /* size */ |
4962c51a | 969 | 32, /* bitsize */ |
0a1b45a2 | 970 | true, /* pc_relative */ |
4962c51a MS |
971 | 0, /* bitpos */ |
972 | complain_overflow_dont,/* complain_on_overflow */ | |
973 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 974 | "R_ARM_LDR_PC_G1", /* name */ |
0a1b45a2 | 975 | false, /* partial_inplace */ |
4962c51a MS |
976 | 0xffffffff, /* src_mask */ |
977 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 978 | true), /* pcrel_offset */ |
4962c51a | 979 | |
07d6d2b8 | 980 | HOWTO (R_ARM_LDR_PC_G2, /* type */ |
4962c51a | 981 | 0, /* rightshift */ |
c94cb026 | 982 | 4, /* size */ |
4962c51a | 983 | 32, /* bitsize */ |
0a1b45a2 | 984 | true, /* pc_relative */ |
4962c51a MS |
985 | 0, /* bitpos */ |
986 | complain_overflow_dont,/* complain_on_overflow */ | |
987 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 988 | "R_ARM_LDR_PC_G2", /* name */ |
0a1b45a2 | 989 | false, /* partial_inplace */ |
4962c51a MS |
990 | 0xffffffff, /* src_mask */ |
991 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 992 | true), /* pcrel_offset */ |
4962c51a | 993 | |
07d6d2b8 | 994 | HOWTO (R_ARM_LDRS_PC_G0, /* type */ |
4962c51a | 995 | 0, /* rightshift */ |
c94cb026 | 996 | 4, /* size */ |
4962c51a | 997 | 32, /* bitsize */ |
0a1b45a2 | 998 | true, /* pc_relative */ |
4962c51a MS |
999 | 0, /* bitpos */ |
1000 | complain_overflow_dont,/* complain_on_overflow */ | |
1001 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1002 | "R_ARM_LDRS_PC_G0", /* name */ |
0a1b45a2 | 1003 | false, /* partial_inplace */ |
4962c51a MS |
1004 | 0xffffffff, /* src_mask */ |
1005 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1006 | true), /* pcrel_offset */ |
4962c51a | 1007 | |
07d6d2b8 | 1008 | HOWTO (R_ARM_LDRS_PC_G1, /* type */ |
4962c51a | 1009 | 0, /* rightshift */ |
c94cb026 | 1010 | 4, /* size */ |
4962c51a | 1011 | 32, /* bitsize */ |
0a1b45a2 | 1012 | true, /* pc_relative */ |
4962c51a MS |
1013 | 0, /* bitpos */ |
1014 | complain_overflow_dont,/* complain_on_overflow */ | |
1015 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1016 | "R_ARM_LDRS_PC_G1", /* name */ |
0a1b45a2 | 1017 | false, /* partial_inplace */ |
4962c51a MS |
1018 | 0xffffffff, /* src_mask */ |
1019 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1020 | true), /* pcrel_offset */ |
4962c51a | 1021 | |
07d6d2b8 | 1022 | HOWTO (R_ARM_LDRS_PC_G2, /* type */ |
4962c51a | 1023 | 0, /* rightshift */ |
c94cb026 | 1024 | 4, /* size */ |
4962c51a | 1025 | 32, /* bitsize */ |
0a1b45a2 | 1026 | true, /* pc_relative */ |
4962c51a MS |
1027 | 0, /* bitpos */ |
1028 | complain_overflow_dont,/* complain_on_overflow */ | |
1029 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1030 | "R_ARM_LDRS_PC_G2", /* name */ |
0a1b45a2 | 1031 | false, /* partial_inplace */ |
4962c51a MS |
1032 | 0xffffffff, /* src_mask */ |
1033 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1034 | true), /* pcrel_offset */ |
4962c51a | 1035 | |
07d6d2b8 | 1036 | HOWTO (R_ARM_LDC_PC_G0, /* type */ |
4962c51a | 1037 | 0, /* rightshift */ |
c94cb026 | 1038 | 4, /* size */ |
4962c51a | 1039 | 32, /* bitsize */ |
0a1b45a2 | 1040 | true, /* pc_relative */ |
4962c51a MS |
1041 | 0, /* bitpos */ |
1042 | complain_overflow_dont,/* complain_on_overflow */ | |
1043 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1044 | "R_ARM_LDC_PC_G0", /* name */ |
0a1b45a2 | 1045 | false, /* partial_inplace */ |
4962c51a MS |
1046 | 0xffffffff, /* src_mask */ |
1047 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1048 | true), /* pcrel_offset */ |
4962c51a | 1049 | |
07d6d2b8 | 1050 | HOWTO (R_ARM_LDC_PC_G1, /* type */ |
4962c51a | 1051 | 0, /* rightshift */ |
c94cb026 | 1052 | 4, /* size */ |
4962c51a | 1053 | 32, /* bitsize */ |
0a1b45a2 | 1054 | true, /* pc_relative */ |
4962c51a MS |
1055 | 0, /* bitpos */ |
1056 | complain_overflow_dont,/* complain_on_overflow */ | |
1057 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1058 | "R_ARM_LDC_PC_G1", /* name */ |
0a1b45a2 | 1059 | false, /* partial_inplace */ |
4962c51a MS |
1060 | 0xffffffff, /* src_mask */ |
1061 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1062 | true), /* pcrel_offset */ |
4962c51a | 1063 | |
07d6d2b8 | 1064 | HOWTO (R_ARM_LDC_PC_G2, /* type */ |
4962c51a | 1065 | 0, /* rightshift */ |
c94cb026 | 1066 | 4, /* size */ |
4962c51a | 1067 | 32, /* bitsize */ |
0a1b45a2 | 1068 | true, /* pc_relative */ |
4962c51a MS |
1069 | 0, /* bitpos */ |
1070 | complain_overflow_dont,/* complain_on_overflow */ | |
1071 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1072 | "R_ARM_LDC_PC_G2", /* name */ |
0a1b45a2 | 1073 | false, /* partial_inplace */ |
4962c51a MS |
1074 | 0xffffffff, /* src_mask */ |
1075 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1076 | true), /* pcrel_offset */ |
4962c51a | 1077 | |
07d6d2b8 | 1078 | HOWTO (R_ARM_ALU_SB_G0_NC, /* type */ |
4962c51a | 1079 | 0, /* rightshift */ |
c94cb026 | 1080 | 4, /* size */ |
4962c51a | 1081 | 32, /* bitsize */ |
0a1b45a2 | 1082 | true, /* pc_relative */ |
4962c51a MS |
1083 | 0, /* bitpos */ |
1084 | complain_overflow_dont,/* complain_on_overflow */ | |
1085 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1086 | "R_ARM_ALU_SB_G0_NC", /* name */ |
0a1b45a2 | 1087 | false, /* partial_inplace */ |
4962c51a MS |
1088 | 0xffffffff, /* src_mask */ |
1089 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1090 | true), /* pcrel_offset */ |
4962c51a | 1091 | |
07d6d2b8 | 1092 | HOWTO (R_ARM_ALU_SB_G0, /* type */ |
4962c51a | 1093 | 0, /* rightshift */ |
c94cb026 | 1094 | 4, /* size */ |
4962c51a | 1095 | 32, /* bitsize */ |
0a1b45a2 | 1096 | true, /* pc_relative */ |
4962c51a MS |
1097 | 0, /* bitpos */ |
1098 | complain_overflow_dont,/* complain_on_overflow */ | |
1099 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1100 | "R_ARM_ALU_SB_G0", /* name */ |
0a1b45a2 | 1101 | false, /* partial_inplace */ |
4962c51a MS |
1102 | 0xffffffff, /* src_mask */ |
1103 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1104 | true), /* pcrel_offset */ |
4962c51a | 1105 | |
07d6d2b8 | 1106 | HOWTO (R_ARM_ALU_SB_G1_NC, /* type */ |
4962c51a | 1107 | 0, /* rightshift */ |
c94cb026 | 1108 | 4, /* size */ |
4962c51a | 1109 | 32, /* bitsize */ |
0a1b45a2 | 1110 | true, /* pc_relative */ |
4962c51a MS |
1111 | 0, /* bitpos */ |
1112 | complain_overflow_dont,/* complain_on_overflow */ | |
1113 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1114 | "R_ARM_ALU_SB_G1_NC", /* name */ |
0a1b45a2 | 1115 | false, /* partial_inplace */ |
4962c51a MS |
1116 | 0xffffffff, /* src_mask */ |
1117 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1118 | true), /* pcrel_offset */ |
4962c51a | 1119 | |
07d6d2b8 | 1120 | HOWTO (R_ARM_ALU_SB_G1, /* type */ |
4962c51a | 1121 | 0, /* rightshift */ |
c94cb026 | 1122 | 4, /* size */ |
4962c51a | 1123 | 32, /* bitsize */ |
0a1b45a2 | 1124 | true, /* pc_relative */ |
4962c51a MS |
1125 | 0, /* bitpos */ |
1126 | complain_overflow_dont,/* complain_on_overflow */ | |
1127 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1128 | "R_ARM_ALU_SB_G1", /* name */ |
0a1b45a2 | 1129 | false, /* partial_inplace */ |
4962c51a MS |
1130 | 0xffffffff, /* src_mask */ |
1131 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1132 | true), /* pcrel_offset */ |
4962c51a | 1133 | |
07d6d2b8 | 1134 | HOWTO (R_ARM_ALU_SB_G2, /* type */ |
4962c51a | 1135 | 0, /* rightshift */ |
c94cb026 | 1136 | 4, /* size */ |
4962c51a | 1137 | 32, /* bitsize */ |
0a1b45a2 | 1138 | true, /* pc_relative */ |
4962c51a MS |
1139 | 0, /* bitpos */ |
1140 | complain_overflow_dont,/* complain_on_overflow */ | |
1141 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1142 | "R_ARM_ALU_SB_G2", /* name */ |
0a1b45a2 | 1143 | false, /* partial_inplace */ |
4962c51a MS |
1144 | 0xffffffff, /* src_mask */ |
1145 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1146 | true), /* pcrel_offset */ |
4962c51a | 1147 | |
07d6d2b8 | 1148 | HOWTO (R_ARM_LDR_SB_G0, /* type */ |
4962c51a | 1149 | 0, /* rightshift */ |
c94cb026 | 1150 | 4, /* size */ |
4962c51a | 1151 | 32, /* bitsize */ |
0a1b45a2 | 1152 | true, /* pc_relative */ |
4962c51a MS |
1153 | 0, /* bitpos */ |
1154 | complain_overflow_dont,/* complain_on_overflow */ | |
1155 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1156 | "R_ARM_LDR_SB_G0", /* name */ |
0a1b45a2 | 1157 | false, /* partial_inplace */ |
4962c51a MS |
1158 | 0xffffffff, /* src_mask */ |
1159 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1160 | true), /* pcrel_offset */ |
4962c51a | 1161 | |
07d6d2b8 | 1162 | HOWTO (R_ARM_LDR_SB_G1, /* type */ |
4962c51a | 1163 | 0, /* rightshift */ |
c94cb026 | 1164 | 4, /* size */ |
4962c51a | 1165 | 32, /* bitsize */ |
0a1b45a2 | 1166 | true, /* pc_relative */ |
4962c51a MS |
1167 | 0, /* bitpos */ |
1168 | complain_overflow_dont,/* complain_on_overflow */ | |
1169 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1170 | "R_ARM_LDR_SB_G1", /* name */ |
0a1b45a2 | 1171 | false, /* partial_inplace */ |
4962c51a MS |
1172 | 0xffffffff, /* src_mask */ |
1173 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1174 | true), /* pcrel_offset */ |
4962c51a | 1175 | |
07d6d2b8 | 1176 | HOWTO (R_ARM_LDR_SB_G2, /* type */ |
4962c51a | 1177 | 0, /* rightshift */ |
c94cb026 | 1178 | 4, /* size */ |
4962c51a | 1179 | 32, /* bitsize */ |
0a1b45a2 | 1180 | true, /* pc_relative */ |
4962c51a MS |
1181 | 0, /* bitpos */ |
1182 | complain_overflow_dont,/* complain_on_overflow */ | |
1183 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1184 | "R_ARM_LDR_SB_G2", /* name */ |
0a1b45a2 | 1185 | false, /* partial_inplace */ |
4962c51a MS |
1186 | 0xffffffff, /* src_mask */ |
1187 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1188 | true), /* pcrel_offset */ |
4962c51a | 1189 | |
07d6d2b8 | 1190 | HOWTO (R_ARM_LDRS_SB_G0, /* type */ |
4962c51a | 1191 | 0, /* rightshift */ |
c94cb026 | 1192 | 4, /* size */ |
4962c51a | 1193 | 32, /* bitsize */ |
0a1b45a2 | 1194 | true, /* pc_relative */ |
4962c51a MS |
1195 | 0, /* bitpos */ |
1196 | complain_overflow_dont,/* complain_on_overflow */ | |
1197 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1198 | "R_ARM_LDRS_SB_G0", /* name */ |
0a1b45a2 | 1199 | false, /* partial_inplace */ |
4962c51a MS |
1200 | 0xffffffff, /* src_mask */ |
1201 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1202 | true), /* pcrel_offset */ |
4962c51a | 1203 | |
07d6d2b8 | 1204 | HOWTO (R_ARM_LDRS_SB_G1, /* type */ |
4962c51a | 1205 | 0, /* rightshift */ |
c94cb026 | 1206 | 4, /* size */ |
4962c51a | 1207 | 32, /* bitsize */ |
0a1b45a2 | 1208 | true, /* pc_relative */ |
4962c51a MS |
1209 | 0, /* bitpos */ |
1210 | complain_overflow_dont,/* complain_on_overflow */ | |
1211 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1212 | "R_ARM_LDRS_SB_G1", /* name */ |
0a1b45a2 | 1213 | false, /* partial_inplace */ |
4962c51a MS |
1214 | 0xffffffff, /* src_mask */ |
1215 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1216 | true), /* pcrel_offset */ |
4962c51a | 1217 | |
07d6d2b8 | 1218 | HOWTO (R_ARM_LDRS_SB_G2, /* type */ |
4962c51a | 1219 | 0, /* rightshift */ |
c94cb026 | 1220 | 4, /* size */ |
4962c51a | 1221 | 32, /* bitsize */ |
0a1b45a2 | 1222 | true, /* pc_relative */ |
4962c51a MS |
1223 | 0, /* bitpos */ |
1224 | complain_overflow_dont,/* complain_on_overflow */ | |
1225 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1226 | "R_ARM_LDRS_SB_G2", /* name */ |
0a1b45a2 | 1227 | false, /* partial_inplace */ |
4962c51a MS |
1228 | 0xffffffff, /* src_mask */ |
1229 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1230 | true), /* pcrel_offset */ |
4962c51a | 1231 | |
07d6d2b8 | 1232 | HOWTO (R_ARM_LDC_SB_G0, /* type */ |
4962c51a | 1233 | 0, /* rightshift */ |
c94cb026 | 1234 | 4, /* size */ |
4962c51a | 1235 | 32, /* bitsize */ |
0a1b45a2 | 1236 | true, /* pc_relative */ |
4962c51a MS |
1237 | 0, /* bitpos */ |
1238 | complain_overflow_dont,/* complain_on_overflow */ | |
1239 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1240 | "R_ARM_LDC_SB_G0", /* name */ |
0a1b45a2 | 1241 | false, /* partial_inplace */ |
4962c51a MS |
1242 | 0xffffffff, /* src_mask */ |
1243 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1244 | true), /* pcrel_offset */ |
4962c51a | 1245 | |
07d6d2b8 | 1246 | HOWTO (R_ARM_LDC_SB_G1, /* type */ |
4962c51a | 1247 | 0, /* rightshift */ |
c94cb026 | 1248 | 4, /* size */ |
4962c51a | 1249 | 32, /* bitsize */ |
0a1b45a2 | 1250 | true, /* pc_relative */ |
4962c51a MS |
1251 | 0, /* bitpos */ |
1252 | complain_overflow_dont,/* complain_on_overflow */ | |
1253 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1254 | "R_ARM_LDC_SB_G1", /* name */ |
0a1b45a2 | 1255 | false, /* partial_inplace */ |
4962c51a MS |
1256 | 0xffffffff, /* src_mask */ |
1257 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1258 | true), /* pcrel_offset */ |
4962c51a | 1259 | |
07d6d2b8 | 1260 | HOWTO (R_ARM_LDC_SB_G2, /* type */ |
4962c51a | 1261 | 0, /* rightshift */ |
c94cb026 | 1262 | 4, /* size */ |
4962c51a | 1263 | 32, /* bitsize */ |
0a1b45a2 | 1264 | true, /* pc_relative */ |
4962c51a MS |
1265 | 0, /* bitpos */ |
1266 | complain_overflow_dont,/* complain_on_overflow */ | |
1267 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1268 | "R_ARM_LDC_SB_G2", /* name */ |
0a1b45a2 | 1269 | false, /* partial_inplace */ |
4962c51a MS |
1270 | 0xffffffff, /* src_mask */ |
1271 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1272 | true), /* pcrel_offset */ |
4962c51a MS |
1273 | |
1274 | /* End of group relocations. */ | |
c19d1205 | 1275 | |
c19d1205 ZW |
1276 | HOWTO (R_ARM_MOVW_BREL_NC, /* type */ |
1277 | 0, /* rightshift */ | |
c94cb026 | 1278 | 4, /* size */ |
c19d1205 | 1279 | 16, /* bitsize */ |
0a1b45a2 | 1280 | false, /* pc_relative */ |
c19d1205 ZW |
1281 | 0, /* bitpos */ |
1282 | complain_overflow_dont,/* complain_on_overflow */ | |
1283 | bfd_elf_generic_reloc, /* special_function */ | |
1284 | "R_ARM_MOVW_BREL_NC", /* name */ | |
0a1b45a2 | 1285 | false, /* partial_inplace */ |
c19d1205 ZW |
1286 | 0x0000ffff, /* src_mask */ |
1287 | 0x0000ffff, /* dst_mask */ | |
0a1b45a2 | 1288 | false), /* pcrel_offset */ |
c19d1205 ZW |
1289 | |
1290 | HOWTO (R_ARM_MOVT_BREL, /* type */ | |
1291 | 0, /* rightshift */ | |
c94cb026 | 1292 | 4, /* size */ |
c19d1205 | 1293 | 16, /* bitsize */ |
0a1b45a2 | 1294 | false, /* pc_relative */ |
c19d1205 ZW |
1295 | 0, /* bitpos */ |
1296 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1297 | bfd_elf_generic_reloc, /* special_function */ | |
1298 | "R_ARM_MOVT_BREL", /* name */ | |
0a1b45a2 | 1299 | false, /* partial_inplace */ |
c19d1205 ZW |
1300 | 0x0000ffff, /* src_mask */ |
1301 | 0x0000ffff, /* dst_mask */ | |
0a1b45a2 | 1302 | false), /* pcrel_offset */ |
c19d1205 ZW |
1303 | |
1304 | HOWTO (R_ARM_MOVW_BREL, /* type */ | |
1305 | 0, /* rightshift */ | |
c94cb026 | 1306 | 4, /* size */ |
c19d1205 | 1307 | 16, /* bitsize */ |
0a1b45a2 | 1308 | false, /* pc_relative */ |
c19d1205 ZW |
1309 | 0, /* bitpos */ |
1310 | complain_overflow_dont,/* complain_on_overflow */ | |
1311 | bfd_elf_generic_reloc, /* special_function */ | |
1312 | "R_ARM_MOVW_BREL", /* name */ | |
0a1b45a2 | 1313 | false, /* partial_inplace */ |
c19d1205 ZW |
1314 | 0x0000ffff, /* src_mask */ |
1315 | 0x0000ffff, /* dst_mask */ | |
0a1b45a2 | 1316 | false), /* pcrel_offset */ |
c19d1205 ZW |
1317 | |
1318 | HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */ | |
1319 | 0, /* rightshift */ | |
c94cb026 | 1320 | 4, /* size */ |
c19d1205 | 1321 | 16, /* bitsize */ |
0a1b45a2 | 1322 | false, /* pc_relative */ |
c19d1205 ZW |
1323 | 0, /* bitpos */ |
1324 | complain_overflow_dont,/* complain_on_overflow */ | |
1325 | bfd_elf_generic_reloc, /* special_function */ | |
1326 | "R_ARM_THM_MOVW_BREL_NC",/* name */ | |
0a1b45a2 | 1327 | false, /* partial_inplace */ |
c19d1205 ZW |
1328 | 0x040f70ff, /* src_mask */ |
1329 | 0x040f70ff, /* dst_mask */ | |
0a1b45a2 | 1330 | false), /* pcrel_offset */ |
c19d1205 ZW |
1331 | |
1332 | HOWTO (R_ARM_THM_MOVT_BREL, /* type */ | |
1333 | 0, /* rightshift */ | |
c94cb026 | 1334 | 4, /* size */ |
c19d1205 | 1335 | 16, /* bitsize */ |
0a1b45a2 | 1336 | false, /* pc_relative */ |
c19d1205 ZW |
1337 | 0, /* bitpos */ |
1338 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1339 | bfd_elf_generic_reloc, /* special_function */ | |
1340 | "R_ARM_THM_MOVT_BREL", /* name */ | |
0a1b45a2 | 1341 | false, /* partial_inplace */ |
c19d1205 ZW |
1342 | 0x040f70ff, /* src_mask */ |
1343 | 0x040f70ff, /* dst_mask */ | |
0a1b45a2 | 1344 | false), /* pcrel_offset */ |
c19d1205 ZW |
1345 | |
1346 | HOWTO (R_ARM_THM_MOVW_BREL, /* type */ | |
1347 | 0, /* rightshift */ | |
c94cb026 | 1348 | 4, /* size */ |
c19d1205 | 1349 | 16, /* bitsize */ |
0a1b45a2 | 1350 | false, /* pc_relative */ |
c19d1205 ZW |
1351 | 0, /* bitpos */ |
1352 | complain_overflow_dont,/* complain_on_overflow */ | |
1353 | bfd_elf_generic_reloc, /* special_function */ | |
1354 | "R_ARM_THM_MOVW_BREL", /* name */ | |
0a1b45a2 | 1355 | false, /* partial_inplace */ |
c19d1205 ZW |
1356 | 0x040f70ff, /* src_mask */ |
1357 | 0x040f70ff, /* dst_mask */ | |
0a1b45a2 | 1358 | false), /* pcrel_offset */ |
c19d1205 | 1359 | |
0855e32b NS |
1360 | HOWTO (R_ARM_TLS_GOTDESC, /* type */ |
1361 | 0, /* rightshift */ | |
c94cb026 | 1362 | 4, /* size */ |
0855e32b | 1363 | 32, /* bitsize */ |
0a1b45a2 | 1364 | false, /* pc_relative */ |
0855e32b NS |
1365 | 0, /* bitpos */ |
1366 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1367 | NULL, /* special_function */ | |
1368 | "R_ARM_TLS_GOTDESC", /* name */ | |
0a1b45a2 | 1369 | true, /* partial_inplace */ |
0855e32b NS |
1370 | 0xffffffff, /* src_mask */ |
1371 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1372 | false), /* pcrel_offset */ |
0855e32b NS |
1373 | |
1374 | HOWTO (R_ARM_TLS_CALL, /* type */ | |
1375 | 0, /* rightshift */ | |
c94cb026 | 1376 | 4, /* size */ |
0855e32b | 1377 | 24, /* bitsize */ |
0a1b45a2 | 1378 | false, /* pc_relative */ |
0855e32b NS |
1379 | 0, /* bitpos */ |
1380 | complain_overflow_dont,/* complain_on_overflow */ | |
1381 | bfd_elf_generic_reloc, /* special_function */ | |
1382 | "R_ARM_TLS_CALL", /* name */ | |
0a1b45a2 | 1383 | false, /* partial_inplace */ |
0855e32b NS |
1384 | 0x00ffffff, /* src_mask */ |
1385 | 0x00ffffff, /* dst_mask */ | |
0a1b45a2 | 1386 | false), /* pcrel_offset */ |
0855e32b NS |
1387 | |
1388 | HOWTO (R_ARM_TLS_DESCSEQ, /* type */ | |
1389 | 0, /* rightshift */ | |
c94cb026 | 1390 | 4, /* size */ |
0855e32b | 1391 | 0, /* bitsize */ |
0a1b45a2 | 1392 | false, /* pc_relative */ |
0855e32b | 1393 | 0, /* bitpos */ |
821e059c | 1394 | complain_overflow_dont,/* complain_on_overflow */ |
0855e32b NS |
1395 | bfd_elf_generic_reloc, /* special_function */ |
1396 | "R_ARM_TLS_DESCSEQ", /* name */ | |
0a1b45a2 | 1397 | false, /* partial_inplace */ |
0855e32b NS |
1398 | 0x00000000, /* src_mask */ |
1399 | 0x00000000, /* dst_mask */ | |
0a1b45a2 | 1400 | false), /* pcrel_offset */ |
0855e32b NS |
1401 | |
1402 | HOWTO (R_ARM_THM_TLS_CALL, /* type */ | |
1403 | 0, /* rightshift */ | |
c94cb026 | 1404 | 4, /* size */ |
0855e32b | 1405 | 24, /* bitsize */ |
0a1b45a2 | 1406 | false, /* pc_relative */ |
0855e32b NS |
1407 | 0, /* bitpos */ |
1408 | complain_overflow_dont,/* complain_on_overflow */ | |
1409 | bfd_elf_generic_reloc, /* special_function */ | |
1410 | "R_ARM_THM_TLS_CALL", /* name */ | |
0a1b45a2 | 1411 | false, /* partial_inplace */ |
0855e32b NS |
1412 | 0x07ff07ff, /* src_mask */ |
1413 | 0x07ff07ff, /* dst_mask */ | |
0a1b45a2 | 1414 | false), /* pcrel_offset */ |
c19d1205 ZW |
1415 | |
1416 | HOWTO (R_ARM_PLT32_ABS, /* type */ | |
1417 | 0, /* rightshift */ | |
c94cb026 | 1418 | 4, /* size */ |
c19d1205 | 1419 | 32, /* bitsize */ |
0a1b45a2 | 1420 | false, /* pc_relative */ |
c19d1205 ZW |
1421 | 0, /* bitpos */ |
1422 | complain_overflow_dont,/* complain_on_overflow */ | |
1423 | bfd_elf_generic_reloc, /* special_function */ | |
1424 | "R_ARM_PLT32_ABS", /* name */ | |
0a1b45a2 | 1425 | false, /* partial_inplace */ |
c19d1205 ZW |
1426 | 0xffffffff, /* src_mask */ |
1427 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1428 | false), /* pcrel_offset */ |
c19d1205 ZW |
1429 | |
1430 | HOWTO (R_ARM_GOT_ABS, /* type */ | |
1431 | 0, /* rightshift */ | |
c94cb026 | 1432 | 4, /* size */ |
c19d1205 | 1433 | 32, /* bitsize */ |
0a1b45a2 | 1434 | false, /* pc_relative */ |
c19d1205 ZW |
1435 | 0, /* bitpos */ |
1436 | complain_overflow_dont,/* complain_on_overflow */ | |
1437 | bfd_elf_generic_reloc, /* special_function */ | |
1438 | "R_ARM_GOT_ABS", /* name */ | |
0a1b45a2 | 1439 | false, /* partial_inplace */ |
c19d1205 ZW |
1440 | 0xffffffff, /* src_mask */ |
1441 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1442 | false), /* pcrel_offset */ |
c19d1205 ZW |
1443 | |
1444 | HOWTO (R_ARM_GOT_PREL, /* type */ | |
1445 | 0, /* rightshift */ | |
c94cb026 | 1446 | 4, /* size */ |
c19d1205 | 1447 | 32, /* bitsize */ |
0a1b45a2 | 1448 | true, /* pc_relative */ |
c19d1205 ZW |
1449 | 0, /* bitpos */ |
1450 | complain_overflow_dont, /* complain_on_overflow */ | |
1451 | bfd_elf_generic_reloc, /* special_function */ | |
1452 | "R_ARM_GOT_PREL", /* name */ | |
0a1b45a2 | 1453 | false, /* partial_inplace */ |
c19d1205 ZW |
1454 | 0xffffffff, /* src_mask */ |
1455 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1456 | true), /* pcrel_offset */ |
c19d1205 ZW |
1457 | |
1458 | HOWTO (R_ARM_GOT_BREL12, /* type */ | |
1459 | 0, /* rightshift */ | |
c94cb026 | 1460 | 4, /* size */ |
c19d1205 | 1461 | 12, /* bitsize */ |
0a1b45a2 | 1462 | false, /* pc_relative */ |
c19d1205 ZW |
1463 | 0, /* bitpos */ |
1464 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1465 | bfd_elf_generic_reloc, /* special_function */ | |
1466 | "R_ARM_GOT_BREL12", /* name */ | |
0a1b45a2 | 1467 | false, /* partial_inplace */ |
c19d1205 ZW |
1468 | 0x00000fff, /* src_mask */ |
1469 | 0x00000fff, /* dst_mask */ | |
0a1b45a2 | 1470 | false), /* pcrel_offset */ |
c19d1205 ZW |
1471 | |
1472 | HOWTO (R_ARM_GOTOFF12, /* type */ | |
1473 | 0, /* rightshift */ | |
c94cb026 | 1474 | 4, /* size */ |
c19d1205 | 1475 | 12, /* bitsize */ |
0a1b45a2 | 1476 | false, /* pc_relative */ |
c19d1205 ZW |
1477 | 0, /* bitpos */ |
1478 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1479 | bfd_elf_generic_reloc, /* special_function */ | |
1480 | "R_ARM_GOTOFF12", /* name */ | |
0a1b45a2 | 1481 | false, /* partial_inplace */ |
c19d1205 ZW |
1482 | 0x00000fff, /* src_mask */ |
1483 | 0x00000fff, /* dst_mask */ | |
0a1b45a2 | 1484 | false), /* pcrel_offset */ |
c19d1205 | 1485 | |
07d6d2b8 | 1486 | EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */ |
c19d1205 ZW |
1487 | |
1488 | /* GNU extension to record C++ vtable member usage */ | |
07d6d2b8 AM |
1489 | HOWTO (R_ARM_GNU_VTENTRY, /* type */ |
1490 | 0, /* rightshift */ | |
c94cb026 | 1491 | 4, /* size */ |
07d6d2b8 | 1492 | 0, /* bitsize */ |
0a1b45a2 | 1493 | false, /* pc_relative */ |
07d6d2b8 | 1494 | 0, /* bitpos */ |
99059e56 | 1495 | complain_overflow_dont, /* complain_on_overflow */ |
07d6d2b8 AM |
1496 | _bfd_elf_rel_vtable_reloc_fn, /* special_function */ |
1497 | "R_ARM_GNU_VTENTRY", /* name */ | |
0a1b45a2 | 1498 | false, /* partial_inplace */ |
07d6d2b8 AM |
1499 | 0, /* src_mask */ |
1500 | 0, /* dst_mask */ | |
0a1b45a2 | 1501 | false), /* pcrel_offset */ |
c19d1205 ZW |
1502 | |
1503 | /* GNU extension to record C++ vtable hierarchy */ | |
1504 | HOWTO (R_ARM_GNU_VTINHERIT, /* type */ | |
07d6d2b8 | 1505 | 0, /* rightshift */ |
c94cb026 | 1506 | 4, /* size */ |
07d6d2b8 | 1507 | 0, /* bitsize */ |
0a1b45a2 | 1508 | false, /* pc_relative */ |
07d6d2b8 | 1509 | 0, /* bitpos */ |
99059e56 | 1510 | complain_overflow_dont, /* complain_on_overflow */ |
07d6d2b8 | 1511 | NULL, /* special_function */ |
99059e56 | 1512 | "R_ARM_GNU_VTINHERIT", /* name */ |
0a1b45a2 | 1513 | false, /* partial_inplace */ |
07d6d2b8 AM |
1514 | 0, /* src_mask */ |
1515 | 0, /* dst_mask */ | |
0a1b45a2 | 1516 | false), /* pcrel_offset */ |
c19d1205 ZW |
1517 | |
1518 | HOWTO (R_ARM_THM_JUMP11, /* type */ | |
1519 | 1, /* rightshift */ | |
c94cb026 | 1520 | 2, /* size */ |
c19d1205 | 1521 | 11, /* bitsize */ |
0a1b45a2 | 1522 | true, /* pc_relative */ |
c19d1205 ZW |
1523 | 0, /* bitpos */ |
1524 | complain_overflow_signed, /* complain_on_overflow */ | |
1525 | bfd_elf_generic_reloc, /* special_function */ | |
1526 | "R_ARM_THM_JUMP11", /* name */ | |
0a1b45a2 | 1527 | false, /* partial_inplace */ |
c19d1205 ZW |
1528 | 0x000007ff, /* src_mask */ |
1529 | 0x000007ff, /* dst_mask */ | |
0a1b45a2 | 1530 | true), /* pcrel_offset */ |
c19d1205 ZW |
1531 | |
1532 | HOWTO (R_ARM_THM_JUMP8, /* type */ | |
1533 | 1, /* rightshift */ | |
c94cb026 | 1534 | 2, /* size */ |
c19d1205 | 1535 | 8, /* bitsize */ |
0a1b45a2 | 1536 | true, /* pc_relative */ |
c19d1205 ZW |
1537 | 0, /* bitpos */ |
1538 | complain_overflow_signed, /* complain_on_overflow */ | |
1539 | bfd_elf_generic_reloc, /* special_function */ | |
1540 | "R_ARM_THM_JUMP8", /* name */ | |
0a1b45a2 | 1541 | false, /* partial_inplace */ |
c19d1205 ZW |
1542 | 0x000000ff, /* src_mask */ |
1543 | 0x000000ff, /* dst_mask */ | |
0a1b45a2 | 1544 | true), /* pcrel_offset */ |
ba93b8ac | 1545 | |
c19d1205 ZW |
1546 | /* TLS relocations */ |
1547 | HOWTO (R_ARM_TLS_GD32, /* type */ | |
07d6d2b8 | 1548 | 0, /* rightshift */ |
c94cb026 | 1549 | 4, /* size */ |
07d6d2b8 | 1550 | 32, /* bitsize */ |
0a1b45a2 | 1551 | false, /* pc_relative */ |
07d6d2b8 | 1552 | 0, /* bitpos */ |
99059e56 RM |
1553 | complain_overflow_bitfield,/* complain_on_overflow */ |
1554 | NULL, /* special_function */ | |
1555 | "R_ARM_TLS_GD32", /* name */ | |
0a1b45a2 | 1556 | true, /* partial_inplace */ |
99059e56 RM |
1557 | 0xffffffff, /* src_mask */ |
1558 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1559 | false), /* pcrel_offset */ |
ba93b8ac | 1560 | |
ba93b8ac | 1561 | HOWTO (R_ARM_TLS_LDM32, /* type */ |
07d6d2b8 | 1562 | 0, /* rightshift */ |
c94cb026 | 1563 | 4, /* size */ |
07d6d2b8 | 1564 | 32, /* bitsize */ |
0a1b45a2 | 1565 | false, /* pc_relative */ |
07d6d2b8 | 1566 | 0, /* bitpos */ |
99059e56 RM |
1567 | complain_overflow_bitfield,/* complain_on_overflow */ |
1568 | bfd_elf_generic_reloc, /* special_function */ | |
1569 | "R_ARM_TLS_LDM32", /* name */ | |
0a1b45a2 | 1570 | true, /* partial_inplace */ |
99059e56 RM |
1571 | 0xffffffff, /* src_mask */ |
1572 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1573 | false), /* pcrel_offset */ |
ba93b8ac | 1574 | |
c19d1205 | 1575 | HOWTO (R_ARM_TLS_LDO32, /* type */ |
07d6d2b8 | 1576 | 0, /* rightshift */ |
c94cb026 | 1577 | 4, /* size */ |
07d6d2b8 | 1578 | 32, /* bitsize */ |
0a1b45a2 | 1579 | false, /* pc_relative */ |
07d6d2b8 | 1580 | 0, /* bitpos */ |
99059e56 RM |
1581 | complain_overflow_bitfield,/* complain_on_overflow */ |
1582 | bfd_elf_generic_reloc, /* special_function */ | |
1583 | "R_ARM_TLS_LDO32", /* name */ | |
0a1b45a2 | 1584 | true, /* partial_inplace */ |
99059e56 RM |
1585 | 0xffffffff, /* src_mask */ |
1586 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1587 | false), /* pcrel_offset */ |
ba93b8ac | 1588 | |
ba93b8ac | 1589 | HOWTO (R_ARM_TLS_IE32, /* type */ |
07d6d2b8 | 1590 | 0, /* rightshift */ |
c94cb026 | 1591 | 4, /* size */ |
07d6d2b8 | 1592 | 32, /* bitsize */ |
0a1b45a2 | 1593 | false, /* pc_relative */ |
07d6d2b8 | 1594 | 0, /* bitpos */ |
99059e56 RM |
1595 | complain_overflow_bitfield,/* complain_on_overflow */ |
1596 | NULL, /* special_function */ | |
1597 | "R_ARM_TLS_IE32", /* name */ | |
0a1b45a2 | 1598 | true, /* partial_inplace */ |
99059e56 RM |
1599 | 0xffffffff, /* src_mask */ |
1600 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1601 | false), /* pcrel_offset */ |
7f266840 | 1602 | |
c19d1205 | 1603 | HOWTO (R_ARM_TLS_LE32, /* type */ |
07d6d2b8 | 1604 | 0, /* rightshift */ |
c94cb026 | 1605 | 4, /* size */ |
07d6d2b8 | 1606 | 32, /* bitsize */ |
0a1b45a2 | 1607 | false, /* pc_relative */ |
07d6d2b8 | 1608 | 0, /* bitpos */ |
99059e56 | 1609 | complain_overflow_bitfield,/* complain_on_overflow */ |
07d6d2b8 | 1610 | NULL, /* special_function */ |
99059e56 | 1611 | "R_ARM_TLS_LE32", /* name */ |
0a1b45a2 | 1612 | true, /* partial_inplace */ |
99059e56 RM |
1613 | 0xffffffff, /* src_mask */ |
1614 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1615 | false), /* pcrel_offset */ |
7f266840 | 1616 | |
c19d1205 ZW |
1617 | HOWTO (R_ARM_TLS_LDO12, /* type */ |
1618 | 0, /* rightshift */ | |
c94cb026 | 1619 | 4, /* size */ |
c19d1205 | 1620 | 12, /* bitsize */ |
0a1b45a2 | 1621 | false, /* pc_relative */ |
7f266840 | 1622 | 0, /* bitpos */ |
c19d1205 | 1623 | complain_overflow_bitfield,/* complain_on_overflow */ |
7f266840 | 1624 | bfd_elf_generic_reloc, /* special_function */ |
c19d1205 | 1625 | "R_ARM_TLS_LDO12", /* name */ |
0a1b45a2 | 1626 | false, /* partial_inplace */ |
c19d1205 ZW |
1627 | 0x00000fff, /* src_mask */ |
1628 | 0x00000fff, /* dst_mask */ | |
0a1b45a2 | 1629 | false), /* pcrel_offset */ |
7f266840 | 1630 | |
c19d1205 ZW |
1631 | HOWTO (R_ARM_TLS_LE12, /* type */ |
1632 | 0, /* rightshift */ | |
c94cb026 | 1633 | 4, /* size */ |
c19d1205 | 1634 | 12, /* bitsize */ |
0a1b45a2 | 1635 | false, /* pc_relative */ |
7f266840 | 1636 | 0, /* bitpos */ |
c19d1205 | 1637 | complain_overflow_bitfield,/* complain_on_overflow */ |
7f266840 | 1638 | bfd_elf_generic_reloc, /* special_function */ |
c19d1205 | 1639 | "R_ARM_TLS_LE12", /* name */ |
0a1b45a2 | 1640 | false, /* partial_inplace */ |
c19d1205 ZW |
1641 | 0x00000fff, /* src_mask */ |
1642 | 0x00000fff, /* dst_mask */ | |
0a1b45a2 | 1643 | false), /* pcrel_offset */ |
7f266840 | 1644 | |
c19d1205 | 1645 | HOWTO (R_ARM_TLS_IE12GP, /* type */ |
7f266840 | 1646 | 0, /* rightshift */ |
c94cb026 | 1647 | 4, /* size */ |
c19d1205 | 1648 | 12, /* bitsize */ |
0a1b45a2 | 1649 | false, /* pc_relative */ |
7f266840 | 1650 | 0, /* bitpos */ |
c19d1205 | 1651 | complain_overflow_bitfield,/* complain_on_overflow */ |
7f266840 | 1652 | bfd_elf_generic_reloc, /* special_function */ |
c19d1205 | 1653 | "R_ARM_TLS_IE12GP", /* name */ |
0a1b45a2 | 1654 | false, /* partial_inplace */ |
c19d1205 ZW |
1655 | 0x00000fff, /* src_mask */ |
1656 | 0x00000fff, /* dst_mask */ | |
0a1b45a2 | 1657 | false), /* pcrel_offset */ |
0855e32b | 1658 | |
34e77a92 | 1659 | /* 112-127 private relocations. */ |
0855e32b NS |
1660 | EMPTY_HOWTO (112), |
1661 | EMPTY_HOWTO (113), | |
1662 | EMPTY_HOWTO (114), | |
1663 | EMPTY_HOWTO (115), | |
1664 | EMPTY_HOWTO (116), | |
1665 | EMPTY_HOWTO (117), | |
1666 | EMPTY_HOWTO (118), | |
1667 | EMPTY_HOWTO (119), | |
1668 | EMPTY_HOWTO (120), | |
1669 | EMPTY_HOWTO (121), | |
1670 | EMPTY_HOWTO (122), | |
1671 | EMPTY_HOWTO (123), | |
1672 | EMPTY_HOWTO (124), | |
1673 | EMPTY_HOWTO (125), | |
1674 | EMPTY_HOWTO (126), | |
1675 | EMPTY_HOWTO (127), | |
34e77a92 RS |
1676 | |
1677 | /* R_ARM_ME_TOO, obsolete. */ | |
0855e32b NS |
1678 | EMPTY_HOWTO (128), |
1679 | ||
1680 | HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */ | |
1681 | 0, /* rightshift */ | |
c94cb026 | 1682 | 2, /* size */ |
0855e32b | 1683 | 0, /* bitsize */ |
0a1b45a2 | 1684 | false, /* pc_relative */ |
0855e32b | 1685 | 0, /* bitpos */ |
821e059c | 1686 | complain_overflow_dont,/* complain_on_overflow */ |
0855e32b NS |
1687 | bfd_elf_generic_reloc, /* special_function */ |
1688 | "R_ARM_THM_TLS_DESCSEQ",/* name */ | |
0a1b45a2 | 1689 | false, /* partial_inplace */ |
0855e32b NS |
1690 | 0x00000000, /* src_mask */ |
1691 | 0x00000000, /* dst_mask */ | |
0a1b45a2 | 1692 | false), /* pcrel_offset */ |
72d98d16 MG |
1693 | EMPTY_HOWTO (130), |
1694 | EMPTY_HOWTO (131), | |
1695 | HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */ | |
1696 | 0, /* rightshift. */ | |
c94cb026 | 1697 | 2, /* size. */ |
72d98d16 | 1698 | 16, /* bitsize. */ |
0a1b45a2 | 1699 | false, /* pc_relative. */ |
72d98d16 MG |
1700 | 0, /* bitpos. */ |
1701 | complain_overflow_bitfield,/* complain_on_overflow. */ | |
1702 | bfd_elf_generic_reloc, /* special_function. */ | |
1703 | "R_ARM_THM_ALU_ABS_G0_NC",/* name. */ | |
0a1b45a2 | 1704 | false, /* partial_inplace. */ |
72d98d16 MG |
1705 | 0x00000000, /* src_mask. */ |
1706 | 0x00000000, /* dst_mask. */ | |
0a1b45a2 | 1707 | false), /* pcrel_offset. */ |
72d98d16 MG |
1708 | HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */ |
1709 | 0, /* rightshift. */ | |
c94cb026 | 1710 | 2, /* size. */ |
72d98d16 | 1711 | 16, /* bitsize. */ |
0a1b45a2 | 1712 | false, /* pc_relative. */ |
72d98d16 MG |
1713 | 0, /* bitpos. */ |
1714 | complain_overflow_bitfield,/* complain_on_overflow. */ | |
1715 | bfd_elf_generic_reloc, /* special_function. */ | |
1716 | "R_ARM_THM_ALU_ABS_G1_NC",/* name. */ | |
0a1b45a2 | 1717 | false, /* partial_inplace. */ |
72d98d16 MG |
1718 | 0x00000000, /* src_mask. */ |
1719 | 0x00000000, /* dst_mask. */ | |
0a1b45a2 | 1720 | false), /* pcrel_offset. */ |
72d98d16 MG |
1721 | HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */ |
1722 | 0, /* rightshift. */ | |
c94cb026 | 1723 | 2, /* size. */ |
72d98d16 | 1724 | 16, /* bitsize. */ |
0a1b45a2 | 1725 | false, /* pc_relative. */ |
72d98d16 MG |
1726 | 0, /* bitpos. */ |
1727 | complain_overflow_bitfield,/* complain_on_overflow. */ | |
1728 | bfd_elf_generic_reloc, /* special_function. */ | |
1729 | "R_ARM_THM_ALU_ABS_G2_NC",/* name. */ | |
0a1b45a2 | 1730 | false, /* partial_inplace. */ |
72d98d16 MG |
1731 | 0x00000000, /* src_mask. */ |
1732 | 0x00000000, /* dst_mask. */ | |
0a1b45a2 | 1733 | false), /* pcrel_offset. */ |
72d98d16 MG |
1734 | HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */ |
1735 | 0, /* rightshift. */ | |
c94cb026 | 1736 | 2, /* size. */ |
72d98d16 | 1737 | 16, /* bitsize. */ |
0a1b45a2 | 1738 | false, /* pc_relative. */ |
72d98d16 MG |
1739 | 0, /* bitpos. */ |
1740 | complain_overflow_bitfield,/* complain_on_overflow. */ | |
1741 | bfd_elf_generic_reloc, /* special_function. */ | |
1742 | "R_ARM_THM_ALU_ABS_G3_NC",/* name. */ | |
0a1b45a2 | 1743 | false, /* partial_inplace. */ |
72d98d16 MG |
1744 | 0x00000000, /* src_mask. */ |
1745 | 0x00000000, /* dst_mask. */ | |
0a1b45a2 | 1746 | false), /* pcrel_offset. */ |
e5d6e09e AV |
1747 | /* Relocations for Armv8.1-M Mainline. */ |
1748 | HOWTO (R_ARM_THM_BF16, /* type. */ | |
1749 | 0, /* rightshift. */ | |
c94cb026 | 1750 | 2, /* size. */ |
e5d6e09e | 1751 | 16, /* bitsize. */ |
0a1b45a2 | 1752 | true, /* pc_relative. */ |
e5d6e09e AV |
1753 | 0, /* bitpos. */ |
1754 | complain_overflow_dont,/* do not complain_on_overflow. */ | |
1755 | bfd_elf_generic_reloc, /* special_function. */ | |
1756 | "R_ARM_THM_BF16", /* name. */ | |
0a1b45a2 | 1757 | false, /* partial_inplace. */ |
e5d6e09e AV |
1758 | 0x001f0ffe, /* src_mask. */ |
1759 | 0x001f0ffe, /* dst_mask. */ | |
0a1b45a2 | 1760 | true), /* pcrel_offset. */ |
1889da70 AV |
1761 | HOWTO (R_ARM_THM_BF12, /* type. */ |
1762 | 0, /* rightshift. */ | |
c94cb026 | 1763 | 2, /* size. */ |
1889da70 | 1764 | 12, /* bitsize. */ |
0a1b45a2 | 1765 | true, /* pc_relative. */ |
1889da70 AV |
1766 | 0, /* bitpos. */ |
1767 | complain_overflow_dont,/* do not complain_on_overflow. */ | |
1768 | bfd_elf_generic_reloc, /* special_function. */ | |
1769 | "R_ARM_THM_BF12", /* name. */ | |
0a1b45a2 | 1770 | false, /* partial_inplace. */ |
1889da70 AV |
1771 | 0x00010ffe, /* src_mask. */ |
1772 | 0x00010ffe, /* dst_mask. */ | |
0a1b45a2 | 1773 | true), /* pcrel_offset. */ |
1caf72a5 AV |
1774 | HOWTO (R_ARM_THM_BF18, /* type. */ |
1775 | 0, /* rightshift. */ | |
c94cb026 | 1776 | 2, /* size. */ |
1caf72a5 | 1777 | 18, /* bitsize. */ |
0a1b45a2 | 1778 | true, /* pc_relative. */ |
1caf72a5 AV |
1779 | 0, /* bitpos. */ |
1780 | complain_overflow_dont,/* do not complain_on_overflow. */ | |
1781 | bfd_elf_generic_reloc, /* special_function. */ | |
1782 | "R_ARM_THM_BF18", /* name. */ | |
0a1b45a2 | 1783 | false, /* partial_inplace. */ |
1caf72a5 AV |
1784 | 0x007f0ffe, /* src_mask. */ |
1785 | 0x007f0ffe, /* dst_mask. */ | |
0a1b45a2 | 1786 | true), /* pcrel_offset. */ |
c19d1205 ZW |
1787 | }; |
1788 | ||
34e77a92 | 1789 | /* 160 onwards: */ |
5c5a4843 | 1790 | static reloc_howto_type elf32_arm_howto_table_2[8] = |
34e77a92 RS |
1791 | { |
1792 | HOWTO (R_ARM_IRELATIVE, /* type */ | |
07d6d2b8 | 1793 | 0, /* rightshift */ |
c94cb026 | 1794 | 4, /* size */ |
07d6d2b8 | 1795 | 32, /* bitsize */ |
0a1b45a2 | 1796 | false, /* pc_relative */ |
07d6d2b8 | 1797 | 0, /* bitpos */ |
99059e56 RM |
1798 | complain_overflow_bitfield,/* complain_on_overflow */ |
1799 | bfd_elf_generic_reloc, /* special_function */ | |
1800 | "R_ARM_IRELATIVE", /* name */ | |
0a1b45a2 | 1801 | true, /* partial_inplace */ |
99059e56 RM |
1802 | 0xffffffff, /* src_mask */ |
1803 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1804 | false), /* pcrel_offset */ |
188fd7ae CL |
1805 | HOWTO (R_ARM_GOTFUNCDESC, /* type */ |
1806 | 0, /* rightshift */ | |
c94cb026 | 1807 | 4, /* size */ |
188fd7ae | 1808 | 32, /* bitsize */ |
0a1b45a2 | 1809 | false, /* pc_relative */ |
188fd7ae CL |
1810 | 0, /* bitpos */ |
1811 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1812 | bfd_elf_generic_reloc, /* special_function */ | |
1813 | "R_ARM_GOTFUNCDESC", /* name */ | |
0a1b45a2 | 1814 | false, /* partial_inplace */ |
188fd7ae CL |
1815 | 0, /* src_mask */ |
1816 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1817 | false), /* pcrel_offset */ |
188fd7ae CL |
1818 | HOWTO (R_ARM_GOTOFFFUNCDESC, /* type */ |
1819 | 0, /* rightshift */ | |
c94cb026 | 1820 | 4, /* size */ |
188fd7ae | 1821 | 32, /* bitsize */ |
0a1b45a2 | 1822 | false, /* pc_relative */ |
188fd7ae CL |
1823 | 0, /* bitpos */ |
1824 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1825 | bfd_elf_generic_reloc, /* special_function */ | |
1826 | "R_ARM_GOTOFFFUNCDESC",/* name */ | |
0a1b45a2 | 1827 | false, /* partial_inplace */ |
188fd7ae CL |
1828 | 0, /* src_mask */ |
1829 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1830 | false), /* pcrel_offset */ |
188fd7ae CL |
1831 | HOWTO (R_ARM_FUNCDESC, /* type */ |
1832 | 0, /* rightshift */ | |
c94cb026 | 1833 | 4, /* size */ |
188fd7ae | 1834 | 32, /* bitsize */ |
0a1b45a2 | 1835 | false, /* pc_relative */ |
188fd7ae CL |
1836 | 0, /* bitpos */ |
1837 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1838 | bfd_elf_generic_reloc, /* special_function */ | |
1839 | "R_ARM_FUNCDESC", /* name */ | |
0a1b45a2 | 1840 | false, /* partial_inplace */ |
188fd7ae CL |
1841 | 0, /* src_mask */ |
1842 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1843 | false), /* pcrel_offset */ |
188fd7ae CL |
1844 | HOWTO (R_ARM_FUNCDESC_VALUE, /* type */ |
1845 | 0, /* rightshift */ | |
c94cb026 | 1846 | 4, /* size */ |
188fd7ae | 1847 | 64, /* bitsize */ |
0a1b45a2 | 1848 | false, /* pc_relative */ |
188fd7ae CL |
1849 | 0, /* bitpos */ |
1850 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1851 | bfd_elf_generic_reloc, /* special_function */ | |
1852 | "R_ARM_FUNCDESC_VALUE",/* name */ | |
0a1b45a2 | 1853 | false, /* partial_inplace */ |
188fd7ae CL |
1854 | 0, /* src_mask */ |
1855 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1856 | false), /* pcrel_offset */ |
5c5a4843 CL |
1857 | HOWTO (R_ARM_TLS_GD32_FDPIC, /* type */ |
1858 | 0, /* rightshift */ | |
c94cb026 | 1859 | 4, /* size */ |
5c5a4843 | 1860 | 32, /* bitsize */ |
0a1b45a2 | 1861 | false, /* pc_relative */ |
5c5a4843 CL |
1862 | 0, /* bitpos */ |
1863 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1864 | bfd_elf_generic_reloc, /* special_function */ | |
1865 | "R_ARM_TLS_GD32_FDPIC",/* name */ | |
0a1b45a2 | 1866 | false, /* partial_inplace */ |
5c5a4843 CL |
1867 | 0, /* src_mask */ |
1868 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1869 | false), /* pcrel_offset */ |
5c5a4843 CL |
1870 | HOWTO (R_ARM_TLS_LDM32_FDPIC, /* type */ |
1871 | 0, /* rightshift */ | |
c94cb026 | 1872 | 4, /* size */ |
5c5a4843 | 1873 | 32, /* bitsize */ |
0a1b45a2 | 1874 | false, /* pc_relative */ |
5c5a4843 CL |
1875 | 0, /* bitpos */ |
1876 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1877 | bfd_elf_generic_reloc, /* special_function */ | |
1878 | "R_ARM_TLS_LDM32_FDPIC",/* name */ | |
0a1b45a2 | 1879 | false, /* partial_inplace */ |
5c5a4843 CL |
1880 | 0, /* src_mask */ |
1881 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1882 | false), /* pcrel_offset */ |
5c5a4843 CL |
1883 | HOWTO (R_ARM_TLS_IE32_FDPIC, /* type */ |
1884 | 0, /* rightshift */ | |
c94cb026 | 1885 | 4, /* size */ |
5c5a4843 | 1886 | 32, /* bitsize */ |
0a1b45a2 | 1887 | false, /* pc_relative */ |
5c5a4843 CL |
1888 | 0, /* bitpos */ |
1889 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1890 | bfd_elf_generic_reloc, /* special_function */ | |
1891 | "R_ARM_TLS_IE32_FDPIC",/* name */ | |
0a1b45a2 | 1892 | false, /* partial_inplace */ |
5c5a4843 CL |
1893 | 0, /* src_mask */ |
1894 | 0xffffffff, /* dst_mask */ | |
0a1b45a2 | 1895 | false), /* pcrel_offset */ |
34e77a92 | 1896 | }; |
c19d1205 | 1897 | |
34e77a92 RS |
1898 | /* 249-255 extended, currently unused, relocations: */ |
1899 | static reloc_howto_type elf32_arm_howto_table_3[4] = | |
7f266840 DJ |
1900 | { |
1901 | HOWTO (R_ARM_RREL32, /* type */ | |
1902 | 0, /* rightshift */ | |
5d0feb98 | 1903 | 0, /* size */ |
7f266840 | 1904 | 0, /* bitsize */ |
0a1b45a2 | 1905 | false, /* pc_relative */ |
7f266840 DJ |
1906 | 0, /* bitpos */ |
1907 | complain_overflow_dont,/* complain_on_overflow */ | |
1908 | bfd_elf_generic_reloc, /* special_function */ | |
1909 | "R_ARM_RREL32", /* name */ | |
0a1b45a2 | 1910 | false, /* partial_inplace */ |
7f266840 DJ |
1911 | 0, /* src_mask */ |
1912 | 0, /* dst_mask */ | |
0a1b45a2 | 1913 | false), /* pcrel_offset */ |
7f266840 DJ |
1914 | |
1915 | HOWTO (R_ARM_RABS32, /* type */ | |
1916 | 0, /* rightshift */ | |
5d0feb98 | 1917 | 0, /* size */ |
7f266840 | 1918 | 0, /* bitsize */ |
0a1b45a2 | 1919 | false, /* pc_relative */ |
7f266840 DJ |
1920 | 0, /* bitpos */ |
1921 | complain_overflow_dont,/* complain_on_overflow */ | |
1922 | bfd_elf_generic_reloc, /* special_function */ | |
1923 | "R_ARM_RABS32", /* name */ | |
0a1b45a2 | 1924 | false, /* partial_inplace */ |
7f266840 DJ |
1925 | 0, /* src_mask */ |
1926 | 0, /* dst_mask */ | |
0a1b45a2 | 1927 | false), /* pcrel_offset */ |
7f266840 DJ |
1928 | |
1929 | HOWTO (R_ARM_RPC24, /* type */ | |
1930 | 0, /* rightshift */ | |
5d0feb98 | 1931 | 0, /* size */ |
7f266840 | 1932 | 0, /* bitsize */ |
0a1b45a2 | 1933 | false, /* pc_relative */ |
7f266840 DJ |
1934 | 0, /* bitpos */ |
1935 | complain_overflow_dont,/* complain_on_overflow */ | |
1936 | bfd_elf_generic_reloc, /* special_function */ | |
1937 | "R_ARM_RPC24", /* name */ | |
0a1b45a2 | 1938 | false, /* partial_inplace */ |
7f266840 DJ |
1939 | 0, /* src_mask */ |
1940 | 0, /* dst_mask */ | |
0a1b45a2 | 1941 | false), /* pcrel_offset */ |
7f266840 DJ |
1942 | |
1943 | HOWTO (R_ARM_RBASE, /* type */ | |
1944 | 0, /* rightshift */ | |
5d0feb98 | 1945 | 0, /* size */ |
7f266840 | 1946 | 0, /* bitsize */ |
0a1b45a2 | 1947 | false, /* pc_relative */ |
7f266840 DJ |
1948 | 0, /* bitpos */ |
1949 | complain_overflow_dont,/* complain_on_overflow */ | |
1950 | bfd_elf_generic_reloc, /* special_function */ | |
1951 | "R_ARM_RBASE", /* name */ | |
0a1b45a2 | 1952 | false, /* partial_inplace */ |
7f266840 DJ |
1953 | 0, /* src_mask */ |
1954 | 0, /* dst_mask */ | |
0a1b45a2 | 1955 | false) /* pcrel_offset */ |
7f266840 DJ |
1956 | }; |
1957 | ||
1958 | static reloc_howto_type * | |
1959 | elf32_arm_howto_from_type (unsigned int r_type) | |
1960 | { | |
906e58ca | 1961 | if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1)) |
c19d1205 | 1962 | return &elf32_arm_howto_table_1[r_type]; |
ba93b8ac | 1963 | |
188fd7ae CL |
1964 | if (r_type >= R_ARM_IRELATIVE |
1965 | && r_type < R_ARM_IRELATIVE + ARRAY_SIZE (elf32_arm_howto_table_2)) | |
34e77a92 RS |
1966 | return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE]; |
1967 | ||
c19d1205 | 1968 | if (r_type >= R_ARM_RREL32 |
34e77a92 RS |
1969 | && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3)) |
1970 | return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32]; | |
7f266840 | 1971 | |
c19d1205 | 1972 | return NULL; |
7f266840 DJ |
1973 | } |
1974 | ||
0a1b45a2 | 1975 | static bool |
f3185997 | 1976 | elf32_arm_info_to_howto (bfd * abfd, arelent * bfd_reloc, |
7f266840 DJ |
1977 | Elf_Internal_Rela * elf_reloc) |
1978 | { | |
1979 | unsigned int r_type; | |
1980 | ||
1981 | r_type = ELF32_R_TYPE (elf_reloc->r_info); | |
f3185997 NC |
1982 | if ((bfd_reloc->howto = elf32_arm_howto_from_type (r_type)) == NULL) |
1983 | { | |
1984 | /* xgettext:c-format */ | |
1985 | _bfd_error_handler (_("%pB: unsupported relocation type %#x"), | |
1986 | abfd, r_type); | |
1987 | bfd_set_error (bfd_error_bad_value); | |
0a1b45a2 | 1988 | return false; |
f3185997 | 1989 | } |
0a1b45a2 | 1990 | return true; |
7f266840 DJ |
1991 | } |
1992 | ||
1993 | struct elf32_arm_reloc_map | |
1994 | { | |
1995 | bfd_reloc_code_real_type bfd_reloc_val; | |
07d6d2b8 | 1996 | unsigned char elf_reloc_val; |
7f266840 DJ |
1997 | }; |
1998 | ||
1999 | /* All entries in this list must also be present in elf32_arm_howto_table. */ | |
2000 | static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] = | |
2001 | { | |
07d6d2b8 | 2002 | {BFD_RELOC_NONE, R_ARM_NONE}, |
7f266840 | 2003 | {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24}, |
39b41c9c PB |
2004 | {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL}, |
2005 | {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24}, | |
07d6d2b8 AM |
2006 | {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25}, |
2007 | {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22}, | |
2008 | {BFD_RELOC_32, R_ARM_ABS32}, | |
2009 | {BFD_RELOC_32_PCREL, R_ARM_REL32}, | |
2010 | {BFD_RELOC_8, R_ARM_ABS8}, | |
2011 | {BFD_RELOC_16, R_ARM_ABS16}, | |
2012 | {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12}, | |
7f266840 | 2013 | {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5}, |
c19d1205 ZW |
2014 | {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24}, |
2015 | {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL}, | |
2016 | {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11}, | |
2017 | {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19}, | |
2018 | {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8}, | |
2019 | {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6}, | |
07d6d2b8 AM |
2020 | {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT}, |
2021 | {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT}, | |
2022 | {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE}, | |
2023 | {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32}, | |
2024 | {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC}, | |
2025 | {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL}, | |
2026 | {BFD_RELOC_ARM_GOT32, R_ARM_GOT32}, | |
2027 | {BFD_RELOC_ARM_PLT32, R_ARM_PLT32}, | |
7f266840 DJ |
2028 | {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1}, |
2029 | {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32}, | |
2030 | {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32}, | |
2031 | {BFD_RELOC_ARM_PREL31, R_ARM_PREL31}, | |
ba93b8ac | 2032 | {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2}, |
07d6d2b8 AM |
2033 | {BFD_RELOC_ARM_PLT32, R_ARM_PLT32}, |
2034 | {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC}, | |
2035 | {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL}, | |
0855e32b | 2036 | {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL}, |
07d6d2b8 | 2037 | {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ}, |
0855e32b | 2038 | {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ}, |
07d6d2b8 | 2039 | {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC}, |
ba93b8ac DJ |
2040 | {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32}, |
2041 | {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32}, | |
2042 | {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32}, | |
2043 | {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32}, | |
2044 | {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32}, | |
07d6d2b8 AM |
2045 | {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32}, |
2046 | {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32}, | |
2047 | {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32}, | |
2048 | {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE}, | |
188fd7ae CL |
2049 | {BFD_RELOC_ARM_GOTFUNCDESC, R_ARM_GOTFUNCDESC}, |
2050 | {BFD_RELOC_ARM_GOTOFFFUNCDESC, R_ARM_GOTOFFFUNCDESC}, | |
2051 | {BFD_RELOC_ARM_FUNCDESC, R_ARM_FUNCDESC}, | |
2052 | {BFD_RELOC_ARM_FUNCDESC_VALUE, R_ARM_FUNCDESC_VALUE}, | |
5c5a4843 CL |
2053 | {BFD_RELOC_ARM_TLS_GD32_FDPIC, R_ARM_TLS_GD32_FDPIC}, |
2054 | {BFD_RELOC_ARM_TLS_LDM32_FDPIC, R_ARM_TLS_LDM32_FDPIC}, | |
2055 | {BFD_RELOC_ARM_TLS_IE32_FDPIC, R_ARM_TLS_IE32_FDPIC}, | |
c19d1205 ZW |
2056 | {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT}, |
2057 | {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY}, | |
b6895b4f PB |
2058 | {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC}, |
2059 | {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS}, | |
2060 | {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC}, | |
2061 | {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL}, | |
2062 | {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC}, | |
2063 | {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS}, | |
2064 | {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC}, | |
2065 | {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL}, | |
4962c51a MS |
2066 | {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC}, |
2067 | {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0}, | |
2068 | {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC}, | |
2069 | {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1}, | |
2070 | {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2}, | |
2071 | {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0}, | |
2072 | {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1}, | |
2073 | {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2}, | |
2074 | {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0}, | |
2075 | {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1}, | |
2076 | {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2}, | |
2077 | {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0}, | |
2078 | {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1}, | |
2079 | {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2}, | |
2080 | {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC}, | |
2081 | {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0}, | |
2082 | {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC}, | |
2083 | {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1}, | |
2084 | {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2}, | |
2085 | {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0}, | |
2086 | {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1}, | |
2087 | {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2}, | |
2088 | {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0}, | |
2089 | {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1}, | |
2090 | {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2}, | |
2091 | {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0}, | |
2092 | {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1}, | |
845b51d6 | 2093 | {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2}, |
72d98d16 MG |
2094 | {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}, |
2095 | {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC}, | |
2096 | {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC}, | |
2097 | {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC}, | |
e5d6e09e | 2098 | {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC}, |
1caf72a5 | 2099 | {BFD_RELOC_ARM_THUMB_BF17, R_ARM_THM_BF16}, |
1889da70 | 2100 | {BFD_RELOC_ARM_THUMB_BF13, R_ARM_THM_BF12}, |
1caf72a5 | 2101 | {BFD_RELOC_ARM_THUMB_BF19, R_ARM_THM_BF18} |
7f266840 DJ |
2102 | }; |
2103 | ||
2104 | static reloc_howto_type * | |
f1c71a59 ZW |
2105 | elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, |
2106 | bfd_reloc_code_real_type code) | |
7f266840 DJ |
2107 | { |
2108 | unsigned int i; | |
8029a119 | 2109 | |
906e58ca | 2110 | for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++) |
c19d1205 ZW |
2111 | if (elf32_arm_reloc_map[i].bfd_reloc_val == code) |
2112 | return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val); | |
7f266840 | 2113 | |
c19d1205 | 2114 | return NULL; |
7f266840 DJ |
2115 | } |
2116 | ||
157090f7 AM |
2117 | static reloc_howto_type * |
2118 | elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, | |
2119 | const char *r_name) | |
2120 | { | |
2121 | unsigned int i; | |
2122 | ||
906e58ca | 2123 | for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++) |
157090f7 AM |
2124 | if (elf32_arm_howto_table_1[i].name != NULL |
2125 | && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0) | |
2126 | return &elf32_arm_howto_table_1[i]; | |
2127 | ||
906e58ca | 2128 | for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++) |
157090f7 AM |
2129 | if (elf32_arm_howto_table_2[i].name != NULL |
2130 | && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0) | |
2131 | return &elf32_arm_howto_table_2[i]; | |
2132 | ||
34e77a92 RS |
2133 | for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++) |
2134 | if (elf32_arm_howto_table_3[i].name != NULL | |
2135 | && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0) | |
2136 | return &elf32_arm_howto_table_3[i]; | |
2137 | ||
157090f7 AM |
2138 | return NULL; |
2139 | } | |
2140 | ||
906e58ca NC |
2141 | /* Support for core dump NOTE sections. */ |
2142 | ||
0a1b45a2 | 2143 | static bool |
f1c71a59 | 2144 | elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note) |
7f266840 DJ |
2145 | { |
2146 | int offset; | |
2147 | size_t size; | |
2148 | ||
2149 | switch (note->descsz) | |
2150 | { | |
2151 | default: | |
0a1b45a2 | 2152 | return false; |
7f266840 | 2153 | |
8029a119 | 2154 | case 148: /* Linux/ARM 32-bit. */ |
7f266840 | 2155 | /* pr_cursig */ |
228e534f | 2156 | elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12); |
7f266840 DJ |
2157 | |
2158 | /* pr_pid */ | |
228e534f | 2159 | elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24); |
7f266840 DJ |
2160 | |
2161 | /* pr_reg */ | |
2162 | offset = 72; | |
2163 | size = 72; | |
2164 | ||
2165 | break; | |
2166 | } | |
2167 | ||
2168 | /* Make a ".reg/999" section. */ | |
2169 | return _bfd_elfcore_make_pseudosection (abfd, ".reg", | |
2170 | size, note->descpos + offset); | |
2171 | } | |
2172 | ||
0a1b45a2 | 2173 | static bool |
f1c71a59 | 2174 | elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note) |
7f266840 DJ |
2175 | { |
2176 | switch (note->descsz) | |
2177 | { | |
2178 | default: | |
0a1b45a2 | 2179 | return false; |
7f266840 | 2180 | |
8029a119 | 2181 | case 124: /* Linux/ARM elf_prpsinfo. */ |
228e534f | 2182 | elf_tdata (abfd)->core->pid |
4395ee08 | 2183 | = bfd_get_32 (abfd, note->descdata + 12); |
228e534f | 2184 | elf_tdata (abfd)->core->program |
7f266840 | 2185 | = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16); |
228e534f | 2186 | elf_tdata (abfd)->core->command |
7f266840 DJ |
2187 | = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80); |
2188 | } | |
2189 | ||
2190 | /* Note that for some reason, a spurious space is tacked | |
2191 | onto the end of the args in some (at least one anyway) | |
2192 | implementations, so strip it off if it exists. */ | |
7f266840 | 2193 | { |
228e534f | 2194 | char *command = elf_tdata (abfd)->core->command; |
7f266840 DJ |
2195 | int n = strlen (command); |
2196 | ||
2197 | if (0 < n && command[n - 1] == ' ') | |
2198 | command[n - 1] = '\0'; | |
2199 | } | |
2200 | ||
0a1b45a2 | 2201 | return true; |
7f266840 DJ |
2202 | } |
2203 | ||
1f20dca5 UW |
2204 | static char * |
2205 | elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz, | |
2206 | int note_type, ...) | |
2207 | { | |
2208 | switch (note_type) | |
2209 | { | |
2210 | default: | |
2211 | return NULL; | |
2212 | ||
2213 | case NT_PRPSINFO: | |
2214 | { | |
602f1657 | 2215 | char data[124] ATTRIBUTE_NONSTRING; |
1f20dca5 UW |
2216 | va_list ap; |
2217 | ||
2218 | va_start (ap, note_type); | |
2219 | memset (data, 0, sizeof (data)); | |
2220 | strncpy (data + 28, va_arg (ap, const char *), 16); | |
be3e27bb | 2221 | #if GCC_VERSION == 8000 || GCC_VERSION == 8001 |
95da9854 | 2222 | DIAGNOSTIC_PUSH; |
be3e27bb | 2223 | /* GCC 8.0 and 8.1 warn about 80 equals destination size with |
95da9854 L |
2224 | -Wstringop-truncation: |
2225 | https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85643 | |
2226 | */ | |
95da9854 L |
2227 | DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION; |
2228 | #endif | |
1f20dca5 | 2229 | strncpy (data + 44, va_arg (ap, const char *), 80); |
be3e27bb | 2230 | #if GCC_VERSION == 8000 || GCC_VERSION == 8001 |
95da9854 | 2231 | DIAGNOSTIC_POP; |
fe75810f | 2232 | #endif |
1f20dca5 UW |
2233 | va_end (ap); |
2234 | ||
2235 | return elfcore_write_note (abfd, buf, bufsiz, | |
2236 | "CORE", note_type, data, sizeof (data)); | |
2237 | } | |
2238 | ||
2239 | case NT_PRSTATUS: | |
2240 | { | |
2241 | char data[148]; | |
2242 | va_list ap; | |
2243 | long pid; | |
2244 | int cursig; | |
2245 | const void *greg; | |
2246 | ||
2247 | va_start (ap, note_type); | |
2248 | memset (data, 0, sizeof (data)); | |
2249 | pid = va_arg (ap, long); | |
2250 | bfd_put_32 (abfd, pid, data + 24); | |
2251 | cursig = va_arg (ap, int); | |
2252 | bfd_put_16 (abfd, cursig, data + 12); | |
2253 | greg = va_arg (ap, const void *); | |
2254 | memcpy (data + 72, greg, 72); | |
2255 | va_end (ap); | |
2256 | ||
2257 | return elfcore_write_note (abfd, buf, bufsiz, | |
2258 | "CORE", note_type, data, sizeof (data)); | |
2259 | } | |
2260 | } | |
2261 | } | |
2262 | ||
07d6d2b8 AM |
2263 | #define TARGET_LITTLE_SYM arm_elf32_le_vec |
2264 | #define TARGET_LITTLE_NAME "elf32-littlearm" | |
2265 | #define TARGET_BIG_SYM arm_elf32_be_vec | |
2266 | #define TARGET_BIG_NAME "elf32-bigarm" | |
7f266840 DJ |
2267 | |
2268 | #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus | |
2269 | #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo | |
1f20dca5 | 2270 | #define elf_backend_write_core_note elf32_arm_nabi_write_core_note |
7f266840 | 2271 | |
252b5132 RH |
2272 | typedef unsigned long int insn32; |
2273 | typedef unsigned short int insn16; | |
2274 | ||
3a4a14e9 PB |
2275 | /* In lieu of proper flags, assume all EABIv4 or later objects are |
2276 | interworkable. */ | |
57e8b36a | 2277 | #define INTERWORK_FLAG(abfd) \ |
3a4a14e9 | 2278 | (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \ |
3e6b1042 DJ |
2279 | || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \ |
2280 | || ((abfd)->flags & BFD_LINKER_CREATED)) | |
9b485d32 | 2281 | |
252b5132 RH |
2282 | /* The linker script knows the section names for placement. |
2283 | The entry_names are used to do simple name mangling on the stubs. | |
2284 | Given a function name, and its type, the stub can be found. The | |
9b485d32 | 2285 | name can be changed. The only requirement is the %s be present. */ |
252b5132 RH |
2286 | #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t" |
2287 | #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb" | |
2288 | ||
2289 | #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7" | |
2290 | #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm" | |
2291 | ||
c7b8f16e JB |
2292 | #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer" |
2293 | #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x" | |
2294 | ||
a504d23a LA |
2295 | #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer" |
2296 | #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x" | |
2297 | ||
845b51d6 PB |
2298 | #define ARM_BX_GLUE_SECTION_NAME ".v4_bx" |
2299 | #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d" | |
2300 | ||
7413f23f DJ |
2301 | #define STUB_ENTRY_NAME "__%s_veneer" |
2302 | ||
4ba2ef8f TP |
2303 | #define CMSE_PREFIX "__acle_se_" |
2304 | ||
4d83e8d9 CL |
2305 | #define CMSE_STUB_NAME ".gnu.sgstubs" |
2306 | ||
252b5132 RH |
2307 | /* The name of the dynamic interpreter. This is put in the .interp |
2308 | section. */ | |
2309 | #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1" | |
2310 | ||
cb10292c CL |
2311 | /* FDPIC default stack size. */ |
2312 | #define DEFAULT_STACK_SIZE 0x8000 | |
2313 | ||
0855e32b | 2314 | static const unsigned long tls_trampoline [] = |
b38cadfb NC |
2315 | { |
2316 | 0xe08e0000, /* add r0, lr, r0 */ | |
2317 | 0xe5901004, /* ldr r1, [r0,#4] */ | |
2318 | 0xe12fff11, /* bx r1 */ | |
2319 | }; | |
0855e32b NS |
2320 | |
2321 | static const unsigned long dl_tlsdesc_lazy_trampoline [] = | |
b38cadfb NC |
2322 | { |
2323 | 0xe52d2004, /* push {r2} */ | |
2324 | 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */ | |
2325 | 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */ | |
2326 | 0xe79f2002, /* 1: ldr r2, [pc, r2] */ | |
2327 | 0xe081100f, /* 2: add r1, pc */ | |
2328 | 0xe12fff12, /* bx r2 */ | |
2329 | 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8 | |
99059e56 | 2330 | + dl_tlsdesc_lazy_resolver(GOT) */ |
b38cadfb NC |
2331 | 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */ |
2332 | }; | |
0855e32b | 2333 | |
b4e87f2c TC |
2334 | /* NOTE: [Thumb nop sequence] |
2335 | When adding code that transitions from Thumb to Arm the instruction that | |
2336 | should be used for the alignment padding should be 0xe7fd (b .-2) instead of | |
2337 | a nop for performance reasons. */ | |
2338 | ||
7801f98f CL |
2339 | /* ARM FDPIC PLT entry. */ |
2340 | /* The last 5 words contain PLT lazy fragment code and data. */ | |
2341 | static const bfd_vma elf32_arm_fdpic_plt_entry [] = | |
2342 | { | |
2343 | 0xe59fc008, /* ldr r12, .L1 */ | |
2344 | 0xe08cc009, /* add r12, r12, r9 */ | |
2345 | 0xe59c9004, /* ldr r9, [r12, #4] */ | |
2346 | 0xe59cf000, /* ldr pc, [r12] */ | |
2347 | 0x00000000, /* L1. .word foo(GOTOFFFUNCDESC) */ | |
2348 | 0x00000000, /* L1. .word foo(funcdesc_value_reloc_offset) */ | |
2349 | 0xe51fc00c, /* ldr r12, [pc, #-12] */ | |
2350 | 0xe92d1000, /* push {r12} */ | |
2351 | 0xe599c004, /* ldr r12, [r9, #4] */ | |
2352 | 0xe599f000, /* ldr pc, [r9] */ | |
2353 | }; | |
2354 | ||
59029f57 CL |
2355 | /* Thumb FDPIC PLT entry. */ |
2356 | /* The last 5 words contain PLT lazy fragment code and data. */ | |
2357 | static const bfd_vma elf32_arm_fdpic_thumb_plt_entry [] = | |
2358 | { | |
2359 | 0xc00cf8df, /* ldr.w r12, .L1 */ | |
2360 | 0x0c09eb0c, /* add.w r12, r12, r9 */ | |
2361 | 0x9004f8dc, /* ldr.w r9, [r12, #4] */ | |
2362 | 0xf000f8dc, /* ldr.w pc, [r12] */ | |
2363 | 0x00000000, /* .L1 .word foo(GOTOFFFUNCDESC) */ | |
2364 | 0x00000000, /* .L2 .word foo(funcdesc_value_reloc_offset) */ | |
2365 | 0xc008f85f, /* ldr.w r12, .L2 */ | |
2366 | 0xcd04f84d, /* push {r12} */ | |
2367 | 0xc004f8d9, /* ldr.w r12, [r9, #4] */ | |
2368 | 0xf000f8d9, /* ldr.w pc, [r9] */ | |
2369 | }; | |
2370 | ||
5e681ec4 PB |
2371 | #ifdef FOUR_WORD_PLT |
2372 | ||
252b5132 RH |
2373 | /* The first entry in a procedure linkage table looks like |
2374 | this. It is set up so that any shared library function that is | |
59f2c4e7 | 2375 | called before the relocation has been set up calls the dynamic |
9b485d32 | 2376 | linker first. */ |
e5a52504 | 2377 | static const bfd_vma elf32_arm_plt0_entry [] = |
b38cadfb NC |
2378 | { |
2379 | 0xe52de004, /* str lr, [sp, #-4]! */ | |
2380 | 0xe59fe010, /* ldr lr, [pc, #16] */ | |
2381 | 0xe08fe00e, /* add lr, pc, lr */ | |
2382 | 0xe5bef008, /* ldr pc, [lr, #8]! */ | |
2383 | }; | |
5e681ec4 PB |
2384 | |
2385 | /* Subsequent entries in a procedure linkage table look like | |
2386 | this. */ | |
e5a52504 | 2387 | static const bfd_vma elf32_arm_plt_entry [] = |
b38cadfb NC |
2388 | { |
2389 | 0xe28fc600, /* add ip, pc, #NN */ | |
2390 | 0xe28cca00, /* add ip, ip, #NN */ | |
2391 | 0xe5bcf000, /* ldr pc, [ip, #NN]! */ | |
2392 | 0x00000000, /* unused */ | |
2393 | }; | |
5e681ec4 | 2394 | |
eed94f8f | 2395 | #else /* not FOUR_WORD_PLT */ |
5e681ec4 | 2396 | |
5e681ec4 PB |
2397 | /* The first entry in a procedure linkage table looks like |
2398 | this. It is set up so that any shared library function that is | |
2399 | called before the relocation has been set up calls the dynamic | |
2400 | linker first. */ | |
e5a52504 | 2401 | static const bfd_vma elf32_arm_plt0_entry [] = |
b38cadfb | 2402 | { |
07d6d2b8 AM |
2403 | 0xe52de004, /* str lr, [sp, #-4]! */ |
2404 | 0xe59fe004, /* ldr lr, [pc, #4] */ | |
2405 | 0xe08fe00e, /* add lr, pc, lr */ | |
2406 | 0xe5bef008, /* ldr pc, [lr, #8]! */ | |
2407 | 0x00000000, /* &GOT[0] - . */ | |
b38cadfb | 2408 | }; |
252b5132 | 2409 | |
1db37fe6 YG |
2410 | /* By default subsequent entries in a procedure linkage table look like |
2411 | this. Offsets that don't fit into 28 bits will cause link error. */ | |
2412 | static const bfd_vma elf32_arm_plt_entry_short [] = | |
b38cadfb NC |
2413 | { |
2414 | 0xe28fc600, /* add ip, pc, #0xNN00000 */ | |
2415 | 0xe28cca00, /* add ip, ip, #0xNN000 */ | |
2416 | 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */ | |
2417 | }; | |
5e681ec4 | 2418 | |
1db37fe6 YG |
2419 | /* When explicitly asked, we'll use this "long" entry format |
2420 | which can cope with arbitrary displacements. */ | |
2421 | static const bfd_vma elf32_arm_plt_entry_long [] = | |
2422 | { | |
07d6d2b8 AM |
2423 | 0xe28fc200, /* add ip, pc, #0xN0000000 */ |
2424 | 0xe28cc600, /* add ip, ip, #0xNN00000 */ | |
1db37fe6 YG |
2425 | 0xe28cca00, /* add ip, ip, #0xNN000 */ |
2426 | 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */ | |
2427 | }; | |
2428 | ||
0a1b45a2 | 2429 | static bool elf32_arm_use_long_plt_entry = false; |
1db37fe6 | 2430 | |
eed94f8f NC |
2431 | #endif /* not FOUR_WORD_PLT */ |
2432 | ||
2433 | /* The first entry in a procedure linkage table looks like this. | |
2434 | It is set up so that any shared library function that is called before the | |
2435 | relocation has been set up calls the dynamic linker first. */ | |
2436 | static const bfd_vma elf32_thumb2_plt0_entry [] = | |
2437 | { | |
2438 | /* NOTE: As this is a mixture of 16-bit and 32-bit instructions, | |
2439 | an instruction maybe encoded to one or two array elements. */ | |
07d6d2b8 AM |
2440 | 0xf8dfb500, /* push {lr} */ |
2441 | 0x44fee008, /* ldr.w lr, [pc, #8] */ | |
2442 | /* add lr, pc */ | |
eed94f8f | 2443 | 0xff08f85e, /* ldr.w pc, [lr, #8]! */ |
07d6d2b8 | 2444 | 0x00000000, /* &GOT[0] - . */ |
eed94f8f NC |
2445 | }; |
2446 | ||
2447 | /* Subsequent entries in a procedure linkage table for thumb only target | |
2448 | look like this. */ | |
2449 | static const bfd_vma elf32_thumb2_plt_entry [] = | |
2450 | { | |
2451 | /* NOTE: As this is a mixture of 16-bit and 32-bit instructions, | |
2452 | an instruction maybe encoded to one or two array elements. */ | |
07d6d2b8 AM |
2453 | 0x0c00f240, /* movw ip, #0xNNNN */ |
2454 | 0x0c00f2c0, /* movt ip, #0xNNNN */ | |
2455 | 0xf8dc44fc, /* add ip, pc */ | |
15ccbdd7 TC |
2456 | 0xe7fcf000 /* ldr.w pc, [ip] */ |
2457 | /* b .-4 */ | |
eed94f8f | 2458 | }; |
252b5132 | 2459 | |
00a97672 RS |
2460 | /* The format of the first entry in the procedure linkage table |
2461 | for a VxWorks executable. */ | |
2462 | static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] = | |
b38cadfb | 2463 | { |
07d6d2b8 AM |
2464 | 0xe52dc008, /* str ip,[sp,#-8]! */ |
2465 | 0xe59fc000, /* ldr ip,[pc] */ | |
2466 | 0xe59cf008, /* ldr pc,[ip,#8] */ | |
2467 | 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */ | |
b38cadfb | 2468 | }; |
00a97672 RS |
2469 | |
2470 | /* The format of subsequent entries in a VxWorks executable. */ | |
2471 | static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] = | |
b38cadfb | 2472 | { |
07d6d2b8 AM |
2473 | 0xe59fc000, /* ldr ip,[pc] */ |
2474 | 0xe59cf000, /* ldr pc,[ip] */ | |
2475 | 0x00000000, /* .long @got */ | |
2476 | 0xe59fc000, /* ldr ip,[pc] */ | |
2477 | 0xea000000, /* b _PLT */ | |
2478 | 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */ | |
b38cadfb | 2479 | }; |
00a97672 RS |
2480 | |
2481 | /* The format of entries in a VxWorks shared library. */ | |
2482 | static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] = | |
b38cadfb | 2483 | { |
07d6d2b8 AM |
2484 | 0xe59fc000, /* ldr ip,[pc] */ |
2485 | 0xe79cf009, /* ldr pc,[ip,r9] */ | |
2486 | 0x00000000, /* .long @got */ | |
2487 | 0xe59fc000, /* ldr ip,[pc] */ | |
2488 | 0xe599f008, /* ldr pc,[r9,#8] */ | |
2489 | 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */ | |
b38cadfb | 2490 | }; |
00a97672 | 2491 | |
b7693d02 DJ |
2492 | /* An initial stub used if the PLT entry is referenced from Thumb code. */ |
2493 | #define PLT_THUMB_STUB_SIZE 4 | |
2494 | static const bfd_vma elf32_arm_plt_thumb_stub [] = | |
b38cadfb NC |
2495 | { |
2496 | 0x4778, /* bx pc */ | |
b4e87f2c | 2497 | 0xe7fd /* b .-2 */ |
b38cadfb | 2498 | }; |
b7693d02 | 2499 | |
b38cadfb NC |
2500 | /* The first entry in a procedure linkage table looks like |
2501 | this. It is set up so that any shared library function that is | |
2502 | called before the relocation has been set up calls the dynamic | |
2503 | linker first. */ | |
2504 | static const bfd_vma elf32_arm_nacl_plt0_entry [] = | |
2505 | { | |
2506 | /* First bundle: */ | |
2507 | 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */ | |
2508 | 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */ | |
2509 | 0xe08cc00f, /* add ip, ip, pc */ | |
2510 | 0xe52dc008, /* str ip, [sp, #-8]! */ | |
2511 | /* Second bundle: */ | |
edccdf7c RM |
2512 | 0xe3ccc103, /* bic ip, ip, #0xc0000000 */ |
2513 | 0xe59cc000, /* ldr ip, [ip] */ | |
b38cadfb | 2514 | 0xe3ccc13f, /* bic ip, ip, #0xc000000f */ |
edccdf7c | 2515 | 0xe12fff1c, /* bx ip */ |
b38cadfb | 2516 | /* Third bundle: */ |
edccdf7c RM |
2517 | 0xe320f000, /* nop */ |
2518 | 0xe320f000, /* nop */ | |
2519 | 0xe320f000, /* nop */ | |
b38cadfb NC |
2520 | /* .Lplt_tail: */ |
2521 | 0xe50dc004, /* str ip, [sp, #-4] */ | |
2522 | /* Fourth bundle: */ | |
edccdf7c RM |
2523 | 0xe3ccc103, /* bic ip, ip, #0xc0000000 */ |
2524 | 0xe59cc000, /* ldr ip, [ip] */ | |
b38cadfb | 2525 | 0xe3ccc13f, /* bic ip, ip, #0xc000000f */ |
edccdf7c | 2526 | 0xe12fff1c, /* bx ip */ |
b38cadfb NC |
2527 | }; |
2528 | #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4) | |
2529 | ||
2530 | /* Subsequent entries in a procedure linkage table look like this. */ | |
2531 | static const bfd_vma elf32_arm_nacl_plt_entry [] = | |
2532 | { | |
2533 | 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */ | |
2534 | 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */ | |
2535 | 0xe08cc00f, /* add ip, ip, pc */ | |
2536 | 0xea000000, /* b .Lplt_tail */ | |
2537 | }; | |
e5a52504 | 2538 | |
a747a286 VP |
2539 | /* PR 28924: |
2540 | There was a bug due to too high values of THM_MAX_FWD_BRANCH_OFFSET and | |
2541 | THM2_MAX_FWD_BRANCH_OFFSET. The first macro concerns the case when Thumb-2 | |
2542 | is not available, and second macro when Thumb-2 is available. Among other | |
2543 | things, they affect the range of branches represented as BLX instructions | |
2544 | in Encoding T2 defined in Section A8.8.25 of the ARM Architecture | |
2545 | Reference Manual ARMv7-A and ARMv7-R edition issue C.d. Such branches are | |
2546 | specified there to have a maximum forward offset that is a multiple of 4. | |
2547 | Previously, the respective values defined here were multiples of 2 but not | |
2548 | 4 and they are included in comments for reference. */ | |
906e58ca | 2549 | #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8) |
a747a286 VP |
2550 | #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8) |
2551 | #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) - 4 + 4) | |
2552 | /* #def THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) - 2 + 4) */ | |
906e58ca | 2553 | #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4) |
a747a286 VP |
2554 | #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 4) + 4) |
2555 | /* #def THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4) */ | |
906e58ca | 2556 | #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4) |
c5423981 TG |
2557 | #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4) |
2558 | #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4) | |
906e58ca | 2559 | |
461a49ca | 2560 | enum stub_insn_type |
b38cadfb NC |
2561 | { |
2562 | THUMB16_TYPE = 1, | |
2563 | THUMB32_TYPE, | |
2564 | ARM_TYPE, | |
2565 | DATA_TYPE | |
2566 | }; | |
461a49ca | 2567 | |
48229727 JB |
2568 | #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0} |
2569 | /* A bit of a hack. A Thumb conditional branch, in which the proper condition | |
2570 | is inserted in arm_build_one_stub(). */ | |
2571 | #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1} | |
2572 | #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0} | |
d5a67c02 AV |
2573 | #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0} |
2574 | #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0} | |
48229727 JB |
2575 | #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)} |
2576 | #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0} | |
2577 | #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)} | |
2578 | #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)} | |
461a49ca DJ |
2579 | |
2580 | typedef struct | |
2581 | { | |
07d6d2b8 | 2582 | bfd_vma data; |
b38cadfb | 2583 | enum stub_insn_type type; |
07d6d2b8 AM |
2584 | unsigned int r_type; |
2585 | int reloc_addend; | |
461a49ca DJ |
2586 | } insn_sequence; |
2587 | ||
b4e87f2c TC |
2588 | /* See note [Thumb nop sequence] when adding a veneer. */ |
2589 | ||
fea2b4d6 CL |
2590 | /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx |
2591 | to reach the stub if necessary. */ | |
461a49ca | 2592 | static const insn_sequence elf32_arm_stub_long_branch_any_any[] = |
b38cadfb | 2593 | { |
07d6d2b8 | 2594 | ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */ |
b38cadfb NC |
2595 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ |
2596 | }; | |
906e58ca | 2597 | |
fea2b4d6 CL |
2598 | /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not |
2599 | available. */ | |
461a49ca | 2600 | static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] = |
b38cadfb | 2601 | { |
07d6d2b8 AM |
2602 | ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */ |
2603 | ARM_INSN (0xe12fff1c), /* bx ip */ | |
b38cadfb NC |
2604 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ |
2605 | }; | |
906e58ca | 2606 | |
d3626fb0 | 2607 | /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */ |
461a49ca | 2608 | static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] = |
b38cadfb | 2609 | { |
07d6d2b8 AM |
2610 | THUMB16_INSN (0xb401), /* push {r0} */ |
2611 | THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */ | |
2612 | THUMB16_INSN (0x4684), /* mov ip, r0 */ | |
2613 | THUMB16_INSN (0xbc01), /* pop {r0} */ | |
2614 | THUMB16_INSN (0x4760), /* bx ip */ | |
2615 | THUMB16_INSN (0xbf00), /* nop */ | |
b38cadfb NC |
2616 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ |
2617 | }; | |
906e58ca | 2618 | |
80c135e5 TP |
2619 | /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */ |
2620 | static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] = | |
2621 | { | |
07d6d2b8 | 2622 | THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */ |
80c135e5 TP |
2623 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */ |
2624 | }; | |
2625 | ||
d5a67c02 AV |
2626 | /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2 |
2627 | M-profile architectures. */ | |
2628 | static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] = | |
2629 | { | |
2630 | THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */ | |
2631 | THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */ | |
07d6d2b8 | 2632 | THUMB16_INSN (0x4760), /* bx ip */ |
d5a67c02 AV |
2633 | }; |
2634 | ||
d3626fb0 CL |
2635 | /* V4T Thumb -> Thumb long branch stub. Using the stack is not |
2636 | allowed. */ | |
2637 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] = | |
b38cadfb | 2638 | { |
07d6d2b8 | 2639 | THUMB16_INSN (0x4778), /* bx pc */ |
b4e87f2c | 2640 | THUMB16_INSN (0xe7fd), /* b .-2 */ |
07d6d2b8 AM |
2641 | ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */ |
2642 | ARM_INSN (0xe12fff1c), /* bx ip */ | |
b38cadfb NC |
2643 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ |
2644 | }; | |
d3626fb0 | 2645 | |
fea2b4d6 CL |
2646 | /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not |
2647 | available. */ | |
461a49ca | 2648 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] = |
b38cadfb | 2649 | { |
07d6d2b8 | 2650 | THUMB16_INSN (0x4778), /* bx pc */ |
b4e87f2c | 2651 | THUMB16_INSN (0xe7fd), /* b .-2 */ |
07d6d2b8 | 2652 | ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */ |
b38cadfb NC |
2653 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ |
2654 | }; | |
906e58ca | 2655 | |
fea2b4d6 CL |
2656 | /* V4T Thumb -> ARM short branch stub. Shorter variant of the above |
2657 | one, when the destination is close enough. */ | |
461a49ca | 2658 | static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] = |
b38cadfb | 2659 | { |
07d6d2b8 | 2660 | THUMB16_INSN (0x4778), /* bx pc */ |
b4e87f2c | 2661 | THUMB16_INSN (0xe7fd), /* b .-2 */ |
b38cadfb NC |
2662 | ARM_REL_INSN (0xea000000, -8), /* b (X-8) */ |
2663 | }; | |
c820be07 | 2664 | |
cf3eccff | 2665 | /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use |
fea2b4d6 | 2666 | blx to reach the stub if necessary. */ |
cf3eccff | 2667 | static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] = |
b38cadfb | 2668 | { |
07d6d2b8 AM |
2669 | ARM_INSN (0xe59fc000), /* ldr ip, [pc] */ |
2670 | ARM_INSN (0xe08ff00c), /* add pc, pc, ip */ | |
b38cadfb NC |
2671 | DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */ |
2672 | }; | |
906e58ca | 2673 | |
cf3eccff DJ |
2674 | /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use |
2675 | blx to reach the stub if necessary. We can not add into pc; | |
2676 | it is not guaranteed to mode switch (different in ARMv6 and | |
2677 | ARMv7). */ | |
2678 | static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] = | |
b38cadfb | 2679 | { |
07d6d2b8 AM |
2680 | ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */ |
2681 | ARM_INSN (0xe08fc00c), /* add ip, pc, ip */ | |
2682 | ARM_INSN (0xe12fff1c), /* bx ip */ | |
b38cadfb NC |
2683 | DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */ |
2684 | }; | |
cf3eccff | 2685 | |
ebe24dd4 CL |
2686 | /* V4T ARM -> ARM long branch stub, PIC. */ |
2687 | static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] = | |
b38cadfb | 2688 | { |
07d6d2b8 AM |
2689 | ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */ |
2690 | ARM_INSN (0xe08fc00c), /* add ip, pc, ip */ | |
2691 | ARM_INSN (0xe12fff1c), /* bx ip */ | |
b38cadfb NC |
2692 | DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */ |
2693 | }; | |
ebe24dd4 CL |
2694 | |
2695 | /* V4T Thumb -> ARM long branch stub, PIC. */ | |
2696 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] = | |
b38cadfb | 2697 | { |
07d6d2b8 | 2698 | THUMB16_INSN (0x4778), /* bx pc */ |
b4e87f2c | 2699 | THUMB16_INSN (0xe7fd), /* b .-2 */ |
07d6d2b8 AM |
2700 | ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */ |
2701 | ARM_INSN (0xe08cf00f), /* add pc, ip, pc */ | |
b38cadfb NC |
2702 | DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */ |
2703 | }; | |
ebe24dd4 | 2704 | |
d3626fb0 CL |
2705 | /* Thumb -> Thumb long branch stub, PIC. Used on M-profile |
2706 | architectures. */ | |
ebe24dd4 | 2707 | static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] = |
b38cadfb | 2708 | { |
07d6d2b8 AM |
2709 | THUMB16_INSN (0xb401), /* push {r0} */ |
2710 | THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */ | |
2711 | THUMB16_INSN (0x46fc), /* mov ip, pc */ | |
2712 | THUMB16_INSN (0x4484), /* add ip, r0 */ | |
2713 | THUMB16_INSN (0xbc01), /* pop {r0} */ | |
2714 | THUMB16_INSN (0x4760), /* bx ip */ | |
b38cadfb NC |
2715 | DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */ |
2716 | }; | |
ebe24dd4 | 2717 | |
d3626fb0 CL |
2718 | /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not |
2719 | allowed. */ | |
2720 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] = | |
b38cadfb | 2721 | { |
07d6d2b8 | 2722 | THUMB16_INSN (0x4778), /* bx pc */ |
b4e87f2c | 2723 | THUMB16_INSN (0xe7fd), /* b .-2 */ |
07d6d2b8 AM |
2724 | ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */ |
2725 | ARM_INSN (0xe08fc00c), /* add ip, pc, ip */ | |
2726 | ARM_INSN (0xe12fff1c), /* bx ip */ | |
b38cadfb NC |
2727 | DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */ |
2728 | }; | |
d3626fb0 | 2729 | |
0855e32b NS |
2730 | /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a |
2731 | long PIC stub. We can use r1 as a scratch -- and cannot use ip. */ | |
2732 | static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] = | |
2733 | { | |
07d6d2b8 AM |
2734 | ARM_INSN (0xe59f1000), /* ldr r1, [pc] */ |
2735 | ARM_INSN (0xe08ff001), /* add pc, pc, r1 */ | |
b38cadfb | 2736 | DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */ |
0855e32b NS |
2737 | }; |
2738 | ||
2739 | /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a | |
2740 | long PIC stub. We can use r1 as a scratch -- and cannot use ip. */ | |
2741 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] = | |
2742 | { | |
07d6d2b8 | 2743 | THUMB16_INSN (0x4778), /* bx pc */ |
b4e87f2c | 2744 | THUMB16_INSN (0xe7fd), /* b .-2 */ |
07d6d2b8 AM |
2745 | ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */ |
2746 | ARM_INSN (0xe081f00f), /* add pc, r1, pc */ | |
b38cadfb | 2747 | DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */ |
0855e32b NS |
2748 | }; |
2749 | ||
7a89b94e NC |
2750 | /* NaCl ARM -> ARM long branch stub. */ |
2751 | static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] = | |
2752 | { | |
2753 | ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */ | |
2754 | ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */ | |
07d6d2b8 AM |
2755 | ARM_INSN (0xe12fff1c), /* bx ip */ |
2756 | ARM_INSN (0xe320f000), /* nop */ | |
2757 | ARM_INSN (0xe125be70), /* bkpt 0x5be0 */ | |
2758 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ | |
2759 | DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */ | |
2760 | DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */ | |
7a89b94e NC |
2761 | }; |
2762 | ||
2763 | /* NaCl ARM -> ARM long branch stub, PIC. */ | |
2764 | static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] = | |
2765 | { | |
2766 | ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */ | |
07d6d2b8 | 2767 | ARM_INSN (0xe08cc00f), /* add ip, ip, pc */ |
7a89b94e | 2768 | ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */ |
07d6d2b8 AM |
2769 | ARM_INSN (0xe12fff1c), /* bx ip */ |
2770 | ARM_INSN (0xe125be70), /* bkpt 0x5be0 */ | |
2771 | DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */ | |
2772 | DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */ | |
2773 | DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */ | |
7a89b94e NC |
2774 | }; |
2775 | ||
4ba2ef8f TP |
2776 | /* Stub used for transition to secure state (aka SG veneer). */ |
2777 | static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] = | |
2778 | { | |
2779 | THUMB32_INSN (0xe97fe97f), /* sg. */ | |
2780 | THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */ | |
2781 | }; | |
2782 | ||
7a89b94e | 2783 | |
48229727 JB |
2784 | /* Cortex-A8 erratum-workaround stubs. */ |
2785 | ||
2786 | /* Stub used for conditional branches (which may be beyond +/-1MB away, so we | |
2787 | can't use a conditional branch to reach this stub). */ | |
2788 | ||
2789 | static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] = | |
b38cadfb | 2790 | { |
07d6d2b8 | 2791 | THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */ |
b38cadfb NC |
2792 | THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */ |
2793 | THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */ | |
2794 | }; | |
48229727 JB |
2795 | |
2796 | /* Stub used for b.w and bl.w instructions. */ | |
2797 | ||
2798 | static const insn_sequence elf32_arm_stub_a8_veneer_b[] = | |
b38cadfb NC |
2799 | { |
2800 | THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */ | |
2801 | }; | |
48229727 JB |
2802 | |
2803 | static const insn_sequence elf32_arm_stub_a8_veneer_bl[] = | |
b38cadfb NC |
2804 | { |
2805 | THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */ | |
2806 | }; | |
48229727 JB |
2807 | |
2808 | /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w | |
2809 | instruction (which switches to ARM mode) to point to this stub. Jump to the | |
2810 | real destination using an ARM-mode branch. */ | |
2811 | ||
2812 | static const insn_sequence elf32_arm_stub_a8_veneer_blx[] = | |
b38cadfb NC |
2813 | { |
2814 | ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */ | |
2815 | }; | |
48229727 | 2816 | |
9553db3c NC |
2817 | /* For each section group there can be a specially created linker section |
2818 | to hold the stubs for that group. The name of the stub section is based | |
2819 | upon the name of another section within that group with the suffix below | |
2820 | applied. | |
2821 | ||
2822 | PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to | |
2823 | create what appeared to be a linker stub section when it actually | |
2824 | contained user code/data. For example, consider this fragment: | |
b38cadfb | 2825 | |
9553db3c NC |
2826 | const char * stubborn_problems[] = { "np" }; |
2827 | ||
2828 | If this is compiled with "-fPIC -fdata-sections" then gcc produces a | |
2829 | section called: | |
2830 | ||
2831 | .data.rel.local.stubborn_problems | |
2832 | ||
2833 | This then causes problems in arm32_arm_build_stubs() as it triggers: | |
2834 | ||
2835 | // Ignore non-stub sections. | |
2836 | if (!strstr (stub_sec->name, STUB_SUFFIX)) | |
2837 | continue; | |
2838 | ||
2839 | And so the section would be ignored instead of being processed. Hence | |
2840 | the change in definition of STUB_SUFFIX to a name that cannot be a valid | |
2841 | C identifier. */ | |
2842 | #define STUB_SUFFIX ".__stub" | |
906e58ca | 2843 | |
738a79f6 CL |
2844 | /* One entry per long/short branch stub defined above. */ |
2845 | #define DEF_STUBS \ | |
cc850f74 NC |
2846 | DEF_STUB (long_branch_any_any) \ |
2847 | DEF_STUB (long_branch_v4t_arm_thumb) \ | |
2848 | DEF_STUB (long_branch_thumb_only) \ | |
2849 | DEF_STUB (long_branch_v4t_thumb_thumb) \ | |
2850 | DEF_STUB (long_branch_v4t_thumb_arm) \ | |
2851 | DEF_STUB (short_branch_v4t_thumb_arm) \ | |
2852 | DEF_STUB (long_branch_any_arm_pic) \ | |
2853 | DEF_STUB (long_branch_any_thumb_pic) \ | |
2854 | DEF_STUB (long_branch_v4t_thumb_thumb_pic) \ | |
2855 | DEF_STUB (long_branch_v4t_arm_thumb_pic) \ | |
2856 | DEF_STUB (long_branch_v4t_thumb_arm_pic) \ | |
2857 | DEF_STUB (long_branch_thumb_only_pic) \ | |
2858 | DEF_STUB (long_branch_any_tls_pic) \ | |
2859 | DEF_STUB (long_branch_v4t_thumb_tls_pic) \ | |
2860 | DEF_STUB (long_branch_arm_nacl) \ | |
2861 | DEF_STUB (long_branch_arm_nacl_pic) \ | |
2862 | DEF_STUB (cmse_branch_thumb_only) \ | |
2863 | DEF_STUB (a8_veneer_b_cond) \ | |
2864 | DEF_STUB (a8_veneer_b) \ | |
2865 | DEF_STUB (a8_veneer_bl) \ | |
2866 | DEF_STUB (a8_veneer_blx) \ | |
2867 | DEF_STUB (long_branch_thumb2_only) \ | |
2868 | DEF_STUB (long_branch_thumb2_only_pure) | |
738a79f6 CL |
2869 | |
2870 | #define DEF_STUB(x) arm_stub_##x, | |
b38cadfb NC |
2871 | enum elf32_arm_stub_type |
2872 | { | |
906e58ca | 2873 | arm_stub_none, |
738a79f6 | 2874 | DEF_STUBS |
4f4faa4d | 2875 | max_stub_type |
738a79f6 CL |
2876 | }; |
2877 | #undef DEF_STUB | |
2878 | ||
8d9d9490 TP |
2879 | /* Note the first a8_veneer type. */ |
2880 | const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond; | |
2881 | ||
738a79f6 CL |
2882 | typedef struct |
2883 | { | |
d3ce72d0 | 2884 | const insn_sequence* template_sequence; |
738a79f6 CL |
2885 | int template_size; |
2886 | } stub_def; | |
2887 | ||
2888 | #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)}, | |
b38cadfb NC |
2889 | static const stub_def stub_definitions[] = |
2890 | { | |
738a79f6 CL |
2891 | {NULL, 0}, |
2892 | DEF_STUBS | |
906e58ca NC |
2893 | }; |
2894 | ||
2895 | struct elf32_arm_stub_hash_entry | |
2896 | { | |
2897 | /* Base hash table entry structure. */ | |
2898 | struct bfd_hash_entry root; | |
2899 | ||
2900 | /* The stub section. */ | |
2901 | asection *stub_sec; | |
2902 | ||
2903 | /* Offset within stub_sec of the beginning of this stub. */ | |
2904 | bfd_vma stub_offset; | |
2905 | ||
2906 | /* Given the symbol's value and its section we can determine its final | |
2907 | value when building the stubs (so the stub knows where to jump). */ | |
2908 | bfd_vma target_value; | |
2909 | asection *target_section; | |
2910 | ||
8d9d9490 TP |
2911 | /* Same as above but for the source of the branch to the stub. Used for |
2912 | Cortex-A8 erratum workaround to patch it to branch to the stub. As | |
2913 | such, source section does not need to be recorded since Cortex-A8 erratum | |
2914 | workaround stubs are only generated when both source and target are in the | |
2915 | same section. */ | |
2916 | bfd_vma source_value; | |
48229727 JB |
2917 | |
2918 | /* The instruction which caused this stub to be generated (only valid for | |
2919 | Cortex-A8 erratum workaround stubs at present). */ | |
2920 | unsigned long orig_insn; | |
2921 | ||
461a49ca | 2922 | /* The stub type. */ |
906e58ca | 2923 | enum elf32_arm_stub_type stub_type; |
461a49ca DJ |
2924 | /* Its encoding size in bytes. */ |
2925 | int stub_size; | |
2926 | /* Its template. */ | |
2927 | const insn_sequence *stub_template; | |
2928 | /* The size of the template (number of entries). */ | |
2929 | int stub_template_size; | |
906e58ca NC |
2930 | |
2931 | /* The symbol table entry, if any, that this was derived from. */ | |
2932 | struct elf32_arm_link_hash_entry *h; | |
2933 | ||
35fc36a8 RS |
2934 | /* Type of branch. */ |
2935 | enum arm_st_branch_type branch_type; | |
906e58ca NC |
2936 | |
2937 | /* Where this stub is being called from, or, in the case of combined | |
2938 | stub sections, the first input section in the group. */ | |
2939 | asection *id_sec; | |
7413f23f DJ |
2940 | |
2941 | /* The name for the local symbol at the start of this stub. The | |
2942 | stub name in the hash table has to be unique; this does not, so | |
2943 | it can be friendlier. */ | |
2944 | char *output_name; | |
906e58ca NC |
2945 | }; |
2946 | ||
e489d0ae PB |
2947 | /* Used to build a map of a section. This is required for mixed-endian |
2948 | code/data. */ | |
2949 | ||
2950 | typedef struct elf32_elf_section_map | |
2951 | { | |
2952 | bfd_vma vma; | |
2953 | char type; | |
2954 | } | |
2955 | elf32_arm_section_map; | |
2956 | ||
c7b8f16e JB |
2957 | /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */ |
2958 | ||
2959 | typedef enum | |
2960 | { | |
2961 | VFP11_ERRATUM_BRANCH_TO_ARM_VENEER, | |
2962 | VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER, | |
2963 | VFP11_ERRATUM_ARM_VENEER, | |
2964 | VFP11_ERRATUM_THUMB_VENEER | |
2965 | } | |
2966 | elf32_vfp11_erratum_type; | |
2967 | ||
2968 | typedef struct elf32_vfp11_erratum_list | |
2969 | { | |
2970 | struct elf32_vfp11_erratum_list *next; | |
2971 | bfd_vma vma; | |
2972 | union | |
2973 | { | |
2974 | struct | |
2975 | { | |
2976 | struct elf32_vfp11_erratum_list *veneer; | |
2977 | unsigned int vfp_insn; | |
2978 | } b; | |
2979 | struct | |
2980 | { | |
2981 | struct elf32_vfp11_erratum_list *branch; | |
2982 | unsigned int id; | |
2983 | } v; | |
2984 | } u; | |
2985 | elf32_vfp11_erratum_type type; | |
2986 | } | |
2987 | elf32_vfp11_erratum_list; | |
2988 | ||
a504d23a LA |
2989 | /* Information about a STM32L4XX erratum veneer, or a branch to such a |
2990 | veneer. */ | |
2991 | typedef enum | |
2992 | { | |
2993 | STM32L4XX_ERRATUM_BRANCH_TO_VENEER, | |
2994 | STM32L4XX_ERRATUM_VENEER | |
2995 | } | |
2996 | elf32_stm32l4xx_erratum_type; | |
2997 | ||
2998 | typedef struct elf32_stm32l4xx_erratum_list | |
2999 | { | |
3000 | struct elf32_stm32l4xx_erratum_list *next; | |
3001 | bfd_vma vma; | |
3002 | union | |
3003 | { | |
3004 | struct | |
3005 | { | |
3006 | struct elf32_stm32l4xx_erratum_list *veneer; | |
3007 | unsigned int insn; | |
3008 | } b; | |
3009 | struct | |
3010 | { | |
3011 | struct elf32_stm32l4xx_erratum_list *branch; | |
3012 | unsigned int id; | |
3013 | } v; | |
3014 | } u; | |
3015 | elf32_stm32l4xx_erratum_type type; | |
3016 | } | |
3017 | elf32_stm32l4xx_erratum_list; | |
3018 | ||
2468f9c9 PB |
3019 | typedef enum |
3020 | { | |
3021 | DELETE_EXIDX_ENTRY, | |
3022 | INSERT_EXIDX_CANTUNWIND_AT_END | |
3023 | } | |
3024 | arm_unwind_edit_type; | |
3025 | ||
3026 | /* A (sorted) list of edits to apply to an unwind table. */ | |
3027 | typedef struct arm_unwind_table_edit | |
3028 | { | |
3029 | arm_unwind_edit_type type; | |
3030 | /* Note: we sometimes want to insert an unwind entry corresponding to a | |
3031 | section different from the one we're currently writing out, so record the | |
3032 | (text) section this edit relates to here. */ | |
3033 | asection *linked_section; | |
3034 | unsigned int index; | |
3035 | struct arm_unwind_table_edit *next; | |
3036 | } | |
3037 | arm_unwind_table_edit; | |
3038 | ||
8e3de13a | 3039 | typedef struct _arm_elf_section_data |
e489d0ae | 3040 | { |
2468f9c9 | 3041 | /* Information about mapping symbols. */ |
e489d0ae | 3042 | struct bfd_elf_section_data elf; |
8e3de13a | 3043 | unsigned int mapcount; |
c7b8f16e | 3044 | unsigned int mapsize; |
e489d0ae | 3045 | elf32_arm_section_map *map; |
2468f9c9 | 3046 | /* Information about CPU errata. */ |
c7b8f16e JB |
3047 | unsigned int erratumcount; |
3048 | elf32_vfp11_erratum_list *erratumlist; | |
a504d23a LA |
3049 | unsigned int stm32l4xx_erratumcount; |
3050 | elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist; | |
491d01d3 | 3051 | unsigned int additional_reloc_count; |
2468f9c9 PB |
3052 | /* Information about unwind tables. */ |
3053 | union | |
3054 | { | |
3055 | /* Unwind info attached to a text section. */ | |
3056 | struct | |
3057 | { | |
3058 | asection *arm_exidx_sec; | |
3059 | } text; | |
3060 | ||
3061 | /* Unwind info attached to an .ARM.exidx section. */ | |
3062 | struct | |
3063 | { | |
3064 | arm_unwind_table_edit *unwind_edit_list; | |
3065 | arm_unwind_table_edit *unwind_edit_tail; | |
3066 | } exidx; | |
3067 | } u; | |
8e3de13a NC |
3068 | } |
3069 | _arm_elf_section_data; | |
e489d0ae PB |
3070 | |
3071 | #define elf32_arm_section_data(sec) \ | |
8e3de13a | 3072 | ((_arm_elf_section_data *) elf_section_data (sec)) |
e489d0ae | 3073 | |
48229727 JB |
3074 | /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum. |
3075 | These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs), | |
3076 | so may be created multiple times: we use an array of these entries whilst | |
3077 | relaxing which we can refresh easily, then create stubs for each potentially | |
3078 | erratum-triggering instruction once we've settled on a solution. */ | |
3079 | ||
b38cadfb NC |
3080 | struct a8_erratum_fix |
3081 | { | |
48229727 JB |
3082 | bfd *input_bfd; |
3083 | asection *section; | |
3084 | bfd_vma offset; | |
8d9d9490 | 3085 | bfd_vma target_offset; |
48229727 JB |
3086 | unsigned long orig_insn; |
3087 | char *stub_name; | |
3088 | enum elf32_arm_stub_type stub_type; | |
35fc36a8 | 3089 | enum arm_st_branch_type branch_type; |
48229727 JB |
3090 | }; |
3091 | ||
3092 | /* A table of relocs applied to branches which might trigger Cortex-A8 | |
3093 | erratum. */ | |
3094 | ||
b38cadfb NC |
3095 | struct a8_erratum_reloc |
3096 | { | |
48229727 JB |
3097 | bfd_vma from; |
3098 | bfd_vma destination; | |
92750f34 DJ |
3099 | struct elf32_arm_link_hash_entry *hash; |
3100 | const char *sym_name; | |
48229727 | 3101 | unsigned int r_type; |
35fc36a8 | 3102 | enum arm_st_branch_type branch_type; |
0a1b45a2 | 3103 | bool non_a8_stub; |
48229727 JB |
3104 | }; |
3105 | ||
ba93b8ac DJ |
3106 | /* The size of the thread control block. */ |
3107 | #define TCB_SIZE 8 | |
3108 | ||
34e77a92 RS |
3109 | /* ARM-specific information about a PLT entry, over and above the usual |
3110 | gotplt_union. */ | |
b38cadfb NC |
3111 | struct arm_plt_info |
3112 | { | |
34e77a92 RS |
3113 | /* We reference count Thumb references to a PLT entry separately, |
3114 | so that we can emit the Thumb trampoline only if needed. */ | |
3115 | bfd_signed_vma thumb_refcount; | |
3116 | ||
3117 | /* Some references from Thumb code may be eliminated by BL->BLX | |
3118 | conversion, so record them separately. */ | |
3119 | bfd_signed_vma maybe_thumb_refcount; | |
3120 | ||
3121 | /* How many of the recorded PLT accesses were from non-call relocations. | |
3122 | This information is useful when deciding whether anything takes the | |
3123 | address of an STT_GNU_IFUNC PLT. A value of 0 means that all | |
3124 | non-call references to the function should resolve directly to the | |
3125 | real runtime target. */ | |
3126 | unsigned int noncall_refcount; | |
3127 | ||
3128 | /* Since PLT entries have variable size if the Thumb prologue is | |
3129 | used, we need to record the index into .got.plt instead of | |
3130 | recomputing it from the PLT offset. */ | |
3131 | bfd_signed_vma got_offset; | |
3132 | }; | |
3133 | ||
3134 | /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */ | |
b38cadfb NC |
3135 | struct arm_local_iplt_info |
3136 | { | |
34e77a92 RS |
3137 | /* The information that is usually found in the generic ELF part of |
3138 | the hash table entry. */ | |
3139 | union gotplt_union root; | |
3140 | ||
3141 | /* The information that is usually found in the ARM-specific part of | |
3142 | the hash table entry. */ | |
3143 | struct arm_plt_info arm; | |
3144 | ||
3145 | /* A list of all potential dynamic relocations against this symbol. */ | |
3146 | struct elf_dyn_relocs *dyn_relocs; | |
3147 | }; | |
3148 | ||
e8b09b87 | 3149 | /* Structure to handle FDPIC support for local functions. */ |
cc850f74 NC |
3150 | struct fdpic_local |
3151 | { | |
e8b09b87 CL |
3152 | unsigned int funcdesc_cnt; |
3153 | unsigned int gotofffuncdesc_cnt; | |
3154 | int funcdesc_offset; | |
3155 | }; | |
3156 | ||
0ffa91dd | 3157 | struct elf_arm_obj_tdata |
ba93b8ac DJ |
3158 | { |
3159 | struct elf_obj_tdata root; | |
3160 | ||
cc850f74 NC |
3161 | /* Zero to warn when linking objects with incompatible enum sizes. */ |
3162 | int no_enum_size_warning; | |
3163 | ||
3164 | /* Zero to warn when linking objects with incompatible wchar_t sizes. */ | |
3165 | int no_wchar_size_warning; | |
3166 | ||
74fd118f NC |
3167 | /* The number of entries in each of the arrays in this strcuture. |
3168 | Used to avoid buffer overruns. */ | |
3169 | bfd_size_type num_entries; | |
3170 | ||
ba93b8ac DJ |
3171 | /* tls_type for each local got entry. */ |
3172 | char *local_got_tls_type; | |
ee065d83 | 3173 | |
0855e32b NS |
3174 | /* GOTPLT entries for TLS descriptors. */ |
3175 | bfd_vma *local_tlsdesc_gotent; | |
3176 | ||
34e77a92 RS |
3177 | /* Information for local symbols that need entries in .iplt. */ |
3178 | struct arm_local_iplt_info **local_iplt; | |
3179 | ||
e8b09b87 CL |
3180 | /* Maintains FDPIC counters and funcdesc info. */ |
3181 | struct fdpic_local *local_fdpic_cnts; | |
ba93b8ac DJ |
3182 | }; |
3183 | ||
0ffa91dd NC |
3184 | #define elf_arm_tdata(bfd) \ |
3185 | ((struct elf_arm_obj_tdata *) (bfd)->tdata.any) | |
ba93b8ac | 3186 | |
74fd118f NC |
3187 | #define elf32_arm_num_entries(bfd) \ |
3188 | (elf_arm_tdata (bfd)->num_entries) | |
3189 | ||
0ffa91dd NC |
3190 | #define elf32_arm_local_got_tls_type(bfd) \ |
3191 | (elf_arm_tdata (bfd)->local_got_tls_type) | |
3192 | ||
0855e32b NS |
3193 | #define elf32_arm_local_tlsdesc_gotent(bfd) \ |
3194 | (elf_arm_tdata (bfd)->local_tlsdesc_gotent) | |
3195 | ||
34e77a92 RS |
3196 | #define elf32_arm_local_iplt(bfd) \ |
3197 | (elf_arm_tdata (bfd)->local_iplt) | |
3198 | ||
e8b09b87 CL |
3199 | #define elf32_arm_local_fdpic_cnts(bfd) \ |
3200 | (elf_arm_tdata (bfd)->local_fdpic_cnts) | |
3201 | ||
0ffa91dd NC |
3202 | #define is_arm_elf(bfd) \ |
3203 | (bfd_get_flavour (bfd) == bfd_target_elf_flavour \ | |
3204 | && elf_tdata (bfd) != NULL \ | |
4dfe6ac6 | 3205 | && elf_object_id (bfd) == ARM_ELF_DATA) |
ba93b8ac | 3206 | |
0a1b45a2 | 3207 | static bool |
ba93b8ac DJ |
3208 | elf32_arm_mkobject (bfd *abfd) |
3209 | { | |
0ffa91dd | 3210 | return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata), |
4dfe6ac6 | 3211 | ARM_ELF_DATA); |
ba93b8ac DJ |
3212 | } |
3213 | ||
ba93b8ac DJ |
3214 | #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent)) |
3215 | ||
e8b09b87 CL |
3216 | /* Structure to handle FDPIC support for extern functions. */ |
3217 | struct fdpic_global { | |
3218 | unsigned int gotofffuncdesc_cnt; | |
3219 | unsigned int gotfuncdesc_cnt; | |
3220 | unsigned int funcdesc_cnt; | |
3221 | int funcdesc_offset; | |
3222 | int gotfuncdesc_offset; | |
3223 | }; | |
3224 | ||
ba96a88f | 3225 | /* Arm ELF linker hash entry. */ |
252b5132 | 3226 | struct elf32_arm_link_hash_entry |
b38cadfb NC |
3227 | { |
3228 | struct elf_link_hash_entry root; | |
252b5132 | 3229 | |
b38cadfb NC |
3230 | /* ARM-specific PLT information. */ |
3231 | struct arm_plt_info plt; | |
ba93b8ac DJ |
3232 | |
3233 | #define GOT_UNKNOWN 0 | |
3234 | #define GOT_NORMAL 1 | |
3235 | #define GOT_TLS_GD 2 | |
3236 | #define GOT_TLS_IE 4 | |
0855e32b NS |
3237 | #define GOT_TLS_GDESC 8 |
3238 | #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC)) | |
b38cadfb | 3239 | unsigned int tls_type : 8; |
34e77a92 | 3240 | |
b38cadfb NC |
3241 | /* True if the symbol's PLT entry is in .iplt rather than .plt. */ |
3242 | unsigned int is_iplt : 1; | |
34e77a92 | 3243 | |
b38cadfb | 3244 | unsigned int unused : 23; |
a4fd1a8e | 3245 | |
b38cadfb NC |
3246 | /* Offset of the GOTPLT entry reserved for the TLS descriptor, |
3247 | starting at the end of the jump table. */ | |
3248 | bfd_vma tlsdesc_got; | |
0855e32b | 3249 | |
b38cadfb NC |
3250 | /* The symbol marking the real symbol location for exported thumb |
3251 | symbols with Arm stubs. */ | |
3252 | struct elf_link_hash_entry *export_glue; | |
906e58ca | 3253 | |
b38cadfb | 3254 | /* A pointer to the most recently used stub hash entry against this |
8029a119 | 3255 | symbol. */ |
b38cadfb | 3256 | struct elf32_arm_stub_hash_entry *stub_cache; |
e8b09b87 CL |
3257 | |
3258 | /* Counter for FDPIC relocations against this symbol. */ | |
3259 | struct fdpic_global fdpic_cnts; | |
b38cadfb | 3260 | }; |
252b5132 | 3261 | |
252b5132 | 3262 | /* Traverse an arm ELF linker hash table. */ |
252b5132 RH |
3263 | #define elf32_arm_link_hash_traverse(table, func, info) \ |
3264 | (elf_link_hash_traverse \ | |
3265 | (&(table)->root, \ | |
0a1b45a2 | 3266 | (bool (*) (struct elf_link_hash_entry *, void *)) (func), \ |
252b5132 RH |
3267 | (info))) |
3268 | ||
3269 | /* Get the ARM elf linker hash table from a link_info structure. */ | |
0f55320b AM |
3270 | #define elf32_arm_hash_table(p) \ |
3271 | ((is_elf_hash_table ((p)->hash) \ | |
3272 | && elf_hash_table_id (elf_hash_table (p)) == ARM_ELF_DATA) \ | |
3273 | ? (struct elf32_arm_link_hash_table *) (p)->hash : NULL) | |
252b5132 | 3274 | |
906e58ca NC |
3275 | #define arm_stub_hash_lookup(table, string, create, copy) \ |
3276 | ((struct elf32_arm_stub_hash_entry *) \ | |
3277 | bfd_hash_lookup ((table), (string), (create), (copy))) | |
3278 | ||
21d799b5 NC |
3279 | /* Array to keep track of which stub sections have been created, and |
3280 | information on stub grouping. */ | |
3281 | struct map_stub | |
3282 | { | |
3283 | /* This is the section to which stubs in the group will be | |
3284 | attached. */ | |
3285 | asection *link_sec; | |
3286 | /* The stub section. */ | |
3287 | asection *stub_sec; | |
3288 | }; | |
3289 | ||
0855e32b NS |
3290 | #define elf32_arm_compute_jump_table_size(htab) \ |
3291 | ((htab)->next_tls_desc_index * 4) | |
3292 | ||
9b485d32 | 3293 | /* ARM ELF linker hash table. */ |
252b5132 | 3294 | struct elf32_arm_link_hash_table |
906e58ca NC |
3295 | { |
3296 | /* The main hash table. */ | |
3297 | struct elf_link_hash_table root; | |
252b5132 | 3298 | |
906e58ca NC |
3299 | /* The size in bytes of the section containing the Thumb-to-ARM glue. */ |
3300 | bfd_size_type thumb_glue_size; | |
252b5132 | 3301 | |
906e58ca NC |
3302 | /* The size in bytes of the section containing the ARM-to-Thumb glue. */ |
3303 | bfd_size_type arm_glue_size; | |
252b5132 | 3304 | |
906e58ca NC |
3305 | /* The size in bytes of section containing the ARMv4 BX veneers. */ |
3306 | bfd_size_type bx_glue_size; | |
845b51d6 | 3307 | |
906e58ca NC |
3308 | /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when |
3309 | veneer has been populated. */ | |
3310 | bfd_vma bx_glue_offset[15]; | |
845b51d6 | 3311 | |
906e58ca NC |
3312 | /* The size in bytes of the section containing glue for VFP11 erratum |
3313 | veneers. */ | |
3314 | bfd_size_type vfp11_erratum_glue_size; | |
c7b8f16e | 3315 | |
a504d23a LA |
3316 | /* The size in bytes of the section containing glue for STM32L4XX erratum |
3317 | veneers. */ | |
3318 | bfd_size_type stm32l4xx_erratum_glue_size; | |
3319 | ||
48229727 JB |
3320 | /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This |
3321 | holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and | |
3322 | elf32_arm_write_section(). */ | |
3323 | struct a8_erratum_fix *a8_erratum_fixes; | |
3324 | unsigned int num_a8_erratum_fixes; | |
3325 | ||
906e58ca NC |
3326 | /* An arbitrary input BFD chosen to hold the glue sections. */ |
3327 | bfd * bfd_of_glue_owner; | |
ba96a88f | 3328 | |
906e58ca NC |
3329 | /* Nonzero to output a BE8 image. */ |
3330 | int byteswap_code; | |
e489d0ae | 3331 | |
906e58ca NC |
3332 | /* Zero if R_ARM_TARGET1 means R_ARM_ABS32. |
3333 | Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */ | |
3334 | int target1_is_rel; | |
9c504268 | 3335 | |
906e58ca NC |
3336 | /* The relocation to use for R_ARM_TARGET2 relocations. */ |
3337 | int target2_reloc; | |
eb043451 | 3338 | |
906e58ca NC |
3339 | /* 0 = Ignore R_ARM_V4BX. |
3340 | 1 = Convert BX to MOV PC. | |
3341 | 2 = Generate v4 interworing stubs. */ | |
3342 | int fix_v4bx; | |
319850b4 | 3343 | |
48229727 JB |
3344 | /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */ |
3345 | int fix_cortex_a8; | |
3346 | ||
2de70689 MGD |
3347 | /* Whether we should fix the ARM1176 BLX immediate issue. */ |
3348 | int fix_arm1176; | |
3349 | ||
906e58ca NC |
3350 | /* Nonzero if the ARM/Thumb BLX instructions are available for use. */ |
3351 | int use_blx; | |
33bfe774 | 3352 | |
906e58ca NC |
3353 | /* What sort of code sequences we should look for which may trigger the |
3354 | VFP11 denorm erratum. */ | |
3355 | bfd_arm_vfp11_fix vfp11_fix; | |
c7b8f16e | 3356 | |
906e58ca NC |
3357 | /* Global counter for the number of fixes we have emitted. */ |
3358 | int num_vfp11_fixes; | |
c7b8f16e | 3359 | |
a504d23a LA |
3360 | /* What sort of code sequences we should look for which may trigger the |
3361 | STM32L4XX erratum. */ | |
3362 | bfd_arm_stm32l4xx_fix stm32l4xx_fix; | |
3363 | ||
3364 | /* Global counter for the number of fixes we have emitted. */ | |
3365 | int num_stm32l4xx_fixes; | |
3366 | ||
906e58ca NC |
3367 | /* Nonzero to force PIC branch veneers. */ |
3368 | int pic_veneer; | |
27e55c4d | 3369 | |
906e58ca NC |
3370 | /* The number of bytes in the initial entry in the PLT. */ |
3371 | bfd_size_type plt_header_size; | |
e5a52504 | 3372 | |
906e58ca NC |
3373 | /* The number of bytes in the subsequent PLT etries. */ |
3374 | bfd_size_type plt_entry_size; | |
e5a52504 | 3375 | |
906e58ca | 3376 | /* True if the target uses REL relocations. */ |
0a1b45a2 | 3377 | bool use_rel; |
4e7fd91e | 3378 | |
54ddd295 TP |
3379 | /* Nonzero if import library must be a secure gateway import library |
3380 | as per ARMv8-M Security Extensions. */ | |
3381 | int cmse_implib; | |
3382 | ||
0955507f TP |
3383 | /* The import library whose symbols' address must remain stable in |
3384 | the import library generated. */ | |
3385 | bfd *in_implib_bfd; | |
3386 | ||
0855e32b NS |
3387 | /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */ |
3388 | bfd_vma next_tls_desc_index; | |
3389 | ||
3390 | /* How many R_ARM_TLS_DESC relocations were generated so far. */ | |
3391 | bfd_vma num_tls_desc; | |
3392 | ||
906e58ca NC |
3393 | /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */ |
3394 | asection *srelplt2; | |
00a97672 | 3395 | |
0855e32b NS |
3396 | /* Offset in .plt section of tls_arm_trampoline. */ |
3397 | bfd_vma tls_trampoline; | |
3398 | ||
5c5a4843 | 3399 | /* Data for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */ |
906e58ca NC |
3400 | union |
3401 | { | |
3402 | bfd_signed_vma refcount; | |
3403 | bfd_vma offset; | |
3404 | } tls_ldm_got; | |
b7693d02 | 3405 | |
906e58ca NC |
3406 | /* For convenience in allocate_dynrelocs. */ |
3407 | bfd * obfd; | |
3408 | ||
0855e32b NS |
3409 | /* The amount of space used by the reserved portion of the sgotplt |
3410 | section, plus whatever space is used by the jump slots. */ | |
3411 | bfd_vma sgotplt_jump_table_size; | |
3412 | ||
906e58ca NC |
3413 | /* The stub hash table. */ |
3414 | struct bfd_hash_table stub_hash_table; | |
3415 | ||
3416 | /* Linker stub bfd. */ | |
3417 | bfd *stub_bfd; | |
3418 | ||
3419 | /* Linker call-backs. */ | |
6bde4c52 TP |
3420 | asection * (*add_stub_section) (const char *, asection *, asection *, |
3421 | unsigned int); | |
906e58ca NC |
3422 | void (*layout_sections_again) (void); |
3423 | ||
3424 | /* Array to keep track of which stub sections have been created, and | |
3425 | information on stub grouping. */ | |
21d799b5 | 3426 | struct map_stub *stub_group; |
906e58ca | 3427 | |
4ba2ef8f TP |
3428 | /* Input stub section holding secure gateway veneers. */ |
3429 | asection *cmse_stub_sec; | |
3430 | ||
0955507f TP |
3431 | /* Offset in cmse_stub_sec where new SG veneers (not in input import library) |
3432 | start to be allocated. */ | |
3433 | bfd_vma new_cmse_stub_offset; | |
3434 | ||
fe33d2fa | 3435 | /* Number of elements in stub_group. */ |
7292b3ac | 3436 | unsigned int top_id; |
fe33d2fa | 3437 | |
906e58ca NC |
3438 | /* Assorted information used by elf32_arm_size_stubs. */ |
3439 | unsigned int bfd_count; | |
7292b3ac | 3440 | unsigned int top_index; |
906e58ca | 3441 | asection **input_list; |
617a5ada CL |
3442 | |
3443 | /* True if the target system uses FDPIC. */ | |
3444 | int fdpic_p; | |
e8b09b87 CL |
3445 | |
3446 | /* Fixup section. Used for FDPIC. */ | |
3447 | asection *srofixup; | |
906e58ca | 3448 | }; |
252b5132 | 3449 | |
e8b09b87 CL |
3450 | /* Add an FDPIC read-only fixup. */ |
3451 | static void | |
3452 | arm_elf_add_rofixup (bfd *output_bfd, asection *srofixup, bfd_vma offset) | |
3453 | { | |
3454 | bfd_vma fixup_offset; | |
3455 | ||
3456 | fixup_offset = srofixup->reloc_count++ * 4; | |
3457 | BFD_ASSERT (fixup_offset < srofixup->size); | |
3458 | bfd_put_32 (output_bfd, offset, srofixup->contents + fixup_offset); | |
3459 | } | |
3460 | ||
a504d23a LA |
3461 | static inline int |
3462 | ctz (unsigned int mask) | |
3463 | { | |
3464 | #if GCC_VERSION >= 3004 | |
3465 | return __builtin_ctz (mask); | |
3466 | #else | |
3467 | unsigned int i; | |
3468 | ||
3469 | for (i = 0; i < 8 * sizeof (mask); i++) | |
3470 | { | |
3471 | if (mask & 0x1) | |
3472 | break; | |
3473 | mask = (mask >> 1); | |
3474 | } | |
3475 | return i; | |
3476 | #endif | |
3477 | } | |
3478 | ||
3479 | static inline int | |
b25e998d | 3480 | elf32_arm_popcount (unsigned int mask) |
a504d23a LA |
3481 | { |
3482 | #if GCC_VERSION >= 3004 | |
3483 | return __builtin_popcount (mask); | |
3484 | #else | |
b25e998d CG |
3485 | unsigned int i; |
3486 | int sum = 0; | |
a504d23a LA |
3487 | |
3488 | for (i = 0; i < 8 * sizeof (mask); i++) | |
3489 | { | |
3490 | if (mask & 0x1) | |
3491 | sum++; | |
3492 | mask = (mask >> 1); | |
3493 | } | |
3494 | return sum; | |
3495 | #endif | |
3496 | } | |
3497 | ||
e8b09b87 CL |
3498 | static void elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info, |
3499 | asection *sreloc, Elf_Internal_Rela *rel); | |
3500 | ||
3501 | static void | |
cc850f74 NC |
3502 | arm_elf_fill_funcdesc (bfd *output_bfd, |
3503 | struct bfd_link_info *info, | |
3504 | int *funcdesc_offset, | |
3505 | int dynindx, | |
3506 | int offset, | |
3507 | bfd_vma addr, | |
3508 | bfd_vma dynreloc_value, | |
3509 | bfd_vma seg) | |
e8b09b87 CL |
3510 | { |
3511 | if ((*funcdesc_offset & 1) == 0) | |
3512 | { | |
3513 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info); | |
3514 | asection *sgot = globals->root.sgot; | |
3515 | ||
cc850f74 | 3516 | if (bfd_link_pic (info)) |
e8b09b87 CL |
3517 | { |
3518 | asection *srelgot = globals->root.srelgot; | |
3519 | Elf_Internal_Rela outrel; | |
3520 | ||
3521 | outrel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE); | |
3522 | outrel.r_offset = sgot->output_section->vma + sgot->output_offset + offset; | |
3523 | outrel.r_addend = 0; | |
3524 | ||
3525 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); | |
3526 | bfd_put_32 (output_bfd, addr, sgot->contents + offset); | |
3527 | bfd_put_32 (output_bfd, seg, sgot->contents + offset + 4); | |
3528 | } | |
3529 | else | |
3530 | { | |
3531 | struct elf_link_hash_entry *hgot = globals->root.hgot; | |
3532 | bfd_vma got_value = hgot->root.u.def.value | |
3533 | + hgot->root.u.def.section->output_section->vma | |
3534 | + hgot->root.u.def.section->output_offset; | |
3535 | ||
cc850f74 NC |
3536 | arm_elf_add_rofixup (output_bfd, globals->srofixup, |
3537 | sgot->output_section->vma + sgot->output_offset | |
3538 | + offset); | |
3539 | arm_elf_add_rofixup (output_bfd, globals->srofixup, | |
3540 | sgot->output_section->vma + sgot->output_offset | |
3541 | + offset + 4); | |
e8b09b87 CL |
3542 | bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + offset); |
3543 | bfd_put_32 (output_bfd, got_value, sgot->contents + offset + 4); | |
3544 | } | |
3545 | *funcdesc_offset |= 1; | |
3546 | } | |
3547 | } | |
3548 | ||
780a67af NC |
3549 | /* Create an entry in an ARM ELF linker hash table. */ |
3550 | ||
3551 | static struct bfd_hash_entry * | |
57e8b36a | 3552 | elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry, |
99059e56 RM |
3553 | struct bfd_hash_table * table, |
3554 | const char * string) | |
780a67af NC |
3555 | { |
3556 | struct elf32_arm_link_hash_entry * ret = | |
3557 | (struct elf32_arm_link_hash_entry *) entry; | |
3558 | ||
3559 | /* Allocate the structure if it has not already been allocated by a | |
3560 | subclass. */ | |
906e58ca | 3561 | if (ret == NULL) |
21d799b5 | 3562 | ret = (struct elf32_arm_link_hash_entry *) |
99059e56 | 3563 | bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry)); |
57e8b36a | 3564 | if (ret == NULL) |
780a67af NC |
3565 | return (struct bfd_hash_entry *) ret; |
3566 | ||
3567 | /* Call the allocation method of the superclass. */ | |
3568 | ret = ((struct elf32_arm_link_hash_entry *) | |
3569 | _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, | |
3570 | table, string)); | |
57e8b36a | 3571 | if (ret != NULL) |
b7693d02 | 3572 | { |
ba93b8ac | 3573 | ret->tls_type = GOT_UNKNOWN; |
0855e32b | 3574 | ret->tlsdesc_got = (bfd_vma) -1; |
34e77a92 RS |
3575 | ret->plt.thumb_refcount = 0; |
3576 | ret->plt.maybe_thumb_refcount = 0; | |
3577 | ret->plt.noncall_refcount = 0; | |
3578 | ret->plt.got_offset = -1; | |
0a1b45a2 | 3579 | ret->is_iplt = false; |
a4fd1a8e | 3580 | ret->export_glue = NULL; |
906e58ca NC |
3581 | |
3582 | ret->stub_cache = NULL; | |
e8b09b87 CL |
3583 | |
3584 | ret->fdpic_cnts.gotofffuncdesc_cnt = 0; | |
3585 | ret->fdpic_cnts.gotfuncdesc_cnt = 0; | |
3586 | ret->fdpic_cnts.funcdesc_cnt = 0; | |
3587 | ret->fdpic_cnts.funcdesc_offset = -1; | |
3588 | ret->fdpic_cnts.gotfuncdesc_offset = -1; | |
b7693d02 | 3589 | } |
780a67af NC |
3590 | |
3591 | return (struct bfd_hash_entry *) ret; | |
3592 | } | |
3593 | ||
34e77a92 RS |
3594 | /* Ensure that we have allocated bookkeeping structures for ABFD's local |
3595 | symbols. */ | |
3596 | ||
0a1b45a2 | 3597 | static bool |
34e77a92 RS |
3598 | elf32_arm_allocate_local_sym_info (bfd *abfd) |
3599 | { | |
3600 | if (elf_local_got_refcounts (abfd) == NULL) | |
3601 | { | |
3602 | bfd_size_type num_syms; | |
74fd118f NC |
3603 | |
3604 | elf32_arm_num_entries (abfd) = 0; | |
3605 | ||
3606 | /* Whilst it might be tempting to allocate a single block of memory and | |
3607 | then divide it up amoungst the arrays in the elf_arm_obj_tdata | |
3608 | structure, this interferes with the work of memory checkers looking | |
3609 | for buffer overruns. So allocate each array individually. */ | |
34e77a92 RS |
3610 | |
3611 | num_syms = elf_tdata (abfd)->symtab_hdr.sh_info; | |
74fd118f NC |
3612 | |
3613 | elf_local_got_refcounts (abfd) = bfd_zalloc | |
3614 | (abfd, num_syms * sizeof (* elf_local_got_refcounts (abfd))); | |
3615 | ||
3616 | if (elf_local_got_refcounts (abfd) == NULL) | |
0a1b45a2 | 3617 | return false; |
34e77a92 | 3618 | |
74fd118f NC |
3619 | elf32_arm_local_tlsdesc_gotent (abfd) = bfd_zalloc |
3620 | (abfd, num_syms * sizeof (* elf32_arm_local_tlsdesc_gotent (abfd))); | |
34e77a92 | 3621 | |
74fd118f NC |
3622 | if (elf32_arm_local_tlsdesc_gotent (abfd) == NULL) |
3623 | return false; | |
f911bb22 | 3624 | |
74fd118f NC |
3625 | elf32_arm_local_iplt (abfd) = bfd_zalloc |
3626 | (abfd, num_syms * sizeof (* elf32_arm_local_iplt (abfd))); | |
34e77a92 | 3627 | |
74fd118f NC |
3628 | if (elf32_arm_local_iplt (abfd) == NULL) |
3629 | return false; | |
3630 | ||
3631 | elf32_arm_local_fdpic_cnts (abfd) = bfd_zalloc | |
3632 | (abfd, num_syms * sizeof (* elf32_arm_local_fdpic_cnts (abfd))); | |
3633 | ||
3634 | if (elf32_arm_local_fdpic_cnts (abfd) == NULL) | |
3635 | return false; | |
3636 | ||
3637 | elf32_arm_local_got_tls_type (abfd) = bfd_zalloc | |
3638 | (abfd, num_syms * sizeof (* elf32_arm_local_got_tls_type (abfd))); | |
3639 | ||
3640 | if (elf32_arm_local_got_tls_type (abfd) == NULL) | |
3641 | return false; | |
3642 | ||
3643 | elf32_arm_num_entries (abfd) = num_syms; | |
34e77a92 | 3644 | |
f911bb22 AM |
3645 | #if GCC_VERSION >= 3000 |
3646 | BFD_ASSERT (__alignof__ (*elf32_arm_local_tlsdesc_gotent (abfd)) | |
3647 | <= __alignof__ (*elf_local_got_refcounts (abfd))); | |
3648 | BFD_ASSERT (__alignof__ (*elf32_arm_local_iplt (abfd)) | |
3649 | <= __alignof__ (*elf32_arm_local_tlsdesc_gotent (abfd))); | |
3650 | BFD_ASSERT (__alignof__ (*elf32_arm_local_fdpic_cnts (abfd)) | |
3651 | <= __alignof__ (*elf32_arm_local_iplt (abfd))); | |
3652 | BFD_ASSERT (__alignof__ (*elf32_arm_local_got_tls_type (abfd)) | |
3653 | <= __alignof__ (*elf32_arm_local_fdpic_cnts (abfd))); | |
3654 | #endif | |
34e77a92 | 3655 | } |
0a1b45a2 | 3656 | return true; |
34e77a92 RS |
3657 | } |
3658 | ||
3659 | /* Return the .iplt information for local symbol R_SYMNDX, which belongs | |
3660 | to input bfd ABFD. Create the information if it doesn't already exist. | |
3661 | Return null if an allocation fails. */ | |
3662 | ||
3663 | static struct arm_local_iplt_info * | |
3664 | elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx) | |
3665 | { | |
3666 | struct arm_local_iplt_info **ptr; | |
3667 | ||
3668 | if (!elf32_arm_allocate_local_sym_info (abfd)) | |
3669 | return NULL; | |
3670 | ||
3671 | BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info); | |
74fd118f | 3672 | BFD_ASSERT (r_symndx < elf32_arm_num_entries (abfd)); |
34e77a92 RS |
3673 | ptr = &elf32_arm_local_iplt (abfd)[r_symndx]; |
3674 | if (*ptr == NULL) | |
3675 | *ptr = bfd_zalloc (abfd, sizeof (**ptr)); | |
3676 | return *ptr; | |
3677 | } | |
3678 | ||
3679 | /* Try to obtain PLT information for the symbol with index R_SYMNDX | |
3680 | in ABFD's symbol table. If the symbol is global, H points to its | |
3681 | hash table entry, otherwise H is null. | |
3682 | ||
3683 | Return true if the symbol does have PLT information. When returning | |
3684 | true, point *ROOT_PLT at the target-independent reference count/offset | |
3685 | union and *ARM_PLT at the ARM-specific information. */ | |
3686 | ||
0a1b45a2 | 3687 | static bool |
4ba2ef8f TP |
3688 | elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals, |
3689 | struct elf32_arm_link_hash_entry *h, | |
34e77a92 RS |
3690 | unsigned long r_symndx, union gotplt_union **root_plt, |
3691 | struct arm_plt_info **arm_plt) | |
3692 | { | |
3693 | struct arm_local_iplt_info *local_iplt; | |
3694 | ||
4ba2ef8f | 3695 | if (globals->root.splt == NULL && globals->root.iplt == NULL) |
0a1b45a2 | 3696 | return false; |
4ba2ef8f | 3697 | |
34e77a92 RS |
3698 | if (h != NULL) |
3699 | { | |
3700 | *root_plt = &h->root.plt; | |
3701 | *arm_plt = &h->plt; | |
0a1b45a2 | 3702 | return true; |
34e77a92 RS |
3703 | } |
3704 | ||
3705 | if (elf32_arm_local_iplt (abfd) == NULL) | |
0a1b45a2 | 3706 | return false; |
34e77a92 | 3707 | |
74fd118f NC |
3708 | if (r_symndx >= elf32_arm_num_entries (abfd)) |
3709 | return false; | |
3710 | ||
34e77a92 RS |
3711 | local_iplt = elf32_arm_local_iplt (abfd)[r_symndx]; |
3712 | if (local_iplt == NULL) | |
0a1b45a2 | 3713 | return false; |
34e77a92 RS |
3714 | |
3715 | *root_plt = &local_iplt->root; | |
3716 | *arm_plt = &local_iplt->arm; | |
0a1b45a2 | 3717 | return true; |
34e77a92 RS |
3718 | } |
3719 | ||
0a1b45a2 | 3720 | static bool using_thumb_only (struct elf32_arm_link_hash_table *globals); |
59029f57 | 3721 | |
34e77a92 RS |
3722 | /* Return true if the PLT described by ARM_PLT requires a Thumb stub |
3723 | before it. */ | |
3724 | ||
0a1b45a2 | 3725 | static bool |
34e77a92 RS |
3726 | elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info, |
3727 | struct arm_plt_info *arm_plt) | |
3728 | { | |
3729 | struct elf32_arm_link_hash_table *htab; | |
3730 | ||
3731 | htab = elf32_arm_hash_table (info); | |
59029f57 | 3732 | |
cc850f74 | 3733 | return (!using_thumb_only (htab) && (arm_plt->thumb_refcount != 0 |
59029f57 | 3734 | || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0))); |
34e77a92 RS |
3735 | } |
3736 | ||
3737 | /* Return a pointer to the head of the dynamic reloc list that should | |
3738 | be used for local symbol ISYM, which is symbol number R_SYMNDX in | |
3739 | ABFD's symbol table. Return null if an error occurs. */ | |
3740 | ||
3741 | static struct elf_dyn_relocs ** | |
3742 | elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx, | |
3743 | Elf_Internal_Sym *isym) | |
3744 | { | |
3745 | if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC) | |
3746 | { | |
3747 | struct arm_local_iplt_info *local_iplt; | |
3748 | ||
3749 | local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx); | |
3750 | if (local_iplt == NULL) | |
3751 | return NULL; | |
3752 | return &local_iplt->dyn_relocs; | |
3753 | } | |
3754 | else | |
3755 | { | |
3756 | /* Track dynamic relocs needed for local syms too. | |
3757 | We really need local syms available to do this | |
3758 | easily. Oh well. */ | |
3759 | asection *s; | |
3760 | void *vpp; | |
3761 | ||
3762 | s = bfd_section_from_elf_index (abfd, isym->st_shndx); | |
3763 | if (s == NULL) | |
cc850f74 | 3764 | return NULL; |
34e77a92 RS |
3765 | |
3766 | vpp = &elf_section_data (s)->local_dynrel; | |
3767 | return (struct elf_dyn_relocs **) vpp; | |
3768 | } | |
3769 | } | |
3770 | ||
906e58ca NC |
3771 | /* Initialize an entry in the stub hash table. */ |
3772 | ||
3773 | static struct bfd_hash_entry * | |
3774 | stub_hash_newfunc (struct bfd_hash_entry *entry, | |
3775 | struct bfd_hash_table *table, | |
3776 | const char *string) | |
3777 | { | |
3778 | /* Allocate the structure if it has not already been allocated by a | |
3779 | subclass. */ | |
3780 | if (entry == NULL) | |
3781 | { | |
21d799b5 | 3782 | entry = (struct bfd_hash_entry *) |
99059e56 | 3783 | bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry)); |
906e58ca NC |
3784 | if (entry == NULL) |
3785 | return entry; | |
3786 | } | |
3787 | ||
3788 | /* Call the allocation method of the superclass. */ | |
3789 | entry = bfd_hash_newfunc (entry, table, string); | |
3790 | if (entry != NULL) | |
3791 | { | |
3792 | struct elf32_arm_stub_hash_entry *eh; | |
3793 | ||
3794 | /* Initialize the local fields. */ | |
3795 | eh = (struct elf32_arm_stub_hash_entry *) entry; | |
3796 | eh->stub_sec = NULL; | |
0955507f | 3797 | eh->stub_offset = (bfd_vma) -1; |
8d9d9490 | 3798 | eh->source_value = 0; |
906e58ca NC |
3799 | eh->target_value = 0; |
3800 | eh->target_section = NULL; | |
cedfb179 | 3801 | eh->orig_insn = 0; |
906e58ca | 3802 | eh->stub_type = arm_stub_none; |
461a49ca DJ |
3803 | eh->stub_size = 0; |
3804 | eh->stub_template = NULL; | |
0955507f | 3805 | eh->stub_template_size = -1; |
906e58ca NC |
3806 | eh->h = NULL; |
3807 | eh->id_sec = NULL; | |
d8d2f433 | 3808 | eh->output_name = NULL; |
906e58ca NC |
3809 | } |
3810 | ||
3811 | return entry; | |
3812 | } | |
3813 | ||
00a97672 | 3814 | /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up |
5e681ec4 PB |
3815 | shortcuts to them in our hash table. */ |
3816 | ||
0a1b45a2 | 3817 | static bool |
57e8b36a | 3818 | create_got_section (bfd *dynobj, struct bfd_link_info *info) |
5e681ec4 PB |
3819 | { |
3820 | struct elf32_arm_link_hash_table *htab; | |
3821 | ||
e5a52504 | 3822 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 | 3823 | if (htab == NULL) |
0a1b45a2 | 3824 | return false; |
4dfe6ac6 | 3825 | |
5e681ec4 | 3826 | if (! _bfd_elf_create_got_section (dynobj, info)) |
0a1b45a2 | 3827 | return false; |
5e681ec4 | 3828 | |
e8b09b87 CL |
3829 | /* Also create .rofixup. */ |
3830 | if (htab->fdpic_p) | |
3831 | { | |
3832 | htab->srofixup = bfd_make_section_with_flags (dynobj, ".rofixup", | |
3833 | (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | |
3834 | | SEC_IN_MEMORY | SEC_LINKER_CREATED | SEC_READONLY)); | |
fd361982 AM |
3835 | if (htab->srofixup == NULL |
3836 | || !bfd_set_section_alignment (htab->srofixup, 2)) | |
0a1b45a2 | 3837 | return false; |
e8b09b87 CL |
3838 | } |
3839 | ||
0a1b45a2 | 3840 | return true; |
5e681ec4 PB |
3841 | } |
3842 | ||
34e77a92 RS |
3843 | /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */ |
3844 | ||
0a1b45a2 | 3845 | static bool |
34e77a92 RS |
3846 | create_ifunc_sections (struct bfd_link_info *info) |
3847 | { | |
3848 | struct elf32_arm_link_hash_table *htab; | |
3849 | const struct elf_backend_data *bed; | |
3850 | bfd *dynobj; | |
3851 | asection *s; | |
3852 | flagword flags; | |
b38cadfb | 3853 | |
34e77a92 RS |
3854 | htab = elf32_arm_hash_table (info); |
3855 | dynobj = htab->root.dynobj; | |
3856 | bed = get_elf_backend_data (dynobj); | |
3857 | flags = bed->dynamic_sec_flags; | |
3858 | ||
3859 | if (htab->root.iplt == NULL) | |
3860 | { | |
3d4d4302 AM |
3861 | s = bfd_make_section_anyway_with_flags (dynobj, ".iplt", |
3862 | flags | SEC_READONLY | SEC_CODE); | |
34e77a92 | 3863 | if (s == NULL |
fd361982 | 3864 | || !bfd_set_section_alignment (s, bed->plt_alignment)) |
0a1b45a2 | 3865 | return false; |
34e77a92 RS |
3866 | htab->root.iplt = s; |
3867 | } | |
3868 | ||
3869 | if (htab->root.irelplt == NULL) | |
3870 | { | |
3d4d4302 AM |
3871 | s = bfd_make_section_anyway_with_flags (dynobj, |
3872 | RELOC_SECTION (htab, ".iplt"), | |
3873 | flags | SEC_READONLY); | |
34e77a92 | 3874 | if (s == NULL |
fd361982 | 3875 | || !bfd_set_section_alignment (s, bed->s->log_file_align)) |
0a1b45a2 | 3876 | return false; |
34e77a92 RS |
3877 | htab->root.irelplt = s; |
3878 | } | |
3879 | ||
3880 | if (htab->root.igotplt == NULL) | |
3881 | { | |
3d4d4302 | 3882 | s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags); |
34e77a92 | 3883 | if (s == NULL |
fd361982 | 3884 | || !bfd_set_section_alignment (s, bed->s->log_file_align)) |
0a1b45a2 | 3885 | return false; |
34e77a92 RS |
3886 | htab->root.igotplt = s; |
3887 | } | |
0a1b45a2 | 3888 | return true; |
34e77a92 RS |
3889 | } |
3890 | ||
eed94f8f NC |
3891 | /* Determine if we're dealing with a Thumb only architecture. */ |
3892 | ||
0a1b45a2 | 3893 | static bool |
eed94f8f NC |
3894 | using_thumb_only (struct elf32_arm_link_hash_table *globals) |
3895 | { | |
2fd158eb TP |
3896 | int arch; |
3897 | int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, | |
3898 | Tag_CPU_arch_profile); | |
eed94f8f | 3899 | |
2fd158eb TP |
3900 | if (profile) |
3901 | return profile == 'M'; | |
eed94f8f | 3902 | |
2fd158eb | 3903 | arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch); |
eed94f8f | 3904 | |
60a019a0 | 3905 | /* Force return logic to be reviewed for each new architecture. */ |
031254f2 | 3906 | BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN); |
60a019a0 | 3907 | |
2fd158eb TP |
3908 | if (arch == TAG_CPU_ARCH_V6_M |
3909 | || arch == TAG_CPU_ARCH_V6S_M | |
3910 | || arch == TAG_CPU_ARCH_V7E_M | |
3911 | || arch == TAG_CPU_ARCH_V8M_BASE | |
031254f2 AV |
3912 | || arch == TAG_CPU_ARCH_V8M_MAIN |
3913 | || arch == TAG_CPU_ARCH_V8_1M_MAIN) | |
0a1b45a2 | 3914 | return true; |
eed94f8f | 3915 | |
0a1b45a2 | 3916 | return false; |
eed94f8f NC |
3917 | } |
3918 | ||
3919 | /* Determine if we're dealing with a Thumb-2 object. */ | |
3920 | ||
0a1b45a2 | 3921 | static bool |
eed94f8f NC |
3922 | using_thumb2 (struct elf32_arm_link_hash_table *globals) |
3923 | { | |
60a019a0 TP |
3924 | int arch; |
3925 | int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, | |
3926 | Tag_THUMB_ISA_use); | |
3927 | ||
d8147d70 RE |
3928 | /* No use of thumb permitted, or a legacy thumb-1/2 definition. */ |
3929 | if (thumb_isa < 3) | |
60a019a0 TP |
3930 | return thumb_isa == 2; |
3931 | ||
d8147d70 | 3932 | /* Variant of thumb is described by the architecture tag. */ |
60a019a0 TP |
3933 | arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch); |
3934 | ||
3935 | /* Force return logic to be reviewed for each new architecture. */ | |
031254f2 | 3936 | BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN); |
60a019a0 TP |
3937 | |
3938 | return (arch == TAG_CPU_ARCH_V6T2 | |
3939 | || arch == TAG_CPU_ARCH_V7 | |
3940 | || arch == TAG_CPU_ARCH_V7E_M | |
3941 | || arch == TAG_CPU_ARCH_V8 | |
bff0500d | 3942 | || arch == TAG_CPU_ARCH_V8R |
031254f2 AV |
3943 | || arch == TAG_CPU_ARCH_V8M_MAIN |
3944 | || arch == TAG_CPU_ARCH_V8_1M_MAIN); | |
eed94f8f NC |
3945 | } |
3946 | ||
5e866f5a TP |
3947 | /* Determine whether Thumb-2 BL instruction is available. */ |
3948 | ||
0a1b45a2 | 3949 | static bool |
5e866f5a TP |
3950 | using_thumb2_bl (struct elf32_arm_link_hash_table *globals) |
3951 | { | |
3952 | int arch = | |
3953 | bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch); | |
3954 | ||
3955 | /* Force return logic to be reviewed for each new architecture. */ | |
3197e593 | 3956 | BFD_ASSERT (arch <= TAG_CPU_ARCH_V9); |
5e866f5a TP |
3957 | |
3958 | /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */ | |
3959 | return (arch == TAG_CPU_ARCH_V6T2 | |
3960 | || arch >= TAG_CPU_ARCH_V7); | |
3961 | } | |
3962 | ||
00a97672 RS |
3963 | /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and |
3964 | .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our | |
5e681ec4 PB |
3965 | hash table. */ |
3966 | ||
0a1b45a2 | 3967 | static bool |
57e8b36a | 3968 | elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info) |
5e681ec4 PB |
3969 | { |
3970 | struct elf32_arm_link_hash_table *htab; | |
3971 | ||
3972 | htab = elf32_arm_hash_table (info); | |
4dfe6ac6 | 3973 | if (htab == NULL) |
0a1b45a2 | 3974 | return false; |
4dfe6ac6 | 3975 | |
362d30a1 | 3976 | if (!htab->root.sgot && !create_got_section (dynobj, info)) |
0a1b45a2 | 3977 | return false; |
5e681ec4 PB |
3978 | |
3979 | if (!_bfd_elf_create_dynamic_sections (dynobj, info)) | |
0a1b45a2 | 3980 | return false; |
5e681ec4 | 3981 | |
90c14f0c | 3982 | if (htab->root.target_os == is_vxworks) |
00a97672 RS |
3983 | { |
3984 | if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2)) | |
0a1b45a2 | 3985 | return false; |
00a97672 | 3986 | |
0e1862bb | 3987 | if (bfd_link_pic (info)) |
00a97672 RS |
3988 | { |
3989 | htab->plt_header_size = 0; | |
3990 | htab->plt_entry_size | |
3991 | = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry); | |
3992 | } | |
3993 | else | |
3994 | { | |
3995 | htab->plt_header_size | |
3996 | = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry); | |
3997 | htab->plt_entry_size | |
3998 | = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry); | |
3999 | } | |
aebf9be7 NC |
4000 | |
4001 | if (elf_elfheader (dynobj)) | |
4002 | elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32; | |
00a97672 | 4003 | } |
eed94f8f NC |
4004 | else |
4005 | { | |
4006 | /* PR ld/16017 | |
4007 | Test for thumb only architectures. Note - we cannot just call | |
4008 | using_thumb_only() as the attributes in the output bfd have not been | |
4009 | initialised at this point, so instead we use the input bfd. */ | |
4010 | bfd * saved_obfd = htab->obfd; | |
4011 | ||
4012 | htab->obfd = dynobj; | |
4013 | if (using_thumb_only (htab)) | |
4014 | { | |
4015 | htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry); | |
4016 | htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry); | |
4017 | } | |
4018 | htab->obfd = saved_obfd; | |
4019 | } | |
5e681ec4 | 4020 | |
7801f98f CL |
4021 | if (htab->fdpic_p) { |
4022 | htab->plt_header_size = 0; | |
4023 | if (info->flags & DF_BIND_NOW) | |
cc850f74 | 4024 | htab->plt_entry_size = 4 * (ARRAY_SIZE (elf32_arm_fdpic_plt_entry) - 5); |
7801f98f | 4025 | else |
cc850f74 | 4026 | htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_fdpic_plt_entry); |
7801f98f CL |
4027 | } |
4028 | ||
362d30a1 RS |
4029 | if (!htab->root.splt |
4030 | || !htab->root.srelplt | |
9d19e4fd AM |
4031 | || !htab->root.sdynbss |
4032 | || (!bfd_link_pic (info) && !htab->root.srelbss)) | |
5e681ec4 PB |
4033 | abort (); |
4034 | ||
0a1b45a2 | 4035 | return true; |
5e681ec4 PB |
4036 | } |
4037 | ||
906e58ca NC |
4038 | /* Copy the extra info we tack onto an elf_link_hash_entry. */ |
4039 | ||
4040 | static void | |
4041 | elf32_arm_copy_indirect_symbol (struct bfd_link_info *info, | |
4042 | struct elf_link_hash_entry *dir, | |
4043 | struct elf_link_hash_entry *ind) | |
4044 | { | |
4045 | struct elf32_arm_link_hash_entry *edir, *eind; | |
4046 | ||
4047 | edir = (struct elf32_arm_link_hash_entry *) dir; | |
4048 | eind = (struct elf32_arm_link_hash_entry *) ind; | |
4049 | ||
906e58ca NC |
4050 | if (ind->root.type == bfd_link_hash_indirect) |
4051 | { | |
4052 | /* Copy over PLT info. */ | |
34e77a92 RS |
4053 | edir->plt.thumb_refcount += eind->plt.thumb_refcount; |
4054 | eind->plt.thumb_refcount = 0; | |
4055 | edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount; | |
4056 | eind->plt.maybe_thumb_refcount = 0; | |
4057 | edir->plt.noncall_refcount += eind->plt.noncall_refcount; | |
4058 | eind->plt.noncall_refcount = 0; | |
4059 | ||
e8b09b87 CL |
4060 | /* Copy FDPIC counters. */ |
4061 | edir->fdpic_cnts.gotofffuncdesc_cnt += eind->fdpic_cnts.gotofffuncdesc_cnt; | |
4062 | edir->fdpic_cnts.gotfuncdesc_cnt += eind->fdpic_cnts.gotfuncdesc_cnt; | |
4063 | edir->fdpic_cnts.funcdesc_cnt += eind->fdpic_cnts.funcdesc_cnt; | |
4064 | ||
34e77a92 RS |
4065 | /* We should only allocate a function to .iplt once the final |
4066 | symbol information is known. */ | |
4067 | BFD_ASSERT (!eind->is_iplt); | |
906e58ca NC |
4068 | |
4069 | if (dir->got.refcount <= 0) | |
4070 | { | |
4071 | edir->tls_type = eind->tls_type; | |
4072 | eind->tls_type = GOT_UNKNOWN; | |
4073 | } | |
4074 | } | |
4075 | ||
4076 | _bfd_elf_link_hash_copy_indirect (info, dir, ind); | |
4077 | } | |
4078 | ||
68faa637 AM |
4079 | /* Destroy an ARM elf linker hash table. */ |
4080 | ||
4081 | static void | |
d495ab0d | 4082 | elf32_arm_link_hash_table_free (bfd *obfd) |
68faa637 AM |
4083 | { |
4084 | struct elf32_arm_link_hash_table *ret | |
d495ab0d | 4085 | = (struct elf32_arm_link_hash_table *) obfd->link.hash; |
68faa637 AM |
4086 | |
4087 | bfd_hash_table_free (&ret->stub_hash_table); | |
d495ab0d | 4088 | _bfd_elf_link_hash_table_free (obfd); |
68faa637 AM |
4089 | } |
4090 | ||
906e58ca NC |
4091 | /* Create an ARM elf linker hash table. */ |
4092 | ||
4093 | static struct bfd_link_hash_table * | |
4094 | elf32_arm_link_hash_table_create (bfd *abfd) | |
4095 | { | |
4096 | struct elf32_arm_link_hash_table *ret; | |
986f0783 | 4097 | size_t amt = sizeof (struct elf32_arm_link_hash_table); |
906e58ca | 4098 | |
7bf52ea2 | 4099 | ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt); |
906e58ca NC |
4100 | if (ret == NULL) |
4101 | return NULL; | |
4102 | ||
4103 | if (!_bfd_elf_link_hash_table_init (& ret->root, abfd, | |
4104 | elf32_arm_link_hash_newfunc, | |
4dfe6ac6 NC |
4105 | sizeof (struct elf32_arm_link_hash_entry), |
4106 | ARM_ELF_DATA)) | |
906e58ca NC |
4107 | { |
4108 | free (ret); | |
4109 | return NULL; | |
4110 | } | |
4111 | ||
906e58ca | 4112 | ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE; |
a504d23a | 4113 | ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE; |
906e58ca NC |
4114 | #ifdef FOUR_WORD_PLT |
4115 | ret->plt_header_size = 16; | |
4116 | ret->plt_entry_size = 16; | |
4117 | #else | |
4118 | ret->plt_header_size = 20; | |
1db37fe6 | 4119 | ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12; |
906e58ca | 4120 | #endif |
0a1b45a2 | 4121 | ret->use_rel = true; |
906e58ca | 4122 | ret->obfd = abfd; |
617a5ada | 4123 | ret->fdpic_p = 0; |
906e58ca NC |
4124 | |
4125 | if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc, | |
4126 | sizeof (struct elf32_arm_stub_hash_entry))) | |
4127 | { | |
d495ab0d | 4128 | _bfd_elf_link_hash_table_free (abfd); |
906e58ca NC |
4129 | return NULL; |
4130 | } | |
d495ab0d | 4131 | ret->root.root.hash_table_free = elf32_arm_link_hash_table_free; |
906e58ca NC |
4132 | |
4133 | return &ret->root.root; | |
4134 | } | |
4135 | ||
cd1dac3d DG |
4136 | /* Determine what kind of NOPs are available. */ |
4137 | ||
0a1b45a2 | 4138 | static bool |
cd1dac3d DG |
4139 | arch_has_arm_nop (struct elf32_arm_link_hash_table *globals) |
4140 | { | |
4141 | const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, | |
4142 | Tag_CPU_arch); | |
cd1dac3d | 4143 | |
60a019a0 | 4144 | /* Force return logic to be reviewed for each new architecture. */ |
3197e593 | 4145 | BFD_ASSERT (arch <= TAG_CPU_ARCH_V9); |
60a019a0 TP |
4146 | |
4147 | return (arch == TAG_CPU_ARCH_V6T2 | |
4148 | || arch == TAG_CPU_ARCH_V6K | |
4149 | || arch == TAG_CPU_ARCH_V7 | |
bff0500d | 4150 | || arch == TAG_CPU_ARCH_V8 |
3197e593 PW |
4151 | || arch == TAG_CPU_ARCH_V8R |
4152 | || arch == TAG_CPU_ARCH_V9); | |
cd1dac3d DG |
4153 | } |
4154 | ||
0a1b45a2 | 4155 | static bool |
f4ac8484 DJ |
4156 | arm_stub_is_thumb (enum elf32_arm_stub_type stub_type) |
4157 | { | |
4158 | switch (stub_type) | |
4159 | { | |
fea2b4d6 | 4160 | case arm_stub_long_branch_thumb_only: |
80c135e5 | 4161 | case arm_stub_long_branch_thumb2_only: |
d5a67c02 | 4162 | case arm_stub_long_branch_thumb2_only_pure: |
fea2b4d6 CL |
4163 | case arm_stub_long_branch_v4t_thumb_arm: |
4164 | case arm_stub_short_branch_v4t_thumb_arm: | |
ebe24dd4 | 4165 | case arm_stub_long_branch_v4t_thumb_arm_pic: |
12352d3f | 4166 | case arm_stub_long_branch_v4t_thumb_tls_pic: |
ebe24dd4 | 4167 | case arm_stub_long_branch_thumb_only_pic: |
4ba2ef8f | 4168 | case arm_stub_cmse_branch_thumb_only: |
0a1b45a2 | 4169 | return true; |
f4ac8484 DJ |
4170 | case arm_stub_none: |
4171 | BFD_FAIL (); | |
0a1b45a2 | 4172 | return false; |
f4ac8484 DJ |
4173 | break; |
4174 | default: | |
0a1b45a2 | 4175 | return false; |
f4ac8484 DJ |
4176 | } |
4177 | } | |
4178 | ||
906e58ca NC |
4179 | /* Determine the type of stub needed, if any, for a call. */ |
4180 | ||
4181 | static enum elf32_arm_stub_type | |
4182 | arm_type_of_stub (struct bfd_link_info *info, | |
4183 | asection *input_sec, | |
4184 | const Elf_Internal_Rela *rel, | |
34e77a92 | 4185 | unsigned char st_type, |
35fc36a8 | 4186 | enum arm_st_branch_type *actual_branch_type, |
906e58ca | 4187 | struct elf32_arm_link_hash_entry *hash, |
c820be07 NC |
4188 | bfd_vma destination, |
4189 | asection *sym_sec, | |
4190 | bfd *input_bfd, | |
4191 | const char *name) | |
906e58ca NC |
4192 | { |
4193 | bfd_vma location; | |
4194 | bfd_signed_vma branch_offset; | |
4195 | unsigned int r_type; | |
4196 | struct elf32_arm_link_hash_table * globals; | |
0a1b45a2 | 4197 | bool thumb2, thumb2_bl, thumb_only; |
906e58ca | 4198 | enum elf32_arm_stub_type stub_type = arm_stub_none; |
5fa9e92f | 4199 | int use_plt = 0; |
35fc36a8 | 4200 | enum arm_st_branch_type branch_type = *actual_branch_type; |
34e77a92 RS |
4201 | union gotplt_union *root_plt; |
4202 | struct arm_plt_info *arm_plt; | |
d5a67c02 AV |
4203 | int arch; |
4204 | int thumb2_movw; | |
906e58ca | 4205 | |
35fc36a8 | 4206 | if (branch_type == ST_BRANCH_LONG) |
da5938a2 NC |
4207 | return stub_type; |
4208 | ||
906e58ca | 4209 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
4210 | if (globals == NULL) |
4211 | return stub_type; | |
906e58ca NC |
4212 | |
4213 | thumb_only = using_thumb_only (globals); | |
906e58ca | 4214 | thumb2 = using_thumb2 (globals); |
5e866f5a | 4215 | thumb2_bl = using_thumb2_bl (globals); |
906e58ca | 4216 | |
d5a67c02 AV |
4217 | arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch); |
4218 | ||
4219 | /* True for architectures that implement the thumb2 movw instruction. */ | |
4220 | thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE); | |
4221 | ||
906e58ca NC |
4222 | /* Determine where the call point is. */ |
4223 | location = (input_sec->output_offset | |
4224 | + input_sec->output_section->vma | |
4225 | + rel->r_offset); | |
4226 | ||
906e58ca NC |
4227 | r_type = ELF32_R_TYPE (rel->r_info); |
4228 | ||
39f21624 NC |
4229 | /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we |
4230 | are considering a function call relocation. */ | |
c5423981 | 4231 | if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24 |
07d6d2b8 | 4232 | || r_type == R_ARM_THM_JUMP19) |
39f21624 NC |
4233 | && branch_type == ST_BRANCH_TO_ARM) |
4234 | branch_type = ST_BRANCH_TO_THUMB; | |
4235 | ||
34e77a92 RS |
4236 | /* For TLS call relocs, it is the caller's responsibility to provide |
4237 | the address of the appropriate trampoline. */ | |
4238 | if (r_type != R_ARM_TLS_CALL | |
4239 | && r_type != R_ARM_THM_TLS_CALL | |
4ba2ef8f TP |
4240 | && elf32_arm_get_plt_info (input_bfd, globals, hash, |
4241 | ELF32_R_SYM (rel->r_info), &root_plt, | |
4242 | &arm_plt) | |
34e77a92 | 4243 | && root_plt->offset != (bfd_vma) -1) |
5fa9e92f | 4244 | { |
34e77a92 | 4245 | asection *splt; |
fe33d2fa | 4246 | |
34e77a92 RS |
4247 | if (hash == NULL || hash->is_iplt) |
4248 | splt = globals->root.iplt; | |
4249 | else | |
4250 | splt = globals->root.splt; | |
4251 | if (splt != NULL) | |
b38cadfb | 4252 | { |
34e77a92 RS |
4253 | use_plt = 1; |
4254 | ||
4255 | /* Note when dealing with PLT entries: the main PLT stub is in | |
4256 | ARM mode, so if the branch is in Thumb mode, another | |
4257 | Thumb->ARM stub will be inserted later just before the ARM | |
2df2751d CL |
4258 | PLT stub. If a long branch stub is needed, we'll add a |
4259 | Thumb->Arm one and branch directly to the ARM PLT entry. | |
4260 | Here, we have to check if a pre-PLT Thumb->ARM stub | |
4261 | is needed and if it will be close enough. */ | |
34e77a92 RS |
4262 | |
4263 | destination = (splt->output_section->vma | |
4264 | + splt->output_offset | |
4265 | + root_plt->offset); | |
4266 | st_type = STT_FUNC; | |
2df2751d CL |
4267 | |
4268 | /* Thumb branch/call to PLT: it can become a branch to ARM | |
4269 | or to Thumb. We must perform the same checks and | |
4270 | corrections as in elf32_arm_final_link_relocate. */ | |
4271 | if ((r_type == R_ARM_THM_CALL) | |
4272 | || (r_type == R_ARM_THM_JUMP24)) | |
4273 | { | |
4274 | if (globals->use_blx | |
4275 | && r_type == R_ARM_THM_CALL | |
4276 | && !thumb_only) | |
4277 | { | |
4278 | /* If the Thumb BLX instruction is available, convert | |
4279 | the BL to a BLX instruction to call the ARM-mode | |
4280 | PLT entry. */ | |
4281 | branch_type = ST_BRANCH_TO_ARM; | |
4282 | } | |
4283 | else | |
4284 | { | |
4285 | if (!thumb_only) | |
4286 | /* Target the Thumb stub before the ARM PLT entry. */ | |
4287 | destination -= PLT_THUMB_STUB_SIZE; | |
4288 | branch_type = ST_BRANCH_TO_THUMB; | |
4289 | } | |
4290 | } | |
4291 | else | |
4292 | { | |
4293 | branch_type = ST_BRANCH_TO_ARM; | |
4294 | } | |
34e77a92 | 4295 | } |
5fa9e92f | 4296 | } |
34e77a92 RS |
4297 | /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */ |
4298 | BFD_ASSERT (st_type != STT_GNU_IFUNC); | |
906e58ca | 4299 | |
fe33d2fa CL |
4300 | branch_offset = (bfd_signed_vma)(destination - location); |
4301 | ||
0855e32b | 4302 | if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24 |
c5423981 | 4303 | || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19) |
906e58ca | 4304 | { |
5fa9e92f CL |
4305 | /* Handle cases where: |
4306 | - this call goes too far (different Thumb/Thumb2 max | |
99059e56 | 4307 | distance) |
155d87d7 | 4308 | - it's a Thumb->Arm call and blx is not available, or it's a |
99059e56 RM |
4309 | Thumb->Arm branch (not bl). A stub is needed in this case, |
4310 | but only if this call is not through a PLT entry. Indeed, | |
695344c0 | 4311 | PLT stubs handle mode switching already. */ |
5e866f5a | 4312 | if ((!thumb2_bl |
906e58ca NC |
4313 | && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET |
4314 | || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET))) | |
5e866f5a | 4315 | || (thumb2_bl |
906e58ca NC |
4316 | && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET |
4317 | || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET))) | |
c5423981 TG |
4318 | || (thumb2 |
4319 | && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET | |
4320 | || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET)) | |
4321 | && (r_type == R_ARM_THM_JUMP19)) | |
35fc36a8 | 4322 | || (branch_type == ST_BRANCH_TO_ARM |
0855e32b NS |
4323 | && (((r_type == R_ARM_THM_CALL |
4324 | || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx) | |
c5423981 | 4325 | || (r_type == R_ARM_THM_JUMP24) |
07d6d2b8 | 4326 | || (r_type == R_ARM_THM_JUMP19)) |
5fa9e92f | 4327 | && !use_plt)) |
906e58ca | 4328 | { |
2df2751d CL |
4329 | /* If we need to insert a Thumb-Thumb long branch stub to a |
4330 | PLT, use one that branches directly to the ARM PLT | |
4331 | stub. If we pretended we'd use the pre-PLT Thumb->ARM | |
4332 | stub, undo this now. */ | |
695344c0 NC |
4333 | if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only) |
4334 | { | |
4335 | branch_type = ST_BRANCH_TO_ARM; | |
4336 | branch_offset += PLT_THUMB_STUB_SIZE; | |
4337 | } | |
2df2751d | 4338 | |
35fc36a8 | 4339 | if (branch_type == ST_BRANCH_TO_THUMB) |
906e58ca NC |
4340 | { |
4341 | /* Thumb to thumb. */ | |
4342 | if (!thumb_only) | |
4343 | { | |
d5a67c02 | 4344 | if (input_sec->flags & SEC_ELF_PURECODE) |
10463f39 | 4345 | _bfd_error_handler |
871b3ab2 | 4346 | (_("%pB(%pA): warning: long branch veneers used in" |
10463f39 AM |
4347 | " section with SHF_ARM_PURECODE section" |
4348 | " attribute is only supported for M-profile" | |
90b6238f | 4349 | " targets that implement the movw instruction"), |
10463f39 | 4350 | input_bfd, input_sec); |
d5a67c02 | 4351 | |
0e1862bb | 4352 | stub_type = (bfd_link_pic (info) | globals->pic_veneer) |
c2b4a39d | 4353 | /* PIC stubs. */ |
155d87d7 | 4354 | ? ((globals->use_blx |
9553db3c | 4355 | && (r_type == R_ARM_THM_CALL)) |
155d87d7 CL |
4356 | /* V5T and above. Stub starts with ARM code, so |
4357 | we must be able to switch mode before | |
4358 | reaching it, which is only possible for 'bl' | |
4359 | (ie R_ARM_THM_CALL relocation). */ | |
cf3eccff | 4360 | ? arm_stub_long_branch_any_thumb_pic |
ebe24dd4 | 4361 | /* On V4T, use Thumb code only. */ |
d3626fb0 | 4362 | : arm_stub_long_branch_v4t_thumb_thumb_pic) |
c2b4a39d CL |
4363 | |
4364 | /* non-PIC stubs. */ | |
155d87d7 | 4365 | : ((globals->use_blx |
9553db3c | 4366 | && (r_type == R_ARM_THM_CALL)) |
c2b4a39d CL |
4367 | /* V5T and above. */ |
4368 | ? arm_stub_long_branch_any_any | |
4369 | /* V4T. */ | |
d3626fb0 | 4370 | : arm_stub_long_branch_v4t_thumb_thumb); |
906e58ca NC |
4371 | } |
4372 | else | |
4373 | { | |
d5a67c02 AV |
4374 | if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE)) |
4375 | stub_type = arm_stub_long_branch_thumb2_only_pure; | |
4376 | else | |
4377 | { | |
4378 | if (input_sec->flags & SEC_ELF_PURECODE) | |
10463f39 | 4379 | _bfd_error_handler |
871b3ab2 | 4380 | (_("%pB(%pA): warning: long branch veneers used in" |
10463f39 AM |
4381 | " section with SHF_ARM_PURECODE section" |
4382 | " attribute is only supported for M-profile" | |
90b6238f | 4383 | " targets that implement the movw instruction"), |
10463f39 | 4384 | input_bfd, input_sec); |
d5a67c02 AV |
4385 | |
4386 | stub_type = (bfd_link_pic (info) | globals->pic_veneer) | |
4387 | /* PIC stub. */ | |
4388 | ? arm_stub_long_branch_thumb_only_pic | |
4389 | /* non-PIC stub. */ | |
4390 | : (thumb2 ? arm_stub_long_branch_thumb2_only | |
4391 | : arm_stub_long_branch_thumb_only); | |
4392 | } | |
906e58ca NC |
4393 | } |
4394 | } | |
4395 | else | |
4396 | { | |
d5a67c02 | 4397 | if (input_sec->flags & SEC_ELF_PURECODE) |
10463f39 | 4398 | _bfd_error_handler |
871b3ab2 | 4399 | (_("%pB(%pA): warning: long branch veneers used in" |
10463f39 AM |
4400 | " section with SHF_ARM_PURECODE section" |
4401 | " attribute is only supported" " for M-profile" | |
90b6238f | 4402 | " targets that implement the movw instruction"), |
10463f39 | 4403 | input_bfd, input_sec); |
d5a67c02 | 4404 | |
906e58ca | 4405 | /* Thumb to arm. */ |
c820be07 NC |
4406 | if (sym_sec != NULL |
4407 | && sym_sec->owner != NULL | |
4408 | && !INTERWORK_FLAG (sym_sec->owner)) | |
4409 | { | |
4eca0228 | 4410 | _bfd_error_handler |
90b6238f AM |
4411 | (_("%pB(%s): warning: interworking not enabled;" |
4412 | " first occurrence: %pB: %s call to %s"), | |
4413 | sym_sec->owner, name, input_bfd, "Thumb", "ARM"); | |
c820be07 NC |
4414 | } |
4415 | ||
0855e32b | 4416 | stub_type = |
0e1862bb | 4417 | (bfd_link_pic (info) | globals->pic_veneer) |
c2b4a39d | 4418 | /* PIC stubs. */ |
0855e32b | 4419 | ? (r_type == R_ARM_THM_TLS_CALL |
6a631e86 | 4420 | /* TLS PIC stubs. */ |
0855e32b NS |
4421 | ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic |
4422 | : arm_stub_long_branch_v4t_thumb_tls_pic) | |
4423 | : ((globals->use_blx && r_type == R_ARM_THM_CALL) | |
4424 | /* V5T PIC and above. */ | |
4425 | ? arm_stub_long_branch_any_arm_pic | |
4426 | /* V4T PIC stub. */ | |
4427 | : arm_stub_long_branch_v4t_thumb_arm_pic)) | |
c2b4a39d CL |
4428 | |
4429 | /* non-PIC stubs. */ | |
0855e32b | 4430 | : ((globals->use_blx && r_type == R_ARM_THM_CALL) |
c2b4a39d CL |
4431 | /* V5T and above. */ |
4432 | ? arm_stub_long_branch_any_any | |
4433 | /* V4T. */ | |
4434 | : arm_stub_long_branch_v4t_thumb_arm); | |
c820be07 NC |
4435 | |
4436 | /* Handle v4t short branches. */ | |
fea2b4d6 | 4437 | if ((stub_type == arm_stub_long_branch_v4t_thumb_arm) |
c820be07 NC |
4438 | && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET) |
4439 | && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET)) | |
fea2b4d6 | 4440 | stub_type = arm_stub_short_branch_v4t_thumb_arm; |
906e58ca NC |
4441 | } |
4442 | } | |
4443 | } | |
fe33d2fa CL |
4444 | else if (r_type == R_ARM_CALL |
4445 | || r_type == R_ARM_JUMP24 | |
0855e32b NS |
4446 | || r_type == R_ARM_PLT32 |
4447 | || r_type == R_ARM_TLS_CALL) | |
906e58ca | 4448 | { |
d5a67c02 | 4449 | if (input_sec->flags & SEC_ELF_PURECODE) |
10463f39 | 4450 | _bfd_error_handler |
871b3ab2 | 4451 | (_("%pB(%pA): warning: long branch veneers used in" |
10463f39 AM |
4452 | " section with SHF_ARM_PURECODE section" |
4453 | " attribute is only supported for M-profile" | |
90b6238f | 4454 | " targets that implement the movw instruction"), |
10463f39 | 4455 | input_bfd, input_sec); |
35fc36a8 | 4456 | if (branch_type == ST_BRANCH_TO_THUMB) |
906e58ca NC |
4457 | { |
4458 | /* Arm to thumb. */ | |
c820be07 NC |
4459 | |
4460 | if (sym_sec != NULL | |
4461 | && sym_sec->owner != NULL | |
4462 | && !INTERWORK_FLAG (sym_sec->owner)) | |
4463 | { | |
4eca0228 | 4464 | _bfd_error_handler |
90b6238f AM |
4465 | (_("%pB(%s): warning: interworking not enabled;" |
4466 | " first occurrence: %pB: %s call to %s"), | |
4467 | sym_sec->owner, name, input_bfd, "ARM", "Thumb"); | |
c820be07 NC |
4468 | } |
4469 | ||
4470 | /* We have an extra 2-bytes reach because of | |
4471 | the mode change (bit 24 (H) of BLX encoding). */ | |
4116d8d7 PB |
4472 | if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2) |
4473 | || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET) | |
0855e32b | 4474 | || (r_type == R_ARM_CALL && !globals->use_blx) |
4116d8d7 PB |
4475 | || (r_type == R_ARM_JUMP24) |
4476 | || (r_type == R_ARM_PLT32)) | |
906e58ca | 4477 | { |
0e1862bb | 4478 | stub_type = (bfd_link_pic (info) | globals->pic_veneer) |
c2b4a39d | 4479 | /* PIC stubs. */ |
ebe24dd4 CL |
4480 | ? ((globals->use_blx) |
4481 | /* V5T and above. */ | |
4482 | ? arm_stub_long_branch_any_thumb_pic | |
4483 | /* V4T stub. */ | |
4484 | : arm_stub_long_branch_v4t_arm_thumb_pic) | |
4485 | ||
c2b4a39d CL |
4486 | /* non-PIC stubs. */ |
4487 | : ((globals->use_blx) | |
4488 | /* V5T and above. */ | |
4489 | ? arm_stub_long_branch_any_any | |
4490 | /* V4T. */ | |
4491 | : arm_stub_long_branch_v4t_arm_thumb); | |
906e58ca NC |
4492 | } |
4493 | } | |
4494 | else | |
4495 | { | |
4496 | /* Arm to arm. */ | |
4497 | if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET | |
4498 | || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)) | |
4499 | { | |
0855e32b | 4500 | stub_type = |
0e1862bb | 4501 | (bfd_link_pic (info) | globals->pic_veneer) |
c2b4a39d | 4502 | /* PIC stubs. */ |
0855e32b | 4503 | ? (r_type == R_ARM_TLS_CALL |
6a631e86 | 4504 | /* TLS PIC Stub. */ |
0855e32b | 4505 | ? arm_stub_long_branch_any_tls_pic |
90c14f0c | 4506 | : (globals->root.target_os == is_nacl |
7a89b94e NC |
4507 | ? arm_stub_long_branch_arm_nacl_pic |
4508 | : arm_stub_long_branch_any_arm_pic)) | |
c2b4a39d | 4509 | /* non-PIC stubs. */ |
90c14f0c | 4510 | : (globals->root.target_os == is_nacl |
7a89b94e NC |
4511 | ? arm_stub_long_branch_arm_nacl |
4512 | : arm_stub_long_branch_any_any); | |
906e58ca NC |
4513 | } |
4514 | } | |
4515 | } | |
4516 | ||
fe33d2fa CL |
4517 | /* If a stub is needed, record the actual destination type. */ |
4518 | if (stub_type != arm_stub_none) | |
35fc36a8 | 4519 | *actual_branch_type = branch_type; |
fe33d2fa | 4520 | |
906e58ca NC |
4521 | return stub_type; |
4522 | } | |
4523 | ||
4524 | /* Build a name for an entry in the stub hash table. */ | |
4525 | ||
4526 | static char * | |
4527 | elf32_arm_stub_name (const asection *input_section, | |
4528 | const asection *sym_sec, | |
4529 | const struct elf32_arm_link_hash_entry *hash, | |
fe33d2fa CL |
4530 | const Elf_Internal_Rela *rel, |
4531 | enum elf32_arm_stub_type stub_type) | |
906e58ca NC |
4532 | { |
4533 | char *stub_name; | |
4534 | bfd_size_type len; | |
4535 | ||
4536 | if (hash) | |
4537 | { | |
fe33d2fa | 4538 | len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1; |
21d799b5 | 4539 | stub_name = (char *) bfd_malloc (len); |
906e58ca | 4540 | if (stub_name != NULL) |
fe33d2fa | 4541 | sprintf (stub_name, "%08x_%s+%x_%d", |
906e58ca NC |
4542 | input_section->id & 0xffffffff, |
4543 | hash->root.root.root.string, | |
fe33d2fa CL |
4544 | (int) rel->r_addend & 0xffffffff, |
4545 | (int) stub_type); | |
906e58ca NC |
4546 | } |
4547 | else | |
4548 | { | |
fe33d2fa | 4549 | len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1; |
21d799b5 | 4550 | stub_name = (char *) bfd_malloc (len); |
906e58ca | 4551 | if (stub_name != NULL) |
fe33d2fa | 4552 | sprintf (stub_name, "%08x_%x:%x+%x_%d", |
906e58ca NC |
4553 | input_section->id & 0xffffffff, |
4554 | sym_sec->id & 0xffffffff, | |
0855e32b NS |
4555 | ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL |
4556 | || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL | |
4557 | ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff, | |
fe33d2fa CL |
4558 | (int) rel->r_addend & 0xffffffff, |
4559 | (int) stub_type); | |
906e58ca NC |
4560 | } |
4561 | ||
4562 | return stub_name; | |
4563 | } | |
4564 | ||
4565 | /* Look up an entry in the stub hash. Stub entries are cached because | |
4566 | creating the stub name takes a bit of time. */ | |
4567 | ||
4568 | static struct elf32_arm_stub_hash_entry * | |
4569 | elf32_arm_get_stub_entry (const asection *input_section, | |
4570 | const asection *sym_sec, | |
4571 | struct elf_link_hash_entry *hash, | |
4572 | const Elf_Internal_Rela *rel, | |
fe33d2fa CL |
4573 | struct elf32_arm_link_hash_table *htab, |
4574 | enum elf32_arm_stub_type stub_type) | |
906e58ca NC |
4575 | { |
4576 | struct elf32_arm_stub_hash_entry *stub_entry; | |
4577 | struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash; | |
4578 | const asection *id_sec; | |
4579 | ||
4580 | if ((input_section->flags & SEC_CODE) == 0) | |
4581 | return NULL; | |
4582 | ||
4d83e8d9 CL |
4583 | /* If the input section is the CMSE stubs one and it needs a long |
4584 | branch stub to reach it's final destination, give up with an | |
4585 | error message: this is not supported. See PR ld/24709. */ | |
cc850f74 | 4586 | if (!strncmp (input_section->name, CMSE_STUB_NAME, strlen (CMSE_STUB_NAME))) |
4d83e8d9 CL |
4587 | { |
4588 | bfd *output_bfd = htab->obfd; | |
4589 | asection *out_sec = bfd_get_section_by_name (output_bfd, CMSE_STUB_NAME); | |
4590 | ||
4591 | _bfd_error_handler (_("ERROR: CMSE stub (%s section) too far " | |
4592 | "(%#" PRIx64 ") from destination (%#" PRIx64 ")"), | |
4593 | CMSE_STUB_NAME, | |
4594 | (uint64_t)out_sec->output_section->vma | |
4595 | + out_sec->output_offset, | |
4596 | (uint64_t)sym_sec->output_section->vma | |
4597 | + sym_sec->output_offset | |
4598 | + h->root.root.u.def.value); | |
4599 | /* Exit, rather than leave incompletely processed | |
4600 | relocations. */ | |
cc850f74 | 4601 | xexit (1); |
4d83e8d9 CL |
4602 | } |
4603 | ||
906e58ca NC |
4604 | /* If this input section is part of a group of sections sharing one |
4605 | stub section, then use the id of the first section in the group. | |
4606 | Stub names need to include a section id, as there may well be | |
4607 | more than one stub used to reach say, printf, and we need to | |
4608 | distinguish between them. */ | |
c2abbbeb | 4609 | BFD_ASSERT (input_section->id <= htab->top_id); |
906e58ca NC |
4610 | id_sec = htab->stub_group[input_section->id].link_sec; |
4611 | ||
4612 | if (h != NULL && h->stub_cache != NULL | |
4613 | && h->stub_cache->h == h | |
fe33d2fa CL |
4614 | && h->stub_cache->id_sec == id_sec |
4615 | && h->stub_cache->stub_type == stub_type) | |
906e58ca NC |
4616 | { |
4617 | stub_entry = h->stub_cache; | |
4618 | } | |
4619 | else | |
4620 | { | |
4621 | char *stub_name; | |
4622 | ||
fe33d2fa | 4623 | stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type); |
906e58ca NC |
4624 | if (stub_name == NULL) |
4625 | return NULL; | |
4626 | ||
4627 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, | |
0a1b45a2 | 4628 | stub_name, false, false); |
906e58ca NC |
4629 | if (h != NULL) |
4630 | h->stub_cache = stub_entry; | |
4631 | ||
4632 | free (stub_name); | |
4633 | } | |
4634 | ||
4635 | return stub_entry; | |
4636 | } | |
4637 | ||
daa4adae TP |
4638 | /* Whether veneers of type STUB_TYPE require to be in a dedicated output |
4639 | section. */ | |
4640 | ||
0a1b45a2 | 4641 | static bool |
daa4adae TP |
4642 | arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type) |
4643 | { | |
4644 | if (stub_type >= max_stub_type) | |
4645 | abort (); /* Should be unreachable. */ | |
4646 | ||
4ba2ef8f TP |
4647 | switch (stub_type) |
4648 | { | |
4649 | case arm_stub_cmse_branch_thumb_only: | |
0a1b45a2 | 4650 | return true; |
4ba2ef8f TP |
4651 | |
4652 | default: | |
0a1b45a2 | 4653 | return false; |
4ba2ef8f TP |
4654 | } |
4655 | ||
4656 | abort (); /* Should be unreachable. */ | |
daa4adae TP |
4657 | } |
4658 | ||
4659 | /* Required alignment (as a power of 2) for the dedicated section holding | |
4660 | veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed | |
4661 | with input sections. */ | |
4662 | ||
4663 | static int | |
4664 | arm_dedicated_stub_output_section_required_alignment | |
4665 | (enum elf32_arm_stub_type stub_type) | |
4666 | { | |
4667 | if (stub_type >= max_stub_type) | |
4668 | abort (); /* Should be unreachable. */ | |
4669 | ||
4ba2ef8f TP |
4670 | switch (stub_type) |
4671 | { | |
4672 | /* Vectors of Secure Gateway veneers must be aligned on 32byte | |
4673 | boundary. */ | |
4674 | case arm_stub_cmse_branch_thumb_only: | |
4675 | return 5; | |
4676 | ||
4677 | default: | |
4678 | BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type)); | |
4679 | return 0; | |
4680 | } | |
4681 | ||
4682 | abort (); /* Should be unreachable. */ | |
daa4adae TP |
4683 | } |
4684 | ||
4685 | /* Name of the dedicated output section to put veneers of type STUB_TYPE, or | |
4686 | NULL if veneers of this type are interspersed with input sections. */ | |
4687 | ||
4688 | static const char * | |
4689 | arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type) | |
4690 | { | |
4691 | if (stub_type >= max_stub_type) | |
4692 | abort (); /* Should be unreachable. */ | |
4693 | ||
4ba2ef8f TP |
4694 | switch (stub_type) |
4695 | { | |
4696 | case arm_stub_cmse_branch_thumb_only: | |
4d83e8d9 | 4697 | return CMSE_STUB_NAME; |
4ba2ef8f TP |
4698 | |
4699 | default: | |
4700 | BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type)); | |
4701 | return NULL; | |
4702 | } | |
4703 | ||
4704 | abort (); /* Should be unreachable. */ | |
daa4adae TP |
4705 | } |
4706 | ||
4707 | /* If veneers of type STUB_TYPE should go in a dedicated output section, | |
4708 | returns the address of the hash table field in HTAB holding a pointer to the | |
4709 | corresponding input section. Otherwise, returns NULL. */ | |
4710 | ||
4711 | static asection ** | |
4ba2ef8f TP |
4712 | arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab, |
4713 | enum elf32_arm_stub_type stub_type) | |
daa4adae TP |
4714 | { |
4715 | if (stub_type >= max_stub_type) | |
4716 | abort (); /* Should be unreachable. */ | |
4717 | ||
4ba2ef8f TP |
4718 | switch (stub_type) |
4719 | { | |
4720 | case arm_stub_cmse_branch_thumb_only: | |
4721 | return &htab->cmse_stub_sec; | |
4722 | ||
4723 | default: | |
4724 | BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type)); | |
4725 | return NULL; | |
4726 | } | |
4727 | ||
4728 | abort (); /* Should be unreachable. */ | |
daa4adae TP |
4729 | } |
4730 | ||
4731 | /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION | |
4732 | is the section that branch into veneer and can be NULL if stub should go in | |
4733 | a dedicated output section. Returns a pointer to the stub section, and the | |
4734 | section to which the stub section will be attached (in *LINK_SEC_P). | |
48229727 | 4735 | LINK_SEC_P may be NULL. */ |
906e58ca | 4736 | |
48229727 JB |
4737 | static asection * |
4738 | elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section, | |
daa4adae TP |
4739 | struct elf32_arm_link_hash_table *htab, |
4740 | enum elf32_arm_stub_type stub_type) | |
906e58ca | 4741 | { |
daa4adae TP |
4742 | asection *link_sec, *out_sec, **stub_sec_p; |
4743 | const char *stub_sec_prefix; | |
0a1b45a2 | 4744 | bool dedicated_output_section = |
daa4adae TP |
4745 | arm_dedicated_stub_output_section_required (stub_type); |
4746 | int align; | |
906e58ca | 4747 | |
daa4adae | 4748 | if (dedicated_output_section) |
906e58ca | 4749 | { |
daa4adae TP |
4750 | bfd *output_bfd = htab->obfd; |
4751 | const char *out_sec_name = | |
4752 | arm_dedicated_stub_output_section_name (stub_type); | |
4753 | link_sec = NULL; | |
4754 | stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type); | |
4755 | stub_sec_prefix = out_sec_name; | |
4756 | align = arm_dedicated_stub_output_section_required_alignment (stub_type); | |
4757 | out_sec = bfd_get_section_by_name (output_bfd, out_sec_name); | |
4758 | if (out_sec == NULL) | |
906e58ca | 4759 | { |
90b6238f | 4760 | _bfd_error_handler (_("no address assigned to the veneers output " |
4eca0228 | 4761 | "section %s"), out_sec_name); |
daa4adae | 4762 | return NULL; |
906e58ca | 4763 | } |
daa4adae TP |
4764 | } |
4765 | else | |
4766 | { | |
c2abbbeb | 4767 | BFD_ASSERT (section->id <= htab->top_id); |
daa4adae TP |
4768 | link_sec = htab->stub_group[section->id].link_sec; |
4769 | BFD_ASSERT (link_sec != NULL); | |
4770 | stub_sec_p = &htab->stub_group[section->id].stub_sec; | |
4771 | if (*stub_sec_p == NULL) | |
4772 | stub_sec_p = &htab->stub_group[link_sec->id].stub_sec; | |
4773 | stub_sec_prefix = link_sec->name; | |
4774 | out_sec = link_sec->output_section; | |
90c14f0c | 4775 | align = htab->root.target_os == is_nacl ? 4 : 3; |
906e58ca | 4776 | } |
b38cadfb | 4777 | |
daa4adae TP |
4778 | if (*stub_sec_p == NULL) |
4779 | { | |
4780 | size_t namelen; | |
4781 | bfd_size_type len; | |
4782 | char *s_name; | |
4783 | ||
4784 | namelen = strlen (stub_sec_prefix); | |
4785 | len = namelen + sizeof (STUB_SUFFIX); | |
4786 | s_name = (char *) bfd_alloc (htab->stub_bfd, len); | |
4787 | if (s_name == NULL) | |
4788 | return NULL; | |
4789 | ||
4790 | memcpy (s_name, stub_sec_prefix, namelen); | |
4791 | memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX)); | |
4792 | *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec, | |
4793 | align); | |
4794 | if (*stub_sec_p == NULL) | |
4795 | return NULL; | |
4796 | ||
4797 | out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE | |
4798 | | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY | |
4799 | | SEC_KEEP; | |
4800 | } | |
4801 | ||
4802 | if (!dedicated_output_section) | |
4803 | htab->stub_group[section->id].stub_sec = *stub_sec_p; | |
4804 | ||
48229727 JB |
4805 | if (link_sec_p) |
4806 | *link_sec_p = link_sec; | |
b38cadfb | 4807 | |
daa4adae | 4808 | return *stub_sec_p; |
48229727 JB |
4809 | } |
4810 | ||
4811 | /* Add a new stub entry to the stub hash. Not all fields of the new | |
4812 | stub entry are initialised. */ | |
4813 | ||
4814 | static struct elf32_arm_stub_hash_entry * | |
daa4adae TP |
4815 | elf32_arm_add_stub (const char *stub_name, asection *section, |
4816 | struct elf32_arm_link_hash_table *htab, | |
4817 | enum elf32_arm_stub_type stub_type) | |
48229727 JB |
4818 | { |
4819 | asection *link_sec; | |
4820 | asection *stub_sec; | |
4821 | struct elf32_arm_stub_hash_entry *stub_entry; | |
4822 | ||
daa4adae TP |
4823 | stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab, |
4824 | stub_type); | |
48229727 JB |
4825 | if (stub_sec == NULL) |
4826 | return NULL; | |
906e58ca NC |
4827 | |
4828 | /* Enter this entry into the linker stub hash table. */ | |
4829 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, | |
0a1b45a2 | 4830 | true, false); |
906e58ca NC |
4831 | if (stub_entry == NULL) |
4832 | { | |
6bde4c52 TP |
4833 | if (section == NULL) |
4834 | section = stub_sec; | |
871b3ab2 | 4835 | _bfd_error_handler (_("%pB: cannot create stub entry %s"), |
4eca0228 | 4836 | section->owner, stub_name); |
906e58ca NC |
4837 | return NULL; |
4838 | } | |
4839 | ||
4840 | stub_entry->stub_sec = stub_sec; | |
0955507f | 4841 | stub_entry->stub_offset = (bfd_vma) -1; |
906e58ca NC |
4842 | stub_entry->id_sec = link_sec; |
4843 | ||
906e58ca NC |
4844 | return stub_entry; |
4845 | } | |
4846 | ||
4847 | /* Store an Arm insn into an output section not processed by | |
4848 | elf32_arm_write_section. */ | |
4849 | ||
4850 | static void | |
8029a119 NC |
4851 | put_arm_insn (struct elf32_arm_link_hash_table * htab, |
4852 | bfd * output_bfd, bfd_vma val, void * ptr) | |
906e58ca NC |
4853 | { |
4854 | if (htab->byteswap_code != bfd_little_endian (output_bfd)) | |
4855 | bfd_putl32 (val, ptr); | |
4856 | else | |
4857 | bfd_putb32 (val, ptr); | |
4858 | } | |
4859 | ||
4860 | /* Store a 16-bit Thumb insn into an output section not processed by | |
4861 | elf32_arm_write_section. */ | |
4862 | ||
4863 | static void | |
8029a119 NC |
4864 | put_thumb_insn (struct elf32_arm_link_hash_table * htab, |
4865 | bfd * output_bfd, bfd_vma val, void * ptr) | |
906e58ca NC |
4866 | { |
4867 | if (htab->byteswap_code != bfd_little_endian (output_bfd)) | |
4868 | bfd_putl16 (val, ptr); | |
4869 | else | |
4870 | bfd_putb16 (val, ptr); | |
4871 | } | |
4872 | ||
a504d23a LA |
4873 | /* Store a Thumb2 insn into an output section not processed by |
4874 | elf32_arm_write_section. */ | |
4875 | ||
4876 | static void | |
4877 | put_thumb2_insn (struct elf32_arm_link_hash_table * htab, | |
b98e6871 | 4878 | bfd * output_bfd, bfd_vma val, bfd_byte * ptr) |
a504d23a LA |
4879 | { |
4880 | /* T2 instructions are 16-bit streamed. */ | |
4881 | if (htab->byteswap_code != bfd_little_endian (output_bfd)) | |
4882 | { | |
4883 | bfd_putl16 ((val >> 16) & 0xffff, ptr); | |
4884 | bfd_putl16 ((val & 0xffff), ptr + 2); | |
4885 | } | |
4886 | else | |
4887 | { | |
4888 | bfd_putb16 ((val >> 16) & 0xffff, ptr); | |
4889 | bfd_putb16 ((val & 0xffff), ptr + 2); | |
4890 | } | |
4891 | } | |
4892 | ||
0855e32b NS |
4893 | /* If it's possible to change R_TYPE to a more efficient access |
4894 | model, return the new reloc type. */ | |
4895 | ||
4896 | static unsigned | |
b38cadfb | 4897 | elf32_arm_tls_transition (struct bfd_link_info *info, int r_type, |
0855e32b NS |
4898 | struct elf_link_hash_entry *h) |
4899 | { | |
4900 | int is_local = (h == NULL); | |
4901 | ||
9cb09e33 | 4902 | if (bfd_link_dll (info) |
0e1862bb | 4903 | || (h && h->root.type == bfd_link_hash_undefweak)) |
0855e32b NS |
4904 | return r_type; |
4905 | ||
b38cadfb | 4906 | /* We do not support relaxations for Old TLS models. */ |
0855e32b NS |
4907 | switch (r_type) |
4908 | { | |
4909 | case R_ARM_TLS_GOTDESC: | |
4910 | case R_ARM_TLS_CALL: | |
4911 | case R_ARM_THM_TLS_CALL: | |
4912 | case R_ARM_TLS_DESCSEQ: | |
4913 | case R_ARM_THM_TLS_DESCSEQ: | |
4914 | return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32; | |
4915 | } | |
4916 | ||
4917 | return r_type; | |
4918 | } | |
4919 | ||
48229727 JB |
4920 | static bfd_reloc_status_type elf32_arm_final_link_relocate |
4921 | (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *, | |
4922 | Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *, | |
34e77a92 | 4923 | const char *, unsigned char, enum arm_st_branch_type, |
0a1b45a2 | 4924 | struct elf_link_hash_entry *, bool *, char **); |
48229727 | 4925 | |
4563a860 JB |
4926 | static unsigned int |
4927 | arm_stub_required_alignment (enum elf32_arm_stub_type stub_type) | |
4928 | { | |
4929 | switch (stub_type) | |
4930 | { | |
4931 | case arm_stub_a8_veneer_b_cond: | |
4932 | case arm_stub_a8_veneer_b: | |
4933 | case arm_stub_a8_veneer_bl: | |
4934 | return 2; | |
4935 | ||
4936 | case arm_stub_long_branch_any_any: | |
4937 | case arm_stub_long_branch_v4t_arm_thumb: | |
4938 | case arm_stub_long_branch_thumb_only: | |
80c135e5 | 4939 | case arm_stub_long_branch_thumb2_only: |
d5a67c02 | 4940 | case arm_stub_long_branch_thumb2_only_pure: |
4563a860 JB |
4941 | case arm_stub_long_branch_v4t_thumb_thumb: |
4942 | case arm_stub_long_branch_v4t_thumb_arm: | |
4943 | case arm_stub_short_branch_v4t_thumb_arm: | |
4944 | case arm_stub_long_branch_any_arm_pic: | |
4945 | case arm_stub_long_branch_any_thumb_pic: | |
4946 | case arm_stub_long_branch_v4t_thumb_thumb_pic: | |
4947 | case arm_stub_long_branch_v4t_arm_thumb_pic: | |
4948 | case arm_stub_long_branch_v4t_thumb_arm_pic: | |
4949 | case arm_stub_long_branch_thumb_only_pic: | |
0855e32b NS |
4950 | case arm_stub_long_branch_any_tls_pic: |
4951 | case arm_stub_long_branch_v4t_thumb_tls_pic: | |
4ba2ef8f | 4952 | case arm_stub_cmse_branch_thumb_only: |
4563a860 JB |
4953 | case arm_stub_a8_veneer_blx: |
4954 | return 4; | |
b38cadfb | 4955 | |
7a89b94e NC |
4956 | case arm_stub_long_branch_arm_nacl: |
4957 | case arm_stub_long_branch_arm_nacl_pic: | |
4958 | return 16; | |
4959 | ||
4563a860 JB |
4960 | default: |
4961 | abort (); /* Should be unreachable. */ | |
4962 | } | |
4963 | } | |
4964 | ||
4f4faa4d TP |
4965 | /* Returns whether stubs of type STUB_TYPE take over the symbol they are |
4966 | veneering (TRUE) or have their own symbol (FALSE). */ | |
4967 | ||
0a1b45a2 | 4968 | static bool |
4f4faa4d TP |
4969 | arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type) |
4970 | { | |
4971 | if (stub_type >= max_stub_type) | |
4972 | abort (); /* Should be unreachable. */ | |
4973 | ||
4ba2ef8f TP |
4974 | switch (stub_type) |
4975 | { | |
4976 | case arm_stub_cmse_branch_thumb_only: | |
0a1b45a2 | 4977 | return true; |
4ba2ef8f TP |
4978 | |
4979 | default: | |
0a1b45a2 | 4980 | return false; |
4ba2ef8f TP |
4981 | } |
4982 | ||
4983 | abort (); /* Should be unreachable. */ | |
4f4faa4d TP |
4984 | } |
4985 | ||
d7c5bd02 TP |
4986 | /* Returns the padding needed for the dedicated section used stubs of type |
4987 | STUB_TYPE. */ | |
4988 | ||
4989 | static int | |
4990 | arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type) | |
4991 | { | |
4992 | if (stub_type >= max_stub_type) | |
4993 | abort (); /* Should be unreachable. */ | |
4994 | ||
4ba2ef8f TP |
4995 | switch (stub_type) |
4996 | { | |
4997 | case arm_stub_cmse_branch_thumb_only: | |
4998 | return 32; | |
4999 | ||
5000 | default: | |
5001 | return 0; | |
5002 | } | |
5003 | ||
5004 | abort (); /* Should be unreachable. */ | |
d7c5bd02 TP |
5005 | } |
5006 | ||
0955507f TP |
5007 | /* If veneers of type STUB_TYPE should go in a dedicated output section, |
5008 | returns the address of the hash table field in HTAB holding the offset at | |
5009 | which new veneers should be layed out in the stub section. */ | |
5010 | ||
5011 | static bfd_vma* | |
5012 | arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab, | |
5013 | enum elf32_arm_stub_type stub_type) | |
5014 | { | |
5015 | switch (stub_type) | |
5016 | { | |
5017 | case arm_stub_cmse_branch_thumb_only: | |
5018 | return &htab->new_cmse_stub_offset; | |
5019 | ||
5020 | default: | |
5021 | BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type)); | |
5022 | return NULL; | |
5023 | } | |
5024 | } | |
5025 | ||
0a1b45a2 | 5026 | static bool |
906e58ca NC |
5027 | arm_build_one_stub (struct bfd_hash_entry *gen_entry, |
5028 | void * in_arg) | |
5029 | { | |
7a89b94e | 5030 | #define MAXRELOCS 3 |
0a1b45a2 | 5031 | bool removed_sg_veneer; |
906e58ca | 5032 | struct elf32_arm_stub_hash_entry *stub_entry; |
4dfe6ac6 | 5033 | struct elf32_arm_link_hash_table *globals; |
906e58ca | 5034 | struct bfd_link_info *info; |
906e58ca NC |
5035 | asection *stub_sec; |
5036 | bfd *stub_bfd; | |
906e58ca NC |
5037 | bfd_byte *loc; |
5038 | bfd_vma sym_value; | |
5039 | int template_size; | |
5040 | int size; | |
d3ce72d0 | 5041 | const insn_sequence *template_sequence; |
906e58ca | 5042 | int i; |
48229727 JB |
5043 | int stub_reloc_idx[MAXRELOCS] = {-1, -1}; |
5044 | int stub_reloc_offset[MAXRELOCS] = {0, 0}; | |
5045 | int nrelocs = 0; | |
0955507f | 5046 | int just_allocated = 0; |
906e58ca NC |
5047 | |
5048 | /* Massage our args to the form they really have. */ | |
5049 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; | |
5050 | info = (struct bfd_link_info *) in_arg; | |
5051 | ||
abf874aa CL |
5052 | /* Fail if the target section could not be assigned to an output |
5053 | section. The user should fix his linker script. */ | |
5054 | if (stub_entry->target_section->output_section == NULL | |
5055 | && info->non_contiguous_regions) | |
c63d4862 | 5056 | info->callbacks->einfo (_("%F%P: Could not assign `%pA' to an output section. " |
53215f21 CL |
5057 | "Retry without --enable-non-contiguous-regions.\n"), |
5058 | stub_entry->target_section); | |
abf874aa | 5059 | |
906e58ca | 5060 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 | 5061 | if (globals == NULL) |
0a1b45a2 | 5062 | return false; |
906e58ca | 5063 | |
906e58ca NC |
5064 | stub_sec = stub_entry->stub_sec; |
5065 | ||
4dfe6ac6 | 5066 | if ((globals->fix_cortex_a8 < 0) |
4563a860 JB |
5067 | != (arm_stub_required_alignment (stub_entry->stub_type) == 2)) |
5068 | /* We have to do less-strictly-aligned fixes last. */ | |
0a1b45a2 | 5069 | return true; |
fe33d2fa | 5070 | |
0955507f TP |
5071 | /* Assign a slot at the end of section if none assigned yet. */ |
5072 | if (stub_entry->stub_offset == (bfd_vma) -1) | |
5073 | { | |
5074 | stub_entry->stub_offset = stub_sec->size; | |
5075 | just_allocated = 1; | |
5076 | } | |
906e58ca NC |
5077 | loc = stub_sec->contents + stub_entry->stub_offset; |
5078 | ||
5079 | stub_bfd = stub_sec->owner; | |
5080 | ||
906e58ca NC |
5081 | /* This is the address of the stub destination. */ |
5082 | sym_value = (stub_entry->target_value | |
5083 | + stub_entry->target_section->output_offset | |
5084 | + stub_entry->target_section->output_section->vma); | |
5085 | ||
d3ce72d0 | 5086 | template_sequence = stub_entry->stub_template; |
461a49ca | 5087 | template_size = stub_entry->stub_template_size; |
906e58ca NC |
5088 | |
5089 | size = 0; | |
461a49ca | 5090 | for (i = 0; i < template_size; i++) |
906e58ca | 5091 | { |
d3ce72d0 | 5092 | switch (template_sequence[i].type) |
461a49ca DJ |
5093 | { |
5094 | case THUMB16_TYPE: | |
48229727 | 5095 | { |
d3ce72d0 NC |
5096 | bfd_vma data = (bfd_vma) template_sequence[i].data; |
5097 | if (template_sequence[i].reloc_addend != 0) | |
48229727 | 5098 | { |
99059e56 RM |
5099 | /* We've borrowed the reloc_addend field to mean we should |
5100 | insert a condition code into this (Thumb-1 branch) | |
5101 | instruction. See THUMB16_BCOND_INSN. */ | |
5102 | BFD_ASSERT ((data & 0xff00) == 0xd000); | |
5103 | data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8; | |
48229727 | 5104 | } |
fe33d2fa | 5105 | bfd_put_16 (stub_bfd, data, loc + size); |
48229727 JB |
5106 | size += 2; |
5107 | } | |
461a49ca | 5108 | break; |
906e58ca | 5109 | |
48229727 | 5110 | case THUMB32_TYPE: |
fe33d2fa CL |
5111 | bfd_put_16 (stub_bfd, |
5112 | (template_sequence[i].data >> 16) & 0xffff, | |
5113 | loc + size); | |
5114 | bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff, | |
5115 | loc + size + 2); | |
99059e56 RM |
5116 | if (template_sequence[i].r_type != R_ARM_NONE) |
5117 | { | |
5118 | stub_reloc_idx[nrelocs] = i; | |
5119 | stub_reloc_offset[nrelocs++] = size; | |
5120 | } | |
5121 | size += 4; | |
5122 | break; | |
48229727 | 5123 | |
461a49ca | 5124 | case ARM_TYPE: |
fe33d2fa CL |
5125 | bfd_put_32 (stub_bfd, template_sequence[i].data, |
5126 | loc + size); | |
461a49ca DJ |
5127 | /* Handle cases where the target is encoded within the |
5128 | instruction. */ | |
d3ce72d0 | 5129 | if (template_sequence[i].r_type == R_ARM_JUMP24) |
461a49ca | 5130 | { |
48229727 JB |
5131 | stub_reloc_idx[nrelocs] = i; |
5132 | stub_reloc_offset[nrelocs++] = size; | |
461a49ca DJ |
5133 | } |
5134 | size += 4; | |
5135 | break; | |
5136 | ||
5137 | case DATA_TYPE: | |
d3ce72d0 | 5138 | bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size); |
48229727 JB |
5139 | stub_reloc_idx[nrelocs] = i; |
5140 | stub_reloc_offset[nrelocs++] = size; | |
461a49ca DJ |
5141 | size += 4; |
5142 | break; | |
5143 | ||
5144 | default: | |
5145 | BFD_FAIL (); | |
0a1b45a2 | 5146 | return false; |
461a49ca | 5147 | } |
906e58ca | 5148 | } |
461a49ca | 5149 | |
0955507f TP |
5150 | if (just_allocated) |
5151 | stub_sec->size += size; | |
906e58ca | 5152 | |
461a49ca DJ |
5153 | /* Stub size has already been computed in arm_size_one_stub. Check |
5154 | consistency. */ | |
5155 | BFD_ASSERT (size == stub_entry->stub_size); | |
5156 | ||
906e58ca | 5157 | /* Destination is Thumb. Force bit 0 to 1 to reflect this. */ |
35fc36a8 | 5158 | if (stub_entry->branch_type == ST_BRANCH_TO_THUMB) |
906e58ca NC |
5159 | sym_value |= 1; |
5160 | ||
0955507f TP |
5161 | /* Assume non empty slots have at least one and at most MAXRELOCS entries |
5162 | to relocate in each stub. */ | |
5163 | removed_sg_veneer = | |
5164 | (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only); | |
5165 | BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS)); | |
c820be07 | 5166 | |
48229727 | 5167 | for (i = 0; i < nrelocs; i++) |
8d9d9490 TP |
5168 | { |
5169 | Elf_Internal_Rela rel; | |
0a1b45a2 | 5170 | bool unresolved_reloc; |
8d9d9490 TP |
5171 | char *error_message; |
5172 | bfd_vma points_to = | |
5173 | sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend; | |
5174 | ||
5175 | rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i]; | |
5176 | rel.r_info = ELF32_R_INFO (0, | |
5177 | template_sequence[stub_reloc_idx[i]].r_type); | |
5178 | rel.r_addend = 0; | |
5179 | ||
5180 | if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0) | |
5181 | /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[] | |
5182 | template should refer back to the instruction after the original | |
5183 | branch. We use target_section as Cortex-A8 erratum workaround stubs | |
5184 | are only generated when both source and target are in the same | |
5185 | section. */ | |
5186 | points_to = stub_entry->target_section->output_section->vma | |
5187 | + stub_entry->target_section->output_offset | |
5188 | + stub_entry->source_value; | |
5189 | ||
5190 | elf32_arm_final_link_relocate (elf32_arm_howto_from_type | |
5191 | (template_sequence[stub_reloc_idx[i]].r_type), | |
5192 | stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel, | |
5193 | points_to, info, stub_entry->target_section, "", STT_FUNC, | |
5194 | stub_entry->branch_type, | |
5195 | (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc, | |
5196 | &error_message); | |
5197 | } | |
906e58ca | 5198 | |
0a1b45a2 | 5199 | return true; |
48229727 | 5200 | #undef MAXRELOCS |
906e58ca NC |
5201 | } |
5202 | ||
48229727 JB |
5203 | /* Calculate the template, template size and instruction size for a stub. |
5204 | Return value is the instruction size. */ | |
906e58ca | 5205 | |
48229727 JB |
5206 | static unsigned int |
5207 | find_stub_size_and_template (enum elf32_arm_stub_type stub_type, | |
5208 | const insn_sequence **stub_template, | |
5209 | int *stub_template_size) | |
906e58ca | 5210 | { |
d3ce72d0 | 5211 | const insn_sequence *template_sequence = NULL; |
48229727 JB |
5212 | int template_size = 0, i; |
5213 | unsigned int size; | |
906e58ca | 5214 | |
d3ce72d0 | 5215 | template_sequence = stub_definitions[stub_type].template_sequence; |
2a229407 AM |
5216 | if (stub_template) |
5217 | *stub_template = template_sequence; | |
5218 | ||
48229727 | 5219 | template_size = stub_definitions[stub_type].template_size; |
2a229407 AM |
5220 | if (stub_template_size) |
5221 | *stub_template_size = template_size; | |
906e58ca NC |
5222 | |
5223 | size = 0; | |
461a49ca DJ |
5224 | for (i = 0; i < template_size; i++) |
5225 | { | |
d3ce72d0 | 5226 | switch (template_sequence[i].type) |
461a49ca DJ |
5227 | { |
5228 | case THUMB16_TYPE: | |
5229 | size += 2; | |
5230 | break; | |
5231 | ||
5232 | case ARM_TYPE: | |
48229727 | 5233 | case THUMB32_TYPE: |
461a49ca DJ |
5234 | case DATA_TYPE: |
5235 | size += 4; | |
5236 | break; | |
5237 | ||
5238 | default: | |
5239 | BFD_FAIL (); | |
2a229407 | 5240 | return 0; |
461a49ca DJ |
5241 | } |
5242 | } | |
5243 | ||
48229727 JB |
5244 | return size; |
5245 | } | |
5246 | ||
5247 | /* As above, but don't actually build the stub. Just bump offset so | |
5248 | we know stub section sizes. */ | |
5249 | ||
0a1b45a2 | 5250 | static bool |
48229727 | 5251 | arm_size_one_stub (struct bfd_hash_entry *gen_entry, |
c7e2358a | 5252 | void *in_arg ATTRIBUTE_UNUSED) |
48229727 JB |
5253 | { |
5254 | struct elf32_arm_stub_hash_entry *stub_entry; | |
d3ce72d0 | 5255 | const insn_sequence *template_sequence; |
48229727 JB |
5256 | int template_size, size; |
5257 | ||
5258 | /* Massage our args to the form they really have. */ | |
5259 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; | |
48229727 | 5260 | |
cc850f74 NC |
5261 | BFD_ASSERT ((stub_entry->stub_type > arm_stub_none) |
5262 | && stub_entry->stub_type < ARRAY_SIZE (stub_definitions)); | |
48229727 | 5263 | |
d3ce72d0 | 5264 | size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence, |
48229727 JB |
5265 | &template_size); |
5266 | ||
0955507f TP |
5267 | /* Initialized to -1. Null size indicates an empty slot full of zeros. */ |
5268 | if (stub_entry->stub_template_size) | |
5269 | { | |
5270 | stub_entry->stub_size = size; | |
5271 | stub_entry->stub_template = template_sequence; | |
5272 | stub_entry->stub_template_size = template_size; | |
5273 | } | |
5274 | ||
5275 | /* Already accounted for. */ | |
5276 | if (stub_entry->stub_offset != (bfd_vma) -1) | |
0a1b45a2 | 5277 | return true; |
461a49ca | 5278 | |
906e58ca NC |
5279 | size = (size + 7) & ~7; |
5280 | stub_entry->stub_sec->size += size; | |
461a49ca | 5281 | |
0a1b45a2 | 5282 | return true; |
906e58ca NC |
5283 | } |
5284 | ||
5285 | /* External entry points for sizing and building linker stubs. */ | |
5286 | ||
5287 | /* Set up various things so that we can make a list of input sections | |
5288 | for each output section included in the link. Returns -1 on error, | |
5289 | 0 when no stubs will be needed, and 1 on success. */ | |
5290 | ||
5291 | int | |
5292 | elf32_arm_setup_section_lists (bfd *output_bfd, | |
5293 | struct bfd_link_info *info) | |
5294 | { | |
5295 | bfd *input_bfd; | |
5296 | unsigned int bfd_count; | |
7292b3ac | 5297 | unsigned int top_id, top_index; |
906e58ca NC |
5298 | asection *section; |
5299 | asection **input_list, **list; | |
986f0783 | 5300 | size_t amt; |
906e58ca NC |
5301 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); |
5302 | ||
4dfe6ac6 NC |
5303 | if (htab == NULL) |
5304 | return 0; | |
906e58ca NC |
5305 | |
5306 | /* Count the number of input BFDs and find the top input section id. */ | |
5307 | for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0; | |
5308 | input_bfd != NULL; | |
c72f2fb2 | 5309 | input_bfd = input_bfd->link.next) |
906e58ca NC |
5310 | { |
5311 | bfd_count += 1; | |
5312 | for (section = input_bfd->sections; | |
5313 | section != NULL; | |
5314 | section = section->next) | |
5315 | { | |
5316 | if (top_id < section->id) | |
5317 | top_id = section->id; | |
5318 | } | |
5319 | } | |
5320 | htab->bfd_count = bfd_count; | |
5321 | ||
5322 | amt = sizeof (struct map_stub) * (top_id + 1); | |
21d799b5 | 5323 | htab->stub_group = (struct map_stub *) bfd_zmalloc (amt); |
906e58ca NC |
5324 | if (htab->stub_group == NULL) |
5325 | return -1; | |
fe33d2fa | 5326 | htab->top_id = top_id; |
906e58ca NC |
5327 | |
5328 | /* We can't use output_bfd->section_count here to find the top output | |
5329 | section index as some sections may have been removed, and | |
5330 | _bfd_strip_section_from_output doesn't renumber the indices. */ | |
5331 | for (section = output_bfd->sections, top_index = 0; | |
5332 | section != NULL; | |
5333 | section = section->next) | |
5334 | { | |
5335 | if (top_index < section->index) | |
5336 | top_index = section->index; | |
5337 | } | |
5338 | ||
5339 | htab->top_index = top_index; | |
5340 | amt = sizeof (asection *) * (top_index + 1); | |
21d799b5 | 5341 | input_list = (asection **) bfd_malloc (amt); |
906e58ca NC |
5342 | htab->input_list = input_list; |
5343 | if (input_list == NULL) | |
5344 | return -1; | |
5345 | ||
5346 | /* For sections we aren't interested in, mark their entries with a | |
5347 | value we can check later. */ | |
5348 | list = input_list + top_index; | |
5349 | do | |
5350 | *list = bfd_abs_section_ptr; | |
5351 | while (list-- != input_list); | |
5352 | ||
5353 | for (section = output_bfd->sections; | |
5354 | section != NULL; | |
5355 | section = section->next) | |
5356 | { | |
5357 | if ((section->flags & SEC_CODE) != 0) | |
5358 | input_list[section->index] = NULL; | |
5359 | } | |
5360 | ||
5361 | return 1; | |
5362 | } | |
5363 | ||
5364 | /* The linker repeatedly calls this function for each input section, | |
5365 | in the order that input sections are linked into output sections. | |
5366 | Build lists of input sections to determine groupings between which | |
5367 | we may insert linker stubs. */ | |
5368 | ||
5369 | void | |
5370 | elf32_arm_next_input_section (struct bfd_link_info *info, | |
5371 | asection *isec) | |
5372 | { | |
5373 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); | |
5374 | ||
4dfe6ac6 NC |
5375 | if (htab == NULL) |
5376 | return; | |
5377 | ||
906e58ca NC |
5378 | if (isec->output_section->index <= htab->top_index) |
5379 | { | |
5380 | asection **list = htab->input_list + isec->output_section->index; | |
5381 | ||
a7470592 | 5382 | if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0) |
906e58ca NC |
5383 | { |
5384 | /* Steal the link_sec pointer for our list. */ | |
5385 | #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec) | |
5386 | /* This happens to make the list in reverse order, | |
07d72278 | 5387 | which we reverse later. */ |
906e58ca NC |
5388 | PREV_SEC (isec) = *list; |
5389 | *list = isec; | |
5390 | } | |
5391 | } | |
5392 | } | |
5393 | ||
5394 | /* See whether we can group stub sections together. Grouping stub | |
5395 | sections may result in fewer stubs. More importantly, we need to | |
07d72278 | 5396 | put all .init* and .fini* stubs at the end of the .init or |
906e58ca NC |
5397 | .fini output sections respectively, because glibc splits the |
5398 | _init and _fini functions into multiple parts. Putting a stub in | |
5399 | the middle of a function is not a good idea. */ | |
5400 | ||
5401 | static void | |
5402 | group_sections (struct elf32_arm_link_hash_table *htab, | |
5403 | bfd_size_type stub_group_size, | |
0a1b45a2 | 5404 | bool stubs_always_after_branch) |
906e58ca | 5405 | { |
07d72278 | 5406 | asection **list = htab->input_list; |
906e58ca NC |
5407 | |
5408 | do | |
5409 | { | |
5410 | asection *tail = *list; | |
07d72278 | 5411 | asection *head; |
906e58ca NC |
5412 | |
5413 | if (tail == bfd_abs_section_ptr) | |
5414 | continue; | |
5415 | ||
07d72278 DJ |
5416 | /* Reverse the list: we must avoid placing stubs at the |
5417 | beginning of the section because the beginning of the text | |
5418 | section may be required for an interrupt vector in bare metal | |
5419 | code. */ | |
5420 | #define NEXT_SEC PREV_SEC | |
e780aef2 CL |
5421 | head = NULL; |
5422 | while (tail != NULL) | |
99059e56 RM |
5423 | { |
5424 | /* Pop from tail. */ | |
5425 | asection *item = tail; | |
5426 | tail = PREV_SEC (item); | |
e780aef2 | 5427 | |
99059e56 RM |
5428 | /* Push on head. */ |
5429 | NEXT_SEC (item) = head; | |
5430 | head = item; | |
5431 | } | |
07d72278 DJ |
5432 | |
5433 | while (head != NULL) | |
906e58ca NC |
5434 | { |
5435 | asection *curr; | |
07d72278 | 5436 | asection *next; |
e780aef2 CL |
5437 | bfd_vma stub_group_start = head->output_offset; |
5438 | bfd_vma end_of_next; | |
906e58ca | 5439 | |
07d72278 | 5440 | curr = head; |
e780aef2 | 5441 | while (NEXT_SEC (curr) != NULL) |
8cd931b7 | 5442 | { |
e780aef2 CL |
5443 | next = NEXT_SEC (curr); |
5444 | end_of_next = next->output_offset + next->size; | |
5445 | if (end_of_next - stub_group_start >= stub_group_size) | |
5446 | /* End of NEXT is too far from start, so stop. */ | |
8cd931b7 | 5447 | break; |
e780aef2 CL |
5448 | /* Add NEXT to the group. */ |
5449 | curr = next; | |
8cd931b7 | 5450 | } |
906e58ca | 5451 | |
07d72278 | 5452 | /* OK, the size from the start to the start of CURR is less |
906e58ca | 5453 | than stub_group_size and thus can be handled by one stub |
07d72278 | 5454 | section. (Or the head section is itself larger than |
906e58ca NC |
5455 | stub_group_size, in which case we may be toast.) |
5456 | We should really be keeping track of the total size of | |
5457 | stubs added here, as stubs contribute to the final output | |
7fb9f789 | 5458 | section size. */ |
906e58ca NC |
5459 | do |
5460 | { | |
07d72278 | 5461 | next = NEXT_SEC (head); |
906e58ca | 5462 | /* Set up this stub group. */ |
07d72278 | 5463 | htab->stub_group[head->id].link_sec = curr; |
906e58ca | 5464 | } |
07d72278 | 5465 | while (head != curr && (head = next) != NULL); |
906e58ca NC |
5466 | |
5467 | /* But wait, there's more! Input sections up to stub_group_size | |
07d72278 DJ |
5468 | bytes after the stub section can be handled by it too. */ |
5469 | if (!stubs_always_after_branch) | |
906e58ca | 5470 | { |
e780aef2 CL |
5471 | stub_group_start = curr->output_offset + curr->size; |
5472 | ||
8cd931b7 | 5473 | while (next != NULL) |
906e58ca | 5474 | { |
e780aef2 CL |
5475 | end_of_next = next->output_offset + next->size; |
5476 | if (end_of_next - stub_group_start >= stub_group_size) | |
5477 | /* End of NEXT is too far from stubs, so stop. */ | |
8cd931b7 | 5478 | break; |
e780aef2 | 5479 | /* Add NEXT to the stub group. */ |
07d72278 DJ |
5480 | head = next; |
5481 | next = NEXT_SEC (head); | |
5482 | htab->stub_group[head->id].link_sec = curr; | |
906e58ca NC |
5483 | } |
5484 | } | |
07d72278 | 5485 | head = next; |
906e58ca NC |
5486 | } |
5487 | } | |
07d72278 | 5488 | while (list++ != htab->input_list + htab->top_index); |
906e58ca NC |
5489 | |
5490 | free (htab->input_list); | |
5491 | #undef PREV_SEC | |
07d72278 | 5492 | #undef NEXT_SEC |
906e58ca NC |
5493 | } |
5494 | ||
48229727 JB |
5495 | /* Comparison function for sorting/searching relocations relating to Cortex-A8 |
5496 | erratum fix. */ | |
5497 | ||
5498 | static int | |
5499 | a8_reloc_compare (const void *a, const void *b) | |
5500 | { | |
21d799b5 NC |
5501 | const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a; |
5502 | const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b; | |
48229727 JB |
5503 | |
5504 | if (ra->from < rb->from) | |
5505 | return -1; | |
5506 | else if (ra->from > rb->from) | |
5507 | return 1; | |
5508 | else | |
5509 | return 0; | |
5510 | } | |
5511 | ||
5512 | static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *, | |
5513 | const char *, char **); | |
5514 | ||
5515 | /* Helper function to scan code for sequences which might trigger the Cortex-A8 | |
5516 | branch/TLB erratum. Fill in the table described by A8_FIXES_P, | |
81694485 | 5517 | NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false |
48229727 JB |
5518 | otherwise. */ |
5519 | ||
0a1b45a2 | 5520 | static bool |
81694485 NC |
5521 | cortex_a8_erratum_scan (bfd *input_bfd, |
5522 | struct bfd_link_info *info, | |
48229727 JB |
5523 | struct a8_erratum_fix **a8_fixes_p, |
5524 | unsigned int *num_a8_fixes_p, | |
5525 | unsigned int *a8_fix_table_size_p, | |
5526 | struct a8_erratum_reloc *a8_relocs, | |
eb7c4339 NS |
5527 | unsigned int num_a8_relocs, |
5528 | unsigned prev_num_a8_fixes, | |
0a1b45a2 | 5529 | bool *stub_changed_p) |
48229727 JB |
5530 | { |
5531 | asection *section; | |
5532 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); | |
5533 | struct a8_erratum_fix *a8_fixes = *a8_fixes_p; | |
5534 | unsigned int num_a8_fixes = *num_a8_fixes_p; | |
5535 | unsigned int a8_fix_table_size = *a8_fix_table_size_p; | |
5536 | ||
4dfe6ac6 | 5537 | if (htab == NULL) |
0a1b45a2 | 5538 | return false; |
4dfe6ac6 | 5539 | |
48229727 JB |
5540 | for (section = input_bfd->sections; |
5541 | section != NULL; | |
5542 | section = section->next) | |
5543 | { | |
5544 | bfd_byte *contents = NULL; | |
5545 | struct _arm_elf_section_data *sec_data; | |
5546 | unsigned int span; | |
5547 | bfd_vma base_vma; | |
5548 | ||
5549 | if (elf_section_type (section) != SHT_PROGBITS | |
99059e56 RM |
5550 | || (elf_section_flags (section) & SHF_EXECINSTR) == 0 |
5551 | || (section->flags & SEC_EXCLUDE) != 0 | |
5552 | || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS) | |
5553 | || (section->output_section == bfd_abs_section_ptr)) | |
5554 | continue; | |
48229727 JB |
5555 | |
5556 | base_vma = section->output_section->vma + section->output_offset; | |
5557 | ||
5558 | if (elf_section_data (section)->this_hdr.contents != NULL) | |
99059e56 | 5559 | contents = elf_section_data (section)->this_hdr.contents; |
48229727 | 5560 | else if (! bfd_malloc_and_get_section (input_bfd, section, &contents)) |
0a1b45a2 | 5561 | return true; |
48229727 JB |
5562 | |
5563 | sec_data = elf32_arm_section_data (section); | |
5564 | ||
5565 | for (span = 0; span < sec_data->mapcount; span++) | |
99059e56 RM |
5566 | { |
5567 | unsigned int span_start = sec_data->map[span].vma; | |
5568 | unsigned int span_end = (span == sec_data->mapcount - 1) | |
5569 | ? section->size : sec_data->map[span + 1].vma; | |
5570 | unsigned int i; | |
5571 | char span_type = sec_data->map[span].type; | |
0a1b45a2 | 5572 | bool last_was_32bit = false, last_was_branch = false; |
99059e56 RM |
5573 | |
5574 | if (span_type != 't') | |
5575 | continue; | |
5576 | ||
5577 | /* Span is entirely within a single 4KB region: skip scanning. */ | |
5578 | if (((base_vma + span_start) & ~0xfff) | |
48229727 | 5579 | == ((base_vma + span_end) & ~0xfff)) |
99059e56 RM |
5580 | continue; |
5581 | ||
5582 | /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where: | |
5583 | ||
5584 | * The opcode is BLX.W, BL.W, B.W, Bcc.W | |
5585 | * The branch target is in the same 4KB region as the | |
5586 | first half of the branch. | |
5587 | * The instruction before the branch is a 32-bit | |
5588 | length non-branch instruction. */ | |
5589 | for (i = span_start; i < span_end;) | |
5590 | { | |
5591 | unsigned int insn = bfd_getl16 (&contents[i]); | |
0a1b45a2 AM |
5592 | bool insn_32bit = false, is_blx = false, is_b = false; |
5593 | bool is_bl = false, is_bcc = false, is_32bit_branch; | |
48229727 | 5594 | |
99059e56 | 5595 | if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000) |
0a1b45a2 | 5596 | insn_32bit = true; |
48229727 JB |
5597 | |
5598 | if (insn_32bit) | |
99059e56 RM |
5599 | { |
5600 | /* Load the rest of the insn (in manual-friendly order). */ | |
5601 | insn = (insn << 16) | bfd_getl16 (&contents[i + 2]); | |
5602 | ||
5603 | /* Encoding T4: B<c>.W. */ | |
5604 | is_b = (insn & 0xf800d000) == 0xf0009000; | |
5605 | /* Encoding T1: BL<c>.W. */ | |
5606 | is_bl = (insn & 0xf800d000) == 0xf000d000; | |
5607 | /* Encoding T2: BLX<c>.W. */ | |
5608 | is_blx = (insn & 0xf800d000) == 0xf000c000; | |
48229727 JB |
5609 | /* Encoding T3: B<c>.W (not permitted in IT block). */ |
5610 | is_bcc = (insn & 0xf800d000) == 0xf0008000 | |
5611 | && (insn & 0x07f00000) != 0x03800000; | |
5612 | } | |
5613 | ||
5614 | is_32bit_branch = is_b || is_bl || is_blx || is_bcc; | |
fe33d2fa | 5615 | |
99059e56 | 5616 | if (((base_vma + i) & 0xfff) == 0xffe |
81694485 NC |
5617 | && insn_32bit |
5618 | && is_32bit_branch | |
5619 | && last_was_32bit | |
5620 | && ! last_was_branch) | |
99059e56 RM |
5621 | { |
5622 | bfd_signed_vma offset = 0; | |
0a1b45a2 AM |
5623 | bool force_target_arm = false; |
5624 | bool force_target_thumb = false; | |
99059e56 RM |
5625 | bfd_vma target; |
5626 | enum elf32_arm_stub_type stub_type = arm_stub_none; | |
5627 | struct a8_erratum_reloc key, *found; | |
0a1b45a2 | 5628 | bool use_plt = false; |
48229727 | 5629 | |
99059e56 RM |
5630 | key.from = base_vma + i; |
5631 | found = (struct a8_erratum_reloc *) | |
5632 | bsearch (&key, a8_relocs, num_a8_relocs, | |
5633 | sizeof (struct a8_erratum_reloc), | |
5634 | &a8_reloc_compare); | |
48229727 JB |
5635 | |
5636 | if (found) | |
5637 | { | |
5638 | char *error_message = NULL; | |
5639 | struct elf_link_hash_entry *entry; | |
5640 | ||
5641 | /* We don't care about the error returned from this | |
99059e56 | 5642 | function, only if there is glue or not. */ |
48229727 JB |
5643 | entry = find_thumb_glue (info, found->sym_name, |
5644 | &error_message); | |
5645 | ||
5646 | if (entry) | |
0a1b45a2 | 5647 | found->non_a8_stub = true; |
48229727 | 5648 | |
92750f34 | 5649 | /* Keep a simpler condition, for the sake of clarity. */ |
362d30a1 | 5650 | if (htab->root.splt != NULL && found->hash != NULL |
92750f34 | 5651 | && found->hash->root.plt.offset != (bfd_vma) -1) |
0a1b45a2 | 5652 | use_plt = true; |
92750f34 DJ |
5653 | |
5654 | if (found->r_type == R_ARM_THM_CALL) | |
5655 | { | |
35fc36a8 RS |
5656 | if (found->branch_type == ST_BRANCH_TO_ARM |
5657 | || use_plt) | |
0a1b45a2 | 5658 | force_target_arm = true; |
92750f34 | 5659 | else |
0a1b45a2 | 5660 | force_target_thumb = true; |
92750f34 | 5661 | } |
48229727 JB |
5662 | } |
5663 | ||
99059e56 | 5664 | /* Check if we have an offending branch instruction. */ |
48229727 JB |
5665 | |
5666 | if (found && found->non_a8_stub) | |
5667 | /* We've already made a stub for this instruction, e.g. | |
5668 | it's a long branch or a Thumb->ARM stub. Assume that | |
5669 | stub will suffice to work around the A8 erratum (see | |
5670 | setting of always_after_branch above). */ | |
5671 | ; | |
99059e56 RM |
5672 | else if (is_bcc) |
5673 | { | |
5674 | offset = (insn & 0x7ff) << 1; | |
5675 | offset |= (insn & 0x3f0000) >> 4; | |
5676 | offset |= (insn & 0x2000) ? 0x40000 : 0; | |
5677 | offset |= (insn & 0x800) ? 0x80000 : 0; | |
5678 | offset |= (insn & 0x4000000) ? 0x100000 : 0; | |
5679 | if (offset & 0x100000) | |
5680 | offset |= ~ ((bfd_signed_vma) 0xfffff); | |
5681 | stub_type = arm_stub_a8_veneer_b_cond; | |
5682 | } | |
5683 | else if (is_b || is_bl || is_blx) | |
5684 | { | |
5685 | int s = (insn & 0x4000000) != 0; | |
5686 | int j1 = (insn & 0x2000) != 0; | |
5687 | int j2 = (insn & 0x800) != 0; | |
5688 | int i1 = !(j1 ^ s); | |
5689 | int i2 = !(j2 ^ s); | |
5690 | ||
5691 | offset = (insn & 0x7ff) << 1; | |
5692 | offset |= (insn & 0x3ff0000) >> 4; | |
5693 | offset |= i2 << 22; | |
5694 | offset |= i1 << 23; | |
5695 | offset |= s << 24; | |
5696 | if (offset & 0x1000000) | |
5697 | offset |= ~ ((bfd_signed_vma) 0xffffff); | |
5698 | ||
5699 | if (is_blx) | |
5700 | offset &= ~ ((bfd_signed_vma) 3); | |
5701 | ||
5702 | stub_type = is_blx ? arm_stub_a8_veneer_blx : | |
5703 | is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b; | |
5704 | } | |
5705 | ||
5706 | if (stub_type != arm_stub_none) | |
5707 | { | |
5708 | bfd_vma pc_for_insn = base_vma + i + 4; | |
48229727 JB |
5709 | |
5710 | /* The original instruction is a BL, but the target is | |
99059e56 | 5711 | an ARM instruction. If we were not making a stub, |
48229727 JB |
5712 | the BL would have been converted to a BLX. Use the |
5713 | BLX stub instead in that case. */ | |
5714 | if (htab->use_blx && force_target_arm | |
5715 | && stub_type == arm_stub_a8_veneer_bl) | |
5716 | { | |
5717 | stub_type = arm_stub_a8_veneer_blx; | |
0a1b45a2 AM |
5718 | is_blx = true; |
5719 | is_bl = false; | |
48229727 JB |
5720 | } |
5721 | /* Conversely, if the original instruction was | |
5722 | BLX but the target is Thumb mode, use the BL | |
5723 | stub. */ | |
5724 | else if (force_target_thumb | |
5725 | && stub_type == arm_stub_a8_veneer_blx) | |
5726 | { | |
5727 | stub_type = arm_stub_a8_veneer_bl; | |
0a1b45a2 AM |
5728 | is_blx = false; |
5729 | is_bl = true; | |
48229727 JB |
5730 | } |
5731 | ||
99059e56 RM |
5732 | if (is_blx) |
5733 | pc_for_insn &= ~ ((bfd_vma) 3); | |
48229727 | 5734 | |
99059e56 RM |
5735 | /* If we found a relocation, use the proper destination, |
5736 | not the offset in the (unrelocated) instruction. | |
48229727 JB |
5737 | Note this is always done if we switched the stub type |
5738 | above. */ | |
99059e56 RM |
5739 | if (found) |
5740 | offset = | |
81694485 | 5741 | (bfd_signed_vma) (found->destination - pc_for_insn); |
48229727 | 5742 | |
99059e56 RM |
5743 | /* If the stub will use a Thumb-mode branch to a |
5744 | PLT target, redirect it to the preceding Thumb | |
5745 | entry point. */ | |
5746 | if (stub_type != arm_stub_a8_veneer_blx && use_plt) | |
5747 | offset -= PLT_THUMB_STUB_SIZE; | |
7d24e6a6 | 5748 | |
99059e56 | 5749 | target = pc_for_insn + offset; |
48229727 | 5750 | |
99059e56 RM |
5751 | /* The BLX stub is ARM-mode code. Adjust the offset to |
5752 | take the different PC value (+8 instead of +4) into | |
48229727 | 5753 | account. */ |
99059e56 RM |
5754 | if (stub_type == arm_stub_a8_veneer_blx) |
5755 | offset += 4; | |
5756 | ||
5757 | if (((base_vma + i) & ~0xfff) == (target & ~0xfff)) | |
5758 | { | |
5759 | char *stub_name = NULL; | |
5760 | ||
5761 | if (num_a8_fixes == a8_fix_table_size) | |
5762 | { | |
5763 | a8_fix_table_size *= 2; | |
5764 | a8_fixes = (struct a8_erratum_fix *) | |
5765 | bfd_realloc (a8_fixes, | |
5766 | sizeof (struct a8_erratum_fix) | |
5767 | * a8_fix_table_size); | |
5768 | } | |
48229727 | 5769 | |
eb7c4339 NS |
5770 | if (num_a8_fixes < prev_num_a8_fixes) |
5771 | { | |
5772 | /* If we're doing a subsequent scan, | |
5773 | check if we've found the same fix as | |
5774 | before, and try and reuse the stub | |
5775 | name. */ | |
5776 | stub_name = a8_fixes[num_a8_fixes].stub_name; | |
5777 | if ((a8_fixes[num_a8_fixes].section != section) | |
5778 | || (a8_fixes[num_a8_fixes].offset != i)) | |
5779 | { | |
5780 | free (stub_name); | |
5781 | stub_name = NULL; | |
0a1b45a2 | 5782 | *stub_changed_p = true; |
eb7c4339 NS |
5783 | } |
5784 | } | |
5785 | ||
5786 | if (!stub_name) | |
5787 | { | |
21d799b5 | 5788 | stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1); |
eb7c4339 NS |
5789 | if (stub_name != NULL) |
5790 | sprintf (stub_name, "%x:%x", section->id, i); | |
5791 | } | |
48229727 | 5792 | |
99059e56 RM |
5793 | a8_fixes[num_a8_fixes].input_bfd = input_bfd; |
5794 | a8_fixes[num_a8_fixes].section = section; | |
5795 | a8_fixes[num_a8_fixes].offset = i; | |
8d9d9490 TP |
5796 | a8_fixes[num_a8_fixes].target_offset = |
5797 | target - base_vma; | |
99059e56 RM |
5798 | a8_fixes[num_a8_fixes].orig_insn = insn; |
5799 | a8_fixes[num_a8_fixes].stub_name = stub_name; | |
5800 | a8_fixes[num_a8_fixes].stub_type = stub_type; | |
5801 | a8_fixes[num_a8_fixes].branch_type = | |
35fc36a8 | 5802 | is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB; |
48229727 | 5803 | |
99059e56 RM |
5804 | num_a8_fixes++; |
5805 | } | |
5806 | } | |
5807 | } | |
48229727 | 5808 | |
99059e56 RM |
5809 | i += insn_32bit ? 4 : 2; |
5810 | last_was_32bit = insn_32bit; | |
48229727 | 5811 | last_was_branch = is_32bit_branch; |
99059e56 RM |
5812 | } |
5813 | } | |
48229727 JB |
5814 | |
5815 | if (elf_section_data (section)->this_hdr.contents == NULL) | |
99059e56 | 5816 | free (contents); |
48229727 | 5817 | } |
fe33d2fa | 5818 | |
48229727 JB |
5819 | *a8_fixes_p = a8_fixes; |
5820 | *num_a8_fixes_p = num_a8_fixes; | |
5821 | *a8_fix_table_size_p = a8_fix_table_size; | |
fe33d2fa | 5822 | |
0a1b45a2 | 5823 | return false; |
48229727 JB |
5824 | } |
5825 | ||
b715f643 TP |
5826 | /* Create or update a stub entry depending on whether the stub can already be |
5827 | found in HTAB. The stub is identified by: | |
5828 | - its type STUB_TYPE | |
5829 | - its source branch (note that several can share the same stub) whose | |
5830 | section and relocation (if any) are given by SECTION and IRELA | |
5831 | respectively | |
5832 | - its target symbol whose input section, hash, name, value and branch type | |
5833 | are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE | |
5834 | respectively | |
5835 | ||
5836 | If found, the value of the stub's target symbol is updated from SYM_VALUE | |
5837 | and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to | |
5838 | TRUE and the stub entry is initialized. | |
5839 | ||
0955507f TP |
5840 | Returns the stub that was created or updated, or NULL if an error |
5841 | occurred. */ | |
b715f643 | 5842 | |
0955507f | 5843 | static struct elf32_arm_stub_hash_entry * |
b715f643 TP |
5844 | elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab, |
5845 | enum elf32_arm_stub_type stub_type, asection *section, | |
5846 | Elf_Internal_Rela *irela, asection *sym_sec, | |
5847 | struct elf32_arm_link_hash_entry *hash, char *sym_name, | |
5848 | bfd_vma sym_value, enum arm_st_branch_type branch_type, | |
0a1b45a2 | 5849 | bool *new_stub) |
b715f643 TP |
5850 | { |
5851 | const asection *id_sec; | |
5852 | char *stub_name; | |
5853 | struct elf32_arm_stub_hash_entry *stub_entry; | |
5854 | unsigned int r_type; | |
0a1b45a2 | 5855 | bool sym_claimed = arm_stub_sym_claimed (stub_type); |
b715f643 TP |
5856 | |
5857 | BFD_ASSERT (stub_type != arm_stub_none); | |
0a1b45a2 | 5858 | *new_stub = false; |
b715f643 | 5859 | |
4f4faa4d TP |
5860 | if (sym_claimed) |
5861 | stub_name = sym_name; | |
5862 | else | |
5863 | { | |
5864 | BFD_ASSERT (irela); | |
5865 | BFD_ASSERT (section); | |
c2abbbeb | 5866 | BFD_ASSERT (section->id <= htab->top_id); |
b715f643 | 5867 | |
4f4faa4d TP |
5868 | /* Support for grouping stub sections. */ |
5869 | id_sec = htab->stub_group[section->id].link_sec; | |
b715f643 | 5870 | |
4f4faa4d TP |
5871 | /* Get the name of this stub. */ |
5872 | stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela, | |
5873 | stub_type); | |
5874 | if (!stub_name) | |
0955507f | 5875 | return NULL; |
4f4faa4d | 5876 | } |
b715f643 | 5877 | |
0a1b45a2 AM |
5878 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, false, |
5879 | false); | |
b715f643 TP |
5880 | /* The proper stub has already been created, just update its value. */ |
5881 | if (stub_entry != NULL) | |
5882 | { | |
4f4faa4d TP |
5883 | if (!sym_claimed) |
5884 | free (stub_name); | |
b715f643 | 5885 | stub_entry->target_value = sym_value; |
0955507f | 5886 | return stub_entry; |
b715f643 TP |
5887 | } |
5888 | ||
daa4adae | 5889 | stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type); |
b715f643 TP |
5890 | if (stub_entry == NULL) |
5891 | { | |
4f4faa4d TP |
5892 | if (!sym_claimed) |
5893 | free (stub_name); | |
0955507f | 5894 | return NULL; |
b715f643 TP |
5895 | } |
5896 | ||
5897 | stub_entry->target_value = sym_value; | |
5898 | stub_entry->target_section = sym_sec; | |
5899 | stub_entry->stub_type = stub_type; | |
5900 | stub_entry->h = hash; | |
5901 | stub_entry->branch_type = branch_type; | |
5902 | ||
4f4faa4d TP |
5903 | if (sym_claimed) |
5904 | stub_entry->output_name = sym_name; | |
5905 | else | |
b715f643 | 5906 | { |
4f4faa4d TP |
5907 | if (sym_name == NULL) |
5908 | sym_name = "unnamed"; | |
5909 | stub_entry->output_name = (char *) | |
5910 | bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME) | |
5911 | + strlen (sym_name)); | |
5912 | if (stub_entry->output_name == NULL) | |
5913 | { | |
5914 | free (stub_name); | |
0955507f | 5915 | return NULL; |
4f4faa4d | 5916 | } |
b715f643 | 5917 | |
4f4faa4d TP |
5918 | /* For historical reasons, use the existing names for ARM-to-Thumb and |
5919 | Thumb-to-ARM stubs. */ | |
5920 | r_type = ELF32_R_TYPE (irela->r_info); | |
5921 | if ((r_type == (unsigned int) R_ARM_THM_CALL | |
5922 | || r_type == (unsigned int) R_ARM_THM_JUMP24 | |
5923 | || r_type == (unsigned int) R_ARM_THM_JUMP19) | |
5924 | && branch_type == ST_BRANCH_TO_ARM) | |
5925 | sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name); | |
5926 | else if ((r_type == (unsigned int) R_ARM_CALL | |
5927 | || r_type == (unsigned int) R_ARM_JUMP24) | |
5928 | && branch_type == ST_BRANCH_TO_THUMB) | |
5929 | sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name); | |
5930 | else | |
5931 | sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name); | |
5932 | } | |
b715f643 | 5933 | |
0a1b45a2 | 5934 | *new_stub = true; |
0955507f | 5935 | return stub_entry; |
b715f643 TP |
5936 | } |
5937 | ||
4ba2ef8f TP |
5938 | /* Scan symbols in INPUT_BFD to identify secure entry functions needing a |
5939 | gateway veneer to transition from non secure to secure state and create them | |
5940 | accordingly. | |
5941 | ||
5942 | "ARMv8-M Security Extensions: Requirements on Development Tools" document | |
5943 | defines the conditions that govern Secure Gateway veneer creation for a | |
5944 | given symbol <SYM> as follows: | |
5945 | - it has function type | |
5946 | - it has non local binding | |
5947 | - a symbol named __acle_se_<SYM> (called special symbol) exists with the | |
5948 | same type, binding and value as <SYM> (called normal symbol). | |
5949 | An entry function can handle secure state transition itself in which case | |
5950 | its special symbol would have a different value from the normal symbol. | |
5951 | ||
5952 | OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash | |
5953 | entry mapping while HTAB gives the name to hash entry mapping. | |
0955507f TP |
5954 | *CMSE_STUB_CREATED is increased by the number of secure gateway veneer |
5955 | created. | |
4ba2ef8f | 5956 | |
0955507f | 5957 | The return value gives whether a stub failed to be allocated. */ |
4ba2ef8f | 5958 | |
0a1b45a2 | 5959 | static bool |
4ba2ef8f TP |
5960 | cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab, |
5961 | obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes, | |
0955507f | 5962 | int *cmse_stub_created) |
4ba2ef8f TP |
5963 | { |
5964 | const struct elf_backend_data *bed; | |
5965 | Elf_Internal_Shdr *symtab_hdr; | |
5966 | unsigned i, j, sym_count, ext_start; | |
5967 | Elf_Internal_Sym *cmse_sym, *local_syms; | |
5968 | struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL; | |
5969 | enum arm_st_branch_type branch_type; | |
5970 | char *sym_name, *lsym_name; | |
5971 | bfd_vma sym_value; | |
5972 | asection *section; | |
0955507f | 5973 | struct elf32_arm_stub_hash_entry *stub_entry; |
0a1b45a2 | 5974 | bool is_v8m, new_stub, cmse_invalid, ret = true; |
4ba2ef8f TP |
5975 | |
5976 | bed = get_elf_backend_data (input_bfd); | |
5977 | symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; | |
5978 | sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym; | |
5979 | ext_start = symtab_hdr->sh_info; | |
5980 | is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE | |
5981 | && out_attr[Tag_CPU_arch_profile].i == 'M'); | |
5982 | ||
5983 | local_syms = (Elf_Internal_Sym *) symtab_hdr->contents; | |
5984 | if (local_syms == NULL) | |
5985 | local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr, | |
5986 | symtab_hdr->sh_info, 0, NULL, NULL, | |
5987 | NULL); | |
5988 | if (symtab_hdr->sh_info && local_syms == NULL) | |
0a1b45a2 | 5989 | return false; |
4ba2ef8f TP |
5990 | |
5991 | /* Scan symbols. */ | |
5992 | for (i = 0; i < sym_count; i++) | |
5993 | { | |
0a1b45a2 | 5994 | cmse_invalid = false; |
4ba2ef8f TP |
5995 | |
5996 | if (i < ext_start) | |
5997 | { | |
5998 | cmse_sym = &local_syms[i]; | |
4ba2ef8f TP |
5999 | sym_name = bfd_elf_string_from_elf_section (input_bfd, |
6000 | symtab_hdr->sh_link, | |
6001 | cmse_sym->st_name); | |
08dedd66 | 6002 | if (!sym_name || !startswith (sym_name, CMSE_PREFIX)) |
baf46cd7 AM |
6003 | continue; |
6004 | ||
4ba2ef8f | 6005 | /* Special symbol with local binding. */ |
0a1b45a2 | 6006 | cmse_invalid = true; |
4ba2ef8f TP |
6007 | } |
6008 | else | |
6009 | { | |
6010 | cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]); | |
83f18e5e NC |
6011 | if (cmse_hash == NULL) |
6012 | continue; | |
6013 | ||
4ba2ef8f | 6014 | sym_name = (char *) cmse_hash->root.root.root.string; |
08dedd66 | 6015 | if (!startswith (sym_name, CMSE_PREFIX)) |
4ba2ef8f TP |
6016 | continue; |
6017 | ||
6018 | /* Special symbol has incorrect binding or type. */ | |
6019 | if ((cmse_hash->root.root.type != bfd_link_hash_defined | |
6020 | && cmse_hash->root.root.type != bfd_link_hash_defweak) | |
6021 | || cmse_hash->root.type != STT_FUNC) | |
0a1b45a2 | 6022 | cmse_invalid = true; |
4ba2ef8f TP |
6023 | } |
6024 | ||
6025 | if (!is_v8m) | |
6026 | { | |
90b6238f AM |
6027 | _bfd_error_handler (_("%pB: special symbol `%s' only allowed for " |
6028 | "ARMv8-M architecture or later"), | |
4eca0228 | 6029 | input_bfd, sym_name); |
0a1b45a2 AM |
6030 | is_v8m = true; /* Avoid multiple warning. */ |
6031 | ret = false; | |
4ba2ef8f TP |
6032 | } |
6033 | ||
6034 | if (cmse_invalid) | |
6035 | { | |
90b6238f AM |
6036 | _bfd_error_handler (_("%pB: invalid special symbol `%s'; it must be" |
6037 | " a global or weak function symbol"), | |
4eca0228 | 6038 | input_bfd, sym_name); |
0a1b45a2 | 6039 | ret = false; |
4ba2ef8f TP |
6040 | if (i < ext_start) |
6041 | continue; | |
6042 | } | |
6043 | ||
6044 | sym_name += strlen (CMSE_PREFIX); | |
6045 | hash = (struct elf32_arm_link_hash_entry *) | |
0a1b45a2 | 6046 | elf_link_hash_lookup (&(htab)->root, sym_name, false, false, true); |
4ba2ef8f TP |
6047 | |
6048 | /* No associated normal symbol or it is neither global nor weak. */ | |
6049 | if (!hash | |
6050 | || (hash->root.root.type != bfd_link_hash_defined | |
6051 | && hash->root.root.type != bfd_link_hash_defweak) | |
6052 | || hash->root.type != STT_FUNC) | |
6053 | { | |
6054 | /* Initialize here to avoid warning about use of possibly | |
6055 | uninitialized variable. */ | |
6056 | j = 0; | |
6057 | ||
6058 | if (!hash) | |
6059 | { | |
6060 | /* Searching for a normal symbol with local binding. */ | |
6061 | for (; j < ext_start; j++) | |
6062 | { | |
6063 | lsym_name = | |
6064 | bfd_elf_string_from_elf_section (input_bfd, | |
6065 | symtab_hdr->sh_link, | |
6066 | local_syms[j].st_name); | |
6067 | if (!strcmp (sym_name, lsym_name)) | |
6068 | break; | |
6069 | } | |
6070 | } | |
6071 | ||
6072 | if (hash || j < ext_start) | |
6073 | { | |
4eca0228 | 6074 | _bfd_error_handler |
90b6238f AM |
6075 | (_("%pB: invalid standard symbol `%s'; it must be " |
6076 | "a global or weak function symbol"), | |
6077 | input_bfd, sym_name); | |
4ba2ef8f TP |
6078 | } |
6079 | else | |
4eca0228 | 6080 | _bfd_error_handler |
90b6238f | 6081 | (_("%pB: absent standard symbol `%s'"), input_bfd, sym_name); |
0a1b45a2 | 6082 | ret = false; |
4ba2ef8f TP |
6083 | if (!hash) |
6084 | continue; | |
6085 | } | |
6086 | ||
6087 | sym_value = hash->root.root.u.def.value; | |
6088 | section = hash->root.root.u.def.section; | |
6089 | ||
6090 | if (cmse_hash->root.root.u.def.section != section) | |
6091 | { | |
4eca0228 | 6092 | _bfd_error_handler |
90b6238f | 6093 | (_("%pB: `%s' and its special symbol are in different sections"), |
4ba2ef8f | 6094 | input_bfd, sym_name); |
0a1b45a2 | 6095 | ret = false; |
4ba2ef8f TP |
6096 | } |
6097 | if (cmse_hash->root.root.u.def.value != sym_value) | |
6098 | continue; /* Ignore: could be an entry function starting with SG. */ | |
6099 | ||
6100 | /* If this section is a link-once section that will be discarded, then | |
6101 | don't create any stubs. */ | |
6102 | if (section->output_section == NULL) | |
6103 | { | |
4eca0228 | 6104 | _bfd_error_handler |
90b6238f | 6105 | (_("%pB: entry function `%s' not output"), input_bfd, sym_name); |
4ba2ef8f TP |
6106 | continue; |
6107 | } | |
6108 | ||
6109 | if (hash->root.size == 0) | |
6110 | { | |
4eca0228 | 6111 | _bfd_error_handler |
90b6238f | 6112 | (_("%pB: entry function `%s' is empty"), input_bfd, sym_name); |
0a1b45a2 | 6113 | ret = false; |
4ba2ef8f TP |
6114 | } |
6115 | ||
6116 | if (!ret) | |
6117 | continue; | |
6118 | branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal); | |
0955507f | 6119 | stub_entry |
4ba2ef8f TP |
6120 | = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only, |
6121 | NULL, NULL, section, hash, sym_name, | |
6122 | sym_value, branch_type, &new_stub); | |
6123 | ||
0955507f | 6124 | if (stub_entry == NULL) |
0a1b45a2 | 6125 | ret = false; |
4ba2ef8f TP |
6126 | else |
6127 | { | |
6128 | BFD_ASSERT (new_stub); | |
0955507f | 6129 | (*cmse_stub_created)++; |
4ba2ef8f TP |
6130 | } |
6131 | } | |
6132 | ||
6133 | if (!symtab_hdr->contents) | |
6134 | free (local_syms); | |
6135 | return ret; | |
6136 | } | |
6137 | ||
0955507f TP |
6138 | /* Return TRUE iff a symbol identified by its linker HASH entry is a secure |
6139 | code entry function, ie can be called from non secure code without using a | |
6140 | veneer. */ | |
6141 | ||
0a1b45a2 | 6142 | static bool |
0955507f TP |
6143 | cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash) |
6144 | { | |
42484486 | 6145 | bfd_byte contents[4]; |
0955507f TP |
6146 | uint32_t first_insn; |
6147 | asection *section; | |
6148 | file_ptr offset; | |
6149 | bfd *abfd; | |
6150 | ||
6151 | /* Defined symbol of function type. */ | |
6152 | if (hash->root.root.type != bfd_link_hash_defined | |
6153 | && hash->root.root.type != bfd_link_hash_defweak) | |
0a1b45a2 | 6154 | return false; |
0955507f | 6155 | if (hash->root.type != STT_FUNC) |
0a1b45a2 | 6156 | return false; |
0955507f TP |
6157 | |
6158 | /* Read first instruction. */ | |
6159 | section = hash->root.root.u.def.section; | |
6160 | abfd = section->owner; | |
6161 | offset = hash->root.root.u.def.value - section->vma; | |
42484486 TP |
6162 | if (!bfd_get_section_contents (abfd, section, contents, offset, |
6163 | sizeof (contents))) | |
0a1b45a2 | 6164 | return false; |
0955507f | 6165 | |
42484486 TP |
6166 | first_insn = bfd_get_32 (abfd, contents); |
6167 | ||
6168 | /* Starts by SG instruction. */ | |
0955507f TP |
6169 | return first_insn == 0xe97fe97f; |
6170 | } | |
6171 | ||
6172 | /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new | |
6173 | secure gateway veneers (ie. the veneers was not in the input import library) | |
6174 | and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */ | |
6175 | ||
0a1b45a2 | 6176 | static bool |
0955507f TP |
6177 | arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info) |
6178 | { | |
6179 | struct elf32_arm_stub_hash_entry *stub_entry; | |
6180 | struct bfd_link_info *info; | |
6181 | ||
6182 | /* Massage our args to the form they really have. */ | |
6183 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; | |
6184 | info = (struct bfd_link_info *) gen_info; | |
6185 | ||
6186 | if (info->out_implib_bfd) | |
0a1b45a2 | 6187 | return true; |
0955507f TP |
6188 | |
6189 | if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only) | |
0a1b45a2 | 6190 | return true; |
0955507f TP |
6191 | |
6192 | if (stub_entry->stub_offset == (bfd_vma) -1) | |
4eca0228 | 6193 | _bfd_error_handler (" %s", stub_entry->output_name); |
0955507f | 6194 | |
0a1b45a2 | 6195 | return true; |
0955507f TP |
6196 | } |
6197 | ||
6198 | /* Set offset of each secure gateway veneers so that its address remain | |
6199 | identical to the one in the input import library referred by | |
6200 | HTAB->in_implib_bfd. A warning is issued for veneers that disappeared | |
6201 | (present in input import library but absent from the executable being | |
6202 | linked) or if new veneers appeared and there is no output import library | |
6203 | (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the | |
6204 | number of secure gateway veneers found in the input import library. | |
6205 | ||
6206 | The function returns whether an error occurred. If no error occurred, | |
6207 | *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan | |
6208 | and this function and HTAB->new_cmse_stub_offset is set to the biggest | |
6209 | veneer observed set for new veneers to be layed out after. */ | |
6210 | ||
0a1b45a2 | 6211 | static bool |
0955507f TP |
6212 | set_cmse_veneer_addr_from_implib (struct bfd_link_info *info, |
6213 | struct elf32_arm_link_hash_table *htab, | |
6214 | int *cmse_stub_created) | |
6215 | { | |
6216 | long symsize; | |
6217 | char *sym_name; | |
6218 | flagword flags; | |
6219 | long i, symcount; | |
6220 | bfd *in_implib_bfd; | |
6221 | asection *stub_out_sec; | |
0a1b45a2 | 6222 | bool ret = true; |
0955507f TP |
6223 | Elf_Internal_Sym *intsym; |
6224 | const char *out_sec_name; | |
6225 | bfd_size_type cmse_stub_size; | |
6226 | asymbol **sympp = NULL, *sym; | |
6227 | struct elf32_arm_link_hash_entry *hash; | |
6228 | const insn_sequence *cmse_stub_template; | |
6229 | struct elf32_arm_stub_hash_entry *stub_entry; | |
6230 | int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created; | |
6231 | bfd_vma veneer_value, stub_offset, next_cmse_stub_offset; | |
6232 | bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0; | |
6233 | ||
6234 | /* No input secure gateway import library. */ | |
6235 | if (!htab->in_implib_bfd) | |
0a1b45a2 | 6236 | return true; |
0955507f TP |
6237 | |
6238 | in_implib_bfd = htab->in_implib_bfd; | |
6239 | if (!htab->cmse_implib) | |
6240 | { | |
871b3ab2 | 6241 | _bfd_error_handler (_("%pB: --in-implib only supported for Secure " |
90b6238f | 6242 | "Gateway import libraries"), in_implib_bfd); |
0a1b45a2 | 6243 | return false; |
0955507f TP |
6244 | } |
6245 | ||
6246 | /* Get symbol table size. */ | |
6247 | symsize = bfd_get_symtab_upper_bound (in_implib_bfd); | |
6248 | if (symsize < 0) | |
0a1b45a2 | 6249 | return false; |
0955507f TP |
6250 | |
6251 | /* Read in the input secure gateway import library's symbol table. */ | |
9a733151 AM |
6252 | sympp = (asymbol **) bfd_malloc (symsize); |
6253 | if (sympp == NULL) | |
0a1b45a2 | 6254 | return false; |
9a733151 | 6255 | |
0955507f TP |
6256 | symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp); |
6257 | if (symcount < 0) | |
6258 | { | |
0a1b45a2 | 6259 | ret = false; |
0955507f TP |
6260 | goto free_sym_buf; |
6261 | } | |
6262 | ||
6263 | htab->new_cmse_stub_offset = 0; | |
6264 | cmse_stub_size = | |
6265 | find_stub_size_and_template (arm_stub_cmse_branch_thumb_only, | |
6266 | &cmse_stub_template, | |
6267 | &cmse_stub_template_size); | |
6268 | out_sec_name = | |
6269 | arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only); | |
6270 | stub_out_sec = | |
6271 | bfd_get_section_by_name (htab->obfd, out_sec_name); | |
6272 | if (stub_out_sec != NULL) | |
6273 | cmse_stub_sec_vma = stub_out_sec->vma; | |
6274 | ||
6275 | /* Set addresses of veneers mentionned in input secure gateway import | |
6276 | library's symbol table. */ | |
6277 | for (i = 0; i < symcount; i++) | |
6278 | { | |
6279 | sym = sympp[i]; | |
6280 | flags = sym->flags; | |
6281 | sym_name = (char *) bfd_asymbol_name (sym); | |
6282 | intsym = &((elf_symbol_type *) sym)->internal_elf_sym; | |
6283 | ||
6284 | if (sym->section != bfd_abs_section_ptr | |
6285 | || !(flags & (BSF_GLOBAL | BSF_WEAK)) | |
6286 | || (flags & BSF_FUNCTION) != BSF_FUNCTION | |
6287 | || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal) | |
6288 | != ST_BRANCH_TO_THUMB)) | |
6289 | { | |
90b6238f AM |
6290 | _bfd_error_handler (_("%pB: invalid import library entry: `%s'; " |
6291 | "symbol should be absolute, global and " | |
6292 | "refer to Thumb functions"), | |
4eca0228 | 6293 | in_implib_bfd, sym_name); |
0a1b45a2 | 6294 | ret = false; |
0955507f TP |
6295 | continue; |
6296 | } | |
6297 | ||
6298 | veneer_value = bfd_asymbol_value (sym); | |
6299 | stub_offset = veneer_value - cmse_stub_sec_vma; | |
6300 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name, | |
0a1b45a2 | 6301 | false, false); |
0955507f | 6302 | hash = (struct elf32_arm_link_hash_entry *) |
0a1b45a2 | 6303 | elf_link_hash_lookup (&(htab)->root, sym_name, false, false, true); |
0955507f TP |
6304 | |
6305 | /* Stub entry should have been created by cmse_scan or the symbol be of | |
6306 | a secure function callable from non secure code. */ | |
6307 | if (!stub_entry && !hash) | |
6308 | { | |
0a1b45a2 | 6309 | bool new_stub; |
0955507f | 6310 | |
4eca0228 | 6311 | _bfd_error_handler |
90b6238f | 6312 | (_("entry function `%s' disappeared from secure code"), sym_name); |
0955507f | 6313 | hash = (struct elf32_arm_link_hash_entry *) |
0a1b45a2 | 6314 | elf_link_hash_lookup (&(htab)->root, sym_name, true, true, true); |
0955507f TP |
6315 | stub_entry |
6316 | = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only, | |
6317 | NULL, NULL, bfd_abs_section_ptr, hash, | |
6318 | sym_name, veneer_value, | |
6319 | ST_BRANCH_TO_THUMB, &new_stub); | |
6320 | if (stub_entry == NULL) | |
0a1b45a2 | 6321 | ret = false; |
0955507f TP |
6322 | else |
6323 | { | |
6324 | BFD_ASSERT (new_stub); | |
6325 | new_cmse_stubs_created++; | |
6326 | (*cmse_stub_created)++; | |
6327 | } | |
6328 | stub_entry->stub_template_size = stub_entry->stub_size = 0; | |
6329 | stub_entry->stub_offset = stub_offset; | |
6330 | } | |
6331 | /* Symbol found is not callable from non secure code. */ | |
6332 | else if (!stub_entry) | |
6333 | { | |
6334 | if (!cmse_entry_fct_p (hash)) | |
6335 | { | |
90b6238f | 6336 | _bfd_error_handler (_("`%s' refers to a non entry function"), |
4eca0228 | 6337 | sym_name); |
0a1b45a2 | 6338 | ret = false; |
0955507f TP |
6339 | } |
6340 | continue; | |
6341 | } | |
6342 | else | |
6343 | { | |
6344 | /* Only stubs for SG veneers should have been created. */ | |
6345 | BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only); | |
6346 | ||
6347 | /* Check visibility hasn't changed. */ | |
6348 | if (!!(flags & BSF_GLOBAL) | |
6349 | != (hash->root.root.type == bfd_link_hash_defined)) | |
4eca0228 | 6350 | _bfd_error_handler |
90b6238f | 6351 | (_("%pB: visibility of symbol `%s' has changed"), in_implib_bfd, |
0955507f TP |
6352 | sym_name); |
6353 | ||
6354 | stub_entry->stub_offset = stub_offset; | |
6355 | } | |
6356 | ||
6357 | /* Size should match that of a SG veneer. */ | |
6358 | if (intsym->st_size != cmse_stub_size) | |
6359 | { | |
90b6238f | 6360 | _bfd_error_handler (_("%pB: incorrect size for symbol `%s'"), |
4eca0228 | 6361 | in_implib_bfd, sym_name); |
0a1b45a2 | 6362 | ret = false; |
0955507f TP |
6363 | } |
6364 | ||
6365 | /* Previous veneer address is before current SG veneer section. */ | |
6366 | if (veneer_value < cmse_stub_sec_vma) | |
6367 | { | |
6368 | /* Avoid offset underflow. */ | |
6369 | if (stub_entry) | |
6370 | stub_entry->stub_offset = 0; | |
6371 | stub_offset = 0; | |
0a1b45a2 | 6372 | ret = false; |
0955507f TP |
6373 | } |
6374 | ||
6375 | /* Complain if stub offset not a multiple of stub size. */ | |
6376 | if (stub_offset % cmse_stub_size) | |
6377 | { | |
4eca0228 | 6378 | _bfd_error_handler |
90b6238f AM |
6379 | (_("offset of veneer for entry function `%s' not a multiple of " |
6380 | "its size"), sym_name); | |
0a1b45a2 | 6381 | ret = false; |
0955507f TP |
6382 | } |
6383 | ||
6384 | if (!ret) | |
6385 | continue; | |
6386 | ||
6387 | new_cmse_stubs_created--; | |
6388 | if (veneer_value < cmse_stub_array_start) | |
6389 | cmse_stub_array_start = veneer_value; | |
6390 | next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7); | |
6391 | if (next_cmse_stub_offset > htab->new_cmse_stub_offset) | |
6392 | htab->new_cmse_stub_offset = next_cmse_stub_offset; | |
6393 | } | |
6394 | ||
6395 | if (!info->out_implib_bfd && new_cmse_stubs_created != 0) | |
6396 | { | |
6397 | BFD_ASSERT (new_cmse_stubs_created > 0); | |
4eca0228 | 6398 | _bfd_error_handler |
0955507f TP |
6399 | (_("new entry function(s) introduced but no output import library " |
6400 | "specified:")); | |
6401 | bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info); | |
6402 | } | |
6403 | ||
6404 | if (cmse_stub_array_start != cmse_stub_sec_vma) | |
6405 | { | |
4eca0228 | 6406 | _bfd_error_handler |
90b6238f | 6407 | (_("start address of `%s' is different from previous link"), |
0955507f | 6408 | out_sec_name); |
0a1b45a2 | 6409 | ret = false; |
0955507f TP |
6410 | } |
6411 | ||
dc1e8a47 | 6412 | free_sym_buf: |
0955507f TP |
6413 | free (sympp); |
6414 | return ret; | |
6415 | } | |
6416 | ||
906e58ca NC |
6417 | /* Determine and set the size of the stub section for a final link. |
6418 | ||
6419 | The basic idea here is to examine all the relocations looking for | |
6420 | PC-relative calls to a target that is unreachable with a "bl" | |
6421 | instruction. */ | |
6422 | ||
0a1b45a2 | 6423 | bool |
906e58ca NC |
6424 | elf32_arm_size_stubs (bfd *output_bfd, |
6425 | bfd *stub_bfd, | |
6426 | struct bfd_link_info *info, | |
6427 | bfd_signed_vma group_size, | |
7a89b94e | 6428 | asection * (*add_stub_section) (const char *, asection *, |
6bde4c52 | 6429 | asection *, |
7a89b94e | 6430 | unsigned int), |
906e58ca NC |
6431 | void (*layout_sections_again) (void)) |
6432 | { | |
0a1b45a2 | 6433 | bool ret = true; |
4ba2ef8f | 6434 | obj_attribute *out_attr; |
0955507f | 6435 | int cmse_stub_created = 0; |
906e58ca | 6436 | bfd_size_type stub_group_size; |
0a1b45a2 | 6437 | bool m_profile, stubs_always_after_branch, first_veneer_scan = true; |
906e58ca | 6438 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); |
48229727 | 6439 | struct a8_erratum_fix *a8_fixes = NULL; |
eb7c4339 | 6440 | unsigned int num_a8_fixes = 0, a8_fix_table_size = 10; |
48229727 JB |
6441 | struct a8_erratum_reloc *a8_relocs = NULL; |
6442 | unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i; | |
6443 | ||
4dfe6ac6 | 6444 | if (htab == NULL) |
0a1b45a2 | 6445 | return false; |
4dfe6ac6 | 6446 | |
48229727 JB |
6447 | if (htab->fix_cortex_a8) |
6448 | { | |
21d799b5 | 6449 | a8_fixes = (struct a8_erratum_fix *) |
99059e56 | 6450 | bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size); |
21d799b5 | 6451 | a8_relocs = (struct a8_erratum_reloc *) |
99059e56 | 6452 | bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size); |
48229727 | 6453 | } |
906e58ca NC |
6454 | |
6455 | /* Propagate mach to stub bfd, because it may not have been | |
6456 | finalized when we created stub_bfd. */ | |
6457 | bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd), | |
6458 | bfd_get_mach (output_bfd)); | |
6459 | ||
6460 | /* Stash our params away. */ | |
6461 | htab->stub_bfd = stub_bfd; | |
6462 | htab->add_stub_section = add_stub_section; | |
6463 | htab->layout_sections_again = layout_sections_again; | |
07d72278 | 6464 | stubs_always_after_branch = group_size < 0; |
48229727 | 6465 | |
4ba2ef8f TP |
6466 | out_attr = elf_known_obj_attributes_proc (output_bfd); |
6467 | m_profile = out_attr[Tag_CPU_arch_profile].i == 'M'; | |
0955507f | 6468 | |
48229727 JB |
6469 | /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page |
6470 | as the first half of a 32-bit branch straddling two 4K pages. This is a | |
6471 | crude way of enforcing that. */ | |
6472 | if (htab->fix_cortex_a8) | |
6473 | stubs_always_after_branch = 1; | |
6474 | ||
906e58ca NC |
6475 | if (group_size < 0) |
6476 | stub_group_size = -group_size; | |
6477 | else | |
6478 | stub_group_size = group_size; | |
6479 | ||
6480 | if (stub_group_size == 1) | |
6481 | { | |
6482 | /* Default values. */ | |
6483 | /* Thumb branch range is +-4MB has to be used as the default | |
6484 | maximum size (a given section can contain both ARM and Thumb | |
6485 | code, so the worst case has to be taken into account). | |
6486 | ||
6487 | This value is 24K less than that, which allows for 2025 | |
6488 | 12-byte stubs. If we exceed that, then we will fail to link. | |
6489 | The user will have to relink with an explicit group size | |
6490 | option. */ | |
6491 | stub_group_size = 4170000; | |
6492 | } | |
6493 | ||
07d72278 | 6494 | group_sections (htab, stub_group_size, stubs_always_after_branch); |
906e58ca | 6495 | |
3ae046cc NS |
6496 | /* If we're applying the cortex A8 fix, we need to determine the |
6497 | program header size now, because we cannot change it later -- | |
6498 | that could alter section placements. Notice the A8 erratum fix | |
6499 | ends up requiring the section addresses to remain unchanged | |
6500 | modulo the page size. That's something we cannot represent | |
6501 | inside BFD, and we don't want to force the section alignment to | |
6502 | be the page size. */ | |
6503 | if (htab->fix_cortex_a8) | |
6504 | (*htab->layout_sections_again) (); | |
6505 | ||
906e58ca NC |
6506 | while (1) |
6507 | { | |
6508 | bfd *input_bfd; | |
6509 | unsigned int bfd_indx; | |
6510 | asection *stub_sec; | |
d7c5bd02 | 6511 | enum elf32_arm_stub_type stub_type; |
0a1b45a2 | 6512 | bool stub_changed = false; |
eb7c4339 | 6513 | unsigned prev_num_a8_fixes = num_a8_fixes; |
906e58ca | 6514 | |
48229727 | 6515 | num_a8_fixes = 0; |
906e58ca NC |
6516 | for (input_bfd = info->input_bfds, bfd_indx = 0; |
6517 | input_bfd != NULL; | |
c72f2fb2 | 6518 | input_bfd = input_bfd->link.next, bfd_indx++) |
906e58ca NC |
6519 | { |
6520 | Elf_Internal_Shdr *symtab_hdr; | |
6521 | asection *section; | |
6522 | Elf_Internal_Sym *local_syms = NULL; | |
6523 | ||
73d5efd7 AM |
6524 | if (!is_arm_elf (input_bfd)) |
6525 | continue; | |
6526 | if ((input_bfd->flags & DYNAMIC) != 0 | |
6527 | && (elf_sym_hashes (input_bfd) == NULL | |
6528 | || (elf_dyn_lib_class (input_bfd) & DYN_AS_NEEDED) != 0)) | |
99059e56 | 6529 | continue; |
adbcc655 | 6530 | |
48229727 JB |
6531 | num_a8_relocs = 0; |
6532 | ||
906e58ca NC |
6533 | /* We'll need the symbol table in a second. */ |
6534 | symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; | |
6535 | if (symtab_hdr->sh_info == 0) | |
6536 | continue; | |
6537 | ||
4ba2ef8f TP |
6538 | /* Limit scan of symbols to object file whose profile is |
6539 | Microcontroller to not hinder performance in the general case. */ | |
6540 | if (m_profile && first_veneer_scan) | |
6541 | { | |
6542 | struct elf_link_hash_entry **sym_hashes; | |
6543 | ||
6544 | sym_hashes = elf_sym_hashes (input_bfd); | |
6545 | if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes, | |
0955507f | 6546 | &cmse_stub_created)) |
4ba2ef8f | 6547 | goto error_ret_free_local; |
0955507f TP |
6548 | |
6549 | if (cmse_stub_created != 0) | |
0a1b45a2 | 6550 | stub_changed = true; |
4ba2ef8f TP |
6551 | } |
6552 | ||
906e58ca NC |
6553 | /* Walk over each section attached to the input bfd. */ |
6554 | for (section = input_bfd->sections; | |
6555 | section != NULL; | |
6556 | section = section->next) | |
6557 | { | |
6558 | Elf_Internal_Rela *internal_relocs, *irelaend, *irela; | |
6559 | ||
6560 | /* If there aren't any relocs, then there's nothing more | |
6561 | to do. */ | |
6562 | if ((section->flags & SEC_RELOC) == 0 | |
6563 | || section->reloc_count == 0 | |
6564 | || (section->flags & SEC_CODE) == 0) | |
6565 | continue; | |
6566 | ||
6567 | /* If this section is a link-once section that will be | |
6568 | discarded, then don't create any stubs. */ | |
6569 | if (section->output_section == NULL | |
6570 | || section->output_section->owner != output_bfd) | |
6571 | continue; | |
6572 | ||
6573 | /* Get the relocs. */ | |
6574 | internal_relocs | |
6575 | = _bfd_elf_link_read_relocs (input_bfd, section, NULL, | |
6576 | NULL, info->keep_memory); | |
6577 | if (internal_relocs == NULL) | |
6578 | goto error_ret_free_local; | |
6579 | ||
6580 | /* Now examine each relocation. */ | |
6581 | irela = internal_relocs; | |
6582 | irelaend = irela + section->reloc_count; | |
6583 | for (; irela < irelaend; irela++) | |
6584 | { | |
6585 | unsigned int r_type, r_indx; | |
906e58ca NC |
6586 | asection *sym_sec; |
6587 | bfd_vma sym_value; | |
6588 | bfd_vma destination; | |
6589 | struct elf32_arm_link_hash_entry *hash; | |
7413f23f | 6590 | const char *sym_name; |
34e77a92 | 6591 | unsigned char st_type; |
35fc36a8 | 6592 | enum arm_st_branch_type branch_type; |
0a1b45a2 | 6593 | bool created_stub = false; |
906e58ca NC |
6594 | |
6595 | r_type = ELF32_R_TYPE (irela->r_info); | |
6596 | r_indx = ELF32_R_SYM (irela->r_info); | |
6597 | ||
6598 | if (r_type >= (unsigned int) R_ARM_max) | |
6599 | { | |
6600 | bfd_set_error (bfd_error_bad_value); | |
6601 | error_ret_free_internal: | |
6602 | if (elf_section_data (section)->relocs == NULL) | |
6603 | free (internal_relocs); | |
15dd01b1 TP |
6604 | /* Fall through. */ |
6605 | error_ret_free_local: | |
c9594989 | 6606 | if (symtab_hdr->contents != (unsigned char *) local_syms) |
15dd01b1 | 6607 | free (local_syms); |
0a1b45a2 | 6608 | return false; |
906e58ca | 6609 | } |
b38cadfb | 6610 | |
0855e32b NS |
6611 | hash = NULL; |
6612 | if (r_indx >= symtab_hdr->sh_info) | |
6613 | hash = elf32_arm_hash_entry | |
6614 | (elf_sym_hashes (input_bfd) | |
6615 | [r_indx - symtab_hdr->sh_info]); | |
b38cadfb | 6616 | |
0855e32b NS |
6617 | /* Only look for stubs on branch instructions, or |
6618 | non-relaxed TLSCALL */ | |
906e58ca | 6619 | if ((r_type != (unsigned int) R_ARM_CALL) |
155d87d7 CL |
6620 | && (r_type != (unsigned int) R_ARM_THM_CALL) |
6621 | && (r_type != (unsigned int) R_ARM_JUMP24) | |
48229727 JB |
6622 | && (r_type != (unsigned int) R_ARM_THM_JUMP19) |
6623 | && (r_type != (unsigned int) R_ARM_THM_XPC22) | |
155d87d7 | 6624 | && (r_type != (unsigned int) R_ARM_THM_JUMP24) |
0855e32b NS |
6625 | && (r_type != (unsigned int) R_ARM_PLT32) |
6626 | && !((r_type == (unsigned int) R_ARM_TLS_CALL | |
6627 | || r_type == (unsigned int) R_ARM_THM_TLS_CALL) | |
c9f9a78d AM |
6628 | && r_type == (elf32_arm_tls_transition |
6629 | (info, r_type, | |
6630 | (struct elf_link_hash_entry *) hash)) | |
0855e32b NS |
6631 | && ((hash ? hash->tls_type |
6632 | : (elf32_arm_local_got_tls_type | |
6633 | (input_bfd)[r_indx])) | |
6634 | & GOT_TLS_GDESC) != 0)) | |
906e58ca NC |
6635 | continue; |
6636 | ||
6637 | /* Now determine the call target, its name, value, | |
6638 | section. */ | |
6639 | sym_sec = NULL; | |
6640 | sym_value = 0; | |
6641 | destination = 0; | |
7413f23f | 6642 | sym_name = NULL; |
b38cadfb | 6643 | |
0855e32b NS |
6644 | if (r_type == (unsigned int) R_ARM_TLS_CALL |
6645 | || r_type == (unsigned int) R_ARM_THM_TLS_CALL) | |
6646 | { | |
6647 | /* A non-relaxed TLS call. The target is the | |
6648 | plt-resident trampoline and nothing to do | |
6649 | with the symbol. */ | |
6650 | BFD_ASSERT (htab->tls_trampoline > 0); | |
6651 | sym_sec = htab->root.splt; | |
6652 | sym_value = htab->tls_trampoline; | |
6653 | hash = 0; | |
34e77a92 | 6654 | st_type = STT_FUNC; |
35fc36a8 | 6655 | branch_type = ST_BRANCH_TO_ARM; |
0855e32b NS |
6656 | } |
6657 | else if (!hash) | |
906e58ca NC |
6658 | { |
6659 | /* It's a local symbol. */ | |
6660 | Elf_Internal_Sym *sym; | |
906e58ca NC |
6661 | |
6662 | if (local_syms == NULL) | |
6663 | { | |
6664 | local_syms | |
6665 | = (Elf_Internal_Sym *) symtab_hdr->contents; | |
6666 | if (local_syms == NULL) | |
6667 | local_syms | |
6668 | = bfd_elf_get_elf_syms (input_bfd, symtab_hdr, | |
6669 | symtab_hdr->sh_info, 0, | |
6670 | NULL, NULL, NULL); | |
6671 | if (local_syms == NULL) | |
6672 | goto error_ret_free_internal; | |
6673 | } | |
6674 | ||
6675 | sym = local_syms + r_indx; | |
f6d250ce TS |
6676 | if (sym->st_shndx == SHN_UNDEF) |
6677 | sym_sec = bfd_und_section_ptr; | |
6678 | else if (sym->st_shndx == SHN_ABS) | |
6679 | sym_sec = bfd_abs_section_ptr; | |
6680 | else if (sym->st_shndx == SHN_COMMON) | |
6681 | sym_sec = bfd_com_section_ptr; | |
6682 | else | |
6683 | sym_sec = | |
6684 | bfd_section_from_elf_index (input_bfd, sym->st_shndx); | |
6685 | ||
ffcb4889 NS |
6686 | if (!sym_sec) |
6687 | /* This is an undefined symbol. It can never | |
6a631e86 | 6688 | be resolved. */ |
ffcb4889 | 6689 | continue; |
fe33d2fa | 6690 | |
906e58ca NC |
6691 | if (ELF_ST_TYPE (sym->st_info) != STT_SECTION) |
6692 | sym_value = sym->st_value; | |
6693 | destination = (sym_value + irela->r_addend | |
6694 | + sym_sec->output_offset | |
6695 | + sym_sec->output_section->vma); | |
34e77a92 | 6696 | st_type = ELF_ST_TYPE (sym->st_info); |
39d911fc TP |
6697 | branch_type = |
6698 | ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal); | |
7413f23f DJ |
6699 | sym_name |
6700 | = bfd_elf_string_from_elf_section (input_bfd, | |
6701 | symtab_hdr->sh_link, | |
6702 | sym->st_name); | |
906e58ca NC |
6703 | } |
6704 | else | |
6705 | { | |
6706 | /* It's an external symbol. */ | |
906e58ca NC |
6707 | while (hash->root.root.type == bfd_link_hash_indirect |
6708 | || hash->root.root.type == bfd_link_hash_warning) | |
6709 | hash = ((struct elf32_arm_link_hash_entry *) | |
6710 | hash->root.root.u.i.link); | |
6711 | ||
6712 | if (hash->root.root.type == bfd_link_hash_defined | |
6713 | || hash->root.root.type == bfd_link_hash_defweak) | |
6714 | { | |
6715 | sym_sec = hash->root.root.u.def.section; | |
6716 | sym_value = hash->root.root.u.def.value; | |
022f8312 CL |
6717 | |
6718 | struct elf32_arm_link_hash_table *globals = | |
6719 | elf32_arm_hash_table (info); | |
6720 | ||
6721 | /* For a destination in a shared library, | |
6722 | use the PLT stub as target address to | |
6723 | decide whether a branch stub is | |
6724 | needed. */ | |
4dfe6ac6 | 6725 | if (globals != NULL |
362d30a1 | 6726 | && globals->root.splt != NULL |
4dfe6ac6 | 6727 | && hash != NULL |
022f8312 CL |
6728 | && hash->root.plt.offset != (bfd_vma) -1) |
6729 | { | |
362d30a1 | 6730 | sym_sec = globals->root.splt; |
022f8312 CL |
6731 | sym_value = hash->root.plt.offset; |
6732 | if (sym_sec->output_section != NULL) | |
6733 | destination = (sym_value | |
6734 | + sym_sec->output_offset | |
6735 | + sym_sec->output_section->vma); | |
6736 | } | |
6737 | else if (sym_sec->output_section != NULL) | |
906e58ca NC |
6738 | destination = (sym_value + irela->r_addend |
6739 | + sym_sec->output_offset | |
6740 | + sym_sec->output_section->vma); | |
6741 | } | |
69c5861e CL |
6742 | else if ((hash->root.root.type == bfd_link_hash_undefined) |
6743 | || (hash->root.root.type == bfd_link_hash_undefweak)) | |
6744 | { | |
6745 | /* For a shared library, use the PLT stub as | |
6746 | target address to decide whether a long | |
6747 | branch stub is needed. | |
6748 | For absolute code, they cannot be handled. */ | |
6749 | struct elf32_arm_link_hash_table *globals = | |
6750 | elf32_arm_hash_table (info); | |
6751 | ||
4dfe6ac6 | 6752 | if (globals != NULL |
362d30a1 | 6753 | && globals->root.splt != NULL |
4dfe6ac6 | 6754 | && hash != NULL |
69c5861e CL |
6755 | && hash->root.plt.offset != (bfd_vma) -1) |
6756 | { | |
362d30a1 | 6757 | sym_sec = globals->root.splt; |
69c5861e CL |
6758 | sym_value = hash->root.plt.offset; |
6759 | if (sym_sec->output_section != NULL) | |
6760 | destination = (sym_value | |
6761 | + sym_sec->output_offset | |
6762 | + sym_sec->output_section->vma); | |
6763 | } | |
6764 | else | |
6765 | continue; | |
6766 | } | |
906e58ca NC |
6767 | else |
6768 | { | |
6769 | bfd_set_error (bfd_error_bad_value); | |
6770 | goto error_ret_free_internal; | |
6771 | } | |
34e77a92 | 6772 | st_type = hash->root.type; |
39d911fc TP |
6773 | branch_type = |
6774 | ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal); | |
7413f23f | 6775 | sym_name = hash->root.root.root.string; |
906e58ca NC |
6776 | } |
6777 | ||
48229727 | 6778 | do |
7413f23f | 6779 | { |
0a1b45a2 | 6780 | bool new_stub; |
0955507f | 6781 | struct elf32_arm_stub_hash_entry *stub_entry; |
b715f643 | 6782 | |
48229727 JB |
6783 | /* Determine what (if any) linker stub is needed. */ |
6784 | stub_type = arm_type_of_stub (info, section, irela, | |
34e77a92 RS |
6785 | st_type, &branch_type, |
6786 | hash, destination, sym_sec, | |
48229727 JB |
6787 | input_bfd, sym_name); |
6788 | if (stub_type == arm_stub_none) | |
6789 | break; | |
6790 | ||
48229727 JB |
6791 | /* We've either created a stub for this reloc already, |
6792 | or we are about to. */ | |
0955507f | 6793 | stub_entry = |
b715f643 TP |
6794 | elf32_arm_create_stub (htab, stub_type, section, irela, |
6795 | sym_sec, hash, | |
6796 | (char *) sym_name, sym_value, | |
6797 | branch_type, &new_stub); | |
7413f23f | 6798 | |
0955507f | 6799 | created_stub = stub_entry != NULL; |
b715f643 TP |
6800 | if (!created_stub) |
6801 | goto error_ret_free_internal; | |
6802 | else if (!new_stub) | |
6803 | break; | |
99059e56 | 6804 | else |
0a1b45a2 | 6805 | stub_changed = true; |
99059e56 RM |
6806 | } |
6807 | while (0); | |
6808 | ||
6809 | /* Look for relocations which might trigger Cortex-A8 | |
6810 | erratum. */ | |
6811 | if (htab->fix_cortex_a8 | |
6812 | && (r_type == (unsigned int) R_ARM_THM_JUMP24 | |
6813 | || r_type == (unsigned int) R_ARM_THM_JUMP19 | |
6814 | || r_type == (unsigned int) R_ARM_THM_CALL | |
6815 | || r_type == (unsigned int) R_ARM_THM_XPC22)) | |
6816 | { | |
6817 | bfd_vma from = section->output_section->vma | |
6818 | + section->output_offset | |
6819 | + irela->r_offset; | |
6820 | ||
6821 | if ((from & 0xfff) == 0xffe) | |
6822 | { | |
6823 | /* Found a candidate. Note we haven't checked the | |
6824 | destination is within 4K here: if we do so (and | |
6825 | don't create an entry in a8_relocs) we can't tell | |
6826 | that a branch should have been relocated when | |
6827 | scanning later. */ | |
6828 | if (num_a8_relocs == a8_reloc_table_size) | |
6829 | { | |
6830 | a8_reloc_table_size *= 2; | |
6831 | a8_relocs = (struct a8_erratum_reloc *) | |
6832 | bfd_realloc (a8_relocs, | |
6833 | sizeof (struct a8_erratum_reloc) | |
6834 | * a8_reloc_table_size); | |
6835 | } | |
6836 | ||
6837 | a8_relocs[num_a8_relocs].from = from; | |
6838 | a8_relocs[num_a8_relocs].destination = destination; | |
6839 | a8_relocs[num_a8_relocs].r_type = r_type; | |
6840 | a8_relocs[num_a8_relocs].branch_type = branch_type; | |
6841 | a8_relocs[num_a8_relocs].sym_name = sym_name; | |
6842 | a8_relocs[num_a8_relocs].non_a8_stub = created_stub; | |
6843 | a8_relocs[num_a8_relocs].hash = hash; | |
6844 | ||
6845 | num_a8_relocs++; | |
6846 | } | |
6847 | } | |
906e58ca NC |
6848 | } |
6849 | ||
99059e56 RM |
6850 | /* We're done with the internal relocs, free them. */ |
6851 | if (elf_section_data (section)->relocs == NULL) | |
6852 | free (internal_relocs); | |
6853 | } | |
48229727 | 6854 | |
99059e56 | 6855 | if (htab->fix_cortex_a8) |
48229727 | 6856 | { |
99059e56 RM |
6857 | /* Sort relocs which might apply to Cortex-A8 erratum. */ |
6858 | qsort (a8_relocs, num_a8_relocs, | |
eb7c4339 | 6859 | sizeof (struct a8_erratum_reloc), |
99059e56 | 6860 | &a8_reloc_compare); |
48229727 | 6861 | |
99059e56 RM |
6862 | /* Scan for branches which might trigger Cortex-A8 erratum. */ |
6863 | if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes, | |
48229727 | 6864 | &num_a8_fixes, &a8_fix_table_size, |
eb7c4339 NS |
6865 | a8_relocs, num_a8_relocs, |
6866 | prev_num_a8_fixes, &stub_changed) | |
6867 | != 0) | |
48229727 | 6868 | goto error_ret_free_local; |
5e681ec4 | 6869 | } |
7f991970 AM |
6870 | |
6871 | if (local_syms != NULL | |
6872 | && symtab_hdr->contents != (unsigned char *) local_syms) | |
6873 | { | |
6874 | if (!info->keep_memory) | |
6875 | free (local_syms); | |
6876 | else | |
6877 | symtab_hdr->contents = (unsigned char *) local_syms; | |
6878 | } | |
5e681ec4 PB |
6879 | } |
6880 | ||
0955507f TP |
6881 | if (first_veneer_scan |
6882 | && !set_cmse_veneer_addr_from_implib (info, htab, | |
6883 | &cmse_stub_created)) | |
0a1b45a2 | 6884 | ret = false; |
0955507f | 6885 | |
eb7c4339 | 6886 | if (prev_num_a8_fixes != num_a8_fixes) |
0a1b45a2 | 6887 | stub_changed = true; |
48229727 | 6888 | |
906e58ca NC |
6889 | if (!stub_changed) |
6890 | break; | |
5e681ec4 | 6891 | |
906e58ca NC |
6892 | /* OK, we've added some stubs. Find out the new size of the |
6893 | stub sections. */ | |
6894 | for (stub_sec = htab->stub_bfd->sections; | |
6895 | stub_sec != NULL; | |
6896 | stub_sec = stub_sec->next) | |
3e6b1042 DJ |
6897 | { |
6898 | /* Ignore non-stub sections. */ | |
6899 | if (!strstr (stub_sec->name, STUB_SUFFIX)) | |
6900 | continue; | |
6901 | ||
6902 | stub_sec->size = 0; | |
6903 | } | |
b34b2d70 | 6904 | |
0955507f TP |
6905 | /* Add new SG veneers after those already in the input import |
6906 | library. */ | |
6907 | for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; | |
6908 | stub_type++) | |
6909 | { | |
6910 | bfd_vma *start_offset_p; | |
6911 | asection **stub_sec_p; | |
6912 | ||
6913 | start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type); | |
6914 | stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type); | |
6915 | if (start_offset_p == NULL) | |
6916 | continue; | |
6917 | ||
6918 | BFD_ASSERT (stub_sec_p != NULL); | |
6919 | if (*stub_sec_p != NULL) | |
6920 | (*stub_sec_p)->size = *start_offset_p; | |
6921 | } | |
6922 | ||
d7c5bd02 | 6923 | /* Compute stub section size, considering padding. */ |
906e58ca | 6924 | bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab); |
d7c5bd02 TP |
6925 | for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; |
6926 | stub_type++) | |
6927 | { | |
6928 | int size, padding; | |
6929 | asection **stub_sec_p; | |
6930 | ||
6931 | padding = arm_dedicated_stub_section_padding (stub_type); | |
6932 | stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type); | |
6933 | /* Skip if no stub input section or no stub section padding | |
6934 | required. */ | |
6935 | if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0) | |
6936 | continue; | |
6937 | /* Stub section padding required but no dedicated section. */ | |
6938 | BFD_ASSERT (stub_sec_p); | |
6939 | ||
6940 | size = (*stub_sec_p)->size; | |
6941 | size = (size + padding - 1) & ~(padding - 1); | |
6942 | (*stub_sec_p)->size = size; | |
6943 | } | |
906e58ca | 6944 | |
48229727 JB |
6945 | /* Add Cortex-A8 erratum veneers to stub section sizes too. */ |
6946 | if (htab->fix_cortex_a8) | |
99059e56 RM |
6947 | for (i = 0; i < num_a8_fixes; i++) |
6948 | { | |
48229727 | 6949 | stub_sec = elf32_arm_create_or_find_stub_sec (NULL, |
daa4adae | 6950 | a8_fixes[i].section, htab, a8_fixes[i].stub_type); |
48229727 JB |
6951 | |
6952 | if (stub_sec == NULL) | |
0a1b45a2 | 6953 | return false; |
48229727 | 6954 | |
99059e56 RM |
6955 | stub_sec->size |
6956 | += find_stub_size_and_template (a8_fixes[i].stub_type, NULL, | |
6957 | NULL); | |
6958 | } | |
48229727 JB |
6959 | |
6960 | ||
906e58ca NC |
6961 | /* Ask the linker to do its stuff. */ |
6962 | (*htab->layout_sections_again) (); | |
0a1b45a2 | 6963 | first_veneer_scan = false; |
ba93b8ac DJ |
6964 | } |
6965 | ||
48229727 JB |
6966 | /* Add stubs for Cortex-A8 erratum fixes now. */ |
6967 | if (htab->fix_cortex_a8) | |
6968 | { | |
6969 | for (i = 0; i < num_a8_fixes; i++) | |
99059e56 RM |
6970 | { |
6971 | struct elf32_arm_stub_hash_entry *stub_entry; | |
6972 | char *stub_name = a8_fixes[i].stub_name; | |
6973 | asection *section = a8_fixes[i].section; | |
6974 | unsigned int section_id = a8_fixes[i].section->id; | |
6975 | asection *link_sec = htab->stub_group[section_id].link_sec; | |
6976 | asection *stub_sec = htab->stub_group[section_id].stub_sec; | |
6977 | const insn_sequence *template_sequence; | |
6978 | int template_size, size = 0; | |
6979 | ||
6980 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, | |
0a1b45a2 | 6981 | true, false); |
99059e56 RM |
6982 | if (stub_entry == NULL) |
6983 | { | |
871b3ab2 | 6984 | _bfd_error_handler (_("%pB: cannot create stub entry %s"), |
4eca0228 | 6985 | section->owner, stub_name); |
0a1b45a2 | 6986 | return false; |
99059e56 RM |
6987 | } |
6988 | ||
6989 | stub_entry->stub_sec = stub_sec; | |
0955507f | 6990 | stub_entry->stub_offset = (bfd_vma) -1; |
99059e56 RM |
6991 | stub_entry->id_sec = link_sec; |
6992 | stub_entry->stub_type = a8_fixes[i].stub_type; | |
8d9d9490 | 6993 | stub_entry->source_value = a8_fixes[i].offset; |
99059e56 | 6994 | stub_entry->target_section = a8_fixes[i].section; |
8d9d9490 | 6995 | stub_entry->target_value = a8_fixes[i].target_offset; |
99059e56 | 6996 | stub_entry->orig_insn = a8_fixes[i].orig_insn; |
35fc36a8 | 6997 | stub_entry->branch_type = a8_fixes[i].branch_type; |
48229727 | 6998 | |
99059e56 RM |
6999 | size = find_stub_size_and_template (a8_fixes[i].stub_type, |
7000 | &template_sequence, | |
7001 | &template_size); | |
48229727 | 7002 | |
99059e56 RM |
7003 | stub_entry->stub_size = size; |
7004 | stub_entry->stub_template = template_sequence; | |
7005 | stub_entry->stub_template_size = template_size; | |
7006 | } | |
48229727 JB |
7007 | |
7008 | /* Stash the Cortex-A8 erratum fix array for use later in | |
99059e56 | 7009 | elf32_arm_write_section(). */ |
48229727 JB |
7010 | htab->a8_erratum_fixes = a8_fixes; |
7011 | htab->num_a8_erratum_fixes = num_a8_fixes; | |
7012 | } | |
7013 | else | |
7014 | { | |
7015 | htab->a8_erratum_fixes = NULL; | |
7016 | htab->num_a8_erratum_fixes = 0; | |
7017 | } | |
0955507f | 7018 | return ret; |
5e681ec4 PB |
7019 | } |
7020 | ||
906e58ca NC |
7021 | /* Build all the stubs associated with the current output file. The |
7022 | stubs are kept in a hash table attached to the main linker hash | |
7023 | table. We also set up the .plt entries for statically linked PIC | |
7024 | functions here. This function is called via arm_elf_finish in the | |
7025 | linker. */ | |
252b5132 | 7026 | |
0a1b45a2 | 7027 | bool |
906e58ca | 7028 | elf32_arm_build_stubs (struct bfd_link_info *info) |
252b5132 | 7029 | { |
906e58ca NC |
7030 | asection *stub_sec; |
7031 | struct bfd_hash_table *table; | |
0955507f | 7032 | enum elf32_arm_stub_type stub_type; |
906e58ca | 7033 | struct elf32_arm_link_hash_table *htab; |
252b5132 | 7034 | |
906e58ca | 7035 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 | 7036 | if (htab == NULL) |
0a1b45a2 | 7037 | return false; |
252b5132 | 7038 | |
906e58ca NC |
7039 | for (stub_sec = htab->stub_bfd->sections; |
7040 | stub_sec != NULL; | |
7041 | stub_sec = stub_sec->next) | |
252b5132 | 7042 | { |
906e58ca NC |
7043 | bfd_size_type size; |
7044 | ||
8029a119 | 7045 | /* Ignore non-stub sections. */ |
906e58ca NC |
7046 | if (!strstr (stub_sec->name, STUB_SUFFIX)) |
7047 | continue; | |
7048 | ||
d7c5bd02 | 7049 | /* Allocate memory to hold the linker stubs. Zeroing the stub sections |
0955507f TP |
7050 | must at least be done for stub section requiring padding and for SG |
7051 | veneers to ensure that a non secure code branching to a removed SG | |
7052 | veneer causes an error. */ | |
906e58ca | 7053 | size = stub_sec->size; |
21d799b5 | 7054 | stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size); |
906e58ca | 7055 | if (stub_sec->contents == NULL && size != 0) |
0a1b45a2 | 7056 | return false; |
0955507f | 7057 | |
906e58ca | 7058 | stub_sec->size = 0; |
252b5132 RH |
7059 | } |
7060 | ||
0955507f TP |
7061 | /* Add new SG veneers after those already in the input import library. */ |
7062 | for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++) | |
7063 | { | |
7064 | bfd_vma *start_offset_p; | |
7065 | asection **stub_sec_p; | |
7066 | ||
7067 | start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type); | |
7068 | stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type); | |
7069 | if (start_offset_p == NULL) | |
7070 | continue; | |
7071 | ||
7072 | BFD_ASSERT (stub_sec_p != NULL); | |
7073 | if (*stub_sec_p != NULL) | |
7074 | (*stub_sec_p)->size = *start_offset_p; | |
7075 | } | |
7076 | ||
906e58ca NC |
7077 | /* Build the stubs as directed by the stub hash table. */ |
7078 | table = &htab->stub_hash_table; | |
7079 | bfd_hash_traverse (table, arm_build_one_stub, info); | |
eb7c4339 NS |
7080 | if (htab->fix_cortex_a8) |
7081 | { | |
7082 | /* Place the cortex a8 stubs last. */ | |
7083 | htab->fix_cortex_a8 = -1; | |
7084 | bfd_hash_traverse (table, arm_build_one_stub, info); | |
7085 | } | |
252b5132 | 7086 | |
0a1b45a2 | 7087 | return true; |
252b5132 RH |
7088 | } |
7089 | ||
9b485d32 NC |
7090 | /* Locate the Thumb encoded calling stub for NAME. */ |
7091 | ||
252b5132 | 7092 | static struct elf_link_hash_entry * |
57e8b36a NC |
7093 | find_thumb_glue (struct bfd_link_info *link_info, |
7094 | const char *name, | |
f2a9dd69 | 7095 | char **error_message) |
252b5132 RH |
7096 | { |
7097 | char *tmp_name; | |
7098 | struct elf_link_hash_entry *hash; | |
7099 | struct elf32_arm_link_hash_table *hash_table; | |
7100 | ||
7101 | /* We need a pointer to the armelf specific hash table. */ | |
7102 | hash_table = elf32_arm_hash_table (link_info); | |
4dfe6ac6 NC |
7103 | if (hash_table == NULL) |
7104 | return NULL; | |
252b5132 | 7105 | |
21d799b5 | 7106 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name) |
99059e56 | 7107 | + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1); |
252b5132 RH |
7108 | |
7109 | BFD_ASSERT (tmp_name); | |
7110 | ||
7111 | sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name); | |
7112 | ||
7113 | hash = elf_link_hash_lookup | |
0a1b45a2 | 7114 | (&(hash_table)->root, tmp_name, false, false, true); |
252b5132 | 7115 | |
b1657152 | 7116 | if (hash == NULL |
90b6238f AM |
7117 | && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"), |
7118 | "Thumb", tmp_name, name) == -1) | |
b1657152 | 7119 | *error_message = (char *) bfd_errmsg (bfd_error_system_call); |
252b5132 RH |
7120 | |
7121 | free (tmp_name); | |
7122 | ||
7123 | return hash; | |
7124 | } | |
7125 | ||
9b485d32 NC |
7126 | /* Locate the ARM encoded calling stub for NAME. */ |
7127 | ||
252b5132 | 7128 | static struct elf_link_hash_entry * |
57e8b36a NC |
7129 | find_arm_glue (struct bfd_link_info *link_info, |
7130 | const char *name, | |
f2a9dd69 | 7131 | char **error_message) |
252b5132 RH |
7132 | { |
7133 | char *tmp_name; | |
7134 | struct elf_link_hash_entry *myh; | |
7135 | struct elf32_arm_link_hash_table *hash_table; | |
7136 | ||
7137 | /* We need a pointer to the elfarm specific hash table. */ | |
7138 | hash_table = elf32_arm_hash_table (link_info); | |
4dfe6ac6 NC |
7139 | if (hash_table == NULL) |
7140 | return NULL; | |
252b5132 | 7141 | |
21d799b5 | 7142 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name) |
99059e56 | 7143 | + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1); |
252b5132 RH |
7144 | BFD_ASSERT (tmp_name); |
7145 | ||
7146 | sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name); | |
7147 | ||
7148 | myh = elf_link_hash_lookup | |
0a1b45a2 | 7149 | (&(hash_table)->root, tmp_name, false, false, true); |
252b5132 | 7150 | |
b1657152 | 7151 | if (myh == NULL |
90b6238f AM |
7152 | && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"), |
7153 | "ARM", tmp_name, name) == -1) | |
b1657152 | 7154 | *error_message = (char *) bfd_errmsg (bfd_error_system_call); |
252b5132 RH |
7155 | |
7156 | free (tmp_name); | |
7157 | ||
7158 | return myh; | |
7159 | } | |
7160 | ||
8f6277f5 | 7161 | /* ARM->Thumb glue (static images): |
252b5132 RH |
7162 | |
7163 | .arm | |
7164 | __func_from_arm: | |
7165 | ldr r12, __func_addr | |
7166 | bx r12 | |
7167 | __func_addr: | |
906e58ca | 7168 | .word func @ behave as if you saw a ARM_32 reloc. |
252b5132 | 7169 | |
26079076 PB |
7170 | (v5t static images) |
7171 | .arm | |
7172 | __func_from_arm: | |
7173 | ldr pc, __func_addr | |
7174 | __func_addr: | |
906e58ca | 7175 | .word func @ behave as if you saw a ARM_32 reloc. |
26079076 | 7176 | |
8f6277f5 PB |
7177 | (relocatable images) |
7178 | .arm | |
7179 | __func_from_arm: | |
7180 | ldr r12, __func_offset | |
7181 | add r12, r12, pc | |
7182 | bx r12 | |
7183 | __func_offset: | |
8029a119 | 7184 | .word func - . */ |
8f6277f5 PB |
7185 | |
7186 | #define ARM2THUMB_STATIC_GLUE_SIZE 12 | |
252b5132 RH |
7187 | static const insn32 a2t1_ldr_insn = 0xe59fc000; |
7188 | static const insn32 a2t2_bx_r12_insn = 0xe12fff1c; | |
7189 | static const insn32 a2t3_func_addr_insn = 0x00000001; | |
7190 | ||
26079076 PB |
7191 | #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8 |
7192 | static const insn32 a2t1v5_ldr_insn = 0xe51ff004; | |
7193 | static const insn32 a2t2v5_func_addr_insn = 0x00000001; | |
7194 | ||
8f6277f5 PB |
7195 | #define ARM2THUMB_PIC_GLUE_SIZE 16 |
7196 | static const insn32 a2t1p_ldr_insn = 0xe59fc004; | |
7197 | static const insn32 a2t2p_add_pc_insn = 0xe08cc00f; | |
7198 | static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c; | |
7199 | ||
07d6d2b8 | 7200 | /* Thumb->ARM: Thumb->(non-interworking aware) ARM |
252b5132 | 7201 | |
07d6d2b8 AM |
7202 | .thumb .thumb |
7203 | .align 2 .align 2 | |
7204 | __func_from_thumb: __func_from_thumb: | |
7205 | bx pc push {r6, lr} | |
7206 | nop ldr r6, __func_addr | |
7207 | .arm mov lr, pc | |
7208 | b func bx r6 | |
99059e56 RM |
7209 | .arm |
7210 | ;; back_to_thumb | |
7211 | ldmia r13! {r6, lr} | |
7212 | bx lr | |
7213 | __func_addr: | |
07d6d2b8 | 7214 | .word func */ |
252b5132 RH |
7215 | |
7216 | #define THUMB2ARM_GLUE_SIZE 8 | |
7217 | static const insn16 t2a1_bx_pc_insn = 0x4778; | |
7218 | static const insn16 t2a2_noop_insn = 0x46c0; | |
7219 | static const insn32 t2a3_b_insn = 0xea000000; | |
7220 | ||
c7b8f16e | 7221 | #define VFP11_ERRATUM_VENEER_SIZE 8 |
a504d23a LA |
7222 | #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16 |
7223 | #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24 | |
c7b8f16e | 7224 | |
845b51d6 PB |
7225 | #define ARM_BX_VENEER_SIZE 12 |
7226 | static const insn32 armbx1_tst_insn = 0xe3100001; | |
7227 | static const insn32 armbx2_moveq_insn = 0x01a0f000; | |
7228 | static const insn32 armbx3_bx_insn = 0xe12fff10; | |
7229 | ||
7e392df6 | 7230 | #ifndef ELFARM_NABI_C_INCLUDED |
8029a119 NC |
7231 | static void |
7232 | arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name) | |
252b5132 RH |
7233 | { |
7234 | asection * s; | |
8029a119 | 7235 | bfd_byte * contents; |
252b5132 | 7236 | |
8029a119 | 7237 | if (size == 0) |
3e6b1042 DJ |
7238 | { |
7239 | /* Do not include empty glue sections in the output. */ | |
7240 | if (abfd != NULL) | |
7241 | { | |
3d4d4302 | 7242 | s = bfd_get_linker_section (abfd, name); |
3e6b1042 DJ |
7243 | if (s != NULL) |
7244 | s->flags |= SEC_EXCLUDE; | |
7245 | } | |
7246 | return; | |
7247 | } | |
252b5132 | 7248 | |
8029a119 | 7249 | BFD_ASSERT (abfd != NULL); |
252b5132 | 7250 | |
3d4d4302 | 7251 | s = bfd_get_linker_section (abfd, name); |
8029a119 | 7252 | BFD_ASSERT (s != NULL); |
252b5132 | 7253 | |
b0f4fbf8 | 7254 | contents = (bfd_byte *) bfd_zalloc (abfd, size); |
252b5132 | 7255 | |
8029a119 NC |
7256 | BFD_ASSERT (s->size == size); |
7257 | s->contents = contents; | |
7258 | } | |
906e58ca | 7259 | |
0a1b45a2 | 7260 | bool |
8029a119 NC |
7261 | bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info) |
7262 | { | |
7263 | struct elf32_arm_link_hash_table * globals; | |
906e58ca | 7264 | |
8029a119 NC |
7265 | globals = elf32_arm_hash_table (info); |
7266 | BFD_ASSERT (globals != NULL); | |
906e58ca | 7267 | |
8029a119 NC |
7268 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
7269 | globals->arm_glue_size, | |
7270 | ARM2THUMB_GLUE_SECTION_NAME); | |
906e58ca | 7271 | |
8029a119 NC |
7272 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
7273 | globals->thumb_glue_size, | |
7274 | THUMB2ARM_GLUE_SECTION_NAME); | |
252b5132 | 7275 | |
8029a119 NC |
7276 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
7277 | globals->vfp11_erratum_glue_size, | |
7278 | VFP11_ERRATUM_VENEER_SECTION_NAME); | |
845b51d6 | 7279 | |
a504d23a LA |
7280 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
7281 | globals->stm32l4xx_erratum_glue_size, | |
7282 | STM32L4XX_ERRATUM_VENEER_SECTION_NAME); | |
7283 | ||
8029a119 NC |
7284 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
7285 | globals->bx_glue_size, | |
845b51d6 PB |
7286 | ARM_BX_GLUE_SECTION_NAME); |
7287 | ||
0a1b45a2 | 7288 | return true; |
252b5132 RH |
7289 | } |
7290 | ||
a4fd1a8e | 7291 | /* Allocate space and symbols for calling a Thumb function from Arm mode. |
906e58ca NC |
7292 | returns the symbol identifying the stub. */ |
7293 | ||
a4fd1a8e | 7294 | static struct elf_link_hash_entry * |
57e8b36a NC |
7295 | record_arm_to_thumb_glue (struct bfd_link_info * link_info, |
7296 | struct elf_link_hash_entry * h) | |
252b5132 RH |
7297 | { |
7298 | const char * name = h->root.root.string; | |
63b0f745 | 7299 | asection * s; |
252b5132 RH |
7300 | char * tmp_name; |
7301 | struct elf_link_hash_entry * myh; | |
14a793b2 | 7302 | struct bfd_link_hash_entry * bh; |
252b5132 | 7303 | struct elf32_arm_link_hash_table * globals; |
dc810e39 | 7304 | bfd_vma val; |
2f475487 | 7305 | bfd_size_type size; |
252b5132 RH |
7306 | |
7307 | globals = elf32_arm_hash_table (link_info); | |
252b5132 RH |
7308 | BFD_ASSERT (globals != NULL); |
7309 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
7310 | ||
3d4d4302 | 7311 | s = bfd_get_linker_section |
252b5132 RH |
7312 | (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME); |
7313 | ||
252b5132 RH |
7314 | BFD_ASSERT (s != NULL); |
7315 | ||
21d799b5 | 7316 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name) |
99059e56 | 7317 | + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1); |
252b5132 RH |
7318 | BFD_ASSERT (tmp_name); |
7319 | ||
7320 | sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name); | |
7321 | ||
7322 | myh = elf_link_hash_lookup | |
0a1b45a2 | 7323 | (&(globals)->root, tmp_name, false, false, true); |
252b5132 RH |
7324 | |
7325 | if (myh != NULL) | |
7326 | { | |
9b485d32 | 7327 | /* We've already seen this guy. */ |
252b5132 | 7328 | free (tmp_name); |
a4fd1a8e | 7329 | return myh; |
252b5132 RH |
7330 | } |
7331 | ||
57e8b36a NC |
7332 | /* The only trick here is using hash_table->arm_glue_size as the value. |
7333 | Even though the section isn't allocated yet, this is where we will be | |
3dccd7b7 DJ |
7334 | putting it. The +1 on the value marks that the stub has not been |
7335 | output yet - not that it is a Thumb function. */ | |
14a793b2 | 7336 | bh = NULL; |
dc810e39 AM |
7337 | val = globals->arm_glue_size + 1; |
7338 | _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner, | |
7339 | tmp_name, BSF_GLOBAL, s, val, | |
0a1b45a2 | 7340 | NULL, true, false, &bh); |
252b5132 | 7341 | |
b7693d02 DJ |
7342 | myh = (struct elf_link_hash_entry *) bh; |
7343 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
7344 | myh->forced_local = 1; | |
7345 | ||
252b5132 RH |
7346 | free (tmp_name); |
7347 | ||
0e1862bb L |
7348 | if (bfd_link_pic (link_info) |
7349 | || globals->root.is_relocatable_executable | |
27e55c4d | 7350 | || globals->pic_veneer) |
2f475487 | 7351 | size = ARM2THUMB_PIC_GLUE_SIZE; |
26079076 PB |
7352 | else if (globals->use_blx) |
7353 | size = ARM2THUMB_V5_STATIC_GLUE_SIZE; | |
8f6277f5 | 7354 | else |
2f475487 AM |
7355 | size = ARM2THUMB_STATIC_GLUE_SIZE; |
7356 | ||
7357 | s->size += size; | |
7358 | globals->arm_glue_size += size; | |
252b5132 | 7359 | |
a4fd1a8e | 7360 | return myh; |
252b5132 RH |
7361 | } |
7362 | ||
845b51d6 PB |
7363 | /* Allocate space for ARMv4 BX veneers. */ |
7364 | ||
7365 | static void | |
7366 | record_arm_bx_glue (struct bfd_link_info * link_info, int reg) | |
7367 | { | |
7368 | asection * s; | |
7369 | struct elf32_arm_link_hash_table *globals; | |
7370 | char *tmp_name; | |
7371 | struct elf_link_hash_entry *myh; | |
7372 | struct bfd_link_hash_entry *bh; | |
7373 | bfd_vma val; | |
7374 | ||
7375 | /* BX PC does not need a veneer. */ | |
7376 | if (reg == 15) | |
7377 | return; | |
7378 | ||
7379 | globals = elf32_arm_hash_table (link_info); | |
845b51d6 PB |
7380 | BFD_ASSERT (globals != NULL); |
7381 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
7382 | ||
7383 | /* Check if this veneer has already been allocated. */ | |
7384 | if (globals->bx_glue_offset[reg]) | |
7385 | return; | |
7386 | ||
3d4d4302 | 7387 | s = bfd_get_linker_section |
845b51d6 PB |
7388 | (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME); |
7389 | ||
7390 | BFD_ASSERT (s != NULL); | |
7391 | ||
7392 | /* Add symbol for veneer. */ | |
21d799b5 NC |
7393 | tmp_name = (char *) |
7394 | bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1); | |
845b51d6 | 7395 | BFD_ASSERT (tmp_name); |
906e58ca | 7396 | |
845b51d6 | 7397 | sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg); |
906e58ca | 7398 | |
845b51d6 | 7399 | myh = elf_link_hash_lookup |
0a1b45a2 | 7400 | (&(globals)->root, tmp_name, false, false, false); |
906e58ca | 7401 | |
845b51d6 | 7402 | BFD_ASSERT (myh == NULL); |
906e58ca | 7403 | |
845b51d6 PB |
7404 | bh = NULL; |
7405 | val = globals->bx_glue_size; | |
7406 | _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner, | |
99059e56 | 7407 | tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val, |
0a1b45a2 | 7408 | NULL, true, false, &bh); |
845b51d6 PB |
7409 | |
7410 | myh = (struct elf_link_hash_entry *) bh; | |
7411 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
7412 | myh->forced_local = 1; | |
7413 | ||
7414 | s->size += ARM_BX_VENEER_SIZE; | |
7415 | globals->bx_glue_offset[reg] = globals->bx_glue_size | 2; | |
7416 | globals->bx_glue_size += ARM_BX_VENEER_SIZE; | |
7417 | } | |
7418 | ||
7419 | ||
c7b8f16e JB |
7420 | /* Add an entry to the code/data map for section SEC. */ |
7421 | ||
7422 | static void | |
7423 | elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma) | |
7424 | { | |
7425 | struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec); | |
7426 | unsigned int newidx; | |
906e58ca | 7427 | |
c7b8f16e JB |
7428 | if (sec_data->map == NULL) |
7429 | { | |
21d799b5 | 7430 | sec_data->map = (elf32_arm_section_map *) |
99059e56 | 7431 | bfd_malloc (sizeof (elf32_arm_section_map)); |
c7b8f16e JB |
7432 | sec_data->mapcount = 0; |
7433 | sec_data->mapsize = 1; | |
7434 | } | |
906e58ca | 7435 | |
c7b8f16e | 7436 | newidx = sec_data->mapcount++; |
906e58ca | 7437 | |
c7b8f16e JB |
7438 | if (sec_data->mapcount > sec_data->mapsize) |
7439 | { | |
7440 | sec_data->mapsize *= 2; | |
21d799b5 | 7441 | sec_data->map = (elf32_arm_section_map *) |
99059e56 RM |
7442 | bfd_realloc_or_free (sec_data->map, sec_data->mapsize |
7443 | * sizeof (elf32_arm_section_map)); | |
515ef31d NC |
7444 | } |
7445 | ||
7446 | if (sec_data->map) | |
7447 | { | |
7448 | sec_data->map[newidx].vma = vma; | |
7449 | sec_data->map[newidx].type = type; | |
c7b8f16e | 7450 | } |
c7b8f16e JB |
7451 | } |
7452 | ||
7453 | ||
7454 | /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode | |
7455 | veneers are handled for now. */ | |
7456 | ||
7457 | static bfd_vma | |
7458 | record_vfp11_erratum_veneer (struct bfd_link_info *link_info, | |
99059e56 RM |
7459 | elf32_vfp11_erratum_list *branch, |
7460 | bfd *branch_bfd, | |
7461 | asection *branch_sec, | |
7462 | unsigned int offset) | |
c7b8f16e JB |
7463 | { |
7464 | asection *s; | |
7465 | struct elf32_arm_link_hash_table *hash_table; | |
7466 | char *tmp_name; | |
7467 | struct elf_link_hash_entry *myh; | |
7468 | struct bfd_link_hash_entry *bh; | |
7469 | bfd_vma val; | |
7470 | struct _arm_elf_section_data *sec_data; | |
c7b8f16e | 7471 | elf32_vfp11_erratum_list *newerr; |
906e58ca | 7472 | |
c7b8f16e | 7473 | hash_table = elf32_arm_hash_table (link_info); |
c7b8f16e JB |
7474 | BFD_ASSERT (hash_table != NULL); |
7475 | BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL); | |
906e58ca | 7476 | |
3d4d4302 | 7477 | s = bfd_get_linker_section |
c7b8f16e | 7478 | (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME); |
906e58ca | 7479 | |
c7b8f16e | 7480 | sec_data = elf32_arm_section_data (s); |
906e58ca | 7481 | |
c7b8f16e | 7482 | BFD_ASSERT (s != NULL); |
906e58ca | 7483 | |
21d799b5 | 7484 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen |
99059e56 | 7485 | (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10); |
c7b8f16e | 7486 | BFD_ASSERT (tmp_name); |
906e58ca | 7487 | |
c7b8f16e JB |
7488 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME, |
7489 | hash_table->num_vfp11_fixes); | |
906e58ca | 7490 | |
c7b8f16e | 7491 | myh = elf_link_hash_lookup |
0a1b45a2 | 7492 | (&(hash_table)->root, tmp_name, false, false, false); |
906e58ca | 7493 | |
c7b8f16e | 7494 | BFD_ASSERT (myh == NULL); |
906e58ca | 7495 | |
c7b8f16e JB |
7496 | bh = NULL; |
7497 | val = hash_table->vfp11_erratum_glue_size; | |
7498 | _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner, | |
99059e56 | 7499 | tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val, |
0a1b45a2 | 7500 | NULL, true, false, &bh); |
c7b8f16e JB |
7501 | |
7502 | myh = (struct elf_link_hash_entry *) bh; | |
7503 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
7504 | myh->forced_local = 1; | |
7505 | ||
7506 | /* Link veneer back to calling location. */ | |
c7e2358a | 7507 | sec_data->erratumcount += 1; |
21d799b5 NC |
7508 | newerr = (elf32_vfp11_erratum_list *) |
7509 | bfd_zmalloc (sizeof (elf32_vfp11_erratum_list)); | |
906e58ca | 7510 | |
c7b8f16e JB |
7511 | newerr->type = VFP11_ERRATUM_ARM_VENEER; |
7512 | newerr->vma = -1; | |
7513 | newerr->u.v.branch = branch; | |
7514 | newerr->u.v.id = hash_table->num_vfp11_fixes; | |
7515 | branch->u.b.veneer = newerr; | |
7516 | ||
7517 | newerr->next = sec_data->erratumlist; | |
7518 | sec_data->erratumlist = newerr; | |
7519 | ||
7520 | /* A symbol for the return from the veneer. */ | |
7521 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r", | |
7522 | hash_table->num_vfp11_fixes); | |
7523 | ||
7524 | myh = elf_link_hash_lookup | |
0a1b45a2 | 7525 | (&(hash_table)->root, tmp_name, false, false, false); |
906e58ca | 7526 | |
c7b8f16e JB |
7527 | if (myh != NULL) |
7528 | abort (); | |
7529 | ||
7530 | bh = NULL; | |
7531 | val = offset + 4; | |
7532 | _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL, | |
0a1b45a2 | 7533 | branch_sec, val, NULL, true, false, &bh); |
906e58ca | 7534 | |
c7b8f16e JB |
7535 | myh = (struct elf_link_hash_entry *) bh; |
7536 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
7537 | myh->forced_local = 1; | |
7538 | ||
7539 | free (tmp_name); | |
906e58ca | 7540 | |
c7b8f16e JB |
7541 | /* Generate a mapping symbol for the veneer section, and explicitly add an |
7542 | entry for that symbol to the code/data map for the section. */ | |
7543 | if (hash_table->vfp11_erratum_glue_size == 0) | |
7544 | { | |
7545 | bh = NULL; | |
7546 | /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it | |
99059e56 | 7547 | ever requires this erratum fix. */ |
c7b8f16e JB |
7548 | _bfd_generic_link_add_one_symbol (link_info, |
7549 | hash_table->bfd_of_glue_owner, "$a", | |
7550 | BSF_LOCAL, s, 0, NULL, | |
0a1b45a2 | 7551 | true, false, &bh); |
c7b8f16e JB |
7552 | |
7553 | myh = (struct elf_link_hash_entry *) bh; | |
7554 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE); | |
7555 | myh->forced_local = 1; | |
906e58ca | 7556 | |
c7b8f16e | 7557 | /* The elf32_arm_init_maps function only cares about symbols from input |
99059e56 RM |
7558 | BFDs. We must make a note of this generated mapping symbol |
7559 | ourselves so that code byteswapping works properly in | |
7560 | elf32_arm_write_section. */ | |
c7b8f16e JB |
7561 | elf32_arm_section_map_add (s, 'a', 0); |
7562 | } | |
906e58ca | 7563 | |
c7b8f16e JB |
7564 | s->size += VFP11_ERRATUM_VENEER_SIZE; |
7565 | hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE; | |
7566 | hash_table->num_vfp11_fixes++; | |
906e58ca | 7567 | |
c7b8f16e JB |
7568 | /* The offset of the veneer. */ |
7569 | return val; | |
7570 | } | |
7571 | ||
a504d23a LA |
7572 | /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode |
7573 | veneers need to be handled because used only in Cortex-M. */ | |
7574 | ||
7575 | static bfd_vma | |
7576 | record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info, | |
7577 | elf32_stm32l4xx_erratum_list *branch, | |
7578 | bfd *branch_bfd, | |
7579 | asection *branch_sec, | |
7580 | unsigned int offset, | |
7581 | bfd_size_type veneer_size) | |
7582 | { | |
7583 | asection *s; | |
7584 | struct elf32_arm_link_hash_table *hash_table; | |
7585 | char *tmp_name; | |
7586 | struct elf_link_hash_entry *myh; | |
7587 | struct bfd_link_hash_entry *bh; | |
7588 | bfd_vma val; | |
7589 | struct _arm_elf_section_data *sec_data; | |
7590 | elf32_stm32l4xx_erratum_list *newerr; | |
7591 | ||
7592 | hash_table = elf32_arm_hash_table (link_info); | |
7593 | BFD_ASSERT (hash_table != NULL); | |
7594 | BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL); | |
7595 | ||
7596 | s = bfd_get_linker_section | |
7597 | (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME); | |
7598 | ||
7599 | BFD_ASSERT (s != NULL); | |
7600 | ||
7601 | sec_data = elf32_arm_section_data (s); | |
7602 | ||
7603 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen | |
7604 | (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10); | |
a504d23a LA |
7605 | BFD_ASSERT (tmp_name); |
7606 | ||
7607 | sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME, | |
7608 | hash_table->num_stm32l4xx_fixes); | |
7609 | ||
7610 | myh = elf_link_hash_lookup | |
0a1b45a2 | 7611 | (&(hash_table)->root, tmp_name, false, false, false); |
a504d23a LA |
7612 | |
7613 | BFD_ASSERT (myh == NULL); | |
7614 | ||
7615 | bh = NULL; | |
7616 | val = hash_table->stm32l4xx_erratum_glue_size; | |
7617 | _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner, | |
7618 | tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val, | |
0a1b45a2 | 7619 | NULL, true, false, &bh); |
a504d23a LA |
7620 | |
7621 | myh = (struct elf_link_hash_entry *) bh; | |
7622 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
7623 | myh->forced_local = 1; | |
7624 | ||
7625 | /* Link veneer back to calling location. */ | |
7626 | sec_data->stm32l4xx_erratumcount += 1; | |
7627 | newerr = (elf32_stm32l4xx_erratum_list *) | |
7628 | bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list)); | |
7629 | ||
7630 | newerr->type = STM32L4XX_ERRATUM_VENEER; | |
7631 | newerr->vma = -1; | |
7632 | newerr->u.v.branch = branch; | |
7633 | newerr->u.v.id = hash_table->num_stm32l4xx_fixes; | |
7634 | branch->u.b.veneer = newerr; | |
7635 | ||
7636 | newerr->next = sec_data->stm32l4xx_erratumlist; | |
7637 | sec_data->stm32l4xx_erratumlist = newerr; | |
7638 | ||
7639 | /* A symbol for the return from the veneer. */ | |
7640 | sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r", | |
7641 | hash_table->num_stm32l4xx_fixes); | |
7642 | ||
7643 | myh = elf_link_hash_lookup | |
0a1b45a2 | 7644 | (&(hash_table)->root, tmp_name, false, false, false); |
a504d23a LA |
7645 | |
7646 | if (myh != NULL) | |
7647 | abort (); | |
7648 | ||
7649 | bh = NULL; | |
7650 | val = offset + 4; | |
7651 | _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL, | |
0a1b45a2 | 7652 | branch_sec, val, NULL, true, false, &bh); |
a504d23a LA |
7653 | |
7654 | myh = (struct elf_link_hash_entry *) bh; | |
7655 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
7656 | myh->forced_local = 1; | |
7657 | ||
7658 | free (tmp_name); | |
7659 | ||
7660 | /* Generate a mapping symbol for the veneer section, and explicitly add an | |
7661 | entry for that symbol to the code/data map for the section. */ | |
7662 | if (hash_table->stm32l4xx_erratum_glue_size == 0) | |
7663 | { | |
7664 | bh = NULL; | |
7665 | /* Creates a THUMB symbol since there is no other choice. */ | |
7666 | _bfd_generic_link_add_one_symbol (link_info, | |
7667 | hash_table->bfd_of_glue_owner, "$t", | |
7668 | BSF_LOCAL, s, 0, NULL, | |
0a1b45a2 | 7669 | true, false, &bh); |
a504d23a LA |
7670 | |
7671 | myh = (struct elf_link_hash_entry *) bh; | |
7672 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE); | |
7673 | myh->forced_local = 1; | |
7674 | ||
7675 | /* The elf32_arm_init_maps function only cares about symbols from input | |
7676 | BFDs. We must make a note of this generated mapping symbol | |
7677 | ourselves so that code byteswapping works properly in | |
7678 | elf32_arm_write_section. */ | |
7679 | elf32_arm_section_map_add (s, 't', 0); | |
7680 | } | |
7681 | ||
7682 | s->size += veneer_size; | |
7683 | hash_table->stm32l4xx_erratum_glue_size += veneer_size; | |
7684 | hash_table->num_stm32l4xx_fixes++; | |
7685 | ||
7686 | /* The offset of the veneer. */ | |
7687 | return val; | |
7688 | } | |
7689 | ||
8029a119 | 7690 | #define ARM_GLUE_SECTION_FLAGS \ |
3e6b1042 DJ |
7691 | (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \ |
7692 | | SEC_READONLY | SEC_LINKER_CREATED) | |
8029a119 NC |
7693 | |
7694 | /* Create a fake section for use by the ARM backend of the linker. */ | |
7695 | ||
0a1b45a2 | 7696 | static bool |
8029a119 NC |
7697 | arm_make_glue_section (bfd * abfd, const char * name) |
7698 | { | |
7699 | asection * sec; | |
7700 | ||
3d4d4302 | 7701 | sec = bfd_get_linker_section (abfd, name); |
8029a119 NC |
7702 | if (sec != NULL) |
7703 | /* Already made. */ | |
0a1b45a2 | 7704 | return true; |
8029a119 | 7705 | |
3d4d4302 | 7706 | sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS); |
8029a119 NC |
7707 | |
7708 | if (sec == NULL | |
fd361982 | 7709 | || !bfd_set_section_alignment (sec, 2)) |
0a1b45a2 | 7710 | return false; |
8029a119 NC |
7711 | |
7712 | /* Set the gc mark to prevent the section from being removed by garbage | |
7713 | collection, despite the fact that no relocs refer to this section. */ | |
7714 | sec->gc_mark = 1; | |
7715 | ||
0a1b45a2 | 7716 | return true; |
8029a119 NC |
7717 | } |
7718 | ||
1db37fe6 YG |
7719 | /* Set size of .plt entries. This function is called from the |
7720 | linker scripts in ld/emultempl/{armelf}.em. */ | |
7721 | ||
7722 | void | |
7723 | bfd_elf32_arm_use_long_plt (void) | |
7724 | { | |
0a1b45a2 | 7725 | elf32_arm_use_long_plt_entry = true; |
1db37fe6 YG |
7726 | } |
7727 | ||
8afb0e02 NC |
7728 | /* Add the glue sections to ABFD. This function is called from the |
7729 | linker scripts in ld/emultempl/{armelf}.em. */ | |
9b485d32 | 7730 | |
0a1b45a2 | 7731 | bool |
57e8b36a NC |
7732 | bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd, |
7733 | struct bfd_link_info *info) | |
252b5132 | 7734 | { |
a504d23a | 7735 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info); |
0a1b45a2 | 7736 | bool dostm32l4xx = globals |
a504d23a | 7737 | && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE; |
0a1b45a2 | 7738 | bool addglue; |
a504d23a | 7739 | |
8afb0e02 NC |
7740 | /* If we are only performing a partial |
7741 | link do not bother adding the glue. */ | |
0e1862bb | 7742 | if (bfd_link_relocatable (info)) |
0a1b45a2 | 7743 | return true; |
252b5132 | 7744 | |
a504d23a | 7745 | addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME) |
8029a119 NC |
7746 | && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME) |
7747 | && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME) | |
7748 | && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME); | |
a504d23a LA |
7749 | |
7750 | if (!dostm32l4xx) | |
7751 | return addglue; | |
7752 | ||
7753 | return addglue | |
7754 | && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME); | |
8afb0e02 NC |
7755 | } |
7756 | ||
daa4adae TP |
7757 | /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This |
7758 | ensures they are not marked for deletion by | |
7759 | strip_excluded_output_sections () when veneers are going to be created | |
7760 | later. Not doing so would trigger assert on empty section size in | |
7761 | lang_size_sections_1 (). */ | |
7762 | ||
7763 | void | |
7764 | bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info) | |
7765 | { | |
7766 | enum elf32_arm_stub_type stub_type; | |
7767 | ||
7768 | /* If we are only performing a partial | |
7769 | link do not bother adding the glue. */ | |
7770 | if (bfd_link_relocatable (info)) | |
7771 | return; | |
7772 | ||
7773 | for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++) | |
7774 | { | |
7775 | asection *out_sec; | |
7776 | const char *out_sec_name; | |
7777 | ||
7778 | if (!arm_dedicated_stub_output_section_required (stub_type)) | |
7779 | continue; | |
7780 | ||
7781 | out_sec_name = arm_dedicated_stub_output_section_name (stub_type); | |
7782 | out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name); | |
7783 | if (out_sec != NULL) | |
7784 | out_sec->flags |= SEC_KEEP; | |
7785 | } | |
7786 | } | |
7787 | ||
8afb0e02 NC |
7788 | /* Select a BFD to be used to hold the sections used by the glue code. |
7789 | This function is called from the linker scripts in ld/emultempl/ | |
8029a119 | 7790 | {armelf/pe}.em. */ |
8afb0e02 | 7791 | |
0a1b45a2 | 7792 | bool |
57e8b36a | 7793 | bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info) |
8afb0e02 NC |
7794 | { |
7795 | struct elf32_arm_link_hash_table *globals; | |
7796 | ||
7797 | /* If we are only performing a partial link | |
7798 | do not bother getting a bfd to hold the glue. */ | |
0e1862bb | 7799 | if (bfd_link_relocatable (info)) |
0a1b45a2 | 7800 | return true; |
8afb0e02 | 7801 | |
b7693d02 DJ |
7802 | /* Make sure we don't attach the glue sections to a dynamic object. */ |
7803 | BFD_ASSERT (!(abfd->flags & DYNAMIC)); | |
7804 | ||
8afb0e02 | 7805 | globals = elf32_arm_hash_table (info); |
8afb0e02 NC |
7806 | BFD_ASSERT (globals != NULL); |
7807 | ||
7808 | if (globals->bfd_of_glue_owner != NULL) | |
0a1b45a2 | 7809 | return true; |
8afb0e02 | 7810 | |
252b5132 RH |
7811 | /* Save the bfd for later use. */ |
7812 | globals->bfd_of_glue_owner = abfd; | |
cedb70c5 | 7813 | |
0a1b45a2 | 7814 | return true; |
252b5132 RH |
7815 | } |
7816 | ||
906e58ca NC |
7817 | static void |
7818 | check_use_blx (struct elf32_arm_link_hash_table *globals) | |
39b41c9c | 7819 | { |
2de70689 MGD |
7820 | int cpu_arch; |
7821 | ||
b38cadfb | 7822 | cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, |
2de70689 MGD |
7823 | Tag_CPU_arch); |
7824 | ||
7825 | if (globals->fix_arm1176) | |
7826 | { | |
7827 | if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K) | |
7828 | globals->use_blx = 1; | |
7829 | } | |
7830 | else | |
7831 | { | |
7832 | if (cpu_arch > TAG_CPU_ARCH_V4T) | |
7833 | globals->use_blx = 1; | |
7834 | } | |
39b41c9c PB |
7835 | } |
7836 | ||
0a1b45a2 | 7837 | bool |
57e8b36a | 7838 | bfd_elf32_arm_process_before_allocation (bfd *abfd, |
d504ffc8 | 7839 | struct bfd_link_info *link_info) |
252b5132 RH |
7840 | { |
7841 | Elf_Internal_Shdr *symtab_hdr; | |
6cdc0ccc | 7842 | Elf_Internal_Rela *internal_relocs = NULL; |
252b5132 RH |
7843 | Elf_Internal_Rela *irel, *irelend; |
7844 | bfd_byte *contents = NULL; | |
252b5132 RH |
7845 | |
7846 | asection *sec; | |
7847 | struct elf32_arm_link_hash_table *globals; | |
7848 | ||
7849 | /* If we are only performing a partial link do not bother | |
7850 | to construct any glue. */ | |
0e1862bb | 7851 | if (bfd_link_relocatable (link_info)) |
0a1b45a2 | 7852 | return true; |
252b5132 | 7853 | |
39ce1a6a NC |
7854 | /* Here we have a bfd that is to be included on the link. We have a |
7855 | hook to do reloc rummaging, before section sizes are nailed down. */ | |
252b5132 | 7856 | globals = elf32_arm_hash_table (link_info); |
252b5132 | 7857 | BFD_ASSERT (globals != NULL); |
39ce1a6a NC |
7858 | |
7859 | check_use_blx (globals); | |
252b5132 | 7860 | |
d504ffc8 | 7861 | if (globals->byteswap_code && !bfd_big_endian (abfd)) |
e489d0ae | 7862 | { |
90b6238f | 7863 | _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode"), |
d003868e | 7864 | abfd); |
0a1b45a2 | 7865 | return false; |
e489d0ae | 7866 | } |
f21f3fe0 | 7867 | |
39ce1a6a NC |
7868 | /* PR 5398: If we have not decided to include any loadable sections in |
7869 | the output then we will not have a glue owner bfd. This is OK, it | |
7870 | just means that there is nothing else for us to do here. */ | |
7871 | if (globals->bfd_of_glue_owner == NULL) | |
0a1b45a2 | 7872 | return true; |
39ce1a6a | 7873 | |
252b5132 RH |
7874 | /* Rummage around all the relocs and map the glue vectors. */ |
7875 | sec = abfd->sections; | |
7876 | ||
7877 | if (sec == NULL) | |
0a1b45a2 | 7878 | return true; |
252b5132 RH |
7879 | |
7880 | for (; sec != NULL; sec = sec->next) | |
7881 | { | |
7882 | if (sec->reloc_count == 0) | |
7883 | continue; | |
7884 | ||
2f475487 AM |
7885 | if ((sec->flags & SEC_EXCLUDE) != 0) |
7886 | continue; | |
7887 | ||
0ffa91dd | 7888 | symtab_hdr = & elf_symtab_hdr (abfd); |
252b5132 | 7889 | |
9b485d32 | 7890 | /* Load the relocs. */ |
6cdc0ccc | 7891 | internal_relocs |
0a1b45a2 | 7892 | = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, false); |
252b5132 | 7893 | |
6cdc0ccc AM |
7894 | if (internal_relocs == NULL) |
7895 | goto error_return; | |
252b5132 | 7896 | |
6cdc0ccc AM |
7897 | irelend = internal_relocs + sec->reloc_count; |
7898 | for (irel = internal_relocs; irel < irelend; irel++) | |
252b5132 RH |
7899 | { |
7900 | long r_type; | |
7901 | unsigned long r_index; | |
252b5132 RH |
7902 | |
7903 | struct elf_link_hash_entry *h; | |
7904 | ||
7905 | r_type = ELF32_R_TYPE (irel->r_info); | |
7906 | r_index = ELF32_R_SYM (irel->r_info); | |
7907 | ||
9b485d32 | 7908 | /* These are the only relocation types we care about. */ |
ba96a88f | 7909 | if ( r_type != R_ARM_PC24 |
845b51d6 | 7910 | && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2)) |
252b5132 RH |
7911 | continue; |
7912 | ||
7913 | /* Get the section contents if we haven't done so already. */ | |
7914 | if (contents == NULL) | |
7915 | { | |
7916 | /* Get cached copy if it exists. */ | |
7917 | if (elf_section_data (sec)->this_hdr.contents != NULL) | |
7918 | contents = elf_section_data (sec)->this_hdr.contents; | |
7919 | else | |
7920 | { | |
7921 | /* Go get them off disk. */ | |
57e8b36a | 7922 | if (! bfd_malloc_and_get_section (abfd, sec, &contents)) |
252b5132 RH |
7923 | goto error_return; |
7924 | } | |
7925 | } | |
7926 | ||
845b51d6 PB |
7927 | if (r_type == R_ARM_V4BX) |
7928 | { | |
7929 | int reg; | |
7930 | ||
7931 | reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf; | |
7932 | record_arm_bx_glue (link_info, reg); | |
7933 | continue; | |
7934 | } | |
7935 | ||
a7c10850 | 7936 | /* If the relocation is not against a symbol it cannot concern us. */ |
252b5132 RH |
7937 | h = NULL; |
7938 | ||
9b485d32 | 7939 | /* We don't care about local symbols. */ |
252b5132 RH |
7940 | if (r_index < symtab_hdr->sh_info) |
7941 | continue; | |
7942 | ||
9b485d32 | 7943 | /* This is an external symbol. */ |
252b5132 RH |
7944 | r_index -= symtab_hdr->sh_info; |
7945 | h = (struct elf_link_hash_entry *) | |
7946 | elf_sym_hashes (abfd)[r_index]; | |
7947 | ||
7948 | /* If the relocation is against a static symbol it must be within | |
7949 | the current section and so cannot be a cross ARM/Thumb relocation. */ | |
7950 | if (h == NULL) | |
7951 | continue; | |
7952 | ||
d504ffc8 DJ |
7953 | /* If the call will go through a PLT entry then we do not need |
7954 | glue. */ | |
362d30a1 | 7955 | if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1) |
b7693d02 DJ |
7956 | continue; |
7957 | ||
252b5132 RH |
7958 | switch (r_type) |
7959 | { | |
7960 | case R_ARM_PC24: | |
7961 | /* This one is a call from arm code. We need to look up | |
99059e56 RM |
7962 | the target of the call. If it is a thumb target, we |
7963 | insert glue. */ | |
39d911fc TP |
7964 | if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal) |
7965 | == ST_BRANCH_TO_THUMB) | |
252b5132 RH |
7966 | record_arm_to_thumb_glue (link_info, h); |
7967 | break; | |
7968 | ||
252b5132 | 7969 | default: |
c6596c5e | 7970 | abort (); |
252b5132 RH |
7971 | } |
7972 | } | |
6cdc0ccc | 7973 | |
c9594989 | 7974 | if (elf_section_data (sec)->this_hdr.contents != contents) |
6cdc0ccc AM |
7975 | free (contents); |
7976 | contents = NULL; | |
7977 | ||
c9594989 | 7978 | if (elf_section_data (sec)->relocs != internal_relocs) |
6cdc0ccc AM |
7979 | free (internal_relocs); |
7980 | internal_relocs = NULL; | |
252b5132 RH |
7981 | } |
7982 | ||
0a1b45a2 | 7983 | return true; |
9a5aca8c | 7984 | |
dc1e8a47 | 7985 | error_return: |
c9594989 | 7986 | if (elf_section_data (sec)->this_hdr.contents != contents) |
6cdc0ccc | 7987 | free (contents); |
c9594989 | 7988 | if (elf_section_data (sec)->relocs != internal_relocs) |
6cdc0ccc | 7989 | free (internal_relocs); |
9a5aca8c | 7990 | |
0a1b45a2 | 7991 | return false; |
252b5132 | 7992 | } |
7e392df6 | 7993 | #endif |
252b5132 | 7994 | |
eb043451 | 7995 | |
c7b8f16e JB |
7996 | /* Initialise maps of ARM/Thumb/data for input BFDs. */ |
7997 | ||
7998 | void | |
7999 | bfd_elf32_arm_init_maps (bfd *abfd) | |
8000 | { | |
8001 | Elf_Internal_Sym *isymbuf; | |
8002 | Elf_Internal_Shdr *hdr; | |
8003 | unsigned int i, localsyms; | |
8004 | ||
af1f4419 NC |
8005 | /* PR 7093: Make sure that we are dealing with an arm elf binary. */ |
8006 | if (! is_arm_elf (abfd)) | |
8007 | return; | |
8008 | ||
c7b8f16e JB |
8009 | if ((abfd->flags & DYNAMIC) != 0) |
8010 | return; | |
8011 | ||
0ffa91dd | 8012 | hdr = & elf_symtab_hdr (abfd); |
c7b8f16e JB |
8013 | localsyms = hdr->sh_info; |
8014 | ||
8015 | /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field | |
8016 | should contain the number of local symbols, which should come before any | |
8017 | global symbols. Mapping symbols are always local. */ | |
8018 | isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL, | |
8019 | NULL); | |
8020 | ||
8021 | /* No internal symbols read? Skip this BFD. */ | |
8022 | if (isymbuf == NULL) | |
8023 | return; | |
8024 | ||
8025 | for (i = 0; i < localsyms; i++) | |
8026 | { | |
8027 | Elf_Internal_Sym *isym = &isymbuf[i]; | |
8028 | asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx); | |
8029 | const char *name; | |
906e58ca | 8030 | |
c7b8f16e | 8031 | if (sec != NULL |
99059e56 RM |
8032 | && ELF_ST_BIND (isym->st_info) == STB_LOCAL) |
8033 | { | |
8034 | name = bfd_elf_string_from_elf_section (abfd, | |
8035 | hdr->sh_link, isym->st_name); | |
906e58ca | 8036 | |
99059e56 | 8037 | if (bfd_is_arm_special_symbol_name (name, |
c7b8f16e | 8038 | BFD_ARM_SPECIAL_SYM_TYPE_MAP)) |
99059e56 RM |
8039 | elf32_arm_section_map_add (sec, name[1], isym->st_value); |
8040 | } | |
c7b8f16e JB |
8041 | } |
8042 | } | |
8043 | ||
8044 | ||
48229727 JB |
8045 | /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly |
8046 | say what they wanted. */ | |
8047 | ||
8048 | void | |
8049 | bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info) | |
8050 | { | |
8051 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); | |
8052 | obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd); | |
8053 | ||
4dfe6ac6 NC |
8054 | if (globals == NULL) |
8055 | return; | |
8056 | ||
48229727 JB |
8057 | if (globals->fix_cortex_a8 == -1) |
8058 | { | |
8059 | /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */ | |
8060 | if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7 | |
8061 | && (out_attr[Tag_CPU_arch_profile].i == 'A' | |
8062 | || out_attr[Tag_CPU_arch_profile].i == 0)) | |
8063 | globals->fix_cortex_a8 = 1; | |
8064 | else | |
8065 | globals->fix_cortex_a8 = 0; | |
8066 | } | |
8067 | } | |
8068 | ||
8069 | ||
c7b8f16e JB |
8070 | void |
8071 | bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info) | |
8072 | { | |
8073 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); | |
104d59d1 | 8074 | obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd); |
906e58ca | 8075 | |
4dfe6ac6 NC |
8076 | if (globals == NULL) |
8077 | return; | |
c7b8f16e JB |
8078 | /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */ |
8079 | if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7) | |
8080 | { | |
8081 | switch (globals->vfp11_fix) | |
99059e56 RM |
8082 | { |
8083 | case BFD_ARM_VFP11_FIX_DEFAULT: | |
8084 | case BFD_ARM_VFP11_FIX_NONE: | |
8085 | globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE; | |
8086 | break; | |
8087 | ||
8088 | default: | |
8089 | /* Give a warning, but do as the user requests anyway. */ | |
871b3ab2 | 8090 | _bfd_error_handler (_("%pB: warning: selected VFP11 erratum " |
99059e56 RM |
8091 | "workaround is not necessary for target architecture"), obfd); |
8092 | } | |
c7b8f16e JB |
8093 | } |
8094 | else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT) | |
8095 | /* For earlier architectures, we might need the workaround, but do not | |
8096 | enable it by default. If users is running with broken hardware, they | |
8097 | must enable the erratum fix explicitly. */ | |
8098 | globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE; | |
8099 | } | |
8100 | ||
a504d23a LA |
8101 | void |
8102 | bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info) | |
8103 | { | |
8104 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); | |
8105 | obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd); | |
8106 | ||
8107 | if (globals == NULL) | |
8108 | return; | |
8109 | ||
8110 | /* We assume only Cortex-M4 may require the fix. */ | |
8111 | if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M | |
8112 | || out_attr[Tag_CPU_arch_profile].i != 'M') | |
8113 | { | |
8114 | if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE) | |
8115 | /* Give a warning, but do as the user requests anyway. */ | |
4eca0228 | 8116 | _bfd_error_handler |
871b3ab2 | 8117 | (_("%pB: warning: selected STM32L4XX erratum " |
a504d23a LA |
8118 | "workaround is not necessary for target architecture"), obfd); |
8119 | } | |
8120 | } | |
c7b8f16e | 8121 | |
906e58ca NC |
8122 | enum bfd_arm_vfp11_pipe |
8123 | { | |
c7b8f16e JB |
8124 | VFP11_FMAC, |
8125 | VFP11_LS, | |
8126 | VFP11_DS, | |
8127 | VFP11_BAD | |
8128 | }; | |
8129 | ||
8130 | /* Return a VFP register number. This is encoded as RX:X for single-precision | |
8131 | registers, or X:RX for double-precision registers, where RX is the group of | |
8132 | four bits in the instruction encoding and X is the single extension bit. | |
8133 | RX and X fields are specified using their lowest (starting) bit. The return | |
8134 | value is: | |
8135 | ||
8136 | 0...31: single-precision registers s0...s31 | |
8137 | 32...63: double-precision registers d0...d31. | |
906e58ca | 8138 | |
c7b8f16e JB |
8139 | Although X should be zero for VFP11 (encoding d0...d15 only), we might |
8140 | encounter VFP3 instructions, so we allow the full range for DP registers. */ | |
906e58ca | 8141 | |
c7b8f16e | 8142 | static unsigned int |
0a1b45a2 | 8143 | bfd_arm_vfp11_regno (unsigned int insn, bool is_double, unsigned int rx, |
99059e56 | 8144 | unsigned int x) |
c7b8f16e JB |
8145 | { |
8146 | if (is_double) | |
8147 | return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32; | |
8148 | else | |
8149 | return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1); | |
8150 | } | |
8151 | ||
8152 | /* Set bits in *WMASK according to a register number REG as encoded by | |
8153 | bfd_arm_vfp11_regno(). Ignore d16-d31. */ | |
8154 | ||
8155 | static void | |
8156 | bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg) | |
8157 | { | |
8158 | if (reg < 32) | |
8159 | *wmask |= 1 << reg; | |
8160 | else if (reg < 48) | |
8161 | *wmask |= 3 << ((reg - 32) * 2); | |
8162 | } | |
8163 | ||
8164 | /* Return TRUE if WMASK overwrites anything in REGS. */ | |
8165 | ||
0a1b45a2 | 8166 | static bool |
c7b8f16e JB |
8167 | bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs) |
8168 | { | |
8169 | int i; | |
906e58ca | 8170 | |
c7b8f16e JB |
8171 | for (i = 0; i < numregs; i++) |
8172 | { | |
8173 | unsigned int reg = regs[i]; | |
8174 | ||
8175 | if (reg < 32 && (wmask & (1 << reg)) != 0) | |
0a1b45a2 | 8176 | return true; |
906e58ca | 8177 | |
c7b8f16e JB |
8178 | reg -= 32; |
8179 | ||
8180 | if (reg >= 16) | |
99059e56 | 8181 | continue; |
906e58ca | 8182 | |
c7b8f16e | 8183 | if ((wmask & (3 << (reg * 2))) != 0) |
0a1b45a2 | 8184 | return true; |
c7b8f16e | 8185 | } |
906e58ca | 8186 | |
0a1b45a2 | 8187 | return false; |
c7b8f16e JB |
8188 | } |
8189 | ||
8190 | /* In this function, we're interested in two things: finding input registers | |
8191 | for VFP data-processing instructions, and finding the set of registers which | |
8192 | arbitrary VFP instructions may write to. We use a 32-bit unsigned int to | |
8193 | hold the written set, so FLDM etc. are easy to deal with (we're only | |
8194 | interested in 32 SP registers or 16 dp registers, due to the VFP version | |
8195 | implemented by the chip in question). DP registers are marked by setting | |
8196 | both SP registers in the write mask). */ | |
8197 | ||
8198 | static enum bfd_arm_vfp11_pipe | |
8199 | bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs, | |
99059e56 | 8200 | int *numregs) |
c7b8f16e | 8201 | { |
91d6fa6a | 8202 | enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD; |
0a1b45a2 | 8203 | bool is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0; |
c7b8f16e JB |
8204 | |
8205 | if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */ | |
8206 | { | |
8207 | unsigned int pqrs; | |
8208 | unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22); | |
8209 | unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5); | |
8210 | ||
8211 | pqrs = ((insn & 0x00800000) >> 20) | |
99059e56 RM |
8212 | | ((insn & 0x00300000) >> 19) |
8213 | | ((insn & 0x00000040) >> 6); | |
c7b8f16e JB |
8214 | |
8215 | switch (pqrs) | |
99059e56 RM |
8216 | { |
8217 | case 0: /* fmac[sd]. */ | |
8218 | case 1: /* fnmac[sd]. */ | |
8219 | case 2: /* fmsc[sd]. */ | |
8220 | case 3: /* fnmsc[sd]. */ | |
8221 | vpipe = VFP11_FMAC; | |
8222 | bfd_arm_vfp11_write_mask (destmask, fd); | |
8223 | regs[0] = fd; | |
8224 | regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */ | |
8225 | regs[2] = fm; | |
8226 | *numregs = 3; | |
8227 | break; | |
8228 | ||
8229 | case 4: /* fmul[sd]. */ | |
8230 | case 5: /* fnmul[sd]. */ | |
8231 | case 6: /* fadd[sd]. */ | |
8232 | case 7: /* fsub[sd]. */ | |
8233 | vpipe = VFP11_FMAC; | |
8234 | goto vfp_binop; | |
8235 | ||
8236 | case 8: /* fdiv[sd]. */ | |
8237 | vpipe = VFP11_DS; | |
8238 | vfp_binop: | |
8239 | bfd_arm_vfp11_write_mask (destmask, fd); | |
8240 | regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */ | |
8241 | regs[1] = fm; | |
8242 | *numregs = 2; | |
8243 | break; | |
8244 | ||
8245 | case 15: /* extended opcode. */ | |
8246 | { | |
8247 | unsigned int extn = ((insn >> 15) & 0x1e) | |
8248 | | ((insn >> 7) & 1); | |
8249 | ||
8250 | switch (extn) | |
8251 | { | |
8252 | case 0: /* fcpy[sd]. */ | |
8253 | case 1: /* fabs[sd]. */ | |
8254 | case 2: /* fneg[sd]. */ | |
8255 | case 8: /* fcmp[sd]. */ | |
8256 | case 9: /* fcmpe[sd]. */ | |
8257 | case 10: /* fcmpz[sd]. */ | |
8258 | case 11: /* fcmpez[sd]. */ | |
8259 | case 16: /* fuito[sd]. */ | |
8260 | case 17: /* fsito[sd]. */ | |
8261 | case 24: /* ftoui[sd]. */ | |
8262 | case 25: /* ftouiz[sd]. */ | |
8263 | case 26: /* ftosi[sd]. */ | |
8264 | case 27: /* ftosiz[sd]. */ | |
8265 | /* These instructions will not bounce due to underflow. */ | |
8266 | *numregs = 0; | |
8267 | vpipe = VFP11_FMAC; | |
8268 | break; | |
8269 | ||
8270 | case 3: /* fsqrt[sd]. */ | |
8271 | /* fsqrt cannot underflow, but it can (perhaps) overwrite | |
8272 | registers to cause the erratum in previous instructions. */ | |
8273 | bfd_arm_vfp11_write_mask (destmask, fd); | |
8274 | vpipe = VFP11_DS; | |
8275 | break; | |
8276 | ||
8277 | case 15: /* fcvt{ds,sd}. */ | |
8278 | { | |
8279 | int rnum = 0; | |
8280 | ||
8281 | bfd_arm_vfp11_write_mask (destmask, fd); | |
c7b8f16e JB |
8282 | |
8283 | /* Only FCVTSD can underflow. */ | |
99059e56 RM |
8284 | if ((insn & 0x100) != 0) |
8285 | regs[rnum++] = fm; | |
c7b8f16e | 8286 | |
99059e56 | 8287 | *numregs = rnum; |
c7b8f16e | 8288 | |
99059e56 RM |
8289 | vpipe = VFP11_FMAC; |
8290 | } | |
8291 | break; | |
c7b8f16e | 8292 | |
99059e56 RM |
8293 | default: |
8294 | return VFP11_BAD; | |
8295 | } | |
8296 | } | |
8297 | break; | |
c7b8f16e | 8298 | |
99059e56 RM |
8299 | default: |
8300 | return VFP11_BAD; | |
8301 | } | |
c7b8f16e JB |
8302 | } |
8303 | /* Two-register transfer. */ | |
8304 | else if ((insn & 0x0fe00ed0) == 0x0c400a10) | |
8305 | { | |
8306 | unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5); | |
906e58ca | 8307 | |
c7b8f16e JB |
8308 | if ((insn & 0x100000) == 0) |
8309 | { | |
99059e56 RM |
8310 | if (is_double) |
8311 | bfd_arm_vfp11_write_mask (destmask, fm); | |
8312 | else | |
8313 | { | |
8314 | bfd_arm_vfp11_write_mask (destmask, fm); | |
8315 | bfd_arm_vfp11_write_mask (destmask, fm + 1); | |
8316 | } | |
c7b8f16e JB |
8317 | } |
8318 | ||
91d6fa6a | 8319 | vpipe = VFP11_LS; |
c7b8f16e JB |
8320 | } |
8321 | else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */ | |
8322 | { | |
8323 | int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22); | |
8324 | unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1); | |
906e58ca | 8325 | |
c7b8f16e | 8326 | switch (puw) |
99059e56 RM |
8327 | { |
8328 | case 0: /* Two-reg transfer. We should catch these above. */ | |
8329 | abort (); | |
906e58ca | 8330 | |
99059e56 RM |
8331 | case 2: /* fldm[sdx]. */ |
8332 | case 3: | |
8333 | case 5: | |
8334 | { | |
8335 | unsigned int i, offset = insn & 0xff; | |
c7b8f16e | 8336 | |
99059e56 RM |
8337 | if (is_double) |
8338 | offset >>= 1; | |
c7b8f16e | 8339 | |
99059e56 RM |
8340 | for (i = fd; i < fd + offset; i++) |
8341 | bfd_arm_vfp11_write_mask (destmask, i); | |
8342 | } | |
8343 | break; | |
906e58ca | 8344 | |
99059e56 RM |
8345 | case 4: /* fld[sd]. */ |
8346 | case 6: | |
8347 | bfd_arm_vfp11_write_mask (destmask, fd); | |
8348 | break; | |
906e58ca | 8349 | |
99059e56 RM |
8350 | default: |
8351 | return VFP11_BAD; | |
8352 | } | |
c7b8f16e | 8353 | |
91d6fa6a | 8354 | vpipe = VFP11_LS; |
c7b8f16e JB |
8355 | } |
8356 | /* Single-register transfer. Note L==0. */ | |
8357 | else if ((insn & 0x0f100e10) == 0x0e000a10) | |
8358 | { | |
8359 | unsigned int opcode = (insn >> 21) & 7; | |
8360 | unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7); | |
8361 | ||
8362 | switch (opcode) | |
99059e56 RM |
8363 | { |
8364 | case 0: /* fmsr/fmdlr. */ | |
8365 | case 1: /* fmdhr. */ | |
8366 | /* Mark fmdhr and fmdlr as writing to the whole of the DP | |
8367 | destination register. I don't know if this is exactly right, | |
8368 | but it is the conservative choice. */ | |
8369 | bfd_arm_vfp11_write_mask (destmask, fn); | |
8370 | break; | |
8371 | ||
8372 | case 7: /* fmxr. */ | |
8373 | break; | |
8374 | } | |
c7b8f16e | 8375 | |
91d6fa6a | 8376 | vpipe = VFP11_LS; |
c7b8f16e JB |
8377 | } |
8378 | ||
91d6fa6a | 8379 | return vpipe; |
c7b8f16e JB |
8380 | } |
8381 | ||
8382 | ||
8383 | static int elf32_arm_compare_mapping (const void * a, const void * b); | |
8384 | ||
8385 | ||
8386 | /* Look for potentially-troublesome code sequences which might trigger the | |
8387 | VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet | |
8388 | (available from ARM) for details of the erratum. A short version is | |
8389 | described in ld.texinfo. */ | |
8390 | ||
0a1b45a2 | 8391 | bool |
c7b8f16e JB |
8392 | bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info) |
8393 | { | |
8394 | asection *sec; | |
8395 | bfd_byte *contents = NULL; | |
8396 | int state = 0; | |
8397 | int regs[3], numregs = 0; | |
8398 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); | |
8399 | int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR); | |
906e58ca | 8400 | |
4dfe6ac6 | 8401 | if (globals == NULL) |
0a1b45a2 | 8402 | return false; |
4dfe6ac6 | 8403 | |
c7b8f16e JB |
8404 | /* We use a simple FSM to match troublesome VFP11 instruction sequences. |
8405 | The states transition as follows: | |
906e58ca | 8406 | |
c7b8f16e | 8407 | 0 -> 1 (vector) or 0 -> 2 (scalar) |
99059e56 RM |
8408 | A VFP FMAC-pipeline instruction has been seen. Fill |
8409 | regs[0]..regs[numregs-1] with its input operands. Remember this | |
8410 | instruction in 'first_fmac'. | |
c7b8f16e JB |
8411 | |
8412 | 1 -> 2 | |
99059e56 RM |
8413 | Any instruction, except for a VFP instruction which overwrites |
8414 | regs[*]. | |
906e58ca | 8415 | |
c7b8f16e JB |
8416 | 1 -> 3 [ -> 0 ] or |
8417 | 2 -> 3 [ -> 0 ] | |
99059e56 RM |
8418 | A VFP instruction has been seen which overwrites any of regs[*]. |
8419 | We must make a veneer! Reset state to 0 before examining next | |
8420 | instruction. | |
906e58ca | 8421 | |
c7b8f16e | 8422 | 2 -> 0 |
99059e56 RM |
8423 | If we fail to match anything in state 2, reset to state 0 and reset |
8424 | the instruction pointer to the instruction after 'first_fmac'. | |
c7b8f16e JB |
8425 | |
8426 | If the VFP11 vector mode is in use, there must be at least two unrelated | |
8427 | instructions between anti-dependent VFP11 instructions to properly avoid | |
906e58ca | 8428 | triggering the erratum, hence the use of the extra state 1. */ |
c7b8f16e JB |
8429 | |
8430 | /* If we are only performing a partial link do not bother | |
8431 | to construct any glue. */ | |
0e1862bb | 8432 | if (bfd_link_relocatable (link_info)) |
0a1b45a2 | 8433 | return true; |
c7b8f16e | 8434 | |
0ffa91dd NC |
8435 | /* Skip if this bfd does not correspond to an ELF image. */ |
8436 | if (! is_arm_elf (abfd)) | |
0a1b45a2 | 8437 | return true; |
906e58ca | 8438 | |
c7b8f16e JB |
8439 | /* We should have chosen a fix type by the time we get here. */ |
8440 | BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT); | |
8441 | ||
8442 | if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE) | |
0a1b45a2 | 8443 | return true; |
2e6030b9 | 8444 | |
33a7ffc2 JM |
8445 | /* Skip this BFD if it corresponds to an executable or dynamic object. */ |
8446 | if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0) | |
0a1b45a2 | 8447 | return true; |
33a7ffc2 | 8448 | |
c7b8f16e JB |
8449 | for (sec = abfd->sections; sec != NULL; sec = sec->next) |
8450 | { | |
8451 | unsigned int i, span, first_fmac = 0, veneer_of_insn = 0; | |
8452 | struct _arm_elf_section_data *sec_data; | |
8453 | ||
8454 | /* If we don't have executable progbits, we're not interested in this | |
99059e56 | 8455 | section. Also skip if section is to be excluded. */ |
c7b8f16e | 8456 | if (elf_section_type (sec) != SHT_PROGBITS |
99059e56 RM |
8457 | || (elf_section_flags (sec) & SHF_EXECINSTR) == 0 |
8458 | || (sec->flags & SEC_EXCLUDE) != 0 | |
dbaa2011 | 8459 | || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS |
33a7ffc2 | 8460 | || sec->output_section == bfd_abs_section_ptr |
99059e56 RM |
8461 | || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0) |
8462 | continue; | |
c7b8f16e JB |
8463 | |
8464 | sec_data = elf32_arm_section_data (sec); | |
906e58ca | 8465 | |
c7b8f16e | 8466 | if (sec_data->mapcount == 0) |
99059e56 | 8467 | continue; |
906e58ca | 8468 | |
c7b8f16e JB |
8469 | if (elf_section_data (sec)->this_hdr.contents != NULL) |
8470 | contents = elf_section_data (sec)->this_hdr.contents; | |
8471 | else if (! bfd_malloc_and_get_section (abfd, sec, &contents)) | |
8472 | goto error_return; | |
8473 | ||
8474 | qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map), | |
8475 | elf32_arm_compare_mapping); | |
8476 | ||
8477 | for (span = 0; span < sec_data->mapcount; span++) | |
99059e56 RM |
8478 | { |
8479 | unsigned int span_start = sec_data->map[span].vma; | |
8480 | unsigned int span_end = (span == sec_data->mapcount - 1) | |
c7b8f16e | 8481 | ? sec->size : sec_data->map[span + 1].vma; |
99059e56 RM |
8482 | char span_type = sec_data->map[span].type; |
8483 | ||
8484 | /* FIXME: Only ARM mode is supported at present. We may need to | |
8485 | support Thumb-2 mode also at some point. */ | |
8486 | if (span_type != 'a') | |
8487 | continue; | |
8488 | ||
8489 | for (i = span_start; i < span_end;) | |
8490 | { | |
8491 | unsigned int next_i = i + 4; | |
8492 | unsigned int insn = bfd_big_endian (abfd) | |
13c9c485 AM |
8493 | ? (((unsigned) contents[i] << 24) |
8494 | | (contents[i + 1] << 16) | |
8495 | | (contents[i + 2] << 8) | |
8496 | | contents[i + 3]) | |
8497 | : (((unsigned) contents[i + 3] << 24) | |
8498 | | (contents[i + 2] << 16) | |
8499 | | (contents[i + 1] << 8) | |
8500 | | contents[i]); | |
99059e56 RM |
8501 | unsigned int writemask = 0; |
8502 | enum bfd_arm_vfp11_pipe vpipe; | |
8503 | ||
8504 | switch (state) | |
8505 | { | |
8506 | case 0: | |
8507 | vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs, | |
8508 | &numregs); | |
8509 | /* I'm assuming the VFP11 erratum can trigger with denorm | |
8510 | operands on either the FMAC or the DS pipeline. This might | |
8511 | lead to slightly overenthusiastic veneer insertion. */ | |
8512 | if (vpipe == VFP11_FMAC || vpipe == VFP11_DS) | |
8513 | { | |
8514 | state = use_vector ? 1 : 2; | |
8515 | first_fmac = i; | |
8516 | veneer_of_insn = insn; | |
8517 | } | |
8518 | break; | |
8519 | ||
8520 | case 1: | |
8521 | { | |
8522 | int other_regs[3], other_numregs; | |
8523 | vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, | |
c7b8f16e | 8524 | other_regs, |
99059e56 RM |
8525 | &other_numregs); |
8526 | if (vpipe != VFP11_BAD | |
8527 | && bfd_arm_vfp11_antidependency (writemask, regs, | |
c7b8f16e | 8528 | numregs)) |
99059e56 RM |
8529 | state = 3; |
8530 | else | |
8531 | state = 2; | |
8532 | } | |
8533 | break; | |
8534 | ||
8535 | case 2: | |
8536 | { | |
8537 | int other_regs[3], other_numregs; | |
8538 | vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, | |
c7b8f16e | 8539 | other_regs, |
99059e56 RM |
8540 | &other_numregs); |
8541 | if (vpipe != VFP11_BAD | |
8542 | && bfd_arm_vfp11_antidependency (writemask, regs, | |
c7b8f16e | 8543 | numregs)) |
99059e56 RM |
8544 | state = 3; |
8545 | else | |
8546 | { | |
8547 | state = 0; | |
8548 | next_i = first_fmac + 4; | |
8549 | } | |
8550 | } | |
8551 | break; | |
8552 | ||
8553 | case 3: | |
8554 | abort (); /* Should be unreachable. */ | |
8555 | } | |
8556 | ||
8557 | if (state == 3) | |
8558 | { | |
8559 | elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *) | |
8560 | bfd_zmalloc (sizeof (elf32_vfp11_erratum_list)); | |
8561 | ||
8562 | elf32_arm_section_data (sec)->erratumcount += 1; | |
8563 | ||
8564 | newerr->u.b.vfp_insn = veneer_of_insn; | |
8565 | ||
8566 | switch (span_type) | |
8567 | { | |
8568 | case 'a': | |
8569 | newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER; | |
8570 | break; | |
8571 | ||
8572 | default: | |
8573 | abort (); | |
8574 | } | |
8575 | ||
8576 | record_vfp11_erratum_veneer (link_info, newerr, abfd, sec, | |
c7b8f16e JB |
8577 | first_fmac); |
8578 | ||
99059e56 | 8579 | newerr->vma = -1; |
c7b8f16e | 8580 | |
99059e56 RM |
8581 | newerr->next = sec_data->erratumlist; |
8582 | sec_data->erratumlist = newerr; | |
c7b8f16e | 8583 | |
99059e56 RM |
8584 | state = 0; |
8585 | } | |
c7b8f16e | 8586 | |
99059e56 RM |
8587 | i = next_i; |
8588 | } | |
8589 | } | |
906e58ca | 8590 | |
c9594989 | 8591 | if (elf_section_data (sec)->this_hdr.contents != contents) |
99059e56 | 8592 | free (contents); |
c7b8f16e JB |
8593 | contents = NULL; |
8594 | } | |
8595 | ||
0a1b45a2 | 8596 | return true; |
c7b8f16e | 8597 | |
dc1e8a47 | 8598 | error_return: |
c9594989 | 8599 | if (elf_section_data (sec)->this_hdr.contents != contents) |
c7b8f16e | 8600 | free (contents); |
906e58ca | 8601 | |
0a1b45a2 | 8602 | return false; |
c7b8f16e JB |
8603 | } |
8604 | ||
8605 | /* Find virtual-memory addresses for VFP11 erratum veneers and return locations | |
8606 | after sections have been laid out, using specially-named symbols. */ | |
8607 | ||
8608 | void | |
8609 | bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd, | |
8610 | struct bfd_link_info *link_info) | |
8611 | { | |
8612 | asection *sec; | |
8613 | struct elf32_arm_link_hash_table *globals; | |
8614 | char *tmp_name; | |
906e58ca | 8615 | |
0e1862bb | 8616 | if (bfd_link_relocatable (link_info)) |
c7b8f16e | 8617 | return; |
2e6030b9 MS |
8618 | |
8619 | /* Skip if this bfd does not correspond to an ELF image. */ | |
0ffa91dd | 8620 | if (! is_arm_elf (abfd)) |
2e6030b9 MS |
8621 | return; |
8622 | ||
c7b8f16e | 8623 | globals = elf32_arm_hash_table (link_info); |
4dfe6ac6 NC |
8624 | if (globals == NULL) |
8625 | return; | |
906e58ca | 8626 | |
21d799b5 | 8627 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen |
99059e56 | 8628 | (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10); |
7a0fb7be | 8629 | BFD_ASSERT (tmp_name); |
c7b8f16e JB |
8630 | |
8631 | for (sec = abfd->sections; sec != NULL; sec = sec->next) | |
8632 | { | |
8633 | struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec); | |
8634 | elf32_vfp11_erratum_list *errnode = sec_data->erratumlist; | |
906e58ca | 8635 | |
c7b8f16e | 8636 | for (; errnode != NULL; errnode = errnode->next) |
99059e56 RM |
8637 | { |
8638 | struct elf_link_hash_entry *myh; | |
8639 | bfd_vma vma; | |
8640 | ||
8641 | switch (errnode->type) | |
8642 | { | |
8643 | case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER: | |
8644 | case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER: | |
8645 | /* Find veneer symbol. */ | |
8646 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME, | |
c7b8f16e JB |
8647 | errnode->u.b.veneer->u.v.id); |
8648 | ||
99059e56 | 8649 | myh = elf_link_hash_lookup |
0a1b45a2 | 8650 | (&(globals)->root, tmp_name, false, false, true); |
c7b8f16e | 8651 | |
a504d23a | 8652 | if (myh == NULL) |
90b6238f AM |
8653 | _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"), |
8654 | abfd, "VFP11", tmp_name); | |
a504d23a LA |
8655 | |
8656 | vma = myh->root.u.def.section->output_section->vma | |
8657 | + myh->root.u.def.section->output_offset | |
8658 | + myh->root.u.def.value; | |
8659 | ||
8660 | errnode->u.b.veneer->vma = vma; | |
8661 | break; | |
8662 | ||
8663 | case VFP11_ERRATUM_ARM_VENEER: | |
8664 | case VFP11_ERRATUM_THUMB_VENEER: | |
8665 | /* Find return location. */ | |
8666 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r", | |
8667 | errnode->u.v.id); | |
8668 | ||
8669 | myh = elf_link_hash_lookup | |
0a1b45a2 | 8670 | (&(globals)->root, tmp_name, false, false, true); |
a504d23a LA |
8671 | |
8672 | if (myh == NULL) | |
90b6238f AM |
8673 | _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"), |
8674 | abfd, "VFP11", tmp_name); | |
a504d23a LA |
8675 | |
8676 | vma = myh->root.u.def.section->output_section->vma | |
8677 | + myh->root.u.def.section->output_offset | |
8678 | + myh->root.u.def.value; | |
8679 | ||
8680 | errnode->u.v.branch->vma = vma; | |
8681 | break; | |
8682 | ||
8683 | default: | |
8684 | abort (); | |
8685 | } | |
8686 | } | |
8687 | } | |
8688 | ||
8689 | free (tmp_name); | |
8690 | } | |
8691 | ||
8692 | /* Find virtual-memory addresses for STM32L4XX erratum veneers and | |
8693 | return locations after sections have been laid out, using | |
8694 | specially-named symbols. */ | |
8695 | ||
8696 | void | |
8697 | bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd, | |
8698 | struct bfd_link_info *link_info) | |
8699 | { | |
8700 | asection *sec; | |
8701 | struct elf32_arm_link_hash_table *globals; | |
8702 | char *tmp_name; | |
8703 | ||
8704 | if (bfd_link_relocatable (link_info)) | |
8705 | return; | |
8706 | ||
8707 | /* Skip if this bfd does not correspond to an ELF image. */ | |
8708 | if (! is_arm_elf (abfd)) | |
8709 | return; | |
8710 | ||
8711 | globals = elf32_arm_hash_table (link_info); | |
8712 | if (globals == NULL) | |
8713 | return; | |
8714 | ||
8715 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen | |
8716 | (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10); | |
7a0fb7be | 8717 | BFD_ASSERT (tmp_name); |
a504d23a LA |
8718 | |
8719 | for (sec = abfd->sections; sec != NULL; sec = sec->next) | |
8720 | { | |
8721 | struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec); | |
8722 | elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist; | |
8723 | ||
8724 | for (; errnode != NULL; errnode = errnode->next) | |
8725 | { | |
8726 | struct elf_link_hash_entry *myh; | |
8727 | bfd_vma vma; | |
8728 | ||
8729 | switch (errnode->type) | |
8730 | { | |
8731 | case STM32L4XX_ERRATUM_BRANCH_TO_VENEER: | |
8732 | /* Find veneer symbol. */ | |
8733 | sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME, | |
8734 | errnode->u.b.veneer->u.v.id); | |
8735 | ||
8736 | myh = elf_link_hash_lookup | |
0a1b45a2 | 8737 | (&(globals)->root, tmp_name, false, false, true); |
a504d23a LA |
8738 | |
8739 | if (myh == NULL) | |
90b6238f AM |
8740 | _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"), |
8741 | abfd, "STM32L4XX", tmp_name); | |
a504d23a LA |
8742 | |
8743 | vma = myh->root.u.def.section->output_section->vma | |
8744 | + myh->root.u.def.section->output_offset | |
8745 | + myh->root.u.def.value; | |
8746 | ||
8747 | errnode->u.b.veneer->vma = vma; | |
8748 | break; | |
8749 | ||
8750 | case STM32L4XX_ERRATUM_VENEER: | |
8751 | /* Find return location. */ | |
8752 | sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r", | |
8753 | errnode->u.v.id); | |
8754 | ||
8755 | myh = elf_link_hash_lookup | |
0a1b45a2 | 8756 | (&(globals)->root, tmp_name, false, false, true); |
a504d23a LA |
8757 | |
8758 | if (myh == NULL) | |
90b6238f AM |
8759 | _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"), |
8760 | abfd, "STM32L4XX", tmp_name); | |
a504d23a LA |
8761 | |
8762 | vma = myh->root.u.def.section->output_section->vma | |
8763 | + myh->root.u.def.section->output_offset | |
8764 | + myh->root.u.def.value; | |
8765 | ||
8766 | errnode->u.v.branch->vma = vma; | |
8767 | break; | |
8768 | ||
8769 | default: | |
8770 | abort (); | |
8771 | } | |
8772 | } | |
8773 | } | |
8774 | ||
8775 | free (tmp_name); | |
8776 | } | |
8777 | ||
0a1b45a2 | 8778 | static inline bool |
a504d23a LA |
8779 | is_thumb2_ldmia (const insn32 insn) |
8780 | { | |
8781 | /* Encoding T2: LDM<c>.W <Rn>{!},<registers> | |
8782 | 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */ | |
8783 | return (insn & 0xffd02000) == 0xe8900000; | |
8784 | } | |
8785 | ||
0a1b45a2 | 8786 | static inline bool |
a504d23a LA |
8787 | is_thumb2_ldmdb (const insn32 insn) |
8788 | { | |
8789 | /* Encoding T1: LDMDB<c> <Rn>{!},<registers> | |
8790 | 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */ | |
8791 | return (insn & 0xffd02000) == 0xe9100000; | |
8792 | } | |
8793 | ||
0a1b45a2 | 8794 | static inline bool |
a504d23a LA |
8795 | is_thumb2_vldm (const insn32 insn) |
8796 | { | |
8797 | /* A6.5 Extension register load or store instruction | |
8798 | A7.7.229 | |
9239bbd3 CM |
8799 | We look for SP 32-bit and DP 64-bit registers. |
8800 | Encoding T1 VLDM{mode}<c> <Rn>{!}, <list> | |
8801 | <list> is consecutive 64-bit registers | |
8802 | 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii | |
a504d23a LA |
8803 | Encoding T2 VLDM{mode}<c> <Rn>{!}, <list> |
8804 | <list> is consecutive 32-bit registers | |
8805 | 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii | |
8806 | if P==0 && U==1 && W==1 && Rn=1101 VPOP | |
8807 | if PUW=010 || PUW=011 || PUW=101 VLDM. */ | |
8808 | return | |
9239bbd3 CM |
8809 | (((insn & 0xfe100f00) == 0xec100b00) || |
8810 | ((insn & 0xfe100f00) == 0xec100a00)) | |
a504d23a LA |
8811 | && /* (IA without !). */ |
8812 | (((((insn << 7) >> 28) & 0xd) == 0x4) | |
9239bbd3 | 8813 | /* (IA with !), includes VPOP (when reg number is SP). */ |
a504d23a LA |
8814 | || ((((insn << 7) >> 28) & 0xd) == 0x5) |
8815 | /* (DB with !). */ | |
8816 | || ((((insn << 7) >> 28) & 0xd) == 0x9)); | |
8817 | } | |
8818 | ||
8819 | /* STM STM32L4XX erratum : This function assumes that it receives an LDM or | |
8820 | VLDM opcode and: | |
8821 | - computes the number and the mode of memory accesses | |
8822 | - decides if the replacement should be done: | |
8823 | . replaces only if > 8-word accesses | |
8824 | . or (testing purposes only) replaces all accesses. */ | |
8825 | ||
0a1b45a2 | 8826 | static bool |
a504d23a LA |
8827 | stm32l4xx_need_create_replacing_stub (const insn32 insn, |
8828 | bfd_arm_stm32l4xx_fix stm32l4xx_fix) | |
8829 | { | |
9239bbd3 | 8830 | int nb_words = 0; |
a504d23a LA |
8831 | |
8832 | /* The field encoding the register list is the same for both LDMIA | |
8833 | and LDMDB encodings. */ | |
8834 | if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn)) | |
b25e998d | 8835 | nb_words = elf32_arm_popcount (insn & 0x0000ffff); |
a504d23a | 8836 | else if (is_thumb2_vldm (insn)) |
9239bbd3 | 8837 | nb_words = (insn & 0xff); |
a504d23a LA |
8838 | |
8839 | /* DEFAULT mode accounts for the real bug condition situation, | |
8840 | ALL mode inserts stubs for each LDM/VLDM instruction (testing). */ | |
63b4cc53 AM |
8841 | return (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT |
8842 | ? nb_words > 8 | |
8843 | : stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL); | |
a504d23a LA |
8844 | } |
8845 | ||
8846 | /* Look for potentially-troublesome code sequences which might trigger | |
8847 | the STM STM32L4XX erratum. */ | |
8848 | ||
0a1b45a2 | 8849 | bool |
a504d23a LA |
8850 | bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd, |
8851 | struct bfd_link_info *link_info) | |
8852 | { | |
8853 | asection *sec; | |
8854 | bfd_byte *contents = NULL; | |
8855 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); | |
8856 | ||
8857 | if (globals == NULL) | |
0a1b45a2 | 8858 | return false; |
a504d23a LA |
8859 | |
8860 | /* If we are only performing a partial link do not bother | |
8861 | to construct any glue. */ | |
8862 | if (bfd_link_relocatable (link_info)) | |
0a1b45a2 | 8863 | return true; |
a504d23a LA |
8864 | |
8865 | /* Skip if this bfd does not correspond to an ELF image. */ | |
8866 | if (! is_arm_elf (abfd)) | |
0a1b45a2 | 8867 | return true; |
a504d23a LA |
8868 | |
8869 | if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE) | |
0a1b45a2 | 8870 | return true; |
a504d23a LA |
8871 | |
8872 | /* Skip this BFD if it corresponds to an executable or dynamic object. */ | |
8873 | if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0) | |
0a1b45a2 | 8874 | return true; |
a504d23a LA |
8875 | |
8876 | for (sec = abfd->sections; sec != NULL; sec = sec->next) | |
8877 | { | |
8878 | unsigned int i, span; | |
8879 | struct _arm_elf_section_data *sec_data; | |
8880 | ||
8881 | /* If we don't have executable progbits, we're not interested in this | |
8882 | section. Also skip if section is to be excluded. */ | |
8883 | if (elf_section_type (sec) != SHT_PROGBITS | |
8884 | || (elf_section_flags (sec) & SHF_EXECINSTR) == 0 | |
8885 | || (sec->flags & SEC_EXCLUDE) != 0 | |
8886 | || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS | |
8887 | || sec->output_section == bfd_abs_section_ptr | |
8888 | || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0) | |
8889 | continue; | |
8890 | ||
8891 | sec_data = elf32_arm_section_data (sec); | |
c7b8f16e | 8892 | |
a504d23a LA |
8893 | if (sec_data->mapcount == 0) |
8894 | continue; | |
c7b8f16e | 8895 | |
a504d23a LA |
8896 | if (elf_section_data (sec)->this_hdr.contents != NULL) |
8897 | contents = elf_section_data (sec)->this_hdr.contents; | |
8898 | else if (! bfd_malloc_and_get_section (abfd, sec, &contents)) | |
8899 | goto error_return; | |
c7b8f16e | 8900 | |
a504d23a LA |
8901 | qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map), |
8902 | elf32_arm_compare_mapping); | |
c7b8f16e | 8903 | |
a504d23a LA |
8904 | for (span = 0; span < sec_data->mapcount; span++) |
8905 | { | |
8906 | unsigned int span_start = sec_data->map[span].vma; | |
8907 | unsigned int span_end = (span == sec_data->mapcount - 1) | |
8908 | ? sec->size : sec_data->map[span + 1].vma; | |
8909 | char span_type = sec_data->map[span].type; | |
8910 | int itblock_current_pos = 0; | |
c7b8f16e | 8911 | |
a504d23a LA |
8912 | /* Only Thumb2 mode need be supported with this CM4 specific |
8913 | code, we should not encounter any arm mode eg span_type | |
8914 | != 'a'. */ | |
8915 | if (span_type != 't') | |
8916 | continue; | |
c7b8f16e | 8917 | |
a504d23a LA |
8918 | for (i = span_start; i < span_end;) |
8919 | { | |
8920 | unsigned int insn = bfd_get_16 (abfd, &contents[i]); | |
0a1b45a2 AM |
8921 | bool insn_32bit = false; |
8922 | bool is_ldm = false; | |
8923 | bool is_vldm = false; | |
8924 | bool is_not_last_in_it_block = false; | |
a504d23a LA |
8925 | |
8926 | /* The first 16-bits of all 32-bit thumb2 instructions start | |
8927 | with opcode[15..13]=0b111 and the encoded op1 can be anything | |
8928 | except opcode[12..11]!=0b00. | |
8929 | See 32-bit Thumb instruction encoding. */ | |
8930 | if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000) | |
0a1b45a2 | 8931 | insn_32bit = true; |
c7b8f16e | 8932 | |
a504d23a LA |
8933 | /* Compute the predicate that tells if the instruction |
8934 | is concerned by the IT block | |
8935 | - Creates an error if there is a ldm that is not | |
8936 | last in the IT block thus cannot be replaced | |
8937 | - Otherwise we can create a branch at the end of the | |
8938 | IT block, it will be controlled naturally by IT | |
8939 | with the proper pseudo-predicate | |
8940 | - So the only interesting predicate is the one that | |
8941 | tells that we are not on the last item of an IT | |
8942 | block. */ | |
8943 | if (itblock_current_pos != 0) | |
8944 | is_not_last_in_it_block = !!--itblock_current_pos; | |
906e58ca | 8945 | |
a504d23a LA |
8946 | if (insn_32bit) |
8947 | { | |
8948 | /* Load the rest of the insn (in manual-friendly order). */ | |
8949 | insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]); | |
8950 | is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn); | |
8951 | is_vldm = is_thumb2_vldm (insn); | |
8952 | ||
8953 | /* Veneers are created for (v)ldm depending on | |
8954 | option flags and memory accesses conditions; but | |
8955 | if the instruction is not the last instruction of | |
8956 | an IT block, we cannot create a jump there, so we | |
8957 | bail out. */ | |
5025eb7c AO |
8958 | if ((is_ldm || is_vldm) |
8959 | && stm32l4xx_need_create_replacing_stub | |
a504d23a LA |
8960 | (insn, globals->stm32l4xx_fix)) |
8961 | { | |
8962 | if (is_not_last_in_it_block) | |
8963 | { | |
4eca0228 | 8964 | _bfd_error_handler |
695344c0 | 8965 | /* xgettext:c-format */ |
871b3ab2 | 8966 | (_("%pB(%pA+%#x): error: multiple load detected" |
90b6238f AM |
8967 | " in non-last IT block instruction:" |
8968 | " STM32L4XX veneer cannot be generated; " | |
8969 | "use gcc option -mrestrict-it to generate" | |
8970 | " only one instruction per IT block"), | |
d42c267e | 8971 | abfd, sec, i); |
a504d23a LA |
8972 | } |
8973 | else | |
8974 | { | |
8975 | elf32_stm32l4xx_erratum_list *newerr = | |
8976 | (elf32_stm32l4xx_erratum_list *) | |
8977 | bfd_zmalloc | |
8978 | (sizeof (elf32_stm32l4xx_erratum_list)); | |
8979 | ||
8980 | elf32_arm_section_data (sec) | |
8981 | ->stm32l4xx_erratumcount += 1; | |
8982 | newerr->u.b.insn = insn; | |
8983 | /* We create only thumb branches. */ | |
8984 | newerr->type = | |
8985 | STM32L4XX_ERRATUM_BRANCH_TO_VENEER; | |
8986 | record_stm32l4xx_erratum_veneer | |
8987 | (link_info, newerr, abfd, sec, | |
8988 | i, | |
8989 | is_ldm ? | |
8990 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE: | |
8991 | STM32L4XX_ERRATUM_VLDM_VENEER_SIZE); | |
8992 | newerr->vma = -1; | |
8993 | newerr->next = sec_data->stm32l4xx_erratumlist; | |
8994 | sec_data->stm32l4xx_erratumlist = newerr; | |
8995 | } | |
8996 | } | |
8997 | } | |
8998 | else | |
8999 | { | |
9000 | /* A7.7.37 IT p208 | |
9001 | IT blocks are only encoded in T1 | |
9002 | Encoding T1: IT{x{y{z}}} <firstcond> | |
9003 | 1 0 1 1 - 1 1 1 1 - firstcond - mask | |
9004 | if mask = '0000' then see 'related encodings' | |
9005 | We don't deal with UNPREDICTABLE, just ignore these. | |
9006 | There can be no nested IT blocks so an IT block | |
9007 | is naturally a new one for which it is worth | |
9008 | computing its size. */ | |
0a1b45a2 | 9009 | bool is_newitblock = ((insn & 0xff00) == 0xbf00) |
5025eb7c | 9010 | && ((insn & 0x000f) != 0x0000); |
a504d23a LA |
9011 | /* If we have a new IT block we compute its size. */ |
9012 | if (is_newitblock) | |
9013 | { | |
9014 | /* Compute the number of instructions controlled | |
9015 | by the IT block, it will be used to decide | |
9016 | whether we are inside an IT block or not. */ | |
9017 | unsigned int mask = insn & 0x000f; | |
9018 | itblock_current_pos = 4 - ctz (mask); | |
9019 | } | |
9020 | } | |
9021 | ||
9022 | i += insn_32bit ? 4 : 2; | |
99059e56 RM |
9023 | } |
9024 | } | |
a504d23a | 9025 | |
c9594989 | 9026 | if (elf_section_data (sec)->this_hdr.contents != contents) |
a504d23a LA |
9027 | free (contents); |
9028 | contents = NULL; | |
c7b8f16e | 9029 | } |
906e58ca | 9030 | |
0a1b45a2 | 9031 | return true; |
a504d23a | 9032 | |
dc1e8a47 | 9033 | error_return: |
c9594989 | 9034 | if (elf_section_data (sec)->this_hdr.contents != contents) |
a504d23a | 9035 | free (contents); |
c7b8f16e | 9036 | |
0a1b45a2 | 9037 | return false; |
a504d23a | 9038 | } |
c7b8f16e | 9039 | |
eb043451 PB |
9040 | /* Set target relocation values needed during linking. */ |
9041 | ||
9042 | void | |
68c39892 | 9043 | bfd_elf32_arm_set_target_params (struct bfd *output_bfd, |
bf21ed78 | 9044 | struct bfd_link_info *link_info, |
68c39892 | 9045 | struct elf32_arm_params *params) |
eb043451 PB |
9046 | { |
9047 | struct elf32_arm_link_hash_table *globals; | |
9048 | ||
9049 | globals = elf32_arm_hash_table (link_info); | |
4dfe6ac6 NC |
9050 | if (globals == NULL) |
9051 | return; | |
eb043451 | 9052 | |
68c39892 | 9053 | globals->target1_is_rel = params->target1_is_rel; |
29e9b073 CL |
9054 | if (globals->fdpic_p) |
9055 | globals->target2_reloc = R_ARM_GOT32; | |
9056 | else if (strcmp (params->target2_type, "rel") == 0) | |
eb043451 | 9057 | globals->target2_reloc = R_ARM_REL32; |
68c39892 | 9058 | else if (strcmp (params->target2_type, "abs") == 0) |
eeac373a | 9059 | globals->target2_reloc = R_ARM_ABS32; |
68c39892 | 9060 | else if (strcmp (params->target2_type, "got-rel") == 0) |
eb043451 PB |
9061 | globals->target2_reloc = R_ARM_GOT_PREL; |
9062 | else | |
9063 | { | |
90b6238f | 9064 | _bfd_error_handler (_("invalid TARGET2 relocation type '%s'"), |
68c39892 | 9065 | params->target2_type); |
eb043451 | 9066 | } |
68c39892 TP |
9067 | globals->fix_v4bx = params->fix_v4bx; |
9068 | globals->use_blx |= params->use_blx; | |
9069 | globals->vfp11_fix = params->vfp11_denorm_fix; | |
9070 | globals->stm32l4xx_fix = params->stm32l4xx_fix; | |
e8b09b87 CL |
9071 | if (globals->fdpic_p) |
9072 | globals->pic_veneer = 1; | |
9073 | else | |
9074 | globals->pic_veneer = params->pic_veneer; | |
68c39892 TP |
9075 | globals->fix_cortex_a8 = params->fix_cortex_a8; |
9076 | globals->fix_arm1176 = params->fix_arm1176; | |
9077 | globals->cmse_implib = params->cmse_implib; | |
9078 | globals->in_implib_bfd = params->in_implib_bfd; | |
bf21ed78 | 9079 | |
0ffa91dd | 9080 | BFD_ASSERT (is_arm_elf (output_bfd)); |
68c39892 TP |
9081 | elf_arm_tdata (output_bfd)->no_enum_size_warning |
9082 | = params->no_enum_size_warning; | |
9083 | elf_arm_tdata (output_bfd)->no_wchar_size_warning | |
9084 | = params->no_wchar_size_warning; | |
eb043451 | 9085 | } |
eb043451 | 9086 | |
12a0a0fd | 9087 | /* Replace the target offset of a Thumb bl or b.w instruction. */ |
252b5132 | 9088 | |
12a0a0fd PB |
9089 | static void |
9090 | insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn) | |
9091 | { | |
9092 | bfd_vma upper; | |
9093 | bfd_vma lower; | |
9094 | int reloc_sign; | |
9095 | ||
9096 | BFD_ASSERT ((offset & 1) == 0); | |
9097 | ||
9098 | upper = bfd_get_16 (abfd, insn); | |
9099 | lower = bfd_get_16 (abfd, insn + 2); | |
9100 | reloc_sign = (offset < 0) ? 1 : 0; | |
9101 | upper = (upper & ~(bfd_vma) 0x7ff) | |
9102 | | ((offset >> 12) & 0x3ff) | |
9103 | | (reloc_sign << 10); | |
906e58ca | 9104 | lower = (lower & ~(bfd_vma) 0x2fff) |
12a0a0fd PB |
9105 | | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13) |
9106 | | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11) | |
9107 | | ((offset >> 1) & 0x7ff); | |
9108 | bfd_put_16 (abfd, upper, insn); | |
9109 | bfd_put_16 (abfd, lower, insn + 2); | |
252b5132 RH |
9110 | } |
9111 | ||
9b485d32 NC |
9112 | /* Thumb code calling an ARM function. */ |
9113 | ||
252b5132 | 9114 | static int |
57e8b36a | 9115 | elf32_thumb_to_arm_stub (struct bfd_link_info * info, |
07d6d2b8 AM |
9116 | const char * name, |
9117 | bfd * input_bfd, | |
9118 | bfd * output_bfd, | |
9119 | asection * input_section, | |
9120 | bfd_byte * hit_data, | |
9121 | asection * sym_sec, | |
9122 | bfd_vma offset, | |
9123 | bfd_signed_vma addend, | |
9124 | bfd_vma val, | |
f2a9dd69 | 9125 | char **error_message) |
252b5132 | 9126 | { |
bcbdc74c | 9127 | asection * s = 0; |
dc810e39 | 9128 | bfd_vma my_offset; |
252b5132 | 9129 | long int ret_offset; |
bcbdc74c NC |
9130 | struct elf_link_hash_entry * myh; |
9131 | struct elf32_arm_link_hash_table * globals; | |
252b5132 | 9132 | |
f2a9dd69 | 9133 | myh = find_thumb_glue (info, name, error_message); |
252b5132 | 9134 | if (myh == NULL) |
0a1b45a2 | 9135 | return false; |
252b5132 RH |
9136 | |
9137 | globals = elf32_arm_hash_table (info); | |
252b5132 RH |
9138 | BFD_ASSERT (globals != NULL); |
9139 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
9140 | ||
9141 | my_offset = myh->root.u.def.value; | |
9142 | ||
3d4d4302 AM |
9143 | s = bfd_get_linker_section (globals->bfd_of_glue_owner, |
9144 | THUMB2ARM_GLUE_SECTION_NAME); | |
252b5132 RH |
9145 | |
9146 | BFD_ASSERT (s != NULL); | |
9147 | BFD_ASSERT (s->contents != NULL); | |
9148 | BFD_ASSERT (s->output_section != NULL); | |
9149 | ||
9150 | if ((my_offset & 0x01) == 0x01) | |
9151 | { | |
9152 | if (sym_sec != NULL | |
9153 | && sym_sec->owner != NULL | |
9154 | && !INTERWORK_FLAG (sym_sec->owner)) | |
9155 | { | |
4eca0228 | 9156 | _bfd_error_handler |
90b6238f AM |
9157 | (_("%pB(%s): warning: interworking not enabled;" |
9158 | " first occurrence: %pB: %s call to %s"), | |
9159 | sym_sec->owner, name, input_bfd, "Thumb", "ARM"); | |
252b5132 | 9160 | |
0a1b45a2 | 9161 | return false; |
252b5132 RH |
9162 | } |
9163 | ||
9164 | --my_offset; | |
9165 | myh->root.u.def.value = my_offset; | |
9166 | ||
52ab56c2 PB |
9167 | put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn, |
9168 | s->contents + my_offset); | |
252b5132 | 9169 | |
52ab56c2 PB |
9170 | put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn, |
9171 | s->contents + my_offset + 2); | |
252b5132 RH |
9172 | |
9173 | ret_offset = | |
9b485d32 NC |
9174 | /* Address of destination of the stub. */ |
9175 | ((bfd_signed_vma) val) | |
252b5132 | 9176 | - ((bfd_signed_vma) |
57e8b36a NC |
9177 | /* Offset from the start of the current section |
9178 | to the start of the stubs. */ | |
9b485d32 NC |
9179 | (s->output_offset |
9180 | /* Offset of the start of this stub from the start of the stubs. */ | |
9181 | + my_offset | |
9182 | /* Address of the start of the current section. */ | |
9183 | + s->output_section->vma) | |
9184 | /* The branch instruction is 4 bytes into the stub. */ | |
9185 | + 4 | |
9186 | /* ARM branches work from the pc of the instruction + 8. */ | |
9187 | + 8); | |
252b5132 | 9188 | |
52ab56c2 PB |
9189 | put_arm_insn (globals, output_bfd, |
9190 | (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF), | |
9191 | s->contents + my_offset + 4); | |
252b5132 RH |
9192 | } |
9193 | ||
9194 | BFD_ASSERT (my_offset <= globals->thumb_glue_size); | |
9195 | ||
427bfd90 NC |
9196 | /* Now go back and fix up the original BL insn to point to here. */ |
9197 | ret_offset = | |
9198 | /* Address of where the stub is located. */ | |
9199 | (s->output_section->vma + s->output_offset + my_offset) | |
9200 | /* Address of where the BL is located. */ | |
57e8b36a NC |
9201 | - (input_section->output_section->vma + input_section->output_offset |
9202 | + offset) | |
427bfd90 NC |
9203 | /* Addend in the relocation. */ |
9204 | - addend | |
9205 | /* Biassing for PC-relative addressing. */ | |
9206 | - 8; | |
252b5132 | 9207 | |
12a0a0fd | 9208 | insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma); |
252b5132 | 9209 | |
0a1b45a2 | 9210 | return true; |
252b5132 RH |
9211 | } |
9212 | ||
a4fd1a8e | 9213 | /* Populate an Arm to Thumb stub. Returns the stub symbol. */ |
9b485d32 | 9214 | |
a4fd1a8e PB |
9215 | static struct elf_link_hash_entry * |
9216 | elf32_arm_create_thumb_stub (struct bfd_link_info * info, | |
07d6d2b8 AM |
9217 | const char * name, |
9218 | bfd * input_bfd, | |
9219 | bfd * output_bfd, | |
9220 | asection * sym_sec, | |
9221 | bfd_vma val, | |
9222 | asection * s, | |
9223 | char ** error_message) | |
252b5132 | 9224 | { |
dc810e39 | 9225 | bfd_vma my_offset; |
252b5132 | 9226 | long int ret_offset; |
bcbdc74c NC |
9227 | struct elf_link_hash_entry * myh; |
9228 | struct elf32_arm_link_hash_table * globals; | |
252b5132 | 9229 | |
f2a9dd69 | 9230 | myh = find_arm_glue (info, name, error_message); |
252b5132 | 9231 | if (myh == NULL) |
a4fd1a8e | 9232 | return NULL; |
252b5132 RH |
9233 | |
9234 | globals = elf32_arm_hash_table (info); | |
252b5132 RH |
9235 | BFD_ASSERT (globals != NULL); |
9236 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
9237 | ||
9238 | my_offset = myh->root.u.def.value; | |
252b5132 RH |
9239 | |
9240 | if ((my_offset & 0x01) == 0x01) | |
9241 | { | |
9242 | if (sym_sec != NULL | |
9243 | && sym_sec->owner != NULL | |
9244 | && !INTERWORK_FLAG (sym_sec->owner)) | |
9245 | { | |
4eca0228 | 9246 | _bfd_error_handler |
90b6238f AM |
9247 | (_("%pB(%s): warning: interworking not enabled;" |
9248 | " first occurrence: %pB: %s call to %s"), | |
9249 | sym_sec->owner, name, input_bfd, "ARM", "Thumb"); | |
252b5132 | 9250 | } |
9b485d32 | 9251 | |
252b5132 RH |
9252 | --my_offset; |
9253 | myh->root.u.def.value = my_offset; | |
9254 | ||
0e1862bb L |
9255 | if (bfd_link_pic (info) |
9256 | || globals->root.is_relocatable_executable | |
27e55c4d | 9257 | || globals->pic_veneer) |
8f6277f5 PB |
9258 | { |
9259 | /* For relocatable objects we can't use absolute addresses, | |
9260 | so construct the address from a relative offset. */ | |
9261 | /* TODO: If the offset is small it's probably worth | |
9262 | constructing the address with adds. */ | |
52ab56c2 PB |
9263 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn, |
9264 | s->contents + my_offset); | |
9265 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn, | |
9266 | s->contents + my_offset + 4); | |
9267 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn, | |
9268 | s->contents + my_offset + 8); | |
8f6277f5 PB |
9269 | /* Adjust the offset by 4 for the position of the add, |
9270 | and 8 for the pipeline offset. */ | |
9271 | ret_offset = (val - (s->output_offset | |
9272 | + s->output_section->vma | |
9273 | + my_offset + 12)) | |
9274 | | 1; | |
9275 | bfd_put_32 (output_bfd, ret_offset, | |
9276 | s->contents + my_offset + 12); | |
9277 | } | |
26079076 PB |
9278 | else if (globals->use_blx) |
9279 | { | |
9280 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn, | |
9281 | s->contents + my_offset); | |
9282 | ||
9283 | /* It's a thumb address. Add the low order bit. */ | |
9284 | bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn, | |
9285 | s->contents + my_offset + 4); | |
9286 | } | |
8f6277f5 PB |
9287 | else |
9288 | { | |
52ab56c2 PB |
9289 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn, |
9290 | s->contents + my_offset); | |
252b5132 | 9291 | |
52ab56c2 PB |
9292 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn, |
9293 | s->contents + my_offset + 4); | |
252b5132 | 9294 | |
8f6277f5 PB |
9295 | /* It's a thumb address. Add the low order bit. */ |
9296 | bfd_put_32 (output_bfd, val | a2t3_func_addr_insn, | |
9297 | s->contents + my_offset + 8); | |
8029a119 NC |
9298 | |
9299 | my_offset += 12; | |
8f6277f5 | 9300 | } |
252b5132 RH |
9301 | } |
9302 | ||
9303 | BFD_ASSERT (my_offset <= globals->arm_glue_size); | |
9304 | ||
a4fd1a8e PB |
9305 | return myh; |
9306 | } | |
9307 | ||
9308 | /* Arm code calling a Thumb function. */ | |
9309 | ||
9310 | static int | |
9311 | elf32_arm_to_thumb_stub (struct bfd_link_info * info, | |
07d6d2b8 AM |
9312 | const char * name, |
9313 | bfd * input_bfd, | |
9314 | bfd * output_bfd, | |
9315 | asection * input_section, | |
9316 | bfd_byte * hit_data, | |
9317 | asection * sym_sec, | |
9318 | bfd_vma offset, | |
9319 | bfd_signed_vma addend, | |
9320 | bfd_vma val, | |
f2a9dd69 | 9321 | char **error_message) |
a4fd1a8e PB |
9322 | { |
9323 | unsigned long int tmp; | |
9324 | bfd_vma my_offset; | |
9325 | asection * s; | |
9326 | long int ret_offset; | |
9327 | struct elf_link_hash_entry * myh; | |
9328 | struct elf32_arm_link_hash_table * globals; | |
9329 | ||
9330 | globals = elf32_arm_hash_table (info); | |
a4fd1a8e PB |
9331 | BFD_ASSERT (globals != NULL); |
9332 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
9333 | ||
3d4d4302 AM |
9334 | s = bfd_get_linker_section (globals->bfd_of_glue_owner, |
9335 | ARM2THUMB_GLUE_SECTION_NAME); | |
a4fd1a8e PB |
9336 | BFD_ASSERT (s != NULL); |
9337 | BFD_ASSERT (s->contents != NULL); | |
9338 | BFD_ASSERT (s->output_section != NULL); | |
9339 | ||
9340 | myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd, | |
f2a9dd69 | 9341 | sym_sec, val, s, error_message); |
a4fd1a8e | 9342 | if (!myh) |
0a1b45a2 | 9343 | return false; |
a4fd1a8e PB |
9344 | |
9345 | my_offset = myh->root.u.def.value; | |
252b5132 RH |
9346 | tmp = bfd_get_32 (input_bfd, hit_data); |
9347 | tmp = tmp & 0xFF000000; | |
9348 | ||
9b485d32 | 9349 | /* Somehow these are both 4 too far, so subtract 8. */ |
dc810e39 AM |
9350 | ret_offset = (s->output_offset |
9351 | + my_offset | |
9352 | + s->output_section->vma | |
9353 | - (input_section->output_offset | |
9354 | + input_section->output_section->vma | |
9355 | + offset + addend) | |
9356 | - 8); | |
9a5aca8c | 9357 | |
252b5132 RH |
9358 | tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF); |
9359 | ||
dc810e39 | 9360 | bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma); |
252b5132 | 9361 | |
0a1b45a2 | 9362 | return true; |
252b5132 RH |
9363 | } |
9364 | ||
a4fd1a8e PB |
9365 | /* Populate Arm stub for an exported Thumb function. */ |
9366 | ||
0a1b45a2 | 9367 | static bool |
a4fd1a8e PB |
9368 | elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf) |
9369 | { | |
9370 | struct bfd_link_info * info = (struct bfd_link_info *) inf; | |
9371 | asection * s; | |
9372 | struct elf_link_hash_entry * myh; | |
9373 | struct elf32_arm_link_hash_entry *eh; | |
9374 | struct elf32_arm_link_hash_table * globals; | |
9375 | asection *sec; | |
9376 | bfd_vma val; | |
f2a9dd69 | 9377 | char *error_message; |
a4fd1a8e | 9378 | |
906e58ca | 9379 | eh = elf32_arm_hash_entry (h); |
a4fd1a8e PB |
9380 | /* Allocate stubs for exported Thumb functions on v4t. */ |
9381 | if (eh->export_glue == NULL) | |
0a1b45a2 | 9382 | return true; |
a4fd1a8e PB |
9383 | |
9384 | globals = elf32_arm_hash_table (info); | |
a4fd1a8e PB |
9385 | BFD_ASSERT (globals != NULL); |
9386 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
9387 | ||
3d4d4302 AM |
9388 | s = bfd_get_linker_section (globals->bfd_of_glue_owner, |
9389 | ARM2THUMB_GLUE_SECTION_NAME); | |
a4fd1a8e PB |
9390 | BFD_ASSERT (s != NULL); |
9391 | BFD_ASSERT (s->contents != NULL); | |
9392 | BFD_ASSERT (s->output_section != NULL); | |
9393 | ||
9394 | sec = eh->export_glue->root.u.def.section; | |
0eaedd0e PB |
9395 | |
9396 | BFD_ASSERT (sec->output_section != NULL); | |
9397 | ||
a4fd1a8e PB |
9398 | val = eh->export_glue->root.u.def.value + sec->output_offset |
9399 | + sec->output_section->vma; | |
8029a119 | 9400 | |
a4fd1a8e PB |
9401 | myh = elf32_arm_create_thumb_stub (info, h->root.root.string, |
9402 | h->root.u.def.section->owner, | |
f2a9dd69 DJ |
9403 | globals->obfd, sec, val, s, |
9404 | &error_message); | |
a4fd1a8e | 9405 | BFD_ASSERT (myh); |
0a1b45a2 | 9406 | return true; |
a4fd1a8e PB |
9407 | } |
9408 | ||
845b51d6 PB |
9409 | /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */ |
9410 | ||
9411 | static bfd_vma | |
9412 | elf32_arm_bx_glue (struct bfd_link_info * info, int reg) | |
9413 | { | |
9414 | bfd_byte *p; | |
9415 | bfd_vma glue_addr; | |
9416 | asection *s; | |
9417 | struct elf32_arm_link_hash_table *globals; | |
9418 | ||
9419 | globals = elf32_arm_hash_table (info); | |
845b51d6 PB |
9420 | BFD_ASSERT (globals != NULL); |
9421 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
9422 | ||
3d4d4302 AM |
9423 | s = bfd_get_linker_section (globals->bfd_of_glue_owner, |
9424 | ARM_BX_GLUE_SECTION_NAME); | |
845b51d6 PB |
9425 | BFD_ASSERT (s != NULL); |
9426 | BFD_ASSERT (s->contents != NULL); | |
9427 | BFD_ASSERT (s->output_section != NULL); | |
9428 | ||
9429 | BFD_ASSERT (globals->bx_glue_offset[reg] & 2); | |
9430 | ||
9431 | glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3; | |
9432 | ||
9433 | if ((globals->bx_glue_offset[reg] & 1) == 0) | |
9434 | { | |
9435 | p = s->contents + glue_addr; | |
9436 | bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p); | |
9437 | bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4); | |
9438 | bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8); | |
9439 | globals->bx_glue_offset[reg] |= 1; | |
9440 | } | |
9441 | ||
9442 | return glue_addr + s->output_section->vma + s->output_offset; | |
9443 | } | |
9444 | ||
a4fd1a8e PB |
9445 | /* Generate Arm stubs for exported Thumb symbols. */ |
9446 | static void | |
906e58ca | 9447 | elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED, |
a4fd1a8e PB |
9448 | struct bfd_link_info *link_info) |
9449 | { | |
9450 | struct elf32_arm_link_hash_table * globals; | |
9451 | ||
8029a119 NC |
9452 | if (link_info == NULL) |
9453 | /* Ignore this if we are not called by the ELF backend linker. */ | |
a4fd1a8e PB |
9454 | return; |
9455 | ||
9456 | globals = elf32_arm_hash_table (link_info); | |
4dfe6ac6 NC |
9457 | if (globals == NULL) |
9458 | return; | |
9459 | ||
84c08195 PB |
9460 | /* If blx is available then exported Thumb symbols are OK and there is |
9461 | nothing to do. */ | |
a4fd1a8e PB |
9462 | if (globals->use_blx) |
9463 | return; | |
9464 | ||
9465 | elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub, | |
9466 | link_info); | |
9467 | } | |
9468 | ||
47beaa6a RS |
9469 | /* Reserve space for COUNT dynamic relocations in relocation selection |
9470 | SRELOC. */ | |
9471 | ||
9472 | static void | |
9473 | elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc, | |
9474 | bfd_size_type count) | |
9475 | { | |
9476 | struct elf32_arm_link_hash_table *htab; | |
9477 | ||
9478 | htab = elf32_arm_hash_table (info); | |
9479 | BFD_ASSERT (htab->root.dynamic_sections_created); | |
9480 | if (sreloc == NULL) | |
9481 | abort (); | |
9482 | sreloc->size += RELOC_SIZE (htab) * count; | |
9483 | } | |
9484 | ||
34e77a92 RS |
9485 | /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is |
9486 | dynamic, the relocations should go in SRELOC, otherwise they should | |
9487 | go in the special .rel.iplt section. */ | |
9488 | ||
9489 | static void | |
9490 | elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc, | |
9491 | bfd_size_type count) | |
9492 | { | |
9493 | struct elf32_arm_link_hash_table *htab; | |
9494 | ||
9495 | htab = elf32_arm_hash_table (info); | |
9496 | if (!htab->root.dynamic_sections_created) | |
9497 | htab->root.irelplt->size += RELOC_SIZE (htab) * count; | |
9498 | else | |
9499 | { | |
9500 | BFD_ASSERT (sreloc != NULL); | |
9501 | sreloc->size += RELOC_SIZE (htab) * count; | |
9502 | } | |
9503 | } | |
9504 | ||
47beaa6a RS |
9505 | /* Add relocation REL to the end of relocation section SRELOC. */ |
9506 | ||
9507 | static void | |
9508 | elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info, | |
9509 | asection *sreloc, Elf_Internal_Rela *rel) | |
9510 | { | |
9511 | bfd_byte *loc; | |
9512 | struct elf32_arm_link_hash_table *htab; | |
9513 | ||
9514 | htab = elf32_arm_hash_table (info); | |
34e77a92 RS |
9515 | if (!htab->root.dynamic_sections_created |
9516 | && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE) | |
9517 | sreloc = htab->root.irelplt; | |
47beaa6a RS |
9518 | if (sreloc == NULL) |
9519 | abort (); | |
9520 | loc = sreloc->contents; | |
9521 | loc += sreloc->reloc_count++ * RELOC_SIZE (htab); | |
9522 | if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size) | |
9523 | abort (); | |
9524 | SWAP_RELOC_OUT (htab) (output_bfd, rel, loc); | |
9525 | } | |
9526 | ||
34e77a92 RS |
9527 | /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT. |
9528 | IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than | |
9529 | to .plt. */ | |
9530 | ||
9531 | static void | |
9532 | elf32_arm_allocate_plt_entry (struct bfd_link_info *info, | |
0a1b45a2 | 9533 | bool is_iplt_entry, |
34e77a92 RS |
9534 | union gotplt_union *root_plt, |
9535 | struct arm_plt_info *arm_plt) | |
9536 | { | |
9537 | struct elf32_arm_link_hash_table *htab; | |
9538 | asection *splt; | |
9539 | asection *sgotplt; | |
9540 | ||
9541 | htab = elf32_arm_hash_table (info); | |
9542 | ||
9543 | if (is_iplt_entry) | |
9544 | { | |
9545 | splt = htab->root.iplt; | |
9546 | sgotplt = htab->root.igotplt; | |
9547 | ||
99059e56 | 9548 | /* NaCl uses a special first entry in .iplt too. */ |
90c14f0c | 9549 | if (htab->root.target_os == is_nacl && splt->size == 0) |
99059e56 RM |
9550 | splt->size += htab->plt_header_size; |
9551 | ||
34e77a92 RS |
9552 | /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */ |
9553 | elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1); | |
9554 | } | |
9555 | else | |
9556 | { | |
9557 | splt = htab->root.splt; | |
9558 | sgotplt = htab->root.sgotplt; | |
9559 | ||
7801f98f CL |
9560 | if (htab->fdpic_p) |
9561 | { | |
9562 | /* Allocate room for R_ARM_FUNCDESC_VALUE. */ | |
9563 | /* For lazy binding, relocations will be put into .rel.plt, in | |
9564 | .rel.got otherwise. */ | |
9565 | /* FIXME: today we don't support lazy binding so put it in .rel.got */ | |
9566 | if (info->flags & DF_BIND_NOW) | |
9567 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); | |
9568 | else | |
9569 | elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1); | |
9570 | } | |
9571 | else | |
9572 | { | |
9573 | /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */ | |
9574 | elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1); | |
9575 | } | |
34e77a92 RS |
9576 | |
9577 | /* If this is the first .plt entry, make room for the special | |
9578 | first entry. */ | |
9579 | if (splt->size == 0) | |
9580 | splt->size += htab->plt_header_size; | |
9f19ab6d WN |
9581 | |
9582 | htab->next_tls_desc_index++; | |
34e77a92 RS |
9583 | } |
9584 | ||
9585 | /* Allocate the PLT entry itself, including any leading Thumb stub. */ | |
9586 | if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt)) | |
9587 | splt->size += PLT_THUMB_STUB_SIZE; | |
9588 | root_plt->offset = splt->size; | |
9589 | splt->size += htab->plt_entry_size; | |
9590 | ||
a57d1773 AM |
9591 | /* We also need to make an entry in the .got.plt section, which |
9592 | will be placed in the .got section by the linker script. */ | |
9593 | if (is_iplt_entry) | |
9594 | arm_plt->got_offset = sgotplt->size; | |
9595 | else | |
9596 | arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc; | |
9597 | if (htab->fdpic_p) | |
9598 | /* Function descriptor takes 64 bits in GOT. */ | |
9599 | sgotplt->size += 8; | |
9600 | else | |
9601 | sgotplt->size += 4; | |
34e77a92 RS |
9602 | } |
9603 | ||
b38cadfb NC |
9604 | static bfd_vma |
9605 | arm_movw_immediate (bfd_vma value) | |
9606 | { | |
9607 | return (value & 0x00000fff) | ((value & 0x0000f000) << 4); | |
9608 | } | |
9609 | ||
9610 | static bfd_vma | |
9611 | arm_movt_immediate (bfd_vma value) | |
9612 | { | |
9613 | return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12); | |
9614 | } | |
9615 | ||
34e77a92 RS |
9616 | /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1, |
9617 | the entry lives in .iplt and resolves to (*SYM_VALUE)(). | |
9618 | Otherwise, DYNINDX is the index of the symbol in the dynamic | |
9619 | symbol table and SYM_VALUE is undefined. | |
9620 | ||
9621 | ROOT_PLT points to the offset of the PLT entry from the start of its | |
9622 | section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific | |
57460bcf | 9623 | bookkeeping information. |
34e77a92 | 9624 | |
57460bcf NC |
9625 | Returns FALSE if there was a problem. */ |
9626 | ||
0a1b45a2 | 9627 | static bool |
34e77a92 RS |
9628 | elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info, |
9629 | union gotplt_union *root_plt, | |
9630 | struct arm_plt_info *arm_plt, | |
9631 | int dynindx, bfd_vma sym_value) | |
9632 | { | |
9633 | struct elf32_arm_link_hash_table *htab; | |
9634 | asection *sgot; | |
9635 | asection *splt; | |
9636 | asection *srel; | |
9637 | bfd_byte *loc; | |
9638 | bfd_vma plt_index; | |
9639 | Elf_Internal_Rela rel; | |
34e77a92 RS |
9640 | bfd_vma got_header_size; |
9641 | ||
9642 | htab = elf32_arm_hash_table (info); | |
9643 | ||
9644 | /* Pick the appropriate sections and sizes. */ | |
9645 | if (dynindx == -1) | |
9646 | { | |
9647 | splt = htab->root.iplt; | |
9648 | sgot = htab->root.igotplt; | |
9649 | srel = htab->root.irelplt; | |
9650 | ||
9651 | /* There are no reserved entries in .igot.plt, and no special | |
9652 | first entry in .iplt. */ | |
9653 | got_header_size = 0; | |
34e77a92 RS |
9654 | } |
9655 | else | |
9656 | { | |
9657 | splt = htab->root.splt; | |
9658 | sgot = htab->root.sgotplt; | |
9659 | srel = htab->root.srelplt; | |
9660 | ||
9661 | got_header_size = get_elf_backend_data (output_bfd)->got_header_size; | |
34e77a92 RS |
9662 | } |
9663 | BFD_ASSERT (splt != NULL && srel != NULL); | |
9664 | ||
a57d1773 AM |
9665 | bfd_vma got_offset, got_address, plt_address; |
9666 | bfd_vma got_displacement, initial_got_entry; | |
9667 | bfd_byte * ptr; | |
9668 | ||
9669 | BFD_ASSERT (sgot != NULL); | |
9670 | ||
9671 | /* Get the offset into the .(i)got.plt table of the entry that | |
9672 | corresponds to this function. */ | |
9673 | got_offset = (arm_plt->got_offset & -2); | |
9674 | ||
9675 | /* Get the index in the procedure linkage table which | |
9676 | corresponds to this symbol. This is the index of this symbol | |
9677 | in all the symbols for which we are making plt entries. | |
9678 | After the reserved .got.plt entries, all symbols appear in | |
9679 | the same order as in .plt. */ | |
9680 | if (htab->fdpic_p) | |
9681 | /* Function descriptor takes 8 bytes. */ | |
9682 | plt_index = (got_offset - got_header_size) / 8; | |
9683 | else | |
9684 | plt_index = (got_offset - got_header_size) / 4; | |
9685 | ||
9686 | /* Calculate the address of the GOT entry. */ | |
9687 | got_address = (sgot->output_section->vma | |
9688 | + sgot->output_offset | |
9689 | + got_offset); | |
9690 | ||
9691 | /* ...and the address of the PLT entry. */ | |
9692 | plt_address = (splt->output_section->vma | |
9693 | + splt->output_offset | |
9694 | + root_plt->offset); | |
9695 | ||
9696 | ptr = splt->contents + root_plt->offset; | |
9697 | if (htab->root.target_os == is_vxworks && bfd_link_pic (info)) | |
34e77a92 | 9698 | { |
a57d1773 AM |
9699 | unsigned int i; |
9700 | bfd_vma val; | |
9701 | ||
9702 | for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4) | |
9703 | { | |
9704 | val = elf32_arm_vxworks_shared_plt_entry[i]; | |
9705 | if (i == 2) | |
9706 | val |= got_address - sgot->output_section->vma; | |
9707 | if (i == 5) | |
9708 | val |= plt_index * RELOC_SIZE (htab); | |
9709 | if (i == 2 || i == 5) | |
9710 | bfd_put_32 (output_bfd, val, ptr); | |
9711 | else | |
9712 | put_arm_insn (htab, output_bfd, val, ptr); | |
9713 | } | |
34e77a92 | 9714 | } |
a57d1773 | 9715 | else if (htab->root.target_os == is_vxworks) |
34e77a92 | 9716 | { |
a57d1773 AM |
9717 | unsigned int i; |
9718 | bfd_vma val; | |
34e77a92 | 9719 | |
a57d1773 AM |
9720 | for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4) |
9721 | { | |
9722 | val = elf32_arm_vxworks_exec_plt_entry[i]; | |
9723 | if (i == 2) | |
9724 | val |= got_address; | |
9725 | if (i == 4) | |
9726 | val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2); | |
9727 | if (i == 5) | |
9728 | val |= plt_index * RELOC_SIZE (htab); | |
9729 | if (i == 2 || i == 5) | |
9730 | bfd_put_32 (output_bfd, val, ptr); | |
9731 | else | |
9732 | put_arm_insn (htab, output_bfd, val, ptr); | |
9733 | } | |
34e77a92 | 9734 | |
a57d1773 AM |
9735 | loc = (htab->srelplt2->contents |
9736 | + (plt_index * 2 + 1) * RELOC_SIZE (htab)); | |
34e77a92 | 9737 | |
a57d1773 AM |
9738 | /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation |
9739 | referencing the GOT for this PLT entry. */ | |
9740 | rel.r_offset = plt_address + 8; | |
9741 | rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32); | |
9742 | rel.r_addend = got_offset; | |
9743 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); | |
9744 | loc += RELOC_SIZE (htab); | |
34e77a92 | 9745 | |
a57d1773 AM |
9746 | /* Create the R_ARM_ABS32 relocation referencing the |
9747 | beginning of the PLT for this GOT entry. */ | |
9748 | rel.r_offset = got_address; | |
9749 | rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32); | |
9750 | rel.r_addend = 0; | |
9751 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); | |
9752 | } | |
9753 | else if (htab->root.target_os == is_nacl) | |
9754 | { | |
9755 | /* Calculate the displacement between the PLT slot and the | |
9756 | common tail that's part of the special initial PLT slot. */ | |
9757 | int32_t tail_displacement | |
9758 | = ((splt->output_section->vma + splt->output_offset | |
9759 | + ARM_NACL_PLT_TAIL_OFFSET) | |
9760 | - (plt_address + htab->plt_entry_size + 4)); | |
9761 | BFD_ASSERT ((tail_displacement & 3) == 0); | |
9762 | tail_displacement >>= 2; | |
34e77a92 | 9763 | |
a57d1773 AM |
9764 | BFD_ASSERT ((tail_displacement & 0xff000000) == 0 |
9765 | || (-tail_displacement & 0xff000000) == 0); | |
34e77a92 | 9766 | |
a57d1773 AM |
9767 | /* Calculate the displacement between the PLT slot and the entry |
9768 | in the GOT. The offset accounts for the value produced by | |
9769 | adding to pc in the penultimate instruction of the PLT stub. */ | |
9770 | got_displacement = (got_address | |
9771 | - (plt_address + htab->plt_entry_size)); | |
34e77a92 | 9772 | |
a57d1773 AM |
9773 | /* NaCl does not support interworking at all. */ |
9774 | BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt)); | |
9775 | ||
9776 | put_arm_insn (htab, output_bfd, | |
9777 | elf32_arm_nacl_plt_entry[0] | |
9778 | | arm_movw_immediate (got_displacement), | |
9779 | ptr + 0); | |
9780 | put_arm_insn (htab, output_bfd, | |
9781 | elf32_arm_nacl_plt_entry[1] | |
9782 | | arm_movt_immediate (got_displacement), | |
9783 | ptr + 4); | |
9784 | put_arm_insn (htab, output_bfd, | |
9785 | elf32_arm_nacl_plt_entry[2], | |
9786 | ptr + 8); | |
9787 | put_arm_insn (htab, output_bfd, | |
9788 | elf32_arm_nacl_plt_entry[3] | |
9789 | | (tail_displacement & 0x00ffffff), | |
9790 | ptr + 12); | |
9791 | } | |
9792 | else if (htab->fdpic_p) | |
9793 | { | |
cc850f74 | 9794 | const bfd_vma *plt_entry = using_thumb_only (htab) |
a57d1773 AM |
9795 | ? elf32_arm_fdpic_thumb_plt_entry |
9796 | : elf32_arm_fdpic_plt_entry; | |
9797 | ||
9798 | /* Fill-up Thumb stub if needed. */ | |
9799 | if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt)) | |
9800 | { | |
9801 | put_thumb_insn (htab, output_bfd, | |
9802 | elf32_arm_plt_thumb_stub[0], ptr - 4); | |
9803 | put_thumb_insn (htab, output_bfd, | |
9804 | elf32_arm_plt_thumb_stub[1], ptr - 2); | |
34e77a92 | 9805 | } |
a57d1773 AM |
9806 | /* As we are using 32 bit instructions even for the Thumb |
9807 | version, we have to use 'put_arm_insn' instead of | |
9808 | 'put_thumb_insn'. */ | |
cc850f74 NC |
9809 | put_arm_insn (htab, output_bfd, plt_entry[0], ptr + 0); |
9810 | put_arm_insn (htab, output_bfd, plt_entry[1], ptr + 4); | |
9811 | put_arm_insn (htab, output_bfd, plt_entry[2], ptr + 8); | |
9812 | put_arm_insn (htab, output_bfd, plt_entry[3], ptr + 12); | |
a57d1773 AM |
9813 | bfd_put_32 (output_bfd, got_offset, ptr + 16); |
9814 | ||
9815 | if (!(info->flags & DF_BIND_NOW)) | |
34e77a92 | 9816 | { |
a57d1773 AM |
9817 | /* funcdesc_value_reloc_offset. */ |
9818 | bfd_put_32 (output_bfd, | |
9819 | htab->root.srelplt->reloc_count * RELOC_SIZE (htab), | |
9820 | ptr + 20); | |
cc850f74 NC |
9821 | put_arm_insn (htab, output_bfd, plt_entry[6], ptr + 24); |
9822 | put_arm_insn (htab, output_bfd, plt_entry[7], ptr + 28); | |
9823 | put_arm_insn (htab, output_bfd, plt_entry[8], ptr + 32); | |
9824 | put_arm_insn (htab, output_bfd, plt_entry[9], ptr + 36); | |
a57d1773 AM |
9825 | } |
9826 | } | |
9827 | else if (using_thumb_only (htab)) | |
9828 | { | |
9829 | /* PR ld/16017: Generate thumb only PLT entries. */ | |
9830 | if (!using_thumb2 (htab)) | |
9831 | { | |
9832 | /* FIXME: We ought to be able to generate thumb-1 PLT | |
9833 | instructions... */ | |
9834 | _bfd_error_handler (_("%pB: warning: thumb-1 mode PLT generation not currently supported"), | |
9835 | output_bfd); | |
0a1b45a2 | 9836 | return false; |
a57d1773 | 9837 | } |
34e77a92 | 9838 | |
a57d1773 AM |
9839 | /* Calculate the displacement between the PLT slot and the entry in |
9840 | the GOT. The 12-byte offset accounts for the value produced by | |
9841 | adding to pc in the 3rd instruction of the PLT stub. */ | |
9842 | got_displacement = got_address - (plt_address + 12); | |
34e77a92 | 9843 | |
a57d1773 AM |
9844 | /* As we are using 32 bit instructions we have to use 'put_arm_insn' |
9845 | instead of 'put_thumb_insn'. */ | |
9846 | put_arm_insn (htab, output_bfd, | |
9847 | elf32_thumb2_plt_entry[0] | |
9848 | | ((got_displacement & 0x000000ff) << 16) | |
9849 | | ((got_displacement & 0x00000700) << 20) | |
9850 | | ((got_displacement & 0x00000800) >> 1) | |
9851 | | ((got_displacement & 0x0000f000) >> 12), | |
9852 | ptr + 0); | |
9853 | put_arm_insn (htab, output_bfd, | |
9854 | elf32_thumb2_plt_entry[1] | |
9855 | | ((got_displacement & 0x00ff0000) ) | |
9856 | | ((got_displacement & 0x07000000) << 4) | |
9857 | | ((got_displacement & 0x08000000) >> 17) | |
9858 | | ((got_displacement & 0xf0000000) >> 28), | |
9859 | ptr + 4); | |
9860 | put_arm_insn (htab, output_bfd, | |
9861 | elf32_thumb2_plt_entry[2], | |
9862 | ptr + 8); | |
9863 | put_arm_insn (htab, output_bfd, | |
9864 | elf32_thumb2_plt_entry[3], | |
9865 | ptr + 12); | |
9866 | } | |
9867 | else | |
9868 | { | |
9869 | /* Calculate the displacement between the PLT slot and the | |
9870 | entry in the GOT. The eight-byte offset accounts for the | |
9871 | value produced by adding to pc in the first instruction | |
9872 | of the PLT stub. */ | |
9873 | got_displacement = got_address - (plt_address + 8); | |
34e77a92 | 9874 | |
a57d1773 AM |
9875 | if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt)) |
9876 | { | |
9877 | put_thumb_insn (htab, output_bfd, | |
9878 | elf32_arm_plt_thumb_stub[0], ptr - 4); | |
9879 | put_thumb_insn (htab, output_bfd, | |
9880 | elf32_arm_plt_thumb_stub[1], ptr - 2); | |
34e77a92 | 9881 | } |
a57d1773 AM |
9882 | |
9883 | if (!elf32_arm_use_long_plt_entry) | |
b38cadfb | 9884 | { |
a57d1773 | 9885 | BFD_ASSERT ((got_displacement & 0xf0000000) == 0); |
b38cadfb NC |
9886 | |
9887 | put_arm_insn (htab, output_bfd, | |
a57d1773 AM |
9888 | elf32_arm_plt_entry_short[0] |
9889 | | ((got_displacement & 0x0ff00000) >> 20), | |
b38cadfb NC |
9890 | ptr + 0); |
9891 | put_arm_insn (htab, output_bfd, | |
a57d1773 AM |
9892 | elf32_arm_plt_entry_short[1] |
9893 | | ((got_displacement & 0x000ff000) >> 12), | |
9894 | ptr+ 4); | |
b38cadfb | 9895 | put_arm_insn (htab, output_bfd, |
a57d1773 AM |
9896 | elf32_arm_plt_entry_short[2] |
9897 | | (got_displacement & 0x00000fff), | |
b38cadfb | 9898 | ptr + 8); |
a57d1773 AM |
9899 | #ifdef FOUR_WORD_PLT |
9900 | bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12); | |
9901 | #endif | |
7801f98f | 9902 | } |
a57d1773 | 9903 | else |
57460bcf | 9904 | { |
eed94f8f | 9905 | put_arm_insn (htab, output_bfd, |
a57d1773 AM |
9906 | elf32_arm_plt_entry_long[0] |
9907 | | ((got_displacement & 0xf0000000) >> 28), | |
eed94f8f NC |
9908 | ptr + 0); |
9909 | put_arm_insn (htab, output_bfd, | |
a57d1773 AM |
9910 | elf32_arm_plt_entry_long[1] |
9911 | | ((got_displacement & 0x0ff00000) >> 20), | |
eed94f8f NC |
9912 | ptr + 4); |
9913 | put_arm_insn (htab, output_bfd, | |
a57d1773 AM |
9914 | elf32_arm_plt_entry_long[2] |
9915 | | ((got_displacement & 0x000ff000) >> 12), | |
9916 | ptr+ 8); | |
eed94f8f | 9917 | put_arm_insn (htab, output_bfd, |
a57d1773 AM |
9918 | elf32_arm_plt_entry_long[3] |
9919 | | (got_displacement & 0x00000fff), | |
eed94f8f | 9920 | ptr + 12); |
57460bcf | 9921 | } |
a57d1773 | 9922 | } |
34e77a92 | 9923 | |
a57d1773 AM |
9924 | /* Fill in the entry in the .rel(a).(i)plt section. */ |
9925 | rel.r_offset = got_address; | |
9926 | rel.r_addend = 0; | |
9927 | if (dynindx == -1) | |
9928 | { | |
9929 | /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE. | |
9930 | The dynamic linker or static executable then calls SYM_VALUE | |
9931 | to determine the correct run-time value of the .igot.plt entry. */ | |
9932 | rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE); | |
9933 | initial_got_entry = sym_value; | |
9934 | } | |
9935 | else | |
9936 | { | |
9937 | /* For FDPIC we will have to resolve a R_ARM_FUNCDESC_VALUE | |
9938 | used by PLT entry. */ | |
9939 | if (htab->fdpic_p) | |
34e77a92 | 9940 | { |
a57d1773 AM |
9941 | rel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE); |
9942 | initial_got_entry = 0; | |
34e77a92 RS |
9943 | } |
9944 | else | |
9945 | { | |
a57d1773 AM |
9946 | rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT); |
9947 | initial_got_entry = (splt->output_section->vma | |
9948 | + splt->output_offset); | |
9949 | ||
9950 | /* PR ld/16017 | |
9951 | When thumb only we need to set the LSB for any address that | |
9952 | will be used with an interworking branch instruction. */ | |
9953 | if (using_thumb_only (htab)) | |
9954 | initial_got_entry |= 1; | |
34e77a92 | 9955 | } |
a57d1773 | 9956 | } |
34e77a92 | 9957 | |
a57d1773 AM |
9958 | /* Fill in the entry in the global offset table. */ |
9959 | bfd_put_32 (output_bfd, initial_got_entry, | |
9960 | sgot->contents + got_offset); | |
9961 | ||
9962 | if (htab->fdpic_p && !(info->flags & DF_BIND_NOW)) | |
9963 | { | |
9964 | /* Setup initial funcdesc value. */ | |
9965 | /* FIXME: we don't support lazy binding because there is a | |
9966 | race condition between both words getting written and | |
9967 | some other thread attempting to read them. The ARM | |
9968 | architecture does not have an atomic 64 bit load/store | |
9969 | instruction that could be used to prevent it; it is | |
9970 | recommended that threaded FDPIC applications run with the | |
9971 | LD_BIND_NOW environment variable set. */ | |
cc850f74 NC |
9972 | bfd_put_32 (output_bfd, plt_address + 0x18, |
9973 | sgot->contents + got_offset); | |
9974 | bfd_put_32 (output_bfd, -1 /*TODO*/, | |
9975 | sgot->contents + got_offset + 4); | |
34e77a92 RS |
9976 | } |
9977 | ||
aba8c3de WN |
9978 | if (dynindx == -1) |
9979 | elf32_arm_add_dynreloc (output_bfd, info, srel, &rel); | |
9980 | else | |
9981 | { | |
7801f98f CL |
9982 | if (htab->fdpic_p) |
9983 | { | |
9984 | /* For FDPIC we put PLT relocationss into .rel.got when not | |
9985 | lazy binding otherwise we put them in .rel.plt. For now, | |
9986 | we don't support lazy binding so put it in .rel.got. */ | |
9987 | if (info->flags & DF_BIND_NOW) | |
cc850f74 | 9988 | elf32_arm_add_dynreloc (output_bfd, info, htab->root.srelgot, &rel); |
7801f98f | 9989 | else |
cc850f74 | 9990 | elf32_arm_add_dynreloc (output_bfd, info, htab->root.srelplt, &rel); |
7801f98f CL |
9991 | } |
9992 | else | |
9993 | { | |
9994 | loc = srel->contents + plt_index * RELOC_SIZE (htab); | |
9995 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); | |
9996 | } | |
aba8c3de | 9997 | } |
57460bcf | 9998 | |
0a1b45a2 | 9999 | return true; |
34e77a92 RS |
10000 | } |
10001 | ||
eb043451 PB |
10002 | /* Some relocations map to different relocations depending on the |
10003 | target. Return the real relocation. */ | |
8029a119 | 10004 | |
eb043451 PB |
10005 | static int |
10006 | arm_real_reloc_type (struct elf32_arm_link_hash_table * globals, | |
10007 | int r_type) | |
10008 | { | |
10009 | switch (r_type) | |
10010 | { | |
10011 | case R_ARM_TARGET1: | |
10012 | if (globals->target1_is_rel) | |
10013 | return R_ARM_REL32; | |
10014 | else | |
10015 | return R_ARM_ABS32; | |
10016 | ||
10017 | case R_ARM_TARGET2: | |
10018 | return globals->target2_reloc; | |
10019 | ||
10020 | default: | |
10021 | return r_type; | |
10022 | } | |
10023 | } | |
eb043451 | 10024 | |
ba93b8ac DJ |
10025 | /* Return the base VMA address which should be subtracted from real addresses |
10026 | when resolving @dtpoff relocation. | |
10027 | This is PT_TLS segment p_vaddr. */ | |
10028 | ||
10029 | static bfd_vma | |
10030 | dtpoff_base (struct bfd_link_info *info) | |
10031 | { | |
10032 | /* If tls_sec is NULL, we should have signalled an error already. */ | |
10033 | if (elf_hash_table (info)->tls_sec == NULL) | |
10034 | return 0; | |
10035 | return elf_hash_table (info)->tls_sec->vma; | |
10036 | } | |
10037 | ||
10038 | /* Return the relocation value for @tpoff relocation | |
10039 | if STT_TLS virtual address is ADDRESS. */ | |
10040 | ||
10041 | static bfd_vma | |
10042 | tpoff (struct bfd_link_info *info, bfd_vma address) | |
10043 | { | |
10044 | struct elf_link_hash_table *htab = elf_hash_table (info); | |
10045 | bfd_vma base; | |
10046 | ||
10047 | /* If tls_sec is NULL, we should have signalled an error already. */ | |
10048 | if (htab->tls_sec == NULL) | |
10049 | return 0; | |
10050 | base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power); | |
10051 | return address - htab->tls_sec->vma + base; | |
10052 | } | |
10053 | ||
00a97672 RS |
10054 | /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA. |
10055 | VALUE is the relocation value. */ | |
10056 | ||
10057 | static bfd_reloc_status_type | |
10058 | elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value) | |
10059 | { | |
10060 | if (value > 0xfff) | |
10061 | return bfd_reloc_overflow; | |
10062 | ||
10063 | value |= bfd_get_32 (abfd, data) & 0xfffff000; | |
10064 | bfd_put_32 (abfd, value, data); | |
10065 | return bfd_reloc_ok; | |
10066 | } | |
10067 | ||
0855e32b NS |
10068 | /* Handle TLS relaxations. Relaxing is possible for symbols that use |
10069 | R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or | |
10070 | R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link. | |
10071 | ||
10072 | Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller | |
10073 | is to then call final_link_relocate. Return other values in the | |
62672b10 NS |
10074 | case of error. |
10075 | ||
10076 | FIXME:When --emit-relocs is in effect, we'll emit relocs describing | |
10077 | the pre-relaxed code. It would be nice if the relocs were updated | |
10078 | to match the optimization. */ | |
0855e32b | 10079 | |
b38cadfb | 10080 | static bfd_reloc_status_type |
0855e32b | 10081 | elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals, |
b38cadfb | 10082 | bfd *input_bfd, asection *input_sec, bfd_byte *contents, |
0855e32b NS |
10083 | Elf_Internal_Rela *rel, unsigned long is_local) |
10084 | { | |
10085 | unsigned long insn; | |
b38cadfb | 10086 | |
0855e32b NS |
10087 | switch (ELF32_R_TYPE (rel->r_info)) |
10088 | { | |
10089 | default: | |
10090 | return bfd_reloc_notsupported; | |
b38cadfb | 10091 | |
0855e32b NS |
10092 | case R_ARM_TLS_GOTDESC: |
10093 | if (is_local) | |
10094 | insn = 0; | |
10095 | else | |
10096 | { | |
10097 | insn = bfd_get_32 (input_bfd, contents + rel->r_offset); | |
10098 | if (insn & 1) | |
10099 | insn -= 5; /* THUMB */ | |
10100 | else | |
10101 | insn -= 8; /* ARM */ | |
10102 | } | |
10103 | bfd_put_32 (input_bfd, insn, contents + rel->r_offset); | |
10104 | return bfd_reloc_continue; | |
10105 | ||
10106 | case R_ARM_THM_TLS_DESCSEQ: | |
10107 | /* Thumb insn. */ | |
10108 | insn = bfd_get_16 (input_bfd, contents + rel->r_offset); | |
10109 | if ((insn & 0xff78) == 0x4478) /* add rx, pc */ | |
10110 | { | |
10111 | if (is_local) | |
10112 | /* nop */ | |
10113 | bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset); | |
10114 | } | |
10115 | else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */ | |
10116 | { | |
10117 | if (is_local) | |
10118 | /* nop */ | |
10119 | bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset); | |
10120 | else | |
10121 | /* ldr rx,[ry] */ | |
10122 | bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset); | |
10123 | } | |
10124 | else if ((insn & 0xff87) == 0x4780) /* blx rx */ | |
10125 | { | |
10126 | if (is_local) | |
10127 | /* nop */ | |
10128 | bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset); | |
10129 | else | |
10130 | /* mov r0, rx */ | |
10131 | bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78), | |
10132 | contents + rel->r_offset); | |
10133 | } | |
10134 | else | |
10135 | { | |
10136 | if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800) | |
10137 | /* It's a 32 bit instruction, fetch the rest of it for | |
10138 | error generation. */ | |
10139 | insn = (insn << 16) | |
10140 | | bfd_get_16 (input_bfd, contents + rel->r_offset + 2); | |
4eca0228 | 10141 | _bfd_error_handler |
695344c0 | 10142 | /* xgettext:c-format */ |
2dcf00ce | 10143 | (_("%pB(%pA+%#" PRIx64 "): " |
90b6238f AM |
10144 | "unexpected %s instruction '%#lx' in TLS trampoline"), |
10145 | input_bfd, input_sec, (uint64_t) rel->r_offset, | |
10146 | "Thumb", insn); | |
0855e32b NS |
10147 | return bfd_reloc_notsupported; |
10148 | } | |
10149 | break; | |
b38cadfb | 10150 | |
0855e32b NS |
10151 | case R_ARM_TLS_DESCSEQ: |
10152 | /* arm insn. */ | |
10153 | insn = bfd_get_32 (input_bfd, contents + rel->r_offset); | |
10154 | if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */ | |
10155 | { | |
10156 | if (is_local) | |
10157 | /* mov rx, ry */ | |
10158 | bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff), | |
10159 | contents + rel->r_offset); | |
10160 | } | |
10161 | else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/ | |
10162 | { | |
10163 | if (is_local) | |
10164 | /* nop */ | |
10165 | bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset); | |
10166 | else | |
10167 | /* ldr rx,[ry] */ | |
10168 | bfd_put_32 (input_bfd, insn & 0xfffff000, | |
10169 | contents + rel->r_offset); | |
10170 | } | |
10171 | else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */ | |
10172 | { | |
10173 | if (is_local) | |
10174 | /* nop */ | |
10175 | bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset); | |
10176 | else | |
10177 | /* mov r0, rx */ | |
10178 | bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf), | |
10179 | contents + rel->r_offset); | |
10180 | } | |
10181 | else | |
10182 | { | |
4eca0228 | 10183 | _bfd_error_handler |
695344c0 | 10184 | /* xgettext:c-format */ |
2dcf00ce | 10185 | (_("%pB(%pA+%#" PRIx64 "): " |
90b6238f AM |
10186 | "unexpected %s instruction '%#lx' in TLS trampoline"), |
10187 | input_bfd, input_sec, (uint64_t) rel->r_offset, | |
10188 | "ARM", insn); | |
0855e32b NS |
10189 | return bfd_reloc_notsupported; |
10190 | } | |
10191 | break; | |
10192 | ||
10193 | case R_ARM_TLS_CALL: | |
10194 | /* GD->IE relaxation, turn the instruction into 'nop' or | |
10195 | 'ldr r0, [pc,r0]' */ | |
10196 | insn = is_local ? 0xe1a00000 : 0xe79f0000; | |
10197 | bfd_put_32 (input_bfd, insn, contents + rel->r_offset); | |
10198 | break; | |
b38cadfb | 10199 | |
0855e32b | 10200 | case R_ARM_THM_TLS_CALL: |
6a631e86 | 10201 | /* GD->IE relaxation. */ |
0855e32b NS |
10202 | if (!is_local) |
10203 | /* add r0,pc; ldr r0, [r0] */ | |
10204 | insn = 0x44786800; | |
60a019a0 | 10205 | else if (using_thumb2 (globals)) |
0855e32b NS |
10206 | /* nop.w */ |
10207 | insn = 0xf3af8000; | |
10208 | else | |
10209 | /* nop; nop */ | |
10210 | insn = 0xbf00bf00; | |
b38cadfb | 10211 | |
0855e32b NS |
10212 | bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset); |
10213 | bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2); | |
10214 | break; | |
10215 | } | |
10216 | return bfd_reloc_ok; | |
10217 | } | |
10218 | ||
4962c51a MS |
10219 | /* For a given value of n, calculate the value of G_n as required to |
10220 | deal with group relocations. We return it in the form of an | |
10221 | encoded constant-and-rotation, together with the final residual. If n is | |
10222 | specified as less than zero, then final_residual is filled with the | |
10223 | input value and no further action is performed. */ | |
10224 | ||
10225 | static bfd_vma | |
10226 | calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual) | |
10227 | { | |
10228 | int current_n; | |
10229 | bfd_vma g_n; | |
10230 | bfd_vma encoded_g_n = 0; | |
10231 | bfd_vma residual = value; /* Also known as Y_n. */ | |
10232 | ||
10233 | for (current_n = 0; current_n <= n; current_n++) | |
10234 | { | |
10235 | int shift; | |
10236 | ||
10237 | /* Calculate which part of the value to mask. */ | |
10238 | if (residual == 0) | |
99059e56 | 10239 | shift = 0; |
4962c51a | 10240 | else |
99059e56 RM |
10241 | { |
10242 | int msb; | |
10243 | ||
10244 | /* Determine the most significant bit in the residual and | |
10245 | align the resulting value to a 2-bit boundary. */ | |
10246 | for (msb = 30; msb >= 0; msb -= 2) | |
00c91124 | 10247 | if (residual & (3u << msb)) |
99059e56 RM |
10248 | break; |
10249 | ||
10250 | /* The desired shift is now (msb - 6), or zero, whichever | |
10251 | is the greater. */ | |
10252 | shift = msb - 6; | |
10253 | if (shift < 0) | |
10254 | shift = 0; | |
10255 | } | |
4962c51a MS |
10256 | |
10257 | /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */ | |
10258 | g_n = residual & (0xff << shift); | |
10259 | encoded_g_n = (g_n >> shift) | |
99059e56 | 10260 | | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8); |
4962c51a MS |
10261 | |
10262 | /* Calculate the residual for the next time around. */ | |
10263 | residual &= ~g_n; | |
10264 | } | |
10265 | ||
10266 | *final_residual = residual; | |
10267 | ||
10268 | return encoded_g_n; | |
10269 | } | |
10270 | ||
10271 | /* Given an ARM instruction, determine whether it is an ADD or a SUB. | |
10272 | Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */ | |
906e58ca | 10273 | |
4962c51a | 10274 | static int |
906e58ca | 10275 | identify_add_or_sub (bfd_vma insn) |
4962c51a MS |
10276 | { |
10277 | int opcode = insn & 0x1e00000; | |
10278 | ||
10279 | if (opcode == 1 << 23) /* ADD */ | |
10280 | return 1; | |
10281 | ||
10282 | if (opcode == 1 << 22) /* SUB */ | |
10283 | return -1; | |
10284 | ||
10285 | return 0; | |
10286 | } | |
10287 | ||
252b5132 | 10288 | /* Perform a relocation as part of a final link. */ |
9b485d32 | 10289 | |
252b5132 | 10290 | static bfd_reloc_status_type |
07d6d2b8 AM |
10291 | elf32_arm_final_link_relocate (reloc_howto_type * howto, |
10292 | bfd * input_bfd, | |
10293 | bfd * output_bfd, | |
10294 | asection * input_section, | |
10295 | bfd_byte * contents, | |
10296 | Elf_Internal_Rela * rel, | |
10297 | bfd_vma value, | |
10298 | struct bfd_link_info * info, | |
10299 | asection * sym_sec, | |
10300 | const char * sym_name, | |
10301 | unsigned char st_type, | |
10302 | enum arm_st_branch_type branch_type, | |
0945cdfd | 10303 | struct elf_link_hash_entry * h, |
0a1b45a2 | 10304 | bool * unresolved_reloc_p, |
07d6d2b8 AM |
10305 | char ** error_message) |
10306 | { | |
10307 | unsigned long r_type = howto->type; | |
10308 | unsigned long r_symndx; | |
10309 | bfd_byte * hit_data = contents + rel->r_offset; | |
10310 | bfd_vma * local_got_offsets; | |
10311 | bfd_vma * local_tlsdesc_gotents; | |
10312 | asection * sgot; | |
10313 | asection * splt; | |
10314 | asection * sreloc = NULL; | |
10315 | asection * srelgot; | |
10316 | bfd_vma addend; | |
10317 | bfd_signed_vma signed_addend; | |
10318 | unsigned char dynreloc_st_type; | |
10319 | bfd_vma dynreloc_value; | |
ba96a88f | 10320 | struct elf32_arm_link_hash_table * globals; |
34e77a92 | 10321 | struct elf32_arm_link_hash_entry *eh; |
07d6d2b8 AM |
10322 | union gotplt_union *root_plt; |
10323 | struct arm_plt_info *arm_plt; | |
10324 | bfd_vma plt_offset; | |
10325 | bfd_vma gotplt_offset; | |
0a1b45a2 AM |
10326 | bool has_iplt_entry; |
10327 | bool resolved_to_zero; | |
f21f3fe0 | 10328 | |
9c504268 | 10329 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
10330 | if (globals == NULL) |
10331 | return bfd_reloc_notsupported; | |
9c504268 | 10332 | |
0ffa91dd | 10333 | BFD_ASSERT (is_arm_elf (input_bfd)); |
47aeb64c | 10334 | BFD_ASSERT (howto != NULL); |
0ffa91dd NC |
10335 | |
10336 | /* Some relocation types map to different relocations depending on the | |
9c504268 | 10337 | target. We pick the right one here. */ |
eb043451 | 10338 | r_type = arm_real_reloc_type (globals, r_type); |
0855e32b NS |
10339 | |
10340 | /* It is possible to have linker relaxations on some TLS access | |
10341 | models. Update our information here. */ | |
10342 | r_type = elf32_arm_tls_transition (info, r_type, h); | |
10343 | ||
eb043451 PB |
10344 | if (r_type != howto->type) |
10345 | howto = elf32_arm_howto_from_type (r_type); | |
9c504268 | 10346 | |
34e77a92 | 10347 | eh = (struct elf32_arm_link_hash_entry *) h; |
362d30a1 | 10348 | sgot = globals->root.sgot; |
252b5132 | 10349 | local_got_offsets = elf_local_got_offsets (input_bfd); |
0855e32b NS |
10350 | local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd); |
10351 | ||
34e77a92 RS |
10352 | if (globals->root.dynamic_sections_created) |
10353 | srelgot = globals->root.srelgot; | |
10354 | else | |
10355 | srelgot = NULL; | |
10356 | ||
252b5132 RH |
10357 | r_symndx = ELF32_R_SYM (rel->r_info); |
10358 | ||
4e7fd91e | 10359 | if (globals->use_rel) |
ba96a88f | 10360 | { |
d2327e47 | 10361 | bfd_vma sign; |
4e7fd91e | 10362 | |
57698478 | 10363 | switch (bfd_get_reloc_size (howto)) |
4e7fd91e | 10364 | { |
57698478 AM |
10365 | case 1: addend = bfd_get_8 (input_bfd, hit_data); break; |
10366 | case 2: addend = bfd_get_16 (input_bfd, hit_data); break; | |
10367 | case 4: addend = bfd_get_32 (input_bfd, hit_data); break; | |
d2327e47 | 10368 | default: addend = 0; break; |
4e7fd91e | 10369 | } |
d2327e47 AM |
10370 | /* Note: the addend and signed_addend calculated here are |
10371 | incorrect for any split field. */ | |
10372 | addend &= howto->src_mask; | |
10373 | sign = howto->src_mask & ~(howto->src_mask >> 1); | |
10374 | signed_addend = (addend ^ sign) - sign; | |
10375 | signed_addend = (bfd_vma) signed_addend << howto->rightshift; | |
10376 | addend <<= howto->rightshift; | |
ba96a88f NC |
10377 | } |
10378 | else | |
4e7fd91e | 10379 | addend = signed_addend = rel->r_addend; |
f21f3fe0 | 10380 | |
39f21624 NC |
10381 | /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we |
10382 | are resolving a function call relocation. */ | |
10383 | if (using_thumb_only (globals) | |
10384 | && (r_type == R_ARM_THM_CALL | |
10385 | || r_type == R_ARM_THM_JUMP24) | |
10386 | && branch_type == ST_BRANCH_TO_ARM) | |
10387 | branch_type = ST_BRANCH_TO_THUMB; | |
10388 | ||
34e77a92 RS |
10389 | /* Record the symbol information that should be used in dynamic |
10390 | relocations. */ | |
10391 | dynreloc_st_type = st_type; | |
10392 | dynreloc_value = value; | |
10393 | if (branch_type == ST_BRANCH_TO_THUMB) | |
10394 | dynreloc_value |= 1; | |
10395 | ||
10396 | /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and | |
10397 | VALUE appropriately for relocations that we resolve at link time. */ | |
0a1b45a2 | 10398 | has_iplt_entry = false; |
4ba2ef8f TP |
10399 | if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt, |
10400 | &arm_plt) | |
34e77a92 RS |
10401 | && root_plt->offset != (bfd_vma) -1) |
10402 | { | |
10403 | plt_offset = root_plt->offset; | |
10404 | gotplt_offset = arm_plt->got_offset; | |
10405 | ||
10406 | if (h == NULL || eh->is_iplt) | |
10407 | { | |
0a1b45a2 | 10408 | has_iplt_entry = true; |
34e77a92 RS |
10409 | splt = globals->root.iplt; |
10410 | ||
10411 | /* Populate .iplt entries here, because not all of them will | |
10412 | be seen by finish_dynamic_symbol. The lower bit is set if | |
10413 | we have already populated the entry. */ | |
10414 | if (plt_offset & 1) | |
10415 | plt_offset--; | |
10416 | else | |
10417 | { | |
57460bcf NC |
10418 | if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt, |
10419 | -1, dynreloc_value)) | |
10420 | root_plt->offset |= 1; | |
10421 | else | |
10422 | return bfd_reloc_notsupported; | |
34e77a92 RS |
10423 | } |
10424 | ||
10425 | /* Static relocations always resolve to the .iplt entry. */ | |
10426 | st_type = STT_FUNC; | |
10427 | value = (splt->output_section->vma | |
10428 | + splt->output_offset | |
10429 | + plt_offset); | |
10430 | branch_type = ST_BRANCH_TO_ARM; | |
10431 | ||
10432 | /* If there are non-call relocations that resolve to the .iplt | |
10433 | entry, then all dynamic ones must too. */ | |
10434 | if (arm_plt->noncall_refcount != 0) | |
10435 | { | |
10436 | dynreloc_st_type = st_type; | |
10437 | dynreloc_value = value; | |
10438 | } | |
10439 | } | |
10440 | else | |
10441 | /* We populate the .plt entry in finish_dynamic_symbol. */ | |
10442 | splt = globals->root.splt; | |
10443 | } | |
10444 | else | |
10445 | { | |
10446 | splt = NULL; | |
10447 | plt_offset = (bfd_vma) -1; | |
10448 | gotplt_offset = (bfd_vma) -1; | |
10449 | } | |
10450 | ||
95b03e4a L |
10451 | resolved_to_zero = (h != NULL |
10452 | && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h)); | |
10453 | ||
252b5132 RH |
10454 | switch (r_type) |
10455 | { | |
10456 | case R_ARM_NONE: | |
28a094c2 DJ |
10457 | /* We don't need to find a value for this symbol. It's just a |
10458 | marker. */ | |
0a1b45a2 | 10459 | *unresolved_reloc_p = false; |
252b5132 RH |
10460 | return bfd_reloc_ok; |
10461 | ||
00a97672 | 10462 | case R_ARM_ABS12: |
90c14f0c | 10463 | if (globals->root.target_os != is_vxworks) |
00a97672 | 10464 | return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend); |
1a0670f3 | 10465 | /* Fall through. */ |
00a97672 | 10466 | |
252b5132 RH |
10467 | case R_ARM_PC24: |
10468 | case R_ARM_ABS32: | |
bb224fc3 | 10469 | case R_ARM_ABS32_NOI: |
252b5132 | 10470 | case R_ARM_REL32: |
bb224fc3 | 10471 | case R_ARM_REL32_NOI: |
5b5bb741 PB |
10472 | case R_ARM_CALL: |
10473 | case R_ARM_JUMP24: | |
dfc5f959 | 10474 | case R_ARM_XPC25: |
eb043451 | 10475 | case R_ARM_PREL31: |
7359ea65 | 10476 | case R_ARM_PLT32: |
7359ea65 DJ |
10477 | /* Handle relocations which should use the PLT entry. ABS32/REL32 |
10478 | will use the symbol's value, which may point to a PLT entry, but we | |
10479 | don't need to handle that here. If we created a PLT entry, all | |
5fa9e92f CL |
10480 | branches in this object should go to it, except if the PLT is too |
10481 | far away, in which case a long branch stub should be inserted. */ | |
bb224fc3 | 10482 | if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32 |
99059e56 | 10483 | && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI |
155d87d7 CL |
10484 | && r_type != R_ARM_CALL |
10485 | && r_type != R_ARM_JUMP24 | |
10486 | && r_type != R_ARM_PLT32) | |
34e77a92 | 10487 | && plt_offset != (bfd_vma) -1) |
7359ea65 | 10488 | { |
34e77a92 RS |
10489 | /* If we've created a .plt section, and assigned a PLT entry |
10490 | to this function, it must either be a STT_GNU_IFUNC reference | |
10491 | or not be known to bind locally. In other cases, we should | |
10492 | have cleared the PLT entry by now. */ | |
10493 | BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h)); | |
7359ea65 DJ |
10494 | |
10495 | value = (splt->output_section->vma | |
10496 | + splt->output_offset | |
34e77a92 | 10497 | + plt_offset); |
0a1b45a2 | 10498 | *unresolved_reloc_p = false; |
7359ea65 DJ |
10499 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
10500 | contents, rel->r_offset, value, | |
00a97672 | 10501 | rel->r_addend); |
7359ea65 DJ |
10502 | } |
10503 | ||
67687978 PB |
10504 | /* When generating a shared object or relocatable executable, these |
10505 | relocations are copied into the output file to be resolved at | |
10506 | run time. */ | |
0e1862bb | 10507 | if ((bfd_link_pic (info) |
e8b09b87 CL |
10508 | || globals->root.is_relocatable_executable |
10509 | || globals->fdpic_p) | |
7359ea65 | 10510 | && (input_section->flags & SEC_ALLOC) |
90c14f0c | 10511 | && !(globals->root.target_os == is_vxworks |
3348747a NS |
10512 | && strcmp (input_section->output_section->name, |
10513 | ".tls_vars") == 0) | |
bb224fc3 | 10514 | && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI) |
ee06dc07 | 10515 | || !SYMBOL_CALLS_LOCAL (info, h)) |
ca6b5f82 AM |
10516 | && !(input_bfd == globals->stub_bfd |
10517 | && strstr (input_section->name, STUB_SUFFIX)) | |
7359ea65 | 10518 | && (h == NULL |
95b03e4a L |
10519 | || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT |
10520 | && !resolved_to_zero) | |
7359ea65 DJ |
10521 | || h->root.type != bfd_link_hash_undefweak) |
10522 | && r_type != R_ARM_PC24 | |
5b5bb741 PB |
10523 | && r_type != R_ARM_CALL |
10524 | && r_type != R_ARM_JUMP24 | |
ee06dc07 | 10525 | && r_type != R_ARM_PREL31 |
7359ea65 | 10526 | && r_type != R_ARM_PLT32) |
252b5132 | 10527 | { |
947216bf | 10528 | Elf_Internal_Rela outrel; |
0a1b45a2 | 10529 | bool skip, relocate; |
e8b09b87 | 10530 | int isrofixup = 0; |
f21f3fe0 | 10531 | |
52db4ec2 JW |
10532 | if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI) |
10533 | && !h->def_regular) | |
10534 | { | |
10535 | char *v = _("shared object"); | |
10536 | ||
0e1862bb | 10537 | if (bfd_link_executable (info)) |
52db4ec2 JW |
10538 | v = _("PIE executable"); |
10539 | ||
4eca0228 | 10540 | _bfd_error_handler |
871b3ab2 | 10541 | (_("%pB: relocation %s against external or undefined symbol `%s'" |
52db4ec2 JW |
10542 | " can not be used when making a %s; recompile with -fPIC"), input_bfd, |
10543 | elf32_arm_howto_table_1[r_type].name, h->root.root.string, v); | |
10544 | return bfd_reloc_notsupported; | |
10545 | } | |
10546 | ||
0a1b45a2 | 10547 | *unresolved_reloc_p = false; |
0945cdfd | 10548 | |
34e77a92 | 10549 | if (sreloc == NULL && globals->root.dynamic_sections_created) |
252b5132 | 10550 | { |
83bac4b0 NC |
10551 | sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section, |
10552 | ! globals->use_rel); | |
f21f3fe0 | 10553 | |
83bac4b0 | 10554 | if (sreloc == NULL) |
252b5132 | 10555 | return bfd_reloc_notsupported; |
252b5132 | 10556 | } |
f21f3fe0 | 10557 | |
0a1b45a2 AM |
10558 | skip = false; |
10559 | relocate = false; | |
f21f3fe0 | 10560 | |
00a97672 | 10561 | outrel.r_addend = addend; |
c629eae0 JJ |
10562 | outrel.r_offset = |
10563 | _bfd_elf_section_offset (output_bfd, info, input_section, | |
10564 | rel->r_offset); | |
10565 | if (outrel.r_offset == (bfd_vma) -1) | |
0a1b45a2 | 10566 | skip = true; |
0bb2d96a | 10567 | else if (outrel.r_offset == (bfd_vma) -2) |
0a1b45a2 | 10568 | skip = true, relocate = true; |
252b5132 RH |
10569 | outrel.r_offset += (input_section->output_section->vma |
10570 | + input_section->output_offset); | |
f21f3fe0 | 10571 | |
252b5132 | 10572 | if (skip) |
0bb2d96a | 10573 | memset (&outrel, 0, sizeof outrel); |
5e681ec4 PB |
10574 | else if (h != NULL |
10575 | && h->dynindx != -1 | |
0e1862bb | 10576 | && (!bfd_link_pic (info) |
1dcb9720 JW |
10577 | || !(bfd_link_pie (info) |
10578 | || SYMBOLIC_BIND (info, h)) | |
f5385ebf | 10579 | || !h->def_regular)) |
5e681ec4 | 10580 | outrel.r_info = ELF32_R_INFO (h->dynindx, r_type); |
252b5132 RH |
10581 | else |
10582 | { | |
a16385dc MM |
10583 | int symbol; |
10584 | ||
5e681ec4 | 10585 | /* This symbol is local, or marked to become local. */ |
e8b09b87 | 10586 | BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI |
cc850f74 | 10587 | || (globals->fdpic_p && !bfd_link_pic (info))); |
a57d1773 AM |
10588 | /* On SVR4-ish systems, the dynamic loader cannot |
10589 | relocate the text and data segments independently, | |
10590 | so the symbol does not matter. */ | |
10591 | symbol = 0; | |
34e77a92 RS |
10592 | if (dynreloc_st_type == STT_GNU_IFUNC) |
10593 | /* We have an STT_GNU_IFUNC symbol that doesn't resolve | |
10594 | to the .iplt entry. Instead, every non-call reference | |
10595 | must use an R_ARM_IRELATIVE relocation to obtain the | |
10596 | correct run-time address. */ | |
10597 | outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE); | |
cc850f74 | 10598 | else if (globals->fdpic_p && !bfd_link_pic (info)) |
e8b09b87 | 10599 | isrofixup = 1; |
34e77a92 RS |
10600 | else |
10601 | outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE); | |
00a97672 | 10602 | if (globals->use_rel) |
0a1b45a2 | 10603 | relocate = true; |
00a97672 | 10604 | else |
34e77a92 | 10605 | outrel.r_addend += dynreloc_value; |
252b5132 | 10606 | } |
f21f3fe0 | 10607 | |
e8b09b87 | 10608 | if (isrofixup) |
cc850f74 | 10609 | arm_elf_add_rofixup (output_bfd, globals->srofixup, outrel.r_offset); |
e8b09b87 CL |
10610 | else |
10611 | elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel); | |
9a5aca8c | 10612 | |
f21f3fe0 | 10613 | /* If this reloc is against an external symbol, we do not want to |
252b5132 | 10614 | fiddle with the addend. Otherwise, we need to include the symbol |
9b485d32 | 10615 | value so that it becomes an addend for the dynamic reloc. */ |
252b5132 RH |
10616 | if (! relocate) |
10617 | return bfd_reloc_ok; | |
9a5aca8c | 10618 | |
f21f3fe0 | 10619 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
34e77a92 RS |
10620 | contents, rel->r_offset, |
10621 | dynreloc_value, (bfd_vma) 0); | |
252b5132 RH |
10622 | } |
10623 | else switch (r_type) | |
10624 | { | |
00a97672 RS |
10625 | case R_ARM_ABS12: |
10626 | return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend); | |
10627 | ||
dfc5f959 | 10628 | case R_ARM_XPC25: /* Arm BLX instruction. */ |
5b5bb741 PB |
10629 | case R_ARM_CALL: |
10630 | case R_ARM_JUMP24: | |
8029a119 | 10631 | case R_ARM_PC24: /* Arm B/BL instruction. */ |
7359ea65 | 10632 | case R_ARM_PLT32: |
906e58ca | 10633 | { |
906e58ca NC |
10634 | struct elf32_arm_stub_hash_entry *stub_entry = NULL; |
10635 | ||
dfc5f959 | 10636 | if (r_type == R_ARM_XPC25) |
252b5132 | 10637 | { |
dfc5f959 NC |
10638 | /* Check for Arm calling Arm function. */ |
10639 | /* FIXME: Should we translate the instruction into a BL | |
10640 | instruction instead ? */ | |
35fc36a8 | 10641 | if (branch_type != ST_BRANCH_TO_THUMB) |
4eca0228 | 10642 | _bfd_error_handler |
90b6238f AM |
10643 | (_("\%pB: warning: %s BLX instruction targets" |
10644 | " %s function '%s'"), | |
10645 | input_bfd, "ARM", | |
10646 | "ARM", h ? h->root.root.string : "(local)"); | |
dfc5f959 | 10647 | } |
155d87d7 | 10648 | else if (r_type == R_ARM_PC24) |
dfc5f959 NC |
10649 | { |
10650 | /* Check for Arm calling Thumb function. */ | |
35fc36a8 | 10651 | if (branch_type == ST_BRANCH_TO_THUMB) |
dfc5f959 | 10652 | { |
f2a9dd69 DJ |
10653 | if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd, |
10654 | output_bfd, input_section, | |
10655 | hit_data, sym_sec, rel->r_offset, | |
10656 | signed_addend, value, | |
10657 | error_message)) | |
10658 | return bfd_reloc_ok; | |
10659 | else | |
10660 | return bfd_reloc_dangerous; | |
dfc5f959 | 10661 | } |
252b5132 | 10662 | } |
ba96a88f | 10663 | |
906e58ca | 10664 | /* Check if a stub has to be inserted because the |
8029a119 | 10665 | destination is too far or we are changing mode. */ |
155d87d7 CL |
10666 | if ( r_type == R_ARM_CALL |
10667 | || r_type == R_ARM_JUMP24 | |
10668 | || r_type == R_ARM_PLT32) | |
906e58ca | 10669 | { |
fe33d2fa CL |
10670 | enum elf32_arm_stub_type stub_type = arm_stub_none; |
10671 | struct elf32_arm_link_hash_entry *hash; | |
10672 | ||
10673 | hash = (struct elf32_arm_link_hash_entry *) h; | |
10674 | stub_type = arm_type_of_stub (info, input_section, rel, | |
34e77a92 RS |
10675 | st_type, &branch_type, |
10676 | hash, value, sym_sec, | |
fe33d2fa | 10677 | input_bfd, sym_name); |
5fa9e92f | 10678 | |
fe33d2fa | 10679 | if (stub_type != arm_stub_none) |
906e58ca NC |
10680 | { |
10681 | /* The target is out of reach, so redirect the | |
10682 | branch to the local stub for this function. */ | |
906e58ca NC |
10683 | stub_entry = elf32_arm_get_stub_entry (input_section, |
10684 | sym_sec, h, | |
fe33d2fa CL |
10685 | rel, globals, |
10686 | stub_type); | |
9cd3e4e5 NC |
10687 | { |
10688 | if (stub_entry != NULL) | |
10689 | value = (stub_entry->stub_offset | |
10690 | + stub_entry->stub_sec->output_offset | |
10691 | + stub_entry->stub_sec->output_section->vma); | |
10692 | ||
10693 | if (plt_offset != (bfd_vma) -1) | |
0a1b45a2 | 10694 | *unresolved_reloc_p = false; |
9cd3e4e5 | 10695 | } |
906e58ca | 10696 | } |
fe33d2fa CL |
10697 | else |
10698 | { | |
10699 | /* If the call goes through a PLT entry, make sure to | |
10700 | check distance to the right destination address. */ | |
34e77a92 | 10701 | if (plt_offset != (bfd_vma) -1) |
fe33d2fa CL |
10702 | { |
10703 | value = (splt->output_section->vma | |
10704 | + splt->output_offset | |
34e77a92 | 10705 | + plt_offset); |
0a1b45a2 | 10706 | *unresolved_reloc_p = false; |
fe33d2fa CL |
10707 | /* The PLT entry is in ARM mode, regardless of the |
10708 | target function. */ | |
35fc36a8 | 10709 | branch_type = ST_BRANCH_TO_ARM; |
fe33d2fa CL |
10710 | } |
10711 | } | |
906e58ca NC |
10712 | } |
10713 | ||
dea514f5 PB |
10714 | /* The ARM ELF ABI says that this reloc is computed as: S - P + A |
10715 | where: | |
10716 | S is the address of the symbol in the relocation. | |
10717 | P is address of the instruction being relocated. | |
10718 | A is the addend (extracted from the instruction) in bytes. | |
10719 | ||
10720 | S is held in 'value'. | |
10721 | P is the base address of the section containing the | |
10722 | instruction plus the offset of the reloc into that | |
10723 | section, ie: | |
10724 | (input_section->output_section->vma + | |
10725 | input_section->output_offset + | |
10726 | rel->r_offset). | |
10727 | A is the addend, converted into bytes, ie: | |
10728 | (signed_addend * 4) | |
10729 | ||
10730 | Note: None of these operations have knowledge of the pipeline | |
10731 | size of the processor, thus it is up to the assembler to | |
10732 | encode this information into the addend. */ | |
10733 | value -= (input_section->output_section->vma | |
10734 | + input_section->output_offset); | |
10735 | value -= rel->r_offset; | |
d2327e47 | 10736 | value += signed_addend; |
23080146 | 10737 | |
dcb5e6e6 NC |
10738 | signed_addend = value; |
10739 | signed_addend >>= howto->rightshift; | |
9a5aca8c | 10740 | |
5ab79981 | 10741 | /* A branch to an undefined weak symbol is turned into a jump to |
ffcb4889 | 10742 | the next instruction unless a PLT entry will be created. |
77b4f08f | 10743 | Do the same for local undefined symbols (but not for STN_UNDEF). |
cd1dac3d DG |
10744 | The jump to the next instruction is optimized as a NOP depending |
10745 | on the architecture. */ | |
ffcb4889 | 10746 | if (h ? (h->root.type == bfd_link_hash_undefweak |
34e77a92 | 10747 | && plt_offset == (bfd_vma) -1) |
77b4f08f | 10748 | : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec)) |
5ab79981 | 10749 | { |
cd1dac3d DG |
10750 | value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000); |
10751 | ||
10752 | if (arch_has_arm_nop (globals)) | |
10753 | value |= 0x0320f000; | |
10754 | else | |
10755 | value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */ | |
5ab79981 PB |
10756 | } |
10757 | else | |
59f2c4e7 | 10758 | { |
9b485d32 | 10759 | /* Perform a signed range check. */ |
dcb5e6e6 | 10760 | if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1)) |
59f2c4e7 NC |
10761 | || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1))) |
10762 | return bfd_reloc_overflow; | |
9a5aca8c | 10763 | |
5ab79981 | 10764 | addend = (value & 2); |
39b41c9c | 10765 | |
5ab79981 PB |
10766 | value = (signed_addend & howto->dst_mask) |
10767 | | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask)); | |
39b41c9c | 10768 | |
5ab79981 PB |
10769 | if (r_type == R_ARM_CALL) |
10770 | { | |
155d87d7 | 10771 | /* Set the H bit in the BLX instruction. */ |
35fc36a8 | 10772 | if (branch_type == ST_BRANCH_TO_THUMB) |
155d87d7 CL |
10773 | { |
10774 | if (addend) | |
10775 | value |= (1 << 24); | |
10776 | else | |
10777 | value &= ~(bfd_vma)(1 << 24); | |
10778 | } | |
10779 | ||
5ab79981 | 10780 | /* Select the correct instruction (BL or BLX). */ |
906e58ca | 10781 | /* Only if we are not handling a BL to a stub. In this |
8029a119 | 10782 | case, mode switching is performed by the stub. */ |
35fc36a8 | 10783 | if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry) |
5ab79981 | 10784 | value |= (1 << 28); |
63e1a0fc | 10785 | else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN) |
5ab79981 PB |
10786 | { |
10787 | value &= ~(bfd_vma)(1 << 28); | |
10788 | value |= (1 << 24); | |
10789 | } | |
39b41c9c PB |
10790 | } |
10791 | } | |
906e58ca | 10792 | } |
252b5132 | 10793 | break; |
f21f3fe0 | 10794 | |
252b5132 RH |
10795 | case R_ARM_ABS32: |
10796 | value += addend; | |
35fc36a8 | 10797 | if (branch_type == ST_BRANCH_TO_THUMB) |
252b5132 RH |
10798 | value |= 1; |
10799 | break; | |
f21f3fe0 | 10800 | |
bb224fc3 MS |
10801 | case R_ARM_ABS32_NOI: |
10802 | value += addend; | |
10803 | break; | |
10804 | ||
252b5132 | 10805 | case R_ARM_REL32: |
a8bc6c78 | 10806 | value += addend; |
35fc36a8 | 10807 | if (branch_type == ST_BRANCH_TO_THUMB) |
a8bc6c78 | 10808 | value |= 1; |
252b5132 | 10809 | value -= (input_section->output_section->vma |
62efb346 | 10810 | + input_section->output_offset + rel->r_offset); |
252b5132 | 10811 | break; |
eb043451 | 10812 | |
bb224fc3 MS |
10813 | case R_ARM_REL32_NOI: |
10814 | value += addend; | |
10815 | value -= (input_section->output_section->vma | |
10816 | + input_section->output_offset + rel->r_offset); | |
10817 | break; | |
10818 | ||
eb043451 PB |
10819 | case R_ARM_PREL31: |
10820 | value -= (input_section->output_section->vma | |
10821 | + input_section->output_offset + rel->r_offset); | |
10822 | value += signed_addend; | |
10823 | if (! h || h->root.type != bfd_link_hash_undefweak) | |
10824 | { | |
8029a119 | 10825 | /* Check for overflow. */ |
eb043451 PB |
10826 | if ((value ^ (value >> 1)) & (1 << 30)) |
10827 | return bfd_reloc_overflow; | |
10828 | } | |
10829 | value &= 0x7fffffff; | |
10830 | value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000); | |
35fc36a8 | 10831 | if (branch_type == ST_BRANCH_TO_THUMB) |
eb043451 PB |
10832 | value |= 1; |
10833 | break; | |
252b5132 | 10834 | } |
f21f3fe0 | 10835 | |
252b5132 RH |
10836 | bfd_put_32 (input_bfd, value, hit_data); |
10837 | return bfd_reloc_ok; | |
10838 | ||
10839 | case R_ARM_ABS8: | |
10840 | value += addend; | |
4e67d4ca DG |
10841 | |
10842 | /* There is no way to tell whether the user intended to use a signed or | |
10843 | unsigned addend. When checking for overflow we accept either, | |
10844 | as specified by the AAELF. */ | |
10845 | if ((long) value > 0xff || (long) value < -0x80) | |
252b5132 RH |
10846 | return bfd_reloc_overflow; |
10847 | ||
10848 | bfd_put_8 (input_bfd, value, hit_data); | |
10849 | return bfd_reloc_ok; | |
10850 | ||
10851 | case R_ARM_ABS16: | |
10852 | value += addend; | |
10853 | ||
4e67d4ca DG |
10854 | /* See comment for R_ARM_ABS8. */ |
10855 | if ((long) value > 0xffff || (long) value < -0x8000) | |
252b5132 RH |
10856 | return bfd_reloc_overflow; |
10857 | ||
10858 | bfd_put_16 (input_bfd, value, hit_data); | |
10859 | return bfd_reloc_ok; | |
10860 | ||
252b5132 | 10861 | case R_ARM_THM_ABS5: |
9b485d32 | 10862 | /* Support ldr and str instructions for the thumb. */ |
4e7fd91e PB |
10863 | if (globals->use_rel) |
10864 | { | |
10865 | /* Need to refetch addend. */ | |
10866 | addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask; | |
10867 | /* ??? Need to determine shift amount from operand size. */ | |
10868 | addend >>= howto->rightshift; | |
10869 | } | |
252b5132 RH |
10870 | value += addend; |
10871 | ||
10872 | /* ??? Isn't value unsigned? */ | |
10873 | if ((long) value > 0x1f || (long) value < -0x10) | |
10874 | return bfd_reloc_overflow; | |
10875 | ||
10876 | /* ??? Value needs to be properly shifted into place first. */ | |
10877 | value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f; | |
10878 | bfd_put_16 (input_bfd, value, hit_data); | |
10879 | return bfd_reloc_ok; | |
10880 | ||
2cab6cc3 MS |
10881 | case R_ARM_THM_ALU_PREL_11_0: |
10882 | /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */ | |
10883 | { | |
10884 | bfd_vma insn; | |
10885 | bfd_signed_vma relocation; | |
10886 | ||
10887 | insn = (bfd_get_16 (input_bfd, hit_data) << 16) | |
99059e56 | 10888 | | bfd_get_16 (input_bfd, hit_data + 2); |
2cab6cc3 | 10889 | |
99059e56 RM |
10890 | if (globals->use_rel) |
10891 | { | |
10892 | signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4) | |
10893 | | ((insn & (1 << 26)) >> 15); | |
10894 | if (insn & 0xf00000) | |
10895 | signed_addend = -signed_addend; | |
10896 | } | |
2cab6cc3 MS |
10897 | |
10898 | relocation = value + signed_addend; | |
79f08007 | 10899 | relocation -= Pa (input_section->output_section->vma |
99059e56 RM |
10900 | + input_section->output_offset |
10901 | + rel->r_offset); | |
2cab6cc3 | 10902 | |
8c65b54f CS |
10903 | /* PR 21523: Use an absolute value. The user of this reloc will |
10904 | have already selected an ADD or SUB insn appropriately. */ | |
453f8e1e | 10905 | value = llabs (relocation); |
2cab6cc3 | 10906 | |
99059e56 RM |
10907 | if (value >= 0x1000) |
10908 | return bfd_reloc_overflow; | |
2cab6cc3 | 10909 | |
e645cf40 AG |
10910 | /* Destination is Thumb. Force bit 0 to 1 to reflect this. */ |
10911 | if (branch_type == ST_BRANCH_TO_THUMB) | |
10912 | value |= 1; | |
10913 | ||
2cab6cc3 | 10914 | insn = (insn & 0xfb0f8f00) | (value & 0xff) |
99059e56 RM |
10915 | | ((value & 0x700) << 4) |
10916 | | ((value & 0x800) << 15); | |
10917 | if (relocation < 0) | |
10918 | insn |= 0xa00000; | |
2cab6cc3 MS |
10919 | |
10920 | bfd_put_16 (input_bfd, insn >> 16, hit_data); | |
10921 | bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2); | |
10922 | ||
99059e56 | 10923 | return bfd_reloc_ok; |
2cab6cc3 MS |
10924 | } |
10925 | ||
e1ec24c6 NC |
10926 | case R_ARM_THM_PC8: |
10927 | /* PR 10073: This reloc is not generated by the GNU toolchain, | |
10928 | but it is supported for compatibility with third party libraries | |
10929 | generated by other compilers, specifically the ARM/IAR. */ | |
10930 | { | |
10931 | bfd_vma insn; | |
10932 | bfd_signed_vma relocation; | |
10933 | ||
10934 | insn = bfd_get_16 (input_bfd, hit_data); | |
10935 | ||
99059e56 | 10936 | if (globals->use_rel) |
79f08007 | 10937 | addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4; |
e1ec24c6 NC |
10938 | |
10939 | relocation = value + addend; | |
79f08007 | 10940 | relocation -= Pa (input_section->output_section->vma |
99059e56 RM |
10941 | + input_section->output_offset |
10942 | + rel->r_offset); | |
e1ec24c6 | 10943 | |
b6518b38 | 10944 | value = relocation; |
e1ec24c6 NC |
10945 | |
10946 | /* We do not check for overflow of this reloc. Although strictly | |
10947 | speaking this is incorrect, it appears to be necessary in order | |
10948 | to work with IAR generated relocs. Since GCC and GAS do not | |
10949 | generate R_ARM_THM_PC8 relocs, the lack of a check should not be | |
10950 | a problem for them. */ | |
10951 | value &= 0x3fc; | |
10952 | ||
10953 | insn = (insn & 0xff00) | (value >> 2); | |
10954 | ||
10955 | bfd_put_16 (input_bfd, insn, hit_data); | |
10956 | ||
99059e56 | 10957 | return bfd_reloc_ok; |
e1ec24c6 NC |
10958 | } |
10959 | ||
2cab6cc3 MS |
10960 | case R_ARM_THM_PC12: |
10961 | /* Corresponds to: ldr.w reg, [pc, #offset]. */ | |
10962 | { | |
10963 | bfd_vma insn; | |
10964 | bfd_signed_vma relocation; | |
10965 | ||
10966 | insn = (bfd_get_16 (input_bfd, hit_data) << 16) | |
99059e56 | 10967 | | bfd_get_16 (input_bfd, hit_data + 2); |
2cab6cc3 | 10968 | |
99059e56 RM |
10969 | if (globals->use_rel) |
10970 | { | |
10971 | signed_addend = insn & 0xfff; | |
10972 | if (!(insn & (1 << 23))) | |
10973 | signed_addend = -signed_addend; | |
10974 | } | |
2cab6cc3 MS |
10975 | |
10976 | relocation = value + signed_addend; | |
79f08007 | 10977 | relocation -= Pa (input_section->output_section->vma |
99059e56 RM |
10978 | + input_section->output_offset |
10979 | + rel->r_offset); | |
2cab6cc3 | 10980 | |
b6518b38 | 10981 | value = relocation; |
2cab6cc3 | 10982 | |
99059e56 RM |
10983 | if (value >= 0x1000) |
10984 | return bfd_reloc_overflow; | |
2cab6cc3 MS |
10985 | |
10986 | insn = (insn & 0xff7ff000) | value; | |
99059e56 RM |
10987 | if (relocation >= 0) |
10988 | insn |= (1 << 23); | |
2cab6cc3 MS |
10989 | |
10990 | bfd_put_16 (input_bfd, insn >> 16, hit_data); | |
10991 | bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2); | |
10992 | ||
99059e56 | 10993 | return bfd_reloc_ok; |
2cab6cc3 MS |
10994 | } |
10995 | ||
dfc5f959 | 10996 | case R_ARM_THM_XPC22: |
c19d1205 | 10997 | case R_ARM_THM_CALL: |
bd97cb95 | 10998 | case R_ARM_THM_JUMP24: |
dfc5f959 | 10999 | /* Thumb BL (branch long instruction). */ |
252b5132 | 11000 | { |
b34976b6 | 11001 | bfd_vma relocation; |
99059e56 | 11002 | bfd_vma reloc_sign; |
0a1b45a2 | 11003 | bool overflow = false; |
b34976b6 AM |
11004 | bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data); |
11005 | bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2); | |
e95de063 MS |
11006 | bfd_signed_vma reloc_signed_max; |
11007 | bfd_signed_vma reloc_signed_min; | |
b34976b6 | 11008 | bfd_vma check; |
252b5132 | 11009 | bfd_signed_vma signed_check; |
e95de063 | 11010 | int bitsize; |
cd1dac3d | 11011 | const int thumb2 = using_thumb2 (globals); |
5e866f5a | 11012 | const int thumb2_bl = using_thumb2_bl (globals); |
252b5132 | 11013 | |
5ab79981 | 11014 | /* A branch to an undefined weak symbol is turned into a jump to |
cd1dac3d DG |
11015 | the next instruction unless a PLT entry will be created. |
11016 | The jump to the next instruction is optimized as a NOP.W for | |
11017 | Thumb-2 enabled architectures. */ | |
19540007 | 11018 | if (h && h->root.type == bfd_link_hash_undefweak |
34e77a92 | 11019 | && plt_offset == (bfd_vma) -1) |
5ab79981 | 11020 | { |
60a019a0 | 11021 | if (thumb2) |
cd1dac3d DG |
11022 | { |
11023 | bfd_put_16 (input_bfd, 0xf3af, hit_data); | |
11024 | bfd_put_16 (input_bfd, 0x8000, hit_data + 2); | |
11025 | } | |
11026 | else | |
11027 | { | |
11028 | bfd_put_16 (input_bfd, 0xe000, hit_data); | |
11029 | bfd_put_16 (input_bfd, 0xbf00, hit_data + 2); | |
11030 | } | |
5ab79981 PB |
11031 | return bfd_reloc_ok; |
11032 | } | |
11033 | ||
e95de063 | 11034 | /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible |
99059e56 | 11035 | with Thumb-1) involving the J1 and J2 bits. */ |
4e7fd91e PB |
11036 | if (globals->use_rel) |
11037 | { | |
99059e56 RM |
11038 | bfd_vma s = (upper_insn & (1 << 10)) >> 10; |
11039 | bfd_vma upper = upper_insn & 0x3ff; | |
11040 | bfd_vma lower = lower_insn & 0x7ff; | |
e95de063 MS |
11041 | bfd_vma j1 = (lower_insn & (1 << 13)) >> 13; |
11042 | bfd_vma j2 = (lower_insn & (1 << 11)) >> 11; | |
99059e56 RM |
11043 | bfd_vma i1 = j1 ^ s ? 0 : 1; |
11044 | bfd_vma i2 = j2 ^ s ? 0 : 1; | |
e95de063 | 11045 | |
99059e56 RM |
11046 | addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1); |
11047 | /* Sign extend. */ | |
11048 | addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24); | |
e95de063 | 11049 | |
4e7fd91e PB |
11050 | signed_addend = addend; |
11051 | } | |
cb1afa5c | 11052 | |
dfc5f959 NC |
11053 | if (r_type == R_ARM_THM_XPC22) |
11054 | { | |
11055 | /* Check for Thumb to Thumb call. */ | |
11056 | /* FIXME: Should we translate the instruction into a BL | |
11057 | instruction instead ? */ | |
35fc36a8 | 11058 | if (branch_type == ST_BRANCH_TO_THUMB) |
4eca0228 | 11059 | _bfd_error_handler |
90b6238f AM |
11060 | (_("%pB: warning: %s BLX instruction targets" |
11061 | " %s function '%s'"), | |
11062 | input_bfd, "Thumb", | |
11063 | "Thumb", h ? h->root.root.string : "(local)"); | |
dfc5f959 NC |
11064 | } |
11065 | else | |
252b5132 | 11066 | { |
dfc5f959 NC |
11067 | /* If it is not a call to Thumb, assume call to Arm. |
11068 | If it is a call relative to a section name, then it is not a | |
b7693d02 DJ |
11069 | function call at all, but rather a long jump. Calls through |
11070 | the PLT do not require stubs. */ | |
34e77a92 | 11071 | if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1) |
dfc5f959 | 11072 | { |
bd97cb95 | 11073 | if (globals->use_blx && r_type == R_ARM_THM_CALL) |
39b41c9c PB |
11074 | { |
11075 | /* Convert BL to BLX. */ | |
11076 | lower_insn = (lower_insn & ~0x1000) | 0x0800; | |
11077 | } | |
155d87d7 CL |
11078 | else if (( r_type != R_ARM_THM_CALL) |
11079 | && (r_type != R_ARM_THM_JUMP24)) | |
8029a119 NC |
11080 | { |
11081 | if (elf32_thumb_to_arm_stub | |
11082 | (info, sym_name, input_bfd, output_bfd, input_section, | |
11083 | hit_data, sym_sec, rel->r_offset, signed_addend, value, | |
11084 | error_message)) | |
11085 | return bfd_reloc_ok; | |
11086 | else | |
11087 | return bfd_reloc_dangerous; | |
11088 | } | |
da5938a2 | 11089 | } |
35fc36a8 RS |
11090 | else if (branch_type == ST_BRANCH_TO_THUMB |
11091 | && globals->use_blx | |
bd97cb95 | 11092 | && r_type == R_ARM_THM_CALL) |
39b41c9c PB |
11093 | { |
11094 | /* Make sure this is a BL. */ | |
11095 | lower_insn |= 0x1800; | |
11096 | } | |
252b5132 | 11097 | } |
f21f3fe0 | 11098 | |
fe33d2fa | 11099 | enum elf32_arm_stub_type stub_type = arm_stub_none; |
155d87d7 | 11100 | if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24) |
906e58ca NC |
11101 | { |
11102 | /* Check if a stub has to be inserted because the destination | |
8029a119 | 11103 | is too far. */ |
fe33d2fa CL |
11104 | struct elf32_arm_stub_hash_entry *stub_entry; |
11105 | struct elf32_arm_link_hash_entry *hash; | |
11106 | ||
11107 | hash = (struct elf32_arm_link_hash_entry *) h; | |
11108 | ||
11109 | stub_type = arm_type_of_stub (info, input_section, rel, | |
34e77a92 RS |
11110 | st_type, &branch_type, |
11111 | hash, value, sym_sec, | |
fe33d2fa CL |
11112 | input_bfd, sym_name); |
11113 | ||
11114 | if (stub_type != arm_stub_none) | |
906e58ca NC |
11115 | { |
11116 | /* The target is out of reach or we are changing modes, so | |
11117 | redirect the branch to the local stub for this | |
11118 | function. */ | |
11119 | stub_entry = elf32_arm_get_stub_entry (input_section, | |
11120 | sym_sec, h, | |
fe33d2fa CL |
11121 | rel, globals, |
11122 | stub_type); | |
906e58ca | 11123 | if (stub_entry != NULL) |
9cd3e4e5 NC |
11124 | { |
11125 | value = (stub_entry->stub_offset | |
11126 | + stub_entry->stub_sec->output_offset | |
11127 | + stub_entry->stub_sec->output_section->vma); | |
11128 | ||
11129 | if (plt_offset != (bfd_vma) -1) | |
0a1b45a2 | 11130 | *unresolved_reloc_p = false; |
9cd3e4e5 | 11131 | } |
906e58ca | 11132 | |
f4ac8484 | 11133 | /* If this call becomes a call to Arm, force BLX. */ |
155d87d7 | 11134 | if (globals->use_blx && (r_type == R_ARM_THM_CALL)) |
f4ac8484 DJ |
11135 | { |
11136 | if ((stub_entry | |
11137 | && !arm_stub_is_thumb (stub_entry->stub_type)) | |
35fc36a8 | 11138 | || branch_type != ST_BRANCH_TO_THUMB) |
f4ac8484 DJ |
11139 | lower_insn = (lower_insn & ~0x1000) | 0x0800; |
11140 | } | |
906e58ca NC |
11141 | } |
11142 | } | |
11143 | ||
fe33d2fa | 11144 | /* Handle calls via the PLT. */ |
34e77a92 | 11145 | if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1) |
fe33d2fa CL |
11146 | { |
11147 | value = (splt->output_section->vma | |
11148 | + splt->output_offset | |
34e77a92 | 11149 | + plt_offset); |
fe33d2fa | 11150 | |
eed94f8f NC |
11151 | if (globals->use_blx |
11152 | && r_type == R_ARM_THM_CALL | |
11153 | && ! using_thumb_only (globals)) | |
fe33d2fa CL |
11154 | { |
11155 | /* If the Thumb BLX instruction is available, convert | |
11156 | the BL to a BLX instruction to call the ARM-mode | |
11157 | PLT entry. */ | |
11158 | lower_insn = (lower_insn & ~0x1000) | 0x0800; | |
35fc36a8 | 11159 | branch_type = ST_BRANCH_TO_ARM; |
fe33d2fa CL |
11160 | } |
11161 | else | |
11162 | { | |
eed94f8f NC |
11163 | if (! using_thumb_only (globals)) |
11164 | /* Target the Thumb stub before the ARM PLT entry. */ | |
11165 | value -= PLT_THUMB_STUB_SIZE; | |
35fc36a8 | 11166 | branch_type = ST_BRANCH_TO_THUMB; |
fe33d2fa | 11167 | } |
0a1b45a2 | 11168 | *unresolved_reloc_p = false; |
fe33d2fa CL |
11169 | } |
11170 | ||
ba96a88f | 11171 | relocation = value + signed_addend; |
f21f3fe0 | 11172 | |
252b5132 | 11173 | relocation -= (input_section->output_section->vma |
ba96a88f NC |
11174 | + input_section->output_offset |
11175 | + rel->r_offset); | |
9a5aca8c | 11176 | |
252b5132 RH |
11177 | check = relocation >> howto->rightshift; |
11178 | ||
11179 | /* If this is a signed value, the rightshift just dropped | |
11180 | leading 1 bits (assuming twos complement). */ | |
11181 | if ((bfd_signed_vma) relocation >= 0) | |
11182 | signed_check = check; | |
11183 | else | |
11184 | signed_check = check | ~((bfd_vma) -1 >> howto->rightshift); | |
11185 | ||
e95de063 MS |
11186 | /* Calculate the permissable maximum and minimum values for |
11187 | this relocation according to whether we're relocating for | |
11188 | Thumb-2 or not. */ | |
11189 | bitsize = howto->bitsize; | |
5e866f5a | 11190 | if (!thumb2_bl) |
e95de063 | 11191 | bitsize -= 2; |
f6ebfac0 | 11192 | reloc_signed_max = (1 << (bitsize - 1)) - 1; |
e95de063 MS |
11193 | reloc_signed_min = ~reloc_signed_max; |
11194 | ||
252b5132 | 11195 | /* Assumes two's complement. */ |
ba96a88f | 11196 | if (signed_check > reloc_signed_max || signed_check < reloc_signed_min) |
0a1b45a2 | 11197 | overflow = true; |
252b5132 | 11198 | |
bd97cb95 | 11199 | if ((lower_insn & 0x5000) == 0x4000) |
c62e1cc3 NC |
11200 | /* For a BLX instruction, make sure that the relocation is rounded up |
11201 | to a word boundary. This follows the semantics of the instruction | |
11202 | which specifies that bit 1 of the target address will come from bit | |
11203 | 1 of the base address. */ | |
11204 | relocation = (relocation + 2) & ~ 3; | |
cb1afa5c | 11205 | |
e95de063 MS |
11206 | /* Put RELOCATION back into the insn. Assumes two's complement. |
11207 | We use the Thumb-2 encoding, which is safe even if dealing with | |
11208 | a Thumb-1 instruction by virtue of our overflow check above. */ | |
99059e56 | 11209 | reloc_sign = (signed_check < 0) ? 1 : 0; |
e95de063 | 11210 | upper_insn = (upper_insn & ~(bfd_vma) 0x7ff) |
99059e56 RM |
11211 | | ((relocation >> 12) & 0x3ff) |
11212 | | (reloc_sign << 10); | |
906e58ca | 11213 | lower_insn = (lower_insn & ~(bfd_vma) 0x2fff) |
99059e56 RM |
11214 | | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13) |
11215 | | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11) | |
11216 | | ((relocation >> 1) & 0x7ff); | |
c62e1cc3 | 11217 | |
252b5132 RH |
11218 | /* Put the relocated value back in the object file: */ |
11219 | bfd_put_16 (input_bfd, upper_insn, hit_data); | |
11220 | bfd_put_16 (input_bfd, lower_insn, hit_data + 2); | |
11221 | ||
11222 | return (overflow ? bfd_reloc_overflow : bfd_reloc_ok); | |
11223 | } | |
11224 | break; | |
11225 | ||
c19d1205 ZW |
11226 | case R_ARM_THM_JUMP19: |
11227 | /* Thumb32 conditional branch instruction. */ | |
11228 | { | |
11229 | bfd_vma relocation; | |
0a1b45a2 | 11230 | bool overflow = false; |
c19d1205 ZW |
11231 | bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data); |
11232 | bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2); | |
a00a1f35 MS |
11233 | bfd_signed_vma reloc_signed_max = 0xffffe; |
11234 | bfd_signed_vma reloc_signed_min = -0x100000; | |
c19d1205 | 11235 | bfd_signed_vma signed_check; |
07d6d2b8 | 11236 | enum elf32_arm_stub_type stub_type = arm_stub_none; |
c5423981 TG |
11237 | struct elf32_arm_stub_hash_entry *stub_entry; |
11238 | struct elf32_arm_link_hash_entry *hash; | |
c19d1205 ZW |
11239 | |
11240 | /* Need to refetch the addend, reconstruct the top three bits, | |
11241 | and squish the two 11 bit pieces together. */ | |
11242 | if (globals->use_rel) | |
11243 | { | |
11244 | bfd_vma S = (upper_insn & 0x0400) >> 10; | |
a00a1f35 | 11245 | bfd_vma upper = (upper_insn & 0x003f); |
c19d1205 ZW |
11246 | bfd_vma J1 = (lower_insn & 0x2000) >> 13; |
11247 | bfd_vma J2 = (lower_insn & 0x0800) >> 11; | |
11248 | bfd_vma lower = (lower_insn & 0x07ff); | |
11249 | ||
a00a1f35 MS |
11250 | upper |= J1 << 6; |
11251 | upper |= J2 << 7; | |
11252 | upper |= (!S) << 8; | |
c19d1205 ZW |
11253 | upper -= 0x0100; /* Sign extend. */ |
11254 | ||
11255 | addend = (upper << 12) | (lower << 1); | |
11256 | signed_addend = addend; | |
11257 | } | |
11258 | ||
bd97cb95 | 11259 | /* Handle calls via the PLT. */ |
34e77a92 | 11260 | if (plt_offset != (bfd_vma) -1) |
bd97cb95 DJ |
11261 | { |
11262 | value = (splt->output_section->vma | |
11263 | + splt->output_offset | |
34e77a92 | 11264 | + plt_offset); |
bd97cb95 DJ |
11265 | /* Target the Thumb stub before the ARM PLT entry. */ |
11266 | value -= PLT_THUMB_STUB_SIZE; | |
0a1b45a2 | 11267 | *unresolved_reloc_p = false; |
bd97cb95 DJ |
11268 | } |
11269 | ||
c5423981 TG |
11270 | hash = (struct elf32_arm_link_hash_entry *)h; |
11271 | ||
11272 | stub_type = arm_type_of_stub (info, input_section, rel, | |
07d6d2b8 AM |
11273 | st_type, &branch_type, |
11274 | hash, value, sym_sec, | |
11275 | input_bfd, sym_name); | |
c5423981 TG |
11276 | if (stub_type != arm_stub_none) |
11277 | { | |
11278 | stub_entry = elf32_arm_get_stub_entry (input_section, | |
07d6d2b8 AM |
11279 | sym_sec, h, |
11280 | rel, globals, | |
11281 | stub_type); | |
c5423981 TG |
11282 | if (stub_entry != NULL) |
11283 | { | |
07d6d2b8 AM |
11284 | value = (stub_entry->stub_offset |
11285 | + stub_entry->stub_sec->output_offset | |
11286 | + stub_entry->stub_sec->output_section->vma); | |
c5423981 TG |
11287 | } |
11288 | } | |
c19d1205 | 11289 | |
99059e56 | 11290 | relocation = value + signed_addend; |
c19d1205 ZW |
11291 | relocation -= (input_section->output_section->vma |
11292 | + input_section->output_offset | |
11293 | + rel->r_offset); | |
a00a1f35 | 11294 | signed_check = (bfd_signed_vma) relocation; |
c19d1205 | 11295 | |
c19d1205 | 11296 | if (signed_check > reloc_signed_max || signed_check < reloc_signed_min) |
0a1b45a2 | 11297 | overflow = true; |
c19d1205 ZW |
11298 | |
11299 | /* Put RELOCATION back into the insn. */ | |
11300 | { | |
11301 | bfd_vma S = (relocation & 0x00100000) >> 20; | |
11302 | bfd_vma J2 = (relocation & 0x00080000) >> 19; | |
11303 | bfd_vma J1 = (relocation & 0x00040000) >> 18; | |
11304 | bfd_vma hi = (relocation & 0x0003f000) >> 12; | |
11305 | bfd_vma lo = (relocation & 0x00000ffe) >> 1; | |
11306 | ||
a00a1f35 | 11307 | upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi; |
c19d1205 ZW |
11308 | lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo; |
11309 | } | |
11310 | ||
11311 | /* Put the relocated value back in the object file: */ | |
11312 | bfd_put_16 (input_bfd, upper_insn, hit_data); | |
11313 | bfd_put_16 (input_bfd, lower_insn, hit_data + 2); | |
11314 | ||
11315 | return (overflow ? bfd_reloc_overflow : bfd_reloc_ok); | |
11316 | } | |
11317 | ||
11318 | case R_ARM_THM_JUMP11: | |
11319 | case R_ARM_THM_JUMP8: | |
11320 | case R_ARM_THM_JUMP6: | |
51c5503b NC |
11321 | /* Thumb B (branch) instruction). */ |
11322 | { | |
6cf9e9fe | 11323 | bfd_signed_vma relocation; |
51c5503b NC |
11324 | bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1; |
11325 | bfd_signed_vma reloc_signed_min = ~ reloc_signed_max; | |
51c5503b NC |
11326 | bfd_signed_vma signed_check; |
11327 | ||
c19d1205 ZW |
11328 | /* CZB cannot jump backward. */ |
11329 | if (r_type == R_ARM_THM_JUMP6) | |
6cf9e9fe | 11330 | { |
d2327e47 AM |
11331 | reloc_signed_min = 0; |
11332 | if (globals->use_rel) | |
11333 | signed_addend = ((addend & 0x200) >> 3) | ((addend & 0xf8) >> 2); | |
6cf9e9fe | 11334 | } |
d2327e47 | 11335 | |
6cf9e9fe | 11336 | relocation = value + signed_addend; |
51c5503b NC |
11337 | |
11338 | relocation -= (input_section->output_section->vma | |
11339 | + input_section->output_offset | |
11340 | + rel->r_offset); | |
11341 | ||
6cf9e9fe NC |
11342 | relocation >>= howto->rightshift; |
11343 | signed_check = relocation; | |
c19d1205 ZW |
11344 | |
11345 | if (r_type == R_ARM_THM_JUMP6) | |
11346 | relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3); | |
11347 | else | |
11348 | relocation &= howto->dst_mask; | |
51c5503b | 11349 | relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask)); |
cedb70c5 | 11350 | |
51c5503b NC |
11351 | bfd_put_16 (input_bfd, relocation, hit_data); |
11352 | ||
11353 | /* Assumes two's complement. */ | |
11354 | if (signed_check > reloc_signed_max || signed_check < reloc_signed_min) | |
11355 | return bfd_reloc_overflow; | |
11356 | ||
11357 | return bfd_reloc_ok; | |
11358 | } | |
cedb70c5 | 11359 | |
8375c36b PB |
11360 | case R_ARM_ALU_PCREL7_0: |
11361 | case R_ARM_ALU_PCREL15_8: | |
11362 | case R_ARM_ALU_PCREL23_15: | |
11363 | { | |
11364 | bfd_vma insn; | |
11365 | bfd_vma relocation; | |
11366 | ||
11367 | insn = bfd_get_32 (input_bfd, hit_data); | |
4e7fd91e PB |
11368 | if (globals->use_rel) |
11369 | { | |
11370 | /* Extract the addend. */ | |
11371 | addend = (insn & 0xff) << ((insn & 0xf00) >> 7); | |
11372 | signed_addend = addend; | |
11373 | } | |
8375c36b PB |
11374 | relocation = value + signed_addend; |
11375 | ||
11376 | relocation -= (input_section->output_section->vma | |
11377 | + input_section->output_offset | |
11378 | + rel->r_offset); | |
11379 | insn = (insn & ~0xfff) | |
11380 | | ((howto->bitpos << 7) & 0xf00) | |
11381 | | ((relocation >> howto->bitpos) & 0xff); | |
11382 | bfd_put_32 (input_bfd, value, hit_data); | |
11383 | } | |
11384 | return bfd_reloc_ok; | |
11385 | ||
252b5132 RH |
11386 | case R_ARM_GNU_VTINHERIT: |
11387 | case R_ARM_GNU_VTENTRY: | |
11388 | return bfd_reloc_ok; | |
11389 | ||
c19d1205 | 11390 | case R_ARM_GOTOFF32: |
252b5132 | 11391 | /* Relocation is relative to the start of the |
99059e56 | 11392 | global offset table. */ |
252b5132 RH |
11393 | |
11394 | BFD_ASSERT (sgot != NULL); | |
11395 | if (sgot == NULL) | |
99059e56 | 11396 | return bfd_reloc_notsupported; |
9a5aca8c | 11397 | |
cedb70c5 | 11398 | /* If we are addressing a Thumb function, we need to adjust the |
ee29b9fb RE |
11399 | address by one, so that attempts to call the function pointer will |
11400 | correctly interpret it as Thumb code. */ | |
35fc36a8 | 11401 | if (branch_type == ST_BRANCH_TO_THUMB) |
ee29b9fb RE |
11402 | value += 1; |
11403 | ||
252b5132 | 11404 | /* Note that sgot->output_offset is not involved in this |
99059e56 RM |
11405 | calculation. We always want the start of .got. If we |
11406 | define _GLOBAL_OFFSET_TABLE in a different way, as is | |
11407 | permitted by the ABI, we might have to change this | |
11408 | calculation. */ | |
252b5132 | 11409 | value -= sgot->output_section->vma; |
f21f3fe0 | 11410 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
99e4ae17 | 11411 | contents, rel->r_offset, value, |
00a97672 | 11412 | rel->r_addend); |
252b5132 RH |
11413 | |
11414 | case R_ARM_GOTPC: | |
a7c10850 | 11415 | /* Use global offset table as symbol value. */ |
252b5132 | 11416 | BFD_ASSERT (sgot != NULL); |
f21f3fe0 | 11417 | |
252b5132 | 11418 | if (sgot == NULL) |
99059e56 | 11419 | return bfd_reloc_notsupported; |
252b5132 | 11420 | |
0a1b45a2 | 11421 | *unresolved_reloc_p = false; |
252b5132 | 11422 | value = sgot->output_section->vma; |
f21f3fe0 | 11423 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
99e4ae17 | 11424 | contents, rel->r_offset, value, |
00a97672 | 11425 | rel->r_addend); |
f21f3fe0 | 11426 | |
252b5132 | 11427 | case R_ARM_GOT32: |
eb043451 | 11428 | case R_ARM_GOT_PREL: |
252b5132 | 11429 | /* Relocation is to the entry for this symbol in the |
99059e56 | 11430 | global offset table. */ |
252b5132 RH |
11431 | if (sgot == NULL) |
11432 | return bfd_reloc_notsupported; | |
f21f3fe0 | 11433 | |
34e77a92 RS |
11434 | if (dynreloc_st_type == STT_GNU_IFUNC |
11435 | && plt_offset != (bfd_vma) -1 | |
11436 | && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h))) | |
11437 | { | |
11438 | /* We have a relocation against a locally-binding STT_GNU_IFUNC | |
11439 | symbol, and the relocation resolves directly to the runtime | |
11440 | target rather than to the .iplt entry. This means that any | |
11441 | .got entry would be the same value as the .igot.plt entry, | |
11442 | so there's no point creating both. */ | |
11443 | sgot = globals->root.igotplt; | |
11444 | value = sgot->output_offset + gotplt_offset; | |
11445 | } | |
11446 | else if (h != NULL) | |
252b5132 RH |
11447 | { |
11448 | bfd_vma off; | |
f21f3fe0 | 11449 | |
252b5132 RH |
11450 | off = h->got.offset; |
11451 | BFD_ASSERT (off != (bfd_vma) -1); | |
b436d854 | 11452 | if ((off & 1) != 0) |
252b5132 | 11453 | { |
b436d854 RS |
11454 | /* We have already processsed one GOT relocation against |
11455 | this symbol. */ | |
11456 | off &= ~1; | |
11457 | if (globals->root.dynamic_sections_created | |
11458 | && !SYMBOL_REFERENCES_LOCAL (info, h)) | |
0a1b45a2 | 11459 | *unresolved_reloc_p = false; |
b436d854 RS |
11460 | } |
11461 | else | |
11462 | { | |
11463 | Elf_Internal_Rela outrel; | |
e8b09b87 | 11464 | int isrofixup = 0; |
b436d854 | 11465 | |
e8b09b87 CL |
11466 | if (((h->dynindx != -1) || globals->fdpic_p) |
11467 | && !SYMBOL_REFERENCES_LOCAL (info, h)) | |
b436d854 RS |
11468 | { |
11469 | /* If the symbol doesn't resolve locally in a static | |
11470 | object, we have an undefined reference. If the | |
11471 | symbol doesn't resolve locally in a dynamic object, | |
11472 | it should be resolved by the dynamic linker. */ | |
11473 | if (globals->root.dynamic_sections_created) | |
11474 | { | |
11475 | outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT); | |
0a1b45a2 | 11476 | *unresolved_reloc_p = false; |
b436d854 RS |
11477 | } |
11478 | else | |
11479 | outrel.r_info = 0; | |
11480 | outrel.r_addend = 0; | |
11481 | } | |
252b5132 RH |
11482 | else |
11483 | { | |
34e77a92 | 11484 | if (dynreloc_st_type == STT_GNU_IFUNC) |
99059e56 | 11485 | outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE); |
5025eb7c | 11486 | else if (bfd_link_pic (info) |
7f026732 | 11487 | && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h)) |
99059e56 RM |
11488 | outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE); |
11489 | else | |
2376f038 EB |
11490 | { |
11491 | outrel.r_info = 0; | |
11492 | if (globals->fdpic_p) | |
11493 | isrofixup = 1; | |
11494 | } | |
34e77a92 | 11495 | outrel.r_addend = dynreloc_value; |
b436d854 | 11496 | } |
ee29b9fb | 11497 | |
b436d854 RS |
11498 | /* The GOT entry is initialized to zero by default. |
11499 | See if we should install a different value. */ | |
11500 | if (outrel.r_addend != 0 | |
2376f038 | 11501 | && (globals->use_rel || outrel.r_info == 0)) |
b436d854 RS |
11502 | { |
11503 | bfd_put_32 (output_bfd, outrel.r_addend, | |
11504 | sgot->contents + off); | |
11505 | outrel.r_addend = 0; | |
252b5132 | 11506 | } |
f21f3fe0 | 11507 | |
2376f038 EB |
11508 | if (isrofixup) |
11509 | arm_elf_add_rofixup (output_bfd, | |
cc850f74 | 11510 | elf32_arm_hash_table (info)->srofixup, |
2376f038 EB |
11511 | sgot->output_section->vma |
11512 | + sgot->output_offset + off); | |
11513 | ||
11514 | else if (outrel.r_info != 0) | |
b436d854 RS |
11515 | { |
11516 | outrel.r_offset = (sgot->output_section->vma | |
11517 | + sgot->output_offset | |
11518 | + off); | |
11519 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); | |
11520 | } | |
2376f038 | 11521 | |
b436d854 RS |
11522 | h->got.offset |= 1; |
11523 | } | |
252b5132 RH |
11524 | value = sgot->output_offset + off; |
11525 | } | |
11526 | else | |
11527 | { | |
11528 | bfd_vma off; | |
f21f3fe0 | 11529 | |
5025eb7c AO |
11530 | BFD_ASSERT (local_got_offsets != NULL |
11531 | && local_got_offsets[r_symndx] != (bfd_vma) -1); | |
f21f3fe0 | 11532 | |
252b5132 | 11533 | off = local_got_offsets[r_symndx]; |
f21f3fe0 | 11534 | |
252b5132 RH |
11535 | /* The offset must always be a multiple of 4. We use the |
11536 | least significant bit to record whether we have already | |
9b485d32 | 11537 | generated the necessary reloc. */ |
252b5132 RH |
11538 | if ((off & 1) != 0) |
11539 | off &= ~1; | |
11540 | else | |
11541 | { | |
2376f038 EB |
11542 | Elf_Internal_Rela outrel; |
11543 | int isrofixup = 0; | |
f21f3fe0 | 11544 | |
2376f038 EB |
11545 | if (dynreloc_st_type == STT_GNU_IFUNC) |
11546 | outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE); | |
11547 | else if (bfd_link_pic (info)) | |
11548 | outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE); | |
11549 | else | |
252b5132 | 11550 | { |
2376f038 EB |
11551 | outrel.r_info = 0; |
11552 | if (globals->fdpic_p) | |
11553 | isrofixup = 1; | |
11554 | } | |
11555 | ||
11556 | /* The GOT entry is initialized to zero by default. | |
11557 | See if we should install a different value. */ | |
11558 | if (globals->use_rel || outrel.r_info == 0) | |
11559 | bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off); | |
11560 | ||
11561 | if (isrofixup) | |
11562 | arm_elf_add_rofixup (output_bfd, | |
11563 | globals->srofixup, | |
11564 | sgot->output_section->vma | |
11565 | + sgot->output_offset + off); | |
f21f3fe0 | 11566 | |
2376f038 EB |
11567 | else if (outrel.r_info != 0) |
11568 | { | |
34e77a92 | 11569 | outrel.r_addend = addend + dynreloc_value; |
252b5132 | 11570 | outrel.r_offset = (sgot->output_section->vma |
f21f3fe0 | 11571 | + sgot->output_offset |
252b5132 | 11572 | + off); |
47beaa6a | 11573 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
252b5132 | 11574 | } |
f21f3fe0 | 11575 | |
252b5132 RH |
11576 | local_got_offsets[r_symndx] |= 1; |
11577 | } | |
f21f3fe0 | 11578 | |
252b5132 RH |
11579 | value = sgot->output_offset + off; |
11580 | } | |
eb043451 PB |
11581 | if (r_type != R_ARM_GOT32) |
11582 | value += sgot->output_section->vma; | |
9a5aca8c | 11583 | |
f21f3fe0 | 11584 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
99e4ae17 | 11585 | contents, rel->r_offset, value, |
00a97672 | 11586 | rel->r_addend); |
f21f3fe0 | 11587 | |
ba93b8ac DJ |
11588 | case R_ARM_TLS_LDO32: |
11589 | value = value - dtpoff_base (info); | |
11590 | ||
11591 | return _bfd_final_link_relocate (howto, input_bfd, input_section, | |
00a97672 RS |
11592 | contents, rel->r_offset, value, |
11593 | rel->r_addend); | |
ba93b8ac DJ |
11594 | |
11595 | case R_ARM_TLS_LDM32: | |
5c5a4843 | 11596 | case R_ARM_TLS_LDM32_FDPIC: |
ba93b8ac DJ |
11597 | { |
11598 | bfd_vma off; | |
11599 | ||
362d30a1 | 11600 | if (sgot == NULL) |
ba93b8ac DJ |
11601 | abort (); |
11602 | ||
11603 | off = globals->tls_ldm_got.offset; | |
11604 | ||
11605 | if ((off & 1) != 0) | |
11606 | off &= ~1; | |
11607 | else | |
11608 | { | |
11609 | /* If we don't know the module number, create a relocation | |
11610 | for it. */ | |
9cb09e33 | 11611 | if (bfd_link_dll (info)) |
ba93b8ac DJ |
11612 | { |
11613 | Elf_Internal_Rela outrel; | |
ba93b8ac | 11614 | |
362d30a1 | 11615 | if (srelgot == NULL) |
ba93b8ac DJ |
11616 | abort (); |
11617 | ||
00a97672 | 11618 | outrel.r_addend = 0; |
362d30a1 RS |
11619 | outrel.r_offset = (sgot->output_section->vma |
11620 | + sgot->output_offset + off); | |
ba93b8ac DJ |
11621 | outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32); |
11622 | ||
00a97672 RS |
11623 | if (globals->use_rel) |
11624 | bfd_put_32 (output_bfd, outrel.r_addend, | |
362d30a1 | 11625 | sgot->contents + off); |
ba93b8ac | 11626 | |
47beaa6a | 11627 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
ba93b8ac DJ |
11628 | } |
11629 | else | |
362d30a1 | 11630 | bfd_put_32 (output_bfd, 1, sgot->contents + off); |
ba93b8ac DJ |
11631 | |
11632 | globals->tls_ldm_got.offset |= 1; | |
11633 | } | |
11634 | ||
5c5a4843 | 11635 | if (r_type == R_ARM_TLS_LDM32_FDPIC) |
e8b09b87 | 11636 | { |
cc850f74 NC |
11637 | bfd_put_32 (output_bfd, |
11638 | globals->root.sgot->output_offset + off, | |
11639 | contents + rel->r_offset); | |
e8b09b87 CL |
11640 | |
11641 | return bfd_reloc_ok; | |
11642 | } | |
11643 | else | |
11644 | { | |
11645 | value = sgot->output_section->vma + sgot->output_offset + off | |
11646 | - (input_section->output_section->vma | |
11647 | + input_section->output_offset + rel->r_offset); | |
ba93b8ac | 11648 | |
e8b09b87 CL |
11649 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
11650 | contents, rel->r_offset, value, | |
11651 | rel->r_addend); | |
11652 | } | |
ba93b8ac DJ |
11653 | } |
11654 | ||
0855e32b NS |
11655 | case R_ARM_TLS_CALL: |
11656 | case R_ARM_THM_TLS_CALL: | |
ba93b8ac | 11657 | case R_ARM_TLS_GD32: |
5c5a4843 | 11658 | case R_ARM_TLS_GD32_FDPIC: |
ba93b8ac | 11659 | case R_ARM_TLS_IE32: |
5c5a4843 | 11660 | case R_ARM_TLS_IE32_FDPIC: |
0855e32b NS |
11661 | case R_ARM_TLS_GOTDESC: |
11662 | case R_ARM_TLS_DESCSEQ: | |
11663 | case R_ARM_THM_TLS_DESCSEQ: | |
ba93b8ac | 11664 | { |
0855e32b NS |
11665 | bfd_vma off, offplt; |
11666 | int indx = 0; | |
ba93b8ac DJ |
11667 | char tls_type; |
11668 | ||
0855e32b | 11669 | BFD_ASSERT (sgot != NULL); |
ba93b8ac | 11670 | |
ba93b8ac DJ |
11671 | if (h != NULL) |
11672 | { | |
0a1b45a2 | 11673 | bool dyn; |
ba93b8ac | 11674 | dyn = globals->root.dynamic_sections_created; |
0e1862bb L |
11675 | if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, |
11676 | bfd_link_pic (info), | |
11677 | h) | |
11678 | && (!bfd_link_pic (info) | |
ba93b8ac DJ |
11679 | || !SYMBOL_REFERENCES_LOCAL (info, h))) |
11680 | { | |
0a1b45a2 | 11681 | *unresolved_reloc_p = false; |
ba93b8ac DJ |
11682 | indx = h->dynindx; |
11683 | } | |
11684 | off = h->got.offset; | |
0855e32b | 11685 | offplt = elf32_arm_hash_entry (h)->tlsdesc_got; |
ba93b8ac DJ |
11686 | tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type; |
11687 | } | |
11688 | else | |
11689 | { | |
0855e32b | 11690 | BFD_ASSERT (local_got_offsets != NULL); |
cc850f74 | 11691 | |
74fd118f NC |
11692 | if (r_symndx >= elf32_arm_num_entries (input_bfd)) |
11693 | { | |
11694 | _bfd_error_handler (_("\ | |
11695 | %pB: expected symbol index in range 0..%lu but found local symbol with index %lu"), | |
11696 | input_bfd, | |
11697 | (unsigned long) elf32_arm_num_entries (input_bfd), | |
11698 | r_symndx); | |
11699 | return false; | |
11700 | } | |
ba93b8ac | 11701 | off = local_got_offsets[r_symndx]; |
0855e32b | 11702 | offplt = local_tlsdesc_gotents[r_symndx]; |
ba93b8ac DJ |
11703 | tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx]; |
11704 | } | |
11705 | ||
0855e32b | 11706 | /* Linker relaxations happens from one of the |
b38cadfb | 11707 | R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */ |
cc850f74 | 11708 | if (ELF32_R_TYPE (rel->r_info) != r_type) |
b38cadfb | 11709 | tls_type = GOT_TLS_IE; |
0855e32b NS |
11710 | |
11711 | BFD_ASSERT (tls_type != GOT_UNKNOWN); | |
ba93b8ac DJ |
11712 | |
11713 | if ((off & 1) != 0) | |
11714 | off &= ~1; | |
11715 | else | |
11716 | { | |
0a1b45a2 | 11717 | bool need_relocs = false; |
ba93b8ac | 11718 | Elf_Internal_Rela outrel; |
ba93b8ac DJ |
11719 | int cur_off = off; |
11720 | ||
11721 | /* The GOT entries have not been initialized yet. Do it | |
11722 | now, and emit any relocations. If both an IE GOT and a | |
11723 | GD GOT are necessary, we emit the GD first. */ | |
11724 | ||
9cb09e33 | 11725 | if ((bfd_link_dll (info) || indx != 0) |
ba93b8ac | 11726 | && (h == NULL |
95b03e4a L |
11727 | || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT |
11728 | && !resolved_to_zero) | |
ba93b8ac DJ |
11729 | || h->root.type != bfd_link_hash_undefweak)) |
11730 | { | |
0a1b45a2 | 11731 | need_relocs = true; |
0855e32b | 11732 | BFD_ASSERT (srelgot != NULL); |
ba93b8ac DJ |
11733 | } |
11734 | ||
0855e32b NS |
11735 | if (tls_type & GOT_TLS_GDESC) |
11736 | { | |
47beaa6a RS |
11737 | bfd_byte *loc; |
11738 | ||
0855e32b NS |
11739 | /* We should have relaxed, unless this is an undefined |
11740 | weak symbol. */ | |
11741 | BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak)) | |
9cb09e33 | 11742 | || bfd_link_dll (info)); |
0855e32b | 11743 | BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8 |
99059e56 | 11744 | <= globals->root.sgotplt->size); |
0855e32b NS |
11745 | |
11746 | outrel.r_addend = 0; | |
11747 | outrel.r_offset = (globals->root.sgotplt->output_section->vma | |
11748 | + globals->root.sgotplt->output_offset | |
11749 | + offplt | |
11750 | + globals->sgotplt_jump_table_size); | |
b38cadfb | 11751 | |
0855e32b NS |
11752 | outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC); |
11753 | sreloc = globals->root.srelplt; | |
11754 | loc = sreloc->contents; | |
11755 | loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals); | |
11756 | BFD_ASSERT (loc + RELOC_SIZE (globals) | |
99059e56 | 11757 | <= sreloc->contents + sreloc->size); |
0855e32b NS |
11758 | |
11759 | SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc); | |
11760 | ||
11761 | /* For globals, the first word in the relocation gets | |
11762 | the relocation index and the top bit set, or zero, | |
11763 | if we're binding now. For locals, it gets the | |
11764 | symbol's offset in the tls section. */ | |
99059e56 | 11765 | bfd_put_32 (output_bfd, |
0855e32b NS |
11766 | !h ? value - elf_hash_table (info)->tls_sec->vma |
11767 | : info->flags & DF_BIND_NOW ? 0 | |
11768 | : 0x80000000 | ELF32_R_SYM (outrel.r_info), | |
b38cadfb NC |
11769 | globals->root.sgotplt->contents + offplt |
11770 | + globals->sgotplt_jump_table_size); | |
11771 | ||
0855e32b | 11772 | /* Second word in the relocation is always zero. */ |
99059e56 | 11773 | bfd_put_32 (output_bfd, 0, |
b38cadfb NC |
11774 | globals->root.sgotplt->contents + offplt |
11775 | + globals->sgotplt_jump_table_size + 4); | |
0855e32b | 11776 | } |
ba93b8ac DJ |
11777 | if (tls_type & GOT_TLS_GD) |
11778 | { | |
11779 | if (need_relocs) | |
11780 | { | |
00a97672 | 11781 | outrel.r_addend = 0; |
362d30a1 RS |
11782 | outrel.r_offset = (sgot->output_section->vma |
11783 | + sgot->output_offset | |
00a97672 | 11784 | + cur_off); |
ba93b8ac | 11785 | outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32); |
ba93b8ac | 11786 | |
00a97672 RS |
11787 | if (globals->use_rel) |
11788 | bfd_put_32 (output_bfd, outrel.r_addend, | |
362d30a1 | 11789 | sgot->contents + cur_off); |
00a97672 | 11790 | |
47beaa6a | 11791 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
ba93b8ac DJ |
11792 | |
11793 | if (indx == 0) | |
11794 | bfd_put_32 (output_bfd, value - dtpoff_base (info), | |
362d30a1 | 11795 | sgot->contents + cur_off + 4); |
ba93b8ac DJ |
11796 | else |
11797 | { | |
00a97672 | 11798 | outrel.r_addend = 0; |
ba93b8ac DJ |
11799 | outrel.r_info = ELF32_R_INFO (indx, |
11800 | R_ARM_TLS_DTPOFF32); | |
11801 | outrel.r_offset += 4; | |
00a97672 RS |
11802 | |
11803 | if (globals->use_rel) | |
11804 | bfd_put_32 (output_bfd, outrel.r_addend, | |
362d30a1 | 11805 | sgot->contents + cur_off + 4); |
00a97672 | 11806 | |
47beaa6a RS |
11807 | elf32_arm_add_dynreloc (output_bfd, info, |
11808 | srelgot, &outrel); | |
ba93b8ac DJ |
11809 | } |
11810 | } | |
11811 | else | |
11812 | { | |
11813 | /* If we are not emitting relocations for a | |
11814 | general dynamic reference, then we must be in a | |
11815 | static link or an executable link with the | |
11816 | symbol binding locally. Mark it as belonging | |
11817 | to module 1, the executable. */ | |
11818 | bfd_put_32 (output_bfd, 1, | |
362d30a1 | 11819 | sgot->contents + cur_off); |
ba93b8ac | 11820 | bfd_put_32 (output_bfd, value - dtpoff_base (info), |
362d30a1 | 11821 | sgot->contents + cur_off + 4); |
ba93b8ac DJ |
11822 | } |
11823 | ||
11824 | cur_off += 8; | |
11825 | } | |
11826 | ||
11827 | if (tls_type & GOT_TLS_IE) | |
11828 | { | |
11829 | if (need_relocs) | |
11830 | { | |
00a97672 RS |
11831 | if (indx == 0) |
11832 | outrel.r_addend = value - dtpoff_base (info); | |
11833 | else | |
11834 | outrel.r_addend = 0; | |
362d30a1 RS |
11835 | outrel.r_offset = (sgot->output_section->vma |
11836 | + sgot->output_offset | |
ba93b8ac DJ |
11837 | + cur_off); |
11838 | outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32); | |
11839 | ||
00a97672 RS |
11840 | if (globals->use_rel) |
11841 | bfd_put_32 (output_bfd, outrel.r_addend, | |
362d30a1 | 11842 | sgot->contents + cur_off); |
ba93b8ac | 11843 | |
47beaa6a | 11844 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
ba93b8ac DJ |
11845 | } |
11846 | else | |
11847 | bfd_put_32 (output_bfd, tpoff (info, value), | |
362d30a1 | 11848 | sgot->contents + cur_off); |
ba93b8ac DJ |
11849 | cur_off += 4; |
11850 | } | |
11851 | ||
11852 | if (h != NULL) | |
11853 | h->got.offset |= 1; | |
11854 | else | |
11855 | local_got_offsets[r_symndx] |= 1; | |
11856 | } | |
11857 | ||
5c5a4843 | 11858 | if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32 && r_type != R_ARM_TLS_GD32_FDPIC) |
ba93b8ac | 11859 | off += 8; |
0855e32b NS |
11860 | else if (tls_type & GOT_TLS_GDESC) |
11861 | off = offplt; | |
11862 | ||
cc850f74 NC |
11863 | if (ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL |
11864 | || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL) | |
0855e32b NS |
11865 | { |
11866 | bfd_signed_vma offset; | |
12352d3f PB |
11867 | /* TLS stubs are arm mode. The original symbol is a |
11868 | data object, so branch_type is bogus. */ | |
11869 | branch_type = ST_BRANCH_TO_ARM; | |
0855e32b | 11870 | enum elf32_arm_stub_type stub_type |
34e77a92 RS |
11871 | = arm_type_of_stub (info, input_section, rel, |
11872 | st_type, &branch_type, | |
0855e32b NS |
11873 | (struct elf32_arm_link_hash_entry *)h, |
11874 | globals->tls_trampoline, globals->root.splt, | |
11875 | input_bfd, sym_name); | |
11876 | ||
11877 | if (stub_type != arm_stub_none) | |
11878 | { | |
11879 | struct elf32_arm_stub_hash_entry *stub_entry | |
11880 | = elf32_arm_get_stub_entry | |
11881 | (input_section, globals->root.splt, 0, rel, | |
11882 | globals, stub_type); | |
11883 | offset = (stub_entry->stub_offset | |
11884 | + stub_entry->stub_sec->output_offset | |
11885 | + stub_entry->stub_sec->output_section->vma); | |
11886 | } | |
11887 | else | |
11888 | offset = (globals->root.splt->output_section->vma | |
11889 | + globals->root.splt->output_offset | |
11890 | + globals->tls_trampoline); | |
11891 | ||
cc850f74 | 11892 | if (ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL) |
0855e32b NS |
11893 | { |
11894 | unsigned long inst; | |
b38cadfb NC |
11895 | |
11896 | offset -= (input_section->output_section->vma | |
11897 | + input_section->output_offset | |
11898 | + rel->r_offset + 8); | |
0855e32b NS |
11899 | |
11900 | inst = offset >> 2; | |
11901 | inst &= 0x00ffffff; | |
11902 | value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000); | |
11903 | } | |
11904 | else | |
11905 | { | |
11906 | /* Thumb blx encodes the offset in a complicated | |
11907 | fashion. */ | |
11908 | unsigned upper_insn, lower_insn; | |
11909 | unsigned neg; | |
11910 | ||
b38cadfb NC |
11911 | offset -= (input_section->output_section->vma |
11912 | + input_section->output_offset | |
0855e32b | 11913 | + rel->r_offset + 4); |
b38cadfb | 11914 | |
12352d3f PB |
11915 | if (stub_type != arm_stub_none |
11916 | && arm_stub_is_thumb (stub_type)) | |
11917 | { | |
11918 | lower_insn = 0xd000; | |
11919 | } | |
11920 | else | |
11921 | { | |
11922 | lower_insn = 0xc000; | |
6a631e86 | 11923 | /* Round up the offset to a word boundary. */ |
12352d3f PB |
11924 | offset = (offset + 2) & ~2; |
11925 | } | |
11926 | ||
0855e32b NS |
11927 | neg = offset < 0; |
11928 | upper_insn = (0xf000 | |
11929 | | ((offset >> 12) & 0x3ff) | |
11930 | | (neg << 10)); | |
12352d3f | 11931 | lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13) |
0855e32b | 11932 | | (((!((offset >> 22) & 1)) ^ neg) << 11) |
12352d3f | 11933 | | ((offset >> 1) & 0x7ff); |
0855e32b NS |
11934 | bfd_put_16 (input_bfd, upper_insn, hit_data); |
11935 | bfd_put_16 (input_bfd, lower_insn, hit_data + 2); | |
11936 | return bfd_reloc_ok; | |
11937 | } | |
11938 | } | |
11939 | /* These relocations needs special care, as besides the fact | |
11940 | they point somewhere in .gotplt, the addend must be | |
11941 | adjusted accordingly depending on the type of instruction | |
6a631e86 | 11942 | we refer to. */ |
0855e32b NS |
11943 | else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC)) |
11944 | { | |
11945 | unsigned long data, insn; | |
11946 | unsigned thumb; | |
b38cadfb | 11947 | |
b627f562 | 11948 | data = bfd_get_signed_32 (input_bfd, hit_data); |
0855e32b | 11949 | thumb = data & 1; |
b627f562 | 11950 | data &= ~1ul; |
b38cadfb | 11951 | |
0855e32b NS |
11952 | if (thumb) |
11953 | { | |
11954 | insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data); | |
11955 | if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800) | |
11956 | insn = (insn << 16) | |
11957 | | bfd_get_16 (input_bfd, | |
11958 | contents + rel->r_offset - data + 2); | |
11959 | if ((insn & 0xf800c000) == 0xf000c000) | |
11960 | /* bl/blx */ | |
11961 | value = -6; | |
11962 | else if ((insn & 0xffffff00) == 0x4400) | |
11963 | /* add */ | |
11964 | value = -5; | |
11965 | else | |
11966 | { | |
4eca0228 | 11967 | _bfd_error_handler |
695344c0 | 11968 | /* xgettext:c-format */ |
2dcf00ce | 11969 | (_("%pB(%pA+%#" PRIx64 "): " |
90b6238f | 11970 | "unexpected %s instruction '%#lx' " |
2dcf00ce AM |
11971 | "referenced by TLS_GOTDESC"), |
11972 | input_bfd, input_section, (uint64_t) rel->r_offset, | |
90b6238f | 11973 | "Thumb", insn); |
0855e32b NS |
11974 | return bfd_reloc_notsupported; |
11975 | } | |
11976 | } | |
11977 | else | |
11978 | { | |
11979 | insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data); | |
11980 | ||
11981 | switch (insn >> 24) | |
11982 | { | |
11983 | case 0xeb: /* bl */ | |
11984 | case 0xfa: /* blx */ | |
11985 | value = -4; | |
11986 | break; | |
11987 | ||
11988 | case 0xe0: /* add */ | |
11989 | value = -8; | |
11990 | break; | |
b38cadfb | 11991 | |
0855e32b | 11992 | default: |
4eca0228 | 11993 | _bfd_error_handler |
695344c0 | 11994 | /* xgettext:c-format */ |
2dcf00ce | 11995 | (_("%pB(%pA+%#" PRIx64 "): " |
90b6238f | 11996 | "unexpected %s instruction '%#lx' " |
2dcf00ce AM |
11997 | "referenced by TLS_GOTDESC"), |
11998 | input_bfd, input_section, (uint64_t) rel->r_offset, | |
90b6238f | 11999 | "ARM", insn); |
0855e32b NS |
12000 | return bfd_reloc_notsupported; |
12001 | } | |
12002 | } | |
b38cadfb | 12003 | |
0855e32b NS |
12004 | value += ((globals->root.sgotplt->output_section->vma |
12005 | + globals->root.sgotplt->output_offset + off) | |
12006 | - (input_section->output_section->vma | |
12007 | + input_section->output_offset | |
12008 | + rel->r_offset) | |
12009 | + globals->sgotplt_jump_table_size); | |
12010 | } | |
12011 | else | |
12012 | value = ((globals->root.sgot->output_section->vma | |
12013 | + globals->root.sgot->output_offset + off) | |
12014 | - (input_section->output_section->vma | |
12015 | + input_section->output_offset + rel->r_offset)); | |
ba93b8ac | 12016 | |
5c5a4843 CL |
12017 | if (globals->fdpic_p && (r_type == R_ARM_TLS_GD32_FDPIC || |
12018 | r_type == R_ARM_TLS_IE32_FDPIC)) | |
e8b09b87 CL |
12019 | { |
12020 | /* For FDPIC relocations, resolve to the offset of the GOT | |
12021 | entry from the start of GOT. */ | |
cc850f74 NC |
12022 | bfd_put_32 (output_bfd, |
12023 | globals->root.sgot->output_offset + off, | |
12024 | contents + rel->r_offset); | |
e8b09b87 CL |
12025 | |
12026 | return bfd_reloc_ok; | |
12027 | } | |
12028 | else | |
12029 | { | |
12030 | return _bfd_final_link_relocate (howto, input_bfd, input_section, | |
12031 | contents, rel->r_offset, value, | |
12032 | rel->r_addend); | |
12033 | } | |
ba93b8ac DJ |
12034 | } |
12035 | ||
12036 | case R_ARM_TLS_LE32: | |
3cbc1e5e | 12037 | if (bfd_link_dll (info)) |
ba93b8ac | 12038 | { |
4eca0228 | 12039 | _bfd_error_handler |
695344c0 | 12040 | /* xgettext:c-format */ |
2dcf00ce AM |
12041 | (_("%pB(%pA+%#" PRIx64 "): %s relocation not permitted " |
12042 | "in shared object"), | |
12043 | input_bfd, input_section, (uint64_t) rel->r_offset, howto->name); | |
46691134 | 12044 | return bfd_reloc_notsupported; |
ba93b8ac DJ |
12045 | } |
12046 | else | |
12047 | value = tpoff (info, value); | |
906e58ca | 12048 | |
ba93b8ac | 12049 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
00a97672 RS |
12050 | contents, rel->r_offset, value, |
12051 | rel->r_addend); | |
ba93b8ac | 12052 | |
319850b4 JB |
12053 | case R_ARM_V4BX: |
12054 | if (globals->fix_v4bx) | |
845b51d6 PB |
12055 | { |
12056 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
319850b4 | 12057 | |
845b51d6 PB |
12058 | /* Ensure that we have a BX instruction. */ |
12059 | BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10); | |
319850b4 | 12060 | |
845b51d6 PB |
12061 | if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf) |
12062 | { | |
12063 | /* Branch to veneer. */ | |
12064 | bfd_vma glue_addr; | |
12065 | glue_addr = elf32_arm_bx_glue (info, insn & 0xf); | |
12066 | glue_addr -= input_section->output_section->vma | |
12067 | + input_section->output_offset | |
12068 | + rel->r_offset + 8; | |
12069 | insn = (insn & 0xf0000000) | 0x0a000000 | |
12070 | | ((glue_addr >> 2) & 0x00ffffff); | |
12071 | } | |
12072 | else | |
12073 | { | |
12074 | /* Preserve Rm (lowest four bits) and the condition code | |
12075 | (highest four bits). Other bits encode MOV PC,Rm. */ | |
12076 | insn = (insn & 0xf000000f) | 0x01a0f000; | |
12077 | } | |
319850b4 | 12078 | |
845b51d6 PB |
12079 | bfd_put_32 (input_bfd, insn, hit_data); |
12080 | } | |
319850b4 JB |
12081 | return bfd_reloc_ok; |
12082 | ||
b6895b4f PB |
12083 | case R_ARM_MOVW_ABS_NC: |
12084 | case R_ARM_MOVT_ABS: | |
12085 | case R_ARM_MOVW_PREL_NC: | |
12086 | case R_ARM_MOVT_PREL: | |
92f5d02b MS |
12087 | /* Until we properly support segment-base-relative addressing then |
12088 | we assume the segment base to be zero, as for the group relocations. | |
12089 | Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC | |
12090 | and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */ | |
12091 | case R_ARM_MOVW_BREL_NC: | |
12092 | case R_ARM_MOVW_BREL: | |
12093 | case R_ARM_MOVT_BREL: | |
b6895b4f PB |
12094 | { |
12095 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
12096 | ||
12097 | if (globals->use_rel) | |
12098 | { | |
12099 | addend = ((insn >> 4) & 0xf000) | (insn & 0xfff); | |
39623e12 | 12100 | signed_addend = (addend ^ 0x8000) - 0x8000; |
b6895b4f | 12101 | } |
92f5d02b | 12102 | |
b6895b4f | 12103 | value += signed_addend; |
b6895b4f PB |
12104 | |
12105 | if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL) | |
12106 | value -= (input_section->output_section->vma | |
12107 | + input_section->output_offset + rel->r_offset); | |
12108 | ||
92f5d02b | 12109 | if (r_type == R_ARM_MOVW_BREL && value >= 0x10000) |
99059e56 | 12110 | return bfd_reloc_overflow; |
92f5d02b | 12111 | |
35fc36a8 | 12112 | if (branch_type == ST_BRANCH_TO_THUMB) |
92f5d02b MS |
12113 | value |= 1; |
12114 | ||
12115 | if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL | |
99059e56 | 12116 | || r_type == R_ARM_MOVT_BREL) |
b6895b4f PB |
12117 | value >>= 16; |
12118 | ||
12119 | insn &= 0xfff0f000; | |
12120 | insn |= value & 0xfff; | |
12121 | insn |= (value & 0xf000) << 4; | |
12122 | bfd_put_32 (input_bfd, insn, hit_data); | |
12123 | } | |
12124 | return bfd_reloc_ok; | |
12125 | ||
12126 | case R_ARM_THM_MOVW_ABS_NC: | |
12127 | case R_ARM_THM_MOVT_ABS: | |
12128 | case R_ARM_THM_MOVW_PREL_NC: | |
12129 | case R_ARM_THM_MOVT_PREL: | |
92f5d02b MS |
12130 | /* Until we properly support segment-base-relative addressing then |
12131 | we assume the segment base to be zero, as for the above relocations. | |
12132 | Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as | |
12133 | R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics | |
12134 | as R_ARM_THM_MOVT_ABS. */ | |
12135 | case R_ARM_THM_MOVW_BREL_NC: | |
12136 | case R_ARM_THM_MOVW_BREL: | |
12137 | case R_ARM_THM_MOVT_BREL: | |
b6895b4f PB |
12138 | { |
12139 | bfd_vma insn; | |
906e58ca | 12140 | |
b6895b4f PB |
12141 | insn = bfd_get_16 (input_bfd, hit_data) << 16; |
12142 | insn |= bfd_get_16 (input_bfd, hit_data + 2); | |
12143 | ||
12144 | if (globals->use_rel) | |
12145 | { | |
12146 | addend = ((insn >> 4) & 0xf000) | |
12147 | | ((insn >> 15) & 0x0800) | |
12148 | | ((insn >> 4) & 0x0700) | |
07d6d2b8 | 12149 | | (insn & 0x00ff); |
39623e12 | 12150 | signed_addend = (addend ^ 0x8000) - 0x8000; |
b6895b4f | 12151 | } |
92f5d02b | 12152 | |
b6895b4f | 12153 | value += signed_addend; |
b6895b4f PB |
12154 | |
12155 | if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL) | |
12156 | value -= (input_section->output_section->vma | |
12157 | + input_section->output_offset + rel->r_offset); | |
12158 | ||
92f5d02b | 12159 | if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000) |
99059e56 | 12160 | return bfd_reloc_overflow; |
92f5d02b | 12161 | |
35fc36a8 | 12162 | if (branch_type == ST_BRANCH_TO_THUMB) |
92f5d02b MS |
12163 | value |= 1; |
12164 | ||
12165 | if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL | |
99059e56 | 12166 | || r_type == R_ARM_THM_MOVT_BREL) |
b6895b4f PB |
12167 | value >>= 16; |
12168 | ||
12169 | insn &= 0xfbf08f00; | |
12170 | insn |= (value & 0xf000) << 4; | |
12171 | insn |= (value & 0x0800) << 15; | |
12172 | insn |= (value & 0x0700) << 4; | |
12173 | insn |= (value & 0x00ff); | |
12174 | ||
12175 | bfd_put_16 (input_bfd, insn >> 16, hit_data); | |
12176 | bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2); | |
12177 | } | |
12178 | return bfd_reloc_ok; | |
12179 | ||
4962c51a MS |
12180 | case R_ARM_ALU_PC_G0_NC: |
12181 | case R_ARM_ALU_PC_G1_NC: | |
12182 | case R_ARM_ALU_PC_G0: | |
12183 | case R_ARM_ALU_PC_G1: | |
12184 | case R_ARM_ALU_PC_G2: | |
12185 | case R_ARM_ALU_SB_G0_NC: | |
12186 | case R_ARM_ALU_SB_G1_NC: | |
12187 | case R_ARM_ALU_SB_G0: | |
12188 | case R_ARM_ALU_SB_G1: | |
12189 | case R_ARM_ALU_SB_G2: | |
12190 | { | |
12191 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
99059e56 | 12192 | bfd_vma pc = input_section->output_section->vma |
4962c51a | 12193 | + input_section->output_offset + rel->r_offset; |
31a91d61 | 12194 | /* sb is the origin of the *segment* containing the symbol. */ |
62c34db3 | 12195 | bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0; |
99059e56 RM |
12196 | bfd_vma residual; |
12197 | bfd_vma g_n; | |
4962c51a | 12198 | bfd_signed_vma signed_value; |
99059e56 RM |
12199 | int group = 0; |
12200 | ||
12201 | /* Determine which group of bits to select. */ | |
12202 | switch (r_type) | |
12203 | { | |
12204 | case R_ARM_ALU_PC_G0_NC: | |
12205 | case R_ARM_ALU_PC_G0: | |
12206 | case R_ARM_ALU_SB_G0_NC: | |
12207 | case R_ARM_ALU_SB_G0: | |
12208 | group = 0; | |
12209 | break; | |
12210 | ||
12211 | case R_ARM_ALU_PC_G1_NC: | |
12212 | case R_ARM_ALU_PC_G1: | |
12213 | case R_ARM_ALU_SB_G1_NC: | |
12214 | case R_ARM_ALU_SB_G1: | |
12215 | group = 1; | |
12216 | break; | |
12217 | ||
12218 | case R_ARM_ALU_PC_G2: | |
12219 | case R_ARM_ALU_SB_G2: | |
12220 | group = 2; | |
12221 | break; | |
12222 | ||
12223 | default: | |
12224 | abort (); | |
12225 | } | |
12226 | ||
12227 | /* If REL, extract the addend from the insn. If RELA, it will | |
12228 | have already been fetched for us. */ | |
4962c51a | 12229 | if (globals->use_rel) |
99059e56 RM |
12230 | { |
12231 | int negative; | |
12232 | bfd_vma constant = insn & 0xff; | |
12233 | bfd_vma rotation = (insn & 0xf00) >> 8; | |
12234 | ||
12235 | if (rotation == 0) | |
12236 | signed_addend = constant; | |
12237 | else | |
12238 | { | |
12239 | /* Compensate for the fact that in the instruction, the | |
12240 | rotation is stored in multiples of 2 bits. */ | |
12241 | rotation *= 2; | |
12242 | ||
12243 | /* Rotate "constant" right by "rotation" bits. */ | |
12244 | signed_addend = (constant >> rotation) | | |
12245 | (constant << (8 * sizeof (bfd_vma) - rotation)); | |
12246 | } | |
12247 | ||
12248 | /* Determine if the instruction is an ADD or a SUB. | |
12249 | (For REL, this determines the sign of the addend.) */ | |
12250 | negative = identify_add_or_sub (insn); | |
12251 | if (negative == 0) | |
12252 | { | |
4eca0228 | 12253 | _bfd_error_handler |
695344c0 | 12254 | /* xgettext:c-format */ |
90b6238f | 12255 | (_("%pB(%pA+%#" PRIx64 "): only ADD or SUB instructions " |
2dcf00ce AM |
12256 | "are allowed for ALU group relocations"), |
12257 | input_bfd, input_section, (uint64_t) rel->r_offset); | |
99059e56 RM |
12258 | return bfd_reloc_overflow; |
12259 | } | |
12260 | ||
12261 | signed_addend *= negative; | |
12262 | } | |
4962c51a MS |
12263 | |
12264 | /* Compute the value (X) to go in the place. */ | |
99059e56 RM |
12265 | if (r_type == R_ARM_ALU_PC_G0_NC |
12266 | || r_type == R_ARM_ALU_PC_G1_NC | |
12267 | || r_type == R_ARM_ALU_PC_G0 | |
12268 | || r_type == R_ARM_ALU_PC_G1 | |
12269 | || r_type == R_ARM_ALU_PC_G2) | |
12270 | /* PC relative. */ | |
12271 | signed_value = value - pc + signed_addend; | |
12272 | else | |
12273 | /* Section base relative. */ | |
12274 | signed_value = value - sb + signed_addend; | |
12275 | ||
12276 | /* If the target symbol is a Thumb function, then set the | |
12277 | Thumb bit in the address. */ | |
35fc36a8 | 12278 | if (branch_type == ST_BRANCH_TO_THUMB) |
4962c51a MS |
12279 | signed_value |= 1; |
12280 | ||
99059e56 RM |
12281 | /* Calculate the value of the relevant G_n, in encoded |
12282 | constant-with-rotation format. */ | |
b6518b38 NC |
12283 | g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value, |
12284 | group, &residual); | |
99059e56 RM |
12285 | |
12286 | /* Check for overflow if required. */ | |
12287 | if ((r_type == R_ARM_ALU_PC_G0 | |
12288 | || r_type == R_ARM_ALU_PC_G1 | |
12289 | || r_type == R_ARM_ALU_PC_G2 | |
12290 | || r_type == R_ARM_ALU_SB_G0 | |
12291 | || r_type == R_ARM_ALU_SB_G1 | |
12292 | || r_type == R_ARM_ALU_SB_G2) && residual != 0) | |
12293 | { | |
4eca0228 | 12294 | _bfd_error_handler |
695344c0 | 12295 | /* xgettext:c-format */ |
90b6238f | 12296 | (_("%pB(%pA+%#" PRIx64 "): overflow whilst " |
2dcf00ce AM |
12297 | "splitting %#" PRIx64 " for group relocation %s"), |
12298 | input_bfd, input_section, (uint64_t) rel->r_offset, | |
12299 | (uint64_t) (signed_value < 0 ? -signed_value : signed_value), | |
12300 | howto->name); | |
99059e56 RM |
12301 | return bfd_reloc_overflow; |
12302 | } | |
12303 | ||
12304 | /* Mask out the value and the ADD/SUB part of the opcode; take care | |
12305 | not to destroy the S bit. */ | |
12306 | insn &= 0xff1ff000; | |
12307 | ||
12308 | /* Set the opcode according to whether the value to go in the | |
12309 | place is negative. */ | |
12310 | if (signed_value < 0) | |
12311 | insn |= 1 << 22; | |
12312 | else | |
12313 | insn |= 1 << 23; | |
12314 | ||
12315 | /* Encode the offset. */ | |
12316 | insn |= g_n; | |
4962c51a MS |
12317 | |
12318 | bfd_put_32 (input_bfd, insn, hit_data); | |
12319 | } | |
12320 | return bfd_reloc_ok; | |
12321 | ||
12322 | case R_ARM_LDR_PC_G0: | |
12323 | case R_ARM_LDR_PC_G1: | |
12324 | case R_ARM_LDR_PC_G2: | |
12325 | case R_ARM_LDR_SB_G0: | |
12326 | case R_ARM_LDR_SB_G1: | |
12327 | case R_ARM_LDR_SB_G2: | |
12328 | { | |
12329 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
99059e56 | 12330 | bfd_vma pc = input_section->output_section->vma |
4962c51a | 12331 | + input_section->output_offset + rel->r_offset; |
31a91d61 | 12332 | /* sb is the origin of the *segment* containing the symbol. */ |
62c34db3 | 12333 | bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0; |
99059e56 | 12334 | bfd_vma residual; |
4962c51a | 12335 | bfd_signed_vma signed_value; |
99059e56 RM |
12336 | int group = 0; |
12337 | ||
12338 | /* Determine which groups of bits to calculate. */ | |
12339 | switch (r_type) | |
12340 | { | |
12341 | case R_ARM_LDR_PC_G0: | |
12342 | case R_ARM_LDR_SB_G0: | |
12343 | group = 0; | |
12344 | break; | |
12345 | ||
12346 | case R_ARM_LDR_PC_G1: | |
12347 | case R_ARM_LDR_SB_G1: | |
12348 | group = 1; | |
12349 | break; | |
12350 | ||
12351 | case R_ARM_LDR_PC_G2: | |
12352 | case R_ARM_LDR_SB_G2: | |
12353 | group = 2; | |
12354 | break; | |
12355 | ||
12356 | default: | |
12357 | abort (); | |
12358 | } | |
12359 | ||
12360 | /* If REL, extract the addend from the insn. If RELA, it will | |
12361 | have already been fetched for us. */ | |
4962c51a | 12362 | if (globals->use_rel) |
99059e56 RM |
12363 | { |
12364 | int negative = (insn & (1 << 23)) ? 1 : -1; | |
12365 | signed_addend = negative * (insn & 0xfff); | |
12366 | } | |
4962c51a MS |
12367 | |
12368 | /* Compute the value (X) to go in the place. */ | |
99059e56 RM |
12369 | if (r_type == R_ARM_LDR_PC_G0 |
12370 | || r_type == R_ARM_LDR_PC_G1 | |
12371 | || r_type == R_ARM_LDR_PC_G2) | |
12372 | /* PC relative. */ | |
12373 | signed_value = value - pc + signed_addend; | |
12374 | else | |
12375 | /* Section base relative. */ | |
12376 | signed_value = value - sb + signed_addend; | |
12377 | ||
12378 | /* Calculate the value of the relevant G_{n-1} to obtain | |
12379 | the residual at that stage. */ | |
b6518b38 NC |
12380 | calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value, |
12381 | group - 1, &residual); | |
99059e56 RM |
12382 | |
12383 | /* Check for overflow. */ | |
12384 | if (residual >= 0x1000) | |
12385 | { | |
4eca0228 | 12386 | _bfd_error_handler |
695344c0 | 12387 | /* xgettext:c-format */ |
90b6238f | 12388 | (_("%pB(%pA+%#" PRIx64 "): overflow whilst " |
2dcf00ce AM |
12389 | "splitting %#" PRIx64 " for group relocation %s"), |
12390 | input_bfd, input_section, (uint64_t) rel->r_offset, | |
12391 | (uint64_t) (signed_value < 0 ? -signed_value : signed_value), | |
12392 | howto->name); | |
99059e56 RM |
12393 | return bfd_reloc_overflow; |
12394 | } | |
12395 | ||
12396 | /* Mask out the value and U bit. */ | |
12397 | insn &= 0xff7ff000; | |
12398 | ||
12399 | /* Set the U bit if the value to go in the place is non-negative. */ | |
12400 | if (signed_value >= 0) | |
12401 | insn |= 1 << 23; | |
12402 | ||
12403 | /* Encode the offset. */ | |
12404 | insn |= residual; | |
4962c51a MS |
12405 | |
12406 | bfd_put_32 (input_bfd, insn, hit_data); | |
12407 | } | |
12408 | return bfd_reloc_ok; | |
12409 | ||
12410 | case R_ARM_LDRS_PC_G0: | |
12411 | case R_ARM_LDRS_PC_G1: | |
12412 | case R_ARM_LDRS_PC_G2: | |
12413 | case R_ARM_LDRS_SB_G0: | |
12414 | case R_ARM_LDRS_SB_G1: | |
12415 | case R_ARM_LDRS_SB_G2: | |
12416 | { | |
12417 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
99059e56 | 12418 | bfd_vma pc = input_section->output_section->vma |
4962c51a | 12419 | + input_section->output_offset + rel->r_offset; |
31a91d61 | 12420 | /* sb is the origin of the *segment* containing the symbol. */ |
62c34db3 | 12421 | bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0; |
99059e56 | 12422 | bfd_vma residual; |
4962c51a | 12423 | bfd_signed_vma signed_value; |
99059e56 RM |
12424 | int group = 0; |
12425 | ||
12426 | /* Determine which groups of bits to calculate. */ | |
12427 | switch (r_type) | |
12428 | { | |
12429 | case R_ARM_LDRS_PC_G0: | |
12430 | case R_ARM_LDRS_SB_G0: | |
12431 | group = 0; | |
12432 | break; | |
12433 | ||
12434 | case R_ARM_LDRS_PC_G1: | |
12435 | case R_ARM_LDRS_SB_G1: | |
12436 | group = 1; | |
12437 | break; | |
12438 | ||
12439 | case R_ARM_LDRS_PC_G2: | |
12440 | case R_ARM_LDRS_SB_G2: | |
12441 | group = 2; | |
12442 | break; | |
12443 | ||
12444 | default: | |
12445 | abort (); | |
12446 | } | |
12447 | ||
12448 | /* If REL, extract the addend from the insn. If RELA, it will | |
12449 | have already been fetched for us. */ | |
4962c51a | 12450 | if (globals->use_rel) |
99059e56 RM |
12451 | { |
12452 | int negative = (insn & (1 << 23)) ? 1 : -1; | |
12453 | signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf)); | |
12454 | } | |
4962c51a MS |
12455 | |
12456 | /* Compute the value (X) to go in the place. */ | |
99059e56 RM |
12457 | if (r_type == R_ARM_LDRS_PC_G0 |
12458 | || r_type == R_ARM_LDRS_PC_G1 | |
12459 | || r_type == R_ARM_LDRS_PC_G2) | |
12460 | /* PC relative. */ | |
12461 | signed_value = value - pc + signed_addend; | |
12462 | else | |
12463 | /* Section base relative. */ | |
12464 | signed_value = value - sb + signed_addend; | |
12465 | ||
12466 | /* Calculate the value of the relevant G_{n-1} to obtain | |
12467 | the residual at that stage. */ | |
b6518b38 NC |
12468 | calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value, |
12469 | group - 1, &residual); | |
99059e56 RM |
12470 | |
12471 | /* Check for overflow. */ | |
12472 | if (residual >= 0x100) | |
12473 | { | |
4eca0228 | 12474 | _bfd_error_handler |
695344c0 | 12475 | /* xgettext:c-format */ |
90b6238f | 12476 | (_("%pB(%pA+%#" PRIx64 "): overflow whilst " |
2dcf00ce AM |
12477 | "splitting %#" PRIx64 " for group relocation %s"), |
12478 | input_bfd, input_section, (uint64_t) rel->r_offset, | |
12479 | (uint64_t) (signed_value < 0 ? -signed_value : signed_value), | |
12480 | howto->name); | |
99059e56 RM |
12481 | return bfd_reloc_overflow; |
12482 | } | |
12483 | ||
12484 | /* Mask out the value and U bit. */ | |
12485 | insn &= 0xff7ff0f0; | |
12486 | ||
12487 | /* Set the U bit if the value to go in the place is non-negative. */ | |
12488 | if (signed_value >= 0) | |
12489 | insn |= 1 << 23; | |
12490 | ||
12491 | /* Encode the offset. */ | |
12492 | insn |= ((residual & 0xf0) << 4) | (residual & 0xf); | |
4962c51a MS |
12493 | |
12494 | bfd_put_32 (input_bfd, insn, hit_data); | |
12495 | } | |
12496 | return bfd_reloc_ok; | |
12497 | ||
12498 | case R_ARM_LDC_PC_G0: | |
12499 | case R_ARM_LDC_PC_G1: | |
12500 | case R_ARM_LDC_PC_G2: | |
12501 | case R_ARM_LDC_SB_G0: | |
12502 | case R_ARM_LDC_SB_G1: | |
12503 | case R_ARM_LDC_SB_G2: | |
12504 | { | |
12505 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
99059e56 | 12506 | bfd_vma pc = input_section->output_section->vma |
4962c51a | 12507 | + input_section->output_offset + rel->r_offset; |
31a91d61 | 12508 | /* sb is the origin of the *segment* containing the symbol. */ |
62c34db3 | 12509 | bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0; |
99059e56 | 12510 | bfd_vma residual; |
4962c51a | 12511 | bfd_signed_vma signed_value; |
99059e56 RM |
12512 | int group = 0; |
12513 | ||
12514 | /* Determine which groups of bits to calculate. */ | |
12515 | switch (r_type) | |
12516 | { | |
12517 | case R_ARM_LDC_PC_G0: | |
12518 | case R_ARM_LDC_SB_G0: | |
12519 | group = 0; | |
12520 | break; | |
12521 | ||
12522 | case R_ARM_LDC_PC_G1: | |
12523 | case R_ARM_LDC_SB_G1: | |
12524 | group = 1; | |
12525 | break; | |
12526 | ||
12527 | case R_ARM_LDC_PC_G2: | |
12528 | case R_ARM_LDC_SB_G2: | |
12529 | group = 2; | |
12530 | break; | |
12531 | ||
12532 | default: | |
12533 | abort (); | |
12534 | } | |
12535 | ||
12536 | /* If REL, extract the addend from the insn. If RELA, it will | |
12537 | have already been fetched for us. */ | |
4962c51a | 12538 | if (globals->use_rel) |
99059e56 RM |
12539 | { |
12540 | int negative = (insn & (1 << 23)) ? 1 : -1; | |
12541 | signed_addend = negative * ((insn & 0xff) << 2); | |
12542 | } | |
4962c51a MS |
12543 | |
12544 | /* Compute the value (X) to go in the place. */ | |
99059e56 RM |
12545 | if (r_type == R_ARM_LDC_PC_G0 |
12546 | || r_type == R_ARM_LDC_PC_G1 | |
12547 | || r_type == R_ARM_LDC_PC_G2) | |
12548 | /* PC relative. */ | |
12549 | signed_value = value - pc + signed_addend; | |
12550 | else | |
12551 | /* Section base relative. */ | |
12552 | signed_value = value - sb + signed_addend; | |
12553 | ||
12554 | /* Calculate the value of the relevant G_{n-1} to obtain | |
12555 | the residual at that stage. */ | |
b6518b38 NC |
12556 | calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value, |
12557 | group - 1, &residual); | |
99059e56 RM |
12558 | |
12559 | /* Check for overflow. (The absolute value to go in the place must be | |
12560 | divisible by four and, after having been divided by four, must | |
12561 | fit in eight bits.) */ | |
12562 | if ((residual & 0x3) != 0 || residual >= 0x400) | |
12563 | { | |
4eca0228 | 12564 | _bfd_error_handler |
695344c0 | 12565 | /* xgettext:c-format */ |
90b6238f | 12566 | (_("%pB(%pA+%#" PRIx64 "): overflow whilst " |
2dcf00ce AM |
12567 | "splitting %#" PRIx64 " for group relocation %s"), |
12568 | input_bfd, input_section, (uint64_t) rel->r_offset, | |
12569 | (uint64_t) (signed_value < 0 ? -signed_value : signed_value), | |
12570 | howto->name); | |
99059e56 RM |
12571 | return bfd_reloc_overflow; |
12572 | } | |
12573 | ||
12574 | /* Mask out the value and U bit. */ | |
12575 | insn &= 0xff7fff00; | |
12576 | ||
12577 | /* Set the U bit if the value to go in the place is non-negative. */ | |
12578 | if (signed_value >= 0) | |
12579 | insn |= 1 << 23; | |
12580 | ||
12581 | /* Encode the offset. */ | |
12582 | insn |= residual >> 2; | |
4962c51a MS |
12583 | |
12584 | bfd_put_32 (input_bfd, insn, hit_data); | |
12585 | } | |
12586 | return bfd_reloc_ok; | |
12587 | ||
72d98d16 MG |
12588 | case R_ARM_THM_ALU_ABS_G0_NC: |
12589 | case R_ARM_THM_ALU_ABS_G1_NC: | |
12590 | case R_ARM_THM_ALU_ABS_G2_NC: | |
12591 | case R_ARM_THM_ALU_ABS_G3_NC: | |
12592 | { | |
12593 | const int shift_array[4] = {0, 8, 16, 24}; | |
12594 | bfd_vma insn = bfd_get_16 (input_bfd, hit_data); | |
12595 | bfd_vma addr = value; | |
12596 | int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC]; | |
12597 | ||
12598 | /* Compute address. */ | |
12599 | if (globals->use_rel) | |
12600 | signed_addend = insn & 0xff; | |
12601 | addr += signed_addend; | |
12602 | if (branch_type == ST_BRANCH_TO_THUMB) | |
12603 | addr |= 1; | |
12604 | /* Clean imm8 insn. */ | |
12605 | insn &= 0xff00; | |
12606 | /* And update with correct part of address. */ | |
12607 | insn |= (addr >> shift) & 0xff; | |
12608 | /* Update insn. */ | |
12609 | bfd_put_16 (input_bfd, insn, hit_data); | |
12610 | } | |
12611 | ||
0a1b45a2 | 12612 | *unresolved_reloc_p = false; |
72d98d16 MG |
12613 | return bfd_reloc_ok; |
12614 | ||
e8b09b87 CL |
12615 | case R_ARM_GOTOFFFUNCDESC: |
12616 | { | |
4b24dd1a | 12617 | if (h == NULL) |
e8b09b87 | 12618 | { |
cc850f74 | 12619 | struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts (input_bfd); |
e8b09b87 | 12620 | int dynindx = elf_section_data (sym_sec->output_section)->dynindx; |
74fd118f NC |
12621 | |
12622 | if (r_symndx >= elf32_arm_num_entries (input_bfd)) | |
12623 | { | |
12624 | * error_message = _("local symbol index too big"); | |
12625 | return bfd_reloc_dangerous; | |
12626 | } | |
12627 | ||
e8b09b87 CL |
12628 | int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1; |
12629 | bfd_vma addr = dynreloc_value - sym_sec->output_section->vma; | |
12630 | bfd_vma seg = -1; | |
12631 | ||
cc850f74 NC |
12632 | if (bfd_link_pic (info) && dynindx == 0) |
12633 | { | |
12634 | * error_message = _("no dynamic index information available"); | |
12635 | return bfd_reloc_dangerous; | |
12636 | } | |
e8b09b87 CL |
12637 | |
12638 | /* Resolve relocation. */ | |
cc850f74 | 12639 | bfd_put_32 (output_bfd, (offset + sgot->output_offset) |
e8b09b87 CL |
12640 | , contents + rel->r_offset); |
12641 | /* Emit R_ARM_FUNCDESC_VALUE or two fixups on funcdesc if | |
12642 | not done yet. */ | |
cc850f74 NC |
12643 | arm_elf_fill_funcdesc (output_bfd, info, |
12644 | &local_fdpic_cnts[r_symndx].funcdesc_offset, | |
12645 | dynindx, offset, addr, dynreloc_value, seg); | |
e8b09b87 CL |
12646 | } |
12647 | else | |
12648 | { | |
12649 | int dynindx; | |
12650 | int offset = eh->fdpic_cnts.funcdesc_offset & ~1; | |
12651 | bfd_vma addr; | |
12652 | bfd_vma seg = -1; | |
12653 | ||
12654 | /* For static binaries, sym_sec can be null. */ | |
12655 | if (sym_sec) | |
12656 | { | |
12657 | dynindx = elf_section_data (sym_sec->output_section)->dynindx; | |
12658 | addr = dynreloc_value - sym_sec->output_section->vma; | |
12659 | } | |
12660 | else | |
12661 | { | |
12662 | dynindx = 0; | |
12663 | addr = 0; | |
12664 | } | |
12665 | ||
cc850f74 NC |
12666 | if (bfd_link_pic (info) && dynindx == 0) |
12667 | { | |
12668 | * error_message = _("no dynamic index information available"); | |
12669 | return bfd_reloc_dangerous; | |
12670 | } | |
e8b09b87 CL |
12671 | |
12672 | /* This case cannot occur since funcdesc is allocated by | |
12673 | the dynamic loader so we cannot resolve the relocation. */ | |
12674 | if (h->dynindx != -1) | |
cc850f74 NC |
12675 | { |
12676 | * error_message = _("invalid dynamic index"); | |
12677 | return bfd_reloc_dangerous; | |
12678 | } | |
e8b09b87 CL |
12679 | |
12680 | /* Resolve relocation. */ | |
cc850f74 NC |
12681 | bfd_put_32 (output_bfd, (offset + sgot->output_offset), |
12682 | contents + rel->r_offset); | |
e8b09b87 | 12683 | /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */ |
cc850f74 NC |
12684 | arm_elf_fill_funcdesc (output_bfd, info, |
12685 | &eh->fdpic_cnts.funcdesc_offset, | |
12686 | dynindx, offset, addr, dynreloc_value, seg); | |
e8b09b87 CL |
12687 | } |
12688 | } | |
0a1b45a2 | 12689 | *unresolved_reloc_p = false; |
e8b09b87 CL |
12690 | return bfd_reloc_ok; |
12691 | ||
12692 | case R_ARM_GOTFUNCDESC: | |
12693 | { | |
4b24dd1a | 12694 | if (h != NULL) |
e8b09b87 CL |
12695 | { |
12696 | Elf_Internal_Rela outrel; | |
12697 | ||
12698 | /* Resolve relocation. */ | |
cc850f74 NC |
12699 | bfd_put_32 (output_bfd, ((eh->fdpic_cnts.gotfuncdesc_offset & ~1) |
12700 | + sgot->output_offset), | |
12701 | contents + rel->r_offset); | |
e8b09b87 | 12702 | /* Add funcdesc and associated R_ARM_FUNCDESC_VALUE. */ |
cc850f74 | 12703 | if (h->dynindx == -1) |
e8b09b87 CL |
12704 | { |
12705 | int dynindx; | |
12706 | int offset = eh->fdpic_cnts.funcdesc_offset & ~1; | |
12707 | bfd_vma addr; | |
12708 | bfd_vma seg = -1; | |
12709 | ||
12710 | /* For static binaries sym_sec can be null. */ | |
12711 | if (sym_sec) | |
12712 | { | |
12713 | dynindx = elf_section_data (sym_sec->output_section)->dynindx; | |
12714 | addr = dynreloc_value - sym_sec->output_section->vma; | |
12715 | } | |
12716 | else | |
12717 | { | |
12718 | dynindx = 0; | |
12719 | addr = 0; | |
12720 | } | |
12721 | ||
12722 | /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */ | |
cc850f74 NC |
12723 | arm_elf_fill_funcdesc (output_bfd, info, |
12724 | &eh->fdpic_cnts.funcdesc_offset, | |
12725 | dynindx, offset, addr, dynreloc_value, seg); | |
e8b09b87 CL |
12726 | } |
12727 | ||
12728 | /* Add a dynamic relocation on GOT entry if not already done. */ | |
12729 | if ((eh->fdpic_cnts.gotfuncdesc_offset & 1) == 0) | |
12730 | { | |
12731 | if (h->dynindx == -1) | |
12732 | { | |
12733 | outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE); | |
12734 | if (h->root.type == bfd_link_hash_undefweak) | |
cc850f74 NC |
12735 | bfd_put_32 (output_bfd, 0, sgot->contents |
12736 | + (eh->fdpic_cnts.gotfuncdesc_offset & ~1)); | |
e8b09b87 | 12737 | else |
cc850f74 NC |
12738 | bfd_put_32 (output_bfd, sgot->output_section->vma |
12739 | + sgot->output_offset | |
12740 | + (eh->fdpic_cnts.funcdesc_offset & ~1), | |
12741 | sgot->contents | |
12742 | + (eh->fdpic_cnts.gotfuncdesc_offset & ~1)); | |
e8b09b87 CL |
12743 | } |
12744 | else | |
12745 | { | |
12746 | outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC); | |
12747 | } | |
12748 | outrel.r_offset = sgot->output_section->vma | |
12749 | + sgot->output_offset | |
12750 | + (eh->fdpic_cnts.gotfuncdesc_offset & ~1); | |
12751 | outrel.r_addend = 0; | |
cc850f74 | 12752 | if (h->dynindx == -1 && !bfd_link_pic (info)) |
e8b09b87 | 12753 | if (h->root.type == bfd_link_hash_undefweak) |
cc850f74 | 12754 | arm_elf_add_rofixup (output_bfd, globals->srofixup, -1); |
e8b09b87 | 12755 | else |
cc850f74 NC |
12756 | arm_elf_add_rofixup (output_bfd, globals->srofixup, |
12757 | outrel.r_offset); | |
e8b09b87 CL |
12758 | else |
12759 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); | |
12760 | eh->fdpic_cnts.gotfuncdesc_offset |= 1; | |
12761 | } | |
12762 | } | |
12763 | else | |
12764 | { | |
12765 | /* Such relocation on static function should not have been | |
12766 | emitted by the compiler. */ | |
cc850f74 | 12767 | return bfd_reloc_notsupported; |
e8b09b87 CL |
12768 | } |
12769 | } | |
0a1b45a2 | 12770 | *unresolved_reloc_p = false; |
e8b09b87 CL |
12771 | return bfd_reloc_ok; |
12772 | ||
12773 | case R_ARM_FUNCDESC: | |
12774 | { | |
4b24dd1a | 12775 | if (h == NULL) |
e8b09b87 | 12776 | { |
cc850f74 | 12777 | struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts (input_bfd); |
e8b09b87 CL |
12778 | Elf_Internal_Rela outrel; |
12779 | int dynindx = elf_section_data (sym_sec->output_section)->dynindx; | |
74fd118f NC |
12780 | |
12781 | if (r_symndx >= elf32_arm_num_entries (input_bfd)) | |
12782 | { | |
12783 | * error_message = _("local symbol index too big"); | |
12784 | return bfd_reloc_dangerous; | |
12785 | } | |
12786 | ||
e8b09b87 CL |
12787 | int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1; |
12788 | bfd_vma addr = dynreloc_value - sym_sec->output_section->vma; | |
12789 | bfd_vma seg = -1; | |
12790 | ||
cc850f74 NC |
12791 | if (bfd_link_pic (info) && dynindx == 0) |
12792 | { | |
12793 | * error_message = _("dynamic index information not available"); | |
12794 | return bfd_reloc_dangerous; | |
12795 | } | |
e8b09b87 CL |
12796 | |
12797 | /* Replace static FUNCDESC relocation with a | |
12798 | R_ARM_RELATIVE dynamic relocation or with a rofixup for | |
12799 | executable. */ | |
12800 | outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE); | |
12801 | outrel.r_offset = input_section->output_section->vma | |
12802 | + input_section->output_offset + rel->r_offset; | |
12803 | outrel.r_addend = 0; | |
cc850f74 | 12804 | if (bfd_link_pic (info)) |
e8b09b87 CL |
12805 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
12806 | else | |
cc850f74 | 12807 | arm_elf_add_rofixup (output_bfd, globals->srofixup, outrel.r_offset); |
e8b09b87 CL |
12808 | |
12809 | bfd_put_32 (input_bfd, sgot->output_section->vma | |
12810 | + sgot->output_offset + offset, hit_data); | |
12811 | ||
12812 | /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */ | |
cc850f74 NC |
12813 | arm_elf_fill_funcdesc (output_bfd, info, |
12814 | &local_fdpic_cnts[r_symndx].funcdesc_offset, | |
12815 | dynindx, offset, addr, dynreloc_value, seg); | |
e8b09b87 CL |
12816 | } |
12817 | else | |
12818 | { | |
12819 | if (h->dynindx == -1) | |
12820 | { | |
12821 | int dynindx; | |
12822 | int offset = eh->fdpic_cnts.funcdesc_offset & ~1; | |
12823 | bfd_vma addr; | |
12824 | bfd_vma seg = -1; | |
12825 | Elf_Internal_Rela outrel; | |
12826 | ||
12827 | /* For static binaries sym_sec can be null. */ | |
12828 | if (sym_sec) | |
12829 | { | |
12830 | dynindx = elf_section_data (sym_sec->output_section)->dynindx; | |
12831 | addr = dynreloc_value - sym_sec->output_section->vma; | |
12832 | } | |
12833 | else | |
12834 | { | |
12835 | dynindx = 0; | |
12836 | addr = 0; | |
12837 | } | |
12838 | ||
cc850f74 NC |
12839 | if (bfd_link_pic (info) && dynindx == 0) |
12840 | abort (); | |
e8b09b87 CL |
12841 | |
12842 | /* Replace static FUNCDESC relocation with a | |
12843 | R_ARM_RELATIVE dynamic relocation. */ | |
12844 | outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE); | |
12845 | outrel.r_offset = input_section->output_section->vma | |
12846 | + input_section->output_offset + rel->r_offset; | |
12847 | outrel.r_addend = 0; | |
cc850f74 | 12848 | if (bfd_link_pic (info)) |
e8b09b87 CL |
12849 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
12850 | else | |
cc850f74 | 12851 | arm_elf_add_rofixup (output_bfd, globals->srofixup, outrel.r_offset); |
e8b09b87 CL |
12852 | |
12853 | bfd_put_32 (input_bfd, sgot->output_section->vma | |
12854 | + sgot->output_offset + offset, hit_data); | |
12855 | ||
12856 | /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */ | |
cc850f74 NC |
12857 | arm_elf_fill_funcdesc (output_bfd, info, |
12858 | &eh->fdpic_cnts.funcdesc_offset, | |
12859 | dynindx, offset, addr, dynreloc_value, seg); | |
e8b09b87 CL |
12860 | } |
12861 | else | |
12862 | { | |
12863 | Elf_Internal_Rela outrel; | |
12864 | ||
12865 | /* Add a dynamic relocation. */ | |
12866 | outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC); | |
12867 | outrel.r_offset = input_section->output_section->vma | |
12868 | + input_section->output_offset + rel->r_offset; | |
12869 | outrel.r_addend = 0; | |
12870 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); | |
12871 | } | |
12872 | } | |
12873 | } | |
0a1b45a2 | 12874 | *unresolved_reloc_p = false; |
e8b09b87 CL |
12875 | return bfd_reloc_ok; |
12876 | ||
e5d6e09e AV |
12877 | case R_ARM_THM_BF16: |
12878 | { | |
12879 | bfd_vma relocation; | |
12880 | bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data); | |
12881 | bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2); | |
12882 | ||
12883 | if (globals->use_rel) | |
12884 | { | |
12885 | bfd_vma immA = (upper_insn & 0x001f); | |
12886 | bfd_vma immB = (lower_insn & 0x07fe) >> 1; | |
12887 | bfd_vma immC = (lower_insn & 0x0800) >> 11; | |
12888 | addend = (immA << 12); | |
12889 | addend |= (immB << 2); | |
12890 | addend |= (immC << 1); | |
12891 | addend |= 1; | |
12892 | /* Sign extend. */ | |
e6f65e75 | 12893 | signed_addend = (addend & 0x10000) ? addend - (1 << 17) : addend; |
e5d6e09e AV |
12894 | } |
12895 | ||
e6f65e75 | 12896 | relocation = value + signed_addend; |
e5d6e09e AV |
12897 | relocation -= (input_section->output_section->vma |
12898 | + input_section->output_offset | |
12899 | + rel->r_offset); | |
12900 | ||
12901 | /* Put RELOCATION back into the insn. */ | |
12902 | { | |
12903 | bfd_vma immA = (relocation & 0x0001f000) >> 12; | |
12904 | bfd_vma immB = (relocation & 0x00000ffc) >> 2; | |
12905 | bfd_vma immC = (relocation & 0x00000002) >> 1; | |
12906 | ||
12907 | upper_insn = (upper_insn & 0xffe0) | immA; | |
12908 | lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1); | |
12909 | } | |
12910 | ||
12911 | /* Put the relocated value back in the object file: */ | |
12912 | bfd_put_16 (input_bfd, upper_insn, hit_data); | |
12913 | bfd_put_16 (input_bfd, lower_insn, hit_data + 2); | |
12914 | ||
12915 | return bfd_reloc_ok; | |
12916 | } | |
12917 | ||
1889da70 AV |
12918 | case R_ARM_THM_BF12: |
12919 | { | |
12920 | bfd_vma relocation; | |
12921 | bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data); | |
12922 | bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2); | |
12923 | ||
12924 | if (globals->use_rel) | |
12925 | { | |
12926 | bfd_vma immA = (upper_insn & 0x0001); | |
12927 | bfd_vma immB = (lower_insn & 0x07fe) >> 1; | |
12928 | bfd_vma immC = (lower_insn & 0x0800) >> 11; | |
12929 | addend = (immA << 12); | |
12930 | addend |= (immB << 2); | |
12931 | addend |= (immC << 1); | |
12932 | addend |= 1; | |
12933 | /* Sign extend. */ | |
12934 | addend = (addend & 0x1000) ? addend - (1 << 13) : addend; | |
e6f65e75 | 12935 | signed_addend = addend; |
1889da70 AV |
12936 | } |
12937 | ||
e6f65e75 | 12938 | relocation = value + signed_addend; |
1889da70 AV |
12939 | relocation -= (input_section->output_section->vma |
12940 | + input_section->output_offset | |
12941 | + rel->r_offset); | |
12942 | ||
12943 | /* Put RELOCATION back into the insn. */ | |
12944 | { | |
12945 | bfd_vma immA = (relocation & 0x00001000) >> 12; | |
12946 | bfd_vma immB = (relocation & 0x00000ffc) >> 2; | |
12947 | bfd_vma immC = (relocation & 0x00000002) >> 1; | |
12948 | ||
12949 | upper_insn = (upper_insn & 0xfffe) | immA; | |
12950 | lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1); | |
12951 | } | |
12952 | ||
12953 | /* Put the relocated value back in the object file: */ | |
12954 | bfd_put_16 (input_bfd, upper_insn, hit_data); | |
12955 | bfd_put_16 (input_bfd, lower_insn, hit_data + 2); | |
12956 | ||
12957 | return bfd_reloc_ok; | |
12958 | } | |
12959 | ||
1caf72a5 AV |
12960 | case R_ARM_THM_BF18: |
12961 | { | |
12962 | bfd_vma relocation; | |
12963 | bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data); | |
12964 | bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2); | |
12965 | ||
12966 | if (globals->use_rel) | |
12967 | { | |
12968 | bfd_vma immA = (upper_insn & 0x007f); | |
12969 | bfd_vma immB = (lower_insn & 0x07fe) >> 1; | |
12970 | bfd_vma immC = (lower_insn & 0x0800) >> 11; | |
12971 | addend = (immA << 12); | |
12972 | addend |= (immB << 2); | |
12973 | addend |= (immC << 1); | |
12974 | addend |= 1; | |
12975 | /* Sign extend. */ | |
12976 | addend = (addend & 0x40000) ? addend - (1 << 19) : addend; | |
e6f65e75 | 12977 | signed_addend = addend; |
1caf72a5 AV |
12978 | } |
12979 | ||
e6f65e75 | 12980 | relocation = value + signed_addend; |
1caf72a5 AV |
12981 | relocation -= (input_section->output_section->vma |
12982 | + input_section->output_offset | |
12983 | + rel->r_offset); | |
12984 | ||
12985 | /* Put RELOCATION back into the insn. */ | |
12986 | { | |
12987 | bfd_vma immA = (relocation & 0x0007f000) >> 12; | |
12988 | bfd_vma immB = (relocation & 0x00000ffc) >> 2; | |
12989 | bfd_vma immC = (relocation & 0x00000002) >> 1; | |
12990 | ||
12991 | upper_insn = (upper_insn & 0xff80) | immA; | |
12992 | lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1); | |
12993 | } | |
12994 | ||
12995 | /* Put the relocated value back in the object file: */ | |
12996 | bfd_put_16 (input_bfd, upper_insn, hit_data); | |
12997 | bfd_put_16 (input_bfd, lower_insn, hit_data + 2); | |
12998 | ||
12999 | return bfd_reloc_ok; | |
13000 | } | |
13001 | ||
252b5132 RH |
13002 | default: |
13003 | return bfd_reloc_notsupported; | |
13004 | } | |
13005 | } | |
13006 | ||
98c1d4aa NC |
13007 | /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */ |
13008 | static void | |
07d6d2b8 AM |
13009 | arm_add_to_rel (bfd * abfd, |
13010 | bfd_byte * address, | |
57e8b36a | 13011 | reloc_howto_type * howto, |
07d6d2b8 | 13012 | bfd_signed_vma increment) |
98c1d4aa | 13013 | { |
98c1d4aa NC |
13014 | bfd_signed_vma addend; |
13015 | ||
bd97cb95 DJ |
13016 | if (howto->type == R_ARM_THM_CALL |
13017 | || howto->type == R_ARM_THM_JUMP24) | |
98c1d4aa | 13018 | { |
9a5aca8c AM |
13019 | int upper_insn, lower_insn; |
13020 | int upper, lower; | |
98c1d4aa | 13021 | |
9a5aca8c AM |
13022 | upper_insn = bfd_get_16 (abfd, address); |
13023 | lower_insn = bfd_get_16 (abfd, address + 2); | |
13024 | upper = upper_insn & 0x7ff; | |
13025 | lower = lower_insn & 0x7ff; | |
13026 | ||
13027 | addend = (upper << 12) | (lower << 1); | |
ddda4409 | 13028 | addend += increment; |
9a5aca8c | 13029 | addend >>= 1; |
98c1d4aa | 13030 | |
9a5aca8c AM |
13031 | upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff); |
13032 | lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff); | |
13033 | ||
dc810e39 AM |
13034 | bfd_put_16 (abfd, (bfd_vma) upper_insn, address); |
13035 | bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2); | |
9a5aca8c AM |
13036 | } |
13037 | else | |
13038 | { | |
07d6d2b8 | 13039 | bfd_vma contents; |
9a5aca8c AM |
13040 | |
13041 | contents = bfd_get_32 (abfd, address); | |
13042 | ||
13043 | /* Get the (signed) value from the instruction. */ | |
13044 | addend = contents & howto->src_mask; | |
13045 | if (addend & ((howto->src_mask + 1) >> 1)) | |
13046 | { | |
13047 | bfd_signed_vma mask; | |
13048 | ||
13049 | mask = -1; | |
13050 | mask &= ~ howto->src_mask; | |
13051 | addend |= mask; | |
13052 | } | |
13053 | ||
13054 | /* Add in the increment, (which is a byte value). */ | |
13055 | switch (howto->type) | |
13056 | { | |
13057 | default: | |
13058 | addend += increment; | |
13059 | break; | |
13060 | ||
13061 | case R_ARM_PC24: | |
c6596c5e | 13062 | case R_ARM_PLT32: |
5b5bb741 PB |
13063 | case R_ARM_CALL: |
13064 | case R_ARM_JUMP24: | |
57698478 | 13065 | addend *= bfd_get_reloc_size (howto); |
dc810e39 | 13066 | addend += increment; |
9a5aca8c AM |
13067 | |
13068 | /* Should we check for overflow here ? */ | |
13069 | ||
13070 | /* Drop any undesired bits. */ | |
13071 | addend >>= howto->rightshift; | |
13072 | break; | |
13073 | } | |
13074 | ||
13075 | contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask); | |
13076 | ||
13077 | bfd_put_32 (abfd, contents, address); | |
ddda4409 | 13078 | } |
98c1d4aa | 13079 | } |
252b5132 | 13080 | |
ba93b8ac DJ |
13081 | #define IS_ARM_TLS_RELOC(R_TYPE) \ |
13082 | ((R_TYPE) == R_ARM_TLS_GD32 \ | |
5c5a4843 | 13083 | || (R_TYPE) == R_ARM_TLS_GD32_FDPIC \ |
ba93b8ac DJ |
13084 | || (R_TYPE) == R_ARM_TLS_LDO32 \ |
13085 | || (R_TYPE) == R_ARM_TLS_LDM32 \ | |
5c5a4843 | 13086 | || (R_TYPE) == R_ARM_TLS_LDM32_FDPIC \ |
ba93b8ac DJ |
13087 | || (R_TYPE) == R_ARM_TLS_DTPOFF32 \ |
13088 | || (R_TYPE) == R_ARM_TLS_DTPMOD32 \ | |
13089 | || (R_TYPE) == R_ARM_TLS_TPOFF32 \ | |
13090 | || (R_TYPE) == R_ARM_TLS_LE32 \ | |
0855e32b | 13091 | || (R_TYPE) == R_ARM_TLS_IE32 \ |
5c5a4843 | 13092 | || (R_TYPE) == R_ARM_TLS_IE32_FDPIC \ |
0855e32b NS |
13093 | || IS_ARM_TLS_GNU_RELOC (R_TYPE)) |
13094 | ||
13095 | /* Specific set of relocations for the gnu tls dialect. */ | |
13096 | #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \ | |
13097 | ((R_TYPE) == R_ARM_TLS_GOTDESC \ | |
13098 | || (R_TYPE) == R_ARM_TLS_CALL \ | |
13099 | || (R_TYPE) == R_ARM_THM_TLS_CALL \ | |
13100 | || (R_TYPE) == R_ARM_TLS_DESCSEQ \ | |
13101 | || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ) | |
ba93b8ac | 13102 | |
252b5132 | 13103 | /* Relocate an ARM ELF section. */ |
906e58ca | 13104 | |
0f684201 | 13105 | static int |
07d6d2b8 | 13106 | elf32_arm_relocate_section (bfd * output_bfd, |
57e8b36a | 13107 | struct bfd_link_info * info, |
07d6d2b8 AM |
13108 | bfd * input_bfd, |
13109 | asection * input_section, | |
13110 | bfd_byte * contents, | |
13111 | Elf_Internal_Rela * relocs, | |
13112 | Elf_Internal_Sym * local_syms, | |
13113 | asection ** local_sections) | |
252b5132 | 13114 | { |
b34976b6 AM |
13115 | Elf_Internal_Shdr *symtab_hdr; |
13116 | struct elf_link_hash_entry **sym_hashes; | |
13117 | Elf_Internal_Rela *rel; | |
13118 | Elf_Internal_Rela *relend; | |
13119 | const char *name; | |
b32d3aa2 | 13120 | struct elf32_arm_link_hash_table * globals; |
252b5132 | 13121 | |
4e7fd91e | 13122 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 | 13123 | if (globals == NULL) |
0a1b45a2 | 13124 | return false; |
b491616a | 13125 | |
0ffa91dd | 13126 | symtab_hdr = & elf_symtab_hdr (input_bfd); |
252b5132 RH |
13127 | sym_hashes = elf_sym_hashes (input_bfd); |
13128 | ||
13129 | rel = relocs; | |
13130 | relend = relocs + input_section->reloc_count; | |
13131 | for (; rel < relend; rel++) | |
13132 | { | |
07d6d2b8 AM |
13133 | int r_type; |
13134 | reloc_howto_type * howto; | |
13135 | unsigned long r_symndx; | |
13136 | Elf_Internal_Sym * sym; | |
13137 | asection * sec; | |
252b5132 | 13138 | struct elf_link_hash_entry * h; |
07d6d2b8 AM |
13139 | bfd_vma relocation; |
13140 | bfd_reloc_status_type r; | |
13141 | arelent bfd_reloc; | |
13142 | char sym_type; | |
0a1b45a2 | 13143 | bool unresolved_reloc = false; |
f2a9dd69 | 13144 | char *error_message = NULL; |
f21f3fe0 | 13145 | |
252b5132 | 13146 | r_symndx = ELF32_R_SYM (rel->r_info); |
ba96a88f | 13147 | r_type = ELF32_R_TYPE (rel->r_info); |
b32d3aa2 | 13148 | r_type = arm_real_reloc_type (globals, r_type); |
252b5132 | 13149 | |
ba96a88f | 13150 | if ( r_type == R_ARM_GNU_VTENTRY |
99059e56 RM |
13151 | || r_type == R_ARM_GNU_VTINHERIT) |
13152 | continue; | |
252b5132 | 13153 | |
47aeb64c NC |
13154 | howto = bfd_reloc.howto = elf32_arm_howto_from_type (r_type); |
13155 | ||
13156 | if (howto == NULL) | |
13157 | return _bfd_unrecognized_reloc (input_bfd, input_section, r_type); | |
252b5132 | 13158 | |
252b5132 RH |
13159 | h = NULL; |
13160 | sym = NULL; | |
13161 | sec = NULL; | |
9b485d32 | 13162 | |
252b5132 RH |
13163 | if (r_symndx < symtab_hdr->sh_info) |
13164 | { | |
13165 | sym = local_syms + r_symndx; | |
ba93b8ac | 13166 | sym_type = ELF32_ST_TYPE (sym->st_info); |
252b5132 | 13167 | sec = local_sections[r_symndx]; |
ffcb4889 NS |
13168 | |
13169 | /* An object file might have a reference to a local | |
13170 | undefined symbol. This is a daft object file, but we | |
13171 | should at least do something about it. V4BX & NONE | |
13172 | relocations do not use the symbol and are explicitly | |
77b4f08f TS |
13173 | allowed to use the undefined symbol, so allow those. |
13174 | Likewise for relocations against STN_UNDEF. */ | |
ffcb4889 NS |
13175 | if (r_type != R_ARM_V4BX |
13176 | && r_type != R_ARM_NONE | |
77b4f08f | 13177 | && r_symndx != STN_UNDEF |
ffcb4889 NS |
13178 | && bfd_is_und_section (sec) |
13179 | && ELF_ST_BIND (sym->st_info) != STB_WEAK) | |
1a72702b AM |
13180 | (*info->callbacks->undefined_symbol) |
13181 | (info, bfd_elf_string_from_elf_section | |
13182 | (input_bfd, symtab_hdr->sh_link, sym->st_name), | |
13183 | input_bfd, input_section, | |
0a1b45a2 | 13184 | rel->r_offset, true); |
b38cadfb | 13185 | |
4e7fd91e | 13186 | if (globals->use_rel) |
f8df10f4 | 13187 | { |
4e7fd91e PB |
13188 | relocation = (sec->output_section->vma |
13189 | + sec->output_offset | |
13190 | + sym->st_value); | |
0e1862bb | 13191 | if (!bfd_link_relocatable (info) |
ab96bf03 AM |
13192 | && (sec->flags & SEC_MERGE) |
13193 | && ELF_ST_TYPE (sym->st_info) == STT_SECTION) | |
f8df10f4 | 13194 | { |
4e7fd91e PB |
13195 | asection *msec; |
13196 | bfd_vma addend, value; | |
13197 | ||
39623e12 | 13198 | switch (r_type) |
4e7fd91e | 13199 | { |
39623e12 PB |
13200 | case R_ARM_MOVW_ABS_NC: |
13201 | case R_ARM_MOVT_ABS: | |
13202 | value = bfd_get_32 (input_bfd, contents + rel->r_offset); | |
13203 | addend = ((value & 0xf0000) >> 4) | (value & 0xfff); | |
13204 | addend = (addend ^ 0x8000) - 0x8000; | |
13205 | break; | |
f8df10f4 | 13206 | |
39623e12 PB |
13207 | case R_ARM_THM_MOVW_ABS_NC: |
13208 | case R_ARM_THM_MOVT_ABS: | |
13209 | value = bfd_get_16 (input_bfd, contents + rel->r_offset) | |
13210 | << 16; | |
13211 | value |= bfd_get_16 (input_bfd, | |
13212 | contents + rel->r_offset + 2); | |
13213 | addend = ((value & 0xf7000) >> 4) | (value & 0xff) | |
13214 | | ((value & 0x04000000) >> 15); | |
13215 | addend = (addend ^ 0x8000) - 0x8000; | |
13216 | break; | |
f8df10f4 | 13217 | |
39623e12 PB |
13218 | default: |
13219 | if (howto->rightshift | |
13220 | || (howto->src_mask & (howto->src_mask + 1))) | |
13221 | { | |
4eca0228 | 13222 | _bfd_error_handler |
695344c0 | 13223 | /* xgettext:c-format */ |
2dcf00ce AM |
13224 | (_("%pB(%pA+%#" PRIx64 "): " |
13225 | "%s relocation against SEC_MERGE section"), | |
39623e12 | 13226 | input_bfd, input_section, |
2dcf00ce | 13227 | (uint64_t) rel->r_offset, howto->name); |
0a1b45a2 | 13228 | return false; |
39623e12 PB |
13229 | } |
13230 | ||
13231 | value = bfd_get_32 (input_bfd, contents + rel->r_offset); | |
13232 | ||
13233 | /* Get the (signed) value from the instruction. */ | |
13234 | addend = value & howto->src_mask; | |
13235 | if (addend & ((howto->src_mask + 1) >> 1)) | |
13236 | { | |
13237 | bfd_signed_vma mask; | |
13238 | ||
13239 | mask = -1; | |
13240 | mask &= ~ howto->src_mask; | |
13241 | addend |= mask; | |
13242 | } | |
13243 | break; | |
4e7fd91e | 13244 | } |
39623e12 | 13245 | |
4e7fd91e PB |
13246 | msec = sec; |
13247 | addend = | |
13248 | _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend) | |
13249 | - relocation; | |
13250 | addend += msec->output_section->vma + msec->output_offset; | |
39623e12 | 13251 | |
cc643b88 | 13252 | /* Cases here must match those in the preceding |
39623e12 PB |
13253 | switch statement. */ |
13254 | switch (r_type) | |
13255 | { | |
13256 | case R_ARM_MOVW_ABS_NC: | |
13257 | case R_ARM_MOVT_ABS: | |
13258 | value = (value & 0xfff0f000) | ((addend & 0xf000) << 4) | |
13259 | | (addend & 0xfff); | |
13260 | bfd_put_32 (input_bfd, value, contents + rel->r_offset); | |
13261 | break; | |
13262 | ||
13263 | case R_ARM_THM_MOVW_ABS_NC: | |
13264 | case R_ARM_THM_MOVT_ABS: | |
13265 | value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4) | |
13266 | | (addend & 0xff) | ((addend & 0x0800) << 15); | |
13267 | bfd_put_16 (input_bfd, value >> 16, | |
13268 | contents + rel->r_offset); | |
13269 | bfd_put_16 (input_bfd, value, | |
13270 | contents + rel->r_offset + 2); | |
13271 | break; | |
13272 | ||
13273 | default: | |
13274 | value = (value & ~ howto->dst_mask) | |
13275 | | (addend & howto->dst_mask); | |
13276 | bfd_put_32 (input_bfd, value, contents + rel->r_offset); | |
13277 | break; | |
13278 | } | |
f8df10f4 | 13279 | } |
f8df10f4 | 13280 | } |
4e7fd91e PB |
13281 | else |
13282 | relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel); | |
252b5132 RH |
13283 | } |
13284 | else | |
13285 | { | |
0a1b45a2 | 13286 | bool warned, ignored; |
560e09e9 | 13287 | |
b2a8e766 AM |
13288 | RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, |
13289 | r_symndx, symtab_hdr, sym_hashes, | |
13290 | h, sec, relocation, | |
62d887d4 | 13291 | unresolved_reloc, warned, ignored); |
ba93b8ac DJ |
13292 | |
13293 | sym_type = h->type; | |
252b5132 RH |
13294 | } |
13295 | ||
dbaa2011 | 13296 | if (sec != NULL && discarded_section (sec)) |
e4067dbb | 13297 | RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, |
545fd46b | 13298 | rel, 1, relend, howto, 0, contents); |
ab96bf03 | 13299 | |
0e1862bb | 13300 | if (bfd_link_relocatable (info)) |
ab96bf03 AM |
13301 | { |
13302 | /* This is a relocatable link. We don't have to change | |
13303 | anything, unless the reloc is against a section symbol, | |
13304 | in which case we have to adjust according to where the | |
13305 | section symbol winds up in the output section. */ | |
13306 | if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION) | |
13307 | { | |
13308 | if (globals->use_rel) | |
13309 | arm_add_to_rel (input_bfd, contents + rel->r_offset, | |
13310 | howto, (bfd_signed_vma) sec->output_offset); | |
13311 | else | |
13312 | rel->r_addend += sec->output_offset; | |
13313 | } | |
13314 | continue; | |
13315 | } | |
13316 | ||
252b5132 RH |
13317 | if (h != NULL) |
13318 | name = h->root.root.string; | |
13319 | else | |
13320 | { | |
13321 | name = (bfd_elf_string_from_elf_section | |
13322 | (input_bfd, symtab_hdr->sh_link, sym->st_name)); | |
13323 | if (name == NULL || *name == '\0') | |
fd361982 | 13324 | name = bfd_section_name (sec); |
252b5132 | 13325 | } |
f21f3fe0 | 13326 | |
cf35638d | 13327 | if (r_symndx != STN_UNDEF |
ba93b8ac DJ |
13328 | && r_type != R_ARM_NONE |
13329 | && (h == NULL | |
13330 | || h->root.type == bfd_link_hash_defined | |
13331 | || h->root.type == bfd_link_hash_defweak) | |
13332 | && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS)) | |
13333 | { | |
4eca0228 | 13334 | _bfd_error_handler |
ba93b8ac | 13335 | ((sym_type == STT_TLS |
695344c0 | 13336 | /* xgettext:c-format */ |
2dcf00ce | 13337 | ? _("%pB(%pA+%#" PRIx64 "): %s used with TLS symbol %s") |
695344c0 | 13338 | /* xgettext:c-format */ |
2dcf00ce | 13339 | : _("%pB(%pA+%#" PRIx64 "): %s used with non-TLS symbol %s")), |
ba93b8ac DJ |
13340 | input_bfd, |
13341 | input_section, | |
2dcf00ce | 13342 | (uint64_t) rel->r_offset, |
ba93b8ac DJ |
13343 | howto->name, |
13344 | name); | |
13345 | } | |
13346 | ||
0855e32b | 13347 | /* We call elf32_arm_final_link_relocate unless we're completely |
99059e56 RM |
13348 | done, i.e., the relaxation produced the final output we want, |
13349 | and we won't let anybody mess with it. Also, we have to do | |
13350 | addend adjustments in case of a R_ARM_TLS_GOTDESC relocation | |
6a631e86 | 13351 | both in relaxed and non-relaxed cases. */ |
39d911fc TP |
13352 | if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type) |
13353 | || (IS_ARM_TLS_GNU_RELOC (r_type) | |
13354 | && !((h ? elf32_arm_hash_entry (h)->tls_type : | |
13355 | elf32_arm_local_got_tls_type (input_bfd)[r_symndx]) | |
13356 | & GOT_TLS_GDESC))) | |
13357 | { | |
13358 | r = elf32_arm_tls_relax (globals, input_bfd, input_section, | |
13359 | contents, rel, h == NULL); | |
13360 | /* This may have been marked unresolved because it came from | |
13361 | a shared library. But we've just dealt with that. */ | |
13362 | unresolved_reloc = 0; | |
13363 | } | |
13364 | else | |
13365 | r = bfd_reloc_continue; | |
b38cadfb | 13366 | |
39d911fc TP |
13367 | if (r == bfd_reloc_continue) |
13368 | { | |
13369 | unsigned char branch_type = | |
13370 | h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal) | |
13371 | : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal); | |
13372 | ||
13373 | r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd, | |
13374 | input_section, contents, rel, | |
13375 | relocation, info, sec, name, | |
13376 | sym_type, branch_type, h, | |
13377 | &unresolved_reloc, | |
13378 | &error_message); | |
13379 | } | |
0945cdfd DJ |
13380 | |
13381 | /* Dynamic relocs are not propagated for SEC_DEBUGGING sections | |
13382 | because such sections are not SEC_ALLOC and thus ld.so will | |
13383 | not process them. */ | |
13384 | if (unresolved_reloc | |
99059e56 RM |
13385 | && !((input_section->flags & SEC_DEBUGGING) != 0 |
13386 | && h->def_dynamic) | |
1d5316ab AM |
13387 | && _bfd_elf_section_offset (output_bfd, info, input_section, |
13388 | rel->r_offset) != (bfd_vma) -1) | |
0945cdfd | 13389 | { |
4eca0228 | 13390 | _bfd_error_handler |
695344c0 | 13391 | /* xgettext:c-format */ |
2dcf00ce AM |
13392 | (_("%pB(%pA+%#" PRIx64 "): " |
13393 | "unresolvable %s relocation against symbol `%s'"), | |
843fe662 L |
13394 | input_bfd, |
13395 | input_section, | |
2dcf00ce | 13396 | (uint64_t) rel->r_offset, |
843fe662 L |
13397 | howto->name, |
13398 | h->root.root.string); | |
0a1b45a2 | 13399 | return false; |
0945cdfd | 13400 | } |
252b5132 RH |
13401 | |
13402 | if (r != bfd_reloc_ok) | |
13403 | { | |
252b5132 RH |
13404 | switch (r) |
13405 | { | |
13406 | case bfd_reloc_overflow: | |
cf919dfd PB |
13407 | /* If the overflowing reloc was to an undefined symbol, |
13408 | we have already printed one error message and there | |
13409 | is no point complaining again. */ | |
1a72702b AM |
13410 | if (!h || h->root.type != bfd_link_hash_undefined) |
13411 | (*info->callbacks->reloc_overflow) | |
13412 | (info, (h ? &h->root : NULL), name, howto->name, | |
13413 | (bfd_vma) 0, input_bfd, input_section, rel->r_offset); | |
252b5132 RH |
13414 | break; |
13415 | ||
13416 | case bfd_reloc_undefined: | |
1a72702b | 13417 | (*info->callbacks->undefined_symbol) |
0a1b45a2 | 13418 | (info, name, input_bfd, input_section, rel->r_offset, true); |
252b5132 RH |
13419 | break; |
13420 | ||
13421 | case bfd_reloc_outofrange: | |
f2a9dd69 | 13422 | error_message = _("out of range"); |
252b5132 RH |
13423 | goto common_error; |
13424 | ||
13425 | case bfd_reloc_notsupported: | |
f2a9dd69 | 13426 | error_message = _("unsupported relocation"); |
252b5132 RH |
13427 | goto common_error; |
13428 | ||
13429 | case bfd_reloc_dangerous: | |
f2a9dd69 | 13430 | /* error_message should already be set. */ |
252b5132 RH |
13431 | goto common_error; |
13432 | ||
13433 | default: | |
f2a9dd69 | 13434 | error_message = _("unknown error"); |
8029a119 | 13435 | /* Fall through. */ |
252b5132 RH |
13436 | |
13437 | common_error: | |
f2a9dd69 | 13438 | BFD_ASSERT (error_message != NULL); |
1a72702b AM |
13439 | (*info->callbacks->reloc_dangerous) |
13440 | (info, error_message, input_bfd, input_section, rel->r_offset); | |
252b5132 RH |
13441 | break; |
13442 | } | |
13443 | } | |
13444 | } | |
13445 | ||
0a1b45a2 | 13446 | return true; |
252b5132 RH |
13447 | } |
13448 | ||
91d6fa6a | 13449 | /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero, |
2468f9c9 | 13450 | adds the edit to the start of the list. (The list must be built in order of |
91d6fa6a | 13451 | ascending TINDEX: the function's callers are primarily responsible for |
2468f9c9 PB |
13452 | maintaining that condition). */ |
13453 | ||
13454 | static void | |
13455 | add_unwind_table_edit (arm_unwind_table_edit **head, | |
13456 | arm_unwind_table_edit **tail, | |
13457 | arm_unwind_edit_type type, | |
13458 | asection *linked_section, | |
91d6fa6a | 13459 | unsigned int tindex) |
2468f9c9 | 13460 | { |
21d799b5 NC |
13461 | arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *) |
13462 | xmalloc (sizeof (arm_unwind_table_edit)); | |
b38cadfb | 13463 | |
2468f9c9 PB |
13464 | new_edit->type = type; |
13465 | new_edit->linked_section = linked_section; | |
91d6fa6a | 13466 | new_edit->index = tindex; |
b38cadfb | 13467 | |
91d6fa6a | 13468 | if (tindex > 0) |
2468f9c9 PB |
13469 | { |
13470 | new_edit->next = NULL; | |
13471 | ||
13472 | if (*tail) | |
13473 | (*tail)->next = new_edit; | |
13474 | ||
13475 | (*tail) = new_edit; | |
13476 | ||
13477 | if (!*head) | |
13478 | (*head) = new_edit; | |
13479 | } | |
13480 | else | |
13481 | { | |
13482 | new_edit->next = *head; | |
13483 | ||
13484 | if (!*tail) | |
13485 | *tail = new_edit; | |
13486 | ||
13487 | *head = new_edit; | |
13488 | } | |
13489 | } | |
13490 | ||
13491 | static _arm_elf_section_data *get_arm_elf_section_data (asection *); | |
13492 | ||
13493 | /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */ | |
cc850f74 | 13494 | |
2468f9c9 | 13495 | static void |
cc850f74 | 13496 | adjust_exidx_size (asection *exidx_sec, int adjust) |
2468f9c9 PB |
13497 | { |
13498 | asection *out_sec; | |
13499 | ||
13500 | if (!exidx_sec->rawsize) | |
13501 | exidx_sec->rawsize = exidx_sec->size; | |
13502 | ||
fd361982 | 13503 | bfd_set_section_size (exidx_sec, exidx_sec->size + adjust); |
2468f9c9 PB |
13504 | out_sec = exidx_sec->output_section; |
13505 | /* Adjust size of output section. */ | |
cc850f74 | 13506 | bfd_set_section_size (out_sec, out_sec->size + adjust); |
2468f9c9 PB |
13507 | } |
13508 | ||
13509 | /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */ | |
cc850f74 | 13510 | |
2468f9c9 | 13511 | static void |
cc850f74 | 13512 | insert_cantunwind_after (asection *text_sec, asection *exidx_sec) |
2468f9c9 PB |
13513 | { |
13514 | struct _arm_elf_section_data *exidx_arm_data; | |
13515 | ||
13516 | exidx_arm_data = get_arm_elf_section_data (exidx_sec); | |
cc850f74 NC |
13517 | add_unwind_table_edit |
13518 | (&exidx_arm_data->u.exidx.unwind_edit_list, | |
13519 | &exidx_arm_data->u.exidx.unwind_edit_tail, | |
13520 | INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX); | |
2468f9c9 | 13521 | |
491d01d3 YU |
13522 | exidx_arm_data->additional_reloc_count++; |
13523 | ||
cc850f74 | 13524 | adjust_exidx_size (exidx_sec, 8); |
2468f9c9 PB |
13525 | } |
13526 | ||
13527 | /* Scan .ARM.exidx tables, and create a list describing edits which should be | |
13528 | made to those tables, such that: | |
b38cadfb | 13529 | |
2468f9c9 PB |
13530 | 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries. |
13531 | 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind | |
99059e56 | 13532 | codes which have been inlined into the index). |
2468f9c9 | 13533 | |
85fdf906 AH |
13534 | If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged. |
13535 | ||
2468f9c9 | 13536 | The edits are applied when the tables are written |
b38cadfb | 13537 | (in elf32_arm_write_section). */ |
2468f9c9 | 13538 | |
0a1b45a2 | 13539 | bool |
2468f9c9 PB |
13540 | elf32_arm_fix_exidx_coverage (asection **text_section_order, |
13541 | unsigned int num_text_sections, | |
85fdf906 | 13542 | struct bfd_link_info *info, |
0a1b45a2 | 13543 | bool merge_exidx_entries) |
2468f9c9 PB |
13544 | { |
13545 | bfd *inp; | |
13546 | unsigned int last_second_word = 0, i; | |
13547 | asection *last_exidx_sec = NULL; | |
13548 | asection *last_text_sec = NULL; | |
13549 | int last_unwind_type = -1; | |
13550 | ||
13551 | /* Walk over all EXIDX sections, and create backlinks from the corrsponding | |
13552 | text sections. */ | |
c72f2fb2 | 13553 | for (inp = info->input_bfds; inp != NULL; inp = inp->link.next) |
2468f9c9 PB |
13554 | { |
13555 | asection *sec; | |
b38cadfb | 13556 | |
2468f9c9 | 13557 | for (sec = inp->sections; sec != NULL; sec = sec->next) |
99059e56 | 13558 | { |
2468f9c9 PB |
13559 | struct bfd_elf_section_data *elf_sec = elf_section_data (sec); |
13560 | Elf_Internal_Shdr *hdr = &elf_sec->this_hdr; | |
b38cadfb | 13561 | |
dec9d5df | 13562 | if (!hdr || hdr->sh_type != SHT_ARM_EXIDX) |
2468f9c9 | 13563 | continue; |
b38cadfb | 13564 | |
2468f9c9 PB |
13565 | if (elf_sec->linked_to) |
13566 | { | |
13567 | Elf_Internal_Shdr *linked_hdr | |
99059e56 | 13568 | = &elf_section_data (elf_sec->linked_to)->this_hdr; |
2468f9c9 | 13569 | struct _arm_elf_section_data *linked_sec_arm_data |
99059e56 | 13570 | = get_arm_elf_section_data (linked_hdr->bfd_section); |
2468f9c9 PB |
13571 | |
13572 | if (linked_sec_arm_data == NULL) | |
99059e56 | 13573 | continue; |
2468f9c9 PB |
13574 | |
13575 | /* Link this .ARM.exidx section back from the text section it | |
99059e56 | 13576 | describes. */ |
2468f9c9 PB |
13577 | linked_sec_arm_data->u.text.arm_exidx_sec = sec; |
13578 | } | |
13579 | } | |
13580 | } | |
13581 | ||
13582 | /* Walk all text sections in order of increasing VMA. Eilminate duplicate | |
13583 | index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes), | |
91d6fa6a | 13584 | and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */ |
2468f9c9 PB |
13585 | |
13586 | for (i = 0; i < num_text_sections; i++) | |
13587 | { | |
13588 | asection *sec = text_section_order[i]; | |
13589 | asection *exidx_sec; | |
13590 | struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec); | |
13591 | struct _arm_elf_section_data *exidx_arm_data; | |
13592 | bfd_byte *contents = NULL; | |
13593 | int deleted_exidx_bytes = 0; | |
13594 | bfd_vma j; | |
13595 | arm_unwind_table_edit *unwind_edit_head = NULL; | |
13596 | arm_unwind_table_edit *unwind_edit_tail = NULL; | |
13597 | Elf_Internal_Shdr *hdr; | |
13598 | bfd *ibfd; | |
13599 | ||
13600 | if (arm_data == NULL) | |
99059e56 | 13601 | continue; |
2468f9c9 PB |
13602 | |
13603 | exidx_sec = arm_data->u.text.arm_exidx_sec; | |
13604 | if (exidx_sec == NULL) | |
13605 | { | |
13606 | /* Section has no unwind data. */ | |
13607 | if (last_unwind_type == 0 || !last_exidx_sec) | |
13608 | continue; | |
13609 | ||
13610 | /* Ignore zero sized sections. */ | |
13611 | if (sec->size == 0) | |
13612 | continue; | |
13613 | ||
cc850f74 | 13614 | insert_cantunwind_after (last_text_sec, last_exidx_sec); |
2468f9c9 PB |
13615 | last_unwind_type = 0; |
13616 | continue; | |
13617 | } | |
13618 | ||
22a8f80e PB |
13619 | /* Skip /DISCARD/ sections. */ |
13620 | if (bfd_is_abs_section (exidx_sec->output_section)) | |
13621 | continue; | |
13622 | ||
2468f9c9 PB |
13623 | hdr = &elf_section_data (exidx_sec)->this_hdr; |
13624 | if (hdr->sh_type != SHT_ARM_EXIDX) | |
99059e56 | 13625 | continue; |
b38cadfb | 13626 | |
2468f9c9 PB |
13627 | exidx_arm_data = get_arm_elf_section_data (exidx_sec); |
13628 | if (exidx_arm_data == NULL) | |
99059e56 | 13629 | continue; |
b38cadfb | 13630 | |
2468f9c9 | 13631 | ibfd = exidx_sec->owner; |
b38cadfb | 13632 | |
2468f9c9 PB |
13633 | if (hdr->contents != NULL) |
13634 | contents = hdr->contents; | |
13635 | else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents)) | |
13636 | /* An error? */ | |
13637 | continue; | |
13638 | ||
ac06903d YU |
13639 | if (last_unwind_type > 0) |
13640 | { | |
13641 | unsigned int first_word = bfd_get_32 (ibfd, contents); | |
13642 | /* Add cantunwind if first unwind item does not match section | |
13643 | start. */ | |
13644 | if (first_word != sec->vma) | |
13645 | { | |
13646 | insert_cantunwind_after (last_text_sec, last_exidx_sec); | |
13647 | last_unwind_type = 0; | |
13648 | } | |
13649 | } | |
13650 | ||
2468f9c9 PB |
13651 | for (j = 0; j < hdr->sh_size; j += 8) |
13652 | { | |
13653 | unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4); | |
13654 | int unwind_type; | |
13655 | int elide = 0; | |
13656 | ||
13657 | /* An EXIDX_CANTUNWIND entry. */ | |
13658 | if (second_word == 1) | |
13659 | { | |
13660 | if (last_unwind_type == 0) | |
13661 | elide = 1; | |
13662 | unwind_type = 0; | |
13663 | } | |
13664 | /* Inlined unwinding data. Merge if equal to previous. */ | |
13665 | else if ((second_word & 0x80000000) != 0) | |
13666 | { | |
85fdf906 AH |
13667 | if (merge_exidx_entries |
13668 | && last_second_word == second_word && last_unwind_type == 1) | |
2468f9c9 PB |
13669 | elide = 1; |
13670 | unwind_type = 1; | |
13671 | last_second_word = second_word; | |
13672 | } | |
13673 | /* Normal table entry. In theory we could merge these too, | |
13674 | but duplicate entries are likely to be much less common. */ | |
13675 | else | |
13676 | unwind_type = 2; | |
13677 | ||
491d01d3 | 13678 | if (elide && !bfd_link_relocatable (info)) |
2468f9c9 PB |
13679 | { |
13680 | add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail, | |
13681 | DELETE_EXIDX_ENTRY, NULL, j / 8); | |
13682 | ||
13683 | deleted_exidx_bytes += 8; | |
13684 | } | |
13685 | ||
13686 | last_unwind_type = unwind_type; | |
13687 | } | |
13688 | ||
13689 | /* Free contents if we allocated it ourselves. */ | |
13690 | if (contents != hdr->contents) | |
99059e56 | 13691 | free (contents); |
2468f9c9 PB |
13692 | |
13693 | /* Record edits to be applied later (in elf32_arm_write_section). */ | |
13694 | exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head; | |
13695 | exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail; | |
b38cadfb | 13696 | |
2468f9c9 | 13697 | if (deleted_exidx_bytes > 0) |
cc850f74 | 13698 | adjust_exidx_size (exidx_sec, - deleted_exidx_bytes); |
2468f9c9 PB |
13699 | |
13700 | last_exidx_sec = exidx_sec; | |
13701 | last_text_sec = sec; | |
13702 | } | |
13703 | ||
13704 | /* Add terminating CANTUNWIND entry. */ | |
491d01d3 YU |
13705 | if (!bfd_link_relocatable (info) && last_exidx_sec |
13706 | && last_unwind_type != 0) | |
cc850f74 | 13707 | insert_cantunwind_after (last_text_sec, last_exidx_sec); |
2468f9c9 | 13708 | |
0a1b45a2 | 13709 | return true; |
2468f9c9 PB |
13710 | } |
13711 | ||
0a1b45a2 | 13712 | static bool |
3e6b1042 DJ |
13713 | elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd, |
13714 | bfd *ibfd, const char *name) | |
13715 | { | |
13716 | asection *sec, *osec; | |
13717 | ||
3d4d4302 | 13718 | sec = bfd_get_linker_section (ibfd, name); |
3e6b1042 | 13719 | if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0) |
0a1b45a2 | 13720 | return true; |
3e6b1042 DJ |
13721 | |
13722 | osec = sec->output_section; | |
13723 | if (elf32_arm_write_section (obfd, info, sec, sec->contents)) | |
0a1b45a2 | 13724 | return true; |
3e6b1042 DJ |
13725 | |
13726 | if (! bfd_set_section_contents (obfd, osec, sec->contents, | |
13727 | sec->output_offset, sec->size)) | |
0a1b45a2 | 13728 | return false; |
3e6b1042 | 13729 | |
0a1b45a2 | 13730 | return true; |
3e6b1042 DJ |
13731 | } |
13732 | ||
0a1b45a2 | 13733 | static bool |
3e6b1042 DJ |
13734 | elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info) |
13735 | { | |
13736 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info); | |
fe33d2fa | 13737 | asection *sec, *osec; |
3e6b1042 | 13738 | |
4dfe6ac6 | 13739 | if (globals == NULL) |
0a1b45a2 | 13740 | return false; |
4dfe6ac6 | 13741 | |
3e6b1042 DJ |
13742 | /* Invoke the regular ELF backend linker to do all the work. */ |
13743 | if (!bfd_elf_final_link (abfd, info)) | |
0a1b45a2 | 13744 | return false; |
3e6b1042 | 13745 | |
fe33d2fa CL |
13746 | /* Process stub sections (eg BE8 encoding, ...). */ |
13747 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); | |
7292b3ac | 13748 | unsigned int i; |
cdb21a0a NS |
13749 | for (i=0; i<htab->top_id; i++) |
13750 | { | |
13751 | sec = htab->stub_group[i].stub_sec; | |
13752 | /* Only process it once, in its link_sec slot. */ | |
13753 | if (sec && i == htab->stub_group[i].link_sec->id) | |
13754 | { | |
13755 | osec = sec->output_section; | |
13756 | elf32_arm_write_section (abfd, info, sec, sec->contents); | |
13757 | if (! bfd_set_section_contents (abfd, osec, sec->contents, | |
13758 | sec->output_offset, sec->size)) | |
0a1b45a2 | 13759 | return false; |
cdb21a0a | 13760 | } |
fe33d2fa | 13761 | } |
fe33d2fa | 13762 | |
3e6b1042 DJ |
13763 | /* Write out any glue sections now that we have created all the |
13764 | stubs. */ | |
13765 | if (globals->bfd_of_glue_owner != NULL) | |
13766 | { | |
13767 | if (! elf32_arm_output_glue_section (info, abfd, | |
13768 | globals->bfd_of_glue_owner, | |
13769 | ARM2THUMB_GLUE_SECTION_NAME)) | |
0a1b45a2 | 13770 | return false; |
3e6b1042 DJ |
13771 | |
13772 | if (! elf32_arm_output_glue_section (info, abfd, | |
13773 | globals->bfd_of_glue_owner, | |
13774 | THUMB2ARM_GLUE_SECTION_NAME)) | |
0a1b45a2 | 13775 | return false; |
3e6b1042 DJ |
13776 | |
13777 | if (! elf32_arm_output_glue_section (info, abfd, | |
13778 | globals->bfd_of_glue_owner, | |
13779 | VFP11_ERRATUM_VENEER_SECTION_NAME)) | |
0a1b45a2 | 13780 | return false; |
3e6b1042 | 13781 | |
a504d23a LA |
13782 | if (! elf32_arm_output_glue_section (info, abfd, |
13783 | globals->bfd_of_glue_owner, | |
13784 | STM32L4XX_ERRATUM_VENEER_SECTION_NAME)) | |
0a1b45a2 | 13785 | return false; |
a504d23a | 13786 | |
3e6b1042 DJ |
13787 | if (! elf32_arm_output_glue_section (info, abfd, |
13788 | globals->bfd_of_glue_owner, | |
13789 | ARM_BX_GLUE_SECTION_NAME)) | |
0a1b45a2 | 13790 | return false; |
3e6b1042 DJ |
13791 | } |
13792 | ||
0a1b45a2 | 13793 | return true; |
3e6b1042 DJ |
13794 | } |
13795 | ||
5968a7b8 NC |
13796 | /* Return a best guess for the machine number based on the attributes. */ |
13797 | ||
13798 | static unsigned int | |
13799 | bfd_arm_get_mach_from_attributes (bfd * abfd) | |
13800 | { | |
13801 | int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch); | |
13802 | ||
13803 | switch (arch) | |
13804 | { | |
c0c468d5 | 13805 | case TAG_CPU_ARCH_PRE_V4: return bfd_mach_arm_3M; |
5968a7b8 NC |
13806 | case TAG_CPU_ARCH_V4: return bfd_mach_arm_4; |
13807 | case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T; | |
13808 | case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T; | |
13809 | ||
13810 | case TAG_CPU_ARCH_V5TE: | |
13811 | { | |
13812 | char * name; | |
13813 | ||
13814 | BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES); | |
13815 | name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s; | |
13816 | ||
13817 | if (name) | |
13818 | { | |
13819 | if (strcmp (name, "IWMMXT2") == 0) | |
13820 | return bfd_mach_arm_iWMMXt2; | |
13821 | ||
13822 | if (strcmp (name, "IWMMXT") == 0) | |
6034aab8 | 13823 | return bfd_mach_arm_iWMMXt; |
088ca6c1 NC |
13824 | |
13825 | if (strcmp (name, "XSCALE") == 0) | |
13826 | { | |
13827 | int wmmx; | |
13828 | ||
13829 | BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES); | |
13830 | wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i; | |
13831 | switch (wmmx) | |
13832 | { | |
13833 | case 1: return bfd_mach_arm_iWMMXt; | |
13834 | case 2: return bfd_mach_arm_iWMMXt2; | |
13835 | default: return bfd_mach_arm_XScale; | |
13836 | } | |
13837 | } | |
5968a7b8 NC |
13838 | } |
13839 | ||
13840 | return bfd_mach_arm_5TE; | |
13841 | } | |
13842 | ||
c0c468d5 TP |
13843 | case TAG_CPU_ARCH_V5TEJ: |
13844 | return bfd_mach_arm_5TEJ; | |
13845 | case TAG_CPU_ARCH_V6: | |
13846 | return bfd_mach_arm_6; | |
13847 | case TAG_CPU_ARCH_V6KZ: | |
13848 | return bfd_mach_arm_6KZ; | |
13849 | case TAG_CPU_ARCH_V6T2: | |
13850 | return bfd_mach_arm_6T2; | |
13851 | case TAG_CPU_ARCH_V6K: | |
13852 | return bfd_mach_arm_6K; | |
13853 | case TAG_CPU_ARCH_V7: | |
13854 | return bfd_mach_arm_7; | |
13855 | case TAG_CPU_ARCH_V6_M: | |
13856 | return bfd_mach_arm_6M; | |
13857 | case TAG_CPU_ARCH_V6S_M: | |
13858 | return bfd_mach_arm_6SM; | |
13859 | case TAG_CPU_ARCH_V7E_M: | |
13860 | return bfd_mach_arm_7EM; | |
13861 | case TAG_CPU_ARCH_V8: | |
13862 | return bfd_mach_arm_8; | |
13863 | case TAG_CPU_ARCH_V8R: | |
13864 | return bfd_mach_arm_8R; | |
13865 | case TAG_CPU_ARCH_V8M_BASE: | |
13866 | return bfd_mach_arm_8M_BASE; | |
13867 | case TAG_CPU_ARCH_V8M_MAIN: | |
13868 | return bfd_mach_arm_8M_MAIN; | |
031254f2 AV |
13869 | case TAG_CPU_ARCH_V8_1M_MAIN: |
13870 | return bfd_mach_arm_8_1M_MAIN; | |
3197e593 PW |
13871 | case TAG_CPU_ARCH_V9: |
13872 | return bfd_mach_arm_9; | |
c0c468d5 | 13873 | |
5968a7b8 | 13874 | default: |
c0c468d5 TP |
13875 | /* Force entry to be added for any new known Tag_CPU_arch value. */ |
13876 | BFD_ASSERT (arch > MAX_TAG_CPU_ARCH); | |
13877 | ||
13878 | /* Unknown Tag_CPU_arch value. */ | |
5968a7b8 NC |
13879 | return bfd_mach_arm_unknown; |
13880 | } | |
13881 | } | |
13882 | ||
c178919b NC |
13883 | /* Set the right machine number. */ |
13884 | ||
0a1b45a2 | 13885 | static bool |
57e8b36a | 13886 | elf32_arm_object_p (bfd *abfd) |
c178919b | 13887 | { |
5a6c6817 | 13888 | unsigned int mach; |
57e8b36a | 13889 | |
5a6c6817 | 13890 | mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION); |
c178919b | 13891 | |
5968a7b8 NC |
13892 | if (mach == bfd_mach_arm_unknown) |
13893 | { | |
13894 | if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT) | |
13895 | mach = bfd_mach_arm_ep9312; | |
13896 | else | |
13897 | mach = bfd_arm_get_mach_from_attributes (abfd); | |
13898 | } | |
c178919b | 13899 | |
5968a7b8 | 13900 | bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach); |
0a1b45a2 | 13901 | return true; |
c178919b NC |
13902 | } |
13903 | ||
fc830a83 | 13904 | /* Function to keep ARM specific flags in the ELF header. */ |
3c9458e9 | 13905 | |
0a1b45a2 | 13906 | static bool |
57e8b36a | 13907 | elf32_arm_set_private_flags (bfd *abfd, flagword flags) |
252b5132 RH |
13908 | { |
13909 | if (elf_flags_init (abfd) | |
13910 | && elf_elfheader (abfd)->e_flags != flags) | |
13911 | { | |
fc830a83 NC |
13912 | if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN) |
13913 | { | |
fd2ec330 | 13914 | if (flags & EF_ARM_INTERWORK) |
4eca0228 | 13915 | _bfd_error_handler |
90b6238f | 13916 | (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"), |
d003868e | 13917 | abfd); |
fc830a83 | 13918 | else |
d003868e | 13919 | _bfd_error_handler |
90b6238f | 13920 | (_("warning: clearing the interworking flag of %pB due to outside request"), |
d003868e | 13921 | abfd); |
fc830a83 | 13922 | } |
252b5132 RH |
13923 | } |
13924 | else | |
13925 | { | |
13926 | elf_elfheader (abfd)->e_flags = flags; | |
0a1b45a2 | 13927 | elf_flags_init (abfd) = true; |
252b5132 RH |
13928 | } |
13929 | ||
0a1b45a2 | 13930 | return true; |
252b5132 RH |
13931 | } |
13932 | ||
fc830a83 | 13933 | /* Copy backend specific data from one object module to another. */ |
9b485d32 | 13934 | |
0a1b45a2 | 13935 | static bool |
57e8b36a | 13936 | elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd) |
252b5132 RH |
13937 | { |
13938 | flagword in_flags; | |
13939 | flagword out_flags; | |
13940 | ||
0ffa91dd | 13941 | if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd)) |
0a1b45a2 | 13942 | return true; |
252b5132 | 13943 | |
fc830a83 | 13944 | in_flags = elf_elfheader (ibfd)->e_flags; |
252b5132 RH |
13945 | out_flags = elf_elfheader (obfd)->e_flags; |
13946 | ||
fc830a83 NC |
13947 | if (elf_flags_init (obfd) |
13948 | && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN | |
13949 | && in_flags != out_flags) | |
252b5132 | 13950 | { |
252b5132 | 13951 | /* Cannot mix APCS26 and APCS32 code. */ |
fd2ec330 | 13952 | if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26)) |
0a1b45a2 | 13953 | return false; |
252b5132 RH |
13954 | |
13955 | /* Cannot mix float APCS and non-float APCS code. */ | |
fd2ec330 | 13956 | if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT)) |
0a1b45a2 | 13957 | return false; |
252b5132 RH |
13958 | |
13959 | /* If the src and dest have different interworking flags | |
99059e56 | 13960 | then turn off the interworking bit. */ |
fd2ec330 | 13961 | if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK)) |
252b5132 | 13962 | { |
fd2ec330 | 13963 | if (out_flags & EF_ARM_INTERWORK) |
d003868e | 13964 | _bfd_error_handler |
90b6238f | 13965 | (_("warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"), |
d003868e | 13966 | obfd, ibfd); |
252b5132 | 13967 | |
fd2ec330 | 13968 | in_flags &= ~EF_ARM_INTERWORK; |
252b5132 | 13969 | } |
1006ba19 PB |
13970 | |
13971 | /* Likewise for PIC, though don't warn for this case. */ | |
fd2ec330 PB |
13972 | if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC)) |
13973 | in_flags &= ~EF_ARM_PIC; | |
252b5132 RH |
13974 | } |
13975 | ||
13976 | elf_elfheader (obfd)->e_flags = in_flags; | |
0a1b45a2 | 13977 | elf_flags_init (obfd) = true; |
252b5132 | 13978 | |
e2349352 | 13979 | return _bfd_elf_copy_private_bfd_data (ibfd, obfd); |
ee065d83 PB |
13980 | } |
13981 | ||
13982 | /* Values for Tag_ABI_PCS_R9_use. */ | |
13983 | enum | |
13984 | { | |
13985 | AEABI_R9_V6, | |
13986 | AEABI_R9_SB, | |
13987 | AEABI_R9_TLS, | |
13988 | AEABI_R9_unused | |
13989 | }; | |
13990 | ||
13991 | /* Values for Tag_ABI_PCS_RW_data. */ | |
13992 | enum | |
13993 | { | |
13994 | AEABI_PCS_RW_data_absolute, | |
13995 | AEABI_PCS_RW_data_PCrel, | |
13996 | AEABI_PCS_RW_data_SBrel, | |
13997 | AEABI_PCS_RW_data_unused | |
13998 | }; | |
13999 | ||
14000 | /* Values for Tag_ABI_enum_size. */ | |
14001 | enum | |
14002 | { | |
14003 | AEABI_enum_unused, | |
14004 | AEABI_enum_short, | |
14005 | AEABI_enum_wide, | |
14006 | AEABI_enum_forced_wide | |
14007 | }; | |
14008 | ||
104d59d1 JM |
14009 | /* Determine whether an object attribute tag takes an integer, a |
14010 | string or both. */ | |
906e58ca | 14011 | |
104d59d1 JM |
14012 | static int |
14013 | elf32_arm_obj_attrs_arg_type (int tag) | |
14014 | { | |
14015 | if (tag == Tag_compatibility) | |
3483fe2e | 14016 | return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL; |
2d0bb761 | 14017 | else if (tag == Tag_nodefaults) |
3483fe2e AS |
14018 | return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT; |
14019 | else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name) | |
14020 | return ATTR_TYPE_FLAG_STR_VAL; | |
104d59d1 | 14021 | else if (tag < 32) |
3483fe2e | 14022 | return ATTR_TYPE_FLAG_INT_VAL; |
104d59d1 | 14023 | else |
3483fe2e | 14024 | return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL; |
104d59d1 JM |
14025 | } |
14026 | ||
5aa6ff7c AS |
14027 | /* The ABI defines that Tag_conformance should be emitted first, and that |
14028 | Tag_nodefaults should be second (if either is defined). This sets those | |
14029 | two positions, and bumps up the position of all the remaining tags to | |
14030 | compensate. */ | |
14031 | static int | |
14032 | elf32_arm_obj_attrs_order (int num) | |
14033 | { | |
3de4a297 | 14034 | if (num == LEAST_KNOWN_OBJ_ATTRIBUTE) |
5aa6ff7c | 14035 | return Tag_conformance; |
3de4a297 | 14036 | if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1) |
5aa6ff7c AS |
14037 | return Tag_nodefaults; |
14038 | if ((num - 2) < Tag_nodefaults) | |
14039 | return num - 2; | |
14040 | if ((num - 1) < Tag_conformance) | |
14041 | return num - 1; | |
14042 | return num; | |
14043 | } | |
14044 | ||
e8b36cd1 | 14045 | /* Attribute numbers >=64 (mod 128) can be safely ignored. */ |
0a1b45a2 | 14046 | static bool |
e8b36cd1 JM |
14047 | elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag) |
14048 | { | |
14049 | if ((tag & 127) < 64) | |
14050 | { | |
14051 | _bfd_error_handler | |
90b6238f | 14052 | (_("%pB: unknown mandatory EABI object attribute %d"), |
e8b36cd1 JM |
14053 | abfd, tag); |
14054 | bfd_set_error (bfd_error_bad_value); | |
0a1b45a2 | 14055 | return false; |
e8b36cd1 JM |
14056 | } |
14057 | else | |
14058 | { | |
14059 | _bfd_error_handler | |
90b6238f | 14060 | (_("warning: %pB: unknown EABI object attribute %d"), |
e8b36cd1 | 14061 | abfd, tag); |
0a1b45a2 | 14062 | return true; |
e8b36cd1 JM |
14063 | } |
14064 | } | |
14065 | ||
91e22acd AS |
14066 | /* Read the architecture from the Tag_also_compatible_with attribute, if any. |
14067 | Returns -1 if no architecture could be read. */ | |
14068 | ||
14069 | static int | |
14070 | get_secondary_compatible_arch (bfd *abfd) | |
14071 | { | |
14072 | obj_attribute *attr = | |
14073 | &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with]; | |
14074 | ||
14075 | /* Note: the tag and its argument below are uleb128 values, though | |
14076 | currently-defined values fit in one byte for each. */ | |
14077 | if (attr->s | |
14078 | && attr->s[0] == Tag_CPU_arch | |
14079 | && (attr->s[1] & 128) != 128 | |
14080 | && attr->s[2] == 0) | |
14081 | return attr->s[1]; | |
14082 | ||
14083 | /* This tag is "safely ignorable", so don't complain if it looks funny. */ | |
14084 | return -1; | |
14085 | } | |
14086 | ||
14087 | /* Set, or unset, the architecture of the Tag_also_compatible_with attribute. | |
14088 | The tag is removed if ARCH is -1. */ | |
14089 | ||
8e79c3df | 14090 | static void |
91e22acd | 14091 | set_secondary_compatible_arch (bfd *abfd, int arch) |
8e79c3df | 14092 | { |
91e22acd AS |
14093 | obj_attribute *attr = |
14094 | &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with]; | |
8e79c3df | 14095 | |
91e22acd AS |
14096 | if (arch == -1) |
14097 | { | |
14098 | attr->s = NULL; | |
14099 | return; | |
8e79c3df | 14100 | } |
91e22acd AS |
14101 | |
14102 | /* Note: the tag and its argument below are uleb128 values, though | |
14103 | currently-defined values fit in one byte for each. */ | |
14104 | if (!attr->s) | |
21d799b5 | 14105 | attr->s = (char *) bfd_alloc (abfd, 3); |
91e22acd AS |
14106 | attr->s[0] = Tag_CPU_arch; |
14107 | attr->s[1] = arch; | |
14108 | attr->s[2] = '\0'; | |
8e79c3df CM |
14109 | } |
14110 | ||
91e22acd AS |
14111 | /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags |
14112 | into account. */ | |
14113 | ||
14114 | static int | |
14115 | tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out, | |
14116 | int newtag, int secondary_compat) | |
8e79c3df | 14117 | { |
91e22acd AS |
14118 | #define T(X) TAG_CPU_ARCH_##X |
14119 | int tagl, tagh, result; | |
14120 | const int v6t2[] = | |
14121 | { | |
14122 | T(V6T2), /* PRE_V4. */ | |
14123 | T(V6T2), /* V4. */ | |
14124 | T(V6T2), /* V4T. */ | |
14125 | T(V6T2), /* V5T. */ | |
14126 | T(V6T2), /* V5TE. */ | |
14127 | T(V6T2), /* V5TEJ. */ | |
14128 | T(V6T2), /* V6. */ | |
14129 | T(V7), /* V6KZ. */ | |
14130 | T(V6T2) /* V6T2. */ | |
14131 | }; | |
14132 | const int v6k[] = | |
14133 | { | |
14134 | T(V6K), /* PRE_V4. */ | |
14135 | T(V6K), /* V4. */ | |
14136 | T(V6K), /* V4T. */ | |
14137 | T(V6K), /* V5T. */ | |
14138 | T(V6K), /* V5TE. */ | |
14139 | T(V6K), /* V5TEJ. */ | |
14140 | T(V6K), /* V6. */ | |
14141 | T(V6KZ), /* V6KZ. */ | |
14142 | T(V7), /* V6T2. */ | |
14143 | T(V6K) /* V6K. */ | |
14144 | }; | |
14145 | const int v7[] = | |
14146 | { | |
14147 | T(V7), /* PRE_V4. */ | |
14148 | T(V7), /* V4. */ | |
14149 | T(V7), /* V4T. */ | |
14150 | T(V7), /* V5T. */ | |
14151 | T(V7), /* V5TE. */ | |
14152 | T(V7), /* V5TEJ. */ | |
14153 | T(V7), /* V6. */ | |
14154 | T(V7), /* V6KZ. */ | |
14155 | T(V7), /* V6T2. */ | |
14156 | T(V7), /* V6K. */ | |
14157 | T(V7) /* V7. */ | |
14158 | }; | |
14159 | const int v6_m[] = | |
14160 | { | |
07d6d2b8 AM |
14161 | -1, /* PRE_V4. */ |
14162 | -1, /* V4. */ | |
91e22acd AS |
14163 | T(V6K), /* V4T. */ |
14164 | T(V6K), /* V5T. */ | |
14165 | T(V6K), /* V5TE. */ | |
14166 | T(V6K), /* V5TEJ. */ | |
14167 | T(V6K), /* V6. */ | |
14168 | T(V6KZ), /* V6KZ. */ | |
14169 | T(V7), /* V6T2. */ | |
14170 | T(V6K), /* V6K. */ | |
14171 | T(V7), /* V7. */ | |
14172 | T(V6_M) /* V6_M. */ | |
14173 | }; | |
14174 | const int v6s_m[] = | |
14175 | { | |
07d6d2b8 AM |
14176 | -1, /* PRE_V4. */ |
14177 | -1, /* V4. */ | |
91e22acd AS |
14178 | T(V6K), /* V4T. */ |
14179 | T(V6K), /* V5T. */ | |
14180 | T(V6K), /* V5TE. */ | |
14181 | T(V6K), /* V5TEJ. */ | |
14182 | T(V6K), /* V6. */ | |
14183 | T(V6KZ), /* V6KZ. */ | |
14184 | T(V7), /* V6T2. */ | |
14185 | T(V6K), /* V6K. */ | |
14186 | T(V7), /* V7. */ | |
14187 | T(V6S_M), /* V6_M. */ | |
14188 | T(V6S_M) /* V6S_M. */ | |
14189 | }; | |
9e3c6df6 PB |
14190 | const int v7e_m[] = |
14191 | { | |
07d6d2b8 AM |
14192 | -1, /* PRE_V4. */ |
14193 | -1, /* V4. */ | |
9e3c6df6 PB |
14194 | T(V7E_M), /* V4T. */ |
14195 | T(V7E_M), /* V5T. */ | |
14196 | T(V7E_M), /* V5TE. */ | |
14197 | T(V7E_M), /* V5TEJ. */ | |
14198 | T(V7E_M), /* V6. */ | |
14199 | T(V7E_M), /* V6KZ. */ | |
14200 | T(V7E_M), /* V6T2. */ | |
14201 | T(V7E_M), /* V6K. */ | |
14202 | T(V7E_M), /* V7. */ | |
14203 | T(V7E_M), /* V6_M. */ | |
14204 | T(V7E_M), /* V6S_M. */ | |
14205 | T(V7E_M) /* V7E_M. */ | |
14206 | }; | |
bca38921 MGD |
14207 | const int v8[] = |
14208 | { | |
14209 | T(V8), /* PRE_V4. */ | |
14210 | T(V8), /* V4. */ | |
14211 | T(V8), /* V4T. */ | |
14212 | T(V8), /* V5T. */ | |
14213 | T(V8), /* V5TE. */ | |
14214 | T(V8), /* V5TEJ. */ | |
14215 | T(V8), /* V6. */ | |
14216 | T(V8), /* V6KZ. */ | |
14217 | T(V8), /* V6T2. */ | |
14218 | T(V8), /* V6K. */ | |
14219 | T(V8), /* V7. */ | |
14220 | T(V8), /* V6_M. */ | |
14221 | T(V8), /* V6S_M. */ | |
14222 | T(V8), /* V7E_M. */ | |
3197e593 PW |
14223 | T(V8), /* V8. */ |
14224 | T(V8), /* V8-R. */ | |
14225 | T(V8), /* V8-M.BASE. */ | |
14226 | T(V8), /* V8-M.MAIN. */ | |
14227 | T(V8), /* V8.1. */ | |
14228 | T(V8), /* V8.2. */ | |
14229 | T(V8), /* V8.3. */ | |
14230 | T(V8), /* V8.1-M.MAIN. */ | |
bca38921 | 14231 | }; |
bff0500d TP |
14232 | const int v8r[] = |
14233 | { | |
14234 | T(V8R), /* PRE_V4. */ | |
14235 | T(V8R), /* V4. */ | |
14236 | T(V8R), /* V4T. */ | |
14237 | T(V8R), /* V5T. */ | |
14238 | T(V8R), /* V5TE. */ | |
14239 | T(V8R), /* V5TEJ. */ | |
14240 | T(V8R), /* V6. */ | |
14241 | T(V8R), /* V6KZ. */ | |
14242 | T(V8R), /* V6T2. */ | |
14243 | T(V8R), /* V6K. */ | |
14244 | T(V8R), /* V7. */ | |
14245 | T(V8R), /* V6_M. */ | |
14246 | T(V8R), /* V6S_M. */ | |
14247 | T(V8R), /* V7E_M. */ | |
14248 | T(V8), /* V8. */ | |
14249 | T(V8R), /* V8R. */ | |
14250 | }; | |
2fd158eb TP |
14251 | const int v8m_baseline[] = |
14252 | { | |
14253 | -1, /* PRE_V4. */ | |
14254 | -1, /* V4. */ | |
14255 | -1, /* V4T. */ | |
14256 | -1, /* V5T. */ | |
14257 | -1, /* V5TE. */ | |
14258 | -1, /* V5TEJ. */ | |
14259 | -1, /* V6. */ | |
14260 | -1, /* V6KZ. */ | |
14261 | -1, /* V6T2. */ | |
14262 | -1, /* V6K. */ | |
14263 | -1, /* V7. */ | |
14264 | T(V8M_BASE), /* V6_M. */ | |
14265 | T(V8M_BASE), /* V6S_M. */ | |
14266 | -1, /* V7E_M. */ | |
14267 | -1, /* V8. */ | |
bff0500d | 14268 | -1, /* V8R. */ |
2fd158eb TP |
14269 | T(V8M_BASE) /* V8-M BASELINE. */ |
14270 | }; | |
14271 | const int v8m_mainline[] = | |
14272 | { | |
14273 | -1, /* PRE_V4. */ | |
14274 | -1, /* V4. */ | |
14275 | -1, /* V4T. */ | |
14276 | -1, /* V5T. */ | |
14277 | -1, /* V5TE. */ | |
14278 | -1, /* V5TEJ. */ | |
14279 | -1, /* V6. */ | |
14280 | -1, /* V6KZ. */ | |
14281 | -1, /* V6T2. */ | |
14282 | -1, /* V6K. */ | |
14283 | T(V8M_MAIN), /* V7. */ | |
14284 | T(V8M_MAIN), /* V6_M. */ | |
14285 | T(V8M_MAIN), /* V6S_M. */ | |
14286 | T(V8M_MAIN), /* V7E_M. */ | |
14287 | -1, /* V8. */ | |
bff0500d | 14288 | -1, /* V8R. */ |
2fd158eb TP |
14289 | T(V8M_MAIN), /* V8-M BASELINE. */ |
14290 | T(V8M_MAIN) /* V8-M MAINLINE. */ | |
14291 | }; | |
031254f2 AV |
14292 | const int v8_1m_mainline[] = |
14293 | { | |
14294 | -1, /* PRE_V4. */ | |
14295 | -1, /* V4. */ | |
14296 | -1, /* V4T. */ | |
14297 | -1, /* V5T. */ | |
14298 | -1, /* V5TE. */ | |
14299 | -1, /* V5TEJ. */ | |
14300 | -1, /* V6. */ | |
14301 | -1, /* V6KZ. */ | |
14302 | -1, /* V6T2. */ | |
14303 | -1, /* V6K. */ | |
14304 | T(V8_1M_MAIN), /* V7. */ | |
14305 | T(V8_1M_MAIN), /* V6_M. */ | |
14306 | T(V8_1M_MAIN), /* V6S_M. */ | |
14307 | T(V8_1M_MAIN), /* V7E_M. */ | |
14308 | -1, /* V8. */ | |
14309 | -1, /* V8R. */ | |
14310 | T(V8_1M_MAIN), /* V8-M BASELINE. */ | |
14311 | T(V8_1M_MAIN), /* V8-M MAINLINE. */ | |
14312 | -1, /* Unused (18). */ | |
14313 | -1, /* Unused (19). */ | |
14314 | -1, /* Unused (20). */ | |
14315 | T(V8_1M_MAIN) /* V8.1-M MAINLINE. */ | |
14316 | }; | |
3197e593 PW |
14317 | const int v9[] = |
14318 | { | |
14319 | T(V9), /* PRE_V4. */ | |
14320 | T(V9), /* V4. */ | |
14321 | T(V9), /* V4T. */ | |
14322 | T(V9), /* V5T. */ | |
14323 | T(V9), /* V5TE. */ | |
14324 | T(V9), /* V5TEJ. */ | |
14325 | T(V9), /* V6. */ | |
14326 | T(V9), /* V6KZ. */ | |
14327 | T(V9), /* V6T2. */ | |
14328 | T(V9), /* V6K. */ | |
14329 | T(V9), /* V7. */ | |
14330 | T(V9), /* V6_M. */ | |
14331 | T(V9), /* V6S_M. */ | |
14332 | T(V9), /* V7E_M. */ | |
14333 | T(V9), /* V8. */ | |
14334 | T(V9), /* V8-R. */ | |
14335 | T(V9), /* V8-M.BASE. */ | |
14336 | T(V9), /* V8-M.MAIN. */ | |
14337 | T(V9), /* V8.1. */ | |
14338 | T(V9), /* V8.2. */ | |
14339 | T(V9), /* V8.3. */ | |
14340 | T(V9), /* V8.1-M.MAIN. */ | |
14341 | T(V9), /* V9. */ | |
14342 | }; | |
91e22acd AS |
14343 | const int v4t_plus_v6_m[] = |
14344 | { | |
14345 | -1, /* PRE_V4. */ | |
14346 | -1, /* V4. */ | |
14347 | T(V4T), /* V4T. */ | |
14348 | T(V5T), /* V5T. */ | |
14349 | T(V5TE), /* V5TE. */ | |
14350 | T(V5TEJ), /* V5TEJ. */ | |
14351 | T(V6), /* V6. */ | |
14352 | T(V6KZ), /* V6KZ. */ | |
14353 | T(V6T2), /* V6T2. */ | |
14354 | T(V6K), /* V6K. */ | |
14355 | T(V7), /* V7. */ | |
14356 | T(V6_M), /* V6_M. */ | |
14357 | T(V6S_M), /* V6S_M. */ | |
9e3c6df6 | 14358 | T(V7E_M), /* V7E_M. */ |
bca38921 | 14359 | T(V8), /* V8. */ |
bff0500d | 14360 | -1, /* V8R. */ |
2fd158eb TP |
14361 | T(V8M_BASE), /* V8-M BASELINE. */ |
14362 | T(V8M_MAIN), /* V8-M MAINLINE. */ | |
031254f2 AV |
14363 | -1, /* Unused (18). */ |
14364 | -1, /* Unused (19). */ | |
14365 | -1, /* Unused (20). */ | |
14366 | T(V8_1M_MAIN), /* V8.1-M MAINLINE. */ | |
3197e593 | 14367 | T(V9), /* V9. */ |
91e22acd AS |
14368 | T(V4T_PLUS_V6_M) /* V4T plus V6_M. */ |
14369 | }; | |
14370 | const int *comb[] = | |
14371 | { | |
14372 | v6t2, | |
14373 | v6k, | |
14374 | v7, | |
14375 | v6_m, | |
14376 | v6s_m, | |
9e3c6df6 | 14377 | v7e_m, |
bca38921 | 14378 | v8, |
bff0500d | 14379 | v8r, |
2fd158eb TP |
14380 | v8m_baseline, |
14381 | v8m_mainline, | |
031254f2 AV |
14382 | NULL, |
14383 | NULL, | |
14384 | NULL, | |
14385 | v8_1m_mainline, | |
3197e593 | 14386 | v9, |
91e22acd AS |
14387 | /* Pseudo-architecture. */ |
14388 | v4t_plus_v6_m | |
14389 | }; | |
14390 | ||
14391 | /* Check we've not got a higher architecture than we know about. */ | |
14392 | ||
9e3c6df6 | 14393 | if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH) |
91e22acd | 14394 | { |
90b6238f | 14395 | _bfd_error_handler (_("error: %pB: unknown CPU architecture"), ibfd); |
91e22acd AS |
14396 | return -1; |
14397 | } | |
14398 | ||
14399 | /* Override old tag if we have a Tag_also_compatible_with on the output. */ | |
14400 | ||
14401 | if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T)) | |
14402 | || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M))) | |
14403 | oldtag = T(V4T_PLUS_V6_M); | |
14404 | ||
14405 | /* And override the new tag if we have a Tag_also_compatible_with on the | |
14406 | input. */ | |
14407 | ||
14408 | if ((newtag == T(V6_M) && secondary_compat == T(V4T)) | |
14409 | || (newtag == T(V4T) && secondary_compat == T(V6_M))) | |
14410 | newtag = T(V4T_PLUS_V6_M); | |
14411 | ||
14412 | tagl = (oldtag < newtag) ? oldtag : newtag; | |
14413 | result = tagh = (oldtag > newtag) ? oldtag : newtag; | |
14414 | ||
14415 | /* Architectures before V6KZ add features monotonically. */ | |
14416 | if (tagh <= TAG_CPU_ARCH_V6KZ) | |
14417 | return result; | |
14418 | ||
4ed7ed8d | 14419 | result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1; |
91e22acd AS |
14420 | |
14421 | /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M) | |
14422 | as the canonical version. */ | |
14423 | if (result == T(V4T_PLUS_V6_M)) | |
14424 | { | |
14425 | result = T(V4T); | |
14426 | *secondary_compat_out = T(V6_M); | |
14427 | } | |
14428 | else | |
14429 | *secondary_compat_out = -1; | |
14430 | ||
14431 | if (result == -1) | |
14432 | { | |
90b6238f | 14433 | _bfd_error_handler (_("error: %pB: conflicting CPU architectures %d/%d"), |
91e22acd AS |
14434 | ibfd, oldtag, newtag); |
14435 | return -1; | |
14436 | } | |
14437 | ||
14438 | return result; | |
14439 | #undef T | |
8e79c3df CM |
14440 | } |
14441 | ||
ac56ee8f MGD |
14442 | /* Query attributes object to see if integer divide instructions may be |
14443 | present in an object. */ | |
0a1b45a2 | 14444 | static bool |
ac56ee8f MGD |
14445 | elf32_arm_attributes_accept_div (const obj_attribute *attr) |
14446 | { | |
14447 | int arch = attr[Tag_CPU_arch].i; | |
14448 | int profile = attr[Tag_CPU_arch_profile].i; | |
14449 | ||
14450 | switch (attr[Tag_DIV_use].i) | |
14451 | { | |
14452 | case 0: | |
14453 | /* Integer divide allowed if instruction contained in archetecture. */ | |
14454 | if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M')) | |
0a1b45a2 | 14455 | return true; |
ac56ee8f | 14456 | else if (arch >= TAG_CPU_ARCH_V7E_M) |
0a1b45a2 | 14457 | return true; |
ac56ee8f | 14458 | else |
0a1b45a2 | 14459 | return false; |
ac56ee8f MGD |
14460 | |
14461 | case 1: | |
14462 | /* Integer divide explicitly prohibited. */ | |
0a1b45a2 | 14463 | return false; |
ac56ee8f MGD |
14464 | |
14465 | default: | |
14466 | /* Unrecognised case - treat as allowing divide everywhere. */ | |
14467 | case 2: | |
14468 | /* Integer divide allowed in ARM state. */ | |
0a1b45a2 | 14469 | return true; |
ac56ee8f MGD |
14470 | } |
14471 | } | |
14472 | ||
14473 | /* Query attributes object to see if integer divide instructions are | |
14474 | forbidden to be in the object. This is not the inverse of | |
14475 | elf32_arm_attributes_accept_div. */ | |
0a1b45a2 | 14476 | static bool |
ac56ee8f MGD |
14477 | elf32_arm_attributes_forbid_div (const obj_attribute *attr) |
14478 | { | |
14479 | return attr[Tag_DIV_use].i == 1; | |
14480 | } | |
14481 | ||
ee065d83 PB |
14482 | /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there |
14483 | are conflicting attributes. */ | |
906e58ca | 14484 | |
0a1b45a2 | 14485 | static bool |
50e03d47 | 14486 | elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info) |
ee065d83 | 14487 | { |
50e03d47 | 14488 | bfd *obfd = info->output_bfd; |
104d59d1 JM |
14489 | obj_attribute *in_attr; |
14490 | obj_attribute *out_attr; | |
ee065d83 PB |
14491 | /* Some tags have 0 = don't care, 1 = strong requirement, |
14492 | 2 = weak requirement. */ | |
91e22acd | 14493 | static const int order_021[3] = {0, 2, 1}; |
ee065d83 | 14494 | int i; |
0a1b45a2 | 14495 | bool result = true; |
9274e9de | 14496 | const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section; |
ee065d83 | 14497 | |
3e6b1042 DJ |
14498 | /* Skip the linker stubs file. This preserves previous behavior |
14499 | of accepting unknown attributes in the first input file - but | |
14500 | is that a bug? */ | |
14501 | if (ibfd->flags & BFD_LINKER_CREATED) | |
0a1b45a2 | 14502 | return true; |
3e6b1042 | 14503 | |
9274e9de TG |
14504 | /* Skip any input that hasn't attribute section. |
14505 | This enables to link object files without attribute section with | |
14506 | any others. */ | |
14507 | if (bfd_get_section_by_name (ibfd, sec_name) == NULL) | |
0a1b45a2 | 14508 | return true; |
9274e9de | 14509 | |
104d59d1 | 14510 | if (!elf_known_obj_attributes_proc (obfd)[0].i) |
ee065d83 PB |
14511 | { |
14512 | /* This is the first object. Copy the attributes. */ | |
104d59d1 | 14513 | _bfd_elf_copy_obj_attributes (ibfd, obfd); |
004ae526 | 14514 | |
cd21e546 MGD |
14515 | out_attr = elf_known_obj_attributes_proc (obfd); |
14516 | ||
004ae526 PB |
14517 | /* Use the Tag_null value to indicate the attributes have been |
14518 | initialized. */ | |
cd21e546 | 14519 | out_attr[0].i = 1; |
004ae526 | 14520 | |
cd21e546 MGD |
14521 | /* We do not output objects with Tag_MPextension_use_legacy - we move |
14522 | the attribute's value to Tag_MPextension_use. */ | |
14523 | if (out_attr[Tag_MPextension_use_legacy].i != 0) | |
14524 | { | |
14525 | if (out_attr[Tag_MPextension_use].i != 0 | |
14526 | && out_attr[Tag_MPextension_use_legacy].i | |
99059e56 | 14527 | != out_attr[Tag_MPextension_use].i) |
cd21e546 MGD |
14528 | { |
14529 | _bfd_error_handler | |
871b3ab2 | 14530 | (_("Error: %pB has both the current and legacy " |
cd21e546 | 14531 | "Tag_MPextension_use attributes"), ibfd); |
0a1b45a2 | 14532 | result = false; |
cd21e546 MGD |
14533 | } |
14534 | ||
14535 | out_attr[Tag_MPextension_use] = | |
14536 | out_attr[Tag_MPextension_use_legacy]; | |
14537 | out_attr[Tag_MPextension_use_legacy].type = 0; | |
14538 | out_attr[Tag_MPextension_use_legacy].i = 0; | |
14539 | } | |
14540 | ||
81c9e0f6 NC |
14541 | /* PR 28859 and 28848: Handle the case where the first input file, |
14542 | eg crti.o, has a Tag_ABI_HardFP_use of 3 but no Tag_FP_arch set. | |
14543 | Using Tag_ABI_HardFP_use in this way is deprecated, so reset the | |
14544 | attribute to zero. | |
14545 | FIXME: Should we handle other non-zero values of Tag_ABI_HardFO_use ? */ | |
14546 | if (out_attr[Tag_ABI_HardFP_use].i == 3 && out_attr[Tag_FP_arch].i == 0) | |
14547 | out_attr[Tag_ABI_HardFP_use].i = 0; | |
14548 | ||
cd21e546 | 14549 | return result; |
ee065d83 PB |
14550 | } |
14551 | ||
104d59d1 JM |
14552 | in_attr = elf_known_obj_attributes_proc (ibfd); |
14553 | out_attr = elf_known_obj_attributes_proc (obfd); | |
ee065d83 PB |
14554 | /* This needs to happen before Tag_ABI_FP_number_model is merged. */ |
14555 | if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i) | |
14556 | { | |
5c294fee TG |
14557 | /* Ignore mismatches if the object doesn't use floating point or is |
14558 | floating point ABI independent. */ | |
14559 | if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none | |
14560 | || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none | |
14561 | && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible)) | |
ee065d83 | 14562 | out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i; |
5c294fee TG |
14563 | else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none |
14564 | && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible) | |
ee065d83 PB |
14565 | { |
14566 | _bfd_error_handler | |
871b3ab2 | 14567 | (_("error: %pB uses VFP register arguments, %pB does not"), |
deddc40b NS |
14568 | in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd, |
14569 | in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd); | |
0a1b45a2 | 14570 | result = false; |
ee065d83 PB |
14571 | } |
14572 | } | |
14573 | ||
3de4a297 | 14574 | for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++) |
ee065d83 PB |
14575 | { |
14576 | /* Merge this attribute with existing attributes. */ | |
14577 | switch (i) | |
14578 | { | |
14579 | case Tag_CPU_raw_name: | |
14580 | case Tag_CPU_name: | |
6a631e86 | 14581 | /* These are merged after Tag_CPU_arch. */ |
ee065d83 PB |
14582 | break; |
14583 | ||
14584 | case Tag_ABI_optimization_goals: | |
14585 | case Tag_ABI_FP_optimization_goals: | |
14586 | /* Use the first value seen. */ | |
14587 | break; | |
14588 | ||
14589 | case Tag_CPU_arch: | |
91e22acd AS |
14590 | { |
14591 | int secondary_compat = -1, secondary_compat_out = -1; | |
14592 | unsigned int saved_out_attr = out_attr[i].i; | |
70e99720 TG |
14593 | int arch_attr; |
14594 | static const char *name_table[] = | |
14595 | { | |
91e22acd AS |
14596 | /* These aren't real CPU names, but we can't guess |
14597 | that from the architecture version alone. */ | |
14598 | "Pre v4", | |
14599 | "ARM v4", | |
14600 | "ARM v4T", | |
14601 | "ARM v5T", | |
14602 | "ARM v5TE", | |
14603 | "ARM v5TEJ", | |
14604 | "ARM v6", | |
14605 | "ARM v6KZ", | |
14606 | "ARM v6T2", | |
14607 | "ARM v6K", | |
14608 | "ARM v7", | |
14609 | "ARM v6-M", | |
bca38921 | 14610 | "ARM v6S-M", |
3197e593 | 14611 | "ARM v7E-M", |
2fd158eb | 14612 | "ARM v8", |
3197e593 | 14613 | "ARM v8-R", |
2fd158eb TP |
14614 | "ARM v8-M.baseline", |
14615 | "ARM v8-M.mainline", | |
3197e593 PW |
14616 | "ARM v8.1-A", |
14617 | "ARM v8.2-A", | |
14618 | "ARM v8.3-A", | |
14619 | "ARM v8.1-M.mainline", | |
14620 | "ARM v9", | |
91e22acd AS |
14621 | }; |
14622 | ||
14623 | /* Merge Tag_CPU_arch and Tag_also_compatible_with. */ | |
14624 | secondary_compat = get_secondary_compatible_arch (ibfd); | |
14625 | secondary_compat_out = get_secondary_compatible_arch (obfd); | |
70e99720 TG |
14626 | arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i, |
14627 | &secondary_compat_out, | |
14628 | in_attr[i].i, | |
14629 | secondary_compat); | |
14630 | ||
14631 | /* Return with error if failed to merge. */ | |
14632 | if (arch_attr == -1) | |
0a1b45a2 | 14633 | return false; |
70e99720 TG |
14634 | |
14635 | out_attr[i].i = arch_attr; | |
14636 | ||
91e22acd AS |
14637 | set_secondary_compatible_arch (obfd, secondary_compat_out); |
14638 | ||
14639 | /* Merge Tag_CPU_name and Tag_CPU_raw_name. */ | |
14640 | if (out_attr[i].i == saved_out_attr) | |
14641 | ; /* Leave the names alone. */ | |
14642 | else if (out_attr[i].i == in_attr[i].i) | |
14643 | { | |
14644 | /* The output architecture has been changed to match the | |
14645 | input architecture. Use the input names. */ | |
14646 | out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s | |
14647 | ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s) | |
14648 | : NULL; | |
14649 | out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s | |
14650 | ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s) | |
14651 | : NULL; | |
14652 | } | |
14653 | else | |
14654 | { | |
14655 | out_attr[Tag_CPU_name].s = NULL; | |
14656 | out_attr[Tag_CPU_raw_name].s = NULL; | |
14657 | } | |
14658 | ||
14659 | /* If we still don't have a value for Tag_CPU_name, | |
14660 | make one up now. Tag_CPU_raw_name remains blank. */ | |
14661 | if (out_attr[Tag_CPU_name].s == NULL | |
14662 | && out_attr[i].i < ARRAY_SIZE (name_table)) | |
14663 | out_attr[Tag_CPU_name].s = | |
14664 | _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]); | |
14665 | } | |
14666 | break; | |
14667 | ||
ee065d83 PB |
14668 | case Tag_ARM_ISA_use: |
14669 | case Tag_THUMB_ISA_use: | |
ee065d83 | 14670 | case Tag_WMMX_arch: |
91e22acd AS |
14671 | case Tag_Advanced_SIMD_arch: |
14672 | /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */ | |
ee065d83 | 14673 | case Tag_ABI_FP_rounding: |
ee065d83 PB |
14674 | case Tag_ABI_FP_exceptions: |
14675 | case Tag_ABI_FP_user_exceptions: | |
14676 | case Tag_ABI_FP_number_model: | |
75375b3e | 14677 | case Tag_FP_HP_extension: |
91e22acd AS |
14678 | case Tag_CPU_unaligned_access: |
14679 | case Tag_T2EE_use: | |
91e22acd | 14680 | case Tag_MPextension_use: |
a7ad558c | 14681 | case Tag_MVE_arch: |
99db83d0 | 14682 | case Tag_PAC_extension: |
4b535030 | 14683 | case Tag_BTI_extension: |
b81ee92f | 14684 | case Tag_BTI_use: |
c9fed665 | 14685 | case Tag_PACRET_use: |
ee065d83 PB |
14686 | /* Use the largest value specified. */ |
14687 | if (in_attr[i].i > out_attr[i].i) | |
14688 | out_attr[i].i = in_attr[i].i; | |
14689 | break; | |
14690 | ||
75375b3e | 14691 | case Tag_ABI_align_preserved: |
91e22acd AS |
14692 | case Tag_ABI_PCS_RO_data: |
14693 | /* Use the smallest value specified. */ | |
14694 | if (in_attr[i].i < out_attr[i].i) | |
14695 | out_attr[i].i = in_attr[i].i; | |
14696 | break; | |
14697 | ||
75375b3e | 14698 | case Tag_ABI_align_needed: |
91e22acd | 14699 | if ((in_attr[i].i > 0 || out_attr[i].i > 0) |
75375b3e MGD |
14700 | && (in_attr[Tag_ABI_align_preserved].i == 0 |
14701 | || out_attr[Tag_ABI_align_preserved].i == 0)) | |
ee065d83 | 14702 | { |
91e22acd AS |
14703 | /* This error message should be enabled once all non-conformant |
14704 | binaries in the toolchain have had the attributes set | |
14705 | properly. | |
ee065d83 | 14706 | _bfd_error_handler |
871b3ab2 | 14707 | (_("error: %pB: 8-byte data alignment conflicts with %pB"), |
91e22acd | 14708 | obfd, ibfd); |
0a1b45a2 | 14709 | result = false; */ |
ee065d83 | 14710 | } |
91e22acd AS |
14711 | /* Fall through. */ |
14712 | case Tag_ABI_FP_denormal: | |
14713 | case Tag_ABI_PCS_GOT_use: | |
14714 | /* Use the "greatest" from the sequence 0, 2, 1, or the largest | |
14715 | value if greater than 2 (for future-proofing). */ | |
14716 | if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i) | |
14717 | || (in_attr[i].i <= 2 && out_attr[i].i <= 2 | |
14718 | && order_021[in_attr[i].i] > order_021[out_attr[i].i])) | |
ee065d83 PB |
14719 | out_attr[i].i = in_attr[i].i; |
14720 | break; | |
91e22acd | 14721 | |
75375b3e MGD |
14722 | case Tag_Virtualization_use: |
14723 | /* The virtualization tag effectively stores two bits of | |
14724 | information: the intended use of TrustZone (in bit 0), and the | |
14725 | intended use of Virtualization (in bit 1). */ | |
14726 | if (out_attr[i].i == 0) | |
14727 | out_attr[i].i = in_attr[i].i; | |
14728 | else if (in_attr[i].i != 0 | |
14729 | && in_attr[i].i != out_attr[i].i) | |
14730 | { | |
14731 | if (in_attr[i].i <= 3 && out_attr[i].i <= 3) | |
14732 | out_attr[i].i = 3; | |
14733 | else | |
14734 | { | |
14735 | _bfd_error_handler | |
871b3ab2 AM |
14736 | (_("error: %pB: unable to merge virtualization attributes " |
14737 | "with %pB"), | |
75375b3e | 14738 | obfd, ibfd); |
0a1b45a2 | 14739 | result = false; |
75375b3e MGD |
14740 | } |
14741 | } | |
14742 | break; | |
91e22acd AS |
14743 | |
14744 | case Tag_CPU_arch_profile: | |
14745 | if (out_attr[i].i != in_attr[i].i) | |
14746 | { | |
14747 | /* 0 will merge with anything. | |
14748 | 'A' and 'S' merge to 'A'. | |
14749 | 'R' and 'S' merge to 'R'. | |
99059e56 | 14750 | 'M' and 'A|R|S' is an error. */ |
91e22acd AS |
14751 | if (out_attr[i].i == 0 |
14752 | || (out_attr[i].i == 'S' | |
14753 | && (in_attr[i].i == 'A' || in_attr[i].i == 'R'))) | |
14754 | out_attr[i].i = in_attr[i].i; | |
14755 | else if (in_attr[i].i == 0 | |
14756 | || (in_attr[i].i == 'S' | |
14757 | && (out_attr[i].i == 'A' || out_attr[i].i == 'R'))) | |
6a631e86 | 14758 | ; /* Do nothing. */ |
91e22acd AS |
14759 | else |
14760 | { | |
14761 | _bfd_error_handler | |
90b6238f | 14762 | (_("error: %pB: conflicting architecture profiles %c/%c"), |
91e22acd AS |
14763 | ibfd, |
14764 | in_attr[i].i ? in_attr[i].i : '0', | |
14765 | out_attr[i].i ? out_attr[i].i : '0'); | |
0a1b45a2 | 14766 | result = false; |
91e22acd AS |
14767 | } |
14768 | } | |
14769 | break; | |
15afaa63 TP |
14770 | |
14771 | case Tag_DSP_extension: | |
14772 | /* No need to change output value if any of: | |
14773 | - pre (<=) ARMv5T input architecture (do not have DSP) | |
14774 | - M input profile not ARMv7E-M and do not have DSP. */ | |
14775 | if (in_attr[Tag_CPU_arch].i <= 3 | |
14776 | || (in_attr[Tag_CPU_arch_profile].i == 'M' | |
14777 | && in_attr[Tag_CPU_arch].i != 13 | |
14778 | && in_attr[i].i == 0)) | |
14779 | ; /* Do nothing. */ | |
14780 | /* Output value should be 0 if DSP part of architecture, ie. | |
14781 | - post (>=) ARMv5te architecture output | |
14782 | - A, R or S profile output or ARMv7E-M output architecture. */ | |
14783 | else if (out_attr[Tag_CPU_arch].i >= 4 | |
14784 | && (out_attr[Tag_CPU_arch_profile].i == 'A' | |
14785 | || out_attr[Tag_CPU_arch_profile].i == 'R' | |
14786 | || out_attr[Tag_CPU_arch_profile].i == 'S' | |
14787 | || out_attr[Tag_CPU_arch].i == 13)) | |
14788 | out_attr[i].i = 0; | |
14789 | /* Otherwise, DSP instructions are added and not part of output | |
14790 | architecture. */ | |
14791 | else | |
14792 | out_attr[i].i = 1; | |
14793 | break; | |
14794 | ||
75375b3e | 14795 | case Tag_FP_arch: |
62f3b8c8 | 14796 | { |
4547cb56 NC |
14797 | /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since |
14798 | the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch | |
14799 | when it's 0. It might mean absence of FP hardware if | |
99654aaf | 14800 | Tag_FP_arch is zero. */ |
4547cb56 | 14801 | |
a715796b | 14802 | #define VFP_VERSION_COUNT 9 |
62f3b8c8 PB |
14803 | static const struct |
14804 | { | |
14805 | int ver; | |
14806 | int regs; | |
bca38921 | 14807 | } vfp_versions[VFP_VERSION_COUNT] = |
62f3b8c8 PB |
14808 | { |
14809 | {0, 0}, | |
14810 | {1, 16}, | |
14811 | {2, 16}, | |
14812 | {3, 32}, | |
14813 | {3, 16}, | |
14814 | {4, 32}, | |
bca38921 | 14815 | {4, 16}, |
a715796b TG |
14816 | {8, 32}, |
14817 | {8, 16} | |
62f3b8c8 PB |
14818 | }; |
14819 | int ver; | |
14820 | int regs; | |
14821 | int newval; | |
14822 | ||
4547cb56 NC |
14823 | /* If the output has no requirement about FP hardware, |
14824 | follow the requirement of the input. */ | |
14825 | if (out_attr[i].i == 0) | |
14826 | { | |
4ec192e6 RE |
14827 | /* This assert is still reasonable, we shouldn't |
14828 | produce the suspicious build attribute | |
14829 | combination (See below for in_attr). */ | |
4547cb56 NC |
14830 | BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0); |
14831 | out_attr[i].i = in_attr[i].i; | |
14832 | out_attr[Tag_ABI_HardFP_use].i | |
14833 | = in_attr[Tag_ABI_HardFP_use].i; | |
14834 | break; | |
14835 | } | |
14836 | /* If the input has no requirement about FP hardware, do | |
14837 | nothing. */ | |
14838 | else if (in_attr[i].i == 0) | |
14839 | { | |
4ec192e6 RE |
14840 | /* We used to assert that Tag_ABI_HardFP_use was |
14841 | zero here, but we should never assert when | |
14842 | consuming an object file that has suspicious | |
14843 | build attributes. The single precision variant | |
14844 | of 'no FP architecture' is still 'no FP | |
14845 | architecture', so we just ignore the tag in this | |
14846 | case. */ | |
4547cb56 NC |
14847 | break; |
14848 | } | |
14849 | ||
14850 | /* Both the input and the output have nonzero Tag_FP_arch. | |
99654aaf | 14851 | So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */ |
4547cb56 NC |
14852 | |
14853 | /* If both the input and the output have zero Tag_ABI_HardFP_use, | |
14854 | do nothing. */ | |
14855 | if (in_attr[Tag_ABI_HardFP_use].i == 0 | |
14856 | && out_attr[Tag_ABI_HardFP_use].i == 0) | |
14857 | ; | |
14858 | /* If the input and the output have different Tag_ABI_HardFP_use, | |
99654aaf | 14859 | the combination of them is 0 (implied by Tag_FP_arch). */ |
4547cb56 NC |
14860 | else if (in_attr[Tag_ABI_HardFP_use].i |
14861 | != out_attr[Tag_ABI_HardFP_use].i) | |
99654aaf | 14862 | out_attr[Tag_ABI_HardFP_use].i = 0; |
4547cb56 NC |
14863 | |
14864 | /* Now we can handle Tag_FP_arch. */ | |
14865 | ||
bca38921 MGD |
14866 | /* Values of VFP_VERSION_COUNT or more aren't defined, so just |
14867 | pick the biggest. */ | |
14868 | if (in_attr[i].i >= VFP_VERSION_COUNT | |
14869 | && in_attr[i].i > out_attr[i].i) | |
62f3b8c8 PB |
14870 | { |
14871 | out_attr[i] = in_attr[i]; | |
14872 | break; | |
14873 | } | |
14874 | /* The output uses the superset of input features | |
14875 | (ISA version) and registers. */ | |
14876 | ver = vfp_versions[in_attr[i].i].ver; | |
14877 | if (ver < vfp_versions[out_attr[i].i].ver) | |
14878 | ver = vfp_versions[out_attr[i].i].ver; | |
14879 | regs = vfp_versions[in_attr[i].i].regs; | |
14880 | if (regs < vfp_versions[out_attr[i].i].regs) | |
14881 | regs = vfp_versions[out_attr[i].i].regs; | |
14882 | /* This assumes all possible supersets are also a valid | |
99059e56 | 14883 | options. */ |
bca38921 | 14884 | for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--) |
62f3b8c8 PB |
14885 | { |
14886 | if (regs == vfp_versions[newval].regs | |
14887 | && ver == vfp_versions[newval].ver) | |
14888 | break; | |
14889 | } | |
14890 | out_attr[i].i = newval; | |
14891 | } | |
b1cc4aeb | 14892 | break; |
ee065d83 PB |
14893 | case Tag_PCS_config: |
14894 | if (out_attr[i].i == 0) | |
14895 | out_attr[i].i = in_attr[i].i; | |
b6009aca | 14896 | else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i) |
ee065d83 PB |
14897 | { |
14898 | /* It's sometimes ok to mix different configs, so this is only | |
99059e56 | 14899 | a warning. */ |
ee065d83 | 14900 | _bfd_error_handler |
90b6238f | 14901 | (_("warning: %pB: conflicting platform configuration"), ibfd); |
ee065d83 PB |
14902 | } |
14903 | break; | |
14904 | case Tag_ABI_PCS_R9_use: | |
004ae526 PB |
14905 | if (in_attr[i].i != out_attr[i].i |
14906 | && out_attr[i].i != AEABI_R9_unused | |
ee065d83 PB |
14907 | && in_attr[i].i != AEABI_R9_unused) |
14908 | { | |
14909 | _bfd_error_handler | |
90b6238f | 14910 | (_("error: %pB: conflicting use of R9"), ibfd); |
0a1b45a2 | 14911 | result = false; |
ee065d83 PB |
14912 | } |
14913 | if (out_attr[i].i == AEABI_R9_unused) | |
14914 | out_attr[i].i = in_attr[i].i; | |
14915 | break; | |
14916 | case Tag_ABI_PCS_RW_data: | |
14917 | if (in_attr[i].i == AEABI_PCS_RW_data_SBrel | |
14918 | && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB | |
14919 | && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused) | |
14920 | { | |
14921 | _bfd_error_handler | |
871b3ab2 | 14922 | (_("error: %pB: SB relative addressing conflicts with use of R9"), |
ee065d83 | 14923 | ibfd); |
0a1b45a2 | 14924 | result = false; |
ee065d83 PB |
14925 | } |
14926 | /* Use the smallest value specified. */ | |
14927 | if (in_attr[i].i < out_attr[i].i) | |
14928 | out_attr[i].i = in_attr[i].i; | |
14929 | break; | |
ee065d83 | 14930 | case Tag_ABI_PCS_wchar_t: |
a9dc9481 JM |
14931 | if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i |
14932 | && !elf_arm_tdata (obfd)->no_wchar_size_warning) | |
ee065d83 PB |
14933 | { |
14934 | _bfd_error_handler | |
871b3ab2 | 14935 | (_("warning: %pB uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"), |
a9dc9481 | 14936 | ibfd, in_attr[i].i, out_attr[i].i); |
ee065d83 | 14937 | } |
a9dc9481 | 14938 | else if (in_attr[i].i && !out_attr[i].i) |
ee065d83 PB |
14939 | out_attr[i].i = in_attr[i].i; |
14940 | break; | |
ee065d83 PB |
14941 | case Tag_ABI_enum_size: |
14942 | if (in_attr[i].i != AEABI_enum_unused) | |
14943 | { | |
14944 | if (out_attr[i].i == AEABI_enum_unused | |
14945 | || out_attr[i].i == AEABI_enum_forced_wide) | |
14946 | { | |
14947 | /* The existing object is compatible with anything. | |
14948 | Use whatever requirements the new object has. */ | |
14949 | out_attr[i].i = in_attr[i].i; | |
14950 | } | |
14951 | else if (in_attr[i].i != AEABI_enum_forced_wide | |
bf21ed78 | 14952 | && out_attr[i].i != in_attr[i].i |
0ffa91dd | 14953 | && !elf_arm_tdata (obfd)->no_enum_size_warning) |
ee065d83 | 14954 | { |
91e22acd | 14955 | static const char *aeabi_enum_names[] = |
bf21ed78 | 14956 | { "", "variable-size", "32-bit", "" }; |
91e22acd | 14957 | const char *in_name = |
cc850f74 | 14958 | in_attr[i].i < ARRAY_SIZE (aeabi_enum_names) |
91e22acd AS |
14959 | ? aeabi_enum_names[in_attr[i].i] |
14960 | : "<unknown>"; | |
14961 | const char *out_name = | |
cc850f74 | 14962 | out_attr[i].i < ARRAY_SIZE (aeabi_enum_names) |
91e22acd AS |
14963 | ? aeabi_enum_names[out_attr[i].i] |
14964 | : "<unknown>"; | |
ee065d83 | 14965 | _bfd_error_handler |
871b3ab2 | 14966 | (_("warning: %pB uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"), |
91e22acd | 14967 | ibfd, in_name, out_name); |
ee065d83 PB |
14968 | } |
14969 | } | |
14970 | break; | |
14971 | case Tag_ABI_VFP_args: | |
14972 | /* Aready done. */ | |
14973 | break; | |
14974 | case Tag_ABI_WMMX_args: | |
14975 | if (in_attr[i].i != out_attr[i].i) | |
14976 | { | |
14977 | _bfd_error_handler | |
871b3ab2 | 14978 | (_("error: %pB uses iWMMXt register arguments, %pB does not"), |
ee065d83 | 14979 | ibfd, obfd); |
0a1b45a2 | 14980 | result = false; |
ee065d83 PB |
14981 | } |
14982 | break; | |
7b86a9fa AS |
14983 | case Tag_compatibility: |
14984 | /* Merged in target-independent code. */ | |
14985 | break; | |
91e22acd | 14986 | case Tag_ABI_HardFP_use: |
4547cb56 | 14987 | /* This is handled along with Tag_FP_arch. */ |
91e22acd AS |
14988 | break; |
14989 | case Tag_ABI_FP_16bit_format: | |
14990 | if (in_attr[i].i != 0 && out_attr[i].i != 0) | |
14991 | { | |
14992 | if (in_attr[i].i != out_attr[i].i) | |
14993 | { | |
14994 | _bfd_error_handler | |
871b3ab2 | 14995 | (_("error: fp16 format mismatch between %pB and %pB"), |
91e22acd | 14996 | ibfd, obfd); |
0a1b45a2 | 14997 | result = false; |
91e22acd AS |
14998 | } |
14999 | } | |
15000 | if (in_attr[i].i != 0) | |
15001 | out_attr[i].i = in_attr[i].i; | |
15002 | break; | |
7b86a9fa | 15003 | |
cd21e546 | 15004 | case Tag_DIV_use: |
ac56ee8f MGD |
15005 | /* A value of zero on input means that the divide instruction may |
15006 | be used if available in the base architecture as specified via | |
15007 | Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that | |
15008 | the user did not want divide instructions. A value of 2 | |
15009 | explicitly means that divide instructions were allowed in ARM | |
15010 | and Thumb state. */ | |
15011 | if (in_attr[i].i == out_attr[i].i) | |
15012 | /* Do nothing. */ ; | |
15013 | else if (elf32_arm_attributes_forbid_div (in_attr) | |
15014 | && !elf32_arm_attributes_accept_div (out_attr)) | |
15015 | out_attr[i].i = 1; | |
15016 | else if (elf32_arm_attributes_forbid_div (out_attr) | |
15017 | && elf32_arm_attributes_accept_div (in_attr)) | |
15018 | out_attr[i].i = in_attr[i].i; | |
15019 | else if (in_attr[i].i == 2) | |
15020 | out_attr[i].i = in_attr[i].i; | |
cd21e546 MGD |
15021 | break; |
15022 | ||
15023 | case Tag_MPextension_use_legacy: | |
15024 | /* We don't output objects with Tag_MPextension_use_legacy - we | |
15025 | move the value to Tag_MPextension_use. */ | |
15026 | if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0) | |
15027 | { | |
15028 | if (in_attr[Tag_MPextension_use].i != in_attr[i].i) | |
15029 | { | |
15030 | _bfd_error_handler | |
871b3ab2 | 15031 | (_("%pB has both the current and legacy " |
b38cadfb | 15032 | "Tag_MPextension_use attributes"), |
cd21e546 | 15033 | ibfd); |
0a1b45a2 | 15034 | result = false; |
cd21e546 MGD |
15035 | } |
15036 | } | |
15037 | ||
15038 | if (in_attr[i].i > out_attr[Tag_MPextension_use].i) | |
15039 | out_attr[Tag_MPextension_use] = in_attr[i]; | |
15040 | ||
15041 | break; | |
15042 | ||
91e22acd | 15043 | case Tag_nodefaults: |
2d0bb761 AS |
15044 | /* This tag is set if it exists, but the value is unused (and is |
15045 | typically zero). We don't actually need to do anything here - | |
15046 | the merge happens automatically when the type flags are merged | |
15047 | below. */ | |
91e22acd AS |
15048 | break; |
15049 | case Tag_also_compatible_with: | |
15050 | /* Already done in Tag_CPU_arch. */ | |
15051 | break; | |
15052 | case Tag_conformance: | |
15053 | /* Keep the attribute if it matches. Throw it away otherwise. | |
15054 | No attribute means no claim to conform. */ | |
15055 | if (!in_attr[i].s || !out_attr[i].s | |
15056 | || strcmp (in_attr[i].s, out_attr[i].s) != 0) | |
15057 | out_attr[i].s = NULL; | |
15058 | break; | |
3cfad14c | 15059 | |
91e22acd | 15060 | default: |
e8b36cd1 JM |
15061 | result |
15062 | = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i); | |
91e22acd AS |
15063 | } |
15064 | ||
15065 | /* If out_attr was copied from in_attr then it won't have a type yet. */ | |
15066 | if (in_attr[i].type && !out_attr[i].type) | |
15067 | out_attr[i].type = in_attr[i].type; | |
ee065d83 PB |
15068 | } |
15069 | ||
104d59d1 | 15070 | /* Merge Tag_compatibility attributes and any common GNU ones. */ |
50e03d47 | 15071 | if (!_bfd_elf_merge_object_attributes (ibfd, info)) |
0a1b45a2 | 15072 | return false; |
ee065d83 | 15073 | |
104d59d1 | 15074 | /* Check for any attributes not known on ARM. */ |
e8b36cd1 | 15075 | result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd); |
91e22acd | 15076 | |
91e22acd | 15077 | return result; |
252b5132 RH |
15078 | } |
15079 | ||
3a4a14e9 PB |
15080 | |
15081 | /* Return TRUE if the two EABI versions are incompatible. */ | |
15082 | ||
0a1b45a2 | 15083 | static bool |
3a4a14e9 PB |
15084 | elf32_arm_versions_compatible (unsigned iver, unsigned over) |
15085 | { | |
15086 | /* v4 and v5 are the same spec before and after it was released, | |
15087 | so allow mixing them. */ | |
15088 | if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5) | |
15089 | || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4)) | |
0a1b45a2 | 15090 | return true; |
3a4a14e9 PB |
15091 | |
15092 | return (iver == over); | |
15093 | } | |
15094 | ||
252b5132 RH |
15095 | /* Merge backend specific data from an object file to the output |
15096 | object file when linking. */ | |
9b485d32 | 15097 | |
0a1b45a2 | 15098 | static bool |
50e03d47 | 15099 | elf32_arm_merge_private_bfd_data (bfd *, struct bfd_link_info *); |
252b5132 | 15100 | |
9b485d32 NC |
15101 | /* Display the flags field. */ |
15102 | ||
0a1b45a2 | 15103 | static bool |
57e8b36a | 15104 | elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr) |
252b5132 | 15105 | { |
fc830a83 NC |
15106 | FILE * file = (FILE *) ptr; |
15107 | unsigned long flags; | |
252b5132 RH |
15108 | |
15109 | BFD_ASSERT (abfd != NULL && ptr != NULL); | |
15110 | ||
15111 | /* Print normal ELF private data. */ | |
15112 | _bfd_elf_print_private_bfd_data (abfd, ptr); | |
15113 | ||
fc830a83 | 15114 | flags = elf_elfheader (abfd)->e_flags; |
9b485d32 NC |
15115 | /* Ignore init flag - it may not be set, despite the flags field |
15116 | containing valid data. */ | |
252b5132 | 15117 | |
dbb078f6 | 15118 | fprintf (file, _("private flags = 0x%lx:"), elf_elfheader (abfd)->e_flags); |
252b5132 | 15119 | |
fc830a83 NC |
15120 | switch (EF_ARM_EABI_VERSION (flags)) |
15121 | { | |
15122 | case EF_ARM_EABI_UNKNOWN: | |
4cc11e76 | 15123 | /* The following flag bits are GNU extensions and not part of the |
fc830a83 NC |
15124 | official ARM ELF extended ABI. Hence they are only decoded if |
15125 | the EABI version is not set. */ | |
fd2ec330 | 15126 | if (flags & EF_ARM_INTERWORK) |
9b485d32 | 15127 | fprintf (file, _(" [interworking enabled]")); |
9a5aca8c | 15128 | |
fd2ec330 | 15129 | if (flags & EF_ARM_APCS_26) |
6c571f00 | 15130 | fprintf (file, " [APCS-26]"); |
fc830a83 | 15131 | else |
6c571f00 | 15132 | fprintf (file, " [APCS-32]"); |
9a5aca8c | 15133 | |
96a846ea RE |
15134 | if (flags & EF_ARM_VFP_FLOAT) |
15135 | fprintf (file, _(" [VFP float format]")); | |
fde78edd NC |
15136 | else if (flags & EF_ARM_MAVERICK_FLOAT) |
15137 | fprintf (file, _(" [Maverick float format]")); | |
96a846ea RE |
15138 | else |
15139 | fprintf (file, _(" [FPA float format]")); | |
15140 | ||
fd2ec330 | 15141 | if (flags & EF_ARM_APCS_FLOAT) |
9b485d32 | 15142 | fprintf (file, _(" [floats passed in float registers]")); |
9a5aca8c | 15143 | |
fd2ec330 | 15144 | if (flags & EF_ARM_PIC) |
9b485d32 | 15145 | fprintf (file, _(" [position independent]")); |
fc830a83 | 15146 | |
fd2ec330 | 15147 | if (flags & EF_ARM_NEW_ABI) |
9b485d32 | 15148 | fprintf (file, _(" [new ABI]")); |
9a5aca8c | 15149 | |
fd2ec330 | 15150 | if (flags & EF_ARM_OLD_ABI) |
9b485d32 | 15151 | fprintf (file, _(" [old ABI]")); |
9a5aca8c | 15152 | |
fd2ec330 | 15153 | if (flags & EF_ARM_SOFT_FLOAT) |
9b485d32 | 15154 | fprintf (file, _(" [software FP]")); |
9a5aca8c | 15155 | |
96a846ea RE |
15156 | flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT |
15157 | | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI | |
fde78edd NC |
15158 | | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT |
15159 | | EF_ARM_MAVERICK_FLOAT); | |
fc830a83 | 15160 | break; |
9a5aca8c | 15161 | |
fc830a83 | 15162 | case EF_ARM_EABI_VER1: |
9b485d32 | 15163 | fprintf (file, _(" [Version1 EABI]")); |
9a5aca8c | 15164 | |
fc830a83 | 15165 | if (flags & EF_ARM_SYMSARESORTED) |
9b485d32 | 15166 | fprintf (file, _(" [sorted symbol table]")); |
fc830a83 | 15167 | else |
9b485d32 | 15168 | fprintf (file, _(" [unsorted symbol table]")); |
9a5aca8c | 15169 | |
fc830a83 NC |
15170 | flags &= ~ EF_ARM_SYMSARESORTED; |
15171 | break; | |
9a5aca8c | 15172 | |
fd2ec330 PB |
15173 | case EF_ARM_EABI_VER2: |
15174 | fprintf (file, _(" [Version2 EABI]")); | |
15175 | ||
15176 | if (flags & EF_ARM_SYMSARESORTED) | |
15177 | fprintf (file, _(" [sorted symbol table]")); | |
15178 | else | |
15179 | fprintf (file, _(" [unsorted symbol table]")); | |
15180 | ||
15181 | if (flags & EF_ARM_DYNSYMSUSESEGIDX) | |
15182 | fprintf (file, _(" [dynamic symbols use segment index]")); | |
15183 | ||
15184 | if (flags & EF_ARM_MAPSYMSFIRST) | |
15185 | fprintf (file, _(" [mapping symbols precede others]")); | |
15186 | ||
99e4ae17 | 15187 | flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX |
fd2ec330 PB |
15188 | | EF_ARM_MAPSYMSFIRST); |
15189 | break; | |
15190 | ||
d507cf36 PB |
15191 | case EF_ARM_EABI_VER3: |
15192 | fprintf (file, _(" [Version3 EABI]")); | |
8cb51566 PB |
15193 | break; |
15194 | ||
15195 | case EF_ARM_EABI_VER4: | |
15196 | fprintf (file, _(" [Version4 EABI]")); | |
3a4a14e9 | 15197 | goto eabi; |
d507cf36 | 15198 | |
3a4a14e9 PB |
15199 | case EF_ARM_EABI_VER5: |
15200 | fprintf (file, _(" [Version5 EABI]")); | |
3bfcb652 NC |
15201 | |
15202 | if (flags & EF_ARM_ABI_FLOAT_SOFT) | |
15203 | fprintf (file, _(" [soft-float ABI]")); | |
15204 | ||
15205 | if (flags & EF_ARM_ABI_FLOAT_HARD) | |
15206 | fprintf (file, _(" [hard-float ABI]")); | |
15207 | ||
15208 | flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD); | |
15209 | ||
3a4a14e9 | 15210 | eabi: |
d507cf36 PB |
15211 | if (flags & EF_ARM_BE8) |
15212 | fprintf (file, _(" [BE8]")); | |
15213 | ||
15214 | if (flags & EF_ARM_LE8) | |
15215 | fprintf (file, _(" [LE8]")); | |
15216 | ||
15217 | flags &= ~(EF_ARM_LE8 | EF_ARM_BE8); | |
15218 | break; | |
15219 | ||
fc830a83 | 15220 | default: |
9b485d32 | 15221 | fprintf (file, _(" <EABI version unrecognised>")); |
fc830a83 NC |
15222 | break; |
15223 | } | |
252b5132 | 15224 | |
fc830a83 | 15225 | flags &= ~ EF_ARM_EABIMASK; |
252b5132 | 15226 | |
fc830a83 | 15227 | if (flags & EF_ARM_RELEXEC) |
9b485d32 | 15228 | fprintf (file, _(" [relocatable executable]")); |
252b5132 | 15229 | |
18a20338 CL |
15230 | if (flags & EF_ARM_PIC) |
15231 | fprintf (file, _(" [position independent]")); | |
15232 | ||
15233 | if (elf_elfheader (abfd)->e_ident[EI_OSABI] == ELFOSABI_ARM_FDPIC) | |
15234 | fprintf (file, _(" [FDPIC ABI supplement]")); | |
15235 | ||
15236 | flags &= ~ (EF_ARM_RELEXEC | EF_ARM_PIC); | |
fc830a83 NC |
15237 | |
15238 | if (flags) | |
dbb078f6 | 15239 | fprintf (file, _(" <Unrecognised flag bits set>")); |
9a5aca8c | 15240 | |
252b5132 RH |
15241 | fputc ('\n', file); |
15242 | ||
0a1b45a2 | 15243 | return true; |
252b5132 RH |
15244 | } |
15245 | ||
15246 | static int | |
57e8b36a | 15247 | elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type) |
252b5132 | 15248 | { |
2f0ca46a NC |
15249 | switch (ELF_ST_TYPE (elf_sym->st_info)) |
15250 | { | |
15251 | case STT_ARM_TFUNC: | |
15252 | return ELF_ST_TYPE (elf_sym->st_info); | |
ce855c42 | 15253 | |
2f0ca46a NC |
15254 | case STT_ARM_16BIT: |
15255 | /* If the symbol is not an object, return the STT_ARM_16BIT flag. | |
15256 | This allows us to distinguish between data used by Thumb instructions | |
15257 | and non-data (which is probably code) inside Thumb regions of an | |
15258 | executable. */ | |
1a0eb693 | 15259 | if (type != STT_OBJECT && type != STT_TLS) |
2f0ca46a NC |
15260 | return ELF_ST_TYPE (elf_sym->st_info); |
15261 | break; | |
9a5aca8c | 15262 | |
ce855c42 NC |
15263 | default: |
15264 | break; | |
2f0ca46a NC |
15265 | } |
15266 | ||
15267 | return type; | |
252b5132 | 15268 | } |
f21f3fe0 | 15269 | |
252b5132 | 15270 | static asection * |
07adf181 AM |
15271 | elf32_arm_gc_mark_hook (asection *sec, |
15272 | struct bfd_link_info *info, | |
15273 | Elf_Internal_Rela *rel, | |
15274 | struct elf_link_hash_entry *h, | |
15275 | Elf_Internal_Sym *sym) | |
252b5132 RH |
15276 | { |
15277 | if (h != NULL) | |
07adf181 | 15278 | switch (ELF32_R_TYPE (rel->r_info)) |
252b5132 RH |
15279 | { |
15280 | case R_ARM_GNU_VTINHERIT: | |
15281 | case R_ARM_GNU_VTENTRY: | |
07adf181 AM |
15282 | return NULL; |
15283 | } | |
9ad5cbcf | 15284 | |
07adf181 | 15285 | return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym); |
252b5132 RH |
15286 | } |
15287 | ||
780a67af NC |
15288 | /* Look through the relocs for a section during the first phase. */ |
15289 | ||
0a1b45a2 | 15290 | static bool |
57e8b36a NC |
15291 | elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info, |
15292 | asection *sec, const Elf_Internal_Rela *relocs) | |
252b5132 | 15293 | { |
b34976b6 AM |
15294 | Elf_Internal_Shdr *symtab_hdr; |
15295 | struct elf_link_hash_entry **sym_hashes; | |
b34976b6 AM |
15296 | const Elf_Internal_Rela *rel; |
15297 | const Elf_Internal_Rela *rel_end; | |
15298 | bfd *dynobj; | |
5e681ec4 | 15299 | asection *sreloc; |
5e681ec4 | 15300 | struct elf32_arm_link_hash_table *htab; |
0a1b45a2 AM |
15301 | bool call_reloc_p; |
15302 | bool may_become_dynamic_p; | |
15303 | bool may_need_local_target_p; | |
ce98a316 | 15304 | unsigned long nsyms; |
9a5aca8c | 15305 | |
0e1862bb | 15306 | if (bfd_link_relocatable (info)) |
0a1b45a2 | 15307 | return true; |
9a5aca8c | 15308 | |
0ffa91dd NC |
15309 | BFD_ASSERT (is_arm_elf (abfd)); |
15310 | ||
5e681ec4 | 15311 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 | 15312 | if (htab == NULL) |
0a1b45a2 | 15313 | return false; |
4dfe6ac6 | 15314 | |
5e681ec4 | 15315 | sreloc = NULL; |
9a5aca8c | 15316 | |
67687978 PB |
15317 | /* Create dynamic sections for relocatable executables so that we can |
15318 | copy relocations. */ | |
15319 | if (htab->root.is_relocatable_executable | |
15320 | && ! htab->root.dynamic_sections_created) | |
15321 | { | |
15322 | if (! _bfd_elf_link_create_dynamic_sections (abfd, info)) | |
0a1b45a2 | 15323 | return false; |
67687978 PB |
15324 | } |
15325 | ||
cbc704f3 RS |
15326 | if (htab->root.dynobj == NULL) |
15327 | htab->root.dynobj = abfd; | |
34e77a92 | 15328 | if (!create_ifunc_sections (info)) |
0a1b45a2 | 15329 | return false; |
cbc704f3 RS |
15330 | |
15331 | dynobj = htab->root.dynobj; | |
15332 | ||
0ffa91dd | 15333 | symtab_hdr = & elf_symtab_hdr (abfd); |
252b5132 | 15334 | sym_hashes = elf_sym_hashes (abfd); |
ce98a316 | 15335 | nsyms = NUM_SHDR_ENTRIES (symtab_hdr); |
b38cadfb | 15336 | |
252b5132 RH |
15337 | rel_end = relocs + sec->reloc_count; |
15338 | for (rel = relocs; rel < rel_end; rel++) | |
15339 | { | |
34e77a92 | 15340 | Elf_Internal_Sym *isym; |
252b5132 | 15341 | struct elf_link_hash_entry *h; |
b7693d02 | 15342 | struct elf32_arm_link_hash_entry *eh; |
d42c267e | 15343 | unsigned int r_symndx; |
eb043451 | 15344 | int r_type; |
9a5aca8c | 15345 | |
252b5132 | 15346 | r_symndx = ELF32_R_SYM (rel->r_info); |
eb043451 | 15347 | r_type = ELF32_R_TYPE (rel->r_info); |
eb043451 | 15348 | r_type = arm_real_reloc_type (htab, r_type); |
ba93b8ac | 15349 | |
ce98a316 NC |
15350 | if (r_symndx >= nsyms |
15351 | /* PR 9934: It is possible to have relocations that do not | |
15352 | refer to symbols, thus it is also possible to have an | |
15353 | object file containing relocations but no symbol table. */ | |
cf35638d | 15354 | && (r_symndx > STN_UNDEF || nsyms > 0)) |
ba93b8ac | 15355 | { |
871b3ab2 | 15356 | _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd, |
4eca0228 | 15357 | r_symndx); |
0a1b45a2 | 15358 | return false; |
ba93b8ac DJ |
15359 | } |
15360 | ||
34e77a92 RS |
15361 | h = NULL; |
15362 | isym = NULL; | |
15363 | if (nsyms > 0) | |
973a3492 | 15364 | { |
34e77a92 RS |
15365 | if (r_symndx < symtab_hdr->sh_info) |
15366 | { | |
15367 | /* A local symbol. */ | |
f1dfbfdb | 15368 | isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, |
34e77a92 RS |
15369 | abfd, r_symndx); |
15370 | if (isym == NULL) | |
0a1b45a2 | 15371 | return false; |
34e77a92 RS |
15372 | } |
15373 | else | |
15374 | { | |
15375 | h = sym_hashes[r_symndx - symtab_hdr->sh_info]; | |
15376 | while (h->root.type == bfd_link_hash_indirect | |
15377 | || h->root.type == bfd_link_hash_warning) | |
15378 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
15379 | } | |
973a3492 | 15380 | } |
9a5aca8c | 15381 | |
b7693d02 DJ |
15382 | eh = (struct elf32_arm_link_hash_entry *) h; |
15383 | ||
0a1b45a2 AM |
15384 | call_reloc_p = false; |
15385 | may_become_dynamic_p = false; | |
15386 | may_need_local_target_p = false; | |
f6e32f6d | 15387 | |
0855e32b NS |
15388 | /* Could be done earlier, if h were already available. */ |
15389 | r_type = elf32_arm_tls_transition (info, r_type, h); | |
eb043451 | 15390 | switch (r_type) |
99059e56 | 15391 | { |
e8b09b87 CL |
15392 | case R_ARM_GOTOFFFUNCDESC: |
15393 | { | |
15394 | if (h == NULL) | |
15395 | { | |
15396 | if (!elf32_arm_allocate_local_sym_info (abfd)) | |
0a1b45a2 | 15397 | return false; |
74fd118f NC |
15398 | if (r_symndx >= elf32_arm_num_entries (abfd)) |
15399 | return false; | |
cc850f74 NC |
15400 | elf32_arm_local_fdpic_cnts (abfd) [r_symndx].gotofffuncdesc_cnt += 1; |
15401 | elf32_arm_local_fdpic_cnts (abfd) [r_symndx].funcdesc_offset = -1; | |
e8b09b87 CL |
15402 | } |
15403 | else | |
15404 | { | |
15405 | eh->fdpic_cnts.gotofffuncdesc_cnt++; | |
15406 | } | |
15407 | } | |
15408 | break; | |
15409 | ||
15410 | case R_ARM_GOTFUNCDESC: | |
15411 | { | |
15412 | if (h == NULL) | |
15413 | { | |
15414 | /* Such a relocation is not supposed to be generated | |
cc850f74 | 15415 | by gcc on a static function. */ |
e8b09b87 | 15416 | /* Anyway if needed it could be handled. */ |
cc850f74 | 15417 | return false; |
e8b09b87 CL |
15418 | } |
15419 | else | |
15420 | { | |
15421 | eh->fdpic_cnts.gotfuncdesc_cnt++; | |
15422 | } | |
15423 | } | |
15424 | break; | |
15425 | ||
15426 | case R_ARM_FUNCDESC: | |
15427 | { | |
15428 | if (h == NULL) | |
15429 | { | |
15430 | if (!elf32_arm_allocate_local_sym_info (abfd)) | |
0a1b45a2 | 15431 | return false; |
74fd118f NC |
15432 | if (r_symndx >= elf32_arm_num_entries (abfd)) |
15433 | return false; | |
cc850f74 NC |
15434 | elf32_arm_local_fdpic_cnts (abfd) [r_symndx].funcdesc_cnt += 1; |
15435 | elf32_arm_local_fdpic_cnts (abfd) [r_symndx].funcdesc_offset = -1; | |
e8b09b87 CL |
15436 | } |
15437 | else | |
15438 | { | |
15439 | eh->fdpic_cnts.funcdesc_cnt++; | |
15440 | } | |
15441 | } | |
15442 | break; | |
15443 | ||
5e681ec4 | 15444 | case R_ARM_GOT32: |
eb043451 | 15445 | case R_ARM_GOT_PREL: |
ba93b8ac | 15446 | case R_ARM_TLS_GD32: |
5c5a4843 | 15447 | case R_ARM_TLS_GD32_FDPIC: |
ba93b8ac | 15448 | case R_ARM_TLS_IE32: |
5c5a4843 | 15449 | case R_ARM_TLS_IE32_FDPIC: |
0855e32b NS |
15450 | case R_ARM_TLS_GOTDESC: |
15451 | case R_ARM_TLS_DESCSEQ: | |
15452 | case R_ARM_THM_TLS_DESCSEQ: | |
15453 | case R_ARM_TLS_CALL: | |
15454 | case R_ARM_THM_TLS_CALL: | |
5e681ec4 | 15455 | /* This symbol requires a global offset table entry. */ |
ba93b8ac DJ |
15456 | { |
15457 | int tls_type, old_tls_type; | |
5e681ec4 | 15458 | |
ba93b8ac DJ |
15459 | switch (r_type) |
15460 | { | |
15461 | case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break; | |
5c5a4843 | 15462 | case R_ARM_TLS_GD32_FDPIC: tls_type = GOT_TLS_GD; break; |
b38cadfb | 15463 | |
ba93b8ac | 15464 | case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break; |
5c5a4843 | 15465 | case R_ARM_TLS_IE32_FDPIC: tls_type = GOT_TLS_IE; break; |
b38cadfb | 15466 | |
0855e32b NS |
15467 | case R_ARM_TLS_GOTDESC: |
15468 | case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL: | |
15469 | case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ: | |
15470 | tls_type = GOT_TLS_GDESC; break; | |
b38cadfb | 15471 | |
ba93b8ac DJ |
15472 | default: tls_type = GOT_NORMAL; break; |
15473 | } | |
252b5132 | 15474 | |
0e1862bb | 15475 | if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE)) |
eea6dad2 KM |
15476 | info->flags |= DF_STATIC_TLS; |
15477 | ||
ba93b8ac DJ |
15478 | if (h != NULL) |
15479 | { | |
15480 | h->got.refcount++; | |
15481 | old_tls_type = elf32_arm_hash_entry (h)->tls_type; | |
15482 | } | |
15483 | else | |
15484 | { | |
ba93b8ac | 15485 | /* This is a global offset table entry for a local symbol. */ |
34e77a92 | 15486 | if (!elf32_arm_allocate_local_sym_info (abfd)) |
0a1b45a2 | 15487 | return false; |
74fd118f NC |
15488 | if (r_symndx >= elf32_arm_num_entries (abfd)) |
15489 | { | |
15490 | _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd, | |
15491 | r_symndx); | |
15492 | return false; | |
15493 | } | |
15494 | ||
34e77a92 | 15495 | elf_local_got_refcounts (abfd)[r_symndx] += 1; |
ba93b8ac DJ |
15496 | old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx]; |
15497 | } | |
15498 | ||
0855e32b | 15499 | /* If a variable is accessed with both tls methods, two |
99059e56 | 15500 | slots may be created. */ |
0855e32b NS |
15501 | if (GOT_TLS_GD_ANY_P (old_tls_type) |
15502 | && GOT_TLS_GD_ANY_P (tls_type)) | |
15503 | tls_type |= old_tls_type; | |
15504 | ||
15505 | /* We will already have issued an error message if there | |
15506 | is a TLS/non-TLS mismatch, based on the symbol | |
15507 | type. So just combine any TLS types needed. */ | |
ba93b8ac DJ |
15508 | if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL |
15509 | && tls_type != GOT_NORMAL) | |
15510 | tls_type |= old_tls_type; | |
15511 | ||
0855e32b | 15512 | /* If the symbol is accessed in both IE and GDESC |
99059e56 RM |
15513 | method, we're able to relax. Turn off the GDESC flag, |
15514 | without messing up with any other kind of tls types | |
6a631e86 | 15515 | that may be involved. */ |
0855e32b NS |
15516 | if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC)) |
15517 | tls_type &= ~GOT_TLS_GDESC; | |
15518 | ||
ba93b8ac DJ |
15519 | if (old_tls_type != tls_type) |
15520 | { | |
15521 | if (h != NULL) | |
15522 | elf32_arm_hash_entry (h)->tls_type = tls_type; | |
15523 | else | |
15524 | elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type; | |
15525 | } | |
15526 | } | |
8029a119 | 15527 | /* Fall through. */ |
ba93b8ac DJ |
15528 | |
15529 | case R_ARM_TLS_LDM32: | |
5c5a4843 CL |
15530 | case R_ARM_TLS_LDM32_FDPIC: |
15531 | if (r_type == R_ARM_TLS_LDM32 || r_type == R_ARM_TLS_LDM32_FDPIC) | |
ba93b8ac | 15532 | htab->tls_ldm_got.refcount++; |
8029a119 | 15533 | /* Fall through. */ |
252b5132 | 15534 | |
c19d1205 | 15535 | case R_ARM_GOTOFF32: |
5e681ec4 | 15536 | case R_ARM_GOTPC: |
cbc704f3 RS |
15537 | if (htab->root.sgot == NULL |
15538 | && !create_got_section (htab->root.dynobj, info)) | |
0a1b45a2 | 15539 | return false; |
252b5132 RH |
15540 | break; |
15541 | ||
252b5132 | 15542 | case R_ARM_PC24: |
7359ea65 | 15543 | case R_ARM_PLT32: |
5b5bb741 PB |
15544 | case R_ARM_CALL: |
15545 | case R_ARM_JUMP24: | |
eb043451 | 15546 | case R_ARM_PREL31: |
c19d1205 | 15547 | case R_ARM_THM_CALL: |
bd97cb95 DJ |
15548 | case R_ARM_THM_JUMP24: |
15549 | case R_ARM_THM_JUMP19: | |
0a1b45a2 AM |
15550 | call_reloc_p = true; |
15551 | may_need_local_target_p = true; | |
f6e32f6d RS |
15552 | break; |
15553 | ||
15554 | case R_ARM_ABS12: | |
15555 | /* VxWorks uses dynamic R_ARM_ABS12 relocations for | |
15556 | ldr __GOTT_INDEX__ offsets. */ | |
90c14f0c | 15557 | if (htab->root.target_os != is_vxworks) |
f6e32f6d | 15558 | { |
0a1b45a2 | 15559 | may_need_local_target_p = true; |
f6e32f6d RS |
15560 | break; |
15561 | } | |
aebf9be7 | 15562 | else goto jump_over; |
9eaff861 | 15563 | |
f6e32f6d | 15564 | /* Fall through. */ |
39623e12 | 15565 | |
96c23d59 JM |
15566 | case R_ARM_MOVW_ABS_NC: |
15567 | case R_ARM_MOVT_ABS: | |
15568 | case R_ARM_THM_MOVW_ABS_NC: | |
15569 | case R_ARM_THM_MOVT_ABS: | |
0e1862bb | 15570 | if (bfd_link_pic (info)) |
96c23d59 | 15571 | { |
4eca0228 | 15572 | _bfd_error_handler |
871b3ab2 | 15573 | (_("%pB: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"), |
96c23d59 JM |
15574 | abfd, elf32_arm_howto_table_1[r_type].name, |
15575 | (h) ? h->root.root.string : "a local symbol"); | |
15576 | bfd_set_error (bfd_error_bad_value); | |
0a1b45a2 | 15577 | return false; |
96c23d59 JM |
15578 | } |
15579 | ||
15580 | /* Fall through. */ | |
39623e12 PB |
15581 | case R_ARM_ABS32: |
15582 | case R_ARM_ABS32_NOI: | |
aebf9be7 | 15583 | jump_over: |
0e1862bb | 15584 | if (h != NULL && bfd_link_executable (info)) |
97323ad1 WN |
15585 | { |
15586 | h->pointer_equality_needed = 1; | |
15587 | } | |
15588 | /* Fall through. */ | |
39623e12 PB |
15589 | case R_ARM_REL32: |
15590 | case R_ARM_REL32_NOI: | |
b6895b4f PB |
15591 | case R_ARM_MOVW_PREL_NC: |
15592 | case R_ARM_MOVT_PREL: | |
b6895b4f PB |
15593 | case R_ARM_THM_MOVW_PREL_NC: |
15594 | case R_ARM_THM_MOVT_PREL: | |
39623e12 | 15595 | |
b7693d02 | 15596 | /* Should the interworking branches be listed here? */ |
e8b09b87 CL |
15597 | if ((bfd_link_pic (info) || htab->root.is_relocatable_executable |
15598 | || htab->fdpic_p) | |
34e77a92 RS |
15599 | && (sec->flags & SEC_ALLOC) != 0) |
15600 | { | |
15601 | if (h == NULL | |
469a3493 | 15602 | && elf32_arm_howto_from_type (r_type)->pc_relative) |
34e77a92 RS |
15603 | { |
15604 | /* In shared libraries and relocatable executables, | |
15605 | we treat local relative references as calls; | |
15606 | see the related SYMBOL_CALLS_LOCAL code in | |
15607 | allocate_dynrelocs. */ | |
0a1b45a2 AM |
15608 | call_reloc_p = true; |
15609 | may_need_local_target_p = true; | |
34e77a92 RS |
15610 | } |
15611 | else | |
15612 | /* We are creating a shared library or relocatable | |
15613 | executable, and this is a reloc against a global symbol, | |
15614 | or a non-PC-relative reloc against a local symbol. | |
15615 | We may need to copy the reloc into the output. */ | |
0a1b45a2 | 15616 | may_become_dynamic_p = true; |
34e77a92 | 15617 | } |
f6e32f6d | 15618 | else |
0a1b45a2 | 15619 | may_need_local_target_p = true; |
252b5132 RH |
15620 | break; |
15621 | ||
99059e56 RM |
15622 | /* This relocation describes the C++ object vtable hierarchy. |
15623 | Reconstruct it for later use during GC. */ | |
15624 | case R_ARM_GNU_VTINHERIT: | |
15625 | if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset)) | |
0a1b45a2 | 15626 | return false; |
99059e56 RM |
15627 | break; |
15628 | ||
15629 | /* This relocation describes which C++ vtable entries are actually | |
15630 | used. Record for later use during GC. */ | |
15631 | case R_ARM_GNU_VTENTRY: | |
a0ea3a14 | 15632 | if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset)) |
0a1b45a2 | 15633 | return false; |
99059e56 RM |
15634 | break; |
15635 | } | |
f6e32f6d RS |
15636 | |
15637 | if (h != NULL) | |
15638 | { | |
15639 | if (call_reloc_p) | |
15640 | /* We may need a .plt entry if the function this reloc | |
15641 | refers to is in a different object, regardless of the | |
15642 | symbol's type. We can't tell for sure yet, because | |
15643 | something later might force the symbol local. */ | |
15644 | h->needs_plt = 1; | |
15645 | else if (may_need_local_target_p) | |
15646 | /* If this reloc is in a read-only section, we might | |
15647 | need a copy reloc. We can't check reliably at this | |
15648 | stage whether the section is read-only, as input | |
15649 | sections have not yet been mapped to output sections. | |
15650 | Tentatively set the flag for now, and correct in | |
15651 | adjust_dynamic_symbol. */ | |
15652 | h->non_got_ref = 1; | |
15653 | } | |
15654 | ||
34e77a92 RS |
15655 | if (may_need_local_target_p |
15656 | && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)) | |
f6e32f6d | 15657 | { |
34e77a92 RS |
15658 | union gotplt_union *root_plt; |
15659 | struct arm_plt_info *arm_plt; | |
15660 | struct arm_local_iplt_info *local_iplt; | |
15661 | ||
15662 | if (h != NULL) | |
15663 | { | |
15664 | root_plt = &h->plt; | |
15665 | arm_plt = &eh->plt; | |
15666 | } | |
15667 | else | |
15668 | { | |
15669 | local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx); | |
15670 | if (local_iplt == NULL) | |
0a1b45a2 | 15671 | return false; |
34e77a92 RS |
15672 | root_plt = &local_iplt->root; |
15673 | arm_plt = &local_iplt->arm; | |
15674 | } | |
15675 | ||
f6e32f6d RS |
15676 | /* If the symbol is a function that doesn't bind locally, |
15677 | this relocation will need a PLT entry. */ | |
a8c887dd NC |
15678 | if (root_plt->refcount != -1) |
15679 | root_plt->refcount += 1; | |
34e77a92 RS |
15680 | |
15681 | if (!call_reloc_p) | |
15682 | arm_plt->noncall_refcount++; | |
f6e32f6d RS |
15683 | |
15684 | /* It's too early to use htab->use_blx here, so we have to | |
15685 | record possible blx references separately from | |
15686 | relocs that definitely need a thumb stub. */ | |
15687 | ||
15688 | if (r_type == R_ARM_THM_CALL) | |
34e77a92 | 15689 | arm_plt->maybe_thumb_refcount += 1; |
f6e32f6d RS |
15690 | |
15691 | if (r_type == R_ARM_THM_JUMP24 | |
15692 | || r_type == R_ARM_THM_JUMP19) | |
34e77a92 | 15693 | arm_plt->thumb_refcount += 1; |
f6e32f6d RS |
15694 | } |
15695 | ||
15696 | if (may_become_dynamic_p) | |
15697 | { | |
15698 | struct elf_dyn_relocs *p, **head; | |
15699 | ||
15700 | /* Create a reloc section in dynobj. */ | |
15701 | if (sreloc == NULL) | |
15702 | { | |
15703 | sreloc = _bfd_elf_make_dynamic_reloc_section | |
15704 | (sec, dynobj, 2, abfd, ! htab->use_rel); | |
15705 | ||
15706 | if (sreloc == NULL) | |
0a1b45a2 | 15707 | return false; |
f6e32f6d RS |
15708 | } |
15709 | ||
15710 | /* If this is a global symbol, count the number of | |
15711 | relocations we need for this symbol. */ | |
15712 | if (h != NULL) | |
190eb1dd | 15713 | head = &h->dyn_relocs; |
f6e32f6d RS |
15714 | else |
15715 | { | |
34e77a92 RS |
15716 | head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym); |
15717 | if (head == NULL) | |
0a1b45a2 | 15718 | return false; |
f6e32f6d RS |
15719 | } |
15720 | ||
15721 | p = *head; | |
15722 | if (p == NULL || p->sec != sec) | |
15723 | { | |
986f0783 | 15724 | size_t amt = sizeof *p; |
f6e32f6d RS |
15725 | |
15726 | p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt); | |
15727 | if (p == NULL) | |
0a1b45a2 | 15728 | return false; |
f6e32f6d RS |
15729 | p->next = *head; |
15730 | *head = p; | |
15731 | p->sec = sec; | |
15732 | p->count = 0; | |
15733 | p->pc_count = 0; | |
15734 | } | |
15735 | ||
469a3493 | 15736 | if (elf32_arm_howto_from_type (r_type)->pc_relative) |
f6e32f6d RS |
15737 | p->pc_count += 1; |
15738 | p->count += 1; | |
cc850f74 NC |
15739 | if (h == NULL && htab->fdpic_p && !bfd_link_pic (info) |
15740 | && r_type != R_ARM_ABS32 && r_type != R_ARM_ABS32_NOI) | |
15741 | { | |
15742 | /* Here we only support R_ARM_ABS32 and R_ARM_ABS32_NOI | |
15743 | that will become rofixup. */ | |
15744 | /* This is due to the fact that we suppose all will become rofixup. */ | |
15745 | _bfd_error_handler | |
15746 | (_("FDPIC does not yet support %s relocation" | |
15747 | " to become dynamic for executable"), | |
15748 | elf32_arm_howto_table_1[r_type].name); | |
15749 | abort (); | |
15750 | } | |
f6e32f6d | 15751 | } |
252b5132 | 15752 | } |
f21f3fe0 | 15753 | |
0a1b45a2 | 15754 | return true; |
252b5132 RH |
15755 | } |
15756 | ||
9eaff861 AO |
15757 | static void |
15758 | elf32_arm_update_relocs (asection *o, | |
15759 | struct bfd_elf_section_reloc_data *reldata) | |
15760 | { | |
15761 | void (*swap_in) (bfd *, const bfd_byte *, Elf_Internal_Rela *); | |
15762 | void (*swap_out) (bfd *, const Elf_Internal_Rela *, bfd_byte *); | |
15763 | const struct elf_backend_data *bed; | |
15764 | _arm_elf_section_data *eado; | |
15765 | struct bfd_link_order *p; | |
15766 | bfd_byte *erela_head, *erela; | |
15767 | Elf_Internal_Rela *irela_head, *irela; | |
15768 | Elf_Internal_Shdr *rel_hdr; | |
15769 | bfd *abfd; | |
15770 | unsigned int count; | |
15771 | ||
15772 | eado = get_arm_elf_section_data (o); | |
15773 | ||
15774 | if (!eado || eado->elf.this_hdr.sh_type != SHT_ARM_EXIDX) | |
15775 | return; | |
15776 | ||
15777 | abfd = o->owner; | |
15778 | bed = get_elf_backend_data (abfd); | |
15779 | rel_hdr = reldata->hdr; | |
15780 | ||
15781 | if (rel_hdr->sh_entsize == bed->s->sizeof_rel) | |
15782 | { | |
15783 | swap_in = bed->s->swap_reloc_in; | |
15784 | swap_out = bed->s->swap_reloc_out; | |
15785 | } | |
15786 | else if (rel_hdr->sh_entsize == bed->s->sizeof_rela) | |
15787 | { | |
15788 | swap_in = bed->s->swap_reloca_in; | |
15789 | swap_out = bed->s->swap_reloca_out; | |
15790 | } | |
15791 | else | |
15792 | abort (); | |
15793 | ||
15794 | erela_head = rel_hdr->contents; | |
15795 | irela_head = (Elf_Internal_Rela *) bfd_zmalloc | |
15796 | ((NUM_SHDR_ENTRIES (rel_hdr) + 1) * sizeof (*irela_head)); | |
15797 | ||
15798 | erela = erela_head; | |
15799 | irela = irela_head; | |
15800 | count = 0; | |
15801 | ||
15802 | for (p = o->map_head.link_order; p; p = p->next) | |
15803 | { | |
15804 | if (p->type == bfd_section_reloc_link_order | |
15805 | || p->type == bfd_symbol_reloc_link_order) | |
15806 | { | |
15807 | (*swap_in) (abfd, erela, irela); | |
15808 | erela += rel_hdr->sh_entsize; | |
15809 | irela++; | |
15810 | count++; | |
15811 | } | |
15812 | else if (p->type == bfd_indirect_link_order) | |
15813 | { | |
15814 | struct bfd_elf_section_reloc_data *input_reldata; | |
15815 | arm_unwind_table_edit *edit_list, *edit_tail; | |
15816 | _arm_elf_section_data *eadi; | |
15817 | bfd_size_type j; | |
15818 | bfd_vma offset; | |
15819 | asection *i; | |
15820 | ||
15821 | i = p->u.indirect.section; | |
15822 | ||
15823 | eadi = get_arm_elf_section_data (i); | |
15824 | edit_list = eadi->u.exidx.unwind_edit_list; | |
15825 | edit_tail = eadi->u.exidx.unwind_edit_tail; | |
539300fb | 15826 | offset = i->output_offset; |
9eaff861 AO |
15827 | |
15828 | if (eadi->elf.rel.hdr && | |
15829 | eadi->elf.rel.hdr->sh_entsize == rel_hdr->sh_entsize) | |
15830 | input_reldata = &eadi->elf.rel; | |
15831 | else if (eadi->elf.rela.hdr && | |
15832 | eadi->elf.rela.hdr->sh_entsize == rel_hdr->sh_entsize) | |
15833 | input_reldata = &eadi->elf.rela; | |
15834 | else | |
15835 | abort (); | |
15836 | ||
15837 | if (edit_list) | |
15838 | { | |
15839 | for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++) | |
15840 | { | |
15841 | arm_unwind_table_edit *edit_node, *edit_next; | |
15842 | bfd_vma bias; | |
c48182bf | 15843 | bfd_vma reloc_index; |
9eaff861 AO |
15844 | |
15845 | (*swap_in) (abfd, erela, irela); | |
c48182bf | 15846 | reloc_index = (irela->r_offset - offset) / 8; |
9eaff861 AO |
15847 | |
15848 | bias = 0; | |
15849 | edit_node = edit_list; | |
15850 | for (edit_next = edit_list; | |
c48182bf | 15851 | edit_next && edit_next->index <= reloc_index; |
9eaff861 AO |
15852 | edit_next = edit_node->next) |
15853 | { | |
15854 | bias++; | |
15855 | edit_node = edit_next; | |
15856 | } | |
15857 | ||
15858 | if (edit_node->type != DELETE_EXIDX_ENTRY | |
c48182bf | 15859 | || edit_node->index != reloc_index) |
9eaff861 AO |
15860 | { |
15861 | irela->r_offset -= bias * 8; | |
15862 | irela++; | |
15863 | count++; | |
15864 | } | |
15865 | ||
15866 | erela += rel_hdr->sh_entsize; | |
15867 | } | |
15868 | ||
15869 | if (edit_tail->type == INSERT_EXIDX_CANTUNWIND_AT_END) | |
15870 | { | |
15871 | /* New relocation entity. */ | |
15872 | asection *text_sec = edit_tail->linked_section; | |
15873 | asection *text_out = text_sec->output_section; | |
15874 | bfd_vma exidx_offset = offset + i->size - 8; | |
15875 | ||
15876 | irela->r_addend = 0; | |
15877 | irela->r_offset = exidx_offset; | |
15878 | irela->r_info = ELF32_R_INFO | |
15879 | (text_out->target_index, R_ARM_PREL31); | |
15880 | irela++; | |
15881 | count++; | |
15882 | } | |
15883 | } | |
15884 | else | |
15885 | { | |
15886 | for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++) | |
15887 | { | |
15888 | (*swap_in) (abfd, erela, irela); | |
15889 | erela += rel_hdr->sh_entsize; | |
15890 | irela++; | |
15891 | } | |
15892 | ||
15893 | count += NUM_SHDR_ENTRIES (input_reldata->hdr); | |
15894 | } | |
15895 | } | |
15896 | } | |
15897 | ||
15898 | reldata->count = count; | |
15899 | rel_hdr->sh_size = count * rel_hdr->sh_entsize; | |
15900 | ||
15901 | erela = erela_head; | |
15902 | irela = irela_head; | |
15903 | while (count > 0) | |
15904 | { | |
15905 | (*swap_out) (abfd, irela, erela); | |
15906 | erela += rel_hdr->sh_entsize; | |
15907 | irela++; | |
15908 | count--; | |
15909 | } | |
15910 | ||
15911 | free (irela_head); | |
15912 | ||
15913 | /* Hashes are no longer valid. */ | |
15914 | free (reldata->hashes); | |
15915 | reldata->hashes = NULL; | |
15916 | } | |
15917 | ||
6a5bb875 | 15918 | /* Unwinding tables are not referenced directly. This pass marks them as |
4ba2ef8f TP |
15919 | required if the corresponding code section is marked. Similarly, ARMv8-M |
15920 | secure entry functions can only be referenced by SG veneers which are | |
15921 | created after the GC process. They need to be marked in case they reside in | |
15922 | their own section (as would be the case if code was compiled with | |
15923 | -ffunction-sections). */ | |
6a5bb875 | 15924 | |
0a1b45a2 | 15925 | static bool |
906e58ca NC |
15926 | elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info, |
15927 | elf_gc_mark_hook_fn gc_mark_hook) | |
6a5bb875 PB |
15928 | { |
15929 | bfd *sub; | |
15930 | Elf_Internal_Shdr **elf_shdrp; | |
4ba2ef8f TP |
15931 | asection *cmse_sec; |
15932 | obj_attribute *out_attr; | |
15933 | Elf_Internal_Shdr *symtab_hdr; | |
15934 | unsigned i, sym_count, ext_start; | |
15935 | const struct elf_backend_data *bed; | |
15936 | struct elf_link_hash_entry **sym_hashes; | |
15937 | struct elf32_arm_link_hash_entry *cmse_hash; | |
0a1b45a2 AM |
15938 | bool again, is_v8m, first_bfd_browse = true; |
15939 | bool debug_sec_need_to_be_marked = false; | |
bb32413f | 15940 | asection *isec; |
6a5bb875 | 15941 | |
7f6ab9f8 AM |
15942 | _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook); |
15943 | ||
4ba2ef8f TP |
15944 | out_attr = elf_known_obj_attributes_proc (info->output_bfd); |
15945 | is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE | |
15946 | && out_attr[Tag_CPU_arch_profile].i == 'M'; | |
15947 | ||
6a5bb875 PB |
15948 | /* Marking EH data may cause additional code sections to be marked, |
15949 | requiring multiple passes. */ | |
0a1b45a2 | 15950 | again = true; |
6a5bb875 PB |
15951 | while (again) |
15952 | { | |
0a1b45a2 | 15953 | again = false; |
c72f2fb2 | 15954 | for (sub = info->input_bfds; sub != NULL; sub = sub->link.next) |
6a5bb875 PB |
15955 | { |
15956 | asection *o; | |
15957 | ||
0ffa91dd | 15958 | if (! is_arm_elf (sub)) |
6a5bb875 PB |
15959 | continue; |
15960 | ||
15961 | elf_shdrp = elf_elfsections (sub); | |
15962 | for (o = sub->sections; o != NULL; o = o->next) | |
15963 | { | |
15964 | Elf_Internal_Shdr *hdr; | |
0ffa91dd | 15965 | |
6a5bb875 | 15966 | hdr = &elf_section_data (o)->this_hdr; |
4fbb74a6 AM |
15967 | if (hdr->sh_type == SHT_ARM_EXIDX |
15968 | && hdr->sh_link | |
15969 | && hdr->sh_link < elf_numsections (sub) | |
6a5bb875 PB |
15970 | && !o->gc_mark |
15971 | && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark) | |
15972 | { | |
0a1b45a2 | 15973 | again = true; |
6a5bb875 | 15974 | if (!_bfd_elf_gc_mark (info, o, gc_mark_hook)) |
0a1b45a2 | 15975 | return false; |
6a5bb875 PB |
15976 | } |
15977 | } | |
4ba2ef8f TP |
15978 | |
15979 | /* Mark section holding ARMv8-M secure entry functions. We mark all | |
15980 | of them so no need for a second browsing. */ | |
15981 | if (is_v8m && first_bfd_browse) | |
15982 | { | |
15983 | sym_hashes = elf_sym_hashes (sub); | |
15984 | bed = get_elf_backend_data (sub); | |
15985 | symtab_hdr = &elf_tdata (sub)->symtab_hdr; | |
15986 | sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym; | |
15987 | ext_start = symtab_hdr->sh_info; | |
15988 | ||
15989 | /* Scan symbols. */ | |
15990 | for (i = ext_start; i < sym_count; i++) | |
15991 | { | |
15992 | cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]); | |
83f18e5e NC |
15993 | if (cmse_hash == NULL) |
15994 | continue; | |
4ba2ef8f TP |
15995 | |
15996 | /* Assume it is a special symbol. If not, cmse_scan will | |
15997 | warn about it and user can do something about it. */ | |
08dedd66 | 15998 | if (startswith (cmse_hash->root.root.root.string, |
baf46cd7 | 15999 | CMSE_PREFIX)) |
4ba2ef8f TP |
16000 | { |
16001 | cmse_sec = cmse_hash->root.root.u.def.section; | |
5025eb7c AO |
16002 | if (!cmse_sec->gc_mark |
16003 | && !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook)) | |
0a1b45a2 | 16004 | return false; |
bb32413f SP |
16005 | /* The debug sections related to these secure entry |
16006 | functions are marked on enabling below flag. */ | |
0a1b45a2 | 16007 | debug_sec_need_to_be_marked = true; |
4ba2ef8f TP |
16008 | } |
16009 | } | |
bb32413f SP |
16010 | |
16011 | if (debug_sec_need_to_be_marked) | |
16012 | { | |
16013 | /* Looping over all the sections of the object file containing | |
16014 | Armv8-M secure entry functions and marking all the debug | |
16015 | sections. */ | |
16016 | for (isec = sub->sections; isec != NULL; isec = isec->next) | |
16017 | { | |
16018 | /* If not a debug sections, skip it. */ | |
16019 | if (!isec->gc_mark && (isec->flags & SEC_DEBUGGING)) | |
16020 | isec->gc_mark = 1 ; | |
16021 | } | |
0a1b45a2 | 16022 | debug_sec_need_to_be_marked = false; |
bb32413f | 16023 | } |
4ba2ef8f | 16024 | } |
6a5bb875 | 16025 | } |
0a1b45a2 | 16026 | first_bfd_browse = false; |
6a5bb875 PB |
16027 | } |
16028 | ||
0a1b45a2 | 16029 | return true; |
6a5bb875 PB |
16030 | } |
16031 | ||
3c9458e9 NC |
16032 | /* Treat mapping symbols as special target symbols. */ |
16033 | ||
0a1b45a2 | 16034 | static bool |
3c9458e9 NC |
16035 | elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym) |
16036 | { | |
b0796911 PB |
16037 | return bfd_is_arm_special_symbol_name (sym->name, |
16038 | BFD_ARM_SPECIAL_SYM_TYPE_ANY); | |
3c9458e9 NC |
16039 | } |
16040 | ||
e7679060 AM |
16041 | /* If the ELF symbol SYM might be a function in SEC, return the |
16042 | function size and set *CODE_OFF to the function's entry point, | |
16043 | otherwise return zero. */ | |
252b5132 | 16044 | |
e7679060 AM |
16045 | static bfd_size_type |
16046 | elf32_arm_maybe_function_sym (const asymbol *sym, asection *sec, | |
16047 | bfd_vma *code_off) | |
16048 | { | |
16049 | bfd_size_type size; | |
24aebc79 | 16050 | elf_symbol_type * elf_sym = (elf_symbol_type *) sym; |
252b5132 | 16051 | |
e7679060 AM |
16052 | if ((sym->flags & (BSF_SECTION_SYM | BSF_FILE | BSF_OBJECT |
16053 | | BSF_THREAD_LOCAL | BSF_RELC | BSF_SRELC)) != 0 | |
16054 | || sym->section != sec) | |
16055 | return 0; | |
252b5132 | 16056 | |
24aebc79 NC |
16057 | size = (sym->flags & BSF_SYNTHETIC) ? 0 : elf_sym->internal_elf_sym.st_size; |
16058 | ||
e7679060 | 16059 | if (!(sym->flags & BSF_SYNTHETIC)) |
24aebc79 | 16060 | switch (ELF_ST_TYPE (elf_sym->internal_elf_sym.st_info)) |
e7679060 | 16061 | { |
24aebc79 NC |
16062 | case STT_NOTYPE: |
16063 | /* Ignore symbols created by the annobin plugin for gcc and clang. | |
16064 | These symbols are hidden, local, notype and have a size of 0. */ | |
16065 | if (size == 0 | |
16066 | && sym->flags & BSF_LOCAL | |
16067 | && ELF_ST_VISIBILITY (elf_sym->internal_elf_sym.st_other) == STV_HIDDEN) | |
16068 | return 0; | |
16069 | /* Fall through. */ | |
252b5132 RH |
16070 | case STT_FUNC: |
16071 | case STT_ARM_TFUNC: | |
24aebc79 | 16072 | /* FIXME: Allow STT_GNU_IFUNC as well ? */ |
252b5132 | 16073 | break; |
e7679060 AM |
16074 | default: |
16075 | return 0; | |
16076 | } | |
cc850f74 | 16077 | |
e7679060 AM |
16078 | if ((sym->flags & BSF_LOCAL) |
16079 | && bfd_is_arm_special_symbol_name (sym->name, | |
16080 | BFD_ARM_SPECIAL_SYM_TYPE_ANY)) | |
16081 | return 0; | |
0367ecfb | 16082 | |
e7679060 | 16083 | *code_off = sym->value; |
24aebc79 NC |
16084 | |
16085 | /* Do not return 0 for the function's size. */ | |
16086 | return size ? size : 1; | |
16087 | ||
252b5132 RH |
16088 | } |
16089 | ||
0a1b45a2 | 16090 | static bool |
07d6d2b8 | 16091 | elf32_arm_find_inliner_info (bfd * abfd, |
4ab527b0 FF |
16092 | const char ** filename_ptr, |
16093 | const char ** functionname_ptr, | |
16094 | unsigned int * line_ptr) | |
16095 | { | |
0a1b45a2 | 16096 | bool found; |
4ab527b0 FF |
16097 | found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr, |
16098 | functionname_ptr, line_ptr, | |
16099 | & elf_tdata (abfd)->dwarf2_find_line_info); | |
16100 | return found; | |
16101 | } | |
16102 | ||
252b5132 RH |
16103 | /* Adjust a symbol defined by a dynamic object and referenced by a |
16104 | regular object. The current definition is in some section of the | |
16105 | dynamic object, but we're not including those sections. We have to | |
16106 | change the definition to something the rest of the link can | |
16107 | understand. */ | |
16108 | ||
0a1b45a2 | 16109 | static bool |
57e8b36a NC |
16110 | elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info, |
16111 | struct elf_link_hash_entry * h) | |
252b5132 RH |
16112 | { |
16113 | bfd * dynobj; | |
5474d94f | 16114 | asection *s, *srel; |
b7693d02 | 16115 | struct elf32_arm_link_hash_entry * eh; |
67687978 | 16116 | struct elf32_arm_link_hash_table *globals; |
252b5132 | 16117 | |
67687978 | 16118 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 | 16119 | if (globals == NULL) |
0a1b45a2 | 16120 | return false; |
4dfe6ac6 | 16121 | |
252b5132 RH |
16122 | dynobj = elf_hash_table (info)->dynobj; |
16123 | ||
16124 | /* Make sure we know what is going on here. */ | |
16125 | BFD_ASSERT (dynobj != NULL | |
f5385ebf | 16126 | && (h->needs_plt |
34e77a92 | 16127 | || h->type == STT_GNU_IFUNC |
60d67dc8 | 16128 | || h->is_weakalias |
f5385ebf AM |
16129 | || (h->def_dynamic |
16130 | && h->ref_regular | |
16131 | && !h->def_regular))); | |
252b5132 | 16132 | |
b7693d02 DJ |
16133 | eh = (struct elf32_arm_link_hash_entry *) h; |
16134 | ||
252b5132 RH |
16135 | /* If this is a function, put it in the procedure linkage table. We |
16136 | will fill in the contents of the procedure linkage table later, | |
16137 | when we know the address of the .got section. */ | |
34e77a92 | 16138 | if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt) |
252b5132 | 16139 | { |
34e77a92 RS |
16140 | /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the |
16141 | symbol binds locally. */ | |
5e681ec4 | 16142 | if (h->plt.refcount <= 0 |
34e77a92 RS |
16143 | || (h->type != STT_GNU_IFUNC |
16144 | && (SYMBOL_CALLS_LOCAL (info, h) | |
16145 | || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT | |
16146 | && h->root.type == bfd_link_hash_undefweak)))) | |
252b5132 RH |
16147 | { |
16148 | /* This case can occur if we saw a PLT32 reloc in an input | |
5e681ec4 PB |
16149 | file, but the symbol was never referred to by a dynamic |
16150 | object, or if all references were garbage collected. In | |
16151 | such a case, we don't actually need to build a procedure | |
16152 | linkage table, and we can just do a PC24 reloc instead. */ | |
16153 | h->plt.offset = (bfd_vma) -1; | |
34e77a92 RS |
16154 | eh->plt.thumb_refcount = 0; |
16155 | eh->plt.maybe_thumb_refcount = 0; | |
16156 | eh->plt.noncall_refcount = 0; | |
f5385ebf | 16157 | h->needs_plt = 0; |
252b5132 RH |
16158 | } |
16159 | ||
0a1b45a2 | 16160 | return true; |
252b5132 | 16161 | } |
5e681ec4 | 16162 | else |
b7693d02 DJ |
16163 | { |
16164 | /* It's possible that we incorrectly decided a .plt reloc was | |
16165 | needed for an R_ARM_PC24 or similar reloc to a non-function sym | |
16166 | in check_relocs. We can't decide accurately between function | |
16167 | and non-function syms in check-relocs; Objects loaded later in | |
16168 | the link may change h->type. So fix it now. */ | |
16169 | h->plt.offset = (bfd_vma) -1; | |
34e77a92 RS |
16170 | eh->plt.thumb_refcount = 0; |
16171 | eh->plt.maybe_thumb_refcount = 0; | |
16172 | eh->plt.noncall_refcount = 0; | |
b7693d02 | 16173 | } |
252b5132 RH |
16174 | |
16175 | /* If this is a weak symbol, and there is a real definition, the | |
16176 | processor independent code will have arranged for us to see the | |
16177 | real definition first, and we can just use the same value. */ | |
60d67dc8 | 16178 | if (h->is_weakalias) |
252b5132 | 16179 | { |
60d67dc8 AM |
16180 | struct elf_link_hash_entry *def = weakdef (h); |
16181 | BFD_ASSERT (def->root.type == bfd_link_hash_defined); | |
16182 | h->root.u.def.section = def->root.u.def.section; | |
16183 | h->root.u.def.value = def->root.u.def.value; | |
0a1b45a2 | 16184 | return true; |
252b5132 RH |
16185 | } |
16186 | ||
ba93b8ac DJ |
16187 | /* If there are no non-GOT references, we do not need a copy |
16188 | relocation. */ | |
16189 | if (!h->non_got_ref) | |
0a1b45a2 | 16190 | return true; |
ba93b8ac | 16191 | |
252b5132 RH |
16192 | /* This is a reference to a symbol defined by a dynamic object which |
16193 | is not a function. */ | |
16194 | ||
16195 | /* If we are creating a shared library, we must presume that the | |
16196 | only references to the symbol are via the global offset table. | |
16197 | For such cases we need not do anything here; the relocations will | |
67687978 PB |
16198 | be handled correctly by relocate_section. Relocatable executables |
16199 | can reference data in shared objects directly, so we don't need to | |
16200 | do anything here. */ | |
0e1862bb | 16201 | if (bfd_link_pic (info) || globals->root.is_relocatable_executable) |
0a1b45a2 | 16202 | return true; |
252b5132 RH |
16203 | |
16204 | /* We must allocate the symbol in our .dynbss section, which will | |
16205 | become part of the .bss section of the executable. There will be | |
16206 | an entry for this symbol in the .dynsym section. The dynamic | |
16207 | object will contain position independent code, so all references | |
16208 | from the dynamic object to this symbol will go through the global | |
16209 | offset table. The dynamic linker will use the .dynsym entry to | |
16210 | determine the address it must put in the global offset table, so | |
16211 | both the dynamic object and the regular object will refer to the | |
16212 | same memory location for the variable. */ | |
5522f910 NC |
16213 | /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic |
16214 | linker to copy the initial value out of the dynamic object and into | |
16215 | the runtime process image. We need to remember the offset into the | |
00a97672 | 16216 | .rel(a).bss section we are going to use. */ |
5474d94f AM |
16217 | if ((h->root.u.def.section->flags & SEC_READONLY) != 0) |
16218 | { | |
16219 | s = globals->root.sdynrelro; | |
16220 | srel = globals->root.sreldynrelro; | |
16221 | } | |
16222 | else | |
16223 | { | |
16224 | s = globals->root.sdynbss; | |
16225 | srel = globals->root.srelbss; | |
16226 | } | |
5522f910 NC |
16227 | if (info->nocopyreloc == 0 |
16228 | && (h->root.u.def.section->flags & SEC_ALLOC) != 0 | |
5522f910 | 16229 | && h->size != 0) |
252b5132 | 16230 | { |
47beaa6a | 16231 | elf32_arm_allocate_dynrelocs (info, srel, 1); |
f5385ebf | 16232 | h->needs_copy = 1; |
252b5132 RH |
16233 | } |
16234 | ||
6cabe1ea | 16235 | return _bfd_elf_adjust_dynamic_copy (info, h, s); |
252b5132 RH |
16236 | } |
16237 | ||
5e681ec4 PB |
16238 | /* Allocate space in .plt, .got and associated reloc sections for |
16239 | dynamic relocs. */ | |
16240 | ||
0a1b45a2 | 16241 | static bool |
47beaa6a | 16242 | allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf) |
5e681ec4 PB |
16243 | { |
16244 | struct bfd_link_info *info; | |
16245 | struct elf32_arm_link_hash_table *htab; | |
16246 | struct elf32_arm_link_hash_entry *eh; | |
0bdcacaf | 16247 | struct elf_dyn_relocs *p; |
5e681ec4 PB |
16248 | |
16249 | if (h->root.type == bfd_link_hash_indirect) | |
0a1b45a2 | 16250 | return true; |
5e681ec4 | 16251 | |
e6a6bb22 AM |
16252 | eh = (struct elf32_arm_link_hash_entry *) h; |
16253 | ||
5e681ec4 PB |
16254 | info = (struct bfd_link_info *) inf; |
16255 | htab = elf32_arm_hash_table (info); | |
4dfe6ac6 | 16256 | if (htab == NULL) |
0a1b45a2 | 16257 | return false; |
5e681ec4 | 16258 | |
34e77a92 | 16259 | if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC) |
5e681ec4 PB |
16260 | && h->plt.refcount > 0) |
16261 | { | |
16262 | /* Make sure this symbol is output as a dynamic symbol. | |
16263 | Undefined weak syms won't yet be marked as dynamic. */ | |
6c699715 RL |
16264 | if (h->dynindx == -1 && !h->forced_local |
16265 | && h->root.type == bfd_link_hash_undefweak) | |
5e681ec4 | 16266 | { |
c152c796 | 16267 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) |
0a1b45a2 | 16268 | return false; |
5e681ec4 PB |
16269 | } |
16270 | ||
34e77a92 RS |
16271 | /* If the call in the PLT entry binds locally, the associated |
16272 | GOT entry should use an R_ARM_IRELATIVE relocation instead of | |
16273 | the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather | |
16274 | than the .plt section. */ | |
16275 | if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h)) | |
16276 | { | |
16277 | eh->is_iplt = 1; | |
16278 | if (eh->plt.noncall_refcount == 0 | |
16279 | && SYMBOL_REFERENCES_LOCAL (info, h)) | |
16280 | /* All non-call references can be resolved directly. | |
16281 | This means that they can (and in some cases, must) | |
16282 | resolve directly to the run-time target, rather than | |
16283 | to the PLT. That in turns means that any .got entry | |
16284 | would be equal to the .igot.plt entry, so there's | |
16285 | no point having both. */ | |
16286 | h->got.refcount = 0; | |
16287 | } | |
16288 | ||
0e1862bb | 16289 | if (bfd_link_pic (info) |
34e77a92 | 16290 | || eh->is_iplt |
7359ea65 | 16291 | || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h)) |
5e681ec4 | 16292 | { |
34e77a92 | 16293 | elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt); |
b7693d02 | 16294 | |
5e681ec4 PB |
16295 | /* If this symbol is not defined in a regular file, and we are |
16296 | not generating a shared library, then set the symbol to this | |
16297 | location in the .plt. This is required to make function | |
16298 | pointers compare as equal between the normal executable and | |
16299 | the shared library. */ | |
0e1862bb | 16300 | if (! bfd_link_pic (info) |
f5385ebf | 16301 | && !h->def_regular) |
5e681ec4 | 16302 | { |
34e77a92 | 16303 | h->root.u.def.section = htab->root.splt; |
5e681ec4 | 16304 | h->root.u.def.value = h->plt.offset; |
5e681ec4 | 16305 | |
67d74e43 DJ |
16306 | /* Make sure the function is not marked as Thumb, in case |
16307 | it is the target of an ABS32 relocation, which will | |
16308 | point to the PLT entry. */ | |
39d911fc | 16309 | ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM); |
67d74e43 | 16310 | } |
022f8312 | 16311 | |
00a97672 RS |
16312 | /* VxWorks executables have a second set of relocations for |
16313 | each PLT entry. They go in a separate relocation section, | |
16314 | which is processed by the kernel loader. */ | |
90c14f0c | 16315 | if (htab->root.target_os == is_vxworks && !bfd_link_pic (info)) |
00a97672 RS |
16316 | { |
16317 | /* There is a relocation for the initial PLT entry: | |
16318 | an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */ | |
16319 | if (h->plt.offset == htab->plt_header_size) | |
47beaa6a | 16320 | elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1); |
00a97672 RS |
16321 | |
16322 | /* There are two extra relocations for each subsequent | |
16323 | PLT entry: an R_ARM_32 relocation for the GOT entry, | |
16324 | and an R_ARM_32 relocation for the PLT entry. */ | |
47beaa6a | 16325 | elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2); |
00a97672 | 16326 | } |
5e681ec4 PB |
16327 | } |
16328 | else | |
16329 | { | |
16330 | h->plt.offset = (bfd_vma) -1; | |
f5385ebf | 16331 | h->needs_plt = 0; |
5e681ec4 PB |
16332 | } |
16333 | } | |
16334 | else | |
16335 | { | |
16336 | h->plt.offset = (bfd_vma) -1; | |
f5385ebf | 16337 | h->needs_plt = 0; |
5e681ec4 PB |
16338 | } |
16339 | ||
0855e32b NS |
16340 | eh = (struct elf32_arm_link_hash_entry *) h; |
16341 | eh->tlsdesc_got = (bfd_vma) -1; | |
16342 | ||
5e681ec4 PB |
16343 | if (h->got.refcount > 0) |
16344 | { | |
16345 | asection *s; | |
0a1b45a2 | 16346 | bool dyn; |
ba93b8ac DJ |
16347 | int tls_type = elf32_arm_hash_entry (h)->tls_type; |
16348 | int indx; | |
5e681ec4 PB |
16349 | |
16350 | /* Make sure this symbol is output as a dynamic symbol. | |
16351 | Undefined weak syms won't yet be marked as dynamic. */ | |
a57d1773 AM |
16352 | if (htab->root.dynamic_sections_created |
16353 | && h->dynindx == -1 | |
16354 | && !h->forced_local | |
6c699715 | 16355 | && h->root.type == bfd_link_hash_undefweak) |
5e681ec4 | 16356 | { |
c152c796 | 16357 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) |
0a1b45a2 | 16358 | return false; |
5e681ec4 PB |
16359 | } |
16360 | ||
a57d1773 AM |
16361 | s = htab->root.sgot; |
16362 | h->got.offset = s->size; | |
ba93b8ac | 16363 | |
a57d1773 AM |
16364 | if (tls_type == GOT_UNKNOWN) |
16365 | abort (); | |
ba93b8ac | 16366 | |
a57d1773 AM |
16367 | if (tls_type == GOT_NORMAL) |
16368 | /* Non-TLS symbols need one GOT slot. */ | |
16369 | s->size += 4; | |
16370 | else | |
16371 | { | |
16372 | if (tls_type & GOT_TLS_GDESC) | |
ba93b8ac | 16373 | { |
a57d1773 AM |
16374 | /* R_ARM_TLS_DESC needs 2 GOT slots. */ |
16375 | eh->tlsdesc_got | |
16376 | = (htab->root.sgotplt->size | |
16377 | - elf32_arm_compute_jump_table_size (htab)); | |
16378 | htab->root.sgotplt->size += 8; | |
16379 | h->got.offset = (bfd_vma) -2; | |
16380 | /* plt.got_offset needs to know there's a TLS_DESC | |
16381 | reloc in the middle of .got.plt. */ | |
16382 | htab->num_tls_desc++; | |
16383 | } | |
0855e32b | 16384 | |
a57d1773 AM |
16385 | if (tls_type & GOT_TLS_GD) |
16386 | { | |
16387 | /* R_ARM_TLS_GD32 and R_ARM_TLS_GD32_FDPIC need two | |
16388 | consecutive GOT slots. If the symbol is both GD | |
16389 | and GDESC, got.offset may have been | |
16390 | overwritten. */ | |
16391 | h->got.offset = s->size; | |
16392 | s->size += 8; | |
ba93b8ac DJ |
16393 | } |
16394 | ||
a57d1773 AM |
16395 | if (tls_type & GOT_TLS_IE) |
16396 | /* R_ARM_TLS_IE32/R_ARM_TLS_IE32_FDPIC need one GOT | |
16397 | slot. */ | |
16398 | s->size += 4; | |
16399 | } | |
ba93b8ac | 16400 | |
a57d1773 | 16401 | dyn = htab->root.dynamic_sections_created; |
ba93b8ac | 16402 | |
a57d1773 AM |
16403 | indx = 0; |
16404 | if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h) | |
16405 | && (!bfd_link_pic (info) | |
16406 | || !SYMBOL_REFERENCES_LOCAL (info, h))) | |
16407 | indx = h->dynindx; | |
ba93b8ac | 16408 | |
a57d1773 AM |
16409 | if (tls_type != GOT_NORMAL |
16410 | && (bfd_link_dll (info) || indx != 0) | |
16411 | && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT | |
16412 | || h->root.type != bfd_link_hash_undefweak)) | |
16413 | { | |
16414 | if (tls_type & GOT_TLS_IE) | |
16415 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); | |
ba93b8ac | 16416 | |
a57d1773 AM |
16417 | if (tls_type & GOT_TLS_GD) |
16418 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); | |
0855e32b | 16419 | |
a57d1773 | 16420 | if (tls_type & GOT_TLS_GDESC) |
b436d854 | 16421 | { |
a57d1773 AM |
16422 | elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1); |
16423 | /* GDESC needs a trampoline to jump to. */ | |
16424 | htab->tls_trampoline = -1; | |
b436d854 | 16425 | } |
a57d1773 AM |
16426 | |
16427 | /* Only GD needs it. GDESC just emits one relocation per | |
16428 | 2 entries. */ | |
16429 | if ((tls_type & GOT_TLS_GD) && indx != 0) | |
47beaa6a | 16430 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
e5a52504 | 16431 | } |
a57d1773 AM |
16432 | else if (((indx != -1) || htab->fdpic_p) |
16433 | && !SYMBOL_REFERENCES_LOCAL (info, h)) | |
16434 | { | |
16435 | if (htab->root.dynamic_sections_created) | |
16436 | /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */ | |
16437 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); | |
16438 | } | |
16439 | else if (h->type == STT_GNU_IFUNC | |
16440 | && eh->plt.noncall_refcount == 0) | |
16441 | /* No non-call references resolve the STT_GNU_IFUNC's PLT entry; | |
16442 | they all resolve dynamically instead. Reserve room for the | |
16443 | GOT entry's R_ARM_IRELATIVE relocation. */ | |
16444 | elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1); | |
16445 | else if (bfd_link_pic (info) | |
16446 | && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h)) | |
16447 | /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */ | |
16448 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); | |
16449 | else if (htab->fdpic_p && tls_type == GOT_NORMAL) | |
16450 | /* Reserve room for rofixup for FDPIC executable. */ | |
16451 | /* TLS relocs do not need space since they are completely | |
16452 | resolved. */ | |
16453 | htab->srofixup->size += 4; | |
5e681ec4 PB |
16454 | } |
16455 | else | |
16456 | h->got.offset = (bfd_vma) -1; | |
16457 | ||
e8b09b87 CL |
16458 | /* FDPIC support. */ |
16459 | if (eh->fdpic_cnts.gotofffuncdesc_cnt > 0) | |
16460 | { | |
16461 | /* Symbol musn't be exported. */ | |
16462 | if (h->dynindx != -1) | |
cc850f74 | 16463 | abort (); |
e8b09b87 | 16464 | |
a57d1773 AM |
16465 | /* We only allocate one function descriptor with its associated |
16466 | relocation. */ | |
e8b09b87 CL |
16467 | if (eh->fdpic_cnts.funcdesc_offset == -1) |
16468 | { | |
16469 | asection *s = htab->root.sgot; | |
16470 | ||
16471 | eh->fdpic_cnts.funcdesc_offset = s->size; | |
16472 | s->size += 8; | |
16473 | /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */ | |
cc850f74 | 16474 | if (bfd_link_pic (info)) |
e8b09b87 CL |
16475 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
16476 | else | |
16477 | htab->srofixup->size += 8; | |
16478 | } | |
16479 | } | |
16480 | ||
16481 | if (eh->fdpic_cnts.gotfuncdesc_cnt > 0) | |
16482 | { | |
16483 | asection *s = htab->root.sgot; | |
16484 | ||
16485 | if (htab->root.dynamic_sections_created && h->dynindx == -1 | |
16486 | && !h->forced_local) | |
16487 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) | |
0a1b45a2 | 16488 | return false; |
e8b09b87 CL |
16489 | |
16490 | if (h->dynindx == -1) | |
16491 | { | |
a57d1773 AM |
16492 | /* We only allocate one function descriptor with its |
16493 | associated relocation. */ | |
e8b09b87 CL |
16494 | if (eh->fdpic_cnts.funcdesc_offset == -1) |
16495 | { | |
16496 | ||
16497 | eh->fdpic_cnts.funcdesc_offset = s->size; | |
16498 | s->size += 8; | |
a57d1773 AM |
16499 | /* We will add an R_ARM_FUNCDESC_VALUE relocation or two |
16500 | rofixups. */ | |
cc850f74 | 16501 | if (bfd_link_pic (info)) |
e8b09b87 CL |
16502 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
16503 | else | |
16504 | htab->srofixup->size += 8; | |
16505 | } | |
16506 | } | |
16507 | ||
16508 | /* Add one entry into the GOT and a R_ARM_FUNCDESC or | |
16509 | R_ARM_RELATIVE/rofixup relocation on it. */ | |
16510 | eh->fdpic_cnts.gotfuncdesc_offset = s->size; | |
16511 | s->size += 4; | |
cc850f74 | 16512 | if (h->dynindx == -1 && !bfd_link_pic (info)) |
4b24dd1a | 16513 | htab->srofixup->size += 4; |
e8b09b87 | 16514 | else |
4b24dd1a | 16515 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
e8b09b87 CL |
16516 | } |
16517 | ||
16518 | if (eh->fdpic_cnts.funcdesc_cnt > 0) | |
16519 | { | |
16520 | if (htab->root.dynamic_sections_created && h->dynindx == -1 | |
16521 | && !h->forced_local) | |
16522 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) | |
0a1b45a2 | 16523 | return false; |
e8b09b87 CL |
16524 | |
16525 | if (h->dynindx == -1) | |
16526 | { | |
a57d1773 AM |
16527 | /* We only allocate one function descriptor with its |
16528 | associated relocation. */ | |
e8b09b87 CL |
16529 | if (eh->fdpic_cnts.funcdesc_offset == -1) |
16530 | { | |
16531 | asection *s = htab->root.sgot; | |
16532 | ||
16533 | eh->fdpic_cnts.funcdesc_offset = s->size; | |
16534 | s->size += 8; | |
a57d1773 AM |
16535 | /* We will add an R_ARM_FUNCDESC_VALUE relocation or two |
16536 | rofixups. */ | |
cc850f74 | 16537 | if (bfd_link_pic (info)) |
e8b09b87 CL |
16538 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
16539 | else | |
16540 | htab->srofixup->size += 8; | |
16541 | } | |
16542 | } | |
cc850f74 | 16543 | if (h->dynindx == -1 && !bfd_link_pic (info)) |
e8b09b87 CL |
16544 | { |
16545 | /* For FDPIC executable we replace R_ARM_RELATIVE with a rofixup. */ | |
16546 | htab->srofixup->size += 4 * eh->fdpic_cnts.funcdesc_cnt; | |
16547 | } | |
16548 | else | |
16549 | { | |
16550 | /* Will need one dynamic reloc per reference. will be either | |
16551 | R_ARM_FUNCDESC or R_ARM_RELATIVE for hidden symbols. */ | |
16552 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, | |
16553 | eh->fdpic_cnts.funcdesc_cnt); | |
16554 | } | |
16555 | } | |
16556 | ||
a4fd1a8e PB |
16557 | /* Allocate stubs for exported Thumb functions on v4t. */ |
16558 | if (!htab->use_blx && h->dynindx != -1 | |
0eaedd0e | 16559 | && h->def_regular |
39d911fc | 16560 | && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB |
a4fd1a8e PB |
16561 | && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT) |
16562 | { | |
16563 | struct elf_link_hash_entry * th; | |
16564 | struct bfd_link_hash_entry * bh; | |
16565 | struct elf_link_hash_entry * myh; | |
16566 | char name[1024]; | |
16567 | asection *s; | |
16568 | bh = NULL; | |
16569 | /* Create a new symbol to regist the real location of the function. */ | |
16570 | s = h->root.u.def.section; | |
906e58ca | 16571 | sprintf (name, "__real_%s", h->root.root.string); |
a4fd1a8e PB |
16572 | _bfd_generic_link_add_one_symbol (info, s->owner, |
16573 | name, BSF_GLOBAL, s, | |
16574 | h->root.u.def.value, | |
0a1b45a2 | 16575 | NULL, true, false, &bh); |
a4fd1a8e PB |
16576 | |
16577 | myh = (struct elf_link_hash_entry *) bh; | |
35fc36a8 | 16578 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); |
a4fd1a8e | 16579 | myh->forced_local = 1; |
39d911fc | 16580 | ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB); |
a4fd1a8e PB |
16581 | eh->export_glue = myh; |
16582 | th = record_arm_to_thumb_glue (info, h); | |
16583 | /* Point the symbol at the stub. */ | |
16584 | h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC); | |
39d911fc | 16585 | ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM); |
a4fd1a8e PB |
16586 | h->root.u.def.section = th->root.u.def.section; |
16587 | h->root.u.def.value = th->root.u.def.value & ~1; | |
16588 | } | |
16589 | ||
190eb1dd | 16590 | if (h->dyn_relocs == NULL) |
0a1b45a2 | 16591 | return true; |
5e681ec4 PB |
16592 | |
16593 | /* In the shared -Bsymbolic case, discard space allocated for | |
16594 | dynamic pc-relative relocs against symbols which turn out to be | |
16595 | defined in regular objects. For the normal shared case, discard | |
16596 | space for pc-relative relocs that have become local due to symbol | |
16597 | visibility changes. */ | |
16598 | ||
a57d1773 AM |
16599 | if (bfd_link_pic (info) |
16600 | || htab->root.is_relocatable_executable | |
16601 | || htab->fdpic_p) | |
5e681ec4 | 16602 | { |
469a3493 RM |
16603 | /* Relocs that use pc_count are PC-relative forms, which will appear |
16604 | on something like ".long foo - ." or "movw REG, foo - .". We want | |
16605 | calls to protected symbols to resolve directly to the function | |
16606 | rather than going via the plt. If people want function pointer | |
16607 | comparisons to work as expected then they should avoid writing | |
16608 | assembly like ".long foo - .". */ | |
ba93b8ac DJ |
16609 | if (SYMBOL_CALLS_LOCAL (info, h)) |
16610 | { | |
0bdcacaf | 16611 | struct elf_dyn_relocs **pp; |
ba93b8ac | 16612 | |
190eb1dd | 16613 | for (pp = &h->dyn_relocs; (p = *pp) != NULL; ) |
ba93b8ac DJ |
16614 | { |
16615 | p->count -= p->pc_count; | |
16616 | p->pc_count = 0; | |
16617 | if (p->count == 0) | |
16618 | *pp = p->next; | |
16619 | else | |
16620 | pp = &p->next; | |
16621 | } | |
16622 | } | |
16623 | ||
90c14f0c | 16624 | if (htab->root.target_os == is_vxworks) |
3348747a | 16625 | { |
0bdcacaf | 16626 | struct elf_dyn_relocs **pp; |
3348747a | 16627 | |
190eb1dd | 16628 | for (pp = &h->dyn_relocs; (p = *pp) != NULL; ) |
3348747a | 16629 | { |
0bdcacaf | 16630 | if (strcmp (p->sec->output_section->name, ".tls_vars") == 0) |
3348747a NS |
16631 | *pp = p->next; |
16632 | else | |
16633 | pp = &p->next; | |
16634 | } | |
16635 | } | |
16636 | ||
ba93b8ac | 16637 | /* Also discard relocs on undefined weak syms with non-default |
99059e56 | 16638 | visibility. */ |
190eb1dd | 16639 | if (h->dyn_relocs != NULL |
5e681ec4 | 16640 | && h->root.type == bfd_link_hash_undefweak) |
22d606e9 | 16641 | { |
95b03e4a L |
16642 | if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT |
16643 | || UNDEFWEAK_NO_DYNAMIC_RELOC (info, h)) | |
190eb1dd | 16644 | h->dyn_relocs = NULL; |
22d606e9 AM |
16645 | |
16646 | /* Make sure undefined weak symbols are output as a dynamic | |
16647 | symbol in PIEs. */ | |
e8b09b87 | 16648 | else if (htab->root.dynamic_sections_created && h->dynindx == -1 |
22d606e9 AM |
16649 | && !h->forced_local) |
16650 | { | |
16651 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) | |
0a1b45a2 | 16652 | return false; |
22d606e9 AM |
16653 | } |
16654 | } | |
16655 | ||
67687978 PB |
16656 | else if (htab->root.is_relocatable_executable && h->dynindx == -1 |
16657 | && h->root.type == bfd_link_hash_new) | |
16658 | { | |
16659 | /* Output absolute symbols so that we can create relocations | |
16660 | against them. For normal symbols we output a relocation | |
16661 | against the section that contains them. */ | |
16662 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) | |
0a1b45a2 | 16663 | return false; |
67687978 PB |
16664 | } |
16665 | ||
5e681ec4 PB |
16666 | } |
16667 | else | |
16668 | { | |
16669 | /* For the non-shared case, discard space for relocs against | |
16670 | symbols which turn out to need copy relocs or are not | |
16671 | dynamic. */ | |
16672 | ||
f5385ebf AM |
16673 | if (!h->non_got_ref |
16674 | && ((h->def_dynamic | |
16675 | && !h->def_regular) | |
5e681ec4 PB |
16676 | || (htab->root.dynamic_sections_created |
16677 | && (h->root.type == bfd_link_hash_undefweak | |
16678 | || h->root.type == bfd_link_hash_undefined)))) | |
16679 | { | |
16680 | /* Make sure this symbol is output as a dynamic symbol. | |
16681 | Undefined weak syms won't yet be marked as dynamic. */ | |
6c699715 RL |
16682 | if (h->dynindx == -1 && !h->forced_local |
16683 | && h->root.type == bfd_link_hash_undefweak) | |
5e681ec4 | 16684 | { |
c152c796 | 16685 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) |
0a1b45a2 | 16686 | return false; |
5e681ec4 PB |
16687 | } |
16688 | ||
16689 | /* If that succeeded, we know we'll be keeping all the | |
16690 | relocs. */ | |
16691 | if (h->dynindx != -1) | |
16692 | goto keep; | |
16693 | } | |
16694 | ||
190eb1dd | 16695 | h->dyn_relocs = NULL; |
5e681ec4 PB |
16696 | |
16697 | keep: ; | |
16698 | } | |
16699 | ||
16700 | /* Finally, allocate space. */ | |
190eb1dd | 16701 | for (p = h->dyn_relocs; p != NULL; p = p->next) |
5e681ec4 | 16702 | { |
0bdcacaf | 16703 | asection *sreloc = elf_section_data (p->sec)->sreloc; |
e8b09b87 | 16704 | |
34e77a92 RS |
16705 | if (h->type == STT_GNU_IFUNC |
16706 | && eh->plt.noncall_refcount == 0 | |
16707 | && SYMBOL_REFERENCES_LOCAL (info, h)) | |
16708 | elf32_arm_allocate_irelocs (info, sreloc, p->count); | |
a57d1773 | 16709 | else if (h->dynindx != -1 |
cc850f74 | 16710 | && (!bfd_link_pic (info) || !info->symbolic || !h->def_regular)) |
e8b09b87 | 16711 | elf32_arm_allocate_dynrelocs (info, sreloc, p->count); |
cc850f74 | 16712 | else if (htab->fdpic_p && !bfd_link_pic (info)) |
e8b09b87 | 16713 | htab->srofixup->size += 4 * p->count; |
34e77a92 RS |
16714 | else |
16715 | elf32_arm_allocate_dynrelocs (info, sreloc, p->count); | |
5e681ec4 PB |
16716 | } |
16717 | ||
0a1b45a2 | 16718 | return true; |
5e681ec4 PB |
16719 | } |
16720 | ||
d504ffc8 DJ |
16721 | void |
16722 | bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info, | |
16723 | int byteswap_code) | |
16724 | { | |
16725 | struct elf32_arm_link_hash_table *globals; | |
16726 | ||
16727 | globals = elf32_arm_hash_table (info); | |
4dfe6ac6 NC |
16728 | if (globals == NULL) |
16729 | return; | |
16730 | ||
d504ffc8 DJ |
16731 | globals->byteswap_code = byteswap_code; |
16732 | } | |
16733 | ||
252b5132 RH |
16734 | /* Set the sizes of the dynamic sections. */ |
16735 | ||
0a1b45a2 | 16736 | static bool |
57e8b36a NC |
16737 | elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED, |
16738 | struct bfd_link_info * info) | |
252b5132 RH |
16739 | { |
16740 | bfd * dynobj; | |
16741 | asection * s; | |
0a1b45a2 | 16742 | bool relocs; |
5e681ec4 PB |
16743 | bfd *ibfd; |
16744 | struct elf32_arm_link_hash_table *htab; | |
252b5132 | 16745 | |
5e681ec4 | 16746 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 | 16747 | if (htab == NULL) |
0a1b45a2 | 16748 | return false; |
4dfe6ac6 | 16749 | |
252b5132 RH |
16750 | dynobj = elf_hash_table (info)->dynobj; |
16751 | BFD_ASSERT (dynobj != NULL); | |
39b41c9c | 16752 | check_use_blx (htab); |
252b5132 RH |
16753 | |
16754 | if (elf_hash_table (info)->dynamic_sections_created) | |
16755 | { | |
16756 | /* Set the contents of the .interp section to the interpreter. */ | |
9b8b325a | 16757 | if (bfd_link_executable (info) && !info->nointerp) |
252b5132 | 16758 | { |
3d4d4302 | 16759 | s = bfd_get_linker_section (dynobj, ".interp"); |
252b5132 | 16760 | BFD_ASSERT (s != NULL); |
eea6121a | 16761 | s->size = sizeof ELF_DYNAMIC_INTERPRETER; |
252b5132 RH |
16762 | s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER; |
16763 | } | |
16764 | } | |
5e681ec4 PB |
16765 | |
16766 | /* Set up .got offsets for local syms, and space for local dynamic | |
16767 | relocs. */ | |
c72f2fb2 | 16768 | for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next) |
252b5132 | 16769 | { |
5e681ec4 PB |
16770 | bfd_signed_vma *local_got; |
16771 | bfd_signed_vma *end_local_got; | |
34e77a92 | 16772 | struct arm_local_iplt_info **local_iplt_ptr, *local_iplt; |
5e681ec4 | 16773 | char *local_tls_type; |
0855e32b | 16774 | bfd_vma *local_tlsdesc_gotent; |
5e681ec4 PB |
16775 | bfd_size_type locsymcount; |
16776 | Elf_Internal_Shdr *symtab_hdr; | |
16777 | asection *srel; | |
34e77a92 | 16778 | unsigned int symndx; |
e8b09b87 | 16779 | struct fdpic_local *local_fdpic_cnts; |
5e681ec4 | 16780 | |
0ffa91dd | 16781 | if (! is_arm_elf (ibfd)) |
5e681ec4 PB |
16782 | continue; |
16783 | ||
16784 | for (s = ibfd->sections; s != NULL; s = s->next) | |
16785 | { | |
0bdcacaf | 16786 | struct elf_dyn_relocs *p; |
5e681ec4 | 16787 | |
0bdcacaf | 16788 | for (p = (struct elf_dyn_relocs *) |
99059e56 | 16789 | elf_section_data (s)->local_dynrel; p != NULL; p = p->next) |
5e681ec4 | 16790 | { |
0bdcacaf RS |
16791 | if (!bfd_is_abs_section (p->sec) |
16792 | && bfd_is_abs_section (p->sec->output_section)) | |
5e681ec4 PB |
16793 | { |
16794 | /* Input section has been discarded, either because | |
16795 | it is a copy of a linkonce section or due to | |
16796 | linker script /DISCARD/, so we'll be discarding | |
16797 | the relocs too. */ | |
16798 | } | |
90c14f0c | 16799 | else if (htab->root.target_os == is_vxworks |
0bdcacaf | 16800 | && strcmp (p->sec->output_section->name, |
3348747a NS |
16801 | ".tls_vars") == 0) |
16802 | { | |
16803 | /* Relocations in vxworks .tls_vars sections are | |
16804 | handled specially by the loader. */ | |
16805 | } | |
5e681ec4 PB |
16806 | else if (p->count != 0) |
16807 | { | |
0bdcacaf | 16808 | srel = elf_section_data (p->sec)->sreloc; |
cc850f74 | 16809 | if (htab->fdpic_p && !bfd_link_pic (info)) |
e8b09b87 CL |
16810 | htab->srofixup->size += 4 * p->count; |
16811 | else | |
16812 | elf32_arm_allocate_dynrelocs (info, srel, p->count); | |
0bdcacaf | 16813 | if ((p->sec->output_section->flags & SEC_READONLY) != 0) |
5e681ec4 PB |
16814 | info->flags |= DF_TEXTREL; |
16815 | } | |
16816 | } | |
16817 | } | |
16818 | ||
16819 | local_got = elf_local_got_refcounts (ibfd); | |
cc850f74 | 16820 | if (local_got == NULL) |
5e681ec4 PB |
16821 | continue; |
16822 | ||
0ffa91dd | 16823 | symtab_hdr = & elf_symtab_hdr (ibfd); |
5e681ec4 PB |
16824 | locsymcount = symtab_hdr->sh_info; |
16825 | end_local_got = local_got + locsymcount; | |
34e77a92 | 16826 | local_iplt_ptr = elf32_arm_local_iplt (ibfd); |
ba93b8ac | 16827 | local_tls_type = elf32_arm_local_got_tls_type (ibfd); |
0855e32b | 16828 | local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd); |
e8b09b87 | 16829 | local_fdpic_cnts = elf32_arm_local_fdpic_cnts (ibfd); |
34e77a92 | 16830 | symndx = 0; |
362d30a1 RS |
16831 | s = htab->root.sgot; |
16832 | srel = htab->root.srelgot; | |
0855e32b | 16833 | for (; local_got < end_local_got; |
34e77a92 | 16834 | ++local_got, ++local_iplt_ptr, ++local_tls_type, |
e8b09b87 | 16835 | ++local_tlsdesc_gotent, ++symndx, ++local_fdpic_cnts) |
5e681ec4 | 16836 | { |
74fd118f NC |
16837 | if (symndx >= elf32_arm_num_entries (ibfd)) |
16838 | return false; | |
16839 | ||
0855e32b | 16840 | *local_tlsdesc_gotent = (bfd_vma) -1; |
34e77a92 | 16841 | local_iplt = *local_iplt_ptr; |
e8b09b87 CL |
16842 | |
16843 | /* FDPIC support. */ | |
16844 | if (local_fdpic_cnts->gotofffuncdesc_cnt > 0) | |
16845 | { | |
16846 | if (local_fdpic_cnts->funcdesc_offset == -1) | |
16847 | { | |
16848 | local_fdpic_cnts->funcdesc_offset = s->size; | |
16849 | s->size += 8; | |
16850 | ||
16851 | /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */ | |
cc850f74 | 16852 | if (bfd_link_pic (info)) |
e8b09b87 CL |
16853 | elf32_arm_allocate_dynrelocs (info, srel, 1); |
16854 | else | |
16855 | htab->srofixup->size += 8; | |
16856 | } | |
16857 | } | |
16858 | ||
16859 | if (local_fdpic_cnts->funcdesc_cnt > 0) | |
16860 | { | |
16861 | if (local_fdpic_cnts->funcdesc_offset == -1) | |
16862 | { | |
16863 | local_fdpic_cnts->funcdesc_offset = s->size; | |
16864 | s->size += 8; | |
16865 | ||
16866 | /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */ | |
cc850f74 | 16867 | if (bfd_link_pic (info)) |
e8b09b87 CL |
16868 | elf32_arm_allocate_dynrelocs (info, srel, 1); |
16869 | else | |
16870 | htab->srofixup->size += 8; | |
16871 | } | |
16872 | ||
16873 | /* We will add n R_ARM_RELATIVE relocations or n rofixups. */ | |
cc850f74 | 16874 | if (bfd_link_pic (info)) |
e8b09b87 CL |
16875 | elf32_arm_allocate_dynrelocs (info, srel, local_fdpic_cnts->funcdesc_cnt); |
16876 | else | |
16877 | htab->srofixup->size += 4 * local_fdpic_cnts->funcdesc_cnt; | |
16878 | } | |
16879 | ||
34e77a92 RS |
16880 | if (local_iplt != NULL) |
16881 | { | |
16882 | struct elf_dyn_relocs *p; | |
16883 | ||
16884 | if (local_iplt->root.refcount > 0) | |
16885 | { | |
0a1b45a2 | 16886 | elf32_arm_allocate_plt_entry (info, true, |
34e77a92 RS |
16887 | &local_iplt->root, |
16888 | &local_iplt->arm); | |
16889 | if (local_iplt->arm.noncall_refcount == 0) | |
16890 | /* All references to the PLT are calls, so all | |
16891 | non-call references can resolve directly to the | |
16892 | run-time target. This means that the .got entry | |
16893 | would be the same as the .igot.plt entry, so there's | |
16894 | no point creating both. */ | |
16895 | *local_got = 0; | |
16896 | } | |
16897 | else | |
16898 | { | |
16899 | BFD_ASSERT (local_iplt->arm.noncall_refcount == 0); | |
16900 | local_iplt->root.offset = (bfd_vma) -1; | |
16901 | } | |
16902 | ||
16903 | for (p = local_iplt->dyn_relocs; p != NULL; p = p->next) | |
16904 | { | |
16905 | asection *psrel; | |
16906 | ||
16907 | psrel = elf_section_data (p->sec)->sreloc; | |
16908 | if (local_iplt->arm.noncall_refcount == 0) | |
16909 | elf32_arm_allocate_irelocs (info, psrel, p->count); | |
16910 | else | |
16911 | elf32_arm_allocate_dynrelocs (info, psrel, p->count); | |
16912 | } | |
16913 | } | |
5e681ec4 PB |
16914 | if (*local_got > 0) |
16915 | { | |
34e77a92 RS |
16916 | Elf_Internal_Sym *isym; |
16917 | ||
eea6121a | 16918 | *local_got = s->size; |
ba93b8ac DJ |
16919 | if (*local_tls_type & GOT_TLS_GD) |
16920 | /* TLS_GD relocs need an 8-byte structure in the GOT. */ | |
16921 | s->size += 8; | |
0855e32b NS |
16922 | if (*local_tls_type & GOT_TLS_GDESC) |
16923 | { | |
16924 | *local_tlsdesc_gotent = htab->root.sgotplt->size | |
16925 | - elf32_arm_compute_jump_table_size (htab); | |
16926 | htab->root.sgotplt->size += 8; | |
16927 | *local_got = (bfd_vma) -2; | |
34e77a92 | 16928 | /* plt.got_offset needs to know there's a TLS_DESC |
0855e32b | 16929 | reloc in the middle of .got.plt. */ |
99059e56 | 16930 | htab->num_tls_desc++; |
0855e32b | 16931 | } |
ba93b8ac DJ |
16932 | if (*local_tls_type & GOT_TLS_IE) |
16933 | s->size += 4; | |
ba93b8ac | 16934 | |
0855e32b NS |
16935 | if (*local_tls_type & GOT_NORMAL) |
16936 | { | |
16937 | /* If the symbol is both GD and GDESC, *local_got | |
16938 | may have been overwritten. */ | |
16939 | *local_got = s->size; | |
16940 | s->size += 4; | |
16941 | } | |
16942 | ||
f1dfbfdb L |
16943 | isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, ibfd, |
16944 | symndx); | |
34e77a92 | 16945 | if (isym == NULL) |
0a1b45a2 | 16946 | return false; |
34e77a92 RS |
16947 | |
16948 | /* If all references to an STT_GNU_IFUNC PLT are calls, | |
16949 | then all non-call references, including this GOT entry, | |
16950 | resolve directly to the run-time target. */ | |
16951 | if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC | |
16952 | && (local_iplt == NULL | |
16953 | || local_iplt->arm.noncall_refcount == 0)) | |
16954 | elf32_arm_allocate_irelocs (info, srel, 1); | |
e8b09b87 | 16955 | else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC || htab->fdpic_p) |
0855e32b | 16956 | { |
e8b09b87 | 16957 | if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC))) |
3064e1ff | 16958 | elf32_arm_allocate_dynrelocs (info, srel, 1); |
e8b09b87 CL |
16959 | else if (htab->fdpic_p && *local_tls_type & GOT_NORMAL) |
16960 | htab->srofixup->size += 4; | |
99059e56 | 16961 | |
e8b09b87 CL |
16962 | if ((bfd_link_pic (info) || htab->fdpic_p) |
16963 | && *local_tls_type & GOT_TLS_GDESC) | |
3064e1ff JB |
16964 | { |
16965 | elf32_arm_allocate_dynrelocs (info, | |
16966 | htab->root.srelplt, 1); | |
16967 | htab->tls_trampoline = -1; | |
16968 | } | |
0855e32b | 16969 | } |
5e681ec4 PB |
16970 | } |
16971 | else | |
16972 | *local_got = (bfd_vma) -1; | |
16973 | } | |
252b5132 RH |
16974 | } |
16975 | ||
ba93b8ac DJ |
16976 | if (htab->tls_ldm_got.refcount > 0) |
16977 | { | |
16978 | /* Allocate two GOT entries and one dynamic relocation (if necessary) | |
5c5a4843 | 16979 | for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */ |
362d30a1 RS |
16980 | htab->tls_ldm_got.offset = htab->root.sgot->size; |
16981 | htab->root.sgot->size += 8; | |
0e1862bb | 16982 | if (bfd_link_pic (info)) |
47beaa6a | 16983 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
ba93b8ac DJ |
16984 | } |
16985 | else | |
16986 | htab->tls_ldm_got.offset = -1; | |
16987 | ||
e8b09b87 CL |
16988 | /* At the very end of the .rofixup section is a pointer to the GOT, |
16989 | reserve space for it. */ | |
16990 | if (htab->fdpic_p && htab->srofixup != NULL) | |
16991 | htab->srofixup->size += 4; | |
16992 | ||
5e681ec4 PB |
16993 | /* Allocate global sym .plt and .got entries, and space for global |
16994 | sym dynamic relocs. */ | |
47beaa6a | 16995 | elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info); |
252b5132 | 16996 | |
d504ffc8 | 16997 | /* Here we rummage through the found bfds to collect glue information. */ |
c72f2fb2 | 16998 | for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next) |
c7b8f16e | 16999 | { |
0ffa91dd | 17000 | if (! is_arm_elf (ibfd)) |
e44a2c9c AM |
17001 | continue; |
17002 | ||
c7b8f16e JB |
17003 | /* Initialise mapping tables for code/data. */ |
17004 | bfd_elf32_arm_init_maps (ibfd); | |
906e58ca | 17005 | |
c7b8f16e | 17006 | if (!bfd_elf32_arm_process_before_allocation (ibfd, info) |
a504d23a LA |
17007 | || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info) |
17008 | || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info)) | |
90b6238f | 17009 | _bfd_error_handler (_("errors encountered processing file %pB"), ibfd); |
c7b8f16e | 17010 | } |
d504ffc8 | 17011 | |
3e6b1042 DJ |
17012 | /* Allocate space for the glue sections now that we've sized them. */ |
17013 | bfd_elf32_arm_allocate_interworking_sections (info); | |
17014 | ||
0855e32b NS |
17015 | /* For every jump slot reserved in the sgotplt, reloc_count is |
17016 | incremented. However, when we reserve space for TLS descriptors, | |
17017 | it's not incremented, so in order to compute the space reserved | |
17018 | for them, it suffices to multiply the reloc count by the jump | |
17019 | slot size. */ | |
17020 | if (htab->root.srelplt) | |
cc850f74 | 17021 | htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size (htab); |
0855e32b NS |
17022 | |
17023 | if (htab->tls_trampoline) | |
17024 | { | |
17025 | if (htab->root.splt->size == 0) | |
17026 | htab->root.splt->size += htab->plt_header_size; | |
b38cadfb | 17027 | |
0855e32b NS |
17028 | htab->tls_trampoline = htab->root.splt->size; |
17029 | htab->root.splt->size += htab->plt_entry_size; | |
b38cadfb | 17030 | |
0855e32b | 17031 | /* If we're not using lazy TLS relocations, don't generate the |
99059e56 | 17032 | PLT and GOT entries they require. */ |
9bcc30e4 L |
17033 | if ((info->flags & DF_BIND_NOW)) |
17034 | htab->root.tlsdesc_plt = 0; | |
17035 | else | |
0855e32b | 17036 | { |
9bcc30e4 | 17037 | htab->root.tlsdesc_got = htab->root.sgot->size; |
0855e32b NS |
17038 | htab->root.sgot->size += 4; |
17039 | ||
9bcc30e4 | 17040 | htab->root.tlsdesc_plt = htab->root.splt->size; |
0855e32b NS |
17041 | htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline); |
17042 | } | |
17043 | } | |
17044 | ||
252b5132 RH |
17045 | /* The check_relocs and adjust_dynamic_symbol entry points have |
17046 | determined the sizes of the various dynamic sections. Allocate | |
17047 | memory for them. */ | |
0a1b45a2 | 17048 | relocs = false; |
252b5132 RH |
17049 | for (s = dynobj->sections; s != NULL; s = s->next) |
17050 | { | |
17051 | const char * name; | |
252b5132 RH |
17052 | |
17053 | if ((s->flags & SEC_LINKER_CREATED) == 0) | |
17054 | continue; | |
17055 | ||
17056 | /* It's OK to base decisions on the section name, because none | |
17057 | of the dynobj section names depend upon the input files. */ | |
fd361982 | 17058 | name = bfd_section_name (s); |
252b5132 | 17059 | |
34e77a92 | 17060 | if (s == htab->root.splt) |
252b5132 | 17061 | { |
c456f082 | 17062 | /* Remember whether there is a PLT. */ |
3084d7a2 | 17063 | ; |
252b5132 | 17064 | } |
08dedd66 | 17065 | else if (startswith (name, ".rel")) |
252b5132 | 17066 | { |
c456f082 | 17067 | if (s->size != 0) |
252b5132 | 17068 | { |
252b5132 | 17069 | /* Remember whether there are any reloc sections other |
00a97672 | 17070 | than .rel(a).plt and .rela.plt.unloaded. */ |
362d30a1 | 17071 | if (s != htab->root.srelplt && s != htab->srelplt2) |
0a1b45a2 | 17072 | relocs = true; |
252b5132 RH |
17073 | |
17074 | /* We use the reloc_count field as a counter if we need | |
17075 | to copy relocs into the output file. */ | |
17076 | s->reloc_count = 0; | |
17077 | } | |
17078 | } | |
34e77a92 RS |
17079 | else if (s != htab->root.sgot |
17080 | && s != htab->root.sgotplt | |
17081 | && s != htab->root.iplt | |
17082 | && s != htab->root.igotplt | |
5474d94f | 17083 | && s != htab->root.sdynbss |
e8b09b87 CL |
17084 | && s != htab->root.sdynrelro |
17085 | && s != htab->srofixup) | |
252b5132 RH |
17086 | { |
17087 | /* It's not one of our sections, so don't allocate space. */ | |
17088 | continue; | |
17089 | } | |
17090 | ||
c456f082 | 17091 | if (s->size == 0) |
252b5132 | 17092 | { |
c456f082 | 17093 | /* If we don't need this section, strip it from the |
00a97672 RS |
17094 | output file. This is mostly to handle .rel(a).bss and |
17095 | .rel(a).plt. We must create both sections in | |
c456f082 AM |
17096 | create_dynamic_sections, because they must be created |
17097 | before the linker maps input sections to output | |
17098 | sections. The linker does that before | |
17099 | adjust_dynamic_symbol is called, and it is that | |
17100 | function which decides whether anything needs to go | |
17101 | into these sections. */ | |
8423293d | 17102 | s->flags |= SEC_EXCLUDE; |
252b5132 RH |
17103 | continue; |
17104 | } | |
17105 | ||
c456f082 AM |
17106 | if ((s->flags & SEC_HAS_CONTENTS) == 0) |
17107 | continue; | |
17108 | ||
252b5132 | 17109 | /* Allocate memory for the section contents. */ |
21d799b5 | 17110 | s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size); |
c456f082 | 17111 | if (s->contents == NULL) |
0a1b45a2 | 17112 | return false; |
252b5132 RH |
17113 | } |
17114 | ||
3084d7a2 L |
17115 | return _bfd_elf_maybe_vxworks_add_dynamic_tags (output_bfd, info, |
17116 | relocs); | |
252b5132 RH |
17117 | } |
17118 | ||
0855e32b NS |
17119 | /* Size sections even though they're not dynamic. We use it to setup |
17120 | _TLS_MODULE_BASE_, if needed. */ | |
17121 | ||
0a1b45a2 | 17122 | static bool |
0855e32b | 17123 | elf32_arm_always_size_sections (bfd *output_bfd, |
99059e56 | 17124 | struct bfd_link_info *info) |
0855e32b NS |
17125 | { |
17126 | asection *tls_sec; | |
cb10292c CL |
17127 | struct elf32_arm_link_hash_table *htab; |
17128 | ||
17129 | htab = elf32_arm_hash_table (info); | |
0855e32b | 17130 | |
0e1862bb | 17131 | if (bfd_link_relocatable (info)) |
0a1b45a2 | 17132 | return true; |
0855e32b NS |
17133 | |
17134 | tls_sec = elf_hash_table (info)->tls_sec; | |
17135 | ||
17136 | if (tls_sec) | |
17137 | { | |
17138 | struct elf_link_hash_entry *tlsbase; | |
17139 | ||
17140 | tlsbase = elf_link_hash_lookup | |
0a1b45a2 | 17141 | (elf_hash_table (info), "_TLS_MODULE_BASE_", true, true, false); |
0855e32b NS |
17142 | |
17143 | if (tlsbase) | |
99059e56 RM |
17144 | { |
17145 | struct bfd_link_hash_entry *bh = NULL; | |
0855e32b | 17146 | const struct elf_backend_data *bed |
99059e56 | 17147 | = get_elf_backend_data (output_bfd); |
0855e32b | 17148 | |
99059e56 | 17149 | if (!(_bfd_generic_link_add_one_symbol |
0855e32b | 17150 | (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL, |
0a1b45a2 | 17151 | tls_sec, 0, NULL, false, |
0855e32b | 17152 | bed->collect, &bh))) |
0a1b45a2 | 17153 | return false; |
b38cadfb | 17154 | |
99059e56 RM |
17155 | tlsbase->type = STT_TLS; |
17156 | tlsbase = (struct elf_link_hash_entry *)bh; | |
17157 | tlsbase->def_regular = 1; | |
17158 | tlsbase->other = STV_HIDDEN; | |
0a1b45a2 | 17159 | (*bed->elf_backend_hide_symbol) (info, tlsbase, true); |
0855e32b NS |
17160 | } |
17161 | } | |
cb10292c CL |
17162 | |
17163 | if (htab->fdpic_p && !bfd_link_relocatable (info) | |
17164 | && !bfd_elf_stack_segment_size (output_bfd, info, | |
17165 | "__stacksize", DEFAULT_STACK_SIZE)) | |
0a1b45a2 | 17166 | return false; |
cb10292c | 17167 | |
0a1b45a2 | 17168 | return true; |
0855e32b NS |
17169 | } |
17170 | ||
252b5132 RH |
17171 | /* Finish up dynamic symbol handling. We set the contents of various |
17172 | dynamic sections here. */ | |
17173 | ||
0a1b45a2 | 17174 | static bool |
906e58ca NC |
17175 | elf32_arm_finish_dynamic_symbol (bfd * output_bfd, |
17176 | struct bfd_link_info * info, | |
17177 | struct elf_link_hash_entry * h, | |
17178 | Elf_Internal_Sym * sym) | |
252b5132 | 17179 | { |
e5a52504 | 17180 | struct elf32_arm_link_hash_table *htab; |
b7693d02 | 17181 | struct elf32_arm_link_hash_entry *eh; |
252b5132 | 17182 | |
e5a52504 | 17183 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 | 17184 | if (htab == NULL) |
0a1b45a2 | 17185 | return false; |
4dfe6ac6 | 17186 | |
b7693d02 | 17187 | eh = (struct elf32_arm_link_hash_entry *) h; |
252b5132 RH |
17188 | |
17189 | if (h->plt.offset != (bfd_vma) -1) | |
17190 | { | |
34e77a92 | 17191 | if (!eh->is_iplt) |
e5a52504 | 17192 | { |
34e77a92 | 17193 | BFD_ASSERT (h->dynindx != -1); |
57460bcf NC |
17194 | if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt, |
17195 | h->dynindx, 0)) | |
0a1b45a2 | 17196 | return false; |
e5a52504 | 17197 | } |
57e8b36a | 17198 | |
f5385ebf | 17199 | if (!h->def_regular) |
252b5132 RH |
17200 | { |
17201 | /* Mark the symbol as undefined, rather than as defined in | |
3a635617 | 17202 | the .plt section. */ |
252b5132 | 17203 | sym->st_shndx = SHN_UNDEF; |
3a635617 | 17204 | /* If the symbol is weak we need to clear the value. |
d982ba73 PB |
17205 | Otherwise, the PLT entry would provide a definition for |
17206 | the symbol even if the symbol wasn't defined anywhere, | |
3a635617 WN |
17207 | and so the symbol would never be NULL. Leave the value if |
17208 | there were any relocations where pointer equality matters | |
17209 | (this is a clue for the dynamic linker, to make function | |
17210 | pointer comparisons work between an application and shared | |
17211 | library). */ | |
97323ad1 | 17212 | if (!h->ref_regular_nonweak || !h->pointer_equality_needed) |
d982ba73 | 17213 | sym->st_value = 0; |
252b5132 | 17214 | } |
34e77a92 RS |
17215 | else if (eh->is_iplt && eh->plt.noncall_refcount != 0) |
17216 | { | |
17217 | /* At least one non-call relocation references this .iplt entry, | |
17218 | so the .iplt entry is the function's canonical address. */ | |
17219 | sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC); | |
39d911fc | 17220 | ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM); |
34e77a92 RS |
17221 | sym->st_shndx = (_bfd_elf_section_from_bfd_section |
17222 | (output_bfd, htab->root.iplt->output_section)); | |
17223 | sym->st_value = (h->plt.offset | |
17224 | + htab->root.iplt->output_section->vma | |
17225 | + htab->root.iplt->output_offset); | |
17226 | } | |
252b5132 RH |
17227 | } |
17228 | ||
f5385ebf | 17229 | if (h->needs_copy) |
252b5132 RH |
17230 | { |
17231 | asection * s; | |
947216bf | 17232 | Elf_Internal_Rela rel; |
252b5132 RH |
17233 | |
17234 | /* This symbol needs a copy reloc. Set it up. */ | |
252b5132 RH |
17235 | BFD_ASSERT (h->dynindx != -1 |
17236 | && (h->root.type == bfd_link_hash_defined | |
17237 | || h->root.type == bfd_link_hash_defweak)); | |
17238 | ||
00a97672 | 17239 | rel.r_addend = 0; |
252b5132 RH |
17240 | rel.r_offset = (h->root.u.def.value |
17241 | + h->root.u.def.section->output_section->vma | |
17242 | + h->root.u.def.section->output_offset); | |
17243 | rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY); | |
afbf7e8e | 17244 | if (h->root.u.def.section == htab->root.sdynrelro) |
5474d94f AM |
17245 | s = htab->root.sreldynrelro; |
17246 | else | |
17247 | s = htab->root.srelbss; | |
47beaa6a | 17248 | elf32_arm_add_dynreloc (output_bfd, info, s, &rel); |
252b5132 RH |
17249 | } |
17250 | ||
00a97672 | 17251 | /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks, |
fac7bd64 CL |
17252 | and for FDPIC, the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: |
17253 | it is relative to the ".got" section. */ | |
9637f6ef | 17254 | if (h == htab->root.hdynamic |
90c14f0c L |
17255 | || (!htab->fdpic_p |
17256 | && htab->root.target_os != is_vxworks | |
17257 | && h == htab->root.hgot)) | |
252b5132 RH |
17258 | sym->st_shndx = SHN_ABS; |
17259 | ||
0a1b45a2 | 17260 | return true; |
252b5132 RH |
17261 | } |
17262 | ||
0855e32b NS |
17263 | static void |
17264 | arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd, | |
17265 | void *contents, | |
17266 | const unsigned long *template, unsigned count) | |
17267 | { | |
17268 | unsigned ix; | |
b38cadfb | 17269 | |
0855e32b NS |
17270 | for (ix = 0; ix != count; ix++) |
17271 | { | |
17272 | unsigned long insn = template[ix]; | |
17273 | ||
17274 | /* Emit mov pc,rx if bx is not permitted. */ | |
17275 | if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10) | |
17276 | insn = (insn & 0xf000000f) | 0x01a0f000; | |
17277 | put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4); | |
17278 | } | |
17279 | } | |
17280 | ||
99059e56 RM |
17281 | /* Install the special first PLT entry for elf32-arm-nacl. Unlike |
17282 | other variants, NaCl needs this entry in a static executable's | |
17283 | .iplt too. When we're handling that case, GOT_DISPLACEMENT is | |
17284 | zero. For .iplt really only the last bundle is useful, and .iplt | |
17285 | could have a shorter first entry, with each individual PLT entry's | |
17286 | relative branch calculated differently so it targets the last | |
17287 | bundle instead of the instruction before it (labelled .Lplt_tail | |
17288 | above). But it's simpler to keep the size and layout of PLT0 | |
17289 | consistent with the dynamic case, at the cost of some dead code at | |
17290 | the start of .iplt and the one dead store to the stack at the start | |
17291 | of .Lplt_tail. */ | |
17292 | static void | |
17293 | arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd, | |
17294 | asection *plt, bfd_vma got_displacement) | |
17295 | { | |
17296 | unsigned int i; | |
17297 | ||
17298 | put_arm_insn (htab, output_bfd, | |
17299 | elf32_arm_nacl_plt0_entry[0] | |
17300 | | arm_movw_immediate (got_displacement), | |
17301 | plt->contents + 0); | |
17302 | put_arm_insn (htab, output_bfd, | |
17303 | elf32_arm_nacl_plt0_entry[1] | |
17304 | | arm_movt_immediate (got_displacement), | |
17305 | plt->contents + 4); | |
17306 | ||
17307 | for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i) | |
17308 | put_arm_insn (htab, output_bfd, | |
17309 | elf32_arm_nacl_plt0_entry[i], | |
17310 | plt->contents + (i * 4)); | |
17311 | } | |
17312 | ||
252b5132 RH |
17313 | /* Finish up the dynamic sections. */ |
17314 | ||
0a1b45a2 | 17315 | static bool |
57e8b36a | 17316 | elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info) |
252b5132 RH |
17317 | { |
17318 | bfd * dynobj; | |
17319 | asection * sgot; | |
17320 | asection * sdyn; | |
4dfe6ac6 NC |
17321 | struct elf32_arm_link_hash_table *htab; |
17322 | ||
17323 | htab = elf32_arm_hash_table (info); | |
17324 | if (htab == NULL) | |
0a1b45a2 | 17325 | return false; |
252b5132 RH |
17326 | |
17327 | dynobj = elf_hash_table (info)->dynobj; | |
17328 | ||
362d30a1 | 17329 | sgot = htab->root.sgotplt; |
894891db NC |
17330 | /* A broken linker script might have discarded the dynamic sections. |
17331 | Catch this here so that we do not seg-fault later on. */ | |
17332 | if (sgot != NULL && bfd_is_abs_section (sgot->output_section)) | |
0a1b45a2 | 17333 | return false; |
3d4d4302 | 17334 | sdyn = bfd_get_linker_section (dynobj, ".dynamic"); |
252b5132 RH |
17335 | |
17336 | if (elf_hash_table (info)->dynamic_sections_created) | |
17337 | { | |
17338 | asection *splt; | |
17339 | Elf32_External_Dyn *dyncon, *dynconend; | |
17340 | ||
362d30a1 | 17341 | splt = htab->root.splt; |
24a1ba0f | 17342 | BFD_ASSERT (splt != NULL && sdyn != NULL); |
a57d1773 | 17343 | BFD_ASSERT (sgot != NULL); |
252b5132 RH |
17344 | |
17345 | dyncon = (Elf32_External_Dyn *) sdyn->contents; | |
eea6121a | 17346 | dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size); |
9b485d32 | 17347 | |
252b5132 RH |
17348 | for (; dyncon < dynconend; dyncon++) |
17349 | { | |
17350 | Elf_Internal_Dyn dyn; | |
17351 | const char * name; | |
17352 | asection * s; | |
17353 | ||
17354 | bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn); | |
17355 | ||
17356 | switch (dyn.d_tag) | |
17357 | { | |
17358 | default: | |
90c14f0c | 17359 | if (htab->root.target_os == is_vxworks |
7a2b07ff NS |
17360 | && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn)) |
17361 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); | |
252b5132 RH |
17362 | break; |
17363 | ||
229fcec5 | 17364 | case DT_HASH: |
229fcec5 | 17365 | case DT_STRTAB: |
229fcec5 | 17366 | case DT_SYMTAB: |
c0042f5d | 17367 | case DT_VERSYM: |
c0042f5d | 17368 | case DT_VERDEF: |
c0042f5d | 17369 | case DT_VERNEED: |
a57d1773 | 17370 | break; |
c0042f5d | 17371 | |
252b5132 | 17372 | case DT_PLTGOT: |
a57d1773 | 17373 | name = ".got.plt"; |
252b5132 RH |
17374 | goto get_vma; |
17375 | case DT_JMPREL: | |
00a97672 | 17376 | name = RELOC_SECTION (htab, ".plt"); |
252b5132 | 17377 | get_vma: |
4ade44b7 | 17378 | s = bfd_get_linker_section (dynobj, name); |
05456594 NC |
17379 | if (s == NULL) |
17380 | { | |
4eca0228 | 17381 | _bfd_error_handler |
4ade44b7 | 17382 | (_("could not find section %s"), name); |
05456594 | 17383 | bfd_set_error (bfd_error_invalid_operation); |
0a1b45a2 | 17384 | return false; |
05456594 | 17385 | } |
a57d1773 | 17386 | dyn.d_un.d_ptr = s->output_section->vma + s->output_offset; |
252b5132 RH |
17387 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
17388 | break; | |
17389 | ||
17390 | case DT_PLTRELSZ: | |
362d30a1 | 17391 | s = htab->root.srelplt; |
252b5132 | 17392 | BFD_ASSERT (s != NULL); |
eea6121a | 17393 | dyn.d_un.d_val = s->size; |
252b5132 RH |
17394 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
17395 | break; | |
906e58ca | 17396 | |
252b5132 | 17397 | case DT_RELSZ: |
00a97672 | 17398 | case DT_RELASZ: |
229fcec5 MM |
17399 | case DT_REL: |
17400 | case DT_RELA: | |
252b5132 | 17401 | break; |
88f7bcd5 | 17402 | |
0855e32b | 17403 | case DT_TLSDESC_PLT: |
99059e56 | 17404 | s = htab->root.splt; |
0855e32b | 17405 | dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset |
9bcc30e4 | 17406 | + htab->root.tlsdesc_plt); |
0855e32b NS |
17407 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
17408 | break; | |
17409 | ||
17410 | case DT_TLSDESC_GOT: | |
99059e56 | 17411 | s = htab->root.sgot; |
0855e32b | 17412 | dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset |
9bcc30e4 | 17413 | + htab->root.tlsdesc_got); |
0855e32b NS |
17414 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
17415 | break; | |
17416 | ||
88f7bcd5 NC |
17417 | /* Set the bottom bit of DT_INIT/FINI if the |
17418 | corresponding function is Thumb. */ | |
17419 | case DT_INIT: | |
17420 | name = info->init_function; | |
17421 | goto get_sym; | |
17422 | case DT_FINI: | |
17423 | name = info->fini_function; | |
17424 | get_sym: | |
17425 | /* If it wasn't set by elf_bfd_final_link | |
4cc11e76 | 17426 | then there is nothing to adjust. */ |
88f7bcd5 NC |
17427 | if (dyn.d_un.d_val != 0) |
17428 | { | |
17429 | struct elf_link_hash_entry * eh; | |
17430 | ||
17431 | eh = elf_link_hash_lookup (elf_hash_table (info), name, | |
0a1b45a2 | 17432 | false, false, true); |
39d911fc TP |
17433 | if (eh != NULL |
17434 | && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal) | |
17435 | == ST_BRANCH_TO_THUMB) | |
88f7bcd5 NC |
17436 | { |
17437 | dyn.d_un.d_val |= 1; | |
b34976b6 | 17438 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
88f7bcd5 NC |
17439 | } |
17440 | } | |
17441 | break; | |
252b5132 RH |
17442 | } |
17443 | } | |
17444 | ||
24a1ba0f | 17445 | /* Fill in the first entry in the procedure linkage table. */ |
4dfe6ac6 | 17446 | if (splt->size > 0 && htab->plt_header_size) |
f7a74f8c | 17447 | { |
00a97672 RS |
17448 | const bfd_vma *plt0_entry; |
17449 | bfd_vma got_address, plt_address, got_displacement; | |
17450 | ||
17451 | /* Calculate the addresses of the GOT and PLT. */ | |
17452 | got_address = sgot->output_section->vma + sgot->output_offset; | |
17453 | plt_address = splt->output_section->vma + splt->output_offset; | |
17454 | ||
90c14f0c | 17455 | if (htab->root.target_os == is_vxworks) |
00a97672 RS |
17456 | { |
17457 | /* The VxWorks GOT is relocated by the dynamic linker. | |
17458 | Therefore, we must emit relocations rather than simply | |
17459 | computing the values now. */ | |
17460 | Elf_Internal_Rela rel; | |
17461 | ||
17462 | plt0_entry = elf32_arm_vxworks_exec_plt0_entry; | |
52ab56c2 PB |
17463 | put_arm_insn (htab, output_bfd, plt0_entry[0], |
17464 | splt->contents + 0); | |
17465 | put_arm_insn (htab, output_bfd, plt0_entry[1], | |
17466 | splt->contents + 4); | |
17467 | put_arm_insn (htab, output_bfd, plt0_entry[2], | |
17468 | splt->contents + 8); | |
00a97672 RS |
17469 | bfd_put_32 (output_bfd, got_address, splt->contents + 12); |
17470 | ||
8029a119 | 17471 | /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */ |
00a97672 RS |
17472 | rel.r_offset = plt_address + 12; |
17473 | rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32); | |
17474 | rel.r_addend = 0; | |
17475 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, | |
17476 | htab->srelplt2->contents); | |
17477 | } | |
90c14f0c | 17478 | else if (htab->root.target_os == is_nacl) |
99059e56 RM |
17479 | arm_nacl_put_plt0 (htab, output_bfd, splt, |
17480 | got_address + 8 - (plt_address + 16)); | |
eed94f8f NC |
17481 | else if (using_thumb_only (htab)) |
17482 | { | |
17483 | got_displacement = got_address - (plt_address + 12); | |
17484 | ||
17485 | plt0_entry = elf32_thumb2_plt0_entry; | |
17486 | put_arm_insn (htab, output_bfd, plt0_entry[0], | |
17487 | splt->contents + 0); | |
17488 | put_arm_insn (htab, output_bfd, plt0_entry[1], | |
17489 | splt->contents + 4); | |
17490 | put_arm_insn (htab, output_bfd, plt0_entry[2], | |
17491 | splt->contents + 8); | |
17492 | ||
17493 | bfd_put_32 (output_bfd, got_displacement, splt->contents + 12); | |
17494 | } | |
00a97672 RS |
17495 | else |
17496 | { | |
17497 | got_displacement = got_address - (plt_address + 16); | |
17498 | ||
17499 | plt0_entry = elf32_arm_plt0_entry; | |
52ab56c2 PB |
17500 | put_arm_insn (htab, output_bfd, plt0_entry[0], |
17501 | splt->contents + 0); | |
17502 | put_arm_insn (htab, output_bfd, plt0_entry[1], | |
17503 | splt->contents + 4); | |
17504 | put_arm_insn (htab, output_bfd, plt0_entry[2], | |
17505 | splt->contents + 8); | |
17506 | put_arm_insn (htab, output_bfd, plt0_entry[3], | |
17507 | splt->contents + 12); | |
5e681ec4 | 17508 | |
5e681ec4 | 17509 | #ifdef FOUR_WORD_PLT |
00a97672 RS |
17510 | /* The displacement value goes in the otherwise-unused |
17511 | last word of the second entry. */ | |
17512 | bfd_put_32 (output_bfd, got_displacement, splt->contents + 28); | |
5e681ec4 | 17513 | #else |
00a97672 | 17514 | bfd_put_32 (output_bfd, got_displacement, splt->contents + 16); |
5e681ec4 | 17515 | #endif |
00a97672 | 17516 | } |
f7a74f8c | 17517 | } |
252b5132 RH |
17518 | |
17519 | /* UnixWare sets the entsize of .plt to 4, although that doesn't | |
17520 | really seem like the right value. */ | |
74541ad4 AM |
17521 | if (splt->output_section->owner == output_bfd) |
17522 | elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4; | |
00a97672 | 17523 | |
9bcc30e4 | 17524 | if (htab->root.tlsdesc_plt) |
0855e32b NS |
17525 | { |
17526 | bfd_vma got_address | |
17527 | = sgot->output_section->vma + sgot->output_offset; | |
17528 | bfd_vma gotplt_address = (htab->root.sgot->output_section->vma | |
17529 | + htab->root.sgot->output_offset); | |
17530 | bfd_vma plt_address | |
17531 | = splt->output_section->vma + splt->output_offset; | |
17532 | ||
b38cadfb | 17533 | arm_put_trampoline (htab, output_bfd, |
9bcc30e4 | 17534 | splt->contents + htab->root.tlsdesc_plt, |
0855e32b NS |
17535 | dl_tlsdesc_lazy_trampoline, 6); |
17536 | ||
17537 | bfd_put_32 (output_bfd, | |
9bcc30e4 L |
17538 | gotplt_address + htab->root.tlsdesc_got |
17539 | - (plt_address + htab->root.tlsdesc_plt) | |
0855e32b | 17540 | - dl_tlsdesc_lazy_trampoline[6], |
9bcc30e4 | 17541 | splt->contents + htab->root.tlsdesc_plt + 24); |
0855e32b | 17542 | bfd_put_32 (output_bfd, |
9bcc30e4 | 17543 | got_address - (plt_address + htab->root.tlsdesc_plt) |
0855e32b | 17544 | - dl_tlsdesc_lazy_trampoline[7], |
9bcc30e4 | 17545 | splt->contents + htab->root.tlsdesc_plt + 24 + 4); |
0855e32b NS |
17546 | } |
17547 | ||
17548 | if (htab->tls_trampoline) | |
17549 | { | |
b38cadfb | 17550 | arm_put_trampoline (htab, output_bfd, |
0855e32b NS |
17551 | splt->contents + htab->tls_trampoline, |
17552 | tls_trampoline, 3); | |
17553 | #ifdef FOUR_WORD_PLT | |
17554 | bfd_put_32 (output_bfd, 0x00000000, | |
17555 | splt->contents + htab->tls_trampoline + 12); | |
b38cadfb | 17556 | #endif |
0855e32b NS |
17557 | } |
17558 | ||
90c14f0c | 17559 | if (htab->root.target_os == is_vxworks |
0e1862bb L |
17560 | && !bfd_link_pic (info) |
17561 | && htab->root.splt->size > 0) | |
00a97672 RS |
17562 | { |
17563 | /* Correct the .rel(a).plt.unloaded relocations. They will have | |
17564 | incorrect symbol indexes. */ | |
17565 | int num_plts; | |
eed62c48 | 17566 | unsigned char *p; |
00a97672 | 17567 | |
362d30a1 | 17568 | num_plts = ((htab->root.splt->size - htab->plt_header_size) |
00a97672 RS |
17569 | / htab->plt_entry_size); |
17570 | p = htab->srelplt2->contents + RELOC_SIZE (htab); | |
17571 | ||
17572 | for (; num_plts; num_plts--) | |
17573 | { | |
17574 | Elf_Internal_Rela rel; | |
17575 | ||
17576 | SWAP_RELOC_IN (htab) (output_bfd, p, &rel); | |
17577 | rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32); | |
17578 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, p); | |
17579 | p += RELOC_SIZE (htab); | |
17580 | ||
17581 | SWAP_RELOC_IN (htab) (output_bfd, p, &rel); | |
17582 | rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32); | |
17583 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, p); | |
17584 | p += RELOC_SIZE (htab); | |
17585 | } | |
17586 | } | |
252b5132 RH |
17587 | } |
17588 | ||
90c14f0c L |
17589 | if (htab->root.target_os == is_nacl |
17590 | && htab->root.iplt != NULL | |
17591 | && htab->root.iplt->size > 0) | |
99059e56 RM |
17592 | /* NaCl uses a special first entry in .iplt too. */ |
17593 | arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0); | |
17594 | ||
252b5132 | 17595 | /* Fill in the first three entries in the global offset table. */ |
229fcec5 | 17596 | if (sgot) |
252b5132 | 17597 | { |
229fcec5 MM |
17598 | if (sgot->size > 0) |
17599 | { | |
17600 | if (sdyn == NULL) | |
17601 | bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents); | |
17602 | else | |
17603 | bfd_put_32 (output_bfd, | |
17604 | sdyn->output_section->vma + sdyn->output_offset, | |
17605 | sgot->contents); | |
17606 | bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4); | |
17607 | bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8); | |
17608 | } | |
252b5132 | 17609 | |
229fcec5 MM |
17610 | elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4; |
17611 | } | |
252b5132 | 17612 | |
e8b09b87 CL |
17613 | /* At the very end of the .rofixup section is a pointer to the GOT. */ |
17614 | if (htab->fdpic_p && htab->srofixup != NULL) | |
17615 | { | |
17616 | struct elf_link_hash_entry *hgot = htab->root.hgot; | |
17617 | ||
17618 | bfd_vma got_value = hgot->root.u.def.value | |
17619 | + hgot->root.u.def.section->output_section->vma | |
17620 | + hgot->root.u.def.section->output_offset; | |
17621 | ||
cc850f74 | 17622 | arm_elf_add_rofixup (output_bfd, htab->srofixup, got_value); |
e8b09b87 CL |
17623 | |
17624 | /* Make sure we allocated and generated the same number of fixups. */ | |
17625 | BFD_ASSERT (htab->srofixup->reloc_count * 4 == htab->srofixup->size); | |
17626 | } | |
17627 | ||
0a1b45a2 | 17628 | return true; |
252b5132 RH |
17629 | } |
17630 | ||
0a1b45a2 | 17631 | static bool |
ed7e9d0b | 17632 | elf32_arm_init_file_header (bfd *abfd, struct bfd_link_info *link_info) |
ba96a88f | 17633 | { |
9b485d32 | 17634 | Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */ |
e489d0ae | 17635 | struct elf32_arm_link_hash_table *globals; |
ac4c9b04 | 17636 | struct elf_segment_map *m; |
ba96a88f | 17637 | |
ed7e9d0b | 17638 | if (!_bfd_elf_init_file_header (abfd, link_info)) |
0a1b45a2 | 17639 | return false; |
ed7e9d0b | 17640 | |
ba96a88f NC |
17641 | i_ehdrp = elf_elfheader (abfd); |
17642 | ||
94a3258f PB |
17643 | if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN) |
17644 | i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM; | |
ba96a88f | 17645 | i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION; |
e489d0ae | 17646 | |
93204d3a PB |
17647 | if (link_info) |
17648 | { | |
17649 | globals = elf32_arm_hash_table (link_info); | |
4dfe6ac6 | 17650 | if (globals != NULL && globals->byteswap_code) |
93204d3a | 17651 | i_ehdrp->e_flags |= EF_ARM_BE8; |
18a20338 CL |
17652 | |
17653 | if (globals->fdpic_p) | |
17654 | i_ehdrp->e_ident[EI_OSABI] |= ELFOSABI_ARM_FDPIC; | |
93204d3a | 17655 | } |
3bfcb652 NC |
17656 | |
17657 | if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5 | |
17658 | && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC))) | |
17659 | { | |
17660 | int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args); | |
5c294fee | 17661 | if (abi == AEABI_VFP_args_vfp) |
3bfcb652 NC |
17662 | i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD; |
17663 | else | |
17664 | i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT; | |
17665 | } | |
ac4c9b04 MG |
17666 | |
17667 | /* Scan segment to set p_flags attribute if it contains only sections with | |
f0728ee3 | 17668 | SHF_ARM_PURECODE flag. */ |
ac4c9b04 MG |
17669 | for (m = elf_seg_map (abfd); m != NULL; m = m->next) |
17670 | { | |
17671 | unsigned int j; | |
17672 | ||
17673 | if (m->count == 0) | |
17674 | continue; | |
17675 | for (j = 0; j < m->count; j++) | |
17676 | { | |
f0728ee3 | 17677 | if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE)) |
ac4c9b04 MG |
17678 | break; |
17679 | } | |
17680 | if (j == m->count) | |
17681 | { | |
17682 | m->p_flags = PF_X; | |
17683 | m->p_flags_valid = 1; | |
17684 | } | |
17685 | } | |
0a1b45a2 | 17686 | return true; |
ba96a88f NC |
17687 | } |
17688 | ||
99e4ae17 | 17689 | static enum elf_reloc_type_class |
7e612e98 AM |
17690 | elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED, |
17691 | const asection *rel_sec ATTRIBUTE_UNUSED, | |
17692 | const Elf_Internal_Rela *rela) | |
99e4ae17 | 17693 | { |
f51e552e | 17694 | switch ((int) ELF32_R_TYPE (rela->r_info)) |
99e4ae17 AJ |
17695 | { |
17696 | case R_ARM_RELATIVE: | |
17697 | return reloc_class_relative; | |
17698 | case R_ARM_JUMP_SLOT: | |
17699 | return reloc_class_plt; | |
17700 | case R_ARM_COPY: | |
17701 | return reloc_class_copy; | |
109575d7 JW |
17702 | case R_ARM_IRELATIVE: |
17703 | return reloc_class_ifunc; | |
99e4ae17 AJ |
17704 | default: |
17705 | return reloc_class_normal; | |
17706 | } | |
17707 | } | |
17708 | ||
e489d0ae | 17709 | static void |
cc364be6 | 17710 | arm_final_write_processing (bfd *abfd) |
e16bb312 | 17711 | { |
5a6c6817 | 17712 | bfd_arm_update_notes (abfd, ARM_NOTE_SECTION); |
e16bb312 NC |
17713 | } |
17714 | ||
0a1b45a2 | 17715 | static bool |
cc364be6 | 17716 | elf32_arm_final_write_processing (bfd *abfd) |
06f44071 | 17717 | { |
cc364be6 AM |
17718 | arm_final_write_processing (abfd); |
17719 | return _bfd_elf_final_write_processing (abfd); | |
06f44071 AM |
17720 | } |
17721 | ||
40a18ebd NC |
17722 | /* Return TRUE if this is an unwinding table entry. */ |
17723 | ||
0a1b45a2 | 17724 | static bool |
40a18ebd NC |
17725 | is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name) |
17726 | { | |
08dedd66 ML |
17727 | return (startswith (name, ELF_STRING_ARM_unwind) |
17728 | || startswith (name, ELF_STRING_ARM_unwind_once)); | |
40a18ebd NC |
17729 | } |
17730 | ||
17731 | ||
17732 | /* Set the type and flags for an ARM section. We do this by | |
17733 | the section name, which is a hack, but ought to work. */ | |
17734 | ||
0a1b45a2 | 17735 | static bool |
40a18ebd NC |
17736 | elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec) |
17737 | { | |
17738 | const char * name; | |
17739 | ||
fd361982 | 17740 | name = bfd_section_name (sec); |
40a18ebd NC |
17741 | |
17742 | if (is_arm_elf_unwind_section_name (abfd, name)) | |
17743 | { | |
17744 | hdr->sh_type = SHT_ARM_EXIDX; | |
17745 | hdr->sh_flags |= SHF_LINK_ORDER; | |
17746 | } | |
ac4c9b04 | 17747 | |
f0728ee3 AV |
17748 | if (sec->flags & SEC_ELF_PURECODE) |
17749 | hdr->sh_flags |= SHF_ARM_PURECODE; | |
ac4c9b04 | 17750 | |
0a1b45a2 | 17751 | return true; |
40a18ebd NC |
17752 | } |
17753 | ||
6dc132d9 L |
17754 | /* Handle an ARM specific section when reading an object file. This is |
17755 | called when bfd_section_from_shdr finds a section with an unknown | |
17756 | type. */ | |
40a18ebd | 17757 | |
0a1b45a2 | 17758 | static bool |
40a18ebd NC |
17759 | elf32_arm_section_from_shdr (bfd *abfd, |
17760 | Elf_Internal_Shdr * hdr, | |
6dc132d9 L |
17761 | const char *name, |
17762 | int shindex) | |
40a18ebd NC |
17763 | { |
17764 | /* There ought to be a place to keep ELF backend specific flags, but | |
17765 | at the moment there isn't one. We just keep track of the | |
17766 | sections by their name, instead. Fortunately, the ABI gives | |
17767 | names for all the ARM specific sections, so we will probably get | |
17768 | away with this. */ | |
17769 | switch (hdr->sh_type) | |
17770 | { | |
17771 | case SHT_ARM_EXIDX: | |
0951f019 RE |
17772 | case SHT_ARM_PREEMPTMAP: |
17773 | case SHT_ARM_ATTRIBUTES: | |
40a18ebd NC |
17774 | break; |
17775 | ||
17776 | default: | |
0a1b45a2 | 17777 | return false; |
40a18ebd NC |
17778 | } |
17779 | ||
6dc132d9 | 17780 | if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex)) |
0a1b45a2 | 17781 | return false; |
40a18ebd | 17782 | |
0a1b45a2 | 17783 | return true; |
40a18ebd | 17784 | } |
e489d0ae | 17785 | |
44444f50 NC |
17786 | static _arm_elf_section_data * |
17787 | get_arm_elf_section_data (asection * sec) | |
17788 | { | |
47b2e99c JZ |
17789 | if (sec && sec->owner && is_arm_elf (sec->owner)) |
17790 | return elf32_arm_section_data (sec); | |
44444f50 NC |
17791 | else |
17792 | return NULL; | |
8e3de13a NC |
17793 | } |
17794 | ||
4e617b1e PB |
17795 | typedef struct |
17796 | { | |
57402f1e | 17797 | void *flaginfo; |
4e617b1e | 17798 | struct bfd_link_info *info; |
91a5743d PB |
17799 | asection *sec; |
17800 | int sec_shndx; | |
6e0b88f1 AM |
17801 | int (*func) (void *, const char *, Elf_Internal_Sym *, |
17802 | asection *, struct elf_link_hash_entry *); | |
4e617b1e PB |
17803 | } output_arch_syminfo; |
17804 | ||
17805 | enum map_symbol_type | |
17806 | { | |
17807 | ARM_MAP_ARM, | |
17808 | ARM_MAP_THUMB, | |
17809 | ARM_MAP_DATA | |
17810 | }; | |
17811 | ||
17812 | ||
7413f23f | 17813 | /* Output a single mapping symbol. */ |
4e617b1e | 17814 | |
0a1b45a2 | 17815 | static bool |
7413f23f DJ |
17816 | elf32_arm_output_map_sym (output_arch_syminfo *osi, |
17817 | enum map_symbol_type type, | |
17818 | bfd_vma offset) | |
4e617b1e PB |
17819 | { |
17820 | static const char *names[3] = {"$a", "$t", "$d"}; | |
4e617b1e PB |
17821 | Elf_Internal_Sym sym; |
17822 | ||
91a5743d PB |
17823 | sym.st_value = osi->sec->output_section->vma |
17824 | + osi->sec->output_offset | |
17825 | + offset; | |
4e617b1e PB |
17826 | sym.st_size = 0; |
17827 | sym.st_other = 0; | |
17828 | sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE); | |
91a5743d | 17829 | sym.st_shndx = osi->sec_shndx; |
35fc36a8 | 17830 | sym.st_target_internal = 0; |
fe33d2fa | 17831 | elf32_arm_section_map_add (osi->sec, names[type][1], offset); |
57402f1e | 17832 | return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1; |
4e617b1e PB |
17833 | } |
17834 | ||
34e77a92 RS |
17835 | /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT. |
17836 | IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */ | |
4e617b1e | 17837 | |
0a1b45a2 | 17838 | static bool |
34e77a92 | 17839 | elf32_arm_output_plt_map_1 (output_arch_syminfo *osi, |
0a1b45a2 | 17840 | bool is_iplt_entry_p, |
34e77a92 RS |
17841 | union gotplt_union *root_plt, |
17842 | struct arm_plt_info *arm_plt) | |
4e617b1e | 17843 | { |
4e617b1e | 17844 | struct elf32_arm_link_hash_table *htab; |
34e77a92 | 17845 | bfd_vma addr, plt_header_size; |
4e617b1e | 17846 | |
34e77a92 | 17847 | if (root_plt->offset == (bfd_vma) -1) |
0a1b45a2 | 17848 | return true; |
4e617b1e | 17849 | |
4dfe6ac6 NC |
17850 | htab = elf32_arm_hash_table (osi->info); |
17851 | if (htab == NULL) | |
0a1b45a2 | 17852 | return false; |
4dfe6ac6 | 17853 | |
34e77a92 RS |
17854 | if (is_iplt_entry_p) |
17855 | { | |
17856 | osi->sec = htab->root.iplt; | |
17857 | plt_header_size = 0; | |
17858 | } | |
17859 | else | |
17860 | { | |
17861 | osi->sec = htab->root.splt; | |
17862 | plt_header_size = htab->plt_header_size; | |
17863 | } | |
17864 | osi->sec_shndx = (_bfd_elf_section_from_bfd_section | |
17865 | (osi->info->output_bfd, osi->sec->output_section)); | |
17866 | ||
17867 | addr = root_plt->offset & -2; | |
a57d1773 | 17868 | if (htab->root.target_os == is_vxworks) |
4e617b1e | 17869 | { |
7413f23f | 17870 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
0a1b45a2 | 17871 | return false; |
7413f23f | 17872 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8)) |
0a1b45a2 | 17873 | return false; |
7413f23f | 17874 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12)) |
0a1b45a2 | 17875 | return false; |
7413f23f | 17876 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20)) |
0a1b45a2 | 17877 | return false; |
4e617b1e | 17878 | } |
90c14f0c | 17879 | else if (htab->root.target_os == is_nacl) |
b38cadfb NC |
17880 | { |
17881 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) | |
0a1b45a2 | 17882 | return false; |
b38cadfb | 17883 | } |
7801f98f CL |
17884 | else if (htab->fdpic_p) |
17885 | { | |
cc850f74 | 17886 | enum map_symbol_type type = using_thumb_only (htab) |
59029f57 CL |
17887 | ? ARM_MAP_THUMB |
17888 | : ARM_MAP_ARM; | |
17889 | ||
7801f98f | 17890 | if (elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt)) |
4b24dd1a | 17891 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4)) |
0a1b45a2 | 17892 | return false; |
59029f57 | 17893 | if (!elf32_arm_output_map_sym (osi, type, addr)) |
0a1b45a2 | 17894 | return false; |
7801f98f | 17895 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 16)) |
0a1b45a2 | 17896 | return false; |
cc850f74 | 17897 | if (htab->plt_entry_size == 4 * ARRAY_SIZE (elf32_arm_fdpic_plt_entry)) |
4b24dd1a | 17898 | if (!elf32_arm_output_map_sym (osi, type, addr + 24)) |
0a1b45a2 | 17899 | return false; |
7801f98f | 17900 | } |
eed94f8f NC |
17901 | else if (using_thumb_only (htab)) |
17902 | { | |
17903 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr)) | |
0a1b45a2 | 17904 | return false; |
6a631e86 | 17905 | } |
4e617b1e PB |
17906 | else |
17907 | { | |
0a1b45a2 | 17908 | bool thumb_stub_p; |
bd97cb95 | 17909 | |
34e77a92 RS |
17910 | thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt); |
17911 | if (thumb_stub_p) | |
4e617b1e | 17912 | { |
7413f23f | 17913 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4)) |
0a1b45a2 | 17914 | return false; |
4e617b1e PB |
17915 | } |
17916 | #ifdef FOUR_WORD_PLT | |
7413f23f | 17917 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
0a1b45a2 | 17918 | return false; |
7413f23f | 17919 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12)) |
0a1b45a2 | 17920 | return false; |
4e617b1e | 17921 | #else |
906e58ca | 17922 | /* A three-word PLT with no Thumb thunk contains only Arm code, |
4e617b1e PB |
17923 | so only need to output a mapping symbol for the first PLT entry and |
17924 | entries with thumb thunks. */ | |
34e77a92 | 17925 | if (thumb_stub_p || addr == plt_header_size) |
4e617b1e | 17926 | { |
7413f23f | 17927 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
0a1b45a2 | 17928 | return false; |
4e617b1e PB |
17929 | } |
17930 | #endif | |
17931 | } | |
17932 | ||
0a1b45a2 | 17933 | return true; |
4e617b1e PB |
17934 | } |
17935 | ||
34e77a92 RS |
17936 | /* Output mapping symbols for PLT entries associated with H. */ |
17937 | ||
0a1b45a2 | 17938 | static bool |
34e77a92 RS |
17939 | elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf) |
17940 | { | |
17941 | output_arch_syminfo *osi = (output_arch_syminfo *) inf; | |
17942 | struct elf32_arm_link_hash_entry *eh; | |
17943 | ||
17944 | if (h->root.type == bfd_link_hash_indirect) | |
0a1b45a2 | 17945 | return true; |
34e77a92 RS |
17946 | |
17947 | if (h->root.type == bfd_link_hash_warning) | |
17948 | /* When warning symbols are created, they **replace** the "real" | |
17949 | entry in the hash table, thus we never get to see the real | |
17950 | symbol in a hash traversal. So look at it now. */ | |
17951 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
17952 | ||
17953 | eh = (struct elf32_arm_link_hash_entry *) h; | |
17954 | return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h), | |
17955 | &h->plt, &eh->plt); | |
17956 | } | |
17957 | ||
4f4faa4d TP |
17958 | /* Bind a veneered symbol to its veneer identified by its hash entry |
17959 | STUB_ENTRY. The veneered location thus loose its symbol. */ | |
17960 | ||
17961 | static void | |
17962 | arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry) | |
17963 | { | |
17964 | struct elf32_arm_link_hash_entry *hash = stub_entry->h; | |
17965 | ||
17966 | BFD_ASSERT (hash); | |
17967 | hash->root.root.u.def.section = stub_entry->stub_sec; | |
17968 | hash->root.root.u.def.value = stub_entry->stub_offset; | |
17969 | hash->root.size = stub_entry->stub_size; | |
17970 | } | |
17971 | ||
7413f23f DJ |
17972 | /* Output a single local symbol for a generated stub. */ |
17973 | ||
0a1b45a2 | 17974 | static bool |
7413f23f DJ |
17975 | elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name, |
17976 | bfd_vma offset, bfd_vma size) | |
17977 | { | |
7413f23f DJ |
17978 | Elf_Internal_Sym sym; |
17979 | ||
7413f23f DJ |
17980 | sym.st_value = osi->sec->output_section->vma |
17981 | + osi->sec->output_offset | |
17982 | + offset; | |
17983 | sym.st_size = size; | |
17984 | sym.st_other = 0; | |
17985 | sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
17986 | sym.st_shndx = osi->sec_shndx; | |
35fc36a8 | 17987 | sym.st_target_internal = 0; |
57402f1e | 17988 | return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1; |
7413f23f | 17989 | } |
4e617b1e | 17990 | |
0a1b45a2 | 17991 | static bool |
8029a119 NC |
17992 | arm_map_one_stub (struct bfd_hash_entry * gen_entry, |
17993 | void * in_arg) | |
da5938a2 NC |
17994 | { |
17995 | struct elf32_arm_stub_hash_entry *stub_entry; | |
da5938a2 NC |
17996 | asection *stub_sec; |
17997 | bfd_vma addr; | |
7413f23f | 17998 | char *stub_name; |
9a008db3 | 17999 | output_arch_syminfo *osi; |
d3ce72d0 | 18000 | const insn_sequence *template_sequence; |
461a49ca DJ |
18001 | enum stub_insn_type prev_type; |
18002 | int size; | |
18003 | int i; | |
18004 | enum map_symbol_type sym_type; | |
da5938a2 NC |
18005 | |
18006 | /* Massage our args to the form they really have. */ | |
18007 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; | |
9a008db3 | 18008 | osi = (output_arch_syminfo *) in_arg; |
da5938a2 | 18009 | |
da5938a2 NC |
18010 | stub_sec = stub_entry->stub_sec; |
18011 | ||
18012 | /* Ensure this stub is attached to the current section being | |
7413f23f | 18013 | processed. */ |
da5938a2 | 18014 | if (stub_sec != osi->sec) |
0a1b45a2 | 18015 | return true; |
da5938a2 | 18016 | |
7413f23f | 18017 | addr = (bfd_vma) stub_entry->stub_offset; |
d3ce72d0 | 18018 | template_sequence = stub_entry->stub_template; |
4f4faa4d TP |
18019 | |
18020 | if (arm_stub_sym_claimed (stub_entry->stub_type)) | |
18021 | arm_stub_claim_sym (stub_entry); | |
18022 | else | |
7413f23f | 18023 | { |
4f4faa4d TP |
18024 | stub_name = stub_entry->output_name; |
18025 | switch (template_sequence[0].type) | |
18026 | { | |
18027 | case ARM_TYPE: | |
18028 | if (!elf32_arm_output_stub_sym (osi, stub_name, addr, | |
18029 | stub_entry->stub_size)) | |
0a1b45a2 | 18030 | return false; |
4f4faa4d TP |
18031 | break; |
18032 | case THUMB16_TYPE: | |
18033 | case THUMB32_TYPE: | |
18034 | if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1, | |
18035 | stub_entry->stub_size)) | |
0a1b45a2 | 18036 | return false; |
4f4faa4d TP |
18037 | break; |
18038 | default: | |
18039 | BFD_FAIL (); | |
18040 | return 0; | |
18041 | } | |
7413f23f | 18042 | } |
da5938a2 | 18043 | |
461a49ca DJ |
18044 | prev_type = DATA_TYPE; |
18045 | size = 0; | |
18046 | for (i = 0; i < stub_entry->stub_template_size; i++) | |
18047 | { | |
d3ce72d0 | 18048 | switch (template_sequence[i].type) |
461a49ca DJ |
18049 | { |
18050 | case ARM_TYPE: | |
18051 | sym_type = ARM_MAP_ARM; | |
18052 | break; | |
18053 | ||
18054 | case THUMB16_TYPE: | |
48229727 | 18055 | case THUMB32_TYPE: |
461a49ca DJ |
18056 | sym_type = ARM_MAP_THUMB; |
18057 | break; | |
18058 | ||
18059 | case DATA_TYPE: | |
18060 | sym_type = ARM_MAP_DATA; | |
18061 | break; | |
18062 | ||
18063 | default: | |
18064 | BFD_FAIL (); | |
0a1b45a2 | 18065 | return false; |
461a49ca DJ |
18066 | } |
18067 | ||
d3ce72d0 | 18068 | if (template_sequence[i].type != prev_type) |
461a49ca | 18069 | { |
d3ce72d0 | 18070 | prev_type = template_sequence[i].type; |
461a49ca | 18071 | if (!elf32_arm_output_map_sym (osi, sym_type, addr + size)) |
0a1b45a2 | 18072 | return false; |
461a49ca DJ |
18073 | } |
18074 | ||
d3ce72d0 | 18075 | switch (template_sequence[i].type) |
461a49ca DJ |
18076 | { |
18077 | case ARM_TYPE: | |
48229727 | 18078 | case THUMB32_TYPE: |
461a49ca DJ |
18079 | size += 4; |
18080 | break; | |
18081 | ||
18082 | case THUMB16_TYPE: | |
18083 | size += 2; | |
18084 | break; | |
18085 | ||
18086 | case DATA_TYPE: | |
18087 | size += 4; | |
18088 | break; | |
18089 | ||
18090 | default: | |
18091 | BFD_FAIL (); | |
0a1b45a2 | 18092 | return false; |
461a49ca DJ |
18093 | } |
18094 | } | |
18095 | ||
0a1b45a2 | 18096 | return true; |
da5938a2 NC |
18097 | } |
18098 | ||
33811162 DG |
18099 | /* Output mapping symbols for linker generated sections, |
18100 | and for those data-only sections that do not have a | |
18101 | $d. */ | |
4e617b1e | 18102 | |
0a1b45a2 | 18103 | static bool |
4e617b1e | 18104 | elf32_arm_output_arch_local_syms (bfd *output_bfd, |
906e58ca | 18105 | struct bfd_link_info *info, |
57402f1e | 18106 | void *flaginfo, |
6e0b88f1 AM |
18107 | int (*func) (void *, const char *, |
18108 | Elf_Internal_Sym *, | |
18109 | asection *, | |
18110 | struct elf_link_hash_entry *)) | |
4e617b1e PB |
18111 | { |
18112 | output_arch_syminfo osi; | |
18113 | struct elf32_arm_link_hash_table *htab; | |
91a5743d PB |
18114 | bfd_vma offset; |
18115 | bfd_size_type size; | |
33811162 | 18116 | bfd *input_bfd; |
4e617b1e | 18117 | |
25d17459 L |
18118 | if (info->strip == strip_all |
18119 | && !info->emitrelocations | |
18120 | && !bfd_link_relocatable (info)) | |
18121 | return true; | |
18122 | ||
4e617b1e | 18123 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 | 18124 | if (htab == NULL) |
0a1b45a2 | 18125 | return false; |
4dfe6ac6 | 18126 | |
906e58ca | 18127 | check_use_blx (htab); |
91a5743d | 18128 | |
57402f1e | 18129 | osi.flaginfo = flaginfo; |
4e617b1e PB |
18130 | osi.info = info; |
18131 | osi.func = func; | |
906e58ca | 18132 | |
33811162 DG |
18133 | /* Add a $d mapping symbol to data-only sections that |
18134 | don't have any mapping symbol. This may result in (harmless) redundant | |
18135 | mapping symbols. */ | |
18136 | for (input_bfd = info->input_bfds; | |
18137 | input_bfd != NULL; | |
c72f2fb2 | 18138 | input_bfd = input_bfd->link.next) |
33811162 DG |
18139 | { |
18140 | if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS) | |
18141 | for (osi.sec = input_bfd->sections; | |
18142 | osi.sec != NULL; | |
18143 | osi.sec = osi.sec->next) | |
18144 | { | |
18145 | if (osi.sec->output_section != NULL | |
f7dd8c79 DJ |
18146 | && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE)) |
18147 | != 0) | |
33811162 DG |
18148 | && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED)) |
18149 | == SEC_HAS_CONTENTS | |
18150 | && get_arm_elf_section_data (osi.sec) != NULL | |
501abfe0 | 18151 | && get_arm_elf_section_data (osi.sec)->mapcount == 0 |
7d500b83 CL |
18152 | && osi.sec->size > 0 |
18153 | && (osi.sec->flags & SEC_EXCLUDE) == 0) | |
33811162 DG |
18154 | { |
18155 | osi.sec_shndx = _bfd_elf_section_from_bfd_section | |
18156 | (output_bfd, osi.sec->output_section); | |
18157 | if (osi.sec_shndx != (int)SHN_BAD) | |
18158 | elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0); | |
18159 | } | |
18160 | } | |
18161 | } | |
18162 | ||
91a5743d PB |
18163 | /* ARM->Thumb glue. */ |
18164 | if (htab->arm_glue_size > 0) | |
18165 | { | |
3d4d4302 AM |
18166 | osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner, |
18167 | ARM2THUMB_GLUE_SECTION_NAME); | |
91a5743d PB |
18168 | |
18169 | osi.sec_shndx = _bfd_elf_section_from_bfd_section | |
18170 | (output_bfd, osi.sec->output_section); | |
0e1862bb | 18171 | if (bfd_link_pic (info) || htab->root.is_relocatable_executable |
91a5743d PB |
18172 | || htab->pic_veneer) |
18173 | size = ARM2THUMB_PIC_GLUE_SIZE; | |
18174 | else if (htab->use_blx) | |
18175 | size = ARM2THUMB_V5_STATIC_GLUE_SIZE; | |
18176 | else | |
18177 | size = ARM2THUMB_STATIC_GLUE_SIZE; | |
4e617b1e | 18178 | |
91a5743d PB |
18179 | for (offset = 0; offset < htab->arm_glue_size; offset += size) |
18180 | { | |
7413f23f DJ |
18181 | elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset); |
18182 | elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4); | |
91a5743d PB |
18183 | } |
18184 | } | |
18185 | ||
18186 | /* Thumb->ARM glue. */ | |
18187 | if (htab->thumb_glue_size > 0) | |
18188 | { | |
3d4d4302 AM |
18189 | osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner, |
18190 | THUMB2ARM_GLUE_SECTION_NAME); | |
91a5743d PB |
18191 | |
18192 | osi.sec_shndx = _bfd_elf_section_from_bfd_section | |
18193 | (output_bfd, osi.sec->output_section); | |
18194 | size = THUMB2ARM_GLUE_SIZE; | |
18195 | ||
18196 | for (offset = 0; offset < htab->thumb_glue_size; offset += size) | |
18197 | { | |
7413f23f DJ |
18198 | elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset); |
18199 | elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4); | |
91a5743d PB |
18200 | } |
18201 | } | |
18202 | ||
845b51d6 PB |
18203 | /* ARMv4 BX veneers. */ |
18204 | if (htab->bx_glue_size > 0) | |
18205 | { | |
3d4d4302 AM |
18206 | osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner, |
18207 | ARM_BX_GLUE_SECTION_NAME); | |
845b51d6 PB |
18208 | |
18209 | osi.sec_shndx = _bfd_elf_section_from_bfd_section | |
18210 | (output_bfd, osi.sec->output_section); | |
18211 | ||
7413f23f | 18212 | elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0); |
845b51d6 PB |
18213 | } |
18214 | ||
8029a119 NC |
18215 | /* Long calls stubs. */ |
18216 | if (htab->stub_bfd && htab->stub_bfd->sections) | |
18217 | { | |
da5938a2 | 18218 | asection* stub_sec; |
8029a119 | 18219 | |
da5938a2 NC |
18220 | for (stub_sec = htab->stub_bfd->sections; |
18221 | stub_sec != NULL; | |
8029a119 NC |
18222 | stub_sec = stub_sec->next) |
18223 | { | |
18224 | /* Ignore non-stub sections. */ | |
18225 | if (!strstr (stub_sec->name, STUB_SUFFIX)) | |
18226 | continue; | |
da5938a2 | 18227 | |
8029a119 | 18228 | osi.sec = stub_sec; |
da5938a2 | 18229 | |
8029a119 NC |
18230 | osi.sec_shndx = _bfd_elf_section_from_bfd_section |
18231 | (output_bfd, osi.sec->output_section); | |
da5938a2 | 18232 | |
8029a119 NC |
18233 | bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi); |
18234 | } | |
18235 | } | |
da5938a2 | 18236 | |
91a5743d | 18237 | /* Finally, output mapping symbols for the PLT. */ |
34e77a92 | 18238 | if (htab->root.splt && htab->root.splt->size > 0) |
4e617b1e | 18239 | { |
34e77a92 RS |
18240 | osi.sec = htab->root.splt; |
18241 | osi.sec_shndx = (_bfd_elf_section_from_bfd_section | |
18242 | (output_bfd, osi.sec->output_section)); | |
18243 | ||
a57d1773 | 18244 | /* Output mapping symbols for the plt header. */ |
90c14f0c | 18245 | if (htab->root.target_os == is_vxworks) |
34e77a92 RS |
18246 | { |
18247 | /* VxWorks shared libraries have no PLT header. */ | |
0e1862bb | 18248 | if (!bfd_link_pic (info)) |
34e77a92 RS |
18249 | { |
18250 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0)) | |
0a1b45a2 | 18251 | return false; |
34e77a92 | 18252 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12)) |
0a1b45a2 | 18253 | return false; |
34e77a92 RS |
18254 | } |
18255 | } | |
90c14f0c | 18256 | else if (htab->root.target_os == is_nacl) |
b38cadfb NC |
18257 | { |
18258 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0)) | |
0a1b45a2 | 18259 | return false; |
b38cadfb | 18260 | } |
59029f57 | 18261 | else if (using_thumb_only (htab) && !htab->fdpic_p) |
eed94f8f NC |
18262 | { |
18263 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0)) | |
0a1b45a2 | 18264 | return false; |
eed94f8f | 18265 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12)) |
0a1b45a2 | 18266 | return false; |
eed94f8f | 18267 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16)) |
0a1b45a2 | 18268 | return false; |
eed94f8f | 18269 | } |
a57d1773 | 18270 | else if (!htab->fdpic_p) |
4e617b1e | 18271 | { |
7413f23f | 18272 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0)) |
0a1b45a2 | 18273 | return false; |
34e77a92 RS |
18274 | #ifndef FOUR_WORD_PLT |
18275 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16)) | |
0a1b45a2 | 18276 | return false; |
34e77a92 | 18277 | #endif |
4e617b1e PB |
18278 | } |
18279 | } | |
90c14f0c L |
18280 | if (htab->root.target_os == is_nacl |
18281 | && htab->root.iplt | |
18282 | && htab->root.iplt->size > 0) | |
99059e56 RM |
18283 | { |
18284 | /* NaCl uses a special first entry in .iplt too. */ | |
18285 | osi.sec = htab->root.iplt; | |
18286 | osi.sec_shndx = (_bfd_elf_section_from_bfd_section | |
18287 | (output_bfd, osi.sec->output_section)); | |
18288 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0)) | |
0a1b45a2 | 18289 | return false; |
99059e56 | 18290 | } |
34e77a92 RS |
18291 | if ((htab->root.splt && htab->root.splt->size > 0) |
18292 | || (htab->root.iplt && htab->root.iplt->size > 0)) | |
4e617b1e | 18293 | { |
34e77a92 RS |
18294 | elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi); |
18295 | for (input_bfd = info->input_bfds; | |
18296 | input_bfd != NULL; | |
c72f2fb2 | 18297 | input_bfd = input_bfd->link.next) |
34e77a92 RS |
18298 | { |
18299 | struct arm_local_iplt_info **local_iplt; | |
18300 | unsigned int i, num_syms; | |
4e617b1e | 18301 | |
34e77a92 RS |
18302 | local_iplt = elf32_arm_local_iplt (input_bfd); |
18303 | if (local_iplt != NULL) | |
18304 | { | |
18305 | num_syms = elf_symtab_hdr (input_bfd).sh_info; | |
74fd118f NC |
18306 | if (num_syms > elf32_arm_num_entries (input_bfd)) |
18307 | { | |
18308 | _bfd_error_handler (_("\ | |
18309 | %pB: Number of symbols in input file has increased from %lu to %u\n"), | |
18310 | input_bfd, | |
18311 | (unsigned long) elf32_arm_num_entries (input_bfd), | |
18312 | num_syms); | |
18313 | return false; | |
18314 | } | |
34e77a92 RS |
18315 | for (i = 0; i < num_syms; i++) |
18316 | if (local_iplt[i] != NULL | |
0a1b45a2 | 18317 | && !elf32_arm_output_plt_map_1 (&osi, true, |
34e77a92 RS |
18318 | &local_iplt[i]->root, |
18319 | &local_iplt[i]->arm)) | |
0a1b45a2 | 18320 | return false; |
34e77a92 RS |
18321 | } |
18322 | } | |
18323 | } | |
9bcc30e4 | 18324 | if (htab->root.tlsdesc_plt != 0) |
0855e32b NS |
18325 | { |
18326 | /* Mapping symbols for the lazy tls trampoline. */ | |
9bcc30e4 L |
18327 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, |
18328 | htab->root.tlsdesc_plt)) | |
0a1b45a2 | 18329 | return false; |
b38cadfb | 18330 | |
0855e32b | 18331 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, |
9bcc30e4 | 18332 | htab->root.tlsdesc_plt + 24)) |
0a1b45a2 | 18333 | return false; |
0855e32b NS |
18334 | } |
18335 | if (htab->tls_trampoline != 0) | |
18336 | { | |
18337 | /* Mapping symbols for the tls trampoline. */ | |
18338 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline)) | |
0a1b45a2 | 18339 | return false; |
0855e32b NS |
18340 | #ifdef FOUR_WORD_PLT |
18341 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, | |
18342 | htab->tls_trampoline + 12)) | |
0a1b45a2 | 18343 | return false; |
b38cadfb | 18344 | #endif |
0855e32b | 18345 | } |
b38cadfb | 18346 | |
0a1b45a2 | 18347 | return true; |
4e617b1e PB |
18348 | } |
18349 | ||
54ddd295 TP |
18350 | /* Filter normal symbols of CMSE entry functions of ABFD to include in |
18351 | the import library. All SYMCOUNT symbols of ABFD can be examined | |
18352 | from their pointers in SYMS. Pointers of symbols to keep should be | |
18353 | stored continuously at the beginning of that array. | |
18354 | ||
18355 | Returns the number of symbols to keep. */ | |
18356 | ||
18357 | static unsigned int | |
18358 | elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED, | |
18359 | struct bfd_link_info *info, | |
18360 | asymbol **syms, long symcount) | |
18361 | { | |
18362 | size_t maxnamelen; | |
18363 | char *cmse_name; | |
18364 | long src_count, dst_count = 0; | |
18365 | struct elf32_arm_link_hash_table *htab; | |
18366 | ||
18367 | htab = elf32_arm_hash_table (info); | |
18368 | if (!htab->stub_bfd || !htab->stub_bfd->sections) | |
18369 | symcount = 0; | |
18370 | ||
18371 | maxnamelen = 128; | |
18372 | cmse_name = (char *) bfd_malloc (maxnamelen); | |
7a0fb7be NC |
18373 | BFD_ASSERT (cmse_name); |
18374 | ||
54ddd295 TP |
18375 | for (src_count = 0; src_count < symcount; src_count++) |
18376 | { | |
18377 | struct elf32_arm_link_hash_entry *cmse_hash; | |
18378 | asymbol *sym; | |
18379 | flagword flags; | |
18380 | char *name; | |
18381 | size_t namelen; | |
18382 | ||
18383 | sym = syms[src_count]; | |
18384 | flags = sym->flags; | |
18385 | name = (char *) bfd_asymbol_name (sym); | |
18386 | ||
18387 | if ((flags & BSF_FUNCTION) != BSF_FUNCTION) | |
18388 | continue; | |
18389 | if (!(flags & (BSF_GLOBAL | BSF_WEAK))) | |
18390 | continue; | |
18391 | ||
18392 | namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1; | |
18393 | if (namelen > maxnamelen) | |
18394 | { | |
18395 | cmse_name = (char *) | |
18396 | bfd_realloc (cmse_name, namelen); | |
18397 | maxnamelen = namelen; | |
18398 | } | |
18399 | snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name); | |
18400 | cmse_hash = (struct elf32_arm_link_hash_entry *) | |
0a1b45a2 | 18401 | elf_link_hash_lookup (&(htab)->root, cmse_name, false, false, true); |
54ddd295 TP |
18402 | |
18403 | if (!cmse_hash | |
18404 | || (cmse_hash->root.root.type != bfd_link_hash_defined | |
18405 | && cmse_hash->root.root.type != bfd_link_hash_defweak) | |
18406 | || cmse_hash->root.type != STT_FUNC) | |
18407 | continue; | |
18408 | ||
54ddd295 TP |
18409 | syms[dst_count++] = sym; |
18410 | } | |
18411 | free (cmse_name); | |
18412 | ||
18413 | syms[dst_count] = NULL; | |
18414 | ||
18415 | return dst_count; | |
18416 | } | |
18417 | ||
18418 | /* Filter symbols of ABFD to include in the import library. All | |
18419 | SYMCOUNT symbols of ABFD can be examined from their pointers in | |
18420 | SYMS. Pointers of symbols to keep should be stored continuously at | |
18421 | the beginning of that array. | |
18422 | ||
18423 | Returns the number of symbols to keep. */ | |
18424 | ||
18425 | static unsigned int | |
18426 | elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED, | |
18427 | struct bfd_link_info *info, | |
18428 | asymbol **syms, long symcount) | |
18429 | { | |
18430 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info); | |
18431 | ||
046734ff TP |
18432 | /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on |
18433 | Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import | |
18434 | library to be a relocatable object file. */ | |
18435 | BFD_ASSERT (!(bfd_get_file_flags (info->out_implib_bfd) & EXEC_P)); | |
54ddd295 TP |
18436 | if (globals->cmse_implib) |
18437 | return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount); | |
18438 | else | |
18439 | return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount); | |
18440 | } | |
18441 | ||
e489d0ae PB |
18442 | /* Allocate target specific section data. */ |
18443 | ||
0a1b45a2 | 18444 | static bool |
e489d0ae PB |
18445 | elf32_arm_new_section_hook (bfd *abfd, asection *sec) |
18446 | { | |
f592407e AM |
18447 | if (!sec->used_by_bfd) |
18448 | { | |
18449 | _arm_elf_section_data *sdata; | |
986f0783 | 18450 | size_t amt = sizeof (*sdata); |
e489d0ae | 18451 | |
21d799b5 | 18452 | sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt); |
f592407e | 18453 | if (sdata == NULL) |
0a1b45a2 | 18454 | return false; |
f592407e AM |
18455 | sec->used_by_bfd = sdata; |
18456 | } | |
e489d0ae PB |
18457 | |
18458 | return _bfd_elf_new_section_hook (abfd, sec); | |
18459 | } | |
18460 | ||
18461 | ||
18462 | /* Used to order a list of mapping symbols by address. */ | |
18463 | ||
18464 | static int | |
18465 | elf32_arm_compare_mapping (const void * a, const void * b) | |
18466 | { | |
7f6a71ff JM |
18467 | const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a; |
18468 | const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b; | |
18469 | ||
18470 | if (amap->vma > bmap->vma) | |
18471 | return 1; | |
18472 | else if (amap->vma < bmap->vma) | |
18473 | return -1; | |
18474 | else if (amap->type > bmap->type) | |
18475 | /* Ensure results do not depend on the host qsort for objects with | |
18476 | multiple mapping symbols at the same address by sorting on type | |
18477 | after vma. */ | |
18478 | return 1; | |
18479 | else if (amap->type < bmap->type) | |
18480 | return -1; | |
18481 | else | |
18482 | return 0; | |
e489d0ae PB |
18483 | } |
18484 | ||
2468f9c9 PB |
18485 | /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */ |
18486 | ||
18487 | static unsigned long | |
18488 | offset_prel31 (unsigned long addr, bfd_vma offset) | |
18489 | { | |
18490 | return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful); | |
18491 | } | |
18492 | ||
18493 | /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31 | |
18494 | relocations. */ | |
18495 | ||
18496 | static void | |
18497 | copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset) | |
18498 | { | |
18499 | unsigned long first_word = bfd_get_32 (output_bfd, from); | |
18500 | unsigned long second_word = bfd_get_32 (output_bfd, from + 4); | |
b38cadfb | 18501 | |
2468f9c9 PB |
18502 | /* High bit of first word is supposed to be zero. */ |
18503 | if ((first_word & 0x80000000ul) == 0) | |
18504 | first_word = offset_prel31 (first_word, offset); | |
b38cadfb | 18505 | |
2468f9c9 PB |
18506 | /* If the high bit of the first word is clear, and the bit pattern is not 0x1 |
18507 | (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */ | |
18508 | if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0)) | |
18509 | second_word = offset_prel31 (second_word, offset); | |
b38cadfb | 18510 | |
2468f9c9 PB |
18511 | bfd_put_32 (output_bfd, first_word, to); |
18512 | bfd_put_32 (output_bfd, second_word, to + 4); | |
18513 | } | |
e489d0ae | 18514 | |
48229727 JB |
18515 | /* Data for make_branch_to_a8_stub(). */ |
18516 | ||
b38cadfb NC |
18517 | struct a8_branch_to_stub_data |
18518 | { | |
48229727 JB |
18519 | asection *writing_section; |
18520 | bfd_byte *contents; | |
18521 | }; | |
18522 | ||
18523 | ||
18524 | /* Helper to insert branches to Cortex-A8 erratum stubs in the right | |
18525 | places for a particular section. */ | |
18526 | ||
0a1b45a2 | 18527 | static bool |
48229727 | 18528 | make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry, |
99059e56 | 18529 | void *in_arg) |
48229727 JB |
18530 | { |
18531 | struct elf32_arm_stub_hash_entry *stub_entry; | |
18532 | struct a8_branch_to_stub_data *data; | |
18533 | bfd_byte *contents; | |
18534 | unsigned long branch_insn; | |
18535 | bfd_vma veneered_insn_loc, veneer_entry_loc; | |
18536 | bfd_signed_vma branch_offset; | |
18537 | bfd *abfd; | |
8d9d9490 | 18538 | unsigned int loc; |
48229727 JB |
18539 | |
18540 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; | |
18541 | data = (struct a8_branch_to_stub_data *) in_arg; | |
18542 | ||
18543 | if (stub_entry->target_section != data->writing_section | |
4563a860 | 18544 | || stub_entry->stub_type < arm_stub_a8_veneer_lwm) |
0a1b45a2 | 18545 | return true; |
48229727 JB |
18546 | |
18547 | contents = data->contents; | |
18548 | ||
8d9d9490 TP |
18549 | /* We use target_section as Cortex-A8 erratum workaround stubs are only |
18550 | generated when both source and target are in the same section. */ | |
48229727 JB |
18551 | veneered_insn_loc = stub_entry->target_section->output_section->vma |
18552 | + stub_entry->target_section->output_offset | |
8d9d9490 | 18553 | + stub_entry->source_value; |
48229727 JB |
18554 | |
18555 | veneer_entry_loc = stub_entry->stub_sec->output_section->vma | |
18556 | + stub_entry->stub_sec->output_offset | |
18557 | + stub_entry->stub_offset; | |
18558 | ||
18559 | if (stub_entry->stub_type == arm_stub_a8_veneer_blx) | |
18560 | veneered_insn_loc &= ~3u; | |
18561 | ||
18562 | branch_offset = veneer_entry_loc - veneered_insn_loc - 4; | |
18563 | ||
18564 | abfd = stub_entry->target_section->owner; | |
8d9d9490 | 18565 | loc = stub_entry->source_value; |
48229727 JB |
18566 | |
18567 | /* We attempt to avoid this condition by setting stubs_always_after_branch | |
18568 | in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround. | |
18569 | This check is just to be on the safe side... */ | |
18570 | if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff)) | |
18571 | { | |
871b3ab2 | 18572 | _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub is " |
4eca0228 | 18573 | "allocated in unsafe location"), abfd); |
0a1b45a2 | 18574 | return false; |
48229727 JB |
18575 | } |
18576 | ||
18577 | switch (stub_entry->stub_type) | |
18578 | { | |
18579 | case arm_stub_a8_veneer_b: | |
18580 | case arm_stub_a8_veneer_b_cond: | |
18581 | branch_insn = 0xf0009000; | |
18582 | goto jump24; | |
18583 | ||
18584 | case arm_stub_a8_veneer_blx: | |
18585 | branch_insn = 0xf000e800; | |
18586 | goto jump24; | |
18587 | ||
18588 | case arm_stub_a8_veneer_bl: | |
18589 | { | |
18590 | unsigned int i1, j1, i2, j2, s; | |
18591 | ||
18592 | branch_insn = 0xf000d000; | |
18593 | ||
18594 | jump24: | |
18595 | if (branch_offset < -16777216 || branch_offset > 16777214) | |
18596 | { | |
18597 | /* There's not much we can do apart from complain if this | |
18598 | happens. */ | |
871b3ab2 | 18599 | _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub out " |
4eca0228 | 18600 | "of range (input file too large)"), abfd); |
0a1b45a2 | 18601 | return false; |
48229727 JB |
18602 | } |
18603 | ||
18604 | /* i1 = not(j1 eor s), so: | |
18605 | not i1 = j1 eor s | |
18606 | j1 = (not i1) eor s. */ | |
18607 | ||
18608 | branch_insn |= (branch_offset >> 1) & 0x7ff; | |
18609 | branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16; | |
18610 | i2 = (branch_offset >> 22) & 1; | |
18611 | i1 = (branch_offset >> 23) & 1; | |
18612 | s = (branch_offset >> 24) & 1; | |
18613 | j1 = (!i1) ^ s; | |
18614 | j2 = (!i2) ^ s; | |
18615 | branch_insn |= j2 << 11; | |
18616 | branch_insn |= j1 << 13; | |
18617 | branch_insn |= s << 26; | |
18618 | } | |
18619 | break; | |
18620 | ||
18621 | default: | |
18622 | BFD_FAIL (); | |
0a1b45a2 | 18623 | return false; |
48229727 JB |
18624 | } |
18625 | ||
8d9d9490 TP |
18626 | bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]); |
18627 | bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]); | |
48229727 | 18628 | |
0a1b45a2 | 18629 | return true; |
48229727 JB |
18630 | } |
18631 | ||
a504d23a LA |
18632 | /* Beginning of stm32l4xx work-around. */ |
18633 | ||
18634 | /* Functions encoding instructions necessary for the emission of the | |
18635 | fix-stm32l4xx-629360. | |
18636 | Encoding is extracted from the | |
18637 | ARM (C) Architecture Reference Manual | |
18638 | ARMv7-A and ARMv7-R edition | |
18639 | ARM DDI 0406C.b (ID072512). */ | |
18640 | ||
18641 | static inline bfd_vma | |
82188b29 | 18642 | create_instruction_branch_absolute (int branch_offset) |
a504d23a LA |
18643 | { |
18644 | /* A8.8.18 B (A8-334) | |
18645 | B target_address (Encoding T4). */ | |
18646 | /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */ | |
18647 | /* jump offset is: S:I1:I2:imm10:imm11:0. */ | |
18648 | /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */ | |
18649 | ||
a504d23a LA |
18650 | int s = ((branch_offset & 0x1000000) >> 24); |
18651 | int j1 = s ^ !((branch_offset & 0x800000) >> 23); | |
18652 | int j2 = s ^ !((branch_offset & 0x400000) >> 22); | |
18653 | ||
18654 | if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24)) | |
18655 | BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch."); | |
18656 | ||
18657 | bfd_vma patched_inst = 0xf0009000 | |
18658 | | s << 26 /* S. */ | |
18659 | | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */ | |
18660 | | j1 << 13 /* J1. */ | |
18661 | | j2 << 11 /* J2. */ | |
18662 | | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */ | |
18663 | ||
18664 | return patched_inst; | |
18665 | } | |
18666 | ||
18667 | static inline bfd_vma | |
18668 | create_instruction_ldmia (int base_reg, int wback, int reg_mask) | |
18669 | { | |
18670 | /* A8.8.57 LDM/LDMIA/LDMFD (A8-396) | |
18671 | LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */ | |
18672 | bfd_vma patched_inst = 0xe8900000 | |
18673 | | (/*W=*/wback << 21) | |
18674 | | (base_reg << 16) | |
18675 | | (reg_mask & 0x0000ffff); | |
18676 | ||
18677 | return patched_inst; | |
18678 | } | |
18679 | ||
18680 | static inline bfd_vma | |
18681 | create_instruction_ldmdb (int base_reg, int wback, int reg_mask) | |
18682 | { | |
18683 | /* A8.8.60 LDMDB/LDMEA (A8-402) | |
18684 | LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */ | |
18685 | bfd_vma patched_inst = 0xe9100000 | |
18686 | | (/*W=*/wback << 21) | |
18687 | | (base_reg << 16) | |
18688 | | (reg_mask & 0x0000ffff); | |
18689 | ||
18690 | return patched_inst; | |
18691 | } | |
18692 | ||
18693 | static inline bfd_vma | |
18694 | create_instruction_mov (int target_reg, int source_reg) | |
18695 | { | |
18696 | /* A8.8.103 MOV (register) (A8-486) | |
18697 | MOV Rd, Rm (Encoding T1). */ | |
18698 | bfd_vma patched_inst = 0x4600 | |
18699 | | (target_reg & 0x7) | |
18700 | | ((target_reg & 0x8) >> 3) << 7 | |
18701 | | (source_reg << 3); | |
18702 | ||
18703 | return patched_inst; | |
18704 | } | |
18705 | ||
18706 | static inline bfd_vma | |
18707 | create_instruction_sub (int target_reg, int source_reg, int value) | |
18708 | { | |
18709 | /* A8.8.221 SUB (immediate) (A8-708) | |
18710 | SUB Rd, Rn, #value (Encoding T3). */ | |
18711 | bfd_vma patched_inst = 0xf1a00000 | |
18712 | | (target_reg << 8) | |
18713 | | (source_reg << 16) | |
18714 | | (/*S=*/0 << 20) | |
18715 | | ((value & 0x800) >> 11) << 26 | |
18716 | | ((value & 0x700) >> 8) << 12 | |
18717 | | (value & 0x0ff); | |
18718 | ||
18719 | return patched_inst; | |
18720 | } | |
18721 | ||
18722 | static inline bfd_vma | |
9239bbd3 | 18723 | create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words, |
a504d23a LA |
18724 | int first_reg) |
18725 | { | |
18726 | /* A8.8.332 VLDM (A8-922) | |
9239bbd3 CM |
18727 | VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */ |
18728 | bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00) | |
a504d23a LA |
18729 | | (/*W=*/wback << 21) |
18730 | | (base_reg << 16) | |
9239bbd3 CM |
18731 | | (num_words & 0x000000ff) |
18732 | | (((unsigned)first_reg >> 1) & 0x0000000f) << 12 | |
a504d23a LA |
18733 | | (first_reg & 0x00000001) << 22; |
18734 | ||
18735 | return patched_inst; | |
18736 | } | |
18737 | ||
18738 | static inline bfd_vma | |
9239bbd3 CM |
18739 | create_instruction_vldmdb (int base_reg, int is_dp, int num_words, |
18740 | int first_reg) | |
a504d23a LA |
18741 | { |
18742 | /* A8.8.332 VLDM (A8-922) | |
9239bbd3 CM |
18743 | VLMD{MODE} Rn!, {} (Encoding T1 or T2). */ |
18744 | bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00) | |
a504d23a | 18745 | | (base_reg << 16) |
9239bbd3 CM |
18746 | | (num_words & 0x000000ff) |
18747 | | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12 | |
a504d23a LA |
18748 | | (first_reg & 0x00000001) << 22; |
18749 | ||
18750 | return patched_inst; | |
18751 | } | |
18752 | ||
18753 | static inline bfd_vma | |
18754 | create_instruction_udf_w (int value) | |
18755 | { | |
18756 | /* A8.8.247 UDF (A8-758) | |
18757 | Undefined (Encoding T2). */ | |
18758 | bfd_vma patched_inst = 0xf7f0a000 | |
18759 | | (value & 0x00000fff) | |
18760 | | (value & 0x000f0000) << 16; | |
18761 | ||
18762 | return patched_inst; | |
18763 | } | |
18764 | ||
18765 | static inline bfd_vma | |
18766 | create_instruction_udf (int value) | |
18767 | { | |
18768 | /* A8.8.247 UDF (A8-758) | |
18769 | Undefined (Encoding T1). */ | |
18770 | bfd_vma patched_inst = 0xde00 | |
18771 | | (value & 0xff); | |
18772 | ||
18773 | return patched_inst; | |
18774 | } | |
18775 | ||
18776 | /* Functions writing an instruction in memory, returning the next | |
18777 | memory position to write to. */ | |
18778 | ||
18779 | static inline bfd_byte * | |
18780 | push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab, | |
18781 | bfd * output_bfd, bfd_byte *pt, insn32 insn) | |
18782 | { | |
18783 | put_thumb2_insn (htab, output_bfd, insn, pt); | |
18784 | return pt + 4; | |
18785 | } | |
18786 | ||
18787 | static inline bfd_byte * | |
18788 | push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab, | |
18789 | bfd * output_bfd, bfd_byte *pt, insn32 insn) | |
18790 | { | |
18791 | put_thumb_insn (htab, output_bfd, insn, pt); | |
18792 | return pt + 2; | |
18793 | } | |
18794 | ||
18795 | /* Function filling up a region in memory with T1 and T2 UDFs taking | |
18796 | care of alignment. */ | |
18797 | ||
18798 | static bfd_byte * | |
18799 | stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab, | |
07d6d2b8 AM |
18800 | bfd * output_bfd, |
18801 | const bfd_byte * const base_stub_contents, | |
18802 | bfd_byte * const from_stub_contents, | |
18803 | const bfd_byte * const end_stub_contents) | |
a504d23a LA |
18804 | { |
18805 | bfd_byte *current_stub_contents = from_stub_contents; | |
18806 | ||
18807 | /* Fill the remaining of the stub with deterministic contents : UDF | |
18808 | instructions. | |
18809 | Check if realignment is needed on modulo 4 frontier using T1, to | |
18810 | further use T2. */ | |
18811 | if ((current_stub_contents < end_stub_contents) | |
18812 | && !((current_stub_contents - base_stub_contents) % 2) | |
18813 | && ((current_stub_contents - base_stub_contents) % 4)) | |
18814 | current_stub_contents = | |
18815 | push_thumb2_insn16 (htab, output_bfd, current_stub_contents, | |
18816 | create_instruction_udf (0)); | |
18817 | ||
18818 | for (; current_stub_contents < end_stub_contents;) | |
18819 | current_stub_contents = | |
18820 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
18821 | create_instruction_udf_w (0)); | |
18822 | ||
18823 | return current_stub_contents; | |
18824 | } | |
18825 | ||
18826 | /* Functions writing the stream of instructions equivalent to the | |
18827 | derived sequence for ldmia, ldmdb, vldm respectively. */ | |
18828 | ||
18829 | static void | |
18830 | stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab, | |
18831 | bfd * output_bfd, | |
18832 | const insn32 initial_insn, | |
18833 | const bfd_byte *const initial_insn_addr, | |
18834 | bfd_byte *const base_stub_contents) | |
18835 | { | |
18836 | int wback = (initial_insn & 0x00200000) >> 21; | |
18837 | int ri, rn = (initial_insn & 0x000F0000) >> 16; | |
18838 | int insn_all_registers = initial_insn & 0x0000ffff; | |
18839 | int insn_low_registers, insn_high_registers; | |
18840 | int usable_register_mask; | |
b25e998d | 18841 | int nb_registers = elf32_arm_popcount (insn_all_registers); |
a504d23a LA |
18842 | int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0; |
18843 | int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0; | |
18844 | bfd_byte *current_stub_contents = base_stub_contents; | |
18845 | ||
18846 | BFD_ASSERT (is_thumb2_ldmia (initial_insn)); | |
18847 | ||
18848 | /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with | |
18849 | smaller than 8 registers load sequences that do not cause the | |
18850 | hardware issue. */ | |
18851 | if (nb_registers <= 8) | |
18852 | { | |
18853 | /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */ | |
18854 | current_stub_contents = | |
18855 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
18856 | initial_insn); | |
18857 | ||
18858 | /* B initial_insn_addr+4. */ | |
18859 | if (!restore_pc) | |
18860 | current_stub_contents = | |
18861 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
18862 | create_instruction_branch_absolute | |
82188b29 | 18863 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
18864 | |
18865 | /* Fill the remaining of the stub with deterministic contents. */ | |
18866 | current_stub_contents = | |
18867 | stm32l4xx_fill_stub_udf (htab, output_bfd, | |
18868 | base_stub_contents, current_stub_contents, | |
18869 | base_stub_contents + | |
18870 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE); | |
18871 | ||
18872 | return; | |
18873 | } | |
18874 | ||
18875 | /* - reg_list[13] == 0. */ | |
18876 | BFD_ASSERT ((insn_all_registers & (1 << 13))==0); | |
18877 | ||
18878 | /* - reg_list[14] & reg_list[15] != 1. */ | |
18879 | BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000); | |
18880 | ||
18881 | /* - if (wback==1) reg_list[rn] == 0. */ | |
18882 | BFD_ASSERT (!wback || !restore_rn); | |
18883 | ||
18884 | /* - nb_registers > 8. */ | |
b25e998d | 18885 | BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8); |
a504d23a LA |
18886 | |
18887 | /* At this point, LDMxx initial insn loads between 9 and 14 registers. */ | |
18888 | ||
18889 | /* In the following algorithm, we split this wide LDM using 2 LDM insns: | |
18890 | - One with the 7 lowest registers (register mask 0x007F) | |
18891 | This LDM will finally contain between 2 and 7 registers | |
18892 | - One with the 7 highest registers (register mask 0xDF80) | |
18893 | This ldm will finally contain between 2 and 7 registers. */ | |
18894 | insn_low_registers = insn_all_registers & 0x007F; | |
18895 | insn_high_registers = insn_all_registers & 0xDF80; | |
18896 | ||
18897 | /* A spare register may be needed during this veneer to temporarily | |
18898 | handle the base register. This register will be restored with the | |
18899 | last LDM operation. | |
18900 | The usable register may be any general purpose register (that | |
18901 | excludes PC, SP, LR : register mask is 0x1FFF). */ | |
18902 | usable_register_mask = 0x1FFF; | |
18903 | ||
18904 | /* Generate the stub function. */ | |
18905 | if (wback) | |
18906 | { | |
18907 | /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */ | |
18908 | current_stub_contents = | |
18909 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
18910 | create_instruction_ldmia | |
18911 | (rn, /*wback=*/1, insn_low_registers)); | |
18912 | ||
18913 | /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */ | |
18914 | current_stub_contents = | |
18915 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
18916 | create_instruction_ldmia | |
18917 | (rn, /*wback=*/1, insn_high_registers)); | |
18918 | if (!restore_pc) | |
18919 | { | |
18920 | /* B initial_insn_addr+4. */ | |
18921 | current_stub_contents = | |
18922 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
18923 | create_instruction_branch_absolute | |
82188b29 | 18924 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
18925 | } |
18926 | } | |
18927 | else /* if (!wback). */ | |
18928 | { | |
18929 | ri = rn; | |
18930 | ||
18931 | /* If Rn is not part of the high-register-list, move it there. */ | |
18932 | if (!(insn_high_registers & (1 << rn))) | |
18933 | { | |
18934 | /* Choose a Ri in the high-register-list that will be restored. */ | |
18935 | ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn)); | |
18936 | ||
18937 | /* MOV Ri, Rn. */ | |
18938 | current_stub_contents = | |
18939 | push_thumb2_insn16 (htab, output_bfd, current_stub_contents, | |
18940 | create_instruction_mov (ri, rn)); | |
18941 | } | |
18942 | ||
18943 | /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */ | |
18944 | current_stub_contents = | |
18945 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
18946 | create_instruction_ldmia | |
18947 | (ri, /*wback=*/1, insn_low_registers)); | |
18948 | ||
18949 | /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */ | |
18950 | current_stub_contents = | |
18951 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
18952 | create_instruction_ldmia | |
18953 | (ri, /*wback=*/0, insn_high_registers)); | |
18954 | ||
18955 | if (!restore_pc) | |
18956 | { | |
18957 | /* B initial_insn_addr+4. */ | |
18958 | current_stub_contents = | |
18959 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
18960 | create_instruction_branch_absolute | |
82188b29 | 18961 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
18962 | } |
18963 | } | |
18964 | ||
18965 | /* Fill the remaining of the stub with deterministic contents. */ | |
18966 | current_stub_contents = | |
18967 | stm32l4xx_fill_stub_udf (htab, output_bfd, | |
18968 | base_stub_contents, current_stub_contents, | |
18969 | base_stub_contents + | |
18970 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE); | |
18971 | } | |
18972 | ||
18973 | static void | |
18974 | stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab, | |
18975 | bfd * output_bfd, | |
18976 | const insn32 initial_insn, | |
18977 | const bfd_byte *const initial_insn_addr, | |
18978 | bfd_byte *const base_stub_contents) | |
18979 | { | |
18980 | int wback = (initial_insn & 0x00200000) >> 21; | |
18981 | int ri, rn = (initial_insn & 0x000f0000) >> 16; | |
18982 | int insn_all_registers = initial_insn & 0x0000ffff; | |
18983 | int insn_low_registers, insn_high_registers; | |
18984 | int usable_register_mask; | |
18985 | int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0; | |
18986 | int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0; | |
b25e998d | 18987 | int nb_registers = elf32_arm_popcount (insn_all_registers); |
a504d23a LA |
18988 | bfd_byte *current_stub_contents = base_stub_contents; |
18989 | ||
18990 | BFD_ASSERT (is_thumb2_ldmdb (initial_insn)); | |
18991 | ||
18992 | /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with | |
18993 | smaller than 8 registers load sequences that do not cause the | |
18994 | hardware issue. */ | |
18995 | if (nb_registers <= 8) | |
18996 | { | |
18997 | /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */ | |
18998 | current_stub_contents = | |
18999 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19000 | initial_insn); | |
19001 | ||
19002 | /* B initial_insn_addr+4. */ | |
19003 | current_stub_contents = | |
19004 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19005 | create_instruction_branch_absolute | |
82188b29 | 19006 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
19007 | |
19008 | /* Fill the remaining of the stub with deterministic contents. */ | |
19009 | current_stub_contents = | |
19010 | stm32l4xx_fill_stub_udf (htab, output_bfd, | |
19011 | base_stub_contents, current_stub_contents, | |
19012 | base_stub_contents + | |
19013 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE); | |
19014 | ||
19015 | return; | |
19016 | } | |
19017 | ||
19018 | /* - reg_list[13] == 0. */ | |
19019 | BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0); | |
19020 | ||
19021 | /* - reg_list[14] & reg_list[15] != 1. */ | |
19022 | BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000); | |
19023 | ||
19024 | /* - if (wback==1) reg_list[rn] == 0. */ | |
19025 | BFD_ASSERT (!wback || !restore_rn); | |
19026 | ||
19027 | /* - nb_registers > 8. */ | |
b25e998d | 19028 | BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8); |
a504d23a LA |
19029 | |
19030 | /* At this point, LDMxx initial insn loads between 9 and 14 registers. */ | |
19031 | ||
19032 | /* In the following algorithm, we split this wide LDM using 2 LDM insn: | |
19033 | - One with the 7 lowest registers (register mask 0x007F) | |
19034 | This LDM will finally contain between 2 and 7 registers | |
19035 | - One with the 7 highest registers (register mask 0xDF80) | |
19036 | This ldm will finally contain between 2 and 7 registers. */ | |
19037 | insn_low_registers = insn_all_registers & 0x007F; | |
19038 | insn_high_registers = insn_all_registers & 0xDF80; | |
19039 | ||
19040 | /* A spare register may be needed during this veneer to temporarily | |
19041 | handle the base register. This register will be restored with | |
19042 | the last LDM operation. | |
19043 | The usable register may be any general purpose register (that excludes | |
19044 | PC, SP, LR : register mask is 0x1FFF). */ | |
19045 | usable_register_mask = 0x1FFF; | |
19046 | ||
19047 | /* Generate the stub function. */ | |
19048 | if (!wback && !restore_pc && !restore_rn) | |
19049 | { | |
19050 | /* Choose a Ri in the low-register-list that will be restored. */ | |
19051 | ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn)); | |
19052 | ||
19053 | /* MOV Ri, Rn. */ | |
19054 | current_stub_contents = | |
19055 | push_thumb2_insn16 (htab, output_bfd, current_stub_contents, | |
19056 | create_instruction_mov (ri, rn)); | |
19057 | ||
19058 | /* LDMDB Ri!, {R-high-register-list}. */ | |
19059 | current_stub_contents = | |
19060 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19061 | create_instruction_ldmdb | |
19062 | (ri, /*wback=*/1, insn_high_registers)); | |
19063 | ||
19064 | /* LDMDB Ri, {R-low-register-list}. */ | |
19065 | current_stub_contents = | |
19066 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19067 | create_instruction_ldmdb | |
19068 | (ri, /*wback=*/0, insn_low_registers)); | |
19069 | ||
19070 | /* B initial_insn_addr+4. */ | |
19071 | current_stub_contents = | |
19072 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19073 | create_instruction_branch_absolute | |
82188b29 | 19074 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
19075 | } |
19076 | else if (wback && !restore_pc && !restore_rn) | |
19077 | { | |
19078 | /* LDMDB Rn!, {R-high-register-list}. */ | |
19079 | current_stub_contents = | |
19080 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19081 | create_instruction_ldmdb | |
19082 | (rn, /*wback=*/1, insn_high_registers)); | |
19083 | ||
19084 | /* LDMDB Rn!, {R-low-register-list}. */ | |
19085 | current_stub_contents = | |
19086 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19087 | create_instruction_ldmdb | |
19088 | (rn, /*wback=*/1, insn_low_registers)); | |
19089 | ||
19090 | /* B initial_insn_addr+4. */ | |
19091 | current_stub_contents = | |
19092 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19093 | create_instruction_branch_absolute | |
82188b29 | 19094 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
19095 | } |
19096 | else if (!wback && restore_pc && !restore_rn) | |
19097 | { | |
19098 | /* Choose a Ri in the high-register-list that will be restored. */ | |
19099 | ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn)); | |
19100 | ||
19101 | /* SUB Ri, Rn, #(4*nb_registers). */ | |
19102 | current_stub_contents = | |
19103 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19104 | create_instruction_sub (ri, rn, (4 * nb_registers))); | |
19105 | ||
19106 | /* LDMIA Ri!, {R-low-register-list}. */ | |
19107 | current_stub_contents = | |
19108 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19109 | create_instruction_ldmia | |
19110 | (ri, /*wback=*/1, insn_low_registers)); | |
19111 | ||
19112 | /* LDMIA Ri, {R-high-register-list}. */ | |
19113 | current_stub_contents = | |
19114 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19115 | create_instruction_ldmia | |
19116 | (ri, /*wback=*/0, insn_high_registers)); | |
19117 | } | |
19118 | else if (wback && restore_pc && !restore_rn) | |
19119 | { | |
19120 | /* Choose a Ri in the high-register-list that will be restored. */ | |
19121 | ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn)); | |
19122 | ||
19123 | /* SUB Rn, Rn, #(4*nb_registers) */ | |
19124 | current_stub_contents = | |
19125 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19126 | create_instruction_sub (rn, rn, (4 * nb_registers))); | |
19127 | ||
19128 | /* MOV Ri, Rn. */ | |
19129 | current_stub_contents = | |
19130 | push_thumb2_insn16 (htab, output_bfd, current_stub_contents, | |
19131 | create_instruction_mov (ri, rn)); | |
19132 | ||
19133 | /* LDMIA Ri!, {R-low-register-list}. */ | |
19134 | current_stub_contents = | |
19135 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19136 | create_instruction_ldmia | |
19137 | (ri, /*wback=*/1, insn_low_registers)); | |
19138 | ||
19139 | /* LDMIA Ri, {R-high-register-list}. */ | |
19140 | current_stub_contents = | |
19141 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19142 | create_instruction_ldmia | |
19143 | (ri, /*wback=*/0, insn_high_registers)); | |
19144 | } | |
19145 | else if (!wback && !restore_pc && restore_rn) | |
19146 | { | |
19147 | ri = rn; | |
19148 | if (!(insn_low_registers & (1 << rn))) | |
19149 | { | |
19150 | /* Choose a Ri in the low-register-list that will be restored. */ | |
19151 | ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn)); | |
19152 | ||
19153 | /* MOV Ri, Rn. */ | |
19154 | current_stub_contents = | |
19155 | push_thumb2_insn16 (htab, output_bfd, current_stub_contents, | |
19156 | create_instruction_mov (ri, rn)); | |
19157 | } | |
19158 | ||
19159 | /* LDMDB Ri!, {R-high-register-list}. */ | |
19160 | current_stub_contents = | |
19161 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19162 | create_instruction_ldmdb | |
19163 | (ri, /*wback=*/1, insn_high_registers)); | |
19164 | ||
19165 | /* LDMDB Ri, {R-low-register-list}. */ | |
19166 | current_stub_contents = | |
19167 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19168 | create_instruction_ldmdb | |
19169 | (ri, /*wback=*/0, insn_low_registers)); | |
19170 | ||
19171 | /* B initial_insn_addr+4. */ | |
19172 | current_stub_contents = | |
19173 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19174 | create_instruction_branch_absolute | |
82188b29 | 19175 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
19176 | } |
19177 | else if (!wback && restore_pc && restore_rn) | |
19178 | { | |
19179 | ri = rn; | |
19180 | if (!(insn_high_registers & (1 << rn))) | |
19181 | { | |
19182 | /* Choose a Ri in the high-register-list that will be restored. */ | |
19183 | ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn)); | |
19184 | } | |
19185 | ||
19186 | /* SUB Ri, Rn, #(4*nb_registers). */ | |
19187 | current_stub_contents = | |
19188 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19189 | create_instruction_sub (ri, rn, (4 * nb_registers))); | |
19190 | ||
19191 | /* LDMIA Ri!, {R-low-register-list}. */ | |
19192 | current_stub_contents = | |
19193 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19194 | create_instruction_ldmia | |
19195 | (ri, /*wback=*/1, insn_low_registers)); | |
19196 | ||
19197 | /* LDMIA Ri, {R-high-register-list}. */ | |
19198 | current_stub_contents = | |
19199 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19200 | create_instruction_ldmia | |
19201 | (ri, /*wback=*/0, insn_high_registers)); | |
19202 | } | |
19203 | else if (wback && restore_rn) | |
19204 | { | |
19205 | /* The assembler should not have accepted to encode this. */ | |
19206 | BFD_ASSERT (0 && "Cannot patch an instruction that has an " | |
19207 | "undefined behavior.\n"); | |
19208 | } | |
19209 | ||
19210 | /* Fill the remaining of the stub with deterministic contents. */ | |
19211 | current_stub_contents = | |
19212 | stm32l4xx_fill_stub_udf (htab, output_bfd, | |
19213 | base_stub_contents, current_stub_contents, | |
19214 | base_stub_contents + | |
19215 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE); | |
19216 | ||
19217 | } | |
19218 | ||
19219 | static void | |
19220 | stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab, | |
19221 | bfd * output_bfd, | |
19222 | const insn32 initial_insn, | |
19223 | const bfd_byte *const initial_insn_addr, | |
19224 | bfd_byte *const base_stub_contents) | |
19225 | { | |
13c9c485 | 19226 | int num_words = initial_insn & 0xff; |
a504d23a LA |
19227 | bfd_byte *current_stub_contents = base_stub_contents; |
19228 | ||
19229 | BFD_ASSERT (is_thumb2_vldm (initial_insn)); | |
19230 | ||
19231 | /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with | |
9239bbd3 | 19232 | smaller than 8 words load sequences that do not cause the |
a504d23a | 19233 | hardware issue. */ |
9239bbd3 | 19234 | if (num_words <= 8) |
a504d23a LA |
19235 | { |
19236 | /* Untouched instruction. */ | |
19237 | current_stub_contents = | |
19238 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19239 | initial_insn); | |
19240 | ||
19241 | /* B initial_insn_addr+4. */ | |
19242 | current_stub_contents = | |
19243 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19244 | create_instruction_branch_absolute | |
82188b29 | 19245 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
19246 | } |
19247 | else | |
19248 | { | |
0a1b45a2 | 19249 | bool is_dp = /* DP encoding. */ |
9239bbd3 | 19250 | (initial_insn & 0xfe100f00) == 0xec100b00; |
0a1b45a2 | 19251 | bool is_ia_nobang = /* (IA without !). */ |
a504d23a | 19252 | (((initial_insn << 7) >> 28) & 0xd) == 0x4; |
0a1b45a2 | 19253 | bool is_ia_bang = /* (IA with !) - includes VPOP. */ |
a504d23a | 19254 | (((initial_insn << 7) >> 28) & 0xd) == 0x5; |
0a1b45a2 | 19255 | bool is_db_bang = /* (DB with !). */ |
a504d23a | 19256 | (((initial_insn << 7) >> 28) & 0xd) == 0x9; |
9239bbd3 | 19257 | int base_reg = ((unsigned int) initial_insn << 12) >> 28; |
a504d23a | 19258 | /* d = UInt (Vd:D);. */ |
9239bbd3 | 19259 | int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1) |
a504d23a LA |
19260 | | (((unsigned int)initial_insn << 9) >> 31); |
19261 | ||
9239bbd3 CM |
19262 | /* Compute the number of 8-words chunks needed to split. */ |
19263 | int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8); | |
a504d23a LA |
19264 | int chunk; |
19265 | ||
19266 | /* The test coverage has been done assuming the following | |
19267 | hypothesis that exactly one of the previous is_ predicates is | |
19268 | true. */ | |
9239bbd3 CM |
19269 | BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang) |
19270 | && !(is_ia_nobang & is_ia_bang & is_db_bang)); | |
a504d23a | 19271 | |
9239bbd3 | 19272 | /* We treat the cutting of the words in one pass for all |
a504d23a LA |
19273 | cases, then we emit the adjustments: |
19274 | ||
19275 | vldm rx, {...} | |
19276 | -> vldm rx!, {8_words_or_less} for each needed 8_word | |
19277 | -> sub rx, rx, #size (list) | |
19278 | ||
19279 | vldm rx!, {...} | |
19280 | -> vldm rx!, {8_words_or_less} for each needed 8_word | |
19281 | This also handles vpop instruction (when rx is sp) | |
19282 | ||
19283 | vldmd rx!, {...} | |
19284 | -> vldmb rx!, {8_words_or_less} for each needed 8_word. */ | |
9239bbd3 | 19285 | for (chunk = 0; chunk < chunks; ++chunk) |
a504d23a | 19286 | { |
9239bbd3 CM |
19287 | bfd_vma new_insn = 0; |
19288 | ||
a504d23a LA |
19289 | if (is_ia_nobang || is_ia_bang) |
19290 | { | |
9239bbd3 CM |
19291 | new_insn = create_instruction_vldmia |
19292 | (base_reg, | |
19293 | is_dp, | |
19294 | /*wback= . */1, | |
19295 | chunks - (chunk + 1) ? | |
19296 | 8 : num_words - chunk * 8, | |
19297 | first_reg + chunk * 8); | |
a504d23a LA |
19298 | } |
19299 | else if (is_db_bang) | |
19300 | { | |
9239bbd3 CM |
19301 | new_insn = create_instruction_vldmdb |
19302 | (base_reg, | |
19303 | is_dp, | |
19304 | chunks - (chunk + 1) ? | |
19305 | 8 : num_words - chunk * 8, | |
19306 | first_reg + chunk * 8); | |
a504d23a | 19307 | } |
9239bbd3 CM |
19308 | |
19309 | if (new_insn) | |
19310 | current_stub_contents = | |
19311 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19312 | new_insn); | |
a504d23a LA |
19313 | } |
19314 | ||
19315 | /* Only this case requires the base register compensation | |
19316 | subtract. */ | |
19317 | if (is_ia_nobang) | |
19318 | { | |
19319 | current_stub_contents = | |
19320 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19321 | create_instruction_sub | |
9239bbd3 | 19322 | (base_reg, base_reg, 4*num_words)); |
a504d23a LA |
19323 | } |
19324 | ||
19325 | /* B initial_insn_addr+4. */ | |
19326 | current_stub_contents = | |
19327 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19328 | create_instruction_branch_absolute | |
82188b29 | 19329 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
19330 | } |
19331 | ||
19332 | /* Fill the remaining of the stub with deterministic contents. */ | |
19333 | current_stub_contents = | |
19334 | stm32l4xx_fill_stub_udf (htab, output_bfd, | |
19335 | base_stub_contents, current_stub_contents, | |
19336 | base_stub_contents + | |
19337 | STM32L4XX_ERRATUM_VLDM_VENEER_SIZE); | |
19338 | } | |
19339 | ||
19340 | static void | |
19341 | stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab, | |
19342 | bfd * output_bfd, | |
19343 | const insn32 wrong_insn, | |
19344 | const bfd_byte *const wrong_insn_addr, | |
19345 | bfd_byte *const stub_contents) | |
19346 | { | |
19347 | if (is_thumb2_ldmia (wrong_insn)) | |
19348 | stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd, | |
19349 | wrong_insn, wrong_insn_addr, | |
19350 | stub_contents); | |
19351 | else if (is_thumb2_ldmdb (wrong_insn)) | |
19352 | stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd, | |
19353 | wrong_insn, wrong_insn_addr, | |
19354 | stub_contents); | |
19355 | else if (is_thumb2_vldm (wrong_insn)) | |
19356 | stm32l4xx_create_replacing_stub_vldm (htab, output_bfd, | |
19357 | wrong_insn, wrong_insn_addr, | |
19358 | stub_contents); | |
19359 | } | |
19360 | ||
19361 | /* End of stm32l4xx work-around. */ | |
19362 | ||
19363 | ||
e489d0ae PB |
19364 | /* Do code byteswapping. Return FALSE afterwards so that the section is |
19365 | written out as normal. */ | |
19366 | ||
0a1b45a2 | 19367 | static bool |
c7b8f16e | 19368 | elf32_arm_write_section (bfd *output_bfd, |
8029a119 NC |
19369 | struct bfd_link_info *link_info, |
19370 | asection *sec, | |
e489d0ae PB |
19371 | bfd_byte *contents) |
19372 | { | |
48229727 | 19373 | unsigned int mapcount, errcount; |
8e3de13a | 19374 | _arm_elf_section_data *arm_data; |
c7b8f16e | 19375 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); |
e489d0ae | 19376 | elf32_arm_section_map *map; |
c7b8f16e | 19377 | elf32_vfp11_erratum_list *errnode; |
a504d23a | 19378 | elf32_stm32l4xx_erratum_list *stm32l4xx_errnode; |
e489d0ae PB |
19379 | bfd_vma ptr; |
19380 | bfd_vma end; | |
c7b8f16e | 19381 | bfd_vma offset = sec->output_section->vma + sec->output_offset; |
e489d0ae | 19382 | bfd_byte tmp; |
48229727 | 19383 | unsigned int i; |
57e8b36a | 19384 | |
4dfe6ac6 | 19385 | if (globals == NULL) |
0a1b45a2 | 19386 | return false; |
4dfe6ac6 | 19387 | |
8e3de13a NC |
19388 | /* If this section has not been allocated an _arm_elf_section_data |
19389 | structure then we cannot record anything. */ | |
19390 | arm_data = get_arm_elf_section_data (sec); | |
19391 | if (arm_data == NULL) | |
0a1b45a2 | 19392 | return false; |
8e3de13a NC |
19393 | |
19394 | mapcount = arm_data->mapcount; | |
19395 | map = arm_data->map; | |
c7b8f16e JB |
19396 | errcount = arm_data->erratumcount; |
19397 | ||
19398 | if (errcount != 0) | |
19399 | { | |
19400 | unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0; | |
19401 | ||
19402 | for (errnode = arm_data->erratumlist; errnode != 0; | |
99059e56 RM |
19403 | errnode = errnode->next) |
19404 | { | |
19405 | bfd_vma target = errnode->vma - offset; | |
19406 | ||
19407 | switch (errnode->type) | |
19408 | { | |
19409 | case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER: | |
19410 | { | |
19411 | bfd_vma branch_to_veneer; | |
19412 | /* Original condition code of instruction, plus bit mask for | |
19413 | ARM B instruction. */ | |
19414 | unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000) | |
19415 | | 0x0a000000; | |
c7b8f16e JB |
19416 | |
19417 | /* The instruction is before the label. */ | |
91d6fa6a | 19418 | target -= 4; |
c7b8f16e JB |
19419 | |
19420 | /* Above offset included in -4 below. */ | |
19421 | branch_to_veneer = errnode->u.b.veneer->vma | |
99059e56 | 19422 | - errnode->vma - 4; |
c7b8f16e JB |
19423 | |
19424 | if ((signed) branch_to_veneer < -(1 << 25) | |
19425 | || (signed) branch_to_veneer >= (1 << 25)) | |
871b3ab2 | 19426 | _bfd_error_handler (_("%pB: error: VFP11 veneer out of " |
4eca0228 | 19427 | "range"), output_bfd); |
c7b8f16e | 19428 | |
99059e56 RM |
19429 | insn |= (branch_to_veneer >> 2) & 0xffffff; |
19430 | contents[endianflip ^ target] = insn & 0xff; | |
19431 | contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff; | |
19432 | contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff; | |
19433 | contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff; | |
19434 | } | |
19435 | break; | |
c7b8f16e JB |
19436 | |
19437 | case VFP11_ERRATUM_ARM_VENEER: | |
99059e56 RM |
19438 | { |
19439 | bfd_vma branch_from_veneer; | |
19440 | unsigned int insn; | |
c7b8f16e | 19441 | |
99059e56 RM |
19442 | /* Take size of veneer into account. */ |
19443 | branch_from_veneer = errnode->u.v.branch->vma | |
19444 | - errnode->vma - 12; | |
c7b8f16e JB |
19445 | |
19446 | if ((signed) branch_from_veneer < -(1 << 25) | |
19447 | || (signed) branch_from_veneer >= (1 << 25)) | |
871b3ab2 | 19448 | _bfd_error_handler (_("%pB: error: VFP11 veneer out of " |
4eca0228 | 19449 | "range"), output_bfd); |
c7b8f16e | 19450 | |
99059e56 RM |
19451 | /* Original instruction. */ |
19452 | insn = errnode->u.v.branch->u.b.vfp_insn; | |
19453 | contents[endianflip ^ target] = insn & 0xff; | |
19454 | contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff; | |
19455 | contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff; | |
19456 | contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff; | |
19457 | ||
19458 | /* Branch back to insn after original insn. */ | |
19459 | insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff); | |
19460 | contents[endianflip ^ (target + 4)] = insn & 0xff; | |
19461 | contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff; | |
19462 | contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff; | |
19463 | contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff; | |
19464 | } | |
19465 | break; | |
c7b8f16e | 19466 | |
99059e56 RM |
19467 | default: |
19468 | abort (); | |
19469 | } | |
19470 | } | |
c7b8f16e | 19471 | } |
e489d0ae | 19472 | |
a504d23a LA |
19473 | if (arm_data->stm32l4xx_erratumcount != 0) |
19474 | { | |
19475 | for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist; | |
19476 | stm32l4xx_errnode != 0; | |
19477 | stm32l4xx_errnode = stm32l4xx_errnode->next) | |
19478 | { | |
19479 | bfd_vma target = stm32l4xx_errnode->vma - offset; | |
19480 | ||
19481 | switch (stm32l4xx_errnode->type) | |
19482 | { | |
19483 | case STM32L4XX_ERRATUM_BRANCH_TO_VENEER: | |
19484 | { | |
19485 | unsigned int insn; | |
19486 | bfd_vma branch_to_veneer = | |
19487 | stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma; | |
19488 | ||
19489 | if ((signed) branch_to_veneer < -(1 << 24) | |
19490 | || (signed) branch_to_veneer >= (1 << 24)) | |
19491 | { | |
19492 | bfd_vma out_of_range = | |
19493 | ((signed) branch_to_veneer < -(1 << 24)) ? | |
19494 | - branch_to_veneer - (1 << 24) : | |
19495 | ((signed) branch_to_veneer >= (1 << 24)) ? | |
19496 | branch_to_veneer - (1 << 24) : 0; | |
19497 | ||
4eca0228 | 19498 | _bfd_error_handler |
2dcf00ce | 19499 | (_("%pB(%#" PRIx64 "): error: " |
90b6238f AM |
19500 | "cannot create STM32L4XX veneer; " |
19501 | "jump out of range by %" PRId64 " bytes; " | |
19502 | "cannot encode branch instruction"), | |
a504d23a | 19503 | output_bfd, |
2dcf00ce AM |
19504 | (uint64_t) (stm32l4xx_errnode->vma - 4), |
19505 | (int64_t) out_of_range); | |
a504d23a LA |
19506 | continue; |
19507 | } | |
19508 | ||
19509 | insn = create_instruction_branch_absolute | |
82188b29 | 19510 | (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma); |
a504d23a | 19511 | |
a2699ef2 AM |
19512 | /* The instruction is before the label. */ |
19513 | target -= 4; | |
19514 | ||
a504d23a LA |
19515 | put_thumb2_insn (globals, output_bfd, |
19516 | (bfd_vma) insn, contents + target); | |
19517 | } | |
19518 | break; | |
19519 | ||
19520 | case STM32L4XX_ERRATUM_VENEER: | |
19521 | { | |
82188b29 NC |
19522 | bfd_byte * veneer; |
19523 | bfd_byte * veneer_r; | |
a504d23a LA |
19524 | unsigned int insn; |
19525 | ||
82188b29 NC |
19526 | veneer = contents + target; |
19527 | veneer_r = veneer | |
19528 | + stm32l4xx_errnode->u.b.veneer->vma | |
19529 | - stm32l4xx_errnode->vma - 4; | |
a504d23a LA |
19530 | |
19531 | if ((signed) (veneer_r - veneer - | |
19532 | STM32L4XX_ERRATUM_VLDM_VENEER_SIZE > | |
19533 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE ? | |
19534 | STM32L4XX_ERRATUM_VLDM_VENEER_SIZE : | |
19535 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24) | |
19536 | || (signed) (veneer_r - veneer) >= (1 << 24)) | |
19537 | { | |
90b6238f AM |
19538 | _bfd_error_handler (_("%pB: error: cannot create STM32L4XX " |
19539 | "veneer"), output_bfd); | |
a504d23a LA |
19540 | continue; |
19541 | } | |
19542 | ||
19543 | /* Original instruction. */ | |
19544 | insn = stm32l4xx_errnode->u.v.branch->u.b.insn; | |
19545 | ||
19546 | stm32l4xx_create_replacing_stub | |
19547 | (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer); | |
19548 | } | |
19549 | break; | |
19550 | ||
19551 | default: | |
19552 | abort (); | |
19553 | } | |
19554 | } | |
19555 | } | |
19556 | ||
2468f9c9 PB |
19557 | if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX) |
19558 | { | |
19559 | arm_unwind_table_edit *edit_node | |
99059e56 | 19560 | = arm_data->u.exidx.unwind_edit_list; |
2468f9c9 | 19561 | /* Now, sec->size is the size of the section we will write. The original |
99059e56 | 19562 | size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND |
2468f9c9 PB |
19563 | markers) was sec->rawsize. (This isn't the case if we perform no |
19564 | edits, then rawsize will be zero and we should use size). */ | |
21d799b5 | 19565 | bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size); |
2468f9c9 PB |
19566 | unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size; |
19567 | unsigned int in_index, out_index; | |
19568 | bfd_vma add_to_offsets = 0; | |
19569 | ||
7a0fb7be | 19570 | if (edited_contents == NULL) |
0a1b45a2 | 19571 | return false; |
2468f9c9 | 19572 | for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;) |
99059e56 | 19573 | { |
2468f9c9 PB |
19574 | if (edit_node) |
19575 | { | |
19576 | unsigned int edit_index = edit_node->index; | |
b38cadfb | 19577 | |
2468f9c9 | 19578 | if (in_index < edit_index && in_index * 8 < input_size) |
99059e56 | 19579 | { |
2468f9c9 PB |
19580 | copy_exidx_entry (output_bfd, edited_contents + out_index * 8, |
19581 | contents + in_index * 8, add_to_offsets); | |
19582 | out_index++; | |
19583 | in_index++; | |
19584 | } | |
19585 | else if (in_index == edit_index | |
19586 | || (in_index * 8 >= input_size | |
19587 | && edit_index == UINT_MAX)) | |
99059e56 | 19588 | { |
2468f9c9 PB |
19589 | switch (edit_node->type) |
19590 | { | |
19591 | case DELETE_EXIDX_ENTRY: | |
19592 | in_index++; | |
19593 | add_to_offsets += 8; | |
19594 | break; | |
b38cadfb | 19595 | |
2468f9c9 PB |
19596 | case INSERT_EXIDX_CANTUNWIND_AT_END: |
19597 | { | |
99059e56 | 19598 | asection *text_sec = edit_node->linked_section; |
2468f9c9 PB |
19599 | bfd_vma text_offset = text_sec->output_section->vma |
19600 | + text_sec->output_offset | |
19601 | + text_sec->size; | |
19602 | bfd_vma exidx_offset = offset + out_index * 8; | |
99059e56 | 19603 | unsigned long prel31_offset; |
2468f9c9 PB |
19604 | |
19605 | /* Note: this is meant to be equivalent to an | |
19606 | R_ARM_PREL31 relocation. These synthetic | |
19607 | EXIDX_CANTUNWIND markers are not relocated by the | |
19608 | usual BFD method. */ | |
19609 | prel31_offset = (text_offset - exidx_offset) | |
19610 | & 0x7ffffffful; | |
491d01d3 YU |
19611 | if (bfd_link_relocatable (link_info)) |
19612 | { | |
19613 | /* Here relocation for new EXIDX_CANTUNWIND is | |
19614 | created, so there is no need to | |
19615 | adjust offset by hand. */ | |
19616 | prel31_offset = text_sec->output_offset | |
19617 | + text_sec->size; | |
491d01d3 | 19618 | } |
2468f9c9 PB |
19619 | |
19620 | /* First address we can't unwind. */ | |
19621 | bfd_put_32 (output_bfd, prel31_offset, | |
19622 | &edited_contents[out_index * 8]); | |
19623 | ||
19624 | /* Code for EXIDX_CANTUNWIND. */ | |
19625 | bfd_put_32 (output_bfd, 0x1, | |
19626 | &edited_contents[out_index * 8 + 4]); | |
19627 | ||
19628 | out_index++; | |
19629 | add_to_offsets -= 8; | |
19630 | } | |
19631 | break; | |
19632 | } | |
b38cadfb | 19633 | |
2468f9c9 PB |
19634 | edit_node = edit_node->next; |
19635 | } | |
19636 | } | |
19637 | else | |
19638 | { | |
19639 | /* No more edits, copy remaining entries verbatim. */ | |
19640 | copy_exidx_entry (output_bfd, edited_contents + out_index * 8, | |
19641 | contents + in_index * 8, add_to_offsets); | |
19642 | out_index++; | |
19643 | in_index++; | |
19644 | } | |
19645 | } | |
19646 | ||
19647 | if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD)) | |
19648 | bfd_set_section_contents (output_bfd, sec->output_section, | |
19649 | edited_contents, | |
19650 | (file_ptr) sec->output_offset, sec->size); | |
19651 | ||
0a1b45a2 | 19652 | return true; |
2468f9c9 PB |
19653 | } |
19654 | ||
48229727 JB |
19655 | /* Fix code to point to Cortex-A8 erratum stubs. */ |
19656 | if (globals->fix_cortex_a8) | |
19657 | { | |
19658 | struct a8_branch_to_stub_data data; | |
19659 | ||
19660 | data.writing_section = sec; | |
19661 | data.contents = contents; | |
19662 | ||
a504d23a LA |
19663 | bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub, |
19664 | & data); | |
48229727 JB |
19665 | } |
19666 | ||
e489d0ae | 19667 | if (mapcount == 0) |
0a1b45a2 | 19668 | return false; |
e489d0ae | 19669 | |
c7b8f16e | 19670 | if (globals->byteswap_code) |
e489d0ae | 19671 | { |
c7b8f16e | 19672 | qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping); |
57e8b36a | 19673 | |
c7b8f16e JB |
19674 | ptr = map[0].vma; |
19675 | for (i = 0; i < mapcount; i++) | |
99059e56 RM |
19676 | { |
19677 | if (i == mapcount - 1) | |
c7b8f16e | 19678 | end = sec->size; |
99059e56 RM |
19679 | else |
19680 | end = map[i + 1].vma; | |
e489d0ae | 19681 | |
99059e56 | 19682 | switch (map[i].type) |
e489d0ae | 19683 | { |
c7b8f16e JB |
19684 | case 'a': |
19685 | /* Byte swap code words. */ | |
19686 | while (ptr + 3 < end) | |
99059e56 RM |
19687 | { |
19688 | tmp = contents[ptr]; | |
19689 | contents[ptr] = contents[ptr + 3]; | |
19690 | contents[ptr + 3] = tmp; | |
19691 | tmp = contents[ptr + 1]; | |
19692 | contents[ptr + 1] = contents[ptr + 2]; | |
19693 | contents[ptr + 2] = tmp; | |
19694 | ptr += 4; | |
19695 | } | |
c7b8f16e | 19696 | break; |
e489d0ae | 19697 | |
c7b8f16e JB |
19698 | case 't': |
19699 | /* Byte swap code halfwords. */ | |
19700 | while (ptr + 1 < end) | |
99059e56 RM |
19701 | { |
19702 | tmp = contents[ptr]; | |
19703 | contents[ptr] = contents[ptr + 1]; | |
19704 | contents[ptr + 1] = tmp; | |
19705 | ptr += 2; | |
19706 | } | |
c7b8f16e JB |
19707 | break; |
19708 | ||
19709 | case 'd': | |
19710 | /* Leave data alone. */ | |
19711 | break; | |
19712 | } | |
99059e56 RM |
19713 | ptr = end; |
19714 | } | |
e489d0ae | 19715 | } |
8e3de13a | 19716 | |
93204d3a | 19717 | free (map); |
47b2e99c | 19718 | arm_data->mapcount = -1; |
c7b8f16e | 19719 | arm_data->mapsize = 0; |
8e3de13a | 19720 | arm_data->map = NULL; |
8e3de13a | 19721 | |
0a1b45a2 | 19722 | return false; |
e489d0ae PB |
19723 | } |
19724 | ||
0beaef2b PB |
19725 | /* Mangle thumb function symbols as we read them in. */ |
19726 | ||
0a1b45a2 | 19727 | static bool |
0beaef2b PB |
19728 | elf32_arm_swap_symbol_in (bfd * abfd, |
19729 | const void *psrc, | |
19730 | const void *pshn, | |
19731 | Elf_Internal_Sym *dst) | |
19732 | { | |
8384fb8f | 19733 | if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst)) |
0a1b45a2 | 19734 | return false; |
39d911fc | 19735 | dst->st_target_internal = 0; |
0beaef2b PB |
19736 | |
19737 | /* New EABI objects mark thumb function symbols by setting the low bit of | |
35fc36a8 | 19738 | the address. */ |
63e1a0fc PB |
19739 | if (ELF_ST_TYPE (dst->st_info) == STT_FUNC |
19740 | || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC) | |
0beaef2b | 19741 | { |
63e1a0fc PB |
19742 | if (dst->st_value & 1) |
19743 | { | |
19744 | dst->st_value &= ~(bfd_vma) 1; | |
39d911fc TP |
19745 | ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, |
19746 | ST_BRANCH_TO_THUMB); | |
63e1a0fc PB |
19747 | } |
19748 | else | |
39d911fc | 19749 | ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM); |
35fc36a8 RS |
19750 | } |
19751 | else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC) | |
19752 | { | |
19753 | dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC); | |
39d911fc | 19754 | ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB); |
0beaef2b | 19755 | } |
35fc36a8 | 19756 | else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION) |
39d911fc | 19757 | ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG); |
35fc36a8 | 19758 | else |
39d911fc | 19759 | ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN); |
35fc36a8 | 19760 | |
0a1b45a2 | 19761 | return true; |
0beaef2b PB |
19762 | } |
19763 | ||
19764 | ||
19765 | /* Mangle thumb function symbols as we write them out. */ | |
19766 | ||
19767 | static void | |
19768 | elf32_arm_swap_symbol_out (bfd *abfd, | |
19769 | const Elf_Internal_Sym *src, | |
19770 | void *cdst, | |
19771 | void *shndx) | |
19772 | { | |
19773 | Elf_Internal_Sym newsym; | |
19774 | ||
19775 | /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit | |
19776 | of the address set, as per the new EABI. We do this unconditionally | |
19777 | because objcopy does not set the elf header flags until after | |
19778 | it writes out the symbol table. */ | |
39d911fc | 19779 | if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB) |
0beaef2b PB |
19780 | { |
19781 | newsym = *src; | |
34e77a92 RS |
19782 | if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC) |
19783 | newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC); | |
0fa3dcad | 19784 | if (newsym.st_shndx != SHN_UNDEF) |
99059e56 RM |
19785 | { |
19786 | /* Do this only for defined symbols. At link type, the static | |
19787 | linker will simulate the work of dynamic linker of resolving | |
19788 | symbols and will carry over the thumbness of found symbols to | |
19789 | the output symbol table. It's not clear how it happens, but | |
19790 | the thumbness of undefined symbols can well be different at | |
19791 | runtime, and writing '1' for them will be confusing for users | |
19792 | and possibly for dynamic linker itself. | |
19793 | */ | |
19794 | newsym.st_value |= 1; | |
19795 | } | |
906e58ca | 19796 | |
0beaef2b PB |
19797 | src = &newsym; |
19798 | } | |
19799 | bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx); | |
19800 | } | |
19801 | ||
b294bdf8 MM |
19802 | /* Add the PT_ARM_EXIDX program header. */ |
19803 | ||
0a1b45a2 | 19804 | static bool |
906e58ca | 19805 | elf32_arm_modify_segment_map (bfd *abfd, |
b294bdf8 MM |
19806 | struct bfd_link_info *info ATTRIBUTE_UNUSED) |
19807 | { | |
19808 | struct elf_segment_map *m; | |
19809 | asection *sec; | |
19810 | ||
19811 | sec = bfd_get_section_by_name (abfd, ".ARM.exidx"); | |
19812 | if (sec != NULL && (sec->flags & SEC_LOAD) != 0) | |
19813 | { | |
19814 | /* If there is already a PT_ARM_EXIDX header, then we do not | |
19815 | want to add another one. This situation arises when running | |
19816 | "strip"; the input binary already has the header. */ | |
12bd6957 | 19817 | m = elf_seg_map (abfd); |
b294bdf8 MM |
19818 | while (m && m->p_type != PT_ARM_EXIDX) |
19819 | m = m->next; | |
19820 | if (!m) | |
19821 | { | |
21d799b5 | 19822 | m = (struct elf_segment_map *) |
99059e56 | 19823 | bfd_zalloc (abfd, sizeof (struct elf_segment_map)); |
b294bdf8 | 19824 | if (m == NULL) |
0a1b45a2 | 19825 | return false; |
b294bdf8 MM |
19826 | m->p_type = PT_ARM_EXIDX; |
19827 | m->count = 1; | |
19828 | m->sections[0] = sec; | |
19829 | ||
12bd6957 AM |
19830 | m->next = elf_seg_map (abfd); |
19831 | elf_seg_map (abfd) = m; | |
b294bdf8 MM |
19832 | } |
19833 | } | |
19834 | ||
0a1b45a2 | 19835 | return true; |
b294bdf8 MM |
19836 | } |
19837 | ||
19838 | /* We may add a PT_ARM_EXIDX program header. */ | |
19839 | ||
19840 | static int | |
a6b96beb AM |
19841 | elf32_arm_additional_program_headers (bfd *abfd, |
19842 | struct bfd_link_info *info ATTRIBUTE_UNUSED) | |
b294bdf8 MM |
19843 | { |
19844 | asection *sec; | |
19845 | ||
19846 | sec = bfd_get_section_by_name (abfd, ".ARM.exidx"); | |
19847 | if (sec != NULL && (sec->flags & SEC_LOAD) != 0) | |
19848 | return 1; | |
19849 | else | |
19850 | return 0; | |
19851 | } | |
19852 | ||
34e77a92 RS |
19853 | /* Hook called by the linker routine which adds symbols from an object |
19854 | file. */ | |
19855 | ||
0a1b45a2 | 19856 | static bool |
34e77a92 RS |
19857 | elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info, |
19858 | Elf_Internal_Sym *sym, const char **namep, | |
19859 | flagword *flagsp, asection **secp, bfd_vma *valp) | |
19860 | { | |
c792917c | 19861 | if (elf32_arm_hash_table (info) == NULL) |
0a1b45a2 | 19862 | return false; |
c792917c | 19863 | |
90c14f0c | 19864 | if (elf32_arm_hash_table (info)->root.target_os == is_vxworks |
34e77a92 RS |
19865 | && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep, |
19866 | flagsp, secp, valp)) | |
0a1b45a2 | 19867 | return false; |
34e77a92 | 19868 | |
0a1b45a2 | 19869 | return true; |
34e77a92 RS |
19870 | } |
19871 | ||
0beaef2b | 19872 | /* We use this to override swap_symbol_in and swap_symbol_out. */ |
906e58ca NC |
19873 | const struct elf_size_info elf32_arm_size_info = |
19874 | { | |
0beaef2b PB |
19875 | sizeof (Elf32_External_Ehdr), |
19876 | sizeof (Elf32_External_Phdr), | |
19877 | sizeof (Elf32_External_Shdr), | |
19878 | sizeof (Elf32_External_Rel), | |
19879 | sizeof (Elf32_External_Rela), | |
19880 | sizeof (Elf32_External_Sym), | |
19881 | sizeof (Elf32_External_Dyn), | |
19882 | sizeof (Elf_External_Note), | |
19883 | 4, | |
19884 | 1, | |
19885 | 32, 2, | |
19886 | ELFCLASS32, EV_CURRENT, | |
19887 | bfd_elf32_write_out_phdrs, | |
19888 | bfd_elf32_write_shdrs_and_ehdr, | |
1489a3a0 | 19889 | bfd_elf32_checksum_contents, |
0beaef2b PB |
19890 | bfd_elf32_write_relocs, |
19891 | elf32_arm_swap_symbol_in, | |
19892 | elf32_arm_swap_symbol_out, | |
19893 | bfd_elf32_slurp_reloc_table, | |
19894 | bfd_elf32_slurp_symbol_table, | |
19895 | bfd_elf32_swap_dyn_in, | |
19896 | bfd_elf32_swap_dyn_out, | |
19897 | bfd_elf32_swap_reloc_in, | |
19898 | bfd_elf32_swap_reloc_out, | |
19899 | bfd_elf32_swap_reloca_in, | |
19900 | bfd_elf32_swap_reloca_out | |
19901 | }; | |
19902 | ||
685e70ae VK |
19903 | static bfd_vma |
19904 | read_code32 (const bfd *abfd, const bfd_byte *addr) | |
19905 | { | |
19906 | /* V7 BE8 code is always little endian. */ | |
19907 | if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0) | |
19908 | return bfd_getl32 (addr); | |
19909 | ||
19910 | return bfd_get_32 (abfd, addr); | |
19911 | } | |
19912 | ||
19913 | static bfd_vma | |
19914 | read_code16 (const bfd *abfd, const bfd_byte *addr) | |
19915 | { | |
19916 | /* V7 BE8 code is always little endian. */ | |
19917 | if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0) | |
19918 | return bfd_getl16 (addr); | |
19919 | ||
19920 | return bfd_get_16 (abfd, addr); | |
19921 | } | |
19922 | ||
6a631e86 YG |
19923 | /* Return size of plt0 entry starting at ADDR |
19924 | or (bfd_vma) -1 if size can not be determined. */ | |
19925 | ||
19926 | static bfd_vma | |
19927 | elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr) | |
19928 | { | |
19929 | bfd_vma first_word; | |
19930 | bfd_vma plt0_size; | |
19931 | ||
685e70ae | 19932 | first_word = read_code32 (abfd, addr); |
6a631e86 YG |
19933 | |
19934 | if (first_word == elf32_arm_plt0_entry[0]) | |
19935 | plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry); | |
19936 | else if (first_word == elf32_thumb2_plt0_entry[0]) | |
19937 | plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry); | |
19938 | else | |
19939 | /* We don't yet handle this PLT format. */ | |
19940 | return (bfd_vma) -1; | |
19941 | ||
19942 | return plt0_size; | |
19943 | } | |
19944 | ||
19945 | /* Return size of plt entry starting at offset OFFSET | |
19946 | of plt section located at address START | |
19947 | or (bfd_vma) -1 if size can not be determined. */ | |
19948 | ||
19949 | static bfd_vma | |
19950 | elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset) | |
19951 | { | |
19952 | bfd_vma first_insn; | |
19953 | bfd_vma plt_size = 0; | |
19954 | const bfd_byte *addr = start + offset; | |
19955 | ||
19956 | /* PLT entry size if fixed on Thumb-only platforms. */ | |
685e70ae | 19957 | if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0]) |
6a631e86 YG |
19958 | return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry); |
19959 | ||
19960 | /* Respect Thumb stub if necessary. */ | |
685e70ae | 19961 | if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0]) |
6a631e86 | 19962 | { |
cc850f74 | 19963 | plt_size += 2 * ARRAY_SIZE (elf32_arm_plt_thumb_stub); |
6a631e86 YG |
19964 | } |
19965 | ||
19966 | /* Strip immediate from first add. */ | |
685e70ae | 19967 | first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00; |
6a631e86 YG |
19968 | |
19969 | #ifdef FOUR_WORD_PLT | |
19970 | if (first_insn == elf32_arm_plt_entry[0]) | |
19971 | plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry); | |
19972 | #else | |
19973 | if (first_insn == elf32_arm_plt_entry_long[0]) | |
19974 | plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long); | |
19975 | else if (first_insn == elf32_arm_plt_entry_short[0]) | |
19976 | plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short); | |
19977 | #endif | |
19978 | else | |
19979 | /* We don't yet handle this PLT format. */ | |
19980 | return (bfd_vma) -1; | |
19981 | ||
19982 | return plt_size; | |
19983 | } | |
19984 | ||
19985 | /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */ | |
19986 | ||
19987 | static long | |
19988 | elf32_arm_get_synthetic_symtab (bfd *abfd, | |
19989 | long symcount ATTRIBUTE_UNUSED, | |
19990 | asymbol **syms ATTRIBUTE_UNUSED, | |
19991 | long dynsymcount, | |
19992 | asymbol **dynsyms, | |
19993 | asymbol **ret) | |
19994 | { | |
19995 | asection *relplt; | |
19996 | asymbol *s; | |
19997 | arelent *p; | |
19998 | long count, i, n; | |
19999 | size_t size; | |
20000 | Elf_Internal_Shdr *hdr; | |
20001 | char *names; | |
20002 | asection *plt; | |
20003 | bfd_vma offset; | |
20004 | bfd_byte *data; | |
20005 | ||
20006 | *ret = NULL; | |
20007 | ||
20008 | if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0) | |
20009 | return 0; | |
20010 | ||
20011 | if (dynsymcount <= 0) | |
20012 | return 0; | |
20013 | ||
20014 | relplt = bfd_get_section_by_name (abfd, ".rel.plt"); | |
20015 | if (relplt == NULL) | |
20016 | return 0; | |
20017 | ||
20018 | hdr = &elf_section_data (relplt)->this_hdr; | |
20019 | if (hdr->sh_link != elf_dynsymtab (abfd) | |
20020 | || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA)) | |
20021 | return 0; | |
20022 | ||
20023 | plt = bfd_get_section_by_name (abfd, ".plt"); | |
20024 | if (plt == NULL) | |
20025 | return 0; | |
20026 | ||
0a1b45a2 | 20027 | if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, true)) |
6a631e86 YG |
20028 | return -1; |
20029 | ||
20030 | data = plt->contents; | |
20031 | if (data == NULL) | |
20032 | { | |
206e9791 AM |
20033 | if (!bfd_get_full_section_contents (abfd, plt, &data) |
20034 | || data == NULL) | |
6a631e86 | 20035 | return -1; |
206e9791 AM |
20036 | plt->contents = data; |
20037 | plt->flags |= SEC_IN_MEMORY; | |
6a631e86 YG |
20038 | } |
20039 | ||
20040 | count = relplt->size / hdr->sh_entsize; | |
20041 | size = count * sizeof (asymbol); | |
20042 | p = relplt->relocation; | |
20043 | for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel) | |
20044 | { | |
20045 | size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt"); | |
20046 | if (p->addend != 0) | |
20047 | size += sizeof ("+0x") - 1 + 8; | |
20048 | } | |
20049 | ||
20050 | s = *ret = (asymbol *) bfd_malloc (size); | |
20051 | if (s == NULL) | |
20052 | return -1; | |
20053 | ||
20054 | offset = elf32_arm_plt0_size (abfd, data); | |
20055 | if (offset == (bfd_vma) -1) | |
20056 | return -1; | |
20057 | ||
20058 | names = (char *) (s + count); | |
20059 | p = relplt->relocation; | |
20060 | n = 0; | |
20061 | for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel) | |
20062 | { | |
20063 | size_t len; | |
20064 | ||
20065 | bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset); | |
20066 | if (plt_size == (bfd_vma) -1) | |
20067 | break; | |
20068 | ||
20069 | *s = **p->sym_ptr_ptr; | |
20070 | /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since | |
20071 | we are defining a symbol, ensure one of them is set. */ | |
20072 | if ((s->flags & BSF_LOCAL) == 0) | |
20073 | s->flags |= BSF_GLOBAL; | |
20074 | s->flags |= BSF_SYNTHETIC; | |
20075 | s->section = plt; | |
20076 | s->value = offset; | |
20077 | s->name = names; | |
20078 | s->udata.p = NULL; | |
20079 | len = strlen ((*p->sym_ptr_ptr)->name); | |
20080 | memcpy (names, (*p->sym_ptr_ptr)->name, len); | |
20081 | names += len; | |
20082 | if (p->addend != 0) | |
20083 | { | |
20084 | char buf[30], *a; | |
20085 | ||
20086 | memcpy (names, "+0x", sizeof ("+0x") - 1); | |
20087 | names += sizeof ("+0x") - 1; | |
20088 | bfd_sprintf_vma (abfd, buf, p->addend); | |
20089 | for (a = buf; *a == '0'; ++a) | |
20090 | ; | |
20091 | len = strlen (a); | |
20092 | memcpy (names, a, len); | |
20093 | names += len; | |
20094 | } | |
20095 | memcpy (names, "@plt", sizeof ("@plt")); | |
20096 | names += sizeof ("@plt"); | |
20097 | ++s, ++n; | |
20098 | offset += plt_size; | |
20099 | } | |
20100 | ||
20101 | return n; | |
20102 | } | |
20103 | ||
0a1b45a2 | 20104 | static bool |
8c803a2d | 20105 | elf32_arm_section_flags (const Elf_Internal_Shdr *hdr) |
ac4c9b04 | 20106 | { |
f0728ee3 | 20107 | if (hdr->sh_flags & SHF_ARM_PURECODE) |
8c803a2d | 20108 | hdr->bfd_section->flags |= SEC_ELF_PURECODE; |
0a1b45a2 | 20109 | return true; |
ac4c9b04 MG |
20110 | } |
20111 | ||
20112 | static flagword | |
20113 | elf32_arm_lookup_section_flags (char *flag_name) | |
20114 | { | |
f0728ee3 AV |
20115 | if (!strcmp (flag_name, "SHF_ARM_PURECODE")) |
20116 | return SHF_ARM_PURECODE; | |
ac4c9b04 MG |
20117 | |
20118 | return SEC_NO_FLAGS; | |
20119 | } | |
20120 | ||
491d01d3 YU |
20121 | static unsigned int |
20122 | elf32_arm_count_additional_relocs (asection *sec) | |
20123 | { | |
20124 | struct _arm_elf_section_data *arm_data; | |
20125 | arm_data = get_arm_elf_section_data (sec); | |
5025eb7c | 20126 | |
6342be70 | 20127 | return arm_data == NULL ? 0 : arm_data->additional_reloc_count; |
491d01d3 YU |
20128 | } |
20129 | ||
5522f910 | 20130 | /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which |
9eaff861 | 20131 | has a type >= SHT_LOOS. Returns TRUE if these fields were initialised |
5522f910 NC |
20132 | FALSE otherwise. ISECTION is the best guess matching section from the |
20133 | input bfd IBFD, but it might be NULL. */ | |
20134 | ||
0a1b45a2 | 20135 | static bool |
5522f910 NC |
20136 | elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED, |
20137 | bfd *obfd ATTRIBUTE_UNUSED, | |
20138 | const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED, | |
20139 | Elf_Internal_Shdr *osection) | |
20140 | { | |
20141 | switch (osection->sh_type) | |
20142 | { | |
20143 | case SHT_ARM_EXIDX: | |
20144 | { | |
20145 | Elf_Internal_Shdr **oheaders = elf_elfsections (obfd); | |
20146 | Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd); | |
20147 | unsigned i = 0; | |
20148 | ||
20149 | osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER; | |
20150 | osection->sh_info = 0; | |
20151 | ||
20152 | /* The sh_link field must be set to the text section associated with | |
20153 | this index section. Unfortunately the ARM EHABI does not specify | |
20154 | exactly how to determine this association. Our caller does try | |
20155 | to match up OSECTION with its corresponding input section however | |
20156 | so that is a good first guess. */ | |
20157 | if (isection != NULL | |
20158 | && osection->bfd_section != NULL | |
20159 | && isection->bfd_section != NULL | |
20160 | && isection->bfd_section->output_section != NULL | |
20161 | && isection->bfd_section->output_section == osection->bfd_section | |
20162 | && iheaders != NULL | |
20163 | && isection->sh_link > 0 | |
20164 | && isection->sh_link < elf_numsections (ibfd) | |
20165 | && iheaders[isection->sh_link]->bfd_section != NULL | |
20166 | && iheaders[isection->sh_link]->bfd_section->output_section != NULL | |
20167 | ) | |
20168 | { | |
20169 | for (i = elf_numsections (obfd); i-- > 0;) | |
20170 | if (oheaders[i]->bfd_section | |
20171 | == iheaders[isection->sh_link]->bfd_section->output_section) | |
20172 | break; | |
20173 | } | |
9eaff861 | 20174 | |
5522f910 NC |
20175 | if (i == 0) |
20176 | { | |
20177 | /* Failing that we have to find a matching section ourselves. If | |
20178 | we had the output section name available we could compare that | |
20179 | with input section names. Unfortunately we don't. So instead | |
20180 | we use a simple heuristic and look for the nearest executable | |
20181 | section before this one. */ | |
20182 | for (i = elf_numsections (obfd); i-- > 0;) | |
20183 | if (oheaders[i] == osection) | |
20184 | break; | |
20185 | if (i == 0) | |
20186 | break; | |
20187 | ||
20188 | while (i-- > 0) | |
20189 | if (oheaders[i]->sh_type == SHT_PROGBITS | |
20190 | && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR)) | |
20191 | == (SHF_ALLOC | SHF_EXECINSTR)) | |
20192 | break; | |
20193 | } | |
20194 | ||
20195 | if (i) | |
20196 | { | |
20197 | osection->sh_link = i; | |
20198 | /* If the text section was part of a group | |
20199 | then the index section should be too. */ | |
20200 | if (oheaders[i]->sh_flags & SHF_GROUP) | |
20201 | osection->sh_flags |= SHF_GROUP; | |
0a1b45a2 | 20202 | return true; |
5522f910 NC |
20203 | } |
20204 | } | |
20205 | break; | |
20206 | ||
20207 | case SHT_ARM_PREEMPTMAP: | |
20208 | osection->sh_flags = SHF_ALLOC; | |
20209 | break; | |
20210 | ||
20211 | case SHT_ARM_ATTRIBUTES: | |
20212 | case SHT_ARM_DEBUGOVERLAY: | |
20213 | case SHT_ARM_OVERLAYSECTION: | |
20214 | default: | |
20215 | break; | |
20216 | } | |
20217 | ||
0a1b45a2 | 20218 | return false; |
5522f910 NC |
20219 | } |
20220 | ||
d691934d NC |
20221 | /* Returns TRUE if NAME is an ARM mapping symbol. |
20222 | Traditionally the symbols $a, $d and $t have been used. | |
20223 | The ARM ELF standard also defines $x (for A64 code). It also allows a | |
20224 | period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+". | |
20225 | Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do | |
20226 | not support them here. $t.x indicates the start of ThumbEE instructions. */ | |
20227 | ||
0a1b45a2 | 20228 | static bool |
d691934d NC |
20229 | is_arm_mapping_symbol (const char * name) |
20230 | { | |
20231 | return name != NULL /* Paranoia. */ | |
20232 | && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then | |
20233 | the mapping symbols could have acquired a prefix. | |
20234 | We do not support this here, since such symbols no | |
20235 | longer conform to the ARM ELF ABI. */ | |
20236 | && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x') | |
20237 | && (name[2] == 0 || name[2] == '.'); | |
20238 | /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if | |
20239 | any characters that follow the period are legal characters for the body | |
20240 | of a symbol's name. For now we just assume that this is the case. */ | |
20241 | } | |
20242 | ||
fca2a38f NC |
20243 | /* Make sure that mapping symbols in object files are not removed via the |
20244 | "strip --strip-unneeded" tool. These symbols are needed in order to | |
20245 | correctly generate interworking veneers, and for byte swapping code | |
20246 | regions. Once an object file has been linked, it is safe to remove the | |
20247 | symbols as they will no longer be needed. */ | |
20248 | ||
20249 | static void | |
20250 | elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym) | |
20251 | { | |
20252 | if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0) | |
fca2a38f | 20253 | && sym->section != bfd_abs_section_ptr |
d691934d | 20254 | && is_arm_mapping_symbol (sym->name)) |
fca2a38f NC |
20255 | sym->flags |= BSF_KEEP; |
20256 | } | |
20257 | ||
5522f910 NC |
20258 | #undef elf_backend_copy_special_section_fields |
20259 | #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields | |
20260 | ||
252b5132 | 20261 | #define ELF_ARCH bfd_arch_arm |
ae95ffa6 | 20262 | #define ELF_TARGET_ID ARM_ELF_DATA |
252b5132 | 20263 | #define ELF_MACHINE_CODE EM_ARM |
d0facd1b NC |
20264 | #ifdef __QNXTARGET__ |
20265 | #define ELF_MAXPAGESIZE 0x1000 | |
20266 | #else | |
7572ca89 | 20267 | #define ELF_MAXPAGESIZE 0x10000 |
d0facd1b | 20268 | #endif |
24718e3b | 20269 | #define ELF_COMMONPAGESIZE 0x1000 |
252b5132 | 20270 | |
07d6d2b8 | 20271 | #define bfd_elf32_mkobject elf32_arm_mkobject |
ba93b8ac | 20272 | |
99e4ae17 AJ |
20273 | #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data |
20274 | #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data | |
252b5132 RH |
20275 | #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags |
20276 | #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data | |
07d6d2b8 | 20277 | #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create |
dc810e39 | 20278 | #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup |
b38cadfb | 20279 | #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup |
07d6d2b8 | 20280 | #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info |
e489d0ae | 20281 | #define bfd_elf32_new_section_hook elf32_arm_new_section_hook |
3c9458e9 | 20282 | #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol |
3e6b1042 | 20283 | #define bfd_elf32_bfd_final_link elf32_arm_final_link |
07d6d2b8 | 20284 | #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab |
252b5132 | 20285 | |
07d6d2b8 | 20286 | #define elf_backend_get_symbol_type elf32_arm_get_symbol_type |
e7679060 | 20287 | #define elf_backend_maybe_function_sym elf32_arm_maybe_function_sym |
07d6d2b8 | 20288 | #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook |
6a5bb875 | 20289 | #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections |
07d6d2b8 | 20290 | #define elf_backend_check_relocs elf32_arm_check_relocs |
9eaff861 | 20291 | #define elf_backend_update_relocs elf32_arm_update_relocs |
dc810e39 | 20292 | #define elf_backend_relocate_section elf32_arm_relocate_section |
e489d0ae | 20293 | #define elf_backend_write_section elf32_arm_write_section |
252b5132 | 20294 | #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol |
07d6d2b8 | 20295 | #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections |
252b5132 RH |
20296 | #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol |
20297 | #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections | |
20298 | #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections | |
0855e32b | 20299 | #define elf_backend_always_size_sections elf32_arm_always_size_sections |
74541ad4 | 20300 | #define elf_backend_init_index_section _bfd_elf_init_2_index_sections |
ed7e9d0b | 20301 | #define elf_backend_init_file_header elf32_arm_init_file_header |
99e4ae17 | 20302 | #define elf_backend_reloc_type_class elf32_arm_reloc_type_class |
c178919b | 20303 | #define elf_backend_object_p elf32_arm_object_p |
07d6d2b8 AM |
20304 | #define elf_backend_fake_sections elf32_arm_fake_sections |
20305 | #define elf_backend_section_from_shdr elf32_arm_section_from_shdr | |
20306 | #define elf_backend_final_write_processing elf32_arm_final_write_processing | |
20307 | #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol | |
0beaef2b | 20308 | #define elf_backend_size_info elf32_arm_size_info |
b294bdf8 | 20309 | #define elf_backend_modify_segment_map elf32_arm_modify_segment_map |
07d6d2b8 AM |
20310 | #define elf_backend_additional_program_headers elf32_arm_additional_program_headers |
20311 | #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms | |
54ddd295 | 20312 | #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols |
07d6d2b8 | 20313 | #define elf_backend_begin_write_processing elf32_arm_begin_write_processing |
34e77a92 | 20314 | #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook |
491d01d3 | 20315 | #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs |
fca2a38f | 20316 | #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing |
906e58ca NC |
20317 | |
20318 | #define elf_backend_can_refcount 1 | |
20319 | #define elf_backend_can_gc_sections 1 | |
20320 | #define elf_backend_plt_readonly 1 | |
20321 | #define elf_backend_want_got_plt 1 | |
20322 | #define elf_backend_want_plt_sym 0 | |
5474d94f | 20323 | #define elf_backend_want_dynrelro 1 |
906e58ca NC |
20324 | #define elf_backend_may_use_rel_p 1 |
20325 | #define elf_backend_may_use_rela_p 0 | |
4e7fd91e | 20326 | #define elf_backend_default_use_rela_p 0 |
64f52338 | 20327 | #define elf_backend_dtrel_excludes_plt 1 |
252b5132 | 20328 | |
04f7c78d | 20329 | #define elf_backend_got_header_size 12 |
af9bf9cb | 20330 | #define elf_backend_extern_protected_data 0 |
04f7c78d | 20331 | |
07d6d2b8 | 20332 | #undef elf_backend_obj_attrs_vendor |
906e58ca | 20333 | #define elf_backend_obj_attrs_vendor "aeabi" |
07d6d2b8 | 20334 | #undef elf_backend_obj_attrs_section |
906e58ca | 20335 | #define elf_backend_obj_attrs_section ".ARM.attributes" |
07d6d2b8 | 20336 | #undef elf_backend_obj_attrs_arg_type |
906e58ca | 20337 | #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type |
07d6d2b8 | 20338 | #undef elf_backend_obj_attrs_section_type |
104d59d1 | 20339 | #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES |
b38cadfb | 20340 | #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order |
07d6d2b8 | 20341 | #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown |
104d59d1 | 20342 | |
07d6d2b8 | 20343 | #undef elf_backend_section_flags |
ac4c9b04 | 20344 | #define elf_backend_section_flags elf32_arm_section_flags |
07d6d2b8 AM |
20345 | #undef elf_backend_lookup_section_flags_hook |
20346 | #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags | |
ac4c9b04 | 20347 | |
0a1b45a2 | 20348 | #define elf_backend_linux_prpsinfo32_ugid16 true |
a2f63b2e | 20349 | |
252b5132 | 20350 | #include "elf32-target.h" |
7f266840 | 20351 | |
b38cadfb NC |
20352 | /* Native Client targets. */ |
20353 | ||
20354 | #undef TARGET_LITTLE_SYM | |
6d00b590 | 20355 | #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec |
b38cadfb NC |
20356 | #undef TARGET_LITTLE_NAME |
20357 | #define TARGET_LITTLE_NAME "elf32-littlearm-nacl" | |
20358 | #undef TARGET_BIG_SYM | |
6d00b590 | 20359 | #define TARGET_BIG_SYM arm_elf32_nacl_be_vec |
b38cadfb NC |
20360 | #undef TARGET_BIG_NAME |
20361 | #define TARGET_BIG_NAME "elf32-bigarm-nacl" | |
20362 | ||
20363 | /* Like elf32_arm_link_hash_table_create -- but overrides | |
20364 | appropriately for NaCl. */ | |
20365 | ||
20366 | static struct bfd_link_hash_table * | |
20367 | elf32_arm_nacl_link_hash_table_create (bfd *abfd) | |
20368 | { | |
20369 | struct bfd_link_hash_table *ret; | |
20370 | ||
20371 | ret = elf32_arm_link_hash_table_create (abfd); | |
20372 | if (ret) | |
20373 | { | |
20374 | struct elf32_arm_link_hash_table *htab | |
20375 | = (struct elf32_arm_link_hash_table *) ret; | |
20376 | ||
b38cadfb NC |
20377 | htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry); |
20378 | htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry); | |
20379 | } | |
20380 | return ret; | |
20381 | } | |
20382 | ||
20383 | /* Since NaCl doesn't use the ARM-specific unwind format, we don't | |
20384 | really need to use elf32_arm_modify_segment_map. But we do it | |
20385 | anyway just to reduce gratuitous differences with the stock ARM backend. */ | |
20386 | ||
0a1b45a2 | 20387 | static bool |
b38cadfb NC |
20388 | elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info) |
20389 | { | |
20390 | return (elf32_arm_modify_segment_map (abfd, info) | |
20391 | && nacl_modify_segment_map (abfd, info)); | |
20392 | } | |
20393 | ||
0a1b45a2 | 20394 | static bool |
cc364be6 | 20395 | elf32_arm_nacl_final_write_processing (bfd *abfd) |
887badb3 | 20396 | { |
cc364be6 AM |
20397 | arm_final_write_processing (abfd); |
20398 | return nacl_final_write_processing (abfd); | |
887badb3 RM |
20399 | } |
20400 | ||
6a631e86 YG |
20401 | static bfd_vma |
20402 | elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt, | |
20403 | const arelent *rel ATTRIBUTE_UNUSED) | |
20404 | { | |
20405 | return plt->vma | |
20406 | + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) + | |
20407 | i * ARRAY_SIZE (elf32_arm_nacl_plt_entry)); | |
20408 | } | |
887badb3 | 20409 | |
b38cadfb | 20410 | #undef elf32_bed |
6a631e86 | 20411 | #define elf32_bed elf32_arm_nacl_bed |
b38cadfb NC |
20412 | #undef bfd_elf32_bfd_link_hash_table_create |
20413 | #define bfd_elf32_bfd_link_hash_table_create \ | |
20414 | elf32_arm_nacl_link_hash_table_create | |
20415 | #undef elf_backend_plt_alignment | |
6a631e86 | 20416 | #define elf_backend_plt_alignment 4 |
b38cadfb NC |
20417 | #undef elf_backend_modify_segment_map |
20418 | #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map | |
6d6c25c8 AM |
20419 | #undef elf_backend_modify_headers |
20420 | #define elf_backend_modify_headers nacl_modify_headers | |
887badb3 RM |
20421 | #undef elf_backend_final_write_processing |
20422 | #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing | |
6a631e86 YG |
20423 | #undef bfd_elf32_get_synthetic_symtab |
20424 | #undef elf_backend_plt_sym_val | |
20425 | #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val | |
5522f910 | 20426 | #undef elf_backend_copy_special_section_fields |
b38cadfb | 20427 | |
887badb3 RM |
20428 | #undef ELF_MINPAGESIZE |
20429 | #undef ELF_COMMONPAGESIZE | |
20430 | ||
90c14f0c L |
20431 | #undef ELF_TARGET_OS |
20432 | #define ELF_TARGET_OS is_nacl | |
b38cadfb NC |
20433 | |
20434 | #include "elf32-target.h" | |
20435 | ||
20436 | /* Reset to defaults. */ | |
20437 | #undef elf_backend_plt_alignment | |
20438 | #undef elf_backend_modify_segment_map | |
20439 | #define elf_backend_modify_segment_map elf32_arm_modify_segment_map | |
6d6c25c8 | 20440 | #undef elf_backend_modify_headers |
887badb3 RM |
20441 | #undef elf_backend_final_write_processing |
20442 | #define elf_backend_final_write_processing elf32_arm_final_write_processing | |
20443 | #undef ELF_MINPAGESIZE | |
887badb3 RM |
20444 | #undef ELF_COMMONPAGESIZE |
20445 | #define ELF_COMMONPAGESIZE 0x1000 | |
20446 | ||
b38cadfb | 20447 | |
617a5ada CL |
20448 | /* FDPIC Targets. */ |
20449 | ||
20450 | #undef TARGET_LITTLE_SYM | |
20451 | #define TARGET_LITTLE_SYM arm_elf32_fdpic_le_vec | |
20452 | #undef TARGET_LITTLE_NAME | |
20453 | #define TARGET_LITTLE_NAME "elf32-littlearm-fdpic" | |
20454 | #undef TARGET_BIG_SYM | |
20455 | #define TARGET_BIG_SYM arm_elf32_fdpic_be_vec | |
20456 | #undef TARGET_BIG_NAME | |
20457 | #define TARGET_BIG_NAME "elf32-bigarm-fdpic" | |
20458 | #undef elf_match_priority | |
20459 | #define elf_match_priority 128 | |
18a20338 CL |
20460 | #undef ELF_OSABI |
20461 | #define ELF_OSABI ELFOSABI_ARM_FDPIC | |
617a5ada CL |
20462 | |
20463 | /* Like elf32_arm_link_hash_table_create -- but overrides | |
20464 | appropriately for FDPIC. */ | |
20465 | ||
20466 | static struct bfd_link_hash_table * | |
20467 | elf32_arm_fdpic_link_hash_table_create (bfd *abfd) | |
20468 | { | |
20469 | struct bfd_link_hash_table *ret; | |
20470 | ||
20471 | ret = elf32_arm_link_hash_table_create (abfd); | |
20472 | if (ret) | |
20473 | { | |
20474 | struct elf32_arm_link_hash_table *htab = (struct elf32_arm_link_hash_table *) ret; | |
20475 | ||
20476 | htab->fdpic_p = 1; | |
20477 | } | |
20478 | return ret; | |
20479 | } | |
20480 | ||
e8b09b87 CL |
20481 | /* We need dynamic symbols for every section, since segments can |
20482 | relocate independently. */ | |
0a1b45a2 | 20483 | static bool |
e8b09b87 CL |
20484 | elf32_arm_fdpic_omit_section_dynsym (bfd *output_bfd ATTRIBUTE_UNUSED, |
20485 | struct bfd_link_info *info | |
20486 | ATTRIBUTE_UNUSED, | |
20487 | asection *p ATTRIBUTE_UNUSED) | |
20488 | { | |
20489 | switch (elf_section_data (p)->this_hdr.sh_type) | |
20490 | { | |
20491 | case SHT_PROGBITS: | |
20492 | case SHT_NOBITS: | |
20493 | /* If sh_type is yet undecided, assume it could be | |
20494 | SHT_PROGBITS/SHT_NOBITS. */ | |
20495 | case SHT_NULL: | |
0a1b45a2 | 20496 | return false; |
e8b09b87 CL |
20497 | |
20498 | /* There shouldn't be section relative relocations | |
20499 | against any other section. */ | |
20500 | default: | |
0a1b45a2 | 20501 | return true; |
e8b09b87 CL |
20502 | } |
20503 | } | |
20504 | ||
617a5ada CL |
20505 | #undef elf32_bed |
20506 | #define elf32_bed elf32_arm_fdpic_bed | |
20507 | ||
20508 | #undef bfd_elf32_bfd_link_hash_table_create | |
4b24dd1a | 20509 | #define bfd_elf32_bfd_link_hash_table_create elf32_arm_fdpic_link_hash_table_create |
617a5ada | 20510 | |
e8b09b87 CL |
20511 | #undef elf_backend_omit_section_dynsym |
20512 | #define elf_backend_omit_section_dynsym elf32_arm_fdpic_omit_section_dynsym | |
20513 | ||
90c14f0c L |
20514 | #undef ELF_TARGET_OS |
20515 | ||
617a5ada | 20516 | #include "elf32-target.h" |
e8b09b87 | 20517 | |
617a5ada | 20518 | #undef elf_match_priority |
18a20338 | 20519 | #undef ELF_OSABI |
e8b09b87 | 20520 | #undef elf_backend_omit_section_dynsym |
617a5ada | 20521 | |
906e58ca | 20522 | /* VxWorks Targets. */ |
4e7fd91e | 20523 | |
07d6d2b8 AM |
20524 | #undef TARGET_LITTLE_SYM |
20525 | #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec | |
20526 | #undef TARGET_LITTLE_NAME | |
20527 | #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks" | |
20528 | #undef TARGET_BIG_SYM | |
20529 | #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec | |
20530 | #undef TARGET_BIG_NAME | |
20531 | #define TARGET_BIG_NAME "elf32-bigarm-vxworks" | |
4e7fd91e PB |
20532 | |
20533 | /* Like elf32_arm_link_hash_table_create -- but overrides | |
20534 | appropriately for VxWorks. */ | |
906e58ca | 20535 | |
4e7fd91e PB |
20536 | static struct bfd_link_hash_table * |
20537 | elf32_arm_vxworks_link_hash_table_create (bfd *abfd) | |
20538 | { | |
20539 | struct bfd_link_hash_table *ret; | |
20540 | ||
20541 | ret = elf32_arm_link_hash_table_create (abfd); | |
20542 | if (ret) | |
20543 | { | |
20544 | struct elf32_arm_link_hash_table *htab | |
00a97672 | 20545 | = (struct elf32_arm_link_hash_table *) ret; |
4e7fd91e PB |
20546 | htab->use_rel = 0; |
20547 | } | |
20548 | return ret; | |
906e58ca | 20549 | } |
4e7fd91e | 20550 | |
0a1b45a2 | 20551 | static bool |
cc364be6 | 20552 | elf32_arm_vxworks_final_write_processing (bfd *abfd) |
00a97672 | 20553 | { |
cc364be6 AM |
20554 | arm_final_write_processing (abfd); |
20555 | return elf_vxworks_final_write_processing (abfd); | |
00a97672 RS |
20556 | } |
20557 | ||
906e58ca | 20558 | #undef elf32_bed |
4e7fd91e PB |
20559 | #define elf32_bed elf32_arm_vxworks_bed |
20560 | ||
906e58ca NC |
20561 | #undef bfd_elf32_bfd_link_hash_table_create |
20562 | #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create | |
906e58ca NC |
20563 | #undef elf_backend_final_write_processing |
20564 | #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing | |
20565 | #undef elf_backend_emit_relocs | |
9eaff861 | 20566 | #define elf_backend_emit_relocs elf_vxworks_emit_relocs |
4e7fd91e | 20567 | |
906e58ca | 20568 | #undef elf_backend_may_use_rel_p |
00a97672 | 20569 | #define elf_backend_may_use_rel_p 0 |
906e58ca | 20570 | #undef elf_backend_may_use_rela_p |
00a97672 | 20571 | #define elf_backend_may_use_rela_p 1 |
906e58ca | 20572 | #undef elf_backend_default_use_rela_p |
00a97672 | 20573 | #define elf_backend_default_use_rela_p 1 |
906e58ca | 20574 | #undef elf_backend_want_plt_sym |
00a97672 | 20575 | #define elf_backend_want_plt_sym 1 |
906e58ca | 20576 | #undef ELF_MAXPAGESIZE |
00a97672 | 20577 | #define ELF_MAXPAGESIZE 0x1000 |
90c14f0c L |
20578 | #undef ELF_TARGET_OS |
20579 | #define ELF_TARGET_OS is_vxworks | |
4e7fd91e PB |
20580 | |
20581 | #include "elf32-target.h" | |
20582 | ||
20583 | ||
21d799b5 NC |
20584 | /* Merge backend specific data from an object file to the output |
20585 | object file when linking. */ | |
20586 | ||
0a1b45a2 | 20587 | static bool |
50e03d47 | 20588 | elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info) |
21d799b5 | 20589 | { |
50e03d47 | 20590 | bfd *obfd = info->output_bfd; |
21d799b5 NC |
20591 | flagword out_flags; |
20592 | flagword in_flags; | |
0a1b45a2 | 20593 | bool flags_compatible = true; |
21d799b5 NC |
20594 | asection *sec; |
20595 | ||
cc643b88 | 20596 | /* Check if we have the same endianness. */ |
50e03d47 | 20597 | if (! _bfd_generic_verify_endian_match (ibfd, info)) |
0a1b45a2 | 20598 | return false; |
21d799b5 NC |
20599 | |
20600 | if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd)) | |
0a1b45a2 | 20601 | return true; |
21d799b5 | 20602 | |
50e03d47 | 20603 | if (!elf32_arm_merge_eabi_attributes (ibfd, info)) |
0a1b45a2 | 20604 | return false; |
21d799b5 NC |
20605 | |
20606 | /* The input BFD must have had its flags initialised. */ | |
20607 | /* The following seems bogus to me -- The flags are initialized in | |
20608 | the assembler but I don't think an elf_flags_init field is | |
20609 | written into the object. */ | |
20610 | /* BFD_ASSERT (elf_flags_init (ibfd)); */ | |
20611 | ||
20612 | in_flags = elf_elfheader (ibfd)->e_flags; | |
20613 | out_flags = elf_elfheader (obfd)->e_flags; | |
20614 | ||
20615 | /* In theory there is no reason why we couldn't handle this. However | |
20616 | in practice it isn't even close to working and there is no real | |
20617 | reason to want it. */ | |
20618 | if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4 | |
20619 | && !(ibfd->flags & DYNAMIC) | |
20620 | && (in_flags & EF_ARM_BE8)) | |
20621 | { | |
871b3ab2 | 20622 | _bfd_error_handler (_("error: %pB is already in final BE8 format"), |
21d799b5 | 20623 | ibfd); |
0a1b45a2 | 20624 | return false; |
21d799b5 NC |
20625 | } |
20626 | ||
20627 | if (!elf_flags_init (obfd)) | |
20628 | { | |
20629 | /* If the input is the default architecture and had the default | |
20630 | flags then do not bother setting the flags for the output | |
20631 | architecture, instead allow future merges to do this. If no | |
20632 | future merges ever set these flags then they will retain their | |
99059e56 RM |
20633 | uninitialised values, which surprise surprise, correspond |
20634 | to the default values. */ | |
21d799b5 NC |
20635 | if (bfd_get_arch_info (ibfd)->the_default |
20636 | && elf_elfheader (ibfd)->e_flags == 0) | |
0a1b45a2 | 20637 | return true; |
21d799b5 | 20638 | |
0a1b45a2 | 20639 | elf_flags_init (obfd) = true; |
21d799b5 NC |
20640 | elf_elfheader (obfd)->e_flags = in_flags; |
20641 | ||
20642 | if (bfd_get_arch (obfd) == bfd_get_arch (ibfd) | |
20643 | && bfd_get_arch_info (obfd)->the_default) | |
20644 | return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd)); | |
20645 | ||
0a1b45a2 | 20646 | return true; |
21d799b5 NC |
20647 | } |
20648 | ||
20649 | /* Determine what should happen if the input ARM architecture | |
20650 | does not match the output ARM architecture. */ | |
20651 | if (! bfd_arm_merge_machines (ibfd, obfd)) | |
0a1b45a2 | 20652 | return false; |
21d799b5 NC |
20653 | |
20654 | /* Identical flags must be compatible. */ | |
20655 | if (in_flags == out_flags) | |
0a1b45a2 | 20656 | return true; |
21d799b5 NC |
20657 | |
20658 | /* Check to see if the input BFD actually contains any sections. If | |
20659 | not, its flags may not have been initialised either, but it | |
20660 | cannot actually cause any incompatiblity. Do not short-circuit | |
20661 | dynamic objects; their section list may be emptied by | |
20662 | elf_link_add_object_symbols. | |
20663 | ||
20664 | Also check to see if there are no code sections in the input. | |
20665 | In this case there is no need to check for code specific flags. | |
20666 | XXX - do we need to worry about floating-point format compatability | |
20667 | in data sections ? */ | |
20668 | if (!(ibfd->flags & DYNAMIC)) | |
20669 | { | |
0a1b45a2 AM |
20670 | bool null_input_bfd = true; |
20671 | bool only_data_sections = true; | |
21d799b5 NC |
20672 | |
20673 | for (sec = ibfd->sections; sec != NULL; sec = sec->next) | |
20674 | { | |
20675 | /* Ignore synthetic glue sections. */ | |
20676 | if (strcmp (sec->name, ".glue_7") | |
20677 | && strcmp (sec->name, ".glue_7t")) | |
20678 | { | |
fd361982 | 20679 | if ((bfd_section_flags (sec) |
21d799b5 NC |
20680 | & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS)) |
20681 | == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS)) | |
0a1b45a2 | 20682 | only_data_sections = false; |
21d799b5 | 20683 | |
0a1b45a2 | 20684 | null_input_bfd = false; |
21d799b5 NC |
20685 | break; |
20686 | } | |
20687 | } | |
20688 | ||
20689 | if (null_input_bfd || only_data_sections) | |
0a1b45a2 | 20690 | return true; |
21d799b5 NC |
20691 | } |
20692 | ||
20693 | /* Complain about various flag mismatches. */ | |
20694 | if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags), | |
20695 | EF_ARM_EABI_VERSION (out_flags))) | |
20696 | { | |
20697 | _bfd_error_handler | |
90b6238f | 20698 | (_("error: source object %pB has EABI version %d, but target %pB has EABI version %d"), |
c08bb8dd AM |
20699 | ibfd, (in_flags & EF_ARM_EABIMASK) >> 24, |
20700 | obfd, (out_flags & EF_ARM_EABIMASK) >> 24); | |
0a1b45a2 | 20701 | return false; |
21d799b5 NC |
20702 | } |
20703 | ||
20704 | /* Not sure what needs to be checked for EABI versions >= 1. */ | |
20705 | /* VxWorks libraries do not use these flags. */ | |
20706 | if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed | |
20707 | && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed | |
20708 | && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN) | |
20709 | { | |
20710 | if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26)) | |
20711 | { | |
20712 | _bfd_error_handler | |
871b3ab2 | 20713 | (_("error: %pB is compiled for APCS-%d, whereas target %pB uses APCS-%d"), |
c08bb8dd AM |
20714 | ibfd, in_flags & EF_ARM_APCS_26 ? 26 : 32, |
20715 | obfd, out_flags & EF_ARM_APCS_26 ? 26 : 32); | |
0a1b45a2 | 20716 | flags_compatible = false; |
21d799b5 NC |
20717 | } |
20718 | ||
20719 | if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT)) | |
20720 | { | |
20721 | if (in_flags & EF_ARM_APCS_FLOAT) | |
20722 | _bfd_error_handler | |
871b3ab2 | 20723 | (_("error: %pB passes floats in float registers, whereas %pB passes them in integer registers"), |
21d799b5 NC |
20724 | ibfd, obfd); |
20725 | else | |
20726 | _bfd_error_handler | |
871b3ab2 | 20727 | (_("error: %pB passes floats in integer registers, whereas %pB passes them in float registers"), |
21d799b5 NC |
20728 | ibfd, obfd); |
20729 | ||
0a1b45a2 | 20730 | flags_compatible = false; |
21d799b5 NC |
20731 | } |
20732 | ||
20733 | if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT)) | |
20734 | { | |
20735 | if (in_flags & EF_ARM_VFP_FLOAT) | |
20736 | _bfd_error_handler | |
90b6238f AM |
20737 | (_("error: %pB uses %s instructions, whereas %pB does not"), |
20738 | ibfd, "VFP", obfd); | |
21d799b5 NC |
20739 | else |
20740 | _bfd_error_handler | |
90b6238f AM |
20741 | (_("error: %pB uses %s instructions, whereas %pB does not"), |
20742 | ibfd, "FPA", obfd); | |
21d799b5 | 20743 | |
0a1b45a2 | 20744 | flags_compatible = false; |
21d799b5 NC |
20745 | } |
20746 | ||
20747 | if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT)) | |
20748 | { | |
20749 | if (in_flags & EF_ARM_MAVERICK_FLOAT) | |
20750 | _bfd_error_handler | |
90b6238f AM |
20751 | (_("error: %pB uses %s instructions, whereas %pB does not"), |
20752 | ibfd, "Maverick", obfd); | |
21d799b5 NC |
20753 | else |
20754 | _bfd_error_handler | |
90b6238f AM |
20755 | (_("error: %pB does not use %s instructions, whereas %pB does"), |
20756 | ibfd, "Maverick", obfd); | |
21d799b5 | 20757 | |
0a1b45a2 | 20758 | flags_compatible = false; |
21d799b5 NC |
20759 | } |
20760 | ||
20761 | #ifdef EF_ARM_SOFT_FLOAT | |
20762 | if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT)) | |
20763 | { | |
20764 | /* We can allow interworking between code that is VFP format | |
20765 | layout, and uses either soft float or integer regs for | |
20766 | passing floating point arguments and results. We already | |
20767 | know that the APCS_FLOAT flags match; similarly for VFP | |
20768 | flags. */ | |
20769 | if ((in_flags & EF_ARM_APCS_FLOAT) != 0 | |
20770 | || (in_flags & EF_ARM_VFP_FLOAT) == 0) | |
20771 | { | |
20772 | if (in_flags & EF_ARM_SOFT_FLOAT) | |
20773 | _bfd_error_handler | |
871b3ab2 | 20774 | (_("error: %pB uses software FP, whereas %pB uses hardware FP"), |
21d799b5 NC |
20775 | ibfd, obfd); |
20776 | else | |
20777 | _bfd_error_handler | |
871b3ab2 | 20778 | (_("error: %pB uses hardware FP, whereas %pB uses software FP"), |
21d799b5 NC |
20779 | ibfd, obfd); |
20780 | ||
0a1b45a2 | 20781 | flags_compatible = false; |
21d799b5 NC |
20782 | } |
20783 | } | |
20784 | #endif | |
20785 | ||
20786 | /* Interworking mismatch is only a warning. */ | |
20787 | if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK)) | |
20788 | { | |
20789 | if (in_flags & EF_ARM_INTERWORK) | |
20790 | { | |
20791 | _bfd_error_handler | |
90b6238f | 20792 | (_("warning: %pB supports interworking, whereas %pB does not"), |
21d799b5 NC |
20793 | ibfd, obfd); |
20794 | } | |
20795 | else | |
20796 | { | |
20797 | _bfd_error_handler | |
90b6238f | 20798 | (_("warning: %pB does not support interworking, whereas %pB does"), |
21d799b5 NC |
20799 | ibfd, obfd); |
20800 | } | |
20801 | } | |
20802 | } | |
20803 | ||
20804 | return flags_compatible; | |
20805 | } |