]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - bfd/elf32-m32r.c
Touches most files in bfd/, so likely will be blamed for everything..
[thirdparty/binutils-gdb.git] / bfd / elf32-m32r.c
CommitLineData
252b5132 1/* M32R-specific support for 32-bit ELF.
7898deda
NC
2 Copyright 1996, 1997, 1998, 1999, 2000, 2001
3 Free Software Foundation, Inc.
252b5132
RH
4
5This file is part of BFD, the Binary File Descriptor library.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
19Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21#include "bfd.h"
22#include "sysdep.h"
23#include "libbfd.h"
24#include "elf-bfd.h"
25#include "elf/m32r.h"
26
27static bfd_reloc_status_type m32r_elf_10_pcrel_reloc
28 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
29static bfd_reloc_status_type m32r_elf_do_10_pcrel_reloc
30 PARAMS ((bfd *, reloc_howto_type *, asection *,
31 bfd_byte *, bfd_vma, asection *, bfd_vma, bfd_vma));
32static bfd_reloc_status_type m32r_elf_hi16_reloc
33 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
34static void m32r_elf_relocate_hi16
35 PARAMS ((bfd *, int, Elf_Internal_Rela *, Elf_Internal_Rela *,
36 bfd_byte *, bfd_vma));
37bfd_reloc_status_type m32r_elf_lo16_reloc
38 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
8b125cde
DE
39bfd_reloc_status_type m32r_elf_generic_reloc
40 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
252b5132
RH
41static bfd_reloc_status_type m32r_elf_sda16_reloc
42 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
43static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
44 PARAMS ((bfd *abfd, bfd_reloc_code_real_type code));
45static void m32r_info_to_howto_rel
46 PARAMS ((bfd *, arelent *, Elf32_Internal_Rel *));
47boolean _bfd_m32r_elf_section_from_bfd_section
48 PARAMS ((bfd *, Elf32_Internal_Shdr *, asection *, int *));
49void _bfd_m32r_elf_symbol_processing
50 PARAMS ((bfd *, asymbol *));
51static boolean m32r_elf_add_symbol_hook
52 PARAMS ((bfd *, struct bfd_link_info *, const Elf_Internal_Sym *,
53 const char **, flagword *, asection **, bfd_vma *));
54static boolean m32r_elf_relocate_section
55 PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
56 Elf_Internal_Rela *, Elf_Internal_Sym *, asection **));
57#if 0 /* not yet */
58static boolean m32r_elf_relax_delete_bytes
59 PARAMS ((bfd *, asection *, bfd_vma, int));
60#endif
252b5132
RH
61static bfd_reloc_status_type m32r_elf_final_sda_base
62 PARAMS ((bfd *, struct bfd_link_info *, const char **, bfd_vma *));
63static boolean m32r_elf_object_p
64 PARAMS ((bfd *));
65static void m32r_elf_final_write_processing
66 PARAMS ((bfd *, boolean));
67static boolean m32r_elf_set_private_flags
68 PARAMS ((bfd *, flagword));
69static boolean m32r_elf_copy_private_bfd_data
70 PARAMS ((bfd *, bfd *));
71static boolean m32r_elf_merge_private_bfd_data
72 PARAMS ((bfd *, bfd *));
73static boolean m32r_elf_print_private_bfd_data
74 PARAMS ((bfd *, PTR));
917583ad
NC
75static boolean m32r_elf_gc_sweep_hook
76 PARAMS ((bfd *, struct bfd_link_info *, asection *,
77 const Elf_Internal_Rela *));
78static boolean m32r_elf_check_relocs
79 PARAMS ((bfd *, struct bfd_link_info *, asection *,
80 const Elf_Internal_Rela *));
81
82asection * m32r_elf_gc_mark_hook
83 PARAMS ((bfd *, struct bfd_link_info *, Elf_Internal_Rela *,
84 struct elf_link_hash_entry *, Elf_Internal_Sym *));
252b5132
RH
85
86#define NOP_INSN 0x7000
87#define MAKE_PARALLEL(insn) ((insn) | 0x8000)
88
89/* Use REL instead of RELA to save space.
90 This only saves space in libraries and object files, but perhaps
91 relocs will be put in ROM? All in all though, REL relocs are a pain
92 to work with. */
93#define USE_REL
94
95static reloc_howto_type m32r_elf_howto_table[] =
96{
97 /* This reloc does nothing. */
98 HOWTO (R_M32R_NONE, /* type */
99 0, /* rightshift */
100 2, /* size (0 = byte, 1 = short, 2 = long) */
101 32, /* bitsize */
102 false, /* pc_relative */
103 0, /* bitpos */
104 complain_overflow_bitfield, /* complain_on_overflow */
105 bfd_elf_generic_reloc, /* special_function */
106 "R_M32R_NONE", /* name */
107 false, /* partial_inplace */
108 0, /* src_mask */
109 0, /* dst_mask */
110 false), /* pcrel_offset */
111
112 /* A 16 bit absolute relocation. */
113 HOWTO (R_M32R_16, /* type */
114 0, /* rightshift */
115 1, /* size (0 = byte, 1 = short, 2 = long) */
116 16, /* bitsize */
117 false, /* pc_relative */
118 0, /* bitpos */
119 complain_overflow_bitfield, /* complain_on_overflow */
8b125cde 120 m32r_elf_generic_reloc,/* special_function */
252b5132
RH
121 "R_M32R_16", /* name */
122 true, /* partial_inplace */
123 0xffff, /* src_mask */
124 0xffff, /* dst_mask */
125 false), /* pcrel_offset */
126
127 /* A 32 bit absolute relocation. */
128 HOWTO (R_M32R_32, /* type */
129 0, /* rightshift */
130 2, /* size (0 = byte, 1 = short, 2 = long) */
131 32, /* bitsize */
132 false, /* pc_relative */
133 0, /* bitpos */
134 complain_overflow_bitfield, /* complain_on_overflow */
8b125cde 135 m32r_elf_generic_reloc,/* special_function */
252b5132
RH
136 "R_M32R_32", /* name */
137 true, /* partial_inplace */
138 0xffffffff, /* src_mask */
139 0xffffffff, /* dst_mask */
140 false), /* pcrel_offset */
141
142 /* A 24 bit address. */
143 HOWTO (R_M32R_24, /* type */
144 0, /* rightshift */
145 2, /* size (0 = byte, 1 = short, 2 = long) */
146 24, /* bitsize */
147 false, /* pc_relative */
148 0, /* bitpos */
149 complain_overflow_unsigned, /* complain_on_overflow */
8b125cde 150 m32r_elf_generic_reloc,/* special_function */
252b5132
RH
151 "R_M32R_24", /* name */
152 true, /* partial_inplace */
153 0xffffff, /* src_mask */
154 0xffffff, /* dst_mask */
155 false), /* pcrel_offset */
156
157 /* An PC Relative 10-bit relocation, shifted by 2.
158 This reloc is complicated because relocations are relative to pc & -4.
159 i.e. branches in the right insn slot use the address of the left insn
160 slot for pc. */
161 /* ??? It's not clear whether this should have partial_inplace set or not.
162 Branch relaxing in the assembler can store the addend in the insn,
163 and if bfd_install_relocation gets called the addend may get added
164 again. */
165 HOWTO (R_M32R_10_PCREL, /* type */
166 2, /* rightshift */
167 1, /* size (0 = byte, 1 = short, 2 = long) */
168 10, /* bitsize */
169 true, /* pc_relative */
170 0, /* bitpos */
171 complain_overflow_signed, /* complain_on_overflow */
172 m32r_elf_10_pcrel_reloc, /* special_function */
173 "R_M32R_10_PCREL", /* name */
174 false, /* partial_inplace */
175 0xff, /* src_mask */
176 0xff, /* dst_mask */
177 true), /* pcrel_offset */
178
179 /* A relative 18 bit relocation, right shifted by 2. */
180 HOWTO (R_M32R_18_PCREL, /* type */
181 2, /* rightshift */
182 2, /* size (0 = byte, 1 = short, 2 = long) */
183 16, /* bitsize */
184 true, /* pc_relative */
185 0, /* bitpos */
186 complain_overflow_signed, /* complain_on_overflow */
187 bfd_elf_generic_reloc, /* special_function */
188 "R_M32R_18_PCREL", /* name */
189 false, /* partial_inplace */
190 0xffff, /* src_mask */
191 0xffff, /* dst_mask */
192 true), /* pcrel_offset */
193
194 /* A relative 26 bit relocation, right shifted by 2. */
195 /* ??? It's not clear whether this should have partial_inplace set or not.
196 Branch relaxing in the assembler can store the addend in the insn,
197 and if bfd_install_relocation gets called the addend may get added
198 again. */
199 HOWTO (R_M32R_26_PCREL, /* type */
200 2, /* rightshift */
201 2, /* size (0 = byte, 1 = short, 2 = long) */
202 26, /* bitsize */
203 true, /* pc_relative */
204 0, /* bitpos */
205 complain_overflow_signed, /* complain_on_overflow */
206 bfd_elf_generic_reloc, /* special_function */
207 "R_M32R_26_PCREL", /* name */
208 false, /* partial_inplace */
209 0xffffff, /* src_mask */
210 0xffffff, /* dst_mask */
211 true), /* pcrel_offset */
212
213 /* High 16 bits of address when lower 16 is or'd in. */
214 HOWTO (R_M32R_HI16_ULO, /* type */
215 16, /* rightshift */
216 2, /* size (0 = byte, 1 = short, 2 = long) */
217 16, /* bitsize */
218 false, /* pc_relative */
219 0, /* bitpos */
220 complain_overflow_dont, /* complain_on_overflow */
221 m32r_elf_hi16_reloc, /* special_function */
222 "R_M32R_HI16_ULO", /* name */
223 true, /* partial_inplace */
224 0x0000ffff, /* src_mask */
225 0x0000ffff, /* dst_mask */
226 false), /* pcrel_offset */
227
228 /* High 16 bits of address when lower 16 is added in. */
229 HOWTO (R_M32R_HI16_SLO, /* type */
230 16, /* rightshift */
231 2, /* size (0 = byte, 1 = short, 2 = long) */
232 16, /* bitsize */
233 false, /* pc_relative */
234 0, /* bitpos */
235 complain_overflow_dont, /* complain_on_overflow */
236 m32r_elf_hi16_reloc, /* special_function */
237 "R_M32R_HI16_SLO", /* name */
238 true, /* partial_inplace */
239 0x0000ffff, /* src_mask */
240 0x0000ffff, /* dst_mask */
241 false), /* pcrel_offset */
242
243 /* Lower 16 bits of address. */
244 HOWTO (R_M32R_LO16, /* type */
245 0, /* rightshift */
246 2, /* size (0 = byte, 1 = short, 2 = long) */
247 16, /* bitsize */
248 false, /* pc_relative */
249 0, /* bitpos */
250 complain_overflow_dont, /* complain_on_overflow */
251 m32r_elf_lo16_reloc, /* special_function */
252 "R_M32R_LO16", /* name */
253 true, /* partial_inplace */
254 0x0000ffff, /* src_mask */
255 0x0000ffff, /* dst_mask */
256 false), /* pcrel_offset */
257
258 /* Small data area 16 bits offset. */
259 HOWTO (R_M32R_SDA16, /* type */
260 0, /* rightshift */
261 2, /* size (0 = byte, 1 = short, 2 = long) */
262 16, /* bitsize */
263 false, /* pc_relative */
264 0, /* bitpos */
265 complain_overflow_signed, /* complain_on_overflow */
266 m32r_elf_sda16_reloc, /* special_function */
267 "R_M32R_SDA16", /* name */
268 true, /* partial_inplace */ /* FIXME: correct? */
269 0x0000ffff, /* src_mask */
270 0x0000ffff, /* dst_mask */
271 false), /* pcrel_offset */
272
273 /* GNU extension to record C++ vtable hierarchy */
274 HOWTO (R_M32R_GNU_VTINHERIT, /* type */
275 0, /* rightshift */
276 2, /* size (0 = byte, 1 = short, 2 = long) */
277 0, /* bitsize */
278 false, /* pc_relative */
279 0, /* bitpos */
280 complain_overflow_dont, /* complain_on_overflow */
281 NULL, /* special_function */
282 "R_M32R_GNU_VTINHERIT", /* name */
283 false, /* partial_inplace */
284 0, /* src_mask */
285 0, /* dst_mask */
286 false), /* pcrel_offset */
287
288 /* GNU extension to record C++ vtable member usage */
289 HOWTO (R_M32R_GNU_VTENTRY, /* type */
290 0, /* rightshift */
291 2, /* size (0 = byte, 1 = short, 2 = long) */
292 0, /* bitsize */
293 false, /* pc_relative */
294 0, /* bitpos */
295 complain_overflow_dont, /* complain_on_overflow */
296 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
297 "R_M32R_GNU_VTENTRY", /* name */
298 false, /* partial_inplace */
299 0, /* src_mask */
300 0, /* dst_mask */
301 false), /* pcrel_offset */
302
303};
304\f
305/* Handle the R_M32R_10_PCREL reloc. */
306
307static bfd_reloc_status_type
308m32r_elf_10_pcrel_reloc (abfd, reloc_entry, symbol, data,
309 input_section, output_bfd, error_message)
310 bfd * abfd;
311 arelent * reloc_entry;
312 asymbol * symbol;
313 PTR data;
314 asection * input_section;
315 bfd * output_bfd;
5f771d47 316 char ** error_message ATTRIBUTE_UNUSED;
252b5132
RH
317{
318 /* This part is from bfd_elf_generic_reloc. */
319 if (output_bfd != (bfd *) NULL
320 && (symbol->flags & BSF_SECTION_SYM) == 0
321 && (! reloc_entry->howto->partial_inplace
322 || reloc_entry->addend == 0))
323 {
324 reloc_entry->address += input_section->output_offset;
325 return bfd_reloc_ok;
326 }
327
328 if (output_bfd != NULL)
329 {
330 /* FIXME: See bfd_perform_relocation. Is this right? */
331 return bfd_reloc_continue;
332 }
333
334 return m32r_elf_do_10_pcrel_reloc (abfd, reloc_entry->howto,
335 input_section,
336 data, reloc_entry->address,
337 symbol->section,
338 (symbol->value
339 + symbol->section->output_section->vma
340 + symbol->section->output_offset),
341 reloc_entry->addend);
342}
343
344/* Utility to actually perform an R_M32R_10_PCREL reloc. */
345
346static bfd_reloc_status_type
347m32r_elf_do_10_pcrel_reloc (abfd, howto, input_section, data, offset,
348 symbol_section, symbol_value, addend)
349 bfd *abfd;
350 reloc_howto_type *howto;
351 asection *input_section;
352 bfd_byte *data;
353 bfd_vma offset;
5f771d47 354 asection *symbol_section ATTRIBUTE_UNUSED;
252b5132
RH
355 bfd_vma symbol_value;
356 bfd_vma addend;
357{
358 bfd_signed_vma relocation;
359 unsigned long x;
360 bfd_reloc_status_type status;
361
362 /* Sanity check the address (offset in section). */
363 if (offset > input_section->_cooked_size)
364 return bfd_reloc_outofrange;
365
366 relocation = symbol_value + addend;
367 /* Make it pc relative. */
368 relocation -= (input_section->output_section->vma
369 + input_section->output_offset);
370 /* These jumps mask off the lower two bits of the current address
371 before doing pcrel calculations. */
dc810e39 372 relocation -= (offset & -(bfd_vma) 4);
252b5132
RH
373
374 if (relocation < -0x200 || relocation > 0x1ff)
375 status = bfd_reloc_overflow;
376 else
377 status = bfd_reloc_ok;
378
379 x = bfd_get_16 (abfd, data + offset);
380 relocation >>= howto->rightshift;
381 relocation <<= howto->bitpos;
382 x = (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask);
dc810e39 383 bfd_put_16 (abfd, (bfd_vma) x, data + offset);
252b5132
RH
384
385 return status;
386}
387
388/* Handle the R_M32R_HI16_[SU]LO relocs.
389 HI16_SLO is for the add3 and load/store with displacement instructions.
390 HI16_ULO is for the or3 instruction.
391 For R_M32R_HI16_SLO, the lower 16 bits are sign extended when added to
392 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
393 we must add one to the high 16 bytes (which will get subtracted off when
394 the low 16 bits are added).
395 These relocs have to be done in combination with an R_M32R_LO16 reloc
396 because there is a carry from the LO16 to the HI16. Here we just save
397 the information we need; we do the actual relocation when we see the LO16.
398 This code is copied from the elf32-mips.c. We also support an arbitrary
399 number of HI16 relocs to be associated with a single LO16 reloc. The
400 assembler sorts the relocs to ensure each HI16 immediately precedes its
401 LO16. However if there are multiple copies, the assembler may not find
402 the real LO16 so it picks the first one it finds. */
403
404struct m32r_hi16
405{
406 struct m32r_hi16 *next;
407 bfd_byte *addr;
408 bfd_vma addend;
409};
410
411/* FIXME: This should not be a static variable. */
412
413static struct m32r_hi16 *m32r_hi16_list;
414
415static bfd_reloc_status_type
416m32r_elf_hi16_reloc (abfd, reloc_entry, symbol, data,
417 input_section, output_bfd, error_message)
5f771d47 418 bfd *abfd ATTRIBUTE_UNUSED;
252b5132
RH
419 arelent *reloc_entry;
420 asymbol *symbol;
421 PTR data;
422 asection *input_section;
423 bfd *output_bfd;
5f771d47 424 char **error_message ATTRIBUTE_UNUSED;
252b5132
RH
425{
426 bfd_reloc_status_type ret;
427 bfd_vma relocation;
428 struct m32r_hi16 *n;
429
430 /* This part is from bfd_elf_generic_reloc.
431 If we're relocating, and this an external symbol, we don't want
432 to change anything. */
433 if (output_bfd != (bfd *) NULL
434 && (symbol->flags & BSF_SECTION_SYM) == 0
435 && reloc_entry->addend == 0)
436 {
437 reloc_entry->address += input_section->output_offset;
438 return bfd_reloc_ok;
439 }
440
441 /* Sanity check the address (offset in section). */
442 if (reloc_entry->address > input_section->_cooked_size)
443 return bfd_reloc_outofrange;
444
445 ret = bfd_reloc_ok;
446 if (bfd_is_und_section (symbol->section)
447 && output_bfd == (bfd *) NULL)
448 ret = bfd_reloc_undefined;
449
450 if (bfd_is_com_section (symbol->section))
451 relocation = 0;
452 else
453 relocation = symbol->value;
454
455 relocation += symbol->section->output_section->vma;
456 relocation += symbol->section->output_offset;
457 relocation += reloc_entry->addend;
458
459 /* Save the information, and let LO16 do the actual relocation. */
dc810e39 460 n = (struct m32r_hi16 *) bfd_malloc ((bfd_size_type) sizeof *n);
252b5132
RH
461 if (n == NULL)
462 return bfd_reloc_outofrange;
463 n->addr = (bfd_byte *) data + reloc_entry->address;
464 n->addend = relocation;
465 n->next = m32r_hi16_list;
466 m32r_hi16_list = n;
467
468 if (output_bfd != (bfd *) NULL)
469 reloc_entry->address += input_section->output_offset;
470
471 return ret;
472}
473
474/* Handle an M32R ELF HI16 reloc. */
475
476static void
477m32r_elf_relocate_hi16 (input_bfd, type, relhi, rello, contents, addend)
478 bfd *input_bfd;
479 int type;
480 Elf_Internal_Rela *relhi;
481 Elf_Internal_Rela *rello;
482 bfd_byte *contents;
483 bfd_vma addend;
484{
485 unsigned long insn;
486 bfd_vma addlo;
487
488 insn = bfd_get_32 (input_bfd, contents + relhi->r_offset);
489
490 addlo = bfd_get_32 (input_bfd, contents + rello->r_offset);
491 if (type == R_M32R_HI16_SLO)
492 addlo = ((addlo & 0xffff) ^ 0x8000) - 0x8000;
493 else
494 addlo &= 0xffff;
495
496 addend += ((insn & 0xffff) << 16) + addlo;
497
498 /* Reaccount for sign extension of low part. */
499 if (type == R_M32R_HI16_SLO
500 && (addend & 0x8000) != 0)
501 addend += 0x10000;
502
503 bfd_put_32 (input_bfd,
504 (insn & 0xffff0000) | ((addend >> 16) & 0xffff),
505 contents + relhi->r_offset);
506}
507
508/* Do an R_M32R_LO16 relocation. This is a straightforward 16 bit
509 inplace relocation; this function exists in order to do the
510 R_M32R_HI16_[SU]LO relocation described above. */
511
512bfd_reloc_status_type
4c72e23a 513m32r_elf_lo16_reloc (input_bfd, reloc_entry, symbol, data,
252b5132 514 input_section, output_bfd, error_message)
4c72e23a 515 bfd *input_bfd;
252b5132
RH
516 arelent *reloc_entry;
517 asymbol *symbol;
518 PTR data;
519 asection *input_section;
520 bfd *output_bfd;
521 char **error_message;
522{
4c72e23a
CM
523 /* This part is from bfd_elf_generic_reloc.
524 If we're relocating, and this an external symbol, we don't want
525 to change anything. */
526 if (output_bfd != (bfd *) NULL
527 && (symbol->flags & BSF_SECTION_SYM) == 0
528 && reloc_entry->addend == 0)
529 {
530 reloc_entry->address += input_section->output_offset;
531 return bfd_reloc_ok;
532 }
533
252b5132
RH
534 if (m32r_hi16_list != NULL)
535 {
536 struct m32r_hi16 *l;
537
538 l = m32r_hi16_list;
539 while (l != NULL)
540 {
541 unsigned long insn;
542 unsigned long val;
543 unsigned long vallo;
544 struct m32r_hi16 *next;
545
546 /* Do the HI16 relocation. Note that we actually don't need
547 to know anything about the LO16 itself, except where to
548 find the low 16 bits of the addend needed by the LO16. */
4c72e23a
CM
549 insn = bfd_get_32 (input_bfd, l->addr);
550 vallo = ((bfd_get_32 (input_bfd, (bfd_byte *) data + reloc_entry->address)
252b5132
RH
551 & 0xffff) ^ 0x8000) - 0x8000;
552 val = ((insn & 0xffff) << 16) + vallo;
553 val += l->addend;
554
555 /* Reaccount for sign extension of low part. */
556 if ((val & 0x8000) != 0)
557 val += 0x10000;
558
dc810e39
AM
559 insn = (insn &~ (bfd_vma) 0xffff) | ((val >> 16) & 0xffff);
560 bfd_put_32 (input_bfd, (bfd_vma) insn, l->addr);
252b5132
RH
561
562 next = l->next;
563 free (l);
564 l = next;
565 }
566
567 m32r_hi16_list = NULL;
568 }
569
4c72e23a
CM
570 /* Now do the LO16 reloc in the usual way.
571 ??? It would be nice to call bfd_elf_generic_reloc here,
572 but we have partial_inplace == TRUE. bfd_elf_generic_reloc will
573 pass the handling back to bfd_install_relocation which will install
574 a section relative addend which is wrong. */
8b125cde
DE
575 return m32r_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
576 input_section, output_bfd, error_message);
577}
578
c3668558
KH
579/* Do generic partial_inplace relocation.
580 This is a local replacement for bfd_elf_generic_reloc. */
8b125cde
DE
581
582bfd_reloc_status_type
583m32r_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
584 input_section, output_bfd, error_message)
585 bfd *input_bfd;
586 arelent *reloc_entry;
587 asymbol *symbol;
588 PTR data;
589 asection *input_section;
590 bfd *output_bfd;
23ccc829 591 char **error_message ATTRIBUTE_UNUSED;
8b125cde
DE
592{
593 bfd_reloc_status_type ret;
594 bfd_vma relocation;
595 bfd_byte *inplace_address;
596
597 /* This part is from bfd_elf_generic_reloc.
598 If we're relocating, and this an external symbol, we don't want
599 to change anything. */
600 if (output_bfd != (bfd *) NULL
601 && (symbol->flags & BSF_SECTION_SYM) == 0
602 && reloc_entry->addend == 0)
603 {
604 reloc_entry->address += input_section->output_offset;
605 return bfd_reloc_ok;
606 }
607
608 /* Now do the the reloc in the usual way.
609 ??? It would be nice to call bfd_elf_generic_reloc here,
610 but we have partial_inplace == TRUE. bfd_elf_generic_reloc will
611 pass the handling back to bfd_install_relocation which will install
612 a section relative addend which is wrong. */
4c72e23a
CM
613
614 /* Sanity check the address (offset in section). */
615 if (reloc_entry->address > input_section->_cooked_size)
616 return bfd_reloc_outofrange;
617
618 ret = bfd_reloc_ok;
619 if (bfd_is_und_section (symbol->section)
620 && output_bfd == (bfd *) NULL)
621 ret = bfd_reloc_undefined;
622
623 if (bfd_is_com_section (symbol->section)
624 || output_bfd != (bfd *) NULL)
625 relocation = 0;
626 else
627 relocation = symbol->value;
628
629 /* Only do this for a final link. */
630 if (output_bfd == (bfd *) NULL)
631 {
632 relocation += symbol->section->output_section->vma;
633 relocation += symbol->section->output_offset;
634 }
635
636 relocation += reloc_entry->addend;
23ccc829 637 inplace_address = (bfd_byte *) data + reloc_entry->address;
8b125cde
DE
638
639#define DOIT(x) \
640 x = ( (x & ~reloc_entry->howto->dst_mask) | \
641 (((x & reloc_entry->howto->src_mask) + relocation) & \
642 reloc_entry->howto->dst_mask))
4c72e23a 643
8b125cde
DE
644 switch (reloc_entry->howto->size)
645 {
646 case 1:
647 {
648 short x = bfd_get_16 (input_bfd, inplace_address);
649 DOIT (x);
dc810e39 650 bfd_put_16 (input_bfd, (bfd_vma) x, inplace_address);
8b125cde
DE
651 }
652 break;
653 case 2:
654 {
655 unsigned long x = bfd_get_32 (input_bfd, inplace_address);
656 DOIT (x);
dc810e39 657 bfd_put_32 (input_bfd, (bfd_vma)x , inplace_address);
8b125cde
DE
658 }
659 break;
660 default:
661 BFD_ASSERT (0);
662 }
4c72e23a
CM
663
664 if (output_bfd != (bfd *) NULL)
665 reloc_entry->address += input_section->output_offset;
666
667 return ret;
252b5132
RH
668}
669
670/* Handle the R_M32R_SDA16 reloc.
671 This reloc is used to compute the address of objects in the small data area
672 and to perform loads and stores from that area.
673 The lower 16 bits are sign extended and added to the register specified
674 in the instruction, which is assumed to point to _SDA_BASE_. */
675
676static bfd_reloc_status_type
677m32r_elf_sda16_reloc (abfd, reloc_entry, symbol, data,
678 input_section, output_bfd, error_message)
5f771d47 679 bfd *abfd ATTRIBUTE_UNUSED;
252b5132
RH
680 arelent *reloc_entry;
681 asymbol *symbol;
5f771d47 682 PTR data ATTRIBUTE_UNUSED;
252b5132
RH
683 asection *input_section;
684 bfd *output_bfd;
5f771d47 685 char **error_message ATTRIBUTE_UNUSED;
252b5132
RH
686{
687 /* This part is from bfd_elf_generic_reloc. */
688 if (output_bfd != (bfd *) NULL
689 && (symbol->flags & BSF_SECTION_SYM) == 0
690 && (! reloc_entry->howto->partial_inplace
691 || reloc_entry->addend == 0))
692 {
693 reloc_entry->address += input_section->output_offset;
694 return bfd_reloc_ok;
695 }
696
697 if (output_bfd != NULL)
698 {
699 /* FIXME: See bfd_perform_relocation. Is this right? */
700 return bfd_reloc_continue;
701 }
702
703 /* FIXME: not sure what to do here yet. But then again, the linker
704 may never call us. */
705 abort ();
706}
707\f
708/* Map BFD reloc types to M32R ELF reloc types. */
709
710struct m32r_reloc_map
711{
712 bfd_reloc_code_real_type bfd_reloc_val;
713 unsigned char elf_reloc_val;
714};
715
716static const struct m32r_reloc_map m32r_reloc_map[] =
717{
718 { BFD_RELOC_NONE, R_M32R_NONE },
719 { BFD_RELOC_16, R_M32R_16 },
720 { BFD_RELOC_32, R_M32R_32 },
721 { BFD_RELOC_M32R_24, R_M32R_24 },
722 { BFD_RELOC_M32R_10_PCREL, R_M32R_10_PCREL },
723 { BFD_RELOC_M32R_18_PCREL, R_M32R_18_PCREL },
724 { BFD_RELOC_M32R_26_PCREL, R_M32R_26_PCREL },
725 { BFD_RELOC_M32R_HI16_ULO, R_M32R_HI16_ULO },
726 { BFD_RELOC_M32R_HI16_SLO, R_M32R_HI16_SLO },
727 { BFD_RELOC_M32R_LO16, R_M32R_LO16 },
728 { BFD_RELOC_M32R_SDA16, R_M32R_SDA16 },
729 { BFD_RELOC_VTABLE_INHERIT, R_M32R_GNU_VTINHERIT },
730 { BFD_RELOC_VTABLE_ENTRY, R_M32R_GNU_VTENTRY },
731};
732
733static reloc_howto_type *
734bfd_elf32_bfd_reloc_type_lookup (abfd, code)
5f771d47 735 bfd *abfd ATTRIBUTE_UNUSED;
252b5132
RH
736 bfd_reloc_code_real_type code;
737{
738 unsigned int i;
739
740 for (i = 0;
741 i < sizeof (m32r_reloc_map) / sizeof (struct m32r_reloc_map);
742 i++)
743 {
744 if (m32r_reloc_map[i].bfd_reloc_val == code)
745 return &m32r_elf_howto_table[m32r_reloc_map[i].elf_reloc_val];
746 }
747
748 return NULL;
749}
750
751/* Set the howto pointer for an M32R ELF reloc. */
752
753static void
754m32r_info_to_howto_rel (abfd, cache_ptr, dst)
5f771d47 755 bfd *abfd ATTRIBUTE_UNUSED;
252b5132
RH
756 arelent *cache_ptr;
757 Elf32_Internal_Rel *dst;
758{
759 unsigned int r_type;
760
761 r_type = ELF32_R_TYPE (dst->r_info);
762 BFD_ASSERT (r_type < (unsigned int) R_M32R_max);
763 cache_ptr->howto = &m32r_elf_howto_table[r_type];
764}
765\f
766/* Given a BFD section, try to locate the corresponding ELF section
767 index. */
768
769boolean
770_bfd_m32r_elf_section_from_bfd_section (abfd, hdr, sec, retval)
5f771d47
ILT
771 bfd *abfd ATTRIBUTE_UNUSED;
772 Elf32_Internal_Shdr *hdr ATTRIBUTE_UNUSED;
252b5132
RH
773 asection *sec;
774 int *retval;
775{
776 if (strcmp (bfd_get_section_name (abfd, sec), ".scommon") == 0)
777 {
778 *retval = SHN_M32R_SCOMMON;
779 return true;
780 }
781 return false;
782}
783
784/* M32R ELF uses two common sections. One is the usual one, and the other
785 is for small objects. All the small objects are kept together, and then
786 referenced via one register, which yields faster assembler code. It is
787 up to the compiler to emit an instruction to load the register with
788 _SDA_BASE. This is what we use for the small common section. This
789 approach is copied from elf32-mips.c. */
790static asection m32r_elf_scom_section;
791static asymbol m32r_elf_scom_symbol;
792static asymbol *m32r_elf_scom_symbol_ptr;
793
794/* Handle the special M32R section numbers that a symbol may use. */
795
796void
797_bfd_m32r_elf_symbol_processing (abfd, asym)
5f771d47 798 bfd *abfd ATTRIBUTE_UNUSED;
252b5132
RH
799 asymbol *asym;
800{
801 elf_symbol_type *elfsym;
802
803 elfsym = (elf_symbol_type *) asym;
804
805 switch (elfsym->internal_elf_sym.st_shndx)
806 {
807 case SHN_M32R_SCOMMON:
808 if (m32r_elf_scom_section.name == NULL)
809 {
810 /* Initialize the small common section. */
811 m32r_elf_scom_section.name = ".scommon";
812 m32r_elf_scom_section.flags = SEC_IS_COMMON;
813 m32r_elf_scom_section.output_section = &m32r_elf_scom_section;
814 m32r_elf_scom_section.symbol = &m32r_elf_scom_symbol;
815 m32r_elf_scom_section.symbol_ptr_ptr = &m32r_elf_scom_symbol_ptr;
816 m32r_elf_scom_symbol.name = ".scommon";
817 m32r_elf_scom_symbol.flags = BSF_SECTION_SYM;
818 m32r_elf_scom_symbol.section = &m32r_elf_scom_section;
819 m32r_elf_scom_symbol_ptr = &m32r_elf_scom_symbol;
820 }
821 asym->section = &m32r_elf_scom_section;
822 asym->value = elfsym->internal_elf_sym.st_size;
823 break;
824 }
825}
826
827/* Hook called by the linker routine which adds symbols from an object
828 file. We must handle the special M32R section numbers here.
829 We also keep watching for whether we need to create the sdata special
830 linker sections. */
831
832static boolean
833m32r_elf_add_symbol_hook (abfd, info, sym, namep, flagsp, secp, valp)
834 bfd *abfd;
835 struct bfd_link_info *info;
836 const Elf_Internal_Sym *sym;
837 const char **namep;
5f771d47 838 flagword *flagsp ATTRIBUTE_UNUSED;
252b5132
RH
839 asection **secp;
840 bfd_vma *valp;
841{
842 if (! info->relocateable
843 && (*namep)[0] == '_' && (*namep)[1] == 'S'
844 && strcmp (*namep, "_SDA_BASE_") == 0)
845 {
846 /* This is simpler than using _bfd_elf_create_linker_section
847 (our needs are simpler than ppc's needs). Also
848 _bfd_elf_create_linker_section currently has a bug where if a .sdata
849 section already exists a new one is created that follows it which
850 screws of _SDA_BASE_ address calcs because output_offset != 0. */
851 struct elf_link_hash_entry *h;
852 asection *s = bfd_get_section_by_name (abfd, ".sdata");
853
854 /* The following code was cobbled from elf32-ppc.c and elflink.c. */
855
856 if (s == NULL)
857 {
dc810e39
AM
858 flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
859 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
252b5132
RH
860
861 s = bfd_make_section_anyway (abfd, ".sdata");
862 if (s == NULL)
863 return false;
864 bfd_set_section_flags (abfd, s, flags);
865 bfd_set_section_alignment (abfd, s, 2);
866 }
867
868 h = (struct elf_link_hash_entry *)
869 bfd_link_hash_lookup (info->hash, "_SDA_BASE_", false, false, false);
870
871 if ((h == NULL || h->root.type == bfd_link_hash_undefined)
872 && !(_bfd_generic_link_add_one_symbol (info,
873 abfd,
874 "_SDA_BASE_",
875 BSF_GLOBAL,
876 s,
dc810e39 877 (bfd_vma) 32768,
252b5132
RH
878 (const char *) NULL,
879 false,
880 get_elf_backend_data (abfd)->collect,
881 (struct bfd_link_hash_entry **) &h)))
882 return false;
883 h->type = STT_OBJECT;
884 }
885
886 switch (sym->st_shndx)
887 {
888 case SHN_M32R_SCOMMON:
889 *secp = bfd_make_section_old_way (abfd, ".scommon");
890 (*secp)->flags |= SEC_IS_COMMON;
891 *valp = sym->st_size;
892 break;
893 }
894
895 return true;
896}
897
898/* We have to figure out the SDA_BASE value, so that we can adjust the
899 symbol value correctly. We look up the symbol _SDA_BASE_ in the output
900 BFD. If we can't find it, we're stuck. We cache it in the ELF
901 target data. We don't need to adjust the symbol value for an
902 external symbol if we are producing relocateable output. */
903
904static bfd_reloc_status_type
905m32r_elf_final_sda_base (output_bfd, info, error_message, psb)
906 bfd *output_bfd;
907 struct bfd_link_info *info;
908 const char **error_message;
909 bfd_vma *psb;
910{
911 if (elf_gp (output_bfd) == 0)
912 {
913 struct bfd_link_hash_entry *h;
914
915 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", false, false, true);
916 if (h != (struct bfd_link_hash_entry *) NULL
917 && h->type == bfd_link_hash_defined)
918 elf_gp (output_bfd) = (h->u.def.value
919 + h->u.def.section->output_section->vma
920 + h->u.def.section->output_offset);
921 else
922 {
923 /* Only get the error once. */
924 *psb = elf_gp (output_bfd) = 4;
925 *error_message =
926 (const char *) _("SDA relocation when _SDA_BASE_ not defined");
927 return bfd_reloc_dangerous;
928 }
929 }
930 *psb = elf_gp (output_bfd);
931 return bfd_reloc_ok;
932}
933\f
934/* Relocate an M32R/D ELF section.
935 There is some attempt to make this function usable for many architectures,
936 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
937 if only to serve as a learning tool.
938
939 The RELOCATE_SECTION function is called by the new ELF backend linker
940 to handle the relocations for a section.
941
942 The relocs are always passed as Rela structures; if the section
943 actually uses Rel structures, the r_addend field will always be
944 zero.
945
946 This function is responsible for adjust the section contents as
947 necessary, and (if using Rela relocs and generating a
948 relocateable output file) adjusting the reloc addend as
949 necessary.
950
951 This function does not have to worry about setting the reloc
952 address or the reloc symbol index.
953
954 LOCAL_SYMS is a pointer to the swapped in local symbols.
955
956 LOCAL_SECTIONS is an array giving the section in the input file
957 corresponding to the st_shndx field of each local symbol.
958
959 The global hash table entry for the global symbols can be found
960 via elf_sym_hashes (input_bfd).
961
962 When generating relocateable output, this function must handle
963 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
964 going to be the section symbol corresponding to the output
965 section, which means that the addend must be adjusted
966 accordingly. */
967
968static boolean
969m32r_elf_relocate_section (output_bfd, info, input_bfd, input_section,
970 contents, relocs, local_syms, local_sections)
5f771d47 971 bfd *output_bfd ATTRIBUTE_UNUSED;
252b5132
RH
972 struct bfd_link_info *info;
973 bfd *input_bfd;
974 asection *input_section;
975 bfd_byte *contents;
976 Elf_Internal_Rela *relocs;
977 Elf_Internal_Sym *local_syms;
978 asection **local_sections;
979{
980 Elf_Internal_Shdr *symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
981 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (input_bfd);
982 Elf_Internal_Rela *rel, *relend;
983 /* Assume success. */
984 boolean ret = true;
985
986 rel = relocs;
987 relend = relocs + input_section->reloc_count;
988 for (; rel < relend; rel++)
989 {
990 int r_type;
991 reloc_howto_type *howto;
992 unsigned long r_symndx;
993 /* We can't modify r_addend here as elf_link_input_bfd has an assert to
994 ensure it's zero (we use REL relocs, not RELA). Therefore this
995 should be assigning zero to `addend', but for clarity we use
996 `r_addend'. */
997 bfd_vma addend = rel->r_addend;
998 bfd_vma offset = rel->r_offset;
999 struct elf_link_hash_entry *h;
1000 Elf_Internal_Sym *sym;
1001 asection *sec;
1002 const char *sym_name;
1003 bfd_reloc_status_type r;
1004 const char *errmsg = NULL;
1005
1006 h = NULL;
1007 r_type = ELF32_R_TYPE (rel->r_info);
1008 if (r_type < 0 || r_type >= (int) R_M32R_max)
1009 {
1010 (*_bfd_error_handler) (_("%s: unknown relocation type %d"),
1011 bfd_get_filename (input_bfd),
1012 (int) r_type);
1013 bfd_set_error (bfd_error_bad_value);
1014 ret = false;
1015 continue;
1016 }
1017
1018 if (r_type == R_M32R_GNU_VTENTRY
1019 || r_type == R_M32R_GNU_VTINHERIT)
1020 continue;
1021
1022 howto = m32r_elf_howto_table + r_type;
1023 r_symndx = ELF32_R_SYM (rel->r_info);
1024
1025 if (info->relocateable)
1026 {
1027 /* This is a relocateable link. We don't have to change
1028 anything, unless the reloc is against a section symbol,
1029 in which case we have to adjust according to where the
1030 section symbol winds up in the output section. */
1031 sec = NULL;
1032 if (r_symndx >= symtab_hdr->sh_info)
1033 {
1034 /* External symbol. */
1035 continue;
1036 }
1037
1038 /* Local symbol. */
1039 sym = local_syms + r_symndx;
1040 sym_name = "<local symbol>";
1041 /* STT_SECTION: symbol is associated with a section. */
1042 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
1043 {
1044 /* Symbol isn't associated with a section. Nothing to do. */
1045 continue;
1046 }
1047
1048 sec = local_sections[r_symndx];
1049 addend += sec->output_offset + sym->st_value;
1050#ifndef USE_REL
1051 /* This can't be done for USE_REL because it doesn't mean anything
1052 and elf_link_input_bfd asserts this stays zero. */
1053 rel->r_addend = addend;
1054#endif
1055
1056#ifndef USE_REL
1057 /* Addends are stored with relocs. We're done. */
1058 continue;
1059#else /* USE_REL */
1060 /* If partial_inplace, we need to store any additional addend
1061 back in the section. */
1062 if (! howto->partial_inplace)
1063 continue;
1064 /* ??? Here is a nice place to call a special_function
1065 like handler. */
1066 if (r_type != R_M32R_HI16_SLO && r_type != R_M32R_HI16_ULO)
1067 r = _bfd_relocate_contents (howto, input_bfd,
1068 addend, contents + offset);
1069 else
1070 {
1071 Elf_Internal_Rela *lorel;
1072
1073 /* We allow an arbitrary number of HI16 relocs before the
1074 LO16 reloc. This permits gcc to emit the HI and LO relocs
1075 itself. */
1076 for (lorel = rel + 1;
1077 (lorel < relend
1078 && (ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_SLO
1079 || ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_ULO));
1080 lorel++)
1081 continue;
1082 if (lorel < relend
1083 && ELF32_R_TYPE (lorel->r_info) == R_M32R_LO16)
1084 {
1085 m32r_elf_relocate_hi16 (input_bfd, r_type, rel, lorel,
1086 contents, addend);
1087 r = bfd_reloc_ok;
1088 }
1089 else
1090 r = _bfd_relocate_contents (howto, input_bfd,
1091 addend, contents + offset);
1092 }
1093#endif /* USE_REL */
1094 }
1095 else
1096 {
1097 bfd_vma relocation;
1098
1099 /* This is a final link. */
1100 sym = NULL;
1101 sec = NULL;
1102
1103 if (r_symndx < symtab_hdr->sh_info)
1104 {
1105 /* Local symbol. */
1106 sym = local_syms + r_symndx;
1107 sec = local_sections[r_symndx];
1108 sym_name = "<local symbol>";
1109 relocation = (sec->output_section->vma
1110 + sec->output_offset
1111 + sym->st_value);
1112 }
1113 else
1114 {
1115 /* External symbol. */
1116 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
1117 while (h->root.type == bfd_link_hash_indirect
1118 || h->root.type == bfd_link_hash_warning)
1119 h = (struct elf_link_hash_entry *) h->root.u.i.link;
1120 sym_name = h->root.root.string;
1121
1122 if (h->root.type == bfd_link_hash_defined
1123 || h->root.type == bfd_link_hash_defweak)
1124 {
1125 sec = h->root.u.def.section;
1126 if (sec->output_section == NULL)
1127 relocation = 0;
1128 else
1129 relocation = (h->root.u.def.value
1130 + sec->output_section->vma
1131 + sec->output_offset);
1132 }
1133 else if (h->root.type == bfd_link_hash_undefweak)
1134 relocation = 0;
1135 else
1136 {
1137 if (! ((*info->callbacks->undefined_symbol)
1138 (info, h->root.root.string, input_bfd,
5cc7c785 1139 input_section, offset, true)))
252b5132
RH
1140 return false;
1141 relocation = 0;
1142 }
1143 }
1144
1145 /* Sanity check the address. */
1146 if (offset > input_section->_raw_size)
1147 {
1148 r = bfd_reloc_outofrange;
1149 goto check_reloc;
1150 }
1151
1152 switch ((int) r_type)
1153 {
1154 case (int) R_M32R_10_PCREL :
1155 r = m32r_elf_do_10_pcrel_reloc (input_bfd, howto, input_section,
1156 contents, offset,
1157 sec, relocation, addend);
1158 break;
1159
1160 case (int) R_M32R_HI16_SLO :
1161 case (int) R_M32R_HI16_ULO :
1162 {
1163 Elf_Internal_Rela *lorel;
1164
1165 /* We allow an arbitrary number of HI16 relocs before the
1166 LO16 reloc. This permits gcc to emit the HI and LO relocs
1167 itself. */
1168 for (lorel = rel + 1;
1169 (lorel < relend
1170 && (ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_SLO
1171 || ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_ULO));
1172 lorel++)
1173 continue;
1174 if (lorel < relend
1175 && ELF32_R_TYPE (lorel->r_info) == R_M32R_LO16)
1176 {
1177 m32r_elf_relocate_hi16 (input_bfd, r_type, rel, lorel,
1178 contents, relocation + addend);
1179 r = bfd_reloc_ok;
1180 }
1181 else
1182 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
1183 contents, offset,
1184 relocation, addend);
1185 }
1186 break;
1187
1188 case (int) R_M32R_SDA16 :
1189 {
1190 const char *name;
1191
1192 BFD_ASSERT (sec != NULL);
1193 name = bfd_get_section_name (abfd, sec);
1194
1195 if (strcmp (name, ".sdata") == 0
1196 || strcmp (name, ".sbss") == 0
1197 || strcmp (name, ".scommon") == 0)
1198 {
1199 bfd_vma sda_base;
1200 bfd *out_bfd = sec->output_section->owner;
1201
1202 r = m32r_elf_final_sda_base (out_bfd, info,
1203 &errmsg,
1204 &sda_base);
1205 if (r != bfd_reloc_ok)
1206 {
1207 ret = false;
1208 goto check_reloc;
1209 }
1210
1211 /* At this point `relocation' contains the object's
1212 address. */
1213 relocation -= sda_base;
1214 /* Now it contains the offset from _SDA_BASE_. */
1215 }
1216 else
1217 {
1218 (*_bfd_error_handler) (_("%s: The target (%s) of an %s relocation is in the wrong section (%s)"),
1219 bfd_get_filename (input_bfd),
1220 sym_name,
1221 m32r_elf_howto_table[(int) r_type].name,
1222 bfd_get_section_name (abfd, sec));
1223 /*bfd_set_error (bfd_error_bad_value); ??? why? */
1224 ret = false;
1225 continue;
1226 }
1227 }
1228 /* fall through */
1229
1230 default :
1231 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
1232 contents, offset,
1233 relocation, addend);
1234 break;
1235 }
1236 }
1237
1238 check_reloc:
1239
1240 if (r != bfd_reloc_ok)
1241 {
1242 /* FIXME: This should be generic enough to go in a utility. */
1243 const char *name;
1244
1245 if (h != NULL)
1246 name = h->root.root.string;
1247 else
1248 {
1249 name = (bfd_elf_string_from_elf_section
1250 (input_bfd, symtab_hdr->sh_link, sym->st_name));
1251 if (name == NULL || *name == '\0')
1252 name = bfd_section_name (input_bfd, sec);
1253 }
1254
1255 if (errmsg != NULL)
1256 goto common_error;
1257
1258 switch (r)
1259 {
1260 case bfd_reloc_overflow:
1261 if (! ((*info->callbacks->reloc_overflow)
1262 (info, name, howto->name, (bfd_vma) 0,
1263 input_bfd, input_section, offset)))
1264 return false;
1265 break;
1266
1267 case bfd_reloc_undefined:
1268 if (! ((*info->callbacks->undefined_symbol)
1269 (info, name, input_bfd, input_section,
5cc7c785 1270 offset, true)))
252b5132
RH
1271 return false;
1272 break;
1273
1274 case bfd_reloc_outofrange:
1275 errmsg = _("internal error: out of range error");
1276 goto common_error;
1277
1278 case bfd_reloc_notsupported:
1279 errmsg = _("internal error: unsupported relocation error");
1280 goto common_error;
1281
1282 case bfd_reloc_dangerous:
1283 errmsg = _("internal error: dangerous error");
1284 goto common_error;
1285
1286 default:
1287 errmsg = _("internal error: unknown error");
1288 /* fall through */
1289
1290 common_error:
1291 if (!((*info->callbacks->warning)
1292 (info, errmsg, name, input_bfd, input_section,
1293 offset)))
1294 return false;
1295 break;
1296 }
1297 }
1298 }
1299
1300 return ret;
1301}
1302\f
1303#if 0 /* relaxing not supported yet */
1304
1305/* This function handles relaxing for the m32r.
1306 Relaxing on the m32r is tricky because of instruction alignment
1307 requirements (4 byte instructions must be aligned on 4 byte boundaries).
1308
1309 The following relaxing opportunities are handled:
1310
1311 seth/add3/jl -> bl24 or bl8
1312 seth/add3 -> ld24
1313
1314 It would be nice to handle bl24 -> bl8 but given:
1315
1316 - 4 byte insns must be on 4 byte boundaries
1317 - branch instructions only branch to insns on 4 byte boundaries
1318
1319 this isn't much of a win because the insn in the 2 "deleted" bytes
1320 must become a nop. With some complexity some real relaxation could be
1321 done but the frequency just wouldn't make it worth it; it's better to
1322 try to do all the code compaction one can elsewhere.
1323 When the chip supports parallel 16 bit insns, things may change.
1324*/
1325
c3668558 1326static boolean
252b5132
RH
1327m32r_elf_relax_section (abfd, sec, link_info, again)
1328 bfd *abfd;
1329 asection *sec;
1330 struct bfd_link_info *link_info;
1331 boolean *again;
1332{
1333 Elf_Internal_Shdr *symtab_hdr;
1334 /* The Rela structures are used here because that's what
1335 _bfd_elf32_link_read_relocs uses [for convenience - it sets the addend
1336 field to 0]. */
1337 Elf_Internal_Rela *internal_relocs;
1338 Elf_Internal_Rela *free_relocs = NULL;
1339 Elf_Internal_Rela *irel, *irelend;
1340 bfd_byte *contents = NULL;
1341 bfd_byte *free_contents = NULL;
1342 Elf32_External_Sym *extsyms = NULL;
1343 Elf32_External_Sym *free_extsyms = NULL;
1344
1345 /* Assume nothing changes. */
1346 *again = false;
1347
1348 /* We don't have to do anything for a relocateable link, if
1349 this section does not have relocs, or if this is not a
1350 code section. */
1351 if (link_info->relocateable
1352 || (sec->flags & SEC_RELOC) == 0
1353 || sec->reloc_count == 0
1354 || (sec->flags & SEC_CODE) == 0
1355 || 0 /* FIXME: check SHF_M32R_CAN_RELAX */)
1356 return true;
1357
1358 /* If this is the first time we have been called for this section,
1359 initialize the cooked size. */
1360 if (sec->_cooked_size == 0)
1361 sec->_cooked_size = sec->_raw_size;
1362
1363 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1364
1365 /* Get a copy of the native relocations. */
1366 internal_relocs = (_bfd_elf32_link_read_relocs
1367 (abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL,
1368 link_info->keep_memory));
1369 if (internal_relocs == NULL)
1370 goto error_return;
1371 if (! link_info->keep_memory)
1372 free_relocs = internal_relocs;
1373
1374 /* Walk through them looking for relaxing opportunities. */
1375 irelend = internal_relocs + sec->reloc_count;
1376 for (irel = internal_relocs; irel < irelend; irel++)
1377 {
1378 bfd_vma symval;
1379
1380 /* If this isn't something that can be relaxed, then ignore
1381 this reloc. */
1382 if (ELF32_R_TYPE (irel->r_info) != (int) R_M32R_HI16_SLO)
1383 continue;
1384
1385 /* Get the section contents if we haven't done so already. */
1386 if (contents == NULL)
1387 {
1388 /* Get cached copy if it exists. */
1389 if (elf_section_data (sec)->this_hdr.contents != NULL)
1390 contents = elf_section_data (sec)->this_hdr.contents;
1391 else
1392 {
1393 /* Go get them off disk. */
1394 contents = (bfd_byte *) bfd_malloc (sec->_raw_size);
1395 if (contents == NULL)
1396 goto error_return;
1397 free_contents = contents;
1398
1399 if (! bfd_get_section_contents (abfd, sec, contents,
1400 (file_ptr) 0, sec->_raw_size))
1401 goto error_return;
1402 }
1403 }
1404
1405 /* Read this BFD's symbols if we haven't done so already. */
1406 if (extsyms == NULL)
1407 {
1408 /* Get cached copy if it exists. */
1409 if (symtab_hdr->contents != NULL)
1410 extsyms = (Elf32_External_Sym *) symtab_hdr->contents;
1411 else
1412 {
dc810e39 1413 bfd_size_type amt = symtab_hdr->sh_size;
252b5132 1414 /* Go get them off disk. */
dc810e39 1415 extsyms = (Elf32_External_Sym *) bfd_malloc (amt);
252b5132
RH
1416 if (extsyms == NULL)
1417 goto error_return;
1418 free_extsyms = extsyms;
1419 if (bfd_seek (abfd, symtab_hdr->sh_offset, SEEK_SET) != 0
dc810e39 1420 || bfd_bread (extsyms, amt, abfd) != amt)
252b5132
RH
1421 goto error_return;
1422 }
1423 }
1424
1425 /* Get the value of the symbol referred to by the reloc. */
1426 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
1427 {
1428 Elf_Internal_Sym isym;
1429 asection *sym_sec;
1430
1431 /* A local symbol. */
1432 bfd_elf32_swap_symbol_in (abfd,
1433 extsyms + ELF32_R_SYM (irel->r_info),
1434 &isym);
1435
1436 sym_sec = bfd_section_from_elf_index (abfd, isym.st_shndx);
1437 symval = (isym.st_value
1438 + sym_sec->output_section->vma
1439 + sym_sec->output_offset);
1440 }
1441 else
1442 {
1443 unsigned long indx;
1444 struct elf_link_hash_entry *h;
1445
1446 /* An external symbol. */
1447 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
1448 h = elf_sym_hashes (abfd)[indx];
1449 BFD_ASSERT (h != NULL);
1450 if (h->root.type != bfd_link_hash_defined
1451 && h->root.type != bfd_link_hash_defweak)
1452 {
1453 /* This appears to be a reference to an undefined
1454 symbol. Just ignore it--it will be caught by the
1455 regular reloc processing. */
1456 continue;
1457 }
1458
1459 symval = (h->root.u.def.value
1460 + h->root.u.def.section->output_section->vma
1461 + h->root.u.def.section->output_offset);
1462 }
1463
1464 /* For simplicity of coding, we are going to modify the section
1465 contents, the section relocs, and the BFD symbol table. We
1466 must tell the rest of the code not to free up this
1467 information. It would be possible to instead create a table
1468 of changes which have to be made, as is done in coff-mips.c;
1469 that would be more work, but would require less memory when
1470 the linker is run. */
1471
1472 /* Try to change a seth/add3/jl subroutine call to bl24 or bl8.
1473 This sequence is generated by the compiler when compiling in
1474 32 bit mode. Also look for seth/add3 -> ld24. */
1475
1476 if (ELF32_R_TYPE (irel->r_info) == (int) R_M32R_HI16_SLO)
1477 {
1478 Elf_Internal_Rela *nrel;
1479 bfd_vma pc = (sec->output_section->vma + sec->output_offset
1480 + irel->r_offset);
1481 bfd_signed_vma pcrel_value = symval - pc;
1482 unsigned int code,reg;
1483 int addend,nop_p,bl8_p,to_delete;
1484
1485 /* The tests are ordered so that we get out as quickly as possible
1486 if this isn't something we can relax, taking into account that
1487 we are looking for two separate possibilities (jl/ld24). */
1488
1489 /* Do nothing if no room in the section for this to be what we're
1490 looking for. */
1491 if (irel->r_offset > sec->_cooked_size - 8)
1492 continue;
1493
1494 /* Make sure the next relocation applies to the next
1495 instruction and that it's the add3's reloc. */
1496 nrel = irel + 1;
1497 if (nrel == irelend
1498 || irel->r_offset + 4 != nrel->r_offset
1499 || ELF32_R_TYPE (nrel->r_info) != (int) R_M32R_LO16)
1500 continue;
1501
1502 /* See if the instructions are seth/add3. */
1503 /* FIXME: This is where macros from cgen can come in. */
1504 code = bfd_get_16 (abfd, contents + irel->r_offset + 0);
1505 if ((code & 0xf0ff) != 0xd0c0)
1506 continue; /* not seth rN,foo */
1507 reg = (code & 0x0f00) >> 8;
1508 code = bfd_get_16 (abfd, contents + irel->r_offset + 4);
1509 if (code != (0x80a0 | reg | (reg << 8)))
1510 continue; /* not add3 rN,rN,foo */
1511
1512 /* At this point we've confirmed we have seth/add3. Now check
1513 whether the next insn is a jl, in which case try to change this
1514 to bl24 or bl8. */
1515
1516 /* Ensure the branch target is in range.
1517 The bl24 instruction has a 24 bit operand which is the target
1518 address right shifted by 2, giving a signed range of 26 bits.
1519 Note that 4 bytes are added to the high value because the target
1520 will be at least 4 bytes closer if we can relax. It'll actually
1521 be 4 or 8 bytes closer, but we don't know which just yet and
1522 the difference isn't significant enough to worry about. */
1523#ifndef USE_REL /* put in for learning purposes */
1524 pcrel_value += irel->r_addend;
1525#else
1526 addend = bfd_get_signed_16 (abfd, contents + irel->r_offset + 2);
1527 pcrel_value += addend;
1528#endif
1529
1530 if (pcrel_value >= -(1 << 25) && pcrel_value < (1 << 25) + 4
1531 /* Do nothing if no room in the section for this to be what we're
1532 looking for. */
1533 && (irel->r_offset <= sec->_cooked_size - 12)
1534 /* Ensure the next insn is "jl rN". */
1535 && ((code = bfd_get_16 (abfd, contents + irel->r_offset + 8)),
1536 code != (0x1ec0 | reg)))
1537 {
1538 /* We can relax to bl24/bl8. */
1539
1540 /* See if there's a nop following the jl.
1541 Also see if we can use a bl8 insn. */
1542 code = bfd_get_16 (abfd, contents + irel->r_offset + 10);
1543 nop_p = (code & 0x7fff) == NOP_INSN;
1544 bl8_p = pcrel_value >= -0x200 && pcrel_value < 0x200;
1545
1546 if (bl8_p)
1547 {
1548 /* Change "seth rN,foo" to "bl8 foo || nop".
1549 We OR in CODE just in case it's not a nop (technically,
1550 CODE currently must be a nop, but for cleanness we
1551 allow it to be anything). */
1552#ifndef USE_REL /* put in for learning purposes */
1553 code = 0x7e000000 | MAKE_PARALLEL (code);
1554#else
1555 code = (0x7e000000 + (((addend >> 2) & 0xff) << 16)) | MAKE_PARALLEL (code);
1556#endif
1557 to_delete = 8;
1558 }
1559 else
1560 {
1561 /* Change the seth rN,foo to a bl24 foo. */
1562#ifndef USE_REL /* put in for learning purposes */
1563 code = 0xfe000000;
1564#else
1565 code = 0xfe000000 + ((addend >> 2) & 0xffffff);
1566#endif
1567 to_delete = nop_p ? 8 : 4;
1568 }
1569
1570 bfd_put_32 (abfd, code, contents + irel->r_offset);
1571
1572 /* Set the new reloc type. */
1573 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info),
1574 bl8_p ? R_M32R_10_PCREL : R_M32R_26_PCREL);
1575
1576 /* Delete the add3 reloc by making it a null reloc. */
1577 nrel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info),
1578 R_M32R_NONE);
1579 }
1580 else if (addend >= 0
1581 && symval + addend <= 0xffffff)
1582 {
1583 /* We can relax to ld24. */
1584
1585 code = 0xe0000000 | (reg << 24) | (addend & 0xffffff);
1586 bfd_put_32 (abfd, code, contents + irel->r_offset);
1587 to_delete = 4;
1588 /* Tell the following code a nop filler isn't needed. */
1589 nop_p = 1;
1590 }
1591 else
1592 {
1593 /* Can't do anything here. */
1594 continue;
1595 }
1596
1597 /* Note that we've changed the relocs, section contents, etc. */
1598 elf_section_data (sec)->relocs = internal_relocs;
1599 free_relocs = NULL;
1600
1601 elf_section_data (sec)->this_hdr.contents = contents;
1602 free_contents = NULL;
1603
1604 symtab_hdr->contents = (bfd_byte *) extsyms;
1605 free_extsyms = NULL;
1606
1607 /* Delete TO_DELETE bytes of data. */
1608 if (!m32r_elf_relax_delete_bytes (abfd, sec,
1609 irel->r_offset + 4, to_delete))
1610 goto error_return;
1611
1612 /* Now that the following bytes have been moved into place, see if
1613 we need to replace the jl with a nop. This happens when we had
1614 to use a bl24 insn and the insn following the jl isn't a nop.
1615 Technically, this situation can't happen (since the insn can
1616 never be executed) but to be clean we do this. When the chip
1617 supports parallel 16 bit insns things may change.
1618 We don't need to do this in the case of relaxing to ld24,
1619 and the above code sets nop_p so this isn't done. */
1620 if (! nop_p && to_delete == 4)
1621 bfd_put_16 (abfd, NOP_INSN, contents + irel->r_offset + 4);
1622
1623 /* That will change things, so we should relax again.
1624 Note that this is not required, and it may be slow. */
1625 *again = true;
1626
1627 continue;
1628 }
1629
1630 /* loop to try the next reloc */
1631 }
1632
1633 if (free_relocs != NULL)
1634 {
1635 free (free_relocs);
1636 free_relocs = NULL;
1637 }
1638
1639 if (free_contents != NULL)
1640 {
1641 if (! link_info->keep_memory)
1642 free (free_contents);
1643 else
1644 {
1645 /* Cache the section contents for elf_link_input_bfd. */
1646 elf_section_data (sec)->this_hdr.contents = contents;
1647 }
1648 free_contents = NULL;
1649 }
1650
1651 if (free_extsyms != NULL)
1652 {
1653 if (! link_info->keep_memory)
1654 free (free_extsyms);
1655 else
1656 {
1657 /* Cache the symbols for elf_link_input_bfd. */
1658 symtab_hdr->contents = extsyms;
1659 }
1660 free_extsyms = NULL;
1661 }
1662
1663 return true;
1664
1665 error_return:
1666 if (free_relocs != NULL)
1667 free (free_relocs);
1668 if (free_contents != NULL)
1669 free (free_contents);
1670 if (free_extsyms != NULL)
1671 free (free_extsyms);
1672 return false;
1673}
1674
1675/* Delete some bytes from a section while relaxing. */
1676
1677static boolean
1678m32r_elf_relax_delete_bytes (abfd, sec, addr, count)
1679 bfd *abfd;
1680 asection *sec;
1681 bfd_vma addr;
1682 int count;
1683{
1684 Elf_Internal_Shdr *symtab_hdr;
1685 Elf32_External_Sym *extsyms;
1686 int shndx, index;
1687 bfd_byte *contents;
1688 Elf_Internal_Rela *irel, *irelend;
1689 Elf_Internal_Rela *irelalign;
1690 bfd_vma toaddr;
1691 Elf32_External_Sym *esym, *esymend;
1692 struct elf_link_hash_entry *sym_hash;
1693
1694 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1695 extsyms = (Elf32_External_Sym *) symtab_hdr->contents;
1696
1697 shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1698
1699 contents = elf_section_data (sec)->this_hdr.contents;
1700
1701 /* The deletion must stop at the next ALIGN reloc for an aligment
1702 power larger than the number of bytes we are deleting. */
1703
1704 irelalign = NULL;
1705 toaddr = sec->_cooked_size;
1706
1707 irel = elf_section_data (sec)->relocs;
1708 irelend = irel + sec->reloc_count;
1709
1710 /* Actually delete the bytes. */
1711 memmove (contents + addr, contents + addr + count, toaddr - addr - count);
1712 sec->_cooked_size -= count;
1713
1714 /* Adjust all the relocs. */
1715 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1716 {
1717 /* Get the new reloc address. */
1718 if ((irel->r_offset > addr
1719 && irel->r_offset < toaddr))
1720 irel->r_offset -= count;
1721 }
1722
1723 /* Adjust the local symbols defined in this section. */
1724 esym = extsyms;
1725 esymend = esym + symtab_hdr->sh_info;
1726 for (; esym < esymend; esym++)
1727 {
1728 Elf_Internal_Sym isym;
1729
1730 bfd_elf32_swap_symbol_in (abfd, esym, &isym);
1731
1732 if (isym.st_shndx == shndx
1733 && isym.st_value > addr
1734 && isym.st_value < toaddr)
1735 {
1736 isym.st_value -= count;
1737 bfd_elf32_swap_symbol_out (abfd, &isym, esym);
1738 }
1739 }
1740
1741 /* Now adjust the global symbols defined in this section. */
1742 esym = extsyms + symtab_hdr->sh_info;
1743 esymend = extsyms + (symtab_hdr->sh_size / sizeof (Elf32_External_Sym));
1744 for (index = 0; esym < esymend; esym++, index++)
1745 {
1746 Elf_Internal_Sym isym;
1747
1748 bfd_elf32_swap_symbol_in (abfd, esym, &isym);
1749 sym_hash = elf_sym_hashes (abfd)[index];
1750 if (isym.st_shndx == shndx
1751 && ((sym_hash)->root.type == bfd_link_hash_defined
1752 || (sym_hash)->root.type == bfd_link_hash_defweak)
1753 && (sym_hash)->root.u.def.section == sec
1754 && (sym_hash)->root.u.def.value > addr
1755 && (sym_hash)->root.u.def.value < toaddr)
1756 {
1757 (sym_hash)->root.u.def.value -= count;
1758 }
1759 }
1760
1761 return true;
1762}
1763
1764/* This is a version of bfd_generic_get_relocated_section_contents
1765 which uses m32r_elf_relocate_section. */
1766
1767static bfd_byte *
1768m32r_elf_get_relocated_section_contents (output_bfd, link_info, link_order,
1769 data, relocateable, symbols)
1770 bfd *output_bfd;
1771 struct bfd_link_info *link_info;
1772 struct bfd_link_order *link_order;
1773 bfd_byte *data;
1774 boolean relocateable;
1775 asymbol **symbols;
1776{
1777 Elf_Internal_Shdr *symtab_hdr;
1778 asection *input_section = link_order->u.indirect.section;
1779 bfd *input_bfd = input_section->owner;
1780 asection **sections = NULL;
1781 Elf_Internal_Rela *internal_relocs = NULL;
1782 Elf32_External_Sym *external_syms = NULL;
1783 Elf_Internal_Sym *internal_syms = NULL;
dc810e39 1784 bfd_size_type amt;
252b5132
RH
1785
1786 /* We only need to handle the case of relaxing, or of having a
1787 particular set of section contents, specially. */
1788 if (relocateable
1789 || elf_section_data (input_section)->this_hdr.contents == NULL)
1790 return bfd_generic_get_relocated_section_contents (output_bfd, link_info,
1791 link_order, data,
1792 relocateable,
1793 symbols);
1794
1795 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
1796
1797 memcpy (data, elf_section_data (input_section)->this_hdr.contents,
1798 input_section->_raw_size);
1799
1800 if ((input_section->flags & SEC_RELOC) != 0
1801 && input_section->reloc_count > 0)
1802 {
1803 Elf_Internal_Sym *isymp;
1804 asection **secpp;
1805 Elf32_External_Sym *esym, *esymend;
1806
1807 if (symtab_hdr->contents != NULL)
1808 external_syms = (Elf32_External_Sym *) symtab_hdr->contents;
1809 else
1810 {
dc810e39
AM
1811 amt = symtab_hdr->sh_info;
1812 amt *= sizeof (Elf32_External_Sym);
1813 external_syms = (Elf32_External_Sym *) bfd_malloc (amt);
252b5132
RH
1814 if (external_syms == NULL && symtab_hdr->sh_info > 0)
1815 goto error_return;
1816 if (bfd_seek (input_bfd, symtab_hdr->sh_offset, SEEK_SET) != 0
dc810e39 1817 || bfd_bread (external_syms, amt, input_bfd) != amt)
252b5132
RH
1818 goto error_return;
1819 }
1820
1821 internal_relocs = (_bfd_elf32_link_read_relocs
1822 (input_bfd, input_section, (PTR) NULL,
1823 (Elf_Internal_Rela *) NULL, false));
1824 if (internal_relocs == NULL)
1825 goto error_return;
1826
dc810e39
AM
1827 amt = symtab_hdr->sh_info;
1828 amt *= sizeof (Elf_Internal_Sym);
1829 internal_syms = (Elf_Internal_Sym *) bfd_malloc (amt);
252b5132
RH
1830 if (internal_syms == NULL && symtab_hdr->sh_info > 0)
1831 goto error_return;
1832
dc810e39
AM
1833 amt = symtab_hdr->sh_info;
1834 amt *= sizeof (asection *);
1835 sections = (asection **) bfd_malloc (amt);
252b5132
RH
1836 if (sections == NULL && symtab_hdr->sh_info > 0)
1837 goto error_return;
1838
1839 isymp = internal_syms;
1840 secpp = sections;
1841 esym = external_syms;
1842 esymend = esym + symtab_hdr->sh_info;
1843 for (; esym < esymend; ++esym, ++isymp, ++secpp)
1844 {
1845 asection *isec;
1846
1847 bfd_elf32_swap_symbol_in (input_bfd, esym, isymp);
1848
1849 if (isymp->st_shndx == SHN_UNDEF)
1850 isec = bfd_und_section_ptr;
1851 else if (isymp->st_shndx > 0 && isymp->st_shndx < SHN_LORESERVE)
1852 isec = bfd_section_from_elf_index (input_bfd, isymp->st_shndx);
1853 else if (isymp->st_shndx == SHN_ABS)
1854 isec = bfd_abs_section_ptr;
1855 else if (isymp->st_shndx == SHN_COMMON)
1856 isec = bfd_com_section_ptr;
1857 else if (isymp->st_shndx == SHN_M32R_SCOMMON)
1858 isec = &m32r_elf_scom_section;
1859 else
1860 {
1861 /* Who knows? */
1862 isec = NULL;
1863 }
1864
1865 *secpp = isec;
1866 }
1867
1868 if (! m32r_elf_relocate_section (output_bfd, link_info, input_bfd,
1869 input_section, data, internal_relocs,
1870 internal_syms, sections))
1871 goto error_return;
1872
1873 if (sections != NULL)
1874 free (sections);
1875 sections = NULL;
1876 if (internal_syms != NULL)
1877 free (internal_syms);
1878 internal_syms = NULL;
1879 if (external_syms != NULL && symtab_hdr->contents == NULL)
1880 free (external_syms);
1881 external_syms = NULL;
1882 if (internal_relocs != elf_section_data (input_section)->relocs)
1883 free (internal_relocs);
1884 internal_relocs = NULL;
1885 }
1886
1887 return data;
1888
1889 error_return:
1890 if (internal_relocs != NULL
1891 && internal_relocs != elf_section_data (input_section)->relocs)
1892 free (internal_relocs);
1893 if (external_syms != NULL && symtab_hdr->contents == NULL)
1894 free (external_syms);
1895 if (internal_syms != NULL)
1896 free (internal_syms);
1897 if (sections != NULL)
1898 free (sections);
1899 return NULL;
1900}
1901
1902#endif /* #if 0 */
1903\f
1904/* Set the right machine number. */
1905static boolean
1906m32r_elf_object_p (abfd)
1907 bfd *abfd;
1908{
1909 switch (elf_elfheader (abfd)->e_flags & EF_M32R_ARCH)
1910 {
1911 default:
1912 case E_M32R_ARCH: (void) bfd_default_set_arch_mach (abfd, bfd_arch_m32r, bfd_mach_m32r); break;
e916b64e 1913 case E_M32RX_ARCH: (void) bfd_default_set_arch_mach (abfd, bfd_arch_m32r, bfd_mach_m32rx); break;
252b5132
RH
1914 }
1915 return true;
1916}
1917
1918/* Store the machine number in the flags field. */
1919static void
1920m32r_elf_final_write_processing (abfd, linker)
1921 bfd * abfd;
5f771d47 1922 boolean linker ATTRIBUTE_UNUSED;
252b5132
RH
1923{
1924 unsigned long val;
1925
1926 switch (bfd_get_mach (abfd))
1927 {
1928 default:
1929 case bfd_mach_m32r: val = E_M32R_ARCH; break;
e916b64e 1930 case bfd_mach_m32rx: val = E_M32RX_ARCH; break;
252b5132
RH
1931 }
1932
1933 elf_elfheader (abfd)->e_flags &=~ EF_M32R_ARCH;
1934 elf_elfheader (abfd)->e_flags |= val;
1935}
1936
c3668558 1937/* Function to keep M32R specific file flags. */
252b5132
RH
1938static boolean
1939m32r_elf_set_private_flags (abfd, flags)
1940 bfd * abfd;
1941 flagword flags;
1942{
1943 BFD_ASSERT (!elf_flags_init (abfd)
1944 || elf_elfheader (abfd)->e_flags == flags);
1945
1946 elf_elfheader (abfd)->e_flags = flags;
1947 elf_flags_init (abfd) = true;
1948 return true;
1949}
1950
1951/* Copy backend specific data from one object module to another */
1952static boolean
1953m32r_elf_copy_private_bfd_data (ibfd, obfd)
1954 bfd * ibfd;
1955 bfd * obfd;
1956{
1957 if ( bfd_get_flavour (ibfd) != bfd_target_elf_flavour
1958 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
1959 return true;
1960
1961 BFD_ASSERT (!elf_flags_init (obfd)
1962 || (elf_elfheader (obfd)->e_flags
1963 == elf_elfheader (ibfd)->e_flags));
1964
1965 elf_gp (obfd) = elf_gp (ibfd);
1966 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
1967 elf_flags_init (obfd) = true;
1968 return true;
1969}
1970
1971/* Merge backend specific data from an object file to the output
1972 object file when linking. */
1973static boolean
1974m32r_elf_merge_private_bfd_data (ibfd, obfd)
1975 bfd * ibfd;
1976 bfd * obfd;
1977{
1978 flagword out_flags;
1979 flagword in_flags;
1980
1981 if ( bfd_get_flavour (ibfd) != bfd_target_elf_flavour
1982 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
1983 return true;
1984
1985 in_flags = elf_elfheader (ibfd)->e_flags;
1986 out_flags = elf_elfheader (obfd)->e_flags;
1987
1988 if (! elf_flags_init (obfd))
1989 {
1990 /* If the input is the default architecture then do not
1991 bother setting the flags for the output architecture,
1992 instead allow future merges to do this. If no future
1993 merges ever set these flags then they will retain their
1994 unitialised values, which surprise surprise, correspond
1995 to the default values. */
1996 if (bfd_get_arch_info (ibfd)->the_default)
1997 return true;
c3668558 1998
252b5132
RH
1999 elf_flags_init (obfd) = true;
2000 elf_elfheader (obfd)->e_flags = in_flags;
2001
2002 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
2003 && bfd_get_arch_info (obfd)->the_default)
2004 {
2005 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
2006 }
2007
2008 return true;
2009 }
2010
2011 /* Check flag compatibility. */
2012 if (in_flags == out_flags)
2013 return true;
2014
2015 if ((in_flags & EF_M32R_ARCH) != (out_flags & EF_M32R_ARCH))
2016 {
2017 if ((in_flags & EF_M32R_ARCH) != E_M32R_ARCH)
2018 {
2019 _bfd_error_handler (_("%s: Instruction set mismatch with previous modules"),
2020 bfd_get_filename (ibfd));
2021
2022 bfd_set_error (bfd_error_bad_value);
2023 return false;
2024 }
2025 }
2026
2027 return true;
2028}
2029
2030/* Display the flags field */
2031static boolean
2032m32r_elf_print_private_bfd_data (abfd, ptr)
2033 bfd * abfd;
2034 PTR ptr;
2035{
2036 FILE * file = (FILE *) ptr;
c3668558 2037
252b5132 2038 BFD_ASSERT (abfd != NULL && ptr != NULL)
c3668558 2039
252b5132 2040 _bfd_elf_print_private_bfd_data (abfd, ptr);
c3668558 2041
252b5132 2042 fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
c3668558 2043
252b5132
RH
2044 switch (elf_elfheader (abfd)->e_flags & EF_M32R_ARCH)
2045 {
2046 default:
2047 case E_M32R_ARCH: fprintf (file, _(": m32r instructions")); break;
e916b64e 2048 case E_M32RX_ARCH: fprintf (file, _(": m32rx instructions")); break;
252b5132 2049 }
c3668558 2050
252b5132 2051 fputc ('\n', file);
c3668558 2052
252b5132
RH
2053 return true;
2054}
2055
2056asection *
2057m32r_elf_gc_mark_hook (abfd, info, rel, h, sym)
2058 bfd *abfd;
5f771d47 2059 struct bfd_link_info *info ATTRIBUTE_UNUSED;
252b5132
RH
2060 Elf_Internal_Rela *rel;
2061 struct elf_link_hash_entry *h;
2062 Elf_Internal_Sym *sym;
2063{
2064 if (h != NULL)
2065 {
2066 switch (ELF32_R_TYPE (rel->r_info))
2067 {
2068 case R_M32R_GNU_VTINHERIT:
2069 case R_M32R_GNU_VTENTRY:
2070 break;
c3668558 2071
252b5132
RH
2072 default:
2073 switch (h->root.type)
2074 {
2075 case bfd_link_hash_defined:
2076 case bfd_link_hash_defweak:
2077 return h->root.u.def.section;
c3668558 2078
252b5132
RH
2079 case bfd_link_hash_common:
2080 return h->root.u.c.p->section;
e049a0de
ILT
2081
2082 default:
2083 break;
252b5132
RH
2084 }
2085 }
2086 }
2087 else
2088 {
2089 if (!(elf_bad_symtab (abfd)
2090 && ELF_ST_BIND (sym->st_info) != STB_LOCAL)
2091 && ! ((sym->st_shndx <= 0 || sym->st_shndx >= SHN_LORESERVE)
2092 && sym->st_shndx != SHN_COMMON))
2093 {
2094 return bfd_section_from_elf_index (abfd, sym->st_shndx);
2095 }
2096 }
2097 return NULL;
2098}
2099
2100static boolean
2101m32r_elf_gc_sweep_hook (abfd, info, sec, relocs)
5f771d47
ILT
2102 bfd *abfd ATTRIBUTE_UNUSED;
2103 struct bfd_link_info *info ATTRIBUTE_UNUSED;
2104 asection *sec ATTRIBUTE_UNUSED;
2105 const Elf_Internal_Rela *relocs ATTRIBUTE_UNUSED;
252b5132
RH
2106{
2107 /* we don't use got and plt entries for m32r */
2108 return true;
2109}
2110
252b5132
RH
2111/* Look through the relocs for a section during the first phase.
2112 Since we don't do .gots or .plts, we just need to consider the
2113 virtual table relocs for gc. */
c3668558 2114
252b5132
RH
2115static boolean
2116m32r_elf_check_relocs (abfd, info, sec, relocs)
2117 bfd *abfd;
2118 struct bfd_link_info *info;
2119 asection *sec;
2120 const Elf_Internal_Rela *relocs;
2121{
2122 Elf_Internal_Shdr *symtab_hdr;
2123 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
2124 const Elf_Internal_Rela *rel;
2125 const Elf_Internal_Rela *rel_end;
c3668558 2126
252b5132
RH
2127 if (info->relocateable)
2128 return true;
c3668558 2129
252b5132
RH
2130 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
2131 sym_hashes = elf_sym_hashes (abfd);
c3668558 2132 sym_hashes_end = sym_hashes + symtab_hdr->sh_size/sizeof (Elf32_External_Sym);
252b5132
RH
2133 if (!elf_bad_symtab (abfd))
2134 sym_hashes_end -= symtab_hdr->sh_info;
c3668558 2135
252b5132
RH
2136 rel_end = relocs + sec->reloc_count;
2137 for (rel = relocs; rel < rel_end; rel++)
2138 {
2139 struct elf_link_hash_entry *h;
2140 unsigned long r_symndx;
c3668558 2141
252b5132
RH
2142 r_symndx = ELF32_R_SYM (rel->r_info);
2143 if (r_symndx < symtab_hdr->sh_info)
2144 h = NULL;
2145 else
2146 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
c3668558 2147
252b5132
RH
2148 switch (ELF32_R_TYPE (rel->r_info))
2149 {
2150 /* This relocation describes the C++ object vtable hierarchy.
2151 Reconstruct it for later use during GC. */
2152 case R_M32R_GNU_VTINHERIT:
2153 if (!_bfd_elf32_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
2154 return false;
2155 break;
c3668558 2156
252b5132
RH
2157 /* This relocation describes which C++ vtable entries are actually
2158 used. Record for later use during GC. */
2159 case R_M32R_GNU_VTENTRY:
2160 if (!_bfd_elf32_gc_record_vtentry (abfd, sec, h, rel->r_offset))
2161 return false;
2162 break;
2163 }
2164 }
c3668558 2165
252b5132
RH
2166 return true;
2167}
252b5132 2168\f
252b5132 2169#define ELF_ARCH bfd_arch_m32r
aa4f99bb
AO
2170#define ELF_MACHINE_CODE EM_M32R
2171#define ELF_MACHINE_ALT1 EM_CYGNUS_M32R
e916b64e 2172#define ELF_MAXPAGESIZE 0x1 /* Explicitly requested by Mitsubishi. */
252b5132
RH
2173
2174#define TARGET_BIG_SYM bfd_elf32_m32r_vec
2175#define TARGET_BIG_NAME "elf32-m32r"
2176
2177#define elf_info_to_howto 0
2178#define elf_info_to_howto_rel m32r_info_to_howto_rel
2179#define elf_backend_section_from_bfd_section _bfd_m32r_elf_section_from_bfd_section
2180#define elf_backend_symbol_processing _bfd_m32r_elf_symbol_processing
2181#define elf_backend_add_symbol_hook m32r_elf_add_symbol_hook
2182#define elf_backend_relocate_section m32r_elf_relocate_section
2183#define elf_backend_gc_mark_hook m32r_elf_gc_mark_hook
2184#define elf_backend_gc_sweep_hook m32r_elf_gc_sweep_hook
2185#define elf_backend_check_relocs m32r_elf_check_relocs
2186
2187#define elf_backend_can_gc_sections 1
2188#if 0 /* not yet */
2189/* relax support */
2190#define bfd_elf32_bfd_relax_section m32r_elf_relax_section
2191#define bfd_elf32_bfd_get_relocated_section_contents \
2192 m32r_elf_get_relocated_section_contents
2193#endif
2194
2195#define elf_backend_object_p m32r_elf_object_p
2196#define elf_backend_final_write_processing m32r_elf_final_write_processing
2197#define bfd_elf32_bfd_copy_private_bfd_data m32r_elf_copy_private_bfd_data
2198#define bfd_elf32_bfd_merge_private_bfd_data m32r_elf_merge_private_bfd_data
2199#define bfd_elf32_bfd_set_private_flags m32r_elf_set_private_flags
2200#define bfd_elf32_bfd_print_private_bfd_data m32r_elf_print_private_bfd_data
c3668558 2201
252b5132 2202#include "elf32-target.h"