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fix set but unused variable warnings
[thirdparty/binutils-gdb.git] / bfd / elf32-msp430.c
CommitLineData
2469cfa2 1/* MSP430-specific support for 32-bit ELF
c7e2358a 2 Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007, 2010
07adf181 3 Free Software Foundation, Inc.
2469cfa2
NC		 4 Contributed by Dmitry Diky <diwil@mail.ru>
5
6 This file is part of BFD, the Binary File Descriptor library.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
cd123cb7 10 the Free Software Foundation; either version 3 of the License, or
2469cfa2
NC		 11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
cd123cb7
NC		 20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
2469cfa2 22
2469cfa2 23#include "sysdep.h"
3db64b00 24#include "bfd.h"
2469cfa2
NC		 25#include "libiberty.h"
26#include "libbfd.h"
27#include "elf-bfd.h"
28#include "elf/msp430.h"
29
2469cfa2
NC		 30/* Use RELA instead of REL. */
31#undef USE_REL
32
33static reloc_howto_type elf_msp430_howto_table[] =
34{
35 HOWTO (R_MSP430_NONE, /* type */
36 0, /* rightshift */
37 2, /* size (0 = byte, 1 = short, 2 = long) */
38 32, /* bitsize */
39 FALSE, /* pc_relative */
40 0, /* bitpos */
b18c562e 41 complain_overflow_bitfield,/* complain_on_overflow */
2469cfa2
NC		 42 bfd_elf_generic_reloc, /* special_function */
43 "R_MSP430_NONE", /* name */
44 FALSE, /* partial_inplace */
45 0, /* src_mask */
46 0, /* dst_mask */
47 FALSE), /* pcrel_offset */
48
49 HOWTO (R_MSP430_32, /* type */
50 0, /* rightshift */
51 2, /* size (0 = byte, 1 = short, 2 = long) */
52 32, /* bitsize */
53 FALSE, /* pc_relative */
54 0, /* bitpos */
b18c562e 55 complain_overflow_bitfield,/* complain_on_overflow */
2469cfa2
NC		 56 bfd_elf_generic_reloc, /* special_function */
57 "R_MSP430_32", /* name */
58 FALSE, /* partial_inplace */
59 0xffffffff, /* src_mask */
60 0xffffffff, /* dst_mask */
61 FALSE), /* pcrel_offset */
62
63 /* A 13 bit PC relative relocation. */
64 HOWTO (R_MSP430_10_PCREL, /* type */
65 1, /* rightshift */
66 1, /* size (0 = byte, 1 = short, 2 = long) */
67 10, /* bitsize */
68 TRUE, /* pc_relative */
69 0, /* bitpos */
b18c562e 70 complain_overflow_bitfield,/* complain_on_overflow */
2469cfa2
NC		 71 bfd_elf_generic_reloc, /* special_function */
72 "R_MSP430_13_PCREL", /* name */
73 FALSE, /* partial_inplace */
74 0xfff, /* src_mask */
75 0xfff, /* dst_mask */
76 TRUE), /* pcrel_offset */
77
78 /* A 16 bit absolute relocation. */
79 HOWTO (R_MSP430_16, /* type */
80 0, /* rightshift */
81 1, /* size (0 = byte, 1 = short, 2 = long) */
82 16, /* bitsize */
83 FALSE, /* pc_relative */
84 0, /* bitpos */
85 complain_overflow_dont,/* complain_on_overflow */
86 bfd_elf_generic_reloc, /* special_function */
87 "R_MSP430_16", /* name */
88 FALSE, /* partial_inplace */
b18c562e 89 0, /* src_mask */
2469cfa2
NC		 90 0xffff, /* dst_mask */
91 FALSE), /* pcrel_offset */
92
93 /* A 16 bit absolute relocation for command address. */
94 HOWTO (R_MSP430_16_PCREL, /* type */
95 1, /* rightshift */
96 1, /* size (0 = byte, 1 = short, 2 = long) */
97 16, /* bitsize */
98 TRUE, /* pc_relative */
99 0, /* bitpos */
100 complain_overflow_dont,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_MSP430_16_PCREL", /* name */
103 FALSE, /* partial_inplace */
b18c562e 104 0, /* src_mask */
2469cfa2
NC		 105 0xffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
107
108 /* A 16 bit absolute relocation, byte operations. */
109 HOWTO (R_MSP430_16_BYTE, /* type */
110 0, /* rightshift */
111 1, /* size (0 = byte, 1 = short, 2 = long) */
112 16, /* bitsize */
113 FALSE, /* pc_relative */
114 0, /* bitpos */
115 complain_overflow_dont,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_MSP430_16_BYTE", /* name */
118 FALSE, /* partial_inplace */
119 0xffff, /* src_mask */
120 0xffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
122
123 /* A 16 bit absolute relocation for command address. */
124 HOWTO (R_MSP430_16_PCREL_BYTE,/* type */
125 1, /* rightshift */
126 1, /* size (0 = byte, 1 = short, 2 = long) */
127 16, /* bitsize */
128 TRUE, /* pc_relative */
129 0, /* bitpos */
130 complain_overflow_dont,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
b18c562e 132 "R_MSP430_16_PCREL_BYTE",/* name */
2469cfa2
NC		 133 FALSE, /* partial_inplace */
134 0xffff, /* src_mask */
135 0xffff, /* dst_mask */
b18c562e
NC		 136 TRUE), /* pcrel_offset */
137
138 /* A 13 bit PC relative relocation for complicated polymorphs. */
139 HOWTO (R_MSP430_2X_PCREL, /* type */
140 1, /* rightshift */
141 2, /* size (0 = byte, 1 = short, 2 = long) */
142 10, /* bitsize */
143 TRUE, /* pc_relative */
144 0, /* bitpos */
145 complain_overflow_bitfield,/* complain_on_overflow */
146 bfd_elf_generic_reloc, /* special_function */
147 "R_MSP430_2X_PCREL", /* name */
148 FALSE, /* partial_inplace */
149 0xfff, /* src_mask */
150 0xfff, /* dst_mask */
151 TRUE), /* pcrel_offset */
152
153 /* A 16 bit relaxable relocation for command address. */
154 HOWTO (R_MSP430_RL_PCREL, /* type */
155 1, /* rightshift */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
157 16, /* bitsize */
158 TRUE, /* pc_relative */
159 0, /* bitpos */
160 complain_overflow_dont,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_MSP430_RL_PCREL", /* name */
163 FALSE, /* partial_inplace */
164 0, /* src_mask */
165 0xffff, /* dst_mask */
2469cfa2
NC		 166 TRUE) /* pcrel_offset */
167};
168
169/* Map BFD reloc types to MSP430 ELF reloc types. */
170
171struct msp430_reloc_map
172{
173 bfd_reloc_code_real_type bfd_reloc_val;
174 unsigned int elf_reloc_val;
175};
176
177static const struct msp430_reloc_map msp430_reloc_map[] =
178 {
b18c562e
NC		 179 {BFD_RELOC_NONE, R_MSP430_NONE},
180 {BFD_RELOC_32, R_MSP430_32},
181 {BFD_RELOC_MSP430_10_PCREL, R_MSP430_10_PCREL},
182 {BFD_RELOC_16, R_MSP430_16_BYTE},
183 {BFD_RELOC_MSP430_16_PCREL, R_MSP430_16_PCREL},
184 {BFD_RELOC_MSP430_16, R_MSP430_16},
2469cfa2 185 {BFD_RELOC_MSP430_16_PCREL_BYTE, R_MSP430_16_PCREL_BYTE},
b18c562e
NC		 186 {BFD_RELOC_MSP430_16_BYTE, R_MSP430_16_BYTE},
187 {BFD_RELOC_MSP430_2X_PCREL, R_MSP430_2X_PCREL},
188 {BFD_RELOC_MSP430_RL_PCREL, R_MSP430_RL_PCREL}
2469cfa2
NC		 189 };
190
191static reloc_howto_type *
b18c562e
NC		 192bfd_elf32_bfd_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
193 bfd_reloc_code_real_type code)
2469cfa2
NC		 194{
195 unsigned int i;
196
197 for (i = 0; i < ARRAY_SIZE (msp430_reloc_map); i++)
198 if (msp430_reloc_map[i].bfd_reloc_val == code)
199 return &elf_msp430_howto_table[msp430_reloc_map[i].elf_reloc_val];
200
201 return NULL;
202}
203
157090f7
AM		 204static reloc_howto_type *
205bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
206 const char *r_name)
207{
208 unsigned int i;
209
210 for (i = 0;
211 i < (sizeof (elf_msp430_howto_table)
212 / sizeof (elf_msp430_howto_table[0]));
213 i++)
214 if (elf_msp430_howto_table[i].name != NULL
215 && strcasecmp (elf_msp430_howto_table[i].name, r_name) == 0)
216 return &elf_msp430_howto_table[i];
217
218 return NULL;
219}
220
2469cfa2
NC		 221/* Set the howto pointer for an MSP430 ELF reloc. */
222
223static void
b18c562e
NC		 224msp430_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
225 arelent * cache_ptr,
226 Elf_Internal_Rela * dst)
2469cfa2
NC		 227{
228 unsigned int r_type;
229
230 r_type = ELF32_R_TYPE (dst->r_info);
231 BFD_ASSERT (r_type < (unsigned int) R_MSP430_max);
232 cache_ptr->howto = &elf_msp430_howto_table[r_type];
233}
234
2469cfa2
NC		 235/* Look through the relocs for a section during the first phase.
236 Since we don't do .gots or .plts, we just need to consider the
237 virtual table relocs for gc. */
238
239static bfd_boolean
b18c562e
NC		 240elf32_msp430_check_relocs (bfd * abfd, struct bfd_link_info * info,
241 asection * sec, const Elf_Internal_Rela * relocs)
2469cfa2
NC		 242{
243 Elf_Internal_Shdr *symtab_hdr;
5582a088 244 struct elf_link_hash_entry **sym_hashes;
2469cfa2
NC		 245 const Elf_Internal_Rela *rel;
246 const Elf_Internal_Rela *rel_end;
247
1049f94e 248 if (info->relocatable)
2469cfa2
NC		 249 return TRUE;
250
251 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
252 sym_hashes = elf_sym_hashes (abfd);
2469cfa2
NC		 253
254 rel_end = relocs + sec->reloc_count;
255 for (rel = relocs; rel < rel_end; rel++)
256 {
257 struct elf_link_hash_entry *h;
258 unsigned long r_symndx;
259
260 r_symndx = ELF32_R_SYM (rel->r_info);
261 if (r_symndx < symtab_hdr->sh_info)
262 h = NULL;
263 else
973a3492
L		 264 {
265 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
266 while (h->root.type == bfd_link_hash_indirect
267 || h->root.type == bfd_link_hash_warning)
268 h = (struct elf_link_hash_entry *) h->root.u.i.link;
269 }
2469cfa2
NC		 270 }
271
272 return TRUE;
273}
274
275/* Perform a single relocation. By default we use the standard BFD
276 routines, but a few relocs, we have to do them ourselves. */
277
278static bfd_reloc_status_type
b18c562e
NC		 279msp430_final_link_relocate (reloc_howto_type * howto, bfd * input_bfd,
280 asection * input_section, bfd_byte * contents,
281 Elf_Internal_Rela * rel, bfd_vma relocation)
2469cfa2
NC		 282{
283 bfd_reloc_status_type r = bfd_reloc_ok;
284 bfd_vma x;
285 bfd_signed_vma srel;
286
287 switch (howto->type)
288 {
289 case R_MSP430_10_PCREL:
290 contents += rel->r_offset;
291 srel = (bfd_signed_vma) relocation;
292 srel += rel->r_addend;
293 srel -= rel->r_offset;
294 srel -= 2; /* Branch instructions add 2 to the PC... */
295 srel -= (input_section->output_section->vma +
296 input_section->output_offset);
297
298 if (srel & 1)
299 return bfd_reloc_outofrange;
300
301 /* MSP430 addresses commands as words. */
302 srel >>= 1;
303
304 /* Check for an overflow. */
305 if (srel < -512 || srel > 511)
306 return bfd_reloc_overflow;
307
308 x = bfd_get_16 (input_bfd, contents);
309 x = (x & 0xfc00) | (srel & 0x3ff);
310 bfd_put_16 (input_bfd, x, contents);
311 break;
312
b18c562e
NC		 313 case R_MSP430_2X_PCREL:
314 contents += rel->r_offset;
315 srel = (bfd_signed_vma) relocation;
316 srel += rel->r_addend;
317 srel -= rel->r_offset;
318 srel -= 2; /* Branch instructions add 2 to the PC... */
319 srel -= (input_section->output_section->vma +
320 input_section->output_offset);
321
322 if (srel & 1)
323 return bfd_reloc_outofrange;
324
325 /* MSP430 addresses commands as words. */
326 srel >>= 1;
327
328 /* Check for an overflow. */
329 if (srel < -512 || srel > 511)
330 return bfd_reloc_overflow;
331
332 x = bfd_get_16 (input_bfd, contents);
333 x = (x & 0xfc00) | (srel & 0x3ff);
334 bfd_put_16 (input_bfd, x, contents);
335 /* Handle second jump instruction. */
336 x = bfd_get_16 (input_bfd, contents - 2);
337 srel += 1;
338 x = (x & 0xfc00) | (srel & 0x3ff);
339 bfd_put_16 (input_bfd, x, contents - 2);
340 break;
341
2469cfa2 342 case R_MSP430_16_PCREL:
b18c562e 343 case R_MSP430_RL_PCREL:
2469cfa2
NC		 344 contents += rel->r_offset;
345 srel = (bfd_signed_vma) relocation;
346 srel += rel->r_addend;
347 srel -= rel->r_offset;
348 /* Only branch instructions add 2 to the PC... */
349 srel -= (input_section->output_section->vma +
350 input_section->output_offset);
351
352 if (srel & 1)
353 return bfd_reloc_outofrange;
354
355 bfd_put_16 (input_bfd, srel & 0xffff, contents);
356 break;
357
358 case R_MSP430_16_PCREL_BYTE:
359 contents += rel->r_offset;
360 srel = (bfd_signed_vma) relocation;
361 srel += rel->r_addend;
362 srel -= rel->r_offset;
363 /* Only branch instructions add 2 to the PC... */
364 srel -= (input_section->output_section->vma +
365 input_section->output_offset);
366
367 bfd_put_16 (input_bfd, srel & 0xffff, contents);
368 break;
369
370 case R_MSP430_16_BYTE:
371 contents += rel->r_offset;
372 srel = (bfd_signed_vma) relocation;
373 srel += rel->r_addend;
374 bfd_put_16 (input_bfd, srel & 0xffff, contents);
375 break;
376
377 case R_MSP430_16:
378 contents += rel->r_offset;
379 srel = (bfd_signed_vma) relocation;
380 srel += rel->r_addend;
381
382 if (srel & 1)
383 return bfd_reloc_notsupported;
384
385 bfd_put_16 (input_bfd, srel & 0xffff, contents);
386 break;
387
388 default:
389 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
390 contents, rel->r_offset,
391 relocation, rel->r_addend);
392 }
393
394 return r;
395}
396
397/* Relocate an MSP430 ELF section. */
398
399static bfd_boolean
b18c562e
NC		 400elf32_msp430_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED,
401 struct bfd_link_info * info,
402 bfd * input_bfd,
403 asection * input_section,
404 bfd_byte * contents,
405 Elf_Internal_Rela * relocs,
406 Elf_Internal_Sym * local_syms,
407 asection ** local_sections)
2469cfa2
NC		 408{
409 Elf_Internal_Shdr *symtab_hdr;
410 struct elf_link_hash_entry **sym_hashes;
411 Elf_Internal_Rela *rel;
412 Elf_Internal_Rela *relend;
413
414 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
415 sym_hashes = elf_sym_hashes (input_bfd);
416 relend = relocs + input_section->reloc_count;
417
418 for (rel = relocs; rel < relend; rel++)
419 {
420 reloc_howto_type *howto;
421 unsigned long r_symndx;
422 Elf_Internal_Sym *sym;
423 asection *sec;
424 struct elf_link_hash_entry *h;
425 bfd_vma relocation;
426 bfd_reloc_status_type r;
427 const char *name = NULL;
428 int r_type;
429
2469cfa2
NC		 430 r_type = ELF32_R_TYPE (rel->r_info);
431 r_symndx = ELF32_R_SYM (rel->r_info);
c7e2358a 432 howto = elf_msp430_howto_table + r_type;
2469cfa2
NC		 433 h = NULL;
434 sym = NULL;
435 sec = NULL;
436
437 if (r_symndx < symtab_hdr->sh_info)
438 {
439 sym = local_syms + r_symndx;
440 sec = local_sections[r_symndx];
8517fae7 441 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
2469cfa2
NC		 442
443 name = bfd_elf_string_from_elf_section
444 (input_bfd, symtab_hdr->sh_link, sym->st_name);
445 name = (name == NULL) ? bfd_section_name (input_bfd, sec) : name;
446 }
447 else
448 {
59c2e50f 449 bfd_boolean unresolved_reloc, warned;
2469cfa2 450
b2a8e766
AM		 451 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
452 r_symndx, symtab_hdr, sym_hashes,
453 h, sec, relocation,
454 unresolved_reloc, warned);
2469cfa2
NC		 455 }
456
ab96bf03
AM		 457 if (sec != NULL && elf_discarded_section (sec))
458 {
459 /* For relocs against symbols from removed linkonce sections,
460 or sections discarded by a linker script, we just want the
461 section contents zeroed. Avoid any special processing. */
462 _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
463 rel->r_info = 0;
464 rel->r_addend = 0;
465 continue;
466 }
467
468 if (info->relocatable)
469 continue;
470
2469cfa2
NC		 471 r = msp430_final_link_relocate (howto, input_bfd, input_section,
472 contents, rel, relocation);
473
474 if (r != bfd_reloc_ok)
475 {
476 const char *msg = (const char *) NULL;
477
478 switch (r)
479 {
480 case bfd_reloc_overflow:
481 r = info->callbacks->reloc_overflow
dfeffb9f
L		 482 (info, (h ? &h->root : NULL), name, howto->name,
483 (bfd_vma) 0, input_bfd, input_section,
484 rel->r_offset);
2469cfa2
NC		 485 break;
486
487 case bfd_reloc_undefined:
488 r = info->callbacks->undefined_symbol
489 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
490 break;
491
492 case bfd_reloc_outofrange:
493 msg = _("internal error: out of range error");
494 break;
495
496 case bfd_reloc_notsupported:
497 msg = _("internal error: unsupported relocation error");
498 break;
499
500 case bfd_reloc_dangerous:
501 msg = _("internal error: dangerous relocation");
502 break;
503
504 default:
505 msg = _("internal error: unknown error");
506 break;
507 }
508
509 if (msg)
510 r = info->callbacks->warning
511 (info, msg, name, input_bfd, input_section, rel->r_offset);
512
513 if (!r)
514 return FALSE;
515 }
516
517 }
518
519 return TRUE;
520}
521
522/* The final processing done just before writing out a MSP430 ELF object
523 file. This gets the MSP430 architecture right based on the machine
524 number. */
525
526static void
b18c562e
NC		 527bfd_elf_msp430_final_write_processing (bfd * abfd,
528 bfd_boolean linker ATTRIBUTE_UNUSED)
2469cfa2
NC		 529{
530 unsigned long val;
531
532 switch (bfd_get_mach (abfd))
533 {
534 default:
2469cfa2
NC		 535 case bfd_mach_msp110:
536 val = E_MSP430_MACH_MSP430x11x1;
537 break;
538
539 case bfd_mach_msp11:
540 val = E_MSP430_MACH_MSP430x11;
541 break;
542
3b260895
NC		 543 case bfd_mach_msp12:
544 val = E_MSP430_MACH_MSP430x12;
545 break;
546
2469cfa2
NC		 547 case bfd_mach_msp13:
548 val = E_MSP430_MACH_MSP430x13;
549 break;
550
551 case bfd_mach_msp14:
552 val = E_MSP430_MACH_MSP430x14;
553 break;
554
3b260895
NC		 555 case bfd_mach_msp15:
556 val = E_MSP430_MACH_MSP430x15;
2469cfa2
NC		 557 break;
558
3b260895
NC		 559 case bfd_mach_msp16:
560 val = E_MSP430_MACH_MSP430x16;
2469cfa2
NC		 561 break;
562
563 case bfd_mach_msp31:
564 val = E_MSP430_MACH_MSP430x31;
565 break;
566
567 case bfd_mach_msp32:
568 val = E_MSP430_MACH_MSP430x32;
569 break;
570
571 case bfd_mach_msp33:
572 val = E_MSP430_MACH_MSP430x33;
573 break;
574
3b260895
NC		 575 case bfd_mach_msp41:
576 val = E_MSP430_MACH_MSP430x41;
2469cfa2
NC		 577 break;
578
3b260895
NC		 579 case bfd_mach_msp42:
580 val = E_MSP430_MACH_MSP430x42;
581 break;
582
583 case bfd_mach_msp43:
584 val = E_MSP430_MACH_MSP430x43;
585 break;
586
587 case bfd_mach_msp44:
588 val = E_MSP430_MACH_MSP430x44;
2469cfa2
NC		 589 break;
590 }
591
592 elf_elfheader (abfd)->e_machine = EM_MSP430;
593 elf_elfheader (abfd)->e_flags &= ~EF_MSP430_MACH;
594 elf_elfheader (abfd)->e_flags |= val;
595}
596
597/* Set the right machine number. */
598
599static bfd_boolean
b18c562e 600elf32_msp430_object_p (bfd * abfd)
2469cfa2
NC		 601{
602 int e_set = bfd_mach_msp14;
603
604 if (elf_elfheader (abfd)->e_machine == EM_MSP430
605 || elf_elfheader (abfd)->e_machine == EM_MSP430_OLD)
606 {
607 int e_mach = elf_elfheader (abfd)->e_flags & EF_MSP430_MACH;
608
609 switch (e_mach)
610 {
611 default:
2469cfa2
NC		 612 case E_MSP430_MACH_MSP430x11:
613 e_set = bfd_mach_msp11;
614 break;
615
616 case E_MSP430_MACH_MSP430x11x1:
617 e_set = bfd_mach_msp110;
618 break;
619
3b260895
NC		 620 case E_MSP430_MACH_MSP430x12:
621 e_set = bfd_mach_msp12;
622 break;
623
2469cfa2
NC		 624 case E_MSP430_MACH_MSP430x13:
625 e_set = bfd_mach_msp13;
626 break;
627
628 case E_MSP430_MACH_MSP430x14:
629 e_set = bfd_mach_msp14;
630 break;
631
3b260895
NC		 632 case E_MSP430_MACH_MSP430x15:
633 e_set = bfd_mach_msp15;
634 break;
635
636 case E_MSP430_MACH_MSP430x16:
637 e_set = bfd_mach_msp16;
2469cfa2
NC		 638 break;
639
640 case E_MSP430_MACH_MSP430x31:
641 e_set = bfd_mach_msp31;
642 break;
643
644 case E_MSP430_MACH_MSP430x32:
645 e_set = bfd_mach_msp32;
646 break;
647
648 case E_MSP430_MACH_MSP430x33:
649 e_set = bfd_mach_msp33;
650 break;
651
3b260895
NC		 652 case E_MSP430_MACH_MSP430x41:
653 e_set = bfd_mach_msp41;
2469cfa2
NC		 654 break;
655
3b260895
NC		 656 case E_MSP430_MACH_MSP430x42:
657 e_set = bfd_mach_msp42;
2469cfa2
NC		 658 break;
659
3b260895
NC		 660 case E_MSP430_MACH_MSP430x43:
661 e_set = bfd_mach_msp43;
2469cfa2
NC		 662 break;
663
3b260895
NC		 664 case E_MSP430_MACH_MSP430x44:
665 e_set = bfd_mach_msp44;
2469cfa2
NC		 666 break;
667 }
668 }
669
670 return bfd_default_set_arch_mach (abfd, bfd_arch_msp430, e_set);
671}
672
b18c562e
NC		 673/* These functions handle relaxing for the msp430.
674 Relaxation required only in two cases:
675 - Bad hand coding like jumps from one section to another or
676 from file to file.
677 - Sibling calls. This will affect onlu 'jump label' polymorph. Without
678 relaxing this enlarges code by 2 bytes. Sibcalls implemented but
679 do not work in gcc's port by the reason I do not know.
680 Anyway, if a relaxation required, user should pass -relax option to the
681 linker.
682
683 There are quite a few relaxing opportunities available on the msp430:
684
685 ================================================================
686
687 1. 3 words -> 1 word
688
689 eq == jeq label jne +4; br lab
690 ne != jne label jeq +4; br lab
691 lt < jl label jge +4; br lab
692 ltu < jlo label lhs +4; br lab
693 ge >= jge label jl +4; br lab
694 geu >= jhs label jlo +4; br lab
695
696 2. 4 words -> 1 word
697
698 ltn < jn jn +2; jmp +4; br lab
699
700 3. 4 words -> 2 words
701
702 gt > jeq +2; jge label jeq +6; jl +4; br label
703 gtu > jeq +2; jhs label jeq +6; jlo +4; br label
704
705 4. 4 words -> 2 words and 2 labels
706
707 leu <= jeq label; jlo label jeq +2; jhs +4; br label
708 le <= jeq label; jl label jeq +2; jge +4; br label
709 =================================================================
710
711 codemap for first cases is (labels masked ):
712 eq: 0x2002,0x4010,0x0000 -> 0x2400
713 ne: 0x2402,0x4010,0x0000 -> 0x2000
714 lt: 0x3402,0x4010,0x0000 -> 0x3800
715 ltu: 0x2c02,0x4010,0x0000 -> 0x2800
716 ge: 0x3802,0x4010,0x0000 -> 0x3400
717 geu: 0x2802,0x4010,0x0000 -> 0x2c00
718
719 second case:
720 ltn: 0x3001,0x3c02,0x4010,0x0000 -> 0x3000
721
722 third case:
723 gt: 0x2403,0x3802,0x4010,0x0000 -> 0x2401,0x3400
724 gtu: 0x2403,0x2802,0x4010,0x0000 -> 0x2401,0x2c00
725
726 fourth case:
727 leu: 0x2401,0x2c02,0x4010,0x0000 -> 0x2400,0x2800
728 le: 0x2401,0x3402,0x4010,0x0000 -> 0x2400,0x3800
729
730 Unspecified case :)
731 jump: 0x4010,0x0000 -> 0x3c00. */
732
733#define NUMB_RELAX_CODES 12
734static struct rcodes_s
735{
736 int f0, f1; /* From code. */
737 int t0, t1; /* To code. */
738 int labels; /* Position of labels: 1 - one label at first
739 word, 2 - one at second word, 3 - two
740 labels at both. */
741 int cdx; /* Words to match. */
742 int bs; /* Shrink bytes. */
743 int off; /* Offset from old label for new code. */
744 int ncl; /* New code length. */
745} rcode[] =
746{/* lab,cdx,bs,off,ncl */
747 { 0x0000, 0x0000, 0x3c00, 0x0000, 1, 0, 2, 2, 2}, /* jump */
748 { 0x0000, 0x2002, 0x2400, 0x0000, 1, 1, 4, 4, 2}, /* eq */
749 { 0x0000, 0x2402, 0x2000, 0x0000, 1, 1, 4, 4, 2}, /* ne */
750 { 0x0000, 0x3402, 0x3800, 0x0000, 1, 1, 4, 4, 2}, /* lt */
751 { 0x0000, 0x2c02, 0x2800, 0x0000, 1, 1, 4, 4, 2}, /* ltu */
752 { 0x0000, 0x3802, 0x3400, 0x0000, 1, 1, 4, 4, 2}, /* ge */
753 { 0x0000, 0x2802, 0x2c00, 0x0000, 1, 1, 4, 4, 2}, /* geu */
754 { 0x3001, 0x3c02, 0x3000, 0x0000, 1, 2, 6, 6, 2}, /* ltn */
755 { 0x2403, 0x3802, 0x2401, 0x3400, 2, 2, 4, 6, 4}, /* gt */
756 { 0x2403, 0x2802, 0x2401, 0x2c00, 2, 2, 4, 6, 4}, /* gtu */
757 { 0x2401, 0x2c02, 0x2400, 0x2800, 3, 2, 4, 6, 4}, /* leu , 2 labels */
758 { 0x2401, 0x2c02, 0x2400, 0x2800, 3, 2, 4, 6, 4}, /* le , 2 labels */
759 { 0, 0, 0, 0, 0, 0, 0, 0, 0}
760};
761
762/* Return TRUE if a symbol exists at the given address. */
763
764static bfd_boolean
765msp430_elf_symbol_address_p (bfd * abfd,
766 asection * sec,
767 Elf_Internal_Sym * isym,
768 bfd_vma addr)
769{
770 Elf_Internal_Shdr *symtab_hdr;
771 unsigned int sec_shndx;
772 Elf_Internal_Sym *isymend;
773 struct elf_link_hash_entry **sym_hashes;
774 struct elf_link_hash_entry **end_hashes;
775 unsigned int symcount;
776
777 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
778
779 /* Examine all the local symbols. */
780 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
781 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
782 if (isym->st_shndx == sec_shndx && isym->st_value == addr)
783 return TRUE;
784
785 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
786 - symtab_hdr->sh_info);
787 sym_hashes = elf_sym_hashes (abfd);
788 end_hashes = sym_hashes + symcount;
789 for (; sym_hashes < end_hashes; sym_hashes++)
790 {
791 struct elf_link_hash_entry *sym_hash = *sym_hashes;
792
793 if ((sym_hash->root.type == bfd_link_hash_defined
794 || sym_hash->root.type == bfd_link_hash_defweak)
795 && sym_hash->root.u.def.section == sec
796 && sym_hash->root.u.def.value == addr)
797 return TRUE;
798 }
799
800 return FALSE;
801}
802
046aeb74
DD		 803/* Adjust all local symbols defined as '.section + 0xXXXX' (.section has sec_shndx)
804 referenced from current and other sections */
805static bfd_boolean
806msp430_elf_relax_adjust_locals(bfd * abfd, asection * sec, bfd_vma addr,
807 int count, unsigned int sec_shndx, bfd_vma toaddr)
808{
809 Elf_Internal_Shdr *symtab_hdr;
810 Elf_Internal_Rela *irel;
811 Elf_Internal_Rela *irelend;
812 Elf_Internal_Sym *isym;
813
814 irel = elf_section_data (sec)->relocs;
815 irelend = irel + sec->reloc_count;
816 symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
817 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
818
819 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
820 {
821 int sidx = ELF32_R_SYM(irel->r_info);
822 Elf_Internal_Sym *lsym = isym + sidx;
823
824 /* Adjust symbols referenced by .sec+0xXX */
825 if (irel->r_addend > addr && irel->r_addend < toaddr
826 && lsym->st_shndx == sec_shndx)
827 irel->r_addend -= count;
828 }
829
830 return TRUE;
831}
832
b18c562e
NC		 833/* Delete some bytes from a section while relaxing. */
834
835static bfd_boolean
836msp430_elf_relax_delete_bytes (bfd * abfd, asection * sec, bfd_vma addr,
837 int count)
838{
839 Elf_Internal_Shdr *symtab_hdr;
840 unsigned int sec_shndx;
841 bfd_byte *contents;
842 Elf_Internal_Rela *irel;
843 Elf_Internal_Rela *irelend;
b18c562e
NC		 844 bfd_vma toaddr;
845 Elf_Internal_Sym *isym;
846 Elf_Internal_Sym *isymend;
847 struct elf_link_hash_entry **sym_hashes;
848 struct elf_link_hash_entry **end_hashes;
849 unsigned int symcount;
046aeb74 850 asection *p;
b18c562e
NC		 851
852 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
853
854 contents = elf_section_data (sec)->this_hdr.contents;
855
b18c562e
NC		 856 toaddr = sec->size;
857
858 irel = elf_section_data (sec)->relocs;
859 irelend = irel + sec->reloc_count;
860
861 /* Actually delete the bytes. */
862 memmove (contents + addr, contents + addr + count,
863 (size_t) (toaddr - addr - count));
864 sec->size -= count;
865
866 /* Adjust all the relocs. */
fa9ee72b
DD		 867 symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
868 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
b18c562e 869 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
fa9ee72b 870 {
fa9ee72b
DD		 871 /* Get the new reloc address. */
872 if ((irel->r_offset > addr && irel->r_offset < toaddr))
873 irel->r_offset -= count;
fa9ee72b 874 }
b18c562e 875
046aeb74
DD		 876 for (p = abfd->sections; p != NULL; p = p->next)
877 msp430_elf_relax_adjust_locals(abfd,p,addr,count,sec_shndx,toaddr);
878
b18c562e
NC		 879 /* Adjust the local symbols defined in this section. */
880 symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
881 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
882 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
883 if (isym->st_shndx == sec_shndx
884 && isym->st_value > addr && isym->st_value < toaddr)
885 isym->st_value -= count;
886
887 /* Now adjust the global symbols defined in this section. */
888 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
889 - symtab_hdr->sh_info);
890 sym_hashes = elf_sym_hashes (abfd);
891 end_hashes = sym_hashes + symcount;
892 for (; sym_hashes < end_hashes; sym_hashes++)
893 {
894 struct elf_link_hash_entry *sym_hash = *sym_hashes;
895
896 if ((sym_hash->root.type == bfd_link_hash_defined
897 || sym_hash->root.type == bfd_link_hash_defweak)
898 && sym_hash->root.u.def.section == sec
899 && sym_hash->root.u.def.value > addr
900 && sym_hash->root.u.def.value < toaddr)
901 sym_hash->root.u.def.value -= count;
902 }
903
904 return TRUE;
905}
906
907
908static bfd_boolean
909msp430_elf_relax_section (bfd * abfd, asection * sec,
910 struct bfd_link_info * link_info,
911 bfd_boolean * again)
912{
913 Elf_Internal_Shdr * symtab_hdr;
914 Elf_Internal_Rela * internal_relocs;
915 Elf_Internal_Rela * irel;
916 Elf_Internal_Rela * irelend;
917 bfd_byte * contents = NULL;
918 Elf_Internal_Sym * isymbuf = NULL;
919
920 /* Assume nothing changes. */
921 *again = FALSE;
922
923 /* We don't have to do anything for a relocatable link, if
924 this section does not have relocs, or if this is not a
925 code section. */
926 if (link_info->relocatable
927 || (sec->flags & SEC_RELOC) == 0
928 || sec->reloc_count == 0 || (sec->flags & SEC_CODE) == 0)
929 return TRUE;
930
931 symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
932
933 /* Get a copy of the native relocations. */
934 internal_relocs =
935 _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, link_info->keep_memory);
936 if (internal_relocs == NULL)
937 goto error_return;
938
939 /* Walk through them looking for relaxing opportunities. */
940 irelend = internal_relocs + sec->reloc_count;
941 for (irel = internal_relocs; irel < irelend; irel++)
942 {
943 bfd_vma symval;
944
945 /* If this isn't something that can be relaxed, then ignore
946 this reloc. */
947 if (ELF32_R_TYPE (irel->r_info) != (int) R_MSP430_RL_PCREL)
948 continue;
949
950 /* Get the section contents if we haven't done so already. */
951 if (contents == NULL)
952 {
953 /* Get cached copy if it exists. */
954 if (elf_section_data (sec)->this_hdr.contents != NULL)
955 contents = elf_section_data (sec)->this_hdr.contents;
956 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
957 goto error_return;
958 }
959
960 /* Read this BFD's local symbols if we haven't done so already. */
961 if (isymbuf == NULL && symtab_hdr->sh_info != 0)
962 {
963 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
964 if (isymbuf == NULL)
965 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
966 symtab_hdr->sh_info, 0,
967 NULL, NULL, NULL);
968 if (isymbuf == NULL)
969 goto error_return;
970 }
971
972 /* Get the value of the symbol referred to by the reloc. */
973 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
974 {
975 /* A local symbol. */
976 Elf_Internal_Sym *isym;
977 asection *sym_sec;
978
979 isym = isymbuf + ELF32_R_SYM (irel->r_info);
980 if (isym->st_shndx == SHN_UNDEF)
981 sym_sec = bfd_und_section_ptr;
982 else if (isym->st_shndx == SHN_ABS)
983 sym_sec = bfd_abs_section_ptr;
984 else if (isym->st_shndx == SHN_COMMON)
985 sym_sec = bfd_com_section_ptr;
986 else
987 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
988 symval = (isym->st_value
989 + sym_sec->output_section->vma + sym_sec->output_offset);
990 }
991 else
992 {
993 unsigned long indx;
994 struct elf_link_hash_entry *h;
995
996 /* An external symbol. */
997 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
998 h = elf_sym_hashes (abfd)[indx];
999 BFD_ASSERT (h != NULL);
1000
1001 if (h->root.type != bfd_link_hash_defined
1002 && h->root.type != bfd_link_hash_defweak)
1003 /* This appears to be a reference to an undefined
1004 symbol. Just ignore it--it will be caught by the
1005 regular reloc processing. */
1006 continue;
1007
1008 symval = (h->root.u.def.value
1009 + h->root.u.def.section->output_section->vma
1010 + h->root.u.def.section->output_offset);
1011 }
1012
1013 /* For simplicity of coding, we are going to modify the section
1014 contents, the section relocs, and the BFD symbol table. We
1015 must tell the rest of the code not to free up this
1016 information. It would be possible to instead create a table
1017 of changes which have to be made, as is done in coff-mips.c;
1018 that would be more work, but would require less memory when
1019 the linker is run. */
1020
1021 /* Try to turn a 16bit pc-relative branch into a 10bit pc-relative
1022 branch. */
1023 /* Paranoia? paranoia... */
1024 if (ELF32_R_TYPE (irel->r_info) == (int) R_MSP430_RL_PCREL)
1025 {
1026 bfd_vma value = symval;
1027
1028 /* Deal with pc-relative gunk. */
1029 value -= (sec->output_section->vma + sec->output_offset);
1030 value -= irel->r_offset;
1031 value += irel->r_addend;
1032
1033 /* See if the value will fit in 10 bits, note the high value is
1034 1016 as the target will be two bytes closer if we are
1035 able to relax. */
1036 if ((long) value < 1016 && (long) value > -1016)
1037 {
1038 int code0 = 0, code1 = 0, code2 = 0;
1039 int i;
1040 struct rcodes_s *rx;
1041
1042 /* Get the opcode. */
1043 if (irel->r_offset >= 6)
1044 code0 = bfd_get_16 (abfd, contents + irel->r_offset - 6);
1045
1046 if (irel->r_offset >= 4)
1047 code1 = bfd_get_16 (abfd, contents + irel->r_offset - 4);
1048
1049 code2 = bfd_get_16 (abfd, contents + irel->r_offset - 2);
1050
1051 if (code2 != 0x4010)
1052 continue;
1053
1054 /* Check r4 and r3. */
1055 for (i = NUMB_RELAX_CODES - 1; i >= 0; i--)
1056 {
1057 rx = &rcode[i];
1058 if (rx->cdx == 2 && rx->f0 == code0 && rx->f1 == code1)
1059 break;
1060 else if (rx->cdx == 1 && rx->f1 == code1)
1061 break;
1062 else if (rx->cdx == 0) /* This is an unconditional jump. */
1063 break;
1064 }
1065
1066 /* Check labels:
1067 .Label0: ; we do not care about this label
1068 jeq +6
1069 .Label1: ; make sure there is no label here
1070 jl +4
1071 .Label2: ; make sure there is no label here
1072 br .Label_dst
1073
1074 So, if there is .Label1 or .Label2 we cannot relax this code.
1075 This actually should not happen, cause for relaxable
1076 instructions we use RL_PCREL reloc instead of 16_PCREL.
1077 Will change this in the future. */
1078
1079 if (rx->cdx > 0
1080 && msp430_elf_symbol_address_p (abfd, sec, isymbuf,
1081 irel->r_offset - 2))
1082 continue;
1083 if (rx->cdx > 1
1084 && msp430_elf_symbol_address_p (abfd, sec, isymbuf,
1085 irel->r_offset - 4))
1086 continue;
1087
1088 /* Note that we've changed the relocs, section contents, etc. */
1089 elf_section_data (sec)->relocs = internal_relocs;
1090 elf_section_data (sec)->this_hdr.contents = contents;
1091 symtab_hdr->contents = (unsigned char *) isymbuf;
1092
1093 /* Fix the relocation's type. */
1094 if (rx->labels == 3) /* Handle special cases. */
1095 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1096 R_MSP430_2X_PCREL);
1097 else
1098 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1099 R_MSP430_10_PCREL);
1100
1101 /* Fix the opcode right way. */
1102 bfd_put_16 (abfd, rx->t0, contents + irel->r_offset - rx->off);
1103 if (rx->t1)
1104 bfd_put_16 (abfd, rx->t1,
1105 contents + irel->r_offset - rx->off + 2);
1106
1107 /* Delete bytes. */
1108 if (!msp430_elf_relax_delete_bytes (abfd, sec,
1109 irel->r_offset - rx->off +
1110 rx->ncl, rx->bs))
1111 goto error_return;
1112
1113 /* Handle unconditional jumps. */
1114 if (rx->cdx == 0)
1115 irel->r_offset -= 2;
1116
1117 /* That will change things, so, we should relax again.
1118 Note that this is not required, and it may be slow. */
1119 *again = TRUE;
1120 }
1121 }
1122 }
1123
1124 if (isymbuf != NULL && symtab_hdr->contents != (unsigned char *) isymbuf)
1125 {
1126 if (!link_info->keep_memory)
1127 free (isymbuf);
1128 else
1129 {
1130 /* Cache the symbols for elf_link_input_bfd. */
1131 symtab_hdr->contents = (unsigned char *) isymbuf;
1132 }
1133 }
1134
1135 if (contents != NULL
1136 && elf_section_data (sec)->this_hdr.contents != contents)
1137 {
1138 if (!link_info->keep_memory)
1139 free (contents);
1140 else
1141 {
1142 /* Cache the section contents for elf_link_input_bfd. */
1143 elf_section_data (sec)->this_hdr.contents = contents;
1144 }
1145 }
1146
1147 if (internal_relocs != NULL
1148 && elf_section_data (sec)->relocs != internal_relocs)
1149 free (internal_relocs);
1150
1151 return TRUE;
1152
1153error_return:
1154 if (isymbuf != NULL && symtab_hdr->contents != (unsigned char *) isymbuf)
1155 free (isymbuf);
1156 if (contents != NULL
1157 && elf_section_data (sec)->this_hdr.contents != contents)
1158 free (contents);
1159 if (internal_relocs != NULL
1160 && elf_section_data (sec)->relocs != internal_relocs)
1161 free (internal_relocs);
1162
1163 return FALSE;
1164}
1165
2469cfa2
NC		 1166
1167#define ELF_ARCH bfd_arch_msp430
1168#define ELF_MACHINE_CODE EM_MSP430
1169#define ELF_MACHINE_ALT1 EM_MSP430_OLD
1170#define ELF_MAXPAGESIZE 1
d1036acb 1171#define ELF_OSABI ELFOSABI_STANDALONE
2469cfa2
NC		 1172
1173#define TARGET_LITTLE_SYM bfd_elf32_msp430_vec
1174#define TARGET_LITTLE_NAME "elf32-msp430"
1175
1176#define elf_info_to_howto msp430_info_to_howto_rela
1177#define elf_info_to_howto_rel NULL
1178#define elf_backend_relocate_section elf32_msp430_relocate_section
2469cfa2
NC		 1179#define elf_backend_check_relocs elf32_msp430_check_relocs
1180#define elf_backend_can_gc_sections 1
1181#define elf_backend_final_write_processing bfd_elf_msp430_final_write_processing
1182#define elf_backend_object_p elf32_msp430_object_p
d1036acb 1183#define elf_backend_post_process_headers _bfd_elf_set_osabi
b18c562e 1184#define bfd_elf32_bfd_relax_section msp430_elf_relax_section
2469cfa2
NC		 1185
1186#include "elf32-target.h"
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