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Fix gdb.tui/completion.exp test
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35c08157 1/* NDS32-specific support for 32-bit ELF.
2571583a 2 Copyright (C) 2012-2017 Free Software Foundation, Inc.
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3 Contributed by Andes Technology Corporation.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
1c8f6a4d 20 02110-1301, USA. */
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21
22
23#include "sysdep.h"
24#include "bfd.h"
25#include "bfd_stdint.h"
26#include "bfdlink.h"
27#include "libbfd.h"
28#include "elf-bfd.h"
29#include "libiberty.h"
30#include "bfd_stdint.h"
31#include "elf/nds32.h"
32#include "opcode/nds32.h"
33#include "elf32-nds32.h"
34#include "opcode/cgen.h"
35#include "../opcodes/nds32-opc.h"
36
37/* Relocation HOWTO functions. */
38static bfd_reloc_status_type nds32_elf_ignore_reloc
39 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
40static bfd_reloc_status_type nds32_elf_9_pcrel_reloc
41 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
42static bfd_reloc_status_type nds32_elf_hi20_reloc
43 (bfd *, arelent *, asymbol *, void *,
44 asection *, bfd *, char **);
45static bfd_reloc_status_type nds32_elf_lo12_reloc
46 (bfd *, arelent *, asymbol *, void *,
47 asection *, bfd *, char **);
48static bfd_reloc_status_type nds32_elf_generic_reloc
49 (bfd *, arelent *, asymbol *, void *,
50 asection *, bfd *, char **);
51static bfd_reloc_status_type nds32_elf_sda15_reloc
52 (bfd *, arelent *, asymbol *, void *,
53 asection *, bfd *, char **);
54
55/* Helper functions for HOWTO. */
56static bfd_reloc_status_type nds32_elf_do_9_pcrel_reloc
57 (bfd *, reloc_howto_type *, asection *, bfd_byte *, bfd_vma,
58 asection *, bfd_vma, bfd_vma);
59static void nds32_elf_relocate_hi20
60 (bfd *, int, Elf_Internal_Rela *, Elf_Internal_Rela *, bfd_byte *, bfd_vma);
61static reloc_howto_type *bfd_elf32_bfd_reloc_type_table_lookup
62 (enum elf_nds32_reloc_type);
63static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
64 (bfd *, bfd_reloc_code_real_type);
65
66/* Target hooks. */
67static void nds32_info_to_howto_rel
68 (bfd *, arelent *, Elf_Internal_Rela *dst);
69static void nds32_info_to_howto
70 (bfd *, arelent *, Elf_Internal_Rela *dst);
71static bfd_boolean nds32_elf_add_symbol_hook
72 (bfd *, struct bfd_link_info *, Elf_Internal_Sym *, const char **,
73 flagword *, asection **, bfd_vma *);
74static bfd_boolean nds32_elf_relocate_section
75 (bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
76 Elf_Internal_Rela *, Elf_Internal_Sym *, asection **);
77static bfd_boolean nds32_elf_object_p (bfd *);
78static void nds32_elf_final_write_processing (bfd *, bfd_boolean);
79static bfd_boolean nds32_elf_set_private_flags (bfd *, flagword);
50e03d47
AM
80static bfd_boolean nds32_elf_merge_private_bfd_data
81 (bfd *, struct bfd_link_info *);
35c08157 82static bfd_boolean nds32_elf_print_private_bfd_data (bfd *, void *);
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83static bfd_boolean nds32_elf_check_relocs
84 (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
85static asection *nds32_elf_gc_mark_hook
86 (asection *, struct bfd_link_info *, Elf_Internal_Rela *,
87 struct elf_link_hash_entry *, Elf_Internal_Sym *);
88static bfd_boolean nds32_elf_adjust_dynamic_symbol
89 (struct bfd_link_info *, struct elf_link_hash_entry *);
90static bfd_boolean nds32_elf_size_dynamic_sections
91 (bfd *, struct bfd_link_info *);
92static bfd_boolean nds32_elf_create_dynamic_sections
93 (bfd *, struct bfd_link_info *);
94static bfd_boolean nds32_elf_finish_dynamic_sections
95 (bfd *, struct bfd_link_info *info);
96static bfd_boolean nds32_elf_finish_dynamic_symbol
97 (bfd *, struct bfd_link_info *, struct elf_link_hash_entry *,
98 Elf_Internal_Sym *);
1c8f6a4d 99static bfd_boolean nds32_elf_mkobject (bfd *);
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100
101/* Nds32 helper functions. */
102static bfd_reloc_status_type nds32_elf_final_sda_base
103 (bfd *, struct bfd_link_info *, bfd_vma *, bfd_boolean);
104static bfd_boolean allocate_dynrelocs (struct elf_link_hash_entry *, void *);
105static bfd_boolean readonly_dynrelocs (struct elf_link_hash_entry *, void *);
106static Elf_Internal_Rela *find_relocs_at_address
107 (Elf_Internal_Rela *, Elf_Internal_Rela *,
108 Elf_Internal_Rela *, enum elf_nds32_reloc_type);
109static bfd_vma calculate_memory_address
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110(bfd *, Elf_Internal_Rela *, Elf_Internal_Sym *, Elf_Internal_Shdr *);
111static int nds32_get_section_contents (bfd *, asection *,
112 bfd_byte **, bfd_boolean);
35c08157 113static bfd_boolean nds32_elf_ex9_build_hash_table
0c4bd9d9 114(bfd *, asection *, struct bfd_link_info *);
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115static bfd_boolean nds32_elf_ex9_itb_base (struct bfd_link_info *);
116static void nds32_elf_ex9_import_table (struct bfd_link_info *);
117static void nds32_elf_ex9_finish (struct bfd_link_info *);
118static void nds32_elf_ex9_reloc_jmp (struct bfd_link_info *);
35c08157 119static void nds32_elf_get_insn_with_reg
1c8f6a4d 120 (Elf_Internal_Rela *, uint32_t, uint32_t *);
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121static int nds32_get_local_syms (bfd *, asection *ATTRIBUTE_UNUSED,
122 Elf_Internal_Sym **);
123static bfd_boolean nds32_elf_ex9_replace_instruction
124 (struct bfd_link_info *, bfd *, asection *);
125static bfd_boolean nds32_elf_ifc_calc (struct bfd_link_info *, bfd *,
126 asection *);
1c8f6a4d 127static bfd_boolean nds32_elf_ifc_finish (struct bfd_link_info *);
35c08157 128static bfd_boolean nds32_elf_ifc_replace (struct bfd_link_info *);
1c8f6a4d 129static bfd_boolean nds32_elf_ifc_reloc (void);
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130static bfd_boolean nds32_relax_fp_as_gp
131 (struct bfd_link_info *link_info, bfd *abfd, asection *sec,
132 Elf_Internal_Rela *internal_relocs, Elf_Internal_Rela *irelend,
133 Elf_Internal_Sym *isymbuf);
134static bfd_boolean nds32_fag_remove_unused_fpbase
135 (bfd *abfd, asection *sec, Elf_Internal_Rela *internal_relocs,
136 Elf_Internal_Rela *irelend);
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137static bfd_byte *
138nds32_elf_get_relocated_section_contents (bfd *abfd,
139 struct bfd_link_info *link_info,
140 struct bfd_link_order *link_order,
141 bfd_byte *data,
142 bfd_boolean relocatable,
143 asymbol **symbols);
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144
145enum
146{
147 MACH_V1 = bfd_mach_n1h,
148 MACH_V2 = bfd_mach_n1h_v2,
149 MACH_V3 = bfd_mach_n1h_v3,
150 MACH_V3M = bfd_mach_n1h_v3m
151};
152
153#define MIN(a, b) ((a) > (b) ? (b) : (a))
154#define MAX(a, b) ((a) > (b) ? (a) : (b))
155
156/* The name of the dynamic interpreter. This is put in the .interp
157 section. */
158#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
159
160/* The nop opcode we use. */
161#define NDS32_NOP32 0x40000009
162#define NDS32_NOP16 0x9200
163
164/* The size in bytes of an entry in the procedure linkage table. */
165#define PLT_ENTRY_SIZE 24
166#define PLT_HEADER_SIZE 24
167
168/* The first entry in a procedure linkage table are reserved,
169 and the initial contents are unimportant (we zero them out).
170 Subsequent entries look like this. */
171#define PLT0_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(.got+4) */
172#define PLT0_ENTRY_WORD1 0x58f78000 /* ori r15, r25, LO12(.got+4) */
173#define PLT0_ENTRY_WORD2 0x05178000 /* lwi r17, [r15+0] */
174#define PLT0_ENTRY_WORD3 0x04f78001 /* lwi r15, [r15+4] */
175#define PLT0_ENTRY_WORD4 0x4a003c00 /* jr r15 */
176
177/* $ta is change to $r15 (from $r25). */
178#define PLT0_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[1]@GOT) */
179#define PLT0_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[1]@GOT) */
180#define PLT0_PIC_ENTRY_WORD2 0x40f7f400 /* add r15, gp, r15 */
181#define PLT0_PIC_ENTRY_WORD3 0x05178000 /* lwi r17, [r15+0] */
182#define PLT0_PIC_ENTRY_WORD4 0x04f78001 /* lwi r15, [r15+4] */
183#define PLT0_PIC_ENTRY_WORD5 0x4a003c00 /* jr r15 */
184
185#define PLT_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(&got[n+3]) */
186#define PLT_ENTRY_WORD1 0x04f78000 /* lwi r15, r15, LO12(&got[n+3]) */
187#define PLT_ENTRY_WORD2 0x4a003c00 /* jr r15 */
188#define PLT_ENTRY_WORD3 0x45000000 /* movi r16, sizeof(RELA) * n */
189#define PLT_ENTRY_WORD4 0x48000000 /* j .plt0. */
190
191#define PLT_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[n+3]@GOT) */
192#define PLT_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[n+3]@GOT) */
193#define PLT_PIC_ENTRY_WORD2 0x38febc02 /* lw r15, [gp+r15] */
194#define PLT_PIC_ENTRY_WORD3 0x4a003c00 /* jr r15 */
195#define PLT_PIC_ENTRY_WORD4 0x45000000 /* movi r16, sizeof(RELA) * n */
196#define PLT_PIC_ENTRY_WORD5 0x48000000 /* j .plt0 */
197
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198/* These are macros used to get the relocation accurate value. */
199#define ACCURATE_8BIT_S1 (0x100)
200#define ACCURATE_U9BIT_S1 (0x400)
201#define ACCURATE_12BIT_S1 (0x2000)
202#define ACCURATE_14BIT_S1 (0x4000)
203#define ACCURATE_19BIT (0x40000)
204
205/* These are macros used to get the relocation conservative value. */
206#define CONSERVATIVE_8BIT_S1 (0x100 - 4)
207#define CONSERVATIVE_14BIT_S1 (0x4000 - 4)
208#define CONSERVATIVE_16BIT_S1 (0x10000 - 4)
209#define CONSERVATIVE_24BIT_S1 (0x1000000 - 4)
210/* These must be more conservative because the address may be in
211 different segment. */
212#define CONSERVATIVE_15BIT (0x4000 - 0x1000)
213#define CONSERVATIVE_15BIT_S1 (0x8000 - 0x1000)
214#define CONSERVATIVE_15BIT_S2 (0x10000 - 0x1000)
215#define CONSERVATIVE_19BIT (0x40000 - 0x1000)
216#define CONSERVATIVE_20BIT (0x80000 - 0x1000)
217
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218/* Size of small data/bss sections, used to calculate SDA_BASE. */
219static long got_size = 0;
220static int is_SDA_BASE_set = 0;
221static int is_ITB_BASE_set = 0;
222
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223/* Convert ELF-VER in eflags to string for debugging purpose. */
224static const char *const nds32_elfver_strtab[] =
225{
226 "ELF-1.2",
227 "ELF-1.3",
228 "ELF-1.4",
229};
230
231/* The nds32 linker needs to keep track of the number of relocs that it
232 decides to copy in check_relocs for each symbol. This is so that
233 it can discard PC relative relocs if it doesn't need them when
234 linking with -Bsymbolic. We store the information in a field
235 extending the regular ELF linker hash table. */
236
237/* This structure keeps track of the number of PC relative relocs we
238 have copied for a given symbol. */
239
240struct elf_nds32_pcrel_relocs_copied
241{
242 /* Next section. */
243 struct elf_nds32_pcrel_relocs_copied *next;
244 /* A section in dynobj. */
245 asection *section;
246 /* Number of relocs copied in this section. */
247 bfd_size_type count;
248};
249
250/* The sh linker needs to keep track of the number of relocs that it
251 decides to copy as dynamic relocs in check_relocs for each symbol.
252 This is so that it can later discard them if they are found to be
253 unnecessary. We store the information in a field extending the
254 regular ELF linker hash table. */
255
256struct elf_nds32_dyn_relocs
257{
258 struct elf_nds32_dyn_relocs *next;
259
260 /* The input section of the reloc. */
261 asection *sec;
262
263 /* Total number of relocs copied for the input section. */
264 bfd_size_type count;
265
266 /* Number of pc-relative relocs copied for the input section. */
267 bfd_size_type pc_count;
268};
269
270/* Nds32 ELF linker hash entry. */
271
272struct elf_nds32_link_hash_entry
273{
274 struct elf_link_hash_entry root;
275
276 /* Track dynamic relocs copied for this symbol. */
277 struct elf_nds32_dyn_relocs *dyn_relocs;
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278
279 /* For checking relocation type. */
280#define GOT_UNKNOWN 0
281#define GOT_NORMAL 1
282#define GOT_TLS_IE 2
283 unsigned int tls_type;
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284};
285
286/* Get the nds32 ELF linker hash table from a link_info structure. */
287
288#define FP_BASE_NAME "_FP_BASE_"
289static int check_start_export_sym = 0;
290static size_t ex9_relax_size = 0; /* Save ex9 predicted reducing size. */
291
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292/* The offset for executable tls relaxation. */
293#define TP_OFFSET 0x0
294
295struct elf_nds32_obj_tdata
296{
297 struct elf_obj_tdata root;
298
299 /* tls_type for each local got entry. */
300 char *local_got_tls_type;
301};
302
303#define elf_nds32_tdata(bfd) \
304 ((struct elf_nds32_obj_tdata *) (bfd)->tdata.any)
305
306#define elf32_nds32_local_got_tls_type(bfd) \
307 (elf_nds32_tdata (bfd)->local_got_tls_type)
308
309#define elf32_nds32_hash_entry(ent) ((struct elf_nds32_link_hash_entry *)(ent))
310
311static bfd_boolean
312nds32_elf_mkobject (bfd *abfd)
313{
314 return bfd_elf_allocate_object (abfd, sizeof (struct elf_nds32_obj_tdata),
315 NDS32_ELF_DATA);
316}
317
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318/* Relocations used for relocation. */
319static reloc_howto_type nds32_elf_howto_table[] =
320{
321 /* This reloc does nothing. */
322 HOWTO (R_NDS32_NONE, /* type */
323 0, /* rightshift */
6346d5ca
AM
324 3, /* size (0 = byte, 1 = short, 2 = long) */
325 0, /* bitsize */
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326 FALSE, /* pc_relative */
327 0, /* bitpos */
6346d5ca 328 complain_overflow_dont, /* complain_on_overflow */
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329 bfd_elf_generic_reloc, /* special_function */
330 "R_NDS32_NONE", /* name */
331 FALSE, /* partial_inplace */
332 0, /* src_mask */
333 0, /* dst_mask */
334 FALSE), /* pcrel_offset */
335
336 /* A 16 bit absolute relocation. */
337 HOWTO (R_NDS32_16, /* type */
338 0, /* rightshift */
339 1, /* size (0 = byte, 1 = short, 2 = long) */
340 16, /* bitsize */
341 FALSE, /* pc_relative */
342 0, /* bitpos */
343 complain_overflow_bitfield, /* complain_on_overflow */
344 nds32_elf_generic_reloc, /* special_function */
345 "R_NDS32_16", /* name */
346 FALSE, /* partial_inplace */
347 0xffff, /* src_mask */
348 0xffff, /* dst_mask */
349 FALSE), /* pcrel_offset */
350
351 /* A 32 bit absolute relocation. */
352 HOWTO (R_NDS32_32, /* type */
353 0, /* rightshift */
354 2, /* size (0 = byte, 1 = short, 2 = long) */
355 32, /* bitsize */
356 FALSE, /* pc_relative */
357 0, /* bitpos */
358 complain_overflow_bitfield, /* complain_on_overflow */
359 nds32_elf_generic_reloc, /* special_function */
360 "R_NDS32_32", /* name */
361 FALSE, /* partial_inplace */
362 0xffffffff, /* src_mask */
363 0xffffffff, /* dst_mask */
364 FALSE), /* pcrel_offset */
365
366 /* A 20 bit address. */
367 HOWTO (R_NDS32_20, /* type */
368 0, /* rightshift */
369 2, /* size (0 = byte, 1 = short, 2 = long) */
370 20, /* bitsize */
371 FALSE, /* pc_relative */
372 0, /* bitpos */
373 complain_overflow_unsigned, /* complain_on_overflow */
374 nds32_elf_generic_reloc, /* special_function */
375 "R_NDS32_20", /* name */
376 FALSE, /* partial_inplace */
377 0xfffff, /* src_mask */
378 0xfffff, /* dst_mask */
379 FALSE), /* pcrel_offset */
380
381 /* An PC Relative 9-bit relocation, shifted by 2.
382 This reloc is complicated because relocations are relative to pc & -4.
383 i.e. branches in the right insn slot use the address of the left insn
384 slot for pc. */
385 /* ??? It's not clear whether this should have partial_inplace set or not.
386 Branch relaxing in the assembler can store the addend in the insn,
387 and if bfd_install_relocation gets called the addend may get added
388 again. */
389 HOWTO (R_NDS32_9_PCREL, /* type */
390 1, /* rightshift */
391 1, /* size (0 = byte, 1 = short, 2 = long) */
392 8, /* bitsize */
393 TRUE, /* pc_relative */
394 0, /* bitpos */
395 complain_overflow_signed, /* complain_on_overflow */
396 nds32_elf_9_pcrel_reloc, /* special_function */
397 "R_NDS32_9_PCREL", /* name */
398 FALSE, /* partial_inplace */
399 0xff, /* src_mask */
400 0xff, /* dst_mask */
401 TRUE), /* pcrel_offset */
402
403 /* A relative 15 bit relocation, right shifted by 1. */
404 HOWTO (R_NDS32_15_PCREL, /* type */
405 1, /* rightshift */
406 2, /* size (0 = byte, 1 = short, 2 = long) */
407 14, /* bitsize */
408 TRUE, /* pc_relative */
409 0, /* bitpos */
410 complain_overflow_signed, /* complain_on_overflow */
411 bfd_elf_generic_reloc, /* special_function */
412 "R_NDS32_15_PCREL", /* name */
413 FALSE, /* partial_inplace */
414 0x3fff, /* src_mask */
415 0x3fff, /* dst_mask */
416 TRUE), /* pcrel_offset */
417
418 /* A relative 17 bit relocation, right shifted by 1. */
419 HOWTO (R_NDS32_17_PCREL, /* type */
420 1, /* rightshift */
421 2, /* size (0 = byte, 1 = short, 2 = long) */
422 16, /* bitsize */
423 TRUE, /* pc_relative */
424 0, /* bitpos */
425 complain_overflow_signed, /* complain_on_overflow */
426 bfd_elf_generic_reloc, /* special_function */
427 "R_NDS32_17_PCREL", /* name */
428 FALSE, /* partial_inplace */
429 0xffff, /* src_mask */
430 0xffff, /* dst_mask */
431 TRUE), /* pcrel_offset */
432
433 /* A relative 25 bit relocation, right shifted by 1. */
434 /* ??? It's not clear whether this should have partial_inplace set or not.
435 Branch relaxing in the assembler can store the addend in the insn,
436 and if bfd_install_relocation gets called the addend may get added
437 again. */
438 HOWTO (R_NDS32_25_PCREL, /* type */
439 1, /* rightshift */
440 2, /* size (0 = byte, 1 = short, 2 = long) */
441 24, /* bitsize */
442 TRUE, /* pc_relative */
443 0, /* bitpos */
444 complain_overflow_signed, /* complain_on_overflow */
445 bfd_elf_generic_reloc, /* special_function */
446 "R_NDS32_25_PCREL", /* name */
447 FALSE, /* partial_inplace */
448 0xffffff, /* src_mask */
449 0xffffff, /* dst_mask */
450 TRUE), /* pcrel_offset */
451
452 /* High 20 bits of address when lower 12 is or'd in. */
453 HOWTO (R_NDS32_HI20, /* type */
454 12, /* rightshift */
455 2, /* size (0 = byte, 1 = short, 2 = long) */
456 20, /* bitsize */
457 FALSE, /* pc_relative */
458 0, /* bitpos */
459 complain_overflow_dont,/* complain_on_overflow */
460 nds32_elf_hi20_reloc, /* special_function */
461 "R_NDS32_HI20", /* name */
462 FALSE, /* partial_inplace */
463 0x000fffff, /* src_mask */
464 0x000fffff, /* dst_mask */
465 FALSE), /* pcrel_offset */
466
467 /* Lower 12 bits of address. */
468 HOWTO (R_NDS32_LO12S3, /* type */
469 3, /* rightshift */
470 2, /* size (0 = byte, 1 = short, 2 = long) */
471 9, /* bitsize */
472 FALSE, /* pc_relative */
473 0, /* bitpos */
474 complain_overflow_dont,/* complain_on_overflow */
475 nds32_elf_lo12_reloc, /* special_function */
476 "R_NDS32_LO12S3", /* name */
477 FALSE, /* partial_inplace */
478 0x000001ff, /* src_mask */
479 0x000001ff, /* dst_mask */
480 FALSE), /* pcrel_offset */
481
482 /* Lower 12 bits of address. */
483 HOWTO (R_NDS32_LO12S2, /* type */
484 2, /* rightshift */
485 2, /* size (0 = byte, 1 = short, 2 = long) */
486 10, /* bitsize */
487 FALSE, /* pc_relative */
488 0, /* bitpos */
489 complain_overflow_dont,/* complain_on_overflow */
490 nds32_elf_lo12_reloc, /* special_function */
491 "R_NDS32_LO12S2", /* name */
492 FALSE, /* partial_inplace */
493 0x000003ff, /* src_mask */
494 0x000003ff, /* dst_mask */
495 FALSE), /* pcrel_offset */
496
497 /* Lower 12 bits of address. */
498 HOWTO (R_NDS32_LO12S1, /* type */
499 1, /* rightshift */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
501 11, /* bitsize */
502 FALSE, /* pc_relative */
503 0, /* bitpos */
504 complain_overflow_dont,/* complain_on_overflow */
505 nds32_elf_lo12_reloc, /* special_function */
506 "R_NDS32_LO12S1", /* name */
507 FALSE, /* partial_inplace */
508 0x000007ff, /* src_mask */
509 0x000007ff, /* dst_mask */
510 FALSE), /* pcrel_offset */
511
512 /* Lower 12 bits of address. */
513 HOWTO (R_NDS32_LO12S0, /* type */
514 0, /* rightshift */
515 2, /* size (0 = byte, 1 = short, 2 = long) */
516 12, /* bitsize */
517 FALSE, /* pc_relative */
518 0, /* bitpos */
519 complain_overflow_dont,/* complain_on_overflow */
520 nds32_elf_lo12_reloc, /* special_function */
521 "R_NDS32_LO12S0", /* name */
522 FALSE, /* partial_inplace */
523 0x00000fff, /* src_mask */
524 0x00000fff, /* dst_mask */
525 FALSE), /* pcrel_offset */
526
527 /* Small data area 15 bits offset. */
528 HOWTO (R_NDS32_SDA15S3, /* type */
529 3, /* rightshift */
530 2, /* size (0 = byte, 1 = short, 2 = long) */
531 15, /* bitsize */
532 FALSE, /* pc_relative */
533 0, /* bitpos */
534 complain_overflow_signed, /* complain_on_overflow */
535 nds32_elf_sda15_reloc, /* special_function */
536 "R_NDS32_SDA15S3", /* name */
537 FALSE, /* partial_inplace */
538 0x00007fff, /* src_mask */
539 0x00007fff, /* dst_mask */
540 FALSE), /* pcrel_offset */
541
542 /* Small data area 15 bits offset. */
543 HOWTO (R_NDS32_SDA15S2, /* type */
544 2, /* rightshift */
545 2, /* size (0 = byte, 1 = short, 2 = long) */
546 15, /* bitsize */
547 FALSE, /* pc_relative */
548 0, /* bitpos */
549 complain_overflow_signed, /* complain_on_overflow */
550 nds32_elf_sda15_reloc, /* special_function */
551 "R_NDS32_SDA15S2", /* name */
552 FALSE, /* partial_inplace */
553 0x00007fff, /* src_mask */
554 0x00007fff, /* dst_mask */
555 FALSE), /* pcrel_offset */
556
557 /* Small data area 15 bits offset. */
558 HOWTO (R_NDS32_SDA15S1, /* type */
559 1, /* rightshift */
560 2, /* size (0 = byte, 1 = short, 2 = long) */
561 15, /* bitsize */
562 FALSE, /* pc_relative */
563 0, /* bitpos */
564 complain_overflow_signed, /* complain_on_overflow */
565 nds32_elf_sda15_reloc, /* special_function */
566 "R_NDS32_SDA15S1", /* name */
567 FALSE, /* partial_inplace */
568 0x00007fff, /* src_mask */
569 0x00007fff, /* dst_mask */
570 FALSE), /* pcrel_offset */
571
572 /* Small data area 15 bits offset. */
573 HOWTO (R_NDS32_SDA15S0, /* type */
574 0, /* rightshift */
575 2, /* size (0 = byte, 1 = short, 2 = long) */
576 15, /* bitsize */
577 FALSE, /* pc_relative */
578 0, /* bitpos */
579 complain_overflow_signed, /* complain_on_overflow */
580 nds32_elf_sda15_reloc, /* special_function */
581 "R_NDS32_SDA15S0", /* name */
582 FALSE, /* partial_inplace */
583 0x00007fff, /* src_mask */
584 0x00007fff, /* dst_mask */
585 FALSE), /* pcrel_offset */
586
587 /* GNU extension to record C++ vtable hierarchy */
588 HOWTO (R_NDS32_GNU_VTINHERIT, /* type */
589 0, /* rightshift */
590 2, /* size (0 = byte, 1 = short, 2 = long) */
591 0, /* bitsize */
592 FALSE, /* pc_relative */
593 0, /* bitpos */
594 complain_overflow_dont,/* complain_on_overflow */
595 NULL, /* special_function */
596 "R_NDS32_GNU_VTINHERIT", /* name */
597 FALSE, /* partial_inplace */
598 0, /* src_mask */
599 0, /* dst_mask */
600 FALSE), /* pcrel_offset */
601
602 /* GNU extension to record C++ vtable member usage */
603 HOWTO (R_NDS32_GNU_VTENTRY, /* type */
604 0, /* rightshift */
605 2, /* size (0 = byte, 1 = short, 2 = long) */
606 0, /* bitsize */
607 FALSE, /* pc_relative */
608 0, /* bitpos */
609 complain_overflow_dont,/* complain_on_overflow */
610 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
611 "R_NDS32_GNU_VTENTRY", /* name */
612 FALSE, /* partial_inplace */
613 0, /* src_mask */
614 0, /* dst_mask */
615 FALSE), /* pcrel_offset */
616
617 /* A 16 bit absolute relocation. */
618 HOWTO (R_NDS32_16_RELA, /* type */
619 0, /* rightshift */
620 1, /* size (0 = byte, 1 = short, 2 = long) */
621 16, /* bitsize */
622 FALSE, /* pc_relative */
623 0, /* bitpos */
624 complain_overflow_bitfield, /* complain_on_overflow */
625 bfd_elf_generic_reloc, /* special_function */
626 "R_NDS32_16_RELA", /* name */
627 FALSE, /* partial_inplace */
628 0xffff, /* src_mask */
629 0xffff, /* dst_mask */
630 FALSE), /* pcrel_offset */
631
632 /* A 32 bit absolute relocation. */
633 HOWTO (R_NDS32_32_RELA, /* type */
634 0, /* rightshift */
635 2, /* size (0 = byte, 1 = short, 2 = long) */
636 32, /* bitsize */
637 FALSE, /* pc_relative */
638 0, /* bitpos */
639 complain_overflow_bitfield, /* complain_on_overflow */
640 bfd_elf_generic_reloc, /* special_function */
641 "R_NDS32_32_RELA", /* name */
642 FALSE, /* partial_inplace */
643 0xffffffff, /* src_mask */
644 0xffffffff, /* dst_mask */
645 FALSE), /* pcrel_offset */
646
647 /* A 20 bit address. */
648 HOWTO (R_NDS32_20_RELA, /* type */
649 0, /* rightshift */
650 2, /* size (0 = byte, 1 = short, 2 = long) */
651 20, /* bitsize */
652 FALSE, /* pc_relative */
653 0, /* bitpos */
654 complain_overflow_signed, /* complain_on_overflow */
655 bfd_elf_generic_reloc, /* special_function */
656 "R_NDS32_20_RELA", /* name */
657 FALSE, /* partial_inplace */
658 0xfffff, /* src_mask */
659 0xfffff, /* dst_mask */
660 FALSE), /* pcrel_offset */
661
662 HOWTO (R_NDS32_9_PCREL_RELA, /* type */
663 1, /* rightshift */
664 1, /* size (0 = byte, 1 = short, 2 = long) */
665 8, /* bitsize */
666 TRUE, /* pc_relative */
667 0, /* bitpos */
668 complain_overflow_signed, /* complain_on_overflow */
669 bfd_elf_generic_reloc, /* special_function */
670 "R_NDS32_9_PCREL_RELA",/* name */
671 FALSE, /* partial_inplace */
672 0xff, /* src_mask */
673 0xff, /* dst_mask */
674 TRUE), /* pcrel_offset */
675
676 /* A relative 15 bit relocation, right shifted by 1. */
677 HOWTO (R_NDS32_15_PCREL_RELA, /* type */
678 1, /* rightshift */
679 2, /* size (0 = byte, 1 = short, 2 = long) */
680 14, /* bitsize */
681 TRUE, /* pc_relative */
682 0, /* bitpos */
683 complain_overflow_signed, /* complain_on_overflow */
684 bfd_elf_generic_reloc, /* special_function */
685 "R_NDS32_15_PCREL_RELA", /* name */
686 FALSE, /* partial_inplace */
687 0x3fff, /* src_mask */
688 0x3fff, /* dst_mask */
689 TRUE), /* pcrel_offset */
690
691 /* A relative 17 bit relocation, right shifted by 1. */
692 HOWTO (R_NDS32_17_PCREL_RELA, /* type */
693 1, /* rightshift */
694 2, /* size (0 = byte, 1 = short, 2 = long) */
695 16, /* bitsize */
696 TRUE, /* pc_relative */
697 0, /* bitpos */
698 complain_overflow_signed, /* complain_on_overflow */
699 bfd_elf_generic_reloc, /* special_function */
700 "R_NDS32_17_PCREL_RELA", /* name */
701 FALSE, /* partial_inplace */
702 0xffff, /* src_mask */
703 0xffff, /* dst_mask */
704 TRUE), /* pcrel_offset */
705
706 /* A relative 25 bit relocation, right shifted by 2. */
707 HOWTO (R_NDS32_25_PCREL_RELA, /* type */
708 1, /* rightshift */
709 2, /* size (0 = byte, 1 = short, 2 = long) */
710 24, /* bitsize */
711 TRUE, /* pc_relative */
712 0, /* bitpos */
713 complain_overflow_signed, /* complain_on_overflow */
714 bfd_elf_generic_reloc, /* special_function */
715 "R_NDS32_25_PCREL_RELA", /* name */
716 FALSE, /* partial_inplace */
717 0xffffff, /* src_mask */
718 0xffffff, /* dst_mask */
719 TRUE), /* pcrel_offset */
720
721 /* High 20 bits of address when lower 16 is or'd in. */
722 HOWTO (R_NDS32_HI20_RELA, /* type */
723 12, /* rightshift */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
725 20, /* bitsize */
726 FALSE, /* pc_relative */
727 0, /* bitpos */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_NDS32_HI20_RELA", /* name */
731 FALSE, /* partial_inplace */
732 0x000fffff, /* src_mask */
733 0x000fffff, /* dst_mask */
734 FALSE), /* pcrel_offset */
735
736 /* Lower 12 bits of address. */
737 HOWTO (R_NDS32_LO12S3_RELA, /* type */
738 3, /* rightshift */
739 2, /* size (0 = byte, 1 = short, 2 = long) */
740 9, /* bitsize */
741 FALSE, /* pc_relative */
742 0, /* bitpos */
743 complain_overflow_dont,/* complain_on_overflow */
744 bfd_elf_generic_reloc, /* special_function */
745 "R_NDS32_LO12S3_RELA", /* name */
746 FALSE, /* partial_inplace */
747 0x000001ff, /* src_mask */
748 0x000001ff, /* dst_mask */
749 FALSE), /* pcrel_offset */
750
751 /* Lower 12 bits of address. */
752 HOWTO (R_NDS32_LO12S2_RELA, /* type */
753 2, /* rightshift */
754 2, /* size (0 = byte, 1 = short, 2 = long) */
755 10, /* bitsize */
756 FALSE, /* pc_relative */
757 0, /* bitpos */
758 complain_overflow_dont,/* complain_on_overflow */
759 bfd_elf_generic_reloc, /* special_function */
760 "R_NDS32_LO12S2_RELA", /* name */
761 FALSE, /* partial_inplace */
762 0x000003ff, /* src_mask */
763 0x000003ff, /* dst_mask */
764 FALSE), /* pcrel_offset */
765
766 /* Lower 12 bits of address. */
767 HOWTO (R_NDS32_LO12S1_RELA, /* type */
768 1, /* rightshift */
769 2, /* size (0 = byte, 1 = short, 2 = long) */
770 11, /* bitsize */
771 FALSE, /* pc_relative */
772 0, /* bitpos */
773 complain_overflow_dont,/* complain_on_overflow */
774 bfd_elf_generic_reloc, /* special_function */
775 "R_NDS32_LO12S1_RELA", /* name */
776 FALSE, /* partial_inplace */
777 0x000007ff, /* src_mask */
778 0x000007ff, /* dst_mask */
779 FALSE), /* pcrel_offset */
780
781 /* Lower 12 bits of address. */
782 HOWTO (R_NDS32_LO12S0_RELA, /* type */
783 0, /* rightshift */
784 2, /* size (0 = byte, 1 = short, 2 = long) */
785 12, /* bitsize */
786 FALSE, /* pc_relative */
787 0, /* bitpos */
788 complain_overflow_dont,/* complain_on_overflow */
789 bfd_elf_generic_reloc, /* special_function */
790 "R_NDS32_LO12S0_RELA", /* name */
791 FALSE, /* partial_inplace */
792 0x00000fff, /* src_mask */
793 0x00000fff, /* dst_mask */
794 FALSE), /* pcrel_offset */
795
796 /* Small data area 15 bits offset. */
797 HOWTO (R_NDS32_SDA15S3_RELA, /* type */
798 3, /* rightshift */
799 2, /* size (0 = byte, 1 = short, 2 = long) */
800 15, /* bitsize */
801 FALSE, /* pc_relative */
802 0, /* bitpos */
803 complain_overflow_signed, /* complain_on_overflow */
804 bfd_elf_generic_reloc, /* special_function */
805 "R_NDS32_SDA15S3_RELA",/* name */
806 FALSE, /* partial_inplace */
807 0x00007fff, /* src_mask */
808 0x00007fff, /* dst_mask */
809 FALSE), /* pcrel_offset */
810
811 /* Small data area 15 bits offset. */
812 HOWTO (R_NDS32_SDA15S2_RELA, /* type */
813 2, /* rightshift */
814 2, /* size (0 = byte, 1 = short, 2 = long) */
815 15, /* bitsize */
816 FALSE, /* pc_relative */
817 0, /* bitpos */
818 complain_overflow_signed, /* complain_on_overflow */
819 bfd_elf_generic_reloc, /* special_function */
820 "R_NDS32_SDA15S2_RELA",/* name */
821 FALSE, /* partial_inplace */
822 0x00007fff, /* src_mask */
823 0x00007fff, /* dst_mask */
824 FALSE), /* pcrel_offset */
825
826 HOWTO (R_NDS32_SDA15S1_RELA, /* type */
827 1, /* rightshift */
828 2, /* size (0 = byte, 1 = short, 2 = long) */
829 15, /* bitsize */
830 FALSE, /* pc_relative */
831 0, /* bitpos */
832 complain_overflow_signed, /* complain_on_overflow */
833 bfd_elf_generic_reloc, /* special_function */
834 "R_NDS32_SDA15S1_RELA",/* name */
835 FALSE, /* partial_inplace */
836 0x00007fff, /* src_mask */
837 0x00007fff, /* dst_mask */
838 FALSE), /* pcrel_offset */
839
840 HOWTO (R_NDS32_SDA15S0_RELA, /* type */
841 0, /* rightshift */
842 2, /* size (0 = byte, 1 = short, 2 = long) */
843 15, /* bitsize */
844 FALSE, /* pc_relative */
845 0, /* bitpos */
846 complain_overflow_signed, /* complain_on_overflow */
847 bfd_elf_generic_reloc, /* special_function */
848 "R_NDS32_SDA15S0_RELA",/* name */
849 FALSE, /* partial_inplace */
850 0x00007fff, /* src_mask */
851 0x00007fff, /* dst_mask */
852 FALSE), /* pcrel_offset */
853
854 /* GNU extension to record C++ vtable hierarchy */
855 HOWTO (R_NDS32_RELA_GNU_VTINHERIT, /* type */
856 0, /* rightshift */
857 2, /* size (0 = byte, 1 = short, 2 = long) */
858 0, /* bitsize */
859 FALSE, /* pc_relative */
860 0, /* bitpos */
861 complain_overflow_dont,/* complain_on_overflow */
862 NULL, /* special_function */
863 "R_NDS32_RELA_GNU_VTINHERIT", /* name */
864 FALSE, /* partial_inplace */
865 0, /* src_mask */
866 0, /* dst_mask */
867 FALSE), /* pcrel_offset */
868
869 /* GNU extension to record C++ vtable member usage */
870 HOWTO (R_NDS32_RELA_GNU_VTENTRY, /* type */
871 0, /* rightshift */
872 2, /* size (0 = byte, 1 = short, 2 = long) */
873 0, /* bitsize */
874 FALSE, /* pc_relative */
875 0, /* bitpos */
876 complain_overflow_dont,/* complain_on_overflow */
877 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
878 "R_NDS32_RELA_GNU_VTENTRY", /* name */
879 FALSE, /* partial_inplace */
880 0, /* src_mask */
881 0, /* dst_mask */
882 FALSE), /* pcrel_offset */
883
884 /* Like R_NDS32_20, but referring to the GOT table entry for
885 the symbol. */
886 HOWTO (R_NDS32_GOT20, /* type */
887 0, /* rightshift */
888 2, /* size (0 = byte, 1 = short, 2 = long) */
889 20, /* bitsize */
890 FALSE, /* pc_relative */
891 0, /* bitpos */
892 complain_overflow_signed, /* complain_on_overflow */
893 bfd_elf_generic_reloc, /* special_function */
894 "R_NDS32_GOT20", /* name */
895 FALSE, /* partial_inplace */
896 0xfffff, /* src_mask */
897 0xfffff, /* dst_mask */
898 FALSE), /* pcrel_offset */
899
900 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
901 entry for the symbol. */
902 HOWTO (R_NDS32_25_PLTREL, /* type */
903 1, /* rightshift */
904 2, /* size (0 = byte, 1 = short, 2 = long) */
905 24, /* bitsize */
906 TRUE, /* pc_relative */
907 0, /* bitpos */
908 complain_overflow_signed, /* complain_on_overflow */
909 bfd_elf_generic_reloc, /* special_function */
910 "R_NDS32_25_PLTREL", /* name */
911 FALSE, /* partial_inplace */
912 0xffffff, /* src_mask */
913 0xffffff, /* dst_mask */
914 TRUE), /* pcrel_offset */
915
916 /* This is used only by the dynamic linker. The symbol should exist
917 both in the object being run and in some shared library. The
918 dynamic linker copies the data addressed by the symbol from the
919 shared library into the object, because the object being
920 run has to have the data at some particular address. */
921 HOWTO (R_NDS32_COPY, /* type */
922 0, /* rightshift */
923 2, /* size (0 = byte, 1 = short, 2 = long) */
924 32, /* bitsize */
925 FALSE, /* pc_relative */
926 0, /* bitpos */
927 complain_overflow_bitfield, /* complain_on_overflow */
928 bfd_elf_generic_reloc, /* special_function */
929 "R_NDS32_COPY", /* name */
930 FALSE, /* partial_inplace */
931 0xffffffff, /* src_mask */
932 0xffffffff, /* dst_mask */
933 FALSE), /* pcrel_offset */
934
935 /* Like R_NDS32_20, but used when setting global offset table
936 entries. */
937 HOWTO (R_NDS32_GLOB_DAT, /* type */
938 0, /* rightshift */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
940 32, /* bitsize */
941 FALSE, /* pc_relative */
942 0, /* bitpos */
943 complain_overflow_bitfield, /* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_NDS32_GLOB_DAT", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 FALSE), /* pcrel_offset */
950
951 /* Marks a procedure linkage table entry for a symbol. */
952 HOWTO (R_NDS32_JMP_SLOT, /* type */
953 0, /* rightshift */
954 2, /* size (0 = byte, 1 = short, 2 = long) */
955 32, /* bitsize */
956 FALSE, /* pc_relative */
957 0, /* bitpos */
958 complain_overflow_bitfield, /* complain_on_overflow */
959 bfd_elf_generic_reloc, /* special_function */
960 "R_NDS32_JMP_SLOT", /* name */
961 FALSE, /* partial_inplace */
962 0xffffffff, /* src_mask */
963 0xffffffff, /* dst_mask */
964 FALSE), /* pcrel_offset */
965
966 /* Used only by the dynamic linker. When the object is run, this
967 longword is set to the load address of the object, plus the
968 addend. */
969 HOWTO (R_NDS32_RELATIVE, /* type */
970 0, /* rightshift */
971 2, /* size (0 = byte, 1 = short, 2 = long) */
972 32, /* bitsize */
973 FALSE, /* pc_relative */
974 0, /* bitpos */
975 complain_overflow_bitfield, /* complain_on_overflow */
976 bfd_elf_generic_reloc, /* special_function */
977 "R_NDS32_RELATIVE", /* name */
978 FALSE, /* partial_inplace */
979 0xffffffff, /* src_mask */
980 0xffffffff, /* dst_mask */
981 FALSE), /* pcrel_offset */
982
983 HOWTO (R_NDS32_GOTOFF, /* type */
984 0, /* rightshift */
985 2, /* size (0 = byte, 1 = short, 2 = long) */
986 20, /* bitsize */
987 FALSE, /* pc_relative */
988 0, /* bitpos */
989 complain_overflow_signed, /* complain_on_overflow */
990 bfd_elf_generic_reloc, /* special_function */
991 "R_NDS32_GOTOFF", /* name */
992 FALSE, /* partial_inplace */
993 0xfffff, /* src_mask */
994 0xfffff, /* dst_mask */
995 FALSE), /* pcrel_offset */
996
997 /* An PC Relative 20-bit relocation used when setting PIC offset
998 table register. */
999 HOWTO (R_NDS32_GOTPC20, /* type */
1000 0, /* rightshift */
1001 2, /* size (0 = byte, 1 = short, 2 = long) */
1002 20, /* bitsize */
1003 TRUE, /* pc_relative */
1004 0, /* bitpos */
1005 complain_overflow_signed, /* complain_on_overflow */
1006 bfd_elf_generic_reloc, /* special_function */
1007 "R_NDS32_GOTPC20", /* name */
1008 FALSE, /* partial_inplace */
1009 0xfffff, /* src_mask */
1010 0xfffff, /* dst_mask */
1011 TRUE), /* pcrel_offset */
1012
1013 /* Like R_NDS32_HI20, but referring to the GOT table entry for
1014 the symbol. */
1015 HOWTO (R_NDS32_GOT_HI20, /* type */
1016 12, /* rightshift */
1017 2, /* size (0 = byte, 1 = short, 2 = long) */
1018 20, /* bitsize */
1019 FALSE, /* pc_relative */
1020 0, /* bitpos */
1021 complain_overflow_dont,/* complain_on_overflow */
1022 bfd_elf_generic_reloc, /* special_function */
1023 "R_NDS32_GOT_HI20", /* name */
1024 FALSE, /* partial_inplace */
1025 0x000fffff, /* src_mask */
1026 0x000fffff, /* dst_mask */
1027 FALSE), /* pcrel_offset */
1028 HOWTO (R_NDS32_GOT_LO12, /* type */
1029 0, /* rightshift */
1030 2, /* size (0 = byte, 1 = short, 2 = long) */
1031 12, /* bitsize */
1032 FALSE, /* pc_relative */
1033 0, /* bitpos */
1034 complain_overflow_dont,/* complain_on_overflow */
1035 bfd_elf_generic_reloc, /* special_function */
1036 "R_NDS32_GOT_LO12", /* name */
1037 FALSE, /* partial_inplace */
1038 0x00000fff, /* src_mask */
1039 0x00000fff, /* dst_mask */
1040 FALSE), /* pcrel_offset */
1041
1042 /* An PC Relative relocation used when setting PIC offset table register.
1043 Like R_NDS32_HI20, but referring to the GOT table entry for
1044 the symbol. */
1045 HOWTO (R_NDS32_GOTPC_HI20, /* type */
1046 12, /* rightshift */
1047 2, /* size (0 = byte, 1 = short, 2 = long) */
1048 20, /* bitsize */
1049 FALSE, /* pc_relative */
1050 0, /* bitpos */
1051 complain_overflow_dont,/* complain_on_overflow */
1052 bfd_elf_generic_reloc, /* special_function */
1053 "R_NDS32_GOTPC_HI20", /* name */
1054 FALSE, /* partial_inplace */
1055 0x000fffff, /* src_mask */
1056 0x000fffff, /* dst_mask */
1057 TRUE), /* pcrel_offset */
1058 HOWTO (R_NDS32_GOTPC_LO12, /* type */
1059 0, /* rightshift */
1060 2, /* size (0 = byte, 1 = short, 2 = long) */
1061 12, /* bitsize */
1062 FALSE, /* pc_relative */
1063 0, /* bitpos */
1064 complain_overflow_dont, /* complain_on_overflow */
1065 bfd_elf_generic_reloc, /* special_function */
1066 "R_NDS32_GOTPC_LO12", /* name */
1067 FALSE, /* partial_inplace */
1068 0x00000fff, /* src_mask */
1069 0x00000fff, /* dst_mask */
1070 TRUE), /* pcrel_offset */
1071
1072 HOWTO (R_NDS32_GOTOFF_HI20, /* type */
1073 12, /* rightshift */
1074 2, /* size (0 = byte, 1 = short, 2 = long) */
1075 20, /* bitsize */
1076 FALSE, /* pc_relative */
1077 0, /* bitpos */
1078 complain_overflow_dont,/* complain_on_overflow */
1079 bfd_elf_generic_reloc, /* special_function */
1080 "R_NDS32_GOTOFF_HI20", /* name */
1081 FALSE, /* partial_inplace */
1082 0x000fffff, /* src_mask */
1083 0x000fffff, /* dst_mask */
1084 FALSE), /* pcrel_offset */
1085 HOWTO (R_NDS32_GOTOFF_LO12, /* type */
1086 0, /* rightshift */
1087 2, /* size (0 = byte, 1 = short, 2 = long) */
1088 12, /* bitsize */
1089 FALSE, /* pc_relative */
1090 0, /* bitpos */
1091 complain_overflow_dont,/* complain_on_overflow */
1092 bfd_elf_generic_reloc, /* special_function */
1093 "R_NDS32_GOTOFF_LO12", /* name */
1094 FALSE, /* partial_inplace */
1095 0x00000fff, /* src_mask */
1096 0x00000fff, /* dst_mask */
1097 FALSE), /* pcrel_offset */
1098
1099 /* Alignment hint for relaxable instruction. This is used with
1100 R_NDS32_LABEL as a pair. Relax this instruction from 4 bytes to 2
1101 in order to make next label aligned on word boundary. */
1102 HOWTO (R_NDS32_INSN16, /* type */
1103 0, /* rightshift */
1104 2, /* size (0 = byte, 1 = short, 2 = long) */
1105 32, /* bitsize */
1106 FALSE, /* pc_relative */
1107 0, /* bitpos */
1108 complain_overflow_dont,/* complain_on_overflow */
1109 nds32_elf_ignore_reloc,/* special_function */
1110 "R_NDS32_INSN16", /* name */
1111 FALSE, /* partial_inplace */
1112 0x00000fff, /* src_mask */
1113 0x00000fff, /* dst_mask */
1114 FALSE), /* pcrel_offset */
1115
1116 /* Alignment hint for label. */
1117 HOWTO (R_NDS32_LABEL, /* type */
1118 0, /* rightshift */
1119 2, /* size (0 = byte, 1 = short, 2 = long) */
1120 32, /* bitsize */
1121 FALSE, /* pc_relative */
1122 0, /* bitpos */
1123 complain_overflow_dont,/* complain_on_overflow */
1124 nds32_elf_ignore_reloc,/* special_function */
1125 "R_NDS32_LABEL", /* name */
1126 FALSE, /* partial_inplace */
1127 0xffffffff, /* src_mask */
1128 0xffffffff, /* dst_mask */
1129 FALSE), /* pcrel_offset */
1130
1131 /* Relax hint for unconditional call sequence */
1132 HOWTO (R_NDS32_LONGCALL1, /* type */
1133 0, /* rightshift */
1134 2, /* size (0 = byte, 1 = short, 2 = long) */
1135 32, /* bitsize */
1136 FALSE, /* pc_relative */
1137 0, /* bitpos */
1138 complain_overflow_dont,/* complain_on_overflow */
1139 nds32_elf_ignore_reloc,/* special_function */
1140 "R_NDS32_LONGCALL1", /* name */
1141 FALSE, /* partial_inplace */
1142 0xffffffff, /* src_mask */
1143 0xffffffff, /* dst_mask */
1144 FALSE), /* pcrel_offset */
1145
1146 /* Relax hint for conditional call sequence. */
1147 HOWTO (R_NDS32_LONGCALL2, /* type */
1148 0, /* rightshift */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1150 32, /* bitsize */
1151 FALSE, /* pc_relative */
1152 0, /* bitpos */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 nds32_elf_ignore_reloc,/* special_function */
1155 "R_NDS32_LONGCALL2", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 FALSE), /* pcrel_offset */
1160
1161 /* Relax hint for conditional call sequence. */
1162 HOWTO (R_NDS32_LONGCALL3, /* type */
1163 0, /* rightshift */
1164 2, /* size (0 = byte, 1 = short, 2 = long) */
1165 32, /* bitsize */
1166 FALSE, /* pc_relative */
1167 0, /* bitpos */
1168 complain_overflow_dont,/* complain_on_overflow */
1169 nds32_elf_ignore_reloc,/* special_function */
1170 "R_NDS32_LONGCALL3", /* name */
1171 FALSE, /* partial_inplace */
1172 0xffffffff, /* src_mask */
1173 0xffffffff, /* dst_mask */
1174 FALSE), /* pcrel_offset */
1175
1176 /* Relax hint for unconditional branch sequence. */
1177 HOWTO (R_NDS32_LONGJUMP1, /* type */
1178 0, /* rightshift */
1179 2, /* size (0 = byte, 1 = short, 2 = long) */
1180 32, /* bitsize */
1181 FALSE, /* pc_relative */
1182 0, /* bitpos */
1183 complain_overflow_dont,/* complain_on_overflow */
1184 nds32_elf_ignore_reloc,/* special_function */
1185 "R_NDS32_LONGJUMP1", /* name */
1186 FALSE, /* partial_inplace */
1187 0xffffffff, /* src_mask */
1188 0xffffffff, /* dst_mask */
1189 FALSE), /* pcrel_offset */
1190
1191 /* Relax hint for conditional branch sequence. */
1192 HOWTO (R_NDS32_LONGJUMP2, /* type */
1193 0, /* rightshift */
1194 2, /* size (0 = byte, 1 = short, 2 = long) */
1195 32, /* bitsize */
1196 FALSE, /* pc_relative */
1197 0, /* bitpos */
1198 complain_overflow_dont,/* complain_on_overflow */
1199 nds32_elf_ignore_reloc,/* special_function */
1200 "R_NDS32_LONGJUMP2", /* name */
1201 FALSE, /* partial_inplace */
1202 0xffffffff, /* src_mask */
1203 0xffffffff, /* dst_mask */
1204 FALSE), /* pcrel_offset */
1205
1206 /* Relax hint for conditional branch sequence. */
1207 HOWTO (R_NDS32_LONGJUMP3, /* type */
1208 0, /* rightshift */
1209 2, /* size (0 = byte, 1 = short, 2 = long) */
1210 32, /* bitsize */
1211 FALSE, /* pc_relative */
1212 0, /* bitpos */
1213 complain_overflow_dont,/* complain_on_overflow */
1214 nds32_elf_ignore_reloc,/* special_function */
1215 "R_NDS32_LONGJUMP3", /* name */
1216 FALSE, /* partial_inplace */
1217 0xffffffff, /* src_mask */
1218 0xffffffff, /* dst_mask */
1219 FALSE), /* pcrel_offset */
1220
1221 /* Relax hint for load/store sequence. */
1222 HOWTO (R_NDS32_LOADSTORE, /* type */
1223 0, /* rightshift */
1224 2, /* size (0 = byte, 1 = short, 2 = long) */
1225 32, /* bitsize */
1226 FALSE, /* pc_relative */
1227 0, /* bitpos */
1228 complain_overflow_dont,/* complain_on_overflow */
1229 nds32_elf_ignore_reloc,/* special_function */
1230 "R_NDS32_LOADSTORE", /* name */
1231 FALSE, /* partial_inplace */
1232 0xffffffff, /* src_mask */
1233 0xffffffff, /* dst_mask */
1234 FALSE), /* pcrel_offset */
1235
1236 /* Relax hint for load/store sequence. */
1237 HOWTO (R_NDS32_9_FIXED_RELA, /* type */
1238 0, /* rightshift */
1239 1, /* size (0 = byte, 1 = short, 2 = long) */
1240 16, /* bitsize */
1241 FALSE, /* pc_relative */
1242 0, /* bitpos */
1243 complain_overflow_dont,/* complain_on_overflow */
1244 nds32_elf_ignore_reloc,/* special_function */
1245 "R_NDS32_9_FIXED_RELA",/* name */
1246 FALSE, /* partial_inplace */
1247 0x000000ff, /* src_mask */
1248 0x000000ff, /* dst_mask */
1249 FALSE), /* pcrel_offset */
1250
1251 /* Relax hint for load/store sequence. */
1252 HOWTO (R_NDS32_15_FIXED_RELA, /* type */
1253 0, /* rightshift */
1254 2, /* size (0 = byte, 1 = short, 2 = long) */
1255 32, /* bitsize */
1256 FALSE, /* pc_relative */
1257 0, /* bitpos */
1258 complain_overflow_dont,/* complain_on_overflow */
1259 nds32_elf_ignore_reloc,/* special_function */
1260 "R_NDS32_15_FIXED_RELA", /* name */
1261 FALSE, /* partial_inplace */
1262 0x00003fff, /* src_mask */
1263 0x00003fff, /* dst_mask */
1264 FALSE), /* pcrel_offset */
1265
1266 /* Relax hint for load/store sequence. */
1267 HOWTO (R_NDS32_17_FIXED_RELA, /* type */
1268 0, /* rightshift */
1269 2, /* size (0 = byte, 1 = short, 2 = long) */
1270 32, /* bitsize */
1271 FALSE, /* pc_relative */
1272 0, /* bitpos */
1273 complain_overflow_dont,/* complain_on_overflow */
1274 nds32_elf_ignore_reloc,/* special_function */
1275 "R_NDS32_17_FIXED_RELA", /* name */
1276 FALSE, /* partial_inplace */
1277 0x0000ffff, /* src_mask */
1278 0x0000ffff, /* dst_mask */
1279 FALSE), /* pcrel_offset */
1280
1281 /* Relax hint for load/store sequence. */
1282 HOWTO (R_NDS32_25_FIXED_RELA, /* type */
1283 0, /* rightshift */
1284 2, /* size (0 = byte, 1 = short, 2 = long) */
1285 32, /* bitsize */
1286 FALSE, /* pc_relative */
1287 0, /* bitpos */
1288 complain_overflow_dont,/* complain_on_overflow */
1289 nds32_elf_ignore_reloc,/* special_function */
1290 "R_NDS32_25_FIXED_RELA", /* name */
1291 FALSE, /* partial_inplace */
1292 0x00ffffff, /* src_mask */
1293 0x00ffffff, /* dst_mask */
1294 FALSE), /* pcrel_offset */
1295
1296 /* High 20 bits of PLT symbol offset relative to PC. */
1297 HOWTO (R_NDS32_PLTREL_HI20, /* type */
1298 12, /* rightshift */
1299 2, /* size (0 = byte, 1 = short, 2 = long) */
1300 20, /* bitsize */
1301 FALSE, /* pc_relative */
1302 0, /* bitpos */
1303 complain_overflow_dont,/* complain_on_overflow */
1304 bfd_elf_generic_reloc, /* special_function */
1305 "R_NDS32_PLTREL_HI20", /* name */
1306 FALSE, /* partial_inplace */
1307 0x000fffff, /* src_mask */
1308 0x000fffff, /* dst_mask */
1309 FALSE), /* pcrel_offset */
1310
1311 /* Low 12 bits of PLT symbol offset relative to PC. */
1312 HOWTO (R_NDS32_PLTREL_LO12, /* type */
1313 0, /* rightshift */
1314 2, /* size (0 = byte, 1 = short, 2 = long) */
1315 12, /* bitsize */
1316 FALSE, /* pc_relative */
1317 0, /* bitpos */
1318 complain_overflow_dont,/* complain_on_overflow */
1319 bfd_elf_generic_reloc, /* special_function */
1320 "R_NDS32_PLTREL_LO12", /* name */
1321 FALSE, /* partial_inplace */
1322 0x00000fff, /* src_mask */
1323 0x00000fff, /* dst_mask */
1324 FALSE), /* pcrel_offset */
1325
1326 /* High 20 bits of PLT symbol offset relative to GOT (GP). */
1327 HOWTO (R_NDS32_PLT_GOTREL_HI20, /* type */
1328 12, /* rightshift */
1329 2, /* size (0 = byte, 1 = short, 2 = long) */
1330 20, /* bitsize */
1331 FALSE, /* pc_relative */
1332 0, /* bitpos */
1333 complain_overflow_dont,/* complain_on_overflow */
1334 bfd_elf_generic_reloc, /* special_function */
1335 "R_NDS32_PLT_GOTREL_HI20", /* name */
1336 FALSE, /* partial_inplace */
1337 0x000fffff, /* src_mask */
1338 0x000fffff, /* dst_mask */
1339 FALSE), /* pcrel_offset */
1340
1341 /* Low 12 bits of PLT symbol offset relative to GOT (GP). */
1342 HOWTO (R_NDS32_PLT_GOTREL_LO12, /* type */
1343 0, /* rightshift */
1344 2, /* size (0 = byte, 1 = short, 2 = long) */
1345 12, /* bitsize */
1346 FALSE, /* pc_relative */
1347 0, /* bitpos */
1348 complain_overflow_dont,/* complain_on_overflow */
1349 bfd_elf_generic_reloc, /* special_function */
1350 "R_NDS32_PLT_GOTREL_LO12", /* name */
1351 FALSE, /* partial_inplace */
1352 0x00000fff, /* src_mask */
1353 0x00000fff, /* dst_mask */
1354 FALSE), /* pcrel_offset */
1355
1356 /* Small data area 12 bits offset. */
1357 HOWTO (R_NDS32_SDA12S2_DP_RELA, /* type */
1358 2, /* rightshift */
1359 2, /* size (0 = byte, 1 = short, 2 = long) */
1360 12, /* bitsize */
1361 FALSE, /* pc_relative */
1362 0, /* bitpos */
1363 complain_overflow_signed, /* complain_on_overflow */
1364 bfd_elf_generic_reloc, /* special_function */
1365 "R_NDS32_SDA12S2_DP_RELA", /* name */
1366 FALSE, /* partial_inplace */
1367 0x00000fff, /* src_mask */
1368 0x00000fff, /* dst_mask */
1369 FALSE), /* pcrel_offset */
1370
1371 /* Small data area 12 bits offset. */
1372 HOWTO (R_NDS32_SDA12S2_SP_RELA, /* type */
1373 2, /* rightshift */
1374 2, /* size (0 = byte, 1 = short, 2 = long) */
1375 12, /* bitsize */
1376 FALSE, /* pc_relative */
1377 0, /* bitpos */
1378 complain_overflow_signed, /* complain_on_overflow */
1379 bfd_elf_generic_reloc, /* special_function */
1380 "R_NDS32_SDA12S2_SP_RELA", /* name */
1381 FALSE, /* partial_inplace */
1382 0x00000fff, /* src_mask */
1383 0x00000fff, /* dst_mask */
1384 FALSE), /* pcrel_offset */
1385 /* Lower 12 bits of address. */
1386
1387 HOWTO (R_NDS32_LO12S2_DP_RELA, /* type */
1388 2, /* rightshift */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1390 10, /* bitsize */
1391 FALSE, /* pc_relative */
1392 0, /* bitpos */
1393 complain_overflow_dont,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_NDS32_LO12S2_DP_RELA", /* name */
1396 FALSE, /* partial_inplace */
1397 0x000003ff, /* src_mask */
1398 0x000003ff, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1400
1401 /* Lower 12 bits of address. */
1402 HOWTO (R_NDS32_LO12S2_SP_RELA,/* type */
1403 2, /* rightshift */
1404 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 10, /* bitsize */
1406 FALSE, /* pc_relative */
1407 0, /* bitpos */
1408 complain_overflow_dont,/* complain_on_overflow */
1409 bfd_elf_generic_reloc, /* special_function */
1410 "R_NDS32_LO12S2_SP_RELA", /* name */
1411 FALSE, /* partial_inplace */
1412 0x000003ff, /* src_mask */
1413 0x000003ff, /* dst_mask */
1414 FALSE), /* pcrel_offset */
1415 /* Lower 12 bits of address. Special identity for or case. */
1416 HOWTO (R_NDS32_LO12S0_ORI_RELA, /* type */
1417 0, /* rightshift */
1418 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 12, /* bitsize */
1420 FALSE, /* pc_relative */
1421 0, /* bitpos */
1422 complain_overflow_dont,/* complain_on_overflow */
1423 bfd_elf_generic_reloc, /* special_function */
1424 "R_NDS32_LO12S0_ORI_RELA", /* name */
1425 FALSE, /* partial_inplace */
1426 0x00000fff, /* src_mask */
1427 0x00000fff, /* dst_mask */
1428 FALSE), /* pcrel_offset */
1429 /* Small data area 19 bits offset. */
1430 HOWTO (R_NDS32_SDA16S3_RELA, /* type */
1431 3, /* rightshift */
1432 2, /* size (0 = byte, 1 = short, 2 = long) */
1433 16, /* bitsize */
1434 FALSE, /* pc_relative */
1435 0, /* bitpos */
1436 complain_overflow_signed, /* complain_on_overflow */
1437 bfd_elf_generic_reloc, /* special_function */
1438 "R_NDS32_SDA16S3_RELA",/* name */
1439 FALSE, /* partial_inplace */
1440 0x0000ffff, /* src_mask */
1441 0x0000ffff, /* dst_mask */
1442 FALSE), /* pcrel_offset */
1443
1444 /* Small data area 15 bits offset. */
1445 HOWTO (R_NDS32_SDA17S2_RELA, /* type */
1446 2, /* rightshift */
1447 2, /* size (0 = byte, 1 = short, 2 = long) */
1448 17, /* bitsize */
1449 FALSE, /* pc_relative */
1450 0, /* bitpos */
1451 complain_overflow_signed, /* complain_on_overflow */
1452 bfd_elf_generic_reloc, /* special_function */
1453 "R_NDS32_SDA17S2_RELA",/* name */
1454 FALSE, /* partial_inplace */
1455 0x0001ffff, /* src_mask */
1456 0x0001ffff, /* dst_mask */
1457 FALSE), /* pcrel_offset */
1458
1459 HOWTO (R_NDS32_SDA18S1_RELA, /* type */
1460 1, /* rightshift */
1461 2, /* size (0 = byte, 1 = short, 2 = long) */
1462 18, /* bitsize */
1463 FALSE, /* pc_relative */
1464 0, /* bitpos */
1465 complain_overflow_signed, /* complain_on_overflow */
1466 bfd_elf_generic_reloc, /* special_function */
1467 "R_NDS32_SDA18S1_RELA",/* name */
1468 FALSE, /* partial_inplace */
1469 0x0003ffff, /* src_mask */
1470 0x0003ffff, /* dst_mask */
1471 FALSE), /* pcrel_offset */
1472
1473 HOWTO (R_NDS32_SDA19S0_RELA, /* type */
1474 0, /* rightshift */
1475 2, /* size (0 = byte, 1 = short, 2 = long) */
1476 19, /* bitsize */
1477 FALSE, /* pc_relative */
1478 0, /* bitpos */
1479 complain_overflow_signed, /* complain_on_overflow */
1480 bfd_elf_generic_reloc, /* special_function */
1481 "R_NDS32_SDA19S0_RELA",/* name */
1482 FALSE, /* partial_inplace */
1483 0x0007ffff, /* src_mask */
1484 0x0007ffff, /* dst_mask */
1485 FALSE), /* pcrel_offset */
1486 HOWTO (R_NDS32_DWARF2_OP1_RELA, /* type */
1487 0, /* rightshift */
1488 0, /* size (0 = byte, 1 = short, 2 = long) */
1489 8, /* bitsize */
1490 FALSE, /* pc_relative */
1491 0, /* bitpos */
1492 complain_overflow_dont,/* complain_on_overflow */
1493 nds32_elf_ignore_reloc,/* special_function */
1494 "R_NDS32_DWARF2_OP1_RELA", /* name */
1495 FALSE, /* partial_inplace */
1496 0xff, /* src_mask */
1497 0xff, /* dst_mask */
1498 FALSE), /* pcrel_offset */
1499 HOWTO (R_NDS32_DWARF2_OP2_RELA, /* type */
1500 0, /* rightshift */
1501 1, /* size (0 = byte, 1 = short, 2 = long) */
1502 16, /* bitsize */
1503 FALSE, /* pc_relative */
1504 0, /* bitpos */
1505 complain_overflow_dont,/* complain_on_overflow */
1506 nds32_elf_ignore_reloc,/* special_function */
1507 "R_NDS32_DWARF2_OP2_RELA", /* name */
1508 FALSE, /* partial_inplace */
1509 0xffff, /* src_mask */
1510 0xffff, /* dst_mask */
1511 FALSE), /* pcrel_offset */
1512 HOWTO (R_NDS32_DWARF2_LEB_RELA, /* type */
1513 0, /* rightshift */
1514 2, /* size (0 = byte, 1 = short, 2 = long) */
1515 32, /* bitsize */
1516 FALSE, /* pc_relative */
1517 0, /* bitpos */
1518 complain_overflow_dont,/* complain_on_overflow */
1519 nds32_elf_ignore_reloc,/* special_function */
1520 "R_NDS32_DWARF2_LEB_RELA", /* name */
1521 FALSE, /* partial_inplace */
1522 0xffffffff, /* src_mask */
1523 0xffffffff, /* dst_mask */
1524 FALSE), /* pcrel_offset */
1525 HOWTO (R_NDS32_UPDATE_TA_RELA,/* type */
1526 0, /* rightshift */
1527 1, /* size (0 = byte, 1 = short, 2 = long) */
1528 16, /* bitsize */
1529 FALSE, /* pc_relative */
1530 0, /* bitpos */
1531 complain_overflow_dont,/* complain_on_overflow */
1532 nds32_elf_ignore_reloc,/* special_function */
1533 "R_NDS32_UPDATE_TA_RELA", /* name */
1534 FALSE, /* partial_inplace */
1535 0xffff, /* src_mask */
1536 0xffff, /* dst_mask */
1537 FALSE), /* pcrel_offset */
1538 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
1539 entry for the symbol. */
1540 HOWTO (R_NDS32_9_PLTREL, /* type */
1541 1, /* rightshift */
1542 1, /* size (0 = byte, 1 = short, 2 = long) */
1543 8, /* bitsize */
1544 TRUE, /* pc_relative */
1545 0, /* bitpos */
1546 complain_overflow_signed, /* complain_on_overflow */
1547 bfd_elf_generic_reloc, /* special_function */
1548 "R_NDS32_9_PLTREL", /* name */
1549 FALSE, /* partial_inplace */
1550 0xff, /* src_mask */
1551 0xff, /* dst_mask */
1552 TRUE), /* pcrel_offset */
1553 /* Low 20 bits of PLT symbol offset relative to GOT (GP). */
1554 HOWTO (R_NDS32_PLT_GOTREL_LO20, /* type */
1555 0, /* rightshift */
1556 2, /* size (0 = byte, 1 = short, 2 = long) */
1557 20, /* bitsize */
1558 FALSE, /* pc_relative */
1559 0, /* bitpos */
1560 complain_overflow_dont,/* complain_on_overflow */
1561 bfd_elf_generic_reloc, /* special_function */
1562 "R_NDS32_PLT_GOTREL_LO20", /* name */
1563 FALSE, /* partial_inplace */
1564 0x000fffff, /* src_mask */
1565 0x000fffff, /* dst_mask */
1566 FALSE), /* pcrel_offset */
1567 /* low 15 bits of PLT symbol offset relative to GOT (GP) */
1568 HOWTO (R_NDS32_PLT_GOTREL_LO15, /* type */
1569 0, /* rightshift */
1570 2, /* size (0 = byte, 1 = short, 2 = long) */
1571 15, /* bitsize */
1572 FALSE, /* pc_relative */
1573 0, /* bitpos */
1574 complain_overflow_dont,/* complain_on_overflow */
1575 bfd_elf_generic_reloc, /* special_function */
1576 "R_NDS32_PLT_GOTREL_LO15", /* name */
1577 FALSE, /* partial_inplace */
1578 0x00007fff, /* src_mask */
1579 0x00007fff, /* dst_mask */
1580 FALSE), /* pcrel_offset */
1581 /* Low 19 bits of PLT symbol offset relative to GOT (GP). */
1582 HOWTO (R_NDS32_PLT_GOTREL_LO19, /* type */
1583 0, /* rightshift */
1584 2, /* size (0 = byte, 1 = short, 2 = long) */
1585 19, /* bitsize */
1586 FALSE, /* pc_relative */
1587 0, /* bitpos */
1588 complain_overflow_dont,/* complain_on_overflow */
1589 bfd_elf_generic_reloc, /* special_function */
1590 "R_NDS32_PLT_GOTREL_LO19", /* name */
1591 FALSE, /* partial_inplace */
1592 0x0007ffff, /* src_mask */
1593 0x0007ffff, /* dst_mask */
1594 FALSE), /* pcrel_offset */
1595 HOWTO (R_NDS32_GOT_LO15, /* type */
1596 0, /* rightshift */
1597 2, /* size (0 = byte, 1 = short, 2 = long) */
1598 15, /* bitsize */
1599 FALSE, /* pc_relative */
1600 0, /* bitpos */
1601 complain_overflow_dont,/* complain_on_overflow */
1602 bfd_elf_generic_reloc, /* special_function */
1603 "R_NDS32_GOT_LO15", /* name */
1604 FALSE, /* partial_inplace */
1605 0x00007fff, /* src_mask */
1606 0x00007fff, /* dst_mask */
1607 FALSE), /* pcrel_offset */
1608 HOWTO (R_NDS32_GOT_LO19, /* type */
1609 0, /* rightshift */
1610 2, /* size (0 = byte, 1 = short, 2 = long) */
1611 19, /* bitsize */
1612 FALSE, /* pc_relative */
1613 0, /* bitpos */
1614 complain_overflow_dont,/* complain_on_overflow */
1615 bfd_elf_generic_reloc, /* special_function */
1616 "R_NDS32_GOT_LO19", /* name */
1617 FALSE, /* partial_inplace */
1618 0x0007ffff, /* src_mask */
1619 0x0007ffff, /* dst_mask */
1620 FALSE), /* pcrel_offset */
1621 HOWTO (R_NDS32_GOTOFF_LO15, /* type */
1622 0, /* rightshift */
1623 2, /* size (0 = byte, 1 = short, 2 = long) */
1624 15, /* bitsize */
1625 FALSE, /* pc_relative */
1626 0, /* bitpos */
1627 complain_overflow_dont,/* complain_on_overflow */
1628 bfd_elf_generic_reloc, /* special_function */
1629 "R_NDS32_GOTOFF_LO15", /* name */
1630 FALSE, /* partial_inplace */
1631 0x00007fff, /* src_mask */
1632 0x00007fff, /* dst_mask */
1633 FALSE), /* pcrel_offset */
1634 HOWTO (R_NDS32_GOTOFF_LO19, /* type */
1635 0, /* rightshift */
1636 2, /* size (0 = byte, 1 = short, 2 = long) */
1637 19, /* bitsize */
1638 FALSE, /* pc_relative */
1639 0, /* bitpos */
1640 complain_overflow_dont,/* complain_on_overflow */
1641 bfd_elf_generic_reloc, /* special_function */
1642 "R_NDS32_GOTOFF_LO19", /* name */
1643 FALSE, /* partial_inplace */
1644 0x0007ffff, /* src_mask */
1645 0x0007ffff, /* dst_mask */
1646 FALSE), /* pcrel_offset */
1647 /* GOT 15 bits offset. */
1648 HOWTO (R_NDS32_GOT15S2_RELA, /* type */
1649 2, /* rightshift */
1650 2, /* size (0 = byte, 1 = short, 2 = long) */
1651 15, /* bitsize */
1652 FALSE, /* pc_relative */
1653 0, /* bitpos */
1654 complain_overflow_signed, /* complain_on_overflow */
1655 bfd_elf_generic_reloc, /* special_function */
1656 "R_NDS32_GOT15S2_RELA",/* name */
1657 FALSE, /* partial_inplace */
1658 0x00007fff, /* src_mask */
1659 0x00007fff, /* dst_mask */
1660 FALSE), /* pcrel_offset */
1661 /* GOT 17 bits offset. */
1662 HOWTO (R_NDS32_GOT17S2_RELA, /* type */
1663 2, /* rightshift */
1664 2, /* size (0 = byte, 1 = short, 2 = long) */
1665 17, /* bitsize */
1666 FALSE, /* pc_relative */
1667 0, /* bitpos */
1668 complain_overflow_signed, /* complain_on_overflow */
1669 bfd_elf_generic_reloc, /* special_function */
1670 "R_NDS32_GOT17S2_RELA",/* name */
1671 FALSE, /* partial_inplace */
1672 0x0001ffff, /* src_mask */
1673 0x0001ffff, /* dst_mask */
1674 FALSE), /* pcrel_offset */
1675 /* A 5 bit address. */
1676 HOWTO (R_NDS32_5_RELA, /* type */
1677 0, /* rightshift */
1678 1, /* size (0 = byte, 1 = short, 2 = long) */
1679 5, /* bitsize */
1680 FALSE, /* pc_relative */
1681 0, /* bitpos */
1682 complain_overflow_signed, /* complain_on_overflow */
1683 bfd_elf_generic_reloc, /* special_function */
1684 "R_NDS32_5_RELA", /* name */
1685 FALSE, /* partial_inplace */
1686 0x1f, /* src_mask */
1687 0x1f, /* dst_mask */
1688 FALSE), /* pcrel_offset */
1689 HOWTO (R_NDS32_10_UPCREL_RELA,/* type */
1690 1, /* rightshift */
1691 1, /* size (0 = byte, 1 = short, 2 = long) */
1692 9, /* bitsize */
1693 TRUE, /* pc_relative */
1694 0, /* bitpos */
1695 complain_overflow_unsigned, /* complain_on_overflow */
1696 bfd_elf_generic_reloc, /* special_function */
1697 "R_NDS32_10_UPCREL_RELA", /* name */
1698 FALSE, /* partial_inplace */
1699 0x1ff, /* src_mask */
1700 0x1ff, /* dst_mask */
1701 TRUE), /* pcrel_offset */
1702 HOWTO (R_NDS32_SDA_FP7U2_RELA,/* type */
1703 2, /* rightshift */
1704 1, /* size (0 = byte, 1 = short, 2 = long) */
1705 7, /* bitsize */
1706 FALSE, /* pc_relative */
1707 0, /* bitpos */
1708 complain_overflow_unsigned, /* complain_on_overflow */
1709 bfd_elf_generic_reloc, /* special_function */
1710 "R_NDS32_SDA_FP7U2_RELA", /* name */
1711 FALSE, /* partial_inplace */
1712 0x0000007f, /* src_mask */
1713 0x0000007f, /* dst_mask */
1714 FALSE), /* pcrel_offset */
1715 HOWTO (R_NDS32_WORD_9_PCREL_RELA, /* type */
1716 1, /* rightshift */
1717 2, /* size (0 = byte, 1 = short, 2 = long) */
1718 8, /* bitsize */
1719 TRUE, /* pc_relative */
1720 0, /* bitpos */
1721 complain_overflow_signed, /* complain_on_overflow */
1722 bfd_elf_generic_reloc, /* special_function */
1723 "R_NDS32_WORD_9_PCREL_RELA", /* name */
1724 FALSE, /* partial_inplace */
1725 0xff, /* src_mask */
1726 0xff, /* dst_mask */
1727 TRUE), /* pcrel_offset */
1728 HOWTO (R_NDS32_25_ABS_RELA, /* type */
1729 1, /* rightshift */
1730 2, /* size (0 = byte, 1 = short, 2 = long) */
1731 24, /* bitsize */
1732 FALSE, /* pc_relative */
1733 0, /* bitpos */
1734 complain_overflow_dont,/* complain_on_overflow */
1735 bfd_elf_generic_reloc, /* special_function */
1736 "R_NDS32_25_ABS_RELA", /* name */
1737 FALSE, /* partial_inplace */
1738 0xffffff, /* src_mask */
1739 0xffffff, /* dst_mask */
1740 FALSE), /* pcrel_offset */
1741
1742 /* A relative 17 bit relocation for ifc, right shifted by 1. */
1743 HOWTO (R_NDS32_17IFC_PCREL_RELA, /* type */
1744 1, /* rightshift */
1745 2, /* size (0 = byte, 1 = short, 2 = long) */
1746 16, /* bitsize */
1747 TRUE, /* pc_relative */
1748 0, /* bitpos */
1749 complain_overflow_signed, /* complain_on_overflow */
1750 bfd_elf_generic_reloc, /* special_function */
1751 "R_NDS32_17IFC_PCREL_RELA", /* name */
1752 FALSE, /* partial_inplace */
1753 0xffff, /* src_mask */
1754 0xffff, /* dst_mask */
1755 TRUE), /* pcrel_offset */
1756
1757 /* A relative unsigned 10 bit relocation for ifc, right shifted by 1. */
1758 HOWTO (R_NDS32_10IFCU_PCREL_RELA, /* type */
1759 1, /* rightshift */
1760 1, /* size (0 = byte, 1 = short, 2 = long) */
1761 9, /* bitsize */
1762 TRUE, /* pc_relative */
1763 0, /* bitpos */
1764 complain_overflow_unsigned, /* complain_on_overflow */
1765 bfd_elf_generic_reloc, /* special_function */
1766 "R_NDS32_10IFCU_PCREL_RELA", /* name */
1767 FALSE, /* partial_inplace */
1768 0x1ff, /* src_mask */
1769 0x1ff, /* dst_mask */
1770 TRUE), /* pcrel_offset */
1c8f6a4d
KLC
1771
1772 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1773 HOWTO (R_NDS32_TLS_LE_HI20, /* type */
1774 12, /* rightshift */
1775 2, /* size (0 = byte, 1 = short, 2 = long) */
1776 20, /* bitsize */
1777 FALSE, /* pc_relative */
1778 0, /* bitpos */
1779 complain_overflow_dont, /* complain_on_overflow */
1780 bfd_elf_generic_reloc, /* special_function */
1781 "R_NDS32_TLS_LE_HI20", /* name */
1782 FALSE, /* partial_inplace */
1783 0x000fffff, /* src_mask */
1784 0x000fffff, /* dst_mask */
1785 FALSE), /* pcrel_offset */
1786 HOWTO (R_NDS32_TLS_LE_LO12, /* type */
1787 0, /* rightshift */
1788 2, /* size (0 = byte, 1 = short, 2 = long) */
1789 12, /* bitsize */
1790 FALSE, /* pc_relative */
1791 0, /* bitpos */
1792 complain_overflow_dont, /* complain_on_overflow */
1793 bfd_elf_generic_reloc, /* special_function */
1794 "R_NDS32_TLS_LE_LO12", /* name */
1795 FALSE, /* partial_inplace */
1796 0x00000fff, /* src_mask */
1797 0x00000fff, /* dst_mask */
1798 FALSE), /* pcrel_offset */
1799
1800 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1801 HOWTO (R_NDS32_TLS_IE_HI20, /* type */
1802 12, /* rightshift */
1803 2, /* size (0 = byte, 1 = short, 2 = long) */
1804 20, /* bitsize */
1805 FALSE, /* pc_relative */
1806 0, /* bitpos */
1807 complain_overflow_dont, /* complain_on_overflow */
1808 bfd_elf_generic_reloc, /* special_function */
1809 "R_NDS32_TLS_IE_HI20", /* name */
1810 FALSE, /* partial_inplace */
1811 0x000fffff, /* src_mask */
1812 0x000fffff, /* dst_mask */
1813 FALSE), /* pcrel_offset */
1814 HOWTO (R_NDS32_TLS_IE_LO12S2, /* type */
1815 2, /* rightshift */
1816 2, /* size (0 = byte, 1 = short, 2 = long) */
1817 10, /* bitsize */
1818 FALSE, /* pc_relative */
1819 0, /* bitpos */
1820 complain_overflow_dont, /* complain_on_overflow */
1821 bfd_elf_generic_reloc, /* special_function */
1822 "R_NDS32_TLS_IE_LO12S2", /* name */
1823 FALSE, /* partial_inplace */
1824 0x000003ff, /* src_mask */
1825 0x000003ff, /* dst_mask */
1826 FALSE), /* pcrel_offset */
1827 /* Mark a TLS IE entry in GOT. */
1828 HOWTO (R_NDS32_TLS_TPOFF, /* type */
1829 0, /* rightshift */
1830 2, /* size (0 = byte, 1 = short, 2 = long) */
1831 32, /* bitsize */
1832 FALSE, /* pc_relative */
1833 0, /* bitpos */
1834 complain_overflow_bitfield, /* complain_on_overflow */
1835 bfd_elf_generic_reloc, /* special_function */
1836 "R_NDS32_TLS_TPOFF", /* name */
1837 FALSE, /* partial_inplace */
1838 0xffffffff, /* src_mask */
1839 0xffffffff, /* dst_mask */
1840 FALSE), /* pcrel_offset */
1841 /* A 20 bit address. */
1842 HOWTO (R_NDS32_TLS_LE_20, /* type */
1843 0, /* rightshift */
1844 2, /* size (0 = byte, 1 = short, 2 = long) */
1845 20, /* bitsize */
1846 FALSE, /* pc_relative */
1847 0, /* bitpos */
1848 complain_overflow_signed, /* complain_on_overflow */
1849 bfd_elf_generic_reloc, /* special_function */
1850 "R_NDS32_TLS_LE_20", /* name */
1851 FALSE, /* partial_inplace */
1852 0xfffff, /* src_mask */
1853 0xfffff, /* dst_mask */
1854 FALSE), /* pcrel_offset */
1855 HOWTO (R_NDS32_TLS_LE_15S0, /* type */
1856 0, /* rightshift */
1857 2, /* size (0 = byte, 1 = short, 2 = long) */
1858 15, /* bitsize */
1859 FALSE, /* pc_relative */
1860 0, /* bitpos */
1861 complain_overflow_signed, /* complain_on_overflow */
1862 bfd_elf_generic_reloc, /* special_function */
1863 "R_NDS32_TLS_LE_15S0", /* name */
1864 FALSE, /* partial_inplace */
1865 0x7fff, /* src_mask */
1866 0x7fff, /* dst_mask */
1867 FALSE), /* pcrel_offset */
1868 HOWTO (R_NDS32_TLS_LE_15S1, /* type */
1869 1, /* rightshift */
1870 2, /* size (0 = byte, 1 = short, 2 = long) */
1871 15, /* bitsize */
1872 FALSE, /* pc_relative */
1873 0, /* bitpos */
1874 complain_overflow_signed, /* complain_on_overflow */
1875 bfd_elf_generic_reloc, /* special_function */
1876 "R_NDS32_TLS_LE_15S1", /* name */
1877 FALSE, /* partial_inplace */
1878 0x7fff, /* src_mask */
1879 0x7fff, /* dst_mask */
1880 FALSE), /* pcrel_offset */
1881 HOWTO (R_NDS32_TLS_LE_15S2, /* type */
1882 2, /* rightshift */
1883 2, /* size (0 = byte, 1 = short, 2 = long) */
1884 15, /* bitsize */
1885 FALSE, /* pc_relative */
1886 0, /* bitpos */
1887 complain_overflow_signed, /* complain_on_overflow */
1888 bfd_elf_generic_reloc, /* special_function */
1889 "R_NDS32_TLS_LE_15S2", /* name */
1890 FALSE, /* partial_inplace */
1891 0x7fff, /* src_mask */
1892 0x7fff, /* dst_mask */
1893 FALSE), /* pcrel_offset */
1894
1895 /* Relax hint for unconditional call sequence */
1896 HOWTO (R_NDS32_LONGCALL4, /* type */
1897 0, /* rightshift */
1898 2, /* size (0 = byte, 1 = short, 2 = long) */
1899 32, /* bitsize */
1900 FALSE, /* pc_relative */
1901 0, /* bitpos */
1902 complain_overflow_dont, /* complain_on_overflow */
1903 nds32_elf_ignore_reloc, /* special_function */
1904 "R_NDS32_LONGCALL4", /* name */
1905 FALSE, /* partial_inplace */
1906 0xffffffff, /* src_mask */
1907 0xffffffff, /* dst_mask */
1908 FALSE), /* pcrel_offset */
1909
1910 /* Relax hint for conditional call sequence. */
1911 HOWTO (R_NDS32_LONGCALL5, /* type */
1912 0, /* rightshift */
1913 2, /* size (0 = byte, 1 = short, 2 = long) */
1914 32, /* bitsize */
1915 FALSE, /* pc_relative */
1916 0, /* bitpos */
1917 complain_overflow_dont, /* complain_on_overflow */
1918 nds32_elf_ignore_reloc, /* special_function */
1919 "R_NDS32_LONGCALL5", /* name */
1920 FALSE, /* partial_inplace */
1921 0xffffffff, /* src_mask */
1922 0xffffffff, /* dst_mask */
1923 FALSE), /* pcrel_offset */
1924
1925 /* Relax hint for conditional call sequence. */
1926 HOWTO (R_NDS32_LONGCALL6, /* type */
1927 0, /* rightshift */
1928 2, /* size (0 = byte, 1 = short, 2 = long) */
1929 32, /* bitsize */
1930 FALSE, /* pc_relative */
1931 0, /* bitpos */
1932 complain_overflow_dont, /* complain_on_overflow */
1933 nds32_elf_ignore_reloc, /* special_function */
1934 "R_NDS32_LONGCALL6", /* name */
1935 FALSE, /* partial_inplace */
1936 0xffffffff, /* src_mask */
1937 0xffffffff, /* dst_mask */
1938 FALSE), /* pcrel_offset */
1939
1940 /* Relax hint for unconditional branch sequence. */
1941 HOWTO (R_NDS32_LONGJUMP4, /* type */
1942 0, /* rightshift */
1943 2, /* size (0 = byte, 1 = short, 2 = long) */
1944 32, /* bitsize */
1945 FALSE, /* pc_relative */
1946 0, /* bitpos */
1947 complain_overflow_dont, /* complain_on_overflow */
1948 nds32_elf_ignore_reloc, /* special_function */
1949 "R_NDS32_LONGJUMP4", /* name */
1950 FALSE, /* partial_inplace */
1951 0xffffffff, /* src_mask */
1952 0xffffffff, /* dst_mask */
1953 FALSE), /* pcrel_offset */
1954
1955 /* Relax hint for conditional branch sequence. */
1956 HOWTO (R_NDS32_LONGJUMP5, /* type */
1957 0, /* rightshift */
1958 2, /* size (0 = byte, 1 = short, 2 = long) */
1959 32, /* bitsize */
1960 FALSE, /* pc_relative */
1961 0, /* bitpos */
1962 complain_overflow_dont, /* complain_on_overflow */
1963 nds32_elf_ignore_reloc, /* special_function */
1964 "R_NDS32_LONGJUMP5", /* name */
1965 FALSE, /* partial_inplace */
1966 0xffffffff, /* src_mask */
1967 0xffffffff, /* dst_mask */
1968 FALSE), /* pcrel_offset */
1969
1970 /* Relax hint for conditional branch sequence. */
1971 HOWTO (R_NDS32_LONGJUMP6, /* type */
1972 0, /* rightshift */
1973 2, /* size (0 = byte, 1 = short, 2 = long) */
1974 32, /* bitsize */
1975 FALSE, /* pc_relative */
1976 0, /* bitpos */
1977 complain_overflow_dont, /* complain_on_overflow */
1978 nds32_elf_ignore_reloc, /* special_function */
1979 "R_NDS32_LONGJUMP6", /* name */
1980 FALSE, /* partial_inplace */
1981 0xffffffff, /* src_mask */
1982 0xffffffff, /* dst_mask */
1983 FALSE), /* pcrel_offset */
1984
1985 /* Relax hint for conditional branch sequence. */
1986 HOWTO (R_NDS32_LONGJUMP7, /* type */
1987 0, /* rightshift */
1988 2, /* size (0 = byte, 1 = short, 2 = long) */
1989 32, /* bitsize */
1990 FALSE, /* pc_relative */
1991 0, /* bitpos */
1992 complain_overflow_dont, /* complain_on_overflow */
1993 nds32_elf_ignore_reloc, /* special_function */
1994 "R_NDS32_LONGJUMP7", /* name */
1995 FALSE, /* partial_inplace */
1996 0xffffffff, /* src_mask */
1997 0xffffffff, /* dst_mask */
1998 FALSE), /* pcrel_offset */
35c08157
KLC
1999};
2000
2001/* Relocations used for relaxation. */
2002static reloc_howto_type nds32_elf_relax_howto_table[] =
2003{
2004 HOWTO (R_NDS32_RELAX_ENTRY, /* type */
2005 0, /* rightshift */
2006 2, /* size (0 = byte, 1 = short, 2 = long) */
2007 32, /* bitsize */
2008 FALSE, /* pc_relative */
2009 0, /* bitpos */
2010 complain_overflow_dont,/* complain_on_overflow */
2011 nds32_elf_ignore_reloc,/* special_function */
2012 "R_NDS32_RELAX_ENTRY", /* name */
2013 FALSE, /* partial_inplace */
2014 0xffffffff, /* src_mask */
2015 0xffffffff, /* dst_mask */
2016 FALSE), /* pcrel_offset */
2017 HOWTO (R_NDS32_GOT_SUFF, /* type */
2018 0, /* rightshift */
2019 2, /* size (0 = byte, 1 = short, 2 = long) */
2020 32, /* bitsize */
2021 FALSE, /* pc_relative */
2022 0, /* bitpos */
2023 complain_overflow_dont,/* complain_on_overflow */
2024 nds32_elf_ignore_reloc,/* special_function */
2025 "R_NDS32_GOT_SUFF", /* name */
2026 FALSE, /* partial_inplace */
2027 0xffffffff, /* src_mask */
2028 0xffffffff, /* dst_mask */
2029 FALSE), /* pcrel_offset */
2030 HOWTO (R_NDS32_GOTOFF_SUFF, /* type */
2031 0, /* rightshift */
2032 2, /* size (0 = byte, 1 = short, 2 = long) */
2033 32, /* bitsize */
2034 FALSE, /* pc_relative */
2035 0, /* bitpos */
2036 complain_overflow_bitfield, /* complain_on_overflow */
2037 nds32_elf_ignore_reloc,/* special_function */
2038 "R_NDS32_GOTOFF_SUFF", /* name */
2039 FALSE, /* partial_inplace */
2040 0xffffffff, /* src_mask */
2041 0xffffffff, /* dst_mask */
2042 FALSE), /* pcrel_offset */
2043 HOWTO (R_NDS32_PLT_GOT_SUFF, /* type */
2044 0, /* rightshift */
2045 2, /* size (0 = byte, 1 = short, 2 = long) */
2046 32, /* bitsize */
2047 FALSE, /* pc_relative */
2048 0, /* bitpos */
2049 complain_overflow_dont,/* complain_on_overflow */
2050 nds32_elf_ignore_reloc,/* special_function */
2051 "R_NDS32_PLT_GOT_SUFF",/* name */
2052 FALSE, /* partial_inplace */
2053 0xffffffff, /* src_mask */
2054 0xffffffff, /* dst_mask */
2055 FALSE), /* pcrel_offset */
2056 HOWTO (R_NDS32_MULCALL_SUFF, /* type */
2057 0, /* rightshift */
2058 2, /* size (0 = byte, 1 = short, 2 = long) */
2059 32, /* bitsize */
2060 FALSE, /* pc_relative */
2061 0, /* bitpos */
2062 complain_overflow_dont,/* complain_on_overflow */
2063 nds32_elf_ignore_reloc,/* special_function */
2064 "R_NDS32_MULCALL_SUFF",/* name */
2065 FALSE, /* partial_inplace */
2066 0xffffffff, /* src_mask */
2067 0xffffffff, /* dst_mask */
2068 FALSE), /* pcrel_offset */
2069 HOWTO (R_NDS32_PTR, /* type */
2070 0, /* rightshift */
2071 2, /* size (0 = byte, 1 = short, 2 = long) */
2072 32, /* bitsize */
2073 FALSE, /* pc_relative */
2074 0, /* bitpos */
2075 complain_overflow_dont,/* complain_on_overflow */
2076 nds32_elf_ignore_reloc,/* special_function */
2077 "R_NDS32_PTR", /* name */
2078 FALSE, /* partial_inplace */
2079 0xffffffff, /* src_mask */
2080 0xffffffff, /* dst_mask */
2081 FALSE), /* pcrel_offset */
2082 HOWTO (R_NDS32_PTR_COUNT, /* type */
2083 0, /* rightshift */
2084 2, /* size (0 = byte, 1 = short, 2 = long) */
2085 32, /* bitsize */
2086 FALSE, /* pc_relative */
2087 0, /* bitpos */
2088 complain_overflow_dont,/* complain_on_overflow */
2089 nds32_elf_ignore_reloc,/* special_function */
2090 "R_NDS32_PTR_COUNT", /* name */
2091 FALSE, /* partial_inplace */
2092 0xffffffff, /* src_mask */
2093 0xffffffff, /* dst_mask */
2094 FALSE), /* pcrel_offset */
2095 HOWTO (R_NDS32_PTR_RESOLVED, /* type */
2096 0, /* rightshift */
2097 2, /* size (0 = byte, 1 = short, 2 = long) */
2098 32, /* bitsize */
2099 FALSE, /* pc_relative */
2100 0, /* bitpos */
2101 complain_overflow_dont,/* complain_on_overflow */
2102 nds32_elf_ignore_reloc,/* special_function */
2103 "R_NDS32_PTR_RESOLVED",/* name */
2104 FALSE, /* partial_inplace */
2105 0xffffffff, /* src_mask */
2106 0xffffffff, /* dst_mask */
2107 FALSE), /* pcrel_offset */
2108 HOWTO (R_NDS32_PLTBLOCK, /* type */
2109 0, /* rightshift */
2110 2, /* size (0 = byte, 1 = short, 2 = long) */
2111 32, /* bitsize */
2112 FALSE, /* pc_relative */
2113 0, /* bitpos */
2114 complain_overflow_dont,/* complain_on_overflow */
2115 nds32_elf_ignore_reloc,/* special_function */
2116 "R_NDS32_PLTBLOCK", /* name */
2117 FALSE, /* partial_inplace */
2118 0xffffffff, /* src_mask */
2119 0xffffffff, /* dst_mask */
2120 FALSE), /* pcrel_offset */
2121 HOWTO (R_NDS32_RELAX_REGION_BEGIN, /* type */
2122 0, /* rightshift */
2123 2, /* size (0 = byte, 1 = short, 2 = long) */
2124 32, /* bitsize */
2125 FALSE, /* pc_relative */
2126 0, /* bitpos */
2127 complain_overflow_dont,/* complain_on_overflow */
2128 nds32_elf_ignore_reloc,/* special_function */
2129 "R_NDS32_RELAX_REGION_BEGIN", /* name */
2130 FALSE, /* partial_inplace */
2131 0xffffffff, /* src_mask */
2132 0xffffffff, /* dst_mask */
2133 FALSE), /* pcrel_offset */
2134 HOWTO (R_NDS32_RELAX_REGION_END, /* type */
2135 0, /* rightshift */
2136 2, /* size (0 = byte, 1 = short, 2 = long) */
2137 32, /* bitsize */
2138 FALSE, /* pc_relative */
2139 0, /* bitpos */
2140 complain_overflow_dont,/* complain_on_overflow */
2141 nds32_elf_ignore_reloc,/* special_function */
2142 "R_NDS32_RELAX_REGION_END", /* name */
2143 FALSE, /* partial_inplace */
2144 0xffffffff, /* src_mask */
2145 0xffffffff, /* dst_mask */
2146 FALSE), /* pcrel_offset */
2147 HOWTO (R_NDS32_MINUEND, /* type */
2148 0, /* rightshift */
2149 2, /* size (0 = byte, 1 = short, 2 = long) */
2150 32, /* bitsize */
2151 FALSE, /* pc_relative */
2152 0, /* bitpos */
2153 complain_overflow_dont,/* complain_on_overflow */
2154 nds32_elf_ignore_reloc,/* special_function */
2155 "R_NDS32_MINUEND", /* name */
2156 FALSE, /* partial_inplace */
2157 0xffffffff, /* src_mask */
2158 0xffffffff, /* dst_mask */
2159 FALSE), /* pcrel_offset */
2160 HOWTO (R_NDS32_SUBTRAHEND, /* type */
2161 0, /* rightshift */
2162 2, /* size (0 = byte, 1 = short, 2 = long) */
2163 32, /* bitsize */
2164 FALSE, /* pc_relative */
2165 0, /* bitpos */
2166 complain_overflow_dont,/* complain_on_overflow */
2167 nds32_elf_ignore_reloc,/* special_function */
2168 "R_NDS32_SUBTRAHEND", /* name */
2169 FALSE, /* partial_inplace */
2170 0xffffffff, /* src_mask */
2171 0xffffffff, /* dst_mask */
2172 FALSE), /* pcrel_offset */
2173 HOWTO (R_NDS32_DIFF8, /* type */
2174 0, /* rightshift */
2175 0, /* size (0 = byte, 1 = short, 2 = long) */
2176 8, /* bitsize */
2177 FALSE, /* pc_relative */
2178 0, /* bitpos */
2179 complain_overflow_dont,/* complain_on_overflow */
2180 nds32_elf_ignore_reloc,/* special_function */
2181 "R_NDS32_DIFF8", /* name */
2182 FALSE, /* partial_inplace */
2183 0x000000ff, /* src_mask */
2184 0x000000ff, /* dst_mask */
2185 FALSE), /* pcrel_offset */
2186 HOWTO (R_NDS32_DIFF16, /* type */
2187 0, /* rightshift */
2188 1, /* size (0 = byte, 1 = short, 2 = long) */
2189 16, /* bitsize */
2190 FALSE, /* pc_relative */
2191 0, /* bitpos */
2192 complain_overflow_dont,/* complain_on_overflow */
2193 nds32_elf_ignore_reloc,/* special_function */
2194 "R_NDS32_DIFF16", /* name */
2195 FALSE, /* partial_inplace */
2196 0x0000ffff, /* src_mask */
2197 0x0000ffff, /* dst_mask */
2198 FALSE), /* pcrel_offset */
2199 HOWTO (R_NDS32_DIFF32, /* type */
2200 0, /* rightshift */
2201 2, /* size (0 = byte, 1 = short, 2 = long) */
2202 32, /* bitsize */
2203 FALSE, /* pc_relative */
2204 0, /* bitpos */
2205 complain_overflow_dont,/* complain_on_overflow */
2206 nds32_elf_ignore_reloc,/* special_function */
2207 "R_NDS32_DIFF32", /* name */
2208 FALSE, /* partial_inplace */
2209 0xffffffff, /* src_mask */
2210 0xffffffff, /* dst_mask */
2211 FALSE), /* pcrel_offset */
2212 HOWTO (R_NDS32_DIFF_ULEB128, /* type */
2213 0, /* rightshift */
2214 0, /* size (0 = byte, 1 = short, 2 = long) */
2215 0, /* bitsize */
2216 FALSE, /* pc_relative */
2217 0, /* bitpos */
2218 complain_overflow_dont,/* complain_on_overflow */
2219 nds32_elf_ignore_reloc,/* special_function */
2220 "R_NDS32_DIFF_ULEB128",/* name */
2221 FALSE, /* partial_inplace */
2222 0xffffffff, /* src_mask */
2223 0xffffffff, /* dst_mask */
2224 FALSE), /* pcrel_offset */
2225 HOWTO (R_NDS32_DATA, /* type */
2226 0, /* rightshift */
2227 2, /* size (0 = byte, 1 = short, 2 = long) */
2228 32, /* bitsize */
2229 FALSE, /* pc_relative */
2230 0, /* bitpos */
2231 complain_overflow_dont,/* complain_on_overflow */
2232 nds32_elf_ignore_reloc,/* special_function */
2233 "R_NDS32_DATA", /* name */
2234 FALSE, /* partial_inplace */
2235 0xffffffff, /* src_mask */
2236 0xffffffff, /* dst_mask */
2237 FALSE), /* pcrel_offset */
2238 HOWTO (R_NDS32_TRAN, /* type */
2239 0, /* rightshift */
2240 2, /* size (0 = byte, 1 = short, 2 = long) */
2241 32, /* bitsize */
2242 FALSE, /* pc_relative */
2243 0, /* bitpos */
2244 complain_overflow_dont,/* complain_on_overflow */
2245 nds32_elf_ignore_reloc,/* special_function */
2246 "R_NDS32_TRAN", /* name */
2247 FALSE, /* partial_inplace */
2248 0xffffffff, /* src_mask */
2249 0xffffffff, /* dst_mask */
2250 FALSE), /* pcrel_offset */
1c8f6a4d
KLC
2251 HOWTO (R_NDS32_TLS_LE_ADD, /* type */
2252 0, /* rightshift */
2253 2, /* size (0 = byte, 1 = short, 2 = long) */
2254 32, /* bitsize */
2255 FALSE, /* pc_relative */
2256 0, /* bitpos */
2257 complain_overflow_dont, /* complain_on_overflow */
2258 nds32_elf_ignore_reloc, /* special_function */
2259 "R_NDS32_TLS_LE_ADD", /* name */
2260 FALSE, /* partial_inplace */
2261 0xffffffff, /* src_mask */
2262 0xffffffff, /* dst_mask */
2263 FALSE), /* pcrel_offset */
2264 HOWTO (R_NDS32_TLS_LE_LS, /* type */
2265 0, /* rightshift */
2266 2, /* size (0 = byte, 1 = short, 2 = long) */
2267 32, /* bitsize */
2268 FALSE, /* pc_relative */
2269 0, /* bitpos */
2270 complain_overflow_dont, /* complain_on_overflow */
2271 nds32_elf_ignore_reloc, /* special_function */
2272 "R_NDS32_TLS_LE_LS", /* name */
2273 FALSE, /* partial_inplace */
2274 0xffffffff, /* src_mask */
2275 0xffffffff, /* dst_mask */
2276 FALSE), /* pcrel_offset */
2277 HOWTO (R_NDS32_EMPTY, /* type */
2278 0, /* rightshift */
2279 2, /* size (0 = byte, 1 = short, 2 = long) */
2280 32, /* bitsize */
2281 FALSE, /* pc_relative */
2282 0, /* bitpos */
2283 complain_overflow_dont, /* complain_on_overflow */
2284 nds32_elf_ignore_reloc, /* special_function */
2285 "R_NDS32_EMPTY", /* name */
2286 FALSE, /* partial_inplace */
2287 0xffffffff, /* src_mask */
2288 0xffffffff, /* dst_mask */
2289 FALSE), /* pcrel_offset */
35c08157
KLC
2290};
2291
2292\f
2293/* nds32_insertion_sort sorts an array with nmemb elements of size size.
2294 This prototype is the same as qsort (). */
2295
2296void
2297nds32_insertion_sort (void *base, size_t nmemb, size_t size,
2298 int (*compar) (const void *lhs, const void *rhs))
2299{
2300 char *ptr = (char *) base;
1c8f6a4d 2301 int i, j;
e1fa0163 2302 char *tmp = xmalloc (size);
35c08157
KLC
2303
2304 /* If i is less than j, i is inserted before j.
2305
2306 |---- j ----- i --------------|
2307 \ / \ /
2308 sorted unsorted
2309 */
2310
1c8f6a4d 2311 for (i = 1; i < (int) nmemb; i++)
35c08157 2312 {
1c8f6a4d
KLC
2313 for (j = (i - 1); j >= 0; j--)
2314 if (compar (ptr + i * size, ptr + j * size) >= 0)
35c08157
KLC
2315 break;
2316
1c8f6a4d
KLC
2317 j++;
2318
35c08157 2319 if (i == j)
1c8f6a4d 2320 continue; /* i is in order. */
35c08157
KLC
2321
2322 memcpy (tmp, ptr + i * size, size);
2323 memmove (ptr + (j + 1) * size, ptr + j * size, (i - j) * size);
2324 memcpy (ptr + j * size, tmp, size);
2325 }
e1fa0163 2326 free (tmp);
35c08157
KLC
2327}
2328
2329/* Sort relocation by r_offset.
2330
2331 We didn't use qsort () in stdlib, because quick-sort is not a stable sorting
2332 algorithm. Relocations at the same r_offset must keep their order.
2333 For example, RELAX_ENTRY must be the very first relocation entry.
2334
2335 Currently, this function implements insertion-sort.
2336
2337 FIXME: If we already sort them in assembler, why bother sort them
2338 here again? */
2339
2340static int
2341compar_reloc (const void *lhs, const void *rhs)
2342{
2343 const Elf_Internal_Rela *l = (const Elf_Internal_Rela *) lhs;
2344 const Elf_Internal_Rela *r = (const Elf_Internal_Rela *) rhs;
2345
2346 if (l->r_offset > r->r_offset)
2347 return 1;
2348 else if (l->r_offset == r->r_offset)
2349 return 0;
2350 else
2351 return -1;
2352}
2353
2354/* Functions listed below are only used for old relocs.
2355 * nds32_elf_9_pcrel_reloc
2356 * nds32_elf_do_9_pcrel_reloc
2357 * nds32_elf_hi20_reloc
2358 * nds32_elf_relocate_hi20
2359 * nds32_elf_lo12_reloc
2360 * nds32_elf_sda15_reloc
2361 * nds32_elf_generic_reloc
2362 */
2363
2364/* Handle the R_NDS32_9_PCREL & R_NDS32_9_PCREL_RELA reloc. */
2365
2366static bfd_reloc_status_type
2367nds32_elf_9_pcrel_reloc (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
2368 void *data, asection *input_section, bfd *output_bfd,
2369 char **error_message ATTRIBUTE_UNUSED)
2370{
2371 /* This part is from bfd_elf_generic_reloc. */
2372 if (output_bfd != (bfd *) NULL
2373 && (symbol->flags & BSF_SECTION_SYM) == 0
2374 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2375 {
2376 reloc_entry->address += input_section->output_offset;
2377 return bfd_reloc_ok;
2378 }
2379
2380 if (output_bfd != NULL)
2381 {
2382 /* FIXME: See bfd_perform_relocation. Is this right? */
2383 return bfd_reloc_continue;
2384 }
2385
2386 return nds32_elf_do_9_pcrel_reloc (abfd, reloc_entry->howto,
2387 input_section,
2388 data, reloc_entry->address,
2389 symbol->section,
2390 (symbol->value
2391 + symbol->section->output_section->vma
2392 + symbol->section->output_offset),
2393 reloc_entry->addend);
2394}
2395
2396/* Utility to actually perform an R_NDS32_9_PCREL reloc. */
2397#define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
2398
2399static bfd_reloc_status_type
2400nds32_elf_do_9_pcrel_reloc (bfd *abfd, reloc_howto_type *howto,
2401 asection *input_section, bfd_byte *data,
1c8f6a4d
KLC
2402 bfd_vma offset,
2403 asection *symbol_section ATTRIBUTE_UNUSED,
35c08157
KLC
2404 bfd_vma symbol_value, bfd_vma addend)
2405{
2406 bfd_signed_vma relocation;
2407 unsigned short x;
2408 bfd_reloc_status_type status;
2409
2410 /* Sanity check the address (offset in section). */
2411 if (offset > bfd_get_section_limit (abfd, input_section))
2412 return bfd_reloc_outofrange;
2413
2414 relocation = symbol_value + addend;
2415 /* Make it pc relative. */
2416 relocation -= (input_section->output_section->vma
2417 + input_section->output_offset);
2418 /* These jumps mask off the lower two bits of the current address
2419 before doing pcrel calculations. */
2420 relocation -= (offset & -(bfd_vma) 2);
2421
1c8f6a4d 2422 if (relocation < -ACCURATE_8BIT_S1 || relocation >= ACCURATE_8BIT_S1)
35c08157
KLC
2423 status = bfd_reloc_overflow;
2424 else
2425 status = bfd_reloc_ok;
2426
2427 x = bfd_getb16 (data + offset);
2428
2429 relocation >>= howto->rightshift;
2430 relocation <<= howto->bitpos;
2431 x = (x & ~howto->dst_mask)
2432 | (((x & howto->src_mask) + relocation) & howto->dst_mask);
2433
2434 bfd_putb16 ((bfd_vma) x, data + offset);
2435
2436 return status;
2437}
2438
2439/* Handle the R_NDS32_HI20_[SU]LO relocs.
2440 HI20_SLO is for the add3 and load/store with displacement instructions.
2441 HI20 is for the or3 instruction.
2442 For R_NDS32_HI20_SLO, the lower 16 bits are sign extended when added to
2443 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
2444 we must add one to the high 16 bytes (which will get subtracted off when
2445 the low 16 bits are added).
2446 These relocs have to be done in combination with an R_NDS32_LO12 reloc
2447 because there is a carry from the LO12 to the HI20. Here we just save
2448 the information we need; we do the actual relocation when we see the LO12.
2449 This code is copied from the elf32-mips.c. We also support an arbitrary
2450 number of HI20 relocs to be associated with a single LO12 reloc. The
2451 assembler sorts the relocs to ensure each HI20 immediately precedes its
2452 LO12. However if there are multiple copies, the assembler may not find
2453 the real LO12 so it picks the first one it finds. */
2454
2455struct nds32_hi20
2456{
2457 struct nds32_hi20 *next;
2458 bfd_byte *addr;
2459 bfd_vma addend;
2460};
2461
2462static struct nds32_hi20 *nds32_hi20_list;
2463
2464static bfd_reloc_status_type
2465nds32_elf_hi20_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2466 asymbol *symbol, void *data, asection *input_section,
2467 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2468{
2469 bfd_reloc_status_type ret;
2470 bfd_vma relocation;
2471 struct nds32_hi20 *n;
2472
2473 /* This part is from bfd_elf_generic_reloc.
2474 If we're relocating, and this an external symbol, we don't want
2475 to change anything. */
2476 if (output_bfd != (bfd *) NULL
2477 && (symbol->flags & BSF_SECTION_SYM) == 0 && reloc_entry->addend == 0)
2478 {
2479 reloc_entry->address += input_section->output_offset;
2480 return bfd_reloc_ok;
2481 }
2482
2483 /* Sanity check the address (offset in section). */
2484 if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
2485 return bfd_reloc_outofrange;
2486
2487 ret = bfd_reloc_ok;
2488 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2489 ret = bfd_reloc_undefined;
2490
2491 if (bfd_is_com_section (symbol->section))
2492 relocation = 0;
2493 else
2494 relocation = symbol->value;
2495
2496 relocation += symbol->section->output_section->vma;
2497 relocation += symbol->section->output_offset;
2498 relocation += reloc_entry->addend;
2499
2500 /* Save the information, and let LO12 do the actual relocation. */
2501 n = (struct nds32_hi20 *) bfd_malloc ((bfd_size_type) sizeof *n);
2502 if (n == NULL)
2503 return bfd_reloc_outofrange;
2504
2505 n->addr = (bfd_byte *) data + reloc_entry->address;
2506 n->addend = relocation;
2507 n->next = nds32_hi20_list;
2508 nds32_hi20_list = n;
2509
2510 if (output_bfd != (bfd *) NULL)
2511 reloc_entry->address += input_section->output_offset;
2512
2513 return ret;
2514}
2515
2516/* Handle an NDS32 ELF HI20 reloc. */
2517
2518static void
2519nds32_elf_relocate_hi20 (bfd *input_bfd ATTRIBUTE_UNUSED,
2520 int type ATTRIBUTE_UNUSED, Elf_Internal_Rela *relhi,
2521 Elf_Internal_Rela *rello, bfd_byte *contents,
2522 bfd_vma addend)
2523{
2524 unsigned long insn;
2525 bfd_vma addlo;
2526
2527 insn = bfd_getb32 (contents + relhi->r_offset);
2528
2529 addlo = bfd_getb32 (contents + rello->r_offset);
2530 addlo &= 0xfff;
2531
2532 addend += ((insn & 0xfffff) << 20) + addlo;
2533
2534 insn = (insn & 0xfff00000) | ((addend >> 12) & 0xfffff);
2535 bfd_putb32 (insn, contents + relhi->r_offset);
2536}
2537
2538/* Do an R_NDS32_LO12 relocation. This is a straightforward 12 bit
2539 inplace relocation; this function exists in order to do the
2540 R_NDS32_HI20_[SU]LO relocation described above. */
2541
2542static bfd_reloc_status_type
2543nds32_elf_lo12_reloc (bfd *input_bfd, arelent *reloc_entry, asymbol *symbol,
2544 void *data, asection *input_section, bfd *output_bfd,
2545 char **error_message)
2546{
2547 /* This part is from bfd_elf_generic_reloc.
2548 If we're relocating, and this an external symbol, we don't want
2549 to change anything. */
2550 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2551 && reloc_entry->addend == 0)
2552 {
2553 reloc_entry->address += input_section->output_offset;
2554 return bfd_reloc_ok;
2555 }
2556
2557 if (nds32_hi20_list != NULL)
2558 {
2559 struct nds32_hi20 *l;
2560
2561 l = nds32_hi20_list;
2562 while (l != NULL)
2563 {
2564 unsigned long insn;
2565 unsigned long val;
2566 unsigned long vallo;
2567 struct nds32_hi20 *next;
2568
2569 /* Do the HI20 relocation. Note that we actually don't need
2570 to know anything about the LO12 itself, except where to
2571 find the low 12 bits of the addend needed by the LO12. */
2572 insn = bfd_getb32 (l->addr);
2573 vallo = bfd_getb32 ((bfd_byte *) data + reloc_entry->address);
2574 vallo &= 0xfff;
2575 switch (reloc_entry->howto->type)
2576 {
2577 case R_NDS32_LO12S3:
2578 vallo <<= 3;
2579 break;
2580
2581 case R_NDS32_LO12S2:
2582 vallo <<= 2;
2583 break;
2584
2585 case R_NDS32_LO12S1:
2586 vallo <<= 1;
2587 break;
2588
2589 case R_NDS32_LO12S0:
2590 vallo <<= 0;
2591 break;
2592 }
2593
2594 val = ((insn & 0xfffff) << 12) + vallo;
2595 val += l->addend;
2596
2597 insn = (insn & ~(bfd_vma) 0xfffff) | ((val >> 12) & 0xfffff);
2598 bfd_putb32 ((bfd_vma) insn, l->addr);
2599
2600 next = l->next;
2601 free (l);
2602 l = next;
2603 }
2604
2605 nds32_hi20_list = NULL;
2606 }
2607
2608 /* Now do the LO12 reloc in the usual way.
2609 ??? It would be nice to call bfd_elf_generic_reloc here,
2610 but we have partial_inplace set. bfd_elf_generic_reloc will
2611 pass the handling back to bfd_install_relocation which will install
2612 a section relative addend which is wrong. */
2613 return nds32_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
2614 input_section, output_bfd, error_message);
2615}
2616
2617/* Do generic partial_inplace relocation.
2618 This is a local replacement for bfd_elf_generic_reloc. */
2619
2620static bfd_reloc_status_type
2621nds32_elf_generic_reloc (bfd *input_bfd, arelent *reloc_entry,
2622 asymbol *symbol, void *data, asection *input_section,
2623 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2624{
2625 bfd_reloc_status_type ret;
2626 bfd_vma relocation;
2627 bfd_byte *inplace_address;
2628
2629 /* This part is from bfd_elf_generic_reloc.
2630 If we're relocating, and this an external symbol, we don't want
2631 to change anything. */
2632 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2633 && reloc_entry->addend == 0)
2634 {
2635 reloc_entry->address += input_section->output_offset;
2636 return bfd_reloc_ok;
2637 }
2638
2639 /* Now do the reloc in the usual way.
2640 ??? It would be nice to call bfd_elf_generic_reloc here,
2641 but we have partial_inplace set. bfd_elf_generic_reloc will
2642 pass the handling back to bfd_install_relocation which will install
2643 a section relative addend which is wrong. */
2644
2645 /* Sanity check the address (offset in section). */
2646 if (reloc_entry->address > bfd_get_section_limit (input_bfd, input_section))
2647 return bfd_reloc_outofrange;
2648
2649 ret = bfd_reloc_ok;
2650 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2651 ret = bfd_reloc_undefined;
2652
2653 if (bfd_is_com_section (symbol->section) || output_bfd != (bfd *) NULL)
2654 relocation = 0;
2655 else
2656 relocation = symbol->value;
2657
2658 /* Only do this for a final link. */
2659 if (output_bfd == (bfd *) NULL)
2660 {
2661 relocation += symbol->section->output_section->vma;
2662 relocation += symbol->section->output_offset;
2663 }
2664
2665 relocation += reloc_entry->addend;
2666 switch (reloc_entry->howto->type)
2667 {
2668 case R_NDS32_LO12S3:
2669 relocation >>= 3;
2670 break;
2671
2672 case R_NDS32_LO12S2:
2673 relocation >>= 2;
2674 break;
2675
2676 case R_NDS32_LO12S1:
2677 relocation >>= 1;
2678 break;
2679
2680 case R_NDS32_LO12S0:
2681 default:
2682 relocation >>= 0;
2683 break;
2684 }
2685
2686 inplace_address = (bfd_byte *) data + reloc_entry->address;
2687
2688#define DOIT(x) \
2689 x = ((x & ~reloc_entry->howto->dst_mask) | \
2690 (((x & reloc_entry->howto->src_mask) + relocation) & \
2691 reloc_entry->howto->dst_mask))
2692
2693 switch (reloc_entry->howto->size)
2694 {
2695 case 1:
2696 {
2697 short x = bfd_getb16 (inplace_address);
2698
2699 DOIT (x);
2700 bfd_putb16 ((bfd_vma) x, inplace_address);
2701 }
2702 break;
2703 case 2:
2704 {
2705 unsigned long x = bfd_getb32 (inplace_address);
2706
2707 DOIT (x);
2708 bfd_putb32 ((bfd_vma) x, inplace_address);
2709 }
2710 break;
2711 default:
2712 BFD_ASSERT (0);
2713 }
2714
2715 if (output_bfd != (bfd *) NULL)
2716 reloc_entry->address += input_section->output_offset;
2717
2718 return ret;
2719}
2720
2721/* Handle the R_NDS32_SDA15 reloc.
2722 This reloc is used to compute the address of objects in the small data area
2723 and to perform loads and stores from that area.
2724 The lower 15 bits are sign extended and added to the register specified
2725 in the instruction, which is assumed to point to _SDA_BASE_.
2726
2727 Since the lower 15 bits offset is left-shifted 0, 1 or 2 bits depending on
2728 the access size, this must be taken care of. */
2729
2730static bfd_reloc_status_type
2731nds32_elf_sda15_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2732 asymbol *symbol, void *data ATTRIBUTE_UNUSED,
2733 asection *input_section, bfd *output_bfd,
2734 char **error_message ATTRIBUTE_UNUSED)
2735{
2736 /* This part is from bfd_elf_generic_reloc. */
2737 if (output_bfd != (bfd *) NULL
2738 && (symbol->flags & BSF_SECTION_SYM) == 0
2739 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2740 {
2741 reloc_entry->address += input_section->output_offset;
2742 return bfd_reloc_ok;
2743 }
2744
2745 if (output_bfd != NULL)
2746 {
2747 /* FIXME: See bfd_perform_relocation. Is this right? */
2748 return bfd_reloc_continue;
2749 }
2750
2751 /* FIXME: not sure what to do here yet. But then again, the linker
2752 may never call us. */
2753 abort ();
2754}
2755
2756/* nds32_elf_ignore_reloc is the special function for
2757 relocation types which don't need to be relocated
2758 like relaxation relocation types.
2759 This function simply return bfd_reloc_ok when it is
2760 invoked. */
2761
2762static bfd_reloc_status_type
2763nds32_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2764 asymbol *symbol ATTRIBUTE_UNUSED,
2765 void *data ATTRIBUTE_UNUSED, asection *input_section,
2766 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2767{
2768 if (output_bfd != NULL)
2769 reloc_entry->address += input_section->output_offset;
2770
2771 return bfd_reloc_ok;
2772}
2773\f
2774
2775/* Map BFD reloc types to NDS32 ELF reloc types. */
2776
2777struct nds32_reloc_map_entry
2778{
2779 bfd_reloc_code_real_type bfd_reloc_val;
2780 unsigned char elf_reloc_val;
2781};
2782
2783static const struct nds32_reloc_map_entry nds32_reloc_map[] =
2784{
2785 {BFD_RELOC_NONE, R_NDS32_NONE},
2786 {BFD_RELOC_16, R_NDS32_16_RELA},
2787 {BFD_RELOC_32, R_NDS32_32_RELA},
2788 {BFD_RELOC_NDS32_20, R_NDS32_20_RELA},
2789 {BFD_RELOC_NDS32_5, R_NDS32_5_RELA},
2790 {BFD_RELOC_NDS32_9_PCREL, R_NDS32_9_PCREL_RELA},
2791 {BFD_RELOC_NDS32_WORD_9_PCREL, R_NDS32_WORD_9_PCREL_RELA},
2792 {BFD_RELOC_NDS32_15_PCREL, R_NDS32_15_PCREL_RELA},
2793 {BFD_RELOC_NDS32_17_PCREL, R_NDS32_17_PCREL_RELA},
2794 {BFD_RELOC_NDS32_25_PCREL, R_NDS32_25_PCREL_RELA},
2795 {BFD_RELOC_NDS32_10_UPCREL, R_NDS32_10_UPCREL_RELA},
2796 {BFD_RELOC_NDS32_HI20, R_NDS32_HI20_RELA},
2797 {BFD_RELOC_NDS32_LO12S3, R_NDS32_LO12S3_RELA},
2798 {BFD_RELOC_NDS32_LO12S2, R_NDS32_LO12S2_RELA},
2799 {BFD_RELOC_NDS32_LO12S1, R_NDS32_LO12S1_RELA},
2800 {BFD_RELOC_NDS32_LO12S0, R_NDS32_LO12S0_RELA},
2801 {BFD_RELOC_NDS32_LO12S0_ORI, R_NDS32_LO12S0_ORI_RELA},
2802 {BFD_RELOC_NDS32_SDA15S3, R_NDS32_SDA15S3_RELA},
2803 {BFD_RELOC_NDS32_SDA15S2, R_NDS32_SDA15S2_RELA},
2804 {BFD_RELOC_NDS32_SDA15S1, R_NDS32_SDA15S1_RELA},
2805 {BFD_RELOC_NDS32_SDA15S0, R_NDS32_SDA15S0_RELA},
2806 {BFD_RELOC_VTABLE_INHERIT, R_NDS32_RELA_GNU_VTINHERIT},
2807 {BFD_RELOC_VTABLE_ENTRY, R_NDS32_RELA_GNU_VTENTRY},
2808
2809 {BFD_RELOC_NDS32_GOT20, R_NDS32_GOT20},
2810 {BFD_RELOC_NDS32_9_PLTREL, R_NDS32_9_PLTREL},
2811 {BFD_RELOC_NDS32_25_PLTREL, R_NDS32_25_PLTREL},
2812 {BFD_RELOC_NDS32_COPY, R_NDS32_COPY},
2813 {BFD_RELOC_NDS32_GLOB_DAT, R_NDS32_GLOB_DAT},
2814 {BFD_RELOC_NDS32_JMP_SLOT, R_NDS32_JMP_SLOT},
2815 {BFD_RELOC_NDS32_RELATIVE, R_NDS32_RELATIVE},
2816 {BFD_RELOC_NDS32_GOTOFF, R_NDS32_GOTOFF},
2817 {BFD_RELOC_NDS32_GOTPC20, R_NDS32_GOTPC20},
2818 {BFD_RELOC_NDS32_GOT_HI20, R_NDS32_GOT_HI20},
2819 {BFD_RELOC_NDS32_GOT_LO12, R_NDS32_GOT_LO12},
2820 {BFD_RELOC_NDS32_GOT_LO15, R_NDS32_GOT_LO15},
2821 {BFD_RELOC_NDS32_GOT_LO19, R_NDS32_GOT_LO19},
2822 {BFD_RELOC_NDS32_GOTPC_HI20, R_NDS32_GOTPC_HI20},
2823 {BFD_RELOC_NDS32_GOTPC_LO12, R_NDS32_GOTPC_LO12},
2824 {BFD_RELOC_NDS32_GOTOFF_HI20, R_NDS32_GOTOFF_HI20},
2825 {BFD_RELOC_NDS32_GOTOFF_LO12, R_NDS32_GOTOFF_LO12},
2826 {BFD_RELOC_NDS32_GOTOFF_LO15, R_NDS32_GOTOFF_LO15},
2827 {BFD_RELOC_NDS32_GOTOFF_LO19, R_NDS32_GOTOFF_LO19},
2828 {BFD_RELOC_NDS32_INSN16, R_NDS32_INSN16},
2829 {BFD_RELOC_NDS32_LABEL, R_NDS32_LABEL},
2830 {BFD_RELOC_NDS32_LONGCALL1, R_NDS32_LONGCALL1},
2831 {BFD_RELOC_NDS32_LONGCALL2, R_NDS32_LONGCALL2},
2832 {BFD_RELOC_NDS32_LONGCALL3, R_NDS32_LONGCALL3},
1c8f6a4d
KLC
2833 {BFD_RELOC_NDS32_LONGCALL4, R_NDS32_LONGCALL4},
2834 {BFD_RELOC_NDS32_LONGCALL5, R_NDS32_LONGCALL5},
2835 {BFD_RELOC_NDS32_LONGCALL6, R_NDS32_LONGCALL6},
35c08157
KLC
2836 {BFD_RELOC_NDS32_LONGJUMP1, R_NDS32_LONGJUMP1},
2837 {BFD_RELOC_NDS32_LONGJUMP2, R_NDS32_LONGJUMP2},
2838 {BFD_RELOC_NDS32_LONGJUMP3, R_NDS32_LONGJUMP3},
1c8f6a4d
KLC
2839 {BFD_RELOC_NDS32_LONGJUMP4, R_NDS32_LONGJUMP4},
2840 {BFD_RELOC_NDS32_LONGJUMP5, R_NDS32_LONGJUMP5},
2841 {BFD_RELOC_NDS32_LONGJUMP6, R_NDS32_LONGJUMP6},
2842 {BFD_RELOC_NDS32_LONGJUMP7, R_NDS32_LONGJUMP7},
35c08157
KLC
2843 {BFD_RELOC_NDS32_LOADSTORE, R_NDS32_LOADSTORE},
2844 {BFD_RELOC_NDS32_9_FIXED, R_NDS32_9_FIXED_RELA},
2845 {BFD_RELOC_NDS32_15_FIXED, R_NDS32_15_FIXED_RELA},
2846 {BFD_RELOC_NDS32_17_FIXED, R_NDS32_17_FIXED_RELA},
2847 {BFD_RELOC_NDS32_25_FIXED, R_NDS32_25_FIXED_RELA},
2848 {BFD_RELOC_NDS32_PLTREL_HI20, R_NDS32_PLTREL_HI20},
2849 {BFD_RELOC_NDS32_PLTREL_LO12, R_NDS32_PLTREL_LO12},
2850 {BFD_RELOC_NDS32_PLT_GOTREL_HI20, R_NDS32_PLT_GOTREL_HI20},
2851 {BFD_RELOC_NDS32_PLT_GOTREL_LO12, R_NDS32_PLT_GOTREL_LO12},
2852 {BFD_RELOC_NDS32_PLT_GOTREL_LO15, R_NDS32_PLT_GOTREL_LO15},
2853 {BFD_RELOC_NDS32_PLT_GOTREL_LO19, R_NDS32_PLT_GOTREL_LO19},
2854 {BFD_RELOC_NDS32_PLT_GOTREL_LO20, R_NDS32_PLT_GOTREL_LO20},
2855 {BFD_RELOC_NDS32_SDA12S2_DP, R_NDS32_SDA12S2_DP_RELA},
2856 {BFD_RELOC_NDS32_SDA12S2_SP, R_NDS32_SDA12S2_SP_RELA},
2857 {BFD_RELOC_NDS32_LO12S2_DP, R_NDS32_LO12S2_DP_RELA},
2858 {BFD_RELOC_NDS32_LO12S2_SP, R_NDS32_LO12S2_SP_RELA},
2859 {BFD_RELOC_NDS32_SDA16S3, R_NDS32_SDA16S3_RELA},
2860 {BFD_RELOC_NDS32_SDA17S2, R_NDS32_SDA17S2_RELA},
2861 {BFD_RELOC_NDS32_SDA18S1, R_NDS32_SDA18S1_RELA},
2862 {BFD_RELOC_NDS32_SDA19S0, R_NDS32_SDA19S0_RELA},
2863 {BFD_RELOC_NDS32_SDA_FP7U2_RELA, R_NDS32_SDA_FP7U2_RELA},
2864 {BFD_RELOC_NDS32_DWARF2_OP1, R_NDS32_DWARF2_OP1_RELA},
2865 {BFD_RELOC_NDS32_DWARF2_OP2, R_NDS32_DWARF2_OP2_RELA},
2866 {BFD_RELOC_NDS32_DWARF2_LEB, R_NDS32_DWARF2_LEB_RELA},
2867 {BFD_RELOC_NDS32_UPDATE_TA, R_NDS32_UPDATE_TA_RELA},
2868 {BFD_RELOC_NDS32_GOT_SUFF, R_NDS32_GOT_SUFF},
2869 {BFD_RELOC_NDS32_GOTOFF_SUFF, R_NDS32_GOTOFF_SUFF},
2870 {BFD_RELOC_NDS32_GOT15S2, R_NDS32_GOT15S2_RELA},
2871 {BFD_RELOC_NDS32_GOT17S2, R_NDS32_GOT17S2_RELA},
2872 {BFD_RELOC_NDS32_PTR, R_NDS32_PTR},
2873 {BFD_RELOC_NDS32_PTR_COUNT, R_NDS32_PTR_COUNT},
2874 {BFD_RELOC_NDS32_PLT_GOT_SUFF, R_NDS32_PLT_GOT_SUFF},
2875 {BFD_RELOC_NDS32_PTR_RESOLVED, R_NDS32_PTR_RESOLVED},
2876 {BFD_RELOC_NDS32_RELAX_ENTRY, R_NDS32_RELAX_ENTRY},
2877 {BFD_RELOC_NDS32_MULCALL_SUFF, R_NDS32_MULCALL_SUFF},
2878 {BFD_RELOC_NDS32_PLTBLOCK, R_NDS32_PLTBLOCK},
2879 {BFD_RELOC_NDS32_RELAX_REGION_BEGIN, R_NDS32_RELAX_REGION_BEGIN},
2880 {BFD_RELOC_NDS32_RELAX_REGION_END, R_NDS32_RELAX_REGION_END},
2881 {BFD_RELOC_NDS32_MINUEND, R_NDS32_MINUEND},
2882 {BFD_RELOC_NDS32_SUBTRAHEND, R_NDS32_SUBTRAHEND},
1c8f6a4d 2883 {BFD_RELOC_NDS32_EMPTY, R_NDS32_EMPTY},
35c08157
KLC
2884
2885 {BFD_RELOC_NDS32_DIFF8, R_NDS32_DIFF8},
2886 {BFD_RELOC_NDS32_DIFF16, R_NDS32_DIFF16},
2887 {BFD_RELOC_NDS32_DIFF32, R_NDS32_DIFF32},
2888 {BFD_RELOC_NDS32_DIFF_ULEB128, R_NDS32_DIFF_ULEB128},
2889 {BFD_RELOC_NDS32_25_ABS, R_NDS32_25_ABS_RELA},
2890 {BFD_RELOC_NDS32_DATA, R_NDS32_DATA},
2891 {BFD_RELOC_NDS32_TRAN, R_NDS32_TRAN},
2892 {BFD_RELOC_NDS32_17IFC_PCREL, R_NDS32_17IFC_PCREL_RELA},
2893 {BFD_RELOC_NDS32_10IFCU_PCREL, R_NDS32_10IFCU_PCREL_RELA},
1c8f6a4d
KLC
2894 {BFD_RELOC_NDS32_TLS_LE_HI20, R_NDS32_TLS_LE_HI20},
2895 {BFD_RELOC_NDS32_TLS_LE_LO12, R_NDS32_TLS_LE_LO12},
2896 {BFD_RELOC_NDS32_TLS_LE_ADD, R_NDS32_TLS_LE_ADD},
2897 {BFD_RELOC_NDS32_TLS_LE_LS, R_NDS32_TLS_LE_LS},
2898 {BFD_RELOC_NDS32_TLS_IE_HI20, R_NDS32_TLS_IE_HI20},
2899 {BFD_RELOC_NDS32_TLS_IE_LO12S2, R_NDS32_TLS_IE_LO12S2},
2900 {BFD_RELOC_NDS32_TLS_TPOFF, R_NDS32_TLS_TPOFF},
2901 {BFD_RELOC_NDS32_TLS_LE_20, R_NDS32_TLS_LE_20},
2902 {BFD_RELOC_NDS32_TLS_LE_15S0, R_NDS32_TLS_LE_15S0},
2903 {BFD_RELOC_NDS32_TLS_LE_15S1, R_NDS32_TLS_LE_15S1},
2904 {BFD_RELOC_NDS32_TLS_LE_15S2, R_NDS32_TLS_LE_15S2},
35c08157
KLC
2905};
2906
2907/* Patch tag. */
2908
2909static reloc_howto_type *
2910bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2911 const char *r_name)
2912{
2913 unsigned int i;
2914
2915 for (i = 0; i < ARRAY_SIZE (nds32_elf_howto_table); i++)
2916 if (nds32_elf_howto_table[i].name != NULL
2917 && strcasecmp (nds32_elf_howto_table[i].name, r_name) == 0)
2918 return &nds32_elf_howto_table[i];
2919
2920 for (i = 0; i < ARRAY_SIZE (nds32_elf_relax_howto_table); i++)
2921 if (nds32_elf_relax_howto_table[i].name != NULL
2922 && strcasecmp (nds32_elf_relax_howto_table[i].name, r_name) == 0)
2923 return &nds32_elf_relax_howto_table[i];
2924
2925 return NULL;
2926}
2927
2928static reloc_howto_type *
2929bfd_elf32_bfd_reloc_type_table_lookup (enum elf_nds32_reloc_type code)
2930{
2931 if (code < R_NDS32_RELAX_ENTRY)
2932 {
2933 BFD_ASSERT (code < ARRAY_SIZE (nds32_elf_howto_table));
2934 return &nds32_elf_howto_table[code];
2935 }
2936 else
2937 {
2938 BFD_ASSERT ((size_t) (code - R_NDS32_RELAX_ENTRY)
2939 < ARRAY_SIZE (nds32_elf_relax_howto_table));
2940 return &nds32_elf_relax_howto_table[code - R_NDS32_RELAX_ENTRY];
2941 }
2942}
2943
2944static reloc_howto_type *
2945bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2946 bfd_reloc_code_real_type code)
2947{
2948 unsigned int i;
2949
2950 for (i = 0; i < ARRAY_SIZE (nds32_reloc_map); i++)
2951 {
2952 if (nds32_reloc_map[i].bfd_reloc_val == code)
2953 return bfd_elf32_bfd_reloc_type_table_lookup
2954 (nds32_reloc_map[i].elf_reloc_val);
2955 }
2956
2957 return NULL;
2958}
2959
2960/* Set the howto pointer for an NDS32 ELF reloc. */
2961
2962static void
2963nds32_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2964 Elf_Internal_Rela *dst)
2965{
2966 enum elf_nds32_reloc_type r_type;
2967
2968 r_type = ELF32_R_TYPE (dst->r_info);
5860e3f8
NC
2969 if (r_type > R_NDS32_GNU_VTENTRY)
2970 {
695344c0 2971 /* xgettext:c-format */
64d29018 2972 _bfd_error_handler (_("%B: invalid NDS32 reloc number: %d"), abfd, r_type);
5860e3f8
NC
2973 r_type = 0;
2974 }
35c08157
KLC
2975 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
2976}
2977
2978static void
2979nds32_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2980 Elf_Internal_Rela *dst)
2981{
2982 BFD_ASSERT ((ELF32_R_TYPE (dst->r_info) == R_NDS32_NONE)
2983 || ((ELF32_R_TYPE (dst->r_info) > R_NDS32_GNU_VTENTRY)
2984 && (ELF32_R_TYPE (dst->r_info) < R_NDS32_max)));
2985 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (dst->r_info));
2986}
2987
2988/* Support for core dump NOTE sections.
2989 Reference to include/linux/elfcore.h in Linux. */
2990
2991static bfd_boolean
2992nds32_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2993{
2994 int offset;
2995 size_t size;
2996
2997 switch (note->descsz)
2998 {
2999 case 0x114:
3000 /* Linux/NDS32 32-bit, ABI1 */
3001
3002 /* pr_cursig */
3003 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
3004
3005 /* pr_pid */
3006 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3007
3008 /* pr_reg */
3009 offset = 72;
3010 size = 200;
3011 break;
3012
3013 case 0xfc:
3014 /* Linux/NDS32 32-bit */
3015
3016 /* pr_cursig */
3017 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
3018
3019 /* pr_pid */
3020 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3021
3022 /* pr_reg */
3023 offset = 72;
3024 size = 176;
3025 break;
3026
3027 default:
3028 return FALSE;
3029 }
3030
3031 /* Make a ".reg" section. */
3032 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
3033 size, note->descpos + offset);
3034}
3035
3036static bfd_boolean
3037nds32_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
3038{
3039 switch (note->descsz)
3040 {
3041 case 124:
3042 /* Linux/NDS32 */
3043
3044 /* __kernel_uid_t, __kernel_gid_t are short on NDS32 platform. */
3045 elf_tdata (abfd)->core->program =
3046 _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
3047 elf_tdata (abfd)->core->command =
3048 _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2b804145 3049 break;
35c08157
KLC
3050
3051 default:
3052 return FALSE;
3053 }
3054
3055 /* Note that for some reason, a spurious space is tacked
3056 onto the end of the args in some (at least one anyway)
3057 implementations, so strip it off if it exists. */
3058 {
3059 char *command = elf_tdata (abfd)->core->command;
3060 int n = strlen (command);
3061
3062 if (0 < n && command[n - 1] == ' ')
3063 command[n - 1] = '\0';
3064 }
3065
3066 return TRUE;
3067}
3068
3069/* Hook called by the linker routine which adds symbols from an object
3070 file. We must handle the special NDS32 section numbers here.
3071 We also keep watching for whether we need to create the sdata special
3072 linker sections. */
3073
3074static bfd_boolean
3075nds32_elf_add_symbol_hook (bfd *abfd,
3076 struct bfd_link_info *info ATTRIBUTE_UNUSED,
3077 Elf_Internal_Sym *sym,
3078 const char **namep ATTRIBUTE_UNUSED,
3079 flagword *flagsp ATTRIBUTE_UNUSED,
3080 asection **secp, bfd_vma *valp)
3081{
3082 switch (sym->st_shndx)
3083 {
3084 case SHN_COMMON:
3085 /* Common symbols less than the GP size are automatically
3086 treated as SHN_MIPS_SCOMMON symbols. */
3087 if (sym->st_size > elf_gp_size (abfd)
3088 || ELF_ST_TYPE (sym->st_info) == STT_TLS)
3089 break;
3090
3091 /* st_value is the alignemnt constraint.
3092 That might be its actual size if it is an array or structure. */
3093 switch (sym->st_value)
3094 {
3095 case 1:
3096 *secp = bfd_make_section_old_way (abfd, ".scommon_b");
3097 break;
3098 case 2:
3099 *secp = bfd_make_section_old_way (abfd, ".scommon_h");
3100 break;
3101 case 4:
3102 *secp = bfd_make_section_old_way (abfd, ".scommon_w");
3103 break;
3104 case 8:
3105 *secp = bfd_make_section_old_way (abfd, ".scommon_d");
3106 break;
3107 default:
3108 return TRUE;
3109 }
3110
3111 (*secp)->flags |= SEC_IS_COMMON;
3112 *valp = sym->st_size;
3113 break;
3114 }
3115
3116 return TRUE;
3117}
3118
3119
3120/* This function can figure out the best location for a base register to access
3121 data relative to this base register
3122 INPUT:
3123 sda_d0: size of first DOUBLE WORD data section
3124 sda_w0: size of first WORD data section
3125 sda_h0: size of first HALF WORD data section
3126 sda_b : size of BYTE data section
3127 sda_hi: size of second HALF WORD data section
3128 sda_w1: size of second WORD data section
3129 sda_d1: size of second DOUBLE WORD data section
3130 OUTPUT:
3131 offset (always positive) from the beginning of sda_d0 if OK
3132 a negative error value if fail
3133 NOTE:
3134 these 7 sections have to be located back to back if exist
3135 a pass in 0 value for non-existing section */
3136
3137/* Due to the interpretation of simm15 field of load/store depending on
3138 data accessing size, the organization of base register relative data shall
3139 like the following figure
3140 -------------------------------------------
3141 | DOUBLE WORD sized data (range +/- 128K)
3142 -------------------------------------------
3143 | WORD sized data (range +/- 64K)
3144 -------------------------------------------
3145 | HALF WORD sized data (range +/- 32K)
3146 -------------------------------------------
3147 | BYTE sized data (range +/- 16K)
3148 -------------------------------------------
3149 | HALF WORD sized data (range +/- 32K)
3150 -------------------------------------------
3151 | WORD sized data (range +/- 64K)
3152 -------------------------------------------
3153 | DOUBLE WORD sized data (range +/- 128K)
3154 -------------------------------------------
3155 Its base register shall be set to access these data freely. */
3156
3157/* We have to figure out the SDA_BASE value, so that we can adjust the
3158 symbol value correctly. We look up the symbol _SDA_BASE_ in the output
3159 BFD. If we can't find it, we're stuck. We cache it in the ELF
3160 target data. We don't need to adjust the symbol value for an
3161 external symbol if we are producing relocatable output. */
3162
3163static asection *sda_rela_sec = NULL;
3164
1c8f6a4d 3165#define SDA_SECTION_NUM 10
35c08157
KLC
3166
3167static bfd_reloc_status_type
3168nds32_elf_final_sda_base (bfd *output_bfd, struct bfd_link_info *info,
3169 bfd_vma *psb, bfd_boolean add_symbol)
3170{
3171 int relax_fp_as_gp;
3172 struct elf_nds32_link_hash_table *table;
3173 struct bfd_link_hash_entry *h, *h2;
1c8f6a4d 3174 long unsigned int total = 0;
35c08157
KLC
3175
3176 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", FALSE, FALSE, TRUE);
3177 if (!h || (h->type != bfd_link_hash_defined && h->type != bfd_link_hash_defweak))
3178 {
3179 asection *first = NULL, *final = NULL, *temp;
3180 bfd_vma sda_base;
3181 /* The first section must be 4-byte aligned to promise _SDA_BASE_ being
3182 4 byte-aligned. Therefore, it has to set the first section ".data"
3183 4 byte-aligned. */
3184 static const char sec_name[SDA_SECTION_NUM][10] =
3185 {
3186 ".data", ".got", ".sdata_d", ".sdata_w", ".sdata_h", ".sdata_b",
1c8f6a4d 3187 ".sbss_b", ".sbss_h", ".sbss_w", ".sbss_d"
35c08157
KLC
3188 };
3189 size_t i = 0;
3190
3191 if (output_bfd->sections == NULL)
3192 {
3193 *psb = elf_gp (output_bfd);
3194 return bfd_reloc_ok;
3195 }
3196
3197 /* Get the first and final section. */
1c8f6a4d 3198 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
35c08157
KLC
3199 {
3200 temp = bfd_get_section_by_name (output_bfd, sec_name[i]);
3201 if (temp && !first && (temp->size != 0 || temp->rawsize != 0))
3202 first = temp;
3203 if (temp && (temp->size != 0 || temp->rawsize != 0))
3204 final = temp;
1c8f6a4d
KLC
3205
3206 /* Summarize the sections in order to check if joining .bss. */
3207 if (temp && temp->size != 0)
3208 total += temp->size;
3209 else if (temp && temp->rawsize != 0)
3210 total += temp->rawsize;
3211
35c08157
KLC
3212 i++;
3213 }
3214
1c8f6a4d
KLC
3215 /* Check .bss size. */
3216 temp = bfd_get_section_by_name (output_bfd, ".bss");
3217 if (temp)
3218 {
3219 if (temp->size != 0)
3220 total += temp->size;
3221 else if (temp->rawsize != 0)
3222 total += temp->rawsize;
3223
3224 if (total < 0x80000)
3225 {
3226 if (!first && (temp->size != 0 || temp->rawsize != 0))
3227 first = temp;
3228 if ((temp->size != 0 || temp->rawsize != 0))
3229 final = temp;
3230 }
3231 }
3232
35c08157
KLC
3233 if (first && final)
3234 {
3235 /* The middle of data region. */
1c8f6a4d 3236 sda_base = final->vma / 2 + final->rawsize / 2 + first->vma / 2;
35c08157
KLC
3237
3238 /* Find the section sda_base located. */
3239 i = 0;
1c8f6a4d 3240 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
35c08157
KLC
3241 {
3242 final = bfd_get_section_by_name (output_bfd, sec_name[i]);
3243 if (final && (final->size != 0 || final->rawsize != 0)
3244 && sda_base >= final->vma)
3245 {
3246 first = final;
3247 i++;
3248 }
3249 else
3250 break;
3251 }
3252 }
3253 else
3254 {
3255 /* There is not any data section in output bfd, and set _SDA_BASE_ in
3256 first output section. */
3257 first = output_bfd->sections;
3258 while (first && first->size == 0 && first->rawsize == 0)
3259 first = first->next;
3260 if (!first)
3261 {
3262 *psb = elf_gp (output_bfd);
3263 return bfd_reloc_ok;
3264 }
1c8f6a4d 3265 sda_base = first->vma + first->rawsize;
35c08157
KLC
3266 }
3267
3268 sda_base -= first->vma;
3269 sda_base = sda_base & (~7);
3270
3271 if (!_bfd_generic_link_add_one_symbol
3272 (info, output_bfd, "_SDA_BASE_", BSF_GLOBAL | BSF_WEAK, first,
3273 (bfd_vma) sda_base, (const char *) NULL, FALSE,
3274 get_elf_backend_data (output_bfd)->collect, &h))
3275 return FALSE;
3276
3277 sda_rela_sec = first;
3278
3279 table = nds32_elf_hash_table (info);
3280 relax_fp_as_gp = table->relax_fp_as_gp;
3281 if (relax_fp_as_gp)
3282 {
3283 h2 = bfd_link_hash_lookup (info->hash, FP_BASE_NAME,
3284 FALSE, FALSE, FALSE);
3285 /* Define a weak FP_BASE_NAME here to prevent the undefined symbol.
3286 And set FP equal to SDA_BASE to do relaxation for
3287 la $fp, _FP_BASE_. */
3288 if (!_bfd_generic_link_add_one_symbol
3289 (info, output_bfd, FP_BASE_NAME, BSF_GLOBAL | BSF_WEAK,
3290 first, (bfd_vma) sda_base, (const char *) NULL,
3291 FALSE, get_elf_backend_data (output_bfd)->collect, &h2))
3292 return FALSE;
3293 }
3294 }
3295
535b785f 3296 if (add_symbol)
35c08157
KLC
3297 {
3298 if (h)
3299 {
3300 /* Now set gp. */
3301 elf_gp (output_bfd) = (h->u.def.value
3302 + h->u.def.section->output_section->vma
3303 + h->u.def.section->output_offset);
3304 }
3305 else
3306 {
4eca0228 3307 _bfd_error_handler (_("error: Can't find symbol: _SDA_BASE_."));
35c08157
KLC
3308 return bfd_reloc_dangerous;
3309 }
3310 }
3311
3312 *psb = h->u.def.value + h->u.def.section->output_section->vma
3313 + h->u.def.section->output_offset;
3314 return bfd_reloc_ok;
3315}
3316\f
3317
3318/* Return size of a PLT entry. */
3319#define elf_nds32_sizeof_plt(info) PLT_ENTRY_SIZE
3320
3321
3322/* Create an entry in an nds32 ELF linker hash table. */
3323
3324static struct bfd_hash_entry *
3325nds32_elf_link_hash_newfunc (struct bfd_hash_entry *entry,
3326 struct bfd_hash_table *table,
3327 const char *string)
3328{
3329 struct elf_nds32_link_hash_entry *ret;
3330
3331 ret = (struct elf_nds32_link_hash_entry *) entry;
3332
3333 /* Allocate the structure if it has not already been allocated by a
3334 subclass. */
3335 if (ret == NULL)
3336 ret = (struct elf_nds32_link_hash_entry *)
3337 bfd_hash_allocate (table, sizeof (struct elf_nds32_link_hash_entry));
3338
3339 if (ret == NULL)
3340 return (struct bfd_hash_entry *) ret;
3341
3342 /* Call the allocation method of the superclass. */
3343 ret = (struct elf_nds32_link_hash_entry *)
3344 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, table, string);
3345
3346 if (ret != NULL)
3347 {
3348 struct elf_nds32_link_hash_entry *eh;
3349
3350 eh = (struct elf_nds32_link_hash_entry *) ret;
3351 eh->dyn_relocs = NULL;
1c8f6a4d 3352 eh->tls_type = GOT_UNKNOWN;
35c08157
KLC
3353 }
3354
3355 return (struct bfd_hash_entry *) ret;
3356}
3357
3358/* Create an nds32 ELF linker hash table. */
3359
3360static struct bfd_link_hash_table *
3361nds32_elf_link_hash_table_create (bfd *abfd)
3362{
3363 struct elf_nds32_link_hash_table *ret;
3364
3365 bfd_size_type amt = sizeof (struct elf_nds32_link_hash_table);
3366
3367 ret = (struct elf_nds32_link_hash_table *) bfd_zmalloc (amt);
3368 if (ret == NULL)
3369 return NULL;
3370
3371 /* patch tag. */
3372 if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
3373 nds32_elf_link_hash_newfunc,
3374 sizeof (struct elf_nds32_link_hash_entry),
3375 NDS32_ELF_DATA))
3376 {
3377 free (ret);
3378 return NULL;
3379 }
3380
35c08157
KLC
3381 return &ret->root.root;
3382}
3383
35c08157
KLC
3384/* Create dynamic sections when linking against a dynamic object. */
3385
3386static bfd_boolean
3387nds32_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
3388{
3389 struct elf_nds32_link_hash_table *htab;
3390 flagword flags, pltflags;
3391 register asection *s;
3392 const struct elf_backend_data *bed;
3393 int ptralign = 2; /* 32-bit */
3394
3395 bed = get_elf_backend_data (abfd);
3396
3397 htab = nds32_elf_hash_table (info);
3398
3399 /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and
3400 .rel[a].bss sections. */
3401
3402 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3403 | SEC_LINKER_CREATED);
3404
3405 pltflags = flags;
3406 pltflags |= SEC_CODE;
3407 if (bed->plt_not_loaded)
3408 pltflags &= ~(SEC_LOAD | SEC_HAS_CONTENTS);
3409 if (bed->plt_readonly)
3410 pltflags |= SEC_READONLY;
3411
3412 s = bfd_make_section (abfd, ".plt");
ce558b89 3413 htab->root.splt = s;
35c08157
KLC
3414 if (s == NULL
3415 || !bfd_set_section_flags (abfd, s, pltflags)
3416 || !bfd_set_section_alignment (abfd, s, bed->plt_alignment))
3417 return FALSE;
3418
3419 if (bed->want_plt_sym)
3420 {
3421 /* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the
3422 .plt section. */
3423 struct bfd_link_hash_entry *bh = NULL;
3424 struct elf_link_hash_entry *h;
3425
3426 if (!(_bfd_generic_link_add_one_symbol
3427 (info, abfd, "_PROCEDURE_LINKAGE_TABLE_", BSF_GLOBAL, s,
3428 (bfd_vma) 0, (const char *) NULL, FALSE,
3429 get_elf_backend_data (abfd)->collect, &bh)))
3430 return FALSE;
3431
3432 h = (struct elf_link_hash_entry *) bh;
3433 h->def_regular = 1;
3434 h->type = STT_OBJECT;
3435
0e1862bb 3436 if (bfd_link_pic (info) && !bfd_elf_link_record_dynamic_symbol (info, h))
35c08157
KLC
3437 return FALSE;
3438 }
3439
3440 s = bfd_make_section (abfd,
3441 bed->default_use_rela_p ? ".rela.plt" : ".rel.plt");
ce558b89 3442 htab->root.srelplt = s;
35c08157
KLC
3443 if (s == NULL
3444 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3445 || !bfd_set_section_alignment (abfd, s, ptralign))
3446 return FALSE;
3447
ce558b89 3448 if (htab->root.sgot == NULL && !_bfd_elf_create_got_section (abfd, info))
35c08157
KLC
3449 return FALSE;
3450
3451 {
3452 const char *secname;
3453 char *relname;
3454 flagword secflags;
3455 asection *sec;
3456
3457 for (sec = abfd->sections; sec; sec = sec->next)
3458 {
3459 secflags = bfd_get_section_flags (abfd, sec);
3460 if ((secflags & (SEC_DATA | SEC_LINKER_CREATED))
3461 || ((secflags & SEC_HAS_CONTENTS) != SEC_HAS_CONTENTS))
3462 continue;
3463 secname = bfd_get_section_name (abfd, sec);
3464 relname = (char *) bfd_malloc ((bfd_size_type) strlen (secname) + 6);
3465 strcpy (relname, ".rela");
3466 strcat (relname, secname);
3467 if (bfd_get_section_by_name (abfd, secname))
3468 continue;
3469 s = bfd_make_section (abfd, relname);
3470 if (s == NULL
3471 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3472 || !bfd_set_section_alignment (abfd, s, ptralign))
3473 return FALSE;
3474 }
3475 }
3476
3477 if (bed->want_dynbss)
3478 {
3479 /* The .dynbss section is a place to put symbols which are defined
3480 by dynamic objects, are referenced by regular objects, and are
3481 not functions. We must allocate space for them in the process
3482 image and use a R_*_COPY reloc to tell the dynamic linker to
3483 initialize them at run time. The linker script puts the .dynbss
3484 section into the .bss section of the final image. */
3485 s = bfd_make_section (abfd, ".dynbss");
3486 htab->sdynbss = s;
3487 if (s == NULL
3488 || !bfd_set_section_flags (abfd, s, SEC_ALLOC | SEC_LINKER_CREATED))
3489 return FALSE;
3490 /* The .rel[a].bss section holds copy relocs. This section is not
3491 normally needed. We need to create it here, though, so that the
3492 linker will map it to an output section. We can't just create it
3493 only if we need it, because we will not know whether we need it
3494 until we have seen all the input files, and the first time the
3495 main linker code calls BFD after examining all the input files
3496 (size_dynamic_sections) the input sections have already been
3497 mapped to the output sections. If the section turns out not to
3498 be needed, we can discard it later. We will never need this
3499 section when generating a shared object, since they do not use
3500 copy relocs. */
0e1862bb 3501 if (!bfd_link_pic (info))
35c08157
KLC
3502 {
3503 s = bfd_make_section (abfd, (bed->default_use_rela_p
3504 ? ".rela.bss" : ".rel.bss"));
3505 htab->srelbss = s;
3506 if (s == NULL
3507 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3508 || !bfd_set_section_alignment (abfd, s, ptralign))
3509 return FALSE;
3510 }
3511 }
3512
3513 return TRUE;
3514}
3515
3516/* Copy the extra info we tack onto an elf_link_hash_entry. */
3517static void
3518nds32_elf_copy_indirect_symbol (struct bfd_link_info *info,
3519 struct elf_link_hash_entry *dir,
3520 struct elf_link_hash_entry *ind)
3521{
3522 struct elf_nds32_link_hash_entry *edir, *eind;
3523
3524 edir = (struct elf_nds32_link_hash_entry *) dir;
3525 eind = (struct elf_nds32_link_hash_entry *) ind;
3526
3527 if (eind->dyn_relocs != NULL)
3528 {
3529 if (edir->dyn_relocs != NULL)
3530 {
3531 struct elf_nds32_dyn_relocs **pp;
3532 struct elf_nds32_dyn_relocs *p;
3533
3534 if (ind->root.type == bfd_link_hash_indirect)
3535 abort ();
3536
3537 /* Add reloc counts against the weak sym to the strong sym
3538 list. Merge any entries against the same section. */
3539 for (pp = &eind->dyn_relocs; (p = *pp) != NULL;)
3540 {
3541 struct elf_nds32_dyn_relocs *q;
3542
3543 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3544 if (q->sec == p->sec)
3545 {
3546 q->pc_count += p->pc_count;
3547 q->count += p->count;
3548 *pp = p->next;
3549 break;
3550 }
3551 if (q == NULL)
3552 pp = &p->next;
3553 }
3554 *pp = edir->dyn_relocs;
3555 }
3556
3557 edir->dyn_relocs = eind->dyn_relocs;
3558 eind->dyn_relocs = NULL;
3559 }
3560
3561 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3562}
3563\f
3564
3565/* Adjust a symbol defined by a dynamic object and referenced by a
3566 regular object. The current definition is in some section of the
3567 dynamic object, but we're not including those sections. We have to
3568 change the definition to something the rest of the link can
3569 understand. */
3570
3571static bfd_boolean
3572nds32_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
3573 struct elf_link_hash_entry *h)
3574{
3575 struct elf_nds32_link_hash_table *htab;
3576 struct elf_nds32_link_hash_entry *eh;
3577 struct elf_nds32_dyn_relocs *p;
3578 bfd *dynobj;
3579 asection *s;
3580 unsigned int power_of_two;
3581
3582 dynobj = elf_hash_table (info)->dynobj;
3583
3584 /* Make sure we know what is going on here. */
3585 BFD_ASSERT (dynobj != NULL
3586 && (h->needs_plt
3587 || h->u.weakdef != NULL
3588 || (h->def_dynamic && h->ref_regular && !h->def_regular)));
3589
3590
3591 /* If this is a function, put it in the procedure linkage table. We
3592 will fill in the contents of the procedure linkage table later,
3593 when we know the address of the .got section. */
3594 if (h->type == STT_FUNC || h->needs_plt)
3595 {
0e1862bb 3596 if (!bfd_link_pic (info)
35c08157
KLC
3597 && !h->def_dynamic
3598 && !h->ref_dynamic
3599 && h->root.type != bfd_link_hash_undefweak
3600 && h->root.type != bfd_link_hash_undefined)
3601 {
3602 /* This case can occur if we saw a PLT reloc in an input
3603 file, but the symbol was never referred to by a dynamic
3604 object. In such a case, we don't actually need to build
3605 a procedure linkage table, and we can just do a PCREL
3606 reloc instead. */
3607 h->plt.offset = (bfd_vma) - 1;
3608 h->needs_plt = 0;
3609 }
3610
3611 return TRUE;
3612 }
3613 else
3614 h->plt.offset = (bfd_vma) - 1;
3615
3616 /* If this is a weak symbol, and there is a real definition, the
3617 processor independent code will have arranged for us to see the
3618 real definition first, and we can just use the same value. */
3619 if (h->u.weakdef != NULL)
3620 {
3621 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
3622 || h->u.weakdef->root.type == bfd_link_hash_defweak);
3623 h->root.u.def.section = h->u.weakdef->root.u.def.section;
3624 h->root.u.def.value = h->u.weakdef->root.u.def.value;
3625 return TRUE;
3626 }
3627
3628 /* This is a reference to a symbol defined by a dynamic object which
3629 is not a function. */
3630
3631 /* If we are creating a shared library, we must presume that the
3632 only references to the symbol are via the global offset table.
3633 For such cases we need not do anything here; the relocations will
3634 be handled correctly by relocate_section. */
0e1862bb 3635 if (bfd_link_pic (info))
35c08157
KLC
3636 return TRUE;
3637
3638 /* If there are no references to this symbol that do not use the
3639 GOT, we don't need to generate a copy reloc. */
3640 if (!h->non_got_ref)
3641 return TRUE;
3642
3643 /* If -z nocopyreloc was given, we won't generate them either. */
3644 if (info->nocopyreloc)
3645 {
3646 h->non_got_ref = 0;
3647 return TRUE;
3648 }
3649
3650 eh = (struct elf_nds32_link_hash_entry *) h;
3651 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3652 {
3653 s = p->sec->output_section;
3654 if (s != NULL && (s->flags & (SEC_READONLY | SEC_HAS_CONTENTS)) != 0)
3655 break;
3656 }
3657
3658 /* If we didn't find any dynamic relocs in sections which needs the
3659 copy reloc, then we'll be keeping the dynamic relocs and avoiding
3660 the copy reloc. */
3661 if (p == NULL)
3662 {
3663 h->non_got_ref = 0;
3664 return TRUE;
3665 }
3666
3667 /* We must allocate the symbol in our .dynbss section, which will
3668 become part of the .bss section of the executable. There will be
3669 an entry for this symbol in the .dynsym section. The dynamic
3670 object will contain position independent code, so all references
3671 from the dynamic object to this symbol will go through the global
3672 offset table. The dynamic linker will use the .dynsym entry to
3673 determine the address it must put in the global offset table, so
3674 both the dynamic object and the regular object will refer to the
3675 same memory location for the variable. */
3676
3677 htab = nds32_elf_hash_table (info);
3678 s = htab->sdynbss;
3679 BFD_ASSERT (s != NULL);
3680
3681 /* We must generate a R_NDS32_COPY reloc to tell the dynamic linker
3682 to copy the initial value out of the dynamic object and into the
3683 runtime process image. We need to remember the offset into the
3684 .rela.bss section we are going to use. */
3685 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
3686 {
3687 asection *srel;
3688
3689 srel = htab->srelbss;
3690 BFD_ASSERT (srel != NULL);
3691 srel->size += sizeof (Elf32_External_Rela);
3692 h->needs_copy = 1;
3693 }
3694
3695 /* We need to figure out the alignment required for this symbol. I
3696 have no idea how ELF linkers handle this. */
3697 power_of_two = bfd_log2 (h->size);
3698 if (power_of_two > 3)
3699 power_of_two = 3;
3700
3701 /* Apply the required alignment. */
3702 s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two));
3703 if (power_of_two > bfd_get_section_alignment (dynobj, s))
3704 {
3705 if (!bfd_set_section_alignment (dynobj, s, power_of_two))
3706 return FALSE;
3707 }
3708
3709 /* Define the symbol as being at this point in the section. */
3710 h->root.u.def.section = s;
3711 h->root.u.def.value = s->size;
3712
3713 /* Increment the section size to make room for the symbol. */
3714 s->size += h->size;
3715
3716 return TRUE;
3717}
3718
3719/* Allocate space in .plt, .got and associated reloc sections for
3720 dynamic relocs. */
3721
3722static bfd_boolean
3723allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3724{
3725 struct bfd_link_info *info;
3726 struct elf_nds32_link_hash_table *htab;
3727 struct elf_nds32_link_hash_entry *eh;
3728 struct elf_nds32_dyn_relocs *p;
3729
3730 if (h->root.type == bfd_link_hash_indirect)
3731 return TRUE;
3732
3733 if (h->root.type == bfd_link_hash_warning)
3734 /* When warning symbols are created, they **replace** the "real"
3735 entry in the hash table, thus we never get to see the real
3736 symbol in a hash traversal. So look at it now. */
3737 h = (struct elf_link_hash_entry *) h->root.u.i.link;
3738
3739 info = (struct bfd_link_info *) inf;
3740 htab = nds32_elf_hash_table (info);
3741
3742 eh = (struct elf_nds32_link_hash_entry *) h;
3743
3744 if (htab->root.dynamic_sections_created && h->plt.refcount > 0)
3745 {
3746 /* Make sure this symbol is output as a dynamic symbol.
3747 Undefined weak syms won't yet be marked as dynamic. */
3748 if (h->dynindx == -1 && !h->forced_local)
3749 {
3750 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3751 return FALSE;
3752 }
3753
0e1862bb 3754 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, bfd_link_pic (info), h))
35c08157 3755 {
ce558b89 3756 asection *s = htab->root.splt;
35c08157
KLC
3757
3758 /* If this is the first .plt entry, make room for the special
3759 first entry. */
3760 if (s->size == 0)
3761 s->size += PLT_ENTRY_SIZE;
3762
3763 h->plt.offset = s->size;
3764
3765 /* If this symbol is not defined in a regular file, and we are
3766 not generating a shared library, then set the symbol to this
3767 location in the .plt. This is required to make function
3768 pointers compare as equal between the normal executable and
3769 the shared library. */
0e1862bb 3770 if (!bfd_link_pic (info) && !h->def_regular)
35c08157
KLC
3771 {
3772 h->root.u.def.section = s;
3773 h->root.u.def.value = h->plt.offset;
3774 }
3775
3776 /* Make room for this entry. */
3777 s->size += PLT_ENTRY_SIZE;
3778
3779 /* We also need to make an entry in the .got.plt section, which
3780 will be placed in the .got section by the linker script. */
ce558b89 3781 htab->root.sgotplt->size += 4;
35c08157
KLC
3782
3783 /* We also need to make an entry in the .rel.plt section. */
ce558b89 3784 htab->root.srelplt->size += sizeof (Elf32_External_Rela);
35c08157
KLC
3785 }
3786 else
3787 {
3788 h->plt.offset = (bfd_vma) - 1;
3789 h->needs_plt = 0;
3790 }
3791 }
3792 else
3793 {
3794 h->plt.offset = (bfd_vma) - 1;
3795 h->needs_plt = 0;
3796 }
3797
3798 if (h->got.refcount > 0)
3799 {
3800 asection *s;
3801 bfd_boolean dyn;
1c8f6a4d 3802 int tls_type = elf32_nds32_hash_entry (h)->tls_type;
35c08157
KLC
3803
3804 /* Make sure this symbol is output as a dynamic symbol.
3805 Undefined weak syms won't yet be marked as dynamic. */
3806 if (h->dynindx == -1 && !h->forced_local)
3807 {
3808 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3809 return FALSE;
3810 }
3811
ce558b89 3812 s = htab->root.sgot;
35c08157 3813 h->got.offset = s->size;
1c8f6a4d
KLC
3814
3815 if (tls_type == GOT_UNKNOWN)
3816 abort ();
3817 else if (tls_type == GOT_NORMAL
3818 || tls_type == GOT_TLS_IE)
3819 /* Need a GOT slot. */
3820 s->size += 4;
3821
35c08157 3822 dyn = htab->root.dynamic_sections_created;
0e1862bb 3823 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h))
ce558b89 3824 htab->root.srelgot->size += sizeof (Elf32_External_Rela);
35c08157
KLC
3825 }
3826 else
3827 h->got.offset = (bfd_vma) - 1;
3828
3829 if (eh->dyn_relocs == NULL)
3830 return TRUE;
3831
3832 /* In the shared -Bsymbolic case, discard space allocated for
3833 dynamic pc-relative relocs against symbols which turn out to be
3834 defined in regular objects. For the normal shared case, discard
3835 space for pc-relative relocs that have become local due to symbol
3836 visibility changes. */
3837
0e1862bb 3838 if (bfd_link_pic (info))
35c08157
KLC
3839 {
3840 if (h->def_regular && (h->forced_local || info->symbolic))
3841 {
3842 struct elf_nds32_dyn_relocs **pp;
3843
3844 for (pp = &eh->dyn_relocs; (p = *pp) != NULL;)
3845 {
3846 p->count -= p->pc_count;
3847 p->pc_count = 0;
3848 if (p->count == 0)
3849 *pp = p->next;
3850 else
3851 pp = &p->next;
3852 }
3853 }
3854 }
3855 else
3856 {
3857 /* For the non-shared case, discard space for relocs against
3858 symbols which turn out to need copy relocs or are not dynamic. */
3859
3860 if (!h->non_got_ref
3861 && ((h->def_dynamic
3862 && !h->def_regular)
3863 || (htab->root.dynamic_sections_created
3864 && (h->root.type == bfd_link_hash_undefweak
3865 || h->root.type == bfd_link_hash_undefined))))
3866 {
3867 /* Make sure this symbol is output as a dynamic symbol.
3868 Undefined weak syms won't yet be marked as dynamic. */
3869 if (h->dynindx == -1 && !h->forced_local)
3870 {
3871 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3872 return FALSE;
3873 }
3874
3875 /* If that succeeded, we know we'll be keeping all the
3876 relocs. */
3877 if (h->dynindx != -1)
3878 goto keep;
3879 }
3880
3881 eh->dyn_relocs = NULL;
3882
3883 keep:;
3884 }
3885
3886 /* Finally, allocate space. */
3887 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3888 {
3889 asection *sreloc = elf_section_data (p->sec)->sreloc;
3890 sreloc->size += p->count * sizeof (Elf32_External_Rela);
3891 }
3892
3893 return TRUE;
3894}
3895
3896/* Find any dynamic relocs that apply to read-only sections. */
3897
3898static bfd_boolean
3899readonly_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3900{
3901 struct elf_nds32_link_hash_entry *eh;
3902 struct elf_nds32_dyn_relocs *p;
3903
3904 if (h->root.type == bfd_link_hash_warning)
3905 h = (struct elf_link_hash_entry *) h->root.u.i.link;
3906
3907 eh = (struct elf_nds32_link_hash_entry *) h;
3908 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3909 {
3910 asection *s = p->sec->output_section;
3911
3912 if (s != NULL && (s->flags & SEC_READONLY) != 0)
3913 {
3914 struct bfd_link_info *info = (struct bfd_link_info *) inf;
3915
3916 info->flags |= DF_TEXTREL;
3917
3918 /* Not an error, just cut short the traversal. */
3919 return FALSE;
3920 }
3921 }
3922 return TRUE;
3923}
3924
3925/* Set the sizes of the dynamic sections. */
3926
3927static bfd_boolean
3928nds32_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
3929 struct bfd_link_info *info)
3930{
3931 struct elf_nds32_link_hash_table *htab;
3932 bfd *dynobj;
3933 asection *s;
3934 bfd_boolean relocs;
3935 bfd *ibfd;
3936
3937 htab = nds32_elf_hash_table (info);
3938 dynobj = htab->root.dynobj;
3939 BFD_ASSERT (dynobj != NULL);
3940
3941 if (htab->root.dynamic_sections_created)
3942 {
3943 /* Set the contents of the .interp section to the interpreter. */
f5233a16 3944 if (bfd_link_executable (info) && !info->nointerp)
35c08157
KLC
3945 {
3946 s = bfd_get_section_by_name (dynobj, ".interp");
3947 BFD_ASSERT (s != NULL);
3948 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
3949 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
3950 }
3951 }
3952
3953 /* Set up .got offsets for local syms, and space for local dynamic
3954 relocs. */
c72f2fb2 3955 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
35c08157
KLC
3956 {
3957 bfd_signed_vma *local_got;
3958 bfd_signed_vma *end_local_got;
3959 bfd_size_type locsymcount;
3960 Elf_Internal_Shdr *symtab_hdr;
3961 asection *srel;
3962
3963 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour)
3964 continue;
3965
3966 for (s = ibfd->sections; s != NULL; s = s->next)
3967 {
3968 struct elf_nds32_dyn_relocs *p;
3969
3970 for (p = ((struct elf_nds32_dyn_relocs *)
3971 elf_section_data (s)->local_dynrel);
3972 p != NULL; p = p->next)
3973 {
3974 if (!bfd_is_abs_section (p->sec)
3975 && bfd_is_abs_section (p->sec->output_section))
3976 {
3977 /* Input section has been discarded, either because
3978 it is a copy of a linkonce section or due to
3979 linker script /DISCARD/, so we'll be discarding
3980 the relocs too. */
3981 }
3982 else if (p->count != 0)
3983 {
3984 srel = elf_section_data (p->sec)->sreloc;
3985 srel->size += p->count * sizeof (Elf32_External_Rela);
3986 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
3987 info->flags |= DF_TEXTREL;
3988 }
3989 }
3990 }
3991
3992 local_got = elf_local_got_refcounts (ibfd);
3993 if (!local_got)
3994 continue;
3995
3996 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
3997 locsymcount = symtab_hdr->sh_info;
3998 end_local_got = local_got + locsymcount;
ce558b89
AM
3999 s = htab->root.sgot;
4000 srel = htab->root.srelgot;
35c08157
KLC
4001 for (; local_got < end_local_got; ++local_got)
4002 {
4003 if (*local_got > 0)
4004 {
4005 *local_got = s->size;
4006 s->size += 4;
0e1862bb 4007 if (bfd_link_pic (info))
35c08157
KLC
4008 srel->size += sizeof (Elf32_External_Rela);
4009 }
4010 else
4011 *local_got = (bfd_vma) - 1;
4012 }
4013 }
4014
4015 /* Allocate global sym .plt and .got entries, and space for global
4016 sym dynamic relocs. */
4017 elf_link_hash_traverse (&htab->root, allocate_dynrelocs, (void *) info);
4018
4019 /* We now have determined the sizes of the various dynamic sections.
4020 Allocate memory for them. */
4021 relocs = FALSE;
4022 for (s = dynobj->sections; s != NULL; s = s->next)
4023 {
4024 if ((s->flags & SEC_LINKER_CREATED) == 0)
4025 continue;
4026
ce558b89 4027 if (s == htab->root.splt)
35c08157
KLC
4028 {
4029 /* Strip this section if we don't need it; see the
4030 comment below. */
4031 }
ce558b89 4032 else if (s == htab->root.sgot)
35c08157
KLC
4033 {
4034 got_size += s->size;
4035 }
ce558b89 4036 else if (s == htab->root.sgotplt)
35c08157
KLC
4037 {
4038 got_size += s->size;
4039 }
4040 else if (strncmp (bfd_get_section_name (dynobj, s), ".rela", 5) == 0)
4041 {
ce558b89 4042 if (s->size != 0 && s != htab->root.srelplt)
35c08157
KLC
4043 relocs = TRUE;
4044
4045 /* We use the reloc_count field as a counter if we need
4046 to copy relocs into the output file. */
4047 s->reloc_count = 0;
4048 }
4049 else
4050 {
4051 /* It's not one of our sections, so don't allocate space. */
4052 continue;
4053 }
4054
4055 if (s->size == 0)
4056 {
4057 /* If we don't need this section, strip it from the
4058 output file. This is mostly to handle .rela.bss and
4059 .rela.plt. We must create both sections in
4060 create_dynamic_sections, because they must be created
4061 before the linker maps input sections to output
4062 sections. The linker does that before
4063 adjust_dynamic_symbol is called, and it is that
4064 function which decides whether anything needs to go
4065 into these sections. */
4066 s->flags |= SEC_EXCLUDE;
4067 continue;
4068 }
4069
4070 /* Allocate memory for the section contents. We use bfd_zalloc
4071 here in case unused entries are not reclaimed before the
4072 section's contents are written out. This should not happen,
4073 but this way if it does, we get a R_NDS32_NONE reloc instead
4074 of garbage. */
4075 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
4076 if (s->contents == NULL)
4077 return FALSE;
4078 }
4079
4080
4081 if (htab->root.dynamic_sections_created)
4082 {
4083 /* Add some entries to the .dynamic section. We fill in the
4084 values later, in nds32_elf_finish_dynamic_sections, but we
4085 must add the entries now so that we get the correct size for
4086 the .dynamic section. The DT_DEBUG entry is filled in by the
4087 dynamic linker and used by the debugger. */
4088#define add_dynamic_entry(TAG, VAL) \
4089 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
4090
0e1862bb 4091 if (!bfd_link_pic (info))
35c08157
KLC
4092 {
4093 if (!add_dynamic_entry (DT_DEBUG, 0))
4094 return FALSE;
4095 }
4096
ce558b89 4097 if (htab->root.splt->size != 0)
35c08157
KLC
4098 {
4099 if (!add_dynamic_entry (DT_PLTGOT, 0)
4100 || !add_dynamic_entry (DT_PLTRELSZ, 0)
4101 || !add_dynamic_entry (DT_PLTREL, DT_RELA)
4102 || !add_dynamic_entry (DT_JMPREL, 0))
4103 return FALSE;
4104 }
4105
4106 if (relocs)
4107 {
4108 if (!add_dynamic_entry (DT_RELA, 0)
4109 || !add_dynamic_entry (DT_RELASZ, 0)
4110 || !add_dynamic_entry (DT_RELAENT, sizeof (Elf32_External_Rela)))
4111 return FALSE;
4112
4113 /* If any dynamic relocs apply to a read-only section,
4114 then we need a DT_TEXTREL entry. */
4115 if ((info->flags & DF_TEXTREL) == 0)
4116 elf_link_hash_traverse (&htab->root, readonly_dynrelocs,
4117 (void *) info);
4118
4119 if ((info->flags & DF_TEXTREL) != 0)
4120 {
4121 if (!add_dynamic_entry (DT_TEXTREL, 0))
4122 return FALSE;
4123 }
4124 }
4125 }
4126#undef add_dynamic_entry
4127
4128 return TRUE;
4129}
4130
4131static bfd_reloc_status_type
4132nds32_relocate_contents (reloc_howto_type *howto, bfd *input_bfd,
4133 bfd_vma relocation, bfd_byte *location)
4134{
4135 int size;
4136 bfd_vma x = 0;
4137 bfd_reloc_status_type flag;
4138 unsigned int rightshift = howto->rightshift;
4139 unsigned int bitpos = howto->bitpos;
4140
4141 /* If the size is negative, negate RELOCATION. This isn't very
4142 general. */
4143 if (howto->size < 0)
4144 relocation = -relocation;
4145
4146 /* Get the value we are going to relocate. */
4147 size = bfd_get_reloc_size (howto);
4148 switch (size)
4149 {
4150 default:
35c08157
KLC
4151 abort ();
4152 break;
6346d5ca
AM
4153 case 0:
4154 return bfd_reloc_ok;
35c08157
KLC
4155 case 2:
4156 x = bfd_getb16 (location);
4157 break;
4158 case 4:
4159 x = bfd_getb32 (location);
4160 break;
4161 }
4162
4163 /* Check for overflow. FIXME: We may drop bits during the addition
4164 which we don't check for. We must either check at every single
4165 operation, which would be tedious, or we must do the computations
4166 in a type larger than bfd_vma, which would be inefficient. */
4167 flag = bfd_reloc_ok;
4168 if (howto->complain_on_overflow != complain_overflow_dont)
4169 {
4170 bfd_vma addrmask, fieldmask, signmask, ss;
4171 bfd_vma a, b, sum;
4172
4173 /* Get the values to be added together. For signed and unsigned
4174 relocations, we assume that all values should be truncated to
4175 the size of an address. For bitfields, all the bits matter.
4176 See also bfd_check_overflow. */
4177 fieldmask = N_ONES (howto->bitsize);
4178 signmask = ~fieldmask;
4179 addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask;
4180 a = (relocation & addrmask) >> rightshift;
4181 b = (x & howto->src_mask & addrmask) >> bitpos;
4182
4183 switch (howto->complain_on_overflow)
4184 {
4185 case complain_overflow_signed:
4186 /* If any sign bits are set, all sign bits must be set.
4187 That is, A must be a valid negative address after
4188 shifting. */
4189 signmask = ~(fieldmask >> 1);
4190 /* Fall through. */
4191
4192 case complain_overflow_bitfield:
4193 /* Much like the signed check, but for a field one bit
4194 wider. We allow a bitfield to represent numbers in the
4195 range -2**n to 2**n-1, where n is the number of bits in the
4196 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
4197 can't overflow, which is exactly what we want. */
4198 ss = a & signmask;
4199 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
4200 flag = bfd_reloc_overflow;
4201
4202 /* We only need this next bit of code if the sign bit of B
4203 is below the sign bit of A. This would only happen if
4204 SRC_MASK had fewer bits than BITSIZE. Note that if
4205 SRC_MASK has more bits than BITSIZE, we can get into
4206 trouble; we would need to verify that B is in range, as
4207 we do for A above. */
4208 ss = ((~howto->src_mask) >> 1) & howto->src_mask;
4209 ss >>= bitpos;
4210
4211 /* Set all the bits above the sign bit. */
4212 b = (b ^ ss) - ss;
4213
4214 /* Now we can do the addition. */
4215 sum = a + b;
4216
4217 /* See if the result has the correct sign. Bits above the
4218 sign bit are junk now; ignore them. If the sum is
4219 positive, make sure we did not have all negative inputs;
4220 if the sum is negative, make sure we did not have all
4221 positive inputs. The test below looks only at the sign
4222 bits, and it really just
4223 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
4224
4225 We mask with addrmask here to explicitly allow an address
4226 wrap-around. The Linux kernel relies on it, and it is
4227 the only way to write assembler code which can run when
4228 loaded at a location 0x80000000 away from the location at
4229 which it is linked. */
4230 if (((~(a ^ b)) & (a ^ sum)) & signmask & addrmask)
4231 flag = bfd_reloc_overflow;
4232
4233 break;
4234
4235 case complain_overflow_unsigned:
4236 /* Checking for an unsigned overflow is relatively easy:
4237 trim the addresses and add, and trim the result as well.
4238 Overflow is normally indicated when the result does not
4239 fit in the field. However, we also need to consider the
4240 case when, e.g., fieldmask is 0x7fffffff or smaller, an
4241 input is 0x80000000, and bfd_vma is only 32 bits; then we
4242 will get sum == 0, but there is an overflow, since the
4243 inputs did not fit in the field. Instead of doing a
4244 separate test, we can check for this by or-ing in the
4245 operands when testing for the sum overflowing its final
4246 field. */
4247 sum = (a + b) & addrmask;
4248 if ((a | b | sum) & signmask)
4249 flag = bfd_reloc_overflow;
4250 break;
4251
4252 default:
4253 abort ();
4254 }
4255 }
4256
4257 /* Put RELOCATION in the right bits. */
4258 relocation >>= (bfd_vma) rightshift;
4259 relocation <<= (bfd_vma) bitpos;
4260
4261 /* Add RELOCATION to the right bits of X. */
4262 /* FIXME : 090616
4263 Because the relaxation may generate duplicate relocation at one address,
4264 an addition to immediate in the instruction may cause the relocation added
4265 several times.
4266 This bug should be fixed in assembler, but a check is also needed here. */
4267 if (howto->partial_inplace)
4268 x = ((x & ~howto->dst_mask)
4269 | (((x & howto->src_mask) + relocation) & howto->dst_mask));
4270 else
4271 x = ((x & ~howto->dst_mask) | ((relocation) & howto->dst_mask));
4272
4273
4274 /* Put the relocated value back in the object file. */
4275 switch (size)
4276 {
4277 default:
4278 case 0:
4279 case 1:
4280 case 8:
4281 abort ();
4282 break;
4283 case 2:
4284 bfd_putb16 (x, location);
4285 break;
4286 case 4:
4287 bfd_putb32 (x, location);
4288 break;
4289 }
4290
4291 return flag;
4292}
4293
4294static bfd_reloc_status_type
4295nds32_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd,
4296 asection *input_section, bfd_byte *contents,
4297 bfd_vma address, bfd_vma value, bfd_vma addend)
4298{
4299 bfd_vma relocation;
4300
4301 /* Sanity check the address. */
4302 if (address > bfd_get_section_limit (input_bfd, input_section))
4303 return bfd_reloc_outofrange;
4304
4305 /* This function assumes that we are dealing with a basic relocation
4306 against a symbol. We want to compute the value of the symbol to
4307 relocate to. This is just VALUE, the value of the symbol, plus
4308 ADDEND, any addend associated with the reloc. */
4309 relocation = value + addend;
4310
4311 /* If the relocation is PC relative, we want to set RELOCATION to
4312 the distance between the symbol (currently in RELOCATION) and the
4313 location we are relocating. Some targets (e.g., i386-aout)
4314 arrange for the contents of the section to be the negative of the
4315 offset of the location within the section; for such targets
4316 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
4317 simply leave the contents of the section as zero; for such
4318 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
4319 need to subtract out the offset of the location within the
4320 section (which is just ADDRESS). */
4321 if (howto->pc_relative)
4322 {
4323 relocation -= (input_section->output_section->vma
4324 + input_section->output_offset);
4325 if (howto->pcrel_offset)
4326 relocation -= address;
4327 }
4328
4329 return nds32_relocate_contents (howto, input_bfd, relocation,
4330 contents + address);
4331}
4332
4333static bfd_boolean
4334nds32_elf_output_symbol_hook (struct bfd_link_info *info,
4335 const char *name,
4336 Elf_Internal_Sym *elfsym ATTRIBUTE_UNUSED,
4337 asection *input_sec,
4338 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
4339{
4340 const char *source;
4341 FILE *sym_ld_script = NULL;
4342 struct elf_nds32_link_hash_table *table;
4343
4344 table = nds32_elf_hash_table (info);
4345 sym_ld_script = table->sym_ld_script;
4346 if (!sym_ld_script)
4347 return TRUE;
4348
4349 if (!h || !name || *name == '\0')
4350 return TRUE;
4351
4352 if (input_sec->flags & SEC_EXCLUDE)
4353 return TRUE;
4354
4355 if (!check_start_export_sym)
4356 {
4357 fprintf (sym_ld_script, "SECTIONS\n{\n");
4358 check_start_export_sym = 1;
4359 }
4360
4361 if (h->root.type == bfd_link_hash_defined
4362 || h->root.type == bfd_link_hash_defweak)
4363 {
4364 if (!h->root.u.def.section->output_section)
4365 return TRUE;
4366
4367 if (bfd_is_const_section (input_sec))
4368 source = input_sec->name;
4369 else
4370 source = input_sec->owner->filename;
4371
4372 fprintf (sym_ld_script, "\t%s = 0x%08lx;\t /* %s */\n",
4373 h->root.root.string,
4374 (long) (h->root.u.def.value
4375 + h->root.u.def.section->output_section->vma
4376 + h->root.u.def.section->output_offset), source);
4377 }
4378
4379 return TRUE;
4380}
4381
4382/* Relocate an NDS32/D ELF section.
4383 There is some attempt to make this function usable for many architectures,
4384 both for RELA and REL type relocs, if only to serve as a learning tool.
4385
4386 The RELOCATE_SECTION function is called by the new ELF backend linker
4387 to handle the relocations for a section.
4388
4389 The relocs are always passed as Rela structures; if the section
4390 actually uses Rel structures, the r_addend field will always be
4391 zero.
4392
4393 This function is responsible for adjust the section contents as
4394 necessary, and (if using Rela relocs and generating a
4395 relocatable output file) adjusting the reloc addend as
4396 necessary.
4397
4398 This function does not have to worry about setting the reloc
4399 address or the reloc symbol index.
4400
4401 LOCAL_SYMS is a pointer to the swapped in local symbols.
4402
4403 LOCAL_SECTIONS is an array giving the section in the input file
4404 corresponding to the st_shndx field of each local symbol.
4405
4406 The global hash table entry for the global symbols can be found
4407 via elf_sym_hashes (input_bfd).
4408
4409 When generating relocatable output, this function must handle
4410 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
4411 going to be the section symbol corresponding to the output
4412 section, which means that the addend must be adjusted
4413 accordingly. */
4414
1c8f6a4d
KLC
4415static bfd_vma
4416dtpoff_base (struct bfd_link_info *info)
4417{
4418 /* If tls_sec is NULL, we should have signalled an error already. */
4419 if (elf_hash_table (info)->tls_sec == NULL)
4420 return 0;
4421 return elf_hash_table (info)->tls_sec->vma;
4422}
4423
35c08157
KLC
4424static bfd_boolean
4425nds32_elf_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED,
4426 struct bfd_link_info * info,
4427 bfd * input_bfd,
4428 asection * input_section,
4429 bfd_byte * contents,
4430 Elf_Internal_Rela * relocs,
4431 Elf_Internal_Sym * local_syms,
4432 asection ** local_sections)
4433{
4434 Elf_Internal_Shdr *symtab_hdr;
4435 struct elf_link_hash_entry **sym_hashes;
4436 Elf_Internal_Rela *rel, *relend;
4437 bfd_boolean ret = TRUE; /* Assume success. */
4438 int align = 0;
4439 bfd_reloc_status_type r;
4440 const char *errmsg = NULL;
4441 bfd_vma gp;
4442 struct elf_nds32_link_hash_table *htab;
4443 bfd *dynobj;
4444 bfd_vma *local_got_offsets;
4445 asection *sgot, *splt, *sreloc;
4446 bfd_vma high_address;
4447 struct elf_nds32_link_hash_table *table;
4448 int eliminate_gc_relocs;
4449 bfd_vma fpbase_addr;
4450
4451 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4452 sym_hashes = elf_sym_hashes (input_bfd);
4453 htab = nds32_elf_hash_table (info);
4454 high_address = bfd_get_section_limit (input_bfd, input_section);
4455
4456 dynobj = htab->root.dynobj;
4457 local_got_offsets = elf_local_got_offsets (input_bfd);
4458
ce558b89
AM
4459 sgot = htab->root.sgot;
4460 splt = htab->root.splt;
35c08157
KLC
4461 sreloc = NULL;
4462
4463 rel = relocs;
4464 relend = relocs + input_section->reloc_count;
4465
4466 table = nds32_elf_hash_table (info);
4467 eliminate_gc_relocs = table->eliminate_gc_relocs;
4468 /* By this time, we can adjust the value of _SDA_BASE_. */
0e1862bb 4469 if ((!bfd_link_relocatable (info)))
35c08157
KLC
4470 {
4471 is_SDA_BASE_set = 1;
4472 r = nds32_elf_final_sda_base (output_bfd, info, &gp, TRUE);
4473 if (r != bfd_reloc_ok)
4474 return FALSE;
4475 }
4476
0c4bd9d9
KLC
4477 if (is_ITB_BASE_set == 0)
4478 {
4479 /* Set the _ITB_BASE_. */
4480 if (!nds32_elf_ex9_itb_base (info))
4481 {
4eca0228
AM
4482 _bfd_error_handler (_("%B: error: Cannot set _ITB_BASE_"),
4483 output_bfd);
0c4bd9d9
KLC
4484 bfd_set_error (bfd_error_bad_value);
4485 }
4486 }
4487
1c8f6a4d
KLC
4488 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
4489 if (!nds32_elf_ifc_reloc ())
4eca0228 4490 _bfd_error_handler (_("error: IFC relocation error."));
1c8f6a4d
KLC
4491
4492 /* Relocation for .ex9.itable. */
4493 if (table->target_optimize & NDS32_RELAX_EX9_ON
4494 || (table->ex9_import_file && table->update_ex9_table))
4495 nds32_elf_ex9_reloc_jmp (info);
4496
35c08157
KLC
4497 /* Use gp as fp to prevent truncated fit. Because in relaxation time
4498 the fp value is set as gp, and it has be reverted for instruction
4499 setting fp. */
4500 fpbase_addr = elf_gp (output_bfd);
4501
4502 for (rel = relocs; rel < relend; rel++)
4503 {
4504 enum elf_nds32_reloc_type r_type;
4505 reloc_howto_type *howto = NULL;
4506 unsigned long r_symndx;
4507 struct elf_link_hash_entry *h = NULL;
4508 Elf_Internal_Sym *sym = NULL;
4509 asection *sec;
4510 bfd_vma relocation;
4511
4512 /* We can't modify r_addend here as elf_link_input_bfd has an assert to
4513 ensure it's zero (we use REL relocs, not RELA). Therefore this
4514 should be assigning zero to `addend', but for clarity we use
4515 `r_addend'. */
4516
4517 bfd_vma addend = rel->r_addend;
4518 bfd_vma offset = rel->r_offset;
4519
4520 r_type = ELF32_R_TYPE (rel->r_info);
4521 if (r_type >= R_NDS32_max)
4522 {
695344c0 4523 /* xgettext:c-format */
4eca0228
AM
4524 _bfd_error_handler (_("%B: error: unknown relocation type %d."),
4525 input_bfd, r_type);
35c08157
KLC
4526 bfd_set_error (bfd_error_bad_value);
4527 ret = FALSE;
4528 continue;
4529 }
4530
4531 if (r_type == R_NDS32_GNU_VTENTRY
4532 || r_type == R_NDS32_GNU_VTINHERIT
4533 || r_type == R_NDS32_NONE
4534 || r_type == R_NDS32_RELA_GNU_VTENTRY
4535 || r_type == R_NDS32_RELA_GNU_VTINHERIT
4536 || (r_type >= R_NDS32_INSN16 && r_type <= R_NDS32_25_FIXED_RELA)
4537 || r_type == R_NDS32_DATA
1c8f6a4d 4538 || r_type == R_NDS32_TRAN
0c4bd9d9 4539 || (r_type >= R_NDS32_LONGCALL4 && r_type <= R_NDS32_LONGJUMP7))
35c08157
KLC
4540 continue;
4541
0c4bd9d9
KLC
4542 /* If we enter the fp-as-gp region. Resolve the address
4543 of best fp-base. */
35c08157
KLC
4544 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_BEGIN
4545 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4546 {
4547 int dist;
4548
4549 /* Distance to relocation of best fp-base is encoded in R_SYM. */
4550 dist = rel->r_addend >> 16;
4551 fpbase_addr = calculate_memory_address (input_bfd, rel + dist,
4552 local_syms, symtab_hdr);
4553 }
4554 else if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_END
4555 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4556 {
4557 fpbase_addr = elf_gp (output_bfd);
4558 }
4559
4560 if (((r_type >= R_NDS32_DWARF2_OP1_RELA
4561 && r_type <= R_NDS32_DWARF2_LEB_RELA)
0e1862bb 4562 || r_type >= R_NDS32_RELAX_ENTRY) && !bfd_link_relocatable (info))
35c08157
KLC
4563 continue;
4564
4565 howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
4566 r_symndx = ELF32_R_SYM (rel->r_info);
4567
4568 /* This is a final link. */
4569 sym = NULL;
4570 sec = NULL;
4571 h = NULL;
4572
4573 if (r_symndx < symtab_hdr->sh_info)
4574 {
4575 /* Local symbol. */
4576 sym = local_syms + r_symndx;
4577 sec = local_sections[r_symndx];
4578
4579 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
4580 addend = rel->r_addend;
4581 }
4582 else
4583 {
4584 /* External symbol. */
4585 bfd_boolean warned, ignored, unresolved_reloc;
4586 int symndx = r_symndx - symtab_hdr->sh_info;
4587
4588 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
4589 r_symndx, symtab_hdr, sym_hashes, h, sec,
4590 relocation, unresolved_reloc, warned,
4591 ignored);
4592
4593 /* la $fp, _FP_BASE_ is per-function (region).
4594 Handle it specially. */
4595 switch ((int) r_type)
4596 {
4597 case R_NDS32_SDA19S0_RELA:
4598 case R_NDS32_SDA15S0_RELA:
4599 case R_NDS32_20_RELA:
4600 if (strcmp (elf_sym_hashes (input_bfd)[symndx]->root.root.string,
4601 FP_BASE_NAME) == 0)
4602 {
4603 relocation = fpbase_addr;
4604 break;
4605 }
4606 }
4607
4608 }
4609
0e1862bb 4610 if (bfd_link_relocatable (info))
35c08157
KLC
4611 {
4612 /* This is a relocatable link. We don't have to change
4613 anything, unless the reloc is against a section symbol,
4614 in which case we have to adjust according to where the
4615 section symbol winds up in the output section. */
4616 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
4617 rel->r_addend += sec->output_offset + sym->st_value;
4618
4619 continue;
4620 }
4621
4622 /* Sanity check the address. */
4623 if (offset > high_address)
4624 {
4625 r = bfd_reloc_outofrange;
4626 goto check_reloc;
4627 }
4628
4629 if ((r_type >= R_NDS32_DWARF2_OP1_RELA
4630 && r_type <= R_NDS32_DWARF2_LEB_RELA)
4631 || r_type >= R_NDS32_RELAX_ENTRY)
4632 continue;
4633
4634 switch ((int) r_type)
4635 {
4636 case R_NDS32_GOTOFF:
4637 /* Relocation is relative to the start of the global offset
4638 table (for ld24 rx, #uimm24), e.g. access at label+addend
4639
4640 ld24 rx. #label@GOTOFF + addend
4641 sub rx, r12. */
4642 case R_NDS32_GOTOFF_HI20:
4643 case R_NDS32_GOTOFF_LO12:
4644 case R_NDS32_GOTOFF_LO15:
4645 case R_NDS32_GOTOFF_LO19:
4646 BFD_ASSERT (sgot != NULL);
4647
4648 relocation -= elf_gp (output_bfd);
4649 break;
4650
4651 case R_NDS32_9_PLTREL:
4652 case R_NDS32_25_PLTREL:
4653 /* Relocation is to the entry for this symbol in the
4654 procedure linkage table. */
4655
4656 /* The native assembler will generate a 25_PLTREL reloc
4657 for a local symbol if you assemble a call from one
4658 section to another when using -K pic. */
4659 if (h == NULL)
4660 break;
4661
4662 if (h->forced_local)
4663 break;
4664
4665 /* We didn't make a PLT entry for this symbol. This
4666 happens when statically linking PIC code, or when
4667 using -Bsymbolic. */
4668 if (h->plt.offset == (bfd_vma) - 1)
4669 break;
4670
4671 relocation = (splt->output_section->vma
4672 + splt->output_offset + h->plt.offset);
4673 break;
4674
4675 case R_NDS32_PLT_GOTREL_HI20:
4676 case R_NDS32_PLT_GOTREL_LO12:
4677 case R_NDS32_PLT_GOTREL_LO15:
4678 case R_NDS32_PLT_GOTREL_LO19:
4679 case R_NDS32_PLT_GOTREL_LO20:
4680 if (h == NULL || h->forced_local || h->plt.offset == (bfd_vma) - 1)
4681 {
4682 /* We didn't make a PLT entry for this symbol. This
4683 happens when statically linking PIC code, or when
4684 using -Bsymbolic. */
4685 relocation -= elf_gp (output_bfd);
4686 break;
4687 }
4688
4689 relocation = (splt->output_section->vma
4690 + splt->output_offset + h->plt.offset);
4691
4692 relocation -= elf_gp (output_bfd);
4693 break;
4694
4695 case R_NDS32_PLTREL_HI20:
4696 case R_NDS32_PLTREL_LO12:
4697
4698 /* Relocation is to the entry for this symbol in the
4699 procedure linkage table. */
4700
4701 /* The native assembler will generate a 25_PLTREL reloc
4702 for a local symbol if you assemble a call from one
4703 section to another when using -K pic. */
4704 if (h == NULL)
4705 break;
4706
4707 if (h->forced_local)
4708 break;
4709
4710 if (h->plt.offset == (bfd_vma) - 1)
4711 /* We didn't make a PLT entry for this symbol. This
4712 happens when statically linking PIC code, or when
4713 using -Bsymbolic. */
4714 break;
4715
4716 if (splt == NULL)
4717 break;
4718
4719 relocation = (splt->output_section->vma
4720 + splt->output_offset
4721 + h->plt.offset + 4)
4722 - (input_section->output_section->vma
4723 + input_section->output_offset
4724 + rel->r_offset);
4725
4726 break;
4727
4728 case R_NDS32_GOTPC20:
4729 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4730 ld24 rx,#_GLOBAL_OFFSET_TABLE_ */
4731 relocation = elf_gp (output_bfd);
4732 break;
4733
4734 case R_NDS32_GOTPC_HI20:
4735 case R_NDS32_GOTPC_LO12:
4736 {
4737 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4738 bl .+4
4739 seth rx,#high(_GLOBAL_OFFSET_TABLE_)
4740 or3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4741 or
4742 bl .+4
4743 seth rx,#shigh(_GLOBAL_OFFSET_TABLE_)
4744 add3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4745 */
4746 relocation = elf_gp (output_bfd);
4747 relocation -= (input_section->output_section->vma
4748 + input_section->output_offset + rel->r_offset);
4749 break;
4750 }
4751
4752 case R_NDS32_GOT20:
4753 /* Fall through. */
4754 case R_NDS32_GOT_HI20:
4755 case R_NDS32_GOT_LO12:
4756 case R_NDS32_GOT_LO15:
4757 case R_NDS32_GOT_LO19:
4758 /* Relocation is to the entry for this symbol in the global
4759 offset table. */
4760 BFD_ASSERT (sgot != NULL);
4761
4762 if (h != NULL)
4763 {
4764 bfd_boolean dyn;
4765 bfd_vma off;
4766
4767 off = h->got.offset;
4768 BFD_ASSERT (off != (bfd_vma) - 1);
4769 dyn = htab->root.dynamic_sections_created;
0e1862bb
L
4770 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
4771 bfd_link_pic (info),
4772 h)
4773 || (bfd_link_pic (info)
35c08157
KLC
4774 && (info->symbolic
4775 || h->dynindx == -1
4776 || h->forced_local) && h->def_regular))
4777 {
4778 /* This is actually a static link, or it is a
4779 -Bsymbolic link and the symbol is defined
4780 locally, or the symbol was forced to be local
4781 because of a version file. We must initialize
4782 this entry in the global offset table. Since the
4783 offset must always be a multiple of 4, we use the
4784 least significant bit to record whether we have
4785 initialized it already.
4786
4787 When doing a dynamic link, we create a .rela.got
4788 relocation entry to initialize the value. This
4789 is done in the finish_dynamic_symbol routine. */
4790 if ((off & 1) != 0)
4791 off &= ~1;
4792 else
4793 {
4794 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4795 h->got.offset |= 1;
4796 }
4797 }
4798 relocation = sgot->output_section->vma + sgot->output_offset + off
4799 - elf_gp (output_bfd);
4800 }
4801 else
4802 {
4803 bfd_vma off;
4804 bfd_byte *loc;
4805
4806 BFD_ASSERT (local_got_offsets != NULL
4807 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
4808
4809 off = local_got_offsets[r_symndx];
4810
4811 /* The offset must always be a multiple of 4. We use
4812 the least significant bit to record whether we have
4813 already processed this entry. */
4814 if ((off & 1) != 0)
4815 off &= ~1;
4816 else
4817 {
4818 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4819
0e1862bb 4820 if (bfd_link_pic (info))
35c08157
KLC
4821 {
4822 asection *srelgot;
4823 Elf_Internal_Rela outrel;
4824
4825 /* We need to generate a R_NDS32_RELATIVE reloc
4826 for the dynamic linker. */
ce558b89 4827 srelgot = htab->root.srelgot;
35c08157
KLC
4828 BFD_ASSERT (srelgot != NULL);
4829
4830 outrel.r_offset = (elf_gp (output_bfd)
4831 + sgot->output_offset + off);
4832 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4833 outrel.r_addend = relocation;
4834 loc = srelgot->contents;
4835 loc +=
4836 srelgot->reloc_count * sizeof (Elf32_External_Rela);
4837 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4838 ++srelgot->reloc_count;
4839 }
4840 local_got_offsets[r_symndx] |= 1;
4841 }
4842 relocation = sgot->output_section->vma + sgot->output_offset + off
4843 - elf_gp (output_bfd);
4844 }
4845
4846 break;
4847
4848 case R_NDS32_16_RELA:
4849 case R_NDS32_20_RELA:
4850 case R_NDS32_5_RELA:
4851 case R_NDS32_32_RELA:
4852 case R_NDS32_9_PCREL_RELA:
4853 case R_NDS32_WORD_9_PCREL_RELA:
4854 case R_NDS32_10_UPCREL_RELA:
4855 case R_NDS32_15_PCREL_RELA:
4856 case R_NDS32_17_PCREL_RELA:
4857 case R_NDS32_25_PCREL_RELA:
4858 case R_NDS32_HI20_RELA:
4859 case R_NDS32_LO12S3_RELA:
4860 case R_NDS32_LO12S2_RELA:
4861 case R_NDS32_LO12S2_DP_RELA:
4862 case R_NDS32_LO12S2_SP_RELA:
4863 case R_NDS32_LO12S1_RELA:
4864 case R_NDS32_LO12S0_RELA:
4865 case R_NDS32_LO12S0_ORI_RELA:
0e1862bb 4866 if (bfd_link_pic (info) && r_symndx != 0
35c08157
KLC
4867 && (input_section->flags & SEC_ALLOC) != 0
4868 && (eliminate_gc_relocs == 0
4869 || (sec && (sec->flags & SEC_EXCLUDE) == 0))
4870 && ((r_type != R_NDS32_9_PCREL_RELA
4871 && r_type != R_NDS32_WORD_9_PCREL_RELA
4872 && r_type != R_NDS32_10_UPCREL_RELA
4873 && r_type != R_NDS32_15_PCREL_RELA
4874 && r_type != R_NDS32_17_PCREL_RELA
4875 && r_type != R_NDS32_25_PCREL_RELA
4876 && !(r_type == R_NDS32_32_RELA
4877 && strcmp (input_section->name, ".eh_frame") == 0))
4878 || (h != NULL && h->dynindx != -1
4879 && (!info->symbolic || !h->def_regular))))
4880 {
4881 Elf_Internal_Rela outrel;
4882 bfd_boolean skip, relocate;
4883 bfd_byte *loc;
4884
4885 /* When generating a shared object, these relocations
4886 are copied into the output file to be resolved at run
4887 time. */
4888
4889 if (sreloc == NULL)
4890 {
4891 const char *name;
4892
4893 name = bfd_elf_string_from_elf_section
4894 (input_bfd, elf_elfheader (input_bfd)->e_shstrndx,
4895 elf_section_data (input_section)->rela.hdr->sh_name);
4896 if (name == NULL)
4897 return FALSE;
4898
4899 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
4900 && strcmp (bfd_get_section_name (input_bfd,
4901 input_section),
4902 name + 5) == 0);
4903
4904 sreloc = bfd_get_section_by_name (dynobj, name);
4905 BFD_ASSERT (sreloc != NULL);
4906 }
4907
4908 skip = FALSE;
4909 relocate = FALSE;
4910
4911 outrel.r_offset = _bfd_elf_section_offset (output_bfd,
4912 info,
4913 input_section,
4914 rel->r_offset);
4915 if (outrel.r_offset == (bfd_vma) - 1)
4916 skip = TRUE;
4917 else if (outrel.r_offset == (bfd_vma) - 2)
4918 skip = TRUE, relocate = TRUE;
4919 outrel.r_offset += (input_section->output_section->vma
4920 + input_section->output_offset);
4921
4922 if (skip)
4923 memset (&outrel, 0, sizeof outrel);
4924 else if (r_type == R_NDS32_17_PCREL_RELA
4925 || r_type == R_NDS32_15_PCREL_RELA
4926 || r_type == R_NDS32_25_PCREL_RELA)
4927 {
4928 BFD_ASSERT (h != NULL && h->dynindx != -1);
4929 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4930 outrel.r_addend = rel->r_addend;
4931 }
4932 else
4933 {
4934 /* h->dynindx may be -1 if this symbol was marked to
4935 become local. */
4936 if (h == NULL
4937 || ((info->symbolic || h->dynindx == -1)
4938 && h->def_regular))
4939 {
4940 relocate = TRUE;
4941 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4942 outrel.r_addend = relocation + rel->r_addend;
4943 }
4944 else
4945 {
4946 BFD_ASSERT (h->dynindx != -1);
4947 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4948 outrel.r_addend = rel->r_addend;
4949 }
4950 }
4951
4952 loc = sreloc->contents;
4953 loc += sreloc->reloc_count * sizeof (Elf32_External_Rela);
4954 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4955 ++sreloc->reloc_count;
4956
4957 /* If this reloc is against an external symbol, we do
4958 not want to fiddle with the addend. Otherwise, we
4959 need to include the symbol value so that it becomes
4960 an addend for the dynamic reloc. */
4961 if (!relocate)
4962 continue;
4963 }
4964 break;
4965
4966 case R_NDS32_25_ABS_RELA:
0e1862bb 4967 if (bfd_link_pic (info))
35c08157 4968 {
4eca0228 4969 _bfd_error_handler
dae82561
AM
4970 (_("%B: warning: cannot deal R_NDS32_25_ABS_RELA in shared "
4971 "mode."), input_bfd);
35c08157
KLC
4972 return FALSE;
4973 }
4974 break;
4975
4976 case R_NDS32_9_PCREL:
4977 r = nds32_elf_do_9_pcrel_reloc (input_bfd, howto, input_section,
4978 contents, offset,
4979 sec, relocation, addend);
4980 goto check_reloc;
4981
4982 case R_NDS32_HI20:
4983 {
4984 Elf_Internal_Rela *lorel;
4985
4986 /* We allow an arbitrary number of HI20 relocs before the
4987 LO12 reloc. This permits gcc to emit the HI and LO relocs
4988 itself. */
4989 for (lorel = rel + 1;
4990 (lorel < relend
4991 && ELF32_R_TYPE (lorel->r_info) == R_NDS32_HI20); lorel++)
4992 continue;
4993 if (lorel < relend
4994 && (ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S3
4995 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S2
4996 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S1
4997 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S0))
4998 {
4999 nds32_elf_relocate_hi20 (input_bfd, r_type, rel, lorel,
5000 contents, relocation + addend);
5001 r = bfd_reloc_ok;
5002 }
5003 else
5004 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
1c8f6a4d
KLC
5005 contents, offset, relocation,
5006 addend);
35c08157
KLC
5007 }
5008
5009 goto check_reloc;
5010
5011 case R_NDS32_GOT17S2_RELA:
5012 case R_NDS32_GOT15S2_RELA:
5013 {
5014 bfd_vma off;
5015
5016 BFD_ASSERT (sgot != NULL);
5017
5018 if (h != NULL)
5019 {
5020 bfd_boolean dyn;
5021
5022 off = h->got.offset;
5023 BFD_ASSERT (off != (bfd_vma) - 1);
5024
5025 dyn = htab->root.dynamic_sections_created;
5026 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL
0e1862bb
L
5027 (dyn, bfd_link_pic (info), h)
5028 || (bfd_link_pic (info)
5029 && (info->symbolic
5030 || h->dynindx == -1
5031 || h->forced_local)
5032 && h->def_regular))
35c08157
KLC
5033 {
5034 /* This is actually a static link, or it is a
5035 -Bsymbolic link and the symbol is defined
5036 locally, or the symbol was forced to be local
5037 because of a version file. We must initialize
5038 this entry in the global offset table. Since the
5039 offset must always be a multiple of 4, we use the
5040 least significant bit to record whether we have
5041 initialized it already.
5042
5043 When doing a dynamic link, we create a .rela.got
5044 relocation entry to initialize the value. This
5045 is done in the finish_dynamic_symbol routine. */
5046 if ((off & 1) != 0)
5047 off &= ~1;
5048 else
5049 {
5050 bfd_put_32 (output_bfd, relocation,
5051 sgot->contents + off);
5052 h->got.offset |= 1;
5053 }
5054 }
5055 }
5056 else
5057 {
5058 bfd_byte *loc;
5059
5060 BFD_ASSERT (local_got_offsets != NULL
5061 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5062
5063 off = local_got_offsets[r_symndx];
5064
5065 /* The offset must always be a multiple of 4. We use
5066 the least significant bit to record whether we have
5067 already processed this entry. */
5068 if ((off & 1) != 0)
5069 off &= ~1;
5070 else
5071 {
5072 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
5073
0e1862bb 5074 if (bfd_link_pic (info))
35c08157
KLC
5075 {
5076 asection *srelgot;
5077 Elf_Internal_Rela outrel;
5078
5079 /* We need to generate a R_NDS32_RELATIVE reloc
5080 for the dynamic linker. */
ce558b89 5081 srelgot = htab->root.srelgot;
35c08157
KLC
5082 BFD_ASSERT (srelgot != NULL);
5083
5084 outrel.r_offset = (elf_gp (output_bfd)
5085 + sgot->output_offset + off);
5086 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5087 outrel.r_addend = relocation;
5088 loc = srelgot->contents;
5089 loc +=
5090 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5091 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5092 ++srelgot->reloc_count;
5093 }
5094 local_got_offsets[r_symndx] |= 1;
5095 }
5096 }
5097 relocation = sgot->output_section->vma + sgot->output_offset + off
5098 - elf_gp (output_bfd);
5099 }
5100 if (relocation & align)
5101 {
5102 /* Incorrect alignment. */
4eca0228 5103 _bfd_error_handler
35c08157
KLC
5104 (_("%B: warning: unaligned access to GOT entry."), input_bfd);
5105 ret = FALSE;
5106 r = bfd_reloc_dangerous;
5107 goto check_reloc;
5108 }
5109 break;
5110
5111 case R_NDS32_SDA16S3_RELA:
5112 case R_NDS32_SDA15S3_RELA:
5113 case R_NDS32_SDA15S3:
5114 align = 0x7;
5115 goto handle_sda;
5116
5117 case R_NDS32_SDA17S2_RELA:
5118 case R_NDS32_SDA15S2_RELA:
5119 case R_NDS32_SDA12S2_SP_RELA:
5120 case R_NDS32_SDA12S2_DP_RELA:
5121 case R_NDS32_SDA15S2:
5122 case R_NDS32_SDA_FP7U2_RELA:
5123 align = 0x3;
5124 goto handle_sda;
5125
5126 case R_NDS32_SDA18S1_RELA:
5127 case R_NDS32_SDA15S1_RELA:
5128 case R_NDS32_SDA15S1:
5129 align = 0x1;
5130 goto handle_sda;
5131
5132 case R_NDS32_SDA19S0_RELA:
5133 case R_NDS32_SDA15S0_RELA:
5134 case R_NDS32_SDA15S0:
5135 {
5136 align = 0x0;
5137handle_sda:
5138 BFD_ASSERT (sec != NULL);
5139
5140 /* If the symbol is in the abs section, the out_bfd will be null.
5141 This happens when the relocation has a symbol@GOTOFF. */
5142 r = nds32_elf_final_sda_base (output_bfd, info, &gp, FALSE);
5143 if (r != bfd_reloc_ok)
5144 {
4eca0228 5145 _bfd_error_handler
35c08157
KLC
5146 (_("%B: warning: relocate SDA_BASE failed."), input_bfd);
5147 ret = FALSE;
5148 goto check_reloc;
5149 }
5150
5151 /* At this point `relocation' contains the object's
5152 address. */
5153 if (r_type == R_NDS32_SDA_FP7U2_RELA)
5154 {
5155 relocation -= fpbase_addr;
5156 }
5157 else
5158 relocation -= gp;
5159 /* Now it contains the offset from _SDA_BASE_. */
5160
5161 /* Make sure alignment is correct. */
5162
5163 if (relocation & align)
5164 {
5165 /* Incorrect alignment. */
4eca0228 5166 _bfd_error_handler
695344c0 5167 /* xgettext:c-format */
35c08157
KLC
5168 (_("%B(%A): warning: unaligned small data access of type %d."),
5169 input_bfd, input_section, r_type);
5170 ret = FALSE;
5171 goto check_reloc;
5172 }
5173 }
5174
5175 break;
5176 case R_NDS32_17IFC_PCREL_RELA:
5177 case R_NDS32_10IFCU_PCREL_RELA:
5178 /* do nothing */
5179 break;
5180
1c8f6a4d
KLC
5181 case R_NDS32_TLS_LE_HI20:
5182 case R_NDS32_TLS_LE_LO12:
5183 case R_NDS32_TLS_LE_20:
5184 case R_NDS32_TLS_LE_15S0:
5185 case R_NDS32_TLS_LE_15S1:
5186 case R_NDS32_TLS_LE_15S2:
5187 if (elf_hash_table (info)->tls_sec != NULL)
5188 relocation -= (elf_hash_table (info)->tls_sec->vma + TP_OFFSET);
5189 break;
5190 case R_NDS32_TLS_IE_HI20:
5191 case R_NDS32_TLS_IE_LO12S2:
5192 {
5193 /* Relocation is to the entry for this symbol in the global
5194 offset table. */
5195 unsigned int tls_type;
5196 asection *srelgot;
5197 Elf_Internal_Rela outrel;
5198 bfd_vma off;
5199 bfd_byte *loc;
5200 int indx = 0;
5201
5202 BFD_ASSERT (sgot != NULL);
5203 if (h != NULL)
5204 {
5205 bfd_boolean dyn;
5206
5207 off = h->got.offset;
5208 BFD_ASSERT (off != (bfd_vma) - 1);
5209 dyn = htab->root.dynamic_sections_created;
5210 tls_type = ((struct elf_nds32_link_hash_entry *) h)->tls_type;
0e1862bb
L
5211 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
5212 && (!bfd_link_pic (info)
1c8f6a4d
KLC
5213 || !SYMBOL_REFERENCES_LOCAL (info, h)))
5214 indx = h->dynindx;
5215 }
5216 else
5217 {
5218 /* Never happen currently. */
5219 BFD_ASSERT (local_got_offsets != NULL
5220 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5221
5222 off = local_got_offsets[r_symndx];
5223
5224 tls_type = elf32_nds32_local_got_tls_type (input_bfd)[r_symndx];
5225 }
5226 relocation = sgot->output_section->vma + sgot->output_offset + off;
5227
5228 if (r_type == R_NDS32_TLS_IE_LO12S2)
5229 break;
5230
5231 /* The offset must always be a multiple of 4. We use
5232 the least significant bit to record whether we have
5233 already processed this entry. */
5234 if ((off & 1) != 0)
5235 off &= ~1;
5236 else
5237 {
5238 bfd_boolean need_relocs = FALSE;
ce558b89 5239 srelgot = htab->root.srelgot;
0e1862bb 5240 if ((bfd_link_pic (info) || indx != 0)
1c8f6a4d
KLC
5241 && (h == NULL
5242 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
5243 || h->root.type != bfd_link_hash_undefweak))
5244 {
5245 need_relocs = TRUE;
5246 BFD_ASSERT (srelgot != NULL);
5247 }
5248 if (tls_type & GOT_TLS_IE)
5249 {
5250 if (need_relocs)
5251 {
5252 if (h->dynindx == 0)
5253 outrel.r_addend = relocation - dtpoff_base (info);
5254 else
5255 outrel.r_addend = 0;
5256 outrel.r_offset = (sgot->output_section->vma
5257 + sgot->output_offset
5258 + off);
5259 outrel.r_info =
5260 ELF32_R_INFO (h->dynindx, R_NDS32_TLS_TPOFF);
5261
5262 loc = srelgot->contents;
5263 loc +=
5264 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5265 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5266 ++srelgot->reloc_count;
5267 }
5268 else
5269 bfd_put_32 (output_bfd, h->root.u.def.value - TP_OFFSET,
5270 sgot->contents + off);
5271 }
5272 }
5273 }
5274 break;
5275
35c08157
KLC
5276 /* DON'T fall through. */
5277
5278 default:
5279 /* OLD_NDS32_RELOC. */
5280
5281 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5282 contents, offset, relocation, addend);
5283 goto check_reloc;
5284 }
5285
5286 switch ((int) r_type)
5287 {
5288 case R_NDS32_20_RELA:
5289 case R_NDS32_5_RELA:
5290 case R_NDS32_9_PCREL_RELA:
5291 case R_NDS32_WORD_9_PCREL_RELA:
5292 case R_NDS32_10_UPCREL_RELA:
5293 case R_NDS32_15_PCREL_RELA:
5294 case R_NDS32_17_PCREL_RELA:
5295 case R_NDS32_25_PCREL_RELA:
5296 case R_NDS32_25_ABS_RELA:
5297 case R_NDS32_HI20_RELA:
5298 case R_NDS32_LO12S3_RELA:
5299 case R_NDS32_LO12S2_RELA:
5300 case R_NDS32_LO12S2_DP_RELA:
5301 case R_NDS32_LO12S2_SP_RELA:
5302 case R_NDS32_LO12S1_RELA:
5303 case R_NDS32_LO12S0_RELA:
5304 case R_NDS32_LO12S0_ORI_RELA:
5305 case R_NDS32_SDA16S3_RELA:
5306 case R_NDS32_SDA17S2_RELA:
5307 case R_NDS32_SDA18S1_RELA:
5308 case R_NDS32_SDA19S0_RELA:
5309 case R_NDS32_SDA15S3_RELA:
5310 case R_NDS32_SDA15S2_RELA:
5311 case R_NDS32_SDA12S2_DP_RELA:
5312 case R_NDS32_SDA12S2_SP_RELA:
5313 case R_NDS32_SDA15S1_RELA:
5314 case R_NDS32_SDA15S0_RELA:
5315 case R_NDS32_SDA_FP7U2_RELA:
5316 case R_NDS32_9_PLTREL:
5317 case R_NDS32_25_PLTREL:
5318 case R_NDS32_GOT20:
5319 case R_NDS32_GOT_HI20:
5320 case R_NDS32_GOT_LO12:
5321 case R_NDS32_GOT_LO15:
5322 case R_NDS32_GOT_LO19:
5323 case R_NDS32_GOT15S2_RELA:
5324 case R_NDS32_GOT17S2_RELA:
5325 case R_NDS32_GOTPC20:
5326 case R_NDS32_GOTPC_HI20:
5327 case R_NDS32_GOTPC_LO12:
5328 case R_NDS32_GOTOFF:
5329 case R_NDS32_GOTOFF_HI20:
5330 case R_NDS32_GOTOFF_LO12:
5331 case R_NDS32_GOTOFF_LO15:
5332 case R_NDS32_GOTOFF_LO19:
5333 case R_NDS32_PLTREL_HI20:
5334 case R_NDS32_PLTREL_LO12:
5335 case R_NDS32_PLT_GOTREL_HI20:
5336 case R_NDS32_PLT_GOTREL_LO12:
5337 case R_NDS32_PLT_GOTREL_LO15:
5338 case R_NDS32_PLT_GOTREL_LO19:
5339 case R_NDS32_PLT_GOTREL_LO20:
5340 case R_NDS32_17IFC_PCREL_RELA:
5341 case R_NDS32_10IFCU_PCREL_RELA:
1c8f6a4d
KLC
5342 case R_NDS32_TLS_LE_HI20:
5343 case R_NDS32_TLS_LE_LO12:
5344 case R_NDS32_TLS_IE_HI20:
5345 case R_NDS32_TLS_IE_LO12S2:
5346 case R_NDS32_TLS_LE_20:
5347 case R_NDS32_TLS_LE_15S0:
5348 case R_NDS32_TLS_LE_15S1:
5349 case R_NDS32_TLS_LE_15S2:
35c08157 5350 /* Instruction related relocs must handle endian properly. */
1c8f6a4d 5351 /* NOTE: PIC IS NOT HANDLE YET; DO IT LATER. */
35c08157
KLC
5352 r = nds32_elf_final_link_relocate (howto, input_bfd,
5353 input_section, contents,
5354 rel->r_offset, relocation,
5355 rel->r_addend);
5356 break;
5357
5358 default:
5359 /* All other relocs can use default handler. */
5360 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5361 contents, rel->r_offset,
5362 relocation, rel->r_addend);
5363 break;
5364 }
5365
5366check_reloc:
5367
5368 if (r != bfd_reloc_ok)
5369 {
5370 /* FIXME: This should be generic enough to go in a utility. */
5371 const char *name;
5372
5373 if (h != NULL)
5374 name = h->root.root.string;
5375 else
5376 {
5377 name = bfd_elf_string_from_elf_section
5378 (input_bfd, symtab_hdr->sh_link, sym->st_name);
5379 if (name == NULL || *name == '\0')
5380 name = bfd_section_name (input_bfd, sec);
5381 }
5382
5383 if (errmsg != NULL)
5384 goto common_error;
5385
5386 switch (r)
5387 {
5388 case bfd_reloc_overflow:
1a72702b
AM
5389 (*info->callbacks->reloc_overflow)
5390 (info, (h ? &h->root : NULL), name, howto->name,
5391 (bfd_vma) 0, input_bfd, input_section, offset);
35c08157
KLC
5392 break;
5393
5394 case bfd_reloc_undefined:
1a72702b
AM
5395 (*info->callbacks->undefined_symbol)
5396 (info, name, input_bfd, input_section, offset, TRUE);
35c08157
KLC
5397 break;
5398
5399 case bfd_reloc_outofrange:
5400 errmsg = _("internal error: out of range error");
5401 goto common_error;
5402
5403 case bfd_reloc_notsupported:
5404 errmsg = _("internal error: unsupported relocation error");
5405 goto common_error;
5406
5407 case bfd_reloc_dangerous:
5408 errmsg = _("internal error: dangerous error");
5409 goto common_error;
5410
5411 default:
5412 errmsg = _("internal error: unknown error");
5413 /* Fall through. */
5414
1a72702b
AM
5415 common_error:
5416 (*info->callbacks->warning) (info, errmsg, name, input_bfd,
5417 input_section, offset);
35c08157
KLC
5418 break;
5419 }
5420 }
5421 }
5422
5423 return ret;
5424}
5425
5426/* Finish up dynamic symbol handling. We set the contents of various
5427 dynamic sections here. */
5428
5429static bfd_boolean
5430nds32_elf_finish_dynamic_symbol (bfd *output_bfd, struct bfd_link_info *info,
5431 struct elf_link_hash_entry *h, Elf_Internal_Sym *sym)
5432{
5433 struct elf_nds32_link_hash_table *htab;
5434 bfd_byte *loc;
5435
5436 htab = nds32_elf_hash_table (info);
5437
5438 if (h->plt.offset != (bfd_vma) - 1)
5439 {
5440 asection *splt;
5441 asection *sgot;
5442 asection *srela;
5443
5444 bfd_vma plt_index;
5445 bfd_vma got_offset;
5446 bfd_vma local_plt_offset;
5447 Elf_Internal_Rela rela;
5448
5449 /* This symbol has an entry in the procedure linkage table. Set
5450 it up. */
5451
5452 BFD_ASSERT (h->dynindx != -1);
5453
ce558b89
AM
5454 splt = htab->root.splt;
5455 sgot = htab->root.sgotplt;
5456 srela = htab->root.srelplt;
35c08157
KLC
5457 BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL);
5458
5459 /* Get the index in the procedure linkage table which
5460 corresponds to this symbol. This is the index of this symbol
5461 in all the symbols for which we are making plt entries. The
5462 first entry in the procedure linkage table is reserved. */
5463 plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1;
5464
5465 /* Get the offset into the .got table of the entry that
5466 corresponds to this function. Each .got entry is 4 bytes.
5467 The first three are reserved. */
5468 got_offset = (plt_index + 3) * 4;
5469
5470 /* Fill in the entry in the procedure linkage table. */
0e1862bb 5471 if (!bfd_link_pic (info))
35c08157
KLC
5472 {
5473 unsigned long insn;
5474
5475 insn = PLT_ENTRY_WORD0 + (((sgot->output_section->vma
5476 + sgot->output_offset + got_offset) >> 12)
5477 & 0xfffff);
5478 bfd_putb32 (insn, splt->contents + h->plt.offset);
5479
5480 insn = PLT_ENTRY_WORD1 + (((sgot->output_section->vma
5481 + sgot->output_offset + got_offset) & 0x0fff)
5482 >> 2);
5483 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5484
5485 insn = PLT_ENTRY_WORD2;
5486 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5487
5488 insn = PLT_ENTRY_WORD3 + (plt_index & 0x7ffff);
5489 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5490
5491 insn = PLT_ENTRY_WORD4
5492 + (((unsigned int) ((-(h->plt.offset + 16)) >> 1)) & 0xffffff);
5493 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5494 local_plt_offset = 12;
5495 }
5496 else
5497 {
5498 /* sda_base must be set at this time. */
5499 unsigned long insn;
5500 long offset;
5501
5502 /* FIXME, sda_base is 65536, it will damage opcode. */
5503 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5504 offset = sgot->output_section->vma + sgot->output_offset + got_offset
5505 - elf_gp (output_bfd);
5506 insn = PLT_PIC_ENTRY_WORD0 + ((offset >> 12) & 0xfffff);
5507 bfd_putb32 (insn, splt->contents + h->plt.offset);
5508
5509 insn = PLT_PIC_ENTRY_WORD1 + (offset & 0xfff);
5510 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5511
5512 insn = PLT_PIC_ENTRY_WORD2;
5513 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5514
5515 insn = PLT_PIC_ENTRY_WORD3;
5516 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5517
5518 insn = PLT_PIC_ENTRY_WORD4 + (plt_index & 0x7fffff);
5519 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5520
5521 insn = PLT_PIC_ENTRY_WORD5
5522 + (((unsigned int) ((-(h->plt.offset + 20)) >> 1)) & 0xffffff);
5523 bfd_putb32 (insn, splt->contents + h->plt.offset + 20);
5524
5525 local_plt_offset = 16;
5526 }
5527
5528 /* Fill in the entry in the global offset table,
5529 so it will fall through to the next instruction for the first time. */
5530 bfd_put_32 (output_bfd,
5531 (splt->output_section->vma + splt->output_offset
5532 + h->plt.offset + local_plt_offset),
5533 sgot->contents + got_offset);
5534
5535 /* Fill in the entry in the .rela.plt section. */
5536 rela.r_offset = (sgot->output_section->vma
5537 + sgot->output_offset + got_offset);
5538 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_JMP_SLOT);
5539 rela.r_addend = 0;
5540 loc = srela->contents;
5541 loc += plt_index * sizeof (Elf32_External_Rela);
5542 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5543
5544 if (!h->def_regular)
5545 {
5546 /* Mark the symbol as undefined, rather than as defined in
5547 the .plt section. Leave the value alone. */
5548 sym->st_shndx = SHN_UNDEF;
5549 if (!h->ref_regular_nonweak)
5550 sym->st_value = 0;
5551 }
5552 }
5553
5554 if (h->got.offset != (bfd_vma) - 1)
5555 {
5556 asection *sgot;
5557 asection *srela;
5558 Elf_Internal_Rela rela;
5559
5560 /* This symbol has an entry in the global offset table.
5561 Set it up. */
5562
ce558b89
AM
5563 sgot = htab->root.sgot;
5564 srela = htab->root.srelgot;
35c08157
KLC
5565 BFD_ASSERT (sgot != NULL && srela != NULL);
5566
5567 rela.r_offset = (sgot->output_section->vma
5568 + sgot->output_offset + (h->got.offset & ~1));
5569
5570 /* If this is a -Bsymbolic link, and the symbol is defined
5571 locally, we just want to emit a RELATIVE reloc. Likewise if
5572 the symbol was forced to be local because of a version file.
5573 The entry in the global offset table will already have been
5574 initialized in the relocate_section function. */
0e1862bb 5575 if (bfd_link_pic (info)
35c08157
KLC
5576 && (info->symbolic
5577 || h->dynindx == -1 || h->forced_local) && h->def_regular)
5578 {
5579 rela.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5580 rela.r_addend = (h->root.u.def.value
5581 + h->root.u.def.section->output_section->vma
5582 + h->root.u.def.section->output_offset);
5583 }
5584 else
5585 {
5586 BFD_ASSERT ((h->got.offset & 1) == 0);
5587 bfd_put_32 (output_bfd, (bfd_vma) 0,
5588 sgot->contents + h->got.offset);
5589 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_GLOB_DAT);
5590 rela.r_addend = 0;
5591 }
5592
5593 loc = srela->contents;
5594 loc += srela->reloc_count * sizeof (Elf32_External_Rela);
5595 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5596 ++srela->reloc_count;
5597 }
5598
5599 if (h->needs_copy)
5600 {
5601 asection *s;
5602 Elf_Internal_Rela rela;
5603
5604 /* This symbols needs a copy reloc. Set it up. */
5605
5606 BFD_ASSERT (h->dynindx != -1
5607 && (h->root.type == bfd_link_hash_defined
5608 || h->root.type == bfd_link_hash_defweak));
5609
5610 s = bfd_get_section_by_name (h->root.u.def.section->owner, ".rela.bss");
5611 BFD_ASSERT (s != NULL);
5612
5613 rela.r_offset = (h->root.u.def.value
5614 + h->root.u.def.section->output_section->vma
5615 + h->root.u.def.section->output_offset);
5616 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_COPY);
5617 rela.r_addend = 0;
5618 loc = s->contents;
5619 loc += s->reloc_count * sizeof (Elf32_External_Rela);
5620 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5621 ++s->reloc_count;
5622 }
5623
5624 /* Mark some specially defined symbols as absolute. */
5625 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
5626 || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
5627 sym->st_shndx = SHN_ABS;
5628
5629 return TRUE;
5630}
5631
5632
5633/* Finish up the dynamic sections. */
5634
5635static bfd_boolean
5636nds32_elf_finish_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info)
5637{
5638 struct elf_nds32_link_hash_table *htab;
5639 bfd *dynobj;
5640 asection *sdyn;
5641 asection *sgot;
5642
5643 htab = nds32_elf_hash_table (info);
5644 dynobj = htab->root.dynobj;
5645
ce558b89 5646 sgot = htab->root.sgotplt;
35c08157
KLC
5647 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
5648
5649 if (htab->root.dynamic_sections_created)
5650 {
5651 asection *splt;
5652 Elf32_External_Dyn *dyncon, *dynconend;
5653
5654 BFD_ASSERT (sgot != NULL && sdyn != NULL);
5655
5656 dyncon = (Elf32_External_Dyn *) sdyn->contents;
5657 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
5658
5659 for (; dyncon < dynconend; dyncon++)
5660 {
5661 Elf_Internal_Dyn dyn;
5662 asection *s;
5663
5664 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
5665
5666 switch (dyn.d_tag)
5667 {
5668 default:
5669 break;
5670
5671 case DT_PLTGOT:
ce558b89 5672 s = htab->root.sgotplt;
35c08157
KLC
5673 goto get_vma;
5674 case DT_JMPREL:
ce558b89 5675 s = htab->root.srelplt;
35c08157 5676 get_vma:
4ade44b7 5677 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
35c08157
KLC
5678 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5679 break;
5680
5681 case DT_PLTRELSZ:
ce558b89 5682 s = htab->root.srelplt;
35c08157
KLC
5683 dyn.d_un.d_val = s->size;
5684 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5685 break;
35c08157
KLC
5686 }
5687 }
5688
5689 /* Fill in the first entry in the procedure linkage table. */
ce558b89 5690 splt = htab->root.splt;
35c08157
KLC
5691 if (splt && splt->size > 0)
5692 {
0e1862bb 5693 if (bfd_link_pic (info))
35c08157
KLC
5694 {
5695 unsigned long insn;
5696 long offset;
5697
5698 /* FIXME, sda_base is 65536, it will damage opcode. */
5699 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5700 offset = sgot->output_section->vma + sgot->output_offset + 4
5701 - elf_gp (output_bfd);
5702 insn = PLT0_PIC_ENTRY_WORD0 | ((offset >> 12) & 0xfffff);
5703 bfd_putb32 (insn, splt->contents);
5704
5705 /* insn = PLT0_PIC_ENTRY_WORD0 | (((8 - sda_base) >> 2) & 0x7fff) ; */
5706 /* here has a typo? */
5707 insn = PLT0_PIC_ENTRY_WORD1 | (offset & 0xfff);
5708 bfd_putb32 (insn, splt->contents + 4);
5709
5710 insn = PLT0_PIC_ENTRY_WORD2;
5711 bfd_putb32 (insn, splt->contents + 8);
5712
5713 insn = PLT0_PIC_ENTRY_WORD3;
5714 bfd_putb32 (insn, splt->contents + 12);
5715
5716 insn = PLT0_PIC_ENTRY_WORD4;
5717 bfd_putb32 (insn, splt->contents + 16);
5718
5719 insn = PLT0_PIC_ENTRY_WORD5;
5720 bfd_putb32 (insn, splt->contents + 20);
5721 }
5722 else
5723 {
5724 unsigned long insn;
5725 unsigned long addr;
5726
5727 /* addr = .got + 4 */
5728 addr = sgot->output_section->vma + sgot->output_offset + 4;
5729 insn = PLT0_ENTRY_WORD0 | ((addr >> 12) & 0xfffff);
5730 bfd_putb32 (insn, splt->contents);
5731
5732 insn = PLT0_ENTRY_WORD1 | (addr & 0x0fff);
5733 bfd_putb32 (insn, splt->contents + 4);
5734
5735 insn = PLT0_ENTRY_WORD2;
5736 bfd_putb32 (insn, splt->contents + 8);
5737
5738 insn = PLT0_ENTRY_WORD3;
5739 bfd_putb32 (insn, splt->contents + 12);
5740
5741 insn = PLT0_ENTRY_WORD4;
5742 bfd_putb32 (insn, splt->contents + 16);
5743 }
5744
5745 elf_section_data (splt->output_section)->this_hdr.sh_entsize =
5746 PLT_ENTRY_SIZE;
5747 }
5748 }
5749
5750 /* Fill in the first three entries in the global offset table. */
5751 if (sgot && sgot->size > 0)
5752 {
5753 if (sdyn == NULL)
5754 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
5755 else
5756 bfd_put_32 (output_bfd,
5757 sdyn->output_section->vma + sdyn->output_offset,
5758 sgot->contents);
5759 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
5760 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
5761
5762 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
5763 }
5764
5765 return TRUE;
5766}
5767\f
5768
5769/* Set the right machine number. */
5770
5771static bfd_boolean
5772nds32_elf_object_p (bfd *abfd)
5773{
5774 static unsigned int cur_arch = 0;
5775
5776 if (E_N1_ARCH != (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH))
5777 {
5778 /* E_N1_ARCH is a wild card, so it is set only when no others exist. */
5779 cur_arch = (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH);
5780 }
5781
5782 switch (cur_arch)
5783 {
5784 default:
5785 case E_N1_ARCH:
5786 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1);
5787 break;
5788 case E_N1H_ARCH:
5789 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h);
5790 break;
5791 case E_NDS_ARCH_STAR_V2_0:
5792 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v2);
5793 break;
5794 case E_NDS_ARCH_STAR_V3_0:
5795 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3);
5796 break;
5797 case E_NDS_ARCH_STAR_V3_M:
5798 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3m);
5799 break;
5800 }
5801
5802 return TRUE;
5803}
5804
5805/* Store the machine number in the flags field. */
5806
5807static void
5808nds32_elf_final_write_processing (bfd *abfd,
5809 bfd_boolean linker ATTRIBUTE_UNUSED)
5810{
5811 unsigned long val;
5812 static unsigned int cur_mach = 0;
5813
5814 if (bfd_mach_n1 != bfd_get_mach (abfd))
5815 {
5816 cur_mach = bfd_get_mach (abfd);
5817 }
5818
5819 switch (cur_mach)
5820 {
5821 case bfd_mach_n1:
5822 /* Only happen when object is empty, since the case is abandon. */
5823 val = E_N1_ARCH;
5824 val |= E_NDS_ABI_AABI;
5825 val |= E_NDS32_ELF_VER_1_4;
5826 break;
5827 case bfd_mach_n1h:
5828 val = E_N1H_ARCH;
5829 break;
5830 case bfd_mach_n1h_v2:
5831 val = E_NDS_ARCH_STAR_V2_0;
5832 break;
5833 case bfd_mach_n1h_v3:
5834 val = E_NDS_ARCH_STAR_V3_0;
5835 break;
5836 case bfd_mach_n1h_v3m:
5837 val = E_NDS_ARCH_STAR_V3_M;
5838 break;
5839 default:
5840 val = 0;
5841 break;
5842 }
5843
5844 elf_elfheader (abfd)->e_flags &= ~EF_NDS_ARCH;
5845 elf_elfheader (abfd)->e_flags |= val;
5846}
5847
5848/* Function to keep NDS32 specific file flags. */
5849
5850static bfd_boolean
5851nds32_elf_set_private_flags (bfd *abfd, flagword flags)
5852{
5853 BFD_ASSERT (!elf_flags_init (abfd)
5854 || elf_elfheader (abfd)->e_flags == flags);
5855
5856 elf_elfheader (abfd)->e_flags = flags;
5857 elf_flags_init (abfd) = TRUE;
5858 return TRUE;
5859}
5860
5861static unsigned int
5862convert_e_flags (unsigned int e_flags, unsigned int arch)
5863{
5864 if ((e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9)
5865 {
5866 /* From 0.9 to 1.0. */
5867 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V1_0;
5868
5869 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5870 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5871 if (arch == E_NDS_ARCH_STAR_V1_0)
5872 {
5873 /* Done. */
5874 return e_flags;
5875 }
5876 }
5877
5878 /* From 1.0 to 2.0. */
5879 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V2_0;
5880
5881 /* Clear E_NDS32_HAS_MFUSR_PC_INST. */
5882 e_flags &= ~E_NDS32_HAS_MFUSR_PC_INST;
5883
5884 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5885 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5886 return e_flags;
5887}
5888
5889static bfd_boolean
5890nds32_check_vec_size (bfd *ibfd)
5891{
5892 static unsigned int nds32_vec_size = 0;
5893
5894 asection *sec_t = NULL;
5895 bfd_byte *contents = NULL;
5896
5897 sec_t = bfd_get_section_by_name (ibfd, ".nds32_e_flags");
5898
5899 if (sec_t && sec_t->size >= 4)
5900 {
5901 /* Get vec_size in file. */
5902 unsigned int flag_t;
5903
0c4bd9d9 5904 nds32_get_section_contents (ibfd, sec_t, &contents, TRUE);
35c08157
KLC
5905 flag_t = bfd_get_32 (ibfd, contents);
5906
5907 /* The value could only be 4 or 16. */
5908
5909 if (!nds32_vec_size)
5910 /* Set if not set yet. */
5911 nds32_vec_size = (flag_t & 0x3);
5912 else if (nds32_vec_size != (flag_t & 0x3))
5913 {
4eca0228 5914 _bfd_error_handler
695344c0 5915 /* xgettext:c-format */
4eca0228
AM
5916 (_("%B: ISR vector size mismatch"
5917 " with previous modules, previous %u-byte, current %u-byte"),
5918 ibfd,
5919 nds32_vec_size == 1 ? 4 : nds32_vec_size == 2 ? 16 : 0xffffffff,
5920 (flag_t & 0x3) == 1 ? 4 : (flag_t & 0x3) == 2 ? 16 : 0xffffffff);
35c08157
KLC
5921 return FALSE;
5922 }
5923 else
5924 /* Only keep the first vec_size section. */
5925 sec_t->flags |= SEC_EXCLUDE;
5926 }
5927
5928 return TRUE;
5929}
5930
5931/* Merge backend specific data from an object file to the output
5932 object file when linking. */
5933
5934static bfd_boolean
50e03d47 5935nds32_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
35c08157 5936{
50e03d47 5937 bfd *obfd = info->output_bfd;
35c08157
KLC
5938 flagword out_flags;
5939 flagword in_flags;
5940 flagword out_16regs;
5941 flagword in_no_mac;
5942 flagword out_no_mac;
5943 flagword in_16regs;
5944 flagword out_version;
5945 flagword in_version;
5946 flagword out_fpu_config;
5947 flagword in_fpu_config;
5948
5949 /* TODO: Revise to use object-attributes instead. */
5950 if (!nds32_check_vec_size (ibfd))
5951 return FALSE;
5952
5953 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
5954 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
5955 return TRUE;
5956
5957 if (bfd_little_endian (ibfd) != bfd_little_endian (obfd))
5958 {
4eca0228 5959 _bfd_error_handler
35c08157
KLC
5960 (_("%B: warning: Endian mismatch with previous modules."), ibfd);
5961
5962 bfd_set_error (bfd_error_bad_value);
5963 return FALSE;
5964 }
5965
5966 in_version = elf_elfheader (ibfd)->e_flags & EF_NDS32_ELF_VERSION;
5967 if (in_version == E_NDS32_ELF_VER_1_2)
5968 {
4eca0228 5969 _bfd_error_handler
35c08157
KLC
5970 (_("%B: warning: Older version of object file encountered, "
5971 "Please recompile with current tool chain."), ibfd);
5972 }
5973
5974 /* We may need to merge V1 and V2 arch object files to V2. */
5975 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
5976 != (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
5977 {
5978 /* Need to convert version. */
5979 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
5980 == E_NDS_ARCH_STAR_RESERVED)
5981 {
5982 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
5983 }
5984 else if ((elf_elfheader (obfd)->e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9
5985 || (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
5986 > (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
5987 {
5988 elf_elfheader (obfd)->e_flags =
5989 convert_e_flags (elf_elfheader (obfd)->e_flags,
5990 (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH));
5991 }
5992 else
5993 {
5994 elf_elfheader (ibfd)->e_flags =
5995 convert_e_flags (elf_elfheader (ibfd)->e_flags,
5996 (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH));
5997 }
5998 }
5999
6000 /* Extract some flags. */
6001 in_flags = elf_elfheader (ibfd)->e_flags
6002 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6003 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6004
6005 /* The following flags need special treatment. */
6006 in_16regs = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6007 in_no_mac = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6008 in_fpu_config = elf_elfheader (ibfd)->e_flags & E_NDS32_FPU_REG_CONF;
6009
6010 /* Extract some flags. */
6011 out_flags = elf_elfheader (obfd)->e_flags
6012 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6013 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6014
6015 /* The following flags need special treatment. */
6016 out_16regs = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6017 out_no_mac = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6018 out_fpu_config = elf_elfheader (obfd)->e_flags & E_NDS32_FPU_REG_CONF;
6019 out_version = elf_elfheader (obfd)->e_flags & EF_NDS32_ELF_VERSION;
6020 if (!elf_flags_init (obfd))
6021 {
6022 /* If the input is the default architecture then do not
6023 bother setting the flags for the output architecture,
6024 instead allow future merges to do this. If no future
6025 merges ever set these flags then they will retain their
6026 unitialised values, which surprise surprise, correspond
6027 to the default values. */
6028 if (bfd_get_arch_info (ibfd)->the_default)
6029 return TRUE;
6030
6031 elf_flags_init (obfd) = TRUE;
6032 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
6033
6034 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
6035 && bfd_get_arch_info (obfd)->the_default)
6036 {
6037 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
6038 bfd_get_mach (ibfd));
6039 }
6040
6041 return TRUE;
6042 }
6043
6044 /* Check flag compatibility. */
6045 if ((in_flags & EF_NDS_ABI) != (out_flags & EF_NDS_ABI))
6046 {
4eca0228 6047 _bfd_error_handler
35c08157
KLC
6048 (_("%B: error: ABI mismatch with previous modules."), ibfd);
6049
6050 bfd_set_error (bfd_error_bad_value);
6051 return FALSE;
6052 }
6053
6054 if ((in_flags & EF_NDS_ARCH) != (out_flags & EF_NDS_ARCH))
6055 {
6056 if (((in_flags & EF_NDS_ARCH) != E_N1_ARCH))
6057 {
4eca0228 6058 _bfd_error_handler
35c08157
KLC
6059 (_("%B: error: Instruction set mismatch with previous modules."), ibfd);
6060
6061 bfd_set_error (bfd_error_bad_value);
6062 return FALSE;
6063 }
6064 }
6065
6066 /* When linking with V1.2 and V1.3 objects together the output is V1.2.
6067 and perf ext1 and DIV are mergerd to perf ext1. */
6068 if (in_version == E_NDS32_ELF_VER_1_2 || out_version == E_NDS32_ELF_VER_1_2)
6069 {
6070 elf_elfheader (obfd)->e_flags =
6071 (in_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6072 | (out_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6073 | (((in_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6074 ? E_NDS32_HAS_EXT_INST : 0)
6075 | (((out_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6076 ? E_NDS32_HAS_EXT_INST : 0)
6077 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6078 | ((in_version > out_version) ? out_version : in_version);
6079 }
6080 else
6081 {
6082 if (in_version != out_version)
4eca0228 6083 _bfd_error_handler
695344c0 6084 /* xgettext:c-format */
4eca0228
AM
6085 (_("%B: warning: Incompatible elf-versions %s and %s."),
6086 ibfd, nds32_elfver_strtab[out_version],
6087 nds32_elfver_strtab[in_version]);
35c08157
KLC
6088
6089 elf_elfheader (obfd)->e_flags = in_flags | out_flags
6090 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6091 | (in_fpu_config > out_fpu_config ? in_fpu_config : out_fpu_config)
6092 | (in_version > out_version ? out_version : in_version);
6093 }
6094
6095 return TRUE;
6096}
6097
6098/* Display the flags field. */
6099
6100static bfd_boolean
6101nds32_elf_print_private_bfd_data (bfd *abfd, void *ptr)
6102{
6103 FILE *file = (FILE *) ptr;
6104
6105 BFD_ASSERT (abfd != NULL && ptr != NULL);
6106
6107 _bfd_elf_print_private_bfd_data (abfd, ptr);
6108
6109 fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
6110
6111 switch (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH)
6112 {
6113 default:
6114 case E_N1_ARCH:
6115 fprintf (file, _(": n1 instructions"));
6116 break;
6117 case E_N1H_ARCH:
6118 fprintf (file, _(": n1h instructions"));
6119 break;
6120 }
6121
6122 fputc ('\n', file);
6123
6124 return TRUE;
6125}
6126
6127static unsigned int
6128nds32_elf_action_discarded (asection *sec)
6129{
6130
6131 if (strncmp
6132 (".gcc_except_table", sec->name, sizeof (".gcc_except_table") - 1) == 0)
6133 return 0;
6134
6135 return _bfd_elf_default_action_discarded (sec);
6136}
6137
6138static asection *
6139nds32_elf_gc_mark_hook (asection *sec, struct bfd_link_info *info,
6140 Elf_Internal_Rela *rel, struct elf_link_hash_entry *h,
6141 Elf_Internal_Sym *sym)
6142{
6143 if (h != NULL)
6144 switch (ELF32_R_TYPE (rel->r_info))
6145 {
6146 case R_NDS32_GNU_VTINHERIT:
6147 case R_NDS32_GNU_VTENTRY:
6148 case R_NDS32_RELA_GNU_VTINHERIT:
6149 case R_NDS32_RELA_GNU_VTENTRY:
6150 return NULL;
6151 }
6152
6153 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
6154}
6155
35c08157
KLC
6156/* Look through the relocs for a section during the first phase.
6157 Since we don't do .gots or .plts, we just need to consider the
6158 virtual table relocs for gc. */
6159
6160static bfd_boolean
6161nds32_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
6162 asection *sec, const Elf_Internal_Rela *relocs)
6163{
6164 Elf_Internal_Shdr *symtab_hdr;
6165 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
6166 const Elf_Internal_Rela *rel;
6167 const Elf_Internal_Rela *rel_end;
6168 struct elf_nds32_link_hash_table *htab;
6169 bfd *dynobj;
6170 asection *sreloc = NULL;
6171
0e1862bb 6172 if (bfd_link_relocatable (info))
35c08157
KLC
6173 return TRUE;
6174
6175 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6176 sym_hashes = elf_sym_hashes (abfd);
6177 sym_hashes_end =
6178 sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
6179 if (!elf_bad_symtab (abfd))
6180 sym_hashes_end -= symtab_hdr->sh_info;
6181
6182 htab = nds32_elf_hash_table (info);
6183 dynobj = htab->root.dynobj;
6184
6185 rel_end = relocs + sec->reloc_count;
6186 for (rel = relocs; rel < rel_end; rel++)
6187 {
6188 enum elf_nds32_reloc_type r_type;
6189 struct elf_link_hash_entry *h;
6190 unsigned long r_symndx;
1c8f6a4d 6191 int tls_type, old_tls_type;
35c08157
KLC
6192
6193 r_symndx = ELF32_R_SYM (rel->r_info);
6194 r_type = ELF32_R_TYPE (rel->r_info);
6195 if (r_symndx < symtab_hdr->sh_info)
6196 h = NULL;
6197 else
6198 {
6199 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6200 while (h->root.type == bfd_link_hash_indirect
6201 || h->root.type == bfd_link_hash_warning)
6202 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6203 }
6204
1c8f6a4d
KLC
6205 /* Some relocs require a global offset table. We create
6206 got section here, since these relocation need got section
6207 and it is not created yet. */
ce558b89 6208 if (htab->root.sgot == NULL)
35c08157
KLC
6209 {
6210 switch (r_type)
6211 {
6212 case R_NDS32_GOT_HI20:
6213 case R_NDS32_GOT_LO12:
6214 case R_NDS32_GOT_LO15:
6215 case R_NDS32_GOT_LO19:
6216 case R_NDS32_GOT17S2_RELA:
6217 case R_NDS32_GOT15S2_RELA:
6218 case R_NDS32_GOTOFF:
6219 case R_NDS32_GOTOFF_HI20:
6220 case R_NDS32_GOTOFF_LO12:
6221 case R_NDS32_GOTOFF_LO15:
6222 case R_NDS32_GOTOFF_LO19:
6223 case R_NDS32_GOTPC20:
6224 case R_NDS32_GOTPC_HI20:
6225 case R_NDS32_GOTPC_LO12:
6226 case R_NDS32_GOT20:
1c8f6a4d
KLC
6227 case R_NDS32_TLS_IE_HI20:
6228 case R_NDS32_TLS_IE_LO12S2:
35c08157
KLC
6229 if (dynobj == NULL)
6230 htab->root.dynobj = dynobj = abfd;
ce558b89 6231 if (!_bfd_elf_create_got_section (dynobj, info))
35c08157
KLC
6232 return FALSE;
6233 break;
6234
6235 default:
6236 break;
6237 }
6238 }
6239
6240 switch ((int) r_type)
6241 {
6242 case R_NDS32_GOT_HI20:
6243 case R_NDS32_GOT_LO12:
6244 case R_NDS32_GOT_LO15:
6245 case R_NDS32_GOT_LO19:
6246 case R_NDS32_GOT20:
1c8f6a4d
KLC
6247 case R_NDS32_TLS_IE_HI20:
6248 case R_NDS32_TLS_IE_LO12S2:
6249 switch (r_type)
6250 {
6251 case R_NDS32_TLS_IE_HI20:
6252 case R_NDS32_TLS_IE_LO12S2:
6253 tls_type = GOT_TLS_IE;
6254 break;
6255 default:
6256 tls_type = GOT_NORMAL;
6257 break;
6258 }
35c08157 6259 if (h != NULL)
1c8f6a4d
KLC
6260 {
6261 old_tls_type = elf32_nds32_hash_entry (h)->tls_type;
6262 h->got.refcount += 1;
6263 }
35c08157
KLC
6264 else
6265 {
6266 bfd_signed_vma *local_got_refcounts;
6267
6268 /* This is a global offset table entry for a local
6269 symbol. */
6270 local_got_refcounts = elf_local_got_refcounts (abfd);
6271 if (local_got_refcounts == NULL)
6272 {
6273 bfd_size_type size;
6274
6275 size = symtab_hdr->sh_info;
6276 size *= sizeof (bfd_signed_vma);
6277 local_got_refcounts = (bfd_signed_vma *) bfd_zalloc (abfd, size);
6278 if (local_got_refcounts == NULL)
6279 return FALSE;
6280 elf_local_got_refcounts (abfd) = local_got_refcounts;
6281 }
6282 local_got_refcounts[r_symndx] += 1;
1c8f6a4d 6283 old_tls_type = elf32_nds32_local_got_tls_type (abfd)[r_symndx];
35c08157 6284 }
35c08157 6285
1c8f6a4d
KLC
6286 /* We will already have issued an error message if there
6287 is a TLS/non-TLS mismatch, based on the symbol
6288 type. So just combine any TLS types needed. */
6289 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
6290 && tls_type != GOT_NORMAL)
6291 tls_type |= old_tls_type;
6292
6293 if (old_tls_type != tls_type)
6294 {
6295 if (h != NULL)
6296 elf32_nds32_hash_entry (h)->tls_type = tls_type;
6297 else
6298 elf32_nds32_local_got_tls_type (abfd)[r_symndx] = tls_type;
6299 }
6300 break;
6301 case R_NDS32_9_PLTREL:
35c08157
KLC
6302 case R_NDS32_25_PLTREL:
6303 case R_NDS32_PLTREL_HI20:
6304 case R_NDS32_PLTREL_LO12:
6305 case R_NDS32_PLT_GOTREL_HI20:
6306 case R_NDS32_PLT_GOTREL_LO12:
6307 case R_NDS32_PLT_GOTREL_LO15:
6308 case R_NDS32_PLT_GOTREL_LO19:
6309 case R_NDS32_PLT_GOTREL_LO20:
6310
6311 /* This symbol requires a procedure linkage table entry. We
6312 actually build the entry in adjust_dynamic_symbol,
6313 because this might be a case of linking PIC code without
6314 linking in any dynamic objects, in which case we don't
6315 need to generate a procedure linkage table after all. */
6316
6317 /* If this is a local symbol, we resolve it directly without
6318 creating a procedure linkage table entry. */
6319 if (h == NULL)
6320 continue;
6321
6322 if (h->forced_local)
6323 break;
6324
1c8f6a4d 6325 elf32_nds32_hash_entry (h)->tls_type = GOT_NORMAL;
35c08157
KLC
6326 h->needs_plt = 1;
6327 h->plt.refcount += 1;
6328 break;
6329
6330 case R_NDS32_16_RELA:
6331 case R_NDS32_20_RELA:
6332 case R_NDS32_5_RELA:
6333 case R_NDS32_32_RELA:
6334 case R_NDS32_HI20_RELA:
6335 case R_NDS32_LO12S3_RELA:
6336 case R_NDS32_LO12S2_RELA:
6337 case R_NDS32_LO12S2_DP_RELA:
6338 case R_NDS32_LO12S2_SP_RELA:
6339 case R_NDS32_LO12S1_RELA:
6340 case R_NDS32_LO12S0_RELA:
6341 case R_NDS32_LO12S0_ORI_RELA:
6342 case R_NDS32_SDA16S3_RELA:
6343 case R_NDS32_SDA17S2_RELA:
6344 case R_NDS32_SDA18S1_RELA:
6345 case R_NDS32_SDA19S0_RELA:
6346 case R_NDS32_SDA15S3_RELA:
6347 case R_NDS32_SDA15S2_RELA:
6348 case R_NDS32_SDA12S2_DP_RELA:
6349 case R_NDS32_SDA12S2_SP_RELA:
6350 case R_NDS32_SDA15S1_RELA:
6351 case R_NDS32_SDA15S0_RELA:
6352 case R_NDS32_SDA_FP7U2_RELA:
6353 case R_NDS32_15_PCREL_RELA:
6354 case R_NDS32_17_PCREL_RELA:
6355 case R_NDS32_25_PCREL_RELA:
6356
0e1862bb 6357 if (h != NULL && !bfd_link_pic (info))
35c08157
KLC
6358 {
6359 h->non_got_ref = 1;
6360 h->plt.refcount += 1;
6361 }
6362
6363 /* If we are creating a shared library, and this is a reloc against
6364 a global symbol, or a non PC relative reloc against a local
6365 symbol, then we need to copy the reloc into the shared library.
6366 However, if we are linking with -Bsymbolic, we do not need to
6367 copy a reloc against a global symbol which is defined in an
6368 object we are including in the link (i.e., DEF_REGULAR is set).
6369 At this point we have not seen all the input files, so it is
6370 possible that DEF_REGULAR is not set now but will be set later
6371 (it is never cleared). We account for that possibility below by
6372 storing information in the dyn_relocs field of the hash table
6373 entry. A similar situation occurs when creating shared libraries
6374 and symbol visibility changes render the symbol local.
6375
6376 If on the other hand, we are creating an executable, we may need
6377 to keep relocations for symbols satisfied by a dynamic library
6378 if we manage to avoid copy relocs for the symbol. */
0e1862bb 6379 if ((bfd_link_pic (info)
35c08157
KLC
6380 && (sec->flags & SEC_ALLOC) != 0
6381 && ((r_type != R_NDS32_25_PCREL_RELA
6382 && r_type != R_NDS32_15_PCREL_RELA
6383 && r_type != R_NDS32_17_PCREL_RELA
6384 && !(r_type == R_NDS32_32_RELA
6385 && strcmp (sec->name, ".eh_frame") == 0))
6386 || (h != NULL
6387 && (!info->symbolic
6388 || h->root.type == bfd_link_hash_defweak
6389 || !h->def_regular))))
0e1862bb 6390 || (!bfd_link_pic (info)
35c08157
KLC
6391 && (sec->flags & SEC_ALLOC) != 0
6392 && h != NULL
6393 && (h->root.type == bfd_link_hash_defweak
6394 || !h->def_regular)))
6395 {
6396 struct elf_nds32_dyn_relocs *p;
6397 struct elf_nds32_dyn_relocs **head;
6398
6399 if (dynobj == NULL)
6400 htab->root.dynobj = dynobj = abfd;
6401
6402 /* When creating a shared object, we must copy these
6403 relocs into the output file. We create a reloc
6404 section in dynobj and make room for the reloc. */
6405 if (sreloc == NULL)
6406 {
6407 const char *name;
6408
6409 name = bfd_elf_string_from_elf_section
6410 (abfd, elf_elfheader (abfd)->e_shstrndx,
6411 elf_section_data (sec)->rela.hdr->sh_name);
6412 if (name == NULL)
6413 return FALSE;
6414
6415 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
6416 && strcmp (bfd_get_section_name (abfd, sec),
6417 name + 5) == 0);
6418
6419 sreloc = bfd_get_section_by_name (dynobj, name);
6420 if (sreloc == NULL)
6421 {
6422 flagword flags;
6423
6424 sreloc = bfd_make_section (dynobj, name);
6425 flags = (SEC_HAS_CONTENTS | SEC_READONLY
6426 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
6427 if ((sec->flags & SEC_ALLOC) != 0)
6428 flags |= SEC_ALLOC | SEC_LOAD;
6429 if (sreloc == NULL
6430 || !bfd_set_section_flags (dynobj, sreloc, flags)
6431 || !bfd_set_section_alignment (dynobj, sreloc, 2))
6432 return FALSE;
6433
6434 elf_section_type (sreloc) = SHT_RELA;
6435 }
6436 elf_section_data (sec)->sreloc = sreloc;
6437 }
6438
6439 /* If this is a global symbol, we count the number of
6440 relocations we need for this symbol. */
6441 if (h != NULL)
6442 head = &((struct elf_nds32_link_hash_entry *) h)->dyn_relocs;
6443 else
6444 {
6445 asection *s;
61034b0b 6446 void *vpp;
35c08157
KLC
6447
6448 Elf_Internal_Sym *isym;
6449 isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, r_symndx);
6450 if (isym == NULL)
6451 return FALSE;
6452
6453 /* Track dynamic relocs needed for local syms too. */
6454 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
6455 if (s == NULL)
6456 return FALSE;
6457
61034b0b
MR
6458 vpp = &elf_section_data (s)->local_dynrel;
6459 head = (struct elf_nds32_dyn_relocs **) vpp;
35c08157
KLC
6460 }
6461
6462 p = *head;
6463 if (p == NULL || p->sec != sec)
6464 {
6465 bfd_size_type amt = sizeof (*p);
6466 p = (struct elf_nds32_dyn_relocs *) bfd_alloc (dynobj, amt);
6467 if (p == NULL)
6468 return FALSE;
6469 p->next = *head;
6470 *head = p;
6471 p->sec = sec;
6472 p->count = 0;
6473 p->pc_count = 0;
6474 }
6475
6476 p->count += 1;
6477 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA
6478 || ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6479 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA)
6480 p->pc_count += 1;
6481 }
6482 break;
6483
6484 /* This relocation describes the C++ object vtable hierarchy.
6485 Reconstruct it for later use during GC. */
6486 case R_NDS32_RELA_GNU_VTINHERIT:
6487 case R_NDS32_GNU_VTINHERIT:
6488 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
6489 return FALSE;
6490 break;
6491
6492 /* This relocation describes which C++ vtable entries are actually
6493 used. Record for later use during GC. */
6494 case R_NDS32_GNU_VTENTRY:
6495 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
6496 return FALSE;
6497 break;
6498 case R_NDS32_RELA_GNU_VTENTRY:
6499 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
6500 return FALSE;
6501 break;
6502 }
6503 }
6504
6505 return TRUE;
6506}
6507
6508/* Write VAL in uleb128 format to P, returning a pointer to the
6509 following byte.
6510 This code is copied from elf-attr.c. */
6511
6512static bfd_byte *
6513write_uleb128 (bfd_byte *p, unsigned int val)
6514{
6515 bfd_byte c;
6516 do
6517 {
6518 c = val & 0x7f;
6519 val >>= 7;
6520 if (val)
6521 c |= 0x80;
6522 *(p++) = c;
6523 }
6524 while (val);
6525 return p;
6526}
6527
6528static bfd_signed_vma
6529calculate_offset (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
6530 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr,
6531 int *pic_ext_target)
6532{
6533 bfd_signed_vma foff;
6534 bfd_vma symval, addend;
6535 asection *sym_sec;
6536
6537 /* Get the value of the symbol referred to by the reloc. */
6538 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6539 {
6540 Elf_Internal_Sym *isym;
6541
6542 /* A local symbol. */
6543 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6544
6545 if (isym->st_shndx == SHN_UNDEF)
6546 sym_sec = bfd_und_section_ptr;
6547 else if (isym->st_shndx == SHN_ABS)
6548 sym_sec = bfd_abs_section_ptr;
6549 else if (isym->st_shndx == SHN_COMMON)
6550 sym_sec = bfd_com_section_ptr;
6551 else
6552 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6553 symval = isym->st_value + sym_sec->output_section->vma
6554 + sym_sec->output_offset;
6555 }
6556 else
6557 {
6558 unsigned long indx;
6559 struct elf_link_hash_entry *h;
6560 bfd *owner;
6561
6562 /* An external symbol. */
6563 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6564 h = elf_sym_hashes (abfd)[indx];
6565 BFD_ASSERT (h != NULL);
6566
6567 if (h->root.type != bfd_link_hash_defined
6568 && h->root.type != bfd_link_hash_defweak)
6569 /* This appears to be a reference to an undefined
6570 symbol. Just ignore it--it will be caught by the
6571 regular reloc processing. */
6572 return 0;
6573 owner = h->root.u.def.section->owner;
6574 if (owner && (elf_elfheader (owner)->e_flags & E_NDS32_HAS_PIC))
6575 *pic_ext_target = 1;
6576
6577 if (h->root.u.def.section->flags & SEC_MERGE)
6578 {
6579 sym_sec = h->root.u.def.section;
6580 symval = _bfd_merged_section_offset (abfd, &sym_sec,
6581 elf_section_data (sym_sec)->sec_info,
6582 h->root.u.def.value);
6583 symval = symval + sym_sec->output_section->vma
6584 + sym_sec->output_offset;
6585 }
6586 else
6587 symval = (h->root.u.def.value
6588 + h->root.u.def.section->output_section->vma
6589 + h->root.u.def.section->output_offset);
6590 }
6591
6592 addend = irel->r_addend;
6593
6594 foff = (symval + addend
6595 - (irel->r_offset + sec->output_section->vma + sec->output_offset));
6596 return foff;
6597}
6598
6599static bfd_vma
6600calculate_plt_memory_address (bfd *abfd, struct bfd_link_info *link_info,
6601 Elf_Internal_Sym *isymbuf,
6602 Elf_Internal_Rela *irel,
6603 Elf_Internal_Shdr *symtab_hdr)
6604{
6605 bfd_vma symval;
6606
6607 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6608 {
6609 Elf_Internal_Sym *isym;
6610 asection *sym_sec;
6611 /* A local symbol. */
6612 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6613
6614 if (isym->st_shndx == SHN_UNDEF)
6615 sym_sec = bfd_und_section_ptr;
6616 else if (isym->st_shndx == SHN_ABS)
6617 sym_sec = bfd_abs_section_ptr;
6618 else if (isym->st_shndx == SHN_COMMON)
6619 sym_sec = bfd_com_section_ptr;
6620 else
6621 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6622 symval = isym->st_value + sym_sec->output_section->vma
6623 + sym_sec->output_offset;
6624 }
6625 else
6626 {
6627 unsigned long indx;
6628 struct elf_link_hash_entry *h;
6629 struct elf_nds32_link_hash_table *htab;
6630 asection *splt;
6631
6632 /* An external symbol. */
6633 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6634 h = elf_sym_hashes (abfd)[indx];
6635 BFD_ASSERT (h != NULL);
6636 htab = nds32_elf_hash_table (link_info);
ce558b89 6637 splt = htab->root.splt;
35c08157
KLC
6638
6639 while (h->root.type == bfd_link_hash_indirect
6640 || h->root.type == bfd_link_hash_warning)
6641 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6642
6643 if (h->plt.offset == (bfd_vma) - 1)
6644 {
6645 if (h->root.type != bfd_link_hash_defined
6646 && h->root.type != bfd_link_hash_defweak)
6647 /* This appears to be a reference to an undefined
6648 * symbol. Just ignore it--it will be caught by the
6649 * regular reloc processing. */
6650 return 0;
6651 symval = (h->root.u.def.value
6652 + h->root.u.def.section->output_section->vma
6653 + h->root.u.def.section->output_offset);
6654 }
6655 else
6656 symval = splt->output_section->vma + h->plt.offset;
6657 }
6658
6659 return symval;
6660}
6661
6662static bfd_signed_vma
6663calculate_plt_offset (bfd *abfd, asection *sec, struct bfd_link_info *link_info,
6664 Elf_Internal_Sym *isymbuf, Elf_Internal_Rela *irel,
6665 Elf_Internal_Shdr *symtab_hdr)
6666{
6667 bfd_vma foff;
6668 if ((foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
6669 symtab_hdr)) == 0)
6670 return 0;
6671 else
6672 return foff - (irel->r_offset
6673 + sec->output_section->vma + sec->output_offset);
6674}
6675\f
6676/* Convert a 32-bit instruction to 16-bit one.
6677 INSN is the input 32-bit instruction, INSN16 is the output 16-bit
6678 instruction. If INSN_TYPE is not NULL, it the CGEN instruction
6679 type of INSN16. Return 1 if successful. */
6680
6681static int
6682nds32_convert_32_to_16_alu1 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6683 int *pinsn_type)
6684{
6685 uint16_t insn16 = 0;
6cae483a 6686 int insn_type = 0;
35c08157
KLC
6687 unsigned long mach = bfd_get_mach (abfd);
6688
6689 if (N32_SH5 (insn) != 0)
6690 return 0;
6691
6692 switch (N32_SUB5 (insn))
6693 {
6694 case N32_ALU1_ADD_SLLI:
6695 case N32_ALU1_ADD_SRLI:
6696 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6697 {
6698 insn16 = N16_TYPE333 (ADD333, N32_RT5 (insn), N32_RA5 (insn),
6699 N32_RB5 (insn));
6700 insn_type = NDS32_INSN_ADD333;
6701 }
6702 else if (N32_IS_RT4 (insn))
6703 {
6704 if (N32_RT5 (insn) == N32_RA5 (insn))
6705 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RB5 (insn));
6706 else if (N32_RT5 (insn) == N32_RB5 (insn))
6707 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RA5 (insn));
6708 insn_type = NDS32_INSN_ADD45;
6709 }
6710 break;
6711
6712 case N32_ALU1_SUB_SLLI:
6713 case N32_ALU1_SUB_SRLI:
6714 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6715 {
6716 insn16 = N16_TYPE333 (SUB333, N32_RT5 (insn), N32_RA5 (insn),
6717 N32_RB5 (insn));
6718 insn_type = NDS32_INSN_SUB333;
6719 }
6720 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6721 {
6722 insn16 = N16_TYPE45 (SUB45, N32_RT54 (insn), N32_RB5 (insn));
6723 insn_type = NDS32_INSN_SUB45;
6724 }
6725 break;
6726
6727 case N32_ALU1_AND_SLLI:
6728 case N32_ALU1_AND_SRLI:
6729 /* and $rt, $rt, $rb -> and33 for v3, v3m. */
6730 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6731 && N32_IS_RB3 (insn))
6732 {
6733 if (N32_RT5 (insn) == N32_RA5 (insn))
6734 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RB5 (insn));
6735 else if (N32_RT5 (insn) == N32_RB5 (insn))
6736 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RA5 (insn));
6737 if (insn16)
6738 insn_type = NDS32_INSN_AND33;
6739 }
6740 break;
6741
6742 case N32_ALU1_XOR_SLLI:
6743 case N32_ALU1_XOR_SRLI:
6744 /* xor $rt, $rt, $rb -> xor33 for v3, v3m. */
6745 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6746 && N32_IS_RB3 (insn))
6747 {
6748 if (N32_RT5 (insn) == N32_RA5 (insn))
6749 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RB5 (insn));
6750 else if (N32_RT5 (insn) == N32_RB5 (insn))
6751 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RA5 (insn));
6752 if (insn16)
6753 insn_type = NDS32_INSN_XOR33;
6754 }
6755 break;
6756
6757 case N32_ALU1_OR_SLLI:
6758 case N32_ALU1_OR_SRLI:
6759 /* or $rt, $rt, $rb -> or33 for v3, v3m. */
6760 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6761 && N32_IS_RB3 (insn))
6762 {
6763 if (N32_RT5 (insn) == N32_RA5 (insn))
6764 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RB5 (insn));
6765 else if (N32_RT5 (insn) == N32_RB5 (insn))
6766 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RA5 (insn));
6767 if (insn16)
6768 insn_type = NDS32_INSN_OR33;
6769 }
6770 break;
6771 case N32_ALU1_NOR:
6772 /* nor $rt, $ra, $ra -> not33 for v3, v3m. */
6773 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RB3 (insn)
6774 && N32_RA5 (insn) == N32_RB5 (insn))
6775 {
6776 insn16 = N16_MISC33 (NOT33, N32_RT5 (insn), N32_RA5 (insn));
6777 insn_type = NDS32_INSN_NOT33;
6778 }
6779 break;
6780 case N32_ALU1_SRAI:
6781 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6782 {
6783 insn16 = N16_TYPE45 (SRAI45, N32_RT54 (insn), N32_UB5 (insn));
6784 insn_type = NDS32_INSN_SRAI45;
6785 }
6786 break;
6787
6788 case N32_ALU1_SRLI:
6789 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6790 {
6791 insn16 = N16_TYPE45 (SRLI45, N32_RT54 (insn), N32_UB5 (insn));
6792 insn_type = NDS32_INSN_SRLI45;
6793 }
6794 break;
6795
6796 case N32_ALU1_SLLI:
6797 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_UB5 (insn) < 8)
6798 {
6799 insn16 = N16_TYPE333 (SLLI333, N32_RT5 (insn), N32_RA5 (insn),
6800 N32_UB5 (insn));
6801 insn_type = NDS32_INSN_SLLI333;
6802 }
6803 break;
6804
6805 case N32_ALU1_ZEH:
6806 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6807 {
6808 insn16 = N16_BFMI333 (ZEH33, N32_RT5 (insn), N32_RA5 (insn));
6809 insn_type = NDS32_INSN_ZEH33;
6810 }
6811 break;
6812
6813 case N32_ALU1_SEB:
6814 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6815 {
6816 insn16 = N16_BFMI333 (SEB33, N32_RT5 (insn), N32_RA5 (insn));
6817 insn_type = NDS32_INSN_SEB33;
6818 }
6819 break;
6820
6821 case N32_ALU1_SEH:
6822 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6823 {
6824 insn16 = N16_BFMI333 (SEH33, N32_RT5 (insn), N32_RA5 (insn));
6825 insn_type = NDS32_INSN_SEH33;
6826 }
6827 break;
6828
6829 case N32_ALU1_SLT:
6830 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
6831 {
6832 /* Implicit r15. */
6833 insn16 = N16_TYPE45 (SLT45, N32_RA54 (insn), N32_RB5 (insn));
6834 insn_type = NDS32_INSN_SLT45;
6835 }
6836 break;
6837
6838 case N32_ALU1_SLTS:
6839 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
6840 {
6841 /* Implicit r15. */
6842 insn16 = N16_TYPE45 (SLTS45, N32_RA54 (insn), N32_RB5 (insn));
6843 insn_type = NDS32_INSN_SLTS45;
6844 }
6845 break;
6846 }
6847
6848 if ((insn16 & 0x8000) == 0)
6849 return 0;
6850
6851 if (pinsn16)
6852 *pinsn16 = insn16;
6853 if (pinsn_type)
6854 *pinsn_type = insn_type;
6855 return 1;
6856}
6857
6858static int
6859nds32_convert_32_to_16_alu2 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6860 int *pinsn_type)
6861{
6862 uint16_t insn16 = 0;
6863 int insn_type;
6864 unsigned long mach = bfd_get_mach (abfd);
6865
6866 /* TODO: bset, bclr, btgl, btst. */
6867 if (__GF (insn, 6, 4) != 0)
6868 return 0;
6869
6870 switch (N32_IMMU (insn, 6))
6871 {
6872 case N32_ALU2_MUL:
6873 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6874 && N32_IS_RB3 (insn))
6875 {
6876 if (N32_RT5 (insn) == N32_RA5 (insn))
6877 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RB5 (insn));
6878 else if (N32_RT5 (insn) == N32_RB5 (insn))
6879 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RA5 (insn));
6880 if (insn16)
6881 insn_type = NDS32_INSN_MUL33;
6882 }
6883 }
6884
6885 if ((insn16 & 0x8000) == 0)
6886 return 0;
6887
6888 if (pinsn16)
6889 *pinsn16 = insn16;
6890 if (pinsn_type)
6891 *pinsn_type = insn_type;
6892 return 1;
6893}
6894
6895int
6896nds32_convert_32_to_16 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6897 int *pinsn_type)
6898{
6899 int op6;
6900 uint16_t insn16 = 0;
6901 int insn_type;
6902 unsigned long mach = bfd_get_mach (abfd);
6903
6904 /* Decode 32-bit instruction. */
6905 if (insn & 0x80000000)
6906 {
6907 /* Not 32-bit insn. */
6908 return 0;
6909 }
6910
6911 op6 = N32_OP6 (insn);
6912
6913 /* Convert it to 16-bit instruction. */
6914 switch (op6)
6915 {
6916 case N32_OP6_MOVI:
6917 if (IS_WITHIN_S (N32_IMM20S (insn), 5))
6918 {
6919 insn16 = N16_TYPE55 (MOVI55, N32_RT5 (insn), N32_IMM20S (insn));
6920 insn_type = NDS32_INSN_MOVI55;
6921 }
6922 else if (mach >= MACH_V3 && N32_IMM20S (insn) >= 16
6923 && N32_IMM20S (insn) < 48 && N32_IS_RT4 (insn))
6924 {
6925 insn16 = N16_TYPE45 (MOVPI45, N32_RT54 (insn),
6926 N32_IMM20S (insn) - 16);
6927 insn_type = NDS32_INSN_MOVPI45;
6928 }
6929 break;
6930
6931 case N32_OP6_ADDI:
6932 if (N32_IMM15S (insn) == 0)
6933 {
6934 /* Do not convert `addi $sp, $sp, 0' to `mov55 $sp, $sp',
6935 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
6936 if (mach <= MACH_V2
6937 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
6938 {
6939 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
6940 insn_type = NDS32_INSN_MOV55;
6941 }
6942 }
6943 else if (N32_IMM15S (insn) > 0)
6944 {
6945 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) < 8)
6946 {
6947 insn16 = N16_TYPE333 (ADDI333, N32_RT5 (insn), N32_RA5 (insn),
6948 N32_IMM15S (insn));
6949 insn_type = NDS32_INSN_ADDI333;
6950 }
6951 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
6952 && N32_IMM15S (insn) < 32)
6953 {
6954 insn16 = N16_TYPE45 (ADDI45, N32_RT54 (insn), N32_IMM15S (insn));
6955 insn_type = NDS32_INSN_ADDI45;
6956 }
6957 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
6958 && N32_RT5 (insn) == N32_RA5 (insn)
6959 && N32_IMM15S (insn) < 512)
6960 {
6961 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
6962 insn_type = NDS32_INSN_ADDI10_SP;
6963 }
6964 else if (mach >= MACH_V3 && N32_IS_RT3 (insn)
6965 && N32_RA5 (insn) == REG_SP && N32_IMM15S (insn) < 256
6966 && (N32_IMM15S (insn) % 4 == 0))
6967 {
6968 insn16 = N16_TYPE36 (ADDRI36_SP, N32_RT5 (insn),
6969 N32_IMM15S (insn) >> 2);
6970 insn_type = NDS32_INSN_ADDRI36_SP;
6971 }
6972 }
6973 else
6974 {
6975 /* Less than 0. */
6976 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) > -8)
6977 {
6978 insn16 = N16_TYPE333 (SUBI333, N32_RT5 (insn), N32_RA5 (insn),
6979 0 - N32_IMM15S (insn));
6980 insn_type = NDS32_INSN_SUBI333;
6981 }
6982 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
6983 && N32_IMM15S (insn) > -32)
6984 {
1c8f6a4d
KLC
6985 insn16 = N16_TYPE45 (SUBI45, N32_RT54 (insn),
6986 0 - N32_IMM15S (insn));
35c08157
KLC
6987 insn_type = NDS32_INSN_SUBI45;
6988 }
6989 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
6990 && N32_RT5 (insn) == N32_RA5 (insn)
6991 && N32_IMM15S (insn) >= -512)
6992 {
6993 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
6994 insn_type = NDS32_INSN_ADDI10_SP;
6995 }
6996 }
6997 break;
6998
6999 case N32_OP6_ORI:
7000 if (N32_IMM15S (insn) == 0)
7001 {
7002 /* Do not convert `ori $sp, $sp, 0' to `mov55 $sp, $sp',
7003 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
7004 if (mach <= MACH_V2
7005 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
7006 {
7007 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
7008 insn_type = NDS32_INSN_MOV55;
7009 }
7010 }
7011 break;
7012
7013 case N32_OP6_SUBRI:
7014 if (mach >= MACH_V3 && N32_IS_RT3 (insn)
7015 && N32_IS_RA3 (insn) && N32_IMM15S (insn) == 0)
7016 {
7017 insn16 = N16_MISC33 (NEG33, N32_RT5 (insn), N32_RA5 (insn));
7018 insn_type = NDS32_INSN_NEG33;
7019 }
7020 break;
7021
7022 case N32_OP6_ANDI:
7023 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7024 {
7025 if (N32_IMM15U (insn) == 1)
7026 {
7027 insn16 = N16_BFMI333 (XLSB33, N32_RT5 (insn), N32_RA5 (insn));
7028 insn_type = NDS32_INSN_XLSB33;
7029 }
7030 else if (N32_IMM15U (insn) == 0x7ff)
7031 {
7032 insn16 = N16_BFMI333 (X11B33, N32_RT5 (insn), N32_RA5 (insn));
7033 insn_type = NDS32_INSN_X11B33;
7034 }
7035 else if (N32_IMM15U (insn) == 0xff)
7036 {
7037 insn16 = N16_BFMI333 (ZEB33, N32_RT5 (insn), N32_RA5 (insn));
7038 insn_type = NDS32_INSN_ZEB33;
7039 }
7040 else if (mach >= MACH_V3 && N32_RT5 (insn) == N32_RA5 (insn)
7041 && N32_IMM15U (insn) < 256)
7042 {
7043 int imm15u = N32_IMM15U (insn);
7044
7045 if (__builtin_popcount (imm15u) == 1)
7046 {
7047 /* BMSKI33 */
7048 int imm3u = __builtin_ctz (imm15u);
7049
7050 insn16 = N16_BFMI333 (BMSKI33, N32_RT5 (insn), imm3u);
7051 insn_type = NDS32_INSN_BMSKI33;
7052 }
7053 else if (imm15u != 0 && __builtin_popcount (imm15u + 1) == 1)
7054 {
7055 /* FEXTI33 */
7056 int imm3u = __builtin_ctz (imm15u + 1) - 1;
7057
7058 insn16 = N16_BFMI333 (FEXTI33, N32_RT5 (insn), imm3u);
7059 insn_type = NDS32_INSN_FEXTI33;
7060 }
7061 }
7062 }
7063 break;
7064
7065 case N32_OP6_SLTI:
7066 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7067 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7068 {
7069 insn16 = N16_TYPE45 (SLTI45, N32_RA54 (insn), N32_IMM15S (insn));
7070 insn_type = NDS32_INSN_SLTI45;
7071 }
7072 break;
7073
7074 case N32_OP6_SLTSI:
7075 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7076 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7077 {
7078 insn16 = N16_TYPE45 (SLTSI45, N32_RA54 (insn), N32_IMM15S (insn));
7079 insn_type = NDS32_INSN_SLTSI45;
7080 }
7081 break;
7082
7083 case N32_OP6_LWI:
7084 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7085 {
7086 insn16 = N16_TYPE45 (LWI450, N32_RT54 (insn), N32_RA5 (insn));
7087 insn_type = NDS32_INSN_LWI450;
7088 }
7089 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7090 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7091 {
7092 insn16 = N16_TYPE333 (LWI333, N32_RT5 (insn), N32_RA5 (insn),
7093 N32_IMM15S (insn));
7094 insn_type = NDS32_INSN_LWI333;
7095 }
7096 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7097 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7098 {
7099 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7100 insn_type = NDS32_INSN_LWI37;
7101 }
7102 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7103 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7104 {
7105 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 0, N32_IMM15S (insn));
7106 insn_type = NDS32_INSN_LWI37_SP;
7107 }
7108 else if (mach >= MACH_V2 && N32_IS_RT4 (insn) && N32_RA5 (insn) == REG_R8
7109 && -32 <= N32_IMM15S (insn) && N32_IMM15S (insn) < 0)
7110 {
1c8f6a4d
KLC
7111 insn16 = N16_TYPE45 (LWI45_FE, N32_RT54 (insn),
7112 N32_IMM15S (insn) + 32);
35c08157
KLC
7113 insn_type = NDS32_INSN_LWI45_FE;
7114 }
7115 break;
7116
7117 case N32_OP6_SWI:
7118 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7119 {
7120 insn16 = N16_TYPE45 (SWI450, N32_RT54 (insn), N32_RA5 (insn));
7121 insn_type = NDS32_INSN_SWI450;
7122 }
7123 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7124 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7125 {
1c8f6a4d
KLC
7126 insn16 = N16_TYPE333 (SWI333, N32_RT5 (insn), N32_RA5 (insn),
7127 N32_IMM15S (insn));
35c08157
KLC
7128 insn_type = NDS32_INSN_SWI333;
7129 }
7130 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7131 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7132 {
7133 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7134 insn_type = NDS32_INSN_SWI37;
7135 }
7136 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7137 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7138 {
7139 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 1, N32_IMM15S (insn));
7140 insn_type = NDS32_INSN_SWI37_SP;
7141 }
7142 break;
7143
7144 case N32_OP6_LWI_BI:
7145 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7146 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7147 {
7148 insn16 = N16_TYPE333 (LWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7149 N32_IMM15S (insn));
7150 insn_type = NDS32_INSN_LWI333_BI;
7151 }
7152 break;
7153
7154 case N32_OP6_SWI_BI:
7155 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7156 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7157 {
7158 insn16 = N16_TYPE333 (SWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7159 N32_IMM15S (insn));
7160 insn_type = NDS32_INSN_SWI333_BI;
7161 }
7162 break;
7163
7164 case N32_OP6_LHI:
7165 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7166 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7167 {
7168 insn16 = N16_TYPE333 (LHI333, N32_RT5 (insn), N32_RA5 (insn),
7169 N32_IMM15S (insn));
7170 insn_type = NDS32_INSN_LHI333;
7171 }
7172 break;
7173
7174 case N32_OP6_SHI:
7175 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7176 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7177 {
7178 insn16 = N16_TYPE333 (SHI333, N32_RT5 (insn), N32_RA5 (insn),
7179 N32_IMM15S (insn));
7180 insn_type = NDS32_INSN_SHI333;
7181 }
7182 break;
7183
7184 case N32_OP6_LBI:
7185 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7186 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7187 {
7188 insn16 = N16_TYPE333 (LBI333, N32_RT5 (insn), N32_RA5 (insn),
7189 N32_IMM15S (insn));
7190 insn_type = NDS32_INSN_LBI333;
7191 }
7192 break;
7193
7194 case N32_OP6_SBI:
7195 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7196 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7197 {
7198 insn16 = N16_TYPE333 (SBI333, N32_RT5 (insn), N32_RA5 (insn),
7199 N32_IMM15S (insn));
7200 insn_type = NDS32_INSN_SBI333;
7201 }
7202 break;
7203
7204 case N32_OP6_ALU1:
7205 return nds32_convert_32_to_16_alu1 (abfd, insn, pinsn16, pinsn_type);
7206
7207 case N32_OP6_ALU2:
7208 return nds32_convert_32_to_16_alu2 (abfd, insn, pinsn16, pinsn_type);
7209
7210 case N32_OP6_BR1:
7211 if (!IS_WITHIN_S (N32_IMM14S (insn), 8))
7212 goto done;
7213
4ec521f2 7214 if ((insn & N32_BIT (14)) == 0)
35c08157
KLC
7215 {
7216 /* N32_BR1_BEQ */
7217 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7218 && N32_RT5 (insn) != REG_R5)
7219 insn16 = N16_TYPE38 (BEQS38, N32_RT5 (insn), N32_IMM14S (insn));
7220 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7221 && N32_RA5 (insn) != REG_R5)
7222 insn16 = N16_TYPE38 (BEQS38, N32_RA5 (insn), N32_IMM14S (insn));
7223 insn_type = NDS32_INSN_BEQS38;
7224 break;
7225 }
7226 else
7227 {
7228 /* N32_BR1_BNE */
7229 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7230 && N32_RT5 (insn) != REG_R5)
7231 insn16 = N16_TYPE38 (BNES38, N32_RT5 (insn), N32_IMM14S (insn));
7232 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7233 && N32_RA5 (insn) != REG_R5)
7234 insn16 = N16_TYPE38 (BNES38, N32_RA5 (insn), N32_IMM14S (insn));
7235 insn_type = NDS32_INSN_BNES38;
7236 break;
7237 }
7238 break;
7239
7240 case N32_OP6_BR2:
7241 switch (N32_BR2_SUB (insn))
7242 {
7243 case N32_BR2_BEQZ:
7244 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7245 {
7246 insn16 = N16_TYPE38 (BEQZ38, N32_RT5 (insn), N32_IMM16S (insn));
7247 insn_type = NDS32_INSN_BEQZ38;
7248 }
1c8f6a4d
KLC
7249 else if (N32_RT5 (insn) == REG_R15
7250 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC
7251 {
7252 insn16 = N16_TYPE8 (BEQZS8, N32_IMM16S (insn));
7253 insn_type = NDS32_INSN_BEQZS8;
7254 }
7255 break;
7256
7257 case N32_BR2_BNEZ:
7258 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7259 {
7260 insn16 = N16_TYPE38 (BNEZ38, N32_RT5 (insn), N32_IMM16S (insn));
7261 insn_type = NDS32_INSN_BNEZ38;
7262 }
1c8f6a4d
KLC
7263 else if (N32_RT5 (insn) == REG_R15
7264 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC
7265 {
7266 insn16 = N16_TYPE8 (BNEZS8, N32_IMM16S (insn));
7267 insn_type = NDS32_INSN_BNEZS8;
7268 }
7269 break;
7270
7271 case N32_BR2_IFCALL:
7272 if (IS_WITHIN_U (N32_IMM16S (insn), 9))
7273 {
7274 insn16 = N16_TYPE9 (IFCALL9, N32_IMM16S (insn));
7275 insn_type = NDS32_INSN_IFCALL9;
7276 }
7277 break;
7278 }
7279 break;
7280
7281 case N32_OP6_JI:
4ec521f2 7282 if ((insn & N32_BIT (24)) == 0)
35c08157
KLC
7283 {
7284 /* N32_JI_J */
7285 if (IS_WITHIN_S (N32_IMM24S (insn), 8))
7286 {
7287 insn16 = N16_TYPE8 (J8, N32_IMM24S (insn));
7288 insn_type = NDS32_INSN_J8;
7289 }
7290 }
7291 break;
7292
7293 case N32_OP6_JREG:
7294 if (__GF (insn, 8, 2) != 0)
7295 goto done;
7296
7297 switch (N32_IMMU (insn, 5))
7298 {
7299 case N32_JREG_JR:
7300 if (N32_JREG_HINT (insn) == 0)
7301 {
7302 /* jr */
7303 insn16 = N16_TYPE5 (JR5, N32_RB5 (insn));
7304 insn_type = NDS32_INSN_JR5;
7305 }
7306 else if (N32_JREG_HINT (insn) == 1)
7307 {
7308 /* ret */
7309 insn16 = N16_TYPE5 (RET5, N32_RB5 (insn));
7310 insn_type = NDS32_INSN_RET5;
7311 }
7312 else if (N32_JREG_HINT (insn) == 3)
7313 {
7314 /* ifret = mov55 $sp, $sp */
7315 insn16 = N16_TYPE55 (MOV55, REG_SP, REG_SP);
7316 insn_type = NDS32_INSN_IFRET;
7317 }
7318 break;
7319
7320 case N32_JREG_JRAL:
7321 /* It's convertible when return rt5 is $lp and address
7322 translation is kept. */
7323 if (N32_RT5 (insn) == REG_LP && N32_JREG_HINT (insn) == 0)
7324 {
7325 insn16 = N16_TYPE5 (JRAL5, N32_RB5 (insn));
7326 insn_type = NDS32_INSN_JRAL5;
7327 }
7328 break;
7329 }
7330 break;
7331
7332 case N32_OP6_MISC:
7333 if (N32_SUB5 (insn) == N32_MISC_BREAK && N32_SWID (insn) < 32)
7334 {
7335 /* For v3, swid above 31 are used for ex9.it. */
7336 insn16 = N16_TYPE5 (BREAK16, N32_SWID (insn));
7337 insn_type = NDS32_INSN_BREAK16;
7338 }
7339 break;
7340
7341 default:
7342 /* This instruction has no 16-bit variant. */
7343 goto done;
7344 }
7345
7346done:
7347 /* Bit-15 of insn16 should be set for a valid instruction. */
7348 if ((insn16 & 0x8000) == 0)
7349 return 0;
7350
7351 if (pinsn16)
7352 *pinsn16 = insn16;
7353 if (pinsn_type)
7354 *pinsn_type = insn_type;
7355 return 1;
7356}
7357
7358static int
7359special_convert_32_to_16 (unsigned long insn, uint16_t *pinsn16,
7360 Elf_Internal_Rela *reloc)
7361{
7362 uint16_t insn16 = 0;
7363
7364 if ((reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG) == 0
7365 || (ELF32_R_TYPE (reloc->r_info) != R_NDS32_INSN16))
7366 return 0;
7367
7368 if (!N32_IS_RT3 (insn))
7369 return 0;
7370
7371 switch (N32_OP6 (insn))
7372 {
7373 case N32_OP6_LWI:
7374 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7375 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7376 break;
7377 case N32_OP6_SWI:
7378 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7379 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7380 break;
7381 case N32_OP6_HWGP:
7382 if (!IS_WITHIN_U (N32_IMM17S (insn), 7))
7383 break;
7384
7385 if (__GF (insn, 17, 3) == 6)
7386 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM17S (insn));
7387 else if (__GF (insn, 17, 3) == 7)
7388 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM17S (insn));
7389 break;
7390 }
7391
7392 if ((insn16 & 0x8000) == 0)
7393 return 0;
7394
7395 *pinsn16 = insn16;
7396 return 1;
7397}
7398
7399/* Convert a 16-bit instruction to 32-bit one.
7400 INSN16 it the input and PINSN it the point to output.
7401 Return non-zero on successful. Otherwise 0 is returned. */
7402
7403int
7404nds32_convert_16_to_32 (bfd *abfd, uint16_t insn16, uint32_t *pinsn)
7405{
7406 uint32_t insn = 0xffffffff;
7407 unsigned long mach = bfd_get_mach (abfd);
7408
7409 /* NOTE: push25, pop25 and movd44 do not have 32-bit variants. */
7410
7411 switch (__GF (insn16, 9, 6))
7412 {
7413 case 0x4: /* add45 */
1c8f6a4d
KLC
7414 insn = N32_ALU1 (ADD, N16_RT4 (insn16), N16_RT4 (insn16),
7415 N16_RA5 (insn16));
35c08157
KLC
7416 goto done;
7417 case 0x5: /* sub45 */
1c8f6a4d
KLC
7418 insn = N32_ALU1 (SUB, N16_RT4 (insn16), N16_RT4 (insn16),
7419 N16_RA5 (insn16));
35c08157
KLC
7420 goto done;
7421 case 0x6: /* addi45 */
1c8f6a4d
KLC
7422 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7423 N16_IMM5U (insn16));
35c08157
KLC
7424 goto done;
7425 case 0x7: /* subi45 */
1c8f6a4d
KLC
7426 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7427 -N16_IMM5U (insn16));
35c08157
KLC
7428 goto done;
7429 case 0x8: /* srai45 */
1c8f6a4d
KLC
7430 insn = N32_ALU1 (SRAI, N16_RT4 (insn16), N16_RT4 (insn16),
7431 N16_IMM5U (insn16));
35c08157
KLC
7432 goto done;
7433 case 0x9: /* srli45 */
1c8f6a4d
KLC
7434 insn = N32_ALU1 (SRLI, N16_RT4 (insn16), N16_RT4 (insn16),
7435 N16_IMM5U (insn16));
35c08157 7436 goto done;
35c08157 7437 case 0xa: /* slli333 */
1c8f6a4d
KLC
7438 insn = N32_ALU1 (SLLI, N16_RT3 (insn16), N16_RA3 (insn16),
7439 N16_IMM3U (insn16));
35c08157
KLC
7440 goto done;
7441 case 0xc: /* add333 */
1c8f6a4d
KLC
7442 insn = N32_ALU1 (ADD, N16_RT3 (insn16), N16_RA3 (insn16),
7443 N16_RB3 (insn16));
35c08157
KLC
7444 goto done;
7445 case 0xd: /* sub333 */
1c8f6a4d
KLC
7446 insn = N32_ALU1 (SUB, N16_RT3 (insn16), N16_RA3 (insn16),
7447 N16_RB3 (insn16));
35c08157
KLC
7448 goto done;
7449 case 0xe: /* addi333 */
1c8f6a4d
KLC
7450 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7451 N16_IMM3U (insn16));
35c08157
KLC
7452 goto done;
7453 case 0xf: /* subi333 */
1c8f6a4d
KLC
7454 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7455 -N16_IMM3U (insn16));
35c08157 7456 goto done;
35c08157 7457 case 0x10: /* lwi333 */
1c8f6a4d
KLC
7458 insn = N32_TYPE2 (LWI, N16_RT3 (insn16), N16_RA3 (insn16),
7459 N16_IMM3U (insn16));
35c08157
KLC
7460 goto done;
7461 case 0x12: /* lhi333 */
1c8f6a4d
KLC
7462 insn = N32_TYPE2 (LHI, N16_RT3 (insn16), N16_RA3 (insn16),
7463 N16_IMM3U (insn16));
35c08157
KLC
7464 goto done;
7465 case 0x13: /* lbi333 */
1c8f6a4d
KLC
7466 insn = N32_TYPE2 (LBI, N16_RT3 (insn16), N16_RA3 (insn16),
7467 N16_IMM3U (insn16));
35c08157
KLC
7468 goto done;
7469 case 0x11: /* lwi333.bi */
1c8f6a4d
KLC
7470 insn = N32_TYPE2 (LWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7471 N16_IMM3U (insn16));
35c08157
KLC
7472 goto done;
7473 case 0x14: /* swi333 */
1c8f6a4d
KLC
7474 insn = N32_TYPE2 (SWI, N16_RT3 (insn16), N16_RA3 (insn16),
7475 N16_IMM3U (insn16));
35c08157
KLC
7476 goto done;
7477 case 0x16: /* shi333 */
1c8f6a4d
KLC
7478 insn = N32_TYPE2 (SHI, N16_RT3 (insn16), N16_RA3 (insn16),
7479 N16_IMM3U (insn16));
35c08157
KLC
7480 goto done;
7481 case 0x17: /* sbi333 */
1c8f6a4d
KLC
7482 insn = N32_TYPE2 (SBI, N16_RT3 (insn16), N16_RA3 (insn16),
7483 N16_IMM3U (insn16));
35c08157
KLC
7484 goto done;
7485 case 0x15: /* swi333.bi */
1c8f6a4d
KLC
7486 insn = N32_TYPE2 (SWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7487 N16_IMM3U (insn16));
35c08157 7488 goto done;
35c08157 7489 case 0x18: /* addri36.sp */
1c8f6a4d
KLC
7490 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), REG_SP,
7491 N16_IMM6U (insn16) << 2);
35c08157 7492 goto done;
35c08157 7493 case 0x19: /* lwi45.fe */
1c8f6a4d
KLC
7494 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), REG_R8,
7495 (N16_IMM5U (insn16) - 32));
35c08157
KLC
7496 goto done;
7497 case 0x1a: /* lwi450 */
7498 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7499 goto done;
7500 case 0x1b: /* swi450 */
7501 insn = N32_TYPE2 (SWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7502 goto done;
7503
1c8f6a4d 7504 /* These are r15 implied instructions. */
35c08157
KLC
7505 case 0x30: /* slts45 */
7506 insn = N32_ALU1 (SLTS, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7507 goto done;
7508 case 0x31: /* slt45 */
7509 insn = N32_ALU1 (SLT, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7510 goto done;
7511 case 0x32: /* sltsi45 */
7512 insn = N32_TYPE2 (SLTSI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7513 goto done;
7514 case 0x33: /* slti45 */
7515 insn = N32_TYPE2 (SLTI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7516 goto done;
7517 case 0x34: /* beqzs8, bnezs8 */
4ec521f2 7518 if (insn16 & N32_BIT (8))
35c08157
KLC
7519 insn = N32_BR2 (BNEZ, REG_TA, N16_IMM8S (insn16));
7520 else
7521 insn = N32_BR2 (BEQZ, REG_TA, N16_IMM8S (insn16));
7522 goto done;
7523
7524 case 0x35: /* break16, ex9.it */
7525 /* Only consider range of v3 break16. */
7526 insn = N32_TYPE0 (MISC, (N16_IMM5U (insn16) << 5) | N32_MISC_BREAK);
7527 goto done;
7528
7529 case 0x3c: /* ifcall9 */
7530 insn = N32_BR2 (IFCALL, 0, N16_IMM9U (insn16));
7531 goto done;
7532 case 0x3d: /* movpi45 */
7533 insn = N32_TYPE1 (MOVI, N16_RT4 (insn16), N16_IMM5U (insn16) + 16);
7534 goto done;
7535
7536 case 0x3f: /* MISC33 */
1c8f6a4d 7537 switch (insn16 & 0x7)
35c08157
KLC
7538 {
7539 case 2: /* neg33 */
7540 insn = N32_TYPE2 (SUBRI, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7541 break;
7542 case 3: /* not33 */
1c8f6a4d
KLC
7543 insn = N32_ALU1 (NOR, N16_RT3 (insn16), N16_RA3 (insn16),
7544 N16_RA3 (insn16));
35c08157
KLC
7545 break;
7546 case 4: /* mul33 */
1c8f6a4d
KLC
7547 insn = N32_ALU2 (MUL, N16_RT3 (insn16), N16_RT3 (insn16),
7548 N16_RA3 (insn16));
35c08157
KLC
7549 break;
7550 case 5: /* xor33 */
1c8f6a4d
KLC
7551 insn = N32_ALU1 (XOR, N16_RT3 (insn16), N16_RT3 (insn16),
7552 N16_RA3 (insn16));
35c08157
KLC
7553 break;
7554 case 6: /* and33 */
1c8f6a4d
KLC
7555 insn = N32_ALU1 (AND, N16_RT3 (insn16), N16_RT3 (insn16),
7556 N16_RA3 (insn16));
35c08157
KLC
7557 break;
7558 case 7: /* or33 */
1c8f6a4d
KLC
7559 insn = N32_ALU1 (OR, N16_RT3 (insn16), N16_RT3 (insn16),
7560 N16_RA3 (insn16));
35c08157
KLC
7561 break;
7562 }
7563 goto done;
7564
1c8f6a4d 7565 case 0xb:
35c08157
KLC
7566 switch (insn16 & 0x7)
7567 {
7568 case 0: /* zeb33 */
7569 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0xff);
7570 break;
7571 case 1: /* zeh33 */
7572 insn = N32_ALU1 (ZEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7573 break;
7574 case 2: /* seb33 */
7575 insn = N32_ALU1 (SEB, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7576 break;
7577 case 3: /* seh33 */
7578 insn = N32_ALU1 (SEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7579 break;
7580 case 4: /* xlsb33 */
7581 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 1);
7582 break;
7583 case 5: /* x11b33 */
7584 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0x7ff);
7585 break;
7586 case 6: /* bmski33 */
7587 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 7588 1 << __GF (insn16, 3, 3));
35c08157
KLC
7589 break;
7590 case 7: /* fexti33 */
7591 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 7592 (1 << (__GF (insn16, 3, 3) + 1)) - 1);
35c08157
KLC
7593 break;
7594 }
7595 goto done;
7596 }
7597
7598 switch (__GF (insn16, 10, 5))
7599 {
7600 case 0x0: /* mov55 or ifret16 */
7601 if (mach >= MACH_V3 && N16_RT5 (insn16) == REG_SP
7602 && N16_RT5 (insn16) == N16_RA5 (insn16))
1c8f6a4d 7603 insn = N32_JREG (JR, 0, 0, 0, 3);
35c08157 7604 else
1c8f6a4d 7605 insn = N32_TYPE2 (ADDI, N16_RT5 (insn16), N16_RA5 (insn16), 0);
35c08157
KLC
7606 goto done;
7607 case 0x1: /* movi55 */
7608 insn = N32_TYPE1 (MOVI, N16_RT5 (insn16), N16_IMM5S (insn16));
7609 goto done;
7610 case 0x1b: /* addi10s (V2) */
7611 insn = N32_TYPE2 (ADDI, REG_SP, REG_SP, N16_IMM10S (insn16));
7612 goto done;
7613 }
7614
7615 switch (__GF (insn16, 11, 4))
7616 {
7617 case 0x7: /* lwi37.fp/swi37.fp */
4ec521f2 7618 if (insn16 & N32_BIT (7)) /* swi37.fp */
35c08157
KLC
7619 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7620 else /* lwi37.fp */
7621 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7622 goto done;
7623 case 0x8: /* beqz38 */
7624 insn = N32_BR2 (BEQZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7625 goto done;
7626 case 0x9: /* bnez38 */
7627 insn = N32_BR2 (BNEZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7628 goto done;
7629 case 0xa: /* beqs38/j8, implied r5 */
7630 if (N16_RT38 (insn16) == 5)
7631 insn = N32_JI (J, N16_IMM8S (insn16));
7632 else
7633 insn = N32_BR1 (BEQ, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7634 goto done;
7635 case 0xb: /* bnes38 and others */
7636 if (N16_RT38 (insn16) == 5)
7637 {
7638 switch (__GF (insn16, 5, 3))
7639 {
7640 case 0: /* jr5 */
7641 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 0);
7642 break;
7643 case 4: /* ret5 */
7644 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 1);
7645 break;
7646 case 1: /* jral5 */
7647 insn = N32_JREG (JRAL, REG_LP, N16_RA5 (insn16), 0, 0);
7648 break;
7649 case 2: /* ex9.it imm5 */
7650 /* ex9.it had no 32-bit variantl. */
7651 break;
7652 case 5: /* add5.pc */
7653 /* add5.pc had no 32-bit variantl. */
7654 break;
7655 }
7656 }
7657 else /* bnes38 */
7658 insn = N32_BR1 (BNE, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7659 goto done;
7660 case 0xe: /* lwi37/swi37 */
7661 if (insn16 & (1 << 7)) /* swi37.sp */
7662 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7663 else /* lwi37.sp */
7664 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7665 goto done;
7666 }
7667
7668done:
7669 if (insn & 0x80000000)
7670 return 0;
7671
7672 if (pinsn)
7673 *pinsn = insn;
7674 return 1;
7675}
7676\f
7677static bfd_boolean
7678is_sda_access_insn (unsigned long insn)
7679{
7680 switch (N32_OP6 (insn))
7681 {
7682 case N32_OP6_LWI:
7683 case N32_OP6_LHI:
7684 case N32_OP6_LHSI:
7685 case N32_OP6_LBI:
7686 case N32_OP6_LBSI:
7687 case N32_OP6_SWI:
7688 case N32_OP6_SHI:
7689 case N32_OP6_SBI:
7690 case N32_OP6_LWC:
7691 case N32_OP6_LDC:
7692 case N32_OP6_SWC:
7693 case N32_OP6_SDC:
7694 return TRUE;
7695 default:
7696 ;
7697 }
7698 return FALSE;
7699}
7700
7701static unsigned long
7702turn_insn_to_sda_access (uint32_t insn, bfd_signed_vma type, uint32_t *pinsn)
7703{
7704 uint32_t oinsn = 0;
7705
7706 switch (type)
7707 {
7708 case R_NDS32_GOT_LO12:
7709 case R_NDS32_GOTOFF_LO12:
7710 case R_NDS32_PLTREL_LO12:
7711 case R_NDS32_PLT_GOTREL_LO12:
7712 case R_NDS32_LO12S0_RELA:
7713 switch (N32_OP6 (insn))
7714 {
7715 case N32_OP6_LBI:
7716 /* lbi.gp */
7717 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
7718 break;
7719 case N32_OP6_LBSI:
7720 /* lbsi.gp */
4ec521f2 7721 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), N32_BIT (19));
35c08157
KLC
7722 break;
7723 case N32_OP6_SBI:
7724 /* sbi.gp */
7725 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
7726 break;
7727 case N32_OP6_ORI:
7728 /* addi.gp */
4ec521f2 7729 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), N32_BIT (19));
35c08157
KLC
7730 break;
7731 }
7732 break;
7733
7734 case R_NDS32_LO12S1_RELA:
7735 switch (N32_OP6 (insn))
7736 {
7737 case N32_OP6_LHI:
7738 /* lhi.gp */
7739 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
7740 break;
7741 case N32_OP6_LHSI:
7742 /* lhsi.gp */
4ec521f2 7743 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (18));
35c08157
KLC
7744 break;
7745 case N32_OP6_SHI:
7746 /* shi.gp */
4ec521f2 7747 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (19));
35c08157
KLC
7748 break;
7749 }
7750 break;
7751
7752 case R_NDS32_LO12S2_RELA:
7753 switch (N32_OP6 (insn))
7754 {
7755 case N32_OP6_LWI:
7756 /* lwi.gp */
7757 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
7758 break;
7759 case N32_OP6_SWI:
7760 /* swi.gp */
7761 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
7762 break;
7763 }
7764 break;
7765
7766 case R_NDS32_LO12S2_DP_RELA:
7767 case R_NDS32_LO12S2_SP_RELA:
7768 oinsn = (insn & 0x7ff07000) | (REG_GP << 15);
7769 break;
7770 }
7771
7772 if (oinsn)
7773 *pinsn = oinsn;
7774
7775 return oinsn != 0;
7776}
7777
7778/* Linker hasn't found the correct merge section for non-section symbol
7779 in relax time, this work is left to the function elf_link_input_bfd().
7780 So for non-section symbol, _bfd_merged_section_offset is also needed
7781 to find the correct symbol address. */
7782
7783static bfd_vma
7784nds32_elf_rela_local_sym (bfd *abfd, Elf_Internal_Sym *sym,
7785 asection **psec, Elf_Internal_Rela *rel)
7786{
7787 asection *sec = *psec;
7788 bfd_vma relocation;
7789
7790 relocation = (sec->output_section->vma
7791 + sec->output_offset + sym->st_value);
7792 if ((sec->flags & SEC_MERGE) && sec->sec_info_type == SEC_INFO_TYPE_MERGE)
7793 {
7794 if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
7795 rel->r_addend =
7796 _bfd_merged_section_offset (abfd, psec,
7797 elf_section_data (sec)->sec_info,
7798 sym->st_value + rel->r_addend);
7799 else
7800 rel->r_addend =
7801 _bfd_merged_section_offset (abfd, psec,
7802 elf_section_data (sec)->sec_info,
7803 sym->st_value) + rel->r_addend;
7804
7805 if (sec != *psec)
7806 {
7807 /* If we have changed the section, and our original section is
7808 marked with SEC_EXCLUDE, it means that the original
7809 SEC_MERGE section has been completely subsumed in some
7810 other SEC_MERGE section. In this case, we need to leave
7811 some info around for --emit-relocs. */
7812 if ((sec->flags & SEC_EXCLUDE) != 0)
7813 sec->kept_section = *psec;
7814 sec = *psec;
7815 }
7816 rel->r_addend -= relocation;
7817 rel->r_addend += sec->output_section->vma + sec->output_offset;
7818 }
7819 return relocation;
7820}
7821
7822static bfd_vma
7823calculate_memory_address (bfd *abfd, Elf_Internal_Rela *irel,
7824 Elf_Internal_Sym *isymbuf,
7825 Elf_Internal_Shdr *symtab_hdr)
7826{
7827 bfd_signed_vma foff;
7828 bfd_vma symval, addend;
7829 Elf_Internal_Rela irel_fn;
7830 Elf_Internal_Sym *isym;
7831 asection *sym_sec;
7832
7833 /* Get the value of the symbol referred to by the reloc. */
7834 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
7835 {
7836 /* A local symbol. */
7837 isym = isymbuf + ELF32_R_SYM (irel->r_info);
7838
7839 if (isym->st_shndx == SHN_UNDEF)
7840 sym_sec = bfd_und_section_ptr;
7841 else if (isym->st_shndx == SHN_ABS)
7842 sym_sec = bfd_abs_section_ptr;
7843 else if (isym->st_shndx == SHN_COMMON)
7844 sym_sec = bfd_com_section_ptr;
7845 else
7846 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7847 memcpy (&irel_fn, irel, sizeof (Elf_Internal_Rela));
7848 symval = nds32_elf_rela_local_sym (abfd, isym, &sym_sec, &irel_fn);
7849 addend = irel_fn.r_addend;
7850 }
7851 else
7852 {
7853 unsigned long indx;
7854 struct elf_link_hash_entry *h;
7855
7856 /* An external symbol. */
7857 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
7858 h = elf_sym_hashes (abfd)[indx];
7859 BFD_ASSERT (h != NULL);
7860
7861 while (h->root.type == bfd_link_hash_indirect
7862 || h->root.type == bfd_link_hash_warning)
7863 h = (struct elf_link_hash_entry *) h->root.u.i.link;
7864
7865 if (h->root.type != bfd_link_hash_defined
7866 && h->root.type != bfd_link_hash_defweak)
7867 /* This appears to be a reference to an undefined
7868 symbol. Just ignore it--it will be caught by the
7869 regular reloc processing. */
7870 return 0;
7871
7872 if (h->root.u.def.section->flags & SEC_MERGE)
7873 {
7874 sym_sec = h->root.u.def.section;
7875 symval = _bfd_merged_section_offset (abfd, &sym_sec, elf_section_data
7876 (sym_sec)->sec_info, h->root.u.def.value);
7877 symval = symval + sym_sec->output_section->vma
7878 + sym_sec->output_offset;
7879 }
7880 else
7881 symval = (h->root.u.def.value
7882 + h->root.u.def.section->output_section->vma
7883 + h->root.u.def.section->output_offset);
7884 addend = irel->r_addend;
7885 }
7886
7887 foff = symval + addend;
7888
7889 return foff;
7890}
7891
7892static bfd_vma
7893calculate_got_memory_address (bfd *abfd, struct bfd_link_info *link_info,
7894 Elf_Internal_Rela *irel,
7895 Elf_Internal_Shdr *symtab_hdr)
7896{
7897 int symndx;
7898 bfd_vma *local_got_offsets;
7899 /* Get the value of the symbol referred to by the reloc. */
7900 struct elf_link_hash_entry *h;
7901 struct elf_nds32_link_hash_table *htab = nds32_elf_hash_table (link_info);
7902
7903 /* An external symbol. */
7904 symndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
7905 h = elf_sym_hashes (abfd)[symndx];
7906 while (h->root.type == bfd_link_hash_indirect
7907 || h->root.type == bfd_link_hash_warning)
7908 h = (struct elf_link_hash_entry *) h->root.u.i.link;
7909
7910 if (symndx >= 0)
7911 {
7912 BFD_ASSERT (h != NULL);
ce558b89
AM
7913 return (htab->root.sgot->output_section->vma
7914 + htab->root.sgot->output_offset
7915 + h->got.offset);
35c08157
KLC
7916 }
7917 else
7918 {
7919 local_got_offsets = elf_local_got_offsets (abfd);
7920 BFD_ASSERT (local_got_offsets != NULL);
ce558b89
AM
7921 return (htab->root.sgot->output_section->vma
7922 + htab->root.sgot->output_offset
7923 + local_got_offsets[ELF32_R_SYM (irel->r_info)]);
35c08157
KLC
7924 }
7925
7926 /* The _GLOBAL_OFFSET_TABLE_ may be undefweak(or should be?). */
7927 /* The check of h->root.type is passed. */
7928}
7929
7930static int
7931is_16bit_NOP (bfd *abfd ATTRIBUTE_UNUSED,
7932 asection *sec, Elf_Internal_Rela *rel)
7933{
7934 bfd_byte *contents;
7935 unsigned short insn16;
7936
7937 if (!(rel->r_addend & R_NDS32_INSN16_CONVERT_FLAG))
7938 return FALSE;
7939 contents = elf_section_data (sec)->this_hdr.contents;
7940 insn16 = bfd_getb16 (contents + rel->r_offset);
7941 if (insn16 == NDS32_NOP16)
7942 return TRUE;
7943 return FALSE;
7944}
7945
7946/* It checks whether the instruction could be converted to
7947 16-bit form and returns the converted one.
7948
7949 `internal_relocs' is supposed to be sorted. */
7950
7951static int
7952is_convert_32_to_16 (bfd *abfd, asection *sec,
7953 Elf_Internal_Rela *reloc,
7954 Elf_Internal_Rela *internal_relocs,
7955 Elf_Internal_Rela *irelend,
7956 uint16_t *insn16)
7957{
7958#define NORMAL_32_TO_16 (1 << 0)
7959#define SPECIAL_32_TO_16 (1 << 1)
7960 bfd_byte *contents = NULL;
7961 bfd_signed_vma off;
7962 bfd_vma mem_addr;
7963 uint32_t insn = 0;
7964 Elf_Internal_Rela *pc_rel;
7965 int pic_ext_target = 0;
7966 Elf_Internal_Shdr *symtab_hdr;
7967 Elf_Internal_Sym *isymbuf = NULL;
7968 int convert_type;
7969 bfd_vma offset;
7970
7971 if (reloc->r_offset + 4 > sec->size)
7972 return FALSE;
7973
7974 offset = reloc->r_offset;
7975
0c4bd9d9 7976 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
35c08157
KLC
7977 return FALSE;
7978 insn = bfd_getb32 (contents + offset);
7979
7980 if (nds32_convert_32_to_16 (abfd, insn, insn16, NULL))
7981 convert_type = NORMAL_32_TO_16;
7982 else if (special_convert_32_to_16 (insn, insn16, reloc))
7983 convert_type = SPECIAL_32_TO_16;
7984 else
7985 return FALSE;
7986
7987 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
7988 if (!nds32_get_local_syms (abfd, sec, &isymbuf))
7989 return FALSE;
7990
7991 /* Find the first relocation of the same relocation-type,
7992 so we iteratie them forward. */
7993 pc_rel = reloc;
1c8f6a4d 7994 while ((pc_rel - 1) >= internal_relocs && pc_rel[-1].r_offset == offset)
35c08157
KLC
7995 pc_rel--;
7996
7997 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
7998 {
7999 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8000 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8001 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA
8002 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8003 {
8004 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
8005 &pic_ext_target);
1c8f6a4d
KLC
8006 if (off >= ACCURATE_8BIT_S1 || off < -ACCURATE_8BIT_S1
8007 || off == 0)
35c08157
KLC
8008 return FALSE;
8009 break;
8010 }
8011 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8012 {
8013 /* movi => movi55 */
1c8f6a4d
KLC
8014 mem_addr = calculate_memory_address (abfd, pc_rel, isymbuf,
8015 symtab_hdr);
8016 /* mem_addr is unsigned, but the value should
8017 be between [-16, 15]. */
35c08157
KLC
8018 if ((mem_addr + 0x10) >> 5)
8019 return FALSE;
8020 break;
8021 }
1c8f6a4d
KLC
8022 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_20)
8023 || (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_LO12))
8024 {
8025 /* It never happen movi to movi55 for R_NDS32_TLS_LE_20,
8026 because it can be relaxed to addi for TLS_LE_ADD. */
8027 return FALSE;
8028 }
35c08157
KLC
8029 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8030 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8031 && (reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG)
8032 && convert_type == SPECIAL_32_TO_16)
8033 {
8034 /* fp-as-gp
8035 We've selected a best fp-base for this access, so we can
8036 always resolve it anyway. Do nothing. */
8037 break;
8038 }
8039 else if ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_NONE
8040 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_RELA_GNU_VTINHERIT))
8041 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_RELA_GNU_VTENTRY)
8042 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_INSN16))
8043 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_LOADSTORE)
8044 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_DWARF2_OP1_RELA)))
8045 {
1c8f6a4d
KLC
8046 /* Prevent unresolved addi instruction translate
8047 to addi45 or addi333. */
35c08157
KLC
8048 return FALSE;
8049 }
1c8f6a4d
KLC
8050 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8051 {
8052 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
8053 &pic_ext_target);
8054 if (off >= ACCURATE_U9BIT_S1 || off <= 0)
8055 return FALSE;
8056 break;
8057 }
35c08157
KLC
8058 }
8059
8060 return TRUE;
8061}
8062
8063static void
8064nds32_elf_write_16 (bfd *abfd ATTRIBUTE_UNUSED, bfd_byte *contents,
8065 Elf_Internal_Rela *reloc,
8066 Elf_Internal_Rela *internal_relocs,
8067 Elf_Internal_Rela *irelend,
8068 unsigned short insn16)
8069{
8070 Elf_Internal_Rela *pc_rel;
8071 bfd_vma offset;
8072
8073 offset = reloc->r_offset;
8074 bfd_putb16 (insn16, contents + offset);
8075 /* Find the first relocation of the same relocation-type,
8076 so we iteratie them forward. */
8077 pc_rel = reloc;
8078 while ((pc_rel - 1) > internal_relocs && pc_rel[-1].r_offset == offset)
8079 pc_rel--;
8080
8081 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8082 {
8083 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8084 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8085 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA)
8086 {
8087 pc_rel->r_info =
8088 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PCREL_RELA);
8089 }
8090 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8091 pc_rel->r_info =
8092 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PLTREL);
8093 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8094 pc_rel->r_info =
8095 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_5_RELA);
8096 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8097 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8098 pc_rel->r_info =
8099 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_SDA_FP7U2_RELA);
1c8f6a4d
KLC
8100 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8101 pc_rel->r_info =
8102 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC
8103 }
8104}
8105
8106/* Find a relocation of type specified by `reloc_type'
8107 of the same r_offset with reloc.
8108 If not found, return irelend.
8109
8110 Assuming relocations are sorted by r_offset,
8111 we find the relocation from `reloc' backward untill relocs,
8112 or find it from `reloc' forward untill irelend. */
8113
8114static Elf_Internal_Rela *
8115find_relocs_at_address (Elf_Internal_Rela *reloc,
8116 Elf_Internal_Rela *relocs,
8117 Elf_Internal_Rela *irelend,
8118 enum elf_nds32_reloc_type reloc_type)
8119{
8120 Elf_Internal_Rela *rel_t;
8121
8122 /* Find backward. */
8123 for (rel_t = reloc;
8124 rel_t >= relocs && rel_t->r_offset == reloc->r_offset;
8125 rel_t--)
8126 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8127 return rel_t;
8128
1c8f6a4d 8129 /* We didn't find it backward. Try find it forward. */
35c08157
KLC
8130 for (rel_t = reloc;
8131 rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8132 rel_t++)
8133 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8134 return rel_t;
8135
8136 return irelend;
8137}
8138
8139/* Find a relocation of specified type and offset.
8140 `reloc' is just a refence point to find a relocation at specified offset.
8141 If not found, return irelend.
8142
8143 Assuming relocations are sorted by r_offset,
8144 we find the relocation from `reloc' backward untill relocs,
8145 or find it from `reloc' forward untill irelend. */
8146
8147static Elf_Internal_Rela *
8148find_relocs_at_address_addr (Elf_Internal_Rela *reloc,
8149 Elf_Internal_Rela *relocs,
8150 Elf_Internal_Rela *irelend,
6cae483a 8151 enum elf_nds32_reloc_type reloc_type,
35c08157
KLC
8152 bfd_vma offset_p)
8153{
8154 Elf_Internal_Rela *rel_t = NULL;
8155
8156 /* First, we try to find a relocation of offset `offset_p',
8157 and then we use find_relocs_at_address to find specific type. */
8158
8159 if (reloc->r_offset > offset_p)
8160 {
8161 /* Find backward. */
8162 for (rel_t = reloc;
8163 rel_t >= relocs && rel_t->r_offset > offset_p; rel_t--)
8164 /* Do nothing. */;
8165 }
8166 else if (reloc->r_offset < offset_p)
8167 {
8168 /* Find forward. */
8169 for (rel_t = reloc;
8170 rel_t < irelend && rel_t->r_offset < offset_p; rel_t++)
8171 /* Do nothing. */;
8172 }
8173 else
8174 rel_t = reloc;
8175
8176 /* Not found? */
8177 if (rel_t < relocs || rel_t == irelend || rel_t->r_offset != offset_p)
8178 return irelend;
8179
8180 return find_relocs_at_address (rel_t, relocs, irelend, reloc_type);
8181}
8182
8183static bfd_boolean
8184nds32_elf_check_dup_relocs (Elf_Internal_Rela *reloc,
8185 Elf_Internal_Rela *internal_relocs,
8186 Elf_Internal_Rela *irelend,
8187 unsigned char reloc_type)
8188{
8189 Elf_Internal_Rela *rel_t;
8190
8191 for (rel_t = reloc;
8192 rel_t >= internal_relocs && rel_t->r_offset == reloc->r_offset;
8193 rel_t--)
8194 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8195 {
8196 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8197 && rel_t->r_addend == reloc->r_addend)
8198 continue;
8199 return TRUE;
8200 }
8201
8202 for (rel_t = reloc; rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8203 rel_t++)
8204 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8205 {
8206 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8207 && rel_t->r_addend == reloc->r_addend)
8208 continue;
8209 return TRUE;
8210 }
8211
8212 return FALSE;
8213}
8214
8215typedef struct nds32_elf_blank nds32_elf_blank_t;
8216struct nds32_elf_blank
8217{
8218 /* Where the blank begins. */
8219 bfd_vma offset;
8220 /* The size of the blank. */
8221 bfd_vma size;
8222 /* The accumulative size before this blank. */
8223 bfd_vma total_size;
8224 nds32_elf_blank_t *next;
8225 nds32_elf_blank_t *prev;
8226};
8227
8228static nds32_elf_blank_t *blank_free_list = NULL;
8229
8230static nds32_elf_blank_t *
8231create_nds32_elf_blank (bfd_vma offset_p, bfd_vma size_p)
8232{
8233 nds32_elf_blank_t *blank_t;
8234
8235 if (blank_free_list)
8236 {
8237 blank_t = blank_free_list;
8238 blank_free_list = blank_free_list->next;
8239 }
8240 else
8241 blank_t = bfd_malloc (sizeof (nds32_elf_blank_t));
8242
8243 if (blank_t == NULL)
8244 return NULL;
8245
8246 blank_t->offset = offset_p;
8247 blank_t->size = size_p;
8248 blank_t->total_size = 0;
8249 blank_t->next = NULL;
8250 blank_t->prev = NULL;
8251
8252 return blank_t;
8253}
8254
8255static void
8256remove_nds32_elf_blank (nds32_elf_blank_t *blank_p)
8257{
8258 if (blank_free_list)
8259 {
8260 blank_free_list->prev = blank_p;
8261 blank_p->next = blank_free_list;
8262 }
8263 else
8264 blank_p->next = NULL;
8265
8266 blank_p->prev = NULL;
8267 blank_free_list = blank_p;
8268}
8269
8270static void
8271clean_nds32_elf_blank (void)
8272{
8273 nds32_elf_blank_t *blank_t;
8274
8275 while (blank_free_list)
8276 {
8277 blank_t = blank_free_list;
8278 blank_free_list = blank_free_list->next;
8279 free (blank_t);
8280 }
8281}
8282
8283static nds32_elf_blank_t *
8284search_nds32_elf_blank (nds32_elf_blank_t *blank_p, bfd_vma addr)
8285{
8286 nds32_elf_blank_t *blank_t;
8287
8288 if (!blank_p)
8289 return NULL;
8290 blank_t = blank_p;
8291
8292 while (blank_t && addr < blank_t->offset)
8293 blank_t = blank_t->prev;
8294 while (blank_t && blank_t->next && addr >= blank_t->next->offset)
8295 blank_t = blank_t->next;
8296
8297 return blank_t;
8298}
8299
8300static bfd_vma
8301get_nds32_elf_blank_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8302 int overwrite)
8303{
8304 nds32_elf_blank_t *blank_t;
8305
8306 blank_t = search_nds32_elf_blank (*blank_p, addr);
8307 if (!blank_t)
8308 return 0;
8309
8310 if (overwrite)
8311 *blank_p = blank_t;
8312
8313 if (addr < blank_t->offset + blank_t->size)
8314 return blank_t->total_size + (addr - blank_t->offset);
8315 else
8316 return blank_t->total_size + blank_t->size;
8317}
8318
8319static bfd_boolean
8320insert_nds32_elf_blank (nds32_elf_blank_t **blank_p, bfd_vma addr, bfd_vma len)
8321{
8322 nds32_elf_blank_t *blank_t, *blank_t2;
8323
8324 if (!*blank_p)
8325 {
8326 *blank_p = create_nds32_elf_blank (addr, len);
8327 return *blank_p ? TRUE : FALSE;
8328 }
8329
8330 blank_t = search_nds32_elf_blank (*blank_p, addr);
8331
8332 if (blank_t == NULL)
8333 {
8334 blank_t = create_nds32_elf_blank (addr, len);
8335 if (!blank_t)
8336 return FALSE;
8337 while ((*blank_p)->prev != NULL)
8338 *blank_p = (*blank_p)->prev;
8339 blank_t->next = *blank_p;
8340 (*blank_p)->prev = blank_t;
8341 (*blank_p) = blank_t;
8342 return TRUE;
8343 }
8344
8345 if (addr < blank_t->offset + blank_t->size)
8346 {
8347 if (addr > blank_t->offset + blank_t->size)
8348 blank_t->size = addr - blank_t->offset;
8349 }
8350 else
8351 {
8352 blank_t2 = create_nds32_elf_blank (addr, len);
8353 if (!blank_t2)
8354 return FALSE;
8355 if (blank_t->next)
8356 {
8357 blank_t->next->prev = blank_t2;
8358 blank_t2->next = blank_t->next;
8359 }
8360 blank_t2->prev = blank_t;
8361 blank_t->next = blank_t2;
8362 *blank_p = blank_t2;
8363 }
8364
8365 return TRUE;
8366}
8367
8368static bfd_boolean
8369insert_nds32_elf_blank_recalc_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8370 bfd_vma len)
8371{
8372 nds32_elf_blank_t *blank_t;
8373
8374 if (!insert_nds32_elf_blank (blank_p, addr, len))
8375 return FALSE;
8376
8377 blank_t = *blank_p;
8378
8379 if (!blank_t->prev)
8380 {
8381 blank_t->total_size = 0;
8382 blank_t = blank_t->next;
8383 }
8384
8385 while (blank_t)
8386 {
8387 blank_t->total_size = blank_t->prev->total_size + blank_t->prev->size;
8388 blank_t = blank_t->next;
8389 }
8390
8391 return TRUE;
8392}
8393
8394static void
8395calc_nds32_blank_total (nds32_elf_blank_t *blank_p)
8396{
8397 nds32_elf_blank_t *blank_t;
8398 bfd_vma total_size = 0;
8399
8400 if (!blank_p)
8401 return;
8402
8403 blank_t = blank_p;
8404 while (blank_t->prev)
8405 blank_t = blank_t->prev;
8406 while (blank_t)
8407 {
8408 blank_t->total_size = total_size;
8409 total_size += blank_t->size;
8410 blank_t = blank_t->next;
8411 }
8412}
8413
8414static bfd_boolean
8415nds32_elf_relax_delete_blanks (bfd *abfd, asection *sec,
8416 nds32_elf_blank_t *blank_p)
8417{
8418 Elf_Internal_Shdr *symtab_hdr; /* Symbol table header of this bfd. */
1c8f6a4d 8419 Elf_Internal_Sym *isym = NULL; /* Symbol table of this bfd. */
35c08157
KLC
8420 Elf_Internal_Sym *isymend; /* Symbol entry iterator. */
8421 unsigned int sec_shndx; /* The section the be relaxed. */
8422 bfd_byte *contents; /* Contents data of iterating section. */
8423 Elf_Internal_Rela *internal_relocs;
8424 Elf_Internal_Rela *irel;
8425 Elf_Internal_Rela *irelend;
8426 struct elf_link_hash_entry **sym_hashes;
8427 struct elf_link_hash_entry **end_hashes;
8428 unsigned int symcount;
8429 asection *sect;
8430 nds32_elf_blank_t *blank_t;
8431 nds32_elf_blank_t *blank_t2;
8432 nds32_elf_blank_t *blank_head;
8433
8434 blank_head = blank_t = blank_p;
8435 while (blank_head->prev != NULL)
8436 blank_head = blank_head->prev;
8437 while (blank_t->next != NULL)
8438 blank_t = blank_t->next;
8439
8440 if (blank_t->offset + blank_t->size <= sec->size)
8441 {
8442 blank_t->next = create_nds32_elf_blank (sec->size + 4, 0);
8443 blank_t->next->prev = blank_t;
8444 }
8445 if (blank_head->offset > 0)
8446 {
8447 blank_head->prev = create_nds32_elf_blank (0, 0);
8448 blank_head->prev->next = blank_head;
8449 blank_head = blank_head->prev;
8450 }
8451
8452 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
8453
8454 /* The deletion must stop at the next ALIGN reloc for an alignment
8455 power larger than the number of bytes we are deleting. */
8456
8457 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8458 if (!nds32_get_local_syms (abfd, sec, &isym))
8459 return FALSE;
8460
8461 if (isym == NULL)
8462 {
8463 isym = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8464 symtab_hdr->sh_info, 0, NULL, NULL, NULL);
8465 symtab_hdr->contents = (bfd_byte *) isym;
8466 }
8467
8468 if (isym == NULL || symtab_hdr->sh_info == 0)
8469 return FALSE;
8470
8471 blank_t = blank_head;
8472 calc_nds32_blank_total (blank_head);
8473
8474 for (sect = abfd->sections; sect != NULL; sect = sect->next)
8475 {
8476 /* Adjust all the relocs. */
8477
8478 /* Relocations MUST be kept in memory, because relaxation adjust them. */
8479 internal_relocs = _bfd_elf_link_read_relocs (abfd, sect, NULL, NULL,
8480 TRUE /* keep_memory */);
8481 irelend = internal_relocs + sect->reloc_count;
8482
8483 blank_t = blank_head;
8484 blank_t2 = blank_head;
8485
8486 if (!(sect->flags & SEC_RELOC))
8487 continue;
8488
0c4bd9d9 8489 nds32_get_section_contents (abfd, sect, &contents, TRUE);
35c08157
KLC
8490
8491 for (irel = internal_relocs; irel < irelend; irel++)
8492 {
8493 bfd_vma raddr;
8494
8495 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_DIFF8
8496 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_DIFF32
8497 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8498 {
8499 unsigned long val = 0;
1c8f6a4d
KLC
8500 unsigned long mask;
8501 long before, between;
6cae483a 8502 long offset = 0;
35c08157
KLC
8503
8504 switch (ELF32_R_TYPE (irel->r_info))
8505 {
8506 case R_NDS32_DIFF8:
1c8f6a4d 8507 offset = bfd_get_8 (abfd, contents + irel->r_offset);
35c08157
KLC
8508 break;
8509 case R_NDS32_DIFF16:
1c8f6a4d 8510 offset = bfd_get_16 (abfd, contents + irel->r_offset);
35c08157
KLC
8511 break;
8512 case R_NDS32_DIFF32:
8513 val = bfd_get_32 (abfd, contents + irel->r_offset);
1c8f6a4d
KLC
8514 /* Get the signed bit and mask for the high part. The
8515 gcc will alarm when right shift 32-bit since the
8516 type size of long may be 32-bit. */
8517 mask = 0 - (val >> 31);
8518 if (mask)
8519 offset = (val | (mask - 0xffffffff));
8520 else
8521 offset = val;
35c08157
KLC
8522 break;
8523 default:
8524 BFD_ASSERT (0);
8525 }
8526
8527 /* DIFF value
8528 0 |encoded in location|
8529 |------------|-------------------|---------
8530 sym+off(addend)
8531 -- before ---| *****************
8532 --------------------- between ---|
8533
1c8f6a4d
KLC
8534 We only care how much data are relax between DIFF,
8535 marked as ***. */
35c08157
KLC
8536
8537 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC
8538 between = get_nds32_elf_blank_total (&blank_t,
8539 irel->r_addend + offset, 0);
35c08157
KLC
8540 if (between == before)
8541 goto done_adjust_diff;
8542
8543 switch (ELF32_R_TYPE (irel->r_info))
8544 {
8545 case R_NDS32_DIFF8:
1c8f6a4d
KLC
8546 bfd_put_8 (abfd, offset - (between - before),
8547 contents + irel->r_offset);
35c08157
KLC
8548 break;
8549 case R_NDS32_DIFF16:
1c8f6a4d
KLC
8550 bfd_put_16 (abfd, offset - (between - before),
8551 contents + irel->r_offset);
35c08157
KLC
8552 break;
8553 case R_NDS32_DIFF32:
1c8f6a4d
KLC
8554 bfd_put_32 (abfd, offset - (between - before),
8555 contents + irel->r_offset);
35c08157
KLC
8556 break;
8557 }
8558 }
8559 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_DIFF_ULEB128
8560 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8561 {
8562 bfd_vma val = 0;
8563 unsigned int len = 0;
8564 unsigned long before, between;
8565 bfd_byte *endp, *p;
8566
4265548c
PA
8567 val = _bfd_read_unsigned_leb128 (abfd, contents + irel->r_offset,
8568 &len);
35c08157
KLC
8569
8570 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC
8571 between = get_nds32_elf_blank_total (&blank_t,
8572 irel->r_addend + val, 0);
35c08157
KLC
8573 if (between == before)
8574 goto done_adjust_diff;
8575
8576 p = contents + irel->r_offset;
8577 endp = p + len -1;
8578 memset (p, 0x80, len);
8579 *(endp) = 0;
8580 p = write_uleb128 (p, val - (between - before)) - 1;
8581 if (p < endp)
8582 *p |= 0x80;
8583 }
8584done_adjust_diff:
8585
8586 if (sec == sect)
8587 {
8588 raddr = irel->r_offset;
1c8f6a4d
KLC
8589 irel->r_offset -= get_nds32_elf_blank_total (&blank_t2,
8590 irel->r_offset, 1);
35c08157
KLC
8591
8592 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
8593 continue;
8594 if (blank_t2 && blank_t2->next
1c8f6a4d
KLC
8595 && (blank_t2->offset > raddr
8596 || blank_t2->next->offset <= raddr))
4eca0228 8597 _bfd_error_handler
695344c0 8598 (_("%B: Error: search_nds32_elf_blank reports wrong node\n"), abfd);
35c08157
KLC
8599
8600 /* Mark reloc in deleted portion as NONE.
8601 For some relocs like R_NDS32_LABEL that doesn't modify the
8602 content in the section. R_NDS32_LABEL doesn't belong to the
8603 instruction in the section, so we should preserve it. */
8604 if (raddr >= blank_t2->offset
8605 && raddr < blank_t2->offset + blank_t2->size
8606 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL
8607 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_BEGIN
8608 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
8609 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
8610 && ELF32_R_TYPE (irel->r_info) != R_NDS32_SUBTRAHEND
8611 && ELF32_R_TYPE (irel->r_info) != R_NDS32_MINUEND)
8612 {
8613 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
8614 R_NDS32_NONE);
8615 continue;
8616 }
8617 }
8618
8619 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE
8620 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
8621 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
8622 continue;
8623
8624 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info
8625 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx
8626 && ELF_ST_TYPE (isym[ELF32_R_SYM (irel->r_info)].st_info) == STT_SECTION)
8627 {
8628 if (irel->r_addend <= sec->size)
8629 irel->r_addend -=
8630 get_nds32_elf_blank_total (&blank_t, irel->r_addend, 1);
8631 }
8632 }
8633 }
8634
8635 /* Adjust the local symbols defined in this section. */
8636 blank_t = blank_head;
8637 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
8638 {
8639 if (isym->st_shndx == sec_shndx)
8640 {
8641 if (isym->st_value <= sec->size)
8642 {
8643 bfd_vma ahead;
8644 bfd_vma orig_addr = isym->st_value;
8645
8646 ahead = get_nds32_elf_blank_total (&blank_t, isym->st_value, 1);
8647 isym->st_value -= ahead;
8648
8649 /* Adjust function size. */
1c8f6a4d
KLC
8650 if (ELF32_ST_TYPE (isym->st_info) == STT_FUNC
8651 && isym->st_size > 0)
8652 isym->st_size -=
8653 get_nds32_elf_blank_total
8654 (&blank_t, orig_addr + isym->st_size, 0) - ahead;
35c08157
KLC
8655 }
8656 }
8657 }
8658
8659 /* Now adjust the global symbols defined in this section. */
8660 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
8661 - symtab_hdr->sh_info);
8662 sym_hashes = elf_sym_hashes (abfd);
8663 end_hashes = sym_hashes + symcount;
8664 blank_t = blank_head;
8665 for (; sym_hashes < end_hashes; sym_hashes++)
8666 {
8667 struct elf_link_hash_entry *sym_hash = *sym_hashes;
8668
8669 if ((sym_hash->root.type == bfd_link_hash_defined
8670 || sym_hash->root.type == bfd_link_hash_defweak)
8671 && sym_hash->root.u.def.section == sec)
8672 {
8673 if (sym_hash->root.u.def.value <= sec->size)
8674 {
8675 bfd_vma ahead;
8676 bfd_vma orig_addr = sym_hash->root.u.def.value;
8677
8678 ahead = get_nds32_elf_blank_total (&blank_t, sym_hash->root.u.def.value, 1);
8679 sym_hash->root.u.def.value -= ahead;
8680
8681 /* Adjust function size. */
8682 if (sym_hash->type == STT_FUNC)
1c8f6a4d
KLC
8683 sym_hash->size -=
8684 get_nds32_elf_blank_total
8685 (&blank_t, orig_addr + sym_hash->size, 0) - ahead;
35c08157
KLC
8686
8687 }
8688 }
8689 }
8690
8691 contents = elf_section_data (sec)->this_hdr.contents;
8692 blank_t = blank_head;
8693 while (blank_t->next)
8694 {
8695 /* Actually delete the bytes. */
8696
8697 /* If current blank is the last blank overlap with current section,
8698 go to finish process. */
8699 if (sec->size <= (blank_t->next->offset))
8700 break;
8701
8702 memmove (contents + blank_t->offset - blank_t->total_size,
8703 contents + blank_t->offset + blank_t->size,
8704 blank_t->next->offset - (blank_t->offset + blank_t->size));
8705
8706 blank_t = blank_t->next;
8707 }
8708
8709 if (sec->size > (blank_t->offset + blank_t->size))
8710 {
8711 /* There are remaining code between blank and section boundary.
8712 Move the remaining code to appropriate location. */
8713 memmove (contents + blank_t->offset - blank_t->total_size,
8714 contents + blank_t->offset + blank_t->size,
8715 sec->size - (blank_t->offset + blank_t->size));
8716 sec->size -= blank_t->total_size + blank_t->size;
8717 }
8718 else
8719 /* This blank is not entirely included in the section,
8720 reduce the section size by only part of the blank size. */
8721 sec->size -= blank_t->total_size + (sec->size - blank_t->offset);
8722
8723 while (blank_head)
8724 {
8725 blank_t = blank_head;
8726 blank_head = blank_head->next;
8727 remove_nds32_elf_blank (blank_t);
8728 }
8729
8730 return TRUE;
8731}
8732
8733/* Get the contents of a section. */
8734
8735static int
0c4bd9d9
KLC
8736nds32_get_section_contents (bfd *abfd, asection *sec,
8737 bfd_byte **contents_p, bfd_boolean cache)
35c08157
KLC
8738{
8739 /* Get the section contents. */
8740 if (elf_section_data (sec)->this_hdr.contents != NULL)
8741 *contents_p = elf_section_data (sec)->this_hdr.contents;
8742 else
8743 {
8744 if (!bfd_malloc_and_get_section (abfd, sec, contents_p))
8745 return FALSE;
0c4bd9d9
KLC
8746 if (cache)
8747 elf_section_data (sec)->this_hdr.contents = *contents_p;
35c08157
KLC
8748 }
8749
8750 return TRUE;
8751}
8752
8753/* Get the contents of the internal symbol of abfd. */
8754
8755static int
8756nds32_get_local_syms (bfd *abfd, asection *sec ATTRIBUTE_UNUSED,
8757 Elf_Internal_Sym **isymbuf_p)
8758{
8759 Elf_Internal_Shdr *symtab_hdr;
8760 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8761
8762 /* Read this BFD's local symbols if we haven't done so already. */
8763 if (*isymbuf_p == NULL && symtab_hdr->sh_info != 0)
8764 {
8765 *isymbuf_p = (Elf_Internal_Sym *) symtab_hdr->contents;
8766 if (*isymbuf_p == NULL)
8767 {
8768 *isymbuf_p = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8769 symtab_hdr->sh_info, 0,
8770 NULL, NULL, NULL);
8771 if (*isymbuf_p == NULL)
8772 return FALSE;
8773 }
8774 }
8775 symtab_hdr->contents = (bfd_byte *) (*isymbuf_p);
8776
8777 return TRUE;
8778}
8779
8780/* Range of small data. */
1c8f6a4d
KLC
8781static bfd_vma sdata_range[2][2];
8782static bfd_vma const sdata_init_range[2] =
8783{ ACCURATE_12BIT_S1, ACCURATE_19BIT };
35c08157
KLC
8784
8785static int
8786nds32_elf_insn_size (bfd *abfd ATTRIBUTE_UNUSED,
8787 bfd_byte *contents, bfd_vma addr)
8788{
8789 unsigned long insn = bfd_getb32 (contents + addr);
8790
8791 if (insn & 0x80000000)
8792 return 2;
8793
8794 return 4;
8795}
8796
8797/* Set the gp relax range. We have to measure the safe range
8798 to do gp relaxation. */
8799
8800static void
8801relax_range_measurement (bfd *abfd)
8802{
8803 asection *sec_f, *sec_b;
8804 /* For upper bound. */
8805 bfd_vma maxpgsz = get_elf_backend_data (abfd)->maxpagesize;
8806 bfd_vma align;
35c08157
KLC
8807 static int decide_relax_range = 0;
8808 int i;
1c8f6a4d 8809 int range_number = sizeof (sdata_init_range) / sizeof (sdata_init_range[0]);
35c08157
KLC
8810
8811 if (decide_relax_range)
8812 return;
8813 decide_relax_range = 1;
8814
8815 if (sda_rela_sec == NULL)
8816 {
8817 /* Since there is no data sections, we assume the range is page size. */
1c8f6a4d 8818 for (i = 0; i < range_number; i++)
35c08157
KLC
8819 {
8820 sdata_range[i][0] = sdata_init_range[i] - 0x1000;
8821 sdata_range[i][1] = sdata_init_range[i] - 0x1000;
8822 }
8823 return;
8824 }
8825
8826 /* Get the biggest alignment power after the gp located section. */
8827 sec_f = sda_rela_sec->output_section;
8828 sec_b = sec_f->next;
8829 align = 0;
8830 while (sec_b != NULL)
8831 {
8832 if ((unsigned)(1 << sec_b->alignment_power) > align)
8833 align = (1 << sec_b->alignment_power);
8834 sec_b = sec_b->next;
8835 }
8836
8837 /* I guess we can not determine the section before
8838 gp located section, so we assume the align is max page size. */
1c8f6a4d 8839 for (i = 0; i < range_number; i++)
35c08157 8840 {
1c8f6a4d 8841 sdata_range[i][1] = sdata_init_range[i] - align;
35c08157 8842 BFD_ASSERT (sdata_range[i][1] <= sdata_init_range[i]);
1c8f6a4d 8843 sdata_range[i][0] = sdata_init_range[i] - maxpgsz;
35c08157
KLC
8844 BFD_ASSERT (sdata_range[i][0] <= sdata_init_range[i]);
8845 }
8846}
8847
8848/* These are macros used to check flags encoded in r_addend.
8849 They are only used by nds32_elf_relax_section (). */
8850#define GET_SEQ_LEN(addend) ((addend) & 0x000000ff)
8851#define IS_1ST_CONVERT(addend) ((addend) & 0x80000000)
8852#define IS_OPTIMIZE(addend) ((addend) & 0x40000000)
8853#define IS_16BIT_ON(addend) ((addend) & 0x20000000)
8854
695344c0
NC
8855static const char * unrecognized_reloc_msg =
8856 /* xgettext:c-format */
d42c267e 8857 N_("%B: warning: %s points to unrecognized reloc at %#Lx");
695344c0 8858
1c8f6a4d
KLC
8859/* Relax LONGCALL1 relocation for nds32_elf_relax_section. */
8860
35c08157 8861static bfd_boolean
1c8f6a4d
KLC
8862nds32_elf_relax_longcall1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
8863 Elf_Internal_Rela *internal_relocs, int *insn_len,
8864 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
8865 Elf_Internal_Shdr *symtab_hdr)
8866{
8867 /* There are 3 variations for LONGCALL1
8868 case 4-4-2; 16-bit on, optimize off or optimize for space
8869 sethi ta, hi20(symbol) ; LONGCALL1/HI20
8870 ori ta, ta, lo12(symbol) ; LO12S0
8871 jral5 ta ;
8872
8873 case 4-4-4; 16-bit off, optimize don't care
8874 sethi ta, hi20(symbol) ; LONGCALL1/HI20
8875 ori ta, ta, lo12(symbol) ; LO12S0
8876 jral ta ;
8877
8878 case 4-4-4; 16-bit on, optimize for speed
8879 sethi ta, hi20(symbol) ; LONGCALL1/HI20
8880 ori ta, ta, lo12(symbol) ; LO12S0
8881 jral ta ;
8882 Check code for -mlong-calls output. */
8883
8884 /* Get the reloc for the address from which the register is
8885 being loaded. This reloc will tell us which function is
8886 actually being called. */
8887
8888 bfd_vma laddr;
8889 int seq_len; /* Original length of instruction sequence. */
35c08157 8890 uint32_t insn;
1c8f6a4d
KLC
8891 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
8892 int pic_ext_target = 0;
8893 bfd_signed_vma foff;
35c08157 8894 uint16_t insn16;
35c08157 8895
1c8f6a4d
KLC
8896 irelend = internal_relocs + sec->reloc_count;
8897 seq_len = GET_SEQ_LEN (irel->r_addend);
8898 laddr = irel->r_offset;
8899 *insn_len = seq_len;
35c08157 8900
1c8f6a4d
KLC
8901 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
8902 R_NDS32_HI20_RELA, laddr);
8903 lo_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
8904 R_NDS32_LO12S0_ORI_RELA,
8905 laddr + 4);
35c08157 8906
1c8f6a4d 8907 if (hi_irelfn == irelend || lo_irelfn == irelend)
35c08157 8908 {
695344c0 8909 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL1",
d42c267e 8910 irel->r_offset);
1c8f6a4d 8911 return FALSE;
35c08157
KLC
8912 }
8913
1c8f6a4d
KLC
8914 /* Get the value of the symbol referred to by the reloc. */
8915 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
8916 &pic_ext_target);
35c08157 8917
1c8f6a4d
KLC
8918 /* This condition only happened when symbol is undefined. */
8919 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
8920 || foff >= CONSERVATIVE_24BIT_S1)
8921 return FALSE;
35c08157 8922
1c8f6a4d
KLC
8923 /* Relax to: jal symbol; 25_PCREL */
8924 /* For simplicity of coding, we are going to modify the section
8925 contents, the section relocs, and the BFD symbol table. We
8926 must tell the rest of the code not to free up this
8927 information. It would be possible to instead create a table
8928 of changes which have to be made, as is done in coff-mips.c;
8929 that would be more work, but would require less memory when
8930 the linker is run. */
8931
8932 /* Replace the long call with a jal. */
8933 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
8934 R_NDS32_25_PCREL_RELA);
8935 irel->r_addend = hi_irelfn->r_addend;
8936
8937 /* We don't resolve this here but resolve it in relocate_section. */
8938 insn = INSN_JAL;
8939 bfd_putb32 (insn, contents + irel->r_offset);
8940
8941 hi_irelfn->r_info =
8942 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
8943 lo_irelfn->r_info =
8944 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
8945 *insn_len = 4;
8946
8947 if (seq_len & 0x2)
8948 {
8949 insn16 = NDS32_NOP16;
8950 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
8951 lo_irelfn->r_info =
8952 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
8953 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
8954 *insn_len += 2;
8955 }
8956 return TRUE;
8957}
35c08157 8958
1c8f6a4d
KLC
8959#define CONVERT_CONDITION_CALL(insn) (((insn) & 0xffff0000) ^ 0x90000)
8960/* Relax LONGCALL2 relocation for nds32_elf_relax_section. */
35c08157 8961
1c8f6a4d
KLC
8962static bfd_boolean
8963nds32_elf_relax_longcall2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
8964 Elf_Internal_Rela *internal_relocs, int *insn_len,
8965 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
8966 Elf_Internal_Shdr *symtab_hdr)
8967{
8968 /* bltz rt, .L1 ; LONGCALL2
8969 jal symbol ; 25_PCREL
8970 .L1: */
35c08157 8971
1c8f6a4d
KLC
8972 /* Get the reloc for the address from which the register is
8973 being loaded. This reloc will tell us which function is
8974 actually being called. */
35c08157 8975
1c8f6a4d
KLC
8976 bfd_vma laddr;
8977 uint32_t insn;
8978 Elf_Internal_Rela *i1_irelfn, *cond_irelfn, *irelend;
8979 int pic_ext_target = 0;
8980 bfd_signed_vma foff;
35c08157 8981
1c8f6a4d
KLC
8982 irelend = internal_relocs + sec->reloc_count;
8983 laddr = irel->r_offset;
8984 i1_irelfn =
8985 find_relocs_at_address_addr (irel, internal_relocs, irelend,
8986 R_NDS32_25_PCREL_RELA, laddr + 4);
8987
8988 if (i1_irelfn == irelend)
35c08157 8989 {
695344c0 8990 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL2",
d42c267e 8991 irel->r_offset);
1c8f6a4d 8992 return FALSE;
35c08157
KLC
8993 }
8994
1c8f6a4d 8995 insn = bfd_getb32 (contents + laddr);
35c08157 8996
1c8f6a4d
KLC
8997 /* Get the value of the symbol referred to by the reloc. */
8998 foff = calculate_offset (abfd, sec, i1_irelfn, isymbuf, symtab_hdr,
8999 &pic_ext_target);
35c08157 9000
1c8f6a4d
KLC
9001 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9002 || foff >= CONSERVATIVE_16BIT_S1)
9003 return FALSE;
35c08157 9004
1c8f6a4d
KLC
9005 /* Relax to bgezal rt, label ; 17_PCREL
9006 or bltzal rt, label ; 17_PCREL */
9007
9008 /* Convert to complimentary conditional call. */
9009 insn = CONVERT_CONDITION_CALL (insn);
9010
9011 /* For simplicity of coding, we are going to modify the section
9012 contents, the section relocs, and the BFD symbol table. We
9013 must tell the rest of the code not to free up this
9014 information. It would be possible to instead create a table
9015 of changes which have to be made, as is done in coff-mips.c;
9016 that would be more work, but would require less memory when
9017 the linker is run. */
9018
9019 /* Clean unnessary relocations. */
9020 i1_irelfn->r_info =
9021 ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), R_NDS32_NONE);
9022 cond_irelfn =
9023 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9024 R_NDS32_17_PCREL_RELA, laddr);
9025 if (cond_irelfn != irelend)
9026 cond_irelfn->r_info =
9027 ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info), R_NDS32_NONE);
9028
9029 /* Replace the long call with a bgezal. */
9030 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info),
9031 R_NDS32_17_PCREL_RELA);
9032 irel->r_addend = i1_irelfn->r_addend;
9033
9034 bfd_putb32 (insn, contents + irel->r_offset);
9035
9036 *insn_len = 4;
9037 return TRUE;
9038}
35c08157 9039
1c8f6a4d
KLC
9040/* Relax LONGCALL3 relocation for nds32_elf_relax_section. */
9041
9042static bfd_boolean
9043nds32_elf_relax_longcall3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9044 Elf_Internal_Rela *internal_relocs, int *insn_len,
9045 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9046 Elf_Internal_Shdr *symtab_hdr)
9047{
9048 /* There are 3 variations for LONGCALL3
9049 case 4-4-4-2; 16-bit on, optimize off or optimize for space
9050 bltz rt, $1 ; LONGCALL3
9051 sethi ta, hi20(symbol) ; HI20
9052 ori ta, ta, lo12(symbol) ; LO12S0
9053 jral5 ta ;
9054 $1
9055
9056 case 4-4-4-4; 16-bit off, optimize don't care
9057 bltz rt, $1 ; LONGCALL3
9058 sethi ta, hi20(symbol) ; HI20
9059 ori ta, ta, lo12(symbol) ; LO12S0
9060 jral ta ;
9061 $1
9062
9063 case 4-4-4-4; 16-bit on, optimize for speed
9064 bltz rt, $1 ; LONGCALL3
9065 sethi ta, hi20(symbol) ; HI20
9066 ori ta, ta, lo12(symbol) ; LO12S0
9067 jral ta ;
9068 $1 */
9069
9070 /* Get the reloc for the address from which the register is
9071 being loaded. This reloc will tell us which function is
9072 actually being called. */
9073
9074 bfd_vma laddr;
9075 int seq_len; /* Original length of instruction sequence. */
9076 uint32_t insn;
9077 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9078 int pic_ext_target = 0;
9079 bfd_signed_vma foff;
9080 uint16_t insn16;
9081
9082 irelend = internal_relocs + sec->reloc_count;
9083 seq_len = GET_SEQ_LEN (irel->r_addend);
9084 laddr = irel->r_offset;
9085 *insn_len = seq_len;
9086
9087 hi_irelfn =
9088 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9089 R_NDS32_HI20_RELA, laddr + 4);
9090 lo_irelfn =
9091 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9092 R_NDS32_LO12S0_ORI_RELA, laddr + 8);
9093
9094 if (hi_irelfn == irelend || lo_irelfn == irelend)
9095 {
695344c0 9096 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL3",
d42c267e 9097 irel->r_offset);
1c8f6a4d 9098 return FALSE;
35c08157
KLC
9099 }
9100
1c8f6a4d
KLC
9101 /* Get the value of the symbol referred to by the reloc. */
9102 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9103 &pic_ext_target);
35c08157 9104
1c8f6a4d
KLC
9105 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9106 || foff >= CONSERVATIVE_24BIT_S1)
9107 return FALSE;
35c08157 9108
1c8f6a4d
KLC
9109 insn = bfd_getb32 (contents + laddr);
9110 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
35c08157 9111 {
1c8f6a4d
KLC
9112 /* Relax to bgezal rt, label ; 17_PCREL
9113 or bltzal rt, label ; 17_PCREL */
35c08157 9114
1c8f6a4d
KLC
9115 /* Convert to complimentary conditional call. */
9116 insn = CONVERT_CONDITION_CALL (insn);
9117 bfd_putb32 (insn, contents + irel->r_offset);
35c08157 9118
1c8f6a4d
KLC
9119 *insn_len = 4;
9120 irel->r_info =
9121 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9122 hi_irelfn->r_info =
9123 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9124 lo_irelfn->r_info =
9125 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9126
9127 cond_irelfn =
9128 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9129 R_NDS32_17_PCREL_RELA, laddr);
9130 if (cond_irelfn != irelend)
35c08157 9131 {
1c8f6a4d
KLC
9132 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9133 R_NDS32_17_PCREL_RELA);
9134 cond_irelfn->r_addend = hi_irelfn->r_addend;
35c08157 9135 }
1c8f6a4d
KLC
9136
9137 if (seq_len & 0x2)
35c08157 9138 {
1c8f6a4d
KLC
9139 insn16 = NDS32_NOP16;
9140 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9141 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9142 R_NDS32_INSN16);
9143 hi_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9144 insn_len += 2;
35c08157 9145 }
1c8f6a4d
KLC
9146 }
9147 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
9148 {
9149 /* Relax to the following instruction sequence
9150 bltz rt, $1 ; LONGCALL2
9151 jal symbol ; 25_PCREL
9152 $1 */
9153 *insn_len = 8;
9154 insn = INSN_JAL;
9155 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
35c08157 9156
1c8f6a4d
KLC
9157 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9158 R_NDS32_25_PCREL_RELA);
9159 irel->r_info =
9160 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL2);
9161
9162 lo_irelfn->r_info =
9163 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 9164
1c8f6a4d 9165 if (seq_len & 0x2)
35c08157 9166 {
1c8f6a4d
KLC
9167 insn16 = NDS32_NOP16;
9168 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9169 lo_irelfn->r_info =
9170 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9171 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9172 insn_len += 2;
9173 }
9174 }
9175 return TRUE;
9176}
35c08157 9177
1c8f6a4d 9178/* Relax LONGJUMP1 relocation for nds32_elf_relax_section. */
35c08157 9179
1c8f6a4d
KLC
9180static bfd_boolean
9181nds32_elf_relax_longjump1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9182 Elf_Internal_Rela *internal_relocs, int *insn_len,
9183 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9184 Elf_Internal_Shdr *symtab_hdr)
9185{
9186 /* There are 3 variations for LONGJUMP1
9187 case 4-4-2; 16-bit bit on, optimize off or optimize for space
9188 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9189 ori ta, ta, lo12(symbol) ; LO12S0
9190 jr5 ta ;
9191
9192 case 4-4-4; 16-bit off, optimize don't care
9193 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9194 ori ta, ta, lo12(symbol) ; LO12S0
9195 jr ta ;
9196
9197 case 4-4-4; 16-bit on, optimize for speed
9198 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9199 ori ta, ta, lo12(symbol) ; LO12S0
9200 jr ta ; */
9201
9202 /* Get the reloc for the address from which the register is
9203 being loaded. This reloc will tell us which function is
9204 actually being called. */
9205
9206 bfd_vma laddr;
9207 int seq_len; /* Original length of instruction sequence. */
9208 int insn16_on; /* 16-bit on/off. */
9209 uint32_t insn;
9210 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9211 int pic_ext_target = 0;
9212 bfd_signed_vma foff;
9213 uint16_t insn16;
9214 unsigned long reloc;
35c08157 9215
1c8f6a4d
KLC
9216 irelend = internal_relocs + sec->reloc_count;
9217 seq_len = GET_SEQ_LEN (irel->r_addend);
9218 laddr = irel->r_offset;
9219 *insn_len = seq_len;
9220 insn16_on = IS_16BIT_ON (irel->r_addend);
9221
9222 hi_irelfn =
9223 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9224 R_NDS32_HI20_RELA, laddr);
9225 lo_irelfn =
9226 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9227 R_NDS32_LO12S0_ORI_RELA, laddr + 4);
9228 if (hi_irelfn == irelend || lo_irelfn == irelend)
9229 {
695344c0 9230 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP1",
d42c267e 9231 irel->r_offset);
1c8f6a4d
KLC
9232 return FALSE;
9233 }
35c08157 9234
1c8f6a4d
KLC
9235 /* Get the value of the symbol referred to by the reloc. */
9236 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9237 &pic_ext_target);
35c08157 9238
1c8f6a4d
KLC
9239 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
9240 || foff < -CONSERVATIVE_24BIT_S1)
9241 return FALSE;
35c08157 9242
1c8f6a4d
KLC
9243 if (insn16_on && foff >= -ACCURATE_8BIT_S1
9244 && foff < ACCURATE_8BIT_S1 && (seq_len & 0x2))
9245 {
9246 /* j8 label */
9247 /* 16-bit on, but not optimized for speed. */
9248 reloc = R_NDS32_9_PCREL_RELA;
9249 insn16 = INSN_J8;
9250 bfd_putb16 (insn16, contents + irel->r_offset);
9251 *insn_len = 2;
9252 irel->r_info =
9253 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9254 }
9255 else
9256 {
9257 /* j label */
9258 reloc = R_NDS32_25_PCREL_RELA;
9259 insn = INSN_J;
9260 bfd_putb32 (insn, contents + irel->r_offset);
9261 *insn_len = 4;
9262 irel->r_info =
9263 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_INSN16);
9264 irel->r_addend = 0;
9265 }
35c08157 9266
1c8f6a4d
KLC
9267 hi_irelfn->r_info =
9268 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9269 lo_irelfn->r_info =
9270 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 9271
1c8f6a4d
KLC
9272 if ((seq_len & 0x2) && ((*insn_len & 2) == 0))
9273 {
9274 insn16 = NDS32_NOP16;
9275 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9276 lo_irelfn->r_info =
9277 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9278 R_NDS32_INSN16);
9279 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9280 *insn_len += 2;
9281 }
9282 return TRUE;
9283}
9284
9285/* Revert condition branch. This function does not check if the input
9286 instruction is condition branch or not. */
9287
9288static void
9289nds32_elf_convert_branch (uint16_t insn16, uint32_t insn,
9290 uint16_t *re_insn16, uint32_t *re_insn)
9291{
9292 uint32_t comp_insn = 0;
9293 uint16_t comp_insn16 = 0;
9294
9295 if (insn)
9296 {
9297 if (N32_OP6 (insn) == N32_OP6_BR1)
9298 {
9299 /* beqs label. */
9300 comp_insn = (insn ^ 0x4000) & 0xffffc000;
9301 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5)
35c08157 9302 {
1c8f6a4d
KLC
9303 /* Insn can be contracted to 16-bit implied r5. */
9304 comp_insn16 =
9305 (comp_insn & 0x4000) ? INSN_BNES38 : INSN_BEQS38;
9306 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
35c08157 9307 }
1c8f6a4d
KLC
9308 }
9309 else if (N32_OP6 (insn) == N32_OP6_BR3)
9310 {
9311 /* bnec $ta, imm11, label. */
9312 comp_insn = (insn ^ 0x80000) & 0xffffff00;
9313 }
9314 else
9315 {
9316 comp_insn = (insn ^ 0x10000) & 0xffffc000;
9317 if (N32_BR2_SUB (insn) == N32_BR2_BEQZ
9318 || N32_BR2_SUB (insn) == N32_BR2_BNEZ)
35c08157 9319 {
1c8f6a4d 9320 if (N32_IS_RT3 (insn))
35c08157 9321 {
1c8f6a4d
KLC
9322 /* Insn can be contracted to 16-bit. */
9323 comp_insn16 =
9324 (comp_insn & 0x10000) ? INSN_BNEZ38 : INSN_BEQZ38;
9325 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
9326 }
9327 else if (N32_RT5 (insn) == REG_R15)
9328 {
9329 /* Insn can be contracted to 16-bit. */
9330 comp_insn16 =
9331 (comp_insn & 0x10000) ? INSN_BNES38 : INSN_BEQS38;
35c08157 9332 }
35c08157
KLC
9333 }
9334 }
1c8f6a4d
KLC
9335 }
9336 else
9337 {
9338 switch ((insn16 & 0xf000) >> 12)
35c08157 9339 {
1c8f6a4d
KLC
9340 case 0xc:
9341 /* beqz38 or bnez38 */
9342 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9343 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNEZ : INSN_BEQZ;
9344 comp_insn |= ((comp_insn16 & 0x0700) >> 8) << 20;
9345 break;
35c08157 9346
1c8f6a4d
KLC
9347 case 0xd:
9348 /* beqs38 or bnes38 */
9349 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9350 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNE : INSN_BEQ;
9351 comp_insn |= (((comp_insn16 & 0x0700) >> 8) << 20)
9352 | (REG_R5 << 15);
9353 break;
35c08157 9354
1c8f6a4d
KLC
9355 case 0xe:
9356 /* beqzS8 or bnezS8 */
9357 comp_insn16 = (insn16 ^ 0x0100) & 0xff00;
9358 comp_insn = (comp_insn16 & 0x0100) ? INSN_BNEZ : INSN_BEQZ;
9359 comp_insn |= REG_R15 << 20;
9360 break;
35c08157 9361
1c8f6a4d
KLC
9362 default:
9363 break;
9364 }
9365 }
9366 if (comp_insn && re_insn)
9367 *re_insn = comp_insn;
9368 if (comp_insn16 && re_insn16)
9369 *re_insn16 = comp_insn16;
9370}
35c08157 9371
1c8f6a4d 9372/* Relax LONGJUMP2 relocation for nds32_elf_relax_section. */
35c08157 9373
1c8f6a4d
KLC
9374static bfd_boolean
9375nds32_elf_relax_longjump2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9376 Elf_Internal_Rela *internal_relocs, int *insn_len,
9377 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9378 Elf_Internal_Shdr *symtab_hdr)
9379{
9380 /* There are 3 variations for LONGJUMP2
9381 case 2-4; 1st insn convertible, 16-bit on,
9382 optimize off or optimize for space
9383 bnes38 rt, ra, $1 ; LONGJUMP2
9384 j label ; 25_PCREL
9385 $1:
9386
9387 case 4-4; 1st insn not convertible
9388 bne rt, ra, $1 ; LONGJUMP2
9389 j label ; 25_PCREL
9390 $1:
9391
9392 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9393 bne rt, ra, $1 ; LONGJUMP2
9394 j label ; 25_PCREL
9395 $1: */
9396
9397 /* Get the reloc for the address from which the register is
9398 being loaded. This reloc will tell us which function is
9399 actually being called. */
9400
9401 bfd_vma laddr;
9402 int seq_len; /* Original length of instruction sequence. */
9403 Elf_Internal_Rela *i2_irelfn, *cond_irelfn, *irelend;
9404 int pic_ext_target = 0, first_size;
9405 unsigned int i;
9406 bfd_signed_vma foff;
9407 uint32_t insn, re_insn = 0;
9408 uint16_t insn16, re_insn16 = 0;
9409 unsigned long reloc, cond_reloc;
35c08157 9410
1c8f6a4d
KLC
9411 enum elf_nds32_reloc_type checked_types[] =
9412 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
35c08157 9413
1c8f6a4d
KLC
9414 irelend = internal_relocs + sec->reloc_count;
9415 seq_len = GET_SEQ_LEN (irel->r_addend);
9416 laddr = irel->r_offset;
9417 *insn_len = seq_len;
9418 first_size = (seq_len == 6) ? 2 : 4;
9419
9420 i2_irelfn =
9421 find_relocs_at_address_addr (irel, internal_relocs,
9422 irelend, R_NDS32_25_PCREL_RELA,
9423 laddr + first_size);
9424
9425 for (i = 0; i < sizeof (checked_types) / sizeof(checked_types[0]); i++)
9426 {
9427 cond_irelfn =
9428 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9429 checked_types[i], laddr);
9430 if (cond_irelfn != irelend)
9431 break;
9432 }
35c08157 9433
1c8f6a4d
KLC
9434 if (i2_irelfn == irelend || cond_irelfn == irelend)
9435 {
695344c0 9436 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP2",
d42c267e 9437 irel->r_offset);
1c8f6a4d
KLC
9438 return FALSE;
9439 }
35c08157 9440
1c8f6a4d
KLC
9441 /* Get the value of the symbol referred to by the reloc. */
9442 foff =
9443 calculate_offset (abfd, sec, i2_irelfn, isymbuf, symtab_hdr,
9444 &pic_ext_target);
9445 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9446 || foff >= CONSERVATIVE_16BIT_S1)
9447 return FALSE;
35c08157 9448
1c8f6a4d
KLC
9449 /* Get the all corresponding instructions. */
9450 if (first_size == 4)
9451 {
9452 insn = bfd_getb32 (contents + laddr);
9453 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9454 }
9455 else
9456 {
9457 insn16 = bfd_getb16 (contents + laddr);
9458 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9459 }
35c08157 9460
1c8f6a4d
KLC
9461 if (re_insn16 && foff >= -(ACCURATE_8BIT_S1 - first_size)
9462 && foff < ACCURATE_8BIT_S1 - first_size)
9463 {
9464 if (first_size == 4)
9465 {
9466 /* Don't convert it to 16-bit now, keep this as relaxable for
9467 ``label reloc; INSN16''. */
35c08157 9468
1c8f6a4d
KLC
9469 /* Save comp_insn32 to buffer. */
9470 bfd_putb32 (re_insn, contents + irel->r_offset);
9471 *insn_len = 4;
9472 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9473 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9474 cond_reloc = R_NDS32_INSN16;
9475 }
9476 else
9477 {
9478 bfd_putb16 (re_insn16, contents + irel->r_offset);
9479 *insn_len = 2;
9480 reloc = R_NDS32_9_PCREL_RELA;
9481 cond_reloc = R_NDS32_NONE;
9482 }
9483 }
9484 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9485 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9486 && foff < ACCURATE_14BIT_S1 - first_size))
9487 {
9488 /* beqs label ; 15_PCREL */
9489 bfd_putb32 (re_insn, contents + irel->r_offset);
9490 *insn_len = 4;
9491 reloc = R_NDS32_15_PCREL_RELA;
9492 cond_reloc = R_NDS32_NONE;
9493 }
9494 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9495 && foff >= -CONSERVATIVE_16BIT_S1
9496 && foff < CONSERVATIVE_16BIT_S1)
9497 {
9498 /* beqz label ; 17_PCREL */
9499 bfd_putb32 (re_insn, contents + irel->r_offset);
9500 *insn_len = 4;
9501 reloc = R_NDS32_17_PCREL_RELA;
9502 cond_reloc = R_NDS32_NONE;
9503 }
9504 else
9505 return FALSE;
35c08157 9506
1c8f6a4d
KLC
9507 /* Set all relocations. */
9508 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info), reloc);
9509 irel->r_addend = i2_irelfn->r_addend;
35c08157 9510
1c8f6a4d
KLC
9511 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9512 cond_reloc);
9513 cond_irelfn->r_addend = 0;
35c08157 9514
1c8f6a4d
KLC
9515 if ((seq_len ^ *insn_len ) & 0x2)
9516 {
9517 insn16 = NDS32_NOP16;
9518 bfd_putb16 (insn16, contents + irel->r_offset + 4);
9519 i2_irelfn->r_offset = 4;
9520 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9521 R_NDS32_INSN16);
9522 i2_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9523 *insn_len += 2;
9524 }
9525 else
9526 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9527 R_NDS32_NONE);
9528 return TRUE;
9529}
35c08157 9530
1c8f6a4d 9531/* Relax LONGJUMP3 relocation for nds32_elf_relax_section. */
35c08157 9532
1c8f6a4d
KLC
9533static bfd_boolean
9534nds32_elf_relax_longjump3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9535 Elf_Internal_Rela *internal_relocs, int *insn_len,
9536 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9537 Elf_Internal_Shdr *symtab_hdr)
9538{
9539 /* There are 5 variations for LONGJUMP3
9540 case 1: 2-4-4-2; 1st insn convertible, 16-bit on,
9541 optimize off or optimize for space
9542 bnes38 rt, ra, $1 ; LONGJUMP3
9543 sethi ta, hi20(symbol) ; HI20
9544 ori ta, ta, lo12(symbol) ; LO12S0
9545 jr5 ta ;
9546 $1: ;
9547
9548 case 2: 2-4-4-2; 1st insn convertible, 16-bit on, optimize for speed
9549 bnes38 rt, ra, $1 ; LONGJUMP3
9550 sethi ta, hi20(symbol) ; HI20
9551 ori ta, ta, lo12(symbol) ; LO12S0
9552 jr5 ta ;
9553 $1: ; LABEL
9554
9555 case 3: 4-4-4-2; 1st insn not convertible, 16-bit on,
9556 optimize off or optimize for space
9557 bne rt, ra, $1 ; LONGJUMP3
9558 sethi ta, hi20(symbol) ; HI20
9559 ori ta, ta, lo12(symbol) ; LO12S0
9560 jr5 ta ;
9561 $1: ;
9562
9563 case 4: 4-4-4-4; 1st insn don't care, 16-bit off, optimize don't care
9564 16-bit off if no INSN16
9565 bne rt, ra, $1 ; LONGJUMP3
9566 sethi ta, hi20(symbol) ; HI20
9567 ori ta, ta, lo12(symbol) ; LO12S0
9568 jr ta ;
9569 $1: ;
9570
9571 case 5: 4-4-4-4; 1st insn not convertible, 16-bit on, optimize for speed
9572 16-bit off if no INSN16
9573 bne rt, ra, $1 ; LONGJUMP3
9574 sethi ta, hi20(symbol) ; HI20
9575 ori ta, ta, lo12(symbol) ; LO12S0
9576 jr ta ;
9577 $1: ; LABEL */
9578
9579 /* Get the reloc for the address from which the register is
9580 being loaded. This reloc will tell us which function is
9581 actually being called. */
9582 enum elf_nds32_reloc_type checked_types[] =
9583 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
9584
9585 int reloc_off = 0, cond_removed = 0, convertible;
9586 bfd_vma laddr;
9587 int seq_len; /* Original length of instruction sequence. */
9588 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9589 int pic_ext_target = 0, first_size;
9590 unsigned int i;
9591 bfd_signed_vma foff;
9592 uint32_t insn, re_insn = 0;
9593 uint16_t insn16, re_insn16 = 0;
9594 unsigned long reloc, cond_reloc;
35c08157 9595
1c8f6a4d
KLC
9596 irelend = internal_relocs + sec->reloc_count;
9597 seq_len = GET_SEQ_LEN (irel->r_addend);
9598 laddr = irel->r_offset;
9599 *insn_len = seq_len;
35c08157 9600
1c8f6a4d 9601 convertible = IS_1ST_CONVERT (irel->r_addend);
35c08157 9602
1c8f6a4d
KLC
9603 if (convertible)
9604 first_size = 2;
9605 else
9606 first_size = 4;
9607
9608 /* Get all needed relocations. */
9609 hi_irelfn =
9610 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9611 R_NDS32_HI20_RELA, laddr + first_size);
9612 lo_irelfn =
9613 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9614 R_NDS32_LO12S0_ORI_RELA,
9615 laddr + first_size + 4);
9616
9617 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
9618 {
9619 cond_irelfn =
9620 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9621 checked_types[i], laddr);
9622 if (cond_irelfn != irelend)
9623 break;
9624 }
35c08157 9625
1c8f6a4d
KLC
9626 if (hi_irelfn == irelend || lo_irelfn == irelend || cond_irelfn == irelend)
9627 {
695344c0 9628 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP3",
d42c267e 9629 irel->r_offset);
1c8f6a4d
KLC
9630 return FALSE;
9631 }
35c08157 9632
1c8f6a4d
KLC
9633 /* Get the value of the symbol referred to by the reloc. */
9634 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9635 &pic_ext_target);
35c08157 9636
1c8f6a4d
KLC
9637 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9638 || foff >= CONSERVATIVE_24BIT_S1)
9639 return FALSE;
35c08157 9640
1c8f6a4d
KLC
9641 /* Get the all corresponding instructions. */
9642 if (first_size == 4)
9643 {
9644 insn = bfd_getb32 (contents + laddr);
9645 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9646 }
9647 else
9648 {
9649 insn16 = bfd_getb16 (contents + laddr);
9650 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9651 }
35c08157 9652
1c8f6a4d
KLC
9653 /* For simplicity of coding, we are going to modify the section
9654 contents, the section relocs, and the BFD symbol table. We
9655 must tell the rest of the code not to free up this
9656 information. It would be possible to instead create a table
9657 of changes which have to be made, as is done in coff-mips.c;
9658 that would be more work, but would require less memory when
9659 the linker is run. */
35c08157 9660
1c8f6a4d
KLC
9661 if (re_insn16 && foff >= -ACCURATE_8BIT_S1 - first_size
9662 && foff < ACCURATE_8BIT_S1 - first_size)
9663 {
9664 if (!(seq_len & 0x2))
9665 {
9666 /* Don't convert it to 16-bit now, keep this as relaxable
9667 for ``label reloc; INSN1a''6. */
9668 /* Save comp_insn32 to buffer. */
9669 bfd_putb32 (re_insn, contents + irel->r_offset);
9670 *insn_len = 4;
9671 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9672 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9673 cond_reloc = R_NDS32_INSN16;
9674 }
9675 else
9676 {
9677 /* Not optimize for speed; convert sequence to 16-bit. */
9678 /* Save comp_insn16 to buffer. */
9679 bfd_putb16 (re_insn16, contents + irel->r_offset);
9680 *insn_len = 2;
9681 reloc = R_NDS32_9_PCREL_RELA;
9682 cond_reloc = R_NDS32_NONE;
9683 }
9684 cond_removed = 1;
9685 }
9686 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9687 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9688 && foff < ACCURATE_14BIT_S1 - first_size))
9689 {
9690 /* beqs label ; 15_PCREL */
9691 bfd_putb32 (re_insn, contents + irel->r_offset);
9692 *insn_len = 4;
9693 reloc = R_NDS32_15_PCREL_RELA;
9694 cond_reloc = R_NDS32_NONE;
9695 cond_removed = 1;
9696 }
9697 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9698 && foff >= -CONSERVATIVE_16BIT_S1
9699 && foff < CONSERVATIVE_16BIT_S1)
9700 {
9701 /* beqz label ; 17_PCREL */
9702 bfd_putb32 (re_insn, contents + irel->r_offset);
9703 *insn_len = 4;
9704 reloc = R_NDS32_17_PCREL_RELA;
9705 cond_reloc = R_NDS32_NONE;
9706 cond_removed = 1;
9707 }
9708 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
9709 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
9710 {
9711 /* Relax to one of the following 3 variations
9712
9713 case 2-4; 1st insn convertible, 16-bit on, optimize off or optimize
9714 for space
9715 bnes38 rt, $1 ; LONGJUMP2
9716 j label ; 25_PCREL
9717 $1
9718
9719 case 4-4; 1st insn not convertible, others don't care
9720 bne rt, ra, $1 ; LONGJUMP2
9721 j label ; 25_PCREL
9722 $1
9723
9724 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9725 bne rt, ra, $1 ; LONGJUMP2
9726 j label ; 25_PCREL
9727 $1 */
9728
9729 /* Offset for first instruction. */
9730
9731 /* Use j label as second instruction. */
9732 *insn_len = 4 + first_size;
9733 insn = INSN_J;
9734 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
9735 reloc = R_NDS32_LONGJUMP2;
9736 cond_reloc = R_NDS32_25_PLTREL;
9737 }
9738 else
9739 return FALSE;
35c08157 9740
1c8f6a4d
KLC
9741 if (cond_removed == 1)
9742 {
9743 /* Set all relocations. */
9744 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9745 irel->r_addend = hi_irelfn->r_addend;
9746
9747 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9748 cond_reloc);
9749 cond_irelfn->r_addend = 0;
9750 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9751 R_NDS32_NONE);
9752 }
9753 else
9754 {
9755 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
9756 irel->r_addend = irel->r_addend;
9757 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9758 cond_reloc);
9759 }
35c08157 9760
1c8f6a4d
KLC
9761 if ((seq_len ^ *insn_len ) & 0x2)
9762 {
9763 insn16 = NDS32_NOP16;
9764 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9765 lo_irelfn->r_offset = *insn_len;
9766 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9767 R_NDS32_INSN16);
9768 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9769 *insn_len += 2;
9770 }
9771 else
9772 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9773 R_NDS32_NONE);
9774 return TRUE;
9775}
35c08157 9776
1c8f6a4d 9777/* Relax LONGCALL4 relocation for nds32_elf_relax_section. */
35c08157 9778
1c8f6a4d
KLC
9779static bfd_boolean
9780nds32_elf_relax_longcall4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9781 Elf_Internal_Rela *internal_relocs, int *insn_len,
9782 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9783 Elf_Internal_Shdr *symtab_hdr)
9784{
9785 /* The pattern for LONGCALL4. Support for function cse.
9786 sethi ta, hi20(symbol) ; LONGCALL4/HI20
9787 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
9788 jral ta ; PTR_RES/EMPTY/INSN16 */
35c08157 9789
1c8f6a4d
KLC
9790 bfd_vma laddr;
9791 uint32_t insn;
9792 Elf_Internal_Rela *hi_irel, *ptr_irel, *insn_irel, *em_irel, *call_irel;
9793 Elf_Internal_Rela *irelend;
9794 int pic_ext_target = 0;
9795 bfd_signed_vma foff;
35c08157 9796
1c8f6a4d
KLC
9797 irelend = internal_relocs + sec->reloc_count;
9798 laddr = irel->r_offset;
35c08157 9799
1c8f6a4d
KLC
9800 /* Get the reloc for the address from which the register is
9801 being loaded. This reloc will tell us which function is
9802 actually being called. */
9803 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9804 R_NDS32_HI20_RELA, laddr);
35c08157 9805
1c8f6a4d
KLC
9806 if (hi_irel == irelend)
9807 {
695344c0 9808 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL4",
d42c267e 9809 irel->r_offset);
1c8f6a4d
KLC
9810 return FALSE;
9811 }
35c08157 9812
1c8f6a4d
KLC
9813 /* Get the value of the symbol referred to by the reloc. */
9814 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
9815 &pic_ext_target);
35c08157 9816
1c8f6a4d
KLC
9817 /* This condition only happened when symbol is undefined. */
9818 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9819 || foff >= CONSERVATIVE_24BIT_S1)
9820 return FALSE;
35c08157 9821
1c8f6a4d
KLC
9822 /* Relax to: jal symbol; 25_PCREL */
9823 /* For simplicity of coding, we are going to modify the section
9824 contents, the section relocs, and the BFD symbol table. We
9825 must tell the rest of the code not to free up this
9826 information. It would be possible to instead create a table
9827 of changes which have to be made, as is done in coff-mips.c;
9828 that would be more work, but would require less memory when
9829 the linker is run. */
35c08157 9830
1c8f6a4d
KLC
9831 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9832 R_NDS32_PTR_RESOLVED, irel->r_addend);
9833 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9834 R_NDS32_EMPTY, irel->r_addend);
35c08157 9835
1c8f6a4d
KLC
9836 if (ptr_irel == irelend || em_irel == irelend)
9837 {
695344c0 9838 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL4",
d42c267e 9839 irel->r_offset);
1c8f6a4d
KLC
9840 return FALSE;
9841 }
9842 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
9843 insn = bfd_getb32 (contents + irel->r_addend);
9844 if (insn & 0x80000000)
9845 return FALSE;
35c08157 9846
1c8f6a4d
KLC
9847 /* Replace the long call with a jal. */
9848 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
9849 R_NDS32_25_PCREL_RELA);
9850 ptr_irel->r_addend = 1;
35c08157 9851
1c8f6a4d
KLC
9852 /* We don't resolve this here but resolve it in relocate_section. */
9853 insn = INSN_JAL;
9854 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 9855
1c8f6a4d
KLC
9856 irel->r_info =
9857 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 9858
1c8f6a4d
KLC
9859 /* If there is function cse, HI20 can not remove now. */
9860 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9861 R_NDS32_LONGCALL4, laddr);
9862 if (call_irel == irelend)
9863 {
9864 *insn_len = 0;
9865 hi_irel->r_info =
9866 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
9867 }
35c08157 9868
1c8f6a4d
KLC
9869 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9870 R_NDS32_INSN16, irel->r_addend);
9871 if (insn_irel != irelend)
9872 insn_irel->r_info =
9873 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 9874
1c8f6a4d
KLC
9875 return TRUE;
9876}
35c08157 9877
1c8f6a4d 9878/* Relax LONGCALL5 relocation for nds32_elf_relax_section. */
35c08157 9879
1c8f6a4d
KLC
9880static bfd_boolean
9881nds32_elf_relax_longcall5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9882 Elf_Internal_Rela *internal_relocs, int *insn_len,
9883 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9884 Elf_Internal_Shdr *symtab_hdr)
9885{
9886 /* The pattern for LONGCALL5.
9887 bltz rt, .L1 ; LONGCALL5/17_PCREL
9888 jal symbol ; 25_PCREL
9889 .L1: */
35c08157 9890
1c8f6a4d
KLC
9891 bfd_vma laddr;
9892 uint32_t insn;
9893 Elf_Internal_Rela *cond_irel, *irelend;
9894 int pic_ext_target = 0;
9895 bfd_signed_vma foff;
35c08157 9896
1c8f6a4d
KLC
9897 irelend = internal_relocs + sec->reloc_count;
9898 laddr = irel->r_offset;
9899 insn = bfd_getb32 (contents + laddr);
35c08157 9900
1c8f6a4d
KLC
9901 /* Get the reloc for the address from which the register is
9902 being loaded. This reloc will tell us which function is
9903 actually being called. */
9904 cond_irel =
9905 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9906 R_NDS32_25_PCREL_RELA, irel->r_addend);
9907 if (cond_irel == irelend)
9908 {
695344c0 9909 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL5",
d42c267e 9910 irel->r_offset);
1c8f6a4d
KLC
9911 return FALSE;
9912 }
35c08157 9913
1c8f6a4d
KLC
9914 /* Get the value of the symbol referred to by the reloc. */
9915 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
9916 &pic_ext_target);
35c08157 9917
1c8f6a4d
KLC
9918 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9919 || foff >= CONSERVATIVE_16BIT_S1)
9920 return FALSE;
35c08157 9921
1c8f6a4d
KLC
9922 /* Relax to bgezal rt, label ; 17_PCREL
9923 or bltzal rt, label ; 17_PCREL */
35c08157 9924
1c8f6a4d
KLC
9925 /* Convert to complimentary conditional call. */
9926 insn = CONVERT_CONDITION_CALL (insn);
35c08157 9927
1c8f6a4d
KLC
9928 /* For simplicity of coding, we are going to modify the section
9929 contents, the section relocs, and the BFD symbol table. We
9930 must tell the rest of the code not to free up this
9931 information. It would be possible to instead create a table
9932 of changes which have to be made, as is done in coff-mips.c;
9933 that would be more work, but would require less memory when
9934 the linker is run. */
35c08157 9935
1c8f6a4d
KLC
9936 /* Modify relocation and contents. */
9937 cond_irel->r_info =
9938 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_17_PCREL_RELA);
35c08157 9939
1c8f6a4d
KLC
9940 /* Replace the long call with a bgezal. */
9941 bfd_putb32 (insn, contents + cond_irel->r_offset);
9942 *insn_len = 0;
35c08157 9943
1c8f6a4d
KLC
9944 /* Clean unnessary relocations. */
9945 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 9946
1c8f6a4d
KLC
9947 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9948 R_NDS32_17_PCREL_RELA, laddr);
9949 cond_irel->r_info =
9950 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 9951
1c8f6a4d
KLC
9952 return TRUE;
9953}
35c08157 9954
1c8f6a4d 9955/* Relax LONGCALL6 relocation for nds32_elf_relax_section. */
35c08157 9956
1c8f6a4d
KLC
9957static bfd_boolean
9958nds32_elf_relax_longcall6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9959 Elf_Internal_Rela *internal_relocs, int *insn_len,
9960 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9961 Elf_Internal_Shdr *symtab_hdr)
9962{
9963 /* The pattern for LONGCALL6.
9964 bltz rt, .L1 ; LONGCALL6/17_PCREL
9965 sethi ta, hi20(symbol) ; HI20/PTR
9966 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
9967 jral ta ; PTR_RES/EMPTY/INSN16
9968 .L1 */
9969
9970 bfd_vma laddr;
9971 uint32_t insn;
9972 Elf_Internal_Rela *em_irel, *cond_irel, *irelend;
9973 int pic_ext_target = 0;
9974 bfd_signed_vma foff;
35c08157 9975
1c8f6a4d
KLC
9976 irelend = internal_relocs + sec->reloc_count;
9977 laddr = irel->r_offset;
35c08157 9978
1c8f6a4d
KLC
9979 /* Get the reloc for the address from which the register is
9980 being loaded. This reloc will tell us which function is
9981 actually being called. */
9982 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9983 R_NDS32_EMPTY, irel->r_addend);
35c08157 9984
1c8f6a4d
KLC
9985 if (em_irel == irelend)
9986 {
695344c0 9987 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL6",
d42c267e 9988 irel->r_offset);
1c8f6a4d
KLC
9989 return FALSE;
9990 }
35c08157 9991
1c8f6a4d
KLC
9992 /* Get the value of the symbol referred to by the reloc. */
9993 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
9994 &pic_ext_target);
35c08157 9995
1c8f6a4d
KLC
9996 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9997 || foff >= CONSERVATIVE_24BIT_S1)
9998 return FALSE;
35c08157 9999
1c8f6a4d
KLC
10000 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
10001 insn = bfd_getb32 (contents + irel->r_addend);
10002 if (insn & 0x80000000)
10003 return FALSE;
35c08157 10004
1c8f6a4d
KLC
10005 insn = bfd_getb32 (contents + laddr);
10006 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10007 {
10008 /* Relax to bgezal rt, label ; 17_PCREL
10009 or bltzal rt, label ; 17_PCREL */
35c08157 10010
1c8f6a4d
KLC
10011 /* Convert to complimentary conditional call. */
10012 *insn_len = 0;
10013 insn = CONVERT_CONDITION_CALL (insn);
10014 bfd_putb32 (insn, contents + em_irel->r_offset);
10015
10016 em_irel->r_info =
10017 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_17_PCREL_RELA);
10018
10019 /* Set resolved relocation. */
10020 cond_irel =
10021 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10022 R_NDS32_PTR_RESOLVED, irel->r_addend);
10023 if (cond_irel == irelend)
35c08157 10024 {
695344c0 10025 _bfd_error_handler (unrecognized_reloc_msg, abfd,
d42c267e 10026 "R_NDS32_LONGCALL6", irel->r_offset);
1c8f6a4d
KLC
10027 return FALSE;
10028 }
10029 cond_irel->r_addend = 1;
35c08157 10030
1c8f6a4d 10031 /* Clear relocations. */
35c08157 10032
1c8f6a4d
KLC
10033 irel->r_info =
10034 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10035
1c8f6a4d
KLC
10036 cond_irel =
10037 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10038 R_NDS32_17_PCREL_RELA, laddr);
10039 if (cond_irel != irelend)
10040 cond_irel->r_info =
10041 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10042
1c8f6a4d
KLC
10043 cond_irel =
10044 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10045 R_NDS32_INSN16, irel->r_addend);
10046 if (cond_irel != irelend)
10047 cond_irel->r_info =
10048 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10049
1c8f6a4d
KLC
10050 }
10051 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
10052 {
10053 /* Relax to the following instruction sequence
10054 bltz rt, .L1 ; LONGCALL2/17_PCREL
10055 jal symbol ; 25_PCREL/PTR_RES
10056 .L1 */
10057 *insn_len = 4;
10058 /* Convert instruction. */
10059 insn = INSN_JAL;
10060 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10061
1c8f6a4d
KLC
10062 /* Convert relocations. */
10063 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10064 R_NDS32_25_PCREL_RELA);
10065 irel->r_info =
10066 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL5);
35c08157 10067
1c8f6a4d
KLC
10068 /* Set resolved relocation. */
10069 cond_irel =
10070 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10071 R_NDS32_PTR_RESOLVED, irel->r_addend);
10072 if (cond_irel == irelend)
10073 {
695344c0 10074 _bfd_error_handler (unrecognized_reloc_msg, abfd,
d42c267e 10075 "R_NDS32_LONGCALL6", irel->r_offset);
1c8f6a4d
KLC
10076 return FALSE;
10077 }
10078 cond_irel->r_addend = 1;
35c08157 10079
1c8f6a4d
KLC
10080 cond_irel =
10081 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10082 R_NDS32_INSN16, irel->r_addend);
10083 if (cond_irel != irelend)
10084 cond_irel->r_info =
10085 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10086 }
10087 return TRUE;
10088}
35c08157 10089
1c8f6a4d 10090/* Relax LONGJUMP4 relocation for nds32_elf_relax_section. */
35c08157 10091
1c8f6a4d
KLC
10092static bfd_boolean
10093nds32_elf_relax_longjump4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10094 Elf_Internal_Rela *internal_relocs, int *insn_len,
10095 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10096 Elf_Internal_Shdr *symtab_hdr)
10097{
10098 /* The pattern for LONGJUMP4.
10099 sethi ta, hi20(symbol) ; LONGJUMP4/HI20
10100 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10101 jr ta ; PTR_RES/INSN16/EMPTY */
10102
10103 bfd_vma laddr;
10104 int seq_len; /* Original length of instruction sequence. */
10105 uint32_t insn;
10106 Elf_Internal_Rela *hi_irel, *ptr_irel, *em_irel, *call_irel, *irelend;
10107 int pic_ext_target = 0;
10108 bfd_signed_vma foff;
35c08157 10109
1c8f6a4d
KLC
10110 irelend = internal_relocs + sec->reloc_count;
10111 seq_len = GET_SEQ_LEN (irel->r_addend);
10112 laddr = irel->r_offset;
10113 *insn_len = seq_len;
35c08157 10114
1c8f6a4d
KLC
10115 /* Get the reloc for the address from which the register is
10116 being loaded. This reloc will tell us which function is
10117 actually being called. */
35c08157 10118
1c8f6a4d
KLC
10119 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10120 R_NDS32_HI20_RELA, laddr);
35c08157 10121
1c8f6a4d
KLC
10122 if (hi_irel == irelend)
10123 {
695344c0 10124 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP4",
d42c267e 10125 irel->r_offset);
1c8f6a4d
KLC
10126 return FALSE;
10127 }
35c08157 10128
1c8f6a4d
KLC
10129 /* Get the value of the symbol referred to by the reloc. */
10130 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
10131 &pic_ext_target);
35c08157 10132
1c8f6a4d
KLC
10133 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
10134 || foff < -CONSERVATIVE_24BIT_S1)
10135 return FALSE;
35c08157 10136
1c8f6a4d
KLC
10137 /* Convert it to "j label", it may be converted to j8 in the final
10138 pass of relaxation. Therefore, we do not consider this currently. */
10139 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10140 R_NDS32_PTR_RESOLVED, irel->r_addend);
10141 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10142 R_NDS32_EMPTY, irel->r_addend);
35c08157 10143
1c8f6a4d
KLC
10144 if (ptr_irel == irelend || em_irel == irelend)
10145 {
695344c0 10146 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP4",
d42c267e 10147 irel->r_offset);
1c8f6a4d
KLC
10148 return FALSE;
10149 }
35c08157 10150
1c8f6a4d
KLC
10151 em_irel->r_info =
10152 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_25_PCREL_RELA);
10153 ptr_irel->r_addend = 1;
35c08157 10154
1c8f6a4d
KLC
10155 /* Write instruction. */
10156 insn = INSN_J;
10157 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10158
1c8f6a4d
KLC
10159 /* Clear relocations. */
10160 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10161
1c8f6a4d
KLC
10162 /* If there is function cse, HI20 can not remove now. */
10163 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10164 R_NDS32_LONGJUMP4, laddr);
10165 if (call_irel == irelend)
10166 {
10167 *insn_len = 0;
10168 hi_irel->r_info =
10169 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10170 }
35c08157 10171
1c8f6a4d
KLC
10172 return TRUE;
10173}
35c08157 10174
1c8f6a4d 10175/* Relax LONGJUMP5 relocation for nds32_elf_relax_section. */
35c08157 10176
1c8f6a4d
KLC
10177static bfd_boolean
10178nds32_elf_relax_longjump5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10179 Elf_Internal_Rela *internal_relocs, int *insn_len,
10180 int *seq_len, bfd_byte *contents,
10181 Elf_Internal_Sym *isymbuf,
10182 Elf_Internal_Shdr *symtab_hdr)
10183{
10184 /* There are 2 variations for LONGJUMP5
10185 case 2-4; 1st insn convertible, 16-bit on.
10186 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10187 j label ; 25_PCREL/INSN16
10188 $1:
10189
10190 case 4-4; 1st insn not convertible
10191 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10192 j label ; 25_PCREL/INSN16
10193 .L1: */
10194
10195 bfd_vma laddr;
10196 Elf_Internal_Rela *cond_irel, *irelend;
10197 int pic_ext_target = 0;
10198 unsigned int i;
10199 bfd_signed_vma foff;
10200 uint32_t insn, re_insn = 0;
10201 uint16_t insn16, re_insn16 = 0;
10202 unsigned long reloc;
35c08157 10203
1c8f6a4d
KLC
10204 enum elf_nds32_reloc_type checked_types[] =
10205 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10206 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
35c08157 10207
1c8f6a4d
KLC
10208 irelend = internal_relocs + sec->reloc_count;
10209 laddr = irel->r_offset;
35c08157 10210
1c8f6a4d
KLC
10211 /* Get the reloc for the address from which the register is
10212 being loaded. This reloc will tell us which function is
10213 actually being called. */
35c08157 10214
1c8f6a4d
KLC
10215 cond_irel =
10216 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10217 R_NDS32_25_PCREL_RELA, irel->r_addend);
10218 if (cond_irel == irelend)
10219 {
695344c0 10220 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP5",
d42c267e 10221 irel->r_offset);
1c8f6a4d
KLC
10222 return FALSE;
10223 }
35c08157 10224
1c8f6a4d
KLC
10225 /* Get the value of the symbol referred to by the reloc. */
10226 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10227 &pic_ext_target);
35c08157 10228
1c8f6a4d
KLC
10229 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10230 || foff >= CONSERVATIVE_16BIT_S1)
10231 return FALSE;
35c08157 10232
1c8f6a4d
KLC
10233 /* Get the all corresponding instructions. */
10234 insn = bfd_getb32 (contents + laddr);
10235 /* Check instruction size. */
10236 if (insn & 0x80000000)
10237 {
10238 *seq_len = 0;
10239 insn16 = insn >> 16;
10240 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10241 }
10242 else
10243 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 10244
1c8f6a4d
KLC
10245 if (N32_OP6 (re_insn) == N32_OP6_BR1
10246 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10247 {
10248 /* beqs label ; 15_PCREL. */
10249 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10250 reloc = R_NDS32_15_PCREL_RELA;
10251 }
10252 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10253 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10254 {
10255 /* beqz label ; 17_PCREL. */
10256 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10257 reloc = R_NDS32_17_PCREL_RELA;
10258 }
10259 else if ( N32_OP6 (re_insn) == N32_OP6_BR3
10260 && foff >= -CONSERVATIVE_8BIT_S1 && foff < CONSERVATIVE_8BIT_S1)
10261 {
10262 /* beqc label ; 9_PCREL. */
10263 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10264 reloc = R_NDS32_WORD_9_PCREL_RELA;
10265 }
10266 else
10267 return FALSE;
35c08157 10268
1c8f6a4d
KLC
10269 /* Set all relocations. */
10270 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), reloc);
35c08157 10271
1c8f6a4d
KLC
10272 /* Clean relocations. */
10273 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10274 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10275 {
10276 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10277 checked_types[i], laddr);
10278 if (cond_irel != irelend)
10279 {
10280 if (*seq_len == 0
10281 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
35c08157 10282 {
1c8f6a4d
KLC
10283 /* If the branch instruction is 2 byte, it cannot remove
10284 directly. Only convert it to nop16 and remove it after
10285 checking alignment issue. */
10286 insn16 = NDS32_NOP16;
10287 bfd_putb16 (insn16, contents + laddr);
10288 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157
KLC
10289 }
10290 else
1c8f6a4d
KLC
10291 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10292 R_NDS32_NONE);
35c08157 10293 }
1c8f6a4d
KLC
10294 }
10295 *insn_len = 0;
35c08157 10296
1c8f6a4d
KLC
10297 return TRUE;
10298}
35c08157 10299
1c8f6a4d 10300/* Relax LONGJUMP6 relocation for nds32_elf_relax_section. */
35c08157 10301
1c8f6a4d
KLC
10302static bfd_boolean
10303nds32_elf_relax_longjump6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10304 Elf_Internal_Rela *internal_relocs, int *insn_len,
10305 int *seq_len, bfd_byte *contents,
10306 Elf_Internal_Sym *isymbuf,
10307 Elf_Internal_Shdr *symtab_hdr)
10308{
10309 /* There are 5 variations for LONGJUMP6
10310 case : 2-4-4-4; 1st insn convertible, 16-bit on.
10311 bnes38 rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10312 sethi ta, hi20(symbol) ; HI20/PTR
10313 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10314 jr ta ; PTR_RES/INSN16/EMPTY
10315 .L1:
10316
10317 case : 4-4-4-4; 1st insn not convertible, 16-bit on.
10318 bne rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10319 sethi ta, hi20(symbol) ; HI20/PTR
10320 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10321 jr ta ; PTR_RES/INSN16/EMPTY
10322 .L1: */
10323
10324 enum elf_nds32_reloc_type checked_types[] =
10325 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10326 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
10327
10328 int reloc_off = 0, cond_removed = 0;
10329 bfd_vma laddr;
10330 Elf_Internal_Rela *cond_irel, *em_irel, *irelend, *insn_irel;
10331 int pic_ext_target = 0;
10332 unsigned int i;
10333 bfd_signed_vma foff;
10334 uint32_t insn, re_insn = 0;
10335 uint16_t insn16, re_insn16 = 0;
10336 unsigned long reloc;
35c08157 10337
1c8f6a4d
KLC
10338 irelend = internal_relocs + sec->reloc_count;
10339 laddr = irel->r_offset;
35c08157 10340
1c8f6a4d
KLC
10341 /* Get the reloc for the address from which the register is
10342 being loaded. This reloc will tell us which function is
10343 actually being called. */
10344 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10345 R_NDS32_EMPTY, irel->r_addend);
35c08157 10346
1c8f6a4d
KLC
10347 if (em_irel == irelend)
10348 {
695344c0 10349 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP6",
d42c267e 10350 irel->r_offset);
1c8f6a4d
KLC
10351 return FALSE;
10352 }
35c08157 10353
1c8f6a4d
KLC
10354 /* Get the value of the symbol referred to by the reloc. */
10355 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10356 &pic_ext_target);
35c08157 10357
1c8f6a4d
KLC
10358 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10359 || foff >= CONSERVATIVE_24BIT_S1)
10360 return FALSE;
35c08157 10361
1c8f6a4d
KLC
10362 insn = bfd_getb32 (contents + laddr);
10363 /* Check instruction size. */
10364 if (insn & 0x80000000)
10365 {
10366 *seq_len = 0;
10367 insn16 = insn >> 16;
10368 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10369 }
10370 else
10371 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 10372
1c8f6a4d
KLC
10373 /* For simplicity of coding, we are going to modify the section
10374 contents, the section relocs, and the BFD symbol table. We
10375 must tell the rest of the code not to free up this
10376 information. It would be possible to instead create a table
10377 of changes which have to be made, as is done in coff-mips.c;
10378 that would be more work, but would require less memory when
10379 the linker is run. */
35c08157 10380
1c8f6a4d
KLC
10381 if (N32_OP6 (re_insn) == N32_OP6_BR1
10382 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10383 {
10384 /* beqs label ; 15_PCREL */
10385 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10386 reloc = R_NDS32_15_PCREL_RELA;
10387 cond_removed = 1;
10388 }
10389 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10390 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10391 {
10392 /* beqz label ; 17_PCREL */
10393 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10394 reloc = R_NDS32_17_PCREL_RELA;
10395 cond_removed = 1;
10396 }
10397 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
10398 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
10399 {
10400 /* Relax to one of the following 2 variations
35c08157 10401
1c8f6a4d
KLC
10402 case 2-4; 1st insn convertible, 16-bit on.
10403 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10404 j label ; 25_PCREL/INSN16
10405 $1:
35c08157 10406
1c8f6a4d
KLC
10407 case 4-4; 1st insn not convertible
10408 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10409 j label ; 25_PCREL/INSN16
10410 .L1: */
35c08157 10411
1c8f6a4d
KLC
10412 /* Use j label as second instruction. */
10413 insn = INSN_J;
10414 reloc = R_NDS32_25_PCREL_RELA;
10415 bfd_putb32 (insn, contents + em_irel->r_offset);
10416 }
10417 else
10418 return FALSE;
35c08157 10419
1c8f6a4d
KLC
10420 /* Set all relocations. */
10421 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), reloc);
35c08157 10422
1c8f6a4d
KLC
10423 cond_irel =
10424 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10425 R_NDS32_PTR_RESOLVED, em_irel->r_offset);
10426 cond_irel->r_addend = 1;
35c08157 10427
1c8f6a4d
KLC
10428 /* Use INSN16 of first branch instruction to distinguish if keeping
10429 INSN16 of final instruction or not. */
10430 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10431 R_NDS32_INSN16, irel->r_offset);
10432 if (insn_irel == irelend)
10433 {
10434 /* Clean the final INSN16. */
10435 insn_irel =
10436 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10437 R_NDS32_INSN16, em_irel->r_offset);
10438 insn_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10439 R_NDS32_NONE);
10440 }
10441
10442 if (cond_removed == 1)
10443 {
10444 *insn_len = 0;
10445
10446 /* Clear relocations. */
10447 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10448
1c8f6a4d
KLC
10449 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10450 {
10451 cond_irel =
10452 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10453 checked_types[i], laddr);
10454 if (cond_irel != irelend)
35c08157 10455 {
1c8f6a4d
KLC
10456 if (*seq_len == 0
10457 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
10458 {
10459 /* If the branch instruction is 2 byte, it cannot remove
10460 directly. Only convert it to nop16 and remove it after
10461 checking alignment issue. */
10462 insn16 = NDS32_NOP16;
10463 bfd_putb16 (insn16, contents + laddr);
10464 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10465 }
10466 else
10467 cond_irel->r_info =
10468 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10469 }
35c08157 10470 }
1c8f6a4d
KLC
10471 }
10472 else
10473 {
10474 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
10475 R_NDS32_LONGJUMP5);
10476 }
35c08157 10477
1c8f6a4d
KLC
10478 return TRUE;
10479}
35c08157 10480
1c8f6a4d 10481/* Relax LONGJUMP7 relocation for nds32_elf_relax_section. */
35c08157 10482
1c8f6a4d
KLC
10483static bfd_boolean
10484nds32_elf_relax_longjump7 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10485 Elf_Internal_Rela *internal_relocs, int *insn_len,
10486 int *seq_len, bfd_byte *contents,
10487 Elf_Internal_Sym *isymbuf,
10488 Elf_Internal_Shdr *symtab_hdr)
10489{
10490 /* There are 2 variations for LONGJUMP5
10491 case 2-4; 1st insn convertible, 16-bit on.
10492 movi55 ta, imm11 ; LONGJUMP7/INSN16
10493 beq rt, ta, label ; 15_PCREL
10494
10495 case 4-4; 1st insn not convertible
10496 movi55 ta, imm11 ; LONGJUMP7/INSN16
10497 beq rt, ta, label ; 15_PCREL */
10498
10499 bfd_vma laddr;
10500 Elf_Internal_Rela *cond_irel, *irelend, *insn_irel;
10501 int pic_ext_target = 0;
10502 bfd_signed_vma foff;
10503 uint32_t insn, re_insn = 0;
10504 uint16_t insn16;
10505 uint32_t imm11;
35c08157 10506
1c8f6a4d
KLC
10507 irelend = internal_relocs + sec->reloc_count;
10508 laddr = irel->r_offset;
35c08157 10509
1c8f6a4d
KLC
10510 /* Get the reloc for the address from which the register is
10511 being loaded. This reloc will tell us which function is
10512 actually being called. */
35c08157 10513
1c8f6a4d
KLC
10514 cond_irel =
10515 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10516 R_NDS32_15_PCREL_RELA, irel->r_addend);
10517 if (cond_irel == irelend)
10518 {
695344c0 10519 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP7",
d42c267e 10520 irel->r_offset);
1c8f6a4d
KLC
10521 return FALSE;
10522 }
35c08157 10523
1c8f6a4d
KLC
10524 /* Get the value of the symbol referred to by the reloc. */
10525 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10526 &pic_ext_target);
35c08157 10527
1c8f6a4d
KLC
10528 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_8BIT_S1
10529 || foff >= CONSERVATIVE_8BIT_S1)
10530 return FALSE;
35c08157 10531
1c8f6a4d
KLC
10532 /* Get the first instruction for its size. */
10533 insn = bfd_getb32 (contents + laddr);
10534 if (insn & 0x80000000)
10535 {
10536 *seq_len = 0;
10537 /* Get the immediate from movi55. */
10538 imm11 = N16_IMM5S (insn >> 16);
10539 }
10540 else
10541 {
10542 /* Get the immediate from movi. */
10543 imm11 = N32_IMM20S (insn);
35c08157
KLC
10544 }
10545
1c8f6a4d
KLC
10546 /* Get the branch instruction. */
10547 insn = bfd_getb32 (contents + irel->r_addend);
10548 /* Convert instruction to BR3. */
10549 if ((insn >> 14) & 0x1)
10550 re_insn = N32_BR3 (BNEC, N32_RT5 (insn), imm11, 0);
10551 else
10552 re_insn = N32_BR3 (BEQC, N32_RT5 (insn), imm11, 0);
35c08157 10553
1c8f6a4d 10554 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
35c08157 10555
1c8f6a4d
KLC
10556 /* Set all relocations. */
10557 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10558 R_NDS32_WORD_9_PCREL_RELA);
10559
10560 /* Clean relocations. */
10561 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10562 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10563 R_NDS32_INSN16, irel->r_offset);
10564 if (insn_irel != irelend)
10565 {
10566 if (*seq_len == 0)
35c08157 10567 {
1c8f6a4d
KLC
10568 /* If the first insntruction is 16bit, convert it to nop16. */
10569 insn16 = NDS32_NOP16;
10570 bfd_putb16 (insn16, contents + laddr);
10571 insn_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157 10572 }
1c8f6a4d
KLC
10573 else
10574 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10575 R_NDS32_NONE);
35c08157 10576 }
1c8f6a4d 10577 *insn_len = 0;
35c08157 10578
1c8f6a4d
KLC
10579 return TRUE;
10580}
35c08157 10581
1c8f6a4d 10582#define GET_LOADSTORE_RANGE(addend) (((addend) >> 8) & 0x3f)
35c08157 10583
1c8f6a4d 10584/* Relax LOADSTORE relocation for nds32_elf_relax_section. */
35c08157 10585
1c8f6a4d
KLC
10586static bfd_boolean
10587nds32_elf_relax_loadstore (struct bfd_link_info *link_info, bfd *abfd,
10588 asection *sec, Elf_Internal_Rela *irel,
10589 Elf_Internal_Rela *internal_relocs, int *insn_len,
10590 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10591 Elf_Internal_Shdr *symtab_hdr, int load_store_relax)
10592{
6cae483a
AM
10593 int eliminate_sethi = 0, range_type;
10594 unsigned int i;
1c8f6a4d
KLC
10595 bfd_vma local_sda, laddr;
10596 int seq_len; /* Original length of instruction sequence. */
10597 uint32_t insn;
10598 Elf_Internal_Rela *hi_irelfn = NULL, *irelend;
10599 bfd_vma access_addr = 0;
10600 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10601 enum elf_nds32_reloc_type checked_types[] =
10602 { R_NDS32_HI20_RELA, R_NDS32_GOT_HI20,
10603 R_NDS32_GOTPC_HI20, R_NDS32_GOTOFF_HI20,
10604 R_NDS32_PLTREL_HI20, R_NDS32_PLT_GOTREL_HI20,
10605 R_NDS32_TLS_LE_HI20
10606 };
35c08157 10607
1c8f6a4d
KLC
10608 irelend = internal_relocs + sec->reloc_count;
10609 seq_len = GET_SEQ_LEN (irel->r_addend);
10610 laddr = irel->r_offset;
10611 *insn_len = seq_len;
35c08157 10612
1c8f6a4d 10613 /* Get the high part relocation. */
6cae483a 10614 for (i = 0; i < ARRAY_SIZE (checked_types); i++)
1c8f6a4d
KLC
10615 {
10616 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10617 checked_types[i], laddr);
10618 if (hi_irelfn != irelend)
10619 break;
10620 }
35c08157 10621
1c8f6a4d
KLC
10622 if (hi_irelfn == irelend)
10623 {
695344c0 10624 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LOADSTORE",
d42c267e 10625 irel->r_offset);
1c8f6a4d
KLC
10626 return FALSE;
10627 }
35c08157 10628
1c8f6a4d
KLC
10629 range_type = GET_LOADSTORE_RANGE (irel->r_addend);
10630 nds32_elf_final_sda_base (sec->output_section->owner,
10631 link_info, &local_sda, FALSE);
35c08157 10632
1c8f6a4d
KLC
10633 switch (ELF32_R_TYPE (hi_irelfn->r_info))
10634 {
10635 case R_NDS32_HI20_RELA:
10636 insn = bfd_getb32 (contents + laddr);
10637 access_addr =
10638 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10639
10640 if (range_type == NDS32_LOADSTORE_IMM)
10641 {
10642 struct elf_link_hash_entry *h = NULL;
10643 int indx;
35c08157 10644
1c8f6a4d 10645 if (ELF32_R_SYM (hi_irelfn->r_info) >= symtab_hdr->sh_info)
35c08157 10646 {
1c8f6a4d
KLC
10647 indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info;
10648 h = elf_sym_hashes (abfd)[indx];
35c08157 10649 }
35c08157 10650
1c8f6a4d
KLC
10651 if ((access_addr < CONSERVATIVE_20BIT)
10652 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
35c08157 10653 {
1c8f6a4d
KLC
10654 eliminate_sethi = 1;
10655 break;
35c08157 10656 }
1c8f6a4d
KLC
10657
10658 /* This is avoid to relax symbol address which is fixed
10659 relocations. Ex: _stack. */
10660 if (h && bfd_is_abs_section (h->root.u.def.section))
10661 return FALSE;
10662 }
10663
10664 if (!load_store_relax)
10665 return FALSE;
10666
10667 /* Case for set gp register. */
10668 if (N32_RT5 (insn) == REG_GP)
10669 break;
10670
10671 if (range_type == NDS32_LOADSTORE_FLOAT_S
10672 || range_type == NDS32_LOADSTORE_FLOAT_S)
10673 {
10674 range_l = sdata_range[0][0];
10675 range_h = sdata_range[0][1];
10676 }
10677 else
10678 {
10679 range_l = sdata_range[1][0];
10680 range_h = sdata_range[1][1];
10681 }
10682 break;
10683
10684 case R_NDS32_GOT_HI20:
10685 access_addr =
10686 calculate_got_memory_address (abfd, link_info, hi_irelfn, symtab_hdr);
10687
10688 /* If this symbol is not in .got, the return value will be -1.
10689 Since the gp value is set to SDA_BASE but not GLOBAL_OFFSET_TABLE,
10690 a negative offset is allowed. */
10691 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10692 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10693 eliminate_sethi = 1;
10694 break;
10695
10696 case R_NDS32_PLT_GOTREL_HI20:
10697 access_addr = calculate_plt_memory_address (abfd, link_info, isymbuf,
10698 hi_irelfn, symtab_hdr);
10699
10700 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10701 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10702 eliminate_sethi = 1;
10703 break;
10704
10705 case R_NDS32_GOTOFF_HI20:
10706 access_addr =
10707 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10708
10709 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10710 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10711 eliminate_sethi = 1;
10712 break;
10713
10714 case R_NDS32_GOTPC_HI20:
10715 /* The access_addr must consider r_addend of hi_irel. */
10716 access_addr = sec->output_section->vma + sec->output_offset
10717 + irel->r_offset + hi_irelfn->r_addend;
10718
10719 if ((bfd_signed_vma) (local_sda - access_addr) < CONSERVATIVE_20BIT
10720 && (bfd_signed_vma) (local_sda - access_addr) >= -CONSERVATIVE_20BIT)
10721 eliminate_sethi = 1;
10722 break;
10723
10724 case R_NDS32_TLS_LE_HI20:
10725 access_addr =
10726 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10727 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10728 access_addr -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10729 if ((range_type == NDS32_LOADSTORE_IMM)
10730 && (bfd_signed_vma) (access_addr) < CONSERVATIVE_20BIT
10731 && (bfd_signed_vma) (access_addr) >= -CONSERVATIVE_20BIT)
10732 eliminate_sethi = 1;
10733 break;
10734
10735 default:
10736 return FALSE;
10737 }
10738
10739 /* Delete sethi instruction. */
10740 if (eliminate_sethi == 1
10741 || (local_sda <= access_addr && (access_addr - local_sda) < range_h)
10742 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
10743 {
10744 hi_irelfn->r_info =
10745 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
10746 irel->r_info =
10747 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10748 *insn_len = 0;
10749 }
10750 return TRUE;
10751}
10752
10753/* Relax LO12 relocation for nds32_elf_relax_section. */
10754
10755static void
10756nds32_elf_relax_lo12 (struct bfd_link_info *link_info, bfd *abfd,
10757 asection *sec, Elf_Internal_Rela *irel,
10758 Elf_Internal_Rela *internal_relocs, bfd_byte *contents,
10759 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr)
10760{
10761 uint32_t insn;
10762 bfd_vma local_sda, laddr;
10763 unsigned long reloc;
10764 bfd_vma access_addr;
10765 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10766 Elf_Internal_Rela *irelfn = NULL, *irelend;
10767 struct elf_link_hash_entry *h = NULL;
10768 int indx;
10769
10770 /* For SDA base relative relaxation. */
10771 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10772 &local_sda, FALSE);
10773
10774 irelend = internal_relocs + sec->reloc_count;
10775 laddr = irel->r_offset;
10776 insn = bfd_getb32 (contents + laddr);
10777
10778 if (!is_sda_access_insn (insn) && N32_OP6 (insn) != N32_OP6_ORI)
10779 return;
10780
10781 access_addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10782
10783 if (ELF32_R_SYM (irel->r_info) >= symtab_hdr->sh_info)
10784 {
10785 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
10786 h = elf_sym_hashes (abfd)[indx];
10787 }
10788
10789 if (N32_OP6 (insn) == N32_OP6_ORI && access_addr < CONSERVATIVE_20BIT
10790 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
10791 {
10792 reloc = R_NDS32_20_RELA;
10793 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10794 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10795 bfd_putb32 (insn, contents + laddr);
10796 }
10797 /* This is avoid to relax symbol address which is fixed
10798 relocations. Ex: _stack. */
10799 else if (N32_OP6 (insn) == N32_OP6_ORI
10800 && h && bfd_is_abs_section (h->root.u.def.section))
10801 return;
10802 else
10803 {
10804 range_l = sdata_range[1][0];
10805 range_h = sdata_range[1][1];
10806 switch (ELF32_R_TYPE (irel->r_info))
10807 {
10808 case R_NDS32_LO12S0_RELA:
10809 reloc = R_NDS32_SDA19S0_RELA;
10810 break;
10811 case R_NDS32_LO12S1_RELA:
10812 reloc = R_NDS32_SDA18S1_RELA;
10813 break;
10814 case R_NDS32_LO12S2_RELA:
10815 reloc = R_NDS32_SDA17S2_RELA;
10816 break;
10817 case R_NDS32_LO12S2_DP_RELA:
10818 range_l = sdata_range[0][0];
10819 range_h = sdata_range[0][1];
10820 reloc = R_NDS32_SDA12S2_DP_RELA;
10821 break;
10822 case R_NDS32_LO12S2_SP_RELA:
10823 range_l = sdata_range[0][0];
10824 range_h = sdata_range[0][1];
10825 reloc = R_NDS32_SDA12S2_SP_RELA;
10826 break;
10827 default:
10828 return;
10829 }
10830
10831 /* There are range_h and range_l because linker has to promise
10832 all sections move cross one page together. */
10833 if ((local_sda <= access_addr && (access_addr - local_sda) < range_h)
10834 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
10835 {
10836 if (N32_OP6 (insn) == N32_OP6_ORI && N32_RT5 (insn) == REG_GP)
35c08157 10837 {
1c8f6a4d
KLC
10838 /* Maybe we should add R_NDS32_INSN16 reloc type here
10839 or manually do some optimization. sethi can't be
10840 eliminated when updating $gp so the relative ori
10841 needs to be preserved. */
10842 return;
35c08157 10843 }
1c8f6a4d
KLC
10844 if (!turn_insn_to_sda_access (insn, ELF32_R_TYPE (irel->r_info),
10845 &insn))
10846 return;
10847 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10848 bfd_putb32 (insn, contents + laddr);
10849
10850 irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
10851 R_NDS32_INSN16);
10852 /* SDA17 must keep INSN16 for converting fp_as_gp. */
10853 if (irelfn != irelend && reloc != R_NDS32_SDA17S2_RELA)
10854 irelfn->r_info =
10855 ELF32_R_INFO (ELF32_R_SYM (irelfn->r_info), R_NDS32_NONE);
10856
35c08157 10857 }
1c8f6a4d
KLC
10858 }
10859 return;
10860}
35c08157 10861
1c8f6a4d
KLC
10862/* Relax low part of PIC instruction pattern. */
10863
10864static void
10865nds32_elf_relax_piclo12 (struct bfd_link_info *link_info, bfd *abfd,
10866 asection *sec, Elf_Internal_Rela *irel,
10867 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10868 Elf_Internal_Shdr *symtab_hdr)
10869{
10870 uint32_t insn;
10871 bfd_vma local_sda, laddr;
10872 bfd_signed_vma foff;
10873 unsigned long reloc;
10874
10875 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10876 &local_sda, FALSE);
10877 laddr = irel->r_offset;
10878 insn = bfd_getb32 (contents + laddr);
10879
10880 if (N32_OP6 (insn) != N32_OP6_ORI)
10881 return;
10882
10883 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12)
10884 {
10885 foff = calculate_got_memory_address (abfd, link_info, irel,
10886 symtab_hdr) - local_sda;
10887 reloc = R_NDS32_GOT20;
10888 }
10889 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12)
10890 {
10891 foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
10892 symtab_hdr) - local_sda;
10893 reloc = R_NDS32_PLT_GOTREL_LO20;
10894 }
10895 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12)
10896 {
10897 foff = calculate_memory_address (abfd, irel, isymbuf,
10898 symtab_hdr) - local_sda;
10899 reloc = R_NDS32_GOTOFF;
10900 }
10901 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12)
10902 {
10903 foff = local_sda - sec->output_section->vma + sec->output_offset
10904 + irel->r_offset + irel->r_addend;
10905 reloc = R_NDS32_GOTPC20;
10906 }
10907 else
10908 return;
10909
10910 if ((foff < CONSERVATIVE_20BIT) && (foff >= -CONSERVATIVE_20BIT))
10911 {
10912 /* Turn into MOVI. */
10913 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10914 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10915 bfd_putb32 (insn, contents + laddr);
10916 }
10917}
10918
10919/* Relax low part of LE TLS instruction pattern. */
10920
10921static void
10922nds32_elf_relax_letlslo12 (struct bfd_link_info *link_info, bfd *abfd,
10923 Elf_Internal_Rela *irel,
10924 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10925 Elf_Internal_Shdr *symtab_hdr)
10926{
10927 uint32_t insn;
10928 bfd_vma laddr;
10929 bfd_signed_vma foff;
10930 unsigned long reloc;
10931
10932 laddr = irel->r_offset;
10933 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10934 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10935 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10936 insn = bfd_getb32 (contents + laddr);
10937
10938 if ( (bfd_signed_vma) (foff) < CONSERVATIVE_20BIT
10939 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_20BIT)
10940 {
10941 /* Pattern sethi-ori transform to movi. */
10942 reloc = R_NDS32_TLS_LE_20;
10943 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10944 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10945 bfd_putb32 (insn, contents + laddr);
10946 }
10947}
10948
10949/* Relax LE TLS calculate address instruction pattern. */
10950
10951static void
10952nds32_elf_relax_letlsadd (struct bfd_link_info *link_info, bfd *abfd,
10953 asection *sec, Elf_Internal_Rela *irel,
10954 Elf_Internal_Rela *internal_relocs,
10955 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10956 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
10957{
10958 /* Local TLS non-pic
10959 sethi ta, hi20(symbol@tpoff) ; TLS_LE_HI20
10960 ori ta, ta, lo12(symbol@tpoff) ; TLS_LE_LO12
10961 add ra, ta, tp ; TLS_LE_ADD */
10962
10963 uint32_t insn;
10964 bfd_vma laddr;
10965 bfd_signed_vma foff;
10966 Elf_Internal_Rela *i1_irelfn, *irelend;
10967
10968 irelend = internal_relocs + sec->reloc_count;
10969 laddr = irel->r_offset;
10970 insn = bfd_getb32 (contents + laddr);
10971 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
10972 R_NDS32_PTR_RESOLVED);
10973 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10974 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10975 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10976
10977 /* The range is +/-16k. */
10978 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
10979 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
10980 {
10981 /* Transform add to addi. */
10982 insn = N32_TYPE2 (ADDI, N32_RT5 (insn), N32_RB5 (insn), 0);
10983 irel->r_info =
10984 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
10985
10986 bfd_putb32 (insn, contents + laddr);
10987 if (i1_irelfn != irelend)
10988 {
10989 i1_irelfn->r_addend |= 1;
10990 *again = TRUE;
10991 }
10992 }
10993}
10994
10995/* Relax LE TLS load store instruction pattern. */
10996
10997static void
10998nds32_elf_relax_letlsls (struct bfd_link_info *link_info, bfd *abfd,
10999 asection *sec, Elf_Internal_Rela *irel,
11000 Elf_Internal_Rela *internal_relocs,
11001 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11002 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11003{
11004
11005 uint32_t insn;
11006 bfd_vma laddr;
11007 bfd_signed_vma foff;
11008 Elf_Internal_Rela *i1_irelfn, *irelend;
11009 int success = 0;
11010
11011 irelend = internal_relocs + sec->reloc_count;
11012 laddr = irel->r_offset;
11013 insn = bfd_getb32 (contents + laddr);
11014 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11015 R_NDS32_PTR_RESOLVED);
11016 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11017 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11018 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11019
11020 switch ((N32_OP6 (insn) << 8) | (insn & 0xff))
11021 {
11022 case (N32_OP6_MEM << 8) | N32_MEM_LB:
11023 case (N32_OP6_MEM << 8) | N32_MEM_SB:
11024 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
11025 /* The range is +/-16k. */
11026 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
11027 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
11028 {
11029 insn =
11030 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11031 irel->r_info =
11032 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
11033 success = 1;
11034 break;
11035 }
1a0670f3 11036 /* Fall through. */
1c8f6a4d
KLC
11037 case (N32_OP6_MEM << 8) | N32_MEM_LH:
11038 case (N32_OP6_MEM << 8) | N32_MEM_SH:
11039 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
11040 /* The range is +/-32k. */
11041 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S1
11042 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S1)
35c08157 11043 {
1c8f6a4d
KLC
11044 insn =
11045 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11046 irel->r_info =
11047 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S1);
11048 success = 1;
11049 break;
11050 }
1a0670f3 11051 /* Fall through. */
1c8f6a4d
KLC
11052 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11053 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11054 /* The range is +/-64k. */
11055 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S2
11056 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S2)
11057 {
11058 insn =
11059 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11060 irel->r_info =
11061 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S2);
11062 success = 1;
11063 break;
11064 }
1a0670f3 11065 /* Fall through. */
1c8f6a4d
KLC
11066 default:
11067 break;
11068 }
35c08157 11069
1c8f6a4d
KLC
11070 if (success)
11071 {
11072 bfd_putb32 (insn, contents + laddr);
11073 if (i1_irelfn != irelend)
11074 {
11075 i1_irelfn->r_addend |= 1;
11076 *again = TRUE;
11077 }
11078 }
11079}
35c08157 11080
1c8f6a4d 11081/* Relax PTR relocation for nds32_elf_relax_section. */
35c08157 11082
1c8f6a4d
KLC
11083static bfd_boolean
11084nds32_elf_relax_ptr (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
11085 Elf_Internal_Rela *internal_relocs, int *insn_len,
11086 int *seq_len, bfd_byte *contents)
11087{
11088 Elf_Internal_Rela *ptr_irel, *irelend, *count_irel, *re_irel;
35c08157 11089
1c8f6a4d 11090 irelend = internal_relocs + sec->reloc_count;
35c08157 11091
1c8f6a4d
KLC
11092 re_irel =
11093 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11094 R_NDS32_PTR_RESOLVED, irel->r_addend);
35c08157 11095
1c8f6a4d
KLC
11096 if (re_irel == irelend)
11097 {
695344c0 11098 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_PTR",
d42c267e 11099 irel->r_offset);
1c8f6a4d
KLC
11100 return FALSE;
11101 }
35c08157 11102
1c8f6a4d
KLC
11103 if (re_irel->r_addend != 1)
11104 return FALSE;
35c08157 11105
1c8f6a4d
KLC
11106 /* Pointed target is relaxed and no longer needs this void *,
11107 change the type to NONE. */
11108 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 11109
1c8f6a4d
KLC
11110 /* Find PTR_COUNT to decide remove it or not. If PTR_COUNT does
11111 not exist, it means only count 1 and remove it directly. */
11112 /* TODO: I hope we can obsolate R_NDS32_COUNT in the future. */
11113 count_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11114 R_NDS32_PTR_COUNT);
11115 ptr_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11116 R_NDS32_PTR);
11117 if (count_irel != irelend)
11118 {
11119 if (--count_irel->r_addend > 0)
11120 return FALSE;
11121 }
11122
11123 if (ptr_irel != irelend)
11124 return FALSE;
11125
11126 /* If the PTR_COUNT is already 0, remove current instruction. */
11127 *seq_len = nds32_elf_insn_size (abfd, contents, irel->r_offset);
11128 *insn_len = 0;
11129 return TRUE;
11130}
11131
11132/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11133
11134static void
11135nds32_elf_relax_pltgot_suff (struct bfd_link_info *link_info, bfd *abfd,
11136 asection *sec, Elf_Internal_Rela *irel,
11137 Elf_Internal_Rela *internal_relocs,
11138 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11139 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11140{
11141 uint32_t insn;
11142 bfd_signed_vma foff;
11143 Elf_Internal_Rela *i1_irelfn, *irelend;
11144 bfd_vma local_sda, laddr;
11145
11146 irelend = internal_relocs + sec->reloc_count;
11147 laddr = irel->r_offset;
11148 insn = bfd_getb32 (contents + laddr);
11149
11150 /* FIXME: It's a little trouble to turn JRAL5 to JAL since
11151 we need additional space. It might be help if we could
11152 borrow some space from instructions to be eliminated
11153 such as sethi, ori, add. */
11154 if (insn & 0x80000000)
11155 return;
11156
11157 if (nds32_elf_check_dup_relocs
11158 (irel, internal_relocs, irelend, R_NDS32_PLT_GOT_SUFF))
11159 return;
11160
11161 i1_irelfn =
11162 find_relocs_at_address (irel, internal_relocs, irelend,
11163 R_NDS32_PTR_RESOLVED);
11164
11165 /* FIXIT 090606
11166 The boundary should be reduced since the .plt section hasn't
11167 been created and the address of specific entry is still unknown
11168 Maybe the range between the function call and the begin of the
11169 .text section can be used to decide if the .plt is in the range
11170 of function call. */
11171
11172 if (N32_OP6 (insn) == N32_OP6_ALU1
11173 && N32_SUB5 (insn) == N32_ALU1_ADD)
11174 {
11175 /* Get the value of the symbol referred to by the reloc. */
11176 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11177 &local_sda, FALSE);
11178 foff = (bfd_signed_vma) (calculate_plt_memory_address
11179 (abfd, link_info, isymbuf, irel,
11180 symtab_hdr) - local_sda);
11181 /* This condition only happened when symbol is undefined. */
11182 if (foff == 0)
11183 return;
11184
11185 if (foff < -CONSERVATIVE_19BIT || foff >= CONSERVATIVE_19BIT)
11186 return;
11187 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11188 R_NDS32_PLT_GOTREL_LO19);
11189 /* addi.gp */
4ec521f2 11190 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), N32_BIT (19));
1c8f6a4d
KLC
11191 }
11192 else if (N32_OP6 (insn) == N32_OP6_JREG
11193 && N32_SUB5 (insn) == N32_JREG_JRAL)
11194 {
11195 /* Get the value of the symbol referred to by the reloc. */
11196 foff =
11197 calculate_plt_offset (abfd, sec, link_info, isymbuf, irel, symtab_hdr);
11198 /* This condition only happened when symbol is undefined. */
11199 if (foff == 0)
11200 return;
11201 if (foff < -CONSERVATIVE_24BIT_S1 || foff >= CONSERVATIVE_24BIT_S1)
11202 return;
11203 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_25_PLTREL);
11204 insn = INSN_JAL;
11205 }
11206 else
11207 return;
11208
11209 bfd_putb32 (insn, contents + laddr);
11210 if (i1_irelfn != irelend)
11211 {
11212 i1_irelfn->r_addend |= 1;
11213 *again = TRUE;
11214 }
11215}
11216
11217/* Relax GOT_SUFF relocation for nds32_elf_relax_section. */
11218
11219static void
11220nds32_elf_relax_got_suff (struct bfd_link_info *link_info, bfd *abfd,
11221 asection *sec, Elf_Internal_Rela *irel,
11222 Elf_Internal_Rela *internal_relocs,
11223 bfd_byte *contents, Elf_Internal_Shdr *symtab_hdr,
11224 bfd_boolean *again)
11225{
11226 uint32_t insn;
11227 bfd_signed_vma foff;
11228 Elf_Internal_Rela *i1_irelfn, *irelend;
11229 bfd_vma local_sda, laddr;
11230
11231 irelend = internal_relocs + sec->reloc_count;
11232 laddr = irel->r_offset;
11233 insn = bfd_getb32 (contents + laddr);
11234 if (insn & 0x80000000)
11235 return;
11236
11237 if (nds32_elf_check_dup_relocs
11238 (irel, internal_relocs, irelend, R_NDS32_GOT_SUFF))
11239 return;
11240
11241 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11242 R_NDS32_PTR_RESOLVED);
11243
11244 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11245 &local_sda, FALSE);
11246 foff = calculate_got_memory_address (abfd, link_info, irel,
11247 symtab_hdr) - local_sda;
11248
11249 if (foff < CONSERVATIVE_19BIT && foff >= -CONSERVATIVE_19BIT)
11250 {
11251 /* Turn LW to LWI.GP. Change relocation type to R_NDS32_GOT_REL. */
11252 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11253 irel->r_info =
11254 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_GOT17S2_RELA);
11255 bfd_putb32 (insn, contents + laddr);
11256 if (i1_irelfn != irelend)
11257 {
11258 i1_irelfn->r_addend |= 1;
11259 *again = TRUE;
11260 }
11261 }
11262}
11263
11264/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11265
11266static void
11267nds32_elf_relax_gotoff_suff (struct bfd_link_info *link_info, bfd *abfd,
11268 asection *sec, Elf_Internal_Rela *irel,
11269 Elf_Internal_Rela *internal_relocs,
11270 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11271 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11272{
11273 int opc_insn_gotoff;
11274 uint32_t insn;
11275 bfd_signed_vma foff;
11276 Elf_Internal_Rela *i1_irelfn, *i2_irelfn, *irelend;
11277 bfd_vma local_sda, laddr;
11278
11279 irelend = internal_relocs + sec->reloc_count;
11280 laddr = irel->r_offset;
11281 insn = bfd_getb32 (contents + laddr);
11282
11283 if (insn & 0x80000000)
11284 return;
11285
11286 if (nds32_elf_check_dup_relocs
11287 (irel, internal_relocs, irelend, R_NDS32_GOTOFF_SUFF))
11288 return;
11289
11290 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11291 R_NDS32_PTR_RESOLVED);
11292 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11293 &local_sda, FALSE);
11294 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11295 foff = foff - local_sda;
11296
11297 if (foff >= CONSERVATIVE_19BIT || foff < -CONSERVATIVE_19BIT)
11298 return;
11299
11300 /* Concatenate opcode and sub-opcode for switch case.
11301 It may be MEM or ALU1. */
11302 opc_insn_gotoff = (N32_OP6 (insn) << 8) | (insn & 0xff);
11303 switch (opc_insn_gotoff)
11304 {
11305 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11306 /* 4-byte aligned. */
11307 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11308 irel->r_info =
11309 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11310 break;
11311 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11312 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
11313 irel->r_info =
11314 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11315 break;
11316 case (N32_OP6_MEM << 8) | N32_MEM_LH:
11317 /* 2-byte aligned. */
11318 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
11319 irel->r_info =
11320 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11321 break;
11322 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
4ec521f2 11323 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (18));
1c8f6a4d
KLC
11324 irel->r_info =
11325 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11326 break;
11327 case (N32_OP6_MEM << 8) | N32_MEM_SH:
4ec521f2 11328 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (19));
1c8f6a4d
KLC
11329 irel->r_info =
11330 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11331 break;
11332 case (N32_OP6_MEM << 8) | N32_MEM_LB:
11333 /* 1-byte aligned. */
11334 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
11335 irel->r_info =
11336 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11337 break;
11338 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
4ec521f2 11339 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), N32_BIT (19));
1c8f6a4d
KLC
11340 irel->r_info =
11341 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11342 break;
11343 case (N32_OP6_MEM << 8) | N32_MEM_SB:
11344 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
11345 irel->r_info =
11346 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11347 break;
11348 case (N32_OP6_ALU1 << 8) | N32_ALU1_ADD:
4ec521f2 11349 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), N32_BIT (19));
1c8f6a4d
KLC
11350 irel->r_info =
11351 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11352 break;
11353 default:
11354 return;
11355 }
11356
11357 bfd_putb32 (insn, contents + laddr);
11358 if (i1_irelfn != irelend)
11359 {
11360 i1_irelfn->r_addend |= 1;
11361 *again = TRUE;
11362 }
11363 if ((i2_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11364 R_NDS32_INSN16)) != irelend)
11365 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11366
11367}
11368
11369static bfd_boolean
11370nds32_relax_adjust_label (bfd *abfd, asection *sec,
11371 Elf_Internal_Rela *internal_relocs,
11372 bfd_byte *contents,
11373 nds32_elf_blank_t **relax_blank_list,
11374 int optimize, int opt_size)
11375{
11376 /* This code block is used to adjust 4-byte alignment by relax a pair
11377 of instruction a time.
11378
11379 It recognizes three types of relocations.
de194d85 11380 1. R_NDS32_LABEL - a alignment.
1c8f6a4d
KLC
11381 2. R_NDS32_INSN16 - relax a 32-bit instruction to 16-bit.
11382 3. is_16bit_NOP () - remove a 16-bit instruction. */
11383
de194d85
YC
11384 /* TODO: It seems currently implementation only support 4-byte alignment.
11385 We should handle any-alignment. */
1c8f6a4d
KLC
11386
11387 Elf_Internal_Rela *insn_rel = NULL, *label_rel = NULL, *irel;
11388 Elf_Internal_Rela *tmp_rel, *tmp2_rel = NULL;
11389 Elf_Internal_Rela rel_temp;
11390 Elf_Internal_Rela *irelend;
11391 bfd_vma address;
11392 uint16_t insn16;
11393
11394 /* Checking for branch relaxation relies on the relocations to
11395 be sorted on 'r_offset'. This is not guaranteed so we must sort. */
11396 nds32_insertion_sort (internal_relocs, sec->reloc_count,
11397 sizeof (Elf_Internal_Rela), compar_reloc);
11398
11399 irelend = internal_relocs + sec->reloc_count;
11400
11401 /* Force R_NDS32_LABEL before R_NDS32_INSN16. */
11402 /* FIXME: Can we generate the right order in assembler?
11403 So we don't have to swapping them here. */
11404
11405 for (label_rel = internal_relocs, insn_rel = internal_relocs;
11406 label_rel < irelend; label_rel++)
11407 {
11408 if (ELF32_R_TYPE (label_rel->r_info) != R_NDS32_LABEL)
11409 continue;
11410
11411 /* Find the first reloc has the same offset with label_rel. */
11412 while (insn_rel < irelend && insn_rel->r_offset < label_rel->r_offset)
11413 insn_rel++;
11414
11415 for (;insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset;
11416 insn_rel++)
11417 /* Check if there were R_NDS32_INSN16 and R_NDS32_LABEL at the same
11418 address. */
11419 if (ELF32_R_TYPE (insn_rel->r_info) == R_NDS32_INSN16)
11420 break;
11421
11422 if (insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset
11423 && insn_rel < label_rel)
11424 {
11425 /* Swap the two reloc if the R_NDS32_INSN16 is
11426 before R_NDS32_LABEL. */
11427 memcpy (&rel_temp, insn_rel, sizeof (Elf_Internal_Rela));
11428 memcpy (insn_rel, label_rel, sizeof (Elf_Internal_Rela));
11429 memcpy (label_rel, &rel_temp, sizeof (Elf_Internal_Rela));
11430 }
11431 }
11432
11433 label_rel = NULL;
11434 insn_rel = NULL;
11435 /* If there were a sequence of R_NDS32_LABEL end up with .align 2
11436 or higher, remove other R_NDS32_LABEL with lower alignment.
11437 If an R_NDS32_INSN16 in between R_NDS32_LABELs must be converted,
11438 then the R_NDS32_LABEL sequence is broke. */
11439 for (tmp_rel = internal_relocs; tmp_rel < irelend; tmp_rel++)
11440 {
11441 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_LABEL)
11442 {
11443 if (label_rel == NULL)
11444 {
11445 if (tmp_rel->r_addend < 2)
11446 label_rel = tmp_rel;
11447 continue;
11448 }
11449 else if (tmp_rel->r_addend > 1)
11450 {
11451 /* Remove all LABEL relocation from label_rel to tmp_rel
11452 including relocations with same offset as tmp_rel. */
11453 for (tmp2_rel = label_rel; tmp2_rel < tmp_rel
11454 || tmp2_rel->r_offset == tmp_rel->r_offset; tmp2_rel++)
11455 {
11456 if (ELF32_R_TYPE (tmp2_rel->r_info) == R_NDS32_LABEL
11457 && tmp2_rel->r_addend < 2)
11458 tmp2_rel->r_info =
11459 ELF32_R_INFO (ELF32_R_SYM (tmp2_rel->r_info),
11460 R_NDS32_NONE);
11461 }
11462 label_rel = NULL;
11463 }
11464 }
11465 else if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16 && label_rel)
11466 {
11467 /* A new INSN16 which can be converted, so clear label_rel. */
11468 if (is_convert_32_to_16 (abfd, sec, tmp_rel, internal_relocs,
11469 irelend, &insn16)
11470 || is_16bit_NOP (abfd, sec, tmp_rel))
11471 label_rel = NULL;
11472 }
11473 }
11474
11475 label_rel = NULL;
11476 insn_rel = NULL;
11477 /* Optimized for speed and nothing has not been relaxed.
11478 It's time to align labels.
11479 We may convert a 16-bit instruction right before a label to
11480 32-bit, in order to align the label if necessary
11481 all reloc entries has been sorted by r_offset. */
11482 for (irel = internal_relocs; irel < irelend; irel++)
11483 {
11484 if (ELF32_R_TYPE (irel->r_info) != R_NDS32_INSN16
11485 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL)
11486 continue;
11487
11488 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_INSN16)
11489 {
11490 /* A new INSN16 found, resize the old one. */
11491 if (is_convert_32_to_16
11492 (abfd, sec, irel, internal_relocs, irelend, &insn16)
11493 || is_16bit_NOP (abfd, sec, irel))
11494 {
11495 if (insn_rel)
11496 {
11497 /* Previous INSN16 reloc exists, reduce its
11498 size to 16-bit. */
11499 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11500 irelend, &insn16))
35c08157 11501 {
1c8f6a4d
KLC
11502 nds32_elf_write_16 (abfd, contents, insn_rel,
11503 internal_relocs, irelend, insn16);
11504
11505 if (!insert_nds32_elf_blank_recalc_total
11506 (relax_blank_list, insn_rel->r_offset + 2, 2))
11507 return FALSE;
11508 }
11509 else if (is_16bit_NOP (abfd, sec, insn_rel))
11510 {
11511 if (!insert_nds32_elf_blank_recalc_total
11512 (relax_blank_list, insn_rel->r_offset, 2))
11513 return FALSE;
11514 }
11515 insn_rel->r_info =
11516 ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info), R_NDS32_NONE);
11517 }
11518 /* Save the new one for later use. */
11519 insn_rel = irel;
11520 }
11521 else
11522 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11523 R_NDS32_NONE);
11524 }
11525 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL)
11526 {
11527 /* Search for label. */
11528 int force_relax = 0;
11529
11530 /* Label on 16-bit instruction or optimization
11531 needless, just reset this reloc. */
11532 insn16 = bfd_getb16 (contents + irel->r_offset);
11533 if ((irel->r_addend & 0x1f) < 2 && (!optimize || (insn16 & 0x8000)))
11534 {
11535 irel->r_info =
11536 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11537 continue;
11538 }
11539
11540 address =
11541 irel->r_offset - get_nds32_elf_blank_total (relax_blank_list,
11542 irel->r_offset, 1);
11543
11544 if (!insn_rel)
11545 {
11546 /* Check if there is case which can not be aligned. */
11547 if (irel->r_addend == 2 && address & 0x2)
11548 return FALSE;
11549 continue;
11550 }
11551
11552 /* Try to align this label. */
11553
11554 if ((irel->r_addend & 0x1f) < 2)
11555 {
11556 /* Check if there is a INSN16 at the same address.
11557 Label_rel always seats before insn_rel after
11558 our sort. */
11559
11560 /* Search for INSN16 at LABEL location. If INSN16 is at
11561 same location and this LABEL alignment is lower than 2,
11562 the INSN16 can be converted to 2-byte. */
11563 for (tmp_rel = irel;
11564 tmp_rel < irelend && tmp_rel->r_offset == irel->r_offset;
11565 tmp_rel++)
11566 {
11567 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16
11568 && (is_convert_32_to_16
11569 (abfd, sec, tmp_rel, internal_relocs,
11570 irelend, &insn16)
11571 || is_16bit_NOP (abfd, sec, tmp_rel)))
11572 {
11573 force_relax = 1;
11574 break;
11575 }
11576 }
11577 }
11578
11579 if (force_relax || irel->r_addend == 1 || address & 0x2)
11580 {
11581 /* Label not aligned. */
11582 /* Previous reloc exists, reduce its size to 16-bit. */
11583 if (is_convert_32_to_16 (abfd, sec, insn_rel,
11584 internal_relocs, irelend, &insn16))
11585 {
11586 nds32_elf_write_16 (abfd, contents, insn_rel,
11587 internal_relocs, irelend, insn16);
11588
11589 if (!insert_nds32_elf_blank_recalc_total
11590 (relax_blank_list, insn_rel->r_offset + 2, 2))
11591 return FALSE;
11592 }
11593 else if (is_16bit_NOP (abfd, sec, insn_rel))
11594 {
11595 if (!insert_nds32_elf_blank_recalc_total
11596 (relax_blank_list, insn_rel->r_offset, 2))
11597 return FALSE;
11598 }
11599
11600 }
11601 /* INSN16 reloc is used. */
11602 insn_rel = NULL;
11603 }
11604 }
11605
11606 address =
11607 sec->size - get_nds32_elf_blank_total (relax_blank_list, sec->size, 0);
11608 if (insn_rel && (address & 0x2 || opt_size))
11609 {
11610 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11611 irelend, &insn16))
11612 {
11613 nds32_elf_write_16 (abfd, contents, insn_rel, internal_relocs,
11614 irelend, insn16);
11615 if (!insert_nds32_elf_blank_recalc_total
11616 (relax_blank_list, insn_rel->r_offset + 2, 2))
11617 return FALSE;
11618 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11619 R_NDS32_NONE);
11620 }
11621 else if (is_16bit_NOP (abfd, sec, insn_rel))
11622 {
11623 if (!insert_nds32_elf_blank_recalc_total
11624 (relax_blank_list, insn_rel->r_offset, 2))
11625 return FALSE;
11626 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11627 R_NDS32_NONE);
11628 }
11629 }
11630 insn_rel = NULL;
11631 return TRUE;
11632}
11633
11634/* Pick relaxation round. */
11635
11636static int
11637nds32_elf_pick_relax (bfd_boolean init, asection *sec, bfd_boolean *again,
11638 struct elf_nds32_link_hash_table *table,
11639 struct bfd_link_info *link_info)
11640{
18393a2e
KLC
11641 static asection *final_sec, *first_sec = NULL;
11642 static bfd_boolean normal_again = FALSE;
1c8f6a4d
KLC
11643 static bfd_boolean set = FALSE;
11644 static bfd_boolean first = TRUE;
11645 int round_table[] = {
11646 NDS32_RELAX_NORMAL_ROUND,
11647 NDS32_RELAX_JUMP_IFC_ROUND,
11648 NDS32_RELAX_EX9_BUILD_ROUND,
11649 NDS32_RELAX_EX9_REPLACE_ROUND,
11650 };
11651 static int pass = 0;
11652 static int relax_round;
11653
18393a2e
KLC
11654 /* The new round. */
11655 if (init && first_sec == sec)
11656 {
11657 set = TRUE;
11658 normal_again = FALSE;
11659 }
11660
1c8f6a4d
KLC
11661 if (first)
11662 {
11663 /* Run an empty run to get the final section. */
11664 relax_round = NDS32_RELAX_EMPTY_ROUND;
11665
11666 /* It has to enter relax again because we can
11667 not make sure what the final turn is. */
11668 *again = TRUE;
18393a2e 11669
1c8f6a4d 11670 first = FALSE;
18393a2e 11671 first_sec = sec;
1c8f6a4d
KLC
11672 }
11673
18393a2e 11674 if (!set)
1c8f6a4d 11675 {
18393a2e 11676 /* Not reenter yet. */
1c8f6a4d
KLC
11677 final_sec = sec;
11678 return relax_round;
11679 }
11680
1c8f6a4d
KLC
11681 relax_round = round_table[pass];
11682
18393a2e
KLC
11683 if (!init && relax_round == NDS32_RELAX_NORMAL_ROUND && *again)
11684 normal_again = TRUE;
11685
1c8f6a4d
KLC
11686 if (!init && final_sec == sec)
11687 {
11688 switch (relax_round)
11689 {
11690 case NDS32_RELAX_NORMAL_ROUND:
18393a2e 11691 if (!normal_again)
1c8f6a4d
KLC
11692 {
11693 /* Normal relaxation done. */
11694 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11695 {
11696 pass++;
11697 *again = TRUE;
11698 }
11699 else if (table->target_optimize & NDS32_RELAX_EX9_ON)
11700 {
11701 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11702 *again = TRUE;
11703 }
11704 else if (table->ex9_import_file)
11705 {
11706 /* Import ex9 table. */
11707 if (table->update_ex9_table)
11708 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11709 else
11710 pass += 3; /* NDS32_RELAX_EX9_REPLACE_ROUND */
11711 nds32_elf_ex9_import_table (link_info);
11712 *again = TRUE;
11713 }
11714 }
11715 break;
11716 case NDS32_RELAX_JUMP_IFC_ROUND:
11717 if (!nds32_elf_ifc_finish (link_info))
4eca0228 11718 _bfd_error_handler (_("error: Jump IFC Fail."));
1c8f6a4d
KLC
11719 if (table->target_optimize & NDS32_RELAX_EX9_ON)
11720 {
11721 pass++;
11722 *again = TRUE;
11723 }
11724 break;
11725 case NDS32_RELAX_EX9_BUILD_ROUND:
11726 nds32_elf_ex9_finish (link_info);
11727 pass++;
11728 *again = TRUE;
11729 break;
11730 case NDS32_RELAX_EX9_REPLACE_ROUND:
11731 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11732 {
11733 /* Do jump IFC optimization again. */
11734 if (!nds32_elf_ifc_finish (link_info))
4eca0228 11735 _bfd_error_handler (_("error: Jump IFC Fail."));
1c8f6a4d
KLC
11736 }
11737 break;
11738 default:
11739 break;
11740 }
11741 }
11742
11743 return relax_round;
11744}
11745
11746static bfd_boolean
11747nds32_elf_relax_section (bfd *abfd, asection *sec,
11748 struct bfd_link_info *link_info, bfd_boolean *again)
11749{
11750 nds32_elf_blank_t *relax_blank_list = NULL;
11751 Elf_Internal_Shdr *symtab_hdr;
11752 Elf_Internal_Rela *internal_relocs;
11753 Elf_Internal_Rela *irel;
11754 Elf_Internal_Rela *irelend;
11755 Elf_Internal_Sym *isymbuf = NULL;
11756 bfd_byte *contents = NULL;
11757 bfd_boolean result = TRUE;
11758 int optimize = 0;
11759 int opt_size = 0;
11760 uint32_t insn;
11761 uint16_t insn16;
11762
11763 /* Target dependnet option. */
11764 struct elf_nds32_link_hash_table *table;
11765 int load_store_relax;
11766 int relax_round;
11767
11768 relax_blank_list = NULL;
11769
11770 *again = FALSE;
11771
11772 /* Nothing to do for
11773 * relocatable link or
11774 * non-relocatable section or
11775 * non-code section or
11776 * empty content or
11777 * no reloc entry. */
0e1862bb 11778 if (bfd_link_relocatable (link_info)
1c8f6a4d 11779 || (sec->flags & SEC_RELOC) == 0
cd28e7aa 11780 || (sec->flags & SEC_EXCLUDE) != 0
1c8f6a4d
KLC
11781 || (sec->flags & SEC_CODE) == 0
11782 || sec->size == 0)
11783 return TRUE;
11784
11785 /* 09.12.11 Workaround. */
11786 /* We have to adjust align for R_NDS32_LABEL if needed.
11787 The adjust approach only can fix 2-byte align once. */
11788 if (sec->alignment_power > 2)
11789 return TRUE;
11790
11791 /* The optimization type to do. */
11792
11793 table = nds32_elf_hash_table (link_info);
11794 relax_round = nds32_elf_pick_relax (TRUE, sec, again, table, link_info);
11795 switch (relax_round)
11796 {
11797 case NDS32_RELAX_JUMP_IFC_ROUND:
11798 /* Here is the entrance of ifc jump relaxation. */
11799 if (!nds32_elf_ifc_calc (link_info, abfd, sec))
11800 return FALSE;
11801 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11802 return TRUE;
11803
11804 case NDS32_RELAX_EX9_BUILD_ROUND:
11805 /* Here is the entrance of ex9 relaxation. There are two pass of
11806 ex9 relaxation. The one is to traverse all instructions and build
11807 the hash table. The other one is to compare instructions and replace
11808 it by ex9.it. */
11809 if (!nds32_elf_ex9_build_hash_table (abfd, sec, link_info))
11810 return FALSE;
11811 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11812 return TRUE;
11813
11814 case NDS32_RELAX_EX9_REPLACE_ROUND:
11815 if (!nds32_elf_ex9_replace_instruction (link_info, abfd, sec))
11816 return FALSE;
11817 return TRUE;
11818
11819 case NDS32_RELAX_EMPTY_ROUND:
11820 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11821 return TRUE;
11822
11823 case NDS32_RELAX_NORMAL_ROUND:
11824 default:
11825 if (sec->reloc_count == 0)
11826 return TRUE;
11827 break;
11828 }
11829
11830 /* The begining of general relaxation. */
11831
11832 if (is_SDA_BASE_set == 0)
11833 {
11834 bfd_vma gp;
11835 is_SDA_BASE_set = 1;
11836 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11837 &gp, FALSE);
11838 relax_range_measurement (abfd);
11839 }
11840
11841 if (is_ITB_BASE_set == 0)
11842 {
11843 /* Set the _ITB_BASE_. */
11844 if (!nds32_elf_ex9_itb_base (link_info))
11845 {
4eca0228 11846 _bfd_error_handler (_("%B: error: Cannot set _ITB_BASE_"), abfd);
1c8f6a4d
KLC
11847 bfd_set_error (bfd_error_bad_value);
11848 }
11849 }
11850
11851 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
11852 /* Relocations MUST be kept in memory, because relaxation adjust them. */
11853 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
11854 TRUE /* keep_memory */);
11855 if (internal_relocs == NULL)
11856 goto error_return;
11857
11858 irelend = internal_relocs + sec->reloc_count;
11859 irel = find_relocs_at_address (internal_relocs, internal_relocs,
11860 irelend, R_NDS32_RELAX_ENTRY);
11861
11862 if (irel == irelend)
11863 return TRUE;
11864
11865 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
11866 {
11867 if (irel->r_addend & R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG)
18393a2e
KLC
11868 {
11869 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11870 return TRUE;
11871 }
1c8f6a4d
KLC
11872
11873 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FLAG)
11874 optimize = 1;
11875
11876 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FOR_SPACE_FLAG)
11877 opt_size = 1;
11878 }
11879
11880 load_store_relax = table->load_store_relax;
11881
11882 /* Get symbol table and section content. */
0c4bd9d9 11883 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
1c8f6a4d
KLC
11884 || !nds32_get_local_syms (abfd, sec, &isymbuf))
11885 goto error_return;
11886
11887 /* Do relax loop only when finalize is not done.
11888 Take care of relaxable relocs except INSN16. */
11889 for (irel = internal_relocs; irel < irelend; irel++)
11890 {
11891 int seq_len; /* Original length of instruction sequence. */
11892 int insn_len = 0; /* Final length of instruction sequence. */
11893 bfd_boolean removed;
11894
11895 insn = 0;
11896 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
11897 && (irel->r_addend & 0x1f) >= 2)
11898 optimize = 1;
11899
11900 /* Relocation Types
11901 R_NDS32_LONGCALL1 53
11902 R_NDS32_LONGCALL2 54
11903 R_NDS32_LONGCALL3 55
11904 R_NDS32_LONGJUMP1 56
11905 R_NDS32_LONGJUMP2 57
11906 R_NDS32_LONGJUMP3 58
11907 R_NDS32_LOADSTORE 59 */
11908 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL1
11909 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LOADSTORE)
11910 seq_len = GET_SEQ_LEN (irel->r_addend);
11911
11912 /* Relocation Types
11913 R_NDS32_LONGCALL4 107
11914 R_NDS32_LONGCALL5 108
11915 R_NDS32_LONGCALL6 109
11916 R_NDS32_LONGJUMP4 110
11917 R_NDS32_LONGJUMP5 111
11918 R_NDS32_LONGJUMP6 112
11919 R_NDS32_LONGJUMP7 113 */
11920 else if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL4
11921 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LONGJUMP7)
11922 seq_len = 4;
11923
11924 /* Relocation Types
11925 R_NDS32_LO12S0_RELA 30
11926 R_NDS32_LO12S1_RELA 29
11927 R_NDS32_LO12S2_RELA 28
11928 R_NDS32_LO12S2_SP_RELA 71
11929 R_NDS32_LO12S2_DP_RELA 70
11930 R_NDS32_GOT_LO12 46
11931 R_NDS32_GOTOFF_LO12 50
11932 R_NDS32_PLTREL_LO12 65
11933 R_NDS32_PLT_GOTREL_LO12 67
11934 R_NDS32_17IFC_PCREL_RELA 96
11935 R_NDS32_GOT_SUFF 193
11936 R_NDS32_GOTOFF_SUFF 194
11937 R_NDS32_PLT_GOT_SUFF 195
11938 R_NDS32_MULCALL_SUFF 196
11939 R_NDS32_PTR 197 */
11940 else if ((ELF32_R_TYPE (irel->r_info) <= R_NDS32_LO12S0_RELA
11941 && ELF32_R_TYPE (irel->r_info) >= R_NDS32_LO12S2_RELA)
11942 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_SP_RELA
11943 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_DP_RELA
11944 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12
11945 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12
11946 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12
11947 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLTREL_LO12
11948 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12
11949 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_GOT_SUFF
11950 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_PTR)
11951 || ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
11952 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LO12
11953 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_ADD
11954 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LS)
11955 seq_len = 0;
11956 else
11957 continue;
11958
11959 insn_len = seq_len;
11960 removed = FALSE;
11961
11962 switch (ELF32_R_TYPE (irel->r_info))
11963 {
11964 case R_NDS32_LONGCALL1:
11965 removed = nds32_elf_relax_longcall1 (abfd, sec, irel, internal_relocs,
11966 &insn_len, contents, isymbuf,
11967 symtab_hdr);
11968 break;
11969 case R_NDS32_LONGCALL2:
11970 removed = nds32_elf_relax_longcall2 (abfd, sec, irel, internal_relocs,
11971 &insn_len, contents, isymbuf,
11972 symtab_hdr);
11973 break;
11974 case R_NDS32_LONGCALL3:
11975 removed = nds32_elf_relax_longcall3 (abfd, sec, irel, internal_relocs,
11976 &insn_len, contents, isymbuf,
11977 symtab_hdr);
11978 break;
11979 case R_NDS32_LONGJUMP1:
11980 removed = nds32_elf_relax_longjump1 (abfd, sec, irel, internal_relocs,
11981 &insn_len, contents, isymbuf,
11982 symtab_hdr);
11983 break;
11984 case R_NDS32_LONGJUMP2:
11985 removed = nds32_elf_relax_longjump2 (abfd, sec, irel, internal_relocs,
11986 &insn_len, contents, isymbuf,
11987 symtab_hdr);
11988 break;
11989 case R_NDS32_LONGJUMP3:
11990 removed = nds32_elf_relax_longjump3 (abfd, sec, irel, internal_relocs,
11991 &insn_len, contents, isymbuf,
11992 symtab_hdr);
11993 break;
11994 case R_NDS32_LONGCALL4:
11995 removed = nds32_elf_relax_longcall4 (abfd, sec, irel, internal_relocs,
11996 &insn_len, contents, isymbuf,
11997 symtab_hdr);
11998 break;
11999 case R_NDS32_LONGCALL5:
12000 removed = nds32_elf_relax_longcall5 (abfd, sec, irel, internal_relocs,
12001 &insn_len, contents, isymbuf,
12002 symtab_hdr);
12003 break;
12004 case R_NDS32_LONGCALL6:
12005 removed = nds32_elf_relax_longcall6 (abfd, sec, irel, internal_relocs,
12006 &insn_len, contents, isymbuf,
12007 symtab_hdr);
12008 break;
12009 case R_NDS32_LONGJUMP4:
12010 removed = nds32_elf_relax_longjump4 (abfd, sec, irel, internal_relocs,
12011 &insn_len, contents, isymbuf,
12012 symtab_hdr);
12013 break;
12014 case R_NDS32_LONGJUMP5:
12015 removed = nds32_elf_relax_longjump5 (abfd, sec, irel, internal_relocs,
12016 &insn_len, &seq_len, contents,
12017 isymbuf, symtab_hdr);
12018 break;
12019 case R_NDS32_LONGJUMP6:
12020 removed = nds32_elf_relax_longjump6 (abfd, sec, irel, internal_relocs,
12021 &insn_len, &seq_len, contents,
12022 isymbuf, symtab_hdr);
12023 break;
12024 case R_NDS32_LONGJUMP7:
12025 removed = nds32_elf_relax_longjump7 (abfd, sec, irel, internal_relocs,
12026 &insn_len, &seq_len, contents,
12027 isymbuf, symtab_hdr);
12028 break;
12029 case R_NDS32_LOADSTORE:
12030 removed = nds32_elf_relax_loadstore (link_info, abfd, sec, irel,
12031 internal_relocs, &insn_len,
12032 contents, isymbuf, symtab_hdr,
12033 load_store_relax);
12034 break;
12035 case R_NDS32_LO12S0_RELA:
12036 case R_NDS32_LO12S1_RELA:
12037 case R_NDS32_LO12S2_DP_RELA:
12038 case R_NDS32_LO12S2_SP_RELA:
12039 case R_NDS32_LO12S2_RELA:
12040 /* Relax for low part. */
12041 nds32_elf_relax_lo12 (link_info, abfd, sec, irel, internal_relocs,
12042 contents, isymbuf, symtab_hdr);
12043
12044 /* It is impossible to delete blank, so just continue. */
12045 continue;
12046 case R_NDS32_GOT_LO12:
12047 case R_NDS32_GOTOFF_LO12:
12048 case R_NDS32_PLTREL_LO12:
12049 case R_NDS32_PLT_GOTREL_LO12:
12050 case R_NDS32_GOTPC_LO12:
12051 /* Relax for PIC gp-relative low part. */
12052 nds32_elf_relax_piclo12 (link_info, abfd, sec, irel, contents,
12053 isymbuf, symtab_hdr);
35c08157 12054
1c8f6a4d
KLC
12055 /* It is impossible to delete blank, so just continue. */
12056 continue;
12057 case R_NDS32_TLS_LE_LO12:
12058 /* Relax for LE TLS low part. */
12059 nds32_elf_relax_letlslo12 (link_info, abfd, irel, contents,
12060 isymbuf, symtab_hdr);
35c08157 12061
1c8f6a4d
KLC
12062 /* It is impossible to delete blank, so just continue. */
12063 continue;
12064 case R_NDS32_TLS_LE_ADD:
12065 nds32_elf_relax_letlsadd (link_info, abfd, sec, irel, internal_relocs,
12066 contents, isymbuf, symtab_hdr, again);
12067 /* It is impossible to delete blank, so just continue. */
12068 continue;
12069 case R_NDS32_TLS_LE_LS:
12070 nds32_elf_relax_letlsls (link_info, abfd, sec, irel, internal_relocs,
12071 contents, isymbuf, symtab_hdr, again);
12072 continue;
12073 case R_NDS32_PTR:
12074 removed = nds32_elf_relax_ptr (abfd, sec, irel, internal_relocs,
12075 &insn_len, &seq_len, contents);
12076 break;
12077 case R_NDS32_PLT_GOT_SUFF:
12078 nds32_elf_relax_pltgot_suff (link_info, abfd, sec, irel,
12079 internal_relocs, contents,
12080 isymbuf, symtab_hdr, again);
12081 /* It is impossible to delete blank, so just continue. */
12082 continue;
12083 case R_NDS32_GOT_SUFF:
12084 nds32_elf_relax_got_suff (link_info, abfd, sec, irel,
12085 internal_relocs, contents,
12086 symtab_hdr, again);
12087 /* It is impossible to delete blank, so just continue. */
12088 continue;
12089 case R_NDS32_GOTOFF_SUFF:
12090 nds32_elf_relax_gotoff_suff (link_info, abfd, sec, irel,
12091 internal_relocs, contents,
12092 isymbuf, symtab_hdr, again);
12093 /* It is impossible to delete blank, so just continue. */
12094 continue;
12095 default:
12096 continue;
12097
12098 }
12099 if (removed && seq_len - insn_len > 0)
12100 {
12101 if (!insert_nds32_elf_blank
12102 (&relax_blank_list, irel->r_offset + insn_len,
12103 seq_len - insn_len))
12104 goto error_return;
12105 *again = TRUE;
35c08157 12106 }
1c8f6a4d
KLC
12107 }
12108
12109 calc_nds32_blank_total (relax_blank_list);
12110
12111 if (table->relax_fp_as_gp)
12112 {
12113 if (!nds32_relax_fp_as_gp (link_info, abfd, sec, internal_relocs,
12114 irelend, isymbuf))
12115 goto error_return;
35c08157 12116
535b785f 12117 if (!*again)
35c08157 12118 {
1c8f6a4d
KLC
12119 if (!nds32_fag_remove_unused_fpbase (abfd, sec, internal_relocs,
12120 irelend))
12121 goto error_return;
35c08157
KLC
12122 }
12123 }
1c8f6a4d
KLC
12124
12125 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12126
535b785f 12127 if (!*again)
1c8f6a4d
KLC
12128 {
12129 if (!nds32_relax_adjust_label (abfd, sec, internal_relocs, contents,
12130 &relax_blank_list, optimize, opt_size))
12131 goto error_return;
12132 }
12133
12134 /* It doesn't matter optimize_for_space_no_align anymore.
35c08157
KLC
12135 If object file is assembled with flag '-Os',
12136 the we don't adjust jump-destination on 4-byte boundary. */
12137
12138 if (relax_blank_list)
12139 {
12140 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12141 relax_blank_list = NULL;
12142 }
12143
535b785f 12144 if (!*again)
35c08157
KLC
12145 {
12146 /* Closing the section, so we don't relax it anymore. */
12147 bfd_vma sec_size_align;
12148 Elf_Internal_Rela *tmp_rel;
12149
12150 /* Pad to alignment boundary. Only handle current section alignment. */
609332f1
NC
12151 sec_size_align = (sec->size + (~((-1U) << sec->alignment_power)))
12152 & ((-1U) << sec->alignment_power);
35c08157
KLC
12153 if ((sec_size_align - sec->size) & 0x2)
12154 {
12155 insn16 = NDS32_NOP16;
12156 bfd_putb16 (insn16, contents + sec->size);
12157 sec->size += 2;
12158 }
12159
12160 while (sec_size_align != sec->size)
12161 {
12162 insn = NDS32_NOP32;
12163 bfd_putb32 (insn, contents + sec->size);
12164 sec->size += 4;
12165 }
12166
1c8f6a4d
KLC
12167 tmp_rel = find_relocs_at_address (internal_relocs, internal_relocs,
12168 irelend, R_NDS32_RELAX_ENTRY);
35c08157
KLC
12169 if (tmp_rel != irelend)
12170 tmp_rel->r_addend |= R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG;
12171
12172 clean_nds32_elf_blank ();
12173 }
12174
12175finish:
12176 if (internal_relocs != NULL
12177 && elf_section_data (sec)->relocs != internal_relocs)
12178 free (internal_relocs);
12179
12180 if (contents != NULL
12181 && elf_section_data (sec)->this_hdr.contents != contents)
12182 free (contents);
12183
12184 if (isymbuf != NULL && symtab_hdr->contents != (bfd_byte *) isymbuf)
12185 free (isymbuf);
12186
12187 return result;
12188
12189error_return:
12190 result = FALSE;
12191 goto finish;
12192}
12193
12194static struct bfd_elf_special_section const nds32_elf_special_sections[] =
12195{
12196 {".sdata", 6, -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE},
12197 {".sbss", 5, -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE},
12198 {NULL, 0, 0, 0, 0}
12199};
12200
12201static bfd_boolean
12202nds32_elf_output_arch_syms (bfd *output_bfd ATTRIBUTE_UNUSED,
12203 struct bfd_link_info *info,
12204 void *finfo ATTRIBUTE_UNUSED,
12205 bfd_boolean (*func) (void *, const char *,
12206 Elf_Internal_Sym *,
12207 asection *,
12208 struct elf_link_hash_entry *)
12209 ATTRIBUTE_UNUSED)
12210{
12211 FILE *sym_ld_script = NULL;
12212 struct elf_nds32_link_hash_table *table;
12213
12214 table = nds32_elf_hash_table (info);
12215 sym_ld_script = table->sym_ld_script;
12216
12217 if (check_start_export_sym)
12218 fprintf (sym_ld_script, "}\n");
12219
12220 return TRUE;
12221}
12222
12223static enum elf_reloc_type_class
12224nds32_elf_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
12225 const asection *rel_sec ATTRIBUTE_UNUSED,
12226 const Elf_Internal_Rela *rela)
12227{
12228 switch ((int) ELF32_R_TYPE (rela->r_info))
12229 {
12230 case R_NDS32_RELATIVE:
12231 return reloc_class_relative;
12232 case R_NDS32_JMP_SLOT:
12233 return reloc_class_plt;
12234 case R_NDS32_COPY:
12235 return reloc_class_copy;
12236 default:
12237 return reloc_class_normal;
12238 }
12239}
12240
12241/* Put target dependent option into info hash table. */
12242void
12243bfd_elf32_nds32_set_target_option (struct bfd_link_info *link_info,
12244 int relax_fp_as_gp,
12245 int eliminate_gc_relocs,
12246 FILE * sym_ld_script, int load_store_relax,
12247 int target_optimize, int relax_status,
12248 int relax_round, FILE * ex9_export_file,
12249 FILE * ex9_import_file,
12250 int update_ex9_table, int ex9_limit,
12251 bfd_boolean ex9_loop_aware,
12252 bfd_boolean ifc_loop_aware)
12253{
12254 struct elf_nds32_link_hash_table *table;
12255
12256 table = nds32_elf_hash_table (link_info);
12257 if (table == NULL)
12258 return;
12259
12260 table->relax_fp_as_gp = relax_fp_as_gp;
12261 table->eliminate_gc_relocs = eliminate_gc_relocs;
12262 table->sym_ld_script = sym_ld_script;
12263 table ->load_store_relax = load_store_relax;
12264 table->target_optimize = target_optimize;
12265 table->relax_status = relax_status;
12266 table->relax_round = relax_round;
12267 table->ex9_export_file = ex9_export_file;
12268 table->ex9_import_file = ex9_import_file;
12269 table->update_ex9_table = update_ex9_table;
12270 table->ex9_limit = ex9_limit;
12271 table->ex9_loop_aware = ex9_loop_aware;
12272 table->ifc_loop_aware = ifc_loop_aware;
12273}
12274\f
12275/* These functions and data-structures are used for fp-as-gp
12276 optimization. */
12277
12278#define FAG_THRESHOLD 3 /* At least 3 gp-access. */
1c8f6a4d
KLC
12279/* lwi37.fp covers 508 bytes, but there may be 32-byte padding between
12280 the read-only section and read-write section. */
12281#define FAG_WINDOW (508 - 32)
35c08157
KLC
12282
12283/* An nds32_fag represent a gp-relative access.
12284 We find best fp-base by using a sliding window
12285 to find a base address which can cover most gp-access. */
12286struct nds32_fag
12287{
12288 struct nds32_fag *next; /* NULL-teminated linked list. */
12289 bfd_vma addr; /* The address of this fag. */
12290 Elf_Internal_Rela **relas; /* The relocations associated with this fag.
12291 It is used for applying FP7U2_FLAG. */
12292 int count; /* How many times this address is referred.
12293 There should be exactly `count' relocations
12294 in relas. */
12295 int relas_capcity; /* The buffer size of relas.
12296 We use an array instead of linked-list,
12297 and realloc is used to adjust buffer size. */
12298};
12299
12300static void
12301nds32_fag_init (struct nds32_fag *head)
12302{
12303 memset (head, 0, sizeof (struct nds32_fag));
12304}
12305
12306static void
12307nds32_fag_verify (struct nds32_fag *head)
12308{
12309 struct nds32_fag *iter;
12310 struct nds32_fag *prev;
12311
12312 prev = NULL;
12313 iter = head->next;
12314 while (iter)
12315 {
12316 if (prev && prev->addr >= iter->addr)
12317 puts ("Bug in fp-as-gp insertion.");
12318 prev = iter;
12319 iter = iter->next;
12320 }
12321}
12322
12323/* Insert a fag in ascending order.
12324 If a fag of the same address already exists,
12325 they are chained by relas array. */
12326
12327static void
12328nds32_fag_insert (struct nds32_fag *head, bfd_vma addr,
12329 Elf_Internal_Rela * rel)
12330{
12331 struct nds32_fag *iter;
12332 struct nds32_fag *new_fag;
12333 const int INIT_RELAS_CAP = 4;
12334
12335 for (iter = head;
12336 iter->next && iter->next->addr <= addr;
12337 iter = iter->next)
12338 /* Find somewhere to insert. */ ;
12339
12340 /* `iter' will be equal to `head' if the list is empty. */
12341 if (iter != head && iter->addr == addr)
12342 {
12343 /* The address exists in the list.
12344 Insert `rel' into relocation list, relas. */
12345
12346 /* Check whether relas is big enough. */
12347 if (iter->count >= iter->relas_capcity)
12348 {
12349 iter->relas_capcity *= 2;
12350 iter->relas = bfd_realloc
12351 (iter->relas, iter->relas_capcity * sizeof (void *));
12352 }
12353 iter->relas[iter->count++] = rel;
12354 return;
12355 }
12356
12357 /* This is a new address. Create a fag node for it. */
12358 new_fag = bfd_malloc (sizeof (struct nds32_fag));
12359 memset (new_fag, 0, sizeof (*new_fag));
12360 new_fag->addr = addr;
12361 new_fag->count = 1;
12362 new_fag->next = iter->next;
12363 new_fag->relas_capcity = INIT_RELAS_CAP;
12364 new_fag->relas = (Elf_Internal_Rela **)
12365 bfd_malloc (new_fag->relas_capcity * sizeof (void *));
12366 new_fag->relas[0] = rel;
12367 iter->next = new_fag;
12368
12369 nds32_fag_verify (head);
12370}
12371
12372static void
12373nds32_fag_free_list (struct nds32_fag *head)
12374{
12375 struct nds32_fag *iter;
12376
12377 iter = head->next;
12378 while (iter)
12379 {
12380 struct nds32_fag *tmp = iter;
12381 iter = iter->next;
12382 free (tmp->relas);
12383 tmp->relas = NULL;
12384 free (tmp);
12385 }
12386}
12387
35c08157
KLC
12388/* Find the best fp-base address.
12389 The relocation associated with that address is returned,
12390 so we can track the symbol instead of a fixed address.
12391
12392 When relaxation, the address of an datum may change,
12393 because a text section is shrinked, so the data section
1c8f6a4d 12394 moves forward. If the aligments of text and data section
35c08157
KLC
12395 are different, their distance may change too.
12396 Therefore, tracking a fixed address is not appriate. */
12397
12398static int
12399nds32_fag_find_base (struct nds32_fag *head, struct nds32_fag **bestpp)
12400{
12401 struct nds32_fag *base; /* First fag in the window. */
12402 struct nds32_fag *last; /* First fag outside the window. */
12403 int accu = 0; /* Usage accumulation. */
12404 struct nds32_fag *best; /* Best fag. */
12405 int baccu = 0; /* Best accumulation. */
12406
12407 /* Use first fag for initial, and find the last fag in the window.
12408
12409 In each iteration, we could simply subtract previous fag
12410 and accumulate following fags which are inside the window,
12411 untill we each the end. */
12412
1c8f6a4d
KLC
12413 if (head->next == NULL)
12414 {
12415 *bestpp = NULL;
12416 return 0;
12417 }
35c08157
KLC
12418
12419 /* Initialize base. */
12420 base = head->next;
12421 best = base;
12422 for (last = base;
12423 last && last->addr < base->addr + FAG_WINDOW;
12424 last = last->next)
12425 accu += last->count;
12426
12427 baccu = accu;
12428
12429 /* Record the best base in each iteration. */
12430 while (base->next)
1c8f6a4d
KLC
12431 {
12432 accu -= base->count;
12433 base = base->next;
12434 /* Account fags in window. */
12435 for (/* Nothing. */;
12436 last && last->addr < base->addr + FAG_WINDOW;
12437 last = last->next)
12438 accu += last->count;
12439
12440 /* A better fp-base? */
12441 if (accu > baccu)
12442 {
12443 best = base;
12444 baccu = accu;
12445 }
12446 }
35c08157
KLC
12447
12448 if (bestpp)
12449 *bestpp = best;
12450 return baccu;
12451}
12452
12453/* Apply R_NDS32_INSN16_FP7U2_FLAG on gp-relative accesses,
12454 so we can convert it fo fp-relative access later.
12455 `best_fag' is the best fp-base. Only those inside the window
12456 of best_fag is applied the flag. */
12457
12458static bfd_boolean
12459nds32_fag_mark_relax (struct bfd_link_info *link_info,
12460 bfd *abfd, struct nds32_fag *best_fag,
12461 Elf_Internal_Rela *internal_relocs,
12462 Elf_Internal_Rela *irelend)
12463{
12464 struct nds32_fag *ifag;
12465 bfd_vma best_fpbase, gp;
12466 bfd *output_bfd;
12467
12468 output_bfd = abfd->sections->output_section->owner;
12469 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
12470 best_fpbase = best_fag->addr;
12471
1c8f6a4d
KLC
12472 if (best_fpbase > gp + sdata_range[1][1]
12473 || best_fpbase < gp - sdata_range[1][0])
35c08157
KLC
12474 return FALSE;
12475
12476 /* Mark these inside the window R_NDS32_INSN16_FP7U2_FLAG flag,
12477 so we know they can be converted to lwi37.fp. */
12478 for (ifag = best_fag;
12479 ifag && ifag->addr < best_fpbase + FAG_WINDOW; ifag = ifag->next)
12480 {
12481 int i;
12482
12483 for (i = 0; i < ifag->count; i++)
12484 {
12485 Elf_Internal_Rela *insn16_rel;
12486 Elf_Internal_Rela *fag_rel;
12487
12488 fag_rel = ifag->relas[i];
12489
12490 /* Only if this is within the WINDOWS, FP7U2_FLAG
12491 is applied. */
12492
12493 insn16_rel = find_relocs_at_address
12494 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12495
12496 if (insn16_rel != irelend)
12497 insn16_rel->r_addend = R_NDS32_INSN16_FP7U2_FLAG;
12498 }
12499 }
12500 return TRUE;
12501}
12502
1c8f6a4d
KLC
12503/* Reset INSN16 to clean fp as gp. */
12504
12505static void
12506nds32_fag_unmark_relax (struct nds32_fag *fag,
12507 Elf_Internal_Rela *internal_relocs,
12508 Elf_Internal_Rela *irelend)
12509{
12510 struct nds32_fag *ifag;
12511 int i;
12512 Elf_Internal_Rela *insn16_rel;
12513 Elf_Internal_Rela *fag_rel;
12514
12515 for (ifag = fag; ifag; ifag = ifag->next)
12516 {
12517 for (i = 0; i < ifag->count; i++)
12518 {
12519 fag_rel = ifag->relas[i];
12520
12521 /* Restore the INSN16 relocation. */
12522 insn16_rel = find_relocs_at_address
12523 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12524
12525 if (insn16_rel != irelend)
12526 insn16_rel->r_addend &= ~R_NDS32_INSN16_FP7U2_FLAG;
12527 }
12528 }
12529}
12530
35c08157
KLC
12531/* This is the main function of fp-as-gp optimization.
12532 It should be called by relax_section. */
12533
12534static bfd_boolean
12535nds32_relax_fp_as_gp (struct bfd_link_info *link_info,
12536 bfd *abfd, asection *sec,
12537 Elf_Internal_Rela *internal_relocs,
12538 Elf_Internal_Rela *irelend,
12539 Elf_Internal_Sym *isymbuf)
12540{
12541 Elf_Internal_Rela *begin_rel = NULL;
12542 Elf_Internal_Rela *irel;
12543 struct nds32_fag fag_head;
12544 Elf_Internal_Shdr *symtab_hdr;
12545 bfd_byte *contents;
1c8f6a4d 12546 bfd_boolean ifc_inside = FALSE;
35c08157
KLC
12547
12548 /* FIXME: Can we bfd_elf_link_read_relocs for the relocs? */
12549
12550 /* Per-function fp-base selection.
12551 1. Create a list for all the gp-relative access.
12552 2. Base on those gp-relative address,
12553 find a fp-base which can cover most access.
12554 3. Use the fp-base for fp-as-gp relaxation.
12555
12556 NOTE: If fp-as-gp is not worth to do, (e.g., less than 3 times),
12557 we should
12558 1. delete the `la $fp, _FP_BASE_' instruction and
12559 2. not convert lwi.gp to lwi37.fp.
12560
12561 To delete the _FP_BASE_ instruction, we simply apply
12562 R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG flag in the r_addend to disable it.
12563
12564 To suppress the conversion, we simply NOT to apply
12565 R_NDS32_INSN16_FP7U2_FLAG flag. */
12566
12567 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12568
0c4bd9d9 12569 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
35c08157
KLC
12570 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12571 return FALSE;
12572
12573 /* Check whether it is worth for fp-as-gp optimization,
12574 i.e., at least 3 gp-load.
12575
12576 Set R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG if we should NOT
12577 apply this optimization. */
12578
12579 for (irel = internal_relocs; irel < irelend; irel++)
12580 {
12581 /* We recognize R_NDS32_RELAX_REGION_BEGIN/_END for the region.
12582 One we enter the begin of the region, we track all the LW/ST
12583 instructions, so when we leave the region, we try to find
12584 the best fp-base address for those LW/ST instructions. */
12585
12586 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12587 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12588 {
12589 /* Begin of the region. */
12590 if (begin_rel)
695344c0 12591 /* xgettext:c-format */
4eca0228 12592 _bfd_error_handler (_("%B: Nested OMIT_FP in %A."), abfd, sec);
35c08157
KLC
12593
12594 begin_rel = irel;
12595 nds32_fag_init (&fag_head);
1c8f6a4d 12596 ifc_inside = FALSE;
35c08157
KLC
12597 }
12598 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12599 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12600 {
12601 int accu;
1c8f6a4d 12602 struct nds32_fag *best_fag, *tmp_fag;
35c08157
KLC
12603 int dist;
12604
12605 /* End of the region.
12606 Check whether it is worth to do fp-as-gp. */
12607
12608 if (begin_rel == NULL)
12609 {
695344c0 12610 /* xgettext:c-format */
4eca0228 12611 _bfd_error_handler (_("%B: Unmatched OMIT_FP in %A."), abfd, sec);
35c08157
KLC
12612 continue;
12613 }
12614
12615 accu = nds32_fag_find_base (&fag_head, &best_fag);
12616
1c8f6a4d
KLC
12617 /* Clean FP7U2_FLAG because they may set ever. */
12618 tmp_fag = fag_head.next;
12619 nds32_fag_unmark_relax (tmp_fag, internal_relocs, irelend);
12620
35c08157
KLC
12621 /* Check if it is worth, and FP_BASE is near enough to SDA_BASE. */
12622 if (accu < FAG_THRESHOLD
12623 || !nds32_fag_mark_relax (link_info, abfd, best_fag,
12624 internal_relocs, irelend))
12625 {
12626 /* Not worth to do fp-as-gp. */
12627 begin_rel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12628 begin_rel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12629 irel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12630 irel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12631 nds32_fag_free_list (&fag_head);
12632 begin_rel = NULL;
12633 continue;
12634 }
12635
12636 /* R_SYM of R_NDS32_RELAX_REGION_BEGIN is not used by assembler,
12637 so we use it to record the distance to the reloction of best
12638 fp-base. */
12639 dist = best_fag->relas[0] - begin_rel;
12640 BFD_ASSERT (dist > 0 && dist < 0xffffff);
12641 /* Use high 16 bits of addend to record the _FP_BASE_ matched
12642 relocation. And get the base value when relocating. */
1c8f6a4d 12643 begin_rel->r_addend &= (0x1 << 16) - 1;
35c08157
KLC
12644 begin_rel->r_addend |= dist << 16;
12645
12646 nds32_fag_free_list (&fag_head);
12647 begin_rel = NULL;
12648 }
12649
1c8f6a4d 12650 if (begin_rel == NULL || ifc_inside)
35c08157
KLC
12651 /* Skip if we are not in the region of fp-as-gp. */
12652 continue;
12653
12654 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S2_RELA
12655 || ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA17S2_RELA)
12656 {
12657 bfd_vma addr;
12658 uint32_t insn;
12659
12660 /* A gp-relative access is found. Insert it to the fag-list. */
12661
12662 /* Rt is necessary an RT3, so it can be converted to lwi37.fp. */
12663 insn = bfd_getb32 (contents + irel->r_offset);
12664 if (!N32_IS_RT3 (insn))
12665 continue;
12666
12667 addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
12668 nds32_fag_insert (&fag_head, addr, irel);
12669 }
12670 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA_FP7U2_RELA)
12671 {
12672 begin_rel = NULL;
12673 }
1c8f6a4d
KLC
12674 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12675 || ELF32_R_TYPE (irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
12676 {
12677 /* Suppress fp as gp when encounter ifc. */
12678 ifc_inside = TRUE;
12679 }
35c08157
KLC
12680 }
12681
12682 return TRUE;
12683}
12684
12685/* Remove unused `la $fp, _FD_BASE_' instruction. */
12686
12687static bfd_boolean
12688nds32_fag_remove_unused_fpbase (bfd *abfd, asection *sec,
12689 Elf_Internal_Rela *internal_relocs,
12690 Elf_Internal_Rela *irelend)
12691{
12692 Elf_Internal_Rela *irel;
12693 Elf_Internal_Shdr *symtab_hdr;
12694 bfd_byte *contents = NULL;
12695 nds32_elf_blank_t *relax_blank_list = NULL;
12696 bfd_boolean result = TRUE;
12697 bfd_boolean unused_region = FALSE;
12698
12699 /*
12700 NOTE: Disable fp-as-gp if we encounter ifcall relocations.
12701 * R_NDS32_17IFC_PCREL_RELA
12702 * R_NDS32_10IFCU_PCREL_RELA
12703
12704 CASE??????????????
12705 */
12706
12707 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
0c4bd9d9 12708 nds32_get_section_contents (abfd, sec, &contents, TRUE);
35c08157
KLC
12709
12710 for (irel = internal_relocs; irel < irelend; irel++)
12711 {
12712 /* To remove unused fp-base, we simply find the REGION_NOT_OMIT_FP
12713 we marked to in previous pass.
12714 DO NOT scan relocations again, since we've alreadly decided it
12715 and set the flag. */
12716 const char *syname;
12717 int syndx;
12718 uint32_t insn;
12719
12720 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12721 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12722 unused_region = TRUE;
12723 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12724 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12725 unused_region = FALSE;
12726
12727 /* We're not in the region. */
12728 if (!unused_region)
12729 continue;
12730
12731 /* _FP_BASE_ must be a GLOBAL symbol. */
12732 syndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
12733 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
12734 continue;
12735
12736 /* The symbol name must be _FP_BASE_. */
12737 syname = elf_sym_hashes (abfd)[syndx]->root.root.string;
12738 if (strcmp (syname, FP_BASE_NAME) != 0)
12739 continue;
12740
12741 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA19S0_RELA)
12742 {
12743 /* addi.gp $fp, -256 */
12744 insn = bfd_getb32 (contents + irel->r_offset);
12745 if (insn != INSN_ADDIGP_TO_FP)
12746 continue;
12747 }
12748 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S0_RELA)
12749 {
12750 /* addi $fp, $gp, -256 */
12751 insn = bfd_getb32 (contents + irel->r_offset);
12752 if (insn != INSN_ADDI_GP_TO_FP)
12753 continue;
12754 }
12755 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_20_RELA)
12756 {
12757 /* movi $fp, FP_BASE */
12758 insn = bfd_getb32 (contents + irel->r_offset);
12759 if (insn != INSN_MOVI_TO_FP)
12760 continue;
12761 }
12762 else
12763 continue;
12764
12765 /* We got here because a FP_BASE instruction is found. */
12766 if (!insert_nds32_elf_blank_recalc_total
12767 (&relax_blank_list, irel->r_offset, 4))
12768 goto error_return;
12769 }
12770
12771finish:
12772 if (relax_blank_list)
12773 {
12774 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12775 relax_blank_list = NULL;
12776 }
12777 return result;
12778
12779error_return:
12780 result = FALSE;
12781 goto finish;
12782}
1c8f6a4d
KLC
12783
12784/* This is a version of bfd_generic_get_relocated_section_contents.
12785 We need this variety because relaxation will modify the dwarf
12786 infomation. When there is undefined symbol reference error mesage,
12787 linker need to dump line number where the symbol be used. However
12788 the address is be relaxed, it can not get the original dwarf contents.
12789 The variety only modify function call for reading in the section. */
12790
12791static bfd_byte *
12792nds32_elf_get_relocated_section_contents (bfd *abfd,
12793 struct bfd_link_info *link_info,
12794 struct bfd_link_order *link_order,
12795 bfd_byte *data,
12796 bfd_boolean relocatable,
12797 asymbol **symbols)
12798{
12799 bfd *input_bfd = link_order->u.indirect.section->owner;
12800 asection *input_section = link_order->u.indirect.section;
12801 long reloc_size;
12802 arelent **reloc_vector;
12803 long reloc_count;
12804
12805 reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
12806 if (reloc_size < 0)
12807 return NULL;
12808
12809 /* Read in the section. */
0c4bd9d9 12810 if (!nds32_get_section_contents (input_bfd, input_section, &data, FALSE))
1c8f6a4d
KLC
12811 return NULL;
12812
12813 if (reloc_size == 0)
12814 return data;
12815
12816 reloc_vector = (arelent **) bfd_malloc (reloc_size);
12817 if (reloc_vector == NULL)
12818 return NULL;
12819
12820 reloc_count = bfd_canonicalize_reloc (input_bfd, input_section,
12821 reloc_vector, symbols);
12822 if (reloc_count < 0)
12823 goto error_return;
12824
12825 if (reloc_count > 0)
12826 {
12827 arelent **parent;
12828 for (parent = reloc_vector; *parent != NULL; parent++)
12829 {
12830 char *error_message = NULL;
12831 asymbol *symbol;
12832 bfd_reloc_status_type r;
12833
12834 symbol = *(*parent)->sym_ptr_ptr;
12835 if (symbol->section && discarded_section (symbol->section))
12836 {
12837 bfd_byte *p;
12838 static reloc_howto_type none_howto
12839 = HOWTO (0, 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL,
12840 "unused", FALSE, 0, 0, FALSE);
12841
12842 p = data + (*parent)->address * bfd_octets_per_byte (input_bfd);
12843 _bfd_clear_contents ((*parent)->howto, input_bfd, input_section,
12844 p);
12845 (*parent)->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
12846 (*parent)->addend = 0;
12847 (*parent)->howto = &none_howto;
12848 r = bfd_reloc_ok;
12849 }
12850 else
12851 r = bfd_perform_relocation (input_bfd, *parent, data,
12852 input_section,
12853 relocatable ? abfd : NULL,
12854 &error_message);
12855
12856 if (relocatable)
12857 {
12858 asection *os = input_section->output_section;
12859
12860 /* A partial link, so keep the relocs. */
12861 os->orelocation[os->reloc_count] = *parent;
12862 os->reloc_count++;
12863 }
12864
12865 if (r != bfd_reloc_ok)
12866 {
12867 switch (r)
12868 {
12869 case bfd_reloc_undefined:
1a72702b
AM
12870 (*link_info->callbacks->undefined_symbol)
12871 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
12872 input_bfd, input_section, (*parent)->address, TRUE);
1c8f6a4d
KLC
12873 break;
12874 case bfd_reloc_dangerous:
12875 BFD_ASSERT (error_message != NULL);
1a72702b
AM
12876 (*link_info->callbacks->reloc_dangerous)
12877 (link_info, error_message,
12878 input_bfd, input_section, (*parent)->address);
1c8f6a4d
KLC
12879 break;
12880 case bfd_reloc_overflow:
1a72702b
AM
12881 (*link_info->callbacks->reloc_overflow)
12882 (link_info, NULL,
12883 bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
12884 (*parent)->howto->name, (*parent)->addend,
12885 input_bfd, input_section, (*parent)->address);
1c8f6a4d
KLC
12886 break;
12887 case bfd_reloc_outofrange:
12888 /* PR ld/13730:
12889 This error can result when processing some partially
12890 complete binaries. Do not abort, but issue an error
12891 message instead. */
12892 link_info->callbacks->einfo
695344c0 12893 /* xgettext:c-format */
1c8f6a4d
KLC
12894 (_("%X%P: %B(%A): relocation \"%R\" goes out of range\n"),
12895 abfd, input_section, * parent);
12896 goto error_return;
12897
12898 default:
12899 abort ();
12900 break;
12901 }
12902 }
12903 }
12904 }
12905
12906 free (reloc_vector);
12907 return data;
12908
12909error_return:
12910 free (reloc_vector);
12911 return NULL;
12912}
35c08157
KLC
12913\f
12914/* Link-time IFC relaxation.
12915 In this optimization, we chains jump instructions
12916 of the same destination with ifcall. */
12917
12918
12919/* List to save jal and j relocation. */
12920struct elf_nds32_ifc_symbol_entry
12921{
12922 asection *sec;
12923 struct elf_link_hash_entry *h;
12924 struct elf_nds32_ifc_irel_list *irel_head;
12925 unsigned long insn;
12926 int times;
12927 int enable; /* Apply ifc. */
12928 int ex9_enable; /* Apply ifc after ex9. */
12929 struct elf_nds32_ifc_symbol_entry *next;
12930};
12931
12932struct elf_nds32_ifc_irel_list
12933{
12934 Elf_Internal_Rela *irel;
12935 asection *sec;
12936 bfd_vma addr;
12937 /* If this is set, then it is the last instruction for
12938 ifc-chain, so it must be keep for the actual branching. */
12939 int keep;
12940 struct elf_nds32_ifc_irel_list *next;
12941};
12942
12943static struct elf_nds32_ifc_symbol_entry *ifc_symbol_head = NULL;
12944
12945/* Insert symbol of jal and j for ifc. */
12946
12947static void
12948nds32_elf_ifc_insert_symbol (asection *sec,
12949 struct elf_link_hash_entry *h,
12950 Elf_Internal_Rela *irel,
12951 unsigned long insn)
12952{
12953 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
12954
12955 /* Check there is target of existing entry the same as the new one. */
12956 while (ptr != NULL)
12957 {
12958 if (((h == NULL && ptr->sec == sec
12959 && ELF32_R_SYM (ptr->irel_head->irel->r_info) == ELF32_R_SYM (irel->r_info)
12960 && ptr->irel_head->irel->r_addend == irel->r_addend)
12961 || h != NULL)
12962 && ptr->h == h
12963 && ptr->insn == insn)
12964 {
12965 /* The same target exist, so insert into list. */
12966 struct elf_nds32_ifc_irel_list *irel_list = ptr->irel_head;
12967
12968 while (irel_list->next != NULL)
12969 irel_list = irel_list->next;
12970 irel_list->next = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
12971 irel_list = irel_list->next;
12972 irel_list->irel = irel;
12973 irel_list->keep = 1;
12974
12975 if (h == NULL)
12976 irel_list->sec = NULL;
12977 else
12978 irel_list->sec = sec;
12979 irel_list->next = NULL;
12980 return;
12981 }
12982 if (ptr->next == NULL)
12983 break;
12984 ptr = ptr->next;
12985 }
12986
12987 /* There is no same target entry, so build a new one. */
12988 if (ifc_symbol_head == NULL)
12989 {
12990 ifc_symbol_head = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
12991 ptr = ifc_symbol_head;
12992 }
12993 else
12994 {
12995 ptr->next = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
12996 ptr = ptr->next;
12997 }
12998
12999 ptr->h = h;
13000 ptr->irel_head = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
13001 ptr->irel_head->irel = irel;
13002 ptr->insn = insn;
13003 ptr->irel_head->keep = 1;
13004
13005 if (h == NULL)
13006 {
13007 /* Local symbols. */
13008 ptr->sec = sec;
13009 ptr->irel_head->sec = NULL;
13010 }
13011 else
13012 {
13013 /* Global symbol. */
13014 ptr->sec = NULL;
13015 ptr->irel_head->sec = sec;
13016 }
13017
13018 ptr->irel_head->next = NULL;
13019 ptr->times = 0;
13020 ptr->enable = 0;
13021 ptr->ex9_enable = 0;
13022 ptr->next = NULL;
13023}
13024
13025/* Gather all jal and j instructions. */
13026
13027static bfd_boolean
13028nds32_elf_ifc_calc (struct bfd_link_info *info,
13029 bfd *abfd, asection *sec)
13030{
13031 Elf_Internal_Rela *internal_relocs;
13032 Elf_Internal_Rela *irelend;
13033 Elf_Internal_Rela *irel;
13034 Elf_Internal_Shdr *symtab_hdr;
13035 bfd_byte *contents = NULL;
1c8f6a4d 13036 uint32_t insn, insn_with_reg;
35c08157
KLC
13037 unsigned long r_symndx;
13038 struct elf_link_hash_entry *h;
13039 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
13040 struct elf_nds32_link_hash_table *table;
13041 bfd_boolean ifc_loop_aware;
13042
13043 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
13044 TRUE /* keep_memory */);
13045 irelend = internal_relocs + sec->reloc_count;
13046 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
13047
13048 /* Check if the object enable ifc. */
13049 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
13050 R_NDS32_RELAX_ENTRY);
13051
13052 if (irel == NULL
13053 || irel >= irelend
13054 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
13055 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
13056 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_IFC_FLAG)))
13057 return TRUE;
13058
0c4bd9d9 13059 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
35c08157
KLC
13060 return FALSE;
13061
13062 table = nds32_elf_hash_table (info);
13063 ifc_loop_aware = table->ifc_loop_aware;
13064 while (irel != NULL && irel < irelend)
13065 {
13066 /* Traverse all relocation and gather all of them to build the list. */
13067
13068 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN)
13069 {
13070 if (ifc_loop_aware == 1
13071 && (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0)
13072 {
13073 /* Check the region if loop or not. If it is true and
13074 ifc-loop-aware is true, ignore the region till region end. */
13075 while (irel != NULL
13076 && irel < irelend
13077 && (ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
13078 || (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0))
13079 irel++;
13080 }
13081 }
13082
13083 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
13084 {
13085 insn = bfd_getb32 (contents + irel->r_offset);
13086 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
13087 r_symndx = ELF32_R_SYM (irel->r_info);
13088 if (r_symndx < symtab_hdr->sh_info)
13089 {
13090 /* Local symbol. */
13091 nds32_elf_ifc_insert_symbol (sec, NULL, irel, insn_with_reg);
13092 }
13093 else
13094 {
13095 /* External symbol. */
13096 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13097 nds32_elf_ifc_insert_symbol (sec, h, irel, insn_with_reg);
13098 }
13099 }
13100 irel++;
13101 }
13102 return TRUE;
13103}
13104
13105/* Determine whether j and jal should be substituted. */
13106
13107static void
13108nds32_elf_ifc_filter (struct bfd_link_info *info)
13109{
13110 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13111 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13112 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13113 struct elf_nds32_link_hash_table *table;
13114 int target_optimize;
13115 bfd_vma address;
13116
13117 table = nds32_elf_hash_table (info);
13118 target_optimize = table->target_optimize;
13119 while (ptr)
13120 {
13121 irel_ptr = ptr->irel_head;
13122 if (ptr->h == NULL)
13123 {
13124 /* Local symbol. */
13125 irel_keeper = irel_ptr;
13126 while (irel_ptr && irel_ptr->next)
13127 {
13128 /* Check there is jump target can be used. */
13129 if ((irel_ptr->next->irel->r_offset
13130 - irel_keeper->irel->r_offset) > 1022)
13131 irel_keeper = irel_ptr->next;
13132 else
13133 {
13134 ptr->enable = 1;
13135 irel_ptr->keep = 0;
13136 }
13137 irel_ptr = irel_ptr->next;
13138 }
13139 }
13140 else
13141 {
1c8f6a4d
KLC
13142 /* Global symbol. */
13143 /* We have to get the absolute address and decide
13144 whether to keep it or not. */
35c08157
KLC
13145 while (irel_ptr)
13146 {
13147 address = (irel_ptr->irel->r_offset
13148 + irel_ptr->sec->output_section->vma
13149 + irel_ptr->sec->output_offset);
13150 irel_ptr->addr = address;
13151 irel_ptr = irel_ptr->next;
13152 }
13153
13154 irel_ptr = ptr->irel_head;
13155 while (irel_ptr)
13156 {
1c8f6a4d 13157 /* Sort by address. */
35c08157
KLC
13158 struct elf_nds32_ifc_irel_list *irel_dest = irel_ptr;
13159 struct elf_nds32_ifc_irel_list *irel_temp = irel_ptr;
13160 struct elf_nds32_ifc_irel_list *irel_ptr_prev = NULL;
13161 struct elf_nds32_ifc_irel_list *irel_dest_prev = NULL;
13162
1c8f6a4d 13163 /* Get the smallest one. */
35c08157
KLC
13164 while (irel_temp->next)
13165 {
13166 if (irel_temp->next->addr < irel_dest->addr)
13167 {
13168 irel_dest_prev = irel_temp;
13169 irel_dest = irel_temp->next;
13170 }
13171 irel_temp = irel_temp->next;
13172 }
1c8f6a4d 13173
35c08157
KLC
13174 if (irel_dest != irel_ptr)
13175 {
13176 if (irel_ptr_prev)
13177 irel_ptr_prev->next = irel_dest;
13178 if (irel_dest_prev)
13179 irel_dest_prev->next = irel_ptr;
13180 irel_temp = irel_ptr->next;
13181 irel_ptr->next = irel_dest->next;
13182 irel_dest->next = irel_temp;
13183 }
13184 irel_ptr_prev = irel_ptr;
13185 irel_ptr = irel_ptr->next;
13186 }
13187
13188 irel_ptr = ptr->irel_head;
13189 irel_keeper = irel_ptr;
13190 while (irel_ptr && irel_ptr->next)
13191 {
13192 if ((irel_ptr->next->addr - irel_keeper->addr) > 1022)
13193 irel_keeper = irel_ptr->next;
13194 else
13195 {
13196 ptr->enable = 1;
13197 irel_ptr->keep = 0;
13198 }
13199 irel_ptr = irel_ptr->next;
13200 }
13201 }
13202
1c8f6a4d 13203 /* Ex9 enable. Reserve it for ex9. */
35c08157
KLC
13204 if ((target_optimize & NDS32_RELAX_EX9_ON)
13205 && ptr->irel_head != irel_keeper)
13206 ptr->enable = 0;
13207 ptr = ptr->next;
13208 }
13209}
13210
13211/* Determine whether j and jal should be substituted after ex9 done. */
13212
13213static void
13214nds32_elf_ifc_filter_after_ex9 (void)
13215{
13216 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13217 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13218
13219 while (ptr)
13220 {
13221 if (ptr->enable == 0)
13222 {
13223 /* Check whether ifc is applied or not. */
13224 irel_ptr = ptr->irel_head;
13225 ptr->ex9_enable = 1;
13226 while (irel_ptr)
13227 {
13228 if (ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_TRAN)
13229 {
13230 /* Ex9 already. */
13231 ptr->ex9_enable = 0;
13232 break;
13233 }
13234 irel_ptr = irel_ptr->next;
13235 }
13236 }
13237 ptr = ptr->next;
13238 }
13239}
13240
13241/* Wrapper to do ifc relaxation. */
13242
13243bfd_boolean
13244nds32_elf_ifc_finish (struct bfd_link_info *info)
13245{
13246 int relax_status;
13247 struct elf_nds32_link_hash_table *table;
13248
13249 table = nds32_elf_hash_table (info);
13250 relax_status = table->relax_status;
13251
13252 if (!(relax_status & NDS32_RELAX_JUMP_IFC_DONE))
13253 nds32_elf_ifc_filter (info);
13254 else
13255 nds32_elf_ifc_filter_after_ex9 ();
13256
13257 if (!nds32_elf_ifc_replace (info))
13258 return FALSE;
13259
13260 if (table)
13261 table->relax_status |= NDS32_RELAX_JUMP_IFC_DONE;
13262 return TRUE;
13263}
13264
13265/* Traverse the result of ifc filter and replace it with ifcall9. */
13266
13267static bfd_boolean
13268nds32_elf_ifc_replace (struct bfd_link_info *info)
13269{
13270 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13271 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13272 nds32_elf_blank_t *relax_blank_list = NULL;
13273 bfd_byte *contents = NULL;
13274 Elf_Internal_Rela *internal_relocs;
13275 Elf_Internal_Rela *irel;
13276 Elf_Internal_Rela *irelend;
13277 unsigned short insn16 = INSN_IFCALL9;
13278 struct elf_nds32_link_hash_table *table;
13279 int relax_status;
13280
13281 table = nds32_elf_hash_table (info);
13282 relax_status = table->relax_status;
13283
13284 while (ptr)
13285 {
13286 /* Traverse the ifc gather list, and replace the
13287 filter entries by ifcall9. */
13288 if ((!(relax_status & NDS32_RELAX_JUMP_IFC_DONE) && ptr->enable == 1)
1c8f6a4d
KLC
13289 || ((relax_status & NDS32_RELAX_JUMP_IFC_DONE)
13290 && ptr->ex9_enable == 1))
35c08157
KLC
13291 {
13292 irel_ptr = ptr->irel_head;
13293 if (ptr->h == NULL)
13294 {
13295 /* Local symbol. */
13296 internal_relocs = _bfd_elf_link_read_relocs
13297 (ptr->sec->owner, ptr->sec, NULL, NULL, TRUE /* keep_memory */);
13298 irelend = internal_relocs + ptr->sec->reloc_count;
13299
1c8f6a4d 13300 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
0c4bd9d9 13301 &contents, TRUE))
35c08157
KLC
13302 return FALSE;
13303
13304 while (irel_ptr)
13305 {
13306 if (irel_ptr->keep == 0 && irel_ptr->next)
13307 {
1c8f6a4d 13308 /* The one can be replaced. We have to check whether
35c08157
KLC
13309 there is any alignment point in the region. */
13310 irel = irel_ptr->irel;
1c8f6a4d
KLC
13311 while (((irel_ptr->next->keep == 0
13312 && irel < irel_ptr->next->irel)
35c08157
KLC
13313 || (irel_ptr->next->keep == 1 && irel < irelend))
13314 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13315 && (irel->r_addend & 0x1f) == 2))
13316 irel++;
13317 if (irel >= irelend
13318 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13319 && (irel->r_addend & 0x1f) == 2
1c8f6a4d
KLC
13320 && ((irel->r_offset - get_nds32_elf_blank_total
13321 (&relax_blank_list, irel->r_offset, 1))
13322 & 0x02) == 0))
35c08157
KLC
13323 {
13324 /* Replace by ifcall9. */
13325 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13326 if (!insert_nds32_elf_blank_recalc_total
13327 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13328 return FALSE;
13329 irel_ptr->irel->r_info =
1c8f6a4d
KLC
13330 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13331 R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC
13332 }
13333 }
13334 irel_ptr = irel_ptr->next;
13335 }
13336
13337 /* Delete the redundant code. */
13338 if (relax_blank_list)
13339 {
13340 nds32_elf_relax_delete_blanks (ptr->sec->owner, ptr->sec,
13341 relax_blank_list);
13342 relax_blank_list = NULL;
13343 }
13344 }
13345 else
13346 {
13347 /* Global symbol. */
13348 while (irel_ptr)
13349 {
13350 if (irel_ptr->keep == 0 && irel_ptr->next)
13351 {
13352 /* The one can be replaced, and we have to check
13353 whether there is any alignment point in the region. */
13354 internal_relocs = _bfd_elf_link_read_relocs
13355 (irel_ptr->sec->owner, irel_ptr->sec, NULL, NULL,
13356 TRUE /* keep_memory */);
13357 irelend = internal_relocs + irel_ptr->sec->reloc_count;
0c4bd9d9
KLC
13358 if (!nds32_get_section_contents (irel_ptr->sec->owner,
13359 irel_ptr->sec, &contents,
13360 TRUE))
35c08157
KLC
13361 return FALSE;
13362
13363 irel = irel_ptr->irel;
13364 while (((irel_ptr->sec == irel_ptr->next->sec
13365 && irel_ptr->next->keep == 0
13366 && irel < irel_ptr->next->irel)
13367 || ((irel_ptr->sec != irel_ptr->next->sec
13368 || irel_ptr->next->keep == 1)
13369 && irel < irelend))
13370 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13371 && (irel->r_addend & 0x1f) == 2))
13372 irel++;
13373 if (irel >= irelend
13374 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13375 && (irel->r_addend & 0x1f) == 2
13376 && ((irel->r_offset
13377 - get_nds32_elf_blank_total (&relax_blank_list,
13378 irel->r_offset, 1)) & 0x02) == 0))
13379 {
13380 /* Replace by ifcall9. */
13381 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13382 if (!insert_nds32_elf_blank_recalc_total
13383 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13384 return FALSE;
13385
13386 /* Delete the redundant code, and clear the relocation. */
13387 nds32_elf_relax_delete_blanks (irel_ptr->sec->owner,
13388 irel_ptr->sec,
13389 relax_blank_list);
13390 irel_ptr->irel->r_info =
1c8f6a4d
KLC
13391 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13392 R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC
13393 relax_blank_list = NULL;
13394 }
13395 }
13396
13397 irel_ptr = irel_ptr->next;
13398 }
13399 }
13400 }
13401 ptr = ptr->next;
13402 }
13403
13404 return TRUE;
13405}
13406
13407/* Relocate ifcall. */
13408
1c8f6a4d 13409static bfd_boolean
35c08157
KLC
13410nds32_elf_ifc_reloc (void)
13411{
13412 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13413 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13414 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13415 bfd_vma relocation, address;
13416 unsigned short insn16;
35c08157 13417 bfd_byte *contents = NULL;
1c8f6a4d
KLC
13418 static bfd_boolean done = FALSE;
13419
13420 if (done)
13421 return TRUE;
13422
13423 done = TRUE;
35c08157
KLC
13424
13425 while (ptr)
13426 {
1c8f6a4d 13427 /* Check the entry is enable ifcall. */
35c08157
KLC
13428 if (ptr->enable == 1 || ptr->ex9_enable == 1)
13429 {
1c8f6a4d 13430 /* Get the reserve jump. */
35c08157
KLC
13431 irel_ptr = ptr->irel_head;
13432 while (irel_ptr)
13433 {
13434 if (irel_ptr->keep == 1)
13435 {
13436 irel_keeper = irel_ptr;
13437 break;
13438 }
13439 irel_ptr = irel_ptr->next;
13440 }
13441
13442 irel_ptr = ptr->irel_head;
13443 if (ptr->h == NULL)
13444 {
13445 /* Local symbol. */
0c4bd9d9
KLC
13446 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
13447 &contents, TRUE))
35c08157
KLC
13448 return FALSE;
13449
13450 while (irel_ptr)
13451 {
13452 if (irel_ptr->keep == 0
1c8f6a4d 13453 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
35c08157
KLC
13454 {
13455 relocation = irel_keeper->irel->r_offset;
13456 relocation = relocation - irel_ptr->irel->r_offset;
13457 while (irel_keeper && relocation > 1022)
13458 {
13459 irel_keeper = irel_keeper->next;
13460 if (irel_keeper && irel_keeper->keep == 1)
13461 {
13462 relocation = irel_keeper->irel->r_offset;
13463 relocation = relocation - irel_ptr->irel->r_offset;
13464 }
13465 }
13466 if (relocation > 1022)
13467 {
13468 /* Double check. */
13469 irel_keeper = ptr->irel_head;
13470 while (irel_keeper)
13471 {
13472 if (irel_keeper->keep == 1)
13473 {
13474 relocation = irel_keeper->irel->r_offset;
13475 relocation = relocation - irel_ptr->irel->r_offset;
13476 }
13477 if (relocation <= 1022)
13478 break;
13479 irel_keeper = irel_keeper->next;
13480 }
13481 if (!irel_keeper)
13482 return FALSE;
13483 }
1c8f6a4d
KLC
13484 irel_ptr->irel->r_info =
13485 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13486 R_NDS32_NONE);
35c08157
KLC
13487 insn16 = INSN_IFCALL9 | (relocation >> 1);
13488 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13489 }
13490 irel_ptr = irel_ptr->next;
13491 }
13492 }
13493 else
13494 {
13495 /* Global symbol. */
13496 while (irel_ptr)
13497 {
13498 if (irel_ptr->keep == 0
1c8f6a4d 13499 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
35c08157 13500 {
1c8f6a4d 13501 /* Get the distance between ifcall and jump. */
35c08157
KLC
13502 relocation = (irel_keeper->irel->r_offset
13503 + irel_keeper->sec->output_section->vma
13504 + irel_keeper->sec->output_offset);
13505 address = (irel_ptr->irel->r_offset
13506 + irel_ptr->sec->output_section->vma
13507 + irel_ptr->sec->output_offset);
13508 relocation = relocation - address;
1c8f6a4d
KLC
13509
13510 /* The distance is over ragne, find callee again. */
35c08157
KLC
13511 while (irel_keeper && relocation > 1022)
13512 {
13513 irel_keeper = irel_keeper->next;
13514 if (irel_keeper && irel_keeper->keep ==1)
13515 {
13516 relocation = (irel_keeper->irel->r_offset
13517 + irel_keeper->sec->output_section->vma
13518 + irel_keeper->sec->output_offset);
13519 relocation = relocation - address;
13520 }
13521 }
13522
13523 if (relocation > 1022)
13524 {
13525 /* Double check. */
13526 irel_keeper = ptr->irel_head;
13527 while (irel_keeper)
13528 {
13529 if (irel_keeper->keep == 1)
13530 {
13531
13532 relocation = (irel_keeper->irel->r_offset
13533 + irel_keeper->sec->output_section->vma
13534 + irel_keeper->sec->output_offset);
13535 relocation = relocation - address;
13536 }
13537 if (relocation <= 1022)
13538 break;
13539 irel_keeper = irel_keeper->next;
13540 }
13541 if (!irel_keeper)
13542 return FALSE;
13543 }
13544 if (!nds32_get_section_contents
0c4bd9d9 13545 (irel_ptr->sec->owner, irel_ptr->sec, &contents, TRUE))
1c8f6a4d
KLC
13546 return FALSE;
13547 insn16 = INSN_IFCALL9 | (relocation >> 1);
13548 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13549 irel_ptr->irel->r_info =
13550 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13551 R_NDS32_NONE);
35c08157
KLC
13552 }
13553 irel_ptr =irel_ptr->next;
13554 }
13555 }
13556 }
13557 ptr = ptr->next;
13558 }
13559
13560 return TRUE;
13561}
13562
13563/* End of IFC relaxation. */
13564\f
13565/* EX9 Instruction Table Relaxation. */
13566
13567/* Global hash list. */
13568struct elf_link_hash_entry_list
13569{
13570 struct elf_link_hash_entry *h;
13571 struct elf_link_hash_entry_list *next;
13572};
13573
13574/* Save different destination but same insn. */
13575struct elf_link_hash_entry_mul_list
13576{
13577 /* Global symbol times. */
13578 int times;
13579 /* Save relocation for each global symbol but useful?? */
13580 Elf_Internal_Rela *irel;
13581 /* For sethi, two sethi may have the same high-part but different low-parts. */
13582 Elf_Internal_Rela rel_backup;
13583 struct elf_link_hash_entry_list *h_list;
13584 struct elf_link_hash_entry_mul_list *next;
13585};
13586
13587/* Instruction hash table. */
13588struct elf_nds32_code_hash_entry
13589{
13590 struct bfd_hash_entry root;
13591 int times;
13592 /* For insn that can use relocation or constant ex: sethi. */
13593 int const_insn;
13594 asection *sec;
13595 struct elf_link_hash_entry_mul_list *m_list;
13596 /* Using r_addend. */
13597 Elf_Internal_Rela *irel;
13598 /* Using r_info. */
13599 Elf_Internal_Rela rel_backup;
13600};
13601
13602/* Instruction count list. */
13603struct elf_nds32_insn_times_entry
13604{
13605 const char *string;
13606 int times;
13607 int order;
13608 asection *sec;
13609 struct elf_link_hash_entry_mul_list *m_list;
13610 Elf_Internal_Rela *irel;
13611 Elf_Internal_Rela rel_backup;
13612 struct elf_nds32_insn_times_entry *next;
13613};
13614
13615/* J and JAL symbol list. */
13616struct elf_nds32_symbol_entry
13617{
13618 char *string;
13619 unsigned long insn;
13620 struct elf_nds32_symbol_entry *next;
13621};
13622
13623/* Relocation list. */
13624struct elf_nds32_irel_entry
13625{
13626 Elf_Internal_Rela *irel;
13627 struct elf_nds32_irel_entry *next;
13628};
13629
13630/* ex9.it insn need to be fixed. */
13631struct elf_nds32_ex9_refix
13632{
13633 Elf_Internal_Rela *irel;
13634 asection *sec;
13635 struct elf_link_hash_entry *h;
13636 int order;
13637 struct elf_nds32_ex9_refix *next;
13638};
13639
13640static struct bfd_hash_table ex9_code_table;
13641static struct elf_nds32_insn_times_entry *ex9_insn_head = NULL;
13642static struct elf_nds32_ex9_refix *ex9_refix_head = NULL;
13643
13644/* EX9 hash function. */
13645
13646static struct bfd_hash_entry *
13647nds32_elf_code_hash_newfunc (struct bfd_hash_entry *entry,
13648 struct bfd_hash_table *table,
13649 const char *string)
13650{
13651 struct elf_nds32_code_hash_entry *ret;
13652
13653 /* Allocate the structure if it has not already been allocated by a
13654 subclass. */
13655 if (entry == NULL)
13656 {
13657 entry = (struct bfd_hash_entry *)
13658 bfd_hash_allocate (table, sizeof (*ret));
13659 if (entry == NULL)
13660 return entry;
13661 }
13662
13663 /* Call the allocation method of the superclass. */
13664 entry = bfd_hash_newfunc (entry, table, string);
13665 if (entry == NULL)
13666 return entry;
13667
13668 ret = (struct elf_nds32_code_hash_entry*) entry;
13669 ret->times = 0;
13670 ret->const_insn = 0;
13671 ret->m_list = NULL;
13672 ret->sec = NULL;
13673 ret->irel = NULL;
13674 return &ret->root;
13675}
13676
13677/* Insert ex9 entry
13678 this insert must be stable sorted by times. */
13679
13680static void
13681nds32_elf_ex9_insert_entry (struct elf_nds32_insn_times_entry *ptr)
13682{
13683 struct elf_nds32_insn_times_entry *temp;
13684 struct elf_nds32_insn_times_entry *temp2;
13685
13686 if (ex9_insn_head == NULL)
13687 {
13688 ex9_insn_head = ptr;
13689 ptr->next = NULL;
13690 }
13691 else
13692 {
13693 temp = ex9_insn_head;
13694 temp2 = ex9_insn_head;
13695 while (temp->next &&
13696 (temp->next->times >= ptr->times
13697 || temp->times == -1))
13698 {
13699 if (temp->times == -1)
13700 temp2 = temp;
13701 temp = temp->next;
13702 }
13703 if (ptr->times > temp->times && temp->times != -1)
13704 {
13705 ptr->next = temp;
13706 if (temp2->times == -1)
13707 temp2->next = ptr;
13708 else
13709 ex9_insn_head = ptr;
13710 }
13711 else if (temp->next == NULL)
13712 {
13713 temp->next = ptr;
13714 ptr->next = NULL;
13715 }
13716 else
13717 {
13718 ptr->next = temp->next;
13719 temp->next = ptr;
13720 }
13721 }
13722}
13723
13724/* Examine each insn times in hash table.
13725 Handle multi-link hash entry.
13726
13727 TODO: This function doesn't assign so much info since it is fake. */
13728
13729static int
13730nds32_elf_examine_insn_times (struct elf_nds32_code_hash_entry *h)
13731{
13732 struct elf_nds32_insn_times_entry *ptr;
13733 int times;
13734
13735 if (h->m_list == NULL)
13736 {
13737 /* Local symbol insn or insn without relocation. */
13738 if (h->times < 3)
13739 return TRUE;
13740
13741 ptr = (struct elf_nds32_insn_times_entry *)
13742 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13743 ptr->times = h->times;
13744 ptr->string = h->root.string;
13745 ptr->m_list = NULL;
13746 ptr->sec = h->sec;
13747 ptr->irel = h->irel;
13748 ptr->rel_backup = h->rel_backup;
13749 nds32_elf_ex9_insert_entry (ptr);
13750 }
13751 else
13752 {
13753 /* Global symbol insn. */
13754 /* Only sethi insn has multiple m_list. */
13755 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
13756
13757 times = 0;
13758 while (m_list)
13759 {
13760 times += m_list->times;
13761 m_list = m_list->next;
13762 }
13763 if (times >= 3)
13764 {
13765 m_list = h->m_list;
13766 ptr = (struct elf_nds32_insn_times_entry *)
13767 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13768 ptr->times = times; /* Use the total times. */
13769 ptr->string = h->root.string;
13770 ptr->m_list = m_list;
13771 ptr->sec = h->sec;
13772 ptr->irel = m_list->irel;
13773 ptr->rel_backup = m_list->rel_backup;
13774 nds32_elf_ex9_insert_entry (ptr);
13775 }
13776 if (h->const_insn == 1)
13777 {
13778 /* sethi with constant value. */
13779 if (h->times < 3)
13780 return TRUE;
13781
13782 ptr = (struct elf_nds32_insn_times_entry *)
13783 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13784 ptr->times = h->times;
13785 ptr->string = h->root.string;
13786 ptr->m_list = NULL;
13787 ptr->sec = NULL;
13788 ptr->irel = NULL;
13789 ptr->rel_backup = h->rel_backup;
13790 nds32_elf_ex9_insert_entry (ptr);
13791 }
13792 }
13793 return TRUE;
13794}
13795
13796/* Count each insn times in hash table.
13797 Handle multi-link hash entry. */
13798
13799static int
13800nds32_elf_count_insn_times (struct elf_nds32_code_hash_entry *h)
13801{
13802 int reservation, times;
13803 unsigned long relocation, min_relocation;
13804 struct elf_nds32_insn_times_entry *ptr;
13805
13806 if (h->m_list == NULL)
13807 {
13808 /* Local symbol insn or insn without relocation. */
13809 if (h->times < 3)
13810 return TRUE;
13811 ptr = (struct elf_nds32_insn_times_entry *)
13812 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13813 ptr->times = h->times;
13814 ptr->string = h->root.string;
13815 ptr->m_list = NULL;
13816 ptr->sec = h->sec;
13817 ptr->irel = h->irel;
13818 ptr->rel_backup = h->rel_backup;
13819 nds32_elf_ex9_insert_entry (ptr);
13820 }
13821 else
13822 {
13823 /* Global symbol insn. */
13824 /* Only sethi insn has multiple m_list. */
13825 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
13826
13827 if (ELF32_R_TYPE (m_list->rel_backup.r_info) == R_NDS32_HI20_RELA
13828 && m_list->next != NULL)
13829 {
13830 /* Sethi insn has different symbol or addend but has same hi20. */
13831 times = 0;
13832 reservation = 1;
13833 relocation = 0;
13834 min_relocation = 0xffffffff;
13835 while (m_list)
13836 {
13837 /* Get the minimum sethi address
13838 and calculate how many entry the sethi-list have to use. */
13839 if ((m_list->h_list->h->root.type == bfd_link_hash_defined
13840 || m_list->h_list->h->root.type == bfd_link_hash_defweak)
13841 && (m_list->h_list->h->root.u.def.section != NULL
13842 && m_list->h_list->h->root.u.def.section->output_section != NULL))
13843 {
13844 relocation = (m_list->h_list->h->root.u.def.value +
13845 m_list->h_list->h->root.u.def.section->output_section->vma +
13846 m_list->h_list->h->root.u.def.section->output_offset);
13847 relocation += m_list->irel->r_addend;
13848 }
13849 else
13850 relocation = 0;
13851 if (relocation < min_relocation)
13852 min_relocation = relocation;
13853 times += m_list->times;
13854 m_list = m_list->next;
13855 }
13856 if (min_relocation < ex9_relax_size)
13857 reservation = (min_relocation >> 12) + 1;
13858 else
13859 reservation = (min_relocation >> 12)
13860 - ((min_relocation - ex9_relax_size) >> 12) + 1;
13861 if (reservation < (times / 3))
13862 {
13863 /* Efficient enough to use ex9. */
13864 int i;
13865
13866 for (i = reservation ; i > 0; i--)
13867 {
13868 /* Allocate number of reservation ex9 entry. */
13869 ptr = (struct elf_nds32_insn_times_entry *)
13870 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13871 ptr->times = h->m_list->times / reservation;
13872 ptr->string = h->root.string;
13873 ptr->m_list = h->m_list;
13874 ptr->sec = h->sec;
13875 ptr->irel = h->m_list->irel;
13876 ptr->rel_backup = h->m_list->rel_backup;
13877 nds32_elf_ex9_insert_entry (ptr);
13878 }
13879 }
13880 }
13881 else
13882 {
13883 /* Normal global symbol that means no different address symbol
13884 using same ex9 entry. */
13885 if (m_list->times >= 3)
13886 {
13887 ptr = (struct elf_nds32_insn_times_entry *)
13888 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13889 ptr->times = m_list->times;
13890 ptr->string = h->root.string;
13891 ptr->m_list = h->m_list;
13892 ptr->sec = h->sec;
13893 ptr->irel = h->m_list->irel;
13894 ptr->rel_backup = h->m_list->rel_backup;
13895 nds32_elf_ex9_insert_entry (ptr);
13896 }
13897 }
13898
13899 if (h->const_insn == 1)
13900 {
13901 /* sethi with constant value. */
13902 if (h->times < 3)
13903 return TRUE;
13904
13905 ptr = (struct elf_nds32_insn_times_entry *)
13906 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13907 ptr->times = h->times;
13908 ptr->string = h->root.string;
13909 ptr->m_list = NULL;
13910 ptr->sec = NULL;
13911 ptr->irel = NULL;
13912 ptr->rel_backup = h->rel_backup;
13913 nds32_elf_ex9_insert_entry (ptr);
13914 }
13915 }
13916
13917 return TRUE;
13918}
13919
13920/* Hash table traverse function. */
13921
13922static void
13923nds32_elf_code_hash_traverse (int (*func) (struct elf_nds32_code_hash_entry*))
13924{
13925 unsigned int i;
13926
13927 ex9_code_table.frozen = 1;
13928 for (i = 0; i < ex9_code_table.size; i++)
13929 {
13930 struct bfd_hash_entry *p;
13931
13932 for (p = ex9_code_table.table[i]; p != NULL; p = p->next)
13933 if (!func ((struct elf_nds32_code_hash_entry *) p))
13934 goto out;
13935 }
13936out:
13937 ex9_code_table.frozen = 0;
13938}
13939
13940
13941/* Give order number to insn list. */
13942
13943static void
13944nds32_elf_order_insn_times (struct bfd_link_info *info)
13945{
13946 struct elf_nds32_insn_times_entry *ex9_insn;
1c8f6a4d 13947 struct elf_nds32_insn_times_entry *temp = NULL;
35c08157 13948 struct elf_nds32_link_hash_table *table;
35c08157 13949 int ex9_limit;
1c8f6a4d
KLC
13950 int number = 0;
13951
13952 if (ex9_insn_head == NULL)
13953 return;
35c08157
KLC
13954
13955/* The max number of entries is 512. */
13956 ex9_insn = ex9_insn_head;
13957 table = nds32_elf_hash_table (info);
13958 ex9_limit = table->ex9_limit;
13959
35c08157
KLC
13960 ex9_insn = ex9_insn_head;
13961
1c8f6a4d 13962 while (ex9_insn != NULL && number < ex9_limit)
35c08157 13963 {
1c8f6a4d 13964 ex9_insn->order = number;
35c08157 13965 number++;
1c8f6a4d 13966 temp = ex9_insn;
35c08157
KLC
13967 ex9_insn = ex9_insn->next;
13968 }
13969
1c8f6a4d
KLC
13970 if (ex9_insn && temp)
13971 temp->next = NULL;
35c08157
KLC
13972
13973 while (ex9_insn != NULL)
13974 {
13975 /* Free useless entry. */
13976 temp = ex9_insn;
13977 ex9_insn = ex9_insn->next;
13978 free (temp);
13979 }
13980}
13981
13982/* Build .ex9.itable section. */
13983
13984static void
13985nds32_elf_ex9_build_itable (struct bfd_link_info *link_info)
13986{
13987 asection *table_sec;
13988 struct elf_nds32_insn_times_entry *ptr;
13989 bfd *it_abfd;
13990 int number = 0;
13991 bfd_byte *contents = NULL;
13992
13993 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
c72f2fb2 13994 it_abfd = it_abfd->link.next)
35c08157
KLC
13995 {
13996 /* Find the section .ex9.itable, and put all entries into it. */
13997 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
13998 if (table_sec != NULL)
13999 {
0c4bd9d9 14000 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE))
35c08157
KLC
14001 return;
14002
14003 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
14004 number++;
14005
14006 table_sec->size = number * 4;
14007
14008 if (number == 0)
1c8f6a4d 14009 return;
35c08157
KLC
14010
14011 elf_elfheader (link_info->output_bfd)->e_flags |= E_NDS32_HAS_EX9_INST;
14012 number = 0;
14013 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
14014 {
14015 long val;
14016
14017 val = strtol (ptr->string, NULL, 16);
14018 bfd_putb32 ((bfd_vma) val, (char *) contents + (number * 4));
14019 number++;
14020 }
14021 break;
14022 }
14023 }
14024}
14025
14026/* Get insn with regs according to relocation type. */
14027
14028static void
14029nds32_elf_get_insn_with_reg (Elf_Internal_Rela *irel,
1c8f6a4d 14030 uint32_t insn, uint32_t *insn_with_reg)
35c08157
KLC
14031{
14032 reloc_howto_type *howto = NULL;
14033
14034 if (irel == NULL
14035 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
14036 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
14037 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
14038 {
14039 *insn_with_reg = insn;
14040 return;
14041 }
14042
14043 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
14044 *insn_with_reg = insn & (0xffffffff ^ howto->dst_mask);
14045}
14046
14047/* Mask number of address bits according to relocation. */
14048
14049static unsigned long
14050nds32_elf_irel_mask (Elf_Internal_Rela *irel)
14051{
14052 reloc_howto_type *howto = NULL;
14053
14054 if (irel == NULL
14055 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
14056 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
14057 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
14058 return 0;
14059
14060 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
14061 return howto->dst_mask;
14062}
14063
14064static void
14065nds32_elf_insert_irel_entry (struct elf_nds32_irel_entry **irel_list,
14066 struct elf_nds32_irel_entry *irel_ptr)
14067{
14068 if (*irel_list == NULL)
14069 {
14070 *irel_list = irel_ptr;
14071 irel_ptr->next = NULL;
14072 }
14073 else
14074 {
14075 irel_ptr->next = *irel_list;
14076 *irel_list = irel_ptr;
14077 }
14078}
14079
14080static void
14081nds32_elf_ex9_insert_fix (asection * sec, Elf_Internal_Rela * irel,
14082 struct elf_link_hash_entry *h, int order)
14083{
14084 struct elf_nds32_ex9_refix *ptr;
14085
14086 ptr = bfd_malloc (sizeof (struct elf_nds32_ex9_refix));
14087 ptr->sec = sec;
14088 ptr->irel = irel;
14089 ptr->h = h;
14090 ptr->order = order;
14091 ptr->next = NULL;
14092
14093 if (ex9_refix_head == NULL)
14094 ex9_refix_head = ptr;
14095 else
14096 {
14097 struct elf_nds32_ex9_refix *temp = ex9_refix_head;
14098
14099 while (temp->next != NULL)
14100 temp = temp->next;
14101 temp->next = ptr;
14102 }
14103}
14104
14105enum
14106{
14107 DATA_EXIST = 1,
14108 CLEAN_PRE = 1 << 1,
14109 PUSH_PRE = 1 << 2
14110};
14111
14112/* Check relocation type if supporting for ex9. */
14113
14114static int
14115nds32_elf_ex9_relocation_check (struct bfd_link_info *info,
14116 Elf_Internal_Rela **irel,
14117 Elf_Internal_Rela *irelend,
14118 nds32_elf_blank_t *relax_blank_list,
f4cb41f4 14119 asection *sec,bfd_vma *off,
35c08157
KLC
14120 bfd_byte *contents)
14121{
14122 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
14123 bfd_boolean nested_ex9, nested_loop;
14124 bfd_boolean ex9_loop_aware;
14125 /* We use the highest 1 byte of result to record
14126 how many bytes location counter has to move. */
14127 int result = 0;
14128 Elf_Internal_Rela *irel_save = NULL;
14129 struct elf_nds32_link_hash_table *table;
14130
14131 table = nds32_elf_hash_table (info);
14132 ex9_loop_aware = table->ex9_loop_aware;
14133
14134 while ((*irel) != NULL && (*irel) < irelend && *off == (*irel)->r_offset)
14135 {
14136 switch (ELF32_R_TYPE ((*irel)->r_info))
14137 {
14138 case R_NDS32_RELAX_REGION_BEGIN:
14139 /* Ignore code block. */
14140 nested_ex9 = FALSE;
14141 nested_loop = FALSE;
14142 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG)
14143 || (ex9_loop_aware
14144 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG)))
14145 {
14146 /* Check the region if loop or not. If it is true and
14147 ex9-loop-aware is true, ignore the region till region end. */
14148 /* To save the status for in .no_relax ex9 region and
14149 loop region to conform the block can do ex9 relaxation. */
14150 nested_ex9 = ((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG);
14151 nested_loop = (ex9_loop_aware
14152 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG));
14153 while ((*irel) && (*irel) < irelend && (nested_ex9 || nested_loop))
14154 {
14155 (*irel)++;
14156 if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_BEGIN)
14157 {
14158 /* There may be nested region. */
14159 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14160 nested_ex9 = TRUE;
14161 else if (ex9_loop_aware
14162 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14163 nested_loop = TRUE;
14164 }
14165 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_END)
14166 {
14167 /* The end of region. */
14168 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14169 nested_ex9 = FALSE;
14170 else if (ex9_loop_aware
14171 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14172 nested_loop = FALSE;
14173 }
1c8f6a4d 14174 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_LABEL
35c08157
KLC
14175 && ((*irel)->r_addend & 0x1f) == 2)
14176 {
14177 /* Alignment exist in the region. */
14178 result |= CLEAN_PRE;
14179 if (((*irel)->r_offset -
14180 get_nds32_elf_blank_total (&relax_blank_list,
14181 (*irel)->r_offset, 0)) & 0x02)
14182 result |= PUSH_PRE;
14183 }
14184 }
14185 if ((*irel) >= irelend)
14186 *off = sec->size;
14187 else
14188 *off = (*irel)->r_offset;
14189
14190 /* The final instruction in the region, regard this one as data to ignore it. */
14191 result |= DATA_EXIST;
14192 return result;
14193 }
14194 break;
14195
14196 case R_NDS32_LABEL:
1c8f6a4d 14197 if (((*irel)->r_addend & 0x1f) == 2)
35c08157
KLC
14198 {
14199 /* Check this point is align and decide to do ex9 or not. */
14200 result |= CLEAN_PRE;
14201 if (((*irel)->r_offset -
14202 get_nds32_elf_blank_total (&relax_blank_list,
14203 (*irel)->r_offset, 0)) & 0x02)
14204 result |= PUSH_PRE;
14205 }
14206 break;
14207 case R_NDS32_32_RELA:
14208 /* Data. */
14209 result |= (4 << 24);
14210 result |= DATA_EXIST;
14211 break;
14212 case R_NDS32_16_RELA:
14213 /* Data. */
14214 result |= (2 << 24);
14215 result |= DATA_EXIST;
14216 break;
14217 case R_NDS32_DATA:
14218 /* Data. */
14219 /* The least code alignment is 2. If the data is only one byte,
14220 we have to shift one more byte. */
14221 if ((*irel)->r_addend == 1)
14222 result |= ((*irel)->r_addend << 25) ;
14223 else
14224 result |= ((*irel)->r_addend << 24) ;
14225
14226 result |= DATA_EXIST;
14227 break;
14228
14229 case R_NDS32_25_PCREL_RELA:
14230 case R_NDS32_SDA16S3_RELA:
14231 case R_NDS32_SDA15S3_RELA:
14232 case R_NDS32_SDA15S3:
14233 case R_NDS32_SDA17S2_RELA:
14234 case R_NDS32_SDA15S2_RELA:
14235 case R_NDS32_SDA12S2_SP_RELA:
14236 case R_NDS32_SDA12S2_DP_RELA:
14237 case R_NDS32_SDA15S2:
14238 case R_NDS32_SDA18S1_RELA:
14239 case R_NDS32_SDA15S1_RELA:
14240 case R_NDS32_SDA15S1:
14241 case R_NDS32_SDA19S0_RELA:
14242 case R_NDS32_SDA15S0_RELA:
14243 case R_NDS32_SDA15S0:
14244 case R_NDS32_HI20_RELA:
14245 case R_NDS32_LO12S0_ORI_RELA:
14246 case R_NDS32_LO12S0_RELA:
14247 case R_NDS32_LO12S1_RELA:
14248 case R_NDS32_LO12S2_RELA:
14249 /* These relocation is supported ex9 relaxation currently. */
14250 /* We have to save the relocation for using later, since we have
14251 to check there is any alignment in the same address. */
14252 irel_save = *irel;
14253 break;
14254 default:
14255 /* Not support relocations. */
14256 if (ELF32_R_TYPE ((*irel)->r_info) < ARRAY_SIZE (nds32_elf_howto_table)
1c8f6a4d
KLC
14257 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_NONE
14258 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_INSN16)
35c08157
KLC
14259 {
14260 /* Note: To optimize aggressively, it maybe can ignore R_NDS32_INSN16 here.
14261 But we have to consider if there is any side-effect. */
14262 if (!(result & DATA_EXIST))
14263 {
14264 /* We have to confirm there is no data relocation in the
14265 same address. In general case, this won't happen. */
14266 /* We have to do ex9 conservative, for those relocation not
14267 considerd we ignore instruction. */
14268 result |= DATA_EXIST;
14269 if (*(contents + *off) & 0x80)
14270 result |= (2 << 24);
14271 else
14272 result |= (4 << 24);
14273 break;
14274 }
14275 }
14276 }
14277 if ((*irel) < irelend
14278 && ((*irel) + 1) < irelend
14279 && (*irel)->r_offset == ((*irel) + 1)->r_offset)
14280 /* There are relocations pointing to the same address, we have to
14281 check all of them. */
14282 (*irel)++;
14283 else
14284 {
14285 if (irel_save)
14286 *irel = irel_save;
14287 return result;
14288 }
14289 }
14290 return result;
14291}
14292
1c8f6a4d
KLC
14293/* Replace with ex9 instruction. */
14294
14295static bfd_boolean
14296nds32_elf_ex9_push_insn (uint16_t insn16, bfd_byte *contents, bfd_vma pre_off,
14297 nds32_elf_blank_t **relax_blank_list,
14298 struct elf_nds32_irel_entry *pre_irel_ptr,
14299 struct elf_nds32_irel_entry **irel_list)
14300{
14301 if (insn16 != 0)
14302 {
14303 /* Implement the ex9 relaxation. */
14304 bfd_putb16 (insn16, contents + pre_off);
14305 if (!insert_nds32_elf_blank_recalc_total (relax_blank_list,
14306 pre_off + 2, 2))
14307 return FALSE;
14308 if (pre_irel_ptr != NULL)
14309 nds32_elf_insert_irel_entry (irel_list, pre_irel_ptr);
14310 }
14311 return TRUE;
14312}
14313
35c08157
KLC
14314/* Replace input file instruction which is in ex9 itable. */
14315
14316static bfd_boolean
14317nds32_elf_ex9_replace_instruction (struct bfd_link_info *info, bfd *abfd, asection *sec)
14318{
14319 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
14320 bfd_byte *contents = NULL;
1c8f6a4d
KLC
14321 bfd_vma off;
14322 uint16_t insn16, insn_ex9;
35c08157 14323 /* `pre_*' are used to track previous instruction that can use ex9.it. */
1c8f6a4d
KLC
14324 bfd_vma pre_off = -1;
14325 uint16_t pre_insn16 = 0;
35c08157
KLC
14326 struct elf_nds32_irel_entry *pre_irel_ptr = NULL;
14327 Elf_Internal_Rela *internal_relocs;
14328 Elf_Internal_Rela *irel;
14329 Elf_Internal_Rela *irelend;
14330 Elf_Internal_Shdr *symtab_hdr;
14331 Elf_Internal_Sym *isym = NULL;
14332 nds32_elf_blank_t *relax_blank_list = NULL;
1c8f6a4d
KLC
14333 uint32_t insn = 0;
14334 uint32_t insn_with_reg = 0;
14335 uint32_t it_insn;
14336 uint32_t it_insn_with_reg;
35c08157
KLC
14337 unsigned long r_symndx;
14338 asection *isec;
14339 struct elf_nds32_irel_entry *irel_list = NULL;
14340 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
14341 int data_flag, do_replace, save_irel;
1c8f6a4d
KLC
14342 struct elf_link_hash_entry_list *h_list;
14343
35c08157
KLC
14344
14345 /* Load section instructions, relocations, and symbol table. */
0c4bd9d9 14346 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
35c08157
KLC
14347 || !nds32_get_local_syms (abfd, sec, &isym))
14348 return FALSE;
1c8f6a4d
KLC
14349 internal_relocs =
14350 _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, TRUE /* keep_memory */);
35c08157
KLC
14351 irelend = internal_relocs + sec->reloc_count;
14352 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
14353
14354 off = 0;
14355
14356 /* Check if the object enable ex9. */
1c8f6a4d
KLC
14357 irel = find_relocs_at_address (internal_relocs, internal_relocs,
14358 irelend, R_NDS32_RELAX_ENTRY);
35c08157
KLC
14359
14360 /* Check this section trigger ex9 relaxation. */
14361 if (irel == NULL
14362 || irel >= irelend
14363 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
14364 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
14365 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
14366 return TRUE;
14367
14368 irel = internal_relocs;
14369
14370 /* Check alignment and fetch proper relocation. */
14371 while (off < sec->size)
14372 {
14373 struct elf_link_hash_entry *h = NULL;
14374 struct elf_nds32_irel_entry *irel_ptr = NULL;
14375
14376 /* Syn the instruction and the relocation. */
14377 while (irel != NULL && irel < irelend && irel->r_offset < off)
14378 irel++;
14379
14380 data_flag = nds32_elf_ex9_relocation_check (info, &irel, irelend,
14381 relax_blank_list, sec,
14382 &off, contents);
14383 if (data_flag & PUSH_PRE)
1c8f6a4d
KLC
14384 if (!nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14385 &relax_blank_list, pre_irel_ptr,
14386 &irel_list))
14387 return FALSE;
35c08157
KLC
14388
14389 if (data_flag & CLEAN_PRE)
14390 {
14391 pre_off = 0;
14392 pre_insn16 = 0;
14393 pre_irel_ptr = NULL;
14394 }
14395 if (data_flag & DATA_EXIST)
14396 {
14397 /* We save the move offset in the highest byte. */
14398 off += (data_flag >> 24);
14399 continue;
14400 }
14401
14402 if (*(contents + off) & 0x80)
14403 {
14404 /* 2-byte instruction. */
14405 off += 2;
14406 continue;
14407 }
14408
14409 /* Load the instruction and its opcode with register for comparing. */
14410 ex9_insn = ex9_insn_head;
14411 insn = bfd_getb32 (contents + off);
14412 insn_with_reg = 0;
14413 while (ex9_insn)
14414 {
14415 it_insn = strtol (ex9_insn->string, NULL, 16);
14416 it_insn_with_reg = 0;
14417 do_replace = 0;
14418 save_irel = 0;
14419
14420 if (irel != NULL && irel < irelend && irel->r_offset == off)
14421 {
14422 /* Insn with relocation. */
14423 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
14424
14425 if (ex9_insn->irel != NULL)
1c8f6a4d
KLC
14426 nds32_elf_get_insn_with_reg (ex9_insn->irel, it_insn,
14427 &it_insn_with_reg);
35c08157
KLC
14428
14429 if (ex9_insn->irel != NULL
1c8f6a4d
KLC
14430 && (ELF32_R_TYPE (irel->r_info) ==
14431 ELF32_R_TYPE (ex9_insn->irel->r_info))
35c08157
KLC
14432 && (insn_with_reg == it_insn_with_reg))
14433 {
14434 /* Insn relocation and format is the same as table entry. */
14435
14436 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
14437 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
14438 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
14439 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
14440 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
14441 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
14442 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
14443 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
14444 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
14445 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
14446 && ELF32_R_TYPE (irel->r_info) <=
14447 R_NDS32_SDA12S2_SP_RELA)
14448 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
14449 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
14450 {
14451 r_symndx = ELF32_R_SYM (irel->r_info);
14452 if (r_symndx < symtab_hdr->sh_info)
14453 {
14454 /* Local symbol. */
14455 int shndx = isym[r_symndx].st_shndx;
14456
14457 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14458 if (ex9_insn->sec == isec
14459 && ex9_insn->irel->r_addend == irel->r_addend
14460 && ex9_insn->irel->r_info == irel->r_info)
14461 {
14462 do_replace = 1;
14463 save_irel = 1;
14464 }
14465 }
14466 else
14467 {
14468 /* External symbol. */
14469 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14470 if (ex9_insn->m_list)
14471 {
35c08157
KLC
14472 h_list = ex9_insn->m_list->h_list;
14473 while (h_list)
14474 {
14475 if (h == h_list->h
1c8f6a4d
KLC
14476 && (ex9_insn->m_list->irel->r_addend ==
14477 irel->r_addend))
35c08157
KLC
14478 {
14479 do_replace = 1;
14480 save_irel = 1;
14481 break;
14482 }
14483 h_list = h_list->next;
14484 }
14485 }
14486 }
14487 }
14488 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA)
14489 {
14490 r_symndx = ELF32_R_SYM (irel->r_info);
14491 if (r_symndx < symtab_hdr->sh_info)
14492 {
14493 /* Local symbols. Compare its base symbol and offset. */
14494 int shndx = isym[r_symndx].st_shndx;
14495
14496 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14497 if (ex9_insn->sec == isec
14498 && ex9_insn->irel->r_addend == irel->r_addend
14499 && ex9_insn->irel->r_info == irel->r_info)
14500 {
14501 do_replace = 1;
14502 save_irel = 1;
14503 }
14504 }
14505 else
14506 {
14507 /* External symbol. */
14508 struct elf_link_hash_entry_mul_list *m_list;
14509
14510 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14511 m_list = ex9_insn->m_list;
14512
14513 while (m_list)
14514 {
1c8f6a4d 14515 h_list = m_list->h_list;
35c08157
KLC
14516
14517 while (h_list)
14518 {
14519 if (h == h_list->h
1c8f6a4d
KLC
14520 && (m_list->irel->r_addend
14521 == irel->r_addend))
35c08157
KLC
14522 {
14523 do_replace = 1;
14524 save_irel = 1;
14525 if (ex9_insn->next
14526 && ex9_insn->m_list
14527 && ex9_insn->m_list == ex9_insn->next->m_list)
14528 {
14529 /* sethi multiple entry must be fixed */
14530 nds32_elf_ex9_insert_fix (sec, irel,
14531 h, ex9_insn->order);
14532 }
14533 break;
14534 }
14535 h_list = h_list->next;
14536 }
14537 m_list = m_list->next;
14538 }
14539 }
14540 }
14541 }
14542
14543 /* Import table: Check the symbol hash table and the
14544 jump target. Only R_NDS32_25_PCREL_RELA now. */
14545 else if (ex9_insn->times == -1
14546 && ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
14547 {
14548 nds32_elf_get_insn_with_reg (irel, it_insn, &it_insn_with_reg);
14549 if (insn_with_reg == it_insn_with_reg)
14550 {
14551 char code[10];
14552 bfd_vma relocation;
14553
14554 r_symndx = ELF32_R_SYM (irel->r_info);
14555 if (r_symndx >= symtab_hdr->sh_info)
14556 {
14557 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14558 if ((h->root.type == bfd_link_hash_defined
14559 || h->root.type == bfd_link_hash_defweak)
1c8f6a4d
KLC
14560 && h->root.u.def.section != NULL
14561 && h->root.u.def.section->output_section != NULL
35c08157 14562 && h->root.u.def.section->gc_mark == 1
1c8f6a4d 14563 && bfd_is_abs_section (h->root.u.def.section)
35c08157
KLC
14564 && h->root.u.def.value > sec->size)
14565 {
1c8f6a4d
KLC
14566 relocation = h->root.u.def.value +
14567 h->root.u.def.section->output_section->vma +
14568 h->root.u.def.section->output_offset;
35c08157 14569 relocation += irel->r_addend;
1c8f6a4d
KLC
14570 insn = insn_with_reg
14571 | ((relocation >> 1) & 0xffffff);
14572 snprintf (code, sizeof (code), "%08x", insn);
35c08157
KLC
14573 if (strcmp (code, ex9_insn->string) == 0)
14574 {
14575 do_replace = 1;
14576 save_irel = 1;
14577 }
14578 }
14579 }
14580 }
14581 }
14582 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
1c8f6a4d
KLC
14583 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
14584 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
35c08157
KLC
14585 {
14586 /* These relocations do not have to relocate contens, so it can
14587 be regard as instruction without relocation. */
14588 if (insn == it_insn && ex9_insn->irel == NULL)
14589 do_replace = 1;
14590 }
14591 }
14592 else
14593 {
14594 /* Instruction without relocation, we only
14595 have to compare their byte code. */
14596 if (insn == it_insn && ex9_insn->irel == NULL)
14597 do_replace = 1;
14598 }
14599
14600 /* Insntruction match so replacing the code here. */
14601 if (do_replace == 1)
14602 {
14603 /* There are two formats of ex9 instruction. */
14604 if (ex9_insn->order < 32)
14605 insn_ex9 = INSN_EX9_IT_2;
14606 else
14607 insn_ex9 = INSN_EX9_IT_1;
14608 insn16 = insn_ex9 | ex9_insn->order;
14609
1c8f6a4d
KLC
14610 /* Insert ex9 instruction. */
14611 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14612 &relax_blank_list, pre_irel_ptr,
14613 &irel_list);
35c08157
KLC
14614 pre_off = off;
14615 pre_insn16 = insn16;
14616
14617 if (save_irel)
14618 {
14619 /* For instuction with relocation do relax. */
14620 irel_ptr = (struct elf_nds32_irel_entry *)
14621 bfd_malloc (sizeof (struct elf_nds32_irel_entry));
14622 irel_ptr->irel = irel;
14623 irel_ptr->next = NULL;
14624 pre_irel_ptr = irel_ptr;
14625 }
14626 else
14627 pre_irel_ptr = NULL;
14628 break;
14629 }
14630 ex9_insn = ex9_insn->next;
14631 }
14632 off += 4;
14633 }
14634
1c8f6a4d
KLC
14635 /* Insert ex9 instruction. */
14636 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14637 &relax_blank_list, pre_irel_ptr,
14638 &irel_list);
35c08157
KLC
14639
14640 /* Delete the redundant code. */
14641 if (relax_blank_list)
14642 {
14643 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
14644 relax_blank_list = NULL;
14645 }
14646
14647 /* Clear the relocation that is replaced by ex9. */
14648 while (irel_list)
14649 {
14650 struct elf_nds32_irel_entry *irel_ptr;
14651
14652 irel_ptr = irel_list;
14653 irel_list = irel_ptr->next;
14654 irel_ptr->irel->r_info =
14655 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), R_NDS32_TRAN);
14656 free (irel_ptr);
14657 }
14658 return TRUE;
14659}
14660
14661/* Initialize ex9 hash table. */
14662
14663int
14664nds32_elf_ex9_init (void)
14665{
14666 if (!bfd_hash_table_init_n (&ex9_code_table, nds32_elf_code_hash_newfunc,
14667 sizeof (struct elf_nds32_code_hash_entry),
14668 1023))
14669 {
4eca0228 14670 _bfd_error_handler (_("Linker: cannot init ex9 hash table error \n"));
35c08157
KLC
14671 return FALSE;
14672 }
14673 return TRUE;
14674}
14675
14676/* Predict how many bytes will be relaxed with ex9 and ifc. */
14677
14678static void
14679nds32_elf_ex9_total_relax (struct bfd_link_info *info)
14680{
14681 struct elf_nds32_insn_times_entry *ex9_insn;
14682 struct elf_nds32_insn_times_entry *temp;
14683 int target_optimize;
14684 struct elf_nds32_link_hash_table *table;
14685
14686 if (ex9_insn_head == NULL)
14687 return;
14688
14689 table = nds32_elf_hash_table (info);
14690 target_optimize = table->target_optimize;
14691 ex9_insn = ex9_insn_head;
14692 while (ex9_insn)
14693 {
14694 ex9_relax_size = ex9_insn->times * 2 + ex9_relax_size;
14695 temp = ex9_insn;
14696 ex9_insn = ex9_insn->next;
14697 free (temp);
14698 }
14699 ex9_insn_head = NULL;
14700
14701 if ((target_optimize & NDS32_RELAX_JUMP_IFC_ON))
14702 {
14703 /* Examine ifc reduce size. */
14704 struct elf_nds32_ifc_symbol_entry *ifc_ent = ifc_symbol_head;
14705 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
14706 int size = 0;
14707
14708 while (ifc_ent)
14709 {
14710 if (ifc_ent->enable == 0)
14711 {
14712 /* Not ifc yet. */
14713 irel_ptr = ifc_ent->irel_head;
14714 while (irel_ptr)
14715 {
14716 size += 2;
14717 irel_ptr = irel_ptr->next;
14718 }
14719 }
14720 size -= 2;
14721 ifc_ent = ifc_ent->next;
14722 }
14723 ex9_relax_size += size;
14724 }
14725}
14726
14727/* Finish ex9 table. */
14728
14729void
14730nds32_elf_ex9_finish (struct bfd_link_info *link_info)
14731{
35c08157
KLC
14732 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
14733 nds32_elf_order_insn_times (link_info);
14734 nds32_elf_ex9_total_relax (link_info);
14735 /* Traverse the hash table and count its times. */
14736 nds32_elf_code_hash_traverse (nds32_elf_count_insn_times);
14737 nds32_elf_order_insn_times (link_info);
14738 nds32_elf_ex9_build_itable (link_info);
35c08157
KLC
14739}
14740
14741/* Relocate the entries in ex9 table. */
14742
14743static bfd_vma
14744nds32_elf_ex9_reloc_insn (struct elf_nds32_insn_times_entry *ptr,
14745 struct bfd_link_info *link_info)
14746{
14747 Elf_Internal_Sym *isym = NULL;
14748 bfd_vma relocation = -1;
1c8f6a4d 14749 struct elf_link_hash_entry *h;
35c08157
KLC
14750
14751 if (ptr->m_list != NULL)
14752 {
14753 /* Global symbol. */
1c8f6a4d
KLC
14754 h = ptr->m_list->h_list->h;
14755 if ((h->root.type == bfd_link_hash_defined
14756 || h->root.type == bfd_link_hash_defweak)
14757 && h->root.u.def.section != NULL
14758 && h->root.u.def.section->output_section != NULL)
35c08157
KLC
14759 {
14760
1c8f6a4d
KLC
14761 relocation = h->root.u.def.value +
14762 h->root.u.def.section->output_section->vma +
14763 h->root.u.def.section->output_offset;
35c08157
KLC
14764 relocation += ptr->m_list->irel->r_addend;
14765 }
14766 else
14767 relocation = 0;
14768 }
14769 else if (ptr->sec !=NULL)
14770 {
14771 /* Local symbol. */
14772 Elf_Internal_Sym sym;
14773 asection *sec = NULL;
14774 asection isec;
14775 asection *isec_ptr = &isec;
14776 Elf_Internal_Rela irel_backup = *(ptr->irel);
14777 asection *sec_backup = ptr->sec;
14778 bfd *abfd = ptr->sec->owner;
14779
14780 if (!nds32_get_local_syms (abfd, sec, &isym))
14781 return FALSE;
14782 isym = isym + ELF32_R_SYM (ptr->irel->r_info);
14783
14784 sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
14785 if (sec != NULL)
14786 *isec_ptr = *sec;
14787 sym = *isym;
14788
14789 /* The purpose is same as elf_link_input_bfd. */
14790 if (isec_ptr != NULL
14791 && isec_ptr->sec_info_type == SEC_INFO_TYPE_MERGE
14792 && ELF_ST_TYPE (isym->st_info) != STT_SECTION)
14793 {
14794 sym.st_value =
14795 _bfd_merged_section_offset (ptr->sec->output_section->owner, &isec_ptr,
14796 elf_section_data (isec_ptr)->sec_info,
14797 isym->st_value);
14798 }
14799 relocation = _bfd_elf_rela_local_sym (link_info->output_bfd, &sym,
14800 &ptr->sec, ptr->irel);
14801 if (ptr->irel != NULL)
14802 relocation += ptr->irel->r_addend;
14803
14804 /* Restore origin value since there may be some insntructions that
14805 could not be replaced with ex9.it. */
14806 *(ptr->irel) = irel_backup;
14807 ptr->sec = sec_backup;
14808 }
14809
14810 return relocation;
14811}
14812
14813/* Import ex9 table and build list. */
14814
14815void
14816nds32_elf_ex9_import_table (struct bfd_link_info *info)
14817{
1c8f6a4d 14818 int num = 0;
35c08157 14819 bfd_byte *contents;
35c08157
KLC
14820 FILE *ex9_import_file;
14821 int update_ex9_table;
14822 struct elf_nds32_link_hash_table *table;
14823
14824 table = nds32_elf_hash_table (info);
14825 ex9_import_file = table->ex9_import_file;
1c8f6a4d 14826 rewind (table->ex9_import_file);
35c08157
KLC
14827
14828 contents = bfd_malloc (sizeof (bfd_byte) * 4);
14829
35c08157 14830 /* Read instructions from the input file and build the list. */
1c8f6a4d 14831 while (!feof (ex9_import_file))
35c08157 14832 {
1b7e3d2f 14833 unsigned long insn;
35c08157
KLC
14834 char *code;
14835 struct elf_nds32_insn_times_entry *ptr;
14836 size_t nread;
14837
14838 nread = fread (contents, sizeof (bfd_byte) * 4, 1, ex9_import_file);
1c8f6a4d
KLC
14839 /* Ignore the final byte 0x0a. */
14840 if (nread < 1)
14841 break;
35c08157
KLC
14842 insn = bfd_getb32 (contents);
14843 code = bfd_malloc (sizeof (char) * 9);
1b7e3d2f 14844 snprintf (code, 9, "%08lx", (insn & 0xffffffff));
35c08157
KLC
14845 ptr = bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14846 ptr->string = code;
14847 ptr->order = num;
14848 ptr->times = -1;
14849 ptr->sec = NULL;
14850 ptr->m_list = NULL;
14851 ptr->rel_backup.r_offset = 0;
14852 ptr->rel_backup.r_info = 0;
14853 ptr->rel_backup.r_addend = 0;
14854 ptr->irel = NULL;
14855 ptr->next = NULL;
14856 nds32_elf_ex9_insert_entry (ptr);
35c08157
KLC
14857 num++;
14858 }
14859
14860 update_ex9_table = table->update_ex9_table;
14861 if (update_ex9_table == 1)
14862 {
14863 /* It has to consider of sethi need to use multiple page
14864 but it not be done yet. */
14865 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
14866 nds32_elf_order_insn_times (info);
14867 }
14868}
14869
14870/* Export ex9 table. */
14871
14872static void
14873nds32_elf_ex9_export (struct bfd_link_info *info,
14874 bfd_byte *contents, int size)
14875{
14876 FILE *ex9_export_file;
14877 struct elf_nds32_link_hash_table *table;
14878
14879 table = nds32_elf_hash_table (info);
14880 ex9_export_file = table->ex9_export_file;
14881 fwrite (contents, sizeof (bfd_byte), size, ex9_export_file);
14882 fclose (ex9_export_file);
14883}
14884
14885/* Adjust relocations of J and JAL in ex9.itable.
14886 Export ex9 table. */
14887
1c8f6a4d 14888static void
35c08157
KLC
14889nds32_elf_ex9_reloc_jmp (struct bfd_link_info *link_info)
14890{
14891 asection *table_sec = NULL;
14892 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
14893 struct elf_nds32_insn_times_entry *temp_ptr, *temp_ptr2;
14894 bfd *it_abfd;
1c8f6a4d 14895 uint32_t insn, insn_with_reg, source_insn;
35c08157
KLC
14896 bfd_byte *contents = NULL, *source_contents = NULL;
14897 int size = 0;
14898 bfd_vma gp;
14899 int shift, update_ex9_table, offset = 0;
14900 reloc_howto_type *howto = NULL;
14901 Elf_Internal_Rela rel_backup;
14902 unsigned short insn_ex9;
14903 struct elf_nds32_link_hash_table *table;
1c8f6a4d
KLC
14904 FILE *ex9_export_file;
14905 static bfd_boolean done = FALSE;
14906
14907 if (done)
14908 return;
14909
14910 done = TRUE;
35c08157
KLC
14911
14912 table = nds32_elf_hash_table (link_info);
14913 if (table)
14914 table->relax_status |= NDS32_RELAX_EX9_DONE;
14915
14916
14917 update_ex9_table = table->update_ex9_table;
14918 /* Generated ex9.itable exactly. */
14919 if (update_ex9_table == 0)
14920 {
14921 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
c72f2fb2 14922 it_abfd = it_abfd->link.next)
35c08157
KLC
14923 {
14924 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
14925 if (table_sec != NULL)
14926 break;
14927 }
14928
14929 if (table_sec != NULL)
14930 {
14931 bfd *output_bfd;
35c08157
KLC
14932
14933 output_bfd = table_sec->output_section->owner;
14934 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
14935 if (table_sec->size == 0)
14936 return;
14937
0c4bd9d9 14938 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE))
35c08157 14939 return;
35c08157
KLC
14940 }
14941 }
14942 else
14943 {
14944 /* Set gp. */
14945 bfd *output_bfd;
14946
14947 output_bfd = link_info->input_bfds->sections->output_section->owner;
14948 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
14949 contents = bfd_malloc (sizeof (bfd_byte) * 2048);
14950 }
14951
14952 /* Relocate instruction. */
14953 while (ex9_insn)
14954 {
14955 bfd_vma relocation, min_relocation = 0xffffffff;
14956
14957 insn = strtol (ex9_insn->string, NULL, 16);
14958 insn_with_reg = 0;
14959 if (ex9_insn->m_list != NULL || ex9_insn->sec != NULL)
14960 {
14961 if (ex9_insn->m_list)
14962 rel_backup = ex9_insn->m_list->rel_backup;
14963 else
14964 rel_backup = ex9_insn->rel_backup;
14965
14966 nds32_elf_get_insn_with_reg (&rel_backup, insn, &insn_with_reg);
14967 howto =
14968 bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE
14969 (rel_backup.r_info));
14970 shift = howto->rightshift;
14971 if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_25_PCREL_RELA
14972 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_ORI_RELA
14973 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_RELA
14974 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S1_RELA
14975 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S2_RELA)
14976 {
14977 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
14978 insn =
14979 insn_with_reg | ((relocation >> shift) &
14980 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 14981 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC
14982 }
14983 else if ((ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3
14984 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0)
14985 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3_RELA
14986 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0_RELA)
14987 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA12S2_DP_RELA
14988 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA12S2_SP_RELA)
14989 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA16S3_RELA
14990 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA19S0_RELA))
14991 {
14992 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
14993 insn =
14994 insn_with_reg | (((relocation - gp) >> shift) &
14995 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 14996 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC
14997 }
14998 else if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_HI20_RELA)
14999 {
15000 /* Sethi may be multiple entry for one insn. */
1c8f6a4d
KLC
15001 if (ex9_insn->next && ex9_insn->m_list
15002 && ex9_insn->m_list == ex9_insn->next->m_list)
35c08157
KLC
15003 {
15004 struct elf_link_hash_entry_mul_list *m_list;
15005 struct elf_nds32_ex9_refix *fix_ptr;
1c8f6a4d 15006 struct elf_link_hash_entry *h;
35c08157
KLC
15007
15008 temp_ptr = ex9_insn;
15009 temp_ptr2 = ex9_insn;
15010 m_list = ex9_insn->m_list;
15011 while (m_list)
15012 {
1c8f6a4d
KLC
15013 h = m_list->h_list->h;
15014 relocation = h->root.u.def.value +
15015 h->root.u.def.section->output_section->vma +
15016 h->root.u.def.section->output_offset;
35c08157
KLC
15017 relocation += m_list->irel->r_addend;
15018
15019 if (relocation < min_relocation)
15020 min_relocation = relocation;
15021 m_list = m_list->next;
15022 }
15023 relocation = min_relocation;
15024
15025 /* Put insntruction into ex9 table. */
15026 insn = insn_with_reg
15027 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15028 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC
15029 relocation = relocation + 0x1000; /* hi20 */
15030
1c8f6a4d
KLC
15031 while (ex9_insn->next && ex9_insn->m_list
15032 && ex9_insn->m_list == ex9_insn->next->m_list)
35c08157
KLC
15033 {
15034 /* Multiple sethi. */
15035 ex9_insn = ex9_insn->next;
15036 size += 4;
35c08157
KLC
15037 insn =
15038 insn_with_reg | ((relocation >> shift) &
15039 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15040 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC
15041 relocation = relocation + 0x1000; /* hi20 */
15042 }
15043
15044 fix_ptr = ex9_refix_head;
15045 while (fix_ptr)
15046 {
15047 /* Fix ex9 insn. */
15048 /* temp_ptr2 points to the head of multiple sethi. */
15049 temp_ptr = temp_ptr2;
15050 while (fix_ptr->order != temp_ptr->order && fix_ptr->next)
15051 {
15052 fix_ptr = fix_ptr->next;
15053 }
15054 if (fix_ptr->order != temp_ptr->order)
15055 break;
15056
15057 /* Set source insn. */
1c8f6a4d
KLC
15058 relocation =
15059 fix_ptr->h->root.u.def.value +
15060 fix_ptr->h->root.u.def.section->output_section->vma +
15061 fix_ptr->h->root.u.def.section->output_offset;
35c08157
KLC
15062 relocation += fix_ptr->irel->r_addend;
15063 /* sethi imm is imm20s. */
15064 source_insn = insn_with_reg | ((relocation >> shift) & 0xfffff);
15065
15066 while (temp_ptr)
15067 {
35c08157
KLC
15068 /* Match entry and source code. */
15069 insn = bfd_getb32 (contents + (temp_ptr->order) * 4 + offset);
15070 if (insn == source_insn)
15071 {
15072 /* Fix the ex9 insn. */
15073 if (temp_ptr->order != fix_ptr->order)
15074 {
15075 if (!nds32_get_section_contents
15076 (fix_ptr->sec->owner, fix_ptr->sec,
0c4bd9d9 15077 &source_contents, TRUE))
4eca0228 15078 _bfd_error_handler
35c08157
KLC
15079 (_("Linker: error cannot fixed ex9 relocation \n"));
15080 if (temp_ptr->order < 32)
15081 insn_ex9 = INSN_EX9_IT_2;
15082 else
15083 insn_ex9 = INSN_EX9_IT_1;
15084 insn_ex9 = insn_ex9 | temp_ptr->order;
15085 bfd_putb16 (insn_ex9, source_contents + fix_ptr->irel->r_offset);
15086 }
15087 break;
15088 }
15089 else
15090 {
15091 if (!temp_ptr->next || temp_ptr->m_list != temp_ptr->next->m_list)
4eca0228 15092 _bfd_error_handler
35c08157
KLC
15093 (_("Linker: error cannot fixed ex9 relocation \n"));
15094 else
15095 temp_ptr = temp_ptr->next;
15096 }
15097 }
15098 fix_ptr = fix_ptr->next;
15099 }
15100 }
15101 else
15102 {
15103 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15104 insn = insn_with_reg
15105 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15106 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC
15107 }
15108 }
15109 }
15110 else
15111 {
15112 /* Insn without relocation does not have to be fixed
15113 if need to update export table. */
15114 if (update_ex9_table == 1)
15115 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15116 }
15117 ex9_insn = ex9_insn->next;
15118 size += 4;
15119 }
15120
15121 ex9_export_file = table->ex9_export_file;
15122 if (ex9_export_file != NULL)
1c8f6a4d 15123 nds32_elf_ex9_export (link_info, contents, table_sec->size);
35c08157
KLC
15124 else if (update_ex9_table == 1)
15125 {
1c8f6a4d
KLC
15126 table->ex9_export_file = table->ex9_import_file;
15127 rewind (table->ex9_export_file);
15128 nds32_elf_ex9_export (link_info, contents, size);
35c08157
KLC
15129 }
15130}
15131
15132/* Generate ex9 hash table. */
15133
15134static bfd_boolean
f4cb41f4 15135nds32_elf_ex9_build_hash_table (bfd *abfd, asection *sec,
35c08157
KLC
15136 struct bfd_link_info *link_info)
15137{
15138 Elf_Internal_Rela *internal_relocs;
15139 Elf_Internal_Rela *irelend;
15140 Elf_Internal_Rela *irel;
15141 Elf_Internal_Rela *jrel;
15142 Elf_Internal_Rela rel_backup;
15143 Elf_Internal_Shdr *symtab_hdr;
15144 Elf_Internal_Sym *isym = NULL;
15145 asection *isec;
15146 struct elf_link_hash_entry **sym_hashes;
15147 bfd_byte *contents = NULL;
f4cb41f4 15148 bfd_vma off = 0;
35c08157 15149 unsigned long r_symndx;
1c8f6a4d 15150 uint32_t insn, insn_with_reg;
35c08157
KLC
15151 struct elf_link_hash_entry *h;
15152 int data_flag, shift, align;
15153 bfd_vma relocation;
15154 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
15155 reloc_howto_type *howto = NULL;
15156
15157 sym_hashes = elf_sym_hashes (abfd);
15158 /* Load section instructions, relocations, and symbol table. */
0c4bd9d9 15159 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
35c08157
KLC
15160 return FALSE;
15161
15162 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
15163 TRUE /* keep_memory */);
15164 irelend = internal_relocs + sec->reloc_count;
15165 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
15166 if (!nds32_get_local_syms (abfd, sec, &isym))
15167 return FALSE;
15168
15169 /* Check the object if enable ex9. */
15170 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
15171 R_NDS32_RELAX_ENTRY);
15172
15173 /* Check this section trigger ex9 relaxation. */
15174 if (irel == NULL
15175 || irel >= irelend
15176 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
15177 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
15178 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
15179 return TRUE;
15180
15181 irel = internal_relocs;
15182
15183 /* Push each insn into hash table. */
15184 while (off < sec->size)
15185 {
15186 char code[10];
15187 struct elf_nds32_code_hash_entry *entry;
15188
15189 while (irel != NULL && irel < irelend && irel->r_offset < off)
15190 irel++;
15191
1c8f6a4d
KLC
15192 data_flag = nds32_elf_ex9_relocation_check (link_info, &irel, irelend,
15193 NULL, sec, &off, contents);
35c08157
KLC
15194 if (data_flag & DATA_EXIST)
15195 {
15196 /* We save the move offset in the highest byte. */
15197 off += (data_flag >> 24);
15198 continue;
15199 }
15200
15201 if (*(contents + off) & 0x80)
15202 {
15203 off += 2;
15204 }
15205 else
15206 {
15207 h = NULL;
15208 isec = NULL;
15209 jrel = NULL;
15210 rel_backup.r_info = 0;
15211 rel_backup.r_offset = 0;
15212 rel_backup.r_addend = 0;
15213 /* Load the instruction and its opcode with register for comparing. */
15214 insn = bfd_getb32 (contents + off);
15215 insn_with_reg = 0;
15216 if (irel != NULL && irel < irelend && irel->r_offset == off)
15217 {
15218 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
15219 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
15220 shift = howto->rightshift;
15221 align = (1 << shift) - 1;
15222 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
15223 || ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA
15224 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
15225 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
15226 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
15227 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
15228 ||(ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15229 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15230 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15231 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15232 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15233 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15234 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15235 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15236 {
15237 r_symndx = ELF32_R_SYM (irel->r_info);
15238 jrel = irel;
15239 rel_backup = *irel;
15240 if (r_symndx < symtab_hdr->sh_info)
15241 {
15242 /* Local symbol. */
15243 int shndx = isym[r_symndx].st_shndx;
15244
15245 bfd_vma st_value = (isym + r_symndx)->st_value;
15246 isec = elf_elfsections (abfd)[shndx]->bfd_section;
15247 relocation = (isec->output_section->vma + isec->output_offset
15248 + st_value + irel->r_addend);
15249 }
15250 else
15251 {
15252 /* External symbol. */
15253 bfd_boolean warned ATTRIBUTE_UNUSED;
15254 bfd_boolean ignored ATTRIBUTE_UNUSED;
15255 bfd_boolean unresolved_reloc ATTRIBUTE_UNUSED;
15256 asection *sym_sec;
15257
15258 /* Maybe there is a better way to get h and relocation */
15259 RELOC_FOR_GLOBAL_SYMBOL (link_info, abfd, sec, irel,
15260 r_symndx, symtab_hdr, sym_hashes,
15261 h, sym_sec, relocation,
15262 unresolved_reloc, warned, ignored);
15263 relocation += irel->r_addend;
1c8f6a4d
KLC
15264 if ((h->root.type != bfd_link_hash_defined
15265 && h->root.type != bfd_link_hash_defweak)
15266 || strcmp (h->root.root.string, "_FP_BASE_") == 0)
35c08157
KLC
15267 {
15268 off += 4;
15269 continue;
15270 }
15271 }
15272
15273 /* Check for gp relative instruction alignment. */
15274 if ((ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15275 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15276 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15277 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15278 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15279 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15280 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15281 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15282 {
15283 bfd_vma gp;
15284 bfd *output_bfd = sec->output_section->owner;
15285 bfd_reloc_status_type r;
15286
15287 /* If the symbol is in the abs section, the out_bfd will be null.
15288 This happens when the relocation has a symbol@GOTOFF. */
15289 r = nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15290 if (r != bfd_reloc_ok)
15291 {
15292 off += 4;
15293 continue;
15294 }
15295
15296 relocation -= gp;
15297
15298 /* Make sure alignment is correct. */
15299 if (relocation & align)
15300 {
15301 /* Incorrect alignment. */
4eca0228 15302 _bfd_error_handler
695344c0 15303 /* xgettext:c-format */
d42c267e
AM
15304 (_("%B: warning: unaligned small data access "
15305 "for entry: {%Ld, %Ld, %Ld}, addr = %#Lx, align = %#x"),
dae82561 15306 abfd, irel->r_offset,
35c08157
KLC
15307 irel->r_info, irel->r_addend, relocation, align);
15308 off += 4;
15309 continue;
15310 }
15311 }
15312
15313 insn = insn_with_reg
15314 | ((relocation >> shift) & nds32_elf_irel_mask (irel));
15315 }
15316 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
1c8f6a4d
KLC
15317 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
15318 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
35c08157
KLC
15319 {
15320 /* These relocations do not have to relocate contens, so it can
15321 be regard as instruction without relocation. */
15322 }
15323 else
15324 {
15325 off += 4;
15326 continue;
15327 }
15328 }
15329
1c8f6a4d 15330 snprintf (code, sizeof (code), "%08x", insn);
35c08157
KLC
15331 /* Copy "code". */
15332 entry = (struct elf_nds32_code_hash_entry*)
15333 bfd_hash_lookup (&ex9_code_table, code, TRUE, TRUE);
15334 if (entry == NULL)
15335 {
4eca0228 15336 _bfd_error_handler
d42c267e 15337 (_("failed creating ex9.it %s hash table entry"), code);
35c08157
KLC
15338 return FALSE;
15339 }
15340 if (h)
15341 {
15342 if (h->root.type == bfd_link_hash_undefined)
15343 return TRUE;
15344 /* Global symbol. */
15345 /* In order to do sethi with different symbol but same value. */
15346 if (entry->m_list == NULL)
15347 {
15348 struct elf_link_hash_entry_mul_list *m_list_new;
15349 struct elf_link_hash_entry_list *h_list_new;
15350
15351 m_list_new = (struct elf_link_hash_entry_mul_list *)
15352 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15353 h_list_new = (struct elf_link_hash_entry_list *)
15354 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15355 entry->m_list = m_list_new;
15356 m_list_new->h_list = h_list_new;
15357 m_list_new->rel_backup = rel_backup;
15358 m_list_new->times = 1;
15359 m_list_new->irel = jrel;
15360 m_list_new->next = NULL;
15361 h_list_new->h = h;
15362 h_list_new->next = NULL;
15363 }
15364 else
15365 {
15366 struct elf_link_hash_entry_mul_list *m_list = entry->m_list;
15367 struct elf_link_hash_entry_list *h_list;
15368
15369 while (m_list)
15370 {
15371 /* Build the different symbols that point to the same address. */
15372 h_list = m_list->h_list;
15373 if (h_list->h->root.u.def.value == h->root.u.def.value
15374 && h_list->h->root.u.def.section->output_section->vma
15375 == h->root.u.def.section->output_section->vma
15376 && h_list->h->root.u.def.section->output_offset
15377 == h->root.u.def.section->output_offset
15378 && m_list->rel_backup.r_addend == rel_backup.r_addend)
15379 {
15380 m_list->times++;
15381 m_list->irel = jrel;
15382 while (h_list->h != h && h_list->next)
15383 h_list = h_list->next;
15384 if (h_list->h != h)
15385 {
15386 struct elf_link_hash_entry_list *h_list_new;
15387
15388 h_list_new = (struct elf_link_hash_entry_list *)
15389 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15390 h_list->next = h_list_new;
15391 h_list_new->h = h;
15392 h_list_new->next = NULL;
15393 }
15394 break;
15395 }
15396 /* The sethi case may have different address but the
15397 hi20 is the same. */
15398 else if (ELF32_R_TYPE (jrel->r_info) == R_NDS32_HI20_RELA
15399 && m_list->next == NULL)
15400 {
15401 struct elf_link_hash_entry_mul_list *m_list_new;
15402 struct elf_link_hash_entry_list *h_list_new;
15403
15404 m_list_new = (struct elf_link_hash_entry_mul_list *)
15405 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15406 h_list_new = (struct elf_link_hash_entry_list *)
15407 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15408 m_list->next = m_list_new;
15409 m_list_new->h_list = h_list_new;
15410 m_list_new->rel_backup = rel_backup;
15411 m_list_new->times = 1;
15412 m_list_new->irel = jrel;
15413 m_list_new->next = NULL;
15414 h_list_new->h = h;
15415 h_list_new->next = NULL;
15416 break;
15417 }
15418 m_list = m_list->next;
15419 }
15420 if (!m_list)
15421 {
15422 off += 4;
15423 continue;
15424 }
15425 }
15426 }
15427 else
15428 {
15429 /* Local symbol and insn without relocation*/
15430 entry->times++;
15431 entry->rel_backup = rel_backup;
15432 }
15433
15434 /* Use in sethi insn with constant and global symbol in same format. */
15435 if (!jrel)
15436 entry->const_insn = 1;
15437 else
15438 entry->irel = jrel;
15439 entry->sec = isec;
15440 off += 4;
15441 }
15442 }
15443 return TRUE;
15444}
15445
15446/* Set the _ITB_BASE, and point it to ex9 table. */
15447
15448bfd_boolean
15449nds32_elf_ex9_itb_base (struct bfd_link_info *link_info)
15450{
15451 bfd *abfd;
15452 asection *sec;
15453 bfd *output_bfd = NULL;
15454 struct bfd_link_hash_entry *bh = NULL;
35c08157
KLC
15455
15456 if (is_ITB_BASE_set == 1)
15457 return TRUE;
15458
15459 is_ITB_BASE_set = 1;
15460
1c8f6a4d
KLC
15461 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_", FALSE, FALSE, TRUE);
15462
15463 if (bh && (bh->type == bfd_link_hash_defined
15464 || bh->type == bfd_link_hash_defweak))
15465 return TRUE;
35c08157
KLC
15466
15467 for (abfd = link_info->input_bfds; abfd != NULL;
c72f2fb2 15468 abfd = abfd->link.next)
35c08157
KLC
15469 {
15470 sec = bfd_get_section_by_name (abfd, ".ex9.itable");
15471 if (sec != NULL)
15472 {
15473 output_bfd = sec->output_section->owner;
15474 break;
15475 }
15476 }
15477 if (output_bfd == NULL)
15478 {
15479 output_bfd = link_info->output_bfd;
15480 if (output_bfd->sections == NULL)
15481 return TRUE;
15482 else
15483 sec = bfd_abs_section_ptr;
15484 }
15485 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_",
15486 FALSE, FALSE, TRUE);
15487 return (_bfd_generic_link_add_one_symbol
15488 (link_info, output_bfd, "_ITB_BASE_",
1c8f6a4d 15489 BSF_GLOBAL | BSF_WEAK, sec, 0,
35c08157
KLC
15490 (const char *) NULL, FALSE, get_elf_backend_data
15491 (output_bfd)->collect, &bh));
15492} /* End EX9.IT */
15493\f
15494
15495#define ELF_ARCH bfd_arch_nds32
15496#define ELF_MACHINE_CODE EM_NDS32
15497#define ELF_MAXPAGESIZE 0x1000
1c8f6a4d 15498#define ELF_TARGET_ID NDS32_ELF_DATA
35c08157 15499
6d00b590 15500#define TARGET_BIG_SYM nds32_elf32_be_vec
35c08157 15501#define TARGET_BIG_NAME "elf32-nds32be"
6d00b590 15502#define TARGET_LITTLE_SYM nds32_elf32_le_vec
35c08157
KLC
15503#define TARGET_LITTLE_NAME "elf32-nds32le"
15504
15505#define elf_info_to_howto nds32_info_to_howto
15506#define elf_info_to_howto_rel nds32_info_to_howto_rel
15507
15508#define bfd_elf32_bfd_link_hash_table_create nds32_elf_link_hash_table_create
15509#define bfd_elf32_bfd_merge_private_bfd_data nds32_elf_merge_private_bfd_data
15510#define bfd_elf32_bfd_print_private_bfd_data nds32_elf_print_private_bfd_data
15511#define bfd_elf32_bfd_relax_section nds32_elf_relax_section
15512#define bfd_elf32_bfd_set_private_flags nds32_elf_set_private_flags
15513
1c8f6a4d 15514#define bfd_elf32_mkobject nds32_elf_mkobject
35c08157
KLC
15515#define elf_backend_action_discarded nds32_elf_action_discarded
15516#define elf_backend_add_symbol_hook nds32_elf_add_symbol_hook
15517#define elf_backend_check_relocs nds32_elf_check_relocs
15518#define elf_backend_adjust_dynamic_symbol nds32_elf_adjust_dynamic_symbol
15519#define elf_backend_create_dynamic_sections nds32_elf_create_dynamic_sections
15520#define elf_backend_finish_dynamic_sections nds32_elf_finish_dynamic_sections
15521#define elf_backend_finish_dynamic_symbol nds32_elf_finish_dynamic_symbol
15522#define elf_backend_size_dynamic_sections nds32_elf_size_dynamic_sections
15523#define elf_backend_relocate_section nds32_elf_relocate_section
15524#define elf_backend_gc_mark_hook nds32_elf_gc_mark_hook
35c08157
KLC
15525#define elf_backend_grok_prstatus nds32_elf_grok_prstatus
15526#define elf_backend_grok_psinfo nds32_elf_grok_psinfo
15527#define elf_backend_reloc_type_class nds32_elf_reloc_type_class
15528#define elf_backend_copy_indirect_symbol nds32_elf_copy_indirect_symbol
15529#define elf_backend_link_output_symbol_hook nds32_elf_output_symbol_hook
15530#define elf_backend_output_arch_syms nds32_elf_output_arch_syms
15531#define elf_backend_object_p nds32_elf_object_p
15532#define elf_backend_final_write_processing nds32_elf_final_write_processing
15533#define elf_backend_special_sections nds32_elf_special_sections
1c8f6a4d
KLC
15534#define bfd_elf32_bfd_get_relocated_section_contents \
15535 nds32_elf_get_relocated_section_contents
35c08157
KLC
15536
15537#define elf_backend_can_gc_sections 1
15538#define elf_backend_can_refcount 1
15539#define elf_backend_want_got_plt 1
15540#define elf_backend_plt_readonly 1
15541#define elf_backend_want_plt_sym 0
15542#define elf_backend_got_header_size 12
15543#define elf_backend_may_use_rel_p 1
15544#define elf_backend_default_use_rela_p 1
15545#define elf_backend_may_use_rela_p 1
64f52338 15546#define elf_backend_dtrel_excludes_plt 1
35c08157
KLC
15547
15548#include "elf32-target.h"
15549
15550#undef ELF_MAXPAGESIZE
15551#define ELF_MAXPAGESIZE 0x2000
15552
15553#undef TARGET_BIG_SYM
6d00b590 15554#define TARGET_BIG_SYM nds32_elf32_linux_be_vec
35c08157
KLC
15555#undef TARGET_BIG_NAME
15556#define TARGET_BIG_NAME "elf32-nds32be-linux"
15557#undef TARGET_LITTLE_SYM
6d00b590 15558#define TARGET_LITTLE_SYM nds32_elf32_linux_le_vec
35c08157
KLC
15559#undef TARGET_LITTLE_NAME
15560#define TARGET_LITTLE_NAME "elf32-nds32le-linux"
15561#undef elf32_bed
15562#define elf32_bed elf32_nds32_lin_bed
15563
15564#include "elf32-target.h"