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Add missing i18n marker in dwarf2_evaluate_property warning message.
[thirdparty/binutils-gdb.git] / bfd / elf32-nds32.c
CommitLineData
35c08157 1/* NDS32-specific support for 32-bit ELF.
b90efa5b 2 Copyright (C) 2012-2015 Free Software Foundation, Inc.
35c08157
KLC		 3 Contributed by Andes Technology Corporation.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
1c8f6a4d 20 02110-1301, USA. */
35c08157
KLC		 21
22
23#include "sysdep.h"
24#include "bfd.h"
25#include "bfd_stdint.h"
26#include "bfdlink.h"
27#include "libbfd.h"
28#include "elf-bfd.h"
29#include "libiberty.h"
30#include "bfd_stdint.h"
31#include "elf/nds32.h"
32#include "opcode/nds32.h"
33#include "elf32-nds32.h"
34#include "opcode/cgen.h"
35#include "../opcodes/nds32-opc.h"
36
37/* Relocation HOWTO functions. */
38static bfd_reloc_status_type nds32_elf_ignore_reloc
39 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
40static bfd_reloc_status_type nds32_elf_9_pcrel_reloc
41 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
42static bfd_reloc_status_type nds32_elf_hi20_reloc
43 (bfd *, arelent *, asymbol *, void *,
44 asection *, bfd *, char **);
45static bfd_reloc_status_type nds32_elf_lo12_reloc
46 (bfd *, arelent *, asymbol *, void *,
47 asection *, bfd *, char **);
48static bfd_reloc_status_type nds32_elf_generic_reloc
49 (bfd *, arelent *, asymbol *, void *,
50 asection *, bfd *, char **);
51static bfd_reloc_status_type nds32_elf_sda15_reloc
52 (bfd *, arelent *, asymbol *, void *,
53 asection *, bfd *, char **);
54
55/* Helper functions for HOWTO. */
56static bfd_reloc_status_type nds32_elf_do_9_pcrel_reloc
57 (bfd *, reloc_howto_type *, asection *, bfd_byte *, bfd_vma,
58 asection *, bfd_vma, bfd_vma);
59static void nds32_elf_relocate_hi20
60 (bfd *, int, Elf_Internal_Rela *, Elf_Internal_Rela *, bfd_byte *, bfd_vma);
61static reloc_howto_type *bfd_elf32_bfd_reloc_type_table_lookup
62 (enum elf_nds32_reloc_type);
63static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
64 (bfd *, bfd_reloc_code_real_type);
65
66/* Target hooks. */
67static void nds32_info_to_howto_rel
68 (bfd *, arelent *, Elf_Internal_Rela *dst);
69static void nds32_info_to_howto
70 (bfd *, arelent *, Elf_Internal_Rela *dst);
71static bfd_boolean nds32_elf_add_symbol_hook
72 (bfd *, struct bfd_link_info *, Elf_Internal_Sym *, const char **,
73 flagword *, asection **, bfd_vma *);
74static bfd_boolean nds32_elf_relocate_section
75 (bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
76 Elf_Internal_Rela *, Elf_Internal_Sym *, asection **);
77static bfd_boolean nds32_elf_object_p (bfd *);
78static void nds32_elf_final_write_processing (bfd *, bfd_boolean);
79static bfd_boolean nds32_elf_set_private_flags (bfd *, flagword);
80static bfd_boolean nds32_elf_merge_private_bfd_data (bfd *, bfd *);
81static bfd_boolean nds32_elf_print_private_bfd_data (bfd *, void *);
82static bfd_boolean nds32_elf_gc_sweep_hook
83 (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
84static bfd_boolean nds32_elf_check_relocs
85 (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
86static asection *nds32_elf_gc_mark_hook
87 (asection *, struct bfd_link_info *, Elf_Internal_Rela *,
88 struct elf_link_hash_entry *, Elf_Internal_Sym *);
89static bfd_boolean nds32_elf_adjust_dynamic_symbol
90 (struct bfd_link_info *, struct elf_link_hash_entry *);
91static bfd_boolean nds32_elf_size_dynamic_sections
92 (bfd *, struct bfd_link_info *);
93static bfd_boolean nds32_elf_create_dynamic_sections
94 (bfd *, struct bfd_link_info *);
95static bfd_boolean nds32_elf_finish_dynamic_sections
96 (bfd *, struct bfd_link_info *info);
97static bfd_boolean nds32_elf_finish_dynamic_symbol
98 (bfd *, struct bfd_link_info *, struct elf_link_hash_entry *,
99 Elf_Internal_Sym *);
1c8f6a4d 100static bfd_boolean nds32_elf_mkobject (bfd *);
35c08157
KLC		 101
102/* Nds32 helper functions. */
103static bfd_reloc_status_type nds32_elf_final_sda_base
104 (bfd *, struct bfd_link_info *, bfd_vma *, bfd_boolean);
105static bfd_boolean allocate_dynrelocs (struct elf_link_hash_entry *, void *);
106static bfd_boolean readonly_dynrelocs (struct elf_link_hash_entry *, void *);
107static Elf_Internal_Rela *find_relocs_at_address
108 (Elf_Internal_Rela *, Elf_Internal_Rela *,
109 Elf_Internal_Rela *, enum elf_nds32_reloc_type);
110static bfd_vma calculate_memory_address
111 (bfd *, Elf_Internal_Rela *, Elf_Internal_Sym *, Elf_Internal_Shdr *);
112static int nds32_get_section_contents (bfd *, asection *, bfd_byte **);
113static bfd_boolean nds32_elf_ex9_build_hash_table
114 (bfd *, asection *, struct bfd_link_info *);
1c8f6a4d
KLC		 115static bfd_boolean nds32_elf_ex9_itb_base (struct bfd_link_info *);
116static void nds32_elf_ex9_import_table (struct bfd_link_info *);
117static void nds32_elf_ex9_finish (struct bfd_link_info *);
118static void nds32_elf_ex9_reloc_jmp (struct bfd_link_info *);
35c08157 119static void nds32_elf_get_insn_with_reg
1c8f6a4d 120 (Elf_Internal_Rela *, uint32_t, uint32_t *);
35c08157
KLC		 121static int nds32_get_local_syms (bfd *, asection *ATTRIBUTE_UNUSED,
122 Elf_Internal_Sym **);
123static bfd_boolean nds32_elf_ex9_replace_instruction
124 (struct bfd_link_info *, bfd *, asection *);
125static bfd_boolean nds32_elf_ifc_calc (struct bfd_link_info *, bfd *,
126 asection *);
1c8f6a4d 127static bfd_boolean nds32_elf_ifc_finish (struct bfd_link_info *);
35c08157 128static bfd_boolean nds32_elf_ifc_replace (struct bfd_link_info *);
1c8f6a4d 129static bfd_boolean nds32_elf_ifc_reloc (void);
35c08157
KLC		 130static bfd_boolean nds32_relax_fp_as_gp
131 (struct bfd_link_info *link_info, bfd *abfd, asection *sec,
132 Elf_Internal_Rela *internal_relocs, Elf_Internal_Rela *irelend,
133 Elf_Internal_Sym *isymbuf);
134static bfd_boolean nds32_fag_remove_unused_fpbase
135 (bfd *abfd, asection *sec, Elf_Internal_Rela *internal_relocs,
136 Elf_Internal_Rela *irelend);
1c8f6a4d
KLC		 137static bfd_byte *
138nds32_elf_get_relocated_section_contents (bfd *abfd,
139 struct bfd_link_info *link_info,
140 struct bfd_link_order *link_order,
141 bfd_byte *data,
142 bfd_boolean relocatable,
143 asymbol **symbols);
35c08157
KLC		 144
145enum
146{
147 MACH_V1 = bfd_mach_n1h,
148 MACH_V2 = bfd_mach_n1h_v2,
149 MACH_V3 = bfd_mach_n1h_v3,
150 MACH_V3M = bfd_mach_n1h_v3m
151};
152
153#define MIN(a, b) ((a) > (b) ? (b) : (a))
154#define MAX(a, b) ((a) > (b) ? (a) : (b))
155
156/* The name of the dynamic interpreter. This is put in the .interp
157 section. */
158#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
159
160/* The nop opcode we use. */
161#define NDS32_NOP32 0x40000009
162#define NDS32_NOP16 0x9200
163
164/* The size in bytes of an entry in the procedure linkage table. */
165#define PLT_ENTRY_SIZE 24
166#define PLT_HEADER_SIZE 24
167
168/* The first entry in a procedure linkage table are reserved,
169 and the initial contents are unimportant (we zero them out).
170 Subsequent entries look like this. */
171#define PLT0_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(.got+4) */
172#define PLT0_ENTRY_WORD1 0x58f78000 /* ori r15, r25, LO12(.got+4) */
173#define PLT0_ENTRY_WORD2 0x05178000 /* lwi r17, [r15+0] */
174#define PLT0_ENTRY_WORD3 0x04f78001 /* lwi r15, [r15+4] */
175#define PLT0_ENTRY_WORD4 0x4a003c00 /* jr r15 */
176
177/* $ta is change to $r15 (from $r25). */
178#define PLT0_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[1]@GOT) */
179#define PLT0_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[1]@GOT) */
180#define PLT0_PIC_ENTRY_WORD2 0x40f7f400 /* add r15, gp, r15 */
181#define PLT0_PIC_ENTRY_WORD3 0x05178000 /* lwi r17, [r15+0] */
182#define PLT0_PIC_ENTRY_WORD4 0x04f78001 /* lwi r15, [r15+4] */
183#define PLT0_PIC_ENTRY_WORD5 0x4a003c00 /* jr r15 */
184
185#define PLT_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(&got[n+3]) */
186#define PLT_ENTRY_WORD1 0x04f78000 /* lwi r15, r15, LO12(&got[n+3]) */
187#define PLT_ENTRY_WORD2 0x4a003c00 /* jr r15 */
188#define PLT_ENTRY_WORD3 0x45000000 /* movi r16, sizeof(RELA) * n */
189#define PLT_ENTRY_WORD4 0x48000000 /* j .plt0. */
190
191#define PLT_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[n+3]@GOT) */
192#define PLT_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[n+3]@GOT) */
193#define PLT_PIC_ENTRY_WORD2 0x38febc02 /* lw r15, [gp+r15] */
194#define PLT_PIC_ENTRY_WORD3 0x4a003c00 /* jr r15 */
195#define PLT_PIC_ENTRY_WORD4 0x45000000 /* movi r16, sizeof(RELA) * n */
196#define PLT_PIC_ENTRY_WORD5 0x48000000 /* j .plt0 */
197
1c8f6a4d
KLC		 198/* These are macros used to get the relocation accurate value. */
199#define ACCURATE_8BIT_S1 (0x100)
200#define ACCURATE_U9BIT_S1 (0x400)
201#define ACCURATE_12BIT_S1 (0x2000)
202#define ACCURATE_14BIT_S1 (0x4000)
203#define ACCURATE_19BIT (0x40000)
204
205/* These are macros used to get the relocation conservative value. */
206#define CONSERVATIVE_8BIT_S1 (0x100 - 4)
207#define CONSERVATIVE_14BIT_S1 (0x4000 - 4)
208#define CONSERVATIVE_16BIT_S1 (0x10000 - 4)
209#define CONSERVATIVE_24BIT_S1 (0x1000000 - 4)
210/* These must be more conservative because the address may be in
211 different segment. */
212#define CONSERVATIVE_15BIT (0x4000 - 0x1000)
213#define CONSERVATIVE_15BIT_S1 (0x8000 - 0x1000)
214#define CONSERVATIVE_15BIT_S2 (0x10000 - 0x1000)
215#define CONSERVATIVE_19BIT (0x40000 - 0x1000)
216#define CONSERVATIVE_20BIT (0x80000 - 0x1000)
217
35c08157
KLC		 218/* Size of small data/bss sections, used to calculate SDA_BASE. */
219static long got_size = 0;
220static int is_SDA_BASE_set = 0;
221static int is_ITB_BASE_set = 0;
222
35c08157
KLC		 223/* Convert ELF-VER in eflags to string for debugging purpose. */
224static const char *const nds32_elfver_strtab[] =
225{
226 "ELF-1.2",
227 "ELF-1.3",
228 "ELF-1.4",
229};
230
231/* The nds32 linker needs to keep track of the number of relocs that it
232 decides to copy in check_relocs for each symbol. This is so that
233 it can discard PC relative relocs if it doesn't need them when
234 linking with -Bsymbolic. We store the information in a field
235 extending the regular ELF linker hash table. */
236
237/* This structure keeps track of the number of PC relative relocs we
238 have copied for a given symbol. */
239
240struct elf_nds32_pcrel_relocs_copied
241{
242 /* Next section. */
243 struct elf_nds32_pcrel_relocs_copied *next;
244 /* A section in dynobj. */
245 asection *section;
246 /* Number of relocs copied in this section. */
247 bfd_size_type count;
248};
249
250/* The sh linker needs to keep track of the number of relocs that it
251 decides to copy as dynamic relocs in check_relocs for each symbol.
252 This is so that it can later discard them if they are found to be
253 unnecessary. We store the information in a field extending the
254 regular ELF linker hash table. */
255
256struct elf_nds32_dyn_relocs
257{
258 struct elf_nds32_dyn_relocs *next;
259
260 /* The input section of the reloc. */
261 asection *sec;
262
263 /* Total number of relocs copied for the input section. */
264 bfd_size_type count;
265
266 /* Number of pc-relative relocs copied for the input section. */
267 bfd_size_type pc_count;
268};
269
270/* Nds32 ELF linker hash entry. */
271
272struct elf_nds32_link_hash_entry
273{
274 struct elf_link_hash_entry root;
275
276 /* Track dynamic relocs copied for this symbol. */
277 struct elf_nds32_dyn_relocs *dyn_relocs;
1c8f6a4d
KLC		 278
279 /* For checking relocation type. */
280#define GOT_UNKNOWN 0
281#define GOT_NORMAL 1
282#define GOT_TLS_IE 2
283 unsigned int tls_type;
35c08157
KLC		 284};
285
286/* Get the nds32 ELF linker hash table from a link_info structure. */
287
288#define FP_BASE_NAME "_FP_BASE_"
289static int check_start_export_sym = 0;
290static size_t ex9_relax_size = 0; /* Save ex9 predicted reducing size. */
291
1c8f6a4d
KLC		 292/* The offset for executable tls relaxation. */
293#define TP_OFFSET 0x0
294
295struct elf_nds32_obj_tdata
296{
297 struct elf_obj_tdata root;
298
299 /* tls_type for each local got entry. */
300 char *local_got_tls_type;
301};
302
303#define elf_nds32_tdata(bfd) \
304 ((struct elf_nds32_obj_tdata *) (bfd)->tdata.any)
305
306#define elf32_nds32_local_got_tls_type(bfd) \
307 (elf_nds32_tdata (bfd)->local_got_tls_type)
308
309#define elf32_nds32_hash_entry(ent) ((struct elf_nds32_link_hash_entry *)(ent))
310
311static bfd_boolean
312nds32_elf_mkobject (bfd *abfd)
313{
314 return bfd_elf_allocate_object (abfd, sizeof (struct elf_nds32_obj_tdata),
315 NDS32_ELF_DATA);
316}
317
35c08157
KLC		 318/* Relocations used for relocation. */
319static reloc_howto_type nds32_elf_howto_table[] =
320{
321 /* This reloc does nothing. */
322 HOWTO (R_NDS32_NONE, /* type */
323 0, /* rightshift */
6346d5ca
AM		 324 3, /* size (0 = byte, 1 = short, 2 = long) */
325 0, /* bitsize */
35c08157
KLC		 326 FALSE, /* pc_relative */
327 0, /* bitpos */
6346d5ca 328 complain_overflow_dont, /* complain_on_overflow */
35c08157
KLC		 329 bfd_elf_generic_reloc, /* special_function */
330 "R_NDS32_NONE", /* name */
331 FALSE, /* partial_inplace */
332 0, /* src_mask */
333 0, /* dst_mask */
334 FALSE), /* pcrel_offset */
335
336 /* A 16 bit absolute relocation. */
337 HOWTO (R_NDS32_16, /* type */
338 0, /* rightshift */
339 1, /* size (0 = byte, 1 = short, 2 = long) */
340 16, /* bitsize */
341 FALSE, /* pc_relative */
342 0, /* bitpos */
343 complain_overflow_bitfield, /* complain_on_overflow */
344 nds32_elf_generic_reloc, /* special_function */
345 "R_NDS32_16", /* name */
346 FALSE, /* partial_inplace */
347 0xffff, /* src_mask */
348 0xffff, /* dst_mask */
349 FALSE), /* pcrel_offset */
350
351 /* A 32 bit absolute relocation. */
352 HOWTO (R_NDS32_32, /* type */
353 0, /* rightshift */
354 2, /* size (0 = byte, 1 = short, 2 = long) */
355 32, /* bitsize */
356 FALSE, /* pc_relative */
357 0, /* bitpos */
358 complain_overflow_bitfield, /* complain_on_overflow */
359 nds32_elf_generic_reloc, /* special_function */
360 "R_NDS32_32", /* name */
361 FALSE, /* partial_inplace */
362 0xffffffff, /* src_mask */
363 0xffffffff, /* dst_mask */
364 FALSE), /* pcrel_offset */
365
366 /* A 20 bit address. */
367 HOWTO (R_NDS32_20, /* type */
368 0, /* rightshift */
369 2, /* size (0 = byte, 1 = short, 2 = long) */
370 20, /* bitsize */
371 FALSE, /* pc_relative */
372 0, /* bitpos */
373 complain_overflow_unsigned, /* complain_on_overflow */
374 nds32_elf_generic_reloc, /* special_function */
375 "R_NDS32_20", /* name */
376 FALSE, /* partial_inplace */
377 0xfffff, /* src_mask */
378 0xfffff, /* dst_mask */
379 FALSE), /* pcrel_offset */
380
381 /* An PC Relative 9-bit relocation, shifted by 2.
382 This reloc is complicated because relocations are relative to pc & -4.
383 i.e. branches in the right insn slot use the address of the left insn
384 slot for pc. */
385 /* ??? It's not clear whether this should have partial_inplace set or not.
386 Branch relaxing in the assembler can store the addend in the insn,
387 and if bfd_install_relocation gets called the addend may get added
388 again. */
389 HOWTO (R_NDS32_9_PCREL, /* type */
390 1, /* rightshift */
391 1, /* size (0 = byte, 1 = short, 2 = long) */
392 8, /* bitsize */
393 TRUE, /* pc_relative */
394 0, /* bitpos */
395 complain_overflow_signed, /* complain_on_overflow */
396 nds32_elf_9_pcrel_reloc, /* special_function */
397 "R_NDS32_9_PCREL", /* name */
398 FALSE, /* partial_inplace */
399 0xff, /* src_mask */
400 0xff, /* dst_mask */
401 TRUE), /* pcrel_offset */
402
403 /* A relative 15 bit relocation, right shifted by 1. */
404 HOWTO (R_NDS32_15_PCREL, /* type */
405 1, /* rightshift */
406 2, /* size (0 = byte, 1 = short, 2 = long) */
407 14, /* bitsize */
408 TRUE, /* pc_relative */
409 0, /* bitpos */
410 complain_overflow_signed, /* complain_on_overflow */
411 bfd_elf_generic_reloc, /* special_function */
412 "R_NDS32_15_PCREL", /* name */
413 FALSE, /* partial_inplace */
414 0x3fff, /* src_mask */
415 0x3fff, /* dst_mask */
416 TRUE), /* pcrel_offset */
417
418 /* A relative 17 bit relocation, right shifted by 1. */
419 HOWTO (R_NDS32_17_PCREL, /* type */
420 1, /* rightshift */
421 2, /* size (0 = byte, 1 = short, 2 = long) */
422 16, /* bitsize */
423 TRUE, /* pc_relative */
424 0, /* bitpos */
425 complain_overflow_signed, /* complain_on_overflow */
426 bfd_elf_generic_reloc, /* special_function */
427 "R_NDS32_17_PCREL", /* name */
428 FALSE, /* partial_inplace */
429 0xffff, /* src_mask */
430 0xffff, /* dst_mask */
431 TRUE), /* pcrel_offset */
432
433 /* A relative 25 bit relocation, right shifted by 1. */
434 /* ??? It's not clear whether this should have partial_inplace set or not.
435 Branch relaxing in the assembler can store the addend in the insn,
436 and if bfd_install_relocation gets called the addend may get added
437 again. */
438 HOWTO (R_NDS32_25_PCREL, /* type */
439 1, /* rightshift */
440 2, /* size (0 = byte, 1 = short, 2 = long) */
441 24, /* bitsize */
442 TRUE, /* pc_relative */
443 0, /* bitpos */
444 complain_overflow_signed, /* complain_on_overflow */
445 bfd_elf_generic_reloc, /* special_function */
446 "R_NDS32_25_PCREL", /* name */
447 FALSE, /* partial_inplace */
448 0xffffff, /* src_mask */
449 0xffffff, /* dst_mask */
450 TRUE), /* pcrel_offset */
451
452 /* High 20 bits of address when lower 12 is or'd in. */
453 HOWTO (R_NDS32_HI20, /* type */
454 12, /* rightshift */
455 2, /* size (0 = byte, 1 = short, 2 = long) */
456 20, /* bitsize */
457 FALSE, /* pc_relative */
458 0, /* bitpos */
459 complain_overflow_dont,/* complain_on_overflow */
460 nds32_elf_hi20_reloc, /* special_function */
461 "R_NDS32_HI20", /* name */
462 FALSE, /* partial_inplace */
463 0x000fffff, /* src_mask */
464 0x000fffff, /* dst_mask */
465 FALSE), /* pcrel_offset */
466
467 /* Lower 12 bits of address. */
468 HOWTO (R_NDS32_LO12S3, /* type */
469 3, /* rightshift */
470 2, /* size (0 = byte, 1 = short, 2 = long) */
471 9, /* bitsize */
472 FALSE, /* pc_relative */
473 0, /* bitpos */
474 complain_overflow_dont,/* complain_on_overflow */
475 nds32_elf_lo12_reloc, /* special_function */
476 "R_NDS32_LO12S3", /* name */
477 FALSE, /* partial_inplace */
478 0x000001ff, /* src_mask */
479 0x000001ff, /* dst_mask */
480 FALSE), /* pcrel_offset */
481
482 /* Lower 12 bits of address. */
483 HOWTO (R_NDS32_LO12S2, /* type */
484 2, /* rightshift */
485 2, /* size (0 = byte, 1 = short, 2 = long) */
486 10, /* bitsize */
487 FALSE, /* pc_relative */
488 0, /* bitpos */
489 complain_overflow_dont,/* complain_on_overflow */
490 nds32_elf_lo12_reloc, /* special_function */
491 "R_NDS32_LO12S2", /* name */
492 FALSE, /* partial_inplace */
493 0x000003ff, /* src_mask */
494 0x000003ff, /* dst_mask */
495 FALSE), /* pcrel_offset */
496
497 /* Lower 12 bits of address. */
498 HOWTO (R_NDS32_LO12S1, /* type */
499 1, /* rightshift */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
501 11, /* bitsize */
502 FALSE, /* pc_relative */
503 0, /* bitpos */
504 complain_overflow_dont,/* complain_on_overflow */
505 nds32_elf_lo12_reloc, /* special_function */
506 "R_NDS32_LO12S1", /* name */
507 FALSE, /* partial_inplace */
508 0x000007ff, /* src_mask */
509 0x000007ff, /* dst_mask */
510 FALSE), /* pcrel_offset */
511
512 /* Lower 12 bits of address. */
513 HOWTO (R_NDS32_LO12S0, /* type */
514 0, /* rightshift */
515 2, /* size (0 = byte, 1 = short, 2 = long) */
516 12, /* bitsize */
517 FALSE, /* pc_relative */
518 0, /* bitpos */
519 complain_overflow_dont,/* complain_on_overflow */
520 nds32_elf_lo12_reloc, /* special_function */
521 "R_NDS32_LO12S0", /* name */
522 FALSE, /* partial_inplace */
523 0x00000fff, /* src_mask */
524 0x00000fff, /* dst_mask */
525 FALSE), /* pcrel_offset */
526
527 /* Small data area 15 bits offset. */
528 HOWTO (R_NDS32_SDA15S3, /* type */
529 3, /* rightshift */
530 2, /* size (0 = byte, 1 = short, 2 = long) */
531 15, /* bitsize */
532 FALSE, /* pc_relative */
533 0, /* bitpos */
534 complain_overflow_signed, /* complain_on_overflow */
535 nds32_elf_sda15_reloc, /* special_function */
536 "R_NDS32_SDA15S3", /* name */
537 FALSE, /* partial_inplace */
538 0x00007fff, /* src_mask */
539 0x00007fff, /* dst_mask */
540 FALSE), /* pcrel_offset */
541
542 /* Small data area 15 bits offset. */
543 HOWTO (R_NDS32_SDA15S2, /* type */
544 2, /* rightshift */
545 2, /* size (0 = byte, 1 = short, 2 = long) */
546 15, /* bitsize */
547 FALSE, /* pc_relative */
548 0, /* bitpos */
549 complain_overflow_signed, /* complain_on_overflow */
550 nds32_elf_sda15_reloc, /* special_function */
551 "R_NDS32_SDA15S2", /* name */
552 FALSE, /* partial_inplace */
553 0x00007fff, /* src_mask */
554 0x00007fff, /* dst_mask */
555 FALSE), /* pcrel_offset */
556
557 /* Small data area 15 bits offset. */
558 HOWTO (R_NDS32_SDA15S1, /* type */
559 1, /* rightshift */
560 2, /* size (0 = byte, 1 = short, 2 = long) */
561 15, /* bitsize */
562 FALSE, /* pc_relative */
563 0, /* bitpos */
564 complain_overflow_signed, /* complain_on_overflow */
565 nds32_elf_sda15_reloc, /* special_function */
566 "R_NDS32_SDA15S1", /* name */
567 FALSE, /* partial_inplace */
568 0x00007fff, /* src_mask */
569 0x00007fff, /* dst_mask */
570 FALSE), /* pcrel_offset */
571
572 /* Small data area 15 bits offset. */
573 HOWTO (R_NDS32_SDA15S0, /* type */
574 0, /* rightshift */
575 2, /* size (0 = byte, 1 = short, 2 = long) */
576 15, /* bitsize */
577 FALSE, /* pc_relative */
578 0, /* bitpos */
579 complain_overflow_signed, /* complain_on_overflow */
580 nds32_elf_sda15_reloc, /* special_function */
581 "R_NDS32_SDA15S0", /* name */
582 FALSE, /* partial_inplace */
583 0x00007fff, /* src_mask */
584 0x00007fff, /* dst_mask */
585 FALSE), /* pcrel_offset */
586
587 /* GNU extension to record C++ vtable hierarchy */
588 HOWTO (R_NDS32_GNU_VTINHERIT, /* type */
589 0, /* rightshift */
590 2, /* size (0 = byte, 1 = short, 2 = long) */
591 0, /* bitsize */
592 FALSE, /* pc_relative */
593 0, /* bitpos */
594 complain_overflow_dont,/* complain_on_overflow */
595 NULL, /* special_function */
596 "R_NDS32_GNU_VTINHERIT", /* name */
597 FALSE, /* partial_inplace */
598 0, /* src_mask */
599 0, /* dst_mask */
600 FALSE), /* pcrel_offset */
601
602 /* GNU extension to record C++ vtable member usage */
603 HOWTO (R_NDS32_GNU_VTENTRY, /* type */
604 0, /* rightshift */
605 2, /* size (0 = byte, 1 = short, 2 = long) */
606 0, /* bitsize */
607 FALSE, /* pc_relative */
608 0, /* bitpos */
609 complain_overflow_dont,/* complain_on_overflow */
610 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
611 "R_NDS32_GNU_VTENTRY", /* name */
612 FALSE, /* partial_inplace */
613 0, /* src_mask */
614 0, /* dst_mask */
615 FALSE), /* pcrel_offset */
616
617 /* A 16 bit absolute relocation. */
618 HOWTO (R_NDS32_16_RELA, /* type */
619 0, /* rightshift */
620 1, /* size (0 = byte, 1 = short, 2 = long) */
621 16, /* bitsize */
622 FALSE, /* pc_relative */
623 0, /* bitpos */
624 complain_overflow_bitfield, /* complain_on_overflow */
625 bfd_elf_generic_reloc, /* special_function */
626 "R_NDS32_16_RELA", /* name */
627 FALSE, /* partial_inplace */
628 0xffff, /* src_mask */
629 0xffff, /* dst_mask */
630 FALSE), /* pcrel_offset */
631
632 /* A 32 bit absolute relocation. */
633 HOWTO (R_NDS32_32_RELA, /* type */
634 0, /* rightshift */
635 2, /* size (0 = byte, 1 = short, 2 = long) */
636 32, /* bitsize */
637 FALSE, /* pc_relative */
638 0, /* bitpos */
639 complain_overflow_bitfield, /* complain_on_overflow */
640 bfd_elf_generic_reloc, /* special_function */
641 "R_NDS32_32_RELA", /* name */
642 FALSE, /* partial_inplace */
643 0xffffffff, /* src_mask */
644 0xffffffff, /* dst_mask */
645 FALSE), /* pcrel_offset */
646
647 /* A 20 bit address. */
648 HOWTO (R_NDS32_20_RELA, /* type */
649 0, /* rightshift */
650 2, /* size (0 = byte, 1 = short, 2 = long) */
651 20, /* bitsize */
652 FALSE, /* pc_relative */
653 0, /* bitpos */
654 complain_overflow_signed, /* complain_on_overflow */
655 bfd_elf_generic_reloc, /* special_function */
656 "R_NDS32_20_RELA", /* name */
657 FALSE, /* partial_inplace */
658 0xfffff, /* src_mask */
659 0xfffff, /* dst_mask */
660 FALSE), /* pcrel_offset */
661
662 HOWTO (R_NDS32_9_PCREL_RELA, /* type */
663 1, /* rightshift */
664 1, /* size (0 = byte, 1 = short, 2 = long) */
665 8, /* bitsize */
666 TRUE, /* pc_relative */
667 0, /* bitpos */
668 complain_overflow_signed, /* complain_on_overflow */
669 bfd_elf_generic_reloc, /* special_function */
670 "R_NDS32_9_PCREL_RELA",/* name */
671 FALSE, /* partial_inplace */
672 0xff, /* src_mask */
673 0xff, /* dst_mask */
674 TRUE), /* pcrel_offset */
675
676 /* A relative 15 bit relocation, right shifted by 1. */
677 HOWTO (R_NDS32_15_PCREL_RELA, /* type */
678 1, /* rightshift */
679 2, /* size (0 = byte, 1 = short, 2 = long) */
680 14, /* bitsize */
681 TRUE, /* pc_relative */
682 0, /* bitpos */
683 complain_overflow_signed, /* complain_on_overflow */
684 bfd_elf_generic_reloc, /* special_function */
685 "R_NDS32_15_PCREL_RELA", /* name */
686 FALSE, /* partial_inplace */
687 0x3fff, /* src_mask */
688 0x3fff, /* dst_mask */
689 TRUE), /* pcrel_offset */
690
691 /* A relative 17 bit relocation, right shifted by 1. */
692 HOWTO (R_NDS32_17_PCREL_RELA, /* type */
693 1, /* rightshift */
694 2, /* size (0 = byte, 1 = short, 2 = long) */
695 16, /* bitsize */
696 TRUE, /* pc_relative */
697 0, /* bitpos */
698 complain_overflow_signed, /* complain_on_overflow */
699 bfd_elf_generic_reloc, /* special_function */
700 "R_NDS32_17_PCREL_RELA", /* name */
701 FALSE, /* partial_inplace */
702 0xffff, /* src_mask */
703 0xffff, /* dst_mask */
704 TRUE), /* pcrel_offset */
705
706 /* A relative 25 bit relocation, right shifted by 2. */
707 HOWTO (R_NDS32_25_PCREL_RELA, /* type */
708 1, /* rightshift */
709 2, /* size (0 = byte, 1 = short, 2 = long) */
710 24, /* bitsize */
711 TRUE, /* pc_relative */
712 0, /* bitpos */
713 complain_overflow_signed, /* complain_on_overflow */
714 bfd_elf_generic_reloc, /* special_function */
715 "R_NDS32_25_PCREL_RELA", /* name */
716 FALSE, /* partial_inplace */
717 0xffffff, /* src_mask */
718 0xffffff, /* dst_mask */
719 TRUE), /* pcrel_offset */
720
721 /* High 20 bits of address when lower 16 is or'd in. */
722 HOWTO (R_NDS32_HI20_RELA, /* type */
723 12, /* rightshift */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
725 20, /* bitsize */
726 FALSE, /* pc_relative */
727 0, /* bitpos */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_NDS32_HI20_RELA", /* name */
731 FALSE, /* partial_inplace */
732 0x000fffff, /* src_mask */
733 0x000fffff, /* dst_mask */
734 FALSE), /* pcrel_offset */
735
736 /* Lower 12 bits of address. */
737 HOWTO (R_NDS32_LO12S3_RELA, /* type */
738 3, /* rightshift */
739 2, /* size (0 = byte, 1 = short, 2 = long) */
740 9, /* bitsize */
741 FALSE, /* pc_relative */
742 0, /* bitpos */
743 complain_overflow_dont,/* complain_on_overflow */
744 bfd_elf_generic_reloc, /* special_function */
745 "R_NDS32_LO12S3_RELA", /* name */
746 FALSE, /* partial_inplace */
747 0x000001ff, /* src_mask */
748 0x000001ff, /* dst_mask */
749 FALSE), /* pcrel_offset */
750
751 /* Lower 12 bits of address. */
752 HOWTO (R_NDS32_LO12S2_RELA, /* type */
753 2, /* rightshift */
754 2, /* size (0 = byte, 1 = short, 2 = long) */
755 10, /* bitsize */
756 FALSE, /* pc_relative */
757 0, /* bitpos */
758 complain_overflow_dont,/* complain_on_overflow */
759 bfd_elf_generic_reloc, /* special_function */
760 "R_NDS32_LO12S2_RELA", /* name */
761 FALSE, /* partial_inplace */
762 0x000003ff, /* src_mask */
763 0x000003ff, /* dst_mask */
764 FALSE), /* pcrel_offset */
765
766 /* Lower 12 bits of address. */
767 HOWTO (R_NDS32_LO12S1_RELA, /* type */
768 1, /* rightshift */
769 2, /* size (0 = byte, 1 = short, 2 = long) */
770 11, /* bitsize */
771 FALSE, /* pc_relative */
772 0, /* bitpos */
773 complain_overflow_dont,/* complain_on_overflow */
774 bfd_elf_generic_reloc, /* special_function */
775 "R_NDS32_LO12S1_RELA", /* name */
776 FALSE, /* partial_inplace */
777 0x000007ff, /* src_mask */
778 0x000007ff, /* dst_mask */
779 FALSE), /* pcrel_offset */
780
781 /* Lower 12 bits of address. */
782 HOWTO (R_NDS32_LO12S0_RELA, /* type */
783 0, /* rightshift */
784 2, /* size (0 = byte, 1 = short, 2 = long) */
785 12, /* bitsize */
786 FALSE, /* pc_relative */
787 0, /* bitpos */
788 complain_overflow_dont,/* complain_on_overflow */
789 bfd_elf_generic_reloc, /* special_function */
790 "R_NDS32_LO12S0_RELA", /* name */
791 FALSE, /* partial_inplace */
792 0x00000fff, /* src_mask */
793 0x00000fff, /* dst_mask */
794 FALSE), /* pcrel_offset */
795
796 /* Small data area 15 bits offset. */
797 HOWTO (R_NDS32_SDA15S3_RELA, /* type */
798 3, /* rightshift */
799 2, /* size (0 = byte, 1 = short, 2 = long) */
800 15, /* bitsize */
801 FALSE, /* pc_relative */
802 0, /* bitpos */
803 complain_overflow_signed, /* complain_on_overflow */
804 bfd_elf_generic_reloc, /* special_function */
805 "R_NDS32_SDA15S3_RELA",/* name */
806 FALSE, /* partial_inplace */
807 0x00007fff, /* src_mask */
808 0x00007fff, /* dst_mask */
809 FALSE), /* pcrel_offset */
810
811 /* Small data area 15 bits offset. */
812 HOWTO (R_NDS32_SDA15S2_RELA, /* type */
813 2, /* rightshift */
814 2, /* size (0 = byte, 1 = short, 2 = long) */
815 15, /* bitsize */
816 FALSE, /* pc_relative */
817 0, /* bitpos */
818 complain_overflow_signed, /* complain_on_overflow */
819 bfd_elf_generic_reloc, /* special_function */
820 "R_NDS32_SDA15S2_RELA",/* name */
821 FALSE, /* partial_inplace */
822 0x00007fff, /* src_mask */
823 0x00007fff, /* dst_mask */
824 FALSE), /* pcrel_offset */
825
826 HOWTO (R_NDS32_SDA15S1_RELA, /* type */
827 1, /* rightshift */
828 2, /* size (0 = byte, 1 = short, 2 = long) */
829 15, /* bitsize */
830 FALSE, /* pc_relative */
831 0, /* bitpos */
832 complain_overflow_signed, /* complain_on_overflow */
833 bfd_elf_generic_reloc, /* special_function */
834 "R_NDS32_SDA15S1_RELA",/* name */
835 FALSE, /* partial_inplace */
836 0x00007fff, /* src_mask */
837 0x00007fff, /* dst_mask */
838 FALSE), /* pcrel_offset */
839
840 HOWTO (R_NDS32_SDA15S0_RELA, /* type */
841 0, /* rightshift */
842 2, /* size (0 = byte, 1 = short, 2 = long) */
843 15, /* bitsize */
844 FALSE, /* pc_relative */
845 0, /* bitpos */
846 complain_overflow_signed, /* complain_on_overflow */
847 bfd_elf_generic_reloc, /* special_function */
848 "R_NDS32_SDA15S0_RELA",/* name */
849 FALSE, /* partial_inplace */
850 0x00007fff, /* src_mask */
851 0x00007fff, /* dst_mask */
852 FALSE), /* pcrel_offset */
853
854 /* GNU extension to record C++ vtable hierarchy */
855 HOWTO (R_NDS32_RELA_GNU_VTINHERIT, /* type */
856 0, /* rightshift */
857 2, /* size (0 = byte, 1 = short, 2 = long) */
858 0, /* bitsize */
859 FALSE, /* pc_relative */
860 0, /* bitpos */
861 complain_overflow_dont,/* complain_on_overflow */
862 NULL, /* special_function */
863 "R_NDS32_RELA_GNU_VTINHERIT", /* name */
864 FALSE, /* partial_inplace */
865 0, /* src_mask */
866 0, /* dst_mask */
867 FALSE), /* pcrel_offset */
868
869 /* GNU extension to record C++ vtable member usage */
870 HOWTO (R_NDS32_RELA_GNU_VTENTRY, /* type */
871 0, /* rightshift */
872 2, /* size (0 = byte, 1 = short, 2 = long) */
873 0, /* bitsize */
874 FALSE, /* pc_relative */
875 0, /* bitpos */
876 complain_overflow_dont,/* complain_on_overflow */
877 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
878 "R_NDS32_RELA_GNU_VTENTRY", /* name */
879 FALSE, /* partial_inplace */
880 0, /* src_mask */
881 0, /* dst_mask */
882 FALSE), /* pcrel_offset */
883
884 /* Like R_NDS32_20, but referring to the GOT table entry for
885 the symbol. */
886 HOWTO (R_NDS32_GOT20, /* type */
887 0, /* rightshift */
888 2, /* size (0 = byte, 1 = short, 2 = long) */
889 20, /* bitsize */
890 FALSE, /* pc_relative */
891 0, /* bitpos */
892 complain_overflow_signed, /* complain_on_overflow */
893 bfd_elf_generic_reloc, /* special_function */
894 "R_NDS32_GOT20", /* name */
895 FALSE, /* partial_inplace */
896 0xfffff, /* src_mask */
897 0xfffff, /* dst_mask */
898 FALSE), /* pcrel_offset */
899
900 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
901 entry for the symbol. */
902 HOWTO (R_NDS32_25_PLTREL, /* type */
903 1, /* rightshift */
904 2, /* size (0 = byte, 1 = short, 2 = long) */
905 24, /* bitsize */
906 TRUE, /* pc_relative */
907 0, /* bitpos */
908 complain_overflow_signed, /* complain_on_overflow */
909 bfd_elf_generic_reloc, /* special_function */
910 "R_NDS32_25_PLTREL", /* name */
911 FALSE, /* partial_inplace */
912 0xffffff, /* src_mask */
913 0xffffff, /* dst_mask */
914 TRUE), /* pcrel_offset */
915
916 /* This is used only by the dynamic linker. The symbol should exist
917 both in the object being run and in some shared library. The
918 dynamic linker copies the data addressed by the symbol from the
919 shared library into the object, because the object being
920 run has to have the data at some particular address. */
921 HOWTO (R_NDS32_COPY, /* type */
922 0, /* rightshift */
923 2, /* size (0 = byte, 1 = short, 2 = long) */
924 32, /* bitsize */
925 FALSE, /* pc_relative */
926 0, /* bitpos */
927 complain_overflow_bitfield, /* complain_on_overflow */
928 bfd_elf_generic_reloc, /* special_function */
929 "R_NDS32_COPY", /* name */
930 FALSE, /* partial_inplace */
931 0xffffffff, /* src_mask */
932 0xffffffff, /* dst_mask */
933 FALSE), /* pcrel_offset */
934
935 /* Like R_NDS32_20, but used when setting global offset table
936 entries. */
937 HOWTO (R_NDS32_GLOB_DAT, /* type */
938 0, /* rightshift */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
940 32, /* bitsize */
941 FALSE, /* pc_relative */
942 0, /* bitpos */
943 complain_overflow_bitfield, /* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_NDS32_GLOB_DAT", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 FALSE), /* pcrel_offset */
950
951 /* Marks a procedure linkage table entry for a symbol. */
952 HOWTO (R_NDS32_JMP_SLOT, /* type */
953 0, /* rightshift */
954 2, /* size (0 = byte, 1 = short, 2 = long) */
955 32, /* bitsize */
956 FALSE, /* pc_relative */
957 0, /* bitpos */
958 complain_overflow_bitfield, /* complain_on_overflow */
959 bfd_elf_generic_reloc, /* special_function */
960 "R_NDS32_JMP_SLOT", /* name */
961 FALSE, /* partial_inplace */
962 0xffffffff, /* src_mask */
963 0xffffffff, /* dst_mask */
964 FALSE), /* pcrel_offset */
965
966 /* Used only by the dynamic linker. When the object is run, this
967 longword is set to the load address of the object, plus the
968 addend. */
969 HOWTO (R_NDS32_RELATIVE, /* type */
970 0, /* rightshift */
971 2, /* size (0 = byte, 1 = short, 2 = long) */
972 32, /* bitsize */
973 FALSE, /* pc_relative */
974 0, /* bitpos */
975 complain_overflow_bitfield, /* complain_on_overflow */
976 bfd_elf_generic_reloc, /* special_function */
977 "R_NDS32_RELATIVE", /* name */
978 FALSE, /* partial_inplace */
979 0xffffffff, /* src_mask */
980 0xffffffff, /* dst_mask */
981 FALSE), /* pcrel_offset */
982
983 HOWTO (R_NDS32_GOTOFF, /* type */
984 0, /* rightshift */
985 2, /* size (0 = byte, 1 = short, 2 = long) */
986 20, /* bitsize */
987 FALSE, /* pc_relative */
988 0, /* bitpos */
989 complain_overflow_signed, /* complain_on_overflow */
990 bfd_elf_generic_reloc, /* special_function */
991 "R_NDS32_GOTOFF", /* name */
992 FALSE, /* partial_inplace */
993 0xfffff, /* src_mask */
994 0xfffff, /* dst_mask */
995 FALSE), /* pcrel_offset */
996
997 /* An PC Relative 20-bit relocation used when setting PIC offset
998 table register. */
999 HOWTO (R_NDS32_GOTPC20, /* type */
1000 0, /* rightshift */
1001 2, /* size (0 = byte, 1 = short, 2 = long) */
1002 20, /* bitsize */
1003 TRUE, /* pc_relative */
1004 0, /* bitpos */
1005 complain_overflow_signed, /* complain_on_overflow */
1006 bfd_elf_generic_reloc, /* special_function */
1007 "R_NDS32_GOTPC20", /* name */
1008 FALSE, /* partial_inplace */
1009 0xfffff, /* src_mask */
1010 0xfffff, /* dst_mask */
1011 TRUE), /* pcrel_offset */
1012
1013 /* Like R_NDS32_HI20, but referring to the GOT table entry for
1014 the symbol. */
1015 HOWTO (R_NDS32_GOT_HI20, /* type */
1016 12, /* rightshift */
1017 2, /* size (0 = byte, 1 = short, 2 = long) */
1018 20, /* bitsize */
1019 FALSE, /* pc_relative */
1020 0, /* bitpos */
1021 complain_overflow_dont,/* complain_on_overflow */
1022 bfd_elf_generic_reloc, /* special_function */
1023 "R_NDS32_GOT_HI20", /* name */
1024 FALSE, /* partial_inplace */
1025 0x000fffff, /* src_mask */
1026 0x000fffff, /* dst_mask */
1027 FALSE), /* pcrel_offset */
1028 HOWTO (R_NDS32_GOT_LO12, /* type */
1029 0, /* rightshift */
1030 2, /* size (0 = byte, 1 = short, 2 = long) */
1031 12, /* bitsize */
1032 FALSE, /* pc_relative */
1033 0, /* bitpos */
1034 complain_overflow_dont,/* complain_on_overflow */
1035 bfd_elf_generic_reloc, /* special_function */
1036 "R_NDS32_GOT_LO12", /* name */
1037 FALSE, /* partial_inplace */
1038 0x00000fff, /* src_mask */
1039 0x00000fff, /* dst_mask */
1040 FALSE), /* pcrel_offset */
1041
1042 /* An PC Relative relocation used when setting PIC offset table register.
1043 Like R_NDS32_HI20, but referring to the GOT table entry for
1044 the symbol. */
1045 HOWTO (R_NDS32_GOTPC_HI20, /* type */
1046 12, /* rightshift */
1047 2, /* size (0 = byte, 1 = short, 2 = long) */
1048 20, /* bitsize */
1049 FALSE, /* pc_relative */
1050 0, /* bitpos */
1051 complain_overflow_dont,/* complain_on_overflow */
1052 bfd_elf_generic_reloc, /* special_function */
1053 "R_NDS32_GOTPC_HI20", /* name */
1054 FALSE, /* partial_inplace */
1055 0x000fffff, /* src_mask */
1056 0x000fffff, /* dst_mask */
1057 TRUE), /* pcrel_offset */
1058 HOWTO (R_NDS32_GOTPC_LO12, /* type */
1059 0, /* rightshift */
1060 2, /* size (0 = byte, 1 = short, 2 = long) */
1061 12, /* bitsize */
1062 FALSE, /* pc_relative */
1063 0, /* bitpos */
1064 complain_overflow_dont, /* complain_on_overflow */
1065 bfd_elf_generic_reloc, /* special_function */
1066 "R_NDS32_GOTPC_LO12", /* name */
1067 FALSE, /* partial_inplace */
1068 0x00000fff, /* src_mask */
1069 0x00000fff, /* dst_mask */
1070 TRUE), /* pcrel_offset */
1071
1072 HOWTO (R_NDS32_GOTOFF_HI20, /* type */
1073 12, /* rightshift */
1074 2, /* size (0 = byte, 1 = short, 2 = long) */
1075 20, /* bitsize */
1076 FALSE, /* pc_relative */
1077 0, /* bitpos */
1078 complain_overflow_dont,/* complain_on_overflow */
1079 bfd_elf_generic_reloc, /* special_function */
1080 "R_NDS32_GOTOFF_HI20", /* name */
1081 FALSE, /* partial_inplace */
1082 0x000fffff, /* src_mask */
1083 0x000fffff, /* dst_mask */
1084 FALSE), /* pcrel_offset */
1085 HOWTO (R_NDS32_GOTOFF_LO12, /* type */
1086 0, /* rightshift */
1087 2, /* size (0 = byte, 1 = short, 2 = long) */
1088 12, /* bitsize */
1089 FALSE, /* pc_relative */
1090 0, /* bitpos */
1091 complain_overflow_dont,/* complain_on_overflow */
1092 bfd_elf_generic_reloc, /* special_function */
1093 "R_NDS32_GOTOFF_LO12", /* name */
1094 FALSE, /* partial_inplace */
1095 0x00000fff, /* src_mask */
1096 0x00000fff, /* dst_mask */
1097 FALSE), /* pcrel_offset */
1098
1099 /* Alignment hint for relaxable instruction. This is used with
1100 R_NDS32_LABEL as a pair. Relax this instruction from 4 bytes to 2
1101 in order to make next label aligned on word boundary. */
1102 HOWTO (R_NDS32_INSN16, /* type */
1103 0, /* rightshift */
1104 2, /* size (0 = byte, 1 = short, 2 = long) */
1105 32, /* bitsize */
1106 FALSE, /* pc_relative */
1107 0, /* bitpos */
1108 complain_overflow_dont,/* complain_on_overflow */
1109 nds32_elf_ignore_reloc,/* special_function */
1110 "R_NDS32_INSN16", /* name */
1111 FALSE, /* partial_inplace */
1112 0x00000fff, /* src_mask */
1113 0x00000fff, /* dst_mask */
1114 FALSE), /* pcrel_offset */
1115
1116 /* Alignment hint for label. */
1117 HOWTO (R_NDS32_LABEL, /* type */
1118 0, /* rightshift */
1119 2, /* size (0 = byte, 1 = short, 2 = long) */
1120 32, /* bitsize */
1121 FALSE, /* pc_relative */
1122 0, /* bitpos */
1123 complain_overflow_dont,/* complain_on_overflow */
1124 nds32_elf_ignore_reloc,/* special_function */
1125 "R_NDS32_LABEL", /* name */
1126 FALSE, /* partial_inplace */
1127 0xffffffff, /* src_mask */
1128 0xffffffff, /* dst_mask */
1129 FALSE), /* pcrel_offset */
1130
1131 /* Relax hint for unconditional call sequence */
1132 HOWTO (R_NDS32_LONGCALL1, /* type */
1133 0, /* rightshift */
1134 2, /* size (0 = byte, 1 = short, 2 = long) */
1135 32, /* bitsize */
1136 FALSE, /* pc_relative */
1137 0, /* bitpos */
1138 complain_overflow_dont,/* complain_on_overflow */
1139 nds32_elf_ignore_reloc,/* special_function */
1140 "R_NDS32_LONGCALL1", /* name */
1141 FALSE, /* partial_inplace */
1142 0xffffffff, /* src_mask */
1143 0xffffffff, /* dst_mask */
1144 FALSE), /* pcrel_offset */
1145
1146 /* Relax hint for conditional call sequence. */
1147 HOWTO (R_NDS32_LONGCALL2, /* type */
1148 0, /* rightshift */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1150 32, /* bitsize */
1151 FALSE, /* pc_relative */
1152 0, /* bitpos */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 nds32_elf_ignore_reloc,/* special_function */
1155 "R_NDS32_LONGCALL2", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 FALSE), /* pcrel_offset */
1160
1161 /* Relax hint for conditional call sequence. */
1162 HOWTO (R_NDS32_LONGCALL3, /* type */
1163 0, /* rightshift */
1164 2, /* size (0 = byte, 1 = short, 2 = long) */
1165 32, /* bitsize */
1166 FALSE, /* pc_relative */
1167 0, /* bitpos */
1168 complain_overflow_dont,/* complain_on_overflow */
1169 nds32_elf_ignore_reloc,/* special_function */
1170 "R_NDS32_LONGCALL3", /* name */
1171 FALSE, /* partial_inplace */
1172 0xffffffff, /* src_mask */
1173 0xffffffff, /* dst_mask */
1174 FALSE), /* pcrel_offset */
1175
1176 /* Relax hint for unconditional branch sequence. */
1177 HOWTO (R_NDS32_LONGJUMP1, /* type */
1178 0, /* rightshift */
1179 2, /* size (0 = byte, 1 = short, 2 = long) */
1180 32, /* bitsize */
1181 FALSE, /* pc_relative */
1182 0, /* bitpos */
1183 complain_overflow_dont,/* complain_on_overflow */
1184 nds32_elf_ignore_reloc,/* special_function */
1185 "R_NDS32_LONGJUMP1", /* name */
1186 FALSE, /* partial_inplace */
1187 0xffffffff, /* src_mask */
1188 0xffffffff, /* dst_mask */
1189 FALSE), /* pcrel_offset */
1190
1191 /* Relax hint for conditional branch sequence. */
1192 HOWTO (R_NDS32_LONGJUMP2, /* type */
1193 0, /* rightshift */
1194 2, /* size (0 = byte, 1 = short, 2 = long) */
1195 32, /* bitsize */
1196 FALSE, /* pc_relative */
1197 0, /* bitpos */
1198 complain_overflow_dont,/* complain_on_overflow */
1199 nds32_elf_ignore_reloc,/* special_function */
1200 "R_NDS32_LONGJUMP2", /* name */
1201 FALSE, /* partial_inplace */
1202 0xffffffff, /* src_mask */
1203 0xffffffff, /* dst_mask */
1204 FALSE), /* pcrel_offset */
1205
1206 /* Relax hint for conditional branch sequence. */
1207 HOWTO (R_NDS32_LONGJUMP3, /* type */
1208 0, /* rightshift */
1209 2, /* size (0 = byte, 1 = short, 2 = long) */
1210 32, /* bitsize */
1211 FALSE, /* pc_relative */
1212 0, /* bitpos */
1213 complain_overflow_dont,/* complain_on_overflow */
1214 nds32_elf_ignore_reloc,/* special_function */
1215 "R_NDS32_LONGJUMP3", /* name */
1216 FALSE, /* partial_inplace */
1217 0xffffffff, /* src_mask */
1218 0xffffffff, /* dst_mask */
1219 FALSE), /* pcrel_offset */
1220
1221 /* Relax hint for load/store sequence. */
1222 HOWTO (R_NDS32_LOADSTORE, /* type */
1223 0, /* rightshift */
1224 2, /* size (0 = byte, 1 = short, 2 = long) */
1225 32, /* bitsize */
1226 FALSE, /* pc_relative */
1227 0, /* bitpos */
1228 complain_overflow_dont,/* complain_on_overflow */
1229 nds32_elf_ignore_reloc,/* special_function */
1230 "R_NDS32_LOADSTORE", /* name */
1231 FALSE, /* partial_inplace */
1232 0xffffffff, /* src_mask */
1233 0xffffffff, /* dst_mask */
1234 FALSE), /* pcrel_offset */
1235
1236 /* Relax hint for load/store sequence. */
1237 HOWTO (R_NDS32_9_FIXED_RELA, /* type */
1238 0, /* rightshift */
1239 1, /* size (0 = byte, 1 = short, 2 = long) */
1240 16, /* bitsize */
1241 FALSE, /* pc_relative */
1242 0, /* bitpos */
1243 complain_overflow_dont,/* complain_on_overflow */
1244 nds32_elf_ignore_reloc,/* special_function */
1245 "R_NDS32_9_FIXED_RELA",/* name */
1246 FALSE, /* partial_inplace */
1247 0x000000ff, /* src_mask */
1248 0x000000ff, /* dst_mask */
1249 FALSE), /* pcrel_offset */
1250
1251 /* Relax hint for load/store sequence. */
1252 HOWTO (R_NDS32_15_FIXED_RELA, /* type */
1253 0, /* rightshift */
1254 2, /* size (0 = byte, 1 = short, 2 = long) */
1255 32, /* bitsize */
1256 FALSE, /* pc_relative */
1257 0, /* bitpos */
1258 complain_overflow_dont,/* complain_on_overflow */
1259 nds32_elf_ignore_reloc,/* special_function */
1260 "R_NDS32_15_FIXED_RELA", /* name */
1261 FALSE, /* partial_inplace */
1262 0x00003fff, /* src_mask */
1263 0x00003fff, /* dst_mask */
1264 FALSE), /* pcrel_offset */
1265
1266 /* Relax hint for load/store sequence. */
1267 HOWTO (R_NDS32_17_FIXED_RELA, /* type */
1268 0, /* rightshift */
1269 2, /* size (0 = byte, 1 = short, 2 = long) */
1270 32, /* bitsize */
1271 FALSE, /* pc_relative */
1272 0, /* bitpos */
1273 complain_overflow_dont,/* complain_on_overflow */
1274 nds32_elf_ignore_reloc,/* special_function */
1275 "R_NDS32_17_FIXED_RELA", /* name */
1276 FALSE, /* partial_inplace */
1277 0x0000ffff, /* src_mask */
1278 0x0000ffff, /* dst_mask */
1279 FALSE), /* pcrel_offset */
1280
1281 /* Relax hint for load/store sequence. */
1282 HOWTO (R_NDS32_25_FIXED_RELA, /* type */
1283 0, /* rightshift */
1284 2, /* size (0 = byte, 1 = short, 2 = long) */
1285 32, /* bitsize */
1286 FALSE, /* pc_relative */
1287 0, /* bitpos */
1288 complain_overflow_dont,/* complain_on_overflow */
1289 nds32_elf_ignore_reloc,/* special_function */
1290 "R_NDS32_25_FIXED_RELA", /* name */
1291 FALSE, /* partial_inplace */
1292 0x00ffffff, /* src_mask */
1293 0x00ffffff, /* dst_mask */
1294 FALSE), /* pcrel_offset */
1295
1296 /* High 20 bits of PLT symbol offset relative to PC. */
1297 HOWTO (R_NDS32_PLTREL_HI20, /* type */
1298 12, /* rightshift */
1299 2, /* size (0 = byte, 1 = short, 2 = long) */
1300 20, /* bitsize */
1301 FALSE, /* pc_relative */
1302 0, /* bitpos */
1303 complain_overflow_dont,/* complain_on_overflow */
1304 bfd_elf_generic_reloc, /* special_function */
1305 "R_NDS32_PLTREL_HI20", /* name */
1306 FALSE, /* partial_inplace */
1307 0x000fffff, /* src_mask */
1308 0x000fffff, /* dst_mask */
1309 FALSE), /* pcrel_offset */
1310
1311 /* Low 12 bits of PLT symbol offset relative to PC. */
1312 HOWTO (R_NDS32_PLTREL_LO12, /* type */
1313 0, /* rightshift */
1314 2, /* size (0 = byte, 1 = short, 2 = long) */
1315 12, /* bitsize */
1316 FALSE, /* pc_relative */
1317 0, /* bitpos */
1318 complain_overflow_dont,/* complain_on_overflow */
1319 bfd_elf_generic_reloc, /* special_function */
1320 "R_NDS32_PLTREL_LO12", /* name */
1321 FALSE, /* partial_inplace */
1322 0x00000fff, /* src_mask */
1323 0x00000fff, /* dst_mask */
1324 FALSE), /* pcrel_offset */
1325
1326 /* High 20 bits of PLT symbol offset relative to GOT (GP). */
1327 HOWTO (R_NDS32_PLT_GOTREL_HI20, /* type */
1328 12, /* rightshift */
1329 2, /* size (0 = byte, 1 = short, 2 = long) */
1330 20, /* bitsize */
1331 FALSE, /* pc_relative */
1332 0, /* bitpos */
1333 complain_overflow_dont,/* complain_on_overflow */
1334 bfd_elf_generic_reloc, /* special_function */
1335 "R_NDS32_PLT_GOTREL_HI20", /* name */
1336 FALSE, /* partial_inplace */
1337 0x000fffff, /* src_mask */
1338 0x000fffff, /* dst_mask */
1339 FALSE), /* pcrel_offset */
1340
1341 /* Low 12 bits of PLT symbol offset relative to GOT (GP). */
1342 HOWTO (R_NDS32_PLT_GOTREL_LO12, /* type */
1343 0, /* rightshift */
1344 2, /* size (0 = byte, 1 = short, 2 = long) */
1345 12, /* bitsize */
1346 FALSE, /* pc_relative */
1347 0, /* bitpos */
1348 complain_overflow_dont,/* complain_on_overflow */
1349 bfd_elf_generic_reloc, /* special_function */
1350 "R_NDS32_PLT_GOTREL_LO12", /* name */
1351 FALSE, /* partial_inplace */
1352 0x00000fff, /* src_mask */
1353 0x00000fff, /* dst_mask */
1354 FALSE), /* pcrel_offset */
1355
1356 /* Small data area 12 bits offset. */
1357 HOWTO (R_NDS32_SDA12S2_DP_RELA, /* type */
1358 2, /* rightshift */
1359 2, /* size (0 = byte, 1 = short, 2 = long) */
1360 12, /* bitsize */
1361 FALSE, /* pc_relative */
1362 0, /* bitpos */
1363 complain_overflow_signed, /* complain_on_overflow */
1364 bfd_elf_generic_reloc, /* special_function */
1365 "R_NDS32_SDA12S2_DP_RELA", /* name */
1366 FALSE, /* partial_inplace */
1367 0x00000fff, /* src_mask */
1368 0x00000fff, /* dst_mask */
1369 FALSE), /* pcrel_offset */
1370
1371 /* Small data area 12 bits offset. */
1372 HOWTO (R_NDS32_SDA12S2_SP_RELA, /* type */
1373 2, /* rightshift */
1374 2, /* size (0 = byte, 1 = short, 2 = long) */
1375 12, /* bitsize */
1376 FALSE, /* pc_relative */
1377 0, /* bitpos */
1378 complain_overflow_signed, /* complain_on_overflow */
1379 bfd_elf_generic_reloc, /* special_function */
1380 "R_NDS32_SDA12S2_SP_RELA", /* name */
1381 FALSE, /* partial_inplace */
1382 0x00000fff, /* src_mask */
1383 0x00000fff, /* dst_mask */
1384 FALSE), /* pcrel_offset */
1385 /* Lower 12 bits of address. */
1386
1387 HOWTO (R_NDS32_LO12S2_DP_RELA, /* type */
1388 2, /* rightshift */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1390 10, /* bitsize */
1391 FALSE, /* pc_relative */
1392 0, /* bitpos */
1393 complain_overflow_dont,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_NDS32_LO12S2_DP_RELA", /* name */
1396 FALSE, /* partial_inplace */
1397 0x000003ff, /* src_mask */
1398 0x000003ff, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1400
1401 /* Lower 12 bits of address. */
1402 HOWTO (R_NDS32_LO12S2_SP_RELA,/* type */
1403 2, /* rightshift */
1404 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 10, /* bitsize */
1406 FALSE, /* pc_relative */
1407 0, /* bitpos */
1408 complain_overflow_dont,/* complain_on_overflow */
1409 bfd_elf_generic_reloc, /* special_function */
1410 "R_NDS32_LO12S2_SP_RELA", /* name */
1411 FALSE, /* partial_inplace */
1412 0x000003ff, /* src_mask */
1413 0x000003ff, /* dst_mask */
1414 FALSE), /* pcrel_offset */
1415 /* Lower 12 bits of address. Special identity for or case. */
1416 HOWTO (R_NDS32_LO12S0_ORI_RELA, /* type */
1417 0, /* rightshift */
1418 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 12, /* bitsize */
1420 FALSE, /* pc_relative */
1421 0, /* bitpos */
1422 complain_overflow_dont,/* complain_on_overflow */
1423 bfd_elf_generic_reloc, /* special_function */
1424 "R_NDS32_LO12S0_ORI_RELA", /* name */
1425 FALSE, /* partial_inplace */
1426 0x00000fff, /* src_mask */
1427 0x00000fff, /* dst_mask */
1428 FALSE), /* pcrel_offset */
1429 /* Small data area 19 bits offset. */
1430 HOWTO (R_NDS32_SDA16S3_RELA, /* type */
1431 3, /* rightshift */
1432 2, /* size (0 = byte, 1 = short, 2 = long) */
1433 16, /* bitsize */
1434 FALSE, /* pc_relative */
1435 0, /* bitpos */
1436 complain_overflow_signed, /* complain_on_overflow */
1437 bfd_elf_generic_reloc, /* special_function */
1438 "R_NDS32_SDA16S3_RELA",/* name */
1439 FALSE, /* partial_inplace */
1440 0x0000ffff, /* src_mask */
1441 0x0000ffff, /* dst_mask */
1442 FALSE), /* pcrel_offset */
1443
1444 /* Small data area 15 bits offset. */
1445 HOWTO (R_NDS32_SDA17S2_RELA, /* type */
1446 2, /* rightshift */
1447 2, /* size (0 = byte, 1 = short, 2 = long) */
1448 17, /* bitsize */
1449 FALSE, /* pc_relative */
1450 0, /* bitpos */
1451 complain_overflow_signed, /* complain_on_overflow */
1452 bfd_elf_generic_reloc, /* special_function */
1453 "R_NDS32_SDA17S2_RELA",/* name */
1454 FALSE, /* partial_inplace */
1455 0x0001ffff, /* src_mask */
1456 0x0001ffff, /* dst_mask */
1457 FALSE), /* pcrel_offset */
1458
1459 HOWTO (R_NDS32_SDA18S1_RELA, /* type */
1460 1, /* rightshift */
1461 2, /* size (0 = byte, 1 = short, 2 = long) */
1462 18, /* bitsize */
1463 FALSE, /* pc_relative */
1464 0, /* bitpos */
1465 complain_overflow_signed, /* complain_on_overflow */
1466 bfd_elf_generic_reloc, /* special_function */
1467 "R_NDS32_SDA18S1_RELA",/* name */
1468 FALSE, /* partial_inplace */
1469 0x0003ffff, /* src_mask */
1470 0x0003ffff, /* dst_mask */
1471 FALSE), /* pcrel_offset */
1472
1473 HOWTO (R_NDS32_SDA19S0_RELA, /* type */
1474 0, /* rightshift */
1475 2, /* size (0 = byte, 1 = short, 2 = long) */
1476 19, /* bitsize */
1477 FALSE, /* pc_relative */
1478 0, /* bitpos */
1479 complain_overflow_signed, /* complain_on_overflow */
1480 bfd_elf_generic_reloc, /* special_function */
1481 "R_NDS32_SDA19S0_RELA",/* name */
1482 FALSE, /* partial_inplace */
1483 0x0007ffff, /* src_mask */
1484 0x0007ffff, /* dst_mask */
1485 FALSE), /* pcrel_offset */
1486 HOWTO (R_NDS32_DWARF2_OP1_RELA, /* type */
1487 0, /* rightshift */
1488 0, /* size (0 = byte, 1 = short, 2 = long) */
1489 8, /* bitsize */
1490 FALSE, /* pc_relative */
1491 0, /* bitpos */
1492 complain_overflow_dont,/* complain_on_overflow */
1493 nds32_elf_ignore_reloc,/* special_function */
1494 "R_NDS32_DWARF2_OP1_RELA", /* name */
1495 FALSE, /* partial_inplace */
1496 0xff, /* src_mask */
1497 0xff, /* dst_mask */
1498 FALSE), /* pcrel_offset */
1499 HOWTO (R_NDS32_DWARF2_OP2_RELA, /* type */
1500 0, /* rightshift */
1501 1, /* size (0 = byte, 1 = short, 2 = long) */
1502 16, /* bitsize */
1503 FALSE, /* pc_relative */
1504 0, /* bitpos */
1505 complain_overflow_dont,/* complain_on_overflow */
1506 nds32_elf_ignore_reloc,/* special_function */
1507 "R_NDS32_DWARF2_OP2_RELA", /* name */
1508 FALSE, /* partial_inplace */
1509 0xffff, /* src_mask */
1510 0xffff, /* dst_mask */
1511 FALSE), /* pcrel_offset */
1512 HOWTO (R_NDS32_DWARF2_LEB_RELA, /* type */
1513 0, /* rightshift */
1514 2, /* size (0 = byte, 1 = short, 2 = long) */
1515 32, /* bitsize */
1516 FALSE, /* pc_relative */
1517 0, /* bitpos */
1518 complain_overflow_dont,/* complain_on_overflow */
1519 nds32_elf_ignore_reloc,/* special_function */
1520 "R_NDS32_DWARF2_LEB_RELA", /* name */
1521 FALSE, /* partial_inplace */
1522 0xffffffff, /* src_mask */
1523 0xffffffff, /* dst_mask */
1524 FALSE), /* pcrel_offset */
1525 HOWTO (R_NDS32_UPDATE_TA_RELA,/* type */
1526 0, /* rightshift */
1527 1, /* size (0 = byte, 1 = short, 2 = long) */
1528 16, /* bitsize */
1529 FALSE, /* pc_relative */
1530 0, /* bitpos */
1531 complain_overflow_dont,/* complain_on_overflow */
1532 nds32_elf_ignore_reloc,/* special_function */
1533 "R_NDS32_UPDATE_TA_RELA", /* name */
1534 FALSE, /* partial_inplace */
1535 0xffff, /* src_mask */
1536 0xffff, /* dst_mask */
1537 FALSE), /* pcrel_offset */
1538 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
1539 entry for the symbol. */
1540 HOWTO (R_NDS32_9_PLTREL, /* type */
1541 1, /* rightshift */
1542 1, /* size (0 = byte, 1 = short, 2 = long) */
1543 8, /* bitsize */
1544 TRUE, /* pc_relative */
1545 0, /* bitpos */
1546 complain_overflow_signed, /* complain_on_overflow */
1547 bfd_elf_generic_reloc, /* special_function */
1548 "R_NDS32_9_PLTREL", /* name */
1549 FALSE, /* partial_inplace */
1550 0xff, /* src_mask */
1551 0xff, /* dst_mask */
1552 TRUE), /* pcrel_offset */
1553 /* Low 20 bits of PLT symbol offset relative to GOT (GP). */
1554 HOWTO (R_NDS32_PLT_GOTREL_LO20, /* type */
1555 0, /* rightshift */
1556 2, /* size (0 = byte, 1 = short, 2 = long) */
1557 20, /* bitsize */
1558 FALSE, /* pc_relative */
1559 0, /* bitpos */
1560 complain_overflow_dont,/* complain_on_overflow */
1561 bfd_elf_generic_reloc, /* special_function */
1562 "R_NDS32_PLT_GOTREL_LO20", /* name */
1563 FALSE, /* partial_inplace */
1564 0x000fffff, /* src_mask */
1565 0x000fffff, /* dst_mask */
1566 FALSE), /* pcrel_offset */
1567 /* low 15 bits of PLT symbol offset relative to GOT (GP) */
1568 HOWTO (R_NDS32_PLT_GOTREL_LO15, /* type */
1569 0, /* rightshift */
1570 2, /* size (0 = byte, 1 = short, 2 = long) */
1571 15, /* bitsize */
1572 FALSE, /* pc_relative */
1573 0, /* bitpos */
1574 complain_overflow_dont,/* complain_on_overflow */
1575 bfd_elf_generic_reloc, /* special_function */
1576 "R_NDS32_PLT_GOTREL_LO15", /* name */
1577 FALSE, /* partial_inplace */
1578 0x00007fff, /* src_mask */
1579 0x00007fff, /* dst_mask */
1580 FALSE), /* pcrel_offset */
1581 /* Low 19 bits of PLT symbol offset relative to GOT (GP). */
1582 HOWTO (R_NDS32_PLT_GOTREL_LO19, /* type */
1583 0, /* rightshift */
1584 2, /* size (0 = byte, 1 = short, 2 = long) */
1585 19, /* bitsize */
1586 FALSE, /* pc_relative */
1587 0, /* bitpos */
1588 complain_overflow_dont,/* complain_on_overflow */
1589 bfd_elf_generic_reloc, /* special_function */
1590 "R_NDS32_PLT_GOTREL_LO19", /* name */
1591 FALSE, /* partial_inplace */
1592 0x0007ffff, /* src_mask */
1593 0x0007ffff, /* dst_mask */
1594 FALSE), /* pcrel_offset */
1595 HOWTO (R_NDS32_GOT_LO15, /* type */
1596 0, /* rightshift */
1597 2, /* size (0 = byte, 1 = short, 2 = long) */
1598 15, /* bitsize */
1599 FALSE, /* pc_relative */
1600 0, /* bitpos */
1601 complain_overflow_dont,/* complain_on_overflow */
1602 bfd_elf_generic_reloc, /* special_function */
1603 "R_NDS32_GOT_LO15", /* name */
1604 FALSE, /* partial_inplace */
1605 0x00007fff, /* src_mask */
1606 0x00007fff, /* dst_mask */
1607 FALSE), /* pcrel_offset */
1608 HOWTO (R_NDS32_GOT_LO19, /* type */
1609 0, /* rightshift */
1610 2, /* size (0 = byte, 1 = short, 2 = long) */
1611 19, /* bitsize */
1612 FALSE, /* pc_relative */
1613 0, /* bitpos */
1614 complain_overflow_dont,/* complain_on_overflow */
1615 bfd_elf_generic_reloc, /* special_function */
1616 "R_NDS32_GOT_LO19", /* name */
1617 FALSE, /* partial_inplace */
1618 0x0007ffff, /* src_mask */
1619 0x0007ffff, /* dst_mask */
1620 FALSE), /* pcrel_offset */
1621 HOWTO (R_NDS32_GOTOFF_LO15, /* type */
1622 0, /* rightshift */
1623 2, /* size (0 = byte, 1 = short, 2 = long) */
1624 15, /* bitsize */
1625 FALSE, /* pc_relative */
1626 0, /* bitpos */
1627 complain_overflow_dont,/* complain_on_overflow */
1628 bfd_elf_generic_reloc, /* special_function */
1629 "R_NDS32_GOTOFF_LO15", /* name */
1630 FALSE, /* partial_inplace */
1631 0x00007fff, /* src_mask */
1632 0x00007fff, /* dst_mask */
1633 FALSE), /* pcrel_offset */
1634 HOWTO (R_NDS32_GOTOFF_LO19, /* type */
1635 0, /* rightshift */
1636 2, /* size (0 = byte, 1 = short, 2 = long) */
1637 19, /* bitsize */
1638 FALSE, /* pc_relative */
1639 0, /* bitpos */
1640 complain_overflow_dont,/* complain_on_overflow */
1641 bfd_elf_generic_reloc, /* special_function */
1642 "R_NDS32_GOTOFF_LO19", /* name */
1643 FALSE, /* partial_inplace */
1644 0x0007ffff, /* src_mask */
1645 0x0007ffff, /* dst_mask */
1646 FALSE), /* pcrel_offset */
1647 /* GOT 15 bits offset. */
1648 HOWTO (R_NDS32_GOT15S2_RELA, /* type */
1649 2, /* rightshift */
1650 2, /* size (0 = byte, 1 = short, 2 = long) */
1651 15, /* bitsize */
1652 FALSE, /* pc_relative */
1653 0, /* bitpos */
1654 complain_overflow_signed, /* complain_on_overflow */
1655 bfd_elf_generic_reloc, /* special_function */
1656 "R_NDS32_GOT15S2_RELA",/* name */
1657 FALSE, /* partial_inplace */
1658 0x00007fff, /* src_mask */
1659 0x00007fff, /* dst_mask */
1660 FALSE), /* pcrel_offset */
1661 /* GOT 17 bits offset. */
1662 HOWTO (R_NDS32_GOT17S2_RELA, /* type */
1663 2, /* rightshift */
1664 2, /* size (0 = byte, 1 = short, 2 = long) */
1665 17, /* bitsize */
1666 FALSE, /* pc_relative */
1667 0, /* bitpos */
1668 complain_overflow_signed, /* complain_on_overflow */
1669 bfd_elf_generic_reloc, /* special_function */
1670 "R_NDS32_GOT17S2_RELA",/* name */
1671 FALSE, /* partial_inplace */
1672 0x0001ffff, /* src_mask */
1673 0x0001ffff, /* dst_mask */
1674 FALSE), /* pcrel_offset */
1675 /* A 5 bit address. */
1676 HOWTO (R_NDS32_5_RELA, /* type */
1677 0, /* rightshift */
1678 1, /* size (0 = byte, 1 = short, 2 = long) */
1679 5, /* bitsize */
1680 FALSE, /* pc_relative */
1681 0, /* bitpos */
1682 complain_overflow_signed, /* complain_on_overflow */
1683 bfd_elf_generic_reloc, /* special_function */
1684 "R_NDS32_5_RELA", /* name */
1685 FALSE, /* partial_inplace */
1686 0x1f, /* src_mask */
1687 0x1f, /* dst_mask */
1688 FALSE), /* pcrel_offset */
1689 HOWTO (R_NDS32_10_UPCREL_RELA,/* type */
1690 1, /* rightshift */
1691 1, /* size (0 = byte, 1 = short, 2 = long) */
1692 9, /* bitsize */
1693 TRUE, /* pc_relative */
1694 0, /* bitpos */
1695 complain_overflow_unsigned, /* complain_on_overflow */
1696 bfd_elf_generic_reloc, /* special_function */
1697 "R_NDS32_10_UPCREL_RELA", /* name */
1698 FALSE, /* partial_inplace */
1699 0x1ff, /* src_mask */
1700 0x1ff, /* dst_mask */
1701 TRUE), /* pcrel_offset */
1702 HOWTO (R_NDS32_SDA_FP7U2_RELA,/* type */
1703 2, /* rightshift */
1704 1, /* size (0 = byte, 1 = short, 2 = long) */
1705 7, /* bitsize */
1706 FALSE, /* pc_relative */
1707 0, /* bitpos */
1708 complain_overflow_unsigned, /* complain_on_overflow */
1709 bfd_elf_generic_reloc, /* special_function */
1710 "R_NDS32_SDA_FP7U2_RELA", /* name */
1711 FALSE, /* partial_inplace */
1712 0x0000007f, /* src_mask */
1713 0x0000007f, /* dst_mask */
1714 FALSE), /* pcrel_offset */
1715 HOWTO (R_NDS32_WORD_9_PCREL_RELA, /* type */
1716 1, /* rightshift */
1717 2, /* size (0 = byte, 1 = short, 2 = long) */
1718 8, /* bitsize */
1719 TRUE, /* pc_relative */
1720 0, /* bitpos */
1721 complain_overflow_signed, /* complain_on_overflow */
1722 bfd_elf_generic_reloc, /* special_function */
1723 "R_NDS32_WORD_9_PCREL_RELA", /* name */
1724 FALSE, /* partial_inplace */
1725 0xff, /* src_mask */
1726 0xff, /* dst_mask */
1727 TRUE), /* pcrel_offset */
1728 HOWTO (R_NDS32_25_ABS_RELA, /* type */
1729 1, /* rightshift */
1730 2, /* size (0 = byte, 1 = short, 2 = long) */
1731 24, /* bitsize */
1732 FALSE, /* pc_relative */
1733 0, /* bitpos */
1734 complain_overflow_dont,/* complain_on_overflow */
1735 bfd_elf_generic_reloc, /* special_function */
1736 "R_NDS32_25_ABS_RELA", /* name */
1737 FALSE, /* partial_inplace */
1738 0xffffff, /* src_mask */
1739 0xffffff, /* dst_mask */
1740 FALSE), /* pcrel_offset */
1741
1742 /* A relative 17 bit relocation for ifc, right shifted by 1. */
1743 HOWTO (R_NDS32_17IFC_PCREL_RELA, /* type */
1744 1, /* rightshift */
1745 2, /* size (0 = byte, 1 = short, 2 = long) */
1746 16, /* bitsize */
1747 TRUE, /* pc_relative */
1748 0, /* bitpos */
1749 complain_overflow_signed, /* complain_on_overflow */
1750 bfd_elf_generic_reloc, /* special_function */
1751 "R_NDS32_17IFC_PCREL_RELA", /* name */
1752 FALSE, /* partial_inplace */
1753 0xffff, /* src_mask */
1754 0xffff, /* dst_mask */
1755 TRUE), /* pcrel_offset */
1756
1757 /* A relative unsigned 10 bit relocation for ifc, right shifted by 1. */
1758 HOWTO (R_NDS32_10IFCU_PCREL_RELA, /* type */
1759 1, /* rightshift */
1760 1, /* size (0 = byte, 1 = short, 2 = long) */
1761 9, /* bitsize */
1762 TRUE, /* pc_relative */
1763 0, /* bitpos */
1764 complain_overflow_unsigned, /* complain_on_overflow */
1765 bfd_elf_generic_reloc, /* special_function */
1766 "R_NDS32_10IFCU_PCREL_RELA", /* name */
1767 FALSE, /* partial_inplace */
1768 0x1ff, /* src_mask */
1769 0x1ff, /* dst_mask */
1770 TRUE), /* pcrel_offset */
1c8f6a4d
KLC		 1771
1772 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1773 HOWTO (R_NDS32_TLS_LE_HI20, /* type */
1774 12, /* rightshift */
1775 2, /* size (0 = byte, 1 = short, 2 = long) */
1776 20, /* bitsize */
1777 FALSE, /* pc_relative */
1778 0, /* bitpos */
1779 complain_overflow_dont, /* complain_on_overflow */
1780 bfd_elf_generic_reloc, /* special_function */
1781 "R_NDS32_TLS_LE_HI20", /* name */
1782 FALSE, /* partial_inplace */
1783 0x000fffff, /* src_mask */
1784 0x000fffff, /* dst_mask */
1785 FALSE), /* pcrel_offset */
1786 HOWTO (R_NDS32_TLS_LE_LO12, /* type */
1787 0, /* rightshift */
1788 2, /* size (0 = byte, 1 = short, 2 = long) */
1789 12, /* bitsize */
1790 FALSE, /* pc_relative */
1791 0, /* bitpos */
1792 complain_overflow_dont, /* complain_on_overflow */
1793 bfd_elf_generic_reloc, /* special_function */
1794 "R_NDS32_TLS_LE_LO12", /* name */
1795 FALSE, /* partial_inplace */
1796 0x00000fff, /* src_mask */
1797 0x00000fff, /* dst_mask */
1798 FALSE), /* pcrel_offset */
1799
1800 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1801 HOWTO (R_NDS32_TLS_IE_HI20, /* type */
1802 12, /* rightshift */
1803 2, /* size (0 = byte, 1 = short, 2 = long) */
1804 20, /* bitsize */
1805 FALSE, /* pc_relative */
1806 0, /* bitpos */
1807 complain_overflow_dont, /* complain_on_overflow */
1808 bfd_elf_generic_reloc, /* special_function */
1809 "R_NDS32_TLS_IE_HI20", /* name */
1810 FALSE, /* partial_inplace */
1811 0x000fffff, /* src_mask */
1812 0x000fffff, /* dst_mask */
1813 FALSE), /* pcrel_offset */
1814 HOWTO (R_NDS32_TLS_IE_LO12S2, /* type */
1815 2, /* rightshift */
1816 2, /* size (0 = byte, 1 = short, 2 = long) */
1817 10, /* bitsize */
1818 FALSE, /* pc_relative */
1819 0, /* bitpos */
1820 complain_overflow_dont, /* complain_on_overflow */
1821 bfd_elf_generic_reloc, /* special_function */
1822 "R_NDS32_TLS_IE_LO12S2", /* name */
1823 FALSE, /* partial_inplace */
1824 0x000003ff, /* src_mask */
1825 0x000003ff, /* dst_mask */
1826 FALSE), /* pcrel_offset */
1827 /* Mark a TLS IE entry in GOT. */
1828 HOWTO (R_NDS32_TLS_TPOFF, /* type */
1829 0, /* rightshift */
1830 2, /* size (0 = byte, 1 = short, 2 = long) */
1831 32, /* bitsize */
1832 FALSE, /* pc_relative */
1833 0, /* bitpos */
1834 complain_overflow_bitfield, /* complain_on_overflow */
1835 bfd_elf_generic_reloc, /* special_function */
1836 "R_NDS32_TLS_TPOFF", /* name */
1837 FALSE, /* partial_inplace */
1838 0xffffffff, /* src_mask */
1839 0xffffffff, /* dst_mask */
1840 FALSE), /* pcrel_offset */
1841 /* A 20 bit address. */
1842 HOWTO (R_NDS32_TLS_LE_20, /* type */
1843 0, /* rightshift */
1844 2, /* size (0 = byte, 1 = short, 2 = long) */
1845 20, /* bitsize */
1846 FALSE, /* pc_relative */
1847 0, /* bitpos */
1848 complain_overflow_signed, /* complain_on_overflow */
1849 bfd_elf_generic_reloc, /* special_function */
1850 "R_NDS32_TLS_LE_20", /* name */
1851 FALSE, /* partial_inplace */
1852 0xfffff, /* src_mask */
1853 0xfffff, /* dst_mask */
1854 FALSE), /* pcrel_offset */
1855 HOWTO (R_NDS32_TLS_LE_15S0, /* type */
1856 0, /* rightshift */
1857 2, /* size (0 = byte, 1 = short, 2 = long) */
1858 15, /* bitsize */
1859 FALSE, /* pc_relative */
1860 0, /* bitpos */
1861 complain_overflow_signed, /* complain_on_overflow */
1862 bfd_elf_generic_reloc, /* special_function */
1863 "R_NDS32_TLS_LE_15S0", /* name */
1864 FALSE, /* partial_inplace */
1865 0x7fff, /* src_mask */
1866 0x7fff, /* dst_mask */
1867 FALSE), /* pcrel_offset */
1868 HOWTO (R_NDS32_TLS_LE_15S1, /* type */
1869 1, /* rightshift */
1870 2, /* size (0 = byte, 1 = short, 2 = long) */
1871 15, /* bitsize */
1872 FALSE, /* pc_relative */
1873 0, /* bitpos */
1874 complain_overflow_signed, /* complain_on_overflow */
1875 bfd_elf_generic_reloc, /* special_function */
1876 "R_NDS32_TLS_LE_15S1", /* name */
1877 FALSE, /* partial_inplace */
1878 0x7fff, /* src_mask */
1879 0x7fff, /* dst_mask */
1880 FALSE), /* pcrel_offset */
1881 HOWTO (R_NDS32_TLS_LE_15S2, /* type */
1882 2, /* rightshift */
1883 2, /* size (0 = byte, 1 = short, 2 = long) */
1884 15, /* bitsize */
1885 FALSE, /* pc_relative */
1886 0, /* bitpos */
1887 complain_overflow_signed, /* complain_on_overflow */
1888 bfd_elf_generic_reloc, /* special_function */
1889 "R_NDS32_TLS_LE_15S2", /* name */
1890 FALSE, /* partial_inplace */
1891 0x7fff, /* src_mask */
1892 0x7fff, /* dst_mask */
1893 FALSE), /* pcrel_offset */
1894
1895 /* Relax hint for unconditional call sequence */
1896 HOWTO (R_NDS32_LONGCALL4, /* type */
1897 0, /* rightshift */
1898 2, /* size (0 = byte, 1 = short, 2 = long) */
1899 32, /* bitsize */
1900 FALSE, /* pc_relative */
1901 0, /* bitpos */
1902 complain_overflow_dont, /* complain_on_overflow */
1903 nds32_elf_ignore_reloc, /* special_function */
1904 "R_NDS32_LONGCALL4", /* name */
1905 FALSE, /* partial_inplace */
1906 0xffffffff, /* src_mask */
1907 0xffffffff, /* dst_mask */
1908 FALSE), /* pcrel_offset */
1909
1910 /* Relax hint for conditional call sequence. */
1911 HOWTO (R_NDS32_LONGCALL5, /* type */
1912 0, /* rightshift */
1913 2, /* size (0 = byte, 1 = short, 2 = long) */
1914 32, /* bitsize */
1915 FALSE, /* pc_relative */
1916 0, /* bitpos */
1917 complain_overflow_dont, /* complain_on_overflow */
1918 nds32_elf_ignore_reloc, /* special_function */
1919 "R_NDS32_LONGCALL5", /* name */
1920 FALSE, /* partial_inplace */
1921 0xffffffff, /* src_mask */
1922 0xffffffff, /* dst_mask */
1923 FALSE), /* pcrel_offset */
1924
1925 /* Relax hint for conditional call sequence. */
1926 HOWTO (R_NDS32_LONGCALL6, /* type */
1927 0, /* rightshift */
1928 2, /* size (0 = byte, 1 = short, 2 = long) */
1929 32, /* bitsize */
1930 FALSE, /* pc_relative */
1931 0, /* bitpos */
1932 complain_overflow_dont, /* complain_on_overflow */
1933 nds32_elf_ignore_reloc, /* special_function */
1934 "R_NDS32_LONGCALL6", /* name */
1935 FALSE, /* partial_inplace */
1936 0xffffffff, /* src_mask */
1937 0xffffffff, /* dst_mask */
1938 FALSE), /* pcrel_offset */
1939
1940 /* Relax hint for unconditional branch sequence. */
1941 HOWTO (R_NDS32_LONGJUMP4, /* type */
1942 0, /* rightshift */
1943 2, /* size (0 = byte, 1 = short, 2 = long) */
1944 32, /* bitsize */
1945 FALSE, /* pc_relative */
1946 0, /* bitpos */
1947 complain_overflow_dont, /* complain_on_overflow */
1948 nds32_elf_ignore_reloc, /* special_function */
1949 "R_NDS32_LONGJUMP4", /* name */
1950 FALSE, /* partial_inplace */
1951 0xffffffff, /* src_mask */
1952 0xffffffff, /* dst_mask */
1953 FALSE), /* pcrel_offset */
1954
1955 /* Relax hint for conditional branch sequence. */
1956 HOWTO (R_NDS32_LONGJUMP5, /* type */
1957 0, /* rightshift */
1958 2, /* size (0 = byte, 1 = short, 2 = long) */
1959 32, /* bitsize */
1960 FALSE, /* pc_relative */
1961 0, /* bitpos */
1962 complain_overflow_dont, /* complain_on_overflow */
1963 nds32_elf_ignore_reloc, /* special_function */
1964 "R_NDS32_LONGJUMP5", /* name */
1965 FALSE, /* partial_inplace */
1966 0xffffffff, /* src_mask */
1967 0xffffffff, /* dst_mask */
1968 FALSE), /* pcrel_offset */
1969
1970 /* Relax hint for conditional branch sequence. */
1971 HOWTO (R_NDS32_LONGJUMP6, /* type */
1972 0, /* rightshift */
1973 2, /* size (0 = byte, 1 = short, 2 = long) */
1974 32, /* bitsize */
1975 FALSE, /* pc_relative */
1976 0, /* bitpos */
1977 complain_overflow_dont, /* complain_on_overflow */
1978 nds32_elf_ignore_reloc, /* special_function */
1979 "R_NDS32_LONGJUMP6", /* name */
1980 FALSE, /* partial_inplace */
1981 0xffffffff, /* src_mask */
1982 0xffffffff, /* dst_mask */
1983 FALSE), /* pcrel_offset */
1984
1985 /* Relax hint for conditional branch sequence. */
1986 HOWTO (R_NDS32_LONGJUMP7, /* type */
1987 0, /* rightshift */
1988 2, /* size (0 = byte, 1 = short, 2 = long) */
1989 32, /* bitsize */
1990 FALSE, /* pc_relative */
1991 0, /* bitpos */
1992 complain_overflow_dont, /* complain_on_overflow */
1993 nds32_elf_ignore_reloc, /* special_function */
1994 "R_NDS32_LONGJUMP7", /* name */
1995 FALSE, /* partial_inplace */
1996 0xffffffff, /* src_mask */
1997 0xffffffff, /* dst_mask */
1998 FALSE), /* pcrel_offset */
35c08157
KLC		 1999};
2000
2001/* Relocations used for relaxation. */
2002static reloc_howto_type nds32_elf_relax_howto_table[] =
2003{
2004 HOWTO (R_NDS32_RELAX_ENTRY, /* type */
2005 0, /* rightshift */
2006 2, /* size (0 = byte, 1 = short, 2 = long) */
2007 32, /* bitsize */
2008 FALSE, /* pc_relative */
2009 0, /* bitpos */
2010 complain_overflow_dont,/* complain_on_overflow */
2011 nds32_elf_ignore_reloc,/* special_function */
2012 "R_NDS32_RELAX_ENTRY", /* name */
2013 FALSE, /* partial_inplace */
2014 0xffffffff, /* src_mask */
2015 0xffffffff, /* dst_mask */
2016 FALSE), /* pcrel_offset */
2017 HOWTO (R_NDS32_GOT_SUFF, /* type */
2018 0, /* rightshift */
2019 2, /* size (0 = byte, 1 = short, 2 = long) */
2020 32, /* bitsize */
2021 FALSE, /* pc_relative */
2022 0, /* bitpos */
2023 complain_overflow_dont,/* complain_on_overflow */
2024 nds32_elf_ignore_reloc,/* special_function */
2025 "R_NDS32_GOT_SUFF", /* name */
2026 FALSE, /* partial_inplace */
2027 0xffffffff, /* src_mask */
2028 0xffffffff, /* dst_mask */
2029 FALSE), /* pcrel_offset */
2030 HOWTO (R_NDS32_GOTOFF_SUFF, /* type */
2031 0, /* rightshift */
2032 2, /* size (0 = byte, 1 = short, 2 = long) */
2033 32, /* bitsize */
2034 FALSE, /* pc_relative */
2035 0, /* bitpos */
2036 complain_overflow_bitfield, /* complain_on_overflow */
2037 nds32_elf_ignore_reloc,/* special_function */
2038 "R_NDS32_GOTOFF_SUFF", /* name */
2039 FALSE, /* partial_inplace */
2040 0xffffffff, /* src_mask */
2041 0xffffffff, /* dst_mask */
2042 FALSE), /* pcrel_offset */
2043 HOWTO (R_NDS32_PLT_GOT_SUFF, /* type */
2044 0, /* rightshift */
2045 2, /* size (0 = byte, 1 = short, 2 = long) */
2046 32, /* bitsize */
2047 FALSE, /* pc_relative */
2048 0, /* bitpos */
2049 complain_overflow_dont,/* complain_on_overflow */
2050 nds32_elf_ignore_reloc,/* special_function */
2051 "R_NDS32_PLT_GOT_SUFF",/* name */
2052 FALSE, /* partial_inplace */
2053 0xffffffff, /* src_mask */
2054 0xffffffff, /* dst_mask */
2055 FALSE), /* pcrel_offset */
2056 HOWTO (R_NDS32_MULCALL_SUFF, /* type */
2057 0, /* rightshift */
2058 2, /* size (0 = byte, 1 = short, 2 = long) */
2059 32, /* bitsize */
2060 FALSE, /* pc_relative */
2061 0, /* bitpos */
2062 complain_overflow_dont,/* complain_on_overflow */
2063 nds32_elf_ignore_reloc,/* special_function */
2064 "R_NDS32_MULCALL_SUFF",/* name */
2065 FALSE, /* partial_inplace */
2066 0xffffffff, /* src_mask */
2067 0xffffffff, /* dst_mask */
2068 FALSE), /* pcrel_offset */
2069 HOWTO (R_NDS32_PTR, /* type */
2070 0, /* rightshift */
2071 2, /* size (0 = byte, 1 = short, 2 = long) */
2072 32, /* bitsize */
2073 FALSE, /* pc_relative */
2074 0, /* bitpos */
2075 complain_overflow_dont,/* complain_on_overflow */
2076 nds32_elf_ignore_reloc,/* special_function */
2077 "R_NDS32_PTR", /* name */
2078 FALSE, /* partial_inplace */
2079 0xffffffff, /* src_mask */
2080 0xffffffff, /* dst_mask */
2081 FALSE), /* pcrel_offset */
2082 HOWTO (R_NDS32_PTR_COUNT, /* type */
2083 0, /* rightshift */
2084 2, /* size (0 = byte, 1 = short, 2 = long) */
2085 32, /* bitsize */
2086 FALSE, /* pc_relative */
2087 0, /* bitpos */
2088 complain_overflow_dont,/* complain_on_overflow */
2089 nds32_elf_ignore_reloc,/* special_function */
2090 "R_NDS32_PTR_COUNT", /* name */
2091 FALSE, /* partial_inplace */
2092 0xffffffff, /* src_mask */
2093 0xffffffff, /* dst_mask */
2094 FALSE), /* pcrel_offset */
2095 HOWTO (R_NDS32_PTR_RESOLVED, /* type */
2096 0, /* rightshift */
2097 2, /* size (0 = byte, 1 = short, 2 = long) */
2098 32, /* bitsize */
2099 FALSE, /* pc_relative */
2100 0, /* bitpos */
2101 complain_overflow_dont,/* complain_on_overflow */
2102 nds32_elf_ignore_reloc,/* special_function */
2103 "R_NDS32_PTR_RESOLVED",/* name */
2104 FALSE, /* partial_inplace */
2105 0xffffffff, /* src_mask */
2106 0xffffffff, /* dst_mask */
2107 FALSE), /* pcrel_offset */
2108 HOWTO (R_NDS32_PLTBLOCK, /* type */
2109 0, /* rightshift */
2110 2, /* size (0 = byte, 1 = short, 2 = long) */
2111 32, /* bitsize */
2112 FALSE, /* pc_relative */
2113 0, /* bitpos */
2114 complain_overflow_dont,/* complain_on_overflow */
2115 nds32_elf_ignore_reloc,/* special_function */
2116 "R_NDS32_PLTBLOCK", /* name */
2117 FALSE, /* partial_inplace */
2118 0xffffffff, /* src_mask */
2119 0xffffffff, /* dst_mask */
2120 FALSE), /* pcrel_offset */
2121 HOWTO (R_NDS32_RELAX_REGION_BEGIN, /* type */
2122 0, /* rightshift */
2123 2, /* size (0 = byte, 1 = short, 2 = long) */
2124 32, /* bitsize */
2125 FALSE, /* pc_relative */
2126 0, /* bitpos */
2127 complain_overflow_dont,/* complain_on_overflow */
2128 nds32_elf_ignore_reloc,/* special_function */
2129 "R_NDS32_RELAX_REGION_BEGIN", /* name */
2130 FALSE, /* partial_inplace */
2131 0xffffffff, /* src_mask */
2132 0xffffffff, /* dst_mask */
2133 FALSE), /* pcrel_offset */
2134 HOWTO (R_NDS32_RELAX_REGION_END, /* type */
2135 0, /* rightshift */
2136 2, /* size (0 = byte, 1 = short, 2 = long) */
2137 32, /* bitsize */
2138 FALSE, /* pc_relative */
2139 0, /* bitpos */
2140 complain_overflow_dont,/* complain_on_overflow */
2141 nds32_elf_ignore_reloc,/* special_function */
2142 "R_NDS32_RELAX_REGION_END", /* name */
2143 FALSE, /* partial_inplace */
2144 0xffffffff, /* src_mask */
2145 0xffffffff, /* dst_mask */
2146 FALSE), /* pcrel_offset */
2147 HOWTO (R_NDS32_MINUEND, /* type */
2148 0, /* rightshift */
2149 2, /* size (0 = byte, 1 = short, 2 = long) */
2150 32, /* bitsize */
2151 FALSE, /* pc_relative */
2152 0, /* bitpos */
2153 complain_overflow_dont,/* complain_on_overflow */
2154 nds32_elf_ignore_reloc,/* special_function */
2155 "R_NDS32_MINUEND", /* name */
2156 FALSE, /* partial_inplace */
2157 0xffffffff, /* src_mask */
2158 0xffffffff, /* dst_mask */
2159 FALSE), /* pcrel_offset */
2160 HOWTO (R_NDS32_SUBTRAHEND, /* type */
2161 0, /* rightshift */
2162 2, /* size (0 = byte, 1 = short, 2 = long) */
2163 32, /* bitsize */
2164 FALSE, /* pc_relative */
2165 0, /* bitpos */
2166 complain_overflow_dont,/* complain_on_overflow */
2167 nds32_elf_ignore_reloc,/* special_function */
2168 "R_NDS32_SUBTRAHEND", /* name */
2169 FALSE, /* partial_inplace */
2170 0xffffffff, /* src_mask */
2171 0xffffffff, /* dst_mask */
2172 FALSE), /* pcrel_offset */
2173 HOWTO (R_NDS32_DIFF8, /* type */
2174 0, /* rightshift */
2175 0, /* size (0 = byte, 1 = short, 2 = long) */
2176 8, /* bitsize */
2177 FALSE, /* pc_relative */
2178 0, /* bitpos */
2179 complain_overflow_dont,/* complain_on_overflow */
2180 nds32_elf_ignore_reloc,/* special_function */
2181 "R_NDS32_DIFF8", /* name */
2182 FALSE, /* partial_inplace */
2183 0x000000ff, /* src_mask */
2184 0x000000ff, /* dst_mask */
2185 FALSE), /* pcrel_offset */
2186 HOWTO (R_NDS32_DIFF16, /* type */
2187 0, /* rightshift */
2188 1, /* size (0 = byte, 1 = short, 2 = long) */
2189 16, /* bitsize */
2190 FALSE, /* pc_relative */
2191 0, /* bitpos */
2192 complain_overflow_dont,/* complain_on_overflow */
2193 nds32_elf_ignore_reloc,/* special_function */
2194 "R_NDS32_DIFF16", /* name */
2195 FALSE, /* partial_inplace */
2196 0x0000ffff, /* src_mask */
2197 0x0000ffff, /* dst_mask */
2198 FALSE), /* pcrel_offset */
2199 HOWTO (R_NDS32_DIFF32, /* type */
2200 0, /* rightshift */
2201 2, /* size (0 = byte, 1 = short, 2 = long) */
2202 32, /* bitsize */
2203 FALSE, /* pc_relative */
2204 0, /* bitpos */
2205 complain_overflow_dont,/* complain_on_overflow */
2206 nds32_elf_ignore_reloc,/* special_function */
2207 "R_NDS32_DIFF32", /* name */
2208 FALSE, /* partial_inplace */
2209 0xffffffff, /* src_mask */
2210 0xffffffff, /* dst_mask */
2211 FALSE), /* pcrel_offset */
2212 HOWTO (R_NDS32_DIFF_ULEB128, /* type */
2213 0, /* rightshift */
2214 0, /* size (0 = byte, 1 = short, 2 = long) */
2215 0, /* bitsize */
2216 FALSE, /* pc_relative */
2217 0, /* bitpos */
2218 complain_overflow_dont,/* complain_on_overflow */
2219 nds32_elf_ignore_reloc,/* special_function */
2220 "R_NDS32_DIFF_ULEB128",/* name */
2221 FALSE, /* partial_inplace */
2222 0xffffffff, /* src_mask */
2223 0xffffffff, /* dst_mask */
2224 FALSE), /* pcrel_offset */
2225 HOWTO (R_NDS32_DATA, /* type */
2226 0, /* rightshift */
2227 2, /* size (0 = byte, 1 = short, 2 = long) */
2228 32, /* bitsize */
2229 FALSE, /* pc_relative */
2230 0, /* bitpos */
2231 complain_overflow_dont,/* complain_on_overflow */
2232 nds32_elf_ignore_reloc,/* special_function */
2233 "R_NDS32_DATA", /* name */
2234 FALSE, /* partial_inplace */
2235 0xffffffff, /* src_mask */
2236 0xffffffff, /* dst_mask */
2237 FALSE), /* pcrel_offset */
2238 HOWTO (R_NDS32_TRAN, /* type */
2239 0, /* rightshift */
2240 2, /* size (0 = byte, 1 = short, 2 = long) */
2241 32, /* bitsize */
2242 FALSE, /* pc_relative */
2243 0, /* bitpos */
2244 complain_overflow_dont,/* complain_on_overflow */
2245 nds32_elf_ignore_reloc,/* special_function */
2246 "R_NDS32_TRAN", /* name */
2247 FALSE, /* partial_inplace */
2248 0xffffffff, /* src_mask */
2249 0xffffffff, /* dst_mask */
2250 FALSE), /* pcrel_offset */
1c8f6a4d
KLC		 2251 HOWTO (R_NDS32_TLS_LE_ADD, /* type */
2252 0, /* rightshift */
2253 2, /* size (0 = byte, 1 = short, 2 = long) */
2254 32, /* bitsize */
2255 FALSE, /* pc_relative */
2256 0, /* bitpos */
2257 complain_overflow_dont, /* complain_on_overflow */
2258 nds32_elf_ignore_reloc, /* special_function */
2259 "R_NDS32_TLS_LE_ADD", /* name */
2260 FALSE, /* partial_inplace */
2261 0xffffffff, /* src_mask */
2262 0xffffffff, /* dst_mask */
2263 FALSE), /* pcrel_offset */
2264 HOWTO (R_NDS32_TLS_LE_LS, /* type */
2265 0, /* rightshift */
2266 2, /* size (0 = byte, 1 = short, 2 = long) */
2267 32, /* bitsize */
2268 FALSE, /* pc_relative */
2269 0, /* bitpos */
2270 complain_overflow_dont, /* complain_on_overflow */
2271 nds32_elf_ignore_reloc, /* special_function */
2272 "R_NDS32_TLS_LE_LS", /* name */
2273 FALSE, /* partial_inplace */
2274 0xffffffff, /* src_mask */
2275 0xffffffff, /* dst_mask */
2276 FALSE), /* pcrel_offset */
2277 HOWTO (R_NDS32_EMPTY, /* type */
2278 0, /* rightshift */
2279 2, /* size (0 = byte, 1 = short, 2 = long) */
2280 32, /* bitsize */
2281 FALSE, /* pc_relative */
2282 0, /* bitpos */
2283 complain_overflow_dont, /* complain_on_overflow */
2284 nds32_elf_ignore_reloc, /* special_function */
2285 "R_NDS32_EMPTY", /* name */
2286 FALSE, /* partial_inplace */
2287 0xffffffff, /* src_mask */
2288 0xffffffff, /* dst_mask */
2289 FALSE), /* pcrel_offset */
35c08157
KLC		 2290};
2291
2292\f
2293/* nds32_insertion_sort sorts an array with nmemb elements of size size.
2294 This prototype is the same as qsort (). */
2295
2296void
2297nds32_insertion_sort (void *base, size_t nmemb, size_t size,
2298 int (*compar) (const void *lhs, const void *rhs))
2299{
2300 char *ptr = (char *) base;
1c8f6a4d 2301 int i, j;
35c08157
KLC		 2302 char *tmp = alloca (size);
2303
2304 /* If i is less than j, i is inserted before j.
2305
2306 |---- j ----- i --------------|
2307 \ / \ /
2308 sorted unsorted
2309 */
2310
1c8f6a4d 2311 for (i = 1; i < (int) nmemb; i++)
35c08157 2312 {
1c8f6a4d
KLC		 2313 for (j = (i - 1); j >= 0; j--)
2314 if (compar (ptr + i * size, ptr + j * size) >= 0)
35c08157
KLC		 2315 break;
2316
1c8f6a4d
KLC		 2317 j++;
2318
35c08157 2319 if (i == j)
1c8f6a4d 2320 continue; /* i is in order. */
35c08157
KLC		 2321
2322 memcpy (tmp, ptr + i * size, size);
2323 memmove (ptr + (j + 1) * size, ptr + j * size, (i - j) * size);
2324 memcpy (ptr + j * size, tmp, size);
2325 }
2326}
2327
2328/* Sort relocation by r_offset.
2329
2330 We didn't use qsort () in stdlib, because quick-sort is not a stable sorting
2331 algorithm. Relocations at the same r_offset must keep their order.
2332 For example, RELAX_ENTRY must be the very first relocation entry.
2333
2334 Currently, this function implements insertion-sort.
2335
2336 FIXME: If we already sort them in assembler, why bother sort them
2337 here again? */
2338
2339static int
2340compar_reloc (const void *lhs, const void *rhs)
2341{
2342 const Elf_Internal_Rela *l = (const Elf_Internal_Rela *) lhs;
2343 const Elf_Internal_Rela *r = (const Elf_Internal_Rela *) rhs;
2344
2345 if (l->r_offset > r->r_offset)
2346 return 1;
2347 else if (l->r_offset == r->r_offset)
2348 return 0;
2349 else
2350 return -1;
2351}
2352
2353/* Functions listed below are only used for old relocs.
2354 * nds32_elf_9_pcrel_reloc
2355 * nds32_elf_do_9_pcrel_reloc
2356 * nds32_elf_hi20_reloc
2357 * nds32_elf_relocate_hi20
2358 * nds32_elf_lo12_reloc
2359 * nds32_elf_sda15_reloc
2360 * nds32_elf_generic_reloc
2361 */
2362
2363/* Handle the R_NDS32_9_PCREL & R_NDS32_9_PCREL_RELA reloc. */
2364
2365static bfd_reloc_status_type
2366nds32_elf_9_pcrel_reloc (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
2367 void *data, asection *input_section, bfd *output_bfd,
2368 char **error_message ATTRIBUTE_UNUSED)
2369{
2370 /* This part is from bfd_elf_generic_reloc. */
2371 if (output_bfd != (bfd *) NULL
2372 && (symbol->flags & BSF_SECTION_SYM) == 0
2373 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2374 {
2375 reloc_entry->address += input_section->output_offset;
2376 return bfd_reloc_ok;
2377 }
2378
2379 if (output_bfd != NULL)
2380 {
2381 /* FIXME: See bfd_perform_relocation. Is this right? */
2382 return bfd_reloc_continue;
2383 }
2384
2385 return nds32_elf_do_9_pcrel_reloc (abfd, reloc_entry->howto,
2386 input_section,
2387 data, reloc_entry->address,
2388 symbol->section,
2389 (symbol->value
2390 + symbol->section->output_section->vma
2391 + symbol->section->output_offset),
2392 reloc_entry->addend);
2393}
2394
2395/* Utility to actually perform an R_NDS32_9_PCREL reloc. */
2396#define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
2397
2398static bfd_reloc_status_type
2399nds32_elf_do_9_pcrel_reloc (bfd *abfd, reloc_howto_type *howto,
2400 asection *input_section, bfd_byte *data,
1c8f6a4d
KLC		 2401 bfd_vma offset,
2402 asection *symbol_section ATTRIBUTE_UNUSED,
35c08157
KLC		 2403 bfd_vma symbol_value, bfd_vma addend)
2404{
2405 bfd_signed_vma relocation;
2406 unsigned short x;
2407 bfd_reloc_status_type status;
2408
2409 /* Sanity check the address (offset in section). */
2410 if (offset > bfd_get_section_limit (abfd, input_section))
2411 return bfd_reloc_outofrange;
2412
2413 relocation = symbol_value + addend;
2414 /* Make it pc relative. */
2415 relocation -= (input_section->output_section->vma
2416 + input_section->output_offset);
2417 /* These jumps mask off the lower two bits of the current address
2418 before doing pcrel calculations. */
2419 relocation -= (offset & -(bfd_vma) 2);
2420
1c8f6a4d 2421 if (relocation < -ACCURATE_8BIT_S1 || relocation >= ACCURATE_8BIT_S1)
35c08157
KLC		 2422 status = bfd_reloc_overflow;
2423 else
2424 status = bfd_reloc_ok;
2425
2426 x = bfd_getb16 (data + offset);
2427
2428 relocation >>= howto->rightshift;
2429 relocation <<= howto->bitpos;
2430 x = (x & ~howto->dst_mask)
2431 | (((x & howto->src_mask) + relocation) & howto->dst_mask);
2432
2433 bfd_putb16 ((bfd_vma) x, data + offset);
2434
2435 return status;
2436}
2437
2438/* Handle the R_NDS32_HI20_[SU]LO relocs.
2439 HI20_SLO is for the add3 and load/store with displacement instructions.
2440 HI20 is for the or3 instruction.
2441 For R_NDS32_HI20_SLO, the lower 16 bits are sign extended when added to
2442 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
2443 we must add one to the high 16 bytes (which will get subtracted off when
2444 the low 16 bits are added).
2445 These relocs have to be done in combination with an R_NDS32_LO12 reloc
2446 because there is a carry from the LO12 to the HI20. Here we just save
2447 the information we need; we do the actual relocation when we see the LO12.
2448 This code is copied from the elf32-mips.c. We also support an arbitrary
2449 number of HI20 relocs to be associated with a single LO12 reloc. The
2450 assembler sorts the relocs to ensure each HI20 immediately precedes its
2451 LO12. However if there are multiple copies, the assembler may not find
2452 the real LO12 so it picks the first one it finds. */
2453
2454struct nds32_hi20
2455{
2456 struct nds32_hi20 *next;
2457 bfd_byte *addr;
2458 bfd_vma addend;
2459};
2460
2461static struct nds32_hi20 *nds32_hi20_list;
2462
2463static bfd_reloc_status_type
2464nds32_elf_hi20_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2465 asymbol *symbol, void *data, asection *input_section,
2466 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2467{
2468 bfd_reloc_status_type ret;
2469 bfd_vma relocation;
2470 struct nds32_hi20 *n;
2471
2472 /* This part is from bfd_elf_generic_reloc.
2473 If we're relocating, and this an external symbol, we don't want
2474 to change anything. */
2475 if (output_bfd != (bfd *) NULL
2476 && (symbol->flags & BSF_SECTION_SYM) == 0 && reloc_entry->addend == 0)
2477 {
2478 reloc_entry->address += input_section->output_offset;
2479 return bfd_reloc_ok;
2480 }
2481
2482 /* Sanity check the address (offset in section). */
2483 if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
2484 return bfd_reloc_outofrange;
2485
2486 ret = bfd_reloc_ok;
2487 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2488 ret = bfd_reloc_undefined;
2489
2490 if (bfd_is_com_section (symbol->section))
2491 relocation = 0;
2492 else
2493 relocation = symbol->value;
2494
2495 relocation += symbol->section->output_section->vma;
2496 relocation += symbol->section->output_offset;
2497 relocation += reloc_entry->addend;
2498
2499 /* Save the information, and let LO12 do the actual relocation. */
2500 n = (struct nds32_hi20 *) bfd_malloc ((bfd_size_type) sizeof *n);
2501 if (n == NULL)
2502 return bfd_reloc_outofrange;
2503
2504 n->addr = (bfd_byte *) data + reloc_entry->address;
2505 n->addend = relocation;
2506 n->next = nds32_hi20_list;
2507 nds32_hi20_list = n;
2508
2509 if (output_bfd != (bfd *) NULL)
2510 reloc_entry->address += input_section->output_offset;
2511
2512 return ret;
2513}
2514
2515/* Handle an NDS32 ELF HI20 reloc. */
2516
2517static void
2518nds32_elf_relocate_hi20 (bfd *input_bfd ATTRIBUTE_UNUSED,
2519 int type ATTRIBUTE_UNUSED, Elf_Internal_Rela *relhi,
2520 Elf_Internal_Rela *rello, bfd_byte *contents,
2521 bfd_vma addend)
2522{
2523 unsigned long insn;
2524 bfd_vma addlo;
2525
2526 insn = bfd_getb32 (contents + relhi->r_offset);
2527
2528 addlo = bfd_getb32 (contents + rello->r_offset);
2529 addlo &= 0xfff;
2530
2531 addend += ((insn & 0xfffff) << 20) + addlo;
2532
2533 insn = (insn & 0xfff00000) | ((addend >> 12) & 0xfffff);
2534 bfd_putb32 (insn, contents + relhi->r_offset);
2535}
2536
2537/* Do an R_NDS32_LO12 relocation. This is a straightforward 12 bit
2538 inplace relocation; this function exists in order to do the
2539 R_NDS32_HI20_[SU]LO relocation described above. */
2540
2541static bfd_reloc_status_type
2542nds32_elf_lo12_reloc (bfd *input_bfd, arelent *reloc_entry, asymbol *symbol,
2543 void *data, asection *input_section, bfd *output_bfd,
2544 char **error_message)
2545{
2546 /* This part is from bfd_elf_generic_reloc.
2547 If we're relocating, and this an external symbol, we don't want
2548 to change anything. */
2549 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2550 && reloc_entry->addend == 0)
2551 {
2552 reloc_entry->address += input_section->output_offset;
2553 return bfd_reloc_ok;
2554 }
2555
2556 if (nds32_hi20_list != NULL)
2557 {
2558 struct nds32_hi20 *l;
2559
2560 l = nds32_hi20_list;
2561 while (l != NULL)
2562 {
2563 unsigned long insn;
2564 unsigned long val;
2565 unsigned long vallo;
2566 struct nds32_hi20 *next;
2567
2568 /* Do the HI20 relocation. Note that we actually don't need
2569 to know anything about the LO12 itself, except where to
2570 find the low 12 bits of the addend needed by the LO12. */
2571 insn = bfd_getb32 (l->addr);
2572 vallo = bfd_getb32 ((bfd_byte *) data + reloc_entry->address);
2573 vallo &= 0xfff;
2574 switch (reloc_entry->howto->type)
2575 {
2576 case R_NDS32_LO12S3:
2577 vallo <<= 3;
2578 break;
2579
2580 case R_NDS32_LO12S2:
2581 vallo <<= 2;
2582 break;
2583
2584 case R_NDS32_LO12S1:
2585 vallo <<= 1;
2586 break;
2587
2588 case R_NDS32_LO12S0:
2589 vallo <<= 0;
2590 break;
2591 }
2592
2593 val = ((insn & 0xfffff) << 12) + vallo;
2594 val += l->addend;
2595
2596 insn = (insn & ~(bfd_vma) 0xfffff) | ((val >> 12) & 0xfffff);
2597 bfd_putb32 ((bfd_vma) insn, l->addr);
2598
2599 next = l->next;
2600 free (l);
2601 l = next;
2602 }
2603
2604 nds32_hi20_list = NULL;
2605 }
2606
2607 /* Now do the LO12 reloc in the usual way.
2608 ??? It would be nice to call bfd_elf_generic_reloc here,
2609 but we have partial_inplace set. bfd_elf_generic_reloc will
2610 pass the handling back to bfd_install_relocation which will install
2611 a section relative addend which is wrong. */
2612 return nds32_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
2613 input_section, output_bfd, error_message);
2614}
2615
2616/* Do generic partial_inplace relocation.
2617 This is a local replacement for bfd_elf_generic_reloc. */
2618
2619static bfd_reloc_status_type
2620nds32_elf_generic_reloc (bfd *input_bfd, arelent *reloc_entry,
2621 asymbol *symbol, void *data, asection *input_section,
2622 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2623{
2624 bfd_reloc_status_type ret;
2625 bfd_vma relocation;
2626 bfd_byte *inplace_address;
2627
2628 /* This part is from bfd_elf_generic_reloc.
2629 If we're relocating, and this an external symbol, we don't want
2630 to change anything. */
2631 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2632 && reloc_entry->addend == 0)
2633 {
2634 reloc_entry->address += input_section->output_offset;
2635 return bfd_reloc_ok;
2636 }
2637
2638 /* Now do the reloc in the usual way.
2639 ??? It would be nice to call bfd_elf_generic_reloc here,
2640 but we have partial_inplace set. bfd_elf_generic_reloc will
2641 pass the handling back to bfd_install_relocation which will install
2642 a section relative addend which is wrong. */
2643
2644 /* Sanity check the address (offset in section). */
2645 if (reloc_entry->address > bfd_get_section_limit (input_bfd, input_section))
2646 return bfd_reloc_outofrange;
2647
2648 ret = bfd_reloc_ok;
2649 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2650 ret = bfd_reloc_undefined;
2651
2652 if (bfd_is_com_section (symbol->section) || output_bfd != (bfd *) NULL)
2653 relocation = 0;
2654 else
2655 relocation = symbol->value;
2656
2657 /* Only do this for a final link. */
2658 if (output_bfd == (bfd *) NULL)
2659 {
2660 relocation += symbol->section->output_section->vma;
2661 relocation += symbol->section->output_offset;
2662 }
2663
2664 relocation += reloc_entry->addend;
2665 switch (reloc_entry->howto->type)
2666 {
2667 case R_NDS32_LO12S3:
2668 relocation >>= 3;
2669 break;
2670
2671 case R_NDS32_LO12S2:
2672 relocation >>= 2;
2673 break;
2674
2675 case R_NDS32_LO12S1:
2676 relocation >>= 1;
2677 break;
2678
2679 case R_NDS32_LO12S0:
2680 default:
2681 relocation >>= 0;
2682 break;
2683 }
2684
2685 inplace_address = (bfd_byte *) data + reloc_entry->address;
2686
2687#define DOIT(x) \
2688 x = ((x & ~reloc_entry->howto->dst_mask) | \
2689 (((x & reloc_entry->howto->src_mask) + relocation) & \
2690 reloc_entry->howto->dst_mask))
2691
2692 switch (reloc_entry->howto->size)
2693 {
2694 case 1:
2695 {
2696 short x = bfd_getb16 (inplace_address);
2697
2698 DOIT (x);
2699 bfd_putb16 ((bfd_vma) x, inplace_address);
2700 }
2701 break;
2702 case 2:
2703 {
2704 unsigned long x = bfd_getb32 (inplace_address);
2705
2706 DOIT (x);
2707 bfd_putb32 ((bfd_vma) x, inplace_address);
2708 }
2709 break;
2710 default:
2711 BFD_ASSERT (0);
2712 }
2713
2714 if (output_bfd != (bfd *) NULL)
2715 reloc_entry->address += input_section->output_offset;
2716
2717 return ret;
2718}
2719
2720/* Handle the R_NDS32_SDA15 reloc.
2721 This reloc is used to compute the address of objects in the small data area
2722 and to perform loads and stores from that area.
2723 The lower 15 bits are sign extended and added to the register specified
2724 in the instruction, which is assumed to point to _SDA_BASE_.
2725
2726 Since the lower 15 bits offset is left-shifted 0, 1 or 2 bits depending on
2727 the access size, this must be taken care of. */
2728
2729static bfd_reloc_status_type
2730nds32_elf_sda15_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2731 asymbol *symbol, void *data ATTRIBUTE_UNUSED,
2732 asection *input_section, bfd *output_bfd,
2733 char **error_message ATTRIBUTE_UNUSED)
2734{
2735 /* This part is from bfd_elf_generic_reloc. */
2736 if (output_bfd != (bfd *) NULL
2737 && (symbol->flags & BSF_SECTION_SYM) == 0
2738 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2739 {
2740 reloc_entry->address += input_section->output_offset;
2741 return bfd_reloc_ok;
2742 }
2743
2744 if (output_bfd != NULL)
2745 {
2746 /* FIXME: See bfd_perform_relocation. Is this right? */
2747 return bfd_reloc_continue;
2748 }
2749
2750 /* FIXME: not sure what to do here yet. But then again, the linker
2751 may never call us. */
2752 abort ();
2753}
2754
2755/* nds32_elf_ignore_reloc is the special function for
2756 relocation types which don't need to be relocated
2757 like relaxation relocation types.
2758 This function simply return bfd_reloc_ok when it is
2759 invoked. */
2760
2761static bfd_reloc_status_type
2762nds32_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2763 asymbol *symbol ATTRIBUTE_UNUSED,
2764 void *data ATTRIBUTE_UNUSED, asection *input_section,
2765 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2766{
2767 if (output_bfd != NULL)
2768 reloc_entry->address += input_section->output_offset;
2769
2770 return bfd_reloc_ok;
2771}
2772\f
2773
2774/* Map BFD reloc types to NDS32 ELF reloc types. */
2775
2776struct nds32_reloc_map_entry
2777{
2778 bfd_reloc_code_real_type bfd_reloc_val;
2779 unsigned char elf_reloc_val;
2780};
2781
2782static const struct nds32_reloc_map_entry nds32_reloc_map[] =
2783{
2784 {BFD_RELOC_NONE, R_NDS32_NONE},
2785 {BFD_RELOC_16, R_NDS32_16_RELA},
2786 {BFD_RELOC_32, R_NDS32_32_RELA},
2787 {BFD_RELOC_NDS32_20, R_NDS32_20_RELA},
2788 {BFD_RELOC_NDS32_5, R_NDS32_5_RELA},
2789 {BFD_RELOC_NDS32_9_PCREL, R_NDS32_9_PCREL_RELA},
2790 {BFD_RELOC_NDS32_WORD_9_PCREL, R_NDS32_WORD_9_PCREL_RELA},
2791 {BFD_RELOC_NDS32_15_PCREL, R_NDS32_15_PCREL_RELA},
2792 {BFD_RELOC_NDS32_17_PCREL, R_NDS32_17_PCREL_RELA},
2793 {BFD_RELOC_NDS32_25_PCREL, R_NDS32_25_PCREL_RELA},
2794 {BFD_RELOC_NDS32_10_UPCREL, R_NDS32_10_UPCREL_RELA},
2795 {BFD_RELOC_NDS32_HI20, R_NDS32_HI20_RELA},
2796 {BFD_RELOC_NDS32_LO12S3, R_NDS32_LO12S3_RELA},
2797 {BFD_RELOC_NDS32_LO12S2, R_NDS32_LO12S2_RELA},
2798 {BFD_RELOC_NDS32_LO12S1, R_NDS32_LO12S1_RELA},
2799 {BFD_RELOC_NDS32_LO12S0, R_NDS32_LO12S0_RELA},
2800 {BFD_RELOC_NDS32_LO12S0_ORI, R_NDS32_LO12S0_ORI_RELA},
2801 {BFD_RELOC_NDS32_SDA15S3, R_NDS32_SDA15S3_RELA},
2802 {BFD_RELOC_NDS32_SDA15S2, R_NDS32_SDA15S2_RELA},
2803 {BFD_RELOC_NDS32_SDA15S1, R_NDS32_SDA15S1_RELA},
2804 {BFD_RELOC_NDS32_SDA15S0, R_NDS32_SDA15S0_RELA},
2805 {BFD_RELOC_VTABLE_INHERIT, R_NDS32_RELA_GNU_VTINHERIT},
2806 {BFD_RELOC_VTABLE_ENTRY, R_NDS32_RELA_GNU_VTENTRY},
2807
2808 {BFD_RELOC_NDS32_GOT20, R_NDS32_GOT20},
2809 {BFD_RELOC_NDS32_9_PLTREL, R_NDS32_9_PLTREL},
2810 {BFD_RELOC_NDS32_25_PLTREL, R_NDS32_25_PLTREL},
2811 {BFD_RELOC_NDS32_COPY, R_NDS32_COPY},
2812 {BFD_RELOC_NDS32_GLOB_DAT, R_NDS32_GLOB_DAT},
2813 {BFD_RELOC_NDS32_JMP_SLOT, R_NDS32_JMP_SLOT},
2814 {BFD_RELOC_NDS32_RELATIVE, R_NDS32_RELATIVE},
2815 {BFD_RELOC_NDS32_GOTOFF, R_NDS32_GOTOFF},
2816 {BFD_RELOC_NDS32_GOTPC20, R_NDS32_GOTPC20},
2817 {BFD_RELOC_NDS32_GOT_HI20, R_NDS32_GOT_HI20},
2818 {BFD_RELOC_NDS32_GOT_LO12, R_NDS32_GOT_LO12},
2819 {BFD_RELOC_NDS32_GOT_LO15, R_NDS32_GOT_LO15},
2820 {BFD_RELOC_NDS32_GOT_LO19, R_NDS32_GOT_LO19},
2821 {BFD_RELOC_NDS32_GOTPC_HI20, R_NDS32_GOTPC_HI20},
2822 {BFD_RELOC_NDS32_GOTPC_LO12, R_NDS32_GOTPC_LO12},
2823 {BFD_RELOC_NDS32_GOTOFF_HI20, R_NDS32_GOTOFF_HI20},
2824 {BFD_RELOC_NDS32_GOTOFF_LO12, R_NDS32_GOTOFF_LO12},
2825 {BFD_RELOC_NDS32_GOTOFF_LO15, R_NDS32_GOTOFF_LO15},
2826 {BFD_RELOC_NDS32_GOTOFF_LO19, R_NDS32_GOTOFF_LO19},
2827 {BFD_RELOC_NDS32_INSN16, R_NDS32_INSN16},
2828 {BFD_RELOC_NDS32_LABEL, R_NDS32_LABEL},
2829 {BFD_RELOC_NDS32_LONGCALL1, R_NDS32_LONGCALL1},
2830 {BFD_RELOC_NDS32_LONGCALL2, R_NDS32_LONGCALL2},
2831 {BFD_RELOC_NDS32_LONGCALL3, R_NDS32_LONGCALL3},
1c8f6a4d
KLC		 2832 {BFD_RELOC_NDS32_LONGCALL4, R_NDS32_LONGCALL4},
2833 {BFD_RELOC_NDS32_LONGCALL5, R_NDS32_LONGCALL5},
2834 {BFD_RELOC_NDS32_LONGCALL6, R_NDS32_LONGCALL6},
35c08157
KLC		 2835 {BFD_RELOC_NDS32_LONGJUMP1, R_NDS32_LONGJUMP1},
2836 {BFD_RELOC_NDS32_LONGJUMP2, R_NDS32_LONGJUMP2},
2837 {BFD_RELOC_NDS32_LONGJUMP3, R_NDS32_LONGJUMP3},
1c8f6a4d
KLC		 2838 {BFD_RELOC_NDS32_LONGJUMP4, R_NDS32_LONGJUMP4},
2839 {BFD_RELOC_NDS32_LONGJUMP5, R_NDS32_LONGJUMP5},
2840 {BFD_RELOC_NDS32_LONGJUMP6, R_NDS32_LONGJUMP6},
2841 {BFD_RELOC_NDS32_LONGJUMP7, R_NDS32_LONGJUMP7},
35c08157
KLC		 2842 {BFD_RELOC_NDS32_LOADSTORE, R_NDS32_LOADSTORE},
2843 {BFD_RELOC_NDS32_9_FIXED, R_NDS32_9_FIXED_RELA},
2844 {BFD_RELOC_NDS32_15_FIXED, R_NDS32_15_FIXED_RELA},
2845 {BFD_RELOC_NDS32_17_FIXED, R_NDS32_17_FIXED_RELA},
2846 {BFD_RELOC_NDS32_25_FIXED, R_NDS32_25_FIXED_RELA},
2847 {BFD_RELOC_NDS32_PLTREL_HI20, R_NDS32_PLTREL_HI20},
2848 {BFD_RELOC_NDS32_PLTREL_LO12, R_NDS32_PLTREL_LO12},
2849 {BFD_RELOC_NDS32_PLT_GOTREL_HI20, R_NDS32_PLT_GOTREL_HI20},
2850 {BFD_RELOC_NDS32_PLT_GOTREL_LO12, R_NDS32_PLT_GOTREL_LO12},
2851 {BFD_RELOC_NDS32_PLT_GOTREL_LO15, R_NDS32_PLT_GOTREL_LO15},
2852 {BFD_RELOC_NDS32_PLT_GOTREL_LO19, R_NDS32_PLT_GOTREL_LO19},
2853 {BFD_RELOC_NDS32_PLT_GOTREL_LO20, R_NDS32_PLT_GOTREL_LO20},
2854 {BFD_RELOC_NDS32_SDA12S2_DP, R_NDS32_SDA12S2_DP_RELA},
2855 {BFD_RELOC_NDS32_SDA12S2_SP, R_NDS32_SDA12S2_SP_RELA},
2856 {BFD_RELOC_NDS32_LO12S2_DP, R_NDS32_LO12S2_DP_RELA},
2857 {BFD_RELOC_NDS32_LO12S2_SP, R_NDS32_LO12S2_SP_RELA},
2858 {BFD_RELOC_NDS32_SDA16S3, R_NDS32_SDA16S3_RELA},
2859 {BFD_RELOC_NDS32_SDA17S2, R_NDS32_SDA17S2_RELA},
2860 {BFD_RELOC_NDS32_SDA18S1, R_NDS32_SDA18S1_RELA},
2861 {BFD_RELOC_NDS32_SDA19S0, R_NDS32_SDA19S0_RELA},
2862 {BFD_RELOC_NDS32_SDA_FP7U2_RELA, R_NDS32_SDA_FP7U2_RELA},
2863 {BFD_RELOC_NDS32_DWARF2_OP1, R_NDS32_DWARF2_OP1_RELA},
2864 {BFD_RELOC_NDS32_DWARF2_OP2, R_NDS32_DWARF2_OP2_RELA},
2865 {BFD_RELOC_NDS32_DWARF2_LEB, R_NDS32_DWARF2_LEB_RELA},
2866 {BFD_RELOC_NDS32_UPDATE_TA, R_NDS32_UPDATE_TA_RELA},
2867 {BFD_RELOC_NDS32_GOT_SUFF, R_NDS32_GOT_SUFF},
2868 {BFD_RELOC_NDS32_GOTOFF_SUFF, R_NDS32_GOTOFF_SUFF},
2869 {BFD_RELOC_NDS32_GOT15S2, R_NDS32_GOT15S2_RELA},
2870 {BFD_RELOC_NDS32_GOT17S2, R_NDS32_GOT17S2_RELA},
2871 {BFD_RELOC_NDS32_PTR, R_NDS32_PTR},
2872 {BFD_RELOC_NDS32_PTR_COUNT, R_NDS32_PTR_COUNT},
2873 {BFD_RELOC_NDS32_PLT_GOT_SUFF, R_NDS32_PLT_GOT_SUFF},
2874 {BFD_RELOC_NDS32_PTR_RESOLVED, R_NDS32_PTR_RESOLVED},
2875 {BFD_RELOC_NDS32_RELAX_ENTRY, R_NDS32_RELAX_ENTRY},
2876 {BFD_RELOC_NDS32_MULCALL_SUFF, R_NDS32_MULCALL_SUFF},
2877 {BFD_RELOC_NDS32_PLTBLOCK, R_NDS32_PLTBLOCK},
2878 {BFD_RELOC_NDS32_RELAX_REGION_BEGIN, R_NDS32_RELAX_REGION_BEGIN},
2879 {BFD_RELOC_NDS32_RELAX_REGION_END, R_NDS32_RELAX_REGION_END},
2880 {BFD_RELOC_NDS32_MINUEND, R_NDS32_MINUEND},
2881 {BFD_RELOC_NDS32_SUBTRAHEND, R_NDS32_SUBTRAHEND},
1c8f6a4d 2882 {BFD_RELOC_NDS32_EMPTY, R_NDS32_EMPTY},
35c08157
KLC		 2883
2884 {BFD_RELOC_NDS32_DIFF8, R_NDS32_DIFF8},
2885 {BFD_RELOC_NDS32_DIFF16, R_NDS32_DIFF16},
2886 {BFD_RELOC_NDS32_DIFF32, R_NDS32_DIFF32},
2887 {BFD_RELOC_NDS32_DIFF_ULEB128, R_NDS32_DIFF_ULEB128},
2888 {BFD_RELOC_NDS32_25_ABS, R_NDS32_25_ABS_RELA},
2889 {BFD_RELOC_NDS32_DATA, R_NDS32_DATA},
2890 {BFD_RELOC_NDS32_TRAN, R_NDS32_TRAN},
2891 {BFD_RELOC_NDS32_17IFC_PCREL, R_NDS32_17IFC_PCREL_RELA},
2892 {BFD_RELOC_NDS32_10IFCU_PCREL, R_NDS32_10IFCU_PCREL_RELA},
1c8f6a4d
KLC		 2893 {BFD_RELOC_NDS32_TLS_LE_HI20, R_NDS32_TLS_LE_HI20},
2894 {BFD_RELOC_NDS32_TLS_LE_LO12, R_NDS32_TLS_LE_LO12},
2895 {BFD_RELOC_NDS32_TLS_LE_ADD, R_NDS32_TLS_LE_ADD},
2896 {BFD_RELOC_NDS32_TLS_LE_LS, R_NDS32_TLS_LE_LS},
2897 {BFD_RELOC_NDS32_TLS_IE_HI20, R_NDS32_TLS_IE_HI20},
2898 {BFD_RELOC_NDS32_TLS_IE_LO12S2, R_NDS32_TLS_IE_LO12S2},
2899 {BFD_RELOC_NDS32_TLS_TPOFF, R_NDS32_TLS_TPOFF},
2900 {BFD_RELOC_NDS32_TLS_LE_20, R_NDS32_TLS_LE_20},
2901 {BFD_RELOC_NDS32_TLS_LE_15S0, R_NDS32_TLS_LE_15S0},
2902 {BFD_RELOC_NDS32_TLS_LE_15S1, R_NDS32_TLS_LE_15S1},
2903 {BFD_RELOC_NDS32_TLS_LE_15S2, R_NDS32_TLS_LE_15S2},
35c08157
KLC		 2904};
2905
2906/* Patch tag. */
2907
2908static reloc_howto_type *
2909bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2910 const char *r_name)
2911{
2912 unsigned int i;
2913
2914 for (i = 0; i < ARRAY_SIZE (nds32_elf_howto_table); i++)
2915 if (nds32_elf_howto_table[i].name != NULL
2916 && strcasecmp (nds32_elf_howto_table[i].name, r_name) == 0)
2917 return &nds32_elf_howto_table[i];
2918
2919 for (i = 0; i < ARRAY_SIZE (nds32_elf_relax_howto_table); i++)
2920 if (nds32_elf_relax_howto_table[i].name != NULL
2921 && strcasecmp (nds32_elf_relax_howto_table[i].name, r_name) == 0)
2922 return &nds32_elf_relax_howto_table[i];
2923
2924 return NULL;
2925}
2926
2927static reloc_howto_type *
2928bfd_elf32_bfd_reloc_type_table_lookup (enum elf_nds32_reloc_type code)
2929{
2930 if (code < R_NDS32_RELAX_ENTRY)
2931 {
2932 BFD_ASSERT (code < ARRAY_SIZE (nds32_elf_howto_table));
2933 return &nds32_elf_howto_table[code];
2934 }
2935 else
2936 {
2937 BFD_ASSERT ((size_t) (code - R_NDS32_RELAX_ENTRY)
2938 < ARRAY_SIZE (nds32_elf_relax_howto_table));
2939 return &nds32_elf_relax_howto_table[code - R_NDS32_RELAX_ENTRY];
2940 }
2941}
2942
2943static reloc_howto_type *
2944bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2945 bfd_reloc_code_real_type code)
2946{
2947 unsigned int i;
2948
2949 for (i = 0; i < ARRAY_SIZE (nds32_reloc_map); i++)
2950 {
2951 if (nds32_reloc_map[i].bfd_reloc_val == code)
2952 return bfd_elf32_bfd_reloc_type_table_lookup
2953 (nds32_reloc_map[i].elf_reloc_val);
2954 }
2955
2956 return NULL;
2957}
2958
2959/* Set the howto pointer for an NDS32 ELF reloc. */
2960
2961static void
2962nds32_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2963 Elf_Internal_Rela *dst)
2964{
2965 enum elf_nds32_reloc_type r_type;
2966
2967 r_type = ELF32_R_TYPE (dst->r_info);
5860e3f8
NC		 2968 if (r_type > R_NDS32_GNU_VTENTRY)
2969 {
2970 _bfd_error_handler (_("%A: invalid NDS32 reloc number: %d"), abfd, r_type);
2971 r_type = 0;
2972 }
35c08157
KLC		 2973 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
2974}
2975
2976static void
2977nds32_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2978 Elf_Internal_Rela *dst)
2979{
2980 BFD_ASSERT ((ELF32_R_TYPE (dst->r_info) == R_NDS32_NONE)
2981 || ((ELF32_R_TYPE (dst->r_info) > R_NDS32_GNU_VTENTRY)
2982 && (ELF32_R_TYPE (dst->r_info) < R_NDS32_max)));
2983 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (dst->r_info));
2984}
2985
2986/* Support for core dump NOTE sections.
2987 Reference to include/linux/elfcore.h in Linux. */
2988
2989static bfd_boolean
2990nds32_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2991{
2992 int offset;
2993 size_t size;
2994
2995 switch (note->descsz)
2996 {
2997 case 0x114:
2998 /* Linux/NDS32 32-bit, ABI1 */
2999
3000 /* pr_cursig */
3001 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
3002
3003 /* pr_pid */
3004 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3005
3006 /* pr_reg */
3007 offset = 72;
3008 size = 200;
3009 break;
3010
3011 case 0xfc:
3012 /* Linux/NDS32 32-bit */
3013
3014 /* pr_cursig */
3015 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
3016
3017 /* pr_pid */
3018 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3019
3020 /* pr_reg */
3021 offset = 72;
3022 size = 176;
3023 break;
3024
3025 default:
3026 return FALSE;
3027 }
3028
3029 /* Make a ".reg" section. */
3030 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
3031 size, note->descpos + offset);
3032}
3033
3034static bfd_boolean
3035nds32_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
3036{
3037 switch (note->descsz)
3038 {
3039 case 124:
3040 /* Linux/NDS32 */
3041
3042 /* __kernel_uid_t, __kernel_gid_t are short on NDS32 platform. */
3043 elf_tdata (abfd)->core->program =
3044 _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
3045 elf_tdata (abfd)->core->command =
3046 _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
3047
3048 default:
3049 return FALSE;
3050 }
3051
3052 /* Note that for some reason, a spurious space is tacked
3053 onto the end of the args in some (at least one anyway)
3054 implementations, so strip it off if it exists. */
3055 {
3056 char *command = elf_tdata (abfd)->core->command;
3057 int n = strlen (command);
3058
3059 if (0 < n && command[n - 1] == ' ')
3060 command[n - 1] = '\0';
3061 }
3062
3063 return TRUE;
3064}
3065
3066/* Hook called by the linker routine which adds symbols from an object
3067 file. We must handle the special NDS32 section numbers here.
3068 We also keep watching for whether we need to create the sdata special
3069 linker sections. */
3070
3071static bfd_boolean
3072nds32_elf_add_symbol_hook (bfd *abfd,
3073 struct bfd_link_info *info ATTRIBUTE_UNUSED,
3074 Elf_Internal_Sym *sym,
3075 const char **namep ATTRIBUTE_UNUSED,
3076 flagword *flagsp ATTRIBUTE_UNUSED,
3077 asection **secp, bfd_vma *valp)
3078{
3079 switch (sym->st_shndx)
3080 {
3081 case SHN_COMMON:
3082 /* Common symbols less than the GP size are automatically
3083 treated as SHN_MIPS_SCOMMON symbols. */
3084 if (sym->st_size > elf_gp_size (abfd)
3085 || ELF_ST_TYPE (sym->st_info) == STT_TLS)
3086 break;
3087
3088 /* st_value is the alignemnt constraint.
3089 That might be its actual size if it is an array or structure. */
3090 switch (sym->st_value)
3091 {
3092 case 1:
3093 *secp = bfd_make_section_old_way (abfd, ".scommon_b");
3094 break;
3095 case 2:
3096 *secp = bfd_make_section_old_way (abfd, ".scommon_h");
3097 break;
3098 case 4:
3099 *secp = bfd_make_section_old_way (abfd, ".scommon_w");
3100 break;
3101 case 8:
3102 *secp = bfd_make_section_old_way (abfd, ".scommon_d");
3103 break;
3104 default:
3105 return TRUE;
3106 }
3107
3108 (*secp)->flags |= SEC_IS_COMMON;
3109 *valp = sym->st_size;
3110 break;
3111 }
3112
3113 return TRUE;
3114}
3115
3116
3117/* This function can figure out the best location for a base register to access
3118 data relative to this base register
3119 INPUT:
3120 sda_d0: size of first DOUBLE WORD data section
3121 sda_w0: size of first WORD data section
3122 sda_h0: size of first HALF WORD data section
3123 sda_b : size of BYTE data section
3124 sda_hi: size of second HALF WORD data section
3125 sda_w1: size of second WORD data section
3126 sda_d1: size of second DOUBLE WORD data section
3127 OUTPUT:
3128 offset (always positive) from the beginning of sda_d0 if OK
3129 a negative error value if fail
3130 NOTE:
3131 these 7 sections have to be located back to back if exist
3132 a pass in 0 value for non-existing section */
3133
3134/* Due to the interpretation of simm15 field of load/store depending on
3135 data accessing size, the organization of base register relative data shall
3136 like the following figure
3137 -------------------------------------------
3138 | DOUBLE WORD sized data (range +/- 128K)
3139 -------------------------------------------
3140 | WORD sized data (range +/- 64K)
3141 -------------------------------------------
3142 | HALF WORD sized data (range +/- 32K)
3143 -------------------------------------------
3144 | BYTE sized data (range +/- 16K)
3145 -------------------------------------------
3146 | HALF WORD sized data (range +/- 32K)
3147 -------------------------------------------
3148 | WORD sized data (range +/- 64K)
3149 -------------------------------------------
3150 | DOUBLE WORD sized data (range +/- 128K)
3151 -------------------------------------------
3152 Its base register shall be set to access these data freely. */
3153
3154/* We have to figure out the SDA_BASE value, so that we can adjust the
3155 symbol value correctly. We look up the symbol _SDA_BASE_ in the output
3156 BFD. If we can't find it, we're stuck. We cache it in the ELF
3157 target data. We don't need to adjust the symbol value for an
3158 external symbol if we are producing relocatable output. */
3159
3160static asection *sda_rela_sec = NULL;
3161
1c8f6a4d 3162#define SDA_SECTION_NUM 10
35c08157
KLC		 3163
3164static bfd_reloc_status_type
3165nds32_elf_final_sda_base (bfd *output_bfd, struct bfd_link_info *info,
3166 bfd_vma *psb, bfd_boolean add_symbol)
3167{
3168 int relax_fp_as_gp;
3169 struct elf_nds32_link_hash_table *table;
3170 struct bfd_link_hash_entry *h, *h2;
1c8f6a4d 3171 long unsigned int total = 0;
35c08157
KLC		 3172
3173 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", FALSE, FALSE, TRUE);
3174 if (!h || (h->type != bfd_link_hash_defined && h->type != bfd_link_hash_defweak))
3175 {
3176 asection *first = NULL, *final = NULL, *temp;
3177 bfd_vma sda_base;
3178 /* The first section must be 4-byte aligned to promise _SDA_BASE_ being
3179 4 byte-aligned. Therefore, it has to set the first section ".data"
3180 4 byte-aligned. */
3181 static const char sec_name[SDA_SECTION_NUM][10] =
3182 {
3183 ".data", ".got", ".sdata_d", ".sdata_w", ".sdata_h", ".sdata_b",
1c8f6a4d 3184 ".sbss_b", ".sbss_h", ".sbss_w", ".sbss_d"
35c08157
KLC		 3185 };
3186 size_t i = 0;
3187
3188 if (output_bfd->sections == NULL)
3189 {
3190 *psb = elf_gp (output_bfd);
3191 return bfd_reloc_ok;
3192 }
3193
3194 /* Get the first and final section. */
1c8f6a4d 3195 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
35c08157
KLC		 3196 {
3197 temp = bfd_get_section_by_name (output_bfd, sec_name[i]);
3198 if (temp && !first && (temp->size != 0 || temp->rawsize != 0))
3199 first = temp;
3200 if (temp && (temp->size != 0 || temp->rawsize != 0))
3201 final = temp;
1c8f6a4d
KLC		 3202
3203 /* Summarize the sections in order to check if joining .bss. */
3204 if (temp && temp->size != 0)
3205 total += temp->size;
3206 else if (temp && temp->rawsize != 0)
3207 total += temp->rawsize;
3208
35c08157
KLC		 3209 i++;
3210 }
3211
1c8f6a4d
KLC		 3212 /* Check .bss size. */
3213 temp = bfd_get_section_by_name (output_bfd, ".bss");
3214 if (temp)
3215 {
3216 if (temp->size != 0)
3217 total += temp->size;
3218 else if (temp->rawsize != 0)
3219 total += temp->rawsize;
3220
3221 if (total < 0x80000)
3222 {
3223 if (!first && (temp->size != 0 || temp->rawsize != 0))
3224 first = temp;
3225 if ((temp->size != 0 || temp->rawsize != 0))
3226 final = temp;
3227 }
3228 }
3229
35c08157
KLC		 3230 if (first && final)
3231 {
3232 /* The middle of data region. */
1c8f6a4d 3233 sda_base = final->vma / 2 + final->rawsize / 2 + first->vma / 2;
35c08157
KLC		 3234
3235 /* Find the section sda_base located. */
3236 i = 0;
1c8f6a4d 3237 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
35c08157
KLC		 3238 {
3239 final = bfd_get_section_by_name (output_bfd, sec_name[i]);
3240 if (final && (final->size != 0 || final->rawsize != 0)
3241 && sda_base >= final->vma)
3242 {
3243 first = final;
3244 i++;
3245 }
3246 else
3247 break;
3248 }
3249 }
3250 else
3251 {
3252 /* There is not any data section in output bfd, and set _SDA_BASE_ in
3253 first output section. */
3254 first = output_bfd->sections;
3255 while (first && first->size == 0 && first->rawsize == 0)
3256 first = first->next;
3257 if (!first)
3258 {
3259 *psb = elf_gp (output_bfd);
3260 return bfd_reloc_ok;
3261 }
1c8f6a4d 3262 sda_base = first->vma + first->rawsize;
35c08157
KLC		 3263 }
3264
3265 sda_base -= first->vma;
3266 sda_base = sda_base & (~7);
3267
3268 if (!_bfd_generic_link_add_one_symbol
3269 (info, output_bfd, "_SDA_BASE_", BSF_GLOBAL | BSF_WEAK, first,
3270 (bfd_vma) sda_base, (const char *) NULL, FALSE,
3271 get_elf_backend_data (output_bfd)->collect, &h))
3272 return FALSE;
3273
3274 sda_rela_sec = first;
3275
3276 table = nds32_elf_hash_table (info);
3277 relax_fp_as_gp = table->relax_fp_as_gp;
3278 if (relax_fp_as_gp)
3279 {
3280 h2 = bfd_link_hash_lookup (info->hash, FP_BASE_NAME,
3281 FALSE, FALSE, FALSE);
3282 /* Define a weak FP_BASE_NAME here to prevent the undefined symbol.
3283 And set FP equal to SDA_BASE to do relaxation for
3284 la $fp, _FP_BASE_. */
3285 if (!_bfd_generic_link_add_one_symbol
3286 (info, output_bfd, FP_BASE_NAME, BSF_GLOBAL | BSF_WEAK,
3287 first, (bfd_vma) sda_base, (const char *) NULL,
3288 FALSE, get_elf_backend_data (output_bfd)->collect, &h2))
3289 return FALSE;
3290 }
3291 }
3292
3293 if (add_symbol == TRUE)
3294 {
3295 if (h)
3296 {
3297 /* Now set gp. */
3298 elf_gp (output_bfd) = (h->u.def.value
3299 + h->u.def.section->output_section->vma
3300 + h->u.def.section->output_offset);
3301 }
3302 else
3303 {
3304 (*_bfd_error_handler) (_("error: Can't find symbol: _SDA_BASE_."));
3305 return bfd_reloc_dangerous;
3306 }
3307 }
3308
3309 *psb = h->u.def.value + h->u.def.section->output_section->vma
3310 + h->u.def.section->output_offset;
3311 return bfd_reloc_ok;
3312}
3313\f
3314
3315/* Return size of a PLT entry. */
3316#define elf_nds32_sizeof_plt(info) PLT_ENTRY_SIZE
3317
3318
3319/* Create an entry in an nds32 ELF linker hash table. */
3320
3321static struct bfd_hash_entry *
3322nds32_elf_link_hash_newfunc (struct bfd_hash_entry *entry,
3323 struct bfd_hash_table *table,
3324 const char *string)
3325{
3326 struct elf_nds32_link_hash_entry *ret;
3327
3328 ret = (struct elf_nds32_link_hash_entry *) entry;
3329
3330 /* Allocate the structure if it has not already been allocated by a
3331 subclass. */
3332 if (ret == NULL)
3333 ret = (struct elf_nds32_link_hash_entry *)
3334 bfd_hash_allocate (table, sizeof (struct elf_nds32_link_hash_entry));
3335
3336 if (ret == NULL)
3337 return (struct bfd_hash_entry *) ret;
3338
3339 /* Call the allocation method of the superclass. */
3340 ret = (struct elf_nds32_link_hash_entry *)
3341 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, table, string);
3342
3343 if (ret != NULL)
3344 {
3345 struct elf_nds32_link_hash_entry *eh;
3346
3347 eh = (struct elf_nds32_link_hash_entry *) ret;
3348 eh->dyn_relocs = NULL;
1c8f6a4d 3349 eh->tls_type = GOT_UNKNOWN;
35c08157
KLC		 3350 }
3351
3352 return (struct bfd_hash_entry *) ret;
3353}
3354
3355/* Create an nds32 ELF linker hash table. */
3356
3357static struct bfd_link_hash_table *
3358nds32_elf_link_hash_table_create (bfd *abfd)
3359{
3360 struct elf_nds32_link_hash_table *ret;
3361
3362 bfd_size_type amt = sizeof (struct elf_nds32_link_hash_table);
3363
3364 ret = (struct elf_nds32_link_hash_table *) bfd_zmalloc (amt);
3365 if (ret == NULL)
3366 return NULL;
3367
3368 /* patch tag. */
3369 if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
3370 nds32_elf_link_hash_newfunc,
3371 sizeof (struct elf_nds32_link_hash_entry),
3372 NDS32_ELF_DATA))
3373 {
3374 free (ret);
3375 return NULL;
3376 }
3377
3378 ret->sgot = NULL;
3379 ret->sgotplt = NULL;
3380 ret->srelgot = NULL;
3381 ret->splt = NULL;
3382 ret->srelplt = NULL;
3383 ret->sdynbss = NULL;
3384 ret->srelbss = NULL;
3385 ret->sym_ld_script = NULL;
3386 ret->ex9_export_file = NULL;
3387 ret->ex9_import_file = NULL;
3388
3389 return &ret->root.root;
3390}
3391
3392/* Create .got, .gotplt, and .rela.got sections in DYNOBJ, and set up
3393 shortcuts to them in our hash table. */
3394
3395static bfd_boolean
3396create_got_section (bfd *dynobj, struct bfd_link_info *info)
3397{
3398 struct elf_nds32_link_hash_table *htab;
3399
3400 if (!_bfd_elf_create_got_section (dynobj, info))
3401 return FALSE;
3402
3403 htab = nds32_elf_hash_table (info);
3404 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
3405 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
3406 if (!htab->sgot || !htab->sgotplt)
3407 abort ();
3408
3409 /* _bfd_elf_create_got_section will create it for us. */
3410 htab->srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
3411 if (htab->srelgot == NULL
3412 || !bfd_set_section_flags (dynobj, htab->srelgot,
3413 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3414 | SEC_IN_MEMORY | SEC_LINKER_CREATED
3415 | SEC_READONLY))
3416 || !bfd_set_section_alignment (dynobj, htab->srelgot, 2))
3417 return FALSE;
3418
3419 return TRUE;
3420}
3421
3422/* Create dynamic sections when linking against a dynamic object. */
3423
3424static bfd_boolean
3425nds32_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
3426{
3427 struct elf_nds32_link_hash_table *htab;
3428 flagword flags, pltflags;
3429 register asection *s;
3430 const struct elf_backend_data *bed;
3431 int ptralign = 2; /* 32-bit */
3432
3433 bed = get_elf_backend_data (abfd);
3434
3435 htab = nds32_elf_hash_table (info);
3436
3437 /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and
3438 .rel[a].bss sections. */
3439
3440 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3441 | SEC_LINKER_CREATED);
3442
3443 pltflags = flags;
3444 pltflags |= SEC_CODE;
3445 if (bed->plt_not_loaded)
3446 pltflags &= ~(SEC_LOAD | SEC_HAS_CONTENTS);
3447 if (bed->plt_readonly)
3448 pltflags |= SEC_READONLY;
3449
3450 s = bfd_make_section (abfd, ".plt");
3451 htab->splt = s;
3452 if (s == NULL
3453 || !bfd_set_section_flags (abfd, s, pltflags)
3454 || !bfd_set_section_alignment (abfd, s, bed->plt_alignment))
3455 return FALSE;
3456
3457 if (bed->want_plt_sym)
3458 {
3459 /* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the
3460 .plt section. */
3461 struct bfd_link_hash_entry *bh = NULL;
3462 struct elf_link_hash_entry *h;
3463
3464 if (!(_bfd_generic_link_add_one_symbol
3465 (info, abfd, "_PROCEDURE_LINKAGE_TABLE_", BSF_GLOBAL, s,
3466 (bfd_vma) 0, (const char *) NULL, FALSE,
3467 get_elf_backend_data (abfd)->collect, &bh)))
3468 return FALSE;
3469
3470 h = (struct elf_link_hash_entry *) bh;
3471 h->def_regular = 1;
3472 h->type = STT_OBJECT;
3473
3474 if (info->shared && !bfd_elf_link_record_dynamic_symbol (info, h))
3475 return FALSE;
3476 }
3477
3478 s = bfd_make_section (abfd,
3479 bed->default_use_rela_p ? ".rela.plt" : ".rel.plt");
3480 htab->srelplt = s;
3481 if (s == NULL
3482 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3483 || !bfd_set_section_alignment (abfd, s, ptralign))
3484 return FALSE;
3485
3486 if (htab->sgot == NULL && !create_got_section (abfd, info))
3487 return FALSE;
3488
3489 {
3490 const char *secname;
3491 char *relname;
3492 flagword secflags;
3493 asection *sec;
3494
3495 for (sec = abfd->sections; sec; sec = sec->next)
3496 {
3497 secflags = bfd_get_section_flags (abfd, sec);
3498 if ((secflags & (SEC_DATA | SEC_LINKER_CREATED))
3499 || ((secflags & SEC_HAS_CONTENTS) != SEC_HAS_CONTENTS))
3500 continue;
3501 secname = bfd_get_section_name (abfd, sec);
3502 relname = (char *) bfd_malloc ((bfd_size_type) strlen (secname) + 6);
3503 strcpy (relname, ".rela");
3504 strcat (relname, secname);
3505 if (bfd_get_section_by_name (abfd, secname))
3506 continue;
3507 s = bfd_make_section (abfd, relname);
3508 if (s == NULL
3509 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3510 || !bfd_set_section_alignment (abfd, s, ptralign))
3511 return FALSE;
3512 }
3513 }
3514
3515 if (bed->want_dynbss)
3516 {
3517 /* The .dynbss section is a place to put symbols which are defined
3518 by dynamic objects, are referenced by regular objects, and are
3519 not functions. We must allocate space for them in the process
3520 image and use a R_*_COPY reloc to tell the dynamic linker to
3521 initialize them at run time. The linker script puts the .dynbss
3522 section into the .bss section of the final image. */
3523 s = bfd_make_section (abfd, ".dynbss");
3524 htab->sdynbss = s;
3525 if (s == NULL
3526 || !bfd_set_section_flags (abfd, s, SEC_ALLOC | SEC_LINKER_CREATED))
3527 return FALSE;
3528 /* The .rel[a].bss section holds copy relocs. This section is not
3529 normally needed. We need to create it here, though, so that the
3530 linker will map it to an output section. We can't just create it
3531 only if we need it, because we will not know whether we need it
3532 until we have seen all the input files, and the first time the
3533 main linker code calls BFD after examining all the input files
3534 (size_dynamic_sections) the input sections have already been
3535 mapped to the output sections. If the section turns out not to
3536 be needed, we can discard it later. We will never need this
3537 section when generating a shared object, since they do not use
3538 copy relocs. */
3539 if (!info->shared)
3540 {
3541 s = bfd_make_section (abfd, (bed->default_use_rela_p
3542 ? ".rela.bss" : ".rel.bss"));
3543 htab->srelbss = s;
3544 if (s == NULL
3545 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3546 || !bfd_set_section_alignment (abfd, s, ptralign))
3547 return FALSE;
3548 }
3549 }
3550
3551 return TRUE;
3552}
3553
3554/* Copy the extra info we tack onto an elf_link_hash_entry. */
3555static void
3556nds32_elf_copy_indirect_symbol (struct bfd_link_info *info,
3557 struct elf_link_hash_entry *dir,
3558 struct elf_link_hash_entry *ind)
3559{
3560 struct elf_nds32_link_hash_entry *edir, *eind;
3561
3562 edir = (struct elf_nds32_link_hash_entry *) dir;
3563 eind = (struct elf_nds32_link_hash_entry *) ind;
3564
3565 if (eind->dyn_relocs != NULL)
3566 {
3567 if (edir->dyn_relocs != NULL)
3568 {
3569 struct elf_nds32_dyn_relocs **pp;
3570 struct elf_nds32_dyn_relocs *p;
3571
3572 if (ind->root.type == bfd_link_hash_indirect)
3573 abort ();
3574
3575 /* Add reloc counts against the weak sym to the strong sym
3576 list. Merge any entries against the same section. */
3577 for (pp = &eind->dyn_relocs; (p = *pp) != NULL;)
3578 {
3579 struct elf_nds32_dyn_relocs *q;
3580
3581 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3582 if (q->sec == p->sec)
3583 {
3584 q->pc_count += p->pc_count;
3585 q->count += p->count;
3586 *pp = p->next;
3587 break;
3588 }
3589 if (q == NULL)
3590 pp = &p->next;
3591 }
3592 *pp = edir->dyn_relocs;
3593 }
3594
3595 edir->dyn_relocs = eind->dyn_relocs;
3596 eind->dyn_relocs = NULL;
3597 }
3598
3599 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3600}
3601\f
3602
3603/* Adjust a symbol defined by a dynamic object and referenced by a
3604 regular object. The current definition is in some section of the
3605 dynamic object, but we're not including those sections. We have to
3606 change the definition to something the rest of the link can
3607 understand. */
3608
3609static bfd_boolean
3610nds32_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
3611 struct elf_link_hash_entry *h)
3612{
3613 struct elf_nds32_link_hash_table *htab;
3614 struct elf_nds32_link_hash_entry *eh;
3615 struct elf_nds32_dyn_relocs *p;
3616 bfd *dynobj;
3617 asection *s;
3618 unsigned int power_of_two;
3619
3620 dynobj = elf_hash_table (info)->dynobj;
3621
3622 /* Make sure we know what is going on here. */
3623 BFD_ASSERT (dynobj != NULL
3624 && (h->needs_plt
3625 || h->u.weakdef != NULL
3626 || (h->def_dynamic && h->ref_regular && !h->def_regular)));
3627
3628
3629 /* If this is a function, put it in the procedure linkage table. We
3630 will fill in the contents of the procedure linkage table later,
3631 when we know the address of the .got section. */
3632 if (h->type == STT_FUNC || h->needs_plt)
3633 {
3634 if (!info->shared
3635 && !h->def_dynamic
3636 && !h->ref_dynamic
3637 && h->root.type != bfd_link_hash_undefweak
3638 && h->root.type != bfd_link_hash_undefined)
3639 {
3640 /* This case can occur if we saw a PLT reloc in an input
3641 file, but the symbol was never referred to by a dynamic
3642 object. In such a case, we don't actually need to build
3643 a procedure linkage table, and we can just do a PCREL
3644 reloc instead. */
3645 h->plt.offset = (bfd_vma) - 1;
3646 h->needs_plt = 0;
3647 }
3648
3649 return TRUE;
3650 }
3651 else
3652 h->plt.offset = (bfd_vma) - 1;
3653
3654 /* If this is a weak symbol, and there is a real definition, the
3655 processor independent code will have arranged for us to see the
3656 real definition first, and we can just use the same value. */
3657 if (h->u.weakdef != NULL)
3658 {
3659 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
3660 || h->u.weakdef->root.type == bfd_link_hash_defweak);
3661 h->root.u.def.section = h->u.weakdef->root.u.def.section;
3662 h->root.u.def.value = h->u.weakdef->root.u.def.value;
3663 return TRUE;
3664 }
3665
3666 /* This is a reference to a symbol defined by a dynamic object which
3667 is not a function. */
3668
3669 /* If we are creating a shared library, we must presume that the
3670 only references to the symbol are via the global offset table.
3671 For such cases we need not do anything here; the relocations will
3672 be handled correctly by relocate_section. */
3673 if (info->shared)
3674 return TRUE;
3675
3676 /* If there are no references to this symbol that do not use the
3677 GOT, we don't need to generate a copy reloc. */
3678 if (!h->non_got_ref)
3679 return TRUE;
3680
3681 /* If -z nocopyreloc was given, we won't generate them either. */
3682 if (info->nocopyreloc)
3683 {
3684 h->non_got_ref = 0;
3685 return TRUE;
3686 }
3687
3688 eh = (struct elf_nds32_link_hash_entry *) h;
3689 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3690 {
3691 s = p->sec->output_section;
3692 if (s != NULL && (s->flags & (SEC_READONLY | SEC_HAS_CONTENTS)) != 0)
3693 break;
3694 }
3695
3696 /* If we didn't find any dynamic relocs in sections which needs the
3697 copy reloc, then we'll be keeping the dynamic relocs and avoiding
3698 the copy reloc. */
3699 if (p == NULL)
3700 {
3701 h->non_got_ref = 0;
3702 return TRUE;
3703 }
3704
3705 /* We must allocate the symbol in our .dynbss section, which will
3706 become part of the .bss section of the executable. There will be
3707 an entry for this symbol in the .dynsym section. The dynamic
3708 object will contain position independent code, so all references
3709 from the dynamic object to this symbol will go through the global
3710 offset table. The dynamic linker will use the .dynsym entry to
3711 determine the address it must put in the global offset table, so
3712 both the dynamic object and the regular object will refer to the
3713 same memory location for the variable. */
3714
3715 htab = nds32_elf_hash_table (info);
3716 s = htab->sdynbss;
3717 BFD_ASSERT (s != NULL);
3718
3719 /* We must generate a R_NDS32_COPY reloc to tell the dynamic linker
3720 to copy the initial value out of the dynamic object and into the
3721 runtime process image. We need to remember the offset into the
3722 .rela.bss section we are going to use. */
3723 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
3724 {
3725 asection *srel;
3726
3727 srel = htab->srelbss;
3728 BFD_ASSERT (srel != NULL);
3729 srel->size += sizeof (Elf32_External_Rela);
3730 h->needs_copy = 1;
3731 }
3732
3733 /* We need to figure out the alignment required for this symbol. I
3734 have no idea how ELF linkers handle this. */
3735 power_of_two = bfd_log2 (h->size);
3736 if (power_of_two > 3)
3737 power_of_two = 3;
3738
3739 /* Apply the required alignment. */
3740 s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two));
3741 if (power_of_two > bfd_get_section_alignment (dynobj, s))
3742 {
3743 if (!bfd_set_section_alignment (dynobj, s, power_of_two))
3744 return FALSE;
3745 }
3746
3747 /* Define the symbol as being at this point in the section. */
3748 h->root.u.def.section = s;
3749 h->root.u.def.value = s->size;
3750
3751 /* Increment the section size to make room for the symbol. */
3752 s->size += h->size;
3753
3754 return TRUE;
3755}
3756
3757/* Allocate space in .plt, .got and associated reloc sections for
3758 dynamic relocs. */
3759
3760static bfd_boolean
3761allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3762{
3763 struct bfd_link_info *info;
3764 struct elf_nds32_link_hash_table *htab;
3765 struct elf_nds32_link_hash_entry *eh;
3766 struct elf_nds32_dyn_relocs *p;
3767
3768 if (h->root.type == bfd_link_hash_indirect)
3769 return TRUE;
3770
3771 if (h->root.type == bfd_link_hash_warning)
3772 /* When warning symbols are created, they **replace** the "real"
3773 entry in the hash table, thus we never get to see the real
3774 symbol in a hash traversal. So look at it now. */
3775 h = (struct elf_link_hash_entry *) h->root.u.i.link;
3776
3777 info = (struct bfd_link_info *) inf;
3778 htab = nds32_elf_hash_table (info);
3779
3780 eh = (struct elf_nds32_link_hash_entry *) h;
3781
3782 if (htab->root.dynamic_sections_created && h->plt.refcount > 0)
3783 {
3784 /* Make sure this symbol is output as a dynamic symbol.
3785 Undefined weak syms won't yet be marked as dynamic. */
3786 if (h->dynindx == -1 && !h->forced_local)
3787 {
3788 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3789 return FALSE;
3790 }
3791
3792 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, info->shared, h))
3793 {
3794 asection *s = htab->splt;
3795
3796 /* If this is the first .plt entry, make room for the special
3797 first entry. */
3798 if (s->size == 0)
3799 s->size += PLT_ENTRY_SIZE;
3800
3801 h->plt.offset = s->size;
3802
3803 /* If this symbol is not defined in a regular file, and we are
3804 not generating a shared library, then set the symbol to this
3805 location in the .plt. This is required to make function
3806 pointers compare as equal between the normal executable and
3807 the shared library. */
3808 if (!info->shared && !h->def_regular)
3809 {
3810 h->root.u.def.section = s;
3811 h->root.u.def.value = h->plt.offset;
3812 }
3813
3814 /* Make room for this entry. */
3815 s->size += PLT_ENTRY_SIZE;
3816
3817 /* We also need to make an entry in the .got.plt section, which
3818 will be placed in the .got section by the linker script. */
3819 htab->sgotplt->size += 4;
3820
3821 /* We also need to make an entry in the .rel.plt section. */
3822 htab->srelplt->size += sizeof (Elf32_External_Rela);
3823 }
3824 else
3825 {
3826 h->plt.offset = (bfd_vma) - 1;
3827 h->needs_plt = 0;
3828 }
3829 }
3830 else
3831 {
3832 h->plt.offset = (bfd_vma) - 1;
3833 h->needs_plt = 0;
3834 }
3835
3836 if (h->got.refcount > 0)
3837 {
3838 asection *s;
3839 bfd_boolean dyn;
1c8f6a4d 3840 int tls_type = elf32_nds32_hash_entry (h)->tls_type;
35c08157
KLC		 3841
3842 /* Make sure this symbol is output as a dynamic symbol.
3843 Undefined weak syms won't yet be marked as dynamic. */
3844 if (h->dynindx == -1 && !h->forced_local)
3845 {
3846 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3847 return FALSE;
3848 }
3849
3850 s = htab->sgot;
35c08157 3851 h->got.offset = s->size;
1c8f6a4d
KLC		 3852
3853 if (tls_type == GOT_UNKNOWN)
3854 abort ();
3855 else if (tls_type == GOT_NORMAL
3856 || tls_type == GOT_TLS_IE)
3857 /* Need a GOT slot. */
3858 s->size += 4;
3859
35c08157
KLC		 3860 dyn = htab->root.dynamic_sections_created;
3861 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h))
3862 htab->srelgot->size += sizeof (Elf32_External_Rela);
3863 }
3864 else
3865 h->got.offset = (bfd_vma) - 1;
3866
3867 if (eh->dyn_relocs == NULL)
3868 return TRUE;
3869
3870 /* In the shared -Bsymbolic case, discard space allocated for
3871 dynamic pc-relative relocs against symbols which turn out to be
3872 defined in regular objects. For the normal shared case, discard
3873 space for pc-relative relocs that have become local due to symbol
3874 visibility changes. */
3875
3876 if (info->shared)
3877 {
3878 if (h->def_regular && (h->forced_local || info->symbolic))
3879 {
3880 struct elf_nds32_dyn_relocs **pp;
3881
3882 for (pp = &eh->dyn_relocs; (p = *pp) != NULL;)
3883 {
3884 p->count -= p->pc_count;
3885 p->pc_count = 0;
3886 if (p->count == 0)
3887 *pp = p->next;
3888 else
3889 pp = &p->next;
3890 }
3891 }
3892 }
3893 else
3894 {
3895 /* For the non-shared case, discard space for relocs against
3896 symbols which turn out to need copy relocs or are not dynamic. */
3897
3898 if (!h->non_got_ref
3899 && ((h->def_dynamic
3900 && !h->def_regular)
3901 || (htab->root.dynamic_sections_created
3902 && (h->root.type == bfd_link_hash_undefweak
3903 || h->root.type == bfd_link_hash_undefined))))
3904 {
3905 /* Make sure this symbol is output as a dynamic symbol.
3906 Undefined weak syms won't yet be marked as dynamic. */
3907 if (h->dynindx == -1 && !h->forced_local)
3908 {
3909 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3910 return FALSE;
3911 }
3912
3913 /* If that succeeded, we know we'll be keeping all the
3914 relocs. */
3915 if (h->dynindx != -1)
3916 goto keep;
3917 }
3918
3919 eh->dyn_relocs = NULL;
3920
3921 keep:;
3922 }
3923
3924 /* Finally, allocate space. */
3925 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3926 {
3927 asection *sreloc = elf_section_data (p->sec)->sreloc;
3928 sreloc->size += p->count * sizeof (Elf32_External_Rela);
3929 }
3930
3931 return TRUE;
3932}
3933
3934/* Find any dynamic relocs that apply to read-only sections. */
3935
3936static bfd_boolean
3937readonly_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3938{
3939 struct elf_nds32_link_hash_entry *eh;
3940 struct elf_nds32_dyn_relocs *p;
3941
3942 if (h->root.type == bfd_link_hash_warning)
3943 h = (struct elf_link_hash_entry *) h->root.u.i.link;
3944
3945 eh = (struct elf_nds32_link_hash_entry *) h;
3946 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3947 {
3948 asection *s = p->sec->output_section;
3949
3950 if (s != NULL && (s->flags & SEC_READONLY) != 0)
3951 {
3952 struct bfd_link_info *info = (struct bfd_link_info *) inf;
3953
3954 info->flags |= DF_TEXTREL;
3955
3956 /* Not an error, just cut short the traversal. */
3957 return FALSE;
3958 }
3959 }
3960 return TRUE;
3961}
3962
3963/* Set the sizes of the dynamic sections. */
3964
3965static bfd_boolean
3966nds32_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
3967 struct bfd_link_info *info)
3968{
3969 struct elf_nds32_link_hash_table *htab;
3970 bfd *dynobj;
3971 asection *s;
3972 bfd_boolean relocs;
3973 bfd *ibfd;
3974
3975 htab = nds32_elf_hash_table (info);
3976 dynobj = htab->root.dynobj;
3977 BFD_ASSERT (dynobj != NULL);
3978
3979 if (htab->root.dynamic_sections_created)
3980 {
3981 /* Set the contents of the .interp section to the interpreter. */
3982 if (!info->shared)
3983 {
3984 s = bfd_get_section_by_name (dynobj, ".interp");
3985 BFD_ASSERT (s != NULL);
3986 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
3987 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
3988 }
3989 }
3990
3991 /* Set up .got offsets for local syms, and space for local dynamic
3992 relocs. */
c72f2fb2 3993 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
35c08157
KLC		 3994 {
3995 bfd_signed_vma *local_got;
3996 bfd_signed_vma *end_local_got;
3997 bfd_size_type locsymcount;
3998 Elf_Internal_Shdr *symtab_hdr;
3999 asection *srel;
4000
4001 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour)
4002 continue;
4003
4004 for (s = ibfd->sections; s != NULL; s = s->next)
4005 {
4006 struct elf_nds32_dyn_relocs *p;
4007
4008 for (p = ((struct elf_nds32_dyn_relocs *)
4009 elf_section_data (s)->local_dynrel);
4010 p != NULL; p = p->next)
4011 {
4012 if (!bfd_is_abs_section (p->sec)
4013 && bfd_is_abs_section (p->sec->output_section))
4014 {
4015 /* Input section has been discarded, either because
4016 it is a copy of a linkonce section or due to
4017 linker script /DISCARD/, so we'll be discarding
4018 the relocs too. */
4019 }
4020 else if (p->count != 0)
4021 {
4022 srel = elf_section_data (p->sec)->sreloc;
4023 srel->size += p->count * sizeof (Elf32_External_Rela);
4024 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
4025 info->flags |= DF_TEXTREL;
4026 }
4027 }
4028 }
4029
4030 local_got = elf_local_got_refcounts (ibfd);
4031 if (!local_got)
4032 continue;
4033
4034 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
4035 locsymcount = symtab_hdr->sh_info;
4036 end_local_got = local_got + locsymcount;
4037 s = htab->sgot;
4038 srel = htab->srelgot;
4039 for (; local_got < end_local_got; ++local_got)
4040 {
4041 if (*local_got > 0)
4042 {
4043 *local_got = s->size;
4044 s->size += 4;
4045 if (info->shared)
4046 srel->size += sizeof (Elf32_External_Rela);
4047 }
4048 else
4049 *local_got = (bfd_vma) - 1;
4050 }
4051 }
4052
4053 /* Allocate global sym .plt and .got entries, and space for global
4054 sym dynamic relocs. */
4055 elf_link_hash_traverse (&htab->root, allocate_dynrelocs, (void *) info);
4056
4057 /* We now have determined the sizes of the various dynamic sections.
4058 Allocate memory for them. */
4059 relocs = FALSE;
4060 for (s = dynobj->sections; s != NULL; s = s->next)
4061 {
4062 if ((s->flags & SEC_LINKER_CREATED) == 0)
4063 continue;
4064
4065 if (s == htab->splt)
4066 {
4067 /* Strip this section if we don't need it; see the
4068 comment below. */
4069 }
4070 else if (s == htab->sgot)
4071 {
4072 got_size += s->size;
4073 }
4074 else if (s == htab->sgotplt)
4075 {
4076 got_size += s->size;
4077 }
4078 else if (strncmp (bfd_get_section_name (dynobj, s), ".rela", 5) == 0)
4079 {
4080 if (s->size != 0 && s != htab->srelplt)
4081 relocs = TRUE;
4082
4083 /* We use the reloc_count field as a counter if we need
4084 to copy relocs into the output file. */
4085 s->reloc_count = 0;
4086 }
4087 else
4088 {
4089 /* It's not one of our sections, so don't allocate space. */
4090 continue;
4091 }
4092
4093 if (s->size == 0)
4094 {
4095 /* If we don't need this section, strip it from the
4096 output file. This is mostly to handle .rela.bss and
4097 .rela.plt. We must create both sections in
4098 create_dynamic_sections, because they must be created
4099 before the linker maps input sections to output
4100 sections. The linker does that before
4101 adjust_dynamic_symbol is called, and it is that
4102 function which decides whether anything needs to go
4103 into these sections. */
4104 s->flags |= SEC_EXCLUDE;
4105 continue;
4106 }
4107
4108 /* Allocate memory for the section contents. We use bfd_zalloc
4109 here in case unused entries are not reclaimed before the
4110 section's contents are written out. This should not happen,
4111 but this way if it does, we get a R_NDS32_NONE reloc instead
4112 of garbage. */
4113 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
4114 if (s->contents == NULL)
4115 return FALSE;
4116 }
4117
4118
4119 if (htab->root.dynamic_sections_created)
4120 {
4121 /* Add some entries to the .dynamic section. We fill in the
4122 values later, in nds32_elf_finish_dynamic_sections, but we
4123 must add the entries now so that we get the correct size for
4124 the .dynamic section. The DT_DEBUG entry is filled in by the
4125 dynamic linker and used by the debugger. */
4126#define add_dynamic_entry(TAG, VAL) \
4127 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
4128
4129 if (!info->shared)
4130 {
4131 if (!add_dynamic_entry (DT_DEBUG, 0))
4132 return FALSE;
4133 }
4134
4135 if (htab->splt->size != 0)
4136 {
4137 if (!add_dynamic_entry (DT_PLTGOT, 0)
4138 || !add_dynamic_entry (DT_PLTRELSZ, 0)
4139 || !add_dynamic_entry (DT_PLTREL, DT_RELA)
4140 || !add_dynamic_entry (DT_JMPREL, 0))
4141 return FALSE;
4142 }
4143
4144 if (relocs)
4145 {
4146 if (!add_dynamic_entry (DT_RELA, 0)
4147 || !add_dynamic_entry (DT_RELASZ, 0)
4148 || !add_dynamic_entry (DT_RELAENT, sizeof (Elf32_External_Rela)))
4149 return FALSE;
4150
4151 /* If any dynamic relocs apply to a read-only section,
4152 then we need a DT_TEXTREL entry. */
4153 if ((info->flags & DF_TEXTREL) == 0)
4154 elf_link_hash_traverse (&htab->root, readonly_dynrelocs,
4155 (void *) info);
4156
4157 if ((info->flags & DF_TEXTREL) != 0)
4158 {
4159 if (!add_dynamic_entry (DT_TEXTREL, 0))
4160 return FALSE;
4161 }
4162 }
4163 }
4164#undef add_dynamic_entry
4165
4166 return TRUE;
4167}
4168
4169static bfd_reloc_status_type
4170nds32_relocate_contents (reloc_howto_type *howto, bfd *input_bfd,
4171 bfd_vma relocation, bfd_byte *location)
4172{
4173 int size;
4174 bfd_vma x = 0;
4175 bfd_reloc_status_type flag;
4176 unsigned int rightshift = howto->rightshift;
4177 unsigned int bitpos = howto->bitpos;
4178
4179 /* If the size is negative, negate RELOCATION. This isn't very
4180 general. */
4181 if (howto->size < 0)
4182 relocation = -relocation;
4183
4184 /* Get the value we are going to relocate. */
4185 size = bfd_get_reloc_size (howto);
4186 switch (size)
4187 {
4188 default:
35c08157
KLC		 4189 abort ();
4190 break;
6346d5ca
AM		 4191 case 0:
4192 return bfd_reloc_ok;
35c08157
KLC		 4193 case 2:
4194 x = bfd_getb16 (location);
4195 break;
4196 case 4:
4197 x = bfd_getb32 (location);
4198 break;
4199 }
4200
4201 /* Check for overflow. FIXME: We may drop bits during the addition
4202 which we don't check for. We must either check at every single
4203 operation, which would be tedious, or we must do the computations
4204 in a type larger than bfd_vma, which would be inefficient. */
4205 flag = bfd_reloc_ok;
4206 if (howto->complain_on_overflow != complain_overflow_dont)
4207 {
4208 bfd_vma addrmask, fieldmask, signmask, ss;
4209 bfd_vma a, b, sum;
4210
4211 /* Get the values to be added together. For signed and unsigned
4212 relocations, we assume that all values should be truncated to
4213 the size of an address. For bitfields, all the bits matter.
4214 See also bfd_check_overflow. */
4215 fieldmask = N_ONES (howto->bitsize);
4216 signmask = ~fieldmask;
4217 addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask;
4218 a = (relocation & addrmask) >> rightshift;
4219 b = (x & howto->src_mask & addrmask) >> bitpos;
4220
4221 switch (howto->complain_on_overflow)
4222 {
4223 case complain_overflow_signed:
4224 /* If any sign bits are set, all sign bits must be set.
4225 That is, A must be a valid negative address after
4226 shifting. */
4227 signmask = ~(fieldmask >> 1);
4228 /* Fall through. */
4229
4230 case complain_overflow_bitfield:
4231 /* Much like the signed check, but for a field one bit
4232 wider. We allow a bitfield to represent numbers in the
4233 range -2**n to 2**n-1, where n is the number of bits in the
4234 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
4235 can't overflow, which is exactly what we want. */
4236 ss = a & signmask;
4237 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
4238 flag = bfd_reloc_overflow;
4239
4240 /* We only need this next bit of code if the sign bit of B
4241 is below the sign bit of A. This would only happen if
4242 SRC_MASK had fewer bits than BITSIZE. Note that if
4243 SRC_MASK has more bits than BITSIZE, we can get into
4244 trouble; we would need to verify that B is in range, as
4245 we do for A above. */
4246 ss = ((~howto->src_mask) >> 1) & howto->src_mask;
4247 ss >>= bitpos;
4248
4249 /* Set all the bits above the sign bit. */
4250 b = (b ^ ss) - ss;
4251
4252 /* Now we can do the addition. */
4253 sum = a + b;
4254
4255 /* See if the result has the correct sign. Bits above the
4256 sign bit are junk now; ignore them. If the sum is
4257 positive, make sure we did not have all negative inputs;
4258 if the sum is negative, make sure we did not have all
4259 positive inputs. The test below looks only at the sign
4260 bits, and it really just
4261 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
4262
4263 We mask with addrmask here to explicitly allow an address
4264 wrap-around. The Linux kernel relies on it, and it is
4265 the only way to write assembler code which can run when
4266 loaded at a location 0x80000000 away from the location at
4267 which it is linked. */
4268 if (((~(a ^ b)) & (a ^ sum)) & signmask & addrmask)
4269 flag = bfd_reloc_overflow;
4270
4271 break;
4272
4273 case complain_overflow_unsigned:
4274 /* Checking for an unsigned overflow is relatively easy:
4275 trim the addresses and add, and trim the result as well.
4276 Overflow is normally indicated when the result does not
4277 fit in the field. However, we also need to consider the
4278 case when, e.g., fieldmask is 0x7fffffff or smaller, an
4279 input is 0x80000000, and bfd_vma is only 32 bits; then we
4280 will get sum == 0, but there is an overflow, since the
4281 inputs did not fit in the field. Instead of doing a
4282 separate test, we can check for this by or-ing in the
4283 operands when testing for the sum overflowing its final
4284 field. */
4285 sum = (a + b) & addrmask;
4286 if ((a | b | sum) & signmask)
4287 flag = bfd_reloc_overflow;
4288 break;
4289
4290 default:
4291 abort ();
4292 }
4293 }
4294
4295 /* Put RELOCATION in the right bits. */
4296 relocation >>= (bfd_vma) rightshift;
4297 relocation <<= (bfd_vma) bitpos;
4298
4299 /* Add RELOCATION to the right bits of X. */
4300 /* FIXME : 090616
4301 Because the relaxation may generate duplicate relocation at one address,
4302 an addition to immediate in the instruction may cause the relocation added
4303 several times.
4304 This bug should be fixed in assembler, but a check is also needed here. */
4305 if (howto->partial_inplace)
4306 x = ((x & ~howto->dst_mask)
4307 | (((x & howto->src_mask) + relocation) & howto->dst_mask));
4308 else
4309 x = ((x & ~howto->dst_mask) | ((relocation) & howto->dst_mask));
4310
4311
4312 /* Put the relocated value back in the object file. */
4313 switch (size)
4314 {
4315 default:
4316 case 0:
4317 case 1:
4318 case 8:
4319 abort ();
4320 break;
4321 case 2:
4322 bfd_putb16 (x, location);
4323 break;
4324 case 4:
4325 bfd_putb32 (x, location);
4326 break;
4327 }
4328
4329 return flag;
4330}
4331
4332static bfd_reloc_status_type
4333nds32_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd,
4334 asection *input_section, bfd_byte *contents,
4335 bfd_vma address, bfd_vma value, bfd_vma addend)
4336{
4337 bfd_vma relocation;
4338
4339 /* Sanity check the address. */
4340 if (address > bfd_get_section_limit (input_bfd, input_section))
4341 return bfd_reloc_outofrange;
4342
4343 /* This function assumes that we are dealing with a basic relocation
4344 against a symbol. We want to compute the value of the symbol to
4345 relocate to. This is just VALUE, the value of the symbol, plus
4346 ADDEND, any addend associated with the reloc. */
4347 relocation = value + addend;
4348
4349 /* If the relocation is PC relative, we want to set RELOCATION to
4350 the distance between the symbol (currently in RELOCATION) and the
4351 location we are relocating. Some targets (e.g., i386-aout)
4352 arrange for the contents of the section to be the negative of the
4353 offset of the location within the section; for such targets
4354 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
4355 simply leave the contents of the section as zero; for such
4356 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
4357 need to subtract out the offset of the location within the
4358 section (which is just ADDRESS). */
4359 if (howto->pc_relative)
4360 {
4361 relocation -= (input_section->output_section->vma
4362 + input_section->output_offset);
4363 if (howto->pcrel_offset)
4364 relocation -= address;
4365 }
4366
4367 return nds32_relocate_contents (howto, input_bfd, relocation,
4368 contents + address);
4369}
4370
4371static bfd_boolean
4372nds32_elf_output_symbol_hook (struct bfd_link_info *info,
4373 const char *name,
4374 Elf_Internal_Sym *elfsym ATTRIBUTE_UNUSED,
4375 asection *input_sec,
4376 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
4377{
4378 const char *source;
4379 FILE *sym_ld_script = NULL;
4380 struct elf_nds32_link_hash_table *table;
4381
4382 table = nds32_elf_hash_table (info);
4383 sym_ld_script = table->sym_ld_script;
4384 if (!sym_ld_script)
4385 return TRUE;
4386
4387 if (!h || !name || *name == '\0')
4388 return TRUE;
4389
4390 if (input_sec->flags & SEC_EXCLUDE)
4391 return TRUE;
4392
4393 if (!check_start_export_sym)
4394 {
4395 fprintf (sym_ld_script, "SECTIONS\n{\n");
4396 check_start_export_sym = 1;
4397 }
4398
4399 if (h->root.type == bfd_link_hash_defined
4400 || h->root.type == bfd_link_hash_defweak)
4401 {
4402 if (!h->root.u.def.section->output_section)
4403 return TRUE;
4404
4405 if (bfd_is_const_section (input_sec))
4406 source = input_sec->name;
4407 else
4408 source = input_sec->owner->filename;
4409
4410 fprintf (sym_ld_script, "\t%s = 0x%08lx;\t /* %s */\n",
4411 h->root.root.string,
4412 (long) (h->root.u.def.value
4413 + h->root.u.def.section->output_section->vma
4414 + h->root.u.def.section->output_offset), source);
4415 }
4416
4417 return TRUE;
4418}
4419
4420/* Relocate an NDS32/D ELF section.
4421 There is some attempt to make this function usable for many architectures,
4422 both for RELA and REL type relocs, if only to serve as a learning tool.
4423
4424 The RELOCATE_SECTION function is called by the new ELF backend linker
4425 to handle the relocations for a section.
4426
4427 The relocs are always passed as Rela structures; if the section
4428 actually uses Rel structures, the r_addend field will always be
4429 zero.
4430
4431 This function is responsible for adjust the section contents as
4432 necessary, and (if using Rela relocs and generating a
4433 relocatable output file) adjusting the reloc addend as
4434 necessary.
4435
4436 This function does not have to worry about setting the reloc
4437 address or the reloc symbol index.
4438
4439 LOCAL_SYMS is a pointer to the swapped in local symbols.
4440
4441 LOCAL_SECTIONS is an array giving the section in the input file
4442 corresponding to the st_shndx field of each local symbol.
4443
4444 The global hash table entry for the global symbols can be found
4445 via elf_sym_hashes (input_bfd).
4446
4447 When generating relocatable output, this function must handle
4448 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
4449 going to be the section symbol corresponding to the output
4450 section, which means that the addend must be adjusted
4451 accordingly. */
4452
1c8f6a4d
KLC		 4453static bfd_vma
4454dtpoff_base (struct bfd_link_info *info)
4455{
4456 /* If tls_sec is NULL, we should have signalled an error already. */
4457 if (elf_hash_table (info)->tls_sec == NULL)
4458 return 0;
4459 return elf_hash_table (info)->tls_sec->vma;
4460}
4461
35c08157
KLC		 4462static bfd_boolean
4463nds32_elf_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED,
4464 struct bfd_link_info * info,
4465 bfd * input_bfd,
4466 asection * input_section,
4467 bfd_byte * contents,
4468 Elf_Internal_Rela * relocs,
4469 Elf_Internal_Sym * local_syms,
4470 asection ** local_sections)
4471{
4472 Elf_Internal_Shdr *symtab_hdr;
4473 struct elf_link_hash_entry **sym_hashes;
4474 Elf_Internal_Rela *rel, *relend;
4475 bfd_boolean ret = TRUE; /* Assume success. */
4476 int align = 0;
4477 bfd_reloc_status_type r;
4478 const char *errmsg = NULL;
4479 bfd_vma gp;
4480 struct elf_nds32_link_hash_table *htab;
4481 bfd *dynobj;
4482 bfd_vma *local_got_offsets;
4483 asection *sgot, *splt, *sreloc;
4484 bfd_vma high_address;
4485 struct elf_nds32_link_hash_table *table;
4486 int eliminate_gc_relocs;
4487 bfd_vma fpbase_addr;
4488
4489 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4490 sym_hashes = elf_sym_hashes (input_bfd);
4491 htab = nds32_elf_hash_table (info);
4492 high_address = bfd_get_section_limit (input_bfd, input_section);
4493
4494 dynobj = htab->root.dynobj;
4495 local_got_offsets = elf_local_got_offsets (input_bfd);
4496
4497 sgot = htab->sgot;
4498 splt = htab->splt;
4499 sreloc = NULL;
4500
4501 rel = relocs;
4502 relend = relocs + input_section->reloc_count;
4503
4504 table = nds32_elf_hash_table (info);
4505 eliminate_gc_relocs = table->eliminate_gc_relocs;
4506 /* By this time, we can adjust the value of _SDA_BASE_. */
4507 if ((!info->relocatable))
4508 {
4509 is_SDA_BASE_set = 1;
4510 r = nds32_elf_final_sda_base (output_bfd, info, &gp, TRUE);
4511 if (r != bfd_reloc_ok)
4512 return FALSE;
4513 }
4514
1c8f6a4d
KLC		 4515 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
4516 if (!nds32_elf_ifc_reloc ())
4517 (*_bfd_error_handler) (_("error: IFC relocation error."));
4518
4519 /* Relocation for .ex9.itable. */
4520 if (table->target_optimize & NDS32_RELAX_EX9_ON
4521 || (table->ex9_import_file && table->update_ex9_table))
4522 nds32_elf_ex9_reloc_jmp (info);
4523
35c08157
KLC		 4524 /* Use gp as fp to prevent truncated fit. Because in relaxation time
4525 the fp value is set as gp, and it has be reverted for instruction
4526 setting fp. */
4527 fpbase_addr = elf_gp (output_bfd);
4528
4529 for (rel = relocs; rel < relend; rel++)
4530 {
4531 enum elf_nds32_reloc_type r_type;
4532 reloc_howto_type *howto = NULL;
4533 unsigned long r_symndx;
4534 struct elf_link_hash_entry *h = NULL;
4535 Elf_Internal_Sym *sym = NULL;
4536 asection *sec;
4537 bfd_vma relocation;
4538
4539 /* We can't modify r_addend here as elf_link_input_bfd has an assert to
4540 ensure it's zero (we use REL relocs, not RELA). Therefore this
4541 should be assigning zero to `addend', but for clarity we use
4542 `r_addend'. */
4543
4544 bfd_vma addend = rel->r_addend;
4545 bfd_vma offset = rel->r_offset;
4546
4547 r_type = ELF32_R_TYPE (rel->r_info);
4548 if (r_type >= R_NDS32_max)
4549 {
4550 (*_bfd_error_handler) (_("%B: error: unknown relocation type %d."),
4551 input_bfd, r_type);
4552 bfd_set_error (bfd_error_bad_value);
4553 ret = FALSE;
4554 continue;
4555 }
4556
4557 if (r_type == R_NDS32_GNU_VTENTRY
4558 || r_type == R_NDS32_GNU_VTINHERIT
4559 || r_type == R_NDS32_NONE
4560 || r_type == R_NDS32_RELA_GNU_VTENTRY
4561 || r_type == R_NDS32_RELA_GNU_VTINHERIT
4562 || (r_type >= R_NDS32_INSN16 && r_type <= R_NDS32_25_FIXED_RELA)
4563 || r_type == R_NDS32_DATA
1c8f6a4d
KLC		 4564 || r_type == R_NDS32_TRAN
4565 || (r_type >= R_NDS32_LONGCALL4 && r_type <= R_NDS32_LONGJUMP6))
35c08157
KLC		 4566 continue;
4567
4568 /* If we enter the fp-as-gp region. Resolve the address of best fp-base. */
4569 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_BEGIN
4570 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4571 {
4572 int dist;
4573
4574 /* Distance to relocation of best fp-base is encoded in R_SYM. */
4575 dist = rel->r_addend >> 16;
4576 fpbase_addr = calculate_memory_address (input_bfd, rel + dist,
4577 local_syms, symtab_hdr);
4578 }
4579 else if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_END
4580 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4581 {
4582 fpbase_addr = elf_gp (output_bfd);
4583 }
4584
4585 if (((r_type >= R_NDS32_DWARF2_OP1_RELA
4586 && r_type <= R_NDS32_DWARF2_LEB_RELA)
4587 || r_type >= R_NDS32_RELAX_ENTRY) && !info->relocatable)
4588 continue;
4589
4590 howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
4591 r_symndx = ELF32_R_SYM (rel->r_info);
4592
4593 /* This is a final link. */
4594 sym = NULL;
4595 sec = NULL;
4596 h = NULL;
4597
4598 if (r_symndx < symtab_hdr->sh_info)
4599 {
4600 /* Local symbol. */
4601 sym = local_syms + r_symndx;
4602 sec = local_sections[r_symndx];
4603
4604 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
4605 addend = rel->r_addend;
4606 }
4607 else
4608 {
4609 /* External symbol. */
4610 bfd_boolean warned, ignored, unresolved_reloc;
4611 int symndx = r_symndx - symtab_hdr->sh_info;
4612
4613 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
4614 r_symndx, symtab_hdr, sym_hashes, h, sec,
4615 relocation, unresolved_reloc, warned,
4616 ignored);
4617
4618 /* la $fp, _FP_BASE_ is per-function (region).
4619 Handle it specially. */
4620 switch ((int) r_type)
4621 {
4622 case R_NDS32_SDA19S0_RELA:
4623 case R_NDS32_SDA15S0_RELA:
4624 case R_NDS32_20_RELA:
4625 if (strcmp (elf_sym_hashes (input_bfd)[symndx]->root.root.string,
4626 FP_BASE_NAME) == 0)
4627 {
4628 relocation = fpbase_addr;
4629 break;
4630 }
4631 }
4632
4633 }
4634
4635 if (info->relocatable)
4636 {
4637 /* This is a relocatable link. We don't have to change
4638 anything, unless the reloc is against a section symbol,
4639 in which case we have to adjust according to where the
4640 section symbol winds up in the output section. */
4641 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
4642 rel->r_addend += sec->output_offset + sym->st_value;
4643
4644 continue;
4645 }
4646
4647 /* Sanity check the address. */
4648 if (offset > high_address)
4649 {
4650 r = bfd_reloc_outofrange;
4651 goto check_reloc;
4652 }
4653
4654 if ((r_type >= R_NDS32_DWARF2_OP1_RELA
4655 && r_type <= R_NDS32_DWARF2_LEB_RELA)
4656 || r_type >= R_NDS32_RELAX_ENTRY)
4657 continue;
4658
4659 switch ((int) r_type)
4660 {
4661 case R_NDS32_GOTOFF:
4662 /* Relocation is relative to the start of the global offset
4663 table (for ld24 rx, #uimm24), e.g. access at label+addend
4664
4665 ld24 rx. #label@GOTOFF + addend
4666 sub rx, r12. */
4667 case R_NDS32_GOTOFF_HI20:
4668 case R_NDS32_GOTOFF_LO12:
4669 case R_NDS32_GOTOFF_LO15:
4670 case R_NDS32_GOTOFF_LO19:
4671 BFD_ASSERT (sgot != NULL);
4672
4673 relocation -= elf_gp (output_bfd);
4674 break;
4675
4676 case R_NDS32_9_PLTREL:
4677 case R_NDS32_25_PLTREL:
4678 /* Relocation is to the entry for this symbol in the
4679 procedure linkage table. */
4680
4681 /* The native assembler will generate a 25_PLTREL reloc
4682 for a local symbol if you assemble a call from one
4683 section to another when using -K pic. */
4684 if (h == NULL)
4685 break;
4686
4687 if (h->forced_local)
4688 break;
4689
4690 /* We didn't make a PLT entry for this symbol. This
4691 happens when statically linking PIC code, or when
4692 using -Bsymbolic. */
4693 if (h->plt.offset == (bfd_vma) - 1)
4694 break;
4695
4696 relocation = (splt->output_section->vma
4697 + splt->output_offset + h->plt.offset);
4698 break;
4699
4700 case R_NDS32_PLT_GOTREL_HI20:
4701 case R_NDS32_PLT_GOTREL_LO12:
4702 case R_NDS32_PLT_GOTREL_LO15:
4703 case R_NDS32_PLT_GOTREL_LO19:
4704 case R_NDS32_PLT_GOTREL_LO20:
4705 if (h == NULL || h->forced_local || h->plt.offset == (bfd_vma) - 1)
4706 {
4707 /* We didn't make a PLT entry for this symbol. This
4708 happens when statically linking PIC code, or when
4709 using -Bsymbolic. */
4710 relocation -= elf_gp (output_bfd);
4711 break;
4712 }
4713
4714 relocation = (splt->output_section->vma
4715 + splt->output_offset + h->plt.offset);
4716
4717 relocation -= elf_gp (output_bfd);
4718 break;
4719
4720 case R_NDS32_PLTREL_HI20:
4721 case R_NDS32_PLTREL_LO12:
4722
4723 /* Relocation is to the entry for this symbol in the
4724 procedure linkage table. */
4725
4726 /* The native assembler will generate a 25_PLTREL reloc
4727 for a local symbol if you assemble a call from one
4728 section to another when using -K pic. */
4729 if (h == NULL)
4730 break;
4731
4732 if (h->forced_local)
4733 break;
4734
4735 if (h->plt.offset == (bfd_vma) - 1)
4736 /* We didn't make a PLT entry for this symbol. This
4737 happens when statically linking PIC code, or when
4738 using -Bsymbolic. */
4739 break;
4740
4741 if (splt == NULL)
4742 break;
4743
4744 relocation = (splt->output_section->vma
4745 + splt->output_offset
4746 + h->plt.offset + 4)
4747 - (input_section->output_section->vma
4748 + input_section->output_offset
4749 + rel->r_offset);
4750
4751 break;
4752
4753 case R_NDS32_GOTPC20:
4754 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4755 ld24 rx,#_GLOBAL_OFFSET_TABLE_ */
4756 relocation = elf_gp (output_bfd);
4757 break;
4758
4759 case R_NDS32_GOTPC_HI20:
4760 case R_NDS32_GOTPC_LO12:
4761 {
4762 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4763 bl .+4
4764 seth rx,#high(_GLOBAL_OFFSET_TABLE_)
4765 or3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4766 or
4767 bl .+4
4768 seth rx,#shigh(_GLOBAL_OFFSET_TABLE_)
4769 add3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4770 */
4771 relocation = elf_gp (output_bfd);
4772 relocation -= (input_section->output_section->vma
4773 + input_section->output_offset + rel->r_offset);
4774 break;
4775 }
4776
4777 case R_NDS32_GOT20:
4778 /* Fall through. */
4779 case R_NDS32_GOT_HI20:
4780 case R_NDS32_GOT_LO12:
4781 case R_NDS32_GOT_LO15:
4782 case R_NDS32_GOT_LO19:
4783 /* Relocation is to the entry for this symbol in the global
4784 offset table. */
4785 BFD_ASSERT (sgot != NULL);
4786
4787 if (h != NULL)
4788 {
4789 bfd_boolean dyn;
4790 bfd_vma off;
4791
4792 off = h->got.offset;
4793 BFD_ASSERT (off != (bfd_vma) - 1);
4794 dyn = htab->root.dynamic_sections_created;
4795 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
4796 || (info->shared
4797 && (info->symbolic
4798 || h->dynindx == -1
4799 || h->forced_local) && h->def_regular))
4800 {
4801 /* This is actually a static link, or it is a
4802 -Bsymbolic link and the symbol is defined
4803 locally, or the symbol was forced to be local
4804 because of a version file. We must initialize
4805 this entry in the global offset table. Since the
4806 offset must always be a multiple of 4, we use the
4807 least significant bit to record whether we have
4808 initialized it already.
4809
4810 When doing a dynamic link, we create a .rela.got
4811 relocation entry to initialize the value. This
4812 is done in the finish_dynamic_symbol routine. */
4813 if ((off & 1) != 0)
4814 off &= ~1;
4815 else
4816 {
4817 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4818 h->got.offset |= 1;
4819 }
4820 }
4821 relocation = sgot->output_section->vma + sgot->output_offset + off
4822 - elf_gp (output_bfd);
4823 }
4824 else
4825 {
4826 bfd_vma off;
4827 bfd_byte *loc;
4828
4829 BFD_ASSERT (local_got_offsets != NULL
4830 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
4831
4832 off = local_got_offsets[r_symndx];
4833
4834 /* The offset must always be a multiple of 4. We use
4835 the least significant bit to record whether we have
4836 already processed this entry. */
4837 if ((off & 1) != 0)
4838 off &= ~1;
4839 else
4840 {
4841 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4842
4843 if (info->shared)
4844 {
4845 asection *srelgot;
4846 Elf_Internal_Rela outrel;
4847
4848 /* We need to generate a R_NDS32_RELATIVE reloc
4849 for the dynamic linker. */
4850 srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
4851 BFD_ASSERT (srelgot != NULL);
4852
4853 outrel.r_offset = (elf_gp (output_bfd)
4854 + sgot->output_offset + off);
4855 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4856 outrel.r_addend = relocation;
4857 loc = srelgot->contents;
4858 loc +=
4859 srelgot->reloc_count * sizeof (Elf32_External_Rela);
4860 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4861 ++srelgot->reloc_count;
4862 }
4863 local_got_offsets[r_symndx] |= 1;
4864 }
4865 relocation = sgot->output_section->vma + sgot->output_offset + off
4866 - elf_gp (output_bfd);
4867 }
4868
4869 break;
4870
4871 case R_NDS32_16_RELA:
4872 case R_NDS32_20_RELA:
4873 case R_NDS32_5_RELA:
4874 case R_NDS32_32_RELA:
4875 case R_NDS32_9_PCREL_RELA:
4876 case R_NDS32_WORD_9_PCREL_RELA:
4877 case R_NDS32_10_UPCREL_RELA:
4878 case R_NDS32_15_PCREL_RELA:
4879 case R_NDS32_17_PCREL_RELA:
4880 case R_NDS32_25_PCREL_RELA:
4881 case R_NDS32_HI20_RELA:
4882 case R_NDS32_LO12S3_RELA:
4883 case R_NDS32_LO12S2_RELA:
4884 case R_NDS32_LO12S2_DP_RELA:
4885 case R_NDS32_LO12S2_SP_RELA:
4886 case R_NDS32_LO12S1_RELA:
4887 case R_NDS32_LO12S0_RELA:
4888 case R_NDS32_LO12S0_ORI_RELA:
4889 if (info->shared && r_symndx != 0
4890 && (input_section->flags & SEC_ALLOC) != 0
4891 && (eliminate_gc_relocs == 0
4892 || (sec && (sec->flags & SEC_EXCLUDE) == 0))
4893 && ((r_type != R_NDS32_9_PCREL_RELA
4894 && r_type != R_NDS32_WORD_9_PCREL_RELA
4895 && r_type != R_NDS32_10_UPCREL_RELA
4896 && r_type != R_NDS32_15_PCREL_RELA
4897 && r_type != R_NDS32_17_PCREL_RELA
4898 && r_type != R_NDS32_25_PCREL_RELA
4899 && !(r_type == R_NDS32_32_RELA
4900 && strcmp (input_section->name, ".eh_frame") == 0))
4901 || (h != NULL && h->dynindx != -1
4902 && (!info->symbolic || !h->def_regular))))
4903 {
4904 Elf_Internal_Rela outrel;
4905 bfd_boolean skip, relocate;
4906 bfd_byte *loc;
4907
4908 /* When generating a shared object, these relocations
4909 are copied into the output file to be resolved at run
4910 time. */
4911
4912 if (sreloc == NULL)
4913 {
4914 const char *name;
4915
4916 name = bfd_elf_string_from_elf_section
4917 (input_bfd, elf_elfheader (input_bfd)->e_shstrndx,
4918 elf_section_data (input_section)->rela.hdr->sh_name);
4919 if (name == NULL)
4920 return FALSE;
4921
4922 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
4923 && strcmp (bfd_get_section_name (input_bfd,
4924 input_section),
4925 name + 5) == 0);
4926
4927 sreloc = bfd_get_section_by_name (dynobj, name);
4928 BFD_ASSERT (sreloc != NULL);
4929 }
4930
4931 skip = FALSE;
4932 relocate = FALSE;
4933
4934 outrel.r_offset = _bfd_elf_section_offset (output_bfd,
4935 info,
4936 input_section,
4937 rel->r_offset);
4938 if (outrel.r_offset == (bfd_vma) - 1)
4939 skip = TRUE;
4940 else if (outrel.r_offset == (bfd_vma) - 2)
4941 skip = TRUE, relocate = TRUE;
4942 outrel.r_offset += (input_section->output_section->vma
4943 + input_section->output_offset);
4944
4945 if (skip)
4946 memset (&outrel, 0, sizeof outrel);
4947 else if (r_type == R_NDS32_17_PCREL_RELA
4948 || r_type == R_NDS32_15_PCREL_RELA
4949 || r_type == R_NDS32_25_PCREL_RELA)
4950 {
4951 BFD_ASSERT (h != NULL && h->dynindx != -1);
4952 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4953 outrel.r_addend = rel->r_addend;
4954 }
4955 else
4956 {
4957 /* h->dynindx may be -1 if this symbol was marked to
4958 become local. */
4959 if (h == NULL
4960 || ((info->symbolic || h->dynindx == -1)
4961 && h->def_regular))
4962 {
4963 relocate = TRUE;
4964 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4965 outrel.r_addend = relocation + rel->r_addend;
4966 }
4967 else
4968 {
4969 BFD_ASSERT (h->dynindx != -1);
4970 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4971 outrel.r_addend = rel->r_addend;
4972 }
4973 }
4974
4975 loc = sreloc->contents;
4976 loc += sreloc->reloc_count * sizeof (Elf32_External_Rela);
4977 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4978 ++sreloc->reloc_count;
4979
4980 /* If this reloc is against an external symbol, we do
4981 not want to fiddle with the addend. Otherwise, we
4982 need to include the symbol value so that it becomes
4983 an addend for the dynamic reloc. */
4984 if (!relocate)
4985 continue;
4986 }
4987 break;
4988
4989 case R_NDS32_25_ABS_RELA:
4990 if (info->shared)
4991 {
4992 (*_bfd_error_handler)
1c8f6a4d
KLC		 4993 (_("%s: warning: cannot deal R_NDS32_25_ABS_RELA in shared "
4994 "mode."), bfd_get_filename (input_bfd));
35c08157
KLC		 4995 return FALSE;
4996 }
4997 break;
4998
4999 case R_NDS32_9_PCREL:
5000 r = nds32_elf_do_9_pcrel_reloc (input_bfd, howto, input_section,
5001 contents, offset,
5002 sec, relocation, addend);
5003 goto check_reloc;
5004
5005 case R_NDS32_HI20:
5006 {
5007 Elf_Internal_Rela *lorel;
5008
5009 /* We allow an arbitrary number of HI20 relocs before the
5010 LO12 reloc. This permits gcc to emit the HI and LO relocs
5011 itself. */
5012 for (lorel = rel + 1;
5013 (lorel < relend
5014 && ELF32_R_TYPE (lorel->r_info) == R_NDS32_HI20); lorel++)
5015 continue;
5016 if (lorel < relend
5017 && (ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S3
5018 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S2
5019 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S1
5020 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S0))
5021 {
5022 nds32_elf_relocate_hi20 (input_bfd, r_type, rel, lorel,
5023 contents, relocation + addend);
5024 r = bfd_reloc_ok;
5025 }
5026 else
5027 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
1c8f6a4d
KLC		 5028 contents, offset, relocation,
5029 addend);
35c08157
KLC		 5030 }
5031
5032 goto check_reloc;
5033
5034 case R_NDS32_GOT17S2_RELA:
5035 case R_NDS32_GOT15S2_RELA:
5036 {
5037 bfd_vma off;
5038
5039 BFD_ASSERT (sgot != NULL);
5040
5041 if (h != NULL)
5042 {
5043 bfd_boolean dyn;
5044
5045 off = h->got.offset;
5046 BFD_ASSERT (off != (bfd_vma) - 1);
5047
5048 dyn = htab->root.dynamic_sections_created;
5049 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL
5050 (dyn, info->shared, h) || (info->shared
5051 && (info->symbolic
5052 || h->dynindx == -1
5053 || h->forced_local)
5054 && h->def_regular))
5055 {
5056 /* This is actually a static link, or it is a
5057 -Bsymbolic link and the symbol is defined
5058 locally, or the symbol was forced to be local
5059 because of a version file. We must initialize
5060 this entry in the global offset table. Since the
5061 offset must always be a multiple of 4, we use the
5062 least significant bit to record whether we have
5063 initialized it already.
5064
5065 When doing a dynamic link, we create a .rela.got
5066 relocation entry to initialize the value. This
5067 is done in the finish_dynamic_symbol routine. */
5068 if ((off & 1) != 0)
5069 off &= ~1;
5070 else
5071 {
5072 bfd_put_32 (output_bfd, relocation,
5073 sgot->contents + off);
5074 h->got.offset |= 1;
5075 }
5076 }
5077 }
5078 else
5079 {
5080 bfd_byte *loc;
5081
5082 BFD_ASSERT (local_got_offsets != NULL
5083 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5084
5085 off = local_got_offsets[r_symndx];
5086
5087 /* The offset must always be a multiple of 4. We use
5088 the least significant bit to record whether we have
5089 already processed this entry. */
5090 if ((off & 1) != 0)
5091 off &= ~1;
5092 else
5093 {
5094 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
5095
5096 if (info->shared)
5097 {
5098 asection *srelgot;
5099 Elf_Internal_Rela outrel;
5100
5101 /* We need to generate a R_NDS32_RELATIVE reloc
5102 for the dynamic linker. */
5103 srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
5104 BFD_ASSERT (srelgot != NULL);
5105
5106 outrel.r_offset = (elf_gp (output_bfd)
5107 + sgot->output_offset + off);
5108 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5109 outrel.r_addend = relocation;
5110 loc = srelgot->contents;
5111 loc +=
5112 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5113 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5114 ++srelgot->reloc_count;
5115 }
5116 local_got_offsets[r_symndx] |= 1;
5117 }
5118 }
5119 relocation = sgot->output_section->vma + sgot->output_offset + off
5120 - elf_gp (output_bfd);
5121 }
5122 if (relocation & align)
5123 {
5124 /* Incorrect alignment. */
5125 (*_bfd_error_handler)
5126 (_("%B: warning: unaligned access to GOT entry."), input_bfd);
5127 ret = FALSE;
5128 r = bfd_reloc_dangerous;
5129 goto check_reloc;
5130 }
5131 break;
5132
5133 case R_NDS32_SDA16S3_RELA:
5134 case R_NDS32_SDA15S3_RELA:
5135 case R_NDS32_SDA15S3:
5136 align = 0x7;
5137 goto handle_sda;
5138
5139 case R_NDS32_SDA17S2_RELA:
5140 case R_NDS32_SDA15S2_RELA:
5141 case R_NDS32_SDA12S2_SP_RELA:
5142 case R_NDS32_SDA12S2_DP_RELA:
5143 case R_NDS32_SDA15S2:
5144 case R_NDS32_SDA_FP7U2_RELA:
5145 align = 0x3;
5146 goto handle_sda;
5147
5148 case R_NDS32_SDA18S1_RELA:
5149 case R_NDS32_SDA15S1_RELA:
5150 case R_NDS32_SDA15S1:
5151 align = 0x1;
5152 goto handle_sda;
5153
5154 case R_NDS32_SDA19S0_RELA:
5155 case R_NDS32_SDA15S0_RELA:
5156 case R_NDS32_SDA15S0:
5157 {
5158 align = 0x0;
5159handle_sda:
5160 BFD_ASSERT (sec != NULL);
5161
5162 /* If the symbol is in the abs section, the out_bfd will be null.
5163 This happens when the relocation has a symbol@GOTOFF. */
5164 r = nds32_elf_final_sda_base (output_bfd, info, &gp, FALSE);
5165 if (r != bfd_reloc_ok)
5166 {
5167 (*_bfd_error_handler)
5168 (_("%B: warning: relocate SDA_BASE failed."), input_bfd);
5169 ret = FALSE;
5170 goto check_reloc;
5171 }
5172
5173 /* At this point `relocation' contains the object's
5174 address. */
5175 if (r_type == R_NDS32_SDA_FP7U2_RELA)
5176 {
5177 relocation -= fpbase_addr;
5178 }
5179 else
5180 relocation -= gp;
5181 /* Now it contains the offset from _SDA_BASE_. */
5182
5183 /* Make sure alignment is correct. */
5184
5185 if (relocation & align)
5186 {
5187 /* Incorrect alignment. */
5188 (*_bfd_error_handler)
5189 (_("%B(%A): warning: unaligned small data access of type %d."),
5190 input_bfd, input_section, r_type);
5191 ret = FALSE;
5192 goto check_reloc;
5193 }
5194 }
5195
5196 break;
5197 case R_NDS32_17IFC_PCREL_RELA:
5198 case R_NDS32_10IFCU_PCREL_RELA:
5199 /* do nothing */
5200 break;
5201
1c8f6a4d
KLC		 5202 case R_NDS32_TLS_LE_HI20:
5203 case R_NDS32_TLS_LE_LO12:
5204 case R_NDS32_TLS_LE_20:
5205 case R_NDS32_TLS_LE_15S0:
5206 case R_NDS32_TLS_LE_15S1:
5207 case R_NDS32_TLS_LE_15S2:
5208 if (elf_hash_table (info)->tls_sec != NULL)
5209 relocation -= (elf_hash_table (info)->tls_sec->vma + TP_OFFSET);
5210 break;
5211 case R_NDS32_TLS_IE_HI20:
5212 case R_NDS32_TLS_IE_LO12S2:
5213 {
5214 /* Relocation is to the entry for this symbol in the global
5215 offset table. */
5216 unsigned int tls_type;
5217 asection *srelgot;
5218 Elf_Internal_Rela outrel;
5219 bfd_vma off;
5220 bfd_byte *loc;
5221 int indx = 0;
5222
5223 BFD_ASSERT (sgot != NULL);
5224 if (h != NULL)
5225 {
5226 bfd_boolean dyn;
5227
5228 off = h->got.offset;
5229 BFD_ASSERT (off != (bfd_vma) - 1);
5230 dyn = htab->root.dynamic_sections_created;
5231 tls_type = ((struct elf_nds32_link_hash_entry *) h)->tls_type;
5232 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
5233 && (!info->shared
5234 || !SYMBOL_REFERENCES_LOCAL (info, h)))
5235 indx = h->dynindx;
5236 }
5237 else
5238 {
5239 /* Never happen currently. */
5240 BFD_ASSERT (local_got_offsets != NULL
5241 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5242
5243 off = local_got_offsets[r_symndx];
5244
5245 tls_type = elf32_nds32_local_got_tls_type (input_bfd)[r_symndx];
5246 }
5247 relocation = sgot->output_section->vma + sgot->output_offset + off;
5248
5249 if (r_type == R_NDS32_TLS_IE_LO12S2)
5250 break;
5251
5252 /* The offset must always be a multiple of 4. We use
5253 the least significant bit to record whether we have
5254 already processed this entry. */
5255 if ((off & 1) != 0)
5256 off &= ~1;
5257 else
5258 {
5259 bfd_boolean need_relocs = FALSE;
5260 srelgot = htab->srelgot;
5261 if ((info->shared || indx != 0)
5262 && (h == NULL
5263 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
5264 || h->root.type != bfd_link_hash_undefweak))
5265 {
5266 need_relocs = TRUE;
5267 BFD_ASSERT (srelgot != NULL);
5268 }
5269 if (tls_type & GOT_TLS_IE)
5270 {
5271 if (need_relocs)
5272 {
5273 if (h->dynindx == 0)
5274 outrel.r_addend = relocation - dtpoff_base (info);
5275 else
5276 outrel.r_addend = 0;
5277 outrel.r_offset = (sgot->output_section->vma
5278 + sgot->output_offset
5279 + off);
5280 outrel.r_info =
5281 ELF32_R_INFO (h->dynindx, R_NDS32_TLS_TPOFF);
5282
5283 loc = srelgot->contents;
5284 loc +=
5285 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5286 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5287 ++srelgot->reloc_count;
5288 }
5289 else
5290 bfd_put_32 (output_bfd, h->root.u.def.value - TP_OFFSET,
5291 sgot->contents + off);
5292 }
5293 }
5294 }
5295 break;
5296
35c08157
KLC		 5297 /* DON'T fall through. */
5298
5299 default:
5300 /* OLD_NDS32_RELOC. */
5301
5302 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5303 contents, offset, relocation, addend);
5304 goto check_reloc;
5305 }
5306
5307 switch ((int) r_type)
5308 {
5309 case R_NDS32_20_RELA:
5310 case R_NDS32_5_RELA:
5311 case R_NDS32_9_PCREL_RELA:
5312 case R_NDS32_WORD_9_PCREL_RELA:
5313 case R_NDS32_10_UPCREL_RELA:
5314 case R_NDS32_15_PCREL_RELA:
5315 case R_NDS32_17_PCREL_RELA:
5316 case R_NDS32_25_PCREL_RELA:
5317 case R_NDS32_25_ABS_RELA:
5318 case R_NDS32_HI20_RELA:
5319 case R_NDS32_LO12S3_RELA:
5320 case R_NDS32_LO12S2_RELA:
5321 case R_NDS32_LO12S2_DP_RELA:
5322 case R_NDS32_LO12S2_SP_RELA:
5323 case R_NDS32_LO12S1_RELA:
5324 case R_NDS32_LO12S0_RELA:
5325 case R_NDS32_LO12S0_ORI_RELA:
5326 case R_NDS32_SDA16S3_RELA:
5327 case R_NDS32_SDA17S2_RELA:
5328 case R_NDS32_SDA18S1_RELA:
5329 case R_NDS32_SDA19S0_RELA:
5330 case R_NDS32_SDA15S3_RELA:
5331 case R_NDS32_SDA15S2_RELA:
5332 case R_NDS32_SDA12S2_DP_RELA:
5333 case R_NDS32_SDA12S2_SP_RELA:
5334 case R_NDS32_SDA15S1_RELA:
5335 case R_NDS32_SDA15S0_RELA:
5336 case R_NDS32_SDA_FP7U2_RELA:
5337 case R_NDS32_9_PLTREL:
5338 case R_NDS32_25_PLTREL:
5339 case R_NDS32_GOT20:
5340 case R_NDS32_GOT_HI20:
5341 case R_NDS32_GOT_LO12:
5342 case R_NDS32_GOT_LO15:
5343 case R_NDS32_GOT_LO19:
5344 case R_NDS32_GOT15S2_RELA:
5345 case R_NDS32_GOT17S2_RELA:
5346 case R_NDS32_GOTPC20:
5347 case R_NDS32_GOTPC_HI20:
5348 case R_NDS32_GOTPC_LO12:
5349 case R_NDS32_GOTOFF:
5350 case R_NDS32_GOTOFF_HI20:
5351 case R_NDS32_GOTOFF_LO12:
5352 case R_NDS32_GOTOFF_LO15:
5353 case R_NDS32_GOTOFF_LO19:
5354 case R_NDS32_PLTREL_HI20:
5355 case R_NDS32_PLTREL_LO12:
5356 case R_NDS32_PLT_GOTREL_HI20:
5357 case R_NDS32_PLT_GOTREL_LO12:
5358 case R_NDS32_PLT_GOTREL_LO15:
5359 case R_NDS32_PLT_GOTREL_LO19:
5360 case R_NDS32_PLT_GOTREL_LO20:
5361 case R_NDS32_17IFC_PCREL_RELA:
5362 case R_NDS32_10IFCU_PCREL_RELA:
1c8f6a4d
KLC		 5363 case R_NDS32_TLS_LE_HI20:
5364 case R_NDS32_TLS_LE_LO12:
5365 case R_NDS32_TLS_IE_HI20:
5366 case R_NDS32_TLS_IE_LO12S2:
5367 case R_NDS32_TLS_LE_20:
5368 case R_NDS32_TLS_LE_15S0:
5369 case R_NDS32_TLS_LE_15S1:
5370 case R_NDS32_TLS_LE_15S2:
35c08157 5371 /* Instruction related relocs must handle endian properly. */
1c8f6a4d 5372 /* NOTE: PIC IS NOT HANDLE YET; DO IT LATER. */
35c08157
KLC		 5373 r = nds32_elf_final_link_relocate (howto, input_bfd,
5374 input_section, contents,
5375 rel->r_offset, relocation,
5376 rel->r_addend);
5377 break;
5378
5379 default:
5380 /* All other relocs can use default handler. */
5381 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5382 contents, rel->r_offset,
5383 relocation, rel->r_addend);
5384 break;
5385 }
5386
5387check_reloc:
5388
5389 if (r != bfd_reloc_ok)
5390 {
5391 /* FIXME: This should be generic enough to go in a utility. */
5392 const char *name;
5393
5394 if (h != NULL)
5395 name = h->root.root.string;
5396 else
5397 {
5398 name = bfd_elf_string_from_elf_section
5399 (input_bfd, symtab_hdr->sh_link, sym->st_name);
5400 if (name == NULL || *name == '\0')
5401 name = bfd_section_name (input_bfd, sec);
5402 }
5403
5404 if (errmsg != NULL)
5405 goto common_error;
5406
5407 switch (r)
5408 {
5409 case bfd_reloc_overflow:
5410 if (!((*info->callbacks->reloc_overflow)
5411 (info, (h ? &h->root : NULL), name, howto->name,
5412 (bfd_vma) 0, input_bfd, input_section, offset)))
5413 return FALSE;
5414 break;
5415
5416 case bfd_reloc_undefined:
5417 if (!((*info->callbacks->undefined_symbol)
5418 (info, name, input_bfd, input_section, offset, TRUE)))
5419 return FALSE;
5420 break;
5421
5422 case bfd_reloc_outofrange:
5423 errmsg = _("internal error: out of range error");
5424 goto common_error;
5425
5426 case bfd_reloc_notsupported:
5427 errmsg = _("internal error: unsupported relocation error");
5428 goto common_error;
5429
5430 case bfd_reloc_dangerous:
5431 errmsg = _("internal error: dangerous error");
5432 goto common_error;
5433
5434 default:
5435 errmsg = _("internal error: unknown error");
5436 /* Fall through. */
5437
5438common_error:
5439 if (!((*info->callbacks->warning)
5440 (info, errmsg, name, input_bfd, input_section, offset)))
5441 return FALSE;
5442 break;
5443 }
5444 }
5445 }
5446
5447 return ret;
5448}
5449
5450/* Finish up dynamic symbol handling. We set the contents of various
5451 dynamic sections here. */
5452
5453static bfd_boolean
5454nds32_elf_finish_dynamic_symbol (bfd *output_bfd, struct bfd_link_info *info,
5455 struct elf_link_hash_entry *h, Elf_Internal_Sym *sym)
5456{
5457 struct elf_nds32_link_hash_table *htab;
5458 bfd_byte *loc;
5459
5460 htab = nds32_elf_hash_table (info);
5461
5462 if (h->plt.offset != (bfd_vma) - 1)
5463 {
5464 asection *splt;
5465 asection *sgot;
5466 asection *srela;
5467
5468 bfd_vma plt_index;
5469 bfd_vma got_offset;
5470 bfd_vma local_plt_offset;
5471 Elf_Internal_Rela rela;
5472
5473 /* This symbol has an entry in the procedure linkage table. Set
5474 it up. */
5475
5476 BFD_ASSERT (h->dynindx != -1);
5477
5478 splt = htab->splt;
5479 sgot = htab->sgotplt;
5480 srela = htab->srelplt;
5481 BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL);
5482
5483 /* Get the index in the procedure linkage table which
5484 corresponds to this symbol. This is the index of this symbol
5485 in all the symbols for which we are making plt entries. The
5486 first entry in the procedure linkage table is reserved. */
5487 plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1;
5488
5489 /* Get the offset into the .got table of the entry that
5490 corresponds to this function. Each .got entry is 4 bytes.
5491 The first three are reserved. */
5492 got_offset = (plt_index + 3) * 4;
5493
5494 /* Fill in the entry in the procedure linkage table. */
5495 if (!info->shared)
5496 {
5497 unsigned long insn;
5498
5499 insn = PLT_ENTRY_WORD0 + (((sgot->output_section->vma
5500 + sgot->output_offset + got_offset) >> 12)
5501 & 0xfffff);
5502 bfd_putb32 (insn, splt->contents + h->plt.offset);
5503
5504 insn = PLT_ENTRY_WORD1 + (((sgot->output_section->vma
5505 + sgot->output_offset + got_offset) & 0x0fff)
5506 >> 2);
5507 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5508
5509 insn = PLT_ENTRY_WORD2;
5510 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5511
5512 insn = PLT_ENTRY_WORD3 + (plt_index & 0x7ffff);
5513 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5514
5515 insn = PLT_ENTRY_WORD4
5516 + (((unsigned int) ((-(h->plt.offset + 16)) >> 1)) & 0xffffff);
5517 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5518 local_plt_offset = 12;
5519 }
5520 else
5521 {
5522 /* sda_base must be set at this time. */
5523 unsigned long insn;
5524 long offset;
5525
5526 /* FIXME, sda_base is 65536, it will damage opcode. */
5527 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5528 offset = sgot->output_section->vma + sgot->output_offset + got_offset
5529 - elf_gp (output_bfd);
5530 insn = PLT_PIC_ENTRY_WORD0 + ((offset >> 12) & 0xfffff);
5531 bfd_putb32 (insn, splt->contents + h->plt.offset);
5532
5533 insn = PLT_PIC_ENTRY_WORD1 + (offset & 0xfff);
5534 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5535
5536 insn = PLT_PIC_ENTRY_WORD2;
5537 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5538
5539 insn = PLT_PIC_ENTRY_WORD3;
5540 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5541
5542 insn = PLT_PIC_ENTRY_WORD4 + (plt_index & 0x7fffff);
5543 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5544
5545 insn = PLT_PIC_ENTRY_WORD5
5546 + (((unsigned int) ((-(h->plt.offset + 20)) >> 1)) & 0xffffff);
5547 bfd_putb32 (insn, splt->contents + h->plt.offset + 20);
5548
5549 local_plt_offset = 16;
5550 }
5551
5552 /* Fill in the entry in the global offset table,
5553 so it will fall through to the next instruction for the first time. */
5554 bfd_put_32 (output_bfd,
5555 (splt->output_section->vma + splt->output_offset
5556 + h->plt.offset + local_plt_offset),
5557 sgot->contents + got_offset);
5558
5559 /* Fill in the entry in the .rela.plt section. */
5560 rela.r_offset = (sgot->output_section->vma
5561 + sgot->output_offset + got_offset);
5562 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_JMP_SLOT);
5563 rela.r_addend = 0;
5564 loc = srela->contents;
5565 loc += plt_index * sizeof (Elf32_External_Rela);
5566 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5567
5568 if (!h->def_regular)
5569 {
5570 /* Mark the symbol as undefined, rather than as defined in
5571 the .plt section. Leave the value alone. */
5572 sym->st_shndx = SHN_UNDEF;
5573 if (!h->ref_regular_nonweak)
5574 sym->st_value = 0;
5575 }
5576 }
5577
5578 if (h->got.offset != (bfd_vma) - 1)
5579 {
5580 asection *sgot;
5581 asection *srela;
5582 Elf_Internal_Rela rela;
5583
5584 /* This symbol has an entry in the global offset table.
5585 Set it up. */
5586
5587 sgot = htab->sgot;
5588 srela = htab->srelgot;
5589 BFD_ASSERT (sgot != NULL && srela != NULL);
5590
5591 rela.r_offset = (sgot->output_section->vma
5592 + sgot->output_offset + (h->got.offset & ~1));
5593
5594 /* If this is a -Bsymbolic link, and the symbol is defined
5595 locally, we just want to emit a RELATIVE reloc. Likewise if
5596 the symbol was forced to be local because of a version file.
5597 The entry in the global offset table will already have been
5598 initialized in the relocate_section function. */
5599 if (info->shared
5600 && (info->symbolic
5601 || h->dynindx == -1 || h->forced_local) && h->def_regular)
5602 {
5603 rela.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5604 rela.r_addend = (h->root.u.def.value
5605 + h->root.u.def.section->output_section->vma
5606 + h->root.u.def.section->output_offset);
5607 }
5608 else
5609 {
5610 BFD_ASSERT ((h->got.offset & 1) == 0);
5611 bfd_put_32 (output_bfd, (bfd_vma) 0,
5612 sgot->contents + h->got.offset);
5613 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_GLOB_DAT);
5614 rela.r_addend = 0;
5615 }
5616
5617 loc = srela->contents;
5618 loc += srela->reloc_count * sizeof (Elf32_External_Rela);
5619 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5620 ++srela->reloc_count;
5621 }
5622
5623 if (h->needs_copy)
5624 {
5625 asection *s;
5626 Elf_Internal_Rela rela;
5627
5628 /* This symbols needs a copy reloc. Set it up. */
5629
5630 BFD_ASSERT (h->dynindx != -1
5631 && (h->root.type == bfd_link_hash_defined
5632 || h->root.type == bfd_link_hash_defweak));
5633
5634 s = bfd_get_section_by_name (h->root.u.def.section->owner, ".rela.bss");
5635 BFD_ASSERT (s != NULL);
5636
5637 rela.r_offset = (h->root.u.def.value
5638 + h->root.u.def.section->output_section->vma
5639 + h->root.u.def.section->output_offset);
5640 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_COPY);
5641 rela.r_addend = 0;
5642 loc = s->contents;
5643 loc += s->reloc_count * sizeof (Elf32_External_Rela);
5644 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5645 ++s->reloc_count;
5646 }
5647
5648 /* Mark some specially defined symbols as absolute. */
5649 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
5650 || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
5651 sym->st_shndx = SHN_ABS;
5652
5653 return TRUE;
5654}
5655
5656
5657/* Finish up the dynamic sections. */
5658
5659static bfd_boolean
5660nds32_elf_finish_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info)
5661{
5662 struct elf_nds32_link_hash_table *htab;
5663 bfd *dynobj;
5664 asection *sdyn;
5665 asection *sgot;
5666
5667 htab = nds32_elf_hash_table (info);
5668 dynobj = htab->root.dynobj;
5669
5670 sgot = htab->sgotplt;
5671 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
5672
5673 if (htab->root.dynamic_sections_created)
5674 {
5675 asection *splt;
5676 Elf32_External_Dyn *dyncon, *dynconend;
5677
5678 BFD_ASSERT (sgot != NULL && sdyn != NULL);
5679
5680 dyncon = (Elf32_External_Dyn *) sdyn->contents;
5681 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
5682
5683 for (; dyncon < dynconend; dyncon++)
5684 {
5685 Elf_Internal_Dyn dyn;
5686 asection *s;
5687
5688 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
5689
5690 switch (dyn.d_tag)
5691 {
5692 default:
5693 break;
5694
5695 case DT_PLTGOT:
5696 /* name = ".got"; */
5697 s = htab->sgot->output_section;
5698 goto get_vma;
5699 case DT_JMPREL:
5700 s = htab->srelplt->output_section;
5701 get_vma:
5702 BFD_ASSERT (s != NULL);
5703 dyn.d_un.d_ptr = s->vma;
5704 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5705 break;
5706
5707 case DT_PLTRELSZ:
5708 s = htab->srelplt->output_section;
5709 BFD_ASSERT (s != NULL);
5710 dyn.d_un.d_val = s->size;
5711 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5712 break;
5713
5714 case DT_RELASZ:
5715 /* My reading of the SVR4 ABI indicates that the
5716 procedure linkage table relocs (DT_JMPREL) should be
5717 included in the overall relocs (DT_RELA). This is
5718 what Solaris does. However, UnixWare can not handle
5719 that case. Therefore, we override the DT_RELASZ entry
5720 here to make it not include the JMPREL relocs. Since
5721 the linker script arranges for .rela.plt to follow all
5722 other relocation sections, we don't have to worry
5723 about changing the DT_RELA entry. */
5724 if (htab->srelplt != NULL)
5725 {
5726 s = htab->srelplt->output_section;
5727 dyn.d_un.d_val -= s->size;
5728 }
5729 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5730 break;
5731 }
5732 }
5733
5734 /* Fill in the first entry in the procedure linkage table. */
5735 splt = htab->splt;
5736 if (splt && splt->size > 0)
5737 {
5738 if (info->shared)
5739 {
5740 unsigned long insn;
5741 long offset;
5742
5743 /* FIXME, sda_base is 65536, it will damage opcode. */
5744 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5745 offset = sgot->output_section->vma + sgot->output_offset + 4
5746 - elf_gp (output_bfd);
5747 insn = PLT0_PIC_ENTRY_WORD0 | ((offset >> 12) & 0xfffff);
5748 bfd_putb32 (insn, splt->contents);
5749
5750 /* insn = PLT0_PIC_ENTRY_WORD0 | (((8 - sda_base) >> 2) & 0x7fff) ; */
5751 /* here has a typo? */
5752 insn = PLT0_PIC_ENTRY_WORD1 | (offset & 0xfff);
5753 bfd_putb32 (insn, splt->contents + 4);
5754
5755 insn = PLT0_PIC_ENTRY_WORD2;
5756 bfd_putb32 (insn, splt->contents + 8);
5757
5758 insn = PLT0_PIC_ENTRY_WORD3;
5759 bfd_putb32 (insn, splt->contents + 12);
5760
5761 insn = PLT0_PIC_ENTRY_WORD4;
5762 bfd_putb32 (insn, splt->contents + 16);
5763
5764 insn = PLT0_PIC_ENTRY_WORD5;
5765 bfd_putb32 (insn, splt->contents + 20);
5766 }
5767 else
5768 {
5769 unsigned long insn;
5770 unsigned long addr;
5771
5772 /* addr = .got + 4 */
5773 addr = sgot->output_section->vma + sgot->output_offset + 4;
5774 insn = PLT0_ENTRY_WORD0 | ((addr >> 12) & 0xfffff);
5775 bfd_putb32 (insn, splt->contents);
5776
5777 insn = PLT0_ENTRY_WORD1 | (addr & 0x0fff);
5778 bfd_putb32 (insn, splt->contents + 4);
5779
5780 insn = PLT0_ENTRY_WORD2;
5781 bfd_putb32 (insn, splt->contents + 8);
5782
5783 insn = PLT0_ENTRY_WORD3;
5784 bfd_putb32 (insn, splt->contents + 12);
5785
5786 insn = PLT0_ENTRY_WORD4;
5787 bfd_putb32 (insn, splt->contents + 16);
5788 }
5789
5790 elf_section_data (splt->output_section)->this_hdr.sh_entsize =
5791 PLT_ENTRY_SIZE;
5792 }
5793 }
5794
5795 /* Fill in the first three entries in the global offset table. */
5796 if (sgot && sgot->size > 0)
5797 {
5798 if (sdyn == NULL)
5799 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
5800 else
5801 bfd_put_32 (output_bfd,
5802 sdyn->output_section->vma + sdyn->output_offset,
5803 sgot->contents);
5804 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
5805 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
5806
5807 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
5808 }
5809
5810 return TRUE;
5811}
5812\f
5813
5814/* Set the right machine number. */
5815
5816static bfd_boolean
5817nds32_elf_object_p (bfd *abfd)
5818{
5819 static unsigned int cur_arch = 0;
5820
5821 if (E_N1_ARCH != (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH))
5822 {
5823 /* E_N1_ARCH is a wild card, so it is set only when no others exist. */
5824 cur_arch = (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH);
5825 }
5826
5827 switch (cur_arch)
5828 {
5829 default:
5830 case E_N1_ARCH:
5831 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1);
5832 break;
5833 case E_N1H_ARCH:
5834 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h);
5835 break;
5836 case E_NDS_ARCH_STAR_V2_0:
5837 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v2);
5838 break;
5839 case E_NDS_ARCH_STAR_V3_0:
5840 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3);
5841 break;
5842 case E_NDS_ARCH_STAR_V3_M:
5843 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3m);
5844 break;
5845 }
5846
5847 return TRUE;
5848}
5849
5850/* Store the machine number in the flags field. */
5851
5852static void
5853nds32_elf_final_write_processing (bfd *abfd,
5854 bfd_boolean linker ATTRIBUTE_UNUSED)
5855{
5856 unsigned long val;
5857 static unsigned int cur_mach = 0;
5858
5859 if (bfd_mach_n1 != bfd_get_mach (abfd))
5860 {
5861 cur_mach = bfd_get_mach (abfd);
5862 }
5863
5864 switch (cur_mach)
5865 {
5866 case bfd_mach_n1:
5867 /* Only happen when object is empty, since the case is abandon. */
5868 val = E_N1_ARCH;
5869 val |= E_NDS_ABI_AABI;
5870 val |= E_NDS32_ELF_VER_1_4;
5871 break;
5872 case bfd_mach_n1h:
5873 val = E_N1H_ARCH;
5874 break;
5875 case bfd_mach_n1h_v2:
5876 val = E_NDS_ARCH_STAR_V2_0;
5877 break;
5878 case bfd_mach_n1h_v3:
5879 val = E_NDS_ARCH_STAR_V3_0;
5880 break;
5881 case bfd_mach_n1h_v3m:
5882 val = E_NDS_ARCH_STAR_V3_M;
5883 break;
5884 default:
5885 val = 0;
5886 break;
5887 }
5888
5889 elf_elfheader (abfd)->e_flags &= ~EF_NDS_ARCH;
5890 elf_elfheader (abfd)->e_flags |= val;
5891}
5892
5893/* Function to keep NDS32 specific file flags. */
5894
5895static bfd_boolean
5896nds32_elf_set_private_flags (bfd *abfd, flagword flags)
5897{
5898 BFD_ASSERT (!elf_flags_init (abfd)
5899 || elf_elfheader (abfd)->e_flags == flags);
5900
5901 elf_elfheader (abfd)->e_flags = flags;
5902 elf_flags_init (abfd) = TRUE;
5903 return TRUE;
5904}
5905
5906static unsigned int
5907convert_e_flags (unsigned int e_flags, unsigned int arch)
5908{
5909 if ((e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9)
5910 {
5911 /* From 0.9 to 1.0. */
5912 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V1_0;
5913
5914 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5915 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5916 if (arch == E_NDS_ARCH_STAR_V1_0)
5917 {
5918 /* Done. */
5919 return e_flags;
5920 }
5921 }
5922
5923 /* From 1.0 to 2.0. */
5924 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V2_0;
5925
5926 /* Clear E_NDS32_HAS_MFUSR_PC_INST. */
5927 e_flags &= ~E_NDS32_HAS_MFUSR_PC_INST;
5928
5929 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5930 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5931 return e_flags;
5932}
5933
5934static bfd_boolean
5935nds32_check_vec_size (bfd *ibfd)
5936{
5937 static unsigned int nds32_vec_size = 0;
5938
5939 asection *sec_t = NULL;
5940 bfd_byte *contents = NULL;
5941
5942 sec_t = bfd_get_section_by_name (ibfd, ".nds32_e_flags");
5943
5944 if (sec_t && sec_t->size >= 4)
5945 {
5946 /* Get vec_size in file. */
5947 unsigned int flag_t;
5948
5949 nds32_get_section_contents (ibfd, sec_t, &contents);
5950 flag_t = bfd_get_32 (ibfd, contents);
5951
5952 /* The value could only be 4 or 16. */
5953
5954 if (!nds32_vec_size)
5955 /* Set if not set yet. */
5956 nds32_vec_size = (flag_t & 0x3);
5957 else if (nds32_vec_size != (flag_t & 0x3))
5958 {
5959 (*_bfd_error_handler) (_("%B: ISR vector size mismatch"
5960 " with previous modules, previous %u-byte, current %u-byte"),
5961 ibfd,
5962 nds32_vec_size == 1 ? 4 : nds32_vec_size == 2 ? 16 : 0xffffffff,
5963 (flag_t & 0x3) == 1 ? 4 : (flag_t & 0x3) == 2 ? 16 : 0xffffffff);
5964 return FALSE;
5965 }
5966 else
5967 /* Only keep the first vec_size section. */
5968 sec_t->flags |= SEC_EXCLUDE;
5969 }
5970
5971 return TRUE;
5972}
5973
5974/* Merge backend specific data from an object file to the output
5975 object file when linking. */
5976
5977static bfd_boolean
5978nds32_elf_merge_private_bfd_data (bfd *ibfd, bfd *obfd)
5979{
5980 flagword out_flags;
5981 flagword in_flags;
5982 flagword out_16regs;
5983 flagword in_no_mac;
5984 flagword out_no_mac;
5985 flagword in_16regs;
5986 flagword out_version;
5987 flagword in_version;
5988 flagword out_fpu_config;
5989 flagword in_fpu_config;
5990
5991 /* TODO: Revise to use object-attributes instead. */
5992 if (!nds32_check_vec_size (ibfd))
5993 return FALSE;
5994
5995 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
5996 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
5997 return TRUE;
5998
5999 if (bfd_little_endian (ibfd) != bfd_little_endian (obfd))
6000 {
6001 (*_bfd_error_handler)
6002 (_("%B: warning: Endian mismatch with previous modules."), ibfd);
6003
6004 bfd_set_error (bfd_error_bad_value);
6005 return FALSE;
6006 }
6007
6008 in_version = elf_elfheader (ibfd)->e_flags & EF_NDS32_ELF_VERSION;
6009 if (in_version == E_NDS32_ELF_VER_1_2)
6010 {
6011 (*_bfd_error_handler)
6012 (_("%B: warning: Older version of object file encountered, "
6013 "Please recompile with current tool chain."), ibfd);
6014 }
6015
6016 /* We may need to merge V1 and V2 arch object files to V2. */
6017 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6018 != (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
6019 {
6020 /* Need to convert version. */
6021 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6022 == E_NDS_ARCH_STAR_RESERVED)
6023 {
6024 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
6025 }
6026 else if ((elf_elfheader (obfd)->e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9
6027 || (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6028 > (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
6029 {
6030 elf_elfheader (obfd)->e_flags =
6031 convert_e_flags (elf_elfheader (obfd)->e_flags,
6032 (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH));
6033 }
6034 else
6035 {
6036 elf_elfheader (ibfd)->e_flags =
6037 convert_e_flags (elf_elfheader (ibfd)->e_flags,
6038 (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH));
6039 }
6040 }
6041
6042 /* Extract some flags. */
6043 in_flags = elf_elfheader (ibfd)->e_flags
6044 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6045 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6046
6047 /* The following flags need special treatment. */
6048 in_16regs = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6049 in_no_mac = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6050 in_fpu_config = elf_elfheader (ibfd)->e_flags & E_NDS32_FPU_REG_CONF;
6051
6052 /* Extract some flags. */
6053 out_flags = elf_elfheader (obfd)->e_flags
6054 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6055 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6056
6057 /* The following flags need special treatment. */
6058 out_16regs = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6059 out_no_mac = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6060 out_fpu_config = elf_elfheader (obfd)->e_flags & E_NDS32_FPU_REG_CONF;
6061 out_version = elf_elfheader (obfd)->e_flags & EF_NDS32_ELF_VERSION;
6062 if (!elf_flags_init (obfd))
6063 {
6064 /* If the input is the default architecture then do not
6065 bother setting the flags for the output architecture,
6066 instead allow future merges to do this. If no future
6067 merges ever set these flags then they will retain their
6068 unitialised values, which surprise surprise, correspond
6069 to the default values. */
6070 if (bfd_get_arch_info (ibfd)->the_default)
6071 return TRUE;
6072
6073 elf_flags_init (obfd) = TRUE;
6074 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
6075
6076 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
6077 && bfd_get_arch_info (obfd)->the_default)
6078 {
6079 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
6080 bfd_get_mach (ibfd));
6081 }
6082
6083 return TRUE;
6084 }
6085
6086 /* Check flag compatibility. */
6087 if ((in_flags & EF_NDS_ABI) != (out_flags & EF_NDS_ABI))
6088 {
6089 (*_bfd_error_handler)
6090 (_("%B: error: ABI mismatch with previous modules."), ibfd);
6091
6092 bfd_set_error (bfd_error_bad_value);
6093 return FALSE;
6094 }
6095
6096 if ((in_flags & EF_NDS_ARCH) != (out_flags & EF_NDS_ARCH))
6097 {
6098 if (((in_flags & EF_NDS_ARCH) != E_N1_ARCH))
6099 {
6100 (*_bfd_error_handler)
6101 (_("%B: error: Instruction set mismatch with previous modules."), ibfd);
6102
6103 bfd_set_error (bfd_error_bad_value);
6104 return FALSE;
6105 }
6106 }
6107
6108 /* When linking with V1.2 and V1.3 objects together the output is V1.2.
6109 and perf ext1 and DIV are mergerd to perf ext1. */
6110 if (in_version == E_NDS32_ELF_VER_1_2 || out_version == E_NDS32_ELF_VER_1_2)
6111 {
6112 elf_elfheader (obfd)->e_flags =
6113 (in_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6114 | (out_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6115 | (((in_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6116 ? E_NDS32_HAS_EXT_INST : 0)
6117 | (((out_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6118 ? E_NDS32_HAS_EXT_INST : 0)
6119 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6120 | ((in_version > out_version) ? out_version : in_version);
6121 }
6122 else
6123 {
6124 if (in_version != out_version)
6125 (*_bfd_error_handler) (_("%B: warning: Incompatible elf-versions %s and %s."),
6126 ibfd, nds32_elfver_strtab[out_version],
6127 nds32_elfver_strtab[in_version]);
6128
6129 elf_elfheader (obfd)->e_flags = in_flags | out_flags
6130 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6131 | (in_fpu_config > out_fpu_config ? in_fpu_config : out_fpu_config)
6132 | (in_version > out_version ? out_version : in_version);
6133 }
6134
6135 return TRUE;
6136}
6137
6138/* Display the flags field. */
6139
6140static bfd_boolean
6141nds32_elf_print_private_bfd_data (bfd *abfd, void *ptr)
6142{
6143 FILE *file = (FILE *) ptr;
6144
6145 BFD_ASSERT (abfd != NULL && ptr != NULL);
6146
6147 _bfd_elf_print_private_bfd_data (abfd, ptr);
6148
6149 fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
6150
6151 switch (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH)
6152 {
6153 default:
6154 case E_N1_ARCH:
6155 fprintf (file, _(": n1 instructions"));
6156 break;
6157 case E_N1H_ARCH:
6158 fprintf (file, _(": n1h instructions"));
6159 break;
6160 }
6161
6162 fputc ('\n', file);
6163
6164 return TRUE;
6165}
6166
6167static unsigned int
6168nds32_elf_action_discarded (asection *sec)
6169{
6170
6171 if (strncmp
6172 (".gcc_except_table", sec->name, sizeof (".gcc_except_table") - 1) == 0)
6173 return 0;
6174
6175 return _bfd_elf_default_action_discarded (sec);
6176}
6177
6178static asection *
6179nds32_elf_gc_mark_hook (asection *sec, struct bfd_link_info *info,
6180 Elf_Internal_Rela *rel, struct elf_link_hash_entry *h,
6181 Elf_Internal_Sym *sym)
6182{
6183 if (h != NULL)
6184 switch (ELF32_R_TYPE (rel->r_info))
6185 {
6186 case R_NDS32_GNU_VTINHERIT:
6187 case R_NDS32_GNU_VTENTRY:
6188 case R_NDS32_RELA_GNU_VTINHERIT:
6189 case R_NDS32_RELA_GNU_VTENTRY:
6190 return NULL;
6191 }
6192
6193 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
6194}
6195
6196static bfd_boolean
6197nds32_elf_gc_sweep_hook (bfd *abfd, struct bfd_link_info *info, asection *sec,
6198 const Elf_Internal_Rela *relocs)
6199{
6200 /* Update the got entry reference counts for the section being removed. */
6201 Elf_Internal_Shdr *symtab_hdr;
6202 struct elf_link_hash_entry **sym_hashes;
6203 bfd_signed_vma *local_got_refcounts;
6204 const Elf_Internal_Rela *rel, *relend;
6205
6206 elf_section_data (sec)->local_dynrel = NULL;
6207
6208 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6209 sym_hashes = elf_sym_hashes (abfd);
6210 local_got_refcounts = elf_local_got_refcounts (abfd);
6211
6212 relend = relocs + sec->reloc_count;
6213 for (rel = relocs; rel < relend; rel++)
6214 {
6215 unsigned long r_symndx;
6216 struct elf_link_hash_entry *h = NULL;
6217
6218 r_symndx = ELF32_R_SYM (rel->r_info);
6219 if (r_symndx >= symtab_hdr->sh_info)
6220 {
6221 /* External symbol. */
6222 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6223 while (h->root.type == bfd_link_hash_indirect
6224 || h->root.type == bfd_link_hash_warning)
6225 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6226 }
6227
6228 switch (ELF32_R_TYPE (rel->r_info))
6229 {
6230 case R_NDS32_GOT_HI20:
6231 case R_NDS32_GOT_LO12:
6232 case R_NDS32_GOT_LO15:
6233 case R_NDS32_GOT_LO19:
6234 case R_NDS32_GOT17S2_RELA:
6235 case R_NDS32_GOT15S2_RELA:
6236 case R_NDS32_GOTOFF:
6237 case R_NDS32_GOTOFF_HI20:
6238 case R_NDS32_GOTOFF_LO12:
6239 case R_NDS32_GOTOFF_LO15:
6240 case R_NDS32_GOTOFF_LO19:
6241 case R_NDS32_GOT20:
6242 case R_NDS32_GOTPC_HI20:
6243 case R_NDS32_GOTPC_LO12:
6244 case R_NDS32_GOTPC20:
6245 if (h != NULL)
6246 {
6247 if (h->got.refcount > 0)
6248 h->got.refcount--;
6249 }
6250 else
6251 {
6252 if (local_got_refcounts && local_got_refcounts[r_symndx] > 0)
6253 local_got_refcounts[r_symndx]--;
6254 }
6255 break;
6256
6257 case R_NDS32_16_RELA:
6258 case R_NDS32_20_RELA:
6259 case R_NDS32_5_RELA:
6260 case R_NDS32_32_RELA:
6261 case R_NDS32_HI20_RELA:
6262 case R_NDS32_LO12S3_RELA:
6263 case R_NDS32_LO12S2_RELA:
6264 case R_NDS32_LO12S2_DP_RELA:
6265 case R_NDS32_LO12S2_SP_RELA:
6266 case R_NDS32_LO12S1_RELA:
6267 case R_NDS32_LO12S0_RELA:
6268 case R_NDS32_LO12S0_ORI_RELA:
6269 case R_NDS32_SDA16S3_RELA:
6270 case R_NDS32_SDA17S2_RELA:
6271 case R_NDS32_SDA18S1_RELA:
6272 case R_NDS32_SDA19S0_RELA:
6273 case R_NDS32_SDA15S3_RELA:
6274 case R_NDS32_SDA15S2_RELA:
6275 case R_NDS32_SDA12S2_DP_RELA:
6276 case R_NDS32_SDA12S2_SP_RELA:
6277 case R_NDS32_SDA15S1_RELA:
6278 case R_NDS32_SDA15S0_RELA:
6279 case R_NDS32_SDA_FP7U2_RELA:
6280 case R_NDS32_15_PCREL_RELA:
6281 case R_NDS32_17_PCREL_RELA:
6282 case R_NDS32_25_PCREL_RELA:
6283 if (h != NULL)
6284 {
6285 struct elf_nds32_link_hash_entry *eh;
6286 struct elf_nds32_dyn_relocs **pp;
6287 struct elf_nds32_dyn_relocs *p;
6288
6289 if (!info->shared && h->plt.refcount > 0)
6290 h->plt.refcount -= 1;
6291
6292 eh = (struct elf_nds32_link_hash_entry *) h;
6293
6294 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; pp = &p->next)
6295 if (p->sec == sec)
6296 {
6297 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6298 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA
6299 || ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA)
6300 p->pc_count -= 1;
6301 p->count -= 1;
6302 if (p->count == 0)
6303 *pp = p->next;
6304 break;
6305 }
6306 }
6307 break;
6308
6309 case R_NDS32_9_PLTREL:
6310 case R_NDS32_25_PLTREL:
6311 if (h != NULL)
6312 {
6313 if (h->plt.refcount > 0)
6314 h->plt.refcount--;
6315 }
6316 break;
6317
6318 default:
6319 break;
6320 }
6321 }
6322
6323 return TRUE;
6324}
6325
6326/* Look through the relocs for a section during the first phase.
6327 Since we don't do .gots or .plts, we just need to consider the
6328 virtual table relocs for gc. */
6329
6330static bfd_boolean
6331nds32_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
6332 asection *sec, const Elf_Internal_Rela *relocs)
6333{
6334 Elf_Internal_Shdr *symtab_hdr;
6335 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
6336 const Elf_Internal_Rela *rel;
6337 const Elf_Internal_Rela *rel_end;
6338 struct elf_nds32_link_hash_table *htab;
6339 bfd *dynobj;
6340 asection *sreloc = NULL;
6341
6342 if (info->relocatable)
6343 return TRUE;
6344
6345 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6346 sym_hashes = elf_sym_hashes (abfd);
6347 sym_hashes_end =
6348 sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
6349 if (!elf_bad_symtab (abfd))
6350 sym_hashes_end -= symtab_hdr->sh_info;
6351
6352 htab = nds32_elf_hash_table (info);
6353 dynobj = htab->root.dynobj;
6354
6355 rel_end = relocs + sec->reloc_count;
6356 for (rel = relocs; rel < rel_end; rel++)
6357 {
6358 enum elf_nds32_reloc_type r_type;
6359 struct elf_link_hash_entry *h;
6360 unsigned long r_symndx;
1c8f6a4d 6361 int tls_type, old_tls_type;
35c08157
KLC		 6362
6363 r_symndx = ELF32_R_SYM (rel->r_info);
6364 r_type = ELF32_R_TYPE (rel->r_info);
6365 if (r_symndx < symtab_hdr->sh_info)
6366 h = NULL;
6367 else
6368 {
6369 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6370 while (h->root.type == bfd_link_hash_indirect
6371 || h->root.type == bfd_link_hash_warning)
6372 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6373 }
6374
1c8f6a4d
KLC		 6375 /* Some relocs require a global offset table. We create
6376 got section here, since these relocation need got section
6377 and it is not created yet. */
35c08157
KLC		 6378 if (htab->sgot == NULL)
6379 {
6380 switch (r_type)
6381 {
6382 case R_NDS32_GOT_HI20:
6383 case R_NDS32_GOT_LO12:
6384 case R_NDS32_GOT_LO15:
6385 case R_NDS32_GOT_LO19:
6386 case R_NDS32_GOT17S2_RELA:
6387 case R_NDS32_GOT15S2_RELA:
6388 case R_NDS32_GOTOFF:
6389 case R_NDS32_GOTOFF_HI20:
6390 case R_NDS32_GOTOFF_LO12:
6391 case R_NDS32_GOTOFF_LO15:
6392 case R_NDS32_GOTOFF_LO19:
6393 case R_NDS32_GOTPC20:
6394 case R_NDS32_GOTPC_HI20:
6395 case R_NDS32_GOTPC_LO12:
6396 case R_NDS32_GOT20:
1c8f6a4d
KLC		 6397 case R_NDS32_TLS_IE_HI20:
6398 case R_NDS32_TLS_IE_LO12S2:
35c08157
KLC		 6399 if (dynobj == NULL)
6400 htab->root.dynobj = dynobj = abfd;
6401 if (!create_got_section (dynobj, info))
6402 return FALSE;
6403 break;
6404
6405 default:
6406 break;
6407 }
6408 }
6409
6410 switch ((int) r_type)
6411 {
6412 case R_NDS32_GOT_HI20:
6413 case R_NDS32_GOT_LO12:
6414 case R_NDS32_GOT_LO15:
6415 case R_NDS32_GOT_LO19:
6416 case R_NDS32_GOT20:
1c8f6a4d
KLC		 6417 case R_NDS32_TLS_IE_HI20:
6418 case R_NDS32_TLS_IE_LO12S2:
6419 switch (r_type)
6420 {
6421 case R_NDS32_TLS_IE_HI20:
6422 case R_NDS32_TLS_IE_LO12S2:
6423 tls_type = GOT_TLS_IE;
6424 break;
6425 default:
6426 tls_type = GOT_NORMAL;
6427 break;
6428 }
35c08157 6429 if (h != NULL)
1c8f6a4d
KLC		 6430 {
6431 old_tls_type = elf32_nds32_hash_entry (h)->tls_type;
6432 h->got.refcount += 1;
6433 }
35c08157
KLC		 6434 else
6435 {
6436 bfd_signed_vma *local_got_refcounts;
6437
6438 /* This is a global offset table entry for a local
6439 symbol. */
6440 local_got_refcounts = elf_local_got_refcounts (abfd);
6441 if (local_got_refcounts == NULL)
6442 {
6443 bfd_size_type size;
6444
6445 size = symtab_hdr->sh_info;
6446 size *= sizeof (bfd_signed_vma);
6447 local_got_refcounts = (bfd_signed_vma *) bfd_zalloc (abfd, size);
6448 if (local_got_refcounts == NULL)
6449 return FALSE;
6450 elf_local_got_refcounts (abfd) = local_got_refcounts;
6451 }
6452 local_got_refcounts[r_symndx] += 1;
1c8f6a4d 6453 old_tls_type = elf32_nds32_local_got_tls_type (abfd)[r_symndx];
35c08157 6454 }
35c08157 6455
1c8f6a4d
KLC		 6456 /* We will already have issued an error message if there
6457 is a TLS/non-TLS mismatch, based on the symbol
6458 type. So just combine any TLS types needed. */
6459 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
6460 && tls_type != GOT_NORMAL)
6461 tls_type |= old_tls_type;
6462
6463 if (old_tls_type != tls_type)
6464 {
6465 if (h != NULL)
6466 elf32_nds32_hash_entry (h)->tls_type = tls_type;
6467 else
6468 elf32_nds32_local_got_tls_type (abfd)[r_symndx] = tls_type;
6469 }
6470 break;
6471 case R_NDS32_9_PLTREL:
35c08157
KLC		 6472 case R_NDS32_25_PLTREL:
6473 case R_NDS32_PLTREL_HI20:
6474 case R_NDS32_PLTREL_LO12:
6475 case R_NDS32_PLT_GOTREL_HI20:
6476 case R_NDS32_PLT_GOTREL_LO12:
6477 case R_NDS32_PLT_GOTREL_LO15:
6478 case R_NDS32_PLT_GOTREL_LO19:
6479 case R_NDS32_PLT_GOTREL_LO20:
6480
6481 /* This symbol requires a procedure linkage table entry. We
6482 actually build the entry in adjust_dynamic_symbol,
6483 because this might be a case of linking PIC code without
6484 linking in any dynamic objects, in which case we don't
6485 need to generate a procedure linkage table after all. */
6486
6487 /* If this is a local symbol, we resolve it directly without
6488 creating a procedure linkage table entry. */
6489 if (h == NULL)
6490 continue;
6491
6492 if (h->forced_local)
6493 break;
6494
1c8f6a4d 6495 elf32_nds32_hash_entry (h)->tls_type = GOT_NORMAL;
35c08157
KLC		 6496 h->needs_plt = 1;
6497 h->plt.refcount += 1;
6498 break;
6499
6500 case R_NDS32_16_RELA:
6501 case R_NDS32_20_RELA:
6502 case R_NDS32_5_RELA:
6503 case R_NDS32_32_RELA:
6504 case R_NDS32_HI20_RELA:
6505 case R_NDS32_LO12S3_RELA:
6506 case R_NDS32_LO12S2_RELA:
6507 case R_NDS32_LO12S2_DP_RELA:
6508 case R_NDS32_LO12S2_SP_RELA:
6509 case R_NDS32_LO12S1_RELA:
6510 case R_NDS32_LO12S0_RELA:
6511 case R_NDS32_LO12S0_ORI_RELA:
6512 case R_NDS32_SDA16S3_RELA:
6513 case R_NDS32_SDA17S2_RELA:
6514 case R_NDS32_SDA18S1_RELA:
6515 case R_NDS32_SDA19S0_RELA:
6516 case R_NDS32_SDA15S3_RELA:
6517 case R_NDS32_SDA15S2_RELA:
6518 case R_NDS32_SDA12S2_DP_RELA:
6519 case R_NDS32_SDA12S2_SP_RELA:
6520 case R_NDS32_SDA15S1_RELA:
6521 case R_NDS32_SDA15S0_RELA:
6522 case R_NDS32_SDA_FP7U2_RELA:
6523 case R_NDS32_15_PCREL_RELA:
6524 case R_NDS32_17_PCREL_RELA:
6525 case R_NDS32_25_PCREL_RELA:
6526
6527 if (h != NULL && !info->shared)
6528 {
6529 h->non_got_ref = 1;
6530 h->plt.refcount += 1;
6531 }
6532
6533 /* If we are creating a shared library, and this is a reloc against
6534 a global symbol, or a non PC relative reloc against a local
6535 symbol, then we need to copy the reloc into the shared library.
6536 However, if we are linking with -Bsymbolic, we do not need to
6537 copy a reloc against a global symbol which is defined in an
6538 object we are including in the link (i.e., DEF_REGULAR is set).
6539 At this point we have not seen all the input files, so it is
6540 possible that DEF_REGULAR is not set now but will be set later
6541 (it is never cleared). We account for that possibility below by
6542 storing information in the dyn_relocs field of the hash table
6543 entry. A similar situation occurs when creating shared libraries
6544 and symbol visibility changes render the symbol local.
6545
6546 If on the other hand, we are creating an executable, we may need
6547 to keep relocations for symbols satisfied by a dynamic library
6548 if we manage to avoid copy relocs for the symbol. */
6549 if ((info->shared
6550 && (sec->flags & SEC_ALLOC) != 0
6551 && ((r_type != R_NDS32_25_PCREL_RELA
6552 && r_type != R_NDS32_15_PCREL_RELA
6553 && r_type != R_NDS32_17_PCREL_RELA
6554 && !(r_type == R_NDS32_32_RELA
6555 && strcmp (sec->name, ".eh_frame") == 0))
6556 || (h != NULL
6557 && (!info->symbolic
6558 || h->root.type == bfd_link_hash_defweak
6559 || !h->def_regular))))
6560 || (!info->shared
6561 && (sec->flags & SEC_ALLOC) != 0
6562 && h != NULL
6563 && (h->root.type == bfd_link_hash_defweak
6564 || !h->def_regular)))
6565 {
6566 struct elf_nds32_dyn_relocs *p;
6567 struct elf_nds32_dyn_relocs **head;
6568
6569 if (dynobj == NULL)
6570 htab->root.dynobj = dynobj = abfd;
6571
6572 /* When creating a shared object, we must copy these
6573 relocs into the output file. We create a reloc
6574 section in dynobj and make room for the reloc. */
6575 if (sreloc == NULL)
6576 {
6577 const char *name;
6578
6579 name = bfd_elf_string_from_elf_section
6580 (abfd, elf_elfheader (abfd)->e_shstrndx,
6581 elf_section_data (sec)->rela.hdr->sh_name);
6582 if (name == NULL)
6583 return FALSE;
6584
6585 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
6586 && strcmp (bfd_get_section_name (abfd, sec),
6587 name + 5) == 0);
6588
6589 sreloc = bfd_get_section_by_name (dynobj, name);
6590 if (sreloc == NULL)
6591 {
6592 flagword flags;
6593
6594 sreloc = bfd_make_section (dynobj, name);
6595 flags = (SEC_HAS_CONTENTS | SEC_READONLY
6596 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
6597 if ((sec->flags & SEC_ALLOC) != 0)
6598 flags |= SEC_ALLOC | SEC_LOAD;
6599 if (sreloc == NULL
6600 || !bfd_set_section_flags (dynobj, sreloc, flags)
6601 || !bfd_set_section_alignment (dynobj, sreloc, 2))
6602 return FALSE;
6603
6604 elf_section_type (sreloc) = SHT_RELA;
6605 }
6606 elf_section_data (sec)->sreloc = sreloc;
6607 }
6608
6609 /* If this is a global symbol, we count the number of
6610 relocations we need for this symbol. */
6611 if (h != NULL)
6612 head = &((struct elf_nds32_link_hash_entry *) h)->dyn_relocs;
6613 else
6614 {
6615 asection *s;
6616
6617 Elf_Internal_Sym *isym;
6618 isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, r_symndx);
6619 if (isym == NULL)
6620 return FALSE;
6621
6622 /* Track dynamic relocs needed for local syms too. */
6623 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
6624 if (s == NULL)
6625 return FALSE;
6626
6627 head = ((struct elf_nds32_dyn_relocs **)
6628 &elf_section_data (s)->local_dynrel);
6629 }
6630
6631 p = *head;
6632 if (p == NULL || p->sec != sec)
6633 {
6634 bfd_size_type amt = sizeof (*p);
6635 p = (struct elf_nds32_dyn_relocs *) bfd_alloc (dynobj, amt);
6636 if (p == NULL)
6637 return FALSE;
6638 p->next = *head;
6639 *head = p;
6640 p->sec = sec;
6641 p->count = 0;
6642 p->pc_count = 0;
6643 }
6644
6645 p->count += 1;
6646 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA
6647 || ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6648 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA)
6649 p->pc_count += 1;
6650 }
6651 break;
6652
6653 /* This relocation describes the C++ object vtable hierarchy.
6654 Reconstruct it for later use during GC. */
6655 case R_NDS32_RELA_GNU_VTINHERIT:
6656 case R_NDS32_GNU_VTINHERIT:
6657 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
6658 return FALSE;
6659 break;
6660
6661 /* This relocation describes which C++ vtable entries are actually
6662 used. Record for later use during GC. */
6663 case R_NDS32_GNU_VTENTRY:
6664 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
6665 return FALSE;
6666 break;
6667 case R_NDS32_RELA_GNU_VTENTRY:
6668 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
6669 return FALSE;
6670 break;
6671 }
6672 }
6673
6674 return TRUE;
6675}
6676
6677/* Write VAL in uleb128 format to P, returning a pointer to the
6678 following byte.
6679 This code is copied from elf-attr.c. */
6680
6681static bfd_byte *
6682write_uleb128 (bfd_byte *p, unsigned int val)
6683{
6684 bfd_byte c;
6685 do
6686 {
6687 c = val & 0x7f;
6688 val >>= 7;
6689 if (val)
6690 c |= 0x80;
6691 *(p++) = c;
6692 }
6693 while (val);
6694 return p;
6695}
6696
6697static bfd_signed_vma
6698calculate_offset (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
6699 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr,
6700 int *pic_ext_target)
6701{
6702 bfd_signed_vma foff;
6703 bfd_vma symval, addend;
6704 asection *sym_sec;
6705
6706 /* Get the value of the symbol referred to by the reloc. */
6707 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6708 {
6709 Elf_Internal_Sym *isym;
6710
6711 /* A local symbol. */
6712 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6713
6714 if (isym->st_shndx == SHN_UNDEF)
6715 sym_sec = bfd_und_section_ptr;
6716 else if (isym->st_shndx == SHN_ABS)
6717 sym_sec = bfd_abs_section_ptr;
6718 else if (isym->st_shndx == SHN_COMMON)
6719 sym_sec = bfd_com_section_ptr;
6720 else
6721 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6722 symval = isym->st_value + sym_sec->output_section->vma
6723 + sym_sec->output_offset;
6724 }
6725 else
6726 {
6727 unsigned long indx;
6728 struct elf_link_hash_entry *h;
6729 bfd *owner;
6730
6731 /* An external symbol. */
6732 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6733 h = elf_sym_hashes (abfd)[indx];
6734 BFD_ASSERT (h != NULL);
6735
6736 if (h->root.type != bfd_link_hash_defined
6737 && h->root.type != bfd_link_hash_defweak)
6738 /* This appears to be a reference to an undefined
6739 symbol. Just ignore it--it will be caught by the
6740 regular reloc processing. */
6741 return 0;
6742 owner = h->root.u.def.section->owner;
6743 if (owner && (elf_elfheader (owner)->e_flags & E_NDS32_HAS_PIC))
6744 *pic_ext_target = 1;
6745
6746 if (h->root.u.def.section->flags & SEC_MERGE)
6747 {
6748 sym_sec = h->root.u.def.section;
6749 symval = _bfd_merged_section_offset (abfd, &sym_sec,
6750 elf_section_data (sym_sec)->sec_info,
6751 h->root.u.def.value);
6752 symval = symval + sym_sec->output_section->vma
6753 + sym_sec->output_offset;
6754 }
6755 else
6756 symval = (h->root.u.def.value
6757 + h->root.u.def.section->output_section->vma
6758 + h->root.u.def.section->output_offset);
6759 }
6760
6761 addend = irel->r_addend;
6762
6763 foff = (symval + addend
6764 - (irel->r_offset + sec->output_section->vma + sec->output_offset));
6765 return foff;
6766}
6767
6768static bfd_vma
6769calculate_plt_memory_address (bfd *abfd, struct bfd_link_info *link_info,
6770 Elf_Internal_Sym *isymbuf,
6771 Elf_Internal_Rela *irel,
6772 Elf_Internal_Shdr *symtab_hdr)
6773{
6774 bfd_vma symval;
6775
6776 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6777 {
6778 Elf_Internal_Sym *isym;
6779 asection *sym_sec;
6780 /* A local symbol. */
6781 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6782
6783 if (isym->st_shndx == SHN_UNDEF)
6784 sym_sec = bfd_und_section_ptr;
6785 else if (isym->st_shndx == SHN_ABS)
6786 sym_sec = bfd_abs_section_ptr;
6787 else if (isym->st_shndx == SHN_COMMON)
6788 sym_sec = bfd_com_section_ptr;
6789 else
6790 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6791 symval = isym->st_value + sym_sec->output_section->vma
6792 + sym_sec->output_offset;
6793 }
6794 else
6795 {
6796 unsigned long indx;
6797 struct elf_link_hash_entry *h;
6798 struct elf_nds32_link_hash_table *htab;
6799 asection *splt;
6800
6801 /* An external symbol. */
6802 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6803 h = elf_sym_hashes (abfd)[indx];
6804 BFD_ASSERT (h != NULL);
6805 htab = nds32_elf_hash_table (link_info);
6806 splt = htab->splt;
6807
6808 while (h->root.type == bfd_link_hash_indirect
6809 || h->root.type == bfd_link_hash_warning)
6810 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6811
6812 if (h->plt.offset == (bfd_vma) - 1)
6813 {
6814 if (h->root.type != bfd_link_hash_defined
6815 && h->root.type != bfd_link_hash_defweak)
6816 /* This appears to be a reference to an undefined
6817 * symbol. Just ignore it--it will be caught by the
6818 * regular reloc processing. */
6819 return 0;
6820 symval = (h->root.u.def.value
6821 + h->root.u.def.section->output_section->vma
6822 + h->root.u.def.section->output_offset);
6823 }
6824 else
6825 symval = splt->output_section->vma + h->plt.offset;
6826 }
6827
6828 return symval;
6829}
6830
6831static bfd_signed_vma
6832calculate_plt_offset (bfd *abfd, asection *sec, struct bfd_link_info *link_info,
6833 Elf_Internal_Sym *isymbuf, Elf_Internal_Rela *irel,
6834 Elf_Internal_Shdr *symtab_hdr)
6835{
6836 bfd_vma foff;
6837 if ((foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
6838 symtab_hdr)) == 0)
6839 return 0;
6840 else
6841 return foff - (irel->r_offset
6842 + sec->output_section->vma + sec->output_offset);
6843}
6844\f
6845/* Convert a 32-bit instruction to 16-bit one.
6846 INSN is the input 32-bit instruction, INSN16 is the output 16-bit
6847 instruction. If INSN_TYPE is not NULL, it the CGEN instruction
6848 type of INSN16. Return 1 if successful. */
6849
6850static int
6851nds32_convert_32_to_16_alu1 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6852 int *pinsn_type)
6853{
6854 uint16_t insn16 = 0;
6855 int insn_type;
6856 unsigned long mach = bfd_get_mach (abfd);
6857
6858 if (N32_SH5 (insn) != 0)
6859 return 0;
6860
6861 switch (N32_SUB5 (insn))
6862 {
6863 case N32_ALU1_ADD_SLLI:
6864 case N32_ALU1_ADD_SRLI:
6865 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6866 {
6867 insn16 = N16_TYPE333 (ADD333, N32_RT5 (insn), N32_RA5 (insn),
6868 N32_RB5 (insn));
6869 insn_type = NDS32_INSN_ADD333;
6870 }
6871 else if (N32_IS_RT4 (insn))
6872 {
6873 if (N32_RT5 (insn) == N32_RA5 (insn))
6874 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RB5 (insn));
6875 else if (N32_RT5 (insn) == N32_RB5 (insn))
6876 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RA5 (insn));
6877 insn_type = NDS32_INSN_ADD45;
6878 }
6879 break;
6880
6881 case N32_ALU1_SUB_SLLI:
6882 case N32_ALU1_SUB_SRLI:
6883 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6884 {
6885 insn16 = N16_TYPE333 (SUB333, N32_RT5 (insn), N32_RA5 (insn),
6886 N32_RB5 (insn));
6887 insn_type = NDS32_INSN_SUB333;
6888 }
6889 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6890 {
6891 insn16 = N16_TYPE45 (SUB45, N32_RT54 (insn), N32_RB5 (insn));
6892 insn_type = NDS32_INSN_SUB45;
6893 }
6894 break;
6895
6896 case N32_ALU1_AND_SLLI:
6897 case N32_ALU1_AND_SRLI:
6898 /* and $rt, $rt, $rb -> and33 for v3, v3m. */
6899 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6900 && N32_IS_RB3 (insn))
6901 {
6902 if (N32_RT5 (insn) == N32_RA5 (insn))
6903 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RB5 (insn));
6904 else if (N32_RT5 (insn) == N32_RB5 (insn))
6905 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RA5 (insn));
6906 if (insn16)
6907 insn_type = NDS32_INSN_AND33;
6908 }
6909 break;
6910
6911 case N32_ALU1_XOR_SLLI:
6912 case N32_ALU1_XOR_SRLI:
6913 /* xor $rt, $rt, $rb -> xor33 for v3, v3m. */
6914 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6915 && N32_IS_RB3 (insn))
6916 {
6917 if (N32_RT5 (insn) == N32_RA5 (insn))
6918 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RB5 (insn));
6919 else if (N32_RT5 (insn) == N32_RB5 (insn))
6920 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RA5 (insn));
6921 if (insn16)
6922 insn_type = NDS32_INSN_XOR33;
6923 }
6924 break;
6925
6926 case N32_ALU1_OR_SLLI:
6927 case N32_ALU1_OR_SRLI:
6928 /* or $rt, $rt, $rb -> or33 for v3, v3m. */
6929 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6930 && N32_IS_RB3 (insn))
6931 {
6932 if (N32_RT5 (insn) == N32_RA5 (insn))
6933 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RB5 (insn));
6934 else if (N32_RT5 (insn) == N32_RB5 (insn))
6935 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RA5 (insn));
6936 if (insn16)
6937 insn_type = NDS32_INSN_OR33;
6938 }
6939 break;
6940 case N32_ALU1_NOR:
6941 /* nor $rt, $ra, $ra -> not33 for v3, v3m. */
6942 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RB3 (insn)
6943 && N32_RA5 (insn) == N32_RB5 (insn))
6944 {
6945 insn16 = N16_MISC33 (NOT33, N32_RT5 (insn), N32_RA5 (insn));
6946 insn_type = NDS32_INSN_NOT33;
6947 }
6948 break;
6949 case N32_ALU1_SRAI:
6950 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6951 {
6952 insn16 = N16_TYPE45 (SRAI45, N32_RT54 (insn), N32_UB5 (insn));
6953 insn_type = NDS32_INSN_SRAI45;
6954 }
6955 break;
6956
6957 case N32_ALU1_SRLI:
6958 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6959 {
6960 insn16 = N16_TYPE45 (SRLI45, N32_RT54 (insn), N32_UB5 (insn));
6961 insn_type = NDS32_INSN_SRLI45;
6962 }
6963 break;
6964
6965 case N32_ALU1_SLLI:
6966 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_UB5 (insn) < 8)
6967 {
6968 insn16 = N16_TYPE333 (SLLI333, N32_RT5 (insn), N32_RA5 (insn),
6969 N32_UB5 (insn));
6970 insn_type = NDS32_INSN_SLLI333;
6971 }
6972 break;
6973
6974 case N32_ALU1_ZEH:
6975 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6976 {
6977 insn16 = N16_BFMI333 (ZEH33, N32_RT5 (insn), N32_RA5 (insn));
6978 insn_type = NDS32_INSN_ZEH33;
6979 }
6980 break;
6981
6982 case N32_ALU1_SEB:
6983 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6984 {
6985 insn16 = N16_BFMI333 (SEB33, N32_RT5 (insn), N32_RA5 (insn));
6986 insn_type = NDS32_INSN_SEB33;
6987 }
6988 break;
6989
6990 case N32_ALU1_SEH:
6991 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6992 {
6993 insn16 = N16_BFMI333 (SEH33, N32_RT5 (insn), N32_RA5 (insn));
6994 insn_type = NDS32_INSN_SEH33;
6995 }
6996 break;
6997
6998 case N32_ALU1_SLT:
6999 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
7000 {
7001 /* Implicit r15. */
7002 insn16 = N16_TYPE45 (SLT45, N32_RA54 (insn), N32_RB5 (insn));
7003 insn_type = NDS32_INSN_SLT45;
7004 }
7005 break;
7006
7007 case N32_ALU1_SLTS:
7008 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
7009 {
7010 /* Implicit r15. */
7011 insn16 = N16_TYPE45 (SLTS45, N32_RA54 (insn), N32_RB5 (insn));
7012 insn_type = NDS32_INSN_SLTS45;
7013 }
7014 break;
7015 }
7016
7017 if ((insn16 & 0x8000) == 0)
7018 return 0;
7019
7020 if (pinsn16)
7021 *pinsn16 = insn16;
7022 if (pinsn_type)
7023 *pinsn_type = insn_type;
7024 return 1;
7025}
7026
7027static int
7028nds32_convert_32_to_16_alu2 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7029 int *pinsn_type)
7030{
7031 uint16_t insn16 = 0;
7032 int insn_type;
7033 unsigned long mach = bfd_get_mach (abfd);
7034
7035 /* TODO: bset, bclr, btgl, btst. */
7036 if (__GF (insn, 6, 4) != 0)
7037 return 0;
7038
7039 switch (N32_IMMU (insn, 6))
7040 {
7041 case N32_ALU2_MUL:
7042 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7043 && N32_IS_RB3 (insn))
7044 {
7045 if (N32_RT5 (insn) == N32_RA5 (insn))
7046 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RB5 (insn));
7047 else if (N32_RT5 (insn) == N32_RB5 (insn))
7048 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RA5 (insn));
7049 if (insn16)
7050 insn_type = NDS32_INSN_MUL33;
7051 }
7052 }
7053
7054 if ((insn16 & 0x8000) == 0)
7055 return 0;
7056
7057 if (pinsn16)
7058 *pinsn16 = insn16;
7059 if (pinsn_type)
7060 *pinsn_type = insn_type;
7061 return 1;
7062}
7063
7064int
7065nds32_convert_32_to_16 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7066 int *pinsn_type)
7067{
7068 int op6;
7069 uint16_t insn16 = 0;
7070 int insn_type;
7071 unsigned long mach = bfd_get_mach (abfd);
7072
7073 /* Decode 32-bit instruction. */
7074 if (insn & 0x80000000)
7075 {
7076 /* Not 32-bit insn. */
7077 return 0;
7078 }
7079
7080 op6 = N32_OP6 (insn);
7081
7082 /* Convert it to 16-bit instruction. */
7083 switch (op6)
7084 {
7085 case N32_OP6_MOVI:
7086 if (IS_WITHIN_S (N32_IMM20S (insn), 5))
7087 {
7088 insn16 = N16_TYPE55 (MOVI55, N32_RT5 (insn), N32_IMM20S (insn));
7089 insn_type = NDS32_INSN_MOVI55;
7090 }
7091 else if (mach >= MACH_V3 && N32_IMM20S (insn) >= 16
7092 && N32_IMM20S (insn) < 48 && N32_IS_RT4 (insn))
7093 {
7094 insn16 = N16_TYPE45 (MOVPI45, N32_RT54 (insn),
7095 N32_IMM20S (insn) - 16);
7096 insn_type = NDS32_INSN_MOVPI45;
7097 }
7098 break;
7099
7100 case N32_OP6_ADDI:
7101 if (N32_IMM15S (insn) == 0)
7102 {
7103 /* Do not convert `addi $sp, $sp, 0' to `mov55 $sp, $sp',
7104 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
7105 if (mach <= MACH_V2
7106 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
7107 {
7108 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
7109 insn_type = NDS32_INSN_MOV55;
7110 }
7111 }
7112 else if (N32_IMM15S (insn) > 0)
7113 {
7114 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) < 8)
7115 {
7116 insn16 = N16_TYPE333 (ADDI333, N32_RT5 (insn), N32_RA5 (insn),
7117 N32_IMM15S (insn));
7118 insn_type = NDS32_INSN_ADDI333;
7119 }
7120 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
7121 && N32_IMM15S (insn) < 32)
7122 {
7123 insn16 = N16_TYPE45 (ADDI45, N32_RT54 (insn), N32_IMM15S (insn));
7124 insn_type = NDS32_INSN_ADDI45;
7125 }
7126 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
7127 && N32_RT5 (insn) == N32_RA5 (insn)
7128 && N32_IMM15S (insn) < 512)
7129 {
7130 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
7131 insn_type = NDS32_INSN_ADDI10_SP;
7132 }
7133 else if (mach >= MACH_V3 && N32_IS_RT3 (insn)
7134 && N32_RA5 (insn) == REG_SP && N32_IMM15S (insn) < 256
7135 && (N32_IMM15S (insn) % 4 == 0))
7136 {
7137 insn16 = N16_TYPE36 (ADDRI36_SP, N32_RT5 (insn),
7138 N32_IMM15S (insn) >> 2);
7139 insn_type = NDS32_INSN_ADDRI36_SP;
7140 }
7141 }
7142 else
7143 {
7144 /* Less than 0. */
7145 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) > -8)
7146 {
7147 insn16 = N16_TYPE333 (SUBI333, N32_RT5 (insn), N32_RA5 (insn),
7148 0 - N32_IMM15S (insn));
7149 insn_type = NDS32_INSN_SUBI333;
7150 }
7151 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
7152 && N32_IMM15S (insn) > -32)
7153 {
1c8f6a4d
KLC		 7154 insn16 = N16_TYPE45 (SUBI45, N32_RT54 (insn),
7155 0 - N32_IMM15S (insn));
35c08157
KLC		 7156 insn_type = NDS32_INSN_SUBI45;
7157 }
7158 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
7159 && N32_RT5 (insn) == N32_RA5 (insn)
7160 && N32_IMM15S (insn) >= -512)
7161 {
7162 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
7163 insn_type = NDS32_INSN_ADDI10_SP;
7164 }
7165 }
7166 break;
7167
7168 case N32_OP6_ORI:
7169 if (N32_IMM15S (insn) == 0)
7170 {
7171 /* Do not convert `ori $sp, $sp, 0' to `mov55 $sp, $sp',
7172 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
7173 if (mach <= MACH_V2
7174 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
7175 {
7176 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
7177 insn_type = NDS32_INSN_MOV55;
7178 }
7179 }
7180 break;
7181
7182 case N32_OP6_SUBRI:
7183 if (mach >= MACH_V3 && N32_IS_RT3 (insn)
7184 && N32_IS_RA3 (insn) && N32_IMM15S (insn) == 0)
7185 {
7186 insn16 = N16_MISC33 (NEG33, N32_RT5 (insn), N32_RA5 (insn));
7187 insn_type = NDS32_INSN_NEG33;
7188 }
7189 break;
7190
7191 case N32_OP6_ANDI:
7192 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7193 {
7194 if (N32_IMM15U (insn) == 1)
7195 {
7196 insn16 = N16_BFMI333 (XLSB33, N32_RT5 (insn), N32_RA5 (insn));
7197 insn_type = NDS32_INSN_XLSB33;
7198 }
7199 else if (N32_IMM15U (insn) == 0x7ff)
7200 {
7201 insn16 = N16_BFMI333 (X11B33, N32_RT5 (insn), N32_RA5 (insn));
7202 insn_type = NDS32_INSN_X11B33;
7203 }
7204 else if (N32_IMM15U (insn) == 0xff)
7205 {
7206 insn16 = N16_BFMI333 (ZEB33, N32_RT5 (insn), N32_RA5 (insn));
7207 insn_type = NDS32_INSN_ZEB33;
7208 }
7209 else if (mach >= MACH_V3 && N32_RT5 (insn) == N32_RA5 (insn)
7210 && N32_IMM15U (insn) < 256)
7211 {
7212 int imm15u = N32_IMM15U (insn);
7213
7214 if (__builtin_popcount (imm15u) == 1)
7215 {
7216 /* BMSKI33 */
7217 int imm3u = __builtin_ctz (imm15u);
7218
7219 insn16 = N16_BFMI333 (BMSKI33, N32_RT5 (insn), imm3u);
7220 insn_type = NDS32_INSN_BMSKI33;
7221 }
7222 else if (imm15u != 0 && __builtin_popcount (imm15u + 1) == 1)
7223 {
7224 /* FEXTI33 */
7225 int imm3u = __builtin_ctz (imm15u + 1) - 1;
7226
7227 insn16 = N16_BFMI333 (FEXTI33, N32_RT5 (insn), imm3u);
7228 insn_type = NDS32_INSN_FEXTI33;
7229 }
7230 }
7231 }
7232 break;
7233
7234 case N32_OP6_SLTI:
7235 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7236 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7237 {
7238 insn16 = N16_TYPE45 (SLTI45, N32_RA54 (insn), N32_IMM15S (insn));
7239 insn_type = NDS32_INSN_SLTI45;
7240 }
7241 break;
7242
7243 case N32_OP6_SLTSI:
7244 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7245 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7246 {
7247 insn16 = N16_TYPE45 (SLTSI45, N32_RA54 (insn), N32_IMM15S (insn));
7248 insn_type = NDS32_INSN_SLTSI45;
7249 }
7250 break;
7251
7252 case N32_OP6_LWI:
7253 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7254 {
7255 insn16 = N16_TYPE45 (LWI450, N32_RT54 (insn), N32_RA5 (insn));
7256 insn_type = NDS32_INSN_LWI450;
7257 }
7258 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7259 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7260 {
7261 insn16 = N16_TYPE333 (LWI333, N32_RT5 (insn), N32_RA5 (insn),
7262 N32_IMM15S (insn));
7263 insn_type = NDS32_INSN_LWI333;
7264 }
7265 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7266 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7267 {
7268 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7269 insn_type = NDS32_INSN_LWI37;
7270 }
7271 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7272 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7273 {
7274 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 0, N32_IMM15S (insn));
7275 insn_type = NDS32_INSN_LWI37_SP;
7276 }
7277 else if (mach >= MACH_V2 && N32_IS_RT4 (insn) && N32_RA5 (insn) == REG_R8
7278 && -32 <= N32_IMM15S (insn) && N32_IMM15S (insn) < 0)
7279 {
1c8f6a4d
KLC		 7280 insn16 = N16_TYPE45 (LWI45_FE, N32_RT54 (insn),
7281 N32_IMM15S (insn) + 32);
35c08157
KLC		 7282 insn_type = NDS32_INSN_LWI45_FE;
7283 }
7284 break;
7285
7286 case N32_OP6_SWI:
7287 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7288 {
7289 insn16 = N16_TYPE45 (SWI450, N32_RT54 (insn), N32_RA5 (insn));
7290 insn_type = NDS32_INSN_SWI450;
7291 }
7292 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7293 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7294 {
1c8f6a4d
KLC		 7295 insn16 = N16_TYPE333 (SWI333, N32_RT5 (insn), N32_RA5 (insn),
7296 N32_IMM15S (insn));
35c08157
KLC		 7297 insn_type = NDS32_INSN_SWI333;
7298 }
7299 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7300 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7301 {
7302 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7303 insn_type = NDS32_INSN_SWI37;
7304 }
7305 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7306 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7307 {
7308 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 1, N32_IMM15S (insn));
7309 insn_type = NDS32_INSN_SWI37_SP;
7310 }
7311 break;
7312
7313 case N32_OP6_LWI_BI:
7314 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7315 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7316 {
7317 insn16 = N16_TYPE333 (LWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7318 N32_IMM15S (insn));
7319 insn_type = NDS32_INSN_LWI333_BI;
7320 }
7321 break;
7322
7323 case N32_OP6_SWI_BI:
7324 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7325 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7326 {
7327 insn16 = N16_TYPE333 (SWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7328 N32_IMM15S (insn));
7329 insn_type = NDS32_INSN_SWI333_BI;
7330 }
7331 break;
7332
7333 case N32_OP6_LHI:
7334 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7335 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7336 {
7337 insn16 = N16_TYPE333 (LHI333, N32_RT5 (insn), N32_RA5 (insn),
7338 N32_IMM15S (insn));
7339 insn_type = NDS32_INSN_LHI333;
7340 }
7341 break;
7342
7343 case N32_OP6_SHI:
7344 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7345 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7346 {
7347 insn16 = N16_TYPE333 (SHI333, N32_RT5 (insn), N32_RA5 (insn),
7348 N32_IMM15S (insn));
7349 insn_type = NDS32_INSN_SHI333;
7350 }
7351 break;
7352
7353 case N32_OP6_LBI:
7354 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7355 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7356 {
7357 insn16 = N16_TYPE333 (LBI333, N32_RT5 (insn), N32_RA5 (insn),
7358 N32_IMM15S (insn));
7359 insn_type = NDS32_INSN_LBI333;
7360 }
7361 break;
7362
7363 case N32_OP6_SBI:
7364 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7365 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7366 {
7367 insn16 = N16_TYPE333 (SBI333, N32_RT5 (insn), N32_RA5 (insn),
7368 N32_IMM15S (insn));
7369 insn_type = NDS32_INSN_SBI333;
7370 }
7371 break;
7372
7373 case N32_OP6_ALU1:
7374 return nds32_convert_32_to_16_alu1 (abfd, insn, pinsn16, pinsn_type);
7375
7376 case N32_OP6_ALU2:
7377 return nds32_convert_32_to_16_alu2 (abfd, insn, pinsn16, pinsn_type);
7378
7379 case N32_OP6_BR1:
7380 if (!IS_WITHIN_S (N32_IMM14S (insn), 8))
7381 goto done;
7382
7383 if ((insn & __BIT (14)) == 0)
7384 {
7385 /* N32_BR1_BEQ */
7386 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7387 && N32_RT5 (insn) != REG_R5)
7388 insn16 = N16_TYPE38 (BEQS38, N32_RT5 (insn), N32_IMM14S (insn));
7389 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7390 && N32_RA5 (insn) != REG_R5)
7391 insn16 = N16_TYPE38 (BEQS38, N32_RA5 (insn), N32_IMM14S (insn));
7392 insn_type = NDS32_INSN_BEQS38;
7393 break;
7394 }
7395 else
7396 {
7397 /* N32_BR1_BNE */
7398 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7399 && N32_RT5 (insn) != REG_R5)
7400 insn16 = N16_TYPE38 (BNES38, N32_RT5 (insn), N32_IMM14S (insn));
7401 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7402 && N32_RA5 (insn) != REG_R5)
7403 insn16 = N16_TYPE38 (BNES38, N32_RA5 (insn), N32_IMM14S (insn));
7404 insn_type = NDS32_INSN_BNES38;
7405 break;
7406 }
7407 break;
7408
7409 case N32_OP6_BR2:
7410 switch (N32_BR2_SUB (insn))
7411 {
7412 case N32_BR2_BEQZ:
7413 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7414 {
7415 insn16 = N16_TYPE38 (BEQZ38, N32_RT5 (insn), N32_IMM16S (insn));
7416 insn_type = NDS32_INSN_BEQZ38;
7417 }
1c8f6a4d
KLC		 7418 else if (N32_RT5 (insn) == REG_R15
7419 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC		 7420 {
7421 insn16 = N16_TYPE8 (BEQZS8, N32_IMM16S (insn));
7422 insn_type = NDS32_INSN_BEQZS8;
7423 }
7424 break;
7425
7426 case N32_BR2_BNEZ:
7427 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7428 {
7429 insn16 = N16_TYPE38 (BNEZ38, N32_RT5 (insn), N32_IMM16S (insn));
7430 insn_type = NDS32_INSN_BNEZ38;
7431 }
1c8f6a4d
KLC		 7432 else if (N32_RT5 (insn) == REG_R15
7433 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC		 7434 {
7435 insn16 = N16_TYPE8 (BNEZS8, N32_IMM16S (insn));
7436 insn_type = NDS32_INSN_BNEZS8;
7437 }
7438 break;
7439
7440 case N32_BR2_IFCALL:
7441 if (IS_WITHIN_U (N32_IMM16S (insn), 9))
7442 {
7443 insn16 = N16_TYPE9 (IFCALL9, N32_IMM16S (insn));
7444 insn_type = NDS32_INSN_IFCALL9;
7445 }
7446 break;
7447 }
7448 break;
7449
7450 case N32_OP6_JI:
7451 if ((insn & __BIT (24)) == 0)
7452 {
7453 /* N32_JI_J */
7454 if (IS_WITHIN_S (N32_IMM24S (insn), 8))
7455 {
7456 insn16 = N16_TYPE8 (J8, N32_IMM24S (insn));
7457 insn_type = NDS32_INSN_J8;
7458 }
7459 }
7460 break;
7461
7462 case N32_OP6_JREG:
7463 if (__GF (insn, 8, 2) != 0)
7464 goto done;
7465
7466 switch (N32_IMMU (insn, 5))
7467 {
7468 case N32_JREG_JR:
7469 if (N32_JREG_HINT (insn) == 0)
7470 {
7471 /* jr */
7472 insn16 = N16_TYPE5 (JR5, N32_RB5 (insn));
7473 insn_type = NDS32_INSN_JR5;
7474 }
7475 else if (N32_JREG_HINT (insn) == 1)
7476 {
7477 /* ret */
7478 insn16 = N16_TYPE5 (RET5, N32_RB5 (insn));
7479 insn_type = NDS32_INSN_RET5;
7480 }
7481 else if (N32_JREG_HINT (insn) == 3)
7482 {
7483 /* ifret = mov55 $sp, $sp */
7484 insn16 = N16_TYPE55 (MOV55, REG_SP, REG_SP);
7485 insn_type = NDS32_INSN_IFRET;
7486 }
7487 break;
7488
7489 case N32_JREG_JRAL:
7490 /* It's convertible when return rt5 is $lp and address
7491 translation is kept. */
7492 if (N32_RT5 (insn) == REG_LP && N32_JREG_HINT (insn) == 0)
7493 {
7494 insn16 = N16_TYPE5 (JRAL5, N32_RB5 (insn));
7495 insn_type = NDS32_INSN_JRAL5;
7496 }
7497 break;
7498 }
7499 break;
7500
7501 case N32_OP6_MISC:
7502 if (N32_SUB5 (insn) == N32_MISC_BREAK && N32_SWID (insn) < 32)
7503 {
7504 /* For v3, swid above 31 are used for ex9.it. */
7505 insn16 = N16_TYPE5 (BREAK16, N32_SWID (insn));
7506 insn_type = NDS32_INSN_BREAK16;
7507 }
7508 break;
7509
7510 default:
7511 /* This instruction has no 16-bit variant. */
7512 goto done;
7513 }
7514
7515done:
7516 /* Bit-15 of insn16 should be set for a valid instruction. */
7517 if ((insn16 & 0x8000) == 0)
7518 return 0;
7519
7520 if (pinsn16)
7521 *pinsn16 = insn16;
7522 if (pinsn_type)
7523 *pinsn_type = insn_type;
7524 return 1;
7525}
7526
7527static int
7528special_convert_32_to_16 (unsigned long insn, uint16_t *pinsn16,
7529 Elf_Internal_Rela *reloc)
7530{
7531 uint16_t insn16 = 0;
7532
7533 if ((reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG) == 0
7534 || (ELF32_R_TYPE (reloc->r_info) != R_NDS32_INSN16))
7535 return 0;
7536
7537 if (!N32_IS_RT3 (insn))
7538 return 0;
7539
7540 switch (N32_OP6 (insn))
7541 {
7542 case N32_OP6_LWI:
7543 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7544 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7545 break;
7546 case N32_OP6_SWI:
7547 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7548 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7549 break;
7550 case N32_OP6_HWGP:
7551 if (!IS_WITHIN_U (N32_IMM17S (insn), 7))
7552 break;
7553
7554 if (__GF (insn, 17, 3) == 6)
7555 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM17S (insn));
7556 else if (__GF (insn, 17, 3) == 7)
7557 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM17S (insn));
7558 break;
7559 }
7560
7561 if ((insn16 & 0x8000) == 0)
7562 return 0;
7563
7564 *pinsn16 = insn16;
7565 return 1;
7566}
7567
7568/* Convert a 16-bit instruction to 32-bit one.
7569 INSN16 it the input and PINSN it the point to output.
7570 Return non-zero on successful. Otherwise 0 is returned. */
7571
7572int
7573nds32_convert_16_to_32 (bfd *abfd, uint16_t insn16, uint32_t *pinsn)
7574{
7575 uint32_t insn = 0xffffffff;
7576 unsigned long mach = bfd_get_mach (abfd);
7577
7578 /* NOTE: push25, pop25 and movd44 do not have 32-bit variants. */
7579
7580 switch (__GF (insn16, 9, 6))
7581 {
7582 case 0x4: /* add45 */
1c8f6a4d
KLC		 7583 insn = N32_ALU1 (ADD, N16_RT4 (insn16), N16_RT4 (insn16),
7584 N16_RA5 (insn16));
35c08157
KLC		 7585 goto done;
7586 case 0x5: /* sub45 */
1c8f6a4d
KLC		 7587 insn = N32_ALU1 (SUB, N16_RT4 (insn16), N16_RT4 (insn16),
7588 N16_RA5 (insn16));
35c08157
KLC		 7589 goto done;
7590 case 0x6: /* addi45 */
1c8f6a4d
KLC		 7591 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7592 N16_IMM5U (insn16));
35c08157
KLC		 7593 goto done;
7594 case 0x7: /* subi45 */
1c8f6a4d
KLC		 7595 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7596 -N16_IMM5U (insn16));
35c08157
KLC		 7597 goto done;
7598 case 0x8: /* srai45 */
1c8f6a4d
KLC		 7599 insn = N32_ALU1 (SRAI, N16_RT4 (insn16), N16_RT4 (insn16),
7600 N16_IMM5U (insn16));
35c08157
KLC		 7601 goto done;
7602 case 0x9: /* srli45 */
1c8f6a4d
KLC		 7603 insn = N32_ALU1 (SRLI, N16_RT4 (insn16), N16_RT4 (insn16),
7604 N16_IMM5U (insn16));
35c08157 7605 goto done;
35c08157 7606 case 0xa: /* slli333 */
1c8f6a4d
KLC		 7607 insn = N32_ALU1 (SLLI, N16_RT3 (insn16), N16_RA3 (insn16),
7608 N16_IMM3U (insn16));
35c08157
KLC		 7609 goto done;
7610 case 0xc: /* add333 */
1c8f6a4d
KLC		 7611 insn = N32_ALU1 (ADD, N16_RT3 (insn16), N16_RA3 (insn16),
7612 N16_RB3 (insn16));
35c08157
KLC		 7613 goto done;
7614 case 0xd: /* sub333 */
1c8f6a4d
KLC		 7615 insn = N32_ALU1 (SUB, N16_RT3 (insn16), N16_RA3 (insn16),
7616 N16_RB3 (insn16));
35c08157
KLC		 7617 goto done;
7618 case 0xe: /* addi333 */
1c8f6a4d
KLC		 7619 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7620 N16_IMM3U (insn16));
35c08157
KLC		 7621 goto done;
7622 case 0xf: /* subi333 */
1c8f6a4d
KLC		 7623 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7624 -N16_IMM3U (insn16));
35c08157 7625 goto done;
35c08157 7626 case 0x10: /* lwi333 */
1c8f6a4d
KLC		 7627 insn = N32_TYPE2 (LWI, N16_RT3 (insn16), N16_RA3 (insn16),
7628 N16_IMM3U (insn16));
35c08157
KLC		 7629 goto done;
7630 case 0x12: /* lhi333 */
1c8f6a4d
KLC		 7631 insn = N32_TYPE2 (LHI, N16_RT3 (insn16), N16_RA3 (insn16),
7632 N16_IMM3U (insn16));
35c08157
KLC		 7633 goto done;
7634 case 0x13: /* lbi333 */
1c8f6a4d
KLC		 7635 insn = N32_TYPE2 (LBI, N16_RT3 (insn16), N16_RA3 (insn16),
7636 N16_IMM3U (insn16));
35c08157
KLC		 7637 goto done;
7638 case 0x11: /* lwi333.bi */
1c8f6a4d
KLC		 7639 insn = N32_TYPE2 (LWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7640 N16_IMM3U (insn16));
35c08157
KLC		 7641 goto done;
7642 case 0x14: /* swi333 */
1c8f6a4d
KLC		 7643 insn = N32_TYPE2 (SWI, N16_RT3 (insn16), N16_RA3 (insn16),
7644 N16_IMM3U (insn16));
35c08157
KLC		 7645 goto done;
7646 case 0x16: /* shi333 */
1c8f6a4d
KLC		 7647 insn = N32_TYPE2 (SHI, N16_RT3 (insn16), N16_RA3 (insn16),
7648 N16_IMM3U (insn16));
35c08157
KLC		 7649 goto done;
7650 case 0x17: /* sbi333 */
1c8f6a4d
KLC		 7651 insn = N32_TYPE2 (SBI, N16_RT3 (insn16), N16_RA3 (insn16),
7652 N16_IMM3U (insn16));
35c08157
KLC		 7653 goto done;
7654 case 0x15: /* swi333.bi */
1c8f6a4d
KLC		 7655 insn = N32_TYPE2 (SWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7656 N16_IMM3U (insn16));
35c08157 7657 goto done;
35c08157 7658 case 0x18: /* addri36.sp */
1c8f6a4d
KLC		 7659 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), REG_SP,
7660 N16_IMM6U (insn16) << 2);
35c08157 7661 goto done;
35c08157 7662 case 0x19: /* lwi45.fe */
1c8f6a4d
KLC		 7663 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), REG_R8,
7664 (N16_IMM5U (insn16) - 32));
35c08157
KLC		 7665 goto done;
7666 case 0x1a: /* lwi450 */
7667 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7668 goto done;
7669 case 0x1b: /* swi450 */
7670 insn = N32_TYPE2 (SWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7671 goto done;
7672
1c8f6a4d 7673 /* These are r15 implied instructions. */
35c08157
KLC		 7674 case 0x30: /* slts45 */
7675 insn = N32_ALU1 (SLTS, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7676 goto done;
7677 case 0x31: /* slt45 */
7678 insn = N32_ALU1 (SLT, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7679 goto done;
7680 case 0x32: /* sltsi45 */
7681 insn = N32_TYPE2 (SLTSI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7682 goto done;
7683 case 0x33: /* slti45 */
7684 insn = N32_TYPE2 (SLTI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7685 goto done;
7686 case 0x34: /* beqzs8, bnezs8 */
7687 if (insn16 & __BIT (8))
7688 insn = N32_BR2 (BNEZ, REG_TA, N16_IMM8S (insn16));
7689 else
7690 insn = N32_BR2 (BEQZ, REG_TA, N16_IMM8S (insn16));
7691 goto done;
7692
7693 case 0x35: /* break16, ex9.it */
7694 /* Only consider range of v3 break16. */
7695 insn = N32_TYPE0 (MISC, (N16_IMM5U (insn16) << 5) | N32_MISC_BREAK);
7696 goto done;
7697
7698 case 0x3c: /* ifcall9 */
7699 insn = N32_BR2 (IFCALL, 0, N16_IMM9U (insn16));
7700 goto done;
7701 case 0x3d: /* movpi45 */
7702 insn = N32_TYPE1 (MOVI, N16_RT4 (insn16), N16_IMM5U (insn16) + 16);
7703 goto done;
7704
7705 case 0x3f: /* MISC33 */
1c8f6a4d 7706 switch (insn16 & 0x7)
35c08157
KLC		 7707 {
7708 case 2: /* neg33 */
7709 insn = N32_TYPE2 (SUBRI, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7710 break;
7711 case 3: /* not33 */
1c8f6a4d
KLC		 7712 insn = N32_ALU1 (NOR, N16_RT3 (insn16), N16_RA3 (insn16),
7713 N16_RA3 (insn16));
35c08157
KLC		 7714 break;
7715 case 4: /* mul33 */
1c8f6a4d
KLC		 7716 insn = N32_ALU2 (MUL, N16_RT3 (insn16), N16_RT3 (insn16),
7717 N16_RA3 (insn16));
35c08157
KLC		 7718 break;
7719 case 5: /* xor33 */
1c8f6a4d
KLC		 7720 insn = N32_ALU1 (XOR, N16_RT3 (insn16), N16_RT3 (insn16),
7721 N16_RA3 (insn16));
35c08157
KLC		 7722 break;
7723 case 6: /* and33 */
1c8f6a4d
KLC		 7724 insn = N32_ALU1 (AND, N16_RT3 (insn16), N16_RT3 (insn16),
7725 N16_RA3 (insn16));
35c08157
KLC		 7726 break;
7727 case 7: /* or33 */
1c8f6a4d
KLC		 7728 insn = N32_ALU1 (OR, N16_RT3 (insn16), N16_RT3 (insn16),
7729 N16_RA3 (insn16));
35c08157
KLC		 7730 break;
7731 }
7732 goto done;
7733
1c8f6a4d 7734 case 0xb:
35c08157
KLC		 7735 switch (insn16 & 0x7)
7736 {
7737 case 0: /* zeb33 */
7738 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0xff);
7739 break;
7740 case 1: /* zeh33 */
7741 insn = N32_ALU1 (ZEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7742 break;
7743 case 2: /* seb33 */
7744 insn = N32_ALU1 (SEB, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7745 break;
7746 case 3: /* seh33 */
7747 insn = N32_ALU1 (SEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7748 break;
7749 case 4: /* xlsb33 */
7750 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 1);
7751 break;
7752 case 5: /* x11b33 */
7753 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0x7ff);
7754 break;
7755 case 6: /* bmski33 */
7756 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 7757 1 << __GF (insn16, 3, 3));
35c08157
KLC		 7758 break;
7759 case 7: /* fexti33 */
7760 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 7761 (1 << (__GF (insn16, 3, 3) + 1)) - 1);
35c08157
KLC		 7762 break;
7763 }
7764 goto done;
7765 }
7766
7767 switch (__GF (insn16, 10, 5))
7768 {
7769 case 0x0: /* mov55 or ifret16 */
7770 if (mach >= MACH_V3 && N16_RT5 (insn16) == REG_SP
7771 && N16_RT5 (insn16) == N16_RA5 (insn16))
1c8f6a4d 7772 insn = N32_JREG (JR, 0, 0, 0, 3);
35c08157 7773 else
1c8f6a4d 7774 insn = N32_TYPE2 (ADDI, N16_RT5 (insn16), N16_RA5 (insn16), 0);
35c08157
KLC		 7775 goto done;
7776 case 0x1: /* movi55 */
7777 insn = N32_TYPE1 (MOVI, N16_RT5 (insn16), N16_IMM5S (insn16));
7778 goto done;
7779 case 0x1b: /* addi10s (V2) */
7780 insn = N32_TYPE2 (ADDI, REG_SP, REG_SP, N16_IMM10S (insn16));
7781 goto done;
7782 }
7783
7784 switch (__GF (insn16, 11, 4))
7785 {
7786 case 0x7: /* lwi37.fp/swi37.fp */
7787 if (insn16 & __BIT (7)) /* swi37.fp */
7788 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7789 else /* lwi37.fp */
7790 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7791 goto done;
7792 case 0x8: /* beqz38 */
7793 insn = N32_BR2 (BEQZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7794 goto done;
7795 case 0x9: /* bnez38 */
7796 insn = N32_BR2 (BNEZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7797 goto done;
7798 case 0xa: /* beqs38/j8, implied r5 */
7799 if (N16_RT38 (insn16) == 5)
7800 insn = N32_JI (J, N16_IMM8S (insn16));
7801 else
7802 insn = N32_BR1 (BEQ, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7803 goto done;
7804 case 0xb: /* bnes38 and others */
7805 if (N16_RT38 (insn16) == 5)
7806 {
7807 switch (__GF (insn16, 5, 3))
7808 {
7809 case 0: /* jr5 */
7810 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 0);
7811 break;
7812 case 4: /* ret5 */
7813 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 1);
7814 break;
7815 case 1: /* jral5 */
7816 insn = N32_JREG (JRAL, REG_LP, N16_RA5 (insn16), 0, 0);
7817 break;
7818 case 2: /* ex9.it imm5 */
7819 /* ex9.it had no 32-bit variantl. */
7820 break;
7821 case 5: /* add5.pc */
7822 /* add5.pc had no 32-bit variantl. */
7823 break;
7824 }
7825 }
7826 else /* bnes38 */
7827 insn = N32_BR1 (BNE, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7828 goto done;
7829 case 0xe: /* lwi37/swi37 */
7830 if (insn16 & (1 << 7)) /* swi37.sp */
7831 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7832 else /* lwi37.sp */
7833 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7834 goto done;
7835 }
7836
7837done:
7838 if (insn & 0x80000000)
7839 return 0;
7840
7841 if (pinsn)
7842 *pinsn = insn;
7843 return 1;
7844}
7845\f
7846static bfd_boolean
7847is_sda_access_insn (unsigned long insn)
7848{
7849 switch (N32_OP6 (insn))
7850 {
7851 case N32_OP6_LWI:
7852 case N32_OP6_LHI:
7853 case N32_OP6_LHSI:
7854 case N32_OP6_LBI:
7855 case N32_OP6_LBSI:
7856 case N32_OP6_SWI:
7857 case N32_OP6_SHI:
7858 case N32_OP6_SBI:
7859 case N32_OP6_LWC:
7860 case N32_OP6_LDC:
7861 case N32_OP6_SWC:
7862 case N32_OP6_SDC:
7863 return TRUE;
7864 default:
7865 ;
7866 }
7867 return FALSE;
7868}
7869
7870static unsigned long
7871turn_insn_to_sda_access (uint32_t insn, bfd_signed_vma type, uint32_t *pinsn)
7872{
7873 uint32_t oinsn = 0;
7874
7875 switch (type)
7876 {
7877 case R_NDS32_GOT_LO12:
7878 case R_NDS32_GOTOFF_LO12:
7879 case R_NDS32_PLTREL_LO12:
7880 case R_NDS32_PLT_GOTREL_LO12:
7881 case R_NDS32_LO12S0_RELA:
7882 switch (N32_OP6 (insn))
7883 {
7884 case N32_OP6_LBI:
7885 /* lbi.gp */
7886 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
7887 break;
7888 case N32_OP6_LBSI:
7889 /* lbsi.gp */
7890 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19));
7891 break;
7892 case N32_OP6_SBI:
7893 /* sbi.gp */
7894 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
7895 break;
7896 case N32_OP6_ORI:
7897 /* addi.gp */
7898 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
7899 break;
7900 }
7901 break;
7902
7903 case R_NDS32_LO12S1_RELA:
7904 switch (N32_OP6 (insn))
7905 {
7906 case N32_OP6_LHI:
7907 /* lhi.gp */
7908 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
7909 break;
7910 case N32_OP6_LHSI:
7911 /* lhsi.gp */
7912 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18));
7913 break;
7914 case N32_OP6_SHI:
7915 /* shi.gp */
7916 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19));
7917 break;
7918 }
7919 break;
7920
7921 case R_NDS32_LO12S2_RELA:
7922 switch (N32_OP6 (insn))
7923 {
7924 case N32_OP6_LWI:
7925 /* lwi.gp */
7926 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
7927 break;
7928 case N32_OP6_SWI:
7929 /* swi.gp */
7930 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
7931 break;
7932 }
7933 break;
7934
7935 case R_NDS32_LO12S2_DP_RELA:
7936 case R_NDS32_LO12S2_SP_RELA:
7937 oinsn = (insn & 0x7ff07000) | (REG_GP << 15);
7938 break;
7939 }
7940
7941 if (oinsn)
7942 *pinsn = oinsn;
7943
7944 return oinsn != 0;
7945}
7946
7947/* Linker hasn't found the correct merge section for non-section symbol
7948 in relax time, this work is left to the function elf_link_input_bfd().
7949 So for non-section symbol, _bfd_merged_section_offset is also needed
7950 to find the correct symbol address. */
7951
7952static bfd_vma
7953nds32_elf_rela_local_sym (bfd *abfd, Elf_Internal_Sym *sym,
7954 asection **psec, Elf_Internal_Rela *rel)
7955{
7956 asection *sec = *psec;
7957 bfd_vma relocation;
7958
7959 relocation = (sec->output_section->vma
7960 + sec->output_offset + sym->st_value);
7961 if ((sec->flags & SEC_MERGE) && sec->sec_info_type == SEC_INFO_TYPE_MERGE)
7962 {
7963 if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
7964 rel->r_addend =
7965 _bfd_merged_section_offset (abfd, psec,
7966 elf_section_data (sec)->sec_info,
7967 sym->st_value + rel->r_addend);
7968 else
7969 rel->r_addend =
7970 _bfd_merged_section_offset (abfd, psec,
7971 elf_section_data (sec)->sec_info,
7972 sym->st_value) + rel->r_addend;
7973
7974 if (sec != *psec)
7975 {
7976 /* If we have changed the section, and our original section is
7977 marked with SEC_EXCLUDE, it means that the original
7978 SEC_MERGE section has been completely subsumed in some
7979 other SEC_MERGE section. In this case, we need to leave
7980 some info around for --emit-relocs. */
7981 if ((sec->flags & SEC_EXCLUDE) != 0)
7982 sec->kept_section = *psec;
7983 sec = *psec;
7984 }
7985 rel->r_addend -= relocation;
7986 rel->r_addend += sec->output_section->vma + sec->output_offset;
7987 }
7988 return relocation;
7989}
7990
7991static bfd_vma
7992calculate_memory_address (bfd *abfd, Elf_Internal_Rela *irel,
7993 Elf_Internal_Sym *isymbuf,
7994 Elf_Internal_Shdr *symtab_hdr)
7995{
7996 bfd_signed_vma foff;
7997 bfd_vma symval, addend;
7998 Elf_Internal_Rela irel_fn;
7999 Elf_Internal_Sym *isym;
8000 asection *sym_sec;
8001
8002 /* Get the value of the symbol referred to by the reloc. */
8003 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
8004 {
8005 /* A local symbol. */
8006 isym = isymbuf + ELF32_R_SYM (irel->r_info);
8007
8008 if (isym->st_shndx == SHN_UNDEF)
8009 sym_sec = bfd_und_section_ptr;
8010 else if (isym->st_shndx == SHN_ABS)
8011 sym_sec = bfd_abs_section_ptr;
8012 else if (isym->st_shndx == SHN_COMMON)
8013 sym_sec = bfd_com_section_ptr;
8014 else
8015 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
8016 memcpy (&irel_fn, irel, sizeof (Elf_Internal_Rela));
8017 symval = nds32_elf_rela_local_sym (abfd, isym, &sym_sec, &irel_fn);
8018 addend = irel_fn.r_addend;
8019 }
8020 else
8021 {
8022 unsigned long indx;
8023 struct elf_link_hash_entry *h;
8024
8025 /* An external symbol. */
8026 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
8027 h = elf_sym_hashes (abfd)[indx];
8028 BFD_ASSERT (h != NULL);
8029
8030 while (h->root.type == bfd_link_hash_indirect
8031 || h->root.type == bfd_link_hash_warning)
8032 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8033
8034 if (h->root.type != bfd_link_hash_defined
8035 && h->root.type != bfd_link_hash_defweak)
8036 /* This appears to be a reference to an undefined
8037 symbol. Just ignore it--it will be caught by the
8038 regular reloc processing. */
8039 return 0;
8040
8041 if (h->root.u.def.section->flags & SEC_MERGE)
8042 {
8043 sym_sec = h->root.u.def.section;
8044 symval = _bfd_merged_section_offset (abfd, &sym_sec, elf_section_data
8045 (sym_sec)->sec_info, h->root.u.def.value);
8046 symval = symval + sym_sec->output_section->vma
8047 + sym_sec->output_offset;
8048 }
8049 else
8050 symval = (h->root.u.def.value
8051 + h->root.u.def.section->output_section->vma
8052 + h->root.u.def.section->output_offset);
8053 addend = irel->r_addend;
8054 }
8055
8056 foff = symval + addend;
8057
8058 return foff;
8059}
8060
8061static bfd_vma
8062calculate_got_memory_address (bfd *abfd, struct bfd_link_info *link_info,
8063 Elf_Internal_Rela *irel,
8064 Elf_Internal_Shdr *symtab_hdr)
8065{
8066 int symndx;
8067 bfd_vma *local_got_offsets;
8068 /* Get the value of the symbol referred to by the reloc. */
8069 struct elf_link_hash_entry *h;
8070 struct elf_nds32_link_hash_table *htab = nds32_elf_hash_table (link_info);
8071
8072 /* An external symbol. */
8073 symndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
8074 h = elf_sym_hashes (abfd)[symndx];
8075 while (h->root.type == bfd_link_hash_indirect
8076 || h->root.type == bfd_link_hash_warning)
8077 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8078
8079 if (symndx >= 0)
8080 {
8081 BFD_ASSERT (h != NULL);
8082 return htab->sgot->output_section->vma + htab->sgot->output_offset
8083 + h->got.offset;
8084 }
8085 else
8086 {
8087 local_got_offsets = elf_local_got_offsets (abfd);
8088 BFD_ASSERT (local_got_offsets != NULL);
8089 return htab->sgot->output_section->vma + htab->sgot->output_offset
8090 + local_got_offsets[ELF32_R_SYM (irel->r_info)];
8091 }
8092
8093 /* The _GLOBAL_OFFSET_TABLE_ may be undefweak(or should be?). */
8094 /* The check of h->root.type is passed. */
8095}
8096
8097static int
8098is_16bit_NOP (bfd *abfd ATTRIBUTE_UNUSED,
8099 asection *sec, Elf_Internal_Rela *rel)
8100{
8101 bfd_byte *contents;
8102 unsigned short insn16;
8103
8104 if (!(rel->r_addend & R_NDS32_INSN16_CONVERT_FLAG))
8105 return FALSE;
8106 contents = elf_section_data (sec)->this_hdr.contents;
8107 insn16 = bfd_getb16 (contents + rel->r_offset);
8108 if (insn16 == NDS32_NOP16)
8109 return TRUE;
8110 return FALSE;
8111}
8112
8113/* It checks whether the instruction could be converted to
8114 16-bit form and returns the converted one.
8115
8116 `internal_relocs' is supposed to be sorted. */
8117
8118static int
8119is_convert_32_to_16 (bfd *abfd, asection *sec,
8120 Elf_Internal_Rela *reloc,
8121 Elf_Internal_Rela *internal_relocs,
8122 Elf_Internal_Rela *irelend,
8123 uint16_t *insn16)
8124{
8125#define NORMAL_32_TO_16 (1 << 0)
8126#define SPECIAL_32_TO_16 (1 << 1)
8127 bfd_byte *contents = NULL;
8128 bfd_signed_vma off;
8129 bfd_vma mem_addr;
8130 uint32_t insn = 0;
8131 Elf_Internal_Rela *pc_rel;
8132 int pic_ext_target = 0;
8133 Elf_Internal_Shdr *symtab_hdr;
8134 Elf_Internal_Sym *isymbuf = NULL;
8135 int convert_type;
8136 bfd_vma offset;
8137
8138 if (reloc->r_offset + 4 > sec->size)
8139 return FALSE;
8140
8141 offset = reloc->r_offset;
8142
8143 if (!nds32_get_section_contents (abfd, sec, &contents))
8144 return FALSE;
8145 insn = bfd_getb32 (contents + offset);
8146
8147 if (nds32_convert_32_to_16 (abfd, insn, insn16, NULL))
8148 convert_type = NORMAL_32_TO_16;
8149 else if (special_convert_32_to_16 (insn, insn16, reloc))
8150 convert_type = SPECIAL_32_TO_16;
8151 else
8152 return FALSE;
8153
8154 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8155 if (!nds32_get_local_syms (abfd, sec, &isymbuf))
8156 return FALSE;
8157
8158 /* Find the first relocation of the same relocation-type,
8159 so we iteratie them forward. */
8160 pc_rel = reloc;
1c8f6a4d 8161 while ((pc_rel - 1) >= internal_relocs && pc_rel[-1].r_offset == offset)
35c08157
KLC		 8162 pc_rel--;
8163
8164 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8165 {
8166 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8167 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8168 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA
8169 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8170 {
8171 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
8172 &pic_ext_target);
1c8f6a4d
KLC		 8173 if (off >= ACCURATE_8BIT_S1 || off < -ACCURATE_8BIT_S1
8174 || off == 0)
35c08157
KLC		 8175 return FALSE;
8176 break;
8177 }
8178 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8179 {
8180 /* movi => movi55 */
1c8f6a4d
KLC		 8181 mem_addr = calculate_memory_address (abfd, pc_rel, isymbuf,
8182 symtab_hdr);
8183 /* mem_addr is unsigned, but the value should
8184 be between [-16, 15]. */
35c08157
KLC		 8185 if ((mem_addr + 0x10) >> 5)
8186 return FALSE;
8187 break;
8188 }
1c8f6a4d
KLC		 8189 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_20)
8190 || (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_LO12))
8191 {
8192 /* It never happen movi to movi55 for R_NDS32_TLS_LE_20,
8193 because it can be relaxed to addi for TLS_LE_ADD. */
8194 return FALSE;
8195 }
35c08157
KLC		 8196 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8197 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8198 && (reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG)
8199 && convert_type == SPECIAL_32_TO_16)
8200 {
8201 /* fp-as-gp
8202 We've selected a best fp-base for this access, so we can
8203 always resolve it anyway. Do nothing. */
8204 break;
8205 }
8206 else if ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_NONE
8207 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_RELA_GNU_VTINHERIT))
8208 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_RELA_GNU_VTENTRY)
8209 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_INSN16))
8210 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_LOADSTORE)
8211 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_DWARF2_OP1_RELA)))
8212 {
1c8f6a4d
KLC		 8213 /* Prevent unresolved addi instruction translate
8214 to addi45 or addi333. */
35c08157
KLC		 8215 return FALSE;
8216 }
1c8f6a4d
KLC		 8217 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8218 {
8219 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
8220 &pic_ext_target);
8221 if (off >= ACCURATE_U9BIT_S1 || off <= 0)
8222 return FALSE;
8223 break;
8224 }
35c08157
KLC		 8225 }
8226
8227 return TRUE;
8228}
8229
8230static void
8231nds32_elf_write_16 (bfd *abfd ATTRIBUTE_UNUSED, bfd_byte *contents,
8232 Elf_Internal_Rela *reloc,
8233 Elf_Internal_Rela *internal_relocs,
8234 Elf_Internal_Rela *irelend,
8235 unsigned short insn16)
8236{
8237 Elf_Internal_Rela *pc_rel;
8238 bfd_vma offset;
8239
8240 offset = reloc->r_offset;
8241 bfd_putb16 (insn16, contents + offset);
8242 /* Find the first relocation of the same relocation-type,
8243 so we iteratie them forward. */
8244 pc_rel = reloc;
8245 while ((pc_rel - 1) > internal_relocs && pc_rel[-1].r_offset == offset)
8246 pc_rel--;
8247
8248 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8249 {
8250 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8251 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8252 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA)
8253 {
8254 pc_rel->r_info =
8255 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PCREL_RELA);
8256 }
8257 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8258 pc_rel->r_info =
8259 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PLTREL);
8260 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8261 pc_rel->r_info =
8262 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_5_RELA);
8263 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8264 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8265 pc_rel->r_info =
8266 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_SDA_FP7U2_RELA);
1c8f6a4d
KLC		 8267 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8268 pc_rel->r_info =
8269 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC		 8270 }
8271}
8272
8273/* Find a relocation of type specified by `reloc_type'
8274 of the same r_offset with reloc.
8275 If not found, return irelend.
8276
8277 Assuming relocations are sorted by r_offset,
8278 we find the relocation from `reloc' backward untill relocs,
8279 or find it from `reloc' forward untill irelend. */
8280
8281static Elf_Internal_Rela *
8282find_relocs_at_address (Elf_Internal_Rela *reloc,
8283 Elf_Internal_Rela *relocs,
8284 Elf_Internal_Rela *irelend,
8285 enum elf_nds32_reloc_type reloc_type)
8286{
8287 Elf_Internal_Rela *rel_t;
8288
8289 /* Find backward. */
8290 for (rel_t = reloc;
8291 rel_t >= relocs && rel_t->r_offset == reloc->r_offset;
8292 rel_t--)
8293 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8294 return rel_t;
8295
1c8f6a4d 8296 /* We didn't find it backward. Try find it forward. */
35c08157
KLC		 8297 for (rel_t = reloc;
8298 rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8299 rel_t++)
8300 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8301 return rel_t;
8302
8303 return irelend;
8304}
8305
8306/* Find a relocation of specified type and offset.
8307 `reloc' is just a refence point to find a relocation at specified offset.
8308 If not found, return irelend.
8309
8310 Assuming relocations are sorted by r_offset,
8311 we find the relocation from `reloc' backward untill relocs,
8312 or find it from `reloc' forward untill irelend. */
8313
8314static Elf_Internal_Rela *
8315find_relocs_at_address_addr (Elf_Internal_Rela *reloc,
8316 Elf_Internal_Rela *relocs,
8317 Elf_Internal_Rela *irelend,
8318 unsigned char reloc_type,
8319 bfd_vma offset_p)
8320{
8321 Elf_Internal_Rela *rel_t = NULL;
8322
8323 /* First, we try to find a relocation of offset `offset_p',
8324 and then we use find_relocs_at_address to find specific type. */
8325
8326 if (reloc->r_offset > offset_p)
8327 {
8328 /* Find backward. */
8329 for (rel_t = reloc;
8330 rel_t >= relocs && rel_t->r_offset > offset_p; rel_t--)
8331 /* Do nothing. */;
8332 }
8333 else if (reloc->r_offset < offset_p)
8334 {
8335 /* Find forward. */
8336 for (rel_t = reloc;
8337 rel_t < irelend && rel_t->r_offset < offset_p; rel_t++)
8338 /* Do nothing. */;
8339 }
8340 else
8341 rel_t = reloc;
8342
8343 /* Not found? */
8344 if (rel_t < relocs || rel_t == irelend || rel_t->r_offset != offset_p)
8345 return irelend;
8346
8347 return find_relocs_at_address (rel_t, relocs, irelend, reloc_type);
8348}
8349
8350static bfd_boolean
8351nds32_elf_check_dup_relocs (Elf_Internal_Rela *reloc,
8352 Elf_Internal_Rela *internal_relocs,
8353 Elf_Internal_Rela *irelend,
8354 unsigned char reloc_type)
8355{
8356 Elf_Internal_Rela *rel_t;
8357
8358 for (rel_t = reloc;
8359 rel_t >= internal_relocs && rel_t->r_offset == reloc->r_offset;
8360 rel_t--)
8361 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8362 {
8363 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8364 && rel_t->r_addend == reloc->r_addend)
8365 continue;
8366 return TRUE;
8367 }
8368
8369 for (rel_t = reloc; rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8370 rel_t++)
8371 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8372 {
8373 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8374 && rel_t->r_addend == reloc->r_addend)
8375 continue;
8376 return TRUE;
8377 }
8378
8379 return FALSE;
8380}
8381
8382typedef struct nds32_elf_blank nds32_elf_blank_t;
8383struct nds32_elf_blank
8384{
8385 /* Where the blank begins. */
8386 bfd_vma offset;
8387 /* The size of the blank. */
8388 bfd_vma size;
8389 /* The accumulative size before this blank. */
8390 bfd_vma total_size;
8391 nds32_elf_blank_t *next;
8392 nds32_elf_blank_t *prev;
8393};
8394
8395static nds32_elf_blank_t *blank_free_list = NULL;
8396
8397static nds32_elf_blank_t *
8398create_nds32_elf_blank (bfd_vma offset_p, bfd_vma size_p)
8399{
8400 nds32_elf_blank_t *blank_t;
8401
8402 if (blank_free_list)
8403 {
8404 blank_t = blank_free_list;
8405 blank_free_list = blank_free_list->next;
8406 }
8407 else
8408 blank_t = bfd_malloc (sizeof (nds32_elf_blank_t));
8409
8410 if (blank_t == NULL)
8411 return NULL;
8412
8413 blank_t->offset = offset_p;
8414 blank_t->size = size_p;
8415 blank_t->total_size = 0;
8416 blank_t->next = NULL;
8417 blank_t->prev = NULL;
8418
8419 return blank_t;
8420}
8421
8422static void
8423remove_nds32_elf_blank (nds32_elf_blank_t *blank_p)
8424{
8425 if (blank_free_list)
8426 {
8427 blank_free_list->prev = blank_p;
8428 blank_p->next = blank_free_list;
8429 }
8430 else
8431 blank_p->next = NULL;
8432
8433 blank_p->prev = NULL;
8434 blank_free_list = blank_p;
8435}
8436
8437static void
8438clean_nds32_elf_blank (void)
8439{
8440 nds32_elf_blank_t *blank_t;
8441
8442 while (blank_free_list)
8443 {
8444 blank_t = blank_free_list;
8445 blank_free_list = blank_free_list->next;
8446 free (blank_t);
8447 }
8448}
8449
8450static nds32_elf_blank_t *
8451search_nds32_elf_blank (nds32_elf_blank_t *blank_p, bfd_vma addr)
8452{
8453 nds32_elf_blank_t *blank_t;
8454
8455 if (!blank_p)
8456 return NULL;
8457 blank_t = blank_p;
8458
8459 while (blank_t && addr < blank_t->offset)
8460 blank_t = blank_t->prev;
8461 while (blank_t && blank_t->next && addr >= blank_t->next->offset)
8462 blank_t = blank_t->next;
8463
8464 return blank_t;
8465}
8466
8467static bfd_vma
8468get_nds32_elf_blank_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8469 int overwrite)
8470{
8471 nds32_elf_blank_t *blank_t;
8472
8473 blank_t = search_nds32_elf_blank (*blank_p, addr);
8474 if (!blank_t)
8475 return 0;
8476
8477 if (overwrite)
8478 *blank_p = blank_t;
8479
8480 if (addr < blank_t->offset + blank_t->size)
8481 return blank_t->total_size + (addr - blank_t->offset);
8482 else
8483 return blank_t->total_size + blank_t->size;
8484}
8485
8486static bfd_boolean
8487insert_nds32_elf_blank (nds32_elf_blank_t **blank_p, bfd_vma addr, bfd_vma len)
8488{
8489 nds32_elf_blank_t *blank_t, *blank_t2;
8490
8491 if (!*blank_p)
8492 {
8493 *blank_p = create_nds32_elf_blank (addr, len);
8494 return *blank_p ? TRUE : FALSE;
8495 }
8496
8497 blank_t = search_nds32_elf_blank (*blank_p, addr);
8498
8499 if (blank_t == NULL)
8500 {
8501 blank_t = create_nds32_elf_blank (addr, len);
8502 if (!blank_t)
8503 return FALSE;
8504 while ((*blank_p)->prev != NULL)
8505 *blank_p = (*blank_p)->prev;
8506 blank_t->next = *blank_p;
8507 (*blank_p)->prev = blank_t;
8508 (*blank_p) = blank_t;
8509 return TRUE;
8510 }
8511
8512 if (addr < blank_t->offset + blank_t->size)
8513 {
8514 if (addr > blank_t->offset + blank_t->size)
8515 blank_t->size = addr - blank_t->offset;
8516 }
8517 else
8518 {
8519 blank_t2 = create_nds32_elf_blank (addr, len);
8520 if (!blank_t2)
8521 return FALSE;
8522 if (blank_t->next)
8523 {
8524 blank_t->next->prev = blank_t2;
8525 blank_t2->next = blank_t->next;
8526 }
8527 blank_t2->prev = blank_t;
8528 blank_t->next = blank_t2;
8529 *blank_p = blank_t2;
8530 }
8531
8532 return TRUE;
8533}
8534
8535static bfd_boolean
8536insert_nds32_elf_blank_recalc_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8537 bfd_vma len)
8538{
8539 nds32_elf_blank_t *blank_t;
8540
8541 if (!insert_nds32_elf_blank (blank_p, addr, len))
8542 return FALSE;
8543
8544 blank_t = *blank_p;
8545
8546 if (!blank_t->prev)
8547 {
8548 blank_t->total_size = 0;
8549 blank_t = blank_t->next;
8550 }
8551
8552 while (blank_t)
8553 {
8554 blank_t->total_size = blank_t->prev->total_size + blank_t->prev->size;
8555 blank_t = blank_t->next;
8556 }
8557
8558 return TRUE;
8559}
8560
8561static void
8562calc_nds32_blank_total (nds32_elf_blank_t *blank_p)
8563{
8564 nds32_elf_blank_t *blank_t;
8565 bfd_vma total_size = 0;
8566
8567 if (!blank_p)
8568 return;
8569
8570 blank_t = blank_p;
8571 while (blank_t->prev)
8572 blank_t = blank_t->prev;
8573 while (blank_t)
8574 {
8575 blank_t->total_size = total_size;
8576 total_size += blank_t->size;
8577 blank_t = blank_t->next;
8578 }
8579}
8580
8581static bfd_boolean
8582nds32_elf_relax_delete_blanks (bfd *abfd, asection *sec,
8583 nds32_elf_blank_t *blank_p)
8584{
8585 Elf_Internal_Shdr *symtab_hdr; /* Symbol table header of this bfd. */
1c8f6a4d 8586 Elf_Internal_Sym *isym = NULL; /* Symbol table of this bfd. */
35c08157
KLC		 8587 Elf_Internal_Sym *isymend; /* Symbol entry iterator. */
8588 unsigned int sec_shndx; /* The section the be relaxed. */
8589 bfd_byte *contents; /* Contents data of iterating section. */
8590 Elf_Internal_Rela *internal_relocs;
8591 Elf_Internal_Rela *irel;
8592 Elf_Internal_Rela *irelend;
8593 struct elf_link_hash_entry **sym_hashes;
8594 struct elf_link_hash_entry **end_hashes;
8595 unsigned int symcount;
8596 asection *sect;
8597 nds32_elf_blank_t *blank_t;
8598 nds32_elf_blank_t *blank_t2;
8599 nds32_elf_blank_t *blank_head;
8600
8601 blank_head = blank_t = blank_p;
8602 while (blank_head->prev != NULL)
8603 blank_head = blank_head->prev;
8604 while (blank_t->next != NULL)
8605 blank_t = blank_t->next;
8606
8607 if (blank_t->offset + blank_t->size <= sec->size)
8608 {
8609 blank_t->next = create_nds32_elf_blank (sec->size + 4, 0);
8610 blank_t->next->prev = blank_t;
8611 }
8612 if (blank_head->offset > 0)
8613 {
8614 blank_head->prev = create_nds32_elf_blank (0, 0);
8615 blank_head->prev->next = blank_head;
8616 blank_head = blank_head->prev;
8617 }
8618
8619 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
8620
8621 /* The deletion must stop at the next ALIGN reloc for an alignment
8622 power larger than the number of bytes we are deleting. */
8623
8624 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8625 if (!nds32_get_local_syms (abfd, sec, &isym))
8626 return FALSE;
8627
8628 if (isym == NULL)
8629 {
8630 isym = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8631 symtab_hdr->sh_info, 0, NULL, NULL, NULL);
8632 symtab_hdr->contents = (bfd_byte *) isym;
8633 }
8634
8635 if (isym == NULL || symtab_hdr->sh_info == 0)
8636 return FALSE;
8637
8638 blank_t = blank_head;
8639 calc_nds32_blank_total (blank_head);
8640
8641 for (sect = abfd->sections; sect != NULL; sect = sect->next)
8642 {
8643 /* Adjust all the relocs. */
8644
8645 /* Relocations MUST be kept in memory, because relaxation adjust them. */
8646 internal_relocs = _bfd_elf_link_read_relocs (abfd, sect, NULL, NULL,
8647 TRUE /* keep_memory */);
8648 irelend = internal_relocs + sect->reloc_count;
8649
8650 blank_t = blank_head;
8651 blank_t2 = blank_head;
8652
8653 if (!(sect->flags & SEC_RELOC))
8654 continue;
8655
8656 nds32_get_section_contents (abfd, sect, &contents);
8657
8658 for (irel = internal_relocs; irel < irelend; irel++)
8659 {
8660 bfd_vma raddr;
8661
8662 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_DIFF8
8663 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_DIFF32
8664 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8665 {
8666 unsigned long val = 0;
1c8f6a4d
KLC		 8667 unsigned long mask;
8668 long before, between;
8669 long offset;
35c08157
KLC		 8670
8671 switch (ELF32_R_TYPE (irel->r_info))
8672 {
8673 case R_NDS32_DIFF8:
1c8f6a4d 8674 offset = bfd_get_8 (abfd, contents + irel->r_offset);
35c08157
KLC		 8675 break;
8676 case R_NDS32_DIFF16:
1c8f6a4d 8677 offset = bfd_get_16 (abfd, contents + irel->r_offset);
35c08157
KLC		 8678 break;
8679 case R_NDS32_DIFF32:
8680 val = bfd_get_32 (abfd, contents + irel->r_offset);
1c8f6a4d
KLC		 8681 /* Get the signed bit and mask for the high part. The
8682 gcc will alarm when right shift 32-bit since the
8683 type size of long may be 32-bit. */
8684 mask = 0 - (val >> 31);
8685 if (mask)
8686 offset = (val | (mask - 0xffffffff));
8687 else
8688 offset = val;
35c08157
KLC		 8689 break;
8690 default:
8691 BFD_ASSERT (0);
8692 }
8693
8694 /* DIFF value
8695 0 |encoded in location|
8696 |------------|-------------------|---------
8697 sym+off(addend)
8698 -- before ---| *****************
8699 --------------------- between ---|
8700
1c8f6a4d
KLC		 8701 We only care how much data are relax between DIFF,
8702 marked as ***. */
35c08157
KLC		 8703
8704 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC		 8705 between = get_nds32_elf_blank_total (&blank_t,
8706 irel->r_addend + offset, 0);
35c08157
KLC		 8707 if (between == before)
8708 goto done_adjust_diff;
8709
8710 switch (ELF32_R_TYPE (irel->r_info))
8711 {
8712 case R_NDS32_DIFF8:
1c8f6a4d
KLC		 8713 bfd_put_8 (abfd, offset - (between - before),
8714 contents + irel->r_offset);
35c08157
KLC		 8715 break;
8716 case R_NDS32_DIFF16:
1c8f6a4d
KLC		 8717 bfd_put_16 (abfd, offset - (between - before),
8718 contents + irel->r_offset);
35c08157
KLC		 8719 break;
8720 case R_NDS32_DIFF32:
1c8f6a4d
KLC		 8721 bfd_put_32 (abfd, offset - (between - before),
8722 contents + irel->r_offset);
35c08157
KLC		 8723 break;
8724 }
8725 }
8726 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_DIFF_ULEB128
8727 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8728 {
8729 bfd_vma val = 0;
8730 unsigned int len = 0;
8731 unsigned long before, between;
8732 bfd_byte *endp, *p;
8733
1c8f6a4d
KLC		 8734 val = read_unsigned_leb128 (abfd, contents + irel->r_offset,
8735 &len);
35c08157
KLC		 8736
8737 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC		 8738 between = get_nds32_elf_blank_total (&blank_t,
8739 irel->r_addend + val, 0);
35c08157
KLC		 8740 if (between == before)
8741 goto done_adjust_diff;
8742
8743 p = contents + irel->r_offset;
8744 endp = p + len -1;
8745 memset (p, 0x80, len);
8746 *(endp) = 0;
8747 p = write_uleb128 (p, val - (between - before)) - 1;
8748 if (p < endp)
8749 *p |= 0x80;
8750 }
8751done_adjust_diff:
8752
8753 if (sec == sect)
8754 {
8755 raddr = irel->r_offset;
1c8f6a4d
KLC		 8756 irel->r_offset -= get_nds32_elf_blank_total (&blank_t2,
8757 irel->r_offset, 1);
35c08157
KLC		 8758
8759 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
8760 continue;
8761 if (blank_t2 && blank_t2->next
1c8f6a4d
KLC		 8762 && (blank_t2->offset > raddr
8763 || blank_t2->next->offset <= raddr))
8764 (*_bfd_error_handler)
8765 (_("%B: %s\n"), abfd,
8766 "Error: search_nds32_elf_blank reports wrong node");
35c08157
KLC		 8767
8768 /* Mark reloc in deleted portion as NONE.
8769 For some relocs like R_NDS32_LABEL that doesn't modify the
8770 content in the section. R_NDS32_LABEL doesn't belong to the
8771 instruction in the section, so we should preserve it. */
8772 if (raddr >= blank_t2->offset
8773 && raddr < blank_t2->offset + blank_t2->size
8774 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL
8775 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_BEGIN
8776 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
8777 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
8778 && ELF32_R_TYPE (irel->r_info) != R_NDS32_SUBTRAHEND
8779 && ELF32_R_TYPE (irel->r_info) != R_NDS32_MINUEND)
8780 {
8781 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
8782 R_NDS32_NONE);
8783 continue;
8784 }
8785 }
8786
8787 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE
8788 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
8789 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
8790 continue;
8791
8792 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info
8793 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx
8794 && ELF_ST_TYPE (isym[ELF32_R_SYM (irel->r_info)].st_info) == STT_SECTION)
8795 {
8796 if (irel->r_addend <= sec->size)
8797 irel->r_addend -=
8798 get_nds32_elf_blank_total (&blank_t, irel->r_addend, 1);
8799 }
8800 }
8801 }
8802
8803 /* Adjust the local symbols defined in this section. */
8804 blank_t = blank_head;
8805 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
8806 {
8807 if (isym->st_shndx == sec_shndx)
8808 {
8809 if (isym->st_value <= sec->size)
8810 {
8811 bfd_vma ahead;
8812 bfd_vma orig_addr = isym->st_value;
8813
8814 ahead = get_nds32_elf_blank_total (&blank_t, isym->st_value, 1);
8815 isym->st_value -= ahead;
8816
8817 /* Adjust function size. */
1c8f6a4d
KLC		 8818 if (ELF32_ST_TYPE (isym->st_info) == STT_FUNC
8819 && isym->st_size > 0)
8820 isym->st_size -=
8821 get_nds32_elf_blank_total
8822 (&blank_t, orig_addr + isym->st_size, 0) - ahead;
35c08157
KLC		 8823 }
8824 }
8825 }
8826
8827 /* Now adjust the global symbols defined in this section. */
8828 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
8829 - symtab_hdr->sh_info);
8830 sym_hashes = elf_sym_hashes (abfd);
8831 end_hashes = sym_hashes + symcount;
8832 blank_t = blank_head;
8833 for (; sym_hashes < end_hashes; sym_hashes++)
8834 {
8835 struct elf_link_hash_entry *sym_hash = *sym_hashes;
8836
8837 if ((sym_hash->root.type == bfd_link_hash_defined
8838 || sym_hash->root.type == bfd_link_hash_defweak)
8839 && sym_hash->root.u.def.section == sec)
8840 {
8841 if (sym_hash->root.u.def.value <= sec->size)
8842 {
8843 bfd_vma ahead;
8844 bfd_vma orig_addr = sym_hash->root.u.def.value;
8845
8846 ahead = get_nds32_elf_blank_total (&blank_t, sym_hash->root.u.def.value, 1);
8847 sym_hash->root.u.def.value -= ahead;
8848
8849 /* Adjust function size. */
8850 if (sym_hash->type == STT_FUNC)
1c8f6a4d
KLC		 8851 sym_hash->size -=
8852 get_nds32_elf_blank_total
8853 (&blank_t, orig_addr + sym_hash->size, 0) - ahead;
35c08157
KLC		 8854
8855 }
8856 }
8857 }
8858
8859 contents = elf_section_data (sec)->this_hdr.contents;
8860 blank_t = blank_head;
8861 while (blank_t->next)
8862 {
8863 /* Actually delete the bytes. */
8864
8865 /* If current blank is the last blank overlap with current section,
8866 go to finish process. */
8867 if (sec->size <= (blank_t->next->offset))
8868 break;
8869
8870 memmove (contents + blank_t->offset - blank_t->total_size,
8871 contents + blank_t->offset + blank_t->size,
8872 blank_t->next->offset - (blank_t->offset + blank_t->size));
8873
8874 blank_t = blank_t->next;
8875 }
8876
8877 if (sec->size > (blank_t->offset + blank_t->size))
8878 {
8879 /* There are remaining code between blank and section boundary.
8880 Move the remaining code to appropriate location. */
8881 memmove (contents + blank_t->offset - blank_t->total_size,
8882 contents + blank_t->offset + blank_t->size,
8883 sec->size - (blank_t->offset + blank_t->size));
8884 sec->size -= blank_t->total_size + blank_t->size;
8885 }
8886 else
8887 /* This blank is not entirely included in the section,
8888 reduce the section size by only part of the blank size. */
8889 sec->size -= blank_t->total_size + (sec->size - blank_t->offset);
8890
8891 while (blank_head)
8892 {
8893 blank_t = blank_head;
8894 blank_head = blank_head->next;
8895 remove_nds32_elf_blank (blank_t);
8896 }
8897
8898 return TRUE;
8899}
8900
8901/* Get the contents of a section. */
8902
8903static int
8904nds32_get_section_contents (bfd *abfd, asection *sec, bfd_byte **contents_p)
8905{
8906 /* Get the section contents. */
8907 if (elf_section_data (sec)->this_hdr.contents != NULL)
8908 *contents_p = elf_section_data (sec)->this_hdr.contents;
8909 else
8910 {
8911 if (!bfd_malloc_and_get_section (abfd, sec, contents_p))
8912 return FALSE;
8913 elf_section_data (sec)->this_hdr.contents = *contents_p;
8914 }
8915
8916 return TRUE;
8917}
8918
8919/* Get the contents of the internal symbol of abfd. */
8920
8921static int
8922nds32_get_local_syms (bfd *abfd, asection *sec ATTRIBUTE_UNUSED,
8923 Elf_Internal_Sym **isymbuf_p)
8924{
8925 Elf_Internal_Shdr *symtab_hdr;
8926 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8927
8928 /* Read this BFD's local symbols if we haven't done so already. */
8929 if (*isymbuf_p == NULL && symtab_hdr->sh_info != 0)
8930 {
8931 *isymbuf_p = (Elf_Internal_Sym *) symtab_hdr->contents;
8932 if (*isymbuf_p == NULL)
8933 {
8934 *isymbuf_p = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8935 symtab_hdr->sh_info, 0,
8936 NULL, NULL, NULL);
8937 if (*isymbuf_p == NULL)
8938 return FALSE;
8939 }
8940 }
8941 symtab_hdr->contents = (bfd_byte *) (*isymbuf_p);
8942
8943 return TRUE;
8944}
8945
8946/* Range of small data. */
1c8f6a4d
KLC		 8947static bfd_vma sdata_range[2][2];
8948static bfd_vma const sdata_init_range[2] =
8949{ ACCURATE_12BIT_S1, ACCURATE_19BIT };
35c08157
KLC		 8950
8951static int
8952nds32_elf_insn_size (bfd *abfd ATTRIBUTE_UNUSED,
8953 bfd_byte *contents, bfd_vma addr)
8954{
8955 unsigned long insn = bfd_getb32 (contents + addr);
8956
8957 if (insn & 0x80000000)
8958 return 2;
8959
8960 return 4;
8961}
8962
8963/* Set the gp relax range. We have to measure the safe range
8964 to do gp relaxation. */
8965
8966static void
8967relax_range_measurement (bfd *abfd)
8968{
8969 asection *sec_f, *sec_b;
8970 /* For upper bound. */
8971 bfd_vma maxpgsz = get_elf_backend_data (abfd)->maxpagesize;
8972 bfd_vma align;
35c08157
KLC		 8973 static int decide_relax_range = 0;
8974 int i;
1c8f6a4d 8975 int range_number = sizeof (sdata_init_range) / sizeof (sdata_init_range[0]);
35c08157
KLC		 8976
8977 if (decide_relax_range)
8978 return;
8979 decide_relax_range = 1;
8980
8981 if (sda_rela_sec == NULL)
8982 {
8983 /* Since there is no data sections, we assume the range is page size. */
1c8f6a4d 8984 for (i = 0; i < range_number; i++)
35c08157
KLC		 8985 {
8986 sdata_range[i][0] = sdata_init_range[i] - 0x1000;
8987 sdata_range[i][1] = sdata_init_range[i] - 0x1000;
8988 }
8989 return;
8990 }
8991
8992 /* Get the biggest alignment power after the gp located section. */
8993 sec_f = sda_rela_sec->output_section;
8994 sec_b = sec_f->next;
8995 align = 0;
8996 while (sec_b != NULL)
8997 {
8998 if ((unsigned)(1 << sec_b->alignment_power) > align)
8999 align = (1 << sec_b->alignment_power);
9000 sec_b = sec_b->next;
9001 }
9002
9003 /* I guess we can not determine the section before
9004 gp located section, so we assume the align is max page size. */
1c8f6a4d 9005 for (i = 0; i < range_number; i++)
35c08157 9006 {
1c8f6a4d 9007 sdata_range[i][1] = sdata_init_range[i] - align;
35c08157 9008 BFD_ASSERT (sdata_range[i][1] <= sdata_init_range[i]);
1c8f6a4d 9009 sdata_range[i][0] = sdata_init_range[i] - maxpgsz;
35c08157
KLC		 9010 BFD_ASSERT (sdata_range[i][0] <= sdata_init_range[i]);
9011 }
9012}
9013
9014/* These are macros used to check flags encoded in r_addend.
9015 They are only used by nds32_elf_relax_section (). */
9016#define GET_SEQ_LEN(addend) ((addend) & 0x000000ff)
9017#define IS_1ST_CONVERT(addend) ((addend) & 0x80000000)
9018#define IS_OPTIMIZE(addend) ((addend) & 0x40000000)
9019#define IS_16BIT_ON(addend) ((addend) & 0x20000000)
9020
1c8f6a4d
KLC		 9021/* Relax LONGCALL1 relocation for nds32_elf_relax_section. */
9022
35c08157 9023static bfd_boolean
1c8f6a4d
KLC		 9024nds32_elf_relax_longcall1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9025 Elf_Internal_Rela *internal_relocs, int *insn_len,
9026 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9027 Elf_Internal_Shdr *symtab_hdr)
9028{
9029 /* There are 3 variations for LONGCALL1
9030 case 4-4-2; 16-bit on, optimize off or optimize for space
9031 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9032 ori ta, ta, lo12(symbol) ; LO12S0
9033 jral5 ta ;
9034
9035 case 4-4-4; 16-bit off, optimize don't care
9036 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9037 ori ta, ta, lo12(symbol) ; LO12S0
9038 jral ta ;
9039
9040 case 4-4-4; 16-bit on, optimize for speed
9041 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9042 ori ta, ta, lo12(symbol) ; LO12S0
9043 jral ta ;
9044 Check code for -mlong-calls output. */
9045
9046 /* Get the reloc for the address from which the register is
9047 being loaded. This reloc will tell us which function is
9048 actually being called. */
9049
9050 bfd_vma laddr;
9051 int seq_len; /* Original length of instruction sequence. */
35c08157 9052 uint32_t insn;
1c8f6a4d
KLC		 9053 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9054 int pic_ext_target = 0;
9055 bfd_signed_vma foff;
35c08157 9056 uint16_t insn16;
35c08157 9057
1c8f6a4d
KLC		 9058 irelend = internal_relocs + sec->reloc_count;
9059 seq_len = GET_SEQ_LEN (irel->r_addend);
9060 laddr = irel->r_offset;
9061 *insn_len = seq_len;
35c08157 9062
1c8f6a4d
KLC		 9063 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9064 R_NDS32_HI20_RELA, laddr);
9065 lo_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9066 R_NDS32_LO12S0_ORI_RELA,
9067 laddr + 4);
35c08157 9068
1c8f6a4d 9069 if (hi_irelfn == irelend || lo_irelfn == irelend)
35c08157
KLC		 9070 {
9071 (*_bfd_error_handler)
1c8f6a4d
KLC		 9072 ("%B: warning: R_NDS32_LONGCALL1 points to unrecognized"
9073 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9074 return FALSE;
35c08157
KLC		 9075 }
9076
1c8f6a4d
KLC		 9077 /* Get the value of the symbol referred to by the reloc. */
9078 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9079 &pic_ext_target);
35c08157 9080
1c8f6a4d
KLC		 9081 /* This condition only happened when symbol is undefined. */
9082 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9083 || foff >= CONSERVATIVE_24BIT_S1)
9084 return FALSE;
35c08157 9085
1c8f6a4d
KLC		 9086 /* Relax to: jal symbol; 25_PCREL */
9087 /* For simplicity of coding, we are going to modify the section
9088 contents, the section relocs, and the BFD symbol table. We
9089 must tell the rest of the code not to free up this
9090 information. It would be possible to instead create a table
9091 of changes which have to be made, as is done in coff-mips.c;
9092 that would be more work, but would require less memory when
9093 the linker is run. */
9094
9095 /* Replace the long call with a jal. */
9096 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9097 R_NDS32_25_PCREL_RELA);
9098 irel->r_addend = hi_irelfn->r_addend;
9099
9100 /* We don't resolve this here but resolve it in relocate_section. */
9101 insn = INSN_JAL;
9102 bfd_putb32 (insn, contents + irel->r_offset);
9103
9104 hi_irelfn->r_info =
9105 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9106 lo_irelfn->r_info =
9107 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9108 *insn_len = 4;
9109
9110 if (seq_len & 0x2)
9111 {
9112 insn16 = NDS32_NOP16;
9113 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9114 lo_irelfn->r_info =
9115 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9116 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9117 *insn_len += 2;
9118 }
9119 return TRUE;
9120}
35c08157 9121
1c8f6a4d
KLC		 9122#define CONVERT_CONDITION_CALL(insn) (((insn) & 0xffff0000) ^ 0x90000)
9123/* Relax LONGCALL2 relocation for nds32_elf_relax_section. */
35c08157 9124
1c8f6a4d
KLC		 9125static bfd_boolean
9126nds32_elf_relax_longcall2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9127 Elf_Internal_Rela *internal_relocs, int *insn_len,
9128 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9129 Elf_Internal_Shdr *symtab_hdr)
9130{
9131 /* bltz rt, .L1 ; LONGCALL2
9132 jal symbol ; 25_PCREL
9133 .L1: */
35c08157 9134
1c8f6a4d
KLC		 9135 /* Get the reloc for the address from which the register is
9136 being loaded. This reloc will tell us which function is
9137 actually being called. */
35c08157 9138
1c8f6a4d
KLC		 9139 bfd_vma laddr;
9140 uint32_t insn;
9141 Elf_Internal_Rela *i1_irelfn, *cond_irelfn, *irelend;
9142 int pic_ext_target = 0;
9143 bfd_signed_vma foff;
35c08157 9144
1c8f6a4d
KLC		 9145 irelend = internal_relocs + sec->reloc_count;
9146 laddr = irel->r_offset;
9147 i1_irelfn =
9148 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9149 R_NDS32_25_PCREL_RELA, laddr + 4);
9150
9151 if (i1_irelfn == irelend)
35c08157 9152 {
1c8f6a4d
KLC		 9153 (*_bfd_error_handler)
9154 ("%B: warning: R_NDS32_LONGCALL2 points to unrecognized"
9155 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9156 return FALSE;
35c08157
KLC		 9157 }
9158
1c8f6a4d 9159 insn = bfd_getb32 (contents + laddr);
35c08157 9160
1c8f6a4d
KLC		 9161 /* Get the value of the symbol referred to by the reloc. */
9162 foff = calculate_offset (abfd, sec, i1_irelfn, isymbuf, symtab_hdr,
9163 &pic_ext_target);
35c08157 9164
1c8f6a4d
KLC		 9165 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9166 || foff >= CONSERVATIVE_16BIT_S1)
9167 return FALSE;
35c08157 9168
1c8f6a4d
KLC		 9169 /* Relax to bgezal rt, label ; 17_PCREL
9170 or bltzal rt, label ; 17_PCREL */
9171
9172 /* Convert to complimentary conditional call. */
9173 insn = CONVERT_CONDITION_CALL (insn);
9174
9175 /* For simplicity of coding, we are going to modify the section
9176 contents, the section relocs, and the BFD symbol table. We
9177 must tell the rest of the code not to free up this
9178 information. It would be possible to instead create a table
9179 of changes which have to be made, as is done in coff-mips.c;
9180 that would be more work, but would require less memory when
9181 the linker is run. */
9182
9183 /* Clean unnessary relocations. */
9184 i1_irelfn->r_info =
9185 ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), R_NDS32_NONE);
9186 cond_irelfn =
9187 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9188 R_NDS32_17_PCREL_RELA, laddr);
9189 if (cond_irelfn != irelend)
9190 cond_irelfn->r_info =
9191 ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info), R_NDS32_NONE);
9192
9193 /* Replace the long call with a bgezal. */
9194 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info),
9195 R_NDS32_17_PCREL_RELA);
9196 irel->r_addend = i1_irelfn->r_addend;
9197
9198 bfd_putb32 (insn, contents + irel->r_offset);
9199
9200 *insn_len = 4;
9201 return TRUE;
9202}
35c08157 9203
1c8f6a4d
KLC		 9204/* Relax LONGCALL3 relocation for nds32_elf_relax_section. */
9205
9206static bfd_boolean
9207nds32_elf_relax_longcall3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9208 Elf_Internal_Rela *internal_relocs, int *insn_len,
9209 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9210 Elf_Internal_Shdr *symtab_hdr)
9211{
9212 /* There are 3 variations for LONGCALL3
9213 case 4-4-4-2; 16-bit on, optimize off or optimize for space
9214 bltz rt, $1 ; LONGCALL3
9215 sethi ta, hi20(symbol) ; HI20
9216 ori ta, ta, lo12(symbol) ; LO12S0
9217 jral5 ta ;
9218 $1
9219
9220 case 4-4-4-4; 16-bit off, optimize don't care
9221 bltz rt, $1 ; LONGCALL3
9222 sethi ta, hi20(symbol) ; HI20
9223 ori ta, ta, lo12(symbol) ; LO12S0
9224 jral ta ;
9225 $1
9226
9227 case 4-4-4-4; 16-bit on, optimize for speed
9228 bltz rt, $1 ; LONGCALL3
9229 sethi ta, hi20(symbol) ; HI20
9230 ori ta, ta, lo12(symbol) ; LO12S0
9231 jral ta ;
9232 $1 */
9233
9234 /* Get the reloc for the address from which the register is
9235 being loaded. This reloc will tell us which function is
9236 actually being called. */
9237
9238 bfd_vma laddr;
9239 int seq_len; /* Original length of instruction sequence. */
9240 uint32_t insn;
9241 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9242 int pic_ext_target = 0;
9243 bfd_signed_vma foff;
9244 uint16_t insn16;
9245
9246 irelend = internal_relocs + sec->reloc_count;
9247 seq_len = GET_SEQ_LEN (irel->r_addend);
9248 laddr = irel->r_offset;
9249 *insn_len = seq_len;
9250
9251 hi_irelfn =
9252 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9253 R_NDS32_HI20_RELA, laddr + 4);
9254 lo_irelfn =
9255 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9256 R_NDS32_LO12S0_ORI_RELA, laddr + 8);
9257
9258 if (hi_irelfn == irelend || lo_irelfn == irelend)
9259 {
9260 (*_bfd_error_handler)
9261 ("%B: warning: R_NDS32_LONGCALL3 points to unrecognized"
9262 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9263 return FALSE;
35c08157
KLC		 9264 }
9265
1c8f6a4d
KLC		 9266 /* Get the value of the symbol referred to by the reloc. */
9267 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9268 &pic_ext_target);
35c08157 9269
1c8f6a4d
KLC		 9270 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9271 || foff >= CONSERVATIVE_24BIT_S1)
9272 return FALSE;
35c08157 9273
1c8f6a4d
KLC		 9274 insn = bfd_getb32 (contents + laddr);
9275 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
35c08157 9276 {
1c8f6a4d
KLC		 9277 /* Relax to bgezal rt, label ; 17_PCREL
9278 or bltzal rt, label ; 17_PCREL */
35c08157 9279
1c8f6a4d
KLC		 9280 /* Convert to complimentary conditional call. */
9281 insn = CONVERT_CONDITION_CALL (insn);
9282 bfd_putb32 (insn, contents + irel->r_offset);
35c08157 9283
1c8f6a4d
KLC		 9284 *insn_len = 4;
9285 irel->r_info =
9286 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9287 hi_irelfn->r_info =
9288 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9289 lo_irelfn->r_info =
9290 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9291
9292 cond_irelfn =
9293 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9294 R_NDS32_17_PCREL_RELA, laddr);
9295 if (cond_irelfn != irelend)
35c08157 9296 {
1c8f6a4d
KLC		 9297 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9298 R_NDS32_17_PCREL_RELA);
9299 cond_irelfn->r_addend = hi_irelfn->r_addend;
35c08157 9300 }
1c8f6a4d
KLC		 9301
9302 if (seq_len & 0x2)
35c08157 9303 {
1c8f6a4d
KLC		 9304 insn16 = NDS32_NOP16;
9305 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9306 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9307 R_NDS32_INSN16);
9308 hi_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9309 insn_len += 2;
35c08157 9310 }
1c8f6a4d
KLC		 9311 }
9312 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
9313 {
9314 /* Relax to the following instruction sequence
9315 bltz rt, $1 ; LONGCALL2
9316 jal symbol ; 25_PCREL
9317 $1 */
9318 *insn_len = 8;
9319 insn = INSN_JAL;
9320 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
35c08157 9321
1c8f6a4d
KLC		 9322 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9323 R_NDS32_25_PCREL_RELA);
9324 irel->r_info =
9325 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL2);
9326
9327 lo_irelfn->r_info =
9328 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 9329
1c8f6a4d 9330 if (seq_len & 0x2)
35c08157 9331 {
1c8f6a4d
KLC		 9332 insn16 = NDS32_NOP16;
9333 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9334 lo_irelfn->r_info =
9335 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9336 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9337 insn_len += 2;
9338 }
9339 }
9340 return TRUE;
9341}
35c08157 9342
1c8f6a4d 9343/* Relax LONGJUMP1 relocation for nds32_elf_relax_section. */
35c08157 9344
1c8f6a4d
KLC		 9345static bfd_boolean
9346nds32_elf_relax_longjump1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9347 Elf_Internal_Rela *internal_relocs, int *insn_len,
9348 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9349 Elf_Internal_Shdr *symtab_hdr)
9350{
9351 /* There are 3 variations for LONGJUMP1
9352 case 4-4-2; 16-bit bit on, optimize off or optimize for space
9353 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9354 ori ta, ta, lo12(symbol) ; LO12S0
9355 jr5 ta ;
9356
9357 case 4-4-4; 16-bit off, optimize don't care
9358 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9359 ori ta, ta, lo12(symbol) ; LO12S0
9360 jr ta ;
9361
9362 case 4-4-4; 16-bit on, optimize for speed
9363 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9364 ori ta, ta, lo12(symbol) ; LO12S0
9365 jr ta ; */
9366
9367 /* Get the reloc for the address from which the register is
9368 being loaded. This reloc will tell us which function is
9369 actually being called. */
9370
9371 bfd_vma laddr;
9372 int seq_len; /* Original length of instruction sequence. */
9373 int insn16_on; /* 16-bit on/off. */
9374 uint32_t insn;
9375 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9376 int pic_ext_target = 0;
9377 bfd_signed_vma foff;
9378 uint16_t insn16;
9379 unsigned long reloc;
35c08157 9380
1c8f6a4d
KLC		 9381 irelend = internal_relocs + sec->reloc_count;
9382 seq_len = GET_SEQ_LEN (irel->r_addend);
9383 laddr = irel->r_offset;
9384 *insn_len = seq_len;
9385 insn16_on = IS_16BIT_ON (irel->r_addend);
9386
9387 hi_irelfn =
9388 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9389 R_NDS32_HI20_RELA, laddr);
9390 lo_irelfn =
9391 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9392 R_NDS32_LO12S0_ORI_RELA, laddr + 4);
9393 if (hi_irelfn == irelend || lo_irelfn == irelend)
9394 {
9395 (*_bfd_error_handler)
9396 ("%B: warning: R_NDS32_LONGJUMP1 points to unrecognized"
9397 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9398 return FALSE;
9399 }
35c08157 9400
1c8f6a4d
KLC		 9401 /* Get the value of the symbol referred to by the reloc. */
9402 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9403 &pic_ext_target);
35c08157 9404
1c8f6a4d
KLC		 9405 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
9406 || foff < -CONSERVATIVE_24BIT_S1)
9407 return FALSE;
35c08157 9408
1c8f6a4d
KLC		 9409 if (insn16_on && foff >= -ACCURATE_8BIT_S1
9410 && foff < ACCURATE_8BIT_S1 && (seq_len & 0x2))
9411 {
9412 /* j8 label */
9413 /* 16-bit on, but not optimized for speed. */
9414 reloc = R_NDS32_9_PCREL_RELA;
9415 insn16 = INSN_J8;
9416 bfd_putb16 (insn16, contents + irel->r_offset);
9417 *insn_len = 2;
9418 irel->r_info =
9419 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9420 }
9421 else
9422 {
9423 /* j label */
9424 reloc = R_NDS32_25_PCREL_RELA;
9425 insn = INSN_J;
9426 bfd_putb32 (insn, contents + irel->r_offset);
9427 *insn_len = 4;
9428 irel->r_info =
9429 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_INSN16);
9430 irel->r_addend = 0;
9431 }
35c08157 9432
1c8f6a4d
KLC		 9433 hi_irelfn->r_info =
9434 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9435 lo_irelfn->r_info =
9436 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 9437
1c8f6a4d
KLC		 9438 if ((seq_len & 0x2) && ((*insn_len & 2) == 0))
9439 {
9440 insn16 = NDS32_NOP16;
9441 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9442 lo_irelfn->r_info =
9443 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9444 R_NDS32_INSN16);
9445 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9446 *insn_len += 2;
9447 }
9448 return TRUE;
9449}
9450
9451/* Revert condition branch. This function does not check if the input
9452 instruction is condition branch or not. */
9453
9454static void
9455nds32_elf_convert_branch (uint16_t insn16, uint32_t insn,
9456 uint16_t *re_insn16, uint32_t *re_insn)
9457{
9458 uint32_t comp_insn = 0;
9459 uint16_t comp_insn16 = 0;
9460
9461 if (insn)
9462 {
9463 if (N32_OP6 (insn) == N32_OP6_BR1)
9464 {
9465 /* beqs label. */
9466 comp_insn = (insn ^ 0x4000) & 0xffffc000;
9467 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5)
35c08157 9468 {
1c8f6a4d
KLC		 9469 /* Insn can be contracted to 16-bit implied r5. */
9470 comp_insn16 =
9471 (comp_insn & 0x4000) ? INSN_BNES38 : INSN_BEQS38;
9472 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
35c08157 9473 }
1c8f6a4d
KLC		 9474 }
9475 else if (N32_OP6 (insn) == N32_OP6_BR3)
9476 {
9477 /* bnec $ta, imm11, label. */
9478 comp_insn = (insn ^ 0x80000) & 0xffffff00;
9479 }
9480 else
9481 {
9482 comp_insn = (insn ^ 0x10000) & 0xffffc000;
9483 if (N32_BR2_SUB (insn) == N32_BR2_BEQZ
9484 || N32_BR2_SUB (insn) == N32_BR2_BNEZ)
35c08157 9485 {
1c8f6a4d 9486 if (N32_IS_RT3 (insn))
35c08157 9487 {
1c8f6a4d
KLC		 9488 /* Insn can be contracted to 16-bit. */
9489 comp_insn16 =
9490 (comp_insn & 0x10000) ? INSN_BNEZ38 : INSN_BEQZ38;
9491 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
9492 }
9493 else if (N32_RT5 (insn) == REG_R15)
9494 {
9495 /* Insn can be contracted to 16-bit. */
9496 comp_insn16 =
9497 (comp_insn & 0x10000) ? INSN_BNES38 : INSN_BEQS38;
35c08157 9498 }
35c08157
KLC		 9499 }
9500 }
1c8f6a4d
KLC		 9501 }
9502 else
9503 {
9504 switch ((insn16 & 0xf000) >> 12)
35c08157 9505 {
1c8f6a4d
KLC		 9506 case 0xc:
9507 /* beqz38 or bnez38 */
9508 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9509 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNEZ : INSN_BEQZ;
9510 comp_insn |= ((comp_insn16 & 0x0700) >> 8) << 20;
9511 break;
35c08157 9512
1c8f6a4d
KLC		 9513 case 0xd:
9514 /* beqs38 or bnes38 */
9515 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9516 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNE : INSN_BEQ;
9517 comp_insn |= (((comp_insn16 & 0x0700) >> 8) << 20)
9518 | (REG_R5 << 15);
9519 break;
35c08157 9520
1c8f6a4d
KLC		 9521 case 0xe:
9522 /* beqzS8 or bnezS8 */
9523 comp_insn16 = (insn16 ^ 0x0100) & 0xff00;
9524 comp_insn = (comp_insn16 & 0x0100) ? INSN_BNEZ : INSN_BEQZ;
9525 comp_insn |= REG_R15 << 20;
9526 break;
35c08157 9527
1c8f6a4d
KLC		 9528 default:
9529 break;
9530 }
9531 }
9532 if (comp_insn && re_insn)
9533 *re_insn = comp_insn;
9534 if (comp_insn16 && re_insn16)
9535 *re_insn16 = comp_insn16;
9536}
35c08157 9537
1c8f6a4d 9538/* Relax LONGJUMP2 relocation for nds32_elf_relax_section. */
35c08157 9539
1c8f6a4d
KLC		 9540static bfd_boolean
9541nds32_elf_relax_longjump2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9542 Elf_Internal_Rela *internal_relocs, int *insn_len,
9543 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9544 Elf_Internal_Shdr *symtab_hdr)
9545{
9546 /* There are 3 variations for LONGJUMP2
9547 case 2-4; 1st insn convertible, 16-bit on,
9548 optimize off or optimize for space
9549 bnes38 rt, ra, $1 ; LONGJUMP2
9550 j label ; 25_PCREL
9551 $1:
9552
9553 case 4-4; 1st insn not convertible
9554 bne rt, ra, $1 ; LONGJUMP2
9555 j label ; 25_PCREL
9556 $1:
9557
9558 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9559 bne rt, ra, $1 ; LONGJUMP2
9560 j label ; 25_PCREL
9561 $1: */
9562
9563 /* Get the reloc for the address from which the register is
9564 being loaded. This reloc will tell us which function is
9565 actually being called. */
9566
9567 bfd_vma laddr;
9568 int seq_len; /* Original length of instruction sequence. */
9569 Elf_Internal_Rela *i2_irelfn, *cond_irelfn, *irelend;
9570 int pic_ext_target = 0, first_size;
9571 unsigned int i;
9572 bfd_signed_vma foff;
9573 uint32_t insn, re_insn = 0;
9574 uint16_t insn16, re_insn16 = 0;
9575 unsigned long reloc, cond_reloc;
35c08157 9576
1c8f6a4d
KLC		 9577 enum elf_nds32_reloc_type checked_types[] =
9578 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
35c08157 9579
1c8f6a4d
KLC		 9580 irelend = internal_relocs + sec->reloc_count;
9581 seq_len = GET_SEQ_LEN (irel->r_addend);
9582 laddr = irel->r_offset;
9583 *insn_len = seq_len;
9584 first_size = (seq_len == 6) ? 2 : 4;
9585
9586 i2_irelfn =
9587 find_relocs_at_address_addr (irel, internal_relocs,
9588 irelend, R_NDS32_25_PCREL_RELA,
9589 laddr + first_size);
9590
9591 for (i = 0; i < sizeof (checked_types) / sizeof(checked_types[0]); i++)
9592 {
9593 cond_irelfn =
9594 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9595 checked_types[i], laddr);
9596 if (cond_irelfn != irelend)
9597 break;
9598 }
35c08157 9599
1c8f6a4d
KLC		 9600 if (i2_irelfn == irelend || cond_irelfn == irelend)
9601 {
9602 (*_bfd_error_handler)
9603 ("%B: warning: R_NDS32_LONGJUMP2 points to unrecognized"
9604 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9605 return FALSE;
9606 }
35c08157 9607
1c8f6a4d
KLC		 9608 /* Get the value of the symbol referred to by the reloc. */
9609 foff =
9610 calculate_offset (abfd, sec, i2_irelfn, isymbuf, symtab_hdr,
9611 &pic_ext_target);
9612 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9613 || foff >= CONSERVATIVE_16BIT_S1)
9614 return FALSE;
35c08157 9615
1c8f6a4d
KLC		 9616 /* Get the all corresponding instructions. */
9617 if (first_size == 4)
9618 {
9619 insn = bfd_getb32 (contents + laddr);
9620 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9621 }
9622 else
9623 {
9624 insn16 = bfd_getb16 (contents + laddr);
9625 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9626 }
35c08157 9627
1c8f6a4d
KLC		 9628 if (re_insn16 && foff >= -(ACCURATE_8BIT_S1 - first_size)
9629 && foff < ACCURATE_8BIT_S1 - first_size)
9630 {
9631 if (first_size == 4)
9632 {
9633 /* Don't convert it to 16-bit now, keep this as relaxable for
9634 ``label reloc; INSN16''. */
35c08157 9635
1c8f6a4d
KLC		 9636 /* Save comp_insn32 to buffer. */
9637 bfd_putb32 (re_insn, contents + irel->r_offset);
9638 *insn_len = 4;
9639 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9640 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9641 cond_reloc = R_NDS32_INSN16;
9642 }
9643 else
9644 {
9645 bfd_putb16 (re_insn16, contents + irel->r_offset);
9646 *insn_len = 2;
9647 reloc = R_NDS32_9_PCREL_RELA;
9648 cond_reloc = R_NDS32_NONE;
9649 }
9650 }
9651 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9652 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9653 && foff < ACCURATE_14BIT_S1 - first_size))
9654 {
9655 /* beqs label ; 15_PCREL */
9656 bfd_putb32 (re_insn, contents + irel->r_offset);
9657 *insn_len = 4;
9658 reloc = R_NDS32_15_PCREL_RELA;
9659 cond_reloc = R_NDS32_NONE;
9660 }
9661 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9662 && foff >= -CONSERVATIVE_16BIT_S1
9663 && foff < CONSERVATIVE_16BIT_S1)
9664 {
9665 /* beqz label ; 17_PCREL */
9666 bfd_putb32 (re_insn, contents + irel->r_offset);
9667 *insn_len = 4;
9668 reloc = R_NDS32_17_PCREL_RELA;
9669 cond_reloc = R_NDS32_NONE;
9670 }
9671 else
9672 return FALSE;
35c08157 9673
1c8f6a4d
KLC		 9674 /* Set all relocations. */
9675 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info), reloc);
9676 irel->r_addend = i2_irelfn->r_addend;
35c08157 9677
1c8f6a4d
KLC		 9678 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9679 cond_reloc);
9680 cond_irelfn->r_addend = 0;
35c08157 9681
1c8f6a4d
KLC		 9682 if ((seq_len ^ *insn_len ) & 0x2)
9683 {
9684 insn16 = NDS32_NOP16;
9685 bfd_putb16 (insn16, contents + irel->r_offset + 4);
9686 i2_irelfn->r_offset = 4;
9687 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9688 R_NDS32_INSN16);
9689 i2_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9690 *insn_len += 2;
9691 }
9692 else
9693 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9694 R_NDS32_NONE);
9695 return TRUE;
9696}
35c08157 9697
1c8f6a4d 9698/* Relax LONGJUMP3 relocation for nds32_elf_relax_section. */
35c08157 9699
1c8f6a4d
KLC		 9700static bfd_boolean
9701nds32_elf_relax_longjump3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9702 Elf_Internal_Rela *internal_relocs, int *insn_len,
9703 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9704 Elf_Internal_Shdr *symtab_hdr)
9705{
9706 /* There are 5 variations for LONGJUMP3
9707 case 1: 2-4-4-2; 1st insn convertible, 16-bit on,
9708 optimize off or optimize for space
9709 bnes38 rt, ra, $1 ; LONGJUMP3
9710 sethi ta, hi20(symbol) ; HI20
9711 ori ta, ta, lo12(symbol) ; LO12S0
9712 jr5 ta ;
9713 $1: ;
9714
9715 case 2: 2-4-4-2; 1st insn convertible, 16-bit on, optimize for speed
9716 bnes38 rt, ra, $1 ; LONGJUMP3
9717 sethi ta, hi20(symbol) ; HI20
9718 ori ta, ta, lo12(symbol) ; LO12S0
9719 jr5 ta ;
9720 $1: ; LABEL
9721
9722 case 3: 4-4-4-2; 1st insn not convertible, 16-bit on,
9723 optimize off or optimize for space
9724 bne rt, ra, $1 ; LONGJUMP3
9725 sethi ta, hi20(symbol) ; HI20
9726 ori ta, ta, lo12(symbol) ; LO12S0
9727 jr5 ta ;
9728 $1: ;
9729
9730 case 4: 4-4-4-4; 1st insn don't care, 16-bit off, optimize don't care
9731 16-bit off if no INSN16
9732 bne rt, ra, $1 ; LONGJUMP3
9733 sethi ta, hi20(symbol) ; HI20
9734 ori ta, ta, lo12(symbol) ; LO12S0
9735 jr ta ;
9736 $1: ;
9737
9738 case 5: 4-4-4-4; 1st insn not convertible, 16-bit on, optimize for speed
9739 16-bit off if no INSN16
9740 bne rt, ra, $1 ; LONGJUMP3
9741 sethi ta, hi20(symbol) ; HI20
9742 ori ta, ta, lo12(symbol) ; LO12S0
9743 jr ta ;
9744 $1: ; LABEL */
9745
9746 /* Get the reloc for the address from which the register is
9747 being loaded. This reloc will tell us which function is
9748 actually being called. */
9749 enum elf_nds32_reloc_type checked_types[] =
9750 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
9751
9752 int reloc_off = 0, cond_removed = 0, convertible;
9753 bfd_vma laddr;
9754 int seq_len; /* Original length of instruction sequence. */
9755 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9756 int pic_ext_target = 0, first_size;
9757 unsigned int i;
9758 bfd_signed_vma foff;
9759 uint32_t insn, re_insn = 0;
9760 uint16_t insn16, re_insn16 = 0;
9761 unsigned long reloc, cond_reloc;
35c08157 9762
1c8f6a4d
KLC		 9763 irelend = internal_relocs + sec->reloc_count;
9764 seq_len = GET_SEQ_LEN (irel->r_addend);
9765 laddr = irel->r_offset;
9766 *insn_len = seq_len;
35c08157 9767
1c8f6a4d 9768 convertible = IS_1ST_CONVERT (irel->r_addend);
35c08157 9769
1c8f6a4d
KLC		 9770 if (convertible)
9771 first_size = 2;
9772 else
9773 first_size = 4;
9774
9775 /* Get all needed relocations. */
9776 hi_irelfn =
9777 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9778 R_NDS32_HI20_RELA, laddr + first_size);
9779 lo_irelfn =
9780 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9781 R_NDS32_LO12S0_ORI_RELA,
9782 laddr + first_size + 4);
9783
9784 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
9785 {
9786 cond_irelfn =
9787 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9788 checked_types[i], laddr);
9789 if (cond_irelfn != irelend)
9790 break;
9791 }
35c08157 9792
1c8f6a4d
KLC		 9793 if (hi_irelfn == irelend || lo_irelfn == irelend || cond_irelfn == irelend)
9794 {
9795 (*_bfd_error_handler)
9796 ("%B: warning: R_NDS32_LONGJUMP3 points to unrecognized"
9797 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9798 return FALSE;
9799 }
35c08157 9800
1c8f6a4d
KLC		 9801 /* Get the value of the symbol referred to by the reloc. */
9802 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9803 &pic_ext_target);
35c08157 9804
1c8f6a4d
KLC		 9805 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9806 || foff >= CONSERVATIVE_24BIT_S1)
9807 return FALSE;
35c08157 9808
1c8f6a4d
KLC		 9809 /* Get the all corresponding instructions. */
9810 if (first_size == 4)
9811 {
9812 insn = bfd_getb32 (contents + laddr);
9813 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9814 }
9815 else
9816 {
9817 insn16 = bfd_getb16 (contents + laddr);
9818 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9819 }
35c08157 9820
1c8f6a4d
KLC		 9821 /* For simplicity of coding, we are going to modify the section
9822 contents, the section relocs, and the BFD symbol table. We
9823 must tell the rest of the code not to free up this
9824 information. It would be possible to instead create a table
9825 of changes which have to be made, as is done in coff-mips.c;
9826 that would be more work, but would require less memory when
9827 the linker is run. */
35c08157 9828
1c8f6a4d
KLC		 9829 if (re_insn16 && foff >= -ACCURATE_8BIT_S1 - first_size
9830 && foff < ACCURATE_8BIT_S1 - first_size)
9831 {
9832 if (!(seq_len & 0x2))
9833 {
9834 /* Don't convert it to 16-bit now, keep this as relaxable
9835 for ``label reloc; INSN1a''6. */
9836 /* Save comp_insn32 to buffer. */
9837 bfd_putb32 (re_insn, contents + irel->r_offset);
9838 *insn_len = 4;
9839 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9840 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9841 cond_reloc = R_NDS32_INSN16;
9842 }
9843 else
9844 {
9845 /* Not optimize for speed; convert sequence to 16-bit. */
9846 /* Save comp_insn16 to buffer. */
9847 bfd_putb16 (re_insn16, contents + irel->r_offset);
9848 *insn_len = 2;
9849 reloc = R_NDS32_9_PCREL_RELA;
9850 cond_reloc = R_NDS32_NONE;
9851 }
9852 cond_removed = 1;
9853 }
9854 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9855 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9856 && foff < ACCURATE_14BIT_S1 - first_size))
9857 {
9858 /* beqs label ; 15_PCREL */
9859 bfd_putb32 (re_insn, contents + irel->r_offset);
9860 *insn_len = 4;
9861 reloc = R_NDS32_15_PCREL_RELA;
9862 cond_reloc = R_NDS32_NONE;
9863 cond_removed = 1;
9864 }
9865 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9866 && foff >= -CONSERVATIVE_16BIT_S1
9867 && foff < CONSERVATIVE_16BIT_S1)
9868 {
9869 /* beqz label ; 17_PCREL */
9870 bfd_putb32 (re_insn, contents + irel->r_offset);
9871 *insn_len = 4;
9872 reloc = R_NDS32_17_PCREL_RELA;
9873 cond_reloc = R_NDS32_NONE;
9874 cond_removed = 1;
9875 }
9876 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
9877 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
9878 {
9879 /* Relax to one of the following 3 variations
9880
9881 case 2-4; 1st insn convertible, 16-bit on, optimize off or optimize
9882 for space
9883 bnes38 rt, $1 ; LONGJUMP2
9884 j label ; 25_PCREL
9885 $1
9886
9887 case 4-4; 1st insn not convertible, others don't care
9888 bne rt, ra, $1 ; LONGJUMP2
9889 j label ; 25_PCREL
9890 $1
9891
9892 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9893 bne rt, ra, $1 ; LONGJUMP2
9894 j label ; 25_PCREL
9895 $1 */
9896
9897 /* Offset for first instruction. */
9898
9899 /* Use j label as second instruction. */
9900 *insn_len = 4 + first_size;
9901 insn = INSN_J;
9902 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
9903 reloc = R_NDS32_LONGJUMP2;
9904 cond_reloc = R_NDS32_25_PLTREL;
9905 }
9906 else
9907 return FALSE;
35c08157 9908
1c8f6a4d
KLC		 9909 if (cond_removed == 1)
9910 {
9911 /* Set all relocations. */
9912 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9913 irel->r_addend = hi_irelfn->r_addend;
9914
9915 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9916 cond_reloc);
9917 cond_irelfn->r_addend = 0;
9918 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9919 R_NDS32_NONE);
9920 }
9921 else
9922 {
9923 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
9924 irel->r_addend = irel->r_addend;
9925 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9926 cond_reloc);
9927 }
35c08157 9928
1c8f6a4d
KLC		 9929 if ((seq_len ^ *insn_len ) & 0x2)
9930 {
9931 insn16 = NDS32_NOP16;
9932 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9933 lo_irelfn->r_offset = *insn_len;
9934 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9935 R_NDS32_INSN16);
9936 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9937 *insn_len += 2;
9938 }
9939 else
9940 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9941 R_NDS32_NONE);
9942 return TRUE;
9943}
35c08157 9944
1c8f6a4d 9945/* Relax LONGCALL4 relocation for nds32_elf_relax_section. */
35c08157 9946
1c8f6a4d
KLC		 9947static bfd_boolean
9948nds32_elf_relax_longcall4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9949 Elf_Internal_Rela *internal_relocs, int *insn_len,
9950 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9951 Elf_Internal_Shdr *symtab_hdr)
9952{
9953 /* The pattern for LONGCALL4. Support for function cse.
9954 sethi ta, hi20(symbol) ; LONGCALL4/HI20
9955 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
9956 jral ta ; PTR_RES/EMPTY/INSN16 */
35c08157 9957
1c8f6a4d
KLC		 9958 bfd_vma laddr;
9959 uint32_t insn;
9960 Elf_Internal_Rela *hi_irel, *ptr_irel, *insn_irel, *em_irel, *call_irel;
9961 Elf_Internal_Rela *irelend;
9962 int pic_ext_target = 0;
9963 bfd_signed_vma foff;
35c08157 9964
1c8f6a4d
KLC		 9965 irelend = internal_relocs + sec->reloc_count;
9966 laddr = irel->r_offset;
35c08157 9967
1c8f6a4d
KLC		 9968 /* Get the reloc for the address from which the register is
9969 being loaded. This reloc will tell us which function is
9970 actually being called. */
9971 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9972 R_NDS32_HI20_RELA, laddr);
35c08157 9973
1c8f6a4d
KLC		 9974 if (hi_irel == irelend)
9975 {
9976 (*_bfd_error_handler)
9977 ("%B: warning: R_NDS32_LONGCALL4 points to unrecognized"
9978 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9979 return FALSE;
9980 }
35c08157 9981
1c8f6a4d
KLC		 9982 /* Get the value of the symbol referred to by the reloc. */
9983 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
9984 &pic_ext_target);
35c08157 9985
1c8f6a4d
KLC		 9986 /* This condition only happened when symbol is undefined. */
9987 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9988 || foff >= CONSERVATIVE_24BIT_S1)
9989 return FALSE;
35c08157 9990
1c8f6a4d
KLC		 9991 /* Relax to: jal symbol; 25_PCREL */
9992 /* For simplicity of coding, we are going to modify the section
9993 contents, the section relocs, and the BFD symbol table. We
9994 must tell the rest of the code not to free up this
9995 information. It would be possible to instead create a table
9996 of changes which have to be made, as is done in coff-mips.c;
9997 that would be more work, but would require less memory when
9998 the linker is run. */
35c08157 9999
1c8f6a4d
KLC		 10000 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10001 R_NDS32_PTR_RESOLVED, irel->r_addend);
10002 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10003 R_NDS32_EMPTY, irel->r_addend);
35c08157 10004
1c8f6a4d
KLC		 10005 if (ptr_irel == irelend || em_irel == irelend)
10006 {
10007 (*_bfd_error_handler)
10008 ("%B: warning: R_NDS32_LONGCALL4 points to unrecognized"
10009 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10010 return FALSE;
10011 }
10012 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
10013 insn = bfd_getb32 (contents + irel->r_addend);
10014 if (insn & 0x80000000)
10015 return FALSE;
35c08157 10016
1c8f6a4d
KLC		 10017 /* Replace the long call with a jal. */
10018 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10019 R_NDS32_25_PCREL_RELA);
10020 ptr_irel->r_addend = 1;
35c08157 10021
1c8f6a4d
KLC		 10022 /* We don't resolve this here but resolve it in relocate_section. */
10023 insn = INSN_JAL;
10024 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10025
1c8f6a4d
KLC		 10026 irel->r_info =
10027 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10028
1c8f6a4d
KLC		 10029 /* If there is function cse, HI20 can not remove now. */
10030 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10031 R_NDS32_LONGCALL4, laddr);
10032 if (call_irel == irelend)
10033 {
10034 *insn_len = 0;
10035 hi_irel->r_info =
10036 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10037 }
35c08157 10038
1c8f6a4d
KLC		 10039 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10040 R_NDS32_INSN16, irel->r_addend);
10041 if (insn_irel != irelend)
10042 insn_irel->r_info =
10043 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10044
1c8f6a4d
KLC		 10045 return TRUE;
10046}
35c08157 10047
1c8f6a4d 10048/* Relax LONGCALL5 relocation for nds32_elf_relax_section. */
35c08157 10049
1c8f6a4d
KLC		 10050static bfd_boolean
10051nds32_elf_relax_longcall5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10052 Elf_Internal_Rela *internal_relocs, int *insn_len,
10053 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10054 Elf_Internal_Shdr *symtab_hdr)
10055{
10056 /* The pattern for LONGCALL5.
10057 bltz rt, .L1 ; LONGCALL5/17_PCREL
10058 jal symbol ; 25_PCREL
10059 .L1: */
35c08157 10060
1c8f6a4d
KLC		 10061 bfd_vma laddr;
10062 uint32_t insn;
10063 Elf_Internal_Rela *cond_irel, *irelend;
10064 int pic_ext_target = 0;
10065 bfd_signed_vma foff;
35c08157 10066
1c8f6a4d
KLC		 10067 irelend = internal_relocs + sec->reloc_count;
10068 laddr = irel->r_offset;
10069 insn = bfd_getb32 (contents + laddr);
35c08157 10070
1c8f6a4d
KLC		 10071 /* Get the reloc for the address from which the register is
10072 being loaded. This reloc will tell us which function is
10073 actually being called. */
10074 cond_irel =
10075 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10076 R_NDS32_25_PCREL_RELA, irel->r_addend);
10077 if (cond_irel == irelend)
10078 {
10079 (*_bfd_error_handler)
10080 ("%B: warning: R_NDS32_LONGCALL5 points to unrecognized"
10081 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10082 return FALSE;
10083 }
35c08157 10084
1c8f6a4d
KLC		 10085 /* Get the value of the symbol referred to by the reloc. */
10086 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10087 &pic_ext_target);
35c08157 10088
1c8f6a4d
KLC		 10089 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10090 || foff >= CONSERVATIVE_16BIT_S1)
10091 return FALSE;
35c08157 10092
1c8f6a4d
KLC		 10093 /* Relax to bgezal rt, label ; 17_PCREL
10094 or bltzal rt, label ; 17_PCREL */
35c08157 10095
1c8f6a4d
KLC		 10096 /* Convert to complimentary conditional call. */
10097 insn = CONVERT_CONDITION_CALL (insn);
35c08157 10098
1c8f6a4d
KLC		 10099 /* For simplicity of coding, we are going to modify the section
10100 contents, the section relocs, and the BFD symbol table. We
10101 must tell the rest of the code not to free up this
10102 information. It would be possible to instead create a table
10103 of changes which have to be made, as is done in coff-mips.c;
10104 that would be more work, but would require less memory when
10105 the linker is run. */
35c08157 10106
1c8f6a4d
KLC		 10107 /* Modify relocation and contents. */
10108 cond_irel->r_info =
10109 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_17_PCREL_RELA);
35c08157 10110
1c8f6a4d
KLC		 10111 /* Replace the long call with a bgezal. */
10112 bfd_putb32 (insn, contents + cond_irel->r_offset);
10113 *insn_len = 0;
35c08157 10114
1c8f6a4d
KLC		 10115 /* Clean unnessary relocations. */
10116 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10117
1c8f6a4d
KLC		 10118 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10119 R_NDS32_17_PCREL_RELA, laddr);
10120 cond_irel->r_info =
10121 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10122
1c8f6a4d
KLC		 10123 return TRUE;
10124}
35c08157 10125
1c8f6a4d 10126/* Relax LONGCALL6 relocation for nds32_elf_relax_section. */
35c08157 10127
1c8f6a4d
KLC		 10128static bfd_boolean
10129nds32_elf_relax_longcall6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10130 Elf_Internal_Rela *internal_relocs, int *insn_len,
10131 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10132 Elf_Internal_Shdr *symtab_hdr)
10133{
10134 /* The pattern for LONGCALL6.
10135 bltz rt, .L1 ; LONGCALL6/17_PCREL
10136 sethi ta, hi20(symbol) ; HI20/PTR
10137 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10138 jral ta ; PTR_RES/EMPTY/INSN16
10139 .L1 */
10140
10141 bfd_vma laddr;
10142 uint32_t insn;
10143 Elf_Internal_Rela *em_irel, *cond_irel, *irelend;
10144 int pic_ext_target = 0;
10145 bfd_signed_vma foff;
35c08157 10146
1c8f6a4d
KLC		 10147 irelend = internal_relocs + sec->reloc_count;
10148 laddr = irel->r_offset;
35c08157 10149
1c8f6a4d
KLC		 10150 /* Get the reloc for the address from which the register is
10151 being loaded. This reloc will tell us which function is
10152 actually being called. */
10153 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10154 R_NDS32_EMPTY, irel->r_addend);
35c08157 10155
1c8f6a4d
KLC		 10156 if (em_irel == irelend)
10157 {
10158 (*_bfd_error_handler)
10159 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10160 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10161 return FALSE;
10162 }
35c08157 10163
1c8f6a4d
KLC		 10164 /* Get the value of the symbol referred to by the reloc. */
10165 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10166 &pic_ext_target);
35c08157 10167
1c8f6a4d
KLC		 10168 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10169 || foff >= CONSERVATIVE_24BIT_S1)
10170 return FALSE;
35c08157 10171
1c8f6a4d
KLC		 10172 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
10173 insn = bfd_getb32 (contents + irel->r_addend);
10174 if (insn & 0x80000000)
10175 return FALSE;
35c08157 10176
1c8f6a4d
KLC		 10177 insn = bfd_getb32 (contents + laddr);
10178 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10179 {
10180 /* Relax to bgezal rt, label ; 17_PCREL
10181 or bltzal rt, label ; 17_PCREL */
35c08157 10182
1c8f6a4d
KLC		 10183 /* Convert to complimentary conditional call. */
10184 *insn_len = 0;
10185 insn = CONVERT_CONDITION_CALL (insn);
10186 bfd_putb32 (insn, contents + em_irel->r_offset);
10187
10188 em_irel->r_info =
10189 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_17_PCREL_RELA);
10190
10191 /* Set resolved relocation. */
10192 cond_irel =
10193 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10194 R_NDS32_PTR_RESOLVED, irel->r_addend);
10195 if (cond_irel == irelend)
35c08157 10196 {
1c8f6a4d
KLC		 10197 (*_bfd_error_handler)
10198 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10199 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10200 return FALSE;
10201 }
10202 cond_irel->r_addend = 1;
35c08157 10203
1c8f6a4d 10204 /* Clear relocations. */
35c08157 10205
1c8f6a4d
KLC		 10206 irel->r_info =
10207 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10208
1c8f6a4d
KLC		 10209 cond_irel =
10210 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10211 R_NDS32_17_PCREL_RELA, laddr);
10212 if (cond_irel != irelend)
10213 cond_irel->r_info =
10214 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10215
1c8f6a4d
KLC		 10216 cond_irel =
10217 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10218 R_NDS32_INSN16, irel->r_addend);
10219 if (cond_irel != irelend)
10220 cond_irel->r_info =
10221 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10222
1c8f6a4d
KLC		 10223 }
10224 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
10225 {
10226 /* Relax to the following instruction sequence
10227 bltz rt, .L1 ; LONGCALL2/17_PCREL
10228 jal symbol ; 25_PCREL/PTR_RES
10229 .L1 */
10230 *insn_len = 4;
10231 /* Convert instruction. */
10232 insn = INSN_JAL;
10233 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10234
1c8f6a4d
KLC		 10235 /* Convert relocations. */
10236 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10237 R_NDS32_25_PCREL_RELA);
10238 irel->r_info =
10239 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL5);
35c08157 10240
1c8f6a4d
KLC		 10241 /* Set resolved relocation. */
10242 cond_irel =
10243 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10244 R_NDS32_PTR_RESOLVED, irel->r_addend);
10245 if (cond_irel == irelend)
10246 {
10247 (*_bfd_error_handler)
10248 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10249 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10250 return FALSE;
10251 }
10252 cond_irel->r_addend = 1;
35c08157 10253
1c8f6a4d
KLC		 10254 cond_irel =
10255 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10256 R_NDS32_INSN16, irel->r_addend);
10257 if (cond_irel != irelend)
10258 cond_irel->r_info =
10259 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10260 }
10261 return TRUE;
10262}
35c08157 10263
1c8f6a4d 10264/* Relax LONGJUMP4 relocation for nds32_elf_relax_section. */
35c08157 10265
1c8f6a4d
KLC		 10266static bfd_boolean
10267nds32_elf_relax_longjump4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10268 Elf_Internal_Rela *internal_relocs, int *insn_len,
10269 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10270 Elf_Internal_Shdr *symtab_hdr)
10271{
10272 /* The pattern for LONGJUMP4.
10273 sethi ta, hi20(symbol) ; LONGJUMP4/HI20
10274 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10275 jr ta ; PTR_RES/INSN16/EMPTY */
10276
10277 bfd_vma laddr;
10278 int seq_len; /* Original length of instruction sequence. */
10279 uint32_t insn;
10280 Elf_Internal_Rela *hi_irel, *ptr_irel, *em_irel, *call_irel, *irelend;
10281 int pic_ext_target = 0;
10282 bfd_signed_vma foff;
35c08157 10283
1c8f6a4d
KLC		 10284 irelend = internal_relocs + sec->reloc_count;
10285 seq_len = GET_SEQ_LEN (irel->r_addend);
10286 laddr = irel->r_offset;
10287 *insn_len = seq_len;
35c08157 10288
1c8f6a4d
KLC		 10289 /* Get the reloc for the address from which the register is
10290 being loaded. This reloc will tell us which function is
10291 actually being called. */
35c08157 10292
1c8f6a4d
KLC		 10293 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10294 R_NDS32_HI20_RELA, laddr);
35c08157 10295
1c8f6a4d
KLC		 10296 if (hi_irel == irelend)
10297 {
10298 (*_bfd_error_handler)
10299 ("%B: warning: R_NDS32_LONGJUMP4 points to unrecognized"
10300 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10301 return FALSE;
10302 }
35c08157 10303
1c8f6a4d
KLC		 10304 /* Get the value of the symbol referred to by the reloc. */
10305 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
10306 &pic_ext_target);
35c08157 10307
1c8f6a4d
KLC		 10308 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
10309 || foff < -CONSERVATIVE_24BIT_S1)
10310 return FALSE;
35c08157 10311
1c8f6a4d
KLC		 10312 /* Convert it to "j label", it may be converted to j8 in the final
10313 pass of relaxation. Therefore, we do not consider this currently. */
10314 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10315 R_NDS32_PTR_RESOLVED, irel->r_addend);
10316 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10317 R_NDS32_EMPTY, irel->r_addend);
35c08157 10318
1c8f6a4d
KLC		 10319 if (ptr_irel == irelend || em_irel == irelend)
10320 {
10321 (*_bfd_error_handler)
10322 ("%B: warning: R_NDS32_LONGJUMP4 points to unrecognized"
10323 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10324 return FALSE;
10325 }
35c08157 10326
1c8f6a4d
KLC		 10327 em_irel->r_info =
10328 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_25_PCREL_RELA);
10329 ptr_irel->r_addend = 1;
35c08157 10330
1c8f6a4d
KLC		 10331 /* Write instruction. */
10332 insn = INSN_J;
10333 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10334
1c8f6a4d
KLC		 10335 /* Clear relocations. */
10336 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10337
1c8f6a4d
KLC		 10338 /* If there is function cse, HI20 can not remove now. */
10339 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10340 R_NDS32_LONGJUMP4, laddr);
10341 if (call_irel == irelend)
10342 {
10343 *insn_len = 0;
10344 hi_irel->r_info =
10345 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10346 }
35c08157 10347
1c8f6a4d
KLC		 10348 return TRUE;
10349}
35c08157 10350
1c8f6a4d 10351/* Relax LONGJUMP5 relocation for nds32_elf_relax_section. */
35c08157 10352
1c8f6a4d
KLC		 10353static bfd_boolean
10354nds32_elf_relax_longjump5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10355 Elf_Internal_Rela *internal_relocs, int *insn_len,
10356 int *seq_len, bfd_byte *contents,
10357 Elf_Internal_Sym *isymbuf,
10358 Elf_Internal_Shdr *symtab_hdr)
10359{
10360 /* There are 2 variations for LONGJUMP5
10361 case 2-4; 1st insn convertible, 16-bit on.
10362 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10363 j label ; 25_PCREL/INSN16
10364 $1:
10365
10366 case 4-4; 1st insn not convertible
10367 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10368 j label ; 25_PCREL/INSN16
10369 .L1: */
10370
10371 bfd_vma laddr;
10372 Elf_Internal_Rela *cond_irel, *irelend;
10373 int pic_ext_target = 0;
10374 unsigned int i;
10375 bfd_signed_vma foff;
10376 uint32_t insn, re_insn = 0;
10377 uint16_t insn16, re_insn16 = 0;
10378 unsigned long reloc;
35c08157 10379
1c8f6a4d
KLC		 10380 enum elf_nds32_reloc_type checked_types[] =
10381 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10382 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
35c08157 10383
1c8f6a4d
KLC		 10384 irelend = internal_relocs + sec->reloc_count;
10385 laddr = irel->r_offset;
35c08157 10386
1c8f6a4d
KLC		 10387 /* Get the reloc for the address from which the register is
10388 being loaded. This reloc will tell us which function is
10389 actually being called. */
35c08157 10390
1c8f6a4d
KLC		 10391 cond_irel =
10392 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10393 R_NDS32_25_PCREL_RELA, irel->r_addend);
10394 if (cond_irel == irelend)
10395 {
10396 (*_bfd_error_handler)
10397 ("%B: warning: R_NDS32_LONGJUMP5 points to unrecognized"
10398 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10399 return FALSE;
10400 }
35c08157 10401
1c8f6a4d
KLC		 10402 /* Get the value of the symbol referred to by the reloc. */
10403 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10404 &pic_ext_target);
35c08157 10405
1c8f6a4d
KLC		 10406 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10407 || foff >= CONSERVATIVE_16BIT_S1)
10408 return FALSE;
35c08157 10409
1c8f6a4d
KLC		 10410 /* Get the all corresponding instructions. */
10411 insn = bfd_getb32 (contents + laddr);
10412 /* Check instruction size. */
10413 if (insn & 0x80000000)
10414 {
10415 *seq_len = 0;
10416 insn16 = insn >> 16;
10417 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10418 }
10419 else
10420 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 10421
1c8f6a4d
KLC		 10422 if (N32_OP6 (re_insn) == N32_OP6_BR1
10423 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10424 {
10425 /* beqs label ; 15_PCREL. */
10426 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10427 reloc = R_NDS32_15_PCREL_RELA;
10428 }
10429 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10430 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10431 {
10432 /* beqz label ; 17_PCREL. */
10433 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10434 reloc = R_NDS32_17_PCREL_RELA;
10435 }
10436 else if ( N32_OP6 (re_insn) == N32_OP6_BR3
10437 && foff >= -CONSERVATIVE_8BIT_S1 && foff < CONSERVATIVE_8BIT_S1)
10438 {
10439 /* beqc label ; 9_PCREL. */
10440 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10441 reloc = R_NDS32_WORD_9_PCREL_RELA;
10442 }
10443 else
10444 return FALSE;
35c08157 10445
1c8f6a4d
KLC		 10446 /* Set all relocations. */
10447 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), reloc);
35c08157 10448
1c8f6a4d
KLC		 10449 /* Clean relocations. */
10450 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10451 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10452 {
10453 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10454 checked_types[i], laddr);
10455 if (cond_irel != irelend)
10456 {
10457 if (*seq_len == 0
10458 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
35c08157 10459 {
1c8f6a4d
KLC		 10460 /* If the branch instruction is 2 byte, it cannot remove
10461 directly. Only convert it to nop16 and remove it after
10462 checking alignment issue. */
10463 insn16 = NDS32_NOP16;
10464 bfd_putb16 (insn16, contents + laddr);
10465 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157
KLC		 10466 }
10467 else
1c8f6a4d
KLC		 10468 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10469 R_NDS32_NONE);
35c08157 10470 }
1c8f6a4d
KLC		 10471 }
10472 *insn_len = 0;
35c08157 10473
1c8f6a4d
KLC		 10474 return TRUE;
10475}
35c08157 10476
1c8f6a4d 10477/* Relax LONGJUMP6 relocation for nds32_elf_relax_section. */
35c08157 10478
1c8f6a4d
KLC		 10479static bfd_boolean
10480nds32_elf_relax_longjump6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10481 Elf_Internal_Rela *internal_relocs, int *insn_len,
10482 int *seq_len, bfd_byte *contents,
10483 Elf_Internal_Sym *isymbuf,
10484 Elf_Internal_Shdr *symtab_hdr)
10485{
10486 /* There are 5 variations for LONGJUMP6
10487 case : 2-4-4-4; 1st insn convertible, 16-bit on.
10488 bnes38 rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10489 sethi ta, hi20(symbol) ; HI20/PTR
10490 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10491 jr ta ; PTR_RES/INSN16/EMPTY
10492 .L1:
10493
10494 case : 4-4-4-4; 1st insn not convertible, 16-bit on.
10495 bne rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10496 sethi ta, hi20(symbol) ; HI20/PTR
10497 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10498 jr ta ; PTR_RES/INSN16/EMPTY
10499 .L1: */
10500
10501 enum elf_nds32_reloc_type checked_types[] =
10502 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10503 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
10504
10505 int reloc_off = 0, cond_removed = 0;
10506 bfd_vma laddr;
10507 Elf_Internal_Rela *cond_irel, *em_irel, *irelend, *insn_irel;
10508 int pic_ext_target = 0;
10509 unsigned int i;
10510 bfd_signed_vma foff;
10511 uint32_t insn, re_insn = 0;
10512 uint16_t insn16, re_insn16 = 0;
10513 unsigned long reloc;
35c08157 10514
1c8f6a4d
KLC		 10515 irelend = internal_relocs + sec->reloc_count;
10516 laddr = irel->r_offset;
35c08157 10517
1c8f6a4d
KLC		 10518 /* Get the reloc for the address from which the register is
10519 being loaded. This reloc will tell us which function is
10520 actually being called. */
10521 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10522 R_NDS32_EMPTY, irel->r_addend);
35c08157 10523
1c8f6a4d
KLC		 10524 if (em_irel == irelend)
10525 {
10526 (*_bfd_error_handler)
10527 ("%B: warning: R_NDS32_LONGJUMP6 points to unrecognized"
10528 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10529 return FALSE;
10530 }
35c08157 10531
1c8f6a4d
KLC		 10532 /* Get the value of the symbol referred to by the reloc. */
10533 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10534 &pic_ext_target);
35c08157 10535
1c8f6a4d
KLC		 10536 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10537 || foff >= CONSERVATIVE_24BIT_S1)
10538 return FALSE;
35c08157 10539
1c8f6a4d
KLC		 10540 insn = bfd_getb32 (contents + laddr);
10541 /* Check instruction size. */
10542 if (insn & 0x80000000)
10543 {
10544 *seq_len = 0;
10545 insn16 = insn >> 16;
10546 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10547 }
10548 else
10549 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 10550
1c8f6a4d
KLC		 10551 /* For simplicity of coding, we are going to modify the section
10552 contents, the section relocs, and the BFD symbol table. We
10553 must tell the rest of the code not to free up this
10554 information. It would be possible to instead create a table
10555 of changes which have to be made, as is done in coff-mips.c;
10556 that would be more work, but would require less memory when
10557 the linker is run. */
35c08157 10558
1c8f6a4d
KLC		 10559 if (N32_OP6 (re_insn) == N32_OP6_BR1
10560 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10561 {
10562 /* beqs label ; 15_PCREL */
10563 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10564 reloc = R_NDS32_15_PCREL_RELA;
10565 cond_removed = 1;
10566 }
10567 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10568 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10569 {
10570 /* beqz label ; 17_PCREL */
10571 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10572 reloc = R_NDS32_17_PCREL_RELA;
10573 cond_removed = 1;
10574 }
10575 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
10576 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
10577 {
10578 /* Relax to one of the following 2 variations
35c08157 10579
1c8f6a4d
KLC		 10580 case 2-4; 1st insn convertible, 16-bit on.
10581 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10582 j label ; 25_PCREL/INSN16
10583 $1:
35c08157 10584
1c8f6a4d
KLC		 10585 case 4-4; 1st insn not convertible
10586 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10587 j label ; 25_PCREL/INSN16
10588 .L1: */
35c08157 10589
1c8f6a4d
KLC		 10590 /* Use j label as second instruction. */
10591 insn = INSN_J;
10592 reloc = R_NDS32_25_PCREL_RELA;
10593 bfd_putb32 (insn, contents + em_irel->r_offset);
10594 }
10595 else
10596 return FALSE;
35c08157 10597
1c8f6a4d
KLC		 10598 /* Set all relocations. */
10599 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), reloc);
35c08157 10600
1c8f6a4d
KLC		 10601 cond_irel =
10602 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10603 R_NDS32_PTR_RESOLVED, em_irel->r_offset);
10604 cond_irel->r_addend = 1;
35c08157 10605
1c8f6a4d
KLC		 10606 /* Use INSN16 of first branch instruction to distinguish if keeping
10607 INSN16 of final instruction or not. */
10608 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10609 R_NDS32_INSN16, irel->r_offset);
10610 if (insn_irel == irelend)
10611 {
10612 /* Clean the final INSN16. */
10613 insn_irel =
10614 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10615 R_NDS32_INSN16, em_irel->r_offset);
10616 insn_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10617 R_NDS32_NONE);
10618 }
10619
10620 if (cond_removed == 1)
10621 {
10622 *insn_len = 0;
10623
10624 /* Clear relocations. */
10625 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10626
1c8f6a4d
KLC		 10627 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10628 {
10629 cond_irel =
10630 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10631 checked_types[i], laddr);
10632 if (cond_irel != irelend)
35c08157 10633 {
1c8f6a4d
KLC		 10634 if (*seq_len == 0
10635 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
10636 {
10637 /* If the branch instruction is 2 byte, it cannot remove
10638 directly. Only convert it to nop16 and remove it after
10639 checking alignment issue. */
10640 insn16 = NDS32_NOP16;
10641 bfd_putb16 (insn16, contents + laddr);
10642 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10643 }
10644 else
10645 cond_irel->r_info =
10646 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10647 }
35c08157 10648 }
1c8f6a4d
KLC		 10649 }
10650 else
10651 {
10652 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
10653 R_NDS32_LONGJUMP5);
10654 }
35c08157 10655
1c8f6a4d
KLC		 10656 return TRUE;
10657}
35c08157 10658
1c8f6a4d 10659/* Relax LONGJUMP7 relocation for nds32_elf_relax_section. */
35c08157 10660
1c8f6a4d
KLC		 10661static bfd_boolean
10662nds32_elf_relax_longjump7 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10663 Elf_Internal_Rela *internal_relocs, int *insn_len,
10664 int *seq_len, bfd_byte *contents,
10665 Elf_Internal_Sym *isymbuf,
10666 Elf_Internal_Shdr *symtab_hdr)
10667{
10668 /* There are 2 variations for LONGJUMP5
10669 case 2-4; 1st insn convertible, 16-bit on.
10670 movi55 ta, imm11 ; LONGJUMP7/INSN16
10671 beq rt, ta, label ; 15_PCREL
10672
10673 case 4-4; 1st insn not convertible
10674 movi55 ta, imm11 ; LONGJUMP7/INSN16
10675 beq rt, ta, label ; 15_PCREL */
10676
10677 bfd_vma laddr;
10678 Elf_Internal_Rela *cond_irel, *irelend, *insn_irel;
10679 int pic_ext_target = 0;
10680 bfd_signed_vma foff;
10681 uint32_t insn, re_insn = 0;
10682 uint16_t insn16;
10683 uint32_t imm11;
35c08157 10684
1c8f6a4d
KLC		 10685 irelend = internal_relocs + sec->reloc_count;
10686 laddr = irel->r_offset;
35c08157 10687
1c8f6a4d
KLC		 10688 /* Get the reloc for the address from which the register is
10689 being loaded. This reloc will tell us which function is
10690 actually being called. */
35c08157 10691
1c8f6a4d
KLC		 10692 cond_irel =
10693 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10694 R_NDS32_15_PCREL_RELA, irel->r_addend);
10695 if (cond_irel == irelend)
10696 {
10697 (*_bfd_error_handler)
10698 ("%B: warning: R_NDS32_LONGJUMP7 points to unrecognized"
10699 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10700 return FALSE;
10701 }
35c08157 10702
1c8f6a4d
KLC		 10703 /* Get the value of the symbol referred to by the reloc. */
10704 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10705 &pic_ext_target);
35c08157 10706
1c8f6a4d
KLC		 10707 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_8BIT_S1
10708 || foff >= CONSERVATIVE_8BIT_S1)
10709 return FALSE;
35c08157 10710
1c8f6a4d
KLC		 10711 /* Get the first instruction for its size. */
10712 insn = bfd_getb32 (contents + laddr);
10713 if (insn & 0x80000000)
10714 {
10715 *seq_len = 0;
10716 /* Get the immediate from movi55. */
10717 imm11 = N16_IMM5S (insn >> 16);
10718 }
10719 else
10720 {
10721 /* Get the immediate from movi. */
10722 imm11 = N32_IMM20S (insn);
35c08157
KLC		 10723 }
10724
1c8f6a4d
KLC		 10725 /* Get the branch instruction. */
10726 insn = bfd_getb32 (contents + irel->r_addend);
10727 /* Convert instruction to BR3. */
10728 if ((insn >> 14) & 0x1)
10729 re_insn = N32_BR3 (BNEC, N32_RT5 (insn), imm11, 0);
10730 else
10731 re_insn = N32_BR3 (BEQC, N32_RT5 (insn), imm11, 0);
35c08157 10732
1c8f6a4d 10733 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
35c08157 10734
1c8f6a4d
KLC		 10735 /* Set all relocations. */
10736 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10737 R_NDS32_WORD_9_PCREL_RELA);
10738
10739 /* Clean relocations. */
10740 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10741 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10742 R_NDS32_INSN16, irel->r_offset);
10743 if (insn_irel != irelend)
10744 {
10745 if (*seq_len == 0)
35c08157 10746 {
1c8f6a4d
KLC		 10747 /* If the first insntruction is 16bit, convert it to nop16. */
10748 insn16 = NDS32_NOP16;
10749 bfd_putb16 (insn16, contents + laddr);
10750 insn_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157 10751 }
1c8f6a4d
KLC		 10752 else
10753 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10754 R_NDS32_NONE);
35c08157 10755 }
1c8f6a4d 10756 *insn_len = 0;
35c08157 10757
1c8f6a4d
KLC		 10758 return TRUE;
10759}
35c08157 10760
1c8f6a4d 10761#define GET_LOADSTORE_RANGE(addend) (((addend) >> 8) & 0x3f)
35c08157 10762
1c8f6a4d 10763/* Relax LOADSTORE relocation for nds32_elf_relax_section. */
35c08157 10764
1c8f6a4d
KLC		 10765static bfd_boolean
10766nds32_elf_relax_loadstore (struct bfd_link_info *link_info, bfd *abfd,
10767 asection *sec, Elf_Internal_Rela *irel,
10768 Elf_Internal_Rela *internal_relocs, int *insn_len,
10769 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10770 Elf_Internal_Shdr *symtab_hdr, int load_store_relax)
10771{
10772 int eliminate_sethi = 0, range_type, i;
10773 bfd_vma local_sda, laddr;
10774 int seq_len; /* Original length of instruction sequence. */
10775 uint32_t insn;
10776 Elf_Internal_Rela *hi_irelfn = NULL, *irelend;
10777 bfd_vma access_addr = 0;
10778 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10779 enum elf_nds32_reloc_type checked_types[] =
10780 { R_NDS32_HI20_RELA, R_NDS32_GOT_HI20,
10781 R_NDS32_GOTPC_HI20, R_NDS32_GOTOFF_HI20,
10782 R_NDS32_PLTREL_HI20, R_NDS32_PLT_GOTREL_HI20,
10783 R_NDS32_TLS_LE_HI20
10784 };
35c08157 10785
1c8f6a4d
KLC		 10786 irelend = internal_relocs + sec->reloc_count;
10787 seq_len = GET_SEQ_LEN (irel->r_addend);
10788 laddr = irel->r_offset;
10789 *insn_len = seq_len;
35c08157 10790
1c8f6a4d
KLC		 10791 /* Get the high part relocation. */
10792 for (i = 0; (unsigned) i < sizeof (checked_types); i++)
10793 {
10794 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10795 checked_types[i], laddr);
10796 if (hi_irelfn != irelend)
10797 break;
10798 }
35c08157 10799
1c8f6a4d
KLC		 10800 if (hi_irelfn == irelend)
10801 {
10802 (*_bfd_error_handler)
10803 ("%B: warning: R_NDS32_LOADSTORE points to unrecognized"
10804 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10805 return FALSE;
10806 }
35c08157 10807
1c8f6a4d
KLC		 10808 range_type = GET_LOADSTORE_RANGE (irel->r_addend);
10809 nds32_elf_final_sda_base (sec->output_section->owner,
10810 link_info, &local_sda, FALSE);
35c08157 10811
1c8f6a4d
KLC		 10812 switch (ELF32_R_TYPE (hi_irelfn->r_info))
10813 {
10814 case R_NDS32_HI20_RELA:
10815 insn = bfd_getb32 (contents + laddr);
10816 access_addr =
10817 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10818
10819 if (range_type == NDS32_LOADSTORE_IMM)
10820 {
10821 struct elf_link_hash_entry *h = NULL;
10822 int indx;
35c08157 10823
1c8f6a4d 10824 if (ELF32_R_SYM (hi_irelfn->r_info) >= symtab_hdr->sh_info)
35c08157 10825 {
1c8f6a4d
KLC		 10826 indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info;
10827 h = elf_sym_hashes (abfd)[indx];
35c08157 10828 }
35c08157 10829
1c8f6a4d
KLC		 10830 if ((access_addr < CONSERVATIVE_20BIT)
10831 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
35c08157 10832 {
1c8f6a4d
KLC		 10833 eliminate_sethi = 1;
10834 break;
35c08157 10835 }
1c8f6a4d
KLC		 10836
10837 /* This is avoid to relax symbol address which is fixed
10838 relocations. Ex: _stack. */
10839 if (h && bfd_is_abs_section (h->root.u.def.section))
10840 return FALSE;
10841 }
10842
10843 if (!load_store_relax)
10844 return FALSE;
10845
10846 /* Case for set gp register. */
10847 if (N32_RT5 (insn) == REG_GP)
10848 break;
10849
10850 if (range_type == NDS32_LOADSTORE_FLOAT_S
10851 || range_type == NDS32_LOADSTORE_FLOAT_S)
10852 {
10853 range_l = sdata_range[0][0];
10854 range_h = sdata_range[0][1];
10855 }
10856 else
10857 {
10858 range_l = sdata_range[1][0];
10859 range_h = sdata_range[1][1];
10860 }
10861 break;
10862
10863 case R_NDS32_GOT_HI20:
10864 access_addr =
10865 calculate_got_memory_address (abfd, link_info, hi_irelfn, symtab_hdr);
10866
10867 /* If this symbol is not in .got, the return value will be -1.
10868 Since the gp value is set to SDA_BASE but not GLOBAL_OFFSET_TABLE,
10869 a negative offset is allowed. */
10870 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10871 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10872 eliminate_sethi = 1;
10873 break;
10874
10875 case R_NDS32_PLT_GOTREL_HI20:
10876 access_addr = calculate_plt_memory_address (abfd, link_info, isymbuf,
10877 hi_irelfn, symtab_hdr);
10878
10879 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10880 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10881 eliminate_sethi = 1;
10882 break;
10883
10884 case R_NDS32_GOTOFF_HI20:
10885 access_addr =
10886 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10887
10888 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10889 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10890 eliminate_sethi = 1;
10891 break;
10892
10893 case R_NDS32_GOTPC_HI20:
10894 /* The access_addr must consider r_addend of hi_irel. */
10895 access_addr = sec->output_section->vma + sec->output_offset
10896 + irel->r_offset + hi_irelfn->r_addend;
10897
10898 if ((bfd_signed_vma) (local_sda - access_addr) < CONSERVATIVE_20BIT
10899 && (bfd_signed_vma) (local_sda - access_addr) >= -CONSERVATIVE_20BIT)
10900 eliminate_sethi = 1;
10901 break;
10902
10903 case R_NDS32_TLS_LE_HI20:
10904 access_addr =
10905 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10906 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10907 access_addr -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10908 if ((range_type == NDS32_LOADSTORE_IMM)
10909 && (bfd_signed_vma) (access_addr) < CONSERVATIVE_20BIT
10910 && (bfd_signed_vma) (access_addr) >= -CONSERVATIVE_20BIT)
10911 eliminate_sethi = 1;
10912 break;
10913
10914 default:
10915 return FALSE;
10916 }
10917
10918 /* Delete sethi instruction. */
10919 if (eliminate_sethi == 1
10920 || (local_sda <= access_addr && (access_addr - local_sda) < range_h)
10921 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
10922 {
10923 hi_irelfn->r_info =
10924 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
10925 irel->r_info =
10926 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10927 *insn_len = 0;
10928 }
10929 return TRUE;
10930}
10931
10932/* Relax LO12 relocation for nds32_elf_relax_section. */
10933
10934static void
10935nds32_elf_relax_lo12 (struct bfd_link_info *link_info, bfd *abfd,
10936 asection *sec, Elf_Internal_Rela *irel,
10937 Elf_Internal_Rela *internal_relocs, bfd_byte *contents,
10938 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr)
10939{
10940 uint32_t insn;
10941 bfd_vma local_sda, laddr;
10942 unsigned long reloc;
10943 bfd_vma access_addr;
10944 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10945 Elf_Internal_Rela *irelfn = NULL, *irelend;
10946 struct elf_link_hash_entry *h = NULL;
10947 int indx;
10948
10949 /* For SDA base relative relaxation. */
10950 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10951 &local_sda, FALSE);
10952
10953 irelend = internal_relocs + sec->reloc_count;
10954 laddr = irel->r_offset;
10955 insn = bfd_getb32 (contents + laddr);
10956
10957 if (!is_sda_access_insn (insn) && N32_OP6 (insn) != N32_OP6_ORI)
10958 return;
10959
10960 access_addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10961
10962 if (ELF32_R_SYM (irel->r_info) >= symtab_hdr->sh_info)
10963 {
10964 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
10965 h = elf_sym_hashes (abfd)[indx];
10966 }
10967
10968 if (N32_OP6 (insn) == N32_OP6_ORI && access_addr < CONSERVATIVE_20BIT
10969 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
10970 {
10971 reloc = R_NDS32_20_RELA;
10972 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10973 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10974 bfd_putb32 (insn, contents + laddr);
10975 }
10976 /* This is avoid to relax symbol address which is fixed
10977 relocations. Ex: _stack. */
10978 else if (N32_OP6 (insn) == N32_OP6_ORI
10979 && h && bfd_is_abs_section (h->root.u.def.section))
10980 return;
10981 else
10982 {
10983 range_l = sdata_range[1][0];
10984 range_h = sdata_range[1][1];
10985 switch (ELF32_R_TYPE (irel->r_info))
10986 {
10987 case R_NDS32_LO12S0_RELA:
10988 reloc = R_NDS32_SDA19S0_RELA;
10989 break;
10990 case R_NDS32_LO12S1_RELA:
10991 reloc = R_NDS32_SDA18S1_RELA;
10992 break;
10993 case R_NDS32_LO12S2_RELA:
10994 reloc = R_NDS32_SDA17S2_RELA;
10995 break;
10996 case R_NDS32_LO12S2_DP_RELA:
10997 range_l = sdata_range[0][0];
10998 range_h = sdata_range[0][1];
10999 reloc = R_NDS32_SDA12S2_DP_RELA;
11000 break;
11001 case R_NDS32_LO12S2_SP_RELA:
11002 range_l = sdata_range[0][0];
11003 range_h = sdata_range[0][1];
11004 reloc = R_NDS32_SDA12S2_SP_RELA;
11005 break;
11006 default:
11007 return;
11008 }
11009
11010 /* There are range_h and range_l because linker has to promise
11011 all sections move cross one page together. */
11012 if ((local_sda <= access_addr && (access_addr - local_sda) < range_h)
11013 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
11014 {
11015 if (N32_OP6 (insn) == N32_OP6_ORI && N32_RT5 (insn) == REG_GP)
35c08157 11016 {
1c8f6a4d
KLC		 11017 /* Maybe we should add R_NDS32_INSN16 reloc type here
11018 or manually do some optimization. sethi can't be
11019 eliminated when updating $gp so the relative ori
11020 needs to be preserved. */
11021 return;
35c08157 11022 }
1c8f6a4d
KLC		 11023 if (!turn_insn_to_sda_access (insn, ELF32_R_TYPE (irel->r_info),
11024 &insn))
11025 return;
11026 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11027 bfd_putb32 (insn, contents + laddr);
11028
11029 irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11030 R_NDS32_INSN16);
11031 /* SDA17 must keep INSN16 for converting fp_as_gp. */
11032 if (irelfn != irelend && reloc != R_NDS32_SDA17S2_RELA)
11033 irelfn->r_info =
11034 ELF32_R_INFO (ELF32_R_SYM (irelfn->r_info), R_NDS32_NONE);
11035
35c08157 11036 }
1c8f6a4d
KLC		 11037 }
11038 return;
11039}
35c08157 11040
1c8f6a4d
KLC		 11041/* Relax low part of PIC instruction pattern. */
11042
11043static void
11044nds32_elf_relax_piclo12 (struct bfd_link_info *link_info, bfd *abfd,
11045 asection *sec, Elf_Internal_Rela *irel,
11046 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11047 Elf_Internal_Shdr *symtab_hdr)
11048{
11049 uint32_t insn;
11050 bfd_vma local_sda, laddr;
11051 bfd_signed_vma foff;
11052 unsigned long reloc;
11053
11054 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11055 &local_sda, FALSE);
11056 laddr = irel->r_offset;
11057 insn = bfd_getb32 (contents + laddr);
11058
11059 if (N32_OP6 (insn) != N32_OP6_ORI)
11060 return;
11061
11062 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12)
11063 {
11064 foff = calculate_got_memory_address (abfd, link_info, irel,
11065 symtab_hdr) - local_sda;
11066 reloc = R_NDS32_GOT20;
11067 }
11068 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12)
11069 {
11070 foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
11071 symtab_hdr) - local_sda;
11072 reloc = R_NDS32_PLT_GOTREL_LO20;
11073 }
11074 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12)
11075 {
11076 foff = calculate_memory_address (abfd, irel, isymbuf,
11077 symtab_hdr) - local_sda;
11078 reloc = R_NDS32_GOTOFF;
11079 }
11080 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12)
11081 {
11082 foff = local_sda - sec->output_section->vma + sec->output_offset
11083 + irel->r_offset + irel->r_addend;
11084 reloc = R_NDS32_GOTPC20;
11085 }
11086 else
11087 return;
11088
11089 if ((foff < CONSERVATIVE_20BIT) && (foff >= -CONSERVATIVE_20BIT))
11090 {
11091 /* Turn into MOVI. */
11092 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11093 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
11094 bfd_putb32 (insn, contents + laddr);
11095 }
11096}
11097
11098/* Relax low part of LE TLS instruction pattern. */
11099
11100static void
11101nds32_elf_relax_letlslo12 (struct bfd_link_info *link_info, bfd *abfd,
11102 Elf_Internal_Rela *irel,
11103 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11104 Elf_Internal_Shdr *symtab_hdr)
11105{
11106 uint32_t insn;
11107 bfd_vma laddr;
11108 bfd_signed_vma foff;
11109 unsigned long reloc;
11110
11111 laddr = irel->r_offset;
11112 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11113 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11114 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11115 insn = bfd_getb32 (contents + laddr);
11116
11117 if ( (bfd_signed_vma) (foff) < CONSERVATIVE_20BIT
11118 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_20BIT)
11119 {
11120 /* Pattern sethi-ori transform to movi. */
11121 reloc = R_NDS32_TLS_LE_20;
11122 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11123 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
11124 bfd_putb32 (insn, contents + laddr);
11125 }
11126}
11127
11128/* Relax LE TLS calculate address instruction pattern. */
11129
11130static void
11131nds32_elf_relax_letlsadd (struct bfd_link_info *link_info, bfd *abfd,
11132 asection *sec, Elf_Internal_Rela *irel,
11133 Elf_Internal_Rela *internal_relocs,
11134 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11135 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11136{
11137 /* Local TLS non-pic
11138 sethi ta, hi20(symbol@tpoff) ; TLS_LE_HI20
11139 ori ta, ta, lo12(symbol@tpoff) ; TLS_LE_LO12
11140 add ra, ta, tp ; TLS_LE_ADD */
11141
11142 uint32_t insn;
11143 bfd_vma laddr;
11144 bfd_signed_vma foff;
11145 Elf_Internal_Rela *i1_irelfn, *irelend;
11146
11147 irelend = internal_relocs + sec->reloc_count;
11148 laddr = irel->r_offset;
11149 insn = bfd_getb32 (contents + laddr);
11150 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11151 R_NDS32_PTR_RESOLVED);
11152 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11153 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11154 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11155
11156 /* The range is +/-16k. */
11157 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
11158 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
11159 {
11160 /* Transform add to addi. */
11161 insn = N32_TYPE2 (ADDI, N32_RT5 (insn), N32_RB5 (insn), 0);
11162 irel->r_info =
11163 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
11164
11165 bfd_putb32 (insn, contents + laddr);
11166 if (i1_irelfn != irelend)
11167 {
11168 i1_irelfn->r_addend |= 1;
11169 *again = TRUE;
11170 }
11171 }
11172}
11173
11174/* Relax LE TLS load store instruction pattern. */
11175
11176static void
11177nds32_elf_relax_letlsls (struct bfd_link_info *link_info, bfd *abfd,
11178 asection *sec, Elf_Internal_Rela *irel,
11179 Elf_Internal_Rela *internal_relocs,
11180 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11181 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11182{
11183
11184 uint32_t insn;
11185 bfd_vma laddr;
11186 bfd_signed_vma foff;
11187 Elf_Internal_Rela *i1_irelfn, *irelend;
11188 int success = 0;
11189
11190 irelend = internal_relocs + sec->reloc_count;
11191 laddr = irel->r_offset;
11192 insn = bfd_getb32 (contents + laddr);
11193 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11194 R_NDS32_PTR_RESOLVED);
11195 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11196 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11197 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11198
11199 switch ((N32_OP6 (insn) << 8) | (insn & 0xff))
11200 {
11201 case (N32_OP6_MEM << 8) | N32_MEM_LB:
11202 case (N32_OP6_MEM << 8) | N32_MEM_SB:
11203 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
11204 /* The range is +/-16k. */
11205 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
11206 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
11207 {
11208 insn =
11209 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11210 irel->r_info =
11211 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
11212 success = 1;
11213 break;
11214 }
11215 case (N32_OP6_MEM << 8) | N32_MEM_LH:
11216 case (N32_OP6_MEM << 8) | N32_MEM_SH:
11217 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
11218 /* The range is +/-32k. */
11219 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S1
11220 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S1)
35c08157 11221 {
1c8f6a4d
KLC		 11222 insn =
11223 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11224 irel->r_info =
11225 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S1);
11226 success = 1;
11227 break;
11228 }
11229 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11230 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11231 /* The range is +/-64k. */
11232 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S2
11233 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S2)
11234 {
11235 insn =
11236 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11237 irel->r_info =
11238 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S2);
11239 success = 1;
11240 break;
11241 }
11242 default:
11243 break;
11244 }
35c08157 11245
1c8f6a4d
KLC		 11246 if (success)
11247 {
11248 bfd_putb32 (insn, contents + laddr);
11249 if (i1_irelfn != irelend)
11250 {
11251 i1_irelfn->r_addend |= 1;
11252 *again = TRUE;
11253 }
11254 }
11255}
35c08157 11256
1c8f6a4d 11257/* Relax PTR relocation for nds32_elf_relax_section. */
35c08157 11258
1c8f6a4d
KLC		 11259static bfd_boolean
11260nds32_elf_relax_ptr (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
11261 Elf_Internal_Rela *internal_relocs, int *insn_len,
11262 int *seq_len, bfd_byte *contents)
11263{
11264 Elf_Internal_Rela *ptr_irel, *irelend, *count_irel, *re_irel;
35c08157 11265
1c8f6a4d 11266 irelend = internal_relocs + sec->reloc_count;
35c08157 11267
1c8f6a4d
KLC		 11268 re_irel =
11269 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11270 R_NDS32_PTR_RESOLVED, irel->r_addend);
35c08157 11271
1c8f6a4d
KLC		 11272 if (re_irel == irelend)
11273 {
11274 (*_bfd_error_handler)
11275 ("%B: warning: R_NDS32_PTR points to unrecognized reloc at 0x%lx.",
11276 abfd, (long) irel->r_offset);
11277 return FALSE;
11278 }
35c08157 11279
1c8f6a4d
KLC		 11280 if (re_irel->r_addend != 1)
11281 return FALSE;
35c08157 11282
1c8f6a4d
KLC		 11283 /* Pointed target is relaxed and no longer needs this void *,
11284 change the type to NONE. */
11285 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 11286
1c8f6a4d
KLC		 11287 /* Find PTR_COUNT to decide remove it or not. If PTR_COUNT does
11288 not exist, it means only count 1 and remove it directly. */
11289 /* TODO: I hope we can obsolate R_NDS32_COUNT in the future. */
11290 count_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11291 R_NDS32_PTR_COUNT);
11292 ptr_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11293 R_NDS32_PTR);
11294 if (count_irel != irelend)
11295 {
11296 if (--count_irel->r_addend > 0)
11297 return FALSE;
11298 }
11299
11300 if (ptr_irel != irelend)
11301 return FALSE;
11302
11303 /* If the PTR_COUNT is already 0, remove current instruction. */
11304 *seq_len = nds32_elf_insn_size (abfd, contents, irel->r_offset);
11305 *insn_len = 0;
11306 return TRUE;
11307}
11308
11309/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11310
11311static void
11312nds32_elf_relax_pltgot_suff (struct bfd_link_info *link_info, bfd *abfd,
11313 asection *sec, Elf_Internal_Rela *irel,
11314 Elf_Internal_Rela *internal_relocs,
11315 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11316 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11317{
11318 uint32_t insn;
11319 bfd_signed_vma foff;
11320 Elf_Internal_Rela *i1_irelfn, *irelend;
11321 bfd_vma local_sda, laddr;
11322
11323 irelend = internal_relocs + sec->reloc_count;
11324 laddr = irel->r_offset;
11325 insn = bfd_getb32 (contents + laddr);
11326
11327 /* FIXME: It's a little trouble to turn JRAL5 to JAL since
11328 we need additional space. It might be help if we could
11329 borrow some space from instructions to be eliminated
11330 such as sethi, ori, add. */
11331 if (insn & 0x80000000)
11332 return;
11333
11334 if (nds32_elf_check_dup_relocs
11335 (irel, internal_relocs, irelend, R_NDS32_PLT_GOT_SUFF))
11336 return;
11337
11338 i1_irelfn =
11339 find_relocs_at_address (irel, internal_relocs, irelend,
11340 R_NDS32_PTR_RESOLVED);
11341
11342 /* FIXIT 090606
11343 The boundary should be reduced since the .plt section hasn't
11344 been created and the address of specific entry is still unknown
11345 Maybe the range between the function call and the begin of the
11346 .text section can be used to decide if the .plt is in the range
11347 of function call. */
11348
11349 if (N32_OP6 (insn) == N32_OP6_ALU1
11350 && N32_SUB5 (insn) == N32_ALU1_ADD)
11351 {
11352 /* Get the value of the symbol referred to by the reloc. */
11353 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11354 &local_sda, FALSE);
11355 foff = (bfd_signed_vma) (calculate_plt_memory_address
11356 (abfd, link_info, isymbuf, irel,
11357 symtab_hdr) - local_sda);
11358 /* This condition only happened when symbol is undefined. */
11359 if (foff == 0)
11360 return;
11361
11362 if (foff < -CONSERVATIVE_19BIT || foff >= CONSERVATIVE_19BIT)
11363 return;
11364 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11365 R_NDS32_PLT_GOTREL_LO19);
11366 /* addi.gp */
11367 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
11368 }
11369 else if (N32_OP6 (insn) == N32_OP6_JREG
11370 && N32_SUB5 (insn) == N32_JREG_JRAL)
11371 {
11372 /* Get the value of the symbol referred to by the reloc. */
11373 foff =
11374 calculate_plt_offset (abfd, sec, link_info, isymbuf, irel, symtab_hdr);
11375 /* This condition only happened when symbol is undefined. */
11376 if (foff == 0)
11377 return;
11378 if (foff < -CONSERVATIVE_24BIT_S1 || foff >= CONSERVATIVE_24BIT_S1)
11379 return;
11380 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_25_PLTREL);
11381 insn = INSN_JAL;
11382 }
11383 else
11384 return;
11385
11386 bfd_putb32 (insn, contents + laddr);
11387 if (i1_irelfn != irelend)
11388 {
11389 i1_irelfn->r_addend |= 1;
11390 *again = TRUE;
11391 }
11392}
11393
11394/* Relax GOT_SUFF relocation for nds32_elf_relax_section. */
11395
11396static void
11397nds32_elf_relax_got_suff (struct bfd_link_info *link_info, bfd *abfd,
11398 asection *sec, Elf_Internal_Rela *irel,
11399 Elf_Internal_Rela *internal_relocs,
11400 bfd_byte *contents, Elf_Internal_Shdr *symtab_hdr,
11401 bfd_boolean *again)
11402{
11403 uint32_t insn;
11404 bfd_signed_vma foff;
11405 Elf_Internal_Rela *i1_irelfn, *irelend;
11406 bfd_vma local_sda, laddr;
11407
11408 irelend = internal_relocs + sec->reloc_count;
11409 laddr = irel->r_offset;
11410 insn = bfd_getb32 (contents + laddr);
11411 if (insn & 0x80000000)
11412 return;
11413
11414 if (nds32_elf_check_dup_relocs
11415 (irel, internal_relocs, irelend, R_NDS32_GOT_SUFF))
11416 return;
11417
11418 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11419 R_NDS32_PTR_RESOLVED);
11420
11421 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11422 &local_sda, FALSE);
11423 foff = calculate_got_memory_address (abfd, link_info, irel,
11424 symtab_hdr) - local_sda;
11425
11426 if (foff < CONSERVATIVE_19BIT && foff >= -CONSERVATIVE_19BIT)
11427 {
11428 /* Turn LW to LWI.GP. Change relocation type to R_NDS32_GOT_REL. */
11429 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11430 irel->r_info =
11431 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_GOT17S2_RELA);
11432 bfd_putb32 (insn, contents + laddr);
11433 if (i1_irelfn != irelend)
11434 {
11435 i1_irelfn->r_addend |= 1;
11436 *again = TRUE;
11437 }
11438 }
11439}
11440
11441/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11442
11443static void
11444nds32_elf_relax_gotoff_suff (struct bfd_link_info *link_info, bfd *abfd,
11445 asection *sec, Elf_Internal_Rela *irel,
11446 Elf_Internal_Rela *internal_relocs,
11447 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11448 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11449{
11450 int opc_insn_gotoff;
11451 uint32_t insn;
11452 bfd_signed_vma foff;
11453 Elf_Internal_Rela *i1_irelfn, *i2_irelfn, *irelend;
11454 bfd_vma local_sda, laddr;
11455
11456 irelend = internal_relocs + sec->reloc_count;
11457 laddr = irel->r_offset;
11458 insn = bfd_getb32 (contents + laddr);
11459
11460 if (insn & 0x80000000)
11461 return;
11462
11463 if (nds32_elf_check_dup_relocs
11464 (irel, internal_relocs, irelend, R_NDS32_GOTOFF_SUFF))
11465 return;
11466
11467 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11468 R_NDS32_PTR_RESOLVED);
11469 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11470 &local_sda, FALSE);
11471 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11472 foff = foff - local_sda;
11473
11474 if (foff >= CONSERVATIVE_19BIT || foff < -CONSERVATIVE_19BIT)
11475 return;
11476
11477 /* Concatenate opcode and sub-opcode for switch case.
11478 It may be MEM or ALU1. */
11479 opc_insn_gotoff = (N32_OP6 (insn) << 8) | (insn & 0xff);
11480 switch (opc_insn_gotoff)
11481 {
11482 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11483 /* 4-byte aligned. */
11484 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11485 irel->r_info =
11486 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11487 break;
11488 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11489 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
11490 irel->r_info =
11491 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11492 break;
11493 case (N32_OP6_MEM << 8) | N32_MEM_LH:
11494 /* 2-byte aligned. */
11495 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
11496 irel->r_info =
11497 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11498 break;
11499 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
11500 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18));
11501 irel->r_info =
11502 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11503 break;
11504 case (N32_OP6_MEM << 8) | N32_MEM_SH:
11505 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19));
11506 irel->r_info =
11507 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11508 break;
11509 case (N32_OP6_MEM << 8) | N32_MEM_LB:
11510 /* 1-byte aligned. */
11511 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
11512 irel->r_info =
11513 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11514 break;
11515 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
11516 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19));
11517 irel->r_info =
11518 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11519 break;
11520 case (N32_OP6_MEM << 8) | N32_MEM_SB:
11521 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
11522 irel->r_info =
11523 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11524 break;
11525 case (N32_OP6_ALU1 << 8) | N32_ALU1_ADD:
11526 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
11527 irel->r_info =
11528 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11529 break;
11530 default:
11531 return;
11532 }
11533
11534 bfd_putb32 (insn, contents + laddr);
11535 if (i1_irelfn != irelend)
11536 {
11537 i1_irelfn->r_addend |= 1;
11538 *again = TRUE;
11539 }
11540 if ((i2_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11541 R_NDS32_INSN16)) != irelend)
11542 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11543
11544}
11545
11546static bfd_boolean
11547nds32_relax_adjust_label (bfd *abfd, asection *sec,
11548 Elf_Internal_Rela *internal_relocs,
11549 bfd_byte *contents,
11550 nds32_elf_blank_t **relax_blank_list,
11551 int optimize, int opt_size)
11552{
11553 /* This code block is used to adjust 4-byte alignment by relax a pair
11554 of instruction a time.
11555
11556 It recognizes three types of relocations.
11557 1. R_NDS32_LABEL - a aligment.
11558 2. R_NDS32_INSN16 - relax a 32-bit instruction to 16-bit.
11559 3. is_16bit_NOP () - remove a 16-bit instruction. */
11560
11561 /* TODO: It seems currently implementation only support 4-byte aligment.
11562 We should handle any-aligment. */
11563
11564 Elf_Internal_Rela *insn_rel = NULL, *label_rel = NULL, *irel;
11565 Elf_Internal_Rela *tmp_rel, *tmp2_rel = NULL;
11566 Elf_Internal_Rela rel_temp;
11567 Elf_Internal_Rela *irelend;
11568 bfd_vma address;
11569 uint16_t insn16;
11570
11571 /* Checking for branch relaxation relies on the relocations to
11572 be sorted on 'r_offset'. This is not guaranteed so we must sort. */
11573 nds32_insertion_sort (internal_relocs, sec->reloc_count,
11574 sizeof (Elf_Internal_Rela), compar_reloc);
11575
11576 irelend = internal_relocs + sec->reloc_count;
11577
11578 /* Force R_NDS32_LABEL before R_NDS32_INSN16. */
11579 /* FIXME: Can we generate the right order in assembler?
11580 So we don't have to swapping them here. */
11581
11582 for (label_rel = internal_relocs, insn_rel = internal_relocs;
11583 label_rel < irelend; label_rel++)
11584 {
11585 if (ELF32_R_TYPE (label_rel->r_info) != R_NDS32_LABEL)
11586 continue;
11587
11588 /* Find the first reloc has the same offset with label_rel. */
11589 while (insn_rel < irelend && insn_rel->r_offset < label_rel->r_offset)
11590 insn_rel++;
11591
11592 for (;insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset;
11593 insn_rel++)
11594 /* Check if there were R_NDS32_INSN16 and R_NDS32_LABEL at the same
11595 address. */
11596 if (ELF32_R_TYPE (insn_rel->r_info) == R_NDS32_INSN16)
11597 break;
11598
11599 if (insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset
11600 && insn_rel < label_rel)
11601 {
11602 /* Swap the two reloc if the R_NDS32_INSN16 is
11603 before R_NDS32_LABEL. */
11604 memcpy (&rel_temp, insn_rel, sizeof (Elf_Internal_Rela));
11605 memcpy (insn_rel, label_rel, sizeof (Elf_Internal_Rela));
11606 memcpy (label_rel, &rel_temp, sizeof (Elf_Internal_Rela));
11607 }
11608 }
11609
11610 label_rel = NULL;
11611 insn_rel = NULL;
11612 /* If there were a sequence of R_NDS32_LABEL end up with .align 2
11613 or higher, remove other R_NDS32_LABEL with lower alignment.
11614 If an R_NDS32_INSN16 in between R_NDS32_LABELs must be converted,
11615 then the R_NDS32_LABEL sequence is broke. */
11616 for (tmp_rel = internal_relocs; tmp_rel < irelend; tmp_rel++)
11617 {
11618 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_LABEL)
11619 {
11620 if (label_rel == NULL)
11621 {
11622 if (tmp_rel->r_addend < 2)
11623 label_rel = tmp_rel;
11624 continue;
11625 }
11626 else if (tmp_rel->r_addend > 1)
11627 {
11628 /* Remove all LABEL relocation from label_rel to tmp_rel
11629 including relocations with same offset as tmp_rel. */
11630 for (tmp2_rel = label_rel; tmp2_rel < tmp_rel
11631 || tmp2_rel->r_offset == tmp_rel->r_offset; tmp2_rel++)
11632 {
11633 if (ELF32_R_TYPE (tmp2_rel->r_info) == R_NDS32_LABEL
11634 && tmp2_rel->r_addend < 2)
11635 tmp2_rel->r_info =
11636 ELF32_R_INFO (ELF32_R_SYM (tmp2_rel->r_info),
11637 R_NDS32_NONE);
11638 }
11639 label_rel = NULL;
11640 }
11641 }
11642 else if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16 && label_rel)
11643 {
11644 /* A new INSN16 which can be converted, so clear label_rel. */
11645 if (is_convert_32_to_16 (abfd, sec, tmp_rel, internal_relocs,
11646 irelend, &insn16)
11647 || is_16bit_NOP (abfd, sec, tmp_rel))
11648 label_rel = NULL;
11649 }
11650 }
11651
11652 label_rel = NULL;
11653 insn_rel = NULL;
11654 /* Optimized for speed and nothing has not been relaxed.
11655 It's time to align labels.
11656 We may convert a 16-bit instruction right before a label to
11657 32-bit, in order to align the label if necessary
11658 all reloc entries has been sorted by r_offset. */
11659 for (irel = internal_relocs; irel < irelend; irel++)
11660 {
11661 if (ELF32_R_TYPE (irel->r_info) != R_NDS32_INSN16
11662 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL)
11663 continue;
11664
11665 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_INSN16)
11666 {
11667 /* A new INSN16 found, resize the old one. */
11668 if (is_convert_32_to_16
11669 (abfd, sec, irel, internal_relocs, irelend, &insn16)
11670 || is_16bit_NOP (abfd, sec, irel))
11671 {
11672 if (insn_rel)
11673 {
11674 /* Previous INSN16 reloc exists, reduce its
11675 size to 16-bit. */
11676 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11677 irelend, &insn16))
35c08157 11678 {
1c8f6a4d
KLC		 11679 nds32_elf_write_16 (abfd, contents, insn_rel,
11680 internal_relocs, irelend, insn16);
11681
11682 if (!insert_nds32_elf_blank_recalc_total
11683 (relax_blank_list, insn_rel->r_offset + 2, 2))
11684 return FALSE;
11685 }
11686 else if (is_16bit_NOP (abfd, sec, insn_rel))
11687 {
11688 if (!insert_nds32_elf_blank_recalc_total
11689 (relax_blank_list, insn_rel->r_offset, 2))
11690 return FALSE;
11691 }
11692 insn_rel->r_info =
11693 ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info), R_NDS32_NONE);
11694 }
11695 /* Save the new one for later use. */
11696 insn_rel = irel;
11697 }
11698 else
11699 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11700 R_NDS32_NONE);
11701 }
11702 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL)
11703 {
11704 /* Search for label. */
11705 int force_relax = 0;
11706
11707 /* Label on 16-bit instruction or optimization
11708 needless, just reset this reloc. */
11709 insn16 = bfd_getb16 (contents + irel->r_offset);
11710 if ((irel->r_addend & 0x1f) < 2 && (!optimize || (insn16 & 0x8000)))
11711 {
11712 irel->r_info =
11713 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11714 continue;
11715 }
11716
11717 address =
11718 irel->r_offset - get_nds32_elf_blank_total (relax_blank_list,
11719 irel->r_offset, 1);
11720
11721 if (!insn_rel)
11722 {
11723 /* Check if there is case which can not be aligned. */
11724 if (irel->r_addend == 2 && address & 0x2)
11725 return FALSE;
11726 continue;
11727 }
11728
11729 /* Try to align this label. */
11730
11731 if ((irel->r_addend & 0x1f) < 2)
11732 {
11733 /* Check if there is a INSN16 at the same address.
11734 Label_rel always seats before insn_rel after
11735 our sort. */
11736
11737 /* Search for INSN16 at LABEL location. If INSN16 is at
11738 same location and this LABEL alignment is lower than 2,
11739 the INSN16 can be converted to 2-byte. */
11740 for (tmp_rel = irel;
11741 tmp_rel < irelend && tmp_rel->r_offset == irel->r_offset;
11742 tmp_rel++)
11743 {
11744 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16
11745 && (is_convert_32_to_16
11746 (abfd, sec, tmp_rel, internal_relocs,
11747 irelend, &insn16)
11748 || is_16bit_NOP (abfd, sec, tmp_rel)))
11749 {
11750 force_relax = 1;
11751 break;
11752 }
11753 }
11754 }
11755
11756 if (force_relax || irel->r_addend == 1 || address & 0x2)
11757 {
11758 /* Label not aligned. */
11759 /* Previous reloc exists, reduce its size to 16-bit. */
11760 if (is_convert_32_to_16 (abfd, sec, insn_rel,
11761 internal_relocs, irelend, &insn16))
11762 {
11763 nds32_elf_write_16 (abfd, contents, insn_rel,
11764 internal_relocs, irelend, insn16);
11765
11766 if (!insert_nds32_elf_blank_recalc_total
11767 (relax_blank_list, insn_rel->r_offset + 2, 2))
11768 return FALSE;
11769 }
11770 else if (is_16bit_NOP (abfd, sec, insn_rel))
11771 {
11772 if (!insert_nds32_elf_blank_recalc_total
11773 (relax_blank_list, insn_rel->r_offset, 2))
11774 return FALSE;
11775 }
11776
11777 }
11778 /* INSN16 reloc is used. */
11779 insn_rel = NULL;
11780 }
11781 }
11782
11783 address =
11784 sec->size - get_nds32_elf_blank_total (relax_blank_list, sec->size, 0);
11785 if (insn_rel && (address & 0x2 || opt_size))
11786 {
11787 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11788 irelend, &insn16))
11789 {
11790 nds32_elf_write_16 (abfd, contents, insn_rel, internal_relocs,
11791 irelend, insn16);
11792 if (!insert_nds32_elf_blank_recalc_total
11793 (relax_blank_list, insn_rel->r_offset + 2, 2))
11794 return FALSE;
11795 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11796 R_NDS32_NONE);
11797 }
11798 else if (is_16bit_NOP (abfd, sec, insn_rel))
11799 {
11800 if (!insert_nds32_elf_blank_recalc_total
11801 (relax_blank_list, insn_rel->r_offset, 2))
11802 return FALSE;
11803 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11804 R_NDS32_NONE);
11805 }
11806 }
11807 insn_rel = NULL;
11808 return TRUE;
11809}
11810
11811/* Pick relaxation round. */
11812
11813static int
11814nds32_elf_pick_relax (bfd_boolean init, asection *sec, bfd_boolean *again,
11815 struct elf_nds32_link_hash_table *table,
11816 struct bfd_link_info *link_info)
11817{
18393a2e
KLC		 11818 static asection *final_sec, *first_sec = NULL;
11819 static bfd_boolean normal_again = FALSE;
1c8f6a4d
KLC		 11820 static bfd_boolean set = FALSE;
11821 static bfd_boolean first = TRUE;
11822 int round_table[] = {
11823 NDS32_RELAX_NORMAL_ROUND,
11824 NDS32_RELAX_JUMP_IFC_ROUND,
11825 NDS32_RELAX_EX9_BUILD_ROUND,
11826 NDS32_RELAX_EX9_REPLACE_ROUND,
11827 };
11828 static int pass = 0;
11829 static int relax_round;
11830
18393a2e
KLC		 11831 /* The new round. */
11832 if (init && first_sec == sec)
11833 {
11834 set = TRUE;
11835 normal_again = FALSE;
11836 }
11837
1c8f6a4d
KLC		 11838 if (first)
11839 {
11840 /* Run an empty run to get the final section. */
11841 relax_round = NDS32_RELAX_EMPTY_ROUND;
11842
11843 /* It has to enter relax again because we can
11844 not make sure what the final turn is. */
11845 *again = TRUE;
18393a2e 11846
1c8f6a4d 11847 first = FALSE;
18393a2e 11848 first_sec = sec;
1c8f6a4d
KLC		 11849 }
11850
18393a2e 11851 if (!set)
1c8f6a4d 11852 {
18393a2e 11853 /* Not reenter yet. */
1c8f6a4d
KLC		 11854 final_sec = sec;
11855 return relax_round;
11856 }
11857
1c8f6a4d
KLC		 11858 relax_round = round_table[pass];
11859
18393a2e
KLC		 11860 if (!init && relax_round == NDS32_RELAX_NORMAL_ROUND && *again)
11861 normal_again = TRUE;
11862
1c8f6a4d
KLC		 11863 if (!init && final_sec == sec)
11864 {
11865 switch (relax_round)
11866 {
11867 case NDS32_RELAX_NORMAL_ROUND:
18393a2e 11868 if (!normal_again)
1c8f6a4d
KLC		 11869 {
11870 /* Normal relaxation done. */
11871 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11872 {
11873 pass++;
11874 *again = TRUE;
11875 }
11876 else if (table->target_optimize & NDS32_RELAX_EX9_ON)
11877 {
11878 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11879 *again = TRUE;
11880 }
11881 else if (table->ex9_import_file)
11882 {
11883 /* Import ex9 table. */
11884 if (table->update_ex9_table)
11885 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11886 else
11887 pass += 3; /* NDS32_RELAX_EX9_REPLACE_ROUND */
11888 nds32_elf_ex9_import_table (link_info);
11889 *again = TRUE;
11890 }
11891 }
11892 break;
11893 case NDS32_RELAX_JUMP_IFC_ROUND:
11894 if (!nds32_elf_ifc_finish (link_info))
11895 (*_bfd_error_handler) (_("error: Jump IFC Fail."));
11896 if (table->target_optimize & NDS32_RELAX_EX9_ON)
11897 {
11898 pass++;
11899 *again = TRUE;
11900 }
11901 break;
11902 case NDS32_RELAX_EX9_BUILD_ROUND:
11903 nds32_elf_ex9_finish (link_info);
11904 pass++;
11905 *again = TRUE;
11906 break;
11907 case NDS32_RELAX_EX9_REPLACE_ROUND:
11908 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11909 {
11910 /* Do jump IFC optimization again. */
11911 if (!nds32_elf_ifc_finish (link_info))
11912 (*_bfd_error_handler) (_("error: Jump IFC Fail."));
11913 }
11914 break;
11915 default:
11916 break;
11917 }
11918 }
11919
11920 return relax_round;
11921}
11922
11923static bfd_boolean
11924nds32_elf_relax_section (bfd *abfd, asection *sec,
11925 struct bfd_link_info *link_info, bfd_boolean *again)
11926{
11927 nds32_elf_blank_t *relax_blank_list = NULL;
11928 Elf_Internal_Shdr *symtab_hdr;
11929 Elf_Internal_Rela *internal_relocs;
11930 Elf_Internal_Rela *irel;
11931 Elf_Internal_Rela *irelend;
11932 Elf_Internal_Sym *isymbuf = NULL;
11933 bfd_byte *contents = NULL;
11934 bfd_boolean result = TRUE;
11935 int optimize = 0;
11936 int opt_size = 0;
11937 uint32_t insn;
11938 uint16_t insn16;
11939
11940 /* Target dependnet option. */
11941 struct elf_nds32_link_hash_table *table;
11942 int load_store_relax;
11943 int relax_round;
11944
11945 relax_blank_list = NULL;
11946
11947 *again = FALSE;
11948
11949 /* Nothing to do for
11950 * relocatable link or
11951 * non-relocatable section or
11952 * non-code section or
11953 * empty content or
11954 * no reloc entry. */
11955 if (link_info->relocatable
11956 || (sec->flags & SEC_RELOC) == 0
11957 || (sec->flags & SEC_EXCLUDE) == 1
11958 || (sec->flags & SEC_CODE) == 0
11959 || sec->size == 0)
11960 return TRUE;
11961
11962 /* 09.12.11 Workaround. */
11963 /* We have to adjust align for R_NDS32_LABEL if needed.
11964 The adjust approach only can fix 2-byte align once. */
11965 if (sec->alignment_power > 2)
11966 return TRUE;
11967
11968 /* The optimization type to do. */
11969
11970 table = nds32_elf_hash_table (link_info);
11971 relax_round = nds32_elf_pick_relax (TRUE, sec, again, table, link_info);
11972 switch (relax_round)
11973 {
11974 case NDS32_RELAX_JUMP_IFC_ROUND:
11975 /* Here is the entrance of ifc jump relaxation. */
11976 if (!nds32_elf_ifc_calc (link_info, abfd, sec))
11977 return FALSE;
11978 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11979 return TRUE;
11980
11981 case NDS32_RELAX_EX9_BUILD_ROUND:
11982 /* Here is the entrance of ex9 relaxation. There are two pass of
11983 ex9 relaxation. The one is to traverse all instructions and build
11984 the hash table. The other one is to compare instructions and replace
11985 it by ex9.it. */
11986 if (!nds32_elf_ex9_build_hash_table (abfd, sec, link_info))
11987 return FALSE;
11988 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11989 return TRUE;
11990
11991 case NDS32_RELAX_EX9_REPLACE_ROUND:
11992 if (!nds32_elf_ex9_replace_instruction (link_info, abfd, sec))
11993 return FALSE;
11994 return TRUE;
11995
11996 case NDS32_RELAX_EMPTY_ROUND:
11997 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11998 return TRUE;
11999
12000 case NDS32_RELAX_NORMAL_ROUND:
12001 default:
12002 if (sec->reloc_count == 0)
12003 return TRUE;
12004 break;
12005 }
12006
12007 /* The begining of general relaxation. */
12008
12009 if (is_SDA_BASE_set == 0)
12010 {
12011 bfd_vma gp;
12012 is_SDA_BASE_set = 1;
12013 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
12014 &gp, FALSE);
12015 relax_range_measurement (abfd);
12016 }
12017
12018 if (is_ITB_BASE_set == 0)
12019 {
12020 /* Set the _ITB_BASE_. */
12021 if (!nds32_elf_ex9_itb_base (link_info))
12022 {
12023 (*_bfd_error_handler) (_("%B: error: Cannot set _ITB_BASE_"), abfd);
12024 bfd_set_error (bfd_error_bad_value);
12025 }
12026 }
12027
12028 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12029 /* Relocations MUST be kept in memory, because relaxation adjust them. */
12030 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
12031 TRUE /* keep_memory */);
12032 if (internal_relocs == NULL)
12033 goto error_return;
12034
12035 irelend = internal_relocs + sec->reloc_count;
12036 irel = find_relocs_at_address (internal_relocs, internal_relocs,
12037 irelend, R_NDS32_RELAX_ENTRY);
12038
12039 if (irel == irelend)
12040 return TRUE;
12041
12042 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
12043 {
12044 if (irel->r_addend & R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG)
18393a2e
KLC		 12045 {
12046 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12047 return TRUE;
12048 }
1c8f6a4d
KLC		 12049
12050 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FLAG)
12051 optimize = 1;
12052
12053 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FOR_SPACE_FLAG)
12054 opt_size = 1;
12055 }
12056
12057 load_store_relax = table->load_store_relax;
12058
12059 /* Get symbol table and section content. */
12060 if (!nds32_get_section_contents (abfd, sec, &contents)
12061 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12062 goto error_return;
12063
12064 /* Do relax loop only when finalize is not done.
12065 Take care of relaxable relocs except INSN16. */
12066 for (irel = internal_relocs; irel < irelend; irel++)
12067 {
12068 int seq_len; /* Original length of instruction sequence. */
12069 int insn_len = 0; /* Final length of instruction sequence. */
12070 bfd_boolean removed;
12071
12072 insn = 0;
12073 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
12074 && (irel->r_addend & 0x1f) >= 2)
12075 optimize = 1;
12076
12077 /* Relocation Types
12078 R_NDS32_LONGCALL1 53
12079 R_NDS32_LONGCALL2 54
12080 R_NDS32_LONGCALL3 55
12081 R_NDS32_LONGJUMP1 56
12082 R_NDS32_LONGJUMP2 57
12083 R_NDS32_LONGJUMP3 58
12084 R_NDS32_LOADSTORE 59 */
12085 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL1
12086 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LOADSTORE)
12087 seq_len = GET_SEQ_LEN (irel->r_addend);
12088
12089 /* Relocation Types
12090 R_NDS32_LONGCALL4 107
12091 R_NDS32_LONGCALL5 108
12092 R_NDS32_LONGCALL6 109
12093 R_NDS32_LONGJUMP4 110
12094 R_NDS32_LONGJUMP5 111
12095 R_NDS32_LONGJUMP6 112
12096 R_NDS32_LONGJUMP7 113 */
12097 else if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL4
12098 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LONGJUMP7)
12099 seq_len = 4;
12100
12101 /* Relocation Types
12102 R_NDS32_LO12S0_RELA 30
12103 R_NDS32_LO12S1_RELA 29
12104 R_NDS32_LO12S2_RELA 28
12105 R_NDS32_LO12S2_SP_RELA 71
12106 R_NDS32_LO12S2_DP_RELA 70
12107 R_NDS32_GOT_LO12 46
12108 R_NDS32_GOTOFF_LO12 50
12109 R_NDS32_PLTREL_LO12 65
12110 R_NDS32_PLT_GOTREL_LO12 67
12111 R_NDS32_17IFC_PCREL_RELA 96
12112 R_NDS32_GOT_SUFF 193
12113 R_NDS32_GOTOFF_SUFF 194
12114 R_NDS32_PLT_GOT_SUFF 195
12115 R_NDS32_MULCALL_SUFF 196
12116 R_NDS32_PTR 197 */
12117 else if ((ELF32_R_TYPE (irel->r_info) <= R_NDS32_LO12S0_RELA
12118 && ELF32_R_TYPE (irel->r_info) >= R_NDS32_LO12S2_RELA)
12119 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_SP_RELA
12120 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_DP_RELA
12121 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12
12122 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12
12123 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12
12124 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLTREL_LO12
12125 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12
12126 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_GOT_SUFF
12127 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_PTR)
12128 || ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12129 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LO12
12130 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_ADD
12131 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LS)
12132 seq_len = 0;
12133 else
12134 continue;
12135
12136 insn_len = seq_len;
12137 removed = FALSE;
12138
12139 switch (ELF32_R_TYPE (irel->r_info))
12140 {
12141 case R_NDS32_LONGCALL1:
12142 removed = nds32_elf_relax_longcall1 (abfd, sec, irel, internal_relocs,
12143 &insn_len, contents, isymbuf,
12144 symtab_hdr);
12145 break;
12146 case R_NDS32_LONGCALL2:
12147 removed = nds32_elf_relax_longcall2 (abfd, sec, irel, internal_relocs,
12148 &insn_len, contents, isymbuf,
12149 symtab_hdr);
12150 break;
12151 case R_NDS32_LONGCALL3:
12152 removed = nds32_elf_relax_longcall3 (abfd, sec, irel, internal_relocs,
12153 &insn_len, contents, isymbuf,
12154 symtab_hdr);
12155 break;
12156 case R_NDS32_LONGJUMP1:
12157 removed = nds32_elf_relax_longjump1 (abfd, sec, irel, internal_relocs,
12158 &insn_len, contents, isymbuf,
12159 symtab_hdr);
12160 break;
12161 case R_NDS32_LONGJUMP2:
12162 removed = nds32_elf_relax_longjump2 (abfd, sec, irel, internal_relocs,
12163 &insn_len, contents, isymbuf,
12164 symtab_hdr);
12165 break;
12166 case R_NDS32_LONGJUMP3:
12167 removed = nds32_elf_relax_longjump3 (abfd, sec, irel, internal_relocs,
12168 &insn_len, contents, isymbuf,
12169 symtab_hdr);
12170 break;
12171 case R_NDS32_LONGCALL4:
12172 removed = nds32_elf_relax_longcall4 (abfd, sec, irel, internal_relocs,
12173 &insn_len, contents, isymbuf,
12174 symtab_hdr);
12175 break;
12176 case R_NDS32_LONGCALL5:
12177 removed = nds32_elf_relax_longcall5 (abfd, sec, irel, internal_relocs,
12178 &insn_len, contents, isymbuf,
12179 symtab_hdr);
12180 break;
12181 case R_NDS32_LONGCALL6:
12182 removed = nds32_elf_relax_longcall6 (abfd, sec, irel, internal_relocs,
12183 &insn_len, contents, isymbuf,
12184 symtab_hdr);
12185 break;
12186 case R_NDS32_LONGJUMP4:
12187 removed = nds32_elf_relax_longjump4 (abfd, sec, irel, internal_relocs,
12188 &insn_len, contents, isymbuf,
12189 symtab_hdr);
12190 break;
12191 case R_NDS32_LONGJUMP5:
12192 removed = nds32_elf_relax_longjump5 (abfd, sec, irel, internal_relocs,
12193 &insn_len, &seq_len, contents,
12194 isymbuf, symtab_hdr);
12195 break;
12196 case R_NDS32_LONGJUMP6:
12197 removed = nds32_elf_relax_longjump6 (abfd, sec, irel, internal_relocs,
12198 &insn_len, &seq_len, contents,
12199 isymbuf, symtab_hdr);
12200 break;
12201 case R_NDS32_LONGJUMP7:
12202 removed = nds32_elf_relax_longjump7 (abfd, sec, irel, internal_relocs,
12203 &insn_len, &seq_len, contents,
12204 isymbuf, symtab_hdr);
12205 break;
12206 case R_NDS32_LOADSTORE:
12207 removed = nds32_elf_relax_loadstore (link_info, abfd, sec, irel,
12208 internal_relocs, &insn_len,
12209 contents, isymbuf, symtab_hdr,
12210 load_store_relax);
12211 break;
12212 case R_NDS32_LO12S0_RELA:
12213 case R_NDS32_LO12S1_RELA:
12214 case R_NDS32_LO12S2_DP_RELA:
12215 case R_NDS32_LO12S2_SP_RELA:
12216 case R_NDS32_LO12S2_RELA:
12217 /* Relax for low part. */
12218 nds32_elf_relax_lo12 (link_info, abfd, sec, irel, internal_relocs,
12219 contents, isymbuf, symtab_hdr);
12220
12221 /* It is impossible to delete blank, so just continue. */
12222 continue;
12223 case R_NDS32_GOT_LO12:
12224 case R_NDS32_GOTOFF_LO12:
12225 case R_NDS32_PLTREL_LO12:
12226 case R_NDS32_PLT_GOTREL_LO12:
12227 case R_NDS32_GOTPC_LO12:
12228 /* Relax for PIC gp-relative low part. */
12229 nds32_elf_relax_piclo12 (link_info, abfd, sec, irel, contents,
12230 isymbuf, symtab_hdr);
35c08157 12231
1c8f6a4d
KLC		 12232 /* It is impossible to delete blank, so just continue. */
12233 continue;
12234 case R_NDS32_TLS_LE_LO12:
12235 /* Relax for LE TLS low part. */
12236 nds32_elf_relax_letlslo12 (link_info, abfd, irel, contents,
12237 isymbuf, symtab_hdr);
35c08157 12238
1c8f6a4d
KLC		 12239 /* It is impossible to delete blank, so just continue. */
12240 continue;
12241 case R_NDS32_TLS_LE_ADD:
12242 nds32_elf_relax_letlsadd (link_info, abfd, sec, irel, internal_relocs,
12243 contents, isymbuf, symtab_hdr, again);
12244 /* It is impossible to delete blank, so just continue. */
12245 continue;
12246 case R_NDS32_TLS_LE_LS:
12247 nds32_elf_relax_letlsls (link_info, abfd, sec, irel, internal_relocs,
12248 contents, isymbuf, symtab_hdr, again);
12249 continue;
12250 case R_NDS32_PTR:
12251 removed = nds32_elf_relax_ptr (abfd, sec, irel, internal_relocs,
12252 &insn_len, &seq_len, contents);
12253 break;
12254 case R_NDS32_PLT_GOT_SUFF:
12255 nds32_elf_relax_pltgot_suff (link_info, abfd, sec, irel,
12256 internal_relocs, contents,
12257 isymbuf, symtab_hdr, again);
12258 /* It is impossible to delete blank, so just continue. */
12259 continue;
12260 case R_NDS32_GOT_SUFF:
12261 nds32_elf_relax_got_suff (link_info, abfd, sec, irel,
12262 internal_relocs, contents,
12263 symtab_hdr, again);
12264 /* It is impossible to delete blank, so just continue. */
12265 continue;
12266 case R_NDS32_GOTOFF_SUFF:
12267 nds32_elf_relax_gotoff_suff (link_info, abfd, sec, irel,
12268 internal_relocs, contents,
12269 isymbuf, symtab_hdr, again);
12270 /* It is impossible to delete blank, so just continue. */
12271 continue;
12272 default:
12273 continue;
12274
12275 }
12276 if (removed && seq_len - insn_len > 0)
12277 {
12278 if (!insert_nds32_elf_blank
12279 (&relax_blank_list, irel->r_offset + insn_len,
12280 seq_len - insn_len))
12281 goto error_return;
12282 *again = TRUE;
35c08157 12283 }
1c8f6a4d
KLC		 12284 }
12285
12286 calc_nds32_blank_total (relax_blank_list);
12287
12288 if (table->relax_fp_as_gp)
12289 {
12290 if (!nds32_relax_fp_as_gp (link_info, abfd, sec, internal_relocs,
12291 irelend, isymbuf))
12292 goto error_return;
35c08157 12293
1c8f6a4d 12294 if (*again == FALSE)
35c08157 12295 {
1c8f6a4d
KLC		 12296 if (!nds32_fag_remove_unused_fpbase (abfd, sec, internal_relocs,
12297 irelend))
12298 goto error_return;
35c08157
KLC		 12299 }
12300 }
1c8f6a4d
KLC		 12301
12302 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12303
12304 if (*again == FALSE)
12305 {
12306 if (!nds32_relax_adjust_label (abfd, sec, internal_relocs, contents,
12307 &relax_blank_list, optimize, opt_size))
12308 goto error_return;
12309 }
12310
12311 /* It doesn't matter optimize_for_space_no_align anymore.
35c08157
KLC		 12312 If object file is assembled with flag '-Os',
12313 the we don't adjust jump-destination on 4-byte boundary. */
12314
12315 if (relax_blank_list)
12316 {
12317 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12318 relax_blank_list = NULL;
12319 }
12320
12321 if (*again == FALSE)
12322 {
12323 /* Closing the section, so we don't relax it anymore. */
12324 bfd_vma sec_size_align;
12325 Elf_Internal_Rela *tmp_rel;
12326
12327 /* Pad to alignment boundary. Only handle current section alignment. */
12328 sec_size_align = (sec->size + (~((-1) << sec->alignment_power)))
12329 & ((-1) << sec->alignment_power);
12330 if ((sec_size_align - sec->size) & 0x2)
12331 {
12332 insn16 = NDS32_NOP16;
12333 bfd_putb16 (insn16, contents + sec->size);
12334 sec->size += 2;
12335 }
12336
12337 while (sec_size_align != sec->size)
12338 {
12339 insn = NDS32_NOP32;
12340 bfd_putb32 (insn, contents + sec->size);
12341 sec->size += 4;
12342 }
12343
1c8f6a4d
KLC		 12344 tmp_rel = find_relocs_at_address (internal_relocs, internal_relocs,
12345 irelend, R_NDS32_RELAX_ENTRY);
35c08157
KLC		 12346 if (tmp_rel != irelend)
12347 tmp_rel->r_addend |= R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG;
12348
12349 clean_nds32_elf_blank ();
12350 }
12351
12352finish:
12353 if (internal_relocs != NULL
12354 && elf_section_data (sec)->relocs != internal_relocs)
12355 free (internal_relocs);
12356
12357 if (contents != NULL
12358 && elf_section_data (sec)->this_hdr.contents != contents)
12359 free (contents);
12360
12361 if (isymbuf != NULL && symtab_hdr->contents != (bfd_byte *) isymbuf)
12362 free (isymbuf);
12363
12364 return result;
12365
12366error_return:
12367 result = FALSE;
12368 goto finish;
12369}
12370
12371static struct bfd_elf_special_section const nds32_elf_special_sections[] =
12372{
12373 {".sdata", 6, -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE},
12374 {".sbss", 5, -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE},
12375 {NULL, 0, 0, 0, 0}
12376};
12377
12378static bfd_boolean
12379nds32_elf_output_arch_syms (bfd *output_bfd ATTRIBUTE_UNUSED,
12380 struct bfd_link_info *info,
12381 void *finfo ATTRIBUTE_UNUSED,
12382 bfd_boolean (*func) (void *, const char *,
12383 Elf_Internal_Sym *,
12384 asection *,
12385 struct elf_link_hash_entry *)
12386 ATTRIBUTE_UNUSED)
12387{
12388 FILE *sym_ld_script = NULL;
12389 struct elf_nds32_link_hash_table *table;
12390
12391 table = nds32_elf_hash_table (info);
12392 sym_ld_script = table->sym_ld_script;
12393
12394 if (check_start_export_sym)
12395 fprintf (sym_ld_script, "}\n");
12396
12397 return TRUE;
12398}
12399
12400static enum elf_reloc_type_class
12401nds32_elf_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
12402 const asection *rel_sec ATTRIBUTE_UNUSED,
12403 const Elf_Internal_Rela *rela)
12404{
12405 switch ((int) ELF32_R_TYPE (rela->r_info))
12406 {
12407 case R_NDS32_RELATIVE:
12408 return reloc_class_relative;
12409 case R_NDS32_JMP_SLOT:
12410 return reloc_class_plt;
12411 case R_NDS32_COPY:
12412 return reloc_class_copy;
12413 default:
12414 return reloc_class_normal;
12415 }
12416}
12417
12418/* Put target dependent option into info hash table. */
12419void
12420bfd_elf32_nds32_set_target_option (struct bfd_link_info *link_info,
12421 int relax_fp_as_gp,
12422 int eliminate_gc_relocs,
12423 FILE * sym_ld_script, int load_store_relax,
12424 int target_optimize, int relax_status,
12425 int relax_round, FILE * ex9_export_file,
12426 FILE * ex9_import_file,
12427 int update_ex9_table, int ex9_limit,
12428 bfd_boolean ex9_loop_aware,
12429 bfd_boolean ifc_loop_aware)
12430{
12431 struct elf_nds32_link_hash_table *table;
12432
12433 table = nds32_elf_hash_table (link_info);
12434 if (table == NULL)
12435 return;
12436
12437 table->relax_fp_as_gp = relax_fp_as_gp;
12438 table->eliminate_gc_relocs = eliminate_gc_relocs;
12439 table->sym_ld_script = sym_ld_script;
12440 table ->load_store_relax = load_store_relax;
12441 table->target_optimize = target_optimize;
12442 table->relax_status = relax_status;
12443 table->relax_round = relax_round;
12444 table->ex9_export_file = ex9_export_file;
12445 table->ex9_import_file = ex9_import_file;
12446 table->update_ex9_table = update_ex9_table;
12447 table->ex9_limit = ex9_limit;
12448 table->ex9_loop_aware = ex9_loop_aware;
12449 table->ifc_loop_aware = ifc_loop_aware;
12450}
12451\f
12452/* These functions and data-structures are used for fp-as-gp
12453 optimization. */
12454
12455#define FAG_THRESHOLD 3 /* At least 3 gp-access. */
1c8f6a4d
KLC		 12456/* lwi37.fp covers 508 bytes, but there may be 32-byte padding between
12457 the read-only section and read-write section. */
12458#define FAG_WINDOW (508 - 32)
35c08157
KLC		 12459
12460/* An nds32_fag represent a gp-relative access.
12461 We find best fp-base by using a sliding window
12462 to find a base address which can cover most gp-access. */
12463struct nds32_fag
12464{
12465 struct nds32_fag *next; /* NULL-teminated linked list. */
12466 bfd_vma addr; /* The address of this fag. */
12467 Elf_Internal_Rela **relas; /* The relocations associated with this fag.
12468 It is used for applying FP7U2_FLAG. */
12469 int count; /* How many times this address is referred.
12470 There should be exactly `count' relocations
12471 in relas. */
12472 int relas_capcity; /* The buffer size of relas.
12473 We use an array instead of linked-list,
12474 and realloc is used to adjust buffer size. */
12475};
12476
12477static void
12478nds32_fag_init (struct nds32_fag *head)
12479{
12480 memset (head, 0, sizeof (struct nds32_fag));
12481}
12482
12483static void
12484nds32_fag_verify (struct nds32_fag *head)
12485{
12486 struct nds32_fag *iter;
12487 struct nds32_fag *prev;
12488
12489 prev = NULL;
12490 iter = head->next;
12491 while (iter)
12492 {
12493 if (prev && prev->addr >= iter->addr)
12494 puts ("Bug in fp-as-gp insertion.");
12495 prev = iter;
12496 iter = iter->next;
12497 }
12498}
12499
12500/* Insert a fag in ascending order.
12501 If a fag of the same address already exists,
12502 they are chained by relas array. */
12503
12504static void
12505nds32_fag_insert (struct nds32_fag *head, bfd_vma addr,
12506 Elf_Internal_Rela * rel)
12507{
12508 struct nds32_fag *iter;
12509 struct nds32_fag *new_fag;
12510 const int INIT_RELAS_CAP = 4;
12511
12512 for (iter = head;
12513 iter->next && iter->next->addr <= addr;
12514 iter = iter->next)
12515 /* Find somewhere to insert. */ ;
12516
12517 /* `iter' will be equal to `head' if the list is empty. */
12518 if (iter != head && iter->addr == addr)
12519 {
12520 /* The address exists in the list.
12521 Insert `rel' into relocation list, relas. */
12522
12523 /* Check whether relas is big enough. */
12524 if (iter->count >= iter->relas_capcity)
12525 {
12526 iter->relas_capcity *= 2;
12527 iter->relas = bfd_realloc
12528 (iter->relas, iter->relas_capcity * sizeof (void *));
12529 }
12530 iter->relas[iter->count++] = rel;
12531 return;
12532 }
12533
12534 /* This is a new address. Create a fag node for it. */
12535 new_fag = bfd_malloc (sizeof (struct nds32_fag));
12536 memset (new_fag, 0, sizeof (*new_fag));
12537 new_fag->addr = addr;
12538 new_fag->count = 1;
12539 new_fag->next = iter->next;
12540 new_fag->relas_capcity = INIT_RELAS_CAP;
12541 new_fag->relas = (Elf_Internal_Rela **)
12542 bfd_malloc (new_fag->relas_capcity * sizeof (void *));
12543 new_fag->relas[0] = rel;
12544 iter->next = new_fag;
12545
12546 nds32_fag_verify (head);
12547}
12548
12549static void
12550nds32_fag_free_list (struct nds32_fag *head)
12551{
12552 struct nds32_fag *iter;
12553
12554 iter = head->next;
12555 while (iter)
12556 {
12557 struct nds32_fag *tmp = iter;
12558 iter = iter->next;
12559 free (tmp->relas);
12560 tmp->relas = NULL;
12561 free (tmp);
12562 }
12563}
12564
35c08157
KLC		 12565/* Find the best fp-base address.
12566 The relocation associated with that address is returned,
12567 so we can track the symbol instead of a fixed address.
12568
12569 When relaxation, the address of an datum may change,
12570 because a text section is shrinked, so the data section
1c8f6a4d 12571 moves forward. If the aligments of text and data section
35c08157
KLC		 12572 are different, their distance may change too.
12573 Therefore, tracking a fixed address is not appriate. */
12574
12575static int
12576nds32_fag_find_base (struct nds32_fag *head, struct nds32_fag **bestpp)
12577{
12578 struct nds32_fag *base; /* First fag in the window. */
12579 struct nds32_fag *last; /* First fag outside the window. */
12580 int accu = 0; /* Usage accumulation. */
12581 struct nds32_fag *best; /* Best fag. */
12582 int baccu = 0; /* Best accumulation. */
12583
12584 /* Use first fag for initial, and find the last fag in the window.
12585
12586 In each iteration, we could simply subtract previous fag
12587 and accumulate following fags which are inside the window,
12588 untill we each the end. */
12589
1c8f6a4d
KLC		 12590 if (head->next == NULL)
12591 {
12592 *bestpp = NULL;
12593 return 0;
12594 }
35c08157
KLC		 12595
12596 /* Initialize base. */
12597 base = head->next;
12598 best = base;
12599 for (last = base;
12600 last && last->addr < base->addr + FAG_WINDOW;
12601 last = last->next)
12602 accu += last->count;
12603
12604 baccu = accu;
12605
12606 /* Record the best base in each iteration. */
12607 while (base->next)
1c8f6a4d
KLC		 12608 {
12609 accu -= base->count;
12610 base = base->next;
12611 /* Account fags in window. */
12612 for (/* Nothing. */;
12613 last && last->addr < base->addr + FAG_WINDOW;
12614 last = last->next)
12615 accu += last->count;
12616
12617 /* A better fp-base? */
12618 if (accu > baccu)
12619 {
12620 best = base;
12621 baccu = accu;
12622 }
12623 }
35c08157
KLC		 12624
12625 if (bestpp)
12626 *bestpp = best;
12627 return baccu;
12628}
12629
12630/* Apply R_NDS32_INSN16_FP7U2_FLAG on gp-relative accesses,
12631 so we can convert it fo fp-relative access later.
12632 `best_fag' is the best fp-base. Only those inside the window
12633 of best_fag is applied the flag. */
12634
12635static bfd_boolean
12636nds32_fag_mark_relax (struct bfd_link_info *link_info,
12637 bfd *abfd, struct nds32_fag *best_fag,
12638 Elf_Internal_Rela *internal_relocs,
12639 Elf_Internal_Rela *irelend)
12640{
12641 struct nds32_fag *ifag;
12642 bfd_vma best_fpbase, gp;
12643 bfd *output_bfd;
12644
12645 output_bfd = abfd->sections->output_section->owner;
12646 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
12647 best_fpbase = best_fag->addr;
12648
1c8f6a4d
KLC		 12649 if (best_fpbase > gp + sdata_range[1][1]
12650 || best_fpbase < gp - sdata_range[1][0])
35c08157
KLC		 12651 return FALSE;
12652
12653 /* Mark these inside the window R_NDS32_INSN16_FP7U2_FLAG flag,
12654 so we know they can be converted to lwi37.fp. */
12655 for (ifag = best_fag;
12656 ifag && ifag->addr < best_fpbase + FAG_WINDOW; ifag = ifag->next)
12657 {
12658 int i;
12659
12660 for (i = 0; i < ifag->count; i++)
12661 {
12662 Elf_Internal_Rela *insn16_rel;
12663 Elf_Internal_Rela *fag_rel;
12664
12665 fag_rel = ifag->relas[i];
12666
12667 /* Only if this is within the WINDOWS, FP7U2_FLAG
12668 is applied. */
12669
12670 insn16_rel = find_relocs_at_address
12671 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12672
12673 if (insn16_rel != irelend)
12674 insn16_rel->r_addend = R_NDS32_INSN16_FP7U2_FLAG;
12675 }
12676 }
12677 return TRUE;
12678}
12679
1c8f6a4d
KLC		 12680/* Reset INSN16 to clean fp as gp. */
12681
12682static void
12683nds32_fag_unmark_relax (struct nds32_fag *fag,
12684 Elf_Internal_Rela *internal_relocs,
12685 Elf_Internal_Rela *irelend)
12686{
12687 struct nds32_fag *ifag;
12688 int i;
12689 Elf_Internal_Rela *insn16_rel;
12690 Elf_Internal_Rela *fag_rel;
12691
12692 for (ifag = fag; ifag; ifag = ifag->next)
12693 {
12694 for (i = 0; i < ifag->count; i++)
12695 {
12696 fag_rel = ifag->relas[i];
12697
12698 /* Restore the INSN16 relocation. */
12699 insn16_rel = find_relocs_at_address
12700 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12701
12702 if (insn16_rel != irelend)
12703 insn16_rel->r_addend &= ~R_NDS32_INSN16_FP7U2_FLAG;
12704 }
12705 }
12706}
12707
35c08157
KLC		 12708/* This is the main function of fp-as-gp optimization.
12709 It should be called by relax_section. */
12710
12711static bfd_boolean
12712nds32_relax_fp_as_gp (struct bfd_link_info *link_info,
12713 bfd *abfd, asection *sec,
12714 Elf_Internal_Rela *internal_relocs,
12715 Elf_Internal_Rela *irelend,
12716 Elf_Internal_Sym *isymbuf)
12717{
12718 Elf_Internal_Rela *begin_rel = NULL;
12719 Elf_Internal_Rela *irel;
12720 struct nds32_fag fag_head;
12721 Elf_Internal_Shdr *symtab_hdr;
12722 bfd_byte *contents;
1c8f6a4d 12723 bfd_boolean ifc_inside = FALSE;
35c08157
KLC		 12724
12725 /* FIXME: Can we bfd_elf_link_read_relocs for the relocs? */
12726
12727 /* Per-function fp-base selection.
12728 1. Create a list for all the gp-relative access.
12729 2. Base on those gp-relative address,
12730 find a fp-base which can cover most access.
12731 3. Use the fp-base for fp-as-gp relaxation.
12732
12733 NOTE: If fp-as-gp is not worth to do, (e.g., less than 3 times),
12734 we should
12735 1. delete the `la $fp, _FP_BASE_' instruction and
12736 2. not convert lwi.gp to lwi37.fp.
12737
12738 To delete the _FP_BASE_ instruction, we simply apply
12739 R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG flag in the r_addend to disable it.
12740
12741 To suppress the conversion, we simply NOT to apply
12742 R_NDS32_INSN16_FP7U2_FLAG flag. */
12743
12744 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12745
12746 if (!nds32_get_section_contents (abfd, sec, &contents)
12747 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12748 return FALSE;
12749
12750 /* Check whether it is worth for fp-as-gp optimization,
12751 i.e., at least 3 gp-load.
12752
12753 Set R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG if we should NOT
12754 apply this optimization. */
12755
12756 for (irel = internal_relocs; irel < irelend; irel++)
12757 {
12758 /* We recognize R_NDS32_RELAX_REGION_BEGIN/_END for the region.
12759 One we enter the begin of the region, we track all the LW/ST
12760 instructions, so when we leave the region, we try to find
12761 the best fp-base address for those LW/ST instructions. */
12762
12763 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12764 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12765 {
12766 /* Begin of the region. */
12767 if (begin_rel)
12768 (*_bfd_error_handler) (_("%B: Nested OMIT_FP in %A."), abfd, sec);
12769
12770 begin_rel = irel;
12771 nds32_fag_init (&fag_head);
1c8f6a4d 12772 ifc_inside = FALSE;
35c08157
KLC		 12773 }
12774 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12775 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12776 {
12777 int accu;
1c8f6a4d 12778 struct nds32_fag *best_fag, *tmp_fag;
35c08157
KLC		 12779 int dist;
12780
12781 /* End of the region.
12782 Check whether it is worth to do fp-as-gp. */
12783
12784 if (begin_rel == NULL)
12785 {
12786 (*_bfd_error_handler) (_("%B: Unmatched OMIT_FP in %A."), abfd, sec);
12787 continue;
12788 }
12789
12790 accu = nds32_fag_find_base (&fag_head, &best_fag);
12791
1c8f6a4d
KLC		 12792 /* Clean FP7U2_FLAG because they may set ever. */
12793 tmp_fag = fag_head.next;
12794 nds32_fag_unmark_relax (tmp_fag, internal_relocs, irelend);
12795
35c08157
KLC		 12796 /* Check if it is worth, and FP_BASE is near enough to SDA_BASE. */
12797 if (accu < FAG_THRESHOLD
12798 || !nds32_fag_mark_relax (link_info, abfd, best_fag,
12799 internal_relocs, irelend))
12800 {
12801 /* Not worth to do fp-as-gp. */
12802 begin_rel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12803 begin_rel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12804 irel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12805 irel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12806 nds32_fag_free_list (&fag_head);
12807 begin_rel = NULL;
12808 continue;
12809 }
12810
12811 /* R_SYM of R_NDS32_RELAX_REGION_BEGIN is not used by assembler,
12812 so we use it to record the distance to the reloction of best
12813 fp-base. */
12814 dist = best_fag->relas[0] - begin_rel;
12815 BFD_ASSERT (dist > 0 && dist < 0xffffff);
12816 /* Use high 16 bits of addend to record the _FP_BASE_ matched
12817 relocation. And get the base value when relocating. */
1c8f6a4d 12818 begin_rel->r_addend &= (0x1 << 16) - 1;
35c08157
KLC		 12819 begin_rel->r_addend |= dist << 16;
12820
12821 nds32_fag_free_list (&fag_head);
12822 begin_rel = NULL;
12823 }
12824
1c8f6a4d 12825 if (begin_rel == NULL || ifc_inside)
35c08157
KLC		 12826 /* Skip if we are not in the region of fp-as-gp. */
12827 continue;
12828
12829 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S2_RELA
12830 || ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA17S2_RELA)
12831 {
12832 bfd_vma addr;
12833 uint32_t insn;
12834
12835 /* A gp-relative access is found. Insert it to the fag-list. */
12836
12837 /* Rt is necessary an RT3, so it can be converted to lwi37.fp. */
12838 insn = bfd_getb32 (contents + irel->r_offset);
12839 if (!N32_IS_RT3 (insn))
12840 continue;
12841
12842 addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
12843 nds32_fag_insert (&fag_head, addr, irel);
12844 }
12845 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA_FP7U2_RELA)
12846 {
12847 begin_rel = NULL;
12848 }
1c8f6a4d
KLC		 12849 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12850 || ELF32_R_TYPE (irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
12851 {
12852 /* Suppress fp as gp when encounter ifc. */
12853 ifc_inside = TRUE;
12854 }
35c08157
KLC		 12855 }
12856
12857 return TRUE;
12858}
12859
12860/* Remove unused `la $fp, _FD_BASE_' instruction. */
12861
12862static bfd_boolean
12863nds32_fag_remove_unused_fpbase (bfd *abfd, asection *sec,
12864 Elf_Internal_Rela *internal_relocs,
12865 Elf_Internal_Rela *irelend)
12866{
12867 Elf_Internal_Rela *irel;
12868 Elf_Internal_Shdr *symtab_hdr;
12869 bfd_byte *contents = NULL;
12870 nds32_elf_blank_t *relax_blank_list = NULL;
12871 bfd_boolean result = TRUE;
12872 bfd_boolean unused_region = FALSE;
12873
12874 /*
12875 NOTE: Disable fp-as-gp if we encounter ifcall relocations.
12876 * R_NDS32_17IFC_PCREL_RELA
12877 * R_NDS32_10IFCU_PCREL_RELA
12878
12879 CASE??????????????
12880 */
12881
12882 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12883 nds32_get_section_contents (abfd, sec, &contents);
12884
12885 for (irel = internal_relocs; irel < irelend; irel++)
12886 {
12887 /* To remove unused fp-base, we simply find the REGION_NOT_OMIT_FP
12888 we marked to in previous pass.
12889 DO NOT scan relocations again, since we've alreadly decided it
12890 and set the flag. */
12891 const char *syname;
12892 int syndx;
12893 uint32_t insn;
12894
12895 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12896 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12897 unused_region = TRUE;
12898 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12899 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12900 unused_region = FALSE;
12901
12902 /* We're not in the region. */
12903 if (!unused_region)
12904 continue;
12905
12906 /* _FP_BASE_ must be a GLOBAL symbol. */
12907 syndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
12908 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
12909 continue;
12910
12911 /* The symbol name must be _FP_BASE_. */
12912 syname = elf_sym_hashes (abfd)[syndx]->root.root.string;
12913 if (strcmp (syname, FP_BASE_NAME) != 0)
12914 continue;
12915
12916 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA19S0_RELA)
12917 {
12918 /* addi.gp $fp, -256 */
12919 insn = bfd_getb32 (contents + irel->r_offset);
12920 if (insn != INSN_ADDIGP_TO_FP)
12921 continue;
12922 }
12923 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S0_RELA)
12924 {
12925 /* addi $fp, $gp, -256 */
12926 insn = bfd_getb32 (contents + irel->r_offset);
12927 if (insn != INSN_ADDI_GP_TO_FP)
12928 continue;
12929 }
12930 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_20_RELA)
12931 {
12932 /* movi $fp, FP_BASE */
12933 insn = bfd_getb32 (contents + irel->r_offset);
12934 if (insn != INSN_MOVI_TO_FP)
12935 continue;
12936 }
12937 else
12938 continue;
12939
12940 /* We got here because a FP_BASE instruction is found. */
12941 if (!insert_nds32_elf_blank_recalc_total
12942 (&relax_blank_list, irel->r_offset, 4))
12943 goto error_return;
12944 }
12945
12946finish:
12947 if (relax_blank_list)
12948 {
12949 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12950 relax_blank_list = NULL;
12951 }
12952 return result;
12953
12954error_return:
12955 result = FALSE;
12956 goto finish;
12957}
1c8f6a4d
KLC		 12958
12959/* This is a version of bfd_generic_get_relocated_section_contents.
12960 We need this variety because relaxation will modify the dwarf
12961 infomation. When there is undefined symbol reference error mesage,
12962 linker need to dump line number where the symbol be used. However
12963 the address is be relaxed, it can not get the original dwarf contents.
12964 The variety only modify function call for reading in the section. */
12965
12966static bfd_byte *
12967nds32_elf_get_relocated_section_contents (bfd *abfd,
12968 struct bfd_link_info *link_info,
12969 struct bfd_link_order *link_order,
12970 bfd_byte *data,
12971 bfd_boolean relocatable,
12972 asymbol **symbols)
12973{
12974 bfd *input_bfd = link_order->u.indirect.section->owner;
12975 asection *input_section = link_order->u.indirect.section;
12976 long reloc_size;
12977 arelent **reloc_vector;
12978 long reloc_count;
12979
12980 reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
12981 if (reloc_size < 0)
12982 return NULL;
12983
12984 /* Read in the section. */
12985 if (!nds32_get_section_contents (input_bfd, input_section, &data))
12986 return NULL;
12987
12988 if (reloc_size == 0)
12989 return data;
12990
12991 reloc_vector = (arelent **) bfd_malloc (reloc_size);
12992 if (reloc_vector == NULL)
12993 return NULL;
12994
12995 reloc_count = bfd_canonicalize_reloc (input_bfd, input_section,
12996 reloc_vector, symbols);
12997 if (reloc_count < 0)
12998 goto error_return;
12999
13000 if (reloc_count > 0)
13001 {
13002 arelent **parent;
13003 for (parent = reloc_vector; *parent != NULL; parent++)
13004 {
13005 char *error_message = NULL;
13006 asymbol *symbol;
13007 bfd_reloc_status_type r;
13008
13009 symbol = *(*parent)->sym_ptr_ptr;
13010 if (symbol->section && discarded_section (symbol->section))
13011 {
13012 bfd_byte *p;
13013 static reloc_howto_type none_howto
13014 = HOWTO (0, 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL,
13015 "unused", FALSE, 0, 0, FALSE);
13016
13017 p = data + (*parent)->address * bfd_octets_per_byte (input_bfd);
13018 _bfd_clear_contents ((*parent)->howto, input_bfd, input_section,
13019 p);
13020 (*parent)->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
13021 (*parent)->addend = 0;
13022 (*parent)->howto = &none_howto;
13023 r = bfd_reloc_ok;
13024 }
13025 else
13026 r = bfd_perform_relocation (input_bfd, *parent, data,
13027 input_section,
13028 relocatable ? abfd : NULL,
13029 &error_message);
13030
13031 if (relocatable)
13032 {
13033 asection *os = input_section->output_section;
13034
13035 /* A partial link, so keep the relocs. */
13036 os->orelocation[os->reloc_count] = *parent;
13037 os->reloc_count++;
13038 }
13039
13040 if (r != bfd_reloc_ok)
13041 {
13042 switch (r)
13043 {
13044 case bfd_reloc_undefined:
13045 if (!((*link_info->callbacks->undefined_symbol)
13046 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
13047 input_bfd, input_section, (*parent)->address, TRUE)))
13048 goto error_return;
13049 break;
13050 case bfd_reloc_dangerous:
13051 BFD_ASSERT (error_message != NULL);
13052 if (!((*link_info->callbacks->reloc_dangerous)
13053 (link_info, error_message, input_bfd, input_section,
13054 (*parent)->address)))
13055 goto error_return;
13056 break;
13057 case bfd_reloc_overflow:
13058 if (!((*link_info->callbacks->reloc_overflow)
13059 (link_info, NULL,
13060 bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
13061 (*parent)->howto->name, (*parent)->addend,
13062 input_bfd, input_section, (*parent)->address)))
13063 goto error_return;
13064 break;
13065 case bfd_reloc_outofrange:
13066 /* PR ld/13730:
13067 This error can result when processing some partially
13068 complete binaries. Do not abort, but issue an error
13069 message instead. */
13070 link_info->callbacks->einfo
13071 (_("%X%P: %B(%A): relocation \"%R\" goes out of range\n"),
13072 abfd, input_section, * parent);
13073 goto error_return;
13074
13075 default:
13076 abort ();
13077 break;
13078 }
13079 }
13080 }
13081 }
13082
13083 free (reloc_vector);
13084 return data;
13085
13086error_return:
13087 free (reloc_vector);
13088 return NULL;
13089}
35c08157
KLC		 13090\f
13091/* Link-time IFC relaxation.
13092 In this optimization, we chains jump instructions
13093 of the same destination with ifcall. */
13094
13095
13096/* List to save jal and j relocation. */
13097struct elf_nds32_ifc_symbol_entry
13098{
13099 asection *sec;
13100 struct elf_link_hash_entry *h;
13101 struct elf_nds32_ifc_irel_list *irel_head;
13102 unsigned long insn;
13103 int times;
13104 int enable; /* Apply ifc. */
13105 int ex9_enable; /* Apply ifc after ex9. */
13106 struct elf_nds32_ifc_symbol_entry *next;
13107};
13108
13109struct elf_nds32_ifc_irel_list
13110{
13111 Elf_Internal_Rela *irel;
13112 asection *sec;
13113 bfd_vma addr;
13114 /* If this is set, then it is the last instruction for
13115 ifc-chain, so it must be keep for the actual branching. */
13116 int keep;
13117 struct elf_nds32_ifc_irel_list *next;
13118};
13119
13120static struct elf_nds32_ifc_symbol_entry *ifc_symbol_head = NULL;
13121
13122/* Insert symbol of jal and j for ifc. */
13123
13124static void
13125nds32_elf_ifc_insert_symbol (asection *sec,
13126 struct elf_link_hash_entry *h,
13127 Elf_Internal_Rela *irel,
13128 unsigned long insn)
13129{
13130 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13131
13132 /* Check there is target of existing entry the same as the new one. */
13133 while (ptr != NULL)
13134 {
13135 if (((h == NULL && ptr->sec == sec
13136 && ELF32_R_SYM (ptr->irel_head->irel->r_info) == ELF32_R_SYM (irel->r_info)
13137 && ptr->irel_head->irel->r_addend == irel->r_addend)
13138 || h != NULL)
13139 && ptr->h == h
13140 && ptr->insn == insn)
13141 {
13142 /* The same target exist, so insert into list. */
13143 struct elf_nds32_ifc_irel_list *irel_list = ptr->irel_head;
13144
13145 while (irel_list->next != NULL)
13146 irel_list = irel_list->next;
13147 irel_list->next = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
13148 irel_list = irel_list->next;
13149 irel_list->irel = irel;
13150 irel_list->keep = 1;
13151
13152 if (h == NULL)
13153 irel_list->sec = NULL;
13154 else
13155 irel_list->sec = sec;
13156 irel_list->next = NULL;
13157 return;
13158 }
13159 if (ptr->next == NULL)
13160 break;
13161 ptr = ptr->next;
13162 }
13163
13164 /* There is no same target entry, so build a new one. */
13165 if (ifc_symbol_head == NULL)
13166 {
13167 ifc_symbol_head = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
13168 ptr = ifc_symbol_head;
13169 }
13170 else
13171 {
13172 ptr->next = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
13173 ptr = ptr->next;
13174 }
13175
13176 ptr->h = h;
13177 ptr->irel_head = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
13178 ptr->irel_head->irel = irel;
13179 ptr->insn = insn;
13180 ptr->irel_head->keep = 1;
13181
13182 if (h == NULL)
13183 {
13184 /* Local symbols. */
13185 ptr->sec = sec;
13186 ptr->irel_head->sec = NULL;
13187 }
13188 else
13189 {
13190 /* Global symbol. */
13191 ptr->sec = NULL;
13192 ptr->irel_head->sec = sec;
13193 }
13194
13195 ptr->irel_head->next = NULL;
13196 ptr->times = 0;
13197 ptr->enable = 0;
13198 ptr->ex9_enable = 0;
13199 ptr->next = NULL;
13200}
13201
13202/* Gather all jal and j instructions. */
13203
13204static bfd_boolean
13205nds32_elf_ifc_calc (struct bfd_link_info *info,
13206 bfd *abfd, asection *sec)
13207{
13208 Elf_Internal_Rela *internal_relocs;
13209 Elf_Internal_Rela *irelend;
13210 Elf_Internal_Rela *irel;
13211 Elf_Internal_Shdr *symtab_hdr;
13212 bfd_byte *contents = NULL;
1c8f6a4d 13213 uint32_t insn, insn_with_reg;
35c08157
KLC		 13214 unsigned long r_symndx;
13215 struct elf_link_hash_entry *h;
13216 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
13217 struct elf_nds32_link_hash_table *table;
13218 bfd_boolean ifc_loop_aware;
13219
13220 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
13221 TRUE /* keep_memory */);
13222 irelend = internal_relocs + sec->reloc_count;
13223 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
13224
13225 /* Check if the object enable ifc. */
13226 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
13227 R_NDS32_RELAX_ENTRY);
13228
13229 if (irel == NULL
13230 || irel >= irelend
13231 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
13232 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
13233 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_IFC_FLAG)))
13234 return TRUE;
13235
13236 if (!nds32_get_section_contents (abfd, sec, &contents))
13237 return FALSE;
13238
13239 table = nds32_elf_hash_table (info);
13240 ifc_loop_aware = table->ifc_loop_aware;
13241 while (irel != NULL && irel < irelend)
13242 {
13243 /* Traverse all relocation and gather all of them to build the list. */
13244
13245 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN)
13246 {
13247 if (ifc_loop_aware == 1
13248 && (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0)
13249 {
13250 /* Check the region if loop or not. If it is true and
13251 ifc-loop-aware is true, ignore the region till region end. */
13252 while (irel != NULL
13253 && irel < irelend
13254 && (ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
13255 || (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0))
13256 irel++;
13257 }
13258 }
13259
13260 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
13261 {
13262 insn = bfd_getb32 (contents + irel->r_offset);
13263 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
13264 r_symndx = ELF32_R_SYM (irel->r_info);
13265 if (r_symndx < symtab_hdr->sh_info)
13266 {
13267 /* Local symbol. */
13268 nds32_elf_ifc_insert_symbol (sec, NULL, irel, insn_with_reg);
13269 }
13270 else
13271 {
13272 /* External symbol. */
13273 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13274 nds32_elf_ifc_insert_symbol (sec, h, irel, insn_with_reg);
13275 }
13276 }
13277 irel++;
13278 }
13279 return TRUE;
13280}
13281
13282/* Determine whether j and jal should be substituted. */
13283
13284static void
13285nds32_elf_ifc_filter (struct bfd_link_info *info)
13286{
13287 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13288 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13289 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13290 struct elf_nds32_link_hash_table *table;
13291 int target_optimize;
13292 bfd_vma address;
13293
13294 table = nds32_elf_hash_table (info);
13295 target_optimize = table->target_optimize;
13296 while (ptr)
13297 {
13298 irel_ptr = ptr->irel_head;
13299 if (ptr->h == NULL)
13300 {
13301 /* Local symbol. */
13302 irel_keeper = irel_ptr;
13303 while (irel_ptr && irel_ptr->next)
13304 {
13305 /* Check there is jump target can be used. */
13306 if ((irel_ptr->next->irel->r_offset
13307 - irel_keeper->irel->r_offset) > 1022)
13308 irel_keeper = irel_ptr->next;
13309 else
13310 {
13311 ptr->enable = 1;
13312 irel_ptr->keep = 0;
13313 }
13314 irel_ptr = irel_ptr->next;
13315 }
13316 }
13317 else
13318 {
1c8f6a4d
KLC		 13319 /* Global symbol. */
13320 /* We have to get the absolute address and decide
13321 whether to keep it or not. */
35c08157
KLC		 13322 while (irel_ptr)
13323 {
13324 address = (irel_ptr->irel->r_offset
13325 + irel_ptr->sec->output_section->vma
13326 + irel_ptr->sec->output_offset);
13327 irel_ptr->addr = address;
13328 irel_ptr = irel_ptr->next;
13329 }
13330
13331 irel_ptr = ptr->irel_head;
13332 while (irel_ptr)
13333 {
1c8f6a4d 13334 /* Sort by address. */
35c08157
KLC		 13335 struct elf_nds32_ifc_irel_list *irel_dest = irel_ptr;
13336 struct elf_nds32_ifc_irel_list *irel_temp = irel_ptr;
13337 struct elf_nds32_ifc_irel_list *irel_ptr_prev = NULL;
13338 struct elf_nds32_ifc_irel_list *irel_dest_prev = NULL;
13339
1c8f6a4d 13340 /* Get the smallest one. */
35c08157
KLC		 13341 while (irel_temp->next)
13342 {
13343 if (irel_temp->next->addr < irel_dest->addr)
13344 {
13345 irel_dest_prev = irel_temp;
13346 irel_dest = irel_temp->next;
13347 }
13348 irel_temp = irel_temp->next;
13349 }
1c8f6a4d 13350
35c08157
KLC		 13351 if (irel_dest != irel_ptr)
13352 {
13353 if (irel_ptr_prev)
13354 irel_ptr_prev->next = irel_dest;
13355 if (irel_dest_prev)
13356 irel_dest_prev->next = irel_ptr;
13357 irel_temp = irel_ptr->next;
13358 irel_ptr->next = irel_dest->next;
13359 irel_dest->next = irel_temp;
13360 }
13361 irel_ptr_prev = irel_ptr;
13362 irel_ptr = irel_ptr->next;
13363 }
13364
13365 irel_ptr = ptr->irel_head;
13366 irel_keeper = irel_ptr;
13367 while (irel_ptr && irel_ptr->next)
13368 {
13369 if ((irel_ptr->next->addr - irel_keeper->addr) > 1022)
13370 irel_keeper = irel_ptr->next;
13371 else
13372 {
13373 ptr->enable = 1;
13374 irel_ptr->keep = 0;
13375 }
13376 irel_ptr = irel_ptr->next;
13377 }
13378 }
13379
1c8f6a4d 13380 /* Ex9 enable. Reserve it for ex9. */
35c08157
KLC		 13381 if ((target_optimize & NDS32_RELAX_EX9_ON)
13382 && ptr->irel_head != irel_keeper)
13383 ptr->enable = 0;
13384 ptr = ptr->next;
13385 }
13386}
13387
13388/* Determine whether j and jal should be substituted after ex9 done. */
13389
13390static void
13391nds32_elf_ifc_filter_after_ex9 (void)
13392{
13393 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13394 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13395
13396 while (ptr)
13397 {
13398 if (ptr->enable == 0)
13399 {
13400 /* Check whether ifc is applied or not. */
13401 irel_ptr = ptr->irel_head;
13402 ptr->ex9_enable = 1;
13403 while (irel_ptr)
13404 {
13405 if (ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_TRAN)
13406 {
13407 /* Ex9 already. */
13408 ptr->ex9_enable = 0;
13409 break;
13410 }
13411 irel_ptr = irel_ptr->next;
13412 }
13413 }
13414 ptr = ptr->next;
13415 }
13416}
13417
13418/* Wrapper to do ifc relaxation. */
13419
13420bfd_boolean
13421nds32_elf_ifc_finish (struct bfd_link_info *info)
13422{
13423 int relax_status;
13424 struct elf_nds32_link_hash_table *table;
13425
13426 table = nds32_elf_hash_table (info);
13427 relax_status = table->relax_status;
13428
13429 if (!(relax_status & NDS32_RELAX_JUMP_IFC_DONE))
13430 nds32_elf_ifc_filter (info);
13431 else
13432 nds32_elf_ifc_filter_after_ex9 ();
13433
13434 if (!nds32_elf_ifc_replace (info))
13435 return FALSE;
13436
13437 if (table)
13438 table->relax_status |= NDS32_RELAX_JUMP_IFC_DONE;
13439 return TRUE;
13440}
13441
13442/* Traverse the result of ifc filter and replace it with ifcall9. */
13443
13444static bfd_boolean
13445nds32_elf_ifc_replace (struct bfd_link_info *info)
13446{
13447 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13448 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13449 nds32_elf_blank_t *relax_blank_list = NULL;
13450 bfd_byte *contents = NULL;
13451 Elf_Internal_Rela *internal_relocs;
13452 Elf_Internal_Rela *irel;
13453 Elf_Internal_Rela *irelend;
13454 unsigned short insn16 = INSN_IFCALL9;
13455 struct elf_nds32_link_hash_table *table;
13456 int relax_status;
13457
13458 table = nds32_elf_hash_table (info);
13459 relax_status = table->relax_status;
13460
13461 while (ptr)
13462 {
13463 /* Traverse the ifc gather list, and replace the
13464 filter entries by ifcall9. */
13465 if ((!(relax_status & NDS32_RELAX_JUMP_IFC_DONE) && ptr->enable == 1)
1c8f6a4d
KLC		 13466 || ((relax_status & NDS32_RELAX_JUMP_IFC_DONE)
13467 && ptr->ex9_enable == 1))
35c08157
KLC		 13468 {
13469 irel_ptr = ptr->irel_head;
13470 if (ptr->h == NULL)
13471 {
13472 /* Local symbol. */
13473 internal_relocs = _bfd_elf_link_read_relocs
13474 (ptr->sec->owner, ptr->sec, NULL, NULL, TRUE /* keep_memory */);
13475 irelend = internal_relocs + ptr->sec->reloc_count;
13476
1c8f6a4d
KLC		 13477 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
13478 &contents))
35c08157
KLC		 13479 return FALSE;
13480
13481 while (irel_ptr)
13482 {
13483 if (irel_ptr->keep == 0 && irel_ptr->next)
13484 {
1c8f6a4d 13485 /* The one can be replaced. We have to check whether
35c08157
KLC		 13486 there is any alignment point in the region. */
13487 irel = irel_ptr->irel;
1c8f6a4d
KLC		 13488 while (((irel_ptr->next->keep == 0
13489 && irel < irel_ptr->next->irel)
35c08157
KLC		 13490 || (irel_ptr->next->keep == 1 && irel < irelend))
13491 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13492 && (irel->r_addend & 0x1f) == 2))
13493 irel++;
13494 if (irel >= irelend
13495 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13496 && (irel->r_addend & 0x1f) == 2
1c8f6a4d
KLC		 13497 && ((irel->r_offset - get_nds32_elf_blank_total
13498 (&relax_blank_list, irel->r_offset, 1))
13499 & 0x02) == 0))
35c08157
KLC		 13500 {
13501 /* Replace by ifcall9. */
13502 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13503 if (!insert_nds32_elf_blank_recalc_total
13504 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13505 return FALSE;
13506 irel_ptr->irel->r_info =
1c8f6a4d
KLC		 13507 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13508 R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC		 13509 }
13510 }
13511 irel_ptr = irel_ptr->next;
13512 }
13513
13514 /* Delete the redundant code. */
13515 if (relax_blank_list)
13516 {
13517 nds32_elf_relax_delete_blanks (ptr->sec->owner, ptr->sec,
13518 relax_blank_list);
13519 relax_blank_list = NULL;
13520 }
13521 }
13522 else
13523 {
13524 /* Global symbol. */
13525 while (irel_ptr)
13526 {
13527 if (irel_ptr->keep == 0 && irel_ptr->next)
13528 {
13529 /* The one can be replaced, and we have to check
13530 whether there is any alignment point in the region. */
13531 internal_relocs = _bfd_elf_link_read_relocs
13532 (irel_ptr->sec->owner, irel_ptr->sec, NULL, NULL,
13533 TRUE /* keep_memory */);
13534 irelend = internal_relocs + irel_ptr->sec->reloc_count;
13535 if (!nds32_get_section_contents
13536 (irel_ptr->sec->owner, irel_ptr->sec, &contents))
13537 return FALSE;
13538
13539 irel = irel_ptr->irel;
13540 while (((irel_ptr->sec == irel_ptr->next->sec
13541 && irel_ptr->next->keep == 0
13542 && irel < irel_ptr->next->irel)
13543 || ((irel_ptr->sec != irel_ptr->next->sec
13544 || irel_ptr->next->keep == 1)
13545 && irel < irelend))
13546 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13547 && (irel->r_addend & 0x1f) == 2))
13548 irel++;
13549 if (irel >= irelend
13550 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13551 && (irel->r_addend & 0x1f) == 2
13552 && ((irel->r_offset
13553 - get_nds32_elf_blank_total (&relax_blank_list,
13554 irel->r_offset, 1)) & 0x02) == 0))
13555 {
13556 /* Replace by ifcall9. */
13557 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13558 if (!insert_nds32_elf_blank_recalc_total
13559 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13560 return FALSE;
13561
13562 /* Delete the redundant code, and clear the relocation. */
13563 nds32_elf_relax_delete_blanks (irel_ptr->sec->owner,
13564 irel_ptr->sec,
13565 relax_blank_list);
13566 irel_ptr->irel->r_info =
1c8f6a4d
KLC		 13567 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13568 R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC		 13569 relax_blank_list = NULL;
13570 }
13571 }
13572
13573 irel_ptr = irel_ptr->next;
13574 }
13575 }
13576 }
13577 ptr = ptr->next;
13578 }
13579
13580 return TRUE;
13581}
13582
13583/* Relocate ifcall. */
13584
1c8f6a4d 13585static bfd_boolean
35c08157
KLC		 13586nds32_elf_ifc_reloc (void)
13587{
13588 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13589 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13590 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13591 bfd_vma relocation, address;
13592 unsigned short insn16;
35c08157 13593 bfd_byte *contents = NULL;
1c8f6a4d
KLC		 13594 static bfd_boolean done = FALSE;
13595
13596 if (done)
13597 return TRUE;
13598
13599 done = TRUE;
35c08157
KLC		 13600
13601 while (ptr)
13602 {
1c8f6a4d 13603 /* Check the entry is enable ifcall. */
35c08157
KLC		 13604 if (ptr->enable == 1 || ptr->ex9_enable == 1)
13605 {
1c8f6a4d 13606 /* Get the reserve jump. */
35c08157
KLC		 13607 irel_ptr = ptr->irel_head;
13608 while (irel_ptr)
13609 {
13610 if (irel_ptr->keep == 1)
13611 {
13612 irel_keeper = irel_ptr;
13613 break;
13614 }
13615 irel_ptr = irel_ptr->next;
13616 }
13617
13618 irel_ptr = ptr->irel_head;
13619 if (ptr->h == NULL)
13620 {
13621 /* Local symbol. */
13622 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec, &contents))
13623 return FALSE;
13624
13625 while (irel_ptr)
13626 {
13627 if (irel_ptr->keep == 0
1c8f6a4d 13628 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
35c08157
KLC		 13629 {
13630 relocation = irel_keeper->irel->r_offset;
13631 relocation = relocation - irel_ptr->irel->r_offset;
13632 while (irel_keeper && relocation > 1022)
13633 {
13634 irel_keeper = irel_keeper->next;
13635 if (irel_keeper && irel_keeper->keep == 1)
13636 {
13637 relocation = irel_keeper->irel->r_offset;
13638 relocation = relocation - irel_ptr->irel->r_offset;
13639 }
13640 }
13641 if (relocation > 1022)
13642 {
13643 /* Double check. */
13644 irel_keeper = ptr->irel_head;
13645 while (irel_keeper)
13646 {
13647 if (irel_keeper->keep == 1)
13648 {
13649 relocation = irel_keeper->irel->r_offset;
13650 relocation = relocation - irel_ptr->irel->r_offset;
13651 }
13652 if (relocation <= 1022)
13653 break;
13654 irel_keeper = irel_keeper->next;
13655 }
13656 if (!irel_keeper)
13657 return FALSE;
13658 }
1c8f6a4d
KLC		 13659 irel_ptr->irel->r_info =
13660 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13661 R_NDS32_NONE);
35c08157
KLC		 13662 insn16 = INSN_IFCALL9 | (relocation >> 1);
13663 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13664 }
13665 irel_ptr = irel_ptr->next;
13666 }
13667 }
13668 else
13669 {
13670 /* Global symbol. */
13671 while (irel_ptr)
13672 {
13673 if (irel_ptr->keep == 0
1c8f6a4d 13674 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
35c08157 13675 {
1c8f6a4d 13676 /* Get the distance between ifcall and jump. */
35c08157
KLC		 13677 relocation = (irel_keeper->irel->r_offset
13678 + irel_keeper->sec->output_section->vma
13679 + irel_keeper->sec->output_offset);
13680 address = (irel_ptr->irel->r_offset
13681 + irel_ptr->sec->output_section->vma
13682 + irel_ptr->sec->output_offset);
13683 relocation = relocation - address;
1c8f6a4d
KLC		 13684
13685 /* The distance is over ragne, find callee again. */
35c08157
KLC		 13686 while (irel_keeper && relocation > 1022)
13687 {
13688 irel_keeper = irel_keeper->next;
13689 if (irel_keeper && irel_keeper->keep ==1)
13690 {
13691 relocation = (irel_keeper->irel->r_offset
13692 + irel_keeper->sec->output_section->vma
13693 + irel_keeper->sec->output_offset);
13694 relocation = relocation - address;
13695 }
13696 }
13697
13698 if (relocation > 1022)
13699 {
13700 /* Double check. */
13701 irel_keeper = ptr->irel_head;
13702 while (irel_keeper)
13703 {
13704 if (irel_keeper->keep == 1)
13705 {
13706
13707 relocation = (irel_keeper->irel->r_offset
13708 + irel_keeper->sec->output_section->vma
13709 + irel_keeper->sec->output_offset);
13710 relocation = relocation - address;
13711 }
13712 if (relocation <= 1022)
13713 break;
13714 irel_keeper = irel_keeper->next;
13715 }
13716 if (!irel_keeper)
13717 return FALSE;
13718 }
13719 if (!nds32_get_section_contents
1c8f6a4d
KLC		 13720 (irel_ptr->sec->owner, irel_ptr->sec, &contents))
13721 return FALSE;
13722 insn16 = INSN_IFCALL9 | (relocation >> 1);
13723 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13724 irel_ptr->irel->r_info =
13725 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13726 R_NDS32_NONE);
35c08157
KLC		 13727 }
13728 irel_ptr =irel_ptr->next;
13729 }
13730 }
13731 }
13732 ptr = ptr->next;
13733 }
13734
13735 return TRUE;
13736}
13737
13738/* End of IFC relaxation. */
13739\f
13740/* EX9 Instruction Table Relaxation. */
13741
13742/* Global hash list. */
13743struct elf_link_hash_entry_list
13744{
13745 struct elf_link_hash_entry *h;
13746 struct elf_link_hash_entry_list *next;
13747};
13748
13749/* Save different destination but same insn. */
13750struct elf_link_hash_entry_mul_list
13751{
13752 /* Global symbol times. */
13753 int times;
13754 /* Save relocation for each global symbol but useful?? */
13755 Elf_Internal_Rela *irel;
13756 /* For sethi, two sethi may have the same high-part but different low-parts. */
13757 Elf_Internal_Rela rel_backup;
13758 struct elf_link_hash_entry_list *h_list;
13759 struct elf_link_hash_entry_mul_list *next;
13760};
13761
13762/* Instruction hash table. */
13763struct elf_nds32_code_hash_entry
13764{
13765 struct bfd_hash_entry root;
13766 int times;
13767 /* For insn that can use relocation or constant ex: sethi. */
13768 int const_insn;
13769 asection *sec;
13770 struct elf_link_hash_entry_mul_list *m_list;
13771 /* Using r_addend. */
13772 Elf_Internal_Rela *irel;
13773 /* Using r_info. */
13774 Elf_Internal_Rela rel_backup;
13775};
13776
13777/* Instruction count list. */
13778struct elf_nds32_insn_times_entry
13779{
13780 const char *string;
13781 int times;
13782 int order;
13783 asection *sec;
13784 struct elf_link_hash_entry_mul_list *m_list;
13785 Elf_Internal_Rela *irel;
13786 Elf_Internal_Rela rel_backup;
13787 struct elf_nds32_insn_times_entry *next;
13788};
13789
13790/* J and JAL symbol list. */
13791struct elf_nds32_symbol_entry
13792{
13793 char *string;
13794 unsigned long insn;
13795 struct elf_nds32_symbol_entry *next;
13796};
13797
13798/* Relocation list. */
13799struct elf_nds32_irel_entry
13800{
13801 Elf_Internal_Rela *irel;
13802 struct elf_nds32_irel_entry *next;
13803};
13804
13805/* ex9.it insn need to be fixed. */
13806struct elf_nds32_ex9_refix
13807{
13808 Elf_Internal_Rela *irel;
13809 asection *sec;
13810 struct elf_link_hash_entry *h;
13811 int order;
13812 struct elf_nds32_ex9_refix *next;
13813};
13814
13815static struct bfd_hash_table ex9_code_table;
13816static struct elf_nds32_insn_times_entry *ex9_insn_head = NULL;
13817static struct elf_nds32_ex9_refix *ex9_refix_head = NULL;
13818
13819/* EX9 hash function. */
13820
13821static struct bfd_hash_entry *
13822nds32_elf_code_hash_newfunc (struct bfd_hash_entry *entry,
13823 struct bfd_hash_table *table,
13824 const char *string)
13825{
13826 struct elf_nds32_code_hash_entry *ret;
13827
13828 /* Allocate the structure if it has not already been allocated by a
13829 subclass. */
13830 if (entry == NULL)
13831 {
13832 entry = (struct bfd_hash_entry *)
13833 bfd_hash_allocate (table, sizeof (*ret));
13834 if (entry == NULL)
13835 return entry;
13836 }
13837
13838 /* Call the allocation method of the superclass. */
13839 entry = bfd_hash_newfunc (entry, table, string);
13840 if (entry == NULL)
13841 return entry;
13842
13843 ret = (struct elf_nds32_code_hash_entry*) entry;
13844 ret->times = 0;
13845 ret->const_insn = 0;
13846 ret->m_list = NULL;
13847 ret->sec = NULL;
13848 ret->irel = NULL;
13849 return &ret->root;
13850}
13851
13852/* Insert ex9 entry
13853 this insert must be stable sorted by times. */
13854
13855static void
13856nds32_elf_ex9_insert_entry (struct elf_nds32_insn_times_entry *ptr)
13857{
13858 struct elf_nds32_insn_times_entry *temp;
13859 struct elf_nds32_insn_times_entry *temp2;
13860
13861 if (ex9_insn_head == NULL)
13862 {
13863 ex9_insn_head = ptr;
13864 ptr->next = NULL;
13865 }
13866 else
13867 {
13868 temp = ex9_insn_head;
13869 temp2 = ex9_insn_head;
13870 while (temp->next &&
13871 (temp->next->times >= ptr->times
13872 || temp->times == -1))
13873 {
13874 if (temp->times == -1)
13875 temp2 = temp;
13876 temp = temp->next;
13877 }
13878 if (ptr->times > temp->times && temp->times != -1)
13879 {
13880 ptr->next = temp;
13881 if (temp2->times == -1)
13882 temp2->next = ptr;
13883 else
13884 ex9_insn_head = ptr;
13885 }
13886 else if (temp->next == NULL)
13887 {
13888 temp->next = ptr;
13889 ptr->next = NULL;
13890 }
13891 else
13892 {
13893 ptr->next = temp->next;
13894 temp->next = ptr;
13895 }
13896 }
13897}
13898
13899/* Examine each insn times in hash table.
13900 Handle multi-link hash entry.
13901
13902 TODO: This function doesn't assign so much info since it is fake. */
13903
13904static int
13905nds32_elf_examine_insn_times (struct elf_nds32_code_hash_entry *h)
13906{
13907 struct elf_nds32_insn_times_entry *ptr;
13908 int times;
13909
13910 if (h->m_list == NULL)
13911 {
13912 /* Local symbol insn or insn without relocation. */
13913 if (h->times < 3)
13914 return TRUE;
13915
13916 ptr = (struct elf_nds32_insn_times_entry *)
13917 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13918 ptr->times = h->times;
13919 ptr->string = h->root.string;
13920 ptr->m_list = NULL;
13921 ptr->sec = h->sec;
13922 ptr->irel = h->irel;
13923 ptr->rel_backup = h->rel_backup;
13924 nds32_elf_ex9_insert_entry (ptr);
13925 }
13926 else
13927 {
13928 /* Global symbol insn. */
13929 /* Only sethi insn has multiple m_list. */
13930 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
13931
13932 times = 0;
13933 while (m_list)
13934 {
13935 times += m_list->times;
13936 m_list = m_list->next;
13937 }
13938 if (times >= 3)
13939 {
13940 m_list = h->m_list;
13941 ptr = (struct elf_nds32_insn_times_entry *)
13942 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13943 ptr->times = times; /* Use the total times. */
13944 ptr->string = h->root.string;
13945 ptr->m_list = m_list;
13946 ptr->sec = h->sec;
13947 ptr->irel = m_list->irel;
13948 ptr->rel_backup = m_list->rel_backup;
13949 nds32_elf_ex9_insert_entry (ptr);
13950 }
13951 if (h->const_insn == 1)
13952 {
13953 /* sethi with constant value. */
13954 if (h->times < 3)
13955 return TRUE;
13956
13957 ptr = (struct elf_nds32_insn_times_entry *)
13958 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13959 ptr->times = h->times;
13960 ptr->string = h->root.string;
13961 ptr->m_list = NULL;
13962 ptr->sec = NULL;
13963 ptr->irel = NULL;
13964 ptr->rel_backup = h->rel_backup;
13965 nds32_elf_ex9_insert_entry (ptr);
13966 }
13967 }
13968 return TRUE;
13969}
13970
13971/* Count each insn times in hash table.
13972 Handle multi-link hash entry. */
13973
13974static int
13975nds32_elf_count_insn_times (struct elf_nds32_code_hash_entry *h)
13976{
13977 int reservation, times;
13978 unsigned long relocation, min_relocation;
13979 struct elf_nds32_insn_times_entry *ptr;
13980
13981 if (h->m_list == NULL)
13982 {
13983 /* Local symbol insn or insn without relocation. */
13984 if (h->times < 3)
13985 return TRUE;
13986 ptr = (struct elf_nds32_insn_times_entry *)
13987 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13988 ptr->times = h->times;
13989 ptr->string = h->root.string;
13990 ptr->m_list = NULL;
13991 ptr->sec = h->sec;
13992 ptr->irel = h->irel;
13993 ptr->rel_backup = h->rel_backup;
13994 nds32_elf_ex9_insert_entry (ptr);
13995 }
13996 else
13997 {
13998 /* Global symbol insn. */
13999 /* Only sethi insn has multiple m_list. */
14000 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
14001
14002 if (ELF32_R_TYPE (m_list->rel_backup.r_info) == R_NDS32_HI20_RELA
14003 && m_list->next != NULL)
14004 {
14005 /* Sethi insn has different symbol or addend but has same hi20. */
14006 times = 0;
14007 reservation = 1;
14008 relocation = 0;
14009 min_relocation = 0xffffffff;
14010 while (m_list)
14011 {
14012 /* Get the minimum sethi address
14013 and calculate how many entry the sethi-list have to use. */
14014 if ((m_list->h_list->h->root.type == bfd_link_hash_defined
14015 || m_list->h_list->h->root.type == bfd_link_hash_defweak)
14016 && (m_list->h_list->h->root.u.def.section != NULL
14017 && m_list->h_list->h->root.u.def.section->output_section != NULL))
14018 {
14019 relocation = (m_list->h_list->h->root.u.def.value +
14020 m_list->h_list->h->root.u.def.section->output_section->vma +
14021 m_list->h_list->h->root.u.def.section->output_offset);
14022 relocation += m_list->irel->r_addend;
14023 }
14024 else
14025 relocation = 0;
14026 if (relocation < min_relocation)
14027 min_relocation = relocation;
14028 times += m_list->times;
14029 m_list = m_list->next;
14030 }
14031 if (min_relocation < ex9_relax_size)
14032 reservation = (min_relocation >> 12) + 1;
14033 else
14034 reservation = (min_relocation >> 12)
14035 - ((min_relocation - ex9_relax_size) >> 12) + 1;
14036 if (reservation < (times / 3))
14037 {
14038 /* Efficient enough to use ex9. */
14039 int i;
14040
14041 for (i = reservation ; i > 0; i--)
14042 {
14043 /* Allocate number of reservation ex9 entry. */
14044 ptr = (struct elf_nds32_insn_times_entry *)
14045 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14046 ptr->times = h->m_list->times / reservation;
14047 ptr->string = h->root.string;
14048 ptr->m_list = h->m_list;
14049 ptr->sec = h->sec;
14050 ptr->irel = h->m_list->irel;
14051 ptr->rel_backup = h->m_list->rel_backup;
14052 nds32_elf_ex9_insert_entry (ptr);
14053 }
14054 }
14055 }
14056 else
14057 {
14058 /* Normal global symbol that means no different address symbol
14059 using same ex9 entry. */
14060 if (m_list->times >= 3)
14061 {
14062 ptr = (struct elf_nds32_insn_times_entry *)
14063 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14064 ptr->times = m_list->times;
14065 ptr->string = h->root.string;
14066 ptr->m_list = h->m_list;
14067 ptr->sec = h->sec;
14068 ptr->irel = h->m_list->irel;
14069 ptr->rel_backup = h->m_list->rel_backup;
14070 nds32_elf_ex9_insert_entry (ptr);
14071 }
14072 }
14073
14074 if (h->const_insn == 1)
14075 {
14076 /* sethi with constant value. */
14077 if (h->times < 3)
14078 return TRUE;
14079
14080 ptr = (struct elf_nds32_insn_times_entry *)
14081 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14082 ptr->times = h->times;
14083 ptr->string = h->root.string;
14084 ptr->m_list = NULL;
14085 ptr->sec = NULL;
14086 ptr->irel = NULL;
14087 ptr->rel_backup = h->rel_backup;
14088 nds32_elf_ex9_insert_entry (ptr);
14089 }
14090 }
14091
14092 return TRUE;
14093}
14094
14095/* Hash table traverse function. */
14096
14097static void
14098nds32_elf_code_hash_traverse (int (*func) (struct elf_nds32_code_hash_entry*))
14099{
14100 unsigned int i;
14101
14102 ex9_code_table.frozen = 1;
14103 for (i = 0; i < ex9_code_table.size; i++)
14104 {
14105 struct bfd_hash_entry *p;
14106
14107 for (p = ex9_code_table.table[i]; p != NULL; p = p->next)
14108 if (!func ((struct elf_nds32_code_hash_entry *) p))
14109 goto out;
14110 }
14111out:
14112 ex9_code_table.frozen = 0;
14113}
14114
14115
14116/* Give order number to insn list. */
14117
14118static void
14119nds32_elf_order_insn_times (struct bfd_link_info *info)
14120{
14121 struct elf_nds32_insn_times_entry *ex9_insn;
1c8f6a4d 14122 struct elf_nds32_insn_times_entry *temp = NULL;
35c08157 14123 struct elf_nds32_link_hash_table *table;
35c08157 14124 int ex9_limit;
1c8f6a4d
KLC		 14125 int number = 0;
14126
14127 if (ex9_insn_head == NULL)
14128 return;
35c08157
KLC		 14129
14130/* The max number of entries is 512. */
14131 ex9_insn = ex9_insn_head;
14132 table = nds32_elf_hash_table (info);
14133 ex9_limit = table->ex9_limit;
14134
35c08157
KLC		 14135 ex9_insn = ex9_insn_head;
14136
1c8f6a4d 14137 while (ex9_insn != NULL && number < ex9_limit)
35c08157 14138 {
1c8f6a4d 14139 ex9_insn->order = number;
35c08157 14140 number++;
1c8f6a4d 14141 temp = ex9_insn;
35c08157
KLC		 14142 ex9_insn = ex9_insn->next;
14143 }
14144
1c8f6a4d
KLC		 14145 if (ex9_insn && temp)
14146 temp->next = NULL;
35c08157
KLC		 14147
14148 while (ex9_insn != NULL)
14149 {
14150 /* Free useless entry. */
14151 temp = ex9_insn;
14152 ex9_insn = ex9_insn->next;
14153 free (temp);
14154 }
14155}
14156
14157/* Build .ex9.itable section. */
14158
14159static void
14160nds32_elf_ex9_build_itable (struct bfd_link_info *link_info)
14161{
14162 asection *table_sec;
14163 struct elf_nds32_insn_times_entry *ptr;
14164 bfd *it_abfd;
14165 int number = 0;
14166 bfd_byte *contents = NULL;
14167
14168 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
c72f2fb2 14169 it_abfd = it_abfd->link.next)
35c08157
KLC		 14170 {
14171 /* Find the section .ex9.itable, and put all entries into it. */
14172 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
14173 if (table_sec != NULL)
14174 {
14175 if (!nds32_get_section_contents (it_abfd, table_sec, &contents))
14176 return;
14177
14178 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
14179 number++;
14180
14181 table_sec->size = number * 4;
14182
14183 if (number == 0)
1c8f6a4d 14184 return;
35c08157
KLC		 14185
14186 elf_elfheader (link_info->output_bfd)->e_flags |= E_NDS32_HAS_EX9_INST;
14187 number = 0;
14188 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
14189 {
14190 long val;
14191
14192 val = strtol (ptr->string, NULL, 16);
14193 bfd_putb32 ((bfd_vma) val, (char *) contents + (number * 4));
14194 number++;
14195 }
14196 break;
14197 }
14198 }
14199}
14200
14201/* Get insn with regs according to relocation type. */
14202
14203static void
14204nds32_elf_get_insn_with_reg (Elf_Internal_Rela *irel,
1c8f6a4d 14205 uint32_t insn, uint32_t *insn_with_reg)
35c08157
KLC		 14206{
14207 reloc_howto_type *howto = NULL;
14208
14209 if (irel == NULL
14210 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
14211 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
14212 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
14213 {
14214 *insn_with_reg = insn;
14215 return;
14216 }
14217
14218 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
14219 *insn_with_reg = insn & (0xffffffff ^ howto->dst_mask);
14220}
14221
14222/* Mask number of address bits according to relocation. */
14223
14224static unsigned long
14225nds32_elf_irel_mask (Elf_Internal_Rela *irel)
14226{
14227 reloc_howto_type *howto = NULL;
14228
14229 if (irel == NULL
14230 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
14231 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
14232 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
14233 return 0;
14234
14235 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
14236 return howto->dst_mask;
14237}
14238
14239static void
14240nds32_elf_insert_irel_entry (struct elf_nds32_irel_entry **irel_list,
14241 struct elf_nds32_irel_entry *irel_ptr)
14242{
14243 if (*irel_list == NULL)
14244 {
14245 *irel_list = irel_ptr;
14246 irel_ptr->next = NULL;
14247 }
14248 else
14249 {
14250 irel_ptr->next = *irel_list;
14251 *irel_list = irel_ptr;
14252 }
14253}
14254
14255static void
14256nds32_elf_ex9_insert_fix (asection * sec, Elf_Internal_Rela * irel,
14257 struct elf_link_hash_entry *h, int order)
14258{
14259 struct elf_nds32_ex9_refix *ptr;
14260
14261 ptr = bfd_malloc (sizeof (struct elf_nds32_ex9_refix));
14262 ptr->sec = sec;
14263 ptr->irel = irel;
14264 ptr->h = h;
14265 ptr->order = order;
14266 ptr->next = NULL;
14267
14268 if (ex9_refix_head == NULL)
14269 ex9_refix_head = ptr;
14270 else
14271 {
14272 struct elf_nds32_ex9_refix *temp = ex9_refix_head;
14273
14274 while (temp->next != NULL)
14275 temp = temp->next;
14276 temp->next = ptr;
14277 }
14278}
14279
14280enum
14281{
14282 DATA_EXIST = 1,
14283 CLEAN_PRE = 1 << 1,
14284 PUSH_PRE = 1 << 2
14285};
14286
14287/* Check relocation type if supporting for ex9. */
14288
14289static int
14290nds32_elf_ex9_relocation_check (struct bfd_link_info *info,
14291 Elf_Internal_Rela **irel,
14292 Elf_Internal_Rela *irelend,
14293 nds32_elf_blank_t *relax_blank_list,
f4cb41f4 14294 asection *sec,bfd_vma *off,
35c08157
KLC		 14295 bfd_byte *contents)
14296{
14297 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
14298 bfd_boolean nested_ex9, nested_loop;
14299 bfd_boolean ex9_loop_aware;
14300 /* We use the highest 1 byte of result to record
14301 how many bytes location counter has to move. */
14302 int result = 0;
14303 Elf_Internal_Rela *irel_save = NULL;
14304 struct elf_nds32_link_hash_table *table;
14305
14306 table = nds32_elf_hash_table (info);
14307 ex9_loop_aware = table->ex9_loop_aware;
14308
14309 while ((*irel) != NULL && (*irel) < irelend && *off == (*irel)->r_offset)
14310 {
14311 switch (ELF32_R_TYPE ((*irel)->r_info))
14312 {
14313 case R_NDS32_RELAX_REGION_BEGIN:
14314 /* Ignore code block. */
14315 nested_ex9 = FALSE;
14316 nested_loop = FALSE;
14317 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG)
14318 || (ex9_loop_aware
14319 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG)))
14320 {
14321 /* Check the region if loop or not. If it is true and
14322 ex9-loop-aware is true, ignore the region till region end. */
14323 /* To save the status for in .no_relax ex9 region and
14324 loop region to conform the block can do ex9 relaxation. */
14325 nested_ex9 = ((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG);
14326 nested_loop = (ex9_loop_aware
14327 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG));
14328 while ((*irel) && (*irel) < irelend && (nested_ex9 || nested_loop))
14329 {
14330 (*irel)++;
14331 if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_BEGIN)
14332 {
14333 /* There may be nested region. */
14334 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14335 nested_ex9 = TRUE;
14336 else if (ex9_loop_aware
14337 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14338 nested_loop = TRUE;
14339 }
14340 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_END)
14341 {
14342 /* The end of region. */
14343 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14344 nested_ex9 = FALSE;
14345 else if (ex9_loop_aware
14346 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14347 nested_loop = FALSE;
14348 }
1c8f6a4d 14349 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_LABEL
35c08157
KLC		 14350 && ((*irel)->r_addend & 0x1f) == 2)
14351 {
14352 /* Alignment exist in the region. */
14353 result |= CLEAN_PRE;
14354 if (((*irel)->r_offset -
14355 get_nds32_elf_blank_total (&relax_blank_list,
14356 (*irel)->r_offset, 0)) & 0x02)
14357 result |= PUSH_PRE;
14358 }
14359 }
14360 if ((*irel) >= irelend)
14361 *off = sec->size;
14362 else
14363 *off = (*irel)->r_offset;
14364
14365 /* The final instruction in the region, regard this one as data to ignore it. */
14366 result |= DATA_EXIST;
14367 return result;
14368 }
14369 break;
14370
14371 case R_NDS32_LABEL:
1c8f6a4d 14372 if (((*irel)->r_addend & 0x1f) == 2)
35c08157
KLC		 14373 {
14374 /* Check this point is align and decide to do ex9 or not. */
14375 result |= CLEAN_PRE;
14376 if (((*irel)->r_offset -
14377 get_nds32_elf_blank_total (&relax_blank_list,
14378 (*irel)->r_offset, 0)) & 0x02)
14379 result |= PUSH_PRE;
14380 }
14381 break;
14382 case R_NDS32_32_RELA:
14383 /* Data. */
14384 result |= (4 << 24);
14385 result |= DATA_EXIST;
14386 break;
14387 case R_NDS32_16_RELA:
14388 /* Data. */
14389 result |= (2 << 24);
14390 result |= DATA_EXIST;
14391 break;
14392 case R_NDS32_DATA:
14393 /* Data. */
14394 /* The least code alignment is 2. If the data is only one byte,
14395 we have to shift one more byte. */
14396 if ((*irel)->r_addend == 1)
14397 result |= ((*irel)->r_addend << 25) ;
14398 else
14399 result |= ((*irel)->r_addend << 24) ;
14400
14401 result |= DATA_EXIST;
14402 break;
14403
14404 case R_NDS32_25_PCREL_RELA:
14405 case R_NDS32_SDA16S3_RELA:
14406 case R_NDS32_SDA15S3_RELA:
14407 case R_NDS32_SDA15S3:
14408 case R_NDS32_SDA17S2_RELA:
14409 case R_NDS32_SDA15S2_RELA:
14410 case R_NDS32_SDA12S2_SP_RELA:
14411 case R_NDS32_SDA12S2_DP_RELA:
14412 case R_NDS32_SDA15S2:
14413 case R_NDS32_SDA18S1_RELA:
14414 case R_NDS32_SDA15S1_RELA:
14415 case R_NDS32_SDA15S1:
14416 case R_NDS32_SDA19S0_RELA:
14417 case R_NDS32_SDA15S0_RELA:
14418 case R_NDS32_SDA15S0:
14419 case R_NDS32_HI20_RELA:
14420 case R_NDS32_LO12S0_ORI_RELA:
14421 case R_NDS32_LO12S0_RELA:
14422 case R_NDS32_LO12S1_RELA:
14423 case R_NDS32_LO12S2_RELA:
14424 /* These relocation is supported ex9 relaxation currently. */
14425 /* We have to save the relocation for using later, since we have
14426 to check there is any alignment in the same address. */
14427 irel_save = *irel;
14428 break;
14429 default:
14430 /* Not support relocations. */
14431 if (ELF32_R_TYPE ((*irel)->r_info) < ARRAY_SIZE (nds32_elf_howto_table)
1c8f6a4d
KLC		 14432 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_NONE
14433 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_INSN16)
35c08157
KLC		 14434 {
14435 /* Note: To optimize aggressively, it maybe can ignore R_NDS32_INSN16 here.
14436 But we have to consider if there is any side-effect. */
14437 if (!(result & DATA_EXIST))
14438 {
14439 /* We have to confirm there is no data relocation in the
14440 same address. In general case, this won't happen. */
14441 /* We have to do ex9 conservative, for those relocation not
14442 considerd we ignore instruction. */
14443 result |= DATA_EXIST;
14444 if (*(contents + *off) & 0x80)
14445 result |= (2 << 24);
14446 else
14447 result |= (4 << 24);
14448 break;
14449 }
14450 }
14451 }
14452 if ((*irel) < irelend
14453 && ((*irel) + 1) < irelend
14454 && (*irel)->r_offset == ((*irel) + 1)->r_offset)
14455 /* There are relocations pointing to the same address, we have to
14456 check all of them. */
14457 (*irel)++;
14458 else
14459 {
14460 if (irel_save)
14461 *irel = irel_save;
14462 return result;
14463 }
14464 }
14465 return result;
14466}
14467
1c8f6a4d
KLC		 14468/* Replace with ex9 instruction. */
14469
14470static bfd_boolean
14471nds32_elf_ex9_push_insn (uint16_t insn16, bfd_byte *contents, bfd_vma pre_off,
14472 nds32_elf_blank_t **relax_blank_list,
14473 struct elf_nds32_irel_entry *pre_irel_ptr,
14474 struct elf_nds32_irel_entry **irel_list)
14475{
14476 if (insn16 != 0)
14477 {
14478 /* Implement the ex9 relaxation. */
14479 bfd_putb16 (insn16, contents + pre_off);
14480 if (!insert_nds32_elf_blank_recalc_total (relax_blank_list,
14481 pre_off + 2, 2))
14482 return FALSE;
14483 if (pre_irel_ptr != NULL)
14484 nds32_elf_insert_irel_entry (irel_list, pre_irel_ptr);
14485 }
14486 return TRUE;
14487}
14488
35c08157
KLC		 14489/* Replace input file instruction which is in ex9 itable. */
14490
14491static bfd_boolean
14492nds32_elf_ex9_replace_instruction (struct bfd_link_info *info, bfd *abfd, asection *sec)
14493{
14494 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
14495 bfd_byte *contents = NULL;
1c8f6a4d
KLC		 14496 bfd_vma off;
14497 uint16_t insn16, insn_ex9;
35c08157 14498 /* `pre_*' are used to track previous instruction that can use ex9.it. */
1c8f6a4d
KLC		 14499 bfd_vma pre_off = -1;
14500 uint16_t pre_insn16 = 0;
35c08157
KLC		 14501 struct elf_nds32_irel_entry *pre_irel_ptr = NULL;
14502 Elf_Internal_Rela *internal_relocs;
14503 Elf_Internal_Rela *irel;
14504 Elf_Internal_Rela *irelend;
14505 Elf_Internal_Shdr *symtab_hdr;
14506 Elf_Internal_Sym *isym = NULL;
14507 nds32_elf_blank_t *relax_blank_list = NULL;
1c8f6a4d
KLC		 14508 uint32_t insn = 0;
14509 uint32_t insn_with_reg = 0;
14510 uint32_t it_insn;
14511 uint32_t it_insn_with_reg;
35c08157
KLC		 14512 unsigned long r_symndx;
14513 asection *isec;
14514 struct elf_nds32_irel_entry *irel_list = NULL;
14515 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
14516 int data_flag, do_replace, save_irel;
1c8f6a4d
KLC		 14517 struct elf_link_hash_entry_list *h_list;
14518
35c08157
KLC		 14519
14520 /* Load section instructions, relocations, and symbol table. */
14521 if (!nds32_get_section_contents (abfd, sec, &contents)
14522 || !nds32_get_local_syms (abfd, sec, &isym))
14523 return FALSE;
1c8f6a4d
KLC		 14524 internal_relocs =
14525 _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, TRUE /* keep_memory */);
35c08157
KLC		 14526 irelend = internal_relocs + sec->reloc_count;
14527 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
14528
14529 off = 0;
14530
14531 /* Check if the object enable ex9. */
1c8f6a4d
KLC		 14532 irel = find_relocs_at_address (internal_relocs, internal_relocs,
14533 irelend, R_NDS32_RELAX_ENTRY);
35c08157
KLC		 14534
14535 /* Check this section trigger ex9 relaxation. */
14536 if (irel == NULL
14537 || irel >= irelend
14538 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
14539 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
14540 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
14541 return TRUE;
14542
14543 irel = internal_relocs;
14544
14545 /* Check alignment and fetch proper relocation. */
14546 while (off < sec->size)
14547 {
14548 struct elf_link_hash_entry *h = NULL;
14549 struct elf_nds32_irel_entry *irel_ptr = NULL;
14550
14551 /* Syn the instruction and the relocation. */
14552 while (irel != NULL && irel < irelend && irel->r_offset < off)
14553 irel++;
14554
14555 data_flag = nds32_elf_ex9_relocation_check (info, &irel, irelend,
14556 relax_blank_list, sec,
14557 &off, contents);
14558 if (data_flag & PUSH_PRE)
1c8f6a4d
KLC		 14559 if (!nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14560 &relax_blank_list, pre_irel_ptr,
14561 &irel_list))
14562 return FALSE;
35c08157
KLC		 14563
14564 if (data_flag & CLEAN_PRE)
14565 {
14566 pre_off = 0;
14567 pre_insn16 = 0;
14568 pre_irel_ptr = NULL;
14569 }
14570 if (data_flag & DATA_EXIST)
14571 {
14572 /* We save the move offset in the highest byte. */
14573 off += (data_flag >> 24);
14574 continue;
14575 }
14576
14577 if (*(contents + off) & 0x80)
14578 {
14579 /* 2-byte instruction. */
14580 off += 2;
14581 continue;
14582 }
14583
14584 /* Load the instruction and its opcode with register for comparing. */
14585 ex9_insn = ex9_insn_head;
14586 insn = bfd_getb32 (contents + off);
14587 insn_with_reg = 0;
14588 while (ex9_insn)
14589 {
14590 it_insn = strtol (ex9_insn->string, NULL, 16);
14591 it_insn_with_reg = 0;
14592 do_replace = 0;
14593 save_irel = 0;
14594
14595 if (irel != NULL && irel < irelend && irel->r_offset == off)
14596 {
14597 /* Insn with relocation. */
14598 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
14599
14600 if (ex9_insn->irel != NULL)
1c8f6a4d
KLC		 14601 nds32_elf_get_insn_with_reg (ex9_insn->irel, it_insn,
14602 &it_insn_with_reg);
35c08157
KLC		 14603
14604 if (ex9_insn->irel != NULL
1c8f6a4d
KLC		 14605 && (ELF32_R_TYPE (irel->r_info) ==
14606 ELF32_R_TYPE (ex9_insn->irel->r_info))
35c08157
KLC		 14607 && (insn_with_reg == it_insn_with_reg))
14608 {
14609 /* Insn relocation and format is the same as table entry. */
14610
14611 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
14612 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
14613 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
14614 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
14615 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
14616 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
14617 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
14618 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
14619 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
14620 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
14621 && ELF32_R_TYPE (irel->r_info) <=
14622 R_NDS32_SDA12S2_SP_RELA)
14623 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
14624 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
14625 {
14626 r_symndx = ELF32_R_SYM (irel->r_info);
14627 if (r_symndx < symtab_hdr->sh_info)
14628 {
14629 /* Local symbol. */
14630 int shndx = isym[r_symndx].st_shndx;
14631
14632 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14633 if (ex9_insn->sec == isec
14634 && ex9_insn->irel->r_addend == irel->r_addend
14635 && ex9_insn->irel->r_info == irel->r_info)
14636 {
14637 do_replace = 1;
14638 save_irel = 1;
14639 }
14640 }
14641 else
14642 {
14643 /* External symbol. */
14644 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14645 if (ex9_insn->m_list)
14646 {
35c08157
KLC		 14647 h_list = ex9_insn->m_list->h_list;
14648 while (h_list)
14649 {
14650 if (h == h_list->h
1c8f6a4d
KLC		 14651 && (ex9_insn->m_list->irel->r_addend ==
14652 irel->r_addend))
35c08157
KLC		 14653 {
14654 do_replace = 1;
14655 save_irel = 1;
14656 break;
14657 }
14658 h_list = h_list->next;
14659 }
14660 }
14661 }
14662 }
14663 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA)
14664 {
14665 r_symndx = ELF32_R_SYM (irel->r_info);
14666 if (r_symndx < symtab_hdr->sh_info)
14667 {
14668 /* Local symbols. Compare its base symbol and offset. */
14669 int shndx = isym[r_symndx].st_shndx;
14670
14671 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14672 if (ex9_insn->sec == isec
14673 && ex9_insn->irel->r_addend == irel->r_addend
14674 && ex9_insn->irel->r_info == irel->r_info)
14675 {
14676 do_replace = 1;
14677 save_irel = 1;
14678 }
14679 }
14680 else
14681 {
14682 /* External symbol. */
14683 struct elf_link_hash_entry_mul_list *m_list;
14684
14685 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14686 m_list = ex9_insn->m_list;
14687
14688 while (m_list)
14689 {
1c8f6a4d 14690 h_list = m_list->h_list;
35c08157
KLC		 14691
14692 while (h_list)
14693 {
14694 if (h == h_list->h
1c8f6a4d
KLC		 14695 && (m_list->irel->r_addend
14696 == irel->r_addend))
35c08157
KLC		 14697 {
14698 do_replace = 1;
14699 save_irel = 1;
14700 if (ex9_insn->next
14701 && ex9_insn->m_list
14702 && ex9_insn->m_list == ex9_insn->next->m_list)
14703 {
14704 /* sethi multiple entry must be fixed */
14705 nds32_elf_ex9_insert_fix (sec, irel,
14706 h, ex9_insn->order);
14707 }
14708 break;
14709 }
14710 h_list = h_list->next;
14711 }
14712 m_list = m_list->next;
14713 }
14714 }
14715 }
14716 }
14717
14718 /* Import table: Check the symbol hash table and the
14719 jump target. Only R_NDS32_25_PCREL_RELA now. */
14720 else if (ex9_insn->times == -1
14721 && ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
14722 {
14723 nds32_elf_get_insn_with_reg (irel, it_insn, &it_insn_with_reg);
14724 if (insn_with_reg == it_insn_with_reg)
14725 {
14726 char code[10];
14727 bfd_vma relocation;
14728
14729 r_symndx = ELF32_R_SYM (irel->r_info);
14730 if (r_symndx >= symtab_hdr->sh_info)
14731 {
14732 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14733 if ((h->root.type == bfd_link_hash_defined
14734 || h->root.type == bfd_link_hash_defweak)
1c8f6a4d
KLC		 14735 && h->root.u.def.section != NULL
14736 && h->root.u.def.section->output_section != NULL
35c08157 14737 && h->root.u.def.section->gc_mark == 1
1c8f6a4d 14738 && bfd_is_abs_section (h->root.u.def.section)
35c08157
KLC		 14739 && h->root.u.def.value > sec->size)
14740 {
1c8f6a4d
KLC		 14741 relocation = h->root.u.def.value +
14742 h->root.u.def.section->output_section->vma +
14743 h->root.u.def.section->output_offset;
35c08157 14744 relocation += irel->r_addend;
1c8f6a4d
KLC		 14745 insn = insn_with_reg
14746 | ((relocation >> 1) & 0xffffff);
14747 snprintf (code, sizeof (code), "%08x", insn);
35c08157
KLC		 14748 if (strcmp (code, ex9_insn->string) == 0)
14749 {
14750 do_replace = 1;
14751 save_irel = 1;
14752 }
14753 }
14754 }
14755 }
14756 }
14757 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
1c8f6a4d
KLC		 14758 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
14759 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
35c08157
KLC		 14760 {
14761 /* These relocations do not have to relocate contens, so it can
14762 be regard as instruction without relocation. */
14763 if (insn == it_insn && ex9_insn->irel == NULL)
14764 do_replace = 1;
14765 }
14766 }
14767 else
14768 {
14769 /* Instruction without relocation, we only
14770 have to compare their byte code. */
14771 if (insn == it_insn && ex9_insn->irel == NULL)
14772 do_replace = 1;
14773 }
14774
14775 /* Insntruction match so replacing the code here. */
14776 if (do_replace == 1)
14777 {
14778 /* There are two formats of ex9 instruction. */
14779 if (ex9_insn->order < 32)
14780 insn_ex9 = INSN_EX9_IT_2;
14781 else
14782 insn_ex9 = INSN_EX9_IT_1;
14783 insn16 = insn_ex9 | ex9_insn->order;
14784
1c8f6a4d
KLC		 14785 /* Insert ex9 instruction. */
14786 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14787 &relax_blank_list, pre_irel_ptr,
14788 &irel_list);
35c08157
KLC		 14789 pre_off = off;
14790 pre_insn16 = insn16;
14791
14792 if (save_irel)
14793 {
14794 /* For instuction with relocation do relax. */
14795 irel_ptr = (struct elf_nds32_irel_entry *)
14796 bfd_malloc (sizeof (struct elf_nds32_irel_entry));
14797 irel_ptr->irel = irel;
14798 irel_ptr->next = NULL;
14799 pre_irel_ptr = irel_ptr;
14800 }
14801 else
14802 pre_irel_ptr = NULL;
14803 break;
14804 }
14805 ex9_insn = ex9_insn->next;
14806 }
14807 off += 4;
14808 }
14809
1c8f6a4d
KLC		 14810 /* Insert ex9 instruction. */
14811 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14812 &relax_blank_list, pre_irel_ptr,
14813 &irel_list);
35c08157
KLC		 14814
14815 /* Delete the redundant code. */
14816 if (relax_blank_list)
14817 {
14818 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
14819 relax_blank_list = NULL;
14820 }
14821
14822 /* Clear the relocation that is replaced by ex9. */
14823 while (irel_list)
14824 {
14825 struct elf_nds32_irel_entry *irel_ptr;
14826
14827 irel_ptr = irel_list;
14828 irel_list = irel_ptr->next;
14829 irel_ptr->irel->r_info =
14830 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), R_NDS32_TRAN);
14831 free (irel_ptr);
14832 }
14833 return TRUE;
14834}
14835
14836/* Initialize ex9 hash table. */
14837
14838int
14839nds32_elf_ex9_init (void)
14840{
14841 if (!bfd_hash_table_init_n (&ex9_code_table, nds32_elf_code_hash_newfunc,
14842 sizeof (struct elf_nds32_code_hash_entry),
14843 1023))
14844 {
14845 (*_bfd_error_handler) (_("Linker: cannot init ex9 hash table error \n"));
14846 return FALSE;
14847 }
14848 return TRUE;
14849}
14850
14851/* Predict how many bytes will be relaxed with ex9 and ifc. */
14852
14853static void
14854nds32_elf_ex9_total_relax (struct bfd_link_info *info)
14855{
14856 struct elf_nds32_insn_times_entry *ex9_insn;
14857 struct elf_nds32_insn_times_entry *temp;
14858 int target_optimize;
14859 struct elf_nds32_link_hash_table *table;
14860
14861 if (ex9_insn_head == NULL)
14862 return;
14863
14864 table = nds32_elf_hash_table (info);
14865 target_optimize = table->target_optimize;
14866 ex9_insn = ex9_insn_head;
14867 while (ex9_insn)
14868 {
14869 ex9_relax_size = ex9_insn->times * 2 + ex9_relax_size;
14870 temp = ex9_insn;
14871 ex9_insn = ex9_insn->next;
14872 free (temp);
14873 }
14874 ex9_insn_head = NULL;
14875
14876 if ((target_optimize & NDS32_RELAX_JUMP_IFC_ON))
14877 {
14878 /* Examine ifc reduce size. */
14879 struct elf_nds32_ifc_symbol_entry *ifc_ent = ifc_symbol_head;
14880 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
14881 int size = 0;
14882
14883 while (ifc_ent)
14884 {
14885 if (ifc_ent->enable == 0)
14886 {
14887 /* Not ifc yet. */
14888 irel_ptr = ifc_ent->irel_head;
14889 while (irel_ptr)
14890 {
14891 size += 2;
14892 irel_ptr = irel_ptr->next;
14893 }
14894 }
14895 size -= 2;
14896 ifc_ent = ifc_ent->next;
14897 }
14898 ex9_relax_size += size;
14899 }
14900}
14901
14902/* Finish ex9 table. */
14903
14904void
14905nds32_elf_ex9_finish (struct bfd_link_info *link_info)
14906{
35c08157
KLC		 14907 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
14908 nds32_elf_order_insn_times (link_info);
14909 nds32_elf_ex9_total_relax (link_info);
14910 /* Traverse the hash table and count its times. */
14911 nds32_elf_code_hash_traverse (nds32_elf_count_insn_times);
14912 nds32_elf_order_insn_times (link_info);
14913 nds32_elf_ex9_build_itable (link_info);
35c08157
KLC		 14914}
14915
14916/* Relocate the entries in ex9 table. */
14917
14918static bfd_vma
14919nds32_elf_ex9_reloc_insn (struct elf_nds32_insn_times_entry *ptr,
14920 struct bfd_link_info *link_info)
14921{
14922 Elf_Internal_Sym *isym = NULL;
14923 bfd_vma relocation = -1;
1c8f6a4d 14924 struct elf_link_hash_entry *h;
35c08157
KLC		 14925
14926 if (ptr->m_list != NULL)
14927 {
14928 /* Global symbol. */
1c8f6a4d
KLC		 14929 h = ptr->m_list->h_list->h;
14930 if ((h->root.type == bfd_link_hash_defined
14931 || h->root.type == bfd_link_hash_defweak)
14932 && h->root.u.def.section != NULL
14933 && h->root.u.def.section->output_section != NULL)
35c08157
KLC		 14934 {
14935
1c8f6a4d
KLC		 14936 relocation = h->root.u.def.value +
14937 h->root.u.def.section->output_section->vma +
14938 h->root.u.def.section->output_offset;
35c08157
KLC		 14939 relocation += ptr->m_list->irel->r_addend;
14940 }
14941 else
14942 relocation = 0;
14943 }
14944 else if (ptr->sec !=NULL)
14945 {
14946 /* Local symbol. */
14947 Elf_Internal_Sym sym;
14948 asection *sec = NULL;
14949 asection isec;
14950 asection *isec_ptr = &isec;
14951 Elf_Internal_Rela irel_backup = *(ptr->irel);
14952 asection *sec_backup = ptr->sec;
14953 bfd *abfd = ptr->sec->owner;
14954
14955 if (!nds32_get_local_syms (abfd, sec, &isym))
14956 return FALSE;
14957 isym = isym + ELF32_R_SYM (ptr->irel->r_info);
14958
14959 sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
14960 if (sec != NULL)
14961 *isec_ptr = *sec;
14962 sym = *isym;
14963
14964 /* The purpose is same as elf_link_input_bfd. */
14965 if (isec_ptr != NULL
14966 && isec_ptr->sec_info_type == SEC_INFO_TYPE_MERGE
14967 && ELF_ST_TYPE (isym->st_info) != STT_SECTION)
14968 {
14969 sym.st_value =
14970 _bfd_merged_section_offset (ptr->sec->output_section->owner, &isec_ptr,
14971 elf_section_data (isec_ptr)->sec_info,
14972 isym->st_value);
14973 }
14974 relocation = _bfd_elf_rela_local_sym (link_info->output_bfd, &sym,
14975 &ptr->sec, ptr->irel);
14976 if (ptr->irel != NULL)
14977 relocation += ptr->irel->r_addend;
14978
14979 /* Restore origin value since there may be some insntructions that
14980 could not be replaced with ex9.it. */
14981 *(ptr->irel) = irel_backup;
14982 ptr->sec = sec_backup;
14983 }
14984
14985 return relocation;
14986}
14987
14988/* Import ex9 table and build list. */
14989
14990void
14991nds32_elf_ex9_import_table (struct bfd_link_info *info)
14992{
1c8f6a4d 14993 int num = 0;
35c08157
KLC		 14994 bfd_byte *contents;
14995 unsigned long insn;
14996 FILE *ex9_import_file;
14997 int update_ex9_table;
14998 struct elf_nds32_link_hash_table *table;
14999
15000 table = nds32_elf_hash_table (info);
15001 ex9_import_file = table->ex9_import_file;
1c8f6a4d 15002 rewind (table->ex9_import_file);
35c08157
KLC		 15003
15004 contents = bfd_malloc (sizeof (bfd_byte) * 4);
15005
35c08157 15006 /* Read instructions from the input file and build the list. */
1c8f6a4d 15007 while (!feof (ex9_import_file))
35c08157
KLC		 15008 {
15009 char *code;
15010 struct elf_nds32_insn_times_entry *ptr;
15011 size_t nread;
15012
15013 nread = fread (contents, sizeof (bfd_byte) * 4, 1, ex9_import_file);
1c8f6a4d
KLC		 15014 /* Ignore the final byte 0x0a. */
15015 if (nread < 1)
15016 break;
35c08157
KLC		 15017 insn = bfd_getb32 (contents);
15018 code = bfd_malloc (sizeof (char) * 9);
15019 snprintf (code, 9, "%08lx", insn);
15020 ptr = bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
15021 ptr->string = code;
15022 ptr->order = num;
15023 ptr->times = -1;
15024 ptr->sec = NULL;
15025 ptr->m_list = NULL;
15026 ptr->rel_backup.r_offset = 0;
15027 ptr->rel_backup.r_info = 0;
15028 ptr->rel_backup.r_addend = 0;
15029 ptr->irel = NULL;
15030 ptr->next = NULL;
15031 nds32_elf_ex9_insert_entry (ptr);
35c08157
KLC		 15032 num++;
15033 }
15034
15035 update_ex9_table = table->update_ex9_table;
15036 if (update_ex9_table == 1)
15037 {
15038 /* It has to consider of sethi need to use multiple page
15039 but it not be done yet. */
15040 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
15041 nds32_elf_order_insn_times (info);
15042 }
15043}
15044
15045/* Export ex9 table. */
15046
15047static void
15048nds32_elf_ex9_export (struct bfd_link_info *info,
15049 bfd_byte *contents, int size)
15050{
15051 FILE *ex9_export_file;
15052 struct elf_nds32_link_hash_table *table;
15053
15054 table = nds32_elf_hash_table (info);
15055 ex9_export_file = table->ex9_export_file;
15056 fwrite (contents, sizeof (bfd_byte), size, ex9_export_file);
15057 fclose (ex9_export_file);
15058}
15059
15060/* Adjust relocations of J and JAL in ex9.itable.
15061 Export ex9 table. */
15062
1c8f6a4d 15063static void
35c08157
KLC		 15064nds32_elf_ex9_reloc_jmp (struct bfd_link_info *link_info)
15065{
15066 asection *table_sec = NULL;
15067 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
15068 struct elf_nds32_insn_times_entry *temp_ptr, *temp_ptr2;
15069 bfd *it_abfd;
1c8f6a4d 15070 uint32_t insn, insn_with_reg, source_insn;
35c08157
KLC		 15071 bfd_byte *contents = NULL, *source_contents = NULL;
15072 int size = 0;
15073 bfd_vma gp;
15074 int shift, update_ex9_table, offset = 0;
15075 reloc_howto_type *howto = NULL;
15076 Elf_Internal_Rela rel_backup;
15077 unsigned short insn_ex9;
15078 struct elf_nds32_link_hash_table *table;
1c8f6a4d
KLC		 15079 FILE *ex9_export_file;
15080 static bfd_boolean done = FALSE;
15081
15082 if (done)
15083 return;
15084
15085 done = TRUE;
35c08157
KLC		 15086
15087 table = nds32_elf_hash_table (link_info);
15088 if (table)
15089 table->relax_status |= NDS32_RELAX_EX9_DONE;
15090
15091
15092 update_ex9_table = table->update_ex9_table;
15093 /* Generated ex9.itable exactly. */
15094 if (update_ex9_table == 0)
15095 {
15096 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
c72f2fb2 15097 it_abfd = it_abfd->link.next)
35c08157
KLC		 15098 {
15099 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
15100 if (table_sec != NULL)
15101 break;
15102 }
15103
15104 if (table_sec != NULL)
15105 {
15106 bfd *output_bfd;
35c08157
KLC		 15107
15108 output_bfd = table_sec->output_section->owner;
15109 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15110 if (table_sec->size == 0)
15111 return;
15112
15113 if (!nds32_get_section_contents (it_abfd, table_sec, &contents))
15114 return;
35c08157
KLC		 15115 }
15116 }
15117 else
15118 {
15119 /* Set gp. */
15120 bfd *output_bfd;
15121
15122 output_bfd = link_info->input_bfds->sections->output_section->owner;
15123 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15124 contents = bfd_malloc (sizeof (bfd_byte) * 2048);
15125 }
15126
15127 /* Relocate instruction. */
15128 while (ex9_insn)
15129 {
15130 bfd_vma relocation, min_relocation = 0xffffffff;
15131
15132 insn = strtol (ex9_insn->string, NULL, 16);
15133 insn_with_reg = 0;
15134 if (ex9_insn->m_list != NULL || ex9_insn->sec != NULL)
15135 {
15136 if (ex9_insn->m_list)
15137 rel_backup = ex9_insn->m_list->rel_backup;
15138 else
15139 rel_backup = ex9_insn->rel_backup;
15140
15141 nds32_elf_get_insn_with_reg (&rel_backup, insn, &insn_with_reg);
15142 howto =
15143 bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE
15144 (rel_backup.r_info));
15145 shift = howto->rightshift;
15146 if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_25_PCREL_RELA
15147 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_ORI_RELA
15148 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_RELA
15149 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S1_RELA
15150 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S2_RELA)
15151 {
15152 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15153 insn =
15154 insn_with_reg | ((relocation >> shift) &
15155 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15156 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 15157 }
15158 else if ((ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3
15159 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0)
15160 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3_RELA
15161 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0_RELA)
15162 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA12S2_DP_RELA
15163 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA12S2_SP_RELA)
15164 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA16S3_RELA
15165 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA19S0_RELA))
15166 {
15167 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15168 insn =
15169 insn_with_reg | (((relocation - gp) >> shift) &
15170 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15171 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 15172 }
15173 else if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_HI20_RELA)
15174 {
15175 /* Sethi may be multiple entry for one insn. */
1c8f6a4d
KLC		 15176 if (ex9_insn->next && ex9_insn->m_list
15177 && ex9_insn->m_list == ex9_insn->next->m_list)
35c08157
KLC		 15178 {
15179 struct elf_link_hash_entry_mul_list *m_list;
15180 struct elf_nds32_ex9_refix *fix_ptr;
1c8f6a4d 15181 struct elf_link_hash_entry *h;
35c08157
KLC		 15182
15183 temp_ptr = ex9_insn;
15184 temp_ptr2 = ex9_insn;
15185 m_list = ex9_insn->m_list;
15186 while (m_list)
15187 {
1c8f6a4d
KLC		 15188 h = m_list->h_list->h;
15189 relocation = h->root.u.def.value +
15190 h->root.u.def.section->output_section->vma +
15191 h->root.u.def.section->output_offset;
35c08157
KLC		 15192 relocation += m_list->irel->r_addend;
15193
15194 if (relocation < min_relocation)
15195 min_relocation = relocation;
15196 m_list = m_list->next;
15197 }
15198 relocation = min_relocation;
15199
15200 /* Put insntruction into ex9 table. */
15201 insn = insn_with_reg
15202 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15203 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 15204 relocation = relocation + 0x1000; /* hi20 */
15205
1c8f6a4d
KLC		 15206 while (ex9_insn->next && ex9_insn->m_list
15207 && ex9_insn->m_list == ex9_insn->next->m_list)
35c08157
KLC		 15208 {
15209 /* Multiple sethi. */
15210 ex9_insn = ex9_insn->next;
15211 size += 4;
35c08157
KLC		 15212 insn =
15213 insn_with_reg | ((relocation >> shift) &
15214 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15215 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 15216 relocation = relocation + 0x1000; /* hi20 */
15217 }
15218
15219 fix_ptr = ex9_refix_head;
15220 while (fix_ptr)
15221 {
15222 /* Fix ex9 insn. */
15223 /* temp_ptr2 points to the head of multiple sethi. */
15224 temp_ptr = temp_ptr2;
15225 while (fix_ptr->order != temp_ptr->order && fix_ptr->next)
15226 {
15227 fix_ptr = fix_ptr->next;
15228 }
15229 if (fix_ptr->order != temp_ptr->order)
15230 break;
15231
15232 /* Set source insn. */
1c8f6a4d
KLC		 15233 relocation =
15234 fix_ptr->h->root.u.def.value +
15235 fix_ptr->h->root.u.def.section->output_section->vma +
15236 fix_ptr->h->root.u.def.section->output_offset;
35c08157
KLC		 15237 relocation += fix_ptr->irel->r_addend;
15238 /* sethi imm is imm20s. */
15239 source_insn = insn_with_reg | ((relocation >> shift) & 0xfffff);
15240
15241 while (temp_ptr)
15242 {
35c08157
KLC		 15243 /* Match entry and source code. */
15244 insn = bfd_getb32 (contents + (temp_ptr->order) * 4 + offset);
15245 if (insn == source_insn)
15246 {
15247 /* Fix the ex9 insn. */
15248 if (temp_ptr->order != fix_ptr->order)
15249 {
15250 if (!nds32_get_section_contents
15251 (fix_ptr->sec->owner, fix_ptr->sec,
15252 &source_contents))
15253 (*_bfd_error_handler)
15254 (_("Linker: error cannot fixed ex9 relocation \n"));
15255 if (temp_ptr->order < 32)
15256 insn_ex9 = INSN_EX9_IT_2;
15257 else
15258 insn_ex9 = INSN_EX9_IT_1;
15259 insn_ex9 = insn_ex9 | temp_ptr->order;
15260 bfd_putb16 (insn_ex9, source_contents + fix_ptr->irel->r_offset);
15261 }
15262 break;
15263 }
15264 else
15265 {
15266 if (!temp_ptr->next || temp_ptr->m_list != temp_ptr->next->m_list)
15267 (*_bfd_error_handler)
15268 (_("Linker: error cannot fixed ex9 relocation \n"));
15269 else
15270 temp_ptr = temp_ptr->next;
15271 }
15272 }
15273 fix_ptr = fix_ptr->next;
15274 }
15275 }
15276 else
15277 {
15278 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15279 insn = insn_with_reg
15280 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15281 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 15282 }
15283 }
15284 }
15285 else
15286 {
15287 /* Insn without relocation does not have to be fixed
15288 if need to update export table. */
15289 if (update_ex9_table == 1)
15290 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15291 }
15292 ex9_insn = ex9_insn->next;
15293 size += 4;
15294 }
15295
15296 ex9_export_file = table->ex9_export_file;
15297 if (ex9_export_file != NULL)
1c8f6a4d 15298 nds32_elf_ex9_export (link_info, contents, table_sec->size);
35c08157
KLC		 15299 else if (update_ex9_table == 1)
15300 {
1c8f6a4d
KLC		 15301 table->ex9_export_file = table->ex9_import_file;
15302 rewind (table->ex9_export_file);
15303 nds32_elf_ex9_export (link_info, contents, size);
35c08157
KLC		 15304 }
15305}
15306
15307/* Generate ex9 hash table. */
15308
15309static bfd_boolean
f4cb41f4 15310nds32_elf_ex9_build_hash_table (bfd *abfd, asection *sec,
35c08157
KLC		 15311 struct bfd_link_info *link_info)
15312{
15313 Elf_Internal_Rela *internal_relocs;
15314 Elf_Internal_Rela *irelend;
15315 Elf_Internal_Rela *irel;
15316 Elf_Internal_Rela *jrel;
15317 Elf_Internal_Rela rel_backup;
15318 Elf_Internal_Shdr *symtab_hdr;
15319 Elf_Internal_Sym *isym = NULL;
15320 asection *isec;
15321 struct elf_link_hash_entry **sym_hashes;
15322 bfd_byte *contents = NULL;
f4cb41f4 15323 bfd_vma off = 0;
35c08157 15324 unsigned long r_symndx;
1c8f6a4d 15325 uint32_t insn, insn_with_reg;
35c08157
KLC		 15326 struct elf_link_hash_entry *h;
15327 int data_flag, shift, align;
15328 bfd_vma relocation;
15329 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
15330 reloc_howto_type *howto = NULL;
15331
15332 sym_hashes = elf_sym_hashes (abfd);
15333 /* Load section instructions, relocations, and symbol table. */
15334 if (!nds32_get_section_contents (abfd, sec, &contents))
15335 return FALSE;
15336
15337 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
15338 TRUE /* keep_memory */);
15339 irelend = internal_relocs + sec->reloc_count;
15340 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
15341 if (!nds32_get_local_syms (abfd, sec, &isym))
15342 return FALSE;
15343
15344 /* Check the object if enable ex9. */
15345 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
15346 R_NDS32_RELAX_ENTRY);
15347
15348 /* Check this section trigger ex9 relaxation. */
15349 if (irel == NULL
15350 || irel >= irelend
15351 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
15352 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
15353 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
15354 return TRUE;
15355
15356 irel = internal_relocs;
15357
15358 /* Push each insn into hash table. */
15359 while (off < sec->size)
15360 {
15361 char code[10];
15362 struct elf_nds32_code_hash_entry *entry;
15363
15364 while (irel != NULL && irel < irelend && irel->r_offset < off)
15365 irel++;
15366
1c8f6a4d
KLC		 15367 data_flag = nds32_elf_ex9_relocation_check (link_info, &irel, irelend,
15368 NULL, sec, &off, contents);
35c08157
KLC		 15369 if (data_flag & DATA_EXIST)
15370 {
15371 /* We save the move offset in the highest byte. */
15372 off += (data_flag >> 24);
15373 continue;
15374 }
15375
15376 if (*(contents + off) & 0x80)
15377 {
15378 off += 2;
15379 }
15380 else
15381 {
15382 h = NULL;
15383 isec = NULL;
15384 jrel = NULL;
15385 rel_backup.r_info = 0;
15386 rel_backup.r_offset = 0;
15387 rel_backup.r_addend = 0;
15388 /* Load the instruction and its opcode with register for comparing. */
15389 insn = bfd_getb32 (contents + off);
15390 insn_with_reg = 0;
15391 if (irel != NULL && irel < irelend && irel->r_offset == off)
15392 {
15393 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
15394 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
15395 shift = howto->rightshift;
15396 align = (1 << shift) - 1;
15397 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
15398 || ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA
15399 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
15400 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
15401 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
15402 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
15403 ||(ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15404 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15405 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15406 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15407 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15408 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15409 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15410 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15411 {
15412 r_symndx = ELF32_R_SYM (irel->r_info);
15413 jrel = irel;
15414 rel_backup = *irel;
15415 if (r_symndx < symtab_hdr->sh_info)
15416 {
15417 /* Local symbol. */
15418 int shndx = isym[r_symndx].st_shndx;
15419
15420 bfd_vma st_value = (isym + r_symndx)->st_value;
15421 isec = elf_elfsections (abfd)[shndx]->bfd_section;
15422 relocation = (isec->output_section->vma + isec->output_offset
15423 + st_value + irel->r_addend);
15424 }
15425 else
15426 {
15427 /* External symbol. */
15428 bfd_boolean warned ATTRIBUTE_UNUSED;
15429 bfd_boolean ignored ATTRIBUTE_UNUSED;
15430 bfd_boolean unresolved_reloc ATTRIBUTE_UNUSED;
15431 asection *sym_sec;
15432
15433 /* Maybe there is a better way to get h and relocation */
15434 RELOC_FOR_GLOBAL_SYMBOL (link_info, abfd, sec, irel,
15435 r_symndx, symtab_hdr, sym_hashes,
15436 h, sym_sec, relocation,
15437 unresolved_reloc, warned, ignored);
15438 relocation += irel->r_addend;
1c8f6a4d
KLC		 15439 if ((h->root.type != bfd_link_hash_defined
15440 && h->root.type != bfd_link_hash_defweak)
15441 || strcmp (h->root.root.string, "_FP_BASE_") == 0)
35c08157
KLC		 15442 {
15443 off += 4;
15444 continue;
15445 }
15446 }
15447
15448 /* Check for gp relative instruction alignment. */
15449 if ((ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15450 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15451 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15452 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15453 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15454 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15455 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15456 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15457 {
15458 bfd_vma gp;
15459 bfd *output_bfd = sec->output_section->owner;
15460 bfd_reloc_status_type r;
15461
15462 /* If the symbol is in the abs section, the out_bfd will be null.
15463 This happens when the relocation has a symbol@GOTOFF. */
15464 r = nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15465 if (r != bfd_reloc_ok)
15466 {
15467 off += 4;
15468 continue;
15469 }
15470
15471 relocation -= gp;
15472
15473 /* Make sure alignment is correct. */
15474 if (relocation & align)
15475 {
15476 /* Incorrect alignment. */
15477 (*_bfd_error_handler)
15478 (_("%s: warning: unaligned small data access. "
15479 "For entry: {%d, %d, %d}, addr = 0x%x, align = 0x%x."),
15480 bfd_get_filename (abfd), irel->r_offset,
15481 irel->r_info, irel->r_addend, relocation, align);
15482 off += 4;
15483 continue;
15484 }
15485 }
15486
15487 insn = insn_with_reg
15488 | ((relocation >> shift) & nds32_elf_irel_mask (irel));
15489 }
15490 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
1c8f6a4d
KLC		 15491 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
15492 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
35c08157
KLC		 15493 {
15494 /* These relocations do not have to relocate contens, so it can
15495 be regard as instruction without relocation. */
15496 }
15497 else
15498 {
15499 off += 4;
15500 continue;
15501 }
15502 }
15503
1c8f6a4d 15504 snprintf (code, sizeof (code), "%08x", insn);
35c08157
KLC		 15505 /* Copy "code". */
15506 entry = (struct elf_nds32_code_hash_entry*)
15507 bfd_hash_lookup (&ex9_code_table, code, TRUE, TRUE);
15508 if (entry == NULL)
15509 {
15510 (*_bfd_error_handler)
15511 (_("%P%F: failed creating ex9.it %s hash table: %E\n"), code);
15512 return FALSE;
15513 }
15514 if (h)
15515 {
15516 if (h->root.type == bfd_link_hash_undefined)
15517 return TRUE;
15518 /* Global symbol. */
15519 /* In order to do sethi with different symbol but same value. */
15520 if (entry->m_list == NULL)
15521 {
15522 struct elf_link_hash_entry_mul_list *m_list_new;
15523 struct elf_link_hash_entry_list *h_list_new;
15524
15525 m_list_new = (struct elf_link_hash_entry_mul_list *)
15526 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15527 h_list_new = (struct elf_link_hash_entry_list *)
15528 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15529 entry->m_list = m_list_new;
15530 m_list_new->h_list = h_list_new;
15531 m_list_new->rel_backup = rel_backup;
15532 m_list_new->times = 1;
15533 m_list_new->irel = jrel;
15534 m_list_new->next = NULL;
15535 h_list_new->h = h;
15536 h_list_new->next = NULL;
15537 }
15538 else
15539 {
15540 struct elf_link_hash_entry_mul_list *m_list = entry->m_list;
15541 struct elf_link_hash_entry_list *h_list;
15542
15543 while (m_list)
15544 {
15545 /* Build the different symbols that point to the same address. */
15546 h_list = m_list->h_list;
15547 if (h_list->h->root.u.def.value == h->root.u.def.value
15548 && h_list->h->root.u.def.section->output_section->vma
15549 == h->root.u.def.section->output_section->vma
15550 && h_list->h->root.u.def.section->output_offset
15551 == h->root.u.def.section->output_offset
15552 && m_list->rel_backup.r_addend == rel_backup.r_addend)
15553 {
15554 m_list->times++;
15555 m_list->irel = jrel;
15556 while (h_list->h != h && h_list->next)
15557 h_list = h_list->next;
15558 if (h_list->h != h)
15559 {
15560 struct elf_link_hash_entry_list *h_list_new;
15561
15562 h_list_new = (struct elf_link_hash_entry_list *)
15563 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15564 h_list->next = h_list_new;
15565 h_list_new->h = h;
15566 h_list_new->next = NULL;
15567 }
15568 break;
15569 }
15570 /* The sethi case may have different address but the
15571 hi20 is the same. */
15572 else if (ELF32_R_TYPE (jrel->r_info) == R_NDS32_HI20_RELA
15573 && m_list->next == NULL)
15574 {
15575 struct elf_link_hash_entry_mul_list *m_list_new;
15576 struct elf_link_hash_entry_list *h_list_new;
15577
15578 m_list_new = (struct elf_link_hash_entry_mul_list *)
15579 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15580 h_list_new = (struct elf_link_hash_entry_list *)
15581 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15582 m_list->next = m_list_new;
15583 m_list_new->h_list = h_list_new;
15584 m_list_new->rel_backup = rel_backup;
15585 m_list_new->times = 1;
15586 m_list_new->irel = jrel;
15587 m_list_new->next = NULL;
15588 h_list_new->h = h;
15589 h_list_new->next = NULL;
15590 break;
15591 }
15592 m_list = m_list->next;
15593 }
15594 if (!m_list)
15595 {
15596 off += 4;
15597 continue;
15598 }
15599 }
15600 }
15601 else
15602 {
15603 /* Local symbol and insn without relocation*/
15604 entry->times++;
15605 entry->rel_backup = rel_backup;
15606 }
15607
15608 /* Use in sethi insn with constant and global symbol in same format. */
15609 if (!jrel)
15610 entry->const_insn = 1;
15611 else
15612 entry->irel = jrel;
15613 entry->sec = isec;
15614 off += 4;
15615 }
15616 }
15617 return TRUE;
15618}
15619
15620/* Set the _ITB_BASE, and point it to ex9 table. */
15621
15622bfd_boolean
15623nds32_elf_ex9_itb_base (struct bfd_link_info *link_info)
15624{
15625 bfd *abfd;
15626 asection *sec;
15627 bfd *output_bfd = NULL;
15628 struct bfd_link_hash_entry *bh = NULL;
35c08157
KLC		 15629
15630 if (is_ITB_BASE_set == 1)
15631 return TRUE;
15632
15633 is_ITB_BASE_set = 1;
15634
1c8f6a4d
KLC		 15635 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_", FALSE, FALSE, TRUE);
15636
15637 if (bh && (bh->type == bfd_link_hash_defined
15638 || bh->type == bfd_link_hash_defweak))
15639 return TRUE;
35c08157
KLC		 15640
15641 for (abfd = link_info->input_bfds; abfd != NULL;
c72f2fb2 15642 abfd = abfd->link.next)
35c08157
KLC		 15643 {
15644 sec = bfd_get_section_by_name (abfd, ".ex9.itable");
15645 if (sec != NULL)
15646 {
15647 output_bfd = sec->output_section->owner;
15648 break;
15649 }
15650 }
15651 if (output_bfd == NULL)
15652 {
15653 output_bfd = link_info->output_bfd;
15654 if (output_bfd->sections == NULL)
15655 return TRUE;
15656 else
15657 sec = bfd_abs_section_ptr;
15658 }
15659 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_",
15660 FALSE, FALSE, TRUE);
15661 return (_bfd_generic_link_add_one_symbol
15662 (link_info, output_bfd, "_ITB_BASE_",
1c8f6a4d 15663 BSF_GLOBAL | BSF_WEAK, sec, 0,
35c08157
KLC		 15664 (const char *) NULL, FALSE, get_elf_backend_data
15665 (output_bfd)->collect, &bh));
15666} /* End EX9.IT */
15667\f
15668
15669#define ELF_ARCH bfd_arch_nds32
15670#define ELF_MACHINE_CODE EM_NDS32
15671#define ELF_MAXPAGESIZE 0x1000
1c8f6a4d 15672#define ELF_TARGET_ID NDS32_ELF_DATA
35c08157 15673
6d00b590 15674#define TARGET_BIG_SYM nds32_elf32_be_vec
35c08157 15675#define TARGET_BIG_NAME "elf32-nds32be"
6d00b590 15676#define TARGET_LITTLE_SYM nds32_elf32_le_vec
35c08157
KLC		 15677#define TARGET_LITTLE_NAME "elf32-nds32le"
15678
15679#define elf_info_to_howto nds32_info_to_howto
15680#define elf_info_to_howto_rel nds32_info_to_howto_rel
15681
15682#define bfd_elf32_bfd_link_hash_table_create nds32_elf_link_hash_table_create
15683#define bfd_elf32_bfd_merge_private_bfd_data nds32_elf_merge_private_bfd_data
15684#define bfd_elf32_bfd_print_private_bfd_data nds32_elf_print_private_bfd_data
15685#define bfd_elf32_bfd_relax_section nds32_elf_relax_section
15686#define bfd_elf32_bfd_set_private_flags nds32_elf_set_private_flags
15687
1c8f6a4d 15688#define bfd_elf32_mkobject nds32_elf_mkobject
35c08157
KLC		 15689#define elf_backend_action_discarded nds32_elf_action_discarded
15690#define elf_backend_add_symbol_hook nds32_elf_add_symbol_hook
15691#define elf_backend_check_relocs nds32_elf_check_relocs
15692#define elf_backend_adjust_dynamic_symbol nds32_elf_adjust_dynamic_symbol
15693#define elf_backend_create_dynamic_sections nds32_elf_create_dynamic_sections
15694#define elf_backend_finish_dynamic_sections nds32_elf_finish_dynamic_sections
15695#define elf_backend_finish_dynamic_symbol nds32_elf_finish_dynamic_symbol
15696#define elf_backend_size_dynamic_sections nds32_elf_size_dynamic_sections
15697#define elf_backend_relocate_section nds32_elf_relocate_section
15698#define elf_backend_gc_mark_hook nds32_elf_gc_mark_hook
15699#define elf_backend_gc_sweep_hook nds32_elf_gc_sweep_hook
15700#define elf_backend_grok_prstatus nds32_elf_grok_prstatus
15701#define elf_backend_grok_psinfo nds32_elf_grok_psinfo
15702#define elf_backend_reloc_type_class nds32_elf_reloc_type_class
15703#define elf_backend_copy_indirect_symbol nds32_elf_copy_indirect_symbol
15704#define elf_backend_link_output_symbol_hook nds32_elf_output_symbol_hook
15705#define elf_backend_output_arch_syms nds32_elf_output_arch_syms
15706#define elf_backend_object_p nds32_elf_object_p
15707#define elf_backend_final_write_processing nds32_elf_final_write_processing
15708#define elf_backend_special_sections nds32_elf_special_sections
1c8f6a4d
KLC		 15709#define bfd_elf32_bfd_get_relocated_section_contents \
15710 nds32_elf_get_relocated_section_contents
35c08157
KLC		 15711
15712#define elf_backend_can_gc_sections 1
15713#define elf_backend_can_refcount 1
15714#define elf_backend_want_got_plt 1
15715#define elf_backend_plt_readonly 1
15716#define elf_backend_want_plt_sym 0
15717#define elf_backend_got_header_size 12
15718#define elf_backend_may_use_rel_p 1
15719#define elf_backend_default_use_rela_p 1
15720#define elf_backend_may_use_rela_p 1
15721
15722#include "elf32-target.h"
15723
15724#undef ELF_MAXPAGESIZE
15725#define ELF_MAXPAGESIZE 0x2000
15726
15727#undef TARGET_BIG_SYM
6d00b590 15728#define TARGET_BIG_SYM nds32_elf32_linux_be_vec
35c08157
KLC		 15729#undef TARGET_BIG_NAME
15730#define TARGET_BIG_NAME "elf32-nds32be-linux"
15731#undef TARGET_LITTLE_SYM
6d00b590 15732#define TARGET_LITTLE_SYM nds32_elf32_linux_le_vec
35c08157
KLC		 15733#undef TARGET_LITTLE_NAME
15734#define TARGET_LITTLE_NAME "elf32-nds32le-linux"
15735#undef elf32_bed
15736#define elf32_bed elf32_nds32_lin_bed
15737
15738#include "elf32-target.h"
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