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35c08157 1/* NDS32-specific support for 32-bit ELF.
6f2750fe 2 Copyright (C) 2012-2016 Free Software Foundation, Inc.
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3 Contributed by Andes Technology Corporation.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
1c8f6a4d 20 02110-1301, USA. */
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21
22
23#include "sysdep.h"
24#include "bfd.h"
25#include "bfd_stdint.h"
26#include "bfdlink.h"
27#include "libbfd.h"
28#include "elf-bfd.h"
29#include "libiberty.h"
30#include "bfd_stdint.h"
31#include "elf/nds32.h"
32#include "opcode/nds32.h"
33#include "elf32-nds32.h"
34#include "opcode/cgen.h"
35#include "../opcodes/nds32-opc.h"
36
37/* Relocation HOWTO functions. */
38static bfd_reloc_status_type nds32_elf_ignore_reloc
39 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
40static bfd_reloc_status_type nds32_elf_9_pcrel_reloc
41 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
42static bfd_reloc_status_type nds32_elf_hi20_reloc
43 (bfd *, arelent *, asymbol *, void *,
44 asection *, bfd *, char **);
45static bfd_reloc_status_type nds32_elf_lo12_reloc
46 (bfd *, arelent *, asymbol *, void *,
47 asection *, bfd *, char **);
48static bfd_reloc_status_type nds32_elf_generic_reloc
49 (bfd *, arelent *, asymbol *, void *,
50 asection *, bfd *, char **);
51static bfd_reloc_status_type nds32_elf_sda15_reloc
52 (bfd *, arelent *, asymbol *, void *,
53 asection *, bfd *, char **);
54
55/* Helper functions for HOWTO. */
56static bfd_reloc_status_type nds32_elf_do_9_pcrel_reloc
57 (bfd *, reloc_howto_type *, asection *, bfd_byte *, bfd_vma,
58 asection *, bfd_vma, bfd_vma);
59static void nds32_elf_relocate_hi20
60 (bfd *, int, Elf_Internal_Rela *, Elf_Internal_Rela *, bfd_byte *, bfd_vma);
61static reloc_howto_type *bfd_elf32_bfd_reloc_type_table_lookup
62 (enum elf_nds32_reloc_type);
63static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
64 (bfd *, bfd_reloc_code_real_type);
65
66/* Target hooks. */
67static void nds32_info_to_howto_rel
68 (bfd *, arelent *, Elf_Internal_Rela *dst);
69static void nds32_info_to_howto
70 (bfd *, arelent *, Elf_Internal_Rela *dst);
71static bfd_boolean nds32_elf_add_symbol_hook
72 (bfd *, struct bfd_link_info *, Elf_Internal_Sym *, const char **,
73 flagword *, asection **, bfd_vma *);
74static bfd_boolean nds32_elf_relocate_section
75 (bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
76 Elf_Internal_Rela *, Elf_Internal_Sym *, asection **);
77static bfd_boolean nds32_elf_object_p (bfd *);
78static void nds32_elf_final_write_processing (bfd *, bfd_boolean);
79static bfd_boolean nds32_elf_set_private_flags (bfd *, flagword);
80static bfd_boolean nds32_elf_merge_private_bfd_data (bfd *, bfd *);
81static bfd_boolean nds32_elf_print_private_bfd_data (bfd *, void *);
82static bfd_boolean nds32_elf_gc_sweep_hook
83 (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
84static bfd_boolean nds32_elf_check_relocs
85 (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
86static asection *nds32_elf_gc_mark_hook
87 (asection *, struct bfd_link_info *, Elf_Internal_Rela *,
88 struct elf_link_hash_entry *, Elf_Internal_Sym *);
89static bfd_boolean nds32_elf_adjust_dynamic_symbol
90 (struct bfd_link_info *, struct elf_link_hash_entry *);
91static bfd_boolean nds32_elf_size_dynamic_sections
92 (bfd *, struct bfd_link_info *);
93static bfd_boolean nds32_elf_create_dynamic_sections
94 (bfd *, struct bfd_link_info *);
95static bfd_boolean nds32_elf_finish_dynamic_sections
96 (bfd *, struct bfd_link_info *info);
97static bfd_boolean nds32_elf_finish_dynamic_symbol
98 (bfd *, struct bfd_link_info *, struct elf_link_hash_entry *,
99 Elf_Internal_Sym *);
1c8f6a4d 100static bfd_boolean nds32_elf_mkobject (bfd *);
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101
102/* Nds32 helper functions. */
103static bfd_reloc_status_type nds32_elf_final_sda_base
104 (bfd *, struct bfd_link_info *, bfd_vma *, bfd_boolean);
105static bfd_boolean allocate_dynrelocs (struct elf_link_hash_entry *, void *);
106static bfd_boolean readonly_dynrelocs (struct elf_link_hash_entry *, void *);
107static Elf_Internal_Rela *find_relocs_at_address
108 (Elf_Internal_Rela *, Elf_Internal_Rela *,
109 Elf_Internal_Rela *, enum elf_nds32_reloc_type);
110static bfd_vma calculate_memory_address
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111(bfd *, Elf_Internal_Rela *, Elf_Internal_Sym *, Elf_Internal_Shdr *);
112static int nds32_get_section_contents (bfd *, asection *,
113 bfd_byte **, bfd_boolean);
35c08157 114static bfd_boolean nds32_elf_ex9_build_hash_table
0c4bd9d9 115(bfd *, asection *, struct bfd_link_info *);
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116static bfd_boolean nds32_elf_ex9_itb_base (struct bfd_link_info *);
117static void nds32_elf_ex9_import_table (struct bfd_link_info *);
118static void nds32_elf_ex9_finish (struct bfd_link_info *);
119static void nds32_elf_ex9_reloc_jmp (struct bfd_link_info *);
35c08157 120static void nds32_elf_get_insn_with_reg
1c8f6a4d 121 (Elf_Internal_Rela *, uint32_t, uint32_t *);
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122static int nds32_get_local_syms (bfd *, asection *ATTRIBUTE_UNUSED,
123 Elf_Internal_Sym **);
124static bfd_boolean nds32_elf_ex9_replace_instruction
125 (struct bfd_link_info *, bfd *, asection *);
126static bfd_boolean nds32_elf_ifc_calc (struct bfd_link_info *, bfd *,
127 asection *);
1c8f6a4d 128static bfd_boolean nds32_elf_ifc_finish (struct bfd_link_info *);
35c08157 129static bfd_boolean nds32_elf_ifc_replace (struct bfd_link_info *);
1c8f6a4d 130static bfd_boolean nds32_elf_ifc_reloc (void);
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131static bfd_boolean nds32_relax_fp_as_gp
132 (struct bfd_link_info *link_info, bfd *abfd, asection *sec,
133 Elf_Internal_Rela *internal_relocs, Elf_Internal_Rela *irelend,
134 Elf_Internal_Sym *isymbuf);
135static bfd_boolean nds32_fag_remove_unused_fpbase
136 (bfd *abfd, asection *sec, Elf_Internal_Rela *internal_relocs,
137 Elf_Internal_Rela *irelend);
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138static bfd_byte *
139nds32_elf_get_relocated_section_contents (bfd *abfd,
140 struct bfd_link_info *link_info,
141 struct bfd_link_order *link_order,
142 bfd_byte *data,
143 bfd_boolean relocatable,
144 asymbol **symbols);
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145
146enum
147{
148 MACH_V1 = bfd_mach_n1h,
149 MACH_V2 = bfd_mach_n1h_v2,
150 MACH_V3 = bfd_mach_n1h_v3,
151 MACH_V3M = bfd_mach_n1h_v3m
152};
153
154#define MIN(a, b) ((a) > (b) ? (b) : (a))
155#define MAX(a, b) ((a) > (b) ? (a) : (b))
156
157/* The name of the dynamic interpreter. This is put in the .interp
158 section. */
159#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
160
161/* The nop opcode we use. */
162#define NDS32_NOP32 0x40000009
163#define NDS32_NOP16 0x9200
164
165/* The size in bytes of an entry in the procedure linkage table. */
166#define PLT_ENTRY_SIZE 24
167#define PLT_HEADER_SIZE 24
168
169/* The first entry in a procedure linkage table are reserved,
170 and the initial contents are unimportant (we zero them out).
171 Subsequent entries look like this. */
172#define PLT0_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(.got+4) */
173#define PLT0_ENTRY_WORD1 0x58f78000 /* ori r15, r25, LO12(.got+4) */
174#define PLT0_ENTRY_WORD2 0x05178000 /* lwi r17, [r15+0] */
175#define PLT0_ENTRY_WORD3 0x04f78001 /* lwi r15, [r15+4] */
176#define PLT0_ENTRY_WORD4 0x4a003c00 /* jr r15 */
177
178/* $ta is change to $r15 (from $r25). */
179#define PLT0_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[1]@GOT) */
180#define PLT0_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[1]@GOT) */
181#define PLT0_PIC_ENTRY_WORD2 0x40f7f400 /* add r15, gp, r15 */
182#define PLT0_PIC_ENTRY_WORD3 0x05178000 /* lwi r17, [r15+0] */
183#define PLT0_PIC_ENTRY_WORD4 0x04f78001 /* lwi r15, [r15+4] */
184#define PLT0_PIC_ENTRY_WORD5 0x4a003c00 /* jr r15 */
185
186#define PLT_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(&got[n+3]) */
187#define PLT_ENTRY_WORD1 0x04f78000 /* lwi r15, r15, LO12(&got[n+3]) */
188#define PLT_ENTRY_WORD2 0x4a003c00 /* jr r15 */
189#define PLT_ENTRY_WORD3 0x45000000 /* movi r16, sizeof(RELA) * n */
190#define PLT_ENTRY_WORD4 0x48000000 /* j .plt0. */
191
192#define PLT_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[n+3]@GOT) */
193#define PLT_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[n+3]@GOT) */
194#define PLT_PIC_ENTRY_WORD2 0x38febc02 /* lw r15, [gp+r15] */
195#define PLT_PIC_ENTRY_WORD3 0x4a003c00 /* jr r15 */
196#define PLT_PIC_ENTRY_WORD4 0x45000000 /* movi r16, sizeof(RELA) * n */
197#define PLT_PIC_ENTRY_WORD5 0x48000000 /* j .plt0 */
198
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199/* These are macros used to get the relocation accurate value. */
200#define ACCURATE_8BIT_S1 (0x100)
201#define ACCURATE_U9BIT_S1 (0x400)
202#define ACCURATE_12BIT_S1 (0x2000)
203#define ACCURATE_14BIT_S1 (0x4000)
204#define ACCURATE_19BIT (0x40000)
205
206/* These are macros used to get the relocation conservative value. */
207#define CONSERVATIVE_8BIT_S1 (0x100 - 4)
208#define CONSERVATIVE_14BIT_S1 (0x4000 - 4)
209#define CONSERVATIVE_16BIT_S1 (0x10000 - 4)
210#define CONSERVATIVE_24BIT_S1 (0x1000000 - 4)
211/* These must be more conservative because the address may be in
212 different segment. */
213#define CONSERVATIVE_15BIT (0x4000 - 0x1000)
214#define CONSERVATIVE_15BIT_S1 (0x8000 - 0x1000)
215#define CONSERVATIVE_15BIT_S2 (0x10000 - 0x1000)
216#define CONSERVATIVE_19BIT (0x40000 - 0x1000)
217#define CONSERVATIVE_20BIT (0x80000 - 0x1000)
218
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219/* Size of small data/bss sections, used to calculate SDA_BASE. */
220static long got_size = 0;
221static int is_SDA_BASE_set = 0;
222static int is_ITB_BASE_set = 0;
223
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224/* Convert ELF-VER in eflags to string for debugging purpose. */
225static const char *const nds32_elfver_strtab[] =
226{
227 "ELF-1.2",
228 "ELF-1.3",
229 "ELF-1.4",
230};
231
232/* The nds32 linker needs to keep track of the number of relocs that it
233 decides to copy in check_relocs for each symbol. This is so that
234 it can discard PC relative relocs if it doesn't need them when
235 linking with -Bsymbolic. We store the information in a field
236 extending the regular ELF linker hash table. */
237
238/* This structure keeps track of the number of PC relative relocs we
239 have copied for a given symbol. */
240
241struct elf_nds32_pcrel_relocs_copied
242{
243 /* Next section. */
244 struct elf_nds32_pcrel_relocs_copied *next;
245 /* A section in dynobj. */
246 asection *section;
247 /* Number of relocs copied in this section. */
248 bfd_size_type count;
249};
250
251/* The sh linker needs to keep track of the number of relocs that it
252 decides to copy as dynamic relocs in check_relocs for each symbol.
253 This is so that it can later discard them if they are found to be
254 unnecessary. We store the information in a field extending the
255 regular ELF linker hash table. */
256
257struct elf_nds32_dyn_relocs
258{
259 struct elf_nds32_dyn_relocs *next;
260
261 /* The input section of the reloc. */
262 asection *sec;
263
264 /* Total number of relocs copied for the input section. */
265 bfd_size_type count;
266
267 /* Number of pc-relative relocs copied for the input section. */
268 bfd_size_type pc_count;
269};
270
271/* Nds32 ELF linker hash entry. */
272
273struct elf_nds32_link_hash_entry
274{
275 struct elf_link_hash_entry root;
276
277 /* Track dynamic relocs copied for this symbol. */
278 struct elf_nds32_dyn_relocs *dyn_relocs;
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279
280 /* For checking relocation type. */
281#define GOT_UNKNOWN 0
282#define GOT_NORMAL 1
283#define GOT_TLS_IE 2
284 unsigned int tls_type;
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285};
286
287/* Get the nds32 ELF linker hash table from a link_info structure. */
288
289#define FP_BASE_NAME "_FP_BASE_"
290static int check_start_export_sym = 0;
291static size_t ex9_relax_size = 0; /* Save ex9 predicted reducing size. */
292
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293/* The offset for executable tls relaxation. */
294#define TP_OFFSET 0x0
295
296struct elf_nds32_obj_tdata
297{
298 struct elf_obj_tdata root;
299
300 /* tls_type for each local got entry. */
301 char *local_got_tls_type;
302};
303
304#define elf_nds32_tdata(bfd) \
305 ((struct elf_nds32_obj_tdata *) (bfd)->tdata.any)
306
307#define elf32_nds32_local_got_tls_type(bfd) \
308 (elf_nds32_tdata (bfd)->local_got_tls_type)
309
310#define elf32_nds32_hash_entry(ent) ((struct elf_nds32_link_hash_entry *)(ent))
311
312static bfd_boolean
313nds32_elf_mkobject (bfd *abfd)
314{
315 return bfd_elf_allocate_object (abfd, sizeof (struct elf_nds32_obj_tdata),
316 NDS32_ELF_DATA);
317}
318
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319/* Relocations used for relocation. */
320static reloc_howto_type nds32_elf_howto_table[] =
321{
322 /* This reloc does nothing. */
323 HOWTO (R_NDS32_NONE, /* type */
324 0, /* rightshift */
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325 3, /* size (0 = byte, 1 = short, 2 = long) */
326 0, /* bitsize */
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327 FALSE, /* pc_relative */
328 0, /* bitpos */
6346d5ca 329 complain_overflow_dont, /* complain_on_overflow */
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330 bfd_elf_generic_reloc, /* special_function */
331 "R_NDS32_NONE", /* name */
332 FALSE, /* partial_inplace */
333 0, /* src_mask */
334 0, /* dst_mask */
335 FALSE), /* pcrel_offset */
336
337 /* A 16 bit absolute relocation. */
338 HOWTO (R_NDS32_16, /* type */
339 0, /* rightshift */
340 1, /* size (0 = byte, 1 = short, 2 = long) */
341 16, /* bitsize */
342 FALSE, /* pc_relative */
343 0, /* bitpos */
344 complain_overflow_bitfield, /* complain_on_overflow */
345 nds32_elf_generic_reloc, /* special_function */
346 "R_NDS32_16", /* name */
347 FALSE, /* partial_inplace */
348 0xffff, /* src_mask */
349 0xffff, /* dst_mask */
350 FALSE), /* pcrel_offset */
351
352 /* A 32 bit absolute relocation. */
353 HOWTO (R_NDS32_32, /* type */
354 0, /* rightshift */
355 2, /* size (0 = byte, 1 = short, 2 = long) */
356 32, /* bitsize */
357 FALSE, /* pc_relative */
358 0, /* bitpos */
359 complain_overflow_bitfield, /* complain_on_overflow */
360 nds32_elf_generic_reloc, /* special_function */
361 "R_NDS32_32", /* name */
362 FALSE, /* partial_inplace */
363 0xffffffff, /* src_mask */
364 0xffffffff, /* dst_mask */
365 FALSE), /* pcrel_offset */
366
367 /* A 20 bit address. */
368 HOWTO (R_NDS32_20, /* type */
369 0, /* rightshift */
370 2, /* size (0 = byte, 1 = short, 2 = long) */
371 20, /* bitsize */
372 FALSE, /* pc_relative */
373 0, /* bitpos */
374 complain_overflow_unsigned, /* complain_on_overflow */
375 nds32_elf_generic_reloc, /* special_function */
376 "R_NDS32_20", /* name */
377 FALSE, /* partial_inplace */
378 0xfffff, /* src_mask */
379 0xfffff, /* dst_mask */
380 FALSE), /* pcrel_offset */
381
382 /* An PC Relative 9-bit relocation, shifted by 2.
383 This reloc is complicated because relocations are relative to pc & -4.
384 i.e. branches in the right insn slot use the address of the left insn
385 slot for pc. */
386 /* ??? It's not clear whether this should have partial_inplace set or not.
387 Branch relaxing in the assembler can store the addend in the insn,
388 and if bfd_install_relocation gets called the addend may get added
389 again. */
390 HOWTO (R_NDS32_9_PCREL, /* type */
391 1, /* rightshift */
392 1, /* size (0 = byte, 1 = short, 2 = long) */
393 8, /* bitsize */
394 TRUE, /* pc_relative */
395 0, /* bitpos */
396 complain_overflow_signed, /* complain_on_overflow */
397 nds32_elf_9_pcrel_reloc, /* special_function */
398 "R_NDS32_9_PCREL", /* name */
399 FALSE, /* partial_inplace */
400 0xff, /* src_mask */
401 0xff, /* dst_mask */
402 TRUE), /* pcrel_offset */
403
404 /* A relative 15 bit relocation, right shifted by 1. */
405 HOWTO (R_NDS32_15_PCREL, /* type */
406 1, /* rightshift */
407 2, /* size (0 = byte, 1 = short, 2 = long) */
408 14, /* bitsize */
409 TRUE, /* pc_relative */
410 0, /* bitpos */
411 complain_overflow_signed, /* complain_on_overflow */
412 bfd_elf_generic_reloc, /* special_function */
413 "R_NDS32_15_PCREL", /* name */
414 FALSE, /* partial_inplace */
415 0x3fff, /* src_mask */
416 0x3fff, /* dst_mask */
417 TRUE), /* pcrel_offset */
418
419 /* A relative 17 bit relocation, right shifted by 1. */
420 HOWTO (R_NDS32_17_PCREL, /* type */
421 1, /* rightshift */
422 2, /* size (0 = byte, 1 = short, 2 = long) */
423 16, /* bitsize */
424 TRUE, /* pc_relative */
425 0, /* bitpos */
426 complain_overflow_signed, /* complain_on_overflow */
427 bfd_elf_generic_reloc, /* special_function */
428 "R_NDS32_17_PCREL", /* name */
429 FALSE, /* partial_inplace */
430 0xffff, /* src_mask */
431 0xffff, /* dst_mask */
432 TRUE), /* pcrel_offset */
433
434 /* A relative 25 bit relocation, right shifted by 1. */
435 /* ??? It's not clear whether this should have partial_inplace set or not.
436 Branch relaxing in the assembler can store the addend in the insn,
437 and if bfd_install_relocation gets called the addend may get added
438 again. */
439 HOWTO (R_NDS32_25_PCREL, /* type */
440 1, /* rightshift */
441 2, /* size (0 = byte, 1 = short, 2 = long) */
442 24, /* bitsize */
443 TRUE, /* pc_relative */
444 0, /* bitpos */
445 complain_overflow_signed, /* complain_on_overflow */
446 bfd_elf_generic_reloc, /* special_function */
447 "R_NDS32_25_PCREL", /* name */
448 FALSE, /* partial_inplace */
449 0xffffff, /* src_mask */
450 0xffffff, /* dst_mask */
451 TRUE), /* pcrel_offset */
452
453 /* High 20 bits of address when lower 12 is or'd in. */
454 HOWTO (R_NDS32_HI20, /* type */
455 12, /* rightshift */
456 2, /* size (0 = byte, 1 = short, 2 = long) */
457 20, /* bitsize */
458 FALSE, /* pc_relative */
459 0, /* bitpos */
460 complain_overflow_dont,/* complain_on_overflow */
461 nds32_elf_hi20_reloc, /* special_function */
462 "R_NDS32_HI20", /* name */
463 FALSE, /* partial_inplace */
464 0x000fffff, /* src_mask */
465 0x000fffff, /* dst_mask */
466 FALSE), /* pcrel_offset */
467
468 /* Lower 12 bits of address. */
469 HOWTO (R_NDS32_LO12S3, /* type */
470 3, /* rightshift */
471 2, /* size (0 = byte, 1 = short, 2 = long) */
472 9, /* bitsize */
473 FALSE, /* pc_relative */
474 0, /* bitpos */
475 complain_overflow_dont,/* complain_on_overflow */
476 nds32_elf_lo12_reloc, /* special_function */
477 "R_NDS32_LO12S3", /* name */
478 FALSE, /* partial_inplace */
479 0x000001ff, /* src_mask */
480 0x000001ff, /* dst_mask */
481 FALSE), /* pcrel_offset */
482
483 /* Lower 12 bits of address. */
484 HOWTO (R_NDS32_LO12S2, /* type */
485 2, /* rightshift */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
487 10, /* bitsize */
488 FALSE, /* pc_relative */
489 0, /* bitpos */
490 complain_overflow_dont,/* complain_on_overflow */
491 nds32_elf_lo12_reloc, /* special_function */
492 "R_NDS32_LO12S2", /* name */
493 FALSE, /* partial_inplace */
494 0x000003ff, /* src_mask */
495 0x000003ff, /* dst_mask */
496 FALSE), /* pcrel_offset */
497
498 /* Lower 12 bits of address. */
499 HOWTO (R_NDS32_LO12S1, /* type */
500 1, /* rightshift */
501 2, /* size (0 = byte, 1 = short, 2 = long) */
502 11, /* bitsize */
503 FALSE, /* pc_relative */
504 0, /* bitpos */
505 complain_overflow_dont,/* complain_on_overflow */
506 nds32_elf_lo12_reloc, /* special_function */
507 "R_NDS32_LO12S1", /* name */
508 FALSE, /* partial_inplace */
509 0x000007ff, /* src_mask */
510 0x000007ff, /* dst_mask */
511 FALSE), /* pcrel_offset */
512
513 /* Lower 12 bits of address. */
514 HOWTO (R_NDS32_LO12S0, /* type */
515 0, /* rightshift */
516 2, /* size (0 = byte, 1 = short, 2 = long) */
517 12, /* bitsize */
518 FALSE, /* pc_relative */
519 0, /* bitpos */
520 complain_overflow_dont,/* complain_on_overflow */
521 nds32_elf_lo12_reloc, /* special_function */
522 "R_NDS32_LO12S0", /* name */
523 FALSE, /* partial_inplace */
524 0x00000fff, /* src_mask */
525 0x00000fff, /* dst_mask */
526 FALSE), /* pcrel_offset */
527
528 /* Small data area 15 bits offset. */
529 HOWTO (R_NDS32_SDA15S3, /* type */
530 3, /* rightshift */
531 2, /* size (0 = byte, 1 = short, 2 = long) */
532 15, /* bitsize */
533 FALSE, /* pc_relative */
534 0, /* bitpos */
535 complain_overflow_signed, /* complain_on_overflow */
536 nds32_elf_sda15_reloc, /* special_function */
537 "R_NDS32_SDA15S3", /* name */
538 FALSE, /* partial_inplace */
539 0x00007fff, /* src_mask */
540 0x00007fff, /* dst_mask */
541 FALSE), /* pcrel_offset */
542
543 /* Small data area 15 bits offset. */
544 HOWTO (R_NDS32_SDA15S2, /* type */
545 2, /* rightshift */
546 2, /* size (0 = byte, 1 = short, 2 = long) */
547 15, /* bitsize */
548 FALSE, /* pc_relative */
549 0, /* bitpos */
550 complain_overflow_signed, /* complain_on_overflow */
551 nds32_elf_sda15_reloc, /* special_function */
552 "R_NDS32_SDA15S2", /* name */
553 FALSE, /* partial_inplace */
554 0x00007fff, /* src_mask */
555 0x00007fff, /* dst_mask */
556 FALSE), /* pcrel_offset */
557
558 /* Small data area 15 bits offset. */
559 HOWTO (R_NDS32_SDA15S1, /* type */
560 1, /* rightshift */
561 2, /* size (0 = byte, 1 = short, 2 = long) */
562 15, /* bitsize */
563 FALSE, /* pc_relative */
564 0, /* bitpos */
565 complain_overflow_signed, /* complain_on_overflow */
566 nds32_elf_sda15_reloc, /* special_function */
567 "R_NDS32_SDA15S1", /* name */
568 FALSE, /* partial_inplace */
569 0x00007fff, /* src_mask */
570 0x00007fff, /* dst_mask */
571 FALSE), /* pcrel_offset */
572
573 /* Small data area 15 bits offset. */
574 HOWTO (R_NDS32_SDA15S0, /* type */
575 0, /* rightshift */
576 2, /* size (0 = byte, 1 = short, 2 = long) */
577 15, /* bitsize */
578 FALSE, /* pc_relative */
579 0, /* bitpos */
580 complain_overflow_signed, /* complain_on_overflow */
581 nds32_elf_sda15_reloc, /* special_function */
582 "R_NDS32_SDA15S0", /* name */
583 FALSE, /* partial_inplace */
584 0x00007fff, /* src_mask */
585 0x00007fff, /* dst_mask */
586 FALSE), /* pcrel_offset */
587
588 /* GNU extension to record C++ vtable hierarchy */
589 HOWTO (R_NDS32_GNU_VTINHERIT, /* type */
590 0, /* rightshift */
591 2, /* size (0 = byte, 1 = short, 2 = long) */
592 0, /* bitsize */
593 FALSE, /* pc_relative */
594 0, /* bitpos */
595 complain_overflow_dont,/* complain_on_overflow */
596 NULL, /* special_function */
597 "R_NDS32_GNU_VTINHERIT", /* name */
598 FALSE, /* partial_inplace */
599 0, /* src_mask */
600 0, /* dst_mask */
601 FALSE), /* pcrel_offset */
602
603 /* GNU extension to record C++ vtable member usage */
604 HOWTO (R_NDS32_GNU_VTENTRY, /* type */
605 0, /* rightshift */
606 2, /* size (0 = byte, 1 = short, 2 = long) */
607 0, /* bitsize */
608 FALSE, /* pc_relative */
609 0, /* bitpos */
610 complain_overflow_dont,/* complain_on_overflow */
611 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
612 "R_NDS32_GNU_VTENTRY", /* name */
613 FALSE, /* partial_inplace */
614 0, /* src_mask */
615 0, /* dst_mask */
616 FALSE), /* pcrel_offset */
617
618 /* A 16 bit absolute relocation. */
619 HOWTO (R_NDS32_16_RELA, /* type */
620 0, /* rightshift */
621 1, /* size (0 = byte, 1 = short, 2 = long) */
622 16, /* bitsize */
623 FALSE, /* pc_relative */
624 0, /* bitpos */
625 complain_overflow_bitfield, /* complain_on_overflow */
626 bfd_elf_generic_reloc, /* special_function */
627 "R_NDS32_16_RELA", /* name */
628 FALSE, /* partial_inplace */
629 0xffff, /* src_mask */
630 0xffff, /* dst_mask */
631 FALSE), /* pcrel_offset */
632
633 /* A 32 bit absolute relocation. */
634 HOWTO (R_NDS32_32_RELA, /* type */
635 0, /* rightshift */
636 2, /* size (0 = byte, 1 = short, 2 = long) */
637 32, /* bitsize */
638 FALSE, /* pc_relative */
639 0, /* bitpos */
640 complain_overflow_bitfield, /* complain_on_overflow */
641 bfd_elf_generic_reloc, /* special_function */
642 "R_NDS32_32_RELA", /* name */
643 FALSE, /* partial_inplace */
644 0xffffffff, /* src_mask */
645 0xffffffff, /* dst_mask */
646 FALSE), /* pcrel_offset */
647
648 /* A 20 bit address. */
649 HOWTO (R_NDS32_20_RELA, /* type */
650 0, /* rightshift */
651 2, /* size (0 = byte, 1 = short, 2 = long) */
652 20, /* bitsize */
653 FALSE, /* pc_relative */
654 0, /* bitpos */
655 complain_overflow_signed, /* complain_on_overflow */
656 bfd_elf_generic_reloc, /* special_function */
657 "R_NDS32_20_RELA", /* name */
658 FALSE, /* partial_inplace */
659 0xfffff, /* src_mask */
660 0xfffff, /* dst_mask */
661 FALSE), /* pcrel_offset */
662
663 HOWTO (R_NDS32_9_PCREL_RELA, /* type */
664 1, /* rightshift */
665 1, /* size (0 = byte, 1 = short, 2 = long) */
666 8, /* bitsize */
667 TRUE, /* pc_relative */
668 0, /* bitpos */
669 complain_overflow_signed, /* complain_on_overflow */
670 bfd_elf_generic_reloc, /* special_function */
671 "R_NDS32_9_PCREL_RELA",/* name */
672 FALSE, /* partial_inplace */
673 0xff, /* src_mask */
674 0xff, /* dst_mask */
675 TRUE), /* pcrel_offset */
676
677 /* A relative 15 bit relocation, right shifted by 1. */
678 HOWTO (R_NDS32_15_PCREL_RELA, /* type */
679 1, /* rightshift */
680 2, /* size (0 = byte, 1 = short, 2 = long) */
681 14, /* bitsize */
682 TRUE, /* pc_relative */
683 0, /* bitpos */
684 complain_overflow_signed, /* complain_on_overflow */
685 bfd_elf_generic_reloc, /* special_function */
686 "R_NDS32_15_PCREL_RELA", /* name */
687 FALSE, /* partial_inplace */
688 0x3fff, /* src_mask */
689 0x3fff, /* dst_mask */
690 TRUE), /* pcrel_offset */
691
692 /* A relative 17 bit relocation, right shifted by 1. */
693 HOWTO (R_NDS32_17_PCREL_RELA, /* type */
694 1, /* rightshift */
695 2, /* size (0 = byte, 1 = short, 2 = long) */
696 16, /* bitsize */
697 TRUE, /* pc_relative */
698 0, /* bitpos */
699 complain_overflow_signed, /* complain_on_overflow */
700 bfd_elf_generic_reloc, /* special_function */
701 "R_NDS32_17_PCREL_RELA", /* name */
702 FALSE, /* partial_inplace */
703 0xffff, /* src_mask */
704 0xffff, /* dst_mask */
705 TRUE), /* pcrel_offset */
706
707 /* A relative 25 bit relocation, right shifted by 2. */
708 HOWTO (R_NDS32_25_PCREL_RELA, /* type */
709 1, /* rightshift */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
711 24, /* bitsize */
712 TRUE, /* pc_relative */
713 0, /* bitpos */
714 complain_overflow_signed, /* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_NDS32_25_PCREL_RELA", /* name */
717 FALSE, /* partial_inplace */
718 0xffffff, /* src_mask */
719 0xffffff, /* dst_mask */
720 TRUE), /* pcrel_offset */
721
722 /* High 20 bits of address when lower 16 is or'd in. */
723 HOWTO (R_NDS32_HI20_RELA, /* type */
724 12, /* rightshift */
725 2, /* size (0 = byte, 1 = short, 2 = long) */
726 20, /* bitsize */
727 FALSE, /* pc_relative */
728 0, /* bitpos */
729 complain_overflow_dont,/* complain_on_overflow */
730 bfd_elf_generic_reloc, /* special_function */
731 "R_NDS32_HI20_RELA", /* name */
732 FALSE, /* partial_inplace */
733 0x000fffff, /* src_mask */
734 0x000fffff, /* dst_mask */
735 FALSE), /* pcrel_offset */
736
737 /* Lower 12 bits of address. */
738 HOWTO (R_NDS32_LO12S3_RELA, /* type */
739 3, /* rightshift */
740 2, /* size (0 = byte, 1 = short, 2 = long) */
741 9, /* bitsize */
742 FALSE, /* pc_relative */
743 0, /* bitpos */
744 complain_overflow_dont,/* complain_on_overflow */
745 bfd_elf_generic_reloc, /* special_function */
746 "R_NDS32_LO12S3_RELA", /* name */
747 FALSE, /* partial_inplace */
748 0x000001ff, /* src_mask */
749 0x000001ff, /* dst_mask */
750 FALSE), /* pcrel_offset */
751
752 /* Lower 12 bits of address. */
753 HOWTO (R_NDS32_LO12S2_RELA, /* type */
754 2, /* rightshift */
755 2, /* size (0 = byte, 1 = short, 2 = long) */
756 10, /* bitsize */
757 FALSE, /* pc_relative */
758 0, /* bitpos */
759 complain_overflow_dont,/* complain_on_overflow */
760 bfd_elf_generic_reloc, /* special_function */
761 "R_NDS32_LO12S2_RELA", /* name */
762 FALSE, /* partial_inplace */
763 0x000003ff, /* src_mask */
764 0x000003ff, /* dst_mask */
765 FALSE), /* pcrel_offset */
766
767 /* Lower 12 bits of address. */
768 HOWTO (R_NDS32_LO12S1_RELA, /* type */
769 1, /* rightshift */
770 2, /* size (0 = byte, 1 = short, 2 = long) */
771 11, /* bitsize */
772 FALSE, /* pc_relative */
773 0, /* bitpos */
774 complain_overflow_dont,/* complain_on_overflow */
775 bfd_elf_generic_reloc, /* special_function */
776 "R_NDS32_LO12S1_RELA", /* name */
777 FALSE, /* partial_inplace */
778 0x000007ff, /* src_mask */
779 0x000007ff, /* dst_mask */
780 FALSE), /* pcrel_offset */
781
782 /* Lower 12 bits of address. */
783 HOWTO (R_NDS32_LO12S0_RELA, /* type */
784 0, /* rightshift */
785 2, /* size (0 = byte, 1 = short, 2 = long) */
786 12, /* bitsize */
787 FALSE, /* pc_relative */
788 0, /* bitpos */
789 complain_overflow_dont,/* complain_on_overflow */
790 bfd_elf_generic_reloc, /* special_function */
791 "R_NDS32_LO12S0_RELA", /* name */
792 FALSE, /* partial_inplace */
793 0x00000fff, /* src_mask */
794 0x00000fff, /* dst_mask */
795 FALSE), /* pcrel_offset */
796
797 /* Small data area 15 bits offset. */
798 HOWTO (R_NDS32_SDA15S3_RELA, /* type */
799 3, /* rightshift */
800 2, /* size (0 = byte, 1 = short, 2 = long) */
801 15, /* bitsize */
802 FALSE, /* pc_relative */
803 0, /* bitpos */
804 complain_overflow_signed, /* complain_on_overflow */
805 bfd_elf_generic_reloc, /* special_function */
806 "R_NDS32_SDA15S3_RELA",/* name */
807 FALSE, /* partial_inplace */
808 0x00007fff, /* src_mask */
809 0x00007fff, /* dst_mask */
810 FALSE), /* pcrel_offset */
811
812 /* Small data area 15 bits offset. */
813 HOWTO (R_NDS32_SDA15S2_RELA, /* type */
814 2, /* rightshift */
815 2, /* size (0 = byte, 1 = short, 2 = long) */
816 15, /* bitsize */
817 FALSE, /* pc_relative */
818 0, /* bitpos */
819 complain_overflow_signed, /* complain_on_overflow */
820 bfd_elf_generic_reloc, /* special_function */
821 "R_NDS32_SDA15S2_RELA",/* name */
822 FALSE, /* partial_inplace */
823 0x00007fff, /* src_mask */
824 0x00007fff, /* dst_mask */
825 FALSE), /* pcrel_offset */
826
827 HOWTO (R_NDS32_SDA15S1_RELA, /* type */
828 1, /* rightshift */
829 2, /* size (0 = byte, 1 = short, 2 = long) */
830 15, /* bitsize */
831 FALSE, /* pc_relative */
832 0, /* bitpos */
833 complain_overflow_signed, /* complain_on_overflow */
834 bfd_elf_generic_reloc, /* special_function */
835 "R_NDS32_SDA15S1_RELA",/* name */
836 FALSE, /* partial_inplace */
837 0x00007fff, /* src_mask */
838 0x00007fff, /* dst_mask */
839 FALSE), /* pcrel_offset */
840
841 HOWTO (R_NDS32_SDA15S0_RELA, /* type */
842 0, /* rightshift */
843 2, /* size (0 = byte, 1 = short, 2 = long) */
844 15, /* bitsize */
845 FALSE, /* pc_relative */
846 0, /* bitpos */
847 complain_overflow_signed, /* complain_on_overflow */
848 bfd_elf_generic_reloc, /* special_function */
849 "R_NDS32_SDA15S0_RELA",/* name */
850 FALSE, /* partial_inplace */
851 0x00007fff, /* src_mask */
852 0x00007fff, /* dst_mask */
853 FALSE), /* pcrel_offset */
854
855 /* GNU extension to record C++ vtable hierarchy */
856 HOWTO (R_NDS32_RELA_GNU_VTINHERIT, /* type */
857 0, /* rightshift */
858 2, /* size (0 = byte, 1 = short, 2 = long) */
859 0, /* bitsize */
860 FALSE, /* pc_relative */
861 0, /* bitpos */
862 complain_overflow_dont,/* complain_on_overflow */
863 NULL, /* special_function */
864 "R_NDS32_RELA_GNU_VTINHERIT", /* name */
865 FALSE, /* partial_inplace */
866 0, /* src_mask */
867 0, /* dst_mask */
868 FALSE), /* pcrel_offset */
869
870 /* GNU extension to record C++ vtable member usage */
871 HOWTO (R_NDS32_RELA_GNU_VTENTRY, /* type */
872 0, /* rightshift */
873 2, /* size (0 = byte, 1 = short, 2 = long) */
874 0, /* bitsize */
875 FALSE, /* pc_relative */
876 0, /* bitpos */
877 complain_overflow_dont,/* complain_on_overflow */
878 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
879 "R_NDS32_RELA_GNU_VTENTRY", /* name */
880 FALSE, /* partial_inplace */
881 0, /* src_mask */
882 0, /* dst_mask */
883 FALSE), /* pcrel_offset */
884
885 /* Like R_NDS32_20, but referring to the GOT table entry for
886 the symbol. */
887 HOWTO (R_NDS32_GOT20, /* type */
888 0, /* rightshift */
889 2, /* size (0 = byte, 1 = short, 2 = long) */
890 20, /* bitsize */
891 FALSE, /* pc_relative */
892 0, /* bitpos */
893 complain_overflow_signed, /* complain_on_overflow */
894 bfd_elf_generic_reloc, /* special_function */
895 "R_NDS32_GOT20", /* name */
896 FALSE, /* partial_inplace */
897 0xfffff, /* src_mask */
898 0xfffff, /* dst_mask */
899 FALSE), /* pcrel_offset */
900
901 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
902 entry for the symbol. */
903 HOWTO (R_NDS32_25_PLTREL, /* type */
904 1, /* rightshift */
905 2, /* size (0 = byte, 1 = short, 2 = long) */
906 24, /* bitsize */
907 TRUE, /* pc_relative */
908 0, /* bitpos */
909 complain_overflow_signed, /* complain_on_overflow */
910 bfd_elf_generic_reloc, /* special_function */
911 "R_NDS32_25_PLTREL", /* name */
912 FALSE, /* partial_inplace */
913 0xffffff, /* src_mask */
914 0xffffff, /* dst_mask */
915 TRUE), /* pcrel_offset */
916
917 /* This is used only by the dynamic linker. The symbol should exist
918 both in the object being run and in some shared library. The
919 dynamic linker copies the data addressed by the symbol from the
920 shared library into the object, because the object being
921 run has to have the data at some particular address. */
922 HOWTO (R_NDS32_COPY, /* type */
923 0, /* rightshift */
924 2, /* size (0 = byte, 1 = short, 2 = long) */
925 32, /* bitsize */
926 FALSE, /* pc_relative */
927 0, /* bitpos */
928 complain_overflow_bitfield, /* complain_on_overflow */
929 bfd_elf_generic_reloc, /* special_function */
930 "R_NDS32_COPY", /* name */
931 FALSE, /* partial_inplace */
932 0xffffffff, /* src_mask */
933 0xffffffff, /* dst_mask */
934 FALSE), /* pcrel_offset */
935
936 /* Like R_NDS32_20, but used when setting global offset table
937 entries. */
938 HOWTO (R_NDS32_GLOB_DAT, /* type */
939 0, /* rightshift */
940 2, /* size (0 = byte, 1 = short, 2 = long) */
941 32, /* bitsize */
942 FALSE, /* pc_relative */
943 0, /* bitpos */
944 complain_overflow_bitfield, /* complain_on_overflow */
945 bfd_elf_generic_reloc, /* special_function */
946 "R_NDS32_GLOB_DAT", /* name */
947 FALSE, /* partial_inplace */
948 0xffffffff, /* src_mask */
949 0xffffffff, /* dst_mask */
950 FALSE), /* pcrel_offset */
951
952 /* Marks a procedure linkage table entry for a symbol. */
953 HOWTO (R_NDS32_JMP_SLOT, /* type */
954 0, /* rightshift */
955 2, /* size (0 = byte, 1 = short, 2 = long) */
956 32, /* bitsize */
957 FALSE, /* pc_relative */
958 0, /* bitpos */
959 complain_overflow_bitfield, /* complain_on_overflow */
960 bfd_elf_generic_reloc, /* special_function */
961 "R_NDS32_JMP_SLOT", /* name */
962 FALSE, /* partial_inplace */
963 0xffffffff, /* src_mask */
964 0xffffffff, /* dst_mask */
965 FALSE), /* pcrel_offset */
966
967 /* Used only by the dynamic linker. When the object is run, this
968 longword is set to the load address of the object, plus the
969 addend. */
970 HOWTO (R_NDS32_RELATIVE, /* type */
971 0, /* rightshift */
972 2, /* size (0 = byte, 1 = short, 2 = long) */
973 32, /* bitsize */
974 FALSE, /* pc_relative */
975 0, /* bitpos */
976 complain_overflow_bitfield, /* complain_on_overflow */
977 bfd_elf_generic_reloc, /* special_function */
978 "R_NDS32_RELATIVE", /* name */
979 FALSE, /* partial_inplace */
980 0xffffffff, /* src_mask */
981 0xffffffff, /* dst_mask */
982 FALSE), /* pcrel_offset */
983
984 HOWTO (R_NDS32_GOTOFF, /* type */
985 0, /* rightshift */
986 2, /* size (0 = byte, 1 = short, 2 = long) */
987 20, /* bitsize */
988 FALSE, /* pc_relative */
989 0, /* bitpos */
990 complain_overflow_signed, /* complain_on_overflow */
991 bfd_elf_generic_reloc, /* special_function */
992 "R_NDS32_GOTOFF", /* name */
993 FALSE, /* partial_inplace */
994 0xfffff, /* src_mask */
995 0xfffff, /* dst_mask */
996 FALSE), /* pcrel_offset */
997
998 /* An PC Relative 20-bit relocation used when setting PIC offset
999 table register. */
1000 HOWTO (R_NDS32_GOTPC20, /* type */
1001 0, /* rightshift */
1002 2, /* size (0 = byte, 1 = short, 2 = long) */
1003 20, /* bitsize */
1004 TRUE, /* pc_relative */
1005 0, /* bitpos */
1006 complain_overflow_signed, /* complain_on_overflow */
1007 bfd_elf_generic_reloc, /* special_function */
1008 "R_NDS32_GOTPC20", /* name */
1009 FALSE, /* partial_inplace */
1010 0xfffff, /* src_mask */
1011 0xfffff, /* dst_mask */
1012 TRUE), /* pcrel_offset */
1013
1014 /* Like R_NDS32_HI20, but referring to the GOT table entry for
1015 the symbol. */
1016 HOWTO (R_NDS32_GOT_HI20, /* type */
1017 12, /* rightshift */
1018 2, /* size (0 = byte, 1 = short, 2 = long) */
1019 20, /* bitsize */
1020 FALSE, /* pc_relative */
1021 0, /* bitpos */
1022 complain_overflow_dont,/* complain_on_overflow */
1023 bfd_elf_generic_reloc, /* special_function */
1024 "R_NDS32_GOT_HI20", /* name */
1025 FALSE, /* partial_inplace */
1026 0x000fffff, /* src_mask */
1027 0x000fffff, /* dst_mask */
1028 FALSE), /* pcrel_offset */
1029 HOWTO (R_NDS32_GOT_LO12, /* type */
1030 0, /* rightshift */
1031 2, /* size (0 = byte, 1 = short, 2 = long) */
1032 12, /* bitsize */
1033 FALSE, /* pc_relative */
1034 0, /* bitpos */
1035 complain_overflow_dont,/* complain_on_overflow */
1036 bfd_elf_generic_reloc, /* special_function */
1037 "R_NDS32_GOT_LO12", /* name */
1038 FALSE, /* partial_inplace */
1039 0x00000fff, /* src_mask */
1040 0x00000fff, /* dst_mask */
1041 FALSE), /* pcrel_offset */
1042
1043 /* An PC Relative relocation used when setting PIC offset table register.
1044 Like R_NDS32_HI20, but referring to the GOT table entry for
1045 the symbol. */
1046 HOWTO (R_NDS32_GOTPC_HI20, /* type */
1047 12, /* rightshift */
1048 2, /* size (0 = byte, 1 = short, 2 = long) */
1049 20, /* bitsize */
1050 FALSE, /* pc_relative */
1051 0, /* bitpos */
1052 complain_overflow_dont,/* complain_on_overflow */
1053 bfd_elf_generic_reloc, /* special_function */
1054 "R_NDS32_GOTPC_HI20", /* name */
1055 FALSE, /* partial_inplace */
1056 0x000fffff, /* src_mask */
1057 0x000fffff, /* dst_mask */
1058 TRUE), /* pcrel_offset */
1059 HOWTO (R_NDS32_GOTPC_LO12, /* type */
1060 0, /* rightshift */
1061 2, /* size (0 = byte, 1 = short, 2 = long) */
1062 12, /* bitsize */
1063 FALSE, /* pc_relative */
1064 0, /* bitpos */
1065 complain_overflow_dont, /* complain_on_overflow */
1066 bfd_elf_generic_reloc, /* special_function */
1067 "R_NDS32_GOTPC_LO12", /* name */
1068 FALSE, /* partial_inplace */
1069 0x00000fff, /* src_mask */
1070 0x00000fff, /* dst_mask */
1071 TRUE), /* pcrel_offset */
1072
1073 HOWTO (R_NDS32_GOTOFF_HI20, /* type */
1074 12, /* rightshift */
1075 2, /* size (0 = byte, 1 = short, 2 = long) */
1076 20, /* bitsize */
1077 FALSE, /* pc_relative */
1078 0, /* bitpos */
1079 complain_overflow_dont,/* complain_on_overflow */
1080 bfd_elf_generic_reloc, /* special_function */
1081 "R_NDS32_GOTOFF_HI20", /* name */
1082 FALSE, /* partial_inplace */
1083 0x000fffff, /* src_mask */
1084 0x000fffff, /* dst_mask */
1085 FALSE), /* pcrel_offset */
1086 HOWTO (R_NDS32_GOTOFF_LO12, /* type */
1087 0, /* rightshift */
1088 2, /* size (0 = byte, 1 = short, 2 = long) */
1089 12, /* bitsize */
1090 FALSE, /* pc_relative */
1091 0, /* bitpos */
1092 complain_overflow_dont,/* complain_on_overflow */
1093 bfd_elf_generic_reloc, /* special_function */
1094 "R_NDS32_GOTOFF_LO12", /* name */
1095 FALSE, /* partial_inplace */
1096 0x00000fff, /* src_mask */
1097 0x00000fff, /* dst_mask */
1098 FALSE), /* pcrel_offset */
1099
1100 /* Alignment hint for relaxable instruction. This is used with
1101 R_NDS32_LABEL as a pair. Relax this instruction from 4 bytes to 2
1102 in order to make next label aligned on word boundary. */
1103 HOWTO (R_NDS32_INSN16, /* type */
1104 0, /* rightshift */
1105 2, /* size (0 = byte, 1 = short, 2 = long) */
1106 32, /* bitsize */
1107 FALSE, /* pc_relative */
1108 0, /* bitpos */
1109 complain_overflow_dont,/* complain_on_overflow */
1110 nds32_elf_ignore_reloc,/* special_function */
1111 "R_NDS32_INSN16", /* name */
1112 FALSE, /* partial_inplace */
1113 0x00000fff, /* src_mask */
1114 0x00000fff, /* dst_mask */
1115 FALSE), /* pcrel_offset */
1116
1117 /* Alignment hint for label. */
1118 HOWTO (R_NDS32_LABEL, /* type */
1119 0, /* rightshift */
1120 2, /* size (0 = byte, 1 = short, 2 = long) */
1121 32, /* bitsize */
1122 FALSE, /* pc_relative */
1123 0, /* bitpos */
1124 complain_overflow_dont,/* complain_on_overflow */
1125 nds32_elf_ignore_reloc,/* special_function */
1126 "R_NDS32_LABEL", /* name */
1127 FALSE, /* partial_inplace */
1128 0xffffffff, /* src_mask */
1129 0xffffffff, /* dst_mask */
1130 FALSE), /* pcrel_offset */
1131
1132 /* Relax hint for unconditional call sequence */
1133 HOWTO (R_NDS32_LONGCALL1, /* type */
1134 0, /* rightshift */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1136 32, /* bitsize */
1137 FALSE, /* pc_relative */
1138 0, /* bitpos */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 nds32_elf_ignore_reloc,/* special_function */
1141 "R_NDS32_LONGCALL1", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 FALSE), /* pcrel_offset */
1146
1147 /* Relax hint for conditional call sequence. */
1148 HOWTO (R_NDS32_LONGCALL2, /* type */
1149 0, /* rightshift */
1150 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 32, /* bitsize */
1152 FALSE, /* pc_relative */
1153 0, /* bitpos */
1154 complain_overflow_dont,/* complain_on_overflow */
1155 nds32_elf_ignore_reloc,/* special_function */
1156 "R_NDS32_LONGCALL2", /* name */
1157 FALSE, /* partial_inplace */
1158 0xffffffff, /* src_mask */
1159 0xffffffff, /* dst_mask */
1160 FALSE), /* pcrel_offset */
1161
1162 /* Relax hint for conditional call sequence. */
1163 HOWTO (R_NDS32_LONGCALL3, /* type */
1164 0, /* rightshift */
1165 2, /* size (0 = byte, 1 = short, 2 = long) */
1166 32, /* bitsize */
1167 FALSE, /* pc_relative */
1168 0, /* bitpos */
1169 complain_overflow_dont,/* complain_on_overflow */
1170 nds32_elf_ignore_reloc,/* special_function */
1171 "R_NDS32_LONGCALL3", /* name */
1172 FALSE, /* partial_inplace */
1173 0xffffffff, /* src_mask */
1174 0xffffffff, /* dst_mask */
1175 FALSE), /* pcrel_offset */
1176
1177 /* Relax hint for unconditional branch sequence. */
1178 HOWTO (R_NDS32_LONGJUMP1, /* type */
1179 0, /* rightshift */
1180 2, /* size (0 = byte, 1 = short, 2 = long) */
1181 32, /* bitsize */
1182 FALSE, /* pc_relative */
1183 0, /* bitpos */
1184 complain_overflow_dont,/* complain_on_overflow */
1185 nds32_elf_ignore_reloc,/* special_function */
1186 "R_NDS32_LONGJUMP1", /* name */
1187 FALSE, /* partial_inplace */
1188 0xffffffff, /* src_mask */
1189 0xffffffff, /* dst_mask */
1190 FALSE), /* pcrel_offset */
1191
1192 /* Relax hint for conditional branch sequence. */
1193 HOWTO (R_NDS32_LONGJUMP2, /* type */
1194 0, /* rightshift */
1195 2, /* size (0 = byte, 1 = short, 2 = long) */
1196 32, /* bitsize */
1197 FALSE, /* pc_relative */
1198 0, /* bitpos */
1199 complain_overflow_dont,/* complain_on_overflow */
1200 nds32_elf_ignore_reloc,/* special_function */
1201 "R_NDS32_LONGJUMP2", /* name */
1202 FALSE, /* partial_inplace */
1203 0xffffffff, /* src_mask */
1204 0xffffffff, /* dst_mask */
1205 FALSE), /* pcrel_offset */
1206
1207 /* Relax hint for conditional branch sequence. */
1208 HOWTO (R_NDS32_LONGJUMP3, /* type */
1209 0, /* rightshift */
1210 2, /* size (0 = byte, 1 = short, 2 = long) */
1211 32, /* bitsize */
1212 FALSE, /* pc_relative */
1213 0, /* bitpos */
1214 complain_overflow_dont,/* complain_on_overflow */
1215 nds32_elf_ignore_reloc,/* special_function */
1216 "R_NDS32_LONGJUMP3", /* name */
1217 FALSE, /* partial_inplace */
1218 0xffffffff, /* src_mask */
1219 0xffffffff, /* dst_mask */
1220 FALSE), /* pcrel_offset */
1221
1222 /* Relax hint for load/store sequence. */
1223 HOWTO (R_NDS32_LOADSTORE, /* type */
1224 0, /* rightshift */
1225 2, /* size (0 = byte, 1 = short, 2 = long) */
1226 32, /* bitsize */
1227 FALSE, /* pc_relative */
1228 0, /* bitpos */
1229 complain_overflow_dont,/* complain_on_overflow */
1230 nds32_elf_ignore_reloc,/* special_function */
1231 "R_NDS32_LOADSTORE", /* name */
1232 FALSE, /* partial_inplace */
1233 0xffffffff, /* src_mask */
1234 0xffffffff, /* dst_mask */
1235 FALSE), /* pcrel_offset */
1236
1237 /* Relax hint for load/store sequence. */
1238 HOWTO (R_NDS32_9_FIXED_RELA, /* type */
1239 0, /* rightshift */
1240 1, /* size (0 = byte, 1 = short, 2 = long) */
1241 16, /* bitsize */
1242 FALSE, /* pc_relative */
1243 0, /* bitpos */
1244 complain_overflow_dont,/* complain_on_overflow */
1245 nds32_elf_ignore_reloc,/* special_function */
1246 "R_NDS32_9_FIXED_RELA",/* name */
1247 FALSE, /* partial_inplace */
1248 0x000000ff, /* src_mask */
1249 0x000000ff, /* dst_mask */
1250 FALSE), /* pcrel_offset */
1251
1252 /* Relax hint for load/store sequence. */
1253 HOWTO (R_NDS32_15_FIXED_RELA, /* type */
1254 0, /* rightshift */
1255 2, /* size (0 = byte, 1 = short, 2 = long) */
1256 32, /* bitsize */
1257 FALSE, /* pc_relative */
1258 0, /* bitpos */
1259 complain_overflow_dont,/* complain_on_overflow */
1260 nds32_elf_ignore_reloc,/* special_function */
1261 "R_NDS32_15_FIXED_RELA", /* name */
1262 FALSE, /* partial_inplace */
1263 0x00003fff, /* src_mask */
1264 0x00003fff, /* dst_mask */
1265 FALSE), /* pcrel_offset */
1266
1267 /* Relax hint for load/store sequence. */
1268 HOWTO (R_NDS32_17_FIXED_RELA, /* type */
1269 0, /* rightshift */
1270 2, /* size (0 = byte, 1 = short, 2 = long) */
1271 32, /* bitsize */
1272 FALSE, /* pc_relative */
1273 0, /* bitpos */
1274 complain_overflow_dont,/* complain_on_overflow */
1275 nds32_elf_ignore_reloc,/* special_function */
1276 "R_NDS32_17_FIXED_RELA", /* name */
1277 FALSE, /* partial_inplace */
1278 0x0000ffff, /* src_mask */
1279 0x0000ffff, /* dst_mask */
1280 FALSE), /* pcrel_offset */
1281
1282 /* Relax hint for load/store sequence. */
1283 HOWTO (R_NDS32_25_FIXED_RELA, /* type */
1284 0, /* rightshift */
1285 2, /* size (0 = byte, 1 = short, 2 = long) */
1286 32, /* bitsize */
1287 FALSE, /* pc_relative */
1288 0, /* bitpos */
1289 complain_overflow_dont,/* complain_on_overflow */
1290 nds32_elf_ignore_reloc,/* special_function */
1291 "R_NDS32_25_FIXED_RELA", /* name */
1292 FALSE, /* partial_inplace */
1293 0x00ffffff, /* src_mask */
1294 0x00ffffff, /* dst_mask */
1295 FALSE), /* pcrel_offset */
1296
1297 /* High 20 bits of PLT symbol offset relative to PC. */
1298 HOWTO (R_NDS32_PLTREL_HI20, /* type */
1299 12, /* rightshift */
1300 2, /* size (0 = byte, 1 = short, 2 = long) */
1301 20, /* bitsize */
1302 FALSE, /* pc_relative */
1303 0, /* bitpos */
1304 complain_overflow_dont,/* complain_on_overflow */
1305 bfd_elf_generic_reloc, /* special_function */
1306 "R_NDS32_PLTREL_HI20", /* name */
1307 FALSE, /* partial_inplace */
1308 0x000fffff, /* src_mask */
1309 0x000fffff, /* dst_mask */
1310 FALSE), /* pcrel_offset */
1311
1312 /* Low 12 bits of PLT symbol offset relative to PC. */
1313 HOWTO (R_NDS32_PLTREL_LO12, /* type */
1314 0, /* rightshift */
1315 2, /* size (0 = byte, 1 = short, 2 = long) */
1316 12, /* bitsize */
1317 FALSE, /* pc_relative */
1318 0, /* bitpos */
1319 complain_overflow_dont,/* complain_on_overflow */
1320 bfd_elf_generic_reloc, /* special_function */
1321 "R_NDS32_PLTREL_LO12", /* name */
1322 FALSE, /* partial_inplace */
1323 0x00000fff, /* src_mask */
1324 0x00000fff, /* dst_mask */
1325 FALSE), /* pcrel_offset */
1326
1327 /* High 20 bits of PLT symbol offset relative to GOT (GP). */
1328 HOWTO (R_NDS32_PLT_GOTREL_HI20, /* type */
1329 12, /* rightshift */
1330 2, /* size (0 = byte, 1 = short, 2 = long) */
1331 20, /* bitsize */
1332 FALSE, /* pc_relative */
1333 0, /* bitpos */
1334 complain_overflow_dont,/* complain_on_overflow */
1335 bfd_elf_generic_reloc, /* special_function */
1336 "R_NDS32_PLT_GOTREL_HI20", /* name */
1337 FALSE, /* partial_inplace */
1338 0x000fffff, /* src_mask */
1339 0x000fffff, /* dst_mask */
1340 FALSE), /* pcrel_offset */
1341
1342 /* Low 12 bits of PLT symbol offset relative to GOT (GP). */
1343 HOWTO (R_NDS32_PLT_GOTREL_LO12, /* type */
1344 0, /* rightshift */
1345 2, /* size (0 = byte, 1 = short, 2 = long) */
1346 12, /* bitsize */
1347 FALSE, /* pc_relative */
1348 0, /* bitpos */
1349 complain_overflow_dont,/* complain_on_overflow */
1350 bfd_elf_generic_reloc, /* special_function */
1351 "R_NDS32_PLT_GOTREL_LO12", /* name */
1352 FALSE, /* partial_inplace */
1353 0x00000fff, /* src_mask */
1354 0x00000fff, /* dst_mask */
1355 FALSE), /* pcrel_offset */
1356
1357 /* Small data area 12 bits offset. */
1358 HOWTO (R_NDS32_SDA12S2_DP_RELA, /* type */
1359 2, /* rightshift */
1360 2, /* size (0 = byte, 1 = short, 2 = long) */
1361 12, /* bitsize */
1362 FALSE, /* pc_relative */
1363 0, /* bitpos */
1364 complain_overflow_signed, /* complain_on_overflow */
1365 bfd_elf_generic_reloc, /* special_function */
1366 "R_NDS32_SDA12S2_DP_RELA", /* name */
1367 FALSE, /* partial_inplace */
1368 0x00000fff, /* src_mask */
1369 0x00000fff, /* dst_mask */
1370 FALSE), /* pcrel_offset */
1371
1372 /* Small data area 12 bits offset. */
1373 HOWTO (R_NDS32_SDA12S2_SP_RELA, /* type */
1374 2, /* rightshift */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 12, /* bitsize */
1377 FALSE, /* pc_relative */
1378 0, /* bitpos */
1379 complain_overflow_signed, /* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_NDS32_SDA12S2_SP_RELA", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00000fff, /* src_mask */
1384 0x00000fff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1386 /* Lower 12 bits of address. */
1387
1388 HOWTO (R_NDS32_LO12S2_DP_RELA, /* type */
1389 2, /* rightshift */
1390 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 10, /* bitsize */
1392 FALSE, /* pc_relative */
1393 0, /* bitpos */
1394 complain_overflow_dont,/* complain_on_overflow */
1395 bfd_elf_generic_reloc, /* special_function */
1396 "R_NDS32_LO12S2_DP_RELA", /* name */
1397 FALSE, /* partial_inplace */
1398 0x000003ff, /* src_mask */
1399 0x000003ff, /* dst_mask */
1400 FALSE), /* pcrel_offset */
1401
1402 /* Lower 12 bits of address. */
1403 HOWTO (R_NDS32_LO12S2_SP_RELA,/* type */
1404 2, /* rightshift */
1405 2, /* size (0 = byte, 1 = short, 2 = long) */
1406 10, /* bitsize */
1407 FALSE, /* pc_relative */
1408 0, /* bitpos */
1409 complain_overflow_dont,/* complain_on_overflow */
1410 bfd_elf_generic_reloc, /* special_function */
1411 "R_NDS32_LO12S2_SP_RELA", /* name */
1412 FALSE, /* partial_inplace */
1413 0x000003ff, /* src_mask */
1414 0x000003ff, /* dst_mask */
1415 FALSE), /* pcrel_offset */
1416 /* Lower 12 bits of address. Special identity for or case. */
1417 HOWTO (R_NDS32_LO12S0_ORI_RELA, /* type */
1418 0, /* rightshift */
1419 2, /* size (0 = byte, 1 = short, 2 = long) */
1420 12, /* bitsize */
1421 FALSE, /* pc_relative */
1422 0, /* bitpos */
1423 complain_overflow_dont,/* complain_on_overflow */
1424 bfd_elf_generic_reloc, /* special_function */
1425 "R_NDS32_LO12S0_ORI_RELA", /* name */
1426 FALSE, /* partial_inplace */
1427 0x00000fff, /* src_mask */
1428 0x00000fff, /* dst_mask */
1429 FALSE), /* pcrel_offset */
1430 /* Small data area 19 bits offset. */
1431 HOWTO (R_NDS32_SDA16S3_RELA, /* type */
1432 3, /* rightshift */
1433 2, /* size (0 = byte, 1 = short, 2 = long) */
1434 16, /* bitsize */
1435 FALSE, /* pc_relative */
1436 0, /* bitpos */
1437 complain_overflow_signed, /* complain_on_overflow */
1438 bfd_elf_generic_reloc, /* special_function */
1439 "R_NDS32_SDA16S3_RELA",/* name */
1440 FALSE, /* partial_inplace */
1441 0x0000ffff, /* src_mask */
1442 0x0000ffff, /* dst_mask */
1443 FALSE), /* pcrel_offset */
1444
1445 /* Small data area 15 bits offset. */
1446 HOWTO (R_NDS32_SDA17S2_RELA, /* type */
1447 2, /* rightshift */
1448 2, /* size (0 = byte, 1 = short, 2 = long) */
1449 17, /* bitsize */
1450 FALSE, /* pc_relative */
1451 0, /* bitpos */
1452 complain_overflow_signed, /* complain_on_overflow */
1453 bfd_elf_generic_reloc, /* special_function */
1454 "R_NDS32_SDA17S2_RELA",/* name */
1455 FALSE, /* partial_inplace */
1456 0x0001ffff, /* src_mask */
1457 0x0001ffff, /* dst_mask */
1458 FALSE), /* pcrel_offset */
1459
1460 HOWTO (R_NDS32_SDA18S1_RELA, /* type */
1461 1, /* rightshift */
1462 2, /* size (0 = byte, 1 = short, 2 = long) */
1463 18, /* bitsize */
1464 FALSE, /* pc_relative */
1465 0, /* bitpos */
1466 complain_overflow_signed, /* complain_on_overflow */
1467 bfd_elf_generic_reloc, /* special_function */
1468 "R_NDS32_SDA18S1_RELA",/* name */
1469 FALSE, /* partial_inplace */
1470 0x0003ffff, /* src_mask */
1471 0x0003ffff, /* dst_mask */
1472 FALSE), /* pcrel_offset */
1473
1474 HOWTO (R_NDS32_SDA19S0_RELA, /* type */
1475 0, /* rightshift */
1476 2, /* size (0 = byte, 1 = short, 2 = long) */
1477 19, /* bitsize */
1478 FALSE, /* pc_relative */
1479 0, /* bitpos */
1480 complain_overflow_signed, /* complain_on_overflow */
1481 bfd_elf_generic_reloc, /* special_function */
1482 "R_NDS32_SDA19S0_RELA",/* name */
1483 FALSE, /* partial_inplace */
1484 0x0007ffff, /* src_mask */
1485 0x0007ffff, /* dst_mask */
1486 FALSE), /* pcrel_offset */
1487 HOWTO (R_NDS32_DWARF2_OP1_RELA, /* type */
1488 0, /* rightshift */
1489 0, /* size (0 = byte, 1 = short, 2 = long) */
1490 8, /* bitsize */
1491 FALSE, /* pc_relative */
1492 0, /* bitpos */
1493 complain_overflow_dont,/* complain_on_overflow */
1494 nds32_elf_ignore_reloc,/* special_function */
1495 "R_NDS32_DWARF2_OP1_RELA", /* name */
1496 FALSE, /* partial_inplace */
1497 0xff, /* src_mask */
1498 0xff, /* dst_mask */
1499 FALSE), /* pcrel_offset */
1500 HOWTO (R_NDS32_DWARF2_OP2_RELA, /* type */
1501 0, /* rightshift */
1502 1, /* size (0 = byte, 1 = short, 2 = long) */
1503 16, /* bitsize */
1504 FALSE, /* pc_relative */
1505 0, /* bitpos */
1506 complain_overflow_dont,/* complain_on_overflow */
1507 nds32_elf_ignore_reloc,/* special_function */
1508 "R_NDS32_DWARF2_OP2_RELA", /* name */
1509 FALSE, /* partial_inplace */
1510 0xffff, /* src_mask */
1511 0xffff, /* dst_mask */
1512 FALSE), /* pcrel_offset */
1513 HOWTO (R_NDS32_DWARF2_LEB_RELA, /* type */
1514 0, /* rightshift */
1515 2, /* size (0 = byte, 1 = short, 2 = long) */
1516 32, /* bitsize */
1517 FALSE, /* pc_relative */
1518 0, /* bitpos */
1519 complain_overflow_dont,/* complain_on_overflow */
1520 nds32_elf_ignore_reloc,/* special_function */
1521 "R_NDS32_DWARF2_LEB_RELA", /* name */
1522 FALSE, /* partial_inplace */
1523 0xffffffff, /* src_mask */
1524 0xffffffff, /* dst_mask */
1525 FALSE), /* pcrel_offset */
1526 HOWTO (R_NDS32_UPDATE_TA_RELA,/* type */
1527 0, /* rightshift */
1528 1, /* size (0 = byte, 1 = short, 2 = long) */
1529 16, /* bitsize */
1530 FALSE, /* pc_relative */
1531 0, /* bitpos */
1532 complain_overflow_dont,/* complain_on_overflow */
1533 nds32_elf_ignore_reloc,/* special_function */
1534 "R_NDS32_UPDATE_TA_RELA", /* name */
1535 FALSE, /* partial_inplace */
1536 0xffff, /* src_mask */
1537 0xffff, /* dst_mask */
1538 FALSE), /* pcrel_offset */
1539 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
1540 entry for the symbol. */
1541 HOWTO (R_NDS32_9_PLTREL, /* type */
1542 1, /* rightshift */
1543 1, /* size (0 = byte, 1 = short, 2 = long) */
1544 8, /* bitsize */
1545 TRUE, /* pc_relative */
1546 0, /* bitpos */
1547 complain_overflow_signed, /* complain_on_overflow */
1548 bfd_elf_generic_reloc, /* special_function */
1549 "R_NDS32_9_PLTREL", /* name */
1550 FALSE, /* partial_inplace */
1551 0xff, /* src_mask */
1552 0xff, /* dst_mask */
1553 TRUE), /* pcrel_offset */
1554 /* Low 20 bits of PLT symbol offset relative to GOT (GP). */
1555 HOWTO (R_NDS32_PLT_GOTREL_LO20, /* type */
1556 0, /* rightshift */
1557 2, /* size (0 = byte, 1 = short, 2 = long) */
1558 20, /* bitsize */
1559 FALSE, /* pc_relative */
1560 0, /* bitpos */
1561 complain_overflow_dont,/* complain_on_overflow */
1562 bfd_elf_generic_reloc, /* special_function */
1563 "R_NDS32_PLT_GOTREL_LO20", /* name */
1564 FALSE, /* partial_inplace */
1565 0x000fffff, /* src_mask */
1566 0x000fffff, /* dst_mask */
1567 FALSE), /* pcrel_offset */
1568 /* low 15 bits of PLT symbol offset relative to GOT (GP) */
1569 HOWTO (R_NDS32_PLT_GOTREL_LO15, /* type */
1570 0, /* rightshift */
1571 2, /* size (0 = byte, 1 = short, 2 = long) */
1572 15, /* bitsize */
1573 FALSE, /* pc_relative */
1574 0, /* bitpos */
1575 complain_overflow_dont,/* complain_on_overflow */
1576 bfd_elf_generic_reloc, /* special_function */
1577 "R_NDS32_PLT_GOTREL_LO15", /* name */
1578 FALSE, /* partial_inplace */
1579 0x00007fff, /* src_mask */
1580 0x00007fff, /* dst_mask */
1581 FALSE), /* pcrel_offset */
1582 /* Low 19 bits of PLT symbol offset relative to GOT (GP). */
1583 HOWTO (R_NDS32_PLT_GOTREL_LO19, /* type */
1584 0, /* rightshift */
1585 2, /* size (0 = byte, 1 = short, 2 = long) */
1586 19, /* bitsize */
1587 FALSE, /* pc_relative */
1588 0, /* bitpos */
1589 complain_overflow_dont,/* complain_on_overflow */
1590 bfd_elf_generic_reloc, /* special_function */
1591 "R_NDS32_PLT_GOTREL_LO19", /* name */
1592 FALSE, /* partial_inplace */
1593 0x0007ffff, /* src_mask */
1594 0x0007ffff, /* dst_mask */
1595 FALSE), /* pcrel_offset */
1596 HOWTO (R_NDS32_GOT_LO15, /* type */
1597 0, /* rightshift */
1598 2, /* size (0 = byte, 1 = short, 2 = long) */
1599 15, /* bitsize */
1600 FALSE, /* pc_relative */
1601 0, /* bitpos */
1602 complain_overflow_dont,/* complain_on_overflow */
1603 bfd_elf_generic_reloc, /* special_function */
1604 "R_NDS32_GOT_LO15", /* name */
1605 FALSE, /* partial_inplace */
1606 0x00007fff, /* src_mask */
1607 0x00007fff, /* dst_mask */
1608 FALSE), /* pcrel_offset */
1609 HOWTO (R_NDS32_GOT_LO19, /* type */
1610 0, /* rightshift */
1611 2, /* size (0 = byte, 1 = short, 2 = long) */
1612 19, /* bitsize */
1613 FALSE, /* pc_relative */
1614 0, /* bitpos */
1615 complain_overflow_dont,/* complain_on_overflow */
1616 bfd_elf_generic_reloc, /* special_function */
1617 "R_NDS32_GOT_LO19", /* name */
1618 FALSE, /* partial_inplace */
1619 0x0007ffff, /* src_mask */
1620 0x0007ffff, /* dst_mask */
1621 FALSE), /* pcrel_offset */
1622 HOWTO (R_NDS32_GOTOFF_LO15, /* type */
1623 0, /* rightshift */
1624 2, /* size (0 = byte, 1 = short, 2 = long) */
1625 15, /* bitsize */
1626 FALSE, /* pc_relative */
1627 0, /* bitpos */
1628 complain_overflow_dont,/* complain_on_overflow */
1629 bfd_elf_generic_reloc, /* special_function */
1630 "R_NDS32_GOTOFF_LO15", /* name */
1631 FALSE, /* partial_inplace */
1632 0x00007fff, /* src_mask */
1633 0x00007fff, /* dst_mask */
1634 FALSE), /* pcrel_offset */
1635 HOWTO (R_NDS32_GOTOFF_LO19, /* type */
1636 0, /* rightshift */
1637 2, /* size (0 = byte, 1 = short, 2 = long) */
1638 19, /* bitsize */
1639 FALSE, /* pc_relative */
1640 0, /* bitpos */
1641 complain_overflow_dont,/* complain_on_overflow */
1642 bfd_elf_generic_reloc, /* special_function */
1643 "R_NDS32_GOTOFF_LO19", /* name */
1644 FALSE, /* partial_inplace */
1645 0x0007ffff, /* src_mask */
1646 0x0007ffff, /* dst_mask */
1647 FALSE), /* pcrel_offset */
1648 /* GOT 15 bits offset. */
1649 HOWTO (R_NDS32_GOT15S2_RELA, /* type */
1650 2, /* rightshift */
1651 2, /* size (0 = byte, 1 = short, 2 = long) */
1652 15, /* bitsize */
1653 FALSE, /* pc_relative */
1654 0, /* bitpos */
1655 complain_overflow_signed, /* complain_on_overflow */
1656 bfd_elf_generic_reloc, /* special_function */
1657 "R_NDS32_GOT15S2_RELA",/* name */
1658 FALSE, /* partial_inplace */
1659 0x00007fff, /* src_mask */
1660 0x00007fff, /* dst_mask */
1661 FALSE), /* pcrel_offset */
1662 /* GOT 17 bits offset. */
1663 HOWTO (R_NDS32_GOT17S2_RELA, /* type */
1664 2, /* rightshift */
1665 2, /* size (0 = byte, 1 = short, 2 = long) */
1666 17, /* bitsize */
1667 FALSE, /* pc_relative */
1668 0, /* bitpos */
1669 complain_overflow_signed, /* complain_on_overflow */
1670 bfd_elf_generic_reloc, /* special_function */
1671 "R_NDS32_GOT17S2_RELA",/* name */
1672 FALSE, /* partial_inplace */
1673 0x0001ffff, /* src_mask */
1674 0x0001ffff, /* dst_mask */
1675 FALSE), /* pcrel_offset */
1676 /* A 5 bit address. */
1677 HOWTO (R_NDS32_5_RELA, /* type */
1678 0, /* rightshift */
1679 1, /* size (0 = byte, 1 = short, 2 = long) */
1680 5, /* bitsize */
1681 FALSE, /* pc_relative */
1682 0, /* bitpos */
1683 complain_overflow_signed, /* complain_on_overflow */
1684 bfd_elf_generic_reloc, /* special_function */
1685 "R_NDS32_5_RELA", /* name */
1686 FALSE, /* partial_inplace */
1687 0x1f, /* src_mask */
1688 0x1f, /* dst_mask */
1689 FALSE), /* pcrel_offset */
1690 HOWTO (R_NDS32_10_UPCREL_RELA,/* type */
1691 1, /* rightshift */
1692 1, /* size (0 = byte, 1 = short, 2 = long) */
1693 9, /* bitsize */
1694 TRUE, /* pc_relative */
1695 0, /* bitpos */
1696 complain_overflow_unsigned, /* complain_on_overflow */
1697 bfd_elf_generic_reloc, /* special_function */
1698 "R_NDS32_10_UPCREL_RELA", /* name */
1699 FALSE, /* partial_inplace */
1700 0x1ff, /* src_mask */
1701 0x1ff, /* dst_mask */
1702 TRUE), /* pcrel_offset */
1703 HOWTO (R_NDS32_SDA_FP7U2_RELA,/* type */
1704 2, /* rightshift */
1705 1, /* size (0 = byte, 1 = short, 2 = long) */
1706 7, /* bitsize */
1707 FALSE, /* pc_relative */
1708 0, /* bitpos */
1709 complain_overflow_unsigned, /* complain_on_overflow */
1710 bfd_elf_generic_reloc, /* special_function */
1711 "R_NDS32_SDA_FP7U2_RELA", /* name */
1712 FALSE, /* partial_inplace */
1713 0x0000007f, /* src_mask */
1714 0x0000007f, /* dst_mask */
1715 FALSE), /* pcrel_offset */
1716 HOWTO (R_NDS32_WORD_9_PCREL_RELA, /* type */
1717 1, /* rightshift */
1718 2, /* size (0 = byte, 1 = short, 2 = long) */
1719 8, /* bitsize */
1720 TRUE, /* pc_relative */
1721 0, /* bitpos */
1722 complain_overflow_signed, /* complain_on_overflow */
1723 bfd_elf_generic_reloc, /* special_function */
1724 "R_NDS32_WORD_9_PCREL_RELA", /* name */
1725 FALSE, /* partial_inplace */
1726 0xff, /* src_mask */
1727 0xff, /* dst_mask */
1728 TRUE), /* pcrel_offset */
1729 HOWTO (R_NDS32_25_ABS_RELA, /* type */
1730 1, /* rightshift */
1731 2, /* size (0 = byte, 1 = short, 2 = long) */
1732 24, /* bitsize */
1733 FALSE, /* pc_relative */
1734 0, /* bitpos */
1735 complain_overflow_dont,/* complain_on_overflow */
1736 bfd_elf_generic_reloc, /* special_function */
1737 "R_NDS32_25_ABS_RELA", /* name */
1738 FALSE, /* partial_inplace */
1739 0xffffff, /* src_mask */
1740 0xffffff, /* dst_mask */
1741 FALSE), /* pcrel_offset */
1742
1743 /* A relative 17 bit relocation for ifc, right shifted by 1. */
1744 HOWTO (R_NDS32_17IFC_PCREL_RELA, /* type */
1745 1, /* rightshift */
1746 2, /* size (0 = byte, 1 = short, 2 = long) */
1747 16, /* bitsize */
1748 TRUE, /* pc_relative */
1749 0, /* bitpos */
1750 complain_overflow_signed, /* complain_on_overflow */
1751 bfd_elf_generic_reloc, /* special_function */
1752 "R_NDS32_17IFC_PCREL_RELA", /* name */
1753 FALSE, /* partial_inplace */
1754 0xffff, /* src_mask */
1755 0xffff, /* dst_mask */
1756 TRUE), /* pcrel_offset */
1757
1758 /* A relative unsigned 10 bit relocation for ifc, right shifted by 1. */
1759 HOWTO (R_NDS32_10IFCU_PCREL_RELA, /* type */
1760 1, /* rightshift */
1761 1, /* size (0 = byte, 1 = short, 2 = long) */
1762 9, /* bitsize */
1763 TRUE, /* pc_relative */
1764 0, /* bitpos */
1765 complain_overflow_unsigned, /* complain_on_overflow */
1766 bfd_elf_generic_reloc, /* special_function */
1767 "R_NDS32_10IFCU_PCREL_RELA", /* name */
1768 FALSE, /* partial_inplace */
1769 0x1ff, /* src_mask */
1770 0x1ff, /* dst_mask */
1771 TRUE), /* pcrel_offset */
1c8f6a4d
KLC
1772
1773 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1774 HOWTO (R_NDS32_TLS_LE_HI20, /* type */
1775 12, /* rightshift */
1776 2, /* size (0 = byte, 1 = short, 2 = long) */
1777 20, /* bitsize */
1778 FALSE, /* pc_relative */
1779 0, /* bitpos */
1780 complain_overflow_dont, /* complain_on_overflow */
1781 bfd_elf_generic_reloc, /* special_function */
1782 "R_NDS32_TLS_LE_HI20", /* name */
1783 FALSE, /* partial_inplace */
1784 0x000fffff, /* src_mask */
1785 0x000fffff, /* dst_mask */
1786 FALSE), /* pcrel_offset */
1787 HOWTO (R_NDS32_TLS_LE_LO12, /* type */
1788 0, /* rightshift */
1789 2, /* size (0 = byte, 1 = short, 2 = long) */
1790 12, /* bitsize */
1791 FALSE, /* pc_relative */
1792 0, /* bitpos */
1793 complain_overflow_dont, /* complain_on_overflow */
1794 bfd_elf_generic_reloc, /* special_function */
1795 "R_NDS32_TLS_LE_LO12", /* name */
1796 FALSE, /* partial_inplace */
1797 0x00000fff, /* src_mask */
1798 0x00000fff, /* dst_mask */
1799 FALSE), /* pcrel_offset */
1800
1801 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1802 HOWTO (R_NDS32_TLS_IE_HI20, /* type */
1803 12, /* rightshift */
1804 2, /* size (0 = byte, 1 = short, 2 = long) */
1805 20, /* bitsize */
1806 FALSE, /* pc_relative */
1807 0, /* bitpos */
1808 complain_overflow_dont, /* complain_on_overflow */
1809 bfd_elf_generic_reloc, /* special_function */
1810 "R_NDS32_TLS_IE_HI20", /* name */
1811 FALSE, /* partial_inplace */
1812 0x000fffff, /* src_mask */
1813 0x000fffff, /* dst_mask */
1814 FALSE), /* pcrel_offset */
1815 HOWTO (R_NDS32_TLS_IE_LO12S2, /* type */
1816 2, /* rightshift */
1817 2, /* size (0 = byte, 1 = short, 2 = long) */
1818 10, /* bitsize */
1819 FALSE, /* pc_relative */
1820 0, /* bitpos */
1821 complain_overflow_dont, /* complain_on_overflow */
1822 bfd_elf_generic_reloc, /* special_function */
1823 "R_NDS32_TLS_IE_LO12S2", /* name */
1824 FALSE, /* partial_inplace */
1825 0x000003ff, /* src_mask */
1826 0x000003ff, /* dst_mask */
1827 FALSE), /* pcrel_offset */
1828 /* Mark a TLS IE entry in GOT. */
1829 HOWTO (R_NDS32_TLS_TPOFF, /* type */
1830 0, /* rightshift */
1831 2, /* size (0 = byte, 1 = short, 2 = long) */
1832 32, /* bitsize */
1833 FALSE, /* pc_relative */
1834 0, /* bitpos */
1835 complain_overflow_bitfield, /* complain_on_overflow */
1836 bfd_elf_generic_reloc, /* special_function */
1837 "R_NDS32_TLS_TPOFF", /* name */
1838 FALSE, /* partial_inplace */
1839 0xffffffff, /* src_mask */
1840 0xffffffff, /* dst_mask */
1841 FALSE), /* pcrel_offset */
1842 /* A 20 bit address. */
1843 HOWTO (R_NDS32_TLS_LE_20, /* type */
1844 0, /* rightshift */
1845 2, /* size (0 = byte, 1 = short, 2 = long) */
1846 20, /* bitsize */
1847 FALSE, /* pc_relative */
1848 0, /* bitpos */
1849 complain_overflow_signed, /* complain_on_overflow */
1850 bfd_elf_generic_reloc, /* special_function */
1851 "R_NDS32_TLS_LE_20", /* name */
1852 FALSE, /* partial_inplace */
1853 0xfffff, /* src_mask */
1854 0xfffff, /* dst_mask */
1855 FALSE), /* pcrel_offset */
1856 HOWTO (R_NDS32_TLS_LE_15S0, /* type */
1857 0, /* rightshift */
1858 2, /* size (0 = byte, 1 = short, 2 = long) */
1859 15, /* bitsize */
1860 FALSE, /* pc_relative */
1861 0, /* bitpos */
1862 complain_overflow_signed, /* complain_on_overflow */
1863 bfd_elf_generic_reloc, /* special_function */
1864 "R_NDS32_TLS_LE_15S0", /* name */
1865 FALSE, /* partial_inplace */
1866 0x7fff, /* src_mask */
1867 0x7fff, /* dst_mask */
1868 FALSE), /* pcrel_offset */
1869 HOWTO (R_NDS32_TLS_LE_15S1, /* type */
1870 1, /* rightshift */
1871 2, /* size (0 = byte, 1 = short, 2 = long) */
1872 15, /* bitsize */
1873 FALSE, /* pc_relative */
1874 0, /* bitpos */
1875 complain_overflow_signed, /* complain_on_overflow */
1876 bfd_elf_generic_reloc, /* special_function */
1877 "R_NDS32_TLS_LE_15S1", /* name */
1878 FALSE, /* partial_inplace */
1879 0x7fff, /* src_mask */
1880 0x7fff, /* dst_mask */
1881 FALSE), /* pcrel_offset */
1882 HOWTO (R_NDS32_TLS_LE_15S2, /* type */
1883 2, /* rightshift */
1884 2, /* size (0 = byte, 1 = short, 2 = long) */
1885 15, /* bitsize */
1886 FALSE, /* pc_relative */
1887 0, /* bitpos */
1888 complain_overflow_signed, /* complain_on_overflow */
1889 bfd_elf_generic_reloc, /* special_function */
1890 "R_NDS32_TLS_LE_15S2", /* name */
1891 FALSE, /* partial_inplace */
1892 0x7fff, /* src_mask */
1893 0x7fff, /* dst_mask */
1894 FALSE), /* pcrel_offset */
1895
1896 /* Relax hint for unconditional call sequence */
1897 HOWTO (R_NDS32_LONGCALL4, /* type */
1898 0, /* rightshift */
1899 2, /* size (0 = byte, 1 = short, 2 = long) */
1900 32, /* bitsize */
1901 FALSE, /* pc_relative */
1902 0, /* bitpos */
1903 complain_overflow_dont, /* complain_on_overflow */
1904 nds32_elf_ignore_reloc, /* special_function */
1905 "R_NDS32_LONGCALL4", /* name */
1906 FALSE, /* partial_inplace */
1907 0xffffffff, /* src_mask */
1908 0xffffffff, /* dst_mask */
1909 FALSE), /* pcrel_offset */
1910
1911 /* Relax hint for conditional call sequence. */
1912 HOWTO (R_NDS32_LONGCALL5, /* type */
1913 0, /* rightshift */
1914 2, /* size (0 = byte, 1 = short, 2 = long) */
1915 32, /* bitsize */
1916 FALSE, /* pc_relative */
1917 0, /* bitpos */
1918 complain_overflow_dont, /* complain_on_overflow */
1919 nds32_elf_ignore_reloc, /* special_function */
1920 "R_NDS32_LONGCALL5", /* name */
1921 FALSE, /* partial_inplace */
1922 0xffffffff, /* src_mask */
1923 0xffffffff, /* dst_mask */
1924 FALSE), /* pcrel_offset */
1925
1926 /* Relax hint for conditional call sequence. */
1927 HOWTO (R_NDS32_LONGCALL6, /* type */
1928 0, /* rightshift */
1929 2, /* size (0 = byte, 1 = short, 2 = long) */
1930 32, /* bitsize */
1931 FALSE, /* pc_relative */
1932 0, /* bitpos */
1933 complain_overflow_dont, /* complain_on_overflow */
1934 nds32_elf_ignore_reloc, /* special_function */
1935 "R_NDS32_LONGCALL6", /* name */
1936 FALSE, /* partial_inplace */
1937 0xffffffff, /* src_mask */
1938 0xffffffff, /* dst_mask */
1939 FALSE), /* pcrel_offset */
1940
1941 /* Relax hint for unconditional branch sequence. */
1942 HOWTO (R_NDS32_LONGJUMP4, /* type */
1943 0, /* rightshift */
1944 2, /* size (0 = byte, 1 = short, 2 = long) */
1945 32, /* bitsize */
1946 FALSE, /* pc_relative */
1947 0, /* bitpos */
1948 complain_overflow_dont, /* complain_on_overflow */
1949 nds32_elf_ignore_reloc, /* special_function */
1950 "R_NDS32_LONGJUMP4", /* name */
1951 FALSE, /* partial_inplace */
1952 0xffffffff, /* src_mask */
1953 0xffffffff, /* dst_mask */
1954 FALSE), /* pcrel_offset */
1955
1956 /* Relax hint for conditional branch sequence. */
1957 HOWTO (R_NDS32_LONGJUMP5, /* type */
1958 0, /* rightshift */
1959 2, /* size (0 = byte, 1 = short, 2 = long) */
1960 32, /* bitsize */
1961 FALSE, /* pc_relative */
1962 0, /* bitpos */
1963 complain_overflow_dont, /* complain_on_overflow */
1964 nds32_elf_ignore_reloc, /* special_function */
1965 "R_NDS32_LONGJUMP5", /* name */
1966 FALSE, /* partial_inplace */
1967 0xffffffff, /* src_mask */
1968 0xffffffff, /* dst_mask */
1969 FALSE), /* pcrel_offset */
1970
1971 /* Relax hint for conditional branch sequence. */
1972 HOWTO (R_NDS32_LONGJUMP6, /* type */
1973 0, /* rightshift */
1974 2, /* size (0 = byte, 1 = short, 2 = long) */
1975 32, /* bitsize */
1976 FALSE, /* pc_relative */
1977 0, /* bitpos */
1978 complain_overflow_dont, /* complain_on_overflow */
1979 nds32_elf_ignore_reloc, /* special_function */
1980 "R_NDS32_LONGJUMP6", /* name */
1981 FALSE, /* partial_inplace */
1982 0xffffffff, /* src_mask */
1983 0xffffffff, /* dst_mask */
1984 FALSE), /* pcrel_offset */
1985
1986 /* Relax hint for conditional branch sequence. */
1987 HOWTO (R_NDS32_LONGJUMP7, /* type */
1988 0, /* rightshift */
1989 2, /* size (0 = byte, 1 = short, 2 = long) */
1990 32, /* bitsize */
1991 FALSE, /* pc_relative */
1992 0, /* bitpos */
1993 complain_overflow_dont, /* complain_on_overflow */
1994 nds32_elf_ignore_reloc, /* special_function */
1995 "R_NDS32_LONGJUMP7", /* name */
1996 FALSE, /* partial_inplace */
1997 0xffffffff, /* src_mask */
1998 0xffffffff, /* dst_mask */
1999 FALSE), /* pcrel_offset */
35c08157
KLC
2000};
2001
2002/* Relocations used for relaxation. */
2003static reloc_howto_type nds32_elf_relax_howto_table[] =
2004{
2005 HOWTO (R_NDS32_RELAX_ENTRY, /* type */
2006 0, /* rightshift */
2007 2, /* size (0 = byte, 1 = short, 2 = long) */
2008 32, /* bitsize */
2009 FALSE, /* pc_relative */
2010 0, /* bitpos */
2011 complain_overflow_dont,/* complain_on_overflow */
2012 nds32_elf_ignore_reloc,/* special_function */
2013 "R_NDS32_RELAX_ENTRY", /* name */
2014 FALSE, /* partial_inplace */
2015 0xffffffff, /* src_mask */
2016 0xffffffff, /* dst_mask */
2017 FALSE), /* pcrel_offset */
2018 HOWTO (R_NDS32_GOT_SUFF, /* type */
2019 0, /* rightshift */
2020 2, /* size (0 = byte, 1 = short, 2 = long) */
2021 32, /* bitsize */
2022 FALSE, /* pc_relative */
2023 0, /* bitpos */
2024 complain_overflow_dont,/* complain_on_overflow */
2025 nds32_elf_ignore_reloc,/* special_function */
2026 "R_NDS32_GOT_SUFF", /* name */
2027 FALSE, /* partial_inplace */
2028 0xffffffff, /* src_mask */
2029 0xffffffff, /* dst_mask */
2030 FALSE), /* pcrel_offset */
2031 HOWTO (R_NDS32_GOTOFF_SUFF, /* type */
2032 0, /* rightshift */
2033 2, /* size (0 = byte, 1 = short, 2 = long) */
2034 32, /* bitsize */
2035 FALSE, /* pc_relative */
2036 0, /* bitpos */
2037 complain_overflow_bitfield, /* complain_on_overflow */
2038 nds32_elf_ignore_reloc,/* special_function */
2039 "R_NDS32_GOTOFF_SUFF", /* name */
2040 FALSE, /* partial_inplace */
2041 0xffffffff, /* src_mask */
2042 0xffffffff, /* dst_mask */
2043 FALSE), /* pcrel_offset */
2044 HOWTO (R_NDS32_PLT_GOT_SUFF, /* type */
2045 0, /* rightshift */
2046 2, /* size (0 = byte, 1 = short, 2 = long) */
2047 32, /* bitsize */
2048 FALSE, /* pc_relative */
2049 0, /* bitpos */
2050 complain_overflow_dont,/* complain_on_overflow */
2051 nds32_elf_ignore_reloc,/* special_function */
2052 "R_NDS32_PLT_GOT_SUFF",/* name */
2053 FALSE, /* partial_inplace */
2054 0xffffffff, /* src_mask */
2055 0xffffffff, /* dst_mask */
2056 FALSE), /* pcrel_offset */
2057 HOWTO (R_NDS32_MULCALL_SUFF, /* type */
2058 0, /* rightshift */
2059 2, /* size (0 = byte, 1 = short, 2 = long) */
2060 32, /* bitsize */
2061 FALSE, /* pc_relative */
2062 0, /* bitpos */
2063 complain_overflow_dont,/* complain_on_overflow */
2064 nds32_elf_ignore_reloc,/* special_function */
2065 "R_NDS32_MULCALL_SUFF",/* name */
2066 FALSE, /* partial_inplace */
2067 0xffffffff, /* src_mask */
2068 0xffffffff, /* dst_mask */
2069 FALSE), /* pcrel_offset */
2070 HOWTO (R_NDS32_PTR, /* type */
2071 0, /* rightshift */
2072 2, /* size (0 = byte, 1 = short, 2 = long) */
2073 32, /* bitsize */
2074 FALSE, /* pc_relative */
2075 0, /* bitpos */
2076 complain_overflow_dont,/* complain_on_overflow */
2077 nds32_elf_ignore_reloc,/* special_function */
2078 "R_NDS32_PTR", /* name */
2079 FALSE, /* partial_inplace */
2080 0xffffffff, /* src_mask */
2081 0xffffffff, /* dst_mask */
2082 FALSE), /* pcrel_offset */
2083 HOWTO (R_NDS32_PTR_COUNT, /* type */
2084 0, /* rightshift */
2085 2, /* size (0 = byte, 1 = short, 2 = long) */
2086 32, /* bitsize */
2087 FALSE, /* pc_relative */
2088 0, /* bitpos */
2089 complain_overflow_dont,/* complain_on_overflow */
2090 nds32_elf_ignore_reloc,/* special_function */
2091 "R_NDS32_PTR_COUNT", /* name */
2092 FALSE, /* partial_inplace */
2093 0xffffffff, /* src_mask */
2094 0xffffffff, /* dst_mask */
2095 FALSE), /* pcrel_offset */
2096 HOWTO (R_NDS32_PTR_RESOLVED, /* type */
2097 0, /* rightshift */
2098 2, /* size (0 = byte, 1 = short, 2 = long) */
2099 32, /* bitsize */
2100 FALSE, /* pc_relative */
2101 0, /* bitpos */
2102 complain_overflow_dont,/* complain_on_overflow */
2103 nds32_elf_ignore_reloc,/* special_function */
2104 "R_NDS32_PTR_RESOLVED",/* name */
2105 FALSE, /* partial_inplace */
2106 0xffffffff, /* src_mask */
2107 0xffffffff, /* dst_mask */
2108 FALSE), /* pcrel_offset */
2109 HOWTO (R_NDS32_PLTBLOCK, /* type */
2110 0, /* rightshift */
2111 2, /* size (0 = byte, 1 = short, 2 = long) */
2112 32, /* bitsize */
2113 FALSE, /* pc_relative */
2114 0, /* bitpos */
2115 complain_overflow_dont,/* complain_on_overflow */
2116 nds32_elf_ignore_reloc,/* special_function */
2117 "R_NDS32_PLTBLOCK", /* name */
2118 FALSE, /* partial_inplace */
2119 0xffffffff, /* src_mask */
2120 0xffffffff, /* dst_mask */
2121 FALSE), /* pcrel_offset */
2122 HOWTO (R_NDS32_RELAX_REGION_BEGIN, /* type */
2123 0, /* rightshift */
2124 2, /* size (0 = byte, 1 = short, 2 = long) */
2125 32, /* bitsize */
2126 FALSE, /* pc_relative */
2127 0, /* bitpos */
2128 complain_overflow_dont,/* complain_on_overflow */
2129 nds32_elf_ignore_reloc,/* special_function */
2130 "R_NDS32_RELAX_REGION_BEGIN", /* name */
2131 FALSE, /* partial_inplace */
2132 0xffffffff, /* src_mask */
2133 0xffffffff, /* dst_mask */
2134 FALSE), /* pcrel_offset */
2135 HOWTO (R_NDS32_RELAX_REGION_END, /* type */
2136 0, /* rightshift */
2137 2, /* size (0 = byte, 1 = short, 2 = long) */
2138 32, /* bitsize */
2139 FALSE, /* pc_relative */
2140 0, /* bitpos */
2141 complain_overflow_dont,/* complain_on_overflow */
2142 nds32_elf_ignore_reloc,/* special_function */
2143 "R_NDS32_RELAX_REGION_END", /* name */
2144 FALSE, /* partial_inplace */
2145 0xffffffff, /* src_mask */
2146 0xffffffff, /* dst_mask */
2147 FALSE), /* pcrel_offset */
2148 HOWTO (R_NDS32_MINUEND, /* type */
2149 0, /* rightshift */
2150 2, /* size (0 = byte, 1 = short, 2 = long) */
2151 32, /* bitsize */
2152 FALSE, /* pc_relative */
2153 0, /* bitpos */
2154 complain_overflow_dont,/* complain_on_overflow */
2155 nds32_elf_ignore_reloc,/* special_function */
2156 "R_NDS32_MINUEND", /* name */
2157 FALSE, /* partial_inplace */
2158 0xffffffff, /* src_mask */
2159 0xffffffff, /* dst_mask */
2160 FALSE), /* pcrel_offset */
2161 HOWTO (R_NDS32_SUBTRAHEND, /* type */
2162 0, /* rightshift */
2163 2, /* size (0 = byte, 1 = short, 2 = long) */
2164 32, /* bitsize */
2165 FALSE, /* pc_relative */
2166 0, /* bitpos */
2167 complain_overflow_dont,/* complain_on_overflow */
2168 nds32_elf_ignore_reloc,/* special_function */
2169 "R_NDS32_SUBTRAHEND", /* name */
2170 FALSE, /* partial_inplace */
2171 0xffffffff, /* src_mask */
2172 0xffffffff, /* dst_mask */
2173 FALSE), /* pcrel_offset */
2174 HOWTO (R_NDS32_DIFF8, /* type */
2175 0, /* rightshift */
2176 0, /* size (0 = byte, 1 = short, 2 = long) */
2177 8, /* bitsize */
2178 FALSE, /* pc_relative */
2179 0, /* bitpos */
2180 complain_overflow_dont,/* complain_on_overflow */
2181 nds32_elf_ignore_reloc,/* special_function */
2182 "R_NDS32_DIFF8", /* name */
2183 FALSE, /* partial_inplace */
2184 0x000000ff, /* src_mask */
2185 0x000000ff, /* dst_mask */
2186 FALSE), /* pcrel_offset */
2187 HOWTO (R_NDS32_DIFF16, /* type */
2188 0, /* rightshift */
2189 1, /* size (0 = byte, 1 = short, 2 = long) */
2190 16, /* bitsize */
2191 FALSE, /* pc_relative */
2192 0, /* bitpos */
2193 complain_overflow_dont,/* complain_on_overflow */
2194 nds32_elf_ignore_reloc,/* special_function */
2195 "R_NDS32_DIFF16", /* name */
2196 FALSE, /* partial_inplace */
2197 0x0000ffff, /* src_mask */
2198 0x0000ffff, /* dst_mask */
2199 FALSE), /* pcrel_offset */
2200 HOWTO (R_NDS32_DIFF32, /* type */
2201 0, /* rightshift */
2202 2, /* size (0 = byte, 1 = short, 2 = long) */
2203 32, /* bitsize */
2204 FALSE, /* pc_relative */
2205 0, /* bitpos */
2206 complain_overflow_dont,/* complain_on_overflow */
2207 nds32_elf_ignore_reloc,/* special_function */
2208 "R_NDS32_DIFF32", /* name */
2209 FALSE, /* partial_inplace */
2210 0xffffffff, /* src_mask */
2211 0xffffffff, /* dst_mask */
2212 FALSE), /* pcrel_offset */
2213 HOWTO (R_NDS32_DIFF_ULEB128, /* type */
2214 0, /* rightshift */
2215 0, /* size (0 = byte, 1 = short, 2 = long) */
2216 0, /* bitsize */
2217 FALSE, /* pc_relative */
2218 0, /* bitpos */
2219 complain_overflow_dont,/* complain_on_overflow */
2220 nds32_elf_ignore_reloc,/* special_function */
2221 "R_NDS32_DIFF_ULEB128",/* name */
2222 FALSE, /* partial_inplace */
2223 0xffffffff, /* src_mask */
2224 0xffffffff, /* dst_mask */
2225 FALSE), /* pcrel_offset */
2226 HOWTO (R_NDS32_DATA, /* type */
2227 0, /* rightshift */
2228 2, /* size (0 = byte, 1 = short, 2 = long) */
2229 32, /* bitsize */
2230 FALSE, /* pc_relative */
2231 0, /* bitpos */
2232 complain_overflow_dont,/* complain_on_overflow */
2233 nds32_elf_ignore_reloc,/* special_function */
2234 "R_NDS32_DATA", /* name */
2235 FALSE, /* partial_inplace */
2236 0xffffffff, /* src_mask */
2237 0xffffffff, /* dst_mask */
2238 FALSE), /* pcrel_offset */
2239 HOWTO (R_NDS32_TRAN, /* type */
2240 0, /* rightshift */
2241 2, /* size (0 = byte, 1 = short, 2 = long) */
2242 32, /* bitsize */
2243 FALSE, /* pc_relative */
2244 0, /* bitpos */
2245 complain_overflow_dont,/* complain_on_overflow */
2246 nds32_elf_ignore_reloc,/* special_function */
2247 "R_NDS32_TRAN", /* name */
2248 FALSE, /* partial_inplace */
2249 0xffffffff, /* src_mask */
2250 0xffffffff, /* dst_mask */
2251 FALSE), /* pcrel_offset */
1c8f6a4d
KLC
2252 HOWTO (R_NDS32_TLS_LE_ADD, /* type */
2253 0, /* rightshift */
2254 2, /* size (0 = byte, 1 = short, 2 = long) */
2255 32, /* bitsize */
2256 FALSE, /* pc_relative */
2257 0, /* bitpos */
2258 complain_overflow_dont, /* complain_on_overflow */
2259 nds32_elf_ignore_reloc, /* special_function */
2260 "R_NDS32_TLS_LE_ADD", /* name */
2261 FALSE, /* partial_inplace */
2262 0xffffffff, /* src_mask */
2263 0xffffffff, /* dst_mask */
2264 FALSE), /* pcrel_offset */
2265 HOWTO (R_NDS32_TLS_LE_LS, /* type */
2266 0, /* rightshift */
2267 2, /* size (0 = byte, 1 = short, 2 = long) */
2268 32, /* bitsize */
2269 FALSE, /* pc_relative */
2270 0, /* bitpos */
2271 complain_overflow_dont, /* complain_on_overflow */
2272 nds32_elf_ignore_reloc, /* special_function */
2273 "R_NDS32_TLS_LE_LS", /* name */
2274 FALSE, /* partial_inplace */
2275 0xffffffff, /* src_mask */
2276 0xffffffff, /* dst_mask */
2277 FALSE), /* pcrel_offset */
2278 HOWTO (R_NDS32_EMPTY, /* type */
2279 0, /* rightshift */
2280 2, /* size (0 = byte, 1 = short, 2 = long) */
2281 32, /* bitsize */
2282 FALSE, /* pc_relative */
2283 0, /* bitpos */
2284 complain_overflow_dont, /* complain_on_overflow */
2285 nds32_elf_ignore_reloc, /* special_function */
2286 "R_NDS32_EMPTY", /* name */
2287 FALSE, /* partial_inplace */
2288 0xffffffff, /* src_mask */
2289 0xffffffff, /* dst_mask */
2290 FALSE), /* pcrel_offset */
35c08157
KLC
2291};
2292
2293\f
2294/* nds32_insertion_sort sorts an array with nmemb elements of size size.
2295 This prototype is the same as qsort (). */
2296
2297void
2298nds32_insertion_sort (void *base, size_t nmemb, size_t size,
2299 int (*compar) (const void *lhs, const void *rhs))
2300{
2301 char *ptr = (char *) base;
1c8f6a4d 2302 int i, j;
e1fa0163 2303 char *tmp = xmalloc (size);
35c08157
KLC
2304
2305 /* If i is less than j, i is inserted before j.
2306
2307 |---- j ----- i --------------|
2308 \ / \ /
2309 sorted unsorted
2310 */
2311
1c8f6a4d 2312 for (i = 1; i < (int) nmemb; i++)
35c08157 2313 {
1c8f6a4d
KLC
2314 for (j = (i - 1); j >= 0; j--)
2315 if (compar (ptr + i * size, ptr + j * size) >= 0)
35c08157
KLC
2316 break;
2317
1c8f6a4d
KLC
2318 j++;
2319
35c08157 2320 if (i == j)
1c8f6a4d 2321 continue; /* i is in order. */
35c08157
KLC
2322
2323 memcpy (tmp, ptr + i * size, size);
2324 memmove (ptr + (j + 1) * size, ptr + j * size, (i - j) * size);
2325 memcpy (ptr + j * size, tmp, size);
2326 }
e1fa0163 2327 free (tmp);
35c08157
KLC
2328}
2329
2330/* Sort relocation by r_offset.
2331
2332 We didn't use qsort () in stdlib, because quick-sort is not a stable sorting
2333 algorithm. Relocations at the same r_offset must keep their order.
2334 For example, RELAX_ENTRY must be the very first relocation entry.
2335
2336 Currently, this function implements insertion-sort.
2337
2338 FIXME: If we already sort them in assembler, why bother sort them
2339 here again? */
2340
2341static int
2342compar_reloc (const void *lhs, const void *rhs)
2343{
2344 const Elf_Internal_Rela *l = (const Elf_Internal_Rela *) lhs;
2345 const Elf_Internal_Rela *r = (const Elf_Internal_Rela *) rhs;
2346
2347 if (l->r_offset > r->r_offset)
2348 return 1;
2349 else if (l->r_offset == r->r_offset)
2350 return 0;
2351 else
2352 return -1;
2353}
2354
2355/* Functions listed below are only used for old relocs.
2356 * nds32_elf_9_pcrel_reloc
2357 * nds32_elf_do_9_pcrel_reloc
2358 * nds32_elf_hi20_reloc
2359 * nds32_elf_relocate_hi20
2360 * nds32_elf_lo12_reloc
2361 * nds32_elf_sda15_reloc
2362 * nds32_elf_generic_reloc
2363 */
2364
2365/* Handle the R_NDS32_9_PCREL & R_NDS32_9_PCREL_RELA reloc. */
2366
2367static bfd_reloc_status_type
2368nds32_elf_9_pcrel_reloc (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
2369 void *data, asection *input_section, bfd *output_bfd,
2370 char **error_message ATTRIBUTE_UNUSED)
2371{
2372 /* This part is from bfd_elf_generic_reloc. */
2373 if (output_bfd != (bfd *) NULL
2374 && (symbol->flags & BSF_SECTION_SYM) == 0
2375 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2376 {
2377 reloc_entry->address += input_section->output_offset;
2378 return bfd_reloc_ok;
2379 }
2380
2381 if (output_bfd != NULL)
2382 {
2383 /* FIXME: See bfd_perform_relocation. Is this right? */
2384 return bfd_reloc_continue;
2385 }
2386
2387 return nds32_elf_do_9_pcrel_reloc (abfd, reloc_entry->howto,
2388 input_section,
2389 data, reloc_entry->address,
2390 symbol->section,
2391 (symbol->value
2392 + symbol->section->output_section->vma
2393 + symbol->section->output_offset),
2394 reloc_entry->addend);
2395}
2396
2397/* Utility to actually perform an R_NDS32_9_PCREL reloc. */
2398#define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
2399
2400static bfd_reloc_status_type
2401nds32_elf_do_9_pcrel_reloc (bfd *abfd, reloc_howto_type *howto,
2402 asection *input_section, bfd_byte *data,
1c8f6a4d
KLC
2403 bfd_vma offset,
2404 asection *symbol_section ATTRIBUTE_UNUSED,
35c08157
KLC
2405 bfd_vma symbol_value, bfd_vma addend)
2406{
2407 bfd_signed_vma relocation;
2408 unsigned short x;
2409 bfd_reloc_status_type status;
2410
2411 /* Sanity check the address (offset in section). */
2412 if (offset > bfd_get_section_limit (abfd, input_section))
2413 return bfd_reloc_outofrange;
2414
2415 relocation = symbol_value + addend;
2416 /* Make it pc relative. */
2417 relocation -= (input_section->output_section->vma
2418 + input_section->output_offset);
2419 /* These jumps mask off the lower two bits of the current address
2420 before doing pcrel calculations. */
2421 relocation -= (offset & -(bfd_vma) 2);
2422
1c8f6a4d 2423 if (relocation < -ACCURATE_8BIT_S1 || relocation >= ACCURATE_8BIT_S1)
35c08157
KLC
2424 status = bfd_reloc_overflow;
2425 else
2426 status = bfd_reloc_ok;
2427
2428 x = bfd_getb16 (data + offset);
2429
2430 relocation >>= howto->rightshift;
2431 relocation <<= howto->bitpos;
2432 x = (x & ~howto->dst_mask)
2433 | (((x & howto->src_mask) + relocation) & howto->dst_mask);
2434
2435 bfd_putb16 ((bfd_vma) x, data + offset);
2436
2437 return status;
2438}
2439
2440/* Handle the R_NDS32_HI20_[SU]LO relocs.
2441 HI20_SLO is for the add3 and load/store with displacement instructions.
2442 HI20 is for the or3 instruction.
2443 For R_NDS32_HI20_SLO, the lower 16 bits are sign extended when added to
2444 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
2445 we must add one to the high 16 bytes (which will get subtracted off when
2446 the low 16 bits are added).
2447 These relocs have to be done in combination with an R_NDS32_LO12 reloc
2448 because there is a carry from the LO12 to the HI20. Here we just save
2449 the information we need; we do the actual relocation when we see the LO12.
2450 This code is copied from the elf32-mips.c. We also support an arbitrary
2451 number of HI20 relocs to be associated with a single LO12 reloc. The
2452 assembler sorts the relocs to ensure each HI20 immediately precedes its
2453 LO12. However if there are multiple copies, the assembler may not find
2454 the real LO12 so it picks the first one it finds. */
2455
2456struct nds32_hi20
2457{
2458 struct nds32_hi20 *next;
2459 bfd_byte *addr;
2460 bfd_vma addend;
2461};
2462
2463static struct nds32_hi20 *nds32_hi20_list;
2464
2465static bfd_reloc_status_type
2466nds32_elf_hi20_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2467 asymbol *symbol, void *data, asection *input_section,
2468 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2469{
2470 bfd_reloc_status_type ret;
2471 bfd_vma relocation;
2472 struct nds32_hi20 *n;
2473
2474 /* This part is from bfd_elf_generic_reloc.
2475 If we're relocating, and this an external symbol, we don't want
2476 to change anything. */
2477 if (output_bfd != (bfd *) NULL
2478 && (symbol->flags & BSF_SECTION_SYM) == 0 && reloc_entry->addend == 0)
2479 {
2480 reloc_entry->address += input_section->output_offset;
2481 return bfd_reloc_ok;
2482 }
2483
2484 /* Sanity check the address (offset in section). */
2485 if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
2486 return bfd_reloc_outofrange;
2487
2488 ret = bfd_reloc_ok;
2489 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2490 ret = bfd_reloc_undefined;
2491
2492 if (bfd_is_com_section (symbol->section))
2493 relocation = 0;
2494 else
2495 relocation = symbol->value;
2496
2497 relocation += symbol->section->output_section->vma;
2498 relocation += symbol->section->output_offset;
2499 relocation += reloc_entry->addend;
2500
2501 /* Save the information, and let LO12 do the actual relocation. */
2502 n = (struct nds32_hi20 *) bfd_malloc ((bfd_size_type) sizeof *n);
2503 if (n == NULL)
2504 return bfd_reloc_outofrange;
2505
2506 n->addr = (bfd_byte *) data + reloc_entry->address;
2507 n->addend = relocation;
2508 n->next = nds32_hi20_list;
2509 nds32_hi20_list = n;
2510
2511 if (output_bfd != (bfd *) NULL)
2512 reloc_entry->address += input_section->output_offset;
2513
2514 return ret;
2515}
2516
2517/* Handle an NDS32 ELF HI20 reloc. */
2518
2519static void
2520nds32_elf_relocate_hi20 (bfd *input_bfd ATTRIBUTE_UNUSED,
2521 int type ATTRIBUTE_UNUSED, Elf_Internal_Rela *relhi,
2522 Elf_Internal_Rela *rello, bfd_byte *contents,
2523 bfd_vma addend)
2524{
2525 unsigned long insn;
2526 bfd_vma addlo;
2527
2528 insn = bfd_getb32 (contents + relhi->r_offset);
2529
2530 addlo = bfd_getb32 (contents + rello->r_offset);
2531 addlo &= 0xfff;
2532
2533 addend += ((insn & 0xfffff) << 20) + addlo;
2534
2535 insn = (insn & 0xfff00000) | ((addend >> 12) & 0xfffff);
2536 bfd_putb32 (insn, contents + relhi->r_offset);
2537}
2538
2539/* Do an R_NDS32_LO12 relocation. This is a straightforward 12 bit
2540 inplace relocation; this function exists in order to do the
2541 R_NDS32_HI20_[SU]LO relocation described above. */
2542
2543static bfd_reloc_status_type
2544nds32_elf_lo12_reloc (bfd *input_bfd, arelent *reloc_entry, asymbol *symbol,
2545 void *data, asection *input_section, bfd *output_bfd,
2546 char **error_message)
2547{
2548 /* This part is from bfd_elf_generic_reloc.
2549 If we're relocating, and this an external symbol, we don't want
2550 to change anything. */
2551 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2552 && reloc_entry->addend == 0)
2553 {
2554 reloc_entry->address += input_section->output_offset;
2555 return bfd_reloc_ok;
2556 }
2557
2558 if (nds32_hi20_list != NULL)
2559 {
2560 struct nds32_hi20 *l;
2561
2562 l = nds32_hi20_list;
2563 while (l != NULL)
2564 {
2565 unsigned long insn;
2566 unsigned long val;
2567 unsigned long vallo;
2568 struct nds32_hi20 *next;
2569
2570 /* Do the HI20 relocation. Note that we actually don't need
2571 to know anything about the LO12 itself, except where to
2572 find the low 12 bits of the addend needed by the LO12. */
2573 insn = bfd_getb32 (l->addr);
2574 vallo = bfd_getb32 ((bfd_byte *) data + reloc_entry->address);
2575 vallo &= 0xfff;
2576 switch (reloc_entry->howto->type)
2577 {
2578 case R_NDS32_LO12S3:
2579 vallo <<= 3;
2580 break;
2581
2582 case R_NDS32_LO12S2:
2583 vallo <<= 2;
2584 break;
2585
2586 case R_NDS32_LO12S1:
2587 vallo <<= 1;
2588 break;
2589
2590 case R_NDS32_LO12S0:
2591 vallo <<= 0;
2592 break;
2593 }
2594
2595 val = ((insn & 0xfffff) << 12) + vallo;
2596 val += l->addend;
2597
2598 insn = (insn & ~(bfd_vma) 0xfffff) | ((val >> 12) & 0xfffff);
2599 bfd_putb32 ((bfd_vma) insn, l->addr);
2600
2601 next = l->next;
2602 free (l);
2603 l = next;
2604 }
2605
2606 nds32_hi20_list = NULL;
2607 }
2608
2609 /* Now do the LO12 reloc in the usual way.
2610 ??? It would be nice to call bfd_elf_generic_reloc here,
2611 but we have partial_inplace set. bfd_elf_generic_reloc will
2612 pass the handling back to bfd_install_relocation which will install
2613 a section relative addend which is wrong. */
2614 return nds32_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
2615 input_section, output_bfd, error_message);
2616}
2617
2618/* Do generic partial_inplace relocation.
2619 This is a local replacement for bfd_elf_generic_reloc. */
2620
2621static bfd_reloc_status_type
2622nds32_elf_generic_reloc (bfd *input_bfd, arelent *reloc_entry,
2623 asymbol *symbol, void *data, asection *input_section,
2624 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2625{
2626 bfd_reloc_status_type ret;
2627 bfd_vma relocation;
2628 bfd_byte *inplace_address;
2629
2630 /* This part is from bfd_elf_generic_reloc.
2631 If we're relocating, and this an external symbol, we don't want
2632 to change anything. */
2633 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2634 && reloc_entry->addend == 0)
2635 {
2636 reloc_entry->address += input_section->output_offset;
2637 return bfd_reloc_ok;
2638 }
2639
2640 /* Now do the reloc in the usual way.
2641 ??? It would be nice to call bfd_elf_generic_reloc here,
2642 but we have partial_inplace set. bfd_elf_generic_reloc will
2643 pass the handling back to bfd_install_relocation which will install
2644 a section relative addend which is wrong. */
2645
2646 /* Sanity check the address (offset in section). */
2647 if (reloc_entry->address > bfd_get_section_limit (input_bfd, input_section))
2648 return bfd_reloc_outofrange;
2649
2650 ret = bfd_reloc_ok;
2651 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2652 ret = bfd_reloc_undefined;
2653
2654 if (bfd_is_com_section (symbol->section) || output_bfd != (bfd *) NULL)
2655 relocation = 0;
2656 else
2657 relocation = symbol->value;
2658
2659 /* Only do this for a final link. */
2660 if (output_bfd == (bfd *) NULL)
2661 {
2662 relocation += symbol->section->output_section->vma;
2663 relocation += symbol->section->output_offset;
2664 }
2665
2666 relocation += reloc_entry->addend;
2667 switch (reloc_entry->howto->type)
2668 {
2669 case R_NDS32_LO12S3:
2670 relocation >>= 3;
2671 break;
2672
2673 case R_NDS32_LO12S2:
2674 relocation >>= 2;
2675 break;
2676
2677 case R_NDS32_LO12S1:
2678 relocation >>= 1;
2679 break;
2680
2681 case R_NDS32_LO12S0:
2682 default:
2683 relocation >>= 0;
2684 break;
2685 }
2686
2687 inplace_address = (bfd_byte *) data + reloc_entry->address;
2688
2689#define DOIT(x) \
2690 x = ((x & ~reloc_entry->howto->dst_mask) | \
2691 (((x & reloc_entry->howto->src_mask) + relocation) & \
2692 reloc_entry->howto->dst_mask))
2693
2694 switch (reloc_entry->howto->size)
2695 {
2696 case 1:
2697 {
2698 short x = bfd_getb16 (inplace_address);
2699
2700 DOIT (x);
2701 bfd_putb16 ((bfd_vma) x, inplace_address);
2702 }
2703 break;
2704 case 2:
2705 {
2706 unsigned long x = bfd_getb32 (inplace_address);
2707
2708 DOIT (x);
2709 bfd_putb32 ((bfd_vma) x, inplace_address);
2710 }
2711 break;
2712 default:
2713 BFD_ASSERT (0);
2714 }
2715
2716 if (output_bfd != (bfd *) NULL)
2717 reloc_entry->address += input_section->output_offset;
2718
2719 return ret;
2720}
2721
2722/* Handle the R_NDS32_SDA15 reloc.
2723 This reloc is used to compute the address of objects in the small data area
2724 and to perform loads and stores from that area.
2725 The lower 15 bits are sign extended and added to the register specified
2726 in the instruction, which is assumed to point to _SDA_BASE_.
2727
2728 Since the lower 15 bits offset is left-shifted 0, 1 or 2 bits depending on
2729 the access size, this must be taken care of. */
2730
2731static bfd_reloc_status_type
2732nds32_elf_sda15_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2733 asymbol *symbol, void *data ATTRIBUTE_UNUSED,
2734 asection *input_section, bfd *output_bfd,
2735 char **error_message ATTRIBUTE_UNUSED)
2736{
2737 /* This part is from bfd_elf_generic_reloc. */
2738 if (output_bfd != (bfd *) NULL
2739 && (symbol->flags & BSF_SECTION_SYM) == 0
2740 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2741 {
2742 reloc_entry->address += input_section->output_offset;
2743 return bfd_reloc_ok;
2744 }
2745
2746 if (output_bfd != NULL)
2747 {
2748 /* FIXME: See bfd_perform_relocation. Is this right? */
2749 return bfd_reloc_continue;
2750 }
2751
2752 /* FIXME: not sure what to do here yet. But then again, the linker
2753 may never call us. */
2754 abort ();
2755}
2756
2757/* nds32_elf_ignore_reloc is the special function for
2758 relocation types which don't need to be relocated
2759 like relaxation relocation types.
2760 This function simply return bfd_reloc_ok when it is
2761 invoked. */
2762
2763static bfd_reloc_status_type
2764nds32_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2765 asymbol *symbol ATTRIBUTE_UNUSED,
2766 void *data ATTRIBUTE_UNUSED, asection *input_section,
2767 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2768{
2769 if (output_bfd != NULL)
2770 reloc_entry->address += input_section->output_offset;
2771
2772 return bfd_reloc_ok;
2773}
2774\f
2775
2776/* Map BFD reloc types to NDS32 ELF reloc types. */
2777
2778struct nds32_reloc_map_entry
2779{
2780 bfd_reloc_code_real_type bfd_reloc_val;
2781 unsigned char elf_reloc_val;
2782};
2783
2784static const struct nds32_reloc_map_entry nds32_reloc_map[] =
2785{
2786 {BFD_RELOC_NONE, R_NDS32_NONE},
2787 {BFD_RELOC_16, R_NDS32_16_RELA},
2788 {BFD_RELOC_32, R_NDS32_32_RELA},
2789 {BFD_RELOC_NDS32_20, R_NDS32_20_RELA},
2790 {BFD_RELOC_NDS32_5, R_NDS32_5_RELA},
2791 {BFD_RELOC_NDS32_9_PCREL, R_NDS32_9_PCREL_RELA},
2792 {BFD_RELOC_NDS32_WORD_9_PCREL, R_NDS32_WORD_9_PCREL_RELA},
2793 {BFD_RELOC_NDS32_15_PCREL, R_NDS32_15_PCREL_RELA},
2794 {BFD_RELOC_NDS32_17_PCREL, R_NDS32_17_PCREL_RELA},
2795 {BFD_RELOC_NDS32_25_PCREL, R_NDS32_25_PCREL_RELA},
2796 {BFD_RELOC_NDS32_10_UPCREL, R_NDS32_10_UPCREL_RELA},
2797 {BFD_RELOC_NDS32_HI20, R_NDS32_HI20_RELA},
2798 {BFD_RELOC_NDS32_LO12S3, R_NDS32_LO12S3_RELA},
2799 {BFD_RELOC_NDS32_LO12S2, R_NDS32_LO12S2_RELA},
2800 {BFD_RELOC_NDS32_LO12S1, R_NDS32_LO12S1_RELA},
2801 {BFD_RELOC_NDS32_LO12S0, R_NDS32_LO12S0_RELA},
2802 {BFD_RELOC_NDS32_LO12S0_ORI, R_NDS32_LO12S0_ORI_RELA},
2803 {BFD_RELOC_NDS32_SDA15S3, R_NDS32_SDA15S3_RELA},
2804 {BFD_RELOC_NDS32_SDA15S2, R_NDS32_SDA15S2_RELA},
2805 {BFD_RELOC_NDS32_SDA15S1, R_NDS32_SDA15S1_RELA},
2806 {BFD_RELOC_NDS32_SDA15S0, R_NDS32_SDA15S0_RELA},
2807 {BFD_RELOC_VTABLE_INHERIT, R_NDS32_RELA_GNU_VTINHERIT},
2808 {BFD_RELOC_VTABLE_ENTRY, R_NDS32_RELA_GNU_VTENTRY},
2809
2810 {BFD_RELOC_NDS32_GOT20, R_NDS32_GOT20},
2811 {BFD_RELOC_NDS32_9_PLTREL, R_NDS32_9_PLTREL},
2812 {BFD_RELOC_NDS32_25_PLTREL, R_NDS32_25_PLTREL},
2813 {BFD_RELOC_NDS32_COPY, R_NDS32_COPY},
2814 {BFD_RELOC_NDS32_GLOB_DAT, R_NDS32_GLOB_DAT},
2815 {BFD_RELOC_NDS32_JMP_SLOT, R_NDS32_JMP_SLOT},
2816 {BFD_RELOC_NDS32_RELATIVE, R_NDS32_RELATIVE},
2817 {BFD_RELOC_NDS32_GOTOFF, R_NDS32_GOTOFF},
2818 {BFD_RELOC_NDS32_GOTPC20, R_NDS32_GOTPC20},
2819 {BFD_RELOC_NDS32_GOT_HI20, R_NDS32_GOT_HI20},
2820 {BFD_RELOC_NDS32_GOT_LO12, R_NDS32_GOT_LO12},
2821 {BFD_RELOC_NDS32_GOT_LO15, R_NDS32_GOT_LO15},
2822 {BFD_RELOC_NDS32_GOT_LO19, R_NDS32_GOT_LO19},
2823 {BFD_RELOC_NDS32_GOTPC_HI20, R_NDS32_GOTPC_HI20},
2824 {BFD_RELOC_NDS32_GOTPC_LO12, R_NDS32_GOTPC_LO12},
2825 {BFD_RELOC_NDS32_GOTOFF_HI20, R_NDS32_GOTOFF_HI20},
2826 {BFD_RELOC_NDS32_GOTOFF_LO12, R_NDS32_GOTOFF_LO12},
2827 {BFD_RELOC_NDS32_GOTOFF_LO15, R_NDS32_GOTOFF_LO15},
2828 {BFD_RELOC_NDS32_GOTOFF_LO19, R_NDS32_GOTOFF_LO19},
2829 {BFD_RELOC_NDS32_INSN16, R_NDS32_INSN16},
2830 {BFD_RELOC_NDS32_LABEL, R_NDS32_LABEL},
2831 {BFD_RELOC_NDS32_LONGCALL1, R_NDS32_LONGCALL1},
2832 {BFD_RELOC_NDS32_LONGCALL2, R_NDS32_LONGCALL2},
2833 {BFD_RELOC_NDS32_LONGCALL3, R_NDS32_LONGCALL3},
1c8f6a4d
KLC
2834 {BFD_RELOC_NDS32_LONGCALL4, R_NDS32_LONGCALL4},
2835 {BFD_RELOC_NDS32_LONGCALL5, R_NDS32_LONGCALL5},
2836 {BFD_RELOC_NDS32_LONGCALL6, R_NDS32_LONGCALL6},
35c08157
KLC
2837 {BFD_RELOC_NDS32_LONGJUMP1, R_NDS32_LONGJUMP1},
2838 {BFD_RELOC_NDS32_LONGJUMP2, R_NDS32_LONGJUMP2},
2839 {BFD_RELOC_NDS32_LONGJUMP3, R_NDS32_LONGJUMP3},
1c8f6a4d
KLC
2840 {BFD_RELOC_NDS32_LONGJUMP4, R_NDS32_LONGJUMP4},
2841 {BFD_RELOC_NDS32_LONGJUMP5, R_NDS32_LONGJUMP5},
2842 {BFD_RELOC_NDS32_LONGJUMP6, R_NDS32_LONGJUMP6},
2843 {BFD_RELOC_NDS32_LONGJUMP7, R_NDS32_LONGJUMP7},
35c08157
KLC
2844 {BFD_RELOC_NDS32_LOADSTORE, R_NDS32_LOADSTORE},
2845 {BFD_RELOC_NDS32_9_FIXED, R_NDS32_9_FIXED_RELA},
2846 {BFD_RELOC_NDS32_15_FIXED, R_NDS32_15_FIXED_RELA},
2847 {BFD_RELOC_NDS32_17_FIXED, R_NDS32_17_FIXED_RELA},
2848 {BFD_RELOC_NDS32_25_FIXED, R_NDS32_25_FIXED_RELA},
2849 {BFD_RELOC_NDS32_PLTREL_HI20, R_NDS32_PLTREL_HI20},
2850 {BFD_RELOC_NDS32_PLTREL_LO12, R_NDS32_PLTREL_LO12},
2851 {BFD_RELOC_NDS32_PLT_GOTREL_HI20, R_NDS32_PLT_GOTREL_HI20},
2852 {BFD_RELOC_NDS32_PLT_GOTREL_LO12, R_NDS32_PLT_GOTREL_LO12},
2853 {BFD_RELOC_NDS32_PLT_GOTREL_LO15, R_NDS32_PLT_GOTREL_LO15},
2854 {BFD_RELOC_NDS32_PLT_GOTREL_LO19, R_NDS32_PLT_GOTREL_LO19},
2855 {BFD_RELOC_NDS32_PLT_GOTREL_LO20, R_NDS32_PLT_GOTREL_LO20},
2856 {BFD_RELOC_NDS32_SDA12S2_DP, R_NDS32_SDA12S2_DP_RELA},
2857 {BFD_RELOC_NDS32_SDA12S2_SP, R_NDS32_SDA12S2_SP_RELA},
2858 {BFD_RELOC_NDS32_LO12S2_DP, R_NDS32_LO12S2_DP_RELA},
2859 {BFD_RELOC_NDS32_LO12S2_SP, R_NDS32_LO12S2_SP_RELA},
2860 {BFD_RELOC_NDS32_SDA16S3, R_NDS32_SDA16S3_RELA},
2861 {BFD_RELOC_NDS32_SDA17S2, R_NDS32_SDA17S2_RELA},
2862 {BFD_RELOC_NDS32_SDA18S1, R_NDS32_SDA18S1_RELA},
2863 {BFD_RELOC_NDS32_SDA19S0, R_NDS32_SDA19S0_RELA},
2864 {BFD_RELOC_NDS32_SDA_FP7U2_RELA, R_NDS32_SDA_FP7U2_RELA},
2865 {BFD_RELOC_NDS32_DWARF2_OP1, R_NDS32_DWARF2_OP1_RELA},
2866 {BFD_RELOC_NDS32_DWARF2_OP2, R_NDS32_DWARF2_OP2_RELA},
2867 {BFD_RELOC_NDS32_DWARF2_LEB, R_NDS32_DWARF2_LEB_RELA},
2868 {BFD_RELOC_NDS32_UPDATE_TA, R_NDS32_UPDATE_TA_RELA},
2869 {BFD_RELOC_NDS32_GOT_SUFF, R_NDS32_GOT_SUFF},
2870 {BFD_RELOC_NDS32_GOTOFF_SUFF, R_NDS32_GOTOFF_SUFF},
2871 {BFD_RELOC_NDS32_GOT15S2, R_NDS32_GOT15S2_RELA},
2872 {BFD_RELOC_NDS32_GOT17S2, R_NDS32_GOT17S2_RELA},
2873 {BFD_RELOC_NDS32_PTR, R_NDS32_PTR},
2874 {BFD_RELOC_NDS32_PTR_COUNT, R_NDS32_PTR_COUNT},
2875 {BFD_RELOC_NDS32_PLT_GOT_SUFF, R_NDS32_PLT_GOT_SUFF},
2876 {BFD_RELOC_NDS32_PTR_RESOLVED, R_NDS32_PTR_RESOLVED},
2877 {BFD_RELOC_NDS32_RELAX_ENTRY, R_NDS32_RELAX_ENTRY},
2878 {BFD_RELOC_NDS32_MULCALL_SUFF, R_NDS32_MULCALL_SUFF},
2879 {BFD_RELOC_NDS32_PLTBLOCK, R_NDS32_PLTBLOCK},
2880 {BFD_RELOC_NDS32_RELAX_REGION_BEGIN, R_NDS32_RELAX_REGION_BEGIN},
2881 {BFD_RELOC_NDS32_RELAX_REGION_END, R_NDS32_RELAX_REGION_END},
2882 {BFD_RELOC_NDS32_MINUEND, R_NDS32_MINUEND},
2883 {BFD_RELOC_NDS32_SUBTRAHEND, R_NDS32_SUBTRAHEND},
1c8f6a4d 2884 {BFD_RELOC_NDS32_EMPTY, R_NDS32_EMPTY},
35c08157
KLC
2885
2886 {BFD_RELOC_NDS32_DIFF8, R_NDS32_DIFF8},
2887 {BFD_RELOC_NDS32_DIFF16, R_NDS32_DIFF16},
2888 {BFD_RELOC_NDS32_DIFF32, R_NDS32_DIFF32},
2889 {BFD_RELOC_NDS32_DIFF_ULEB128, R_NDS32_DIFF_ULEB128},
2890 {BFD_RELOC_NDS32_25_ABS, R_NDS32_25_ABS_RELA},
2891 {BFD_RELOC_NDS32_DATA, R_NDS32_DATA},
2892 {BFD_RELOC_NDS32_TRAN, R_NDS32_TRAN},
2893 {BFD_RELOC_NDS32_17IFC_PCREL, R_NDS32_17IFC_PCREL_RELA},
2894 {BFD_RELOC_NDS32_10IFCU_PCREL, R_NDS32_10IFCU_PCREL_RELA},
1c8f6a4d
KLC
2895 {BFD_RELOC_NDS32_TLS_LE_HI20, R_NDS32_TLS_LE_HI20},
2896 {BFD_RELOC_NDS32_TLS_LE_LO12, R_NDS32_TLS_LE_LO12},
2897 {BFD_RELOC_NDS32_TLS_LE_ADD, R_NDS32_TLS_LE_ADD},
2898 {BFD_RELOC_NDS32_TLS_LE_LS, R_NDS32_TLS_LE_LS},
2899 {BFD_RELOC_NDS32_TLS_IE_HI20, R_NDS32_TLS_IE_HI20},
2900 {BFD_RELOC_NDS32_TLS_IE_LO12S2, R_NDS32_TLS_IE_LO12S2},
2901 {BFD_RELOC_NDS32_TLS_TPOFF, R_NDS32_TLS_TPOFF},
2902 {BFD_RELOC_NDS32_TLS_LE_20, R_NDS32_TLS_LE_20},
2903 {BFD_RELOC_NDS32_TLS_LE_15S0, R_NDS32_TLS_LE_15S0},
2904 {BFD_RELOC_NDS32_TLS_LE_15S1, R_NDS32_TLS_LE_15S1},
2905 {BFD_RELOC_NDS32_TLS_LE_15S2, R_NDS32_TLS_LE_15S2},
35c08157
KLC
2906};
2907
2908/* Patch tag. */
2909
2910static reloc_howto_type *
2911bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2912 const char *r_name)
2913{
2914 unsigned int i;
2915
2916 for (i = 0; i < ARRAY_SIZE (nds32_elf_howto_table); i++)
2917 if (nds32_elf_howto_table[i].name != NULL
2918 && strcasecmp (nds32_elf_howto_table[i].name, r_name) == 0)
2919 return &nds32_elf_howto_table[i];
2920
2921 for (i = 0; i < ARRAY_SIZE (nds32_elf_relax_howto_table); i++)
2922 if (nds32_elf_relax_howto_table[i].name != NULL
2923 && strcasecmp (nds32_elf_relax_howto_table[i].name, r_name) == 0)
2924 return &nds32_elf_relax_howto_table[i];
2925
2926 return NULL;
2927}
2928
2929static reloc_howto_type *
2930bfd_elf32_bfd_reloc_type_table_lookup (enum elf_nds32_reloc_type code)
2931{
2932 if (code < R_NDS32_RELAX_ENTRY)
2933 {
2934 BFD_ASSERT (code < ARRAY_SIZE (nds32_elf_howto_table));
2935 return &nds32_elf_howto_table[code];
2936 }
2937 else
2938 {
2939 BFD_ASSERT ((size_t) (code - R_NDS32_RELAX_ENTRY)
2940 < ARRAY_SIZE (nds32_elf_relax_howto_table));
2941 return &nds32_elf_relax_howto_table[code - R_NDS32_RELAX_ENTRY];
2942 }
2943}
2944
2945static reloc_howto_type *
2946bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2947 bfd_reloc_code_real_type code)
2948{
2949 unsigned int i;
2950
2951 for (i = 0; i < ARRAY_SIZE (nds32_reloc_map); i++)
2952 {
2953 if (nds32_reloc_map[i].bfd_reloc_val == code)
2954 return bfd_elf32_bfd_reloc_type_table_lookup
2955 (nds32_reloc_map[i].elf_reloc_val);
2956 }
2957
2958 return NULL;
2959}
2960
2961/* Set the howto pointer for an NDS32 ELF reloc. */
2962
2963static void
2964nds32_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2965 Elf_Internal_Rela *dst)
2966{
2967 enum elf_nds32_reloc_type r_type;
2968
2969 r_type = ELF32_R_TYPE (dst->r_info);
5860e3f8
NC
2970 if (r_type > R_NDS32_GNU_VTENTRY)
2971 {
64d29018 2972 _bfd_error_handler (_("%B: invalid NDS32 reloc number: %d"), abfd, r_type);
5860e3f8
NC
2973 r_type = 0;
2974 }
35c08157
KLC
2975 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
2976}
2977
2978static void
2979nds32_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2980 Elf_Internal_Rela *dst)
2981{
2982 BFD_ASSERT ((ELF32_R_TYPE (dst->r_info) == R_NDS32_NONE)
2983 || ((ELF32_R_TYPE (dst->r_info) > R_NDS32_GNU_VTENTRY)
2984 && (ELF32_R_TYPE (dst->r_info) < R_NDS32_max)));
2985 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (dst->r_info));
2986}
2987
2988/* Support for core dump NOTE sections.
2989 Reference to include/linux/elfcore.h in Linux. */
2990
2991static bfd_boolean
2992nds32_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2993{
2994 int offset;
2995 size_t size;
2996
2997 switch (note->descsz)
2998 {
2999 case 0x114:
3000 /* Linux/NDS32 32-bit, ABI1 */
3001
3002 /* pr_cursig */
3003 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
3004
3005 /* pr_pid */
3006 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3007
3008 /* pr_reg */
3009 offset = 72;
3010 size = 200;
3011 break;
3012
3013 case 0xfc:
3014 /* Linux/NDS32 32-bit */
3015
3016 /* pr_cursig */
3017 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
3018
3019 /* pr_pid */
3020 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3021
3022 /* pr_reg */
3023 offset = 72;
3024 size = 176;
3025 break;
3026
3027 default:
3028 return FALSE;
3029 }
3030
3031 /* Make a ".reg" section. */
3032 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
3033 size, note->descpos + offset);
3034}
3035
3036static bfd_boolean
3037nds32_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
3038{
3039 switch (note->descsz)
3040 {
3041 case 124:
3042 /* Linux/NDS32 */
3043
3044 /* __kernel_uid_t, __kernel_gid_t are short on NDS32 platform. */
3045 elf_tdata (abfd)->core->program =
3046 _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
3047 elf_tdata (abfd)->core->command =
3048 _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
3049
3050 default:
3051 return FALSE;
3052 }
3053
3054 /* Note that for some reason, a spurious space is tacked
3055 onto the end of the args in some (at least one anyway)
3056 implementations, so strip it off if it exists. */
3057 {
3058 char *command = elf_tdata (abfd)->core->command;
3059 int n = strlen (command);
3060
3061 if (0 < n && command[n - 1] == ' ')
3062 command[n - 1] = '\0';
3063 }
3064
3065 return TRUE;
3066}
3067
3068/* Hook called by the linker routine which adds symbols from an object
3069 file. We must handle the special NDS32 section numbers here.
3070 We also keep watching for whether we need to create the sdata special
3071 linker sections. */
3072
3073static bfd_boolean
3074nds32_elf_add_symbol_hook (bfd *abfd,
3075 struct bfd_link_info *info ATTRIBUTE_UNUSED,
3076 Elf_Internal_Sym *sym,
3077 const char **namep ATTRIBUTE_UNUSED,
3078 flagword *flagsp ATTRIBUTE_UNUSED,
3079 asection **secp, bfd_vma *valp)
3080{
3081 switch (sym->st_shndx)
3082 {
3083 case SHN_COMMON:
3084 /* Common symbols less than the GP size are automatically
3085 treated as SHN_MIPS_SCOMMON symbols. */
3086 if (sym->st_size > elf_gp_size (abfd)
3087 || ELF_ST_TYPE (sym->st_info) == STT_TLS)
3088 break;
3089
3090 /* st_value is the alignemnt constraint.
3091 That might be its actual size if it is an array or structure. */
3092 switch (sym->st_value)
3093 {
3094 case 1:
3095 *secp = bfd_make_section_old_way (abfd, ".scommon_b");
3096 break;
3097 case 2:
3098 *secp = bfd_make_section_old_way (abfd, ".scommon_h");
3099 break;
3100 case 4:
3101 *secp = bfd_make_section_old_way (abfd, ".scommon_w");
3102 break;
3103 case 8:
3104 *secp = bfd_make_section_old_way (abfd, ".scommon_d");
3105 break;
3106 default:
3107 return TRUE;
3108 }
3109
3110 (*secp)->flags |= SEC_IS_COMMON;
3111 *valp = sym->st_size;
3112 break;
3113 }
3114
3115 return TRUE;
3116}
3117
3118
3119/* This function can figure out the best location for a base register to access
3120 data relative to this base register
3121 INPUT:
3122 sda_d0: size of first DOUBLE WORD data section
3123 sda_w0: size of first WORD data section
3124 sda_h0: size of first HALF WORD data section
3125 sda_b : size of BYTE data section
3126 sda_hi: size of second HALF WORD data section
3127 sda_w1: size of second WORD data section
3128 sda_d1: size of second DOUBLE WORD data section
3129 OUTPUT:
3130 offset (always positive) from the beginning of sda_d0 if OK
3131 a negative error value if fail
3132 NOTE:
3133 these 7 sections have to be located back to back if exist
3134 a pass in 0 value for non-existing section */
3135
3136/* Due to the interpretation of simm15 field of load/store depending on
3137 data accessing size, the organization of base register relative data shall
3138 like the following figure
3139 -------------------------------------------
3140 | DOUBLE WORD sized data (range +/- 128K)
3141 -------------------------------------------
3142 | WORD sized data (range +/- 64K)
3143 -------------------------------------------
3144 | HALF WORD sized data (range +/- 32K)
3145 -------------------------------------------
3146 | BYTE sized data (range +/- 16K)
3147 -------------------------------------------
3148 | HALF WORD sized data (range +/- 32K)
3149 -------------------------------------------
3150 | WORD sized data (range +/- 64K)
3151 -------------------------------------------
3152 | DOUBLE WORD sized data (range +/- 128K)
3153 -------------------------------------------
3154 Its base register shall be set to access these data freely. */
3155
3156/* We have to figure out the SDA_BASE value, so that we can adjust the
3157 symbol value correctly. We look up the symbol _SDA_BASE_ in the output
3158 BFD. If we can't find it, we're stuck. We cache it in the ELF
3159 target data. We don't need to adjust the symbol value for an
3160 external symbol if we are producing relocatable output. */
3161
3162static asection *sda_rela_sec = NULL;
3163
1c8f6a4d 3164#define SDA_SECTION_NUM 10
35c08157
KLC
3165
3166static bfd_reloc_status_type
3167nds32_elf_final_sda_base (bfd *output_bfd, struct bfd_link_info *info,
3168 bfd_vma *psb, bfd_boolean add_symbol)
3169{
3170 int relax_fp_as_gp;
3171 struct elf_nds32_link_hash_table *table;
3172 struct bfd_link_hash_entry *h, *h2;
1c8f6a4d 3173 long unsigned int total = 0;
35c08157
KLC
3174
3175 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", FALSE, FALSE, TRUE);
3176 if (!h || (h->type != bfd_link_hash_defined && h->type != bfd_link_hash_defweak))
3177 {
3178 asection *first = NULL, *final = NULL, *temp;
3179 bfd_vma sda_base;
3180 /* The first section must be 4-byte aligned to promise _SDA_BASE_ being
3181 4 byte-aligned. Therefore, it has to set the first section ".data"
3182 4 byte-aligned. */
3183 static const char sec_name[SDA_SECTION_NUM][10] =
3184 {
3185 ".data", ".got", ".sdata_d", ".sdata_w", ".sdata_h", ".sdata_b",
1c8f6a4d 3186 ".sbss_b", ".sbss_h", ".sbss_w", ".sbss_d"
35c08157
KLC
3187 };
3188 size_t i = 0;
3189
3190 if (output_bfd->sections == NULL)
3191 {
3192 *psb = elf_gp (output_bfd);
3193 return bfd_reloc_ok;
3194 }
3195
3196 /* Get the first and final section. */
1c8f6a4d 3197 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
35c08157
KLC
3198 {
3199 temp = bfd_get_section_by_name (output_bfd, sec_name[i]);
3200 if (temp && !first && (temp->size != 0 || temp->rawsize != 0))
3201 first = temp;
3202 if (temp && (temp->size != 0 || temp->rawsize != 0))
3203 final = temp;
1c8f6a4d
KLC
3204
3205 /* Summarize the sections in order to check if joining .bss. */
3206 if (temp && temp->size != 0)
3207 total += temp->size;
3208 else if (temp && temp->rawsize != 0)
3209 total += temp->rawsize;
3210
35c08157
KLC
3211 i++;
3212 }
3213
1c8f6a4d
KLC
3214 /* Check .bss size. */
3215 temp = bfd_get_section_by_name (output_bfd, ".bss");
3216 if (temp)
3217 {
3218 if (temp->size != 0)
3219 total += temp->size;
3220 else if (temp->rawsize != 0)
3221 total += temp->rawsize;
3222
3223 if (total < 0x80000)
3224 {
3225 if (!first && (temp->size != 0 || temp->rawsize != 0))
3226 first = temp;
3227 if ((temp->size != 0 || temp->rawsize != 0))
3228 final = temp;
3229 }
3230 }
3231
35c08157
KLC
3232 if (first && final)
3233 {
3234 /* The middle of data region. */
1c8f6a4d 3235 sda_base = final->vma / 2 + final->rawsize / 2 + first->vma / 2;
35c08157
KLC
3236
3237 /* Find the section sda_base located. */
3238 i = 0;
1c8f6a4d 3239 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
35c08157
KLC
3240 {
3241 final = bfd_get_section_by_name (output_bfd, sec_name[i]);
3242 if (final && (final->size != 0 || final->rawsize != 0)
3243 && sda_base >= final->vma)
3244 {
3245 first = final;
3246 i++;
3247 }
3248 else
3249 break;
3250 }
3251 }
3252 else
3253 {
3254 /* There is not any data section in output bfd, and set _SDA_BASE_ in
3255 first output section. */
3256 first = output_bfd->sections;
3257 while (first && first->size == 0 && first->rawsize == 0)
3258 first = first->next;
3259 if (!first)
3260 {
3261 *psb = elf_gp (output_bfd);
3262 return bfd_reloc_ok;
3263 }
1c8f6a4d 3264 sda_base = first->vma + first->rawsize;
35c08157
KLC
3265 }
3266
3267 sda_base -= first->vma;
3268 sda_base = sda_base & (~7);
3269
3270 if (!_bfd_generic_link_add_one_symbol
3271 (info, output_bfd, "_SDA_BASE_", BSF_GLOBAL | BSF_WEAK, first,
3272 (bfd_vma) sda_base, (const char *) NULL, FALSE,
3273 get_elf_backend_data (output_bfd)->collect, &h))
3274 return FALSE;
3275
3276 sda_rela_sec = first;
3277
3278 table = nds32_elf_hash_table (info);
3279 relax_fp_as_gp = table->relax_fp_as_gp;
3280 if (relax_fp_as_gp)
3281 {
3282 h2 = bfd_link_hash_lookup (info->hash, FP_BASE_NAME,
3283 FALSE, FALSE, FALSE);
3284 /* Define a weak FP_BASE_NAME here to prevent the undefined symbol.
3285 And set FP equal to SDA_BASE to do relaxation for
3286 la $fp, _FP_BASE_. */
3287 if (!_bfd_generic_link_add_one_symbol
3288 (info, output_bfd, FP_BASE_NAME, BSF_GLOBAL | BSF_WEAK,
3289 first, (bfd_vma) sda_base, (const char *) NULL,
3290 FALSE, get_elf_backend_data (output_bfd)->collect, &h2))
3291 return FALSE;
3292 }
3293 }
3294
3295 if (add_symbol == TRUE)
3296 {
3297 if (h)
3298 {
3299 /* Now set gp. */
3300 elf_gp (output_bfd) = (h->u.def.value
3301 + h->u.def.section->output_section->vma
3302 + h->u.def.section->output_offset);
3303 }
3304 else
3305 {
4eca0228 3306 _bfd_error_handler (_("error: Can't find symbol: _SDA_BASE_."));
35c08157
KLC
3307 return bfd_reloc_dangerous;
3308 }
3309 }
3310
3311 *psb = h->u.def.value + h->u.def.section->output_section->vma
3312 + h->u.def.section->output_offset;
3313 return bfd_reloc_ok;
3314}
3315\f
3316
3317/* Return size of a PLT entry. */
3318#define elf_nds32_sizeof_plt(info) PLT_ENTRY_SIZE
3319
3320
3321/* Create an entry in an nds32 ELF linker hash table. */
3322
3323static struct bfd_hash_entry *
3324nds32_elf_link_hash_newfunc (struct bfd_hash_entry *entry,
3325 struct bfd_hash_table *table,
3326 const char *string)
3327{
3328 struct elf_nds32_link_hash_entry *ret;
3329
3330 ret = (struct elf_nds32_link_hash_entry *) entry;
3331
3332 /* Allocate the structure if it has not already been allocated by a
3333 subclass. */
3334 if (ret == NULL)
3335 ret = (struct elf_nds32_link_hash_entry *)
3336 bfd_hash_allocate (table, sizeof (struct elf_nds32_link_hash_entry));
3337
3338 if (ret == NULL)
3339 return (struct bfd_hash_entry *) ret;
3340
3341 /* Call the allocation method of the superclass. */
3342 ret = (struct elf_nds32_link_hash_entry *)
3343 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, table, string);
3344
3345 if (ret != NULL)
3346 {
3347 struct elf_nds32_link_hash_entry *eh;
3348
3349 eh = (struct elf_nds32_link_hash_entry *) ret;
3350 eh->dyn_relocs = NULL;
1c8f6a4d 3351 eh->tls_type = GOT_UNKNOWN;
35c08157
KLC
3352 }
3353
3354 return (struct bfd_hash_entry *) ret;
3355}
3356
3357/* Create an nds32 ELF linker hash table. */
3358
3359static struct bfd_link_hash_table *
3360nds32_elf_link_hash_table_create (bfd *abfd)
3361{
3362 struct elf_nds32_link_hash_table *ret;
3363
3364 bfd_size_type amt = sizeof (struct elf_nds32_link_hash_table);
3365
3366 ret = (struct elf_nds32_link_hash_table *) bfd_zmalloc (amt);
3367 if (ret == NULL)
3368 return NULL;
3369
3370 /* patch tag. */
3371 if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
3372 nds32_elf_link_hash_newfunc,
3373 sizeof (struct elf_nds32_link_hash_entry),
3374 NDS32_ELF_DATA))
3375 {
3376 free (ret);
3377 return NULL;
3378 }
3379
3380 ret->sgot = NULL;
3381 ret->sgotplt = NULL;
3382 ret->srelgot = NULL;
3383 ret->splt = NULL;
3384 ret->srelplt = NULL;
3385 ret->sdynbss = NULL;
3386 ret->srelbss = NULL;
3387 ret->sym_ld_script = NULL;
3388 ret->ex9_export_file = NULL;
3389 ret->ex9_import_file = NULL;
3390
3391 return &ret->root.root;
3392}
3393
3394/* Create .got, .gotplt, and .rela.got sections in DYNOBJ, and set up
3395 shortcuts to them in our hash table. */
3396
3397static bfd_boolean
3398create_got_section (bfd *dynobj, struct bfd_link_info *info)
3399{
3400 struct elf_nds32_link_hash_table *htab;
3401
3402 if (!_bfd_elf_create_got_section (dynobj, info))
3403 return FALSE;
3404
3405 htab = nds32_elf_hash_table (info);
3406 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
3407 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
3408 if (!htab->sgot || !htab->sgotplt)
3409 abort ();
3410
3411 /* _bfd_elf_create_got_section will create it for us. */
3412 htab->srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
3413 if (htab->srelgot == NULL
3414 || !bfd_set_section_flags (dynobj, htab->srelgot,
3415 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3416 | SEC_IN_MEMORY | SEC_LINKER_CREATED
3417 | SEC_READONLY))
3418 || !bfd_set_section_alignment (dynobj, htab->srelgot, 2))
3419 return FALSE;
3420
3421 return TRUE;
3422}
3423
3424/* Create dynamic sections when linking against a dynamic object. */
3425
3426static bfd_boolean
3427nds32_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
3428{
3429 struct elf_nds32_link_hash_table *htab;
3430 flagword flags, pltflags;
3431 register asection *s;
3432 const struct elf_backend_data *bed;
3433 int ptralign = 2; /* 32-bit */
3434
3435 bed = get_elf_backend_data (abfd);
3436
3437 htab = nds32_elf_hash_table (info);
3438
3439 /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and
3440 .rel[a].bss sections. */
3441
3442 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3443 | SEC_LINKER_CREATED);
3444
3445 pltflags = flags;
3446 pltflags |= SEC_CODE;
3447 if (bed->plt_not_loaded)
3448 pltflags &= ~(SEC_LOAD | SEC_HAS_CONTENTS);
3449 if (bed->plt_readonly)
3450 pltflags |= SEC_READONLY;
3451
3452 s = bfd_make_section (abfd, ".plt");
3453 htab->splt = s;
3454 if (s == NULL
3455 || !bfd_set_section_flags (abfd, s, pltflags)
3456 || !bfd_set_section_alignment (abfd, s, bed->plt_alignment))
3457 return FALSE;
3458
3459 if (bed->want_plt_sym)
3460 {
3461 /* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the
3462 .plt section. */
3463 struct bfd_link_hash_entry *bh = NULL;
3464 struct elf_link_hash_entry *h;
3465
3466 if (!(_bfd_generic_link_add_one_symbol
3467 (info, abfd, "_PROCEDURE_LINKAGE_TABLE_", BSF_GLOBAL, s,
3468 (bfd_vma) 0, (const char *) NULL, FALSE,
3469 get_elf_backend_data (abfd)->collect, &bh)))
3470 return FALSE;
3471
3472 h = (struct elf_link_hash_entry *) bh;
3473 h->def_regular = 1;
3474 h->type = STT_OBJECT;
3475
0e1862bb 3476 if (bfd_link_pic (info) && !bfd_elf_link_record_dynamic_symbol (info, h))
35c08157
KLC
3477 return FALSE;
3478 }
3479
3480 s = bfd_make_section (abfd,
3481 bed->default_use_rela_p ? ".rela.plt" : ".rel.plt");
3482 htab->srelplt = s;
3483 if (s == NULL
3484 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3485 || !bfd_set_section_alignment (abfd, s, ptralign))
3486 return FALSE;
3487
3488 if (htab->sgot == NULL && !create_got_section (abfd, info))
3489 return FALSE;
3490
3491 {
3492 const char *secname;
3493 char *relname;
3494 flagword secflags;
3495 asection *sec;
3496
3497 for (sec = abfd->sections; sec; sec = sec->next)
3498 {
3499 secflags = bfd_get_section_flags (abfd, sec);
3500 if ((secflags & (SEC_DATA | SEC_LINKER_CREATED))
3501 || ((secflags & SEC_HAS_CONTENTS) != SEC_HAS_CONTENTS))
3502 continue;
3503 secname = bfd_get_section_name (abfd, sec);
3504 relname = (char *) bfd_malloc ((bfd_size_type) strlen (secname) + 6);
3505 strcpy (relname, ".rela");
3506 strcat (relname, secname);
3507 if (bfd_get_section_by_name (abfd, secname))
3508 continue;
3509 s = bfd_make_section (abfd, relname);
3510 if (s == NULL
3511 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3512 || !bfd_set_section_alignment (abfd, s, ptralign))
3513 return FALSE;
3514 }
3515 }
3516
3517 if (bed->want_dynbss)
3518 {
3519 /* The .dynbss section is a place to put symbols which are defined
3520 by dynamic objects, are referenced by regular objects, and are
3521 not functions. We must allocate space for them in the process
3522 image and use a R_*_COPY reloc to tell the dynamic linker to
3523 initialize them at run time. The linker script puts the .dynbss
3524 section into the .bss section of the final image. */
3525 s = bfd_make_section (abfd, ".dynbss");
3526 htab->sdynbss = s;
3527 if (s == NULL
3528 || !bfd_set_section_flags (abfd, s, SEC_ALLOC | SEC_LINKER_CREATED))
3529 return FALSE;
3530 /* The .rel[a].bss section holds copy relocs. This section is not
3531 normally needed. We need to create it here, though, so that the
3532 linker will map it to an output section. We can't just create it
3533 only if we need it, because we will not know whether we need it
3534 until we have seen all the input files, and the first time the
3535 main linker code calls BFD after examining all the input files
3536 (size_dynamic_sections) the input sections have already been
3537 mapped to the output sections. If the section turns out not to
3538 be needed, we can discard it later. We will never need this
3539 section when generating a shared object, since they do not use
3540 copy relocs. */
0e1862bb 3541 if (!bfd_link_pic (info))
35c08157
KLC
3542 {
3543 s = bfd_make_section (abfd, (bed->default_use_rela_p
3544 ? ".rela.bss" : ".rel.bss"));
3545 htab->srelbss = s;
3546 if (s == NULL
3547 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3548 || !bfd_set_section_alignment (abfd, s, ptralign))
3549 return FALSE;
3550 }
3551 }
3552
3553 return TRUE;
3554}
3555
3556/* Copy the extra info we tack onto an elf_link_hash_entry. */
3557static void
3558nds32_elf_copy_indirect_symbol (struct bfd_link_info *info,
3559 struct elf_link_hash_entry *dir,
3560 struct elf_link_hash_entry *ind)
3561{
3562 struct elf_nds32_link_hash_entry *edir, *eind;
3563
3564 edir = (struct elf_nds32_link_hash_entry *) dir;
3565 eind = (struct elf_nds32_link_hash_entry *) ind;
3566
3567 if (eind->dyn_relocs != NULL)
3568 {
3569 if (edir->dyn_relocs != NULL)
3570 {
3571 struct elf_nds32_dyn_relocs **pp;
3572 struct elf_nds32_dyn_relocs *p;
3573
3574 if (ind->root.type == bfd_link_hash_indirect)
3575 abort ();
3576
3577 /* Add reloc counts against the weak sym to the strong sym
3578 list. Merge any entries against the same section. */
3579 for (pp = &eind->dyn_relocs; (p = *pp) != NULL;)
3580 {
3581 struct elf_nds32_dyn_relocs *q;
3582
3583 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3584 if (q->sec == p->sec)
3585 {
3586 q->pc_count += p->pc_count;
3587 q->count += p->count;
3588 *pp = p->next;
3589 break;
3590 }
3591 if (q == NULL)
3592 pp = &p->next;
3593 }
3594 *pp = edir->dyn_relocs;
3595 }
3596
3597 edir->dyn_relocs = eind->dyn_relocs;
3598 eind->dyn_relocs = NULL;
3599 }
3600
3601 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3602}
3603\f
3604
3605/* Adjust a symbol defined by a dynamic object and referenced by a
3606 regular object. The current definition is in some section of the
3607 dynamic object, but we're not including those sections. We have to
3608 change the definition to something the rest of the link can
3609 understand. */
3610
3611static bfd_boolean
3612nds32_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
3613 struct elf_link_hash_entry *h)
3614{
3615 struct elf_nds32_link_hash_table *htab;
3616 struct elf_nds32_link_hash_entry *eh;
3617 struct elf_nds32_dyn_relocs *p;
3618 bfd *dynobj;
3619 asection *s;
3620 unsigned int power_of_two;
3621
3622 dynobj = elf_hash_table (info)->dynobj;
3623
3624 /* Make sure we know what is going on here. */
3625 BFD_ASSERT (dynobj != NULL
3626 && (h->needs_plt
3627 || h->u.weakdef != NULL
3628 || (h->def_dynamic && h->ref_regular && !h->def_regular)));
3629
3630
3631 /* If this is a function, put it in the procedure linkage table. We
3632 will fill in the contents of the procedure linkage table later,
3633 when we know the address of the .got section. */
3634 if (h->type == STT_FUNC || h->needs_plt)
3635 {
0e1862bb 3636 if (!bfd_link_pic (info)
35c08157
KLC
3637 && !h->def_dynamic
3638 && !h->ref_dynamic
3639 && h->root.type != bfd_link_hash_undefweak
3640 && h->root.type != bfd_link_hash_undefined)
3641 {
3642 /* This case can occur if we saw a PLT reloc in an input
3643 file, but the symbol was never referred to by a dynamic
3644 object. In such a case, we don't actually need to build
3645 a procedure linkage table, and we can just do a PCREL
3646 reloc instead. */
3647 h->plt.offset = (bfd_vma) - 1;
3648 h->needs_plt = 0;
3649 }
3650
3651 return TRUE;
3652 }
3653 else
3654 h->plt.offset = (bfd_vma) - 1;
3655
3656 /* If this is a weak symbol, and there is a real definition, the
3657 processor independent code will have arranged for us to see the
3658 real definition first, and we can just use the same value. */
3659 if (h->u.weakdef != NULL)
3660 {
3661 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
3662 || h->u.weakdef->root.type == bfd_link_hash_defweak);
3663 h->root.u.def.section = h->u.weakdef->root.u.def.section;
3664 h->root.u.def.value = h->u.weakdef->root.u.def.value;
3665 return TRUE;
3666 }
3667
3668 /* This is a reference to a symbol defined by a dynamic object which
3669 is not a function. */
3670
3671 /* If we are creating a shared library, we must presume that the
3672 only references to the symbol are via the global offset table.
3673 For such cases we need not do anything here; the relocations will
3674 be handled correctly by relocate_section. */
0e1862bb 3675 if (bfd_link_pic (info))
35c08157
KLC
3676 return TRUE;
3677
3678 /* If there are no references to this symbol that do not use the
3679 GOT, we don't need to generate a copy reloc. */
3680 if (!h->non_got_ref)
3681 return TRUE;
3682
3683 /* If -z nocopyreloc was given, we won't generate them either. */
3684 if (info->nocopyreloc)
3685 {
3686 h->non_got_ref = 0;
3687 return TRUE;
3688 }
3689
3690 eh = (struct elf_nds32_link_hash_entry *) h;
3691 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3692 {
3693 s = p->sec->output_section;
3694 if (s != NULL && (s->flags & (SEC_READONLY | SEC_HAS_CONTENTS)) != 0)
3695 break;
3696 }
3697
3698 /* If we didn't find any dynamic relocs in sections which needs the
3699 copy reloc, then we'll be keeping the dynamic relocs and avoiding
3700 the copy reloc. */
3701 if (p == NULL)
3702 {
3703 h->non_got_ref = 0;
3704 return TRUE;
3705 }
3706
3707 /* We must allocate the symbol in our .dynbss section, which will
3708 become part of the .bss section of the executable. There will be
3709 an entry for this symbol in the .dynsym section. The dynamic
3710 object will contain position independent code, so all references
3711 from the dynamic object to this symbol will go through the global
3712 offset table. The dynamic linker will use the .dynsym entry to
3713 determine the address it must put in the global offset table, so
3714 both the dynamic object and the regular object will refer to the
3715 same memory location for the variable. */
3716
3717 htab = nds32_elf_hash_table (info);
3718 s = htab->sdynbss;
3719 BFD_ASSERT (s != NULL);
3720
3721 /* We must generate a R_NDS32_COPY reloc to tell the dynamic linker
3722 to copy the initial value out of the dynamic object and into the
3723 runtime process image. We need to remember the offset into the
3724 .rela.bss section we are going to use. */
3725 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
3726 {
3727 asection *srel;
3728
3729 srel = htab->srelbss;
3730 BFD_ASSERT (srel != NULL);
3731 srel->size += sizeof (Elf32_External_Rela);
3732 h->needs_copy = 1;
3733 }
3734
3735 /* We need to figure out the alignment required for this symbol. I
3736 have no idea how ELF linkers handle this. */
3737 power_of_two = bfd_log2 (h->size);
3738 if (power_of_two > 3)
3739 power_of_two = 3;
3740
3741 /* Apply the required alignment. */
3742 s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two));
3743 if (power_of_two > bfd_get_section_alignment (dynobj, s))
3744 {
3745 if (!bfd_set_section_alignment (dynobj, s, power_of_two))
3746 return FALSE;
3747 }
3748
3749 /* Define the symbol as being at this point in the section. */
3750 h->root.u.def.section = s;
3751 h->root.u.def.value = s->size;
3752
3753 /* Increment the section size to make room for the symbol. */
3754 s->size += h->size;
3755
3756 return TRUE;
3757}
3758
3759/* Allocate space in .plt, .got and associated reloc sections for
3760 dynamic relocs. */
3761
3762static bfd_boolean
3763allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3764{
3765 struct bfd_link_info *info;
3766 struct elf_nds32_link_hash_table *htab;
3767 struct elf_nds32_link_hash_entry *eh;
3768 struct elf_nds32_dyn_relocs *p;
3769
3770 if (h->root.type == bfd_link_hash_indirect)
3771 return TRUE;
3772
3773 if (h->root.type == bfd_link_hash_warning)
3774 /* When warning symbols are created, they **replace** the "real"
3775 entry in the hash table, thus we never get to see the real
3776 symbol in a hash traversal. So look at it now. */
3777 h = (struct elf_link_hash_entry *) h->root.u.i.link;
3778
3779 info = (struct bfd_link_info *) inf;
3780 htab = nds32_elf_hash_table (info);
3781
3782 eh = (struct elf_nds32_link_hash_entry *) h;
3783
3784 if (htab->root.dynamic_sections_created && h->plt.refcount > 0)
3785 {
3786 /* Make sure this symbol is output as a dynamic symbol.
3787 Undefined weak syms won't yet be marked as dynamic. */
3788 if (h->dynindx == -1 && !h->forced_local)
3789 {
3790 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3791 return FALSE;
3792 }
3793
0e1862bb 3794 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, bfd_link_pic (info), h))
35c08157
KLC
3795 {
3796 asection *s = htab->splt;
3797
3798 /* If this is the first .plt entry, make room for the special
3799 first entry. */
3800 if (s->size == 0)
3801 s->size += PLT_ENTRY_SIZE;
3802
3803 h->plt.offset = s->size;
3804
3805 /* If this symbol is not defined in a regular file, and we are
3806 not generating a shared library, then set the symbol to this
3807 location in the .plt. This is required to make function
3808 pointers compare as equal between the normal executable and
3809 the shared library. */
0e1862bb 3810 if (!bfd_link_pic (info) && !h->def_regular)
35c08157
KLC
3811 {
3812 h->root.u.def.section = s;
3813 h->root.u.def.value = h->plt.offset;
3814 }
3815
3816 /* Make room for this entry. */
3817 s->size += PLT_ENTRY_SIZE;
3818
3819 /* We also need to make an entry in the .got.plt section, which
3820 will be placed in the .got section by the linker script. */
3821 htab->sgotplt->size += 4;
3822
3823 /* We also need to make an entry in the .rel.plt section. */
3824 htab->srelplt->size += sizeof (Elf32_External_Rela);
3825 }
3826 else
3827 {
3828 h->plt.offset = (bfd_vma) - 1;
3829 h->needs_plt = 0;
3830 }
3831 }
3832 else
3833 {
3834 h->plt.offset = (bfd_vma) - 1;
3835 h->needs_plt = 0;
3836 }
3837
3838 if (h->got.refcount > 0)
3839 {
3840 asection *s;
3841 bfd_boolean dyn;
1c8f6a4d 3842 int tls_type = elf32_nds32_hash_entry (h)->tls_type;
35c08157
KLC
3843
3844 /* Make sure this symbol is output as a dynamic symbol.
3845 Undefined weak syms won't yet be marked as dynamic. */
3846 if (h->dynindx == -1 && !h->forced_local)
3847 {
3848 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3849 return FALSE;
3850 }
3851
3852 s = htab->sgot;
35c08157 3853 h->got.offset = s->size;
1c8f6a4d
KLC
3854
3855 if (tls_type == GOT_UNKNOWN)
3856 abort ();
3857 else if (tls_type == GOT_NORMAL
3858 || tls_type == GOT_TLS_IE)
3859 /* Need a GOT slot. */
3860 s->size += 4;
3861
35c08157 3862 dyn = htab->root.dynamic_sections_created;
0e1862bb 3863 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h))
35c08157
KLC
3864 htab->srelgot->size += sizeof (Elf32_External_Rela);
3865 }
3866 else
3867 h->got.offset = (bfd_vma) - 1;
3868
3869 if (eh->dyn_relocs == NULL)
3870 return TRUE;
3871
3872 /* In the shared -Bsymbolic case, discard space allocated for
3873 dynamic pc-relative relocs against symbols which turn out to be
3874 defined in regular objects. For the normal shared case, discard
3875 space for pc-relative relocs that have become local due to symbol
3876 visibility changes. */
3877
0e1862bb 3878 if (bfd_link_pic (info))
35c08157
KLC
3879 {
3880 if (h->def_regular && (h->forced_local || info->symbolic))
3881 {
3882 struct elf_nds32_dyn_relocs **pp;
3883
3884 for (pp = &eh->dyn_relocs; (p = *pp) != NULL;)
3885 {
3886 p->count -= p->pc_count;
3887 p->pc_count = 0;
3888 if (p->count == 0)
3889 *pp = p->next;
3890 else
3891 pp = &p->next;
3892 }
3893 }
3894 }
3895 else
3896 {
3897 /* For the non-shared case, discard space for relocs against
3898 symbols which turn out to need copy relocs or are not dynamic. */
3899
3900 if (!h->non_got_ref
3901 && ((h->def_dynamic
3902 && !h->def_regular)
3903 || (htab->root.dynamic_sections_created
3904 && (h->root.type == bfd_link_hash_undefweak
3905 || h->root.type == bfd_link_hash_undefined))))
3906 {
3907 /* Make sure this symbol is output as a dynamic symbol.
3908 Undefined weak syms won't yet be marked as dynamic. */
3909 if (h->dynindx == -1 && !h->forced_local)
3910 {
3911 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3912 return FALSE;
3913 }
3914
3915 /* If that succeeded, we know we'll be keeping all the
3916 relocs. */
3917 if (h->dynindx != -1)
3918 goto keep;
3919 }
3920
3921 eh->dyn_relocs = NULL;
3922
3923 keep:;
3924 }
3925
3926 /* Finally, allocate space. */
3927 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3928 {
3929 asection *sreloc = elf_section_data (p->sec)->sreloc;
3930 sreloc->size += p->count * sizeof (Elf32_External_Rela);
3931 }
3932
3933 return TRUE;
3934}
3935
3936/* Find any dynamic relocs that apply to read-only sections. */
3937
3938static bfd_boolean
3939readonly_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3940{
3941 struct elf_nds32_link_hash_entry *eh;
3942 struct elf_nds32_dyn_relocs *p;
3943
3944 if (h->root.type == bfd_link_hash_warning)
3945 h = (struct elf_link_hash_entry *) h->root.u.i.link;
3946
3947 eh = (struct elf_nds32_link_hash_entry *) h;
3948 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3949 {
3950 asection *s = p->sec->output_section;
3951
3952 if (s != NULL && (s->flags & SEC_READONLY) != 0)
3953 {
3954 struct bfd_link_info *info = (struct bfd_link_info *) inf;
3955
3956 info->flags |= DF_TEXTREL;
3957
3958 /* Not an error, just cut short the traversal. */
3959 return FALSE;
3960 }
3961 }
3962 return TRUE;
3963}
3964
3965/* Set the sizes of the dynamic sections. */
3966
3967static bfd_boolean
3968nds32_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
3969 struct bfd_link_info *info)
3970{
3971 struct elf_nds32_link_hash_table *htab;
3972 bfd *dynobj;
3973 asection *s;
3974 bfd_boolean relocs;
3975 bfd *ibfd;
3976
3977 htab = nds32_elf_hash_table (info);
3978 dynobj = htab->root.dynobj;
3979 BFD_ASSERT (dynobj != NULL);
3980
3981 if (htab->root.dynamic_sections_created)
3982 {
3983 /* Set the contents of the .interp section to the interpreter. */
9b8b325a 3984 if (!bfd_link_pic (info) && !info->nointerp)
35c08157
KLC
3985 {
3986 s = bfd_get_section_by_name (dynobj, ".interp");
3987 BFD_ASSERT (s != NULL);
3988 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
3989 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
3990 }
3991 }
3992
3993 /* Set up .got offsets for local syms, and space for local dynamic
3994 relocs. */
c72f2fb2 3995 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
35c08157
KLC
3996 {
3997 bfd_signed_vma *local_got;
3998 bfd_signed_vma *end_local_got;
3999 bfd_size_type locsymcount;
4000 Elf_Internal_Shdr *symtab_hdr;
4001 asection *srel;
4002
4003 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour)
4004 continue;
4005
4006 for (s = ibfd->sections; s != NULL; s = s->next)
4007 {
4008 struct elf_nds32_dyn_relocs *p;
4009
4010 for (p = ((struct elf_nds32_dyn_relocs *)
4011 elf_section_data (s)->local_dynrel);
4012 p != NULL; p = p->next)
4013 {
4014 if (!bfd_is_abs_section (p->sec)
4015 && bfd_is_abs_section (p->sec->output_section))
4016 {
4017 /* Input section has been discarded, either because
4018 it is a copy of a linkonce section or due to
4019 linker script /DISCARD/, so we'll be discarding
4020 the relocs too. */
4021 }
4022 else if (p->count != 0)
4023 {
4024 srel = elf_section_data (p->sec)->sreloc;
4025 srel->size += p->count * sizeof (Elf32_External_Rela);
4026 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
4027 info->flags |= DF_TEXTREL;
4028 }
4029 }
4030 }
4031
4032 local_got = elf_local_got_refcounts (ibfd);
4033 if (!local_got)
4034 continue;
4035
4036 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
4037 locsymcount = symtab_hdr->sh_info;
4038 end_local_got = local_got + locsymcount;
4039 s = htab->sgot;
4040 srel = htab->srelgot;
4041 for (; local_got < end_local_got; ++local_got)
4042 {
4043 if (*local_got > 0)
4044 {
4045 *local_got = s->size;
4046 s->size += 4;
0e1862bb 4047 if (bfd_link_pic (info))
35c08157
KLC
4048 srel->size += sizeof (Elf32_External_Rela);
4049 }
4050 else
4051 *local_got = (bfd_vma) - 1;
4052 }
4053 }
4054
4055 /* Allocate global sym .plt and .got entries, and space for global
4056 sym dynamic relocs. */
4057 elf_link_hash_traverse (&htab->root, allocate_dynrelocs, (void *) info);
4058
4059 /* We now have determined the sizes of the various dynamic sections.
4060 Allocate memory for them. */
4061 relocs = FALSE;
4062 for (s = dynobj->sections; s != NULL; s = s->next)
4063 {
4064 if ((s->flags & SEC_LINKER_CREATED) == 0)
4065 continue;
4066
4067 if (s == htab->splt)
4068 {
4069 /* Strip this section if we don't need it; see the
4070 comment below. */
4071 }
4072 else if (s == htab->sgot)
4073 {
4074 got_size += s->size;
4075 }
4076 else if (s == htab->sgotplt)
4077 {
4078 got_size += s->size;
4079 }
4080 else if (strncmp (bfd_get_section_name (dynobj, s), ".rela", 5) == 0)
4081 {
4082 if (s->size != 0 && s != htab->srelplt)
4083 relocs = TRUE;
4084
4085 /* We use the reloc_count field as a counter if we need
4086 to copy relocs into the output file. */
4087 s->reloc_count = 0;
4088 }
4089 else
4090 {
4091 /* It's not one of our sections, so don't allocate space. */
4092 continue;
4093 }
4094
4095 if (s->size == 0)
4096 {
4097 /* If we don't need this section, strip it from the
4098 output file. This is mostly to handle .rela.bss and
4099 .rela.plt. We must create both sections in
4100 create_dynamic_sections, because they must be created
4101 before the linker maps input sections to output
4102 sections. The linker does that before
4103 adjust_dynamic_symbol is called, and it is that
4104 function which decides whether anything needs to go
4105 into these sections. */
4106 s->flags |= SEC_EXCLUDE;
4107 continue;
4108 }
4109
4110 /* Allocate memory for the section contents. We use bfd_zalloc
4111 here in case unused entries are not reclaimed before the
4112 section's contents are written out. This should not happen,
4113 but this way if it does, we get a R_NDS32_NONE reloc instead
4114 of garbage. */
4115 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
4116 if (s->contents == NULL)
4117 return FALSE;
4118 }
4119
4120
4121 if (htab->root.dynamic_sections_created)
4122 {
4123 /* Add some entries to the .dynamic section. We fill in the
4124 values later, in nds32_elf_finish_dynamic_sections, but we
4125 must add the entries now so that we get the correct size for
4126 the .dynamic section. The DT_DEBUG entry is filled in by the
4127 dynamic linker and used by the debugger. */
4128#define add_dynamic_entry(TAG, VAL) \
4129 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
4130
0e1862bb 4131 if (!bfd_link_pic (info))
35c08157
KLC
4132 {
4133 if (!add_dynamic_entry (DT_DEBUG, 0))
4134 return FALSE;
4135 }
4136
4137 if (htab->splt->size != 0)
4138 {
4139 if (!add_dynamic_entry (DT_PLTGOT, 0)
4140 || !add_dynamic_entry (DT_PLTRELSZ, 0)
4141 || !add_dynamic_entry (DT_PLTREL, DT_RELA)
4142 || !add_dynamic_entry (DT_JMPREL, 0))
4143 return FALSE;
4144 }
4145
4146 if (relocs)
4147 {
4148 if (!add_dynamic_entry (DT_RELA, 0)
4149 || !add_dynamic_entry (DT_RELASZ, 0)
4150 || !add_dynamic_entry (DT_RELAENT, sizeof (Elf32_External_Rela)))
4151 return FALSE;
4152
4153 /* If any dynamic relocs apply to a read-only section,
4154 then we need a DT_TEXTREL entry. */
4155 if ((info->flags & DF_TEXTREL) == 0)
4156 elf_link_hash_traverse (&htab->root, readonly_dynrelocs,
4157 (void *) info);
4158
4159 if ((info->flags & DF_TEXTREL) != 0)
4160 {
4161 if (!add_dynamic_entry (DT_TEXTREL, 0))
4162 return FALSE;
4163 }
4164 }
4165 }
4166#undef add_dynamic_entry
4167
4168 return TRUE;
4169}
4170
4171static bfd_reloc_status_type
4172nds32_relocate_contents (reloc_howto_type *howto, bfd *input_bfd,
4173 bfd_vma relocation, bfd_byte *location)
4174{
4175 int size;
4176 bfd_vma x = 0;
4177 bfd_reloc_status_type flag;
4178 unsigned int rightshift = howto->rightshift;
4179 unsigned int bitpos = howto->bitpos;
4180
4181 /* If the size is negative, negate RELOCATION. This isn't very
4182 general. */
4183 if (howto->size < 0)
4184 relocation = -relocation;
4185
4186 /* Get the value we are going to relocate. */
4187 size = bfd_get_reloc_size (howto);
4188 switch (size)
4189 {
4190 default:
35c08157
KLC
4191 abort ();
4192 break;
6346d5ca
AM
4193 case 0:
4194 return bfd_reloc_ok;
35c08157
KLC
4195 case 2:
4196 x = bfd_getb16 (location);
4197 break;
4198 case 4:
4199 x = bfd_getb32 (location);
4200 break;
4201 }
4202
4203 /* Check for overflow. FIXME: We may drop bits during the addition
4204 which we don't check for. We must either check at every single
4205 operation, which would be tedious, or we must do the computations
4206 in a type larger than bfd_vma, which would be inefficient. */
4207 flag = bfd_reloc_ok;
4208 if (howto->complain_on_overflow != complain_overflow_dont)
4209 {
4210 bfd_vma addrmask, fieldmask, signmask, ss;
4211 bfd_vma a, b, sum;
4212
4213 /* Get the values to be added together. For signed and unsigned
4214 relocations, we assume that all values should be truncated to
4215 the size of an address. For bitfields, all the bits matter.
4216 See also bfd_check_overflow. */
4217 fieldmask = N_ONES (howto->bitsize);
4218 signmask = ~fieldmask;
4219 addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask;
4220 a = (relocation & addrmask) >> rightshift;
4221 b = (x & howto->src_mask & addrmask) >> bitpos;
4222
4223 switch (howto->complain_on_overflow)
4224 {
4225 case complain_overflow_signed:
4226 /* If any sign bits are set, all sign bits must be set.
4227 That is, A must be a valid negative address after
4228 shifting. */
4229 signmask = ~(fieldmask >> 1);
4230 /* Fall through. */
4231
4232 case complain_overflow_bitfield:
4233 /* Much like the signed check, but for a field one bit
4234 wider. We allow a bitfield to represent numbers in the
4235 range -2**n to 2**n-1, where n is the number of bits in the
4236 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
4237 can't overflow, which is exactly what we want. */
4238 ss = a & signmask;
4239 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
4240 flag = bfd_reloc_overflow;
4241
4242 /* We only need this next bit of code if the sign bit of B
4243 is below the sign bit of A. This would only happen if
4244 SRC_MASK had fewer bits than BITSIZE. Note that if
4245 SRC_MASK has more bits than BITSIZE, we can get into
4246 trouble; we would need to verify that B is in range, as
4247 we do for A above. */
4248 ss = ((~howto->src_mask) >> 1) & howto->src_mask;
4249 ss >>= bitpos;
4250
4251 /* Set all the bits above the sign bit. */
4252 b = (b ^ ss) - ss;
4253
4254 /* Now we can do the addition. */
4255 sum = a + b;
4256
4257 /* See if the result has the correct sign. Bits above the
4258 sign bit are junk now; ignore them. If the sum is
4259 positive, make sure we did not have all negative inputs;
4260 if the sum is negative, make sure we did not have all
4261 positive inputs. The test below looks only at the sign
4262 bits, and it really just
4263 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
4264
4265 We mask with addrmask here to explicitly allow an address
4266 wrap-around. The Linux kernel relies on it, and it is
4267 the only way to write assembler code which can run when
4268 loaded at a location 0x80000000 away from the location at
4269 which it is linked. */
4270 if (((~(a ^ b)) & (a ^ sum)) & signmask & addrmask)
4271 flag = bfd_reloc_overflow;
4272
4273 break;
4274
4275 case complain_overflow_unsigned:
4276 /* Checking for an unsigned overflow is relatively easy:
4277 trim the addresses and add, and trim the result as well.
4278 Overflow is normally indicated when the result does not
4279 fit in the field. However, we also need to consider the
4280 case when, e.g., fieldmask is 0x7fffffff or smaller, an
4281 input is 0x80000000, and bfd_vma is only 32 bits; then we
4282 will get sum == 0, but there is an overflow, since the
4283 inputs did not fit in the field. Instead of doing a
4284 separate test, we can check for this by or-ing in the
4285 operands when testing for the sum overflowing its final
4286 field. */
4287 sum = (a + b) & addrmask;
4288 if ((a | b | sum) & signmask)
4289 flag = bfd_reloc_overflow;
4290 break;
4291
4292 default:
4293 abort ();
4294 }
4295 }
4296
4297 /* Put RELOCATION in the right bits. */
4298 relocation >>= (bfd_vma) rightshift;
4299 relocation <<= (bfd_vma) bitpos;
4300
4301 /* Add RELOCATION to the right bits of X. */
4302 /* FIXME : 090616
4303 Because the relaxation may generate duplicate relocation at one address,
4304 an addition to immediate in the instruction may cause the relocation added
4305 several times.
4306 This bug should be fixed in assembler, but a check is also needed here. */
4307 if (howto->partial_inplace)
4308 x = ((x & ~howto->dst_mask)
4309 | (((x & howto->src_mask) + relocation) & howto->dst_mask));
4310 else
4311 x = ((x & ~howto->dst_mask) | ((relocation) & howto->dst_mask));
4312
4313
4314 /* Put the relocated value back in the object file. */
4315 switch (size)
4316 {
4317 default:
4318 case 0:
4319 case 1:
4320 case 8:
4321 abort ();
4322 break;
4323 case 2:
4324 bfd_putb16 (x, location);
4325 break;
4326 case 4:
4327 bfd_putb32 (x, location);
4328 break;
4329 }
4330
4331 return flag;
4332}
4333
4334static bfd_reloc_status_type
4335nds32_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd,
4336 asection *input_section, bfd_byte *contents,
4337 bfd_vma address, bfd_vma value, bfd_vma addend)
4338{
4339 bfd_vma relocation;
4340
4341 /* Sanity check the address. */
4342 if (address > bfd_get_section_limit (input_bfd, input_section))
4343 return bfd_reloc_outofrange;
4344
4345 /* This function assumes that we are dealing with a basic relocation
4346 against a symbol. We want to compute the value of the symbol to
4347 relocate to. This is just VALUE, the value of the symbol, plus
4348 ADDEND, any addend associated with the reloc. */
4349 relocation = value + addend;
4350
4351 /* If the relocation is PC relative, we want to set RELOCATION to
4352 the distance between the symbol (currently in RELOCATION) and the
4353 location we are relocating. Some targets (e.g., i386-aout)
4354 arrange for the contents of the section to be the negative of the
4355 offset of the location within the section; for such targets
4356 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
4357 simply leave the contents of the section as zero; for such
4358 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
4359 need to subtract out the offset of the location within the
4360 section (which is just ADDRESS). */
4361 if (howto->pc_relative)
4362 {
4363 relocation -= (input_section->output_section->vma
4364 + input_section->output_offset);
4365 if (howto->pcrel_offset)
4366 relocation -= address;
4367 }
4368
4369 return nds32_relocate_contents (howto, input_bfd, relocation,
4370 contents + address);
4371}
4372
4373static bfd_boolean
4374nds32_elf_output_symbol_hook (struct bfd_link_info *info,
4375 const char *name,
4376 Elf_Internal_Sym *elfsym ATTRIBUTE_UNUSED,
4377 asection *input_sec,
4378 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
4379{
4380 const char *source;
4381 FILE *sym_ld_script = NULL;
4382 struct elf_nds32_link_hash_table *table;
4383
4384 table = nds32_elf_hash_table (info);
4385 sym_ld_script = table->sym_ld_script;
4386 if (!sym_ld_script)
4387 return TRUE;
4388
4389 if (!h || !name || *name == '\0')
4390 return TRUE;
4391
4392 if (input_sec->flags & SEC_EXCLUDE)
4393 return TRUE;
4394
4395 if (!check_start_export_sym)
4396 {
4397 fprintf (sym_ld_script, "SECTIONS\n{\n");
4398 check_start_export_sym = 1;
4399 }
4400
4401 if (h->root.type == bfd_link_hash_defined
4402 || h->root.type == bfd_link_hash_defweak)
4403 {
4404 if (!h->root.u.def.section->output_section)
4405 return TRUE;
4406
4407 if (bfd_is_const_section (input_sec))
4408 source = input_sec->name;
4409 else
4410 source = input_sec->owner->filename;
4411
4412 fprintf (sym_ld_script, "\t%s = 0x%08lx;\t /* %s */\n",
4413 h->root.root.string,
4414 (long) (h->root.u.def.value
4415 + h->root.u.def.section->output_section->vma
4416 + h->root.u.def.section->output_offset), source);
4417 }
4418
4419 return TRUE;
4420}
4421
4422/* Relocate an NDS32/D ELF section.
4423 There is some attempt to make this function usable for many architectures,
4424 both for RELA and REL type relocs, if only to serve as a learning tool.
4425
4426 The RELOCATE_SECTION function is called by the new ELF backend linker
4427 to handle the relocations for a section.
4428
4429 The relocs are always passed as Rela structures; if the section
4430 actually uses Rel structures, the r_addend field will always be
4431 zero.
4432
4433 This function is responsible for adjust the section contents as
4434 necessary, and (if using Rela relocs and generating a
4435 relocatable output file) adjusting the reloc addend as
4436 necessary.
4437
4438 This function does not have to worry about setting the reloc
4439 address or the reloc symbol index.
4440
4441 LOCAL_SYMS is a pointer to the swapped in local symbols.
4442
4443 LOCAL_SECTIONS is an array giving the section in the input file
4444 corresponding to the st_shndx field of each local symbol.
4445
4446 The global hash table entry for the global symbols can be found
4447 via elf_sym_hashes (input_bfd).
4448
4449 When generating relocatable output, this function must handle
4450 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
4451 going to be the section symbol corresponding to the output
4452 section, which means that the addend must be adjusted
4453 accordingly. */
4454
1c8f6a4d
KLC
4455static bfd_vma
4456dtpoff_base (struct bfd_link_info *info)
4457{
4458 /* If tls_sec is NULL, we should have signalled an error already. */
4459 if (elf_hash_table (info)->tls_sec == NULL)
4460 return 0;
4461 return elf_hash_table (info)->tls_sec->vma;
4462}
4463
35c08157
KLC
4464static bfd_boolean
4465nds32_elf_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED,
4466 struct bfd_link_info * info,
4467 bfd * input_bfd,
4468 asection * input_section,
4469 bfd_byte * contents,
4470 Elf_Internal_Rela * relocs,
4471 Elf_Internal_Sym * local_syms,
4472 asection ** local_sections)
4473{
4474 Elf_Internal_Shdr *symtab_hdr;
4475 struct elf_link_hash_entry **sym_hashes;
4476 Elf_Internal_Rela *rel, *relend;
4477 bfd_boolean ret = TRUE; /* Assume success. */
4478 int align = 0;
4479 bfd_reloc_status_type r;
4480 const char *errmsg = NULL;
4481 bfd_vma gp;
4482 struct elf_nds32_link_hash_table *htab;
4483 bfd *dynobj;
4484 bfd_vma *local_got_offsets;
4485 asection *sgot, *splt, *sreloc;
4486 bfd_vma high_address;
4487 struct elf_nds32_link_hash_table *table;
4488 int eliminate_gc_relocs;
4489 bfd_vma fpbase_addr;
4490
4491 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4492 sym_hashes = elf_sym_hashes (input_bfd);
4493 htab = nds32_elf_hash_table (info);
4494 high_address = bfd_get_section_limit (input_bfd, input_section);
4495
4496 dynobj = htab->root.dynobj;
4497 local_got_offsets = elf_local_got_offsets (input_bfd);
4498
4499 sgot = htab->sgot;
4500 splt = htab->splt;
4501 sreloc = NULL;
4502
4503 rel = relocs;
4504 relend = relocs + input_section->reloc_count;
4505
4506 table = nds32_elf_hash_table (info);
4507 eliminate_gc_relocs = table->eliminate_gc_relocs;
4508 /* By this time, we can adjust the value of _SDA_BASE_. */
0e1862bb 4509 if ((!bfd_link_relocatable (info)))
35c08157
KLC
4510 {
4511 is_SDA_BASE_set = 1;
4512 r = nds32_elf_final_sda_base (output_bfd, info, &gp, TRUE);
4513 if (r != bfd_reloc_ok)
4514 return FALSE;
4515 }
4516
0c4bd9d9
KLC
4517 if (is_ITB_BASE_set == 0)
4518 {
4519 /* Set the _ITB_BASE_. */
4520 if (!nds32_elf_ex9_itb_base (info))
4521 {
4eca0228
AM
4522 _bfd_error_handler (_("%B: error: Cannot set _ITB_BASE_"),
4523 output_bfd);
0c4bd9d9
KLC
4524 bfd_set_error (bfd_error_bad_value);
4525 }
4526 }
4527
1c8f6a4d
KLC
4528 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
4529 if (!nds32_elf_ifc_reloc ())
4eca0228 4530 _bfd_error_handler (_("error: IFC relocation error."));
1c8f6a4d
KLC
4531
4532 /* Relocation for .ex9.itable. */
4533 if (table->target_optimize & NDS32_RELAX_EX9_ON
4534 || (table->ex9_import_file && table->update_ex9_table))
4535 nds32_elf_ex9_reloc_jmp (info);
4536
35c08157
KLC
4537 /* Use gp as fp to prevent truncated fit. Because in relaxation time
4538 the fp value is set as gp, and it has be reverted for instruction
4539 setting fp. */
4540 fpbase_addr = elf_gp (output_bfd);
4541
4542 for (rel = relocs; rel < relend; rel++)
4543 {
4544 enum elf_nds32_reloc_type r_type;
4545 reloc_howto_type *howto = NULL;
4546 unsigned long r_symndx;
4547 struct elf_link_hash_entry *h = NULL;
4548 Elf_Internal_Sym *sym = NULL;
4549 asection *sec;
4550 bfd_vma relocation;
4551
4552 /* We can't modify r_addend here as elf_link_input_bfd has an assert to
4553 ensure it's zero (we use REL relocs, not RELA). Therefore this
4554 should be assigning zero to `addend', but for clarity we use
4555 `r_addend'. */
4556
4557 bfd_vma addend = rel->r_addend;
4558 bfd_vma offset = rel->r_offset;
4559
4560 r_type = ELF32_R_TYPE (rel->r_info);
4561 if (r_type >= R_NDS32_max)
4562 {
4eca0228
AM
4563 _bfd_error_handler (_("%B: error: unknown relocation type %d."),
4564 input_bfd, r_type);
35c08157
KLC
4565 bfd_set_error (bfd_error_bad_value);
4566 ret = FALSE;
4567 continue;
4568 }
4569
4570 if (r_type == R_NDS32_GNU_VTENTRY
4571 || r_type == R_NDS32_GNU_VTINHERIT
4572 || r_type == R_NDS32_NONE
4573 || r_type == R_NDS32_RELA_GNU_VTENTRY
4574 || r_type == R_NDS32_RELA_GNU_VTINHERIT
4575 || (r_type >= R_NDS32_INSN16 && r_type <= R_NDS32_25_FIXED_RELA)
4576 || r_type == R_NDS32_DATA
1c8f6a4d 4577 || r_type == R_NDS32_TRAN
0c4bd9d9 4578 || (r_type >= R_NDS32_LONGCALL4 && r_type <= R_NDS32_LONGJUMP7))
35c08157
KLC
4579 continue;
4580
0c4bd9d9
KLC
4581 /* If we enter the fp-as-gp region. Resolve the address
4582 of best fp-base. */
35c08157
KLC
4583 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_BEGIN
4584 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4585 {
4586 int dist;
4587
4588 /* Distance to relocation of best fp-base is encoded in R_SYM. */
4589 dist = rel->r_addend >> 16;
4590 fpbase_addr = calculate_memory_address (input_bfd, rel + dist,
4591 local_syms, symtab_hdr);
4592 }
4593 else if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_END
4594 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4595 {
4596 fpbase_addr = elf_gp (output_bfd);
4597 }
4598
4599 if (((r_type >= R_NDS32_DWARF2_OP1_RELA
4600 && r_type <= R_NDS32_DWARF2_LEB_RELA)
0e1862bb 4601 || r_type >= R_NDS32_RELAX_ENTRY) && !bfd_link_relocatable (info))
35c08157
KLC
4602 continue;
4603
4604 howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
4605 r_symndx = ELF32_R_SYM (rel->r_info);
4606
4607 /* This is a final link. */
4608 sym = NULL;
4609 sec = NULL;
4610 h = NULL;
4611
4612 if (r_symndx < symtab_hdr->sh_info)
4613 {
4614 /* Local symbol. */
4615 sym = local_syms + r_symndx;
4616 sec = local_sections[r_symndx];
4617
4618 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
4619 addend = rel->r_addend;
4620 }
4621 else
4622 {
4623 /* External symbol. */
4624 bfd_boolean warned, ignored, unresolved_reloc;
4625 int symndx = r_symndx - symtab_hdr->sh_info;
4626
4627 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
4628 r_symndx, symtab_hdr, sym_hashes, h, sec,
4629 relocation, unresolved_reloc, warned,
4630 ignored);
4631
4632 /* la $fp, _FP_BASE_ is per-function (region).
4633 Handle it specially. */
4634 switch ((int) r_type)
4635 {
4636 case R_NDS32_SDA19S0_RELA:
4637 case R_NDS32_SDA15S0_RELA:
4638 case R_NDS32_20_RELA:
4639 if (strcmp (elf_sym_hashes (input_bfd)[symndx]->root.root.string,
4640 FP_BASE_NAME) == 0)
4641 {
4642 relocation = fpbase_addr;
4643 break;
4644 }
4645 }
4646
4647 }
4648
0e1862bb 4649 if (bfd_link_relocatable (info))
35c08157
KLC
4650 {
4651 /* This is a relocatable link. We don't have to change
4652 anything, unless the reloc is against a section symbol,
4653 in which case we have to adjust according to where the
4654 section symbol winds up in the output section. */
4655 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
4656 rel->r_addend += sec->output_offset + sym->st_value;
4657
4658 continue;
4659 }
4660
4661 /* Sanity check the address. */
4662 if (offset > high_address)
4663 {
4664 r = bfd_reloc_outofrange;
4665 goto check_reloc;
4666 }
4667
4668 if ((r_type >= R_NDS32_DWARF2_OP1_RELA
4669 && r_type <= R_NDS32_DWARF2_LEB_RELA)
4670 || r_type >= R_NDS32_RELAX_ENTRY)
4671 continue;
4672
4673 switch ((int) r_type)
4674 {
4675 case R_NDS32_GOTOFF:
4676 /* Relocation is relative to the start of the global offset
4677 table (for ld24 rx, #uimm24), e.g. access at label+addend
4678
4679 ld24 rx. #label@GOTOFF + addend
4680 sub rx, r12. */
4681 case R_NDS32_GOTOFF_HI20:
4682 case R_NDS32_GOTOFF_LO12:
4683 case R_NDS32_GOTOFF_LO15:
4684 case R_NDS32_GOTOFF_LO19:
4685 BFD_ASSERT (sgot != NULL);
4686
4687 relocation -= elf_gp (output_bfd);
4688 break;
4689
4690 case R_NDS32_9_PLTREL:
4691 case R_NDS32_25_PLTREL:
4692 /* Relocation is to the entry for this symbol in the
4693 procedure linkage table. */
4694
4695 /* The native assembler will generate a 25_PLTREL reloc
4696 for a local symbol if you assemble a call from one
4697 section to another when using -K pic. */
4698 if (h == NULL)
4699 break;
4700
4701 if (h->forced_local)
4702 break;
4703
4704 /* We didn't make a PLT entry for this symbol. This
4705 happens when statically linking PIC code, or when
4706 using -Bsymbolic. */
4707 if (h->plt.offset == (bfd_vma) - 1)
4708 break;
4709
4710 relocation = (splt->output_section->vma
4711 + splt->output_offset + h->plt.offset);
4712 break;
4713
4714 case R_NDS32_PLT_GOTREL_HI20:
4715 case R_NDS32_PLT_GOTREL_LO12:
4716 case R_NDS32_PLT_GOTREL_LO15:
4717 case R_NDS32_PLT_GOTREL_LO19:
4718 case R_NDS32_PLT_GOTREL_LO20:
4719 if (h == NULL || h->forced_local || h->plt.offset == (bfd_vma) - 1)
4720 {
4721 /* We didn't make a PLT entry for this symbol. This
4722 happens when statically linking PIC code, or when
4723 using -Bsymbolic. */
4724 relocation -= elf_gp (output_bfd);
4725 break;
4726 }
4727
4728 relocation = (splt->output_section->vma
4729 + splt->output_offset + h->plt.offset);
4730
4731 relocation -= elf_gp (output_bfd);
4732 break;
4733
4734 case R_NDS32_PLTREL_HI20:
4735 case R_NDS32_PLTREL_LO12:
4736
4737 /* Relocation is to the entry for this symbol in the
4738 procedure linkage table. */
4739
4740 /* The native assembler will generate a 25_PLTREL reloc
4741 for a local symbol if you assemble a call from one
4742 section to another when using -K pic. */
4743 if (h == NULL)
4744 break;
4745
4746 if (h->forced_local)
4747 break;
4748
4749 if (h->plt.offset == (bfd_vma) - 1)
4750 /* We didn't make a PLT entry for this symbol. This
4751 happens when statically linking PIC code, or when
4752 using -Bsymbolic. */
4753 break;
4754
4755 if (splt == NULL)
4756 break;
4757
4758 relocation = (splt->output_section->vma
4759 + splt->output_offset
4760 + h->plt.offset + 4)
4761 - (input_section->output_section->vma
4762 + input_section->output_offset
4763 + rel->r_offset);
4764
4765 break;
4766
4767 case R_NDS32_GOTPC20:
4768 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4769 ld24 rx,#_GLOBAL_OFFSET_TABLE_ */
4770 relocation = elf_gp (output_bfd);
4771 break;
4772
4773 case R_NDS32_GOTPC_HI20:
4774 case R_NDS32_GOTPC_LO12:
4775 {
4776 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4777 bl .+4
4778 seth rx,#high(_GLOBAL_OFFSET_TABLE_)
4779 or3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4780 or
4781 bl .+4
4782 seth rx,#shigh(_GLOBAL_OFFSET_TABLE_)
4783 add3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4784 */
4785 relocation = elf_gp (output_bfd);
4786 relocation -= (input_section->output_section->vma
4787 + input_section->output_offset + rel->r_offset);
4788 break;
4789 }
4790
4791 case R_NDS32_GOT20:
4792 /* Fall through. */
4793 case R_NDS32_GOT_HI20:
4794 case R_NDS32_GOT_LO12:
4795 case R_NDS32_GOT_LO15:
4796 case R_NDS32_GOT_LO19:
4797 /* Relocation is to the entry for this symbol in the global
4798 offset table. */
4799 BFD_ASSERT (sgot != NULL);
4800
4801 if (h != NULL)
4802 {
4803 bfd_boolean dyn;
4804 bfd_vma off;
4805
4806 off = h->got.offset;
4807 BFD_ASSERT (off != (bfd_vma) - 1);
4808 dyn = htab->root.dynamic_sections_created;
0e1862bb
L
4809 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
4810 bfd_link_pic (info),
4811 h)
4812 || (bfd_link_pic (info)
35c08157
KLC
4813 && (info->symbolic
4814 || h->dynindx == -1
4815 || h->forced_local) && h->def_regular))
4816 {
4817 /* This is actually a static link, or it is a
4818 -Bsymbolic link and the symbol is defined
4819 locally, or the symbol was forced to be local
4820 because of a version file. We must initialize
4821 this entry in the global offset table. Since the
4822 offset must always be a multiple of 4, we use the
4823 least significant bit to record whether we have
4824 initialized it already.
4825
4826 When doing a dynamic link, we create a .rela.got
4827 relocation entry to initialize the value. This
4828 is done in the finish_dynamic_symbol routine. */
4829 if ((off & 1) != 0)
4830 off &= ~1;
4831 else
4832 {
4833 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4834 h->got.offset |= 1;
4835 }
4836 }
4837 relocation = sgot->output_section->vma + sgot->output_offset + off
4838 - elf_gp (output_bfd);
4839 }
4840 else
4841 {
4842 bfd_vma off;
4843 bfd_byte *loc;
4844
4845 BFD_ASSERT (local_got_offsets != NULL
4846 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
4847
4848 off = local_got_offsets[r_symndx];
4849
4850 /* The offset must always be a multiple of 4. We use
4851 the least significant bit to record whether we have
4852 already processed this entry. */
4853 if ((off & 1) != 0)
4854 off &= ~1;
4855 else
4856 {
4857 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4858
0e1862bb 4859 if (bfd_link_pic (info))
35c08157
KLC
4860 {
4861 asection *srelgot;
4862 Elf_Internal_Rela outrel;
4863
4864 /* We need to generate a R_NDS32_RELATIVE reloc
4865 for the dynamic linker. */
4866 srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
4867 BFD_ASSERT (srelgot != NULL);
4868
4869 outrel.r_offset = (elf_gp (output_bfd)
4870 + sgot->output_offset + off);
4871 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4872 outrel.r_addend = relocation;
4873 loc = srelgot->contents;
4874 loc +=
4875 srelgot->reloc_count * sizeof (Elf32_External_Rela);
4876 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4877 ++srelgot->reloc_count;
4878 }
4879 local_got_offsets[r_symndx] |= 1;
4880 }
4881 relocation = sgot->output_section->vma + sgot->output_offset + off
4882 - elf_gp (output_bfd);
4883 }
4884
4885 break;
4886
4887 case R_NDS32_16_RELA:
4888 case R_NDS32_20_RELA:
4889 case R_NDS32_5_RELA:
4890 case R_NDS32_32_RELA:
4891 case R_NDS32_9_PCREL_RELA:
4892 case R_NDS32_WORD_9_PCREL_RELA:
4893 case R_NDS32_10_UPCREL_RELA:
4894 case R_NDS32_15_PCREL_RELA:
4895 case R_NDS32_17_PCREL_RELA:
4896 case R_NDS32_25_PCREL_RELA:
4897 case R_NDS32_HI20_RELA:
4898 case R_NDS32_LO12S3_RELA:
4899 case R_NDS32_LO12S2_RELA:
4900 case R_NDS32_LO12S2_DP_RELA:
4901 case R_NDS32_LO12S2_SP_RELA:
4902 case R_NDS32_LO12S1_RELA:
4903 case R_NDS32_LO12S0_RELA:
4904 case R_NDS32_LO12S0_ORI_RELA:
0e1862bb 4905 if (bfd_link_pic (info) && r_symndx != 0
35c08157
KLC
4906 && (input_section->flags & SEC_ALLOC) != 0
4907 && (eliminate_gc_relocs == 0
4908 || (sec && (sec->flags & SEC_EXCLUDE) == 0))
4909 && ((r_type != R_NDS32_9_PCREL_RELA
4910 && r_type != R_NDS32_WORD_9_PCREL_RELA
4911 && r_type != R_NDS32_10_UPCREL_RELA
4912 && r_type != R_NDS32_15_PCREL_RELA
4913 && r_type != R_NDS32_17_PCREL_RELA
4914 && r_type != R_NDS32_25_PCREL_RELA
4915 && !(r_type == R_NDS32_32_RELA
4916 && strcmp (input_section->name, ".eh_frame") == 0))
4917 || (h != NULL && h->dynindx != -1
4918 && (!info->symbolic || !h->def_regular))))
4919 {
4920 Elf_Internal_Rela outrel;
4921 bfd_boolean skip, relocate;
4922 bfd_byte *loc;
4923
4924 /* When generating a shared object, these relocations
4925 are copied into the output file to be resolved at run
4926 time. */
4927
4928 if (sreloc == NULL)
4929 {
4930 const char *name;
4931
4932 name = bfd_elf_string_from_elf_section
4933 (input_bfd, elf_elfheader (input_bfd)->e_shstrndx,
4934 elf_section_data (input_section)->rela.hdr->sh_name);
4935 if (name == NULL)
4936 return FALSE;
4937
4938 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
4939 && strcmp (bfd_get_section_name (input_bfd,
4940 input_section),
4941 name + 5) == 0);
4942
4943 sreloc = bfd_get_section_by_name (dynobj, name);
4944 BFD_ASSERT (sreloc != NULL);
4945 }
4946
4947 skip = FALSE;
4948 relocate = FALSE;
4949
4950 outrel.r_offset = _bfd_elf_section_offset (output_bfd,
4951 info,
4952 input_section,
4953 rel->r_offset);
4954 if (outrel.r_offset == (bfd_vma) - 1)
4955 skip = TRUE;
4956 else if (outrel.r_offset == (bfd_vma) - 2)
4957 skip = TRUE, relocate = TRUE;
4958 outrel.r_offset += (input_section->output_section->vma
4959 + input_section->output_offset);
4960
4961 if (skip)
4962 memset (&outrel, 0, sizeof outrel);
4963 else if (r_type == R_NDS32_17_PCREL_RELA
4964 || r_type == R_NDS32_15_PCREL_RELA
4965 || r_type == R_NDS32_25_PCREL_RELA)
4966 {
4967 BFD_ASSERT (h != NULL && h->dynindx != -1);
4968 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4969 outrel.r_addend = rel->r_addend;
4970 }
4971 else
4972 {
4973 /* h->dynindx may be -1 if this symbol was marked to
4974 become local. */
4975 if (h == NULL
4976 || ((info->symbolic || h->dynindx == -1)
4977 && h->def_regular))
4978 {
4979 relocate = TRUE;
4980 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4981 outrel.r_addend = relocation + rel->r_addend;
4982 }
4983 else
4984 {
4985 BFD_ASSERT (h->dynindx != -1);
4986 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4987 outrel.r_addend = rel->r_addend;
4988 }
4989 }
4990
4991 loc = sreloc->contents;
4992 loc += sreloc->reloc_count * sizeof (Elf32_External_Rela);
4993 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4994 ++sreloc->reloc_count;
4995
4996 /* If this reloc is against an external symbol, we do
4997 not want to fiddle with the addend. Otherwise, we
4998 need to include the symbol value so that it becomes
4999 an addend for the dynamic reloc. */
5000 if (!relocate)
5001 continue;
5002 }
5003 break;
5004
5005 case R_NDS32_25_ABS_RELA:
0e1862bb 5006 if (bfd_link_pic (info))
35c08157 5007 {
4eca0228 5008 _bfd_error_handler
1c8f6a4d
KLC
5009 (_("%s: warning: cannot deal R_NDS32_25_ABS_RELA in shared "
5010 "mode."), bfd_get_filename (input_bfd));
35c08157
KLC
5011 return FALSE;
5012 }
5013 break;
5014
5015 case R_NDS32_9_PCREL:
5016 r = nds32_elf_do_9_pcrel_reloc (input_bfd, howto, input_section,
5017 contents, offset,
5018 sec, relocation, addend);
5019 goto check_reloc;
5020
5021 case R_NDS32_HI20:
5022 {
5023 Elf_Internal_Rela *lorel;
5024
5025 /* We allow an arbitrary number of HI20 relocs before the
5026 LO12 reloc. This permits gcc to emit the HI and LO relocs
5027 itself. */
5028 for (lorel = rel + 1;
5029 (lorel < relend
5030 && ELF32_R_TYPE (lorel->r_info) == R_NDS32_HI20); lorel++)
5031 continue;
5032 if (lorel < relend
5033 && (ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S3
5034 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S2
5035 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S1
5036 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S0))
5037 {
5038 nds32_elf_relocate_hi20 (input_bfd, r_type, rel, lorel,
5039 contents, relocation + addend);
5040 r = bfd_reloc_ok;
5041 }
5042 else
5043 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
1c8f6a4d
KLC
5044 contents, offset, relocation,
5045 addend);
35c08157
KLC
5046 }
5047
5048 goto check_reloc;
5049
5050 case R_NDS32_GOT17S2_RELA:
5051 case R_NDS32_GOT15S2_RELA:
5052 {
5053 bfd_vma off;
5054
5055 BFD_ASSERT (sgot != NULL);
5056
5057 if (h != NULL)
5058 {
5059 bfd_boolean dyn;
5060
5061 off = h->got.offset;
5062 BFD_ASSERT (off != (bfd_vma) - 1);
5063
5064 dyn = htab->root.dynamic_sections_created;
5065 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL
0e1862bb
L
5066 (dyn, bfd_link_pic (info), h)
5067 || (bfd_link_pic (info)
5068 && (info->symbolic
5069 || h->dynindx == -1
5070 || h->forced_local)
5071 && h->def_regular))
35c08157
KLC
5072 {
5073 /* This is actually a static link, or it is a
5074 -Bsymbolic link and the symbol is defined
5075 locally, or the symbol was forced to be local
5076 because of a version file. We must initialize
5077 this entry in the global offset table. Since the
5078 offset must always be a multiple of 4, we use the
5079 least significant bit to record whether we have
5080 initialized it already.
5081
5082 When doing a dynamic link, we create a .rela.got
5083 relocation entry to initialize the value. This
5084 is done in the finish_dynamic_symbol routine. */
5085 if ((off & 1) != 0)
5086 off &= ~1;
5087 else
5088 {
5089 bfd_put_32 (output_bfd, relocation,
5090 sgot->contents + off);
5091 h->got.offset |= 1;
5092 }
5093 }
5094 }
5095 else
5096 {
5097 bfd_byte *loc;
5098
5099 BFD_ASSERT (local_got_offsets != NULL
5100 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5101
5102 off = local_got_offsets[r_symndx];
5103
5104 /* The offset must always be a multiple of 4. We use
5105 the least significant bit to record whether we have
5106 already processed this entry. */
5107 if ((off & 1) != 0)
5108 off &= ~1;
5109 else
5110 {
5111 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
5112
0e1862bb 5113 if (bfd_link_pic (info))
35c08157
KLC
5114 {
5115 asection *srelgot;
5116 Elf_Internal_Rela outrel;
5117
5118 /* We need to generate a R_NDS32_RELATIVE reloc
5119 for the dynamic linker. */
5120 srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
5121 BFD_ASSERT (srelgot != NULL);
5122
5123 outrel.r_offset = (elf_gp (output_bfd)
5124 + sgot->output_offset + off);
5125 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5126 outrel.r_addend = relocation;
5127 loc = srelgot->contents;
5128 loc +=
5129 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5130 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5131 ++srelgot->reloc_count;
5132 }
5133 local_got_offsets[r_symndx] |= 1;
5134 }
5135 }
5136 relocation = sgot->output_section->vma + sgot->output_offset + off
5137 - elf_gp (output_bfd);
5138 }
5139 if (relocation & align)
5140 {
5141 /* Incorrect alignment. */
4eca0228 5142 _bfd_error_handler
35c08157
KLC
5143 (_("%B: warning: unaligned access to GOT entry."), input_bfd);
5144 ret = FALSE;
5145 r = bfd_reloc_dangerous;
5146 goto check_reloc;
5147 }
5148 break;
5149
5150 case R_NDS32_SDA16S3_RELA:
5151 case R_NDS32_SDA15S3_RELA:
5152 case R_NDS32_SDA15S3:
5153 align = 0x7;
5154 goto handle_sda;
5155
5156 case R_NDS32_SDA17S2_RELA:
5157 case R_NDS32_SDA15S2_RELA:
5158 case R_NDS32_SDA12S2_SP_RELA:
5159 case R_NDS32_SDA12S2_DP_RELA:
5160 case R_NDS32_SDA15S2:
5161 case R_NDS32_SDA_FP7U2_RELA:
5162 align = 0x3;
5163 goto handle_sda;
5164
5165 case R_NDS32_SDA18S1_RELA:
5166 case R_NDS32_SDA15S1_RELA:
5167 case R_NDS32_SDA15S1:
5168 align = 0x1;
5169 goto handle_sda;
5170
5171 case R_NDS32_SDA19S0_RELA:
5172 case R_NDS32_SDA15S0_RELA:
5173 case R_NDS32_SDA15S0:
5174 {
5175 align = 0x0;
5176handle_sda:
5177 BFD_ASSERT (sec != NULL);
5178
5179 /* If the symbol is in the abs section, the out_bfd will be null.
5180 This happens when the relocation has a symbol@GOTOFF. */
5181 r = nds32_elf_final_sda_base (output_bfd, info, &gp, FALSE);
5182 if (r != bfd_reloc_ok)
5183 {
4eca0228 5184 _bfd_error_handler
35c08157
KLC
5185 (_("%B: warning: relocate SDA_BASE failed."), input_bfd);
5186 ret = FALSE;
5187 goto check_reloc;
5188 }
5189
5190 /* At this point `relocation' contains the object's
5191 address. */
5192 if (r_type == R_NDS32_SDA_FP7U2_RELA)
5193 {
5194 relocation -= fpbase_addr;
5195 }
5196 else
5197 relocation -= gp;
5198 /* Now it contains the offset from _SDA_BASE_. */
5199
5200 /* Make sure alignment is correct. */
5201
5202 if (relocation & align)
5203 {
5204 /* Incorrect alignment. */
4eca0228 5205 _bfd_error_handler
35c08157
KLC
5206 (_("%B(%A): warning: unaligned small data access of type %d."),
5207 input_bfd, input_section, r_type);
5208 ret = FALSE;
5209 goto check_reloc;
5210 }
5211 }
5212
5213 break;
5214 case R_NDS32_17IFC_PCREL_RELA:
5215 case R_NDS32_10IFCU_PCREL_RELA:
5216 /* do nothing */
5217 break;
5218
1c8f6a4d
KLC
5219 case R_NDS32_TLS_LE_HI20:
5220 case R_NDS32_TLS_LE_LO12:
5221 case R_NDS32_TLS_LE_20:
5222 case R_NDS32_TLS_LE_15S0:
5223 case R_NDS32_TLS_LE_15S1:
5224 case R_NDS32_TLS_LE_15S2:
5225 if (elf_hash_table (info)->tls_sec != NULL)
5226 relocation -= (elf_hash_table (info)->tls_sec->vma + TP_OFFSET);
5227 break;
5228 case R_NDS32_TLS_IE_HI20:
5229 case R_NDS32_TLS_IE_LO12S2:
5230 {
5231 /* Relocation is to the entry for this symbol in the global
5232 offset table. */
5233 unsigned int tls_type;
5234 asection *srelgot;
5235 Elf_Internal_Rela outrel;
5236 bfd_vma off;
5237 bfd_byte *loc;
5238 int indx = 0;
5239
5240 BFD_ASSERT (sgot != NULL);
5241 if (h != NULL)
5242 {
5243 bfd_boolean dyn;
5244
5245 off = h->got.offset;
5246 BFD_ASSERT (off != (bfd_vma) - 1);
5247 dyn = htab->root.dynamic_sections_created;
5248 tls_type = ((struct elf_nds32_link_hash_entry *) h)->tls_type;
0e1862bb
L
5249 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
5250 && (!bfd_link_pic (info)
1c8f6a4d
KLC
5251 || !SYMBOL_REFERENCES_LOCAL (info, h)))
5252 indx = h->dynindx;
5253 }
5254 else
5255 {
5256 /* Never happen currently. */
5257 BFD_ASSERT (local_got_offsets != NULL
5258 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5259
5260 off = local_got_offsets[r_symndx];
5261
5262 tls_type = elf32_nds32_local_got_tls_type (input_bfd)[r_symndx];
5263 }
5264 relocation = sgot->output_section->vma + sgot->output_offset + off;
5265
5266 if (r_type == R_NDS32_TLS_IE_LO12S2)
5267 break;
5268
5269 /* The offset must always be a multiple of 4. We use
5270 the least significant bit to record whether we have
5271 already processed this entry. */
5272 if ((off & 1) != 0)
5273 off &= ~1;
5274 else
5275 {
5276 bfd_boolean need_relocs = FALSE;
5277 srelgot = htab->srelgot;
0e1862bb 5278 if ((bfd_link_pic (info) || indx != 0)
1c8f6a4d
KLC
5279 && (h == NULL
5280 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
5281 || h->root.type != bfd_link_hash_undefweak))
5282 {
5283 need_relocs = TRUE;
5284 BFD_ASSERT (srelgot != NULL);
5285 }
5286 if (tls_type & GOT_TLS_IE)
5287 {
5288 if (need_relocs)
5289 {
5290 if (h->dynindx == 0)
5291 outrel.r_addend = relocation - dtpoff_base (info);
5292 else
5293 outrel.r_addend = 0;
5294 outrel.r_offset = (sgot->output_section->vma
5295 + sgot->output_offset
5296 + off);
5297 outrel.r_info =
5298 ELF32_R_INFO (h->dynindx, R_NDS32_TLS_TPOFF);
5299
5300 loc = srelgot->contents;
5301 loc +=
5302 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5303 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5304 ++srelgot->reloc_count;
5305 }
5306 else
5307 bfd_put_32 (output_bfd, h->root.u.def.value - TP_OFFSET,
5308 sgot->contents + off);
5309 }
5310 }
5311 }
5312 break;
5313
35c08157
KLC
5314 /* DON'T fall through. */
5315
5316 default:
5317 /* OLD_NDS32_RELOC. */
5318
5319 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5320 contents, offset, relocation, addend);
5321 goto check_reloc;
5322 }
5323
5324 switch ((int) r_type)
5325 {
5326 case R_NDS32_20_RELA:
5327 case R_NDS32_5_RELA:
5328 case R_NDS32_9_PCREL_RELA:
5329 case R_NDS32_WORD_9_PCREL_RELA:
5330 case R_NDS32_10_UPCREL_RELA:
5331 case R_NDS32_15_PCREL_RELA:
5332 case R_NDS32_17_PCREL_RELA:
5333 case R_NDS32_25_PCREL_RELA:
5334 case R_NDS32_25_ABS_RELA:
5335 case R_NDS32_HI20_RELA:
5336 case R_NDS32_LO12S3_RELA:
5337 case R_NDS32_LO12S2_RELA:
5338 case R_NDS32_LO12S2_DP_RELA:
5339 case R_NDS32_LO12S2_SP_RELA:
5340 case R_NDS32_LO12S1_RELA:
5341 case R_NDS32_LO12S0_RELA:
5342 case R_NDS32_LO12S0_ORI_RELA:
5343 case R_NDS32_SDA16S3_RELA:
5344 case R_NDS32_SDA17S2_RELA:
5345 case R_NDS32_SDA18S1_RELA:
5346 case R_NDS32_SDA19S0_RELA:
5347 case R_NDS32_SDA15S3_RELA:
5348 case R_NDS32_SDA15S2_RELA:
5349 case R_NDS32_SDA12S2_DP_RELA:
5350 case R_NDS32_SDA12S2_SP_RELA:
5351 case R_NDS32_SDA15S1_RELA:
5352 case R_NDS32_SDA15S0_RELA:
5353 case R_NDS32_SDA_FP7U2_RELA:
5354 case R_NDS32_9_PLTREL:
5355 case R_NDS32_25_PLTREL:
5356 case R_NDS32_GOT20:
5357 case R_NDS32_GOT_HI20:
5358 case R_NDS32_GOT_LO12:
5359 case R_NDS32_GOT_LO15:
5360 case R_NDS32_GOT_LO19:
5361 case R_NDS32_GOT15S2_RELA:
5362 case R_NDS32_GOT17S2_RELA:
5363 case R_NDS32_GOTPC20:
5364 case R_NDS32_GOTPC_HI20:
5365 case R_NDS32_GOTPC_LO12:
5366 case R_NDS32_GOTOFF:
5367 case R_NDS32_GOTOFF_HI20:
5368 case R_NDS32_GOTOFF_LO12:
5369 case R_NDS32_GOTOFF_LO15:
5370 case R_NDS32_GOTOFF_LO19:
5371 case R_NDS32_PLTREL_HI20:
5372 case R_NDS32_PLTREL_LO12:
5373 case R_NDS32_PLT_GOTREL_HI20:
5374 case R_NDS32_PLT_GOTREL_LO12:
5375 case R_NDS32_PLT_GOTREL_LO15:
5376 case R_NDS32_PLT_GOTREL_LO19:
5377 case R_NDS32_PLT_GOTREL_LO20:
5378 case R_NDS32_17IFC_PCREL_RELA:
5379 case R_NDS32_10IFCU_PCREL_RELA:
1c8f6a4d
KLC
5380 case R_NDS32_TLS_LE_HI20:
5381 case R_NDS32_TLS_LE_LO12:
5382 case R_NDS32_TLS_IE_HI20:
5383 case R_NDS32_TLS_IE_LO12S2:
5384 case R_NDS32_TLS_LE_20:
5385 case R_NDS32_TLS_LE_15S0:
5386 case R_NDS32_TLS_LE_15S1:
5387 case R_NDS32_TLS_LE_15S2:
35c08157 5388 /* Instruction related relocs must handle endian properly. */
1c8f6a4d 5389 /* NOTE: PIC IS NOT HANDLE YET; DO IT LATER. */
35c08157
KLC
5390 r = nds32_elf_final_link_relocate (howto, input_bfd,
5391 input_section, contents,
5392 rel->r_offset, relocation,
5393 rel->r_addend);
5394 break;
5395
5396 default:
5397 /* All other relocs can use default handler. */
5398 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5399 contents, rel->r_offset,
5400 relocation, rel->r_addend);
5401 break;
5402 }
5403
5404check_reloc:
5405
5406 if (r != bfd_reloc_ok)
5407 {
5408 /* FIXME: This should be generic enough to go in a utility. */
5409 const char *name;
5410
5411 if (h != NULL)
5412 name = h->root.root.string;
5413 else
5414 {
5415 name = bfd_elf_string_from_elf_section
5416 (input_bfd, symtab_hdr->sh_link, sym->st_name);
5417 if (name == NULL || *name == '\0')
5418 name = bfd_section_name (input_bfd, sec);
5419 }
5420
5421 if (errmsg != NULL)
5422 goto common_error;
5423
5424 switch (r)
5425 {
5426 case bfd_reloc_overflow:
1a72702b
AM
5427 (*info->callbacks->reloc_overflow)
5428 (info, (h ? &h->root : NULL), name, howto->name,
5429 (bfd_vma) 0, input_bfd, input_section, offset);
35c08157
KLC
5430 break;
5431
5432 case bfd_reloc_undefined:
1a72702b
AM
5433 (*info->callbacks->undefined_symbol)
5434 (info, name, input_bfd, input_section, offset, TRUE);
35c08157
KLC
5435 break;
5436
5437 case bfd_reloc_outofrange:
5438 errmsg = _("internal error: out of range error");
5439 goto common_error;
5440
5441 case bfd_reloc_notsupported:
5442 errmsg = _("internal error: unsupported relocation error");
5443 goto common_error;
5444
5445 case bfd_reloc_dangerous:
5446 errmsg = _("internal error: dangerous error");
5447 goto common_error;
5448
5449 default:
5450 errmsg = _("internal error: unknown error");
5451 /* Fall through. */
5452
1a72702b
AM
5453 common_error:
5454 (*info->callbacks->warning) (info, errmsg, name, input_bfd,
5455 input_section, offset);
35c08157
KLC
5456 break;
5457 }
5458 }
5459 }
5460
5461 return ret;
5462}
5463
5464/* Finish up dynamic symbol handling. We set the contents of various
5465 dynamic sections here. */
5466
5467static bfd_boolean
5468nds32_elf_finish_dynamic_symbol (bfd *output_bfd, struct bfd_link_info *info,
5469 struct elf_link_hash_entry *h, Elf_Internal_Sym *sym)
5470{
5471 struct elf_nds32_link_hash_table *htab;
5472 bfd_byte *loc;
5473
5474 htab = nds32_elf_hash_table (info);
5475
5476 if (h->plt.offset != (bfd_vma) - 1)
5477 {
5478 asection *splt;
5479 asection *sgot;
5480 asection *srela;
5481
5482 bfd_vma plt_index;
5483 bfd_vma got_offset;
5484 bfd_vma local_plt_offset;
5485 Elf_Internal_Rela rela;
5486
5487 /* This symbol has an entry in the procedure linkage table. Set
5488 it up. */
5489
5490 BFD_ASSERT (h->dynindx != -1);
5491
5492 splt = htab->splt;
5493 sgot = htab->sgotplt;
5494 srela = htab->srelplt;
5495 BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL);
5496
5497 /* Get the index in the procedure linkage table which
5498 corresponds to this symbol. This is the index of this symbol
5499 in all the symbols for which we are making plt entries. The
5500 first entry in the procedure linkage table is reserved. */
5501 plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1;
5502
5503 /* Get the offset into the .got table of the entry that
5504 corresponds to this function. Each .got entry is 4 bytes.
5505 The first three are reserved. */
5506 got_offset = (plt_index + 3) * 4;
5507
5508 /* Fill in the entry in the procedure linkage table. */
0e1862bb 5509 if (!bfd_link_pic (info))
35c08157
KLC
5510 {
5511 unsigned long insn;
5512
5513 insn = PLT_ENTRY_WORD0 + (((sgot->output_section->vma
5514 + sgot->output_offset + got_offset) >> 12)
5515 & 0xfffff);
5516 bfd_putb32 (insn, splt->contents + h->plt.offset);
5517
5518 insn = PLT_ENTRY_WORD1 + (((sgot->output_section->vma
5519 + sgot->output_offset + got_offset) & 0x0fff)
5520 >> 2);
5521 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5522
5523 insn = PLT_ENTRY_WORD2;
5524 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5525
5526 insn = PLT_ENTRY_WORD3 + (plt_index & 0x7ffff);
5527 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5528
5529 insn = PLT_ENTRY_WORD4
5530 + (((unsigned int) ((-(h->plt.offset + 16)) >> 1)) & 0xffffff);
5531 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5532 local_plt_offset = 12;
5533 }
5534 else
5535 {
5536 /* sda_base must be set at this time. */
5537 unsigned long insn;
5538 long offset;
5539
5540 /* FIXME, sda_base is 65536, it will damage opcode. */
5541 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5542 offset = sgot->output_section->vma + sgot->output_offset + got_offset
5543 - elf_gp (output_bfd);
5544 insn = PLT_PIC_ENTRY_WORD0 + ((offset >> 12) & 0xfffff);
5545 bfd_putb32 (insn, splt->contents + h->plt.offset);
5546
5547 insn = PLT_PIC_ENTRY_WORD1 + (offset & 0xfff);
5548 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5549
5550 insn = PLT_PIC_ENTRY_WORD2;
5551 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5552
5553 insn = PLT_PIC_ENTRY_WORD3;
5554 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5555
5556 insn = PLT_PIC_ENTRY_WORD4 + (plt_index & 0x7fffff);
5557 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5558
5559 insn = PLT_PIC_ENTRY_WORD5
5560 + (((unsigned int) ((-(h->plt.offset + 20)) >> 1)) & 0xffffff);
5561 bfd_putb32 (insn, splt->contents + h->plt.offset + 20);
5562
5563 local_plt_offset = 16;
5564 }
5565
5566 /* Fill in the entry in the global offset table,
5567 so it will fall through to the next instruction for the first time. */
5568 bfd_put_32 (output_bfd,
5569 (splt->output_section->vma + splt->output_offset
5570 + h->plt.offset + local_plt_offset),
5571 sgot->contents + got_offset);
5572
5573 /* Fill in the entry in the .rela.plt section. */
5574 rela.r_offset = (sgot->output_section->vma
5575 + sgot->output_offset + got_offset);
5576 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_JMP_SLOT);
5577 rela.r_addend = 0;
5578 loc = srela->contents;
5579 loc += plt_index * sizeof (Elf32_External_Rela);
5580 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5581
5582 if (!h->def_regular)
5583 {
5584 /* Mark the symbol as undefined, rather than as defined in
5585 the .plt section. Leave the value alone. */
5586 sym->st_shndx = SHN_UNDEF;
5587 if (!h->ref_regular_nonweak)
5588 sym->st_value = 0;
5589 }
5590 }
5591
5592 if (h->got.offset != (bfd_vma) - 1)
5593 {
5594 asection *sgot;
5595 asection *srela;
5596 Elf_Internal_Rela rela;
5597
5598 /* This symbol has an entry in the global offset table.
5599 Set it up. */
5600
5601 sgot = htab->sgot;
5602 srela = htab->srelgot;
5603 BFD_ASSERT (sgot != NULL && srela != NULL);
5604
5605 rela.r_offset = (sgot->output_section->vma
5606 + sgot->output_offset + (h->got.offset & ~1));
5607
5608 /* If this is a -Bsymbolic link, and the symbol is defined
5609 locally, we just want to emit a RELATIVE reloc. Likewise if
5610 the symbol was forced to be local because of a version file.
5611 The entry in the global offset table will already have been
5612 initialized in the relocate_section function. */
0e1862bb 5613 if (bfd_link_pic (info)
35c08157
KLC
5614 && (info->symbolic
5615 || h->dynindx == -1 || h->forced_local) && h->def_regular)
5616 {
5617 rela.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5618 rela.r_addend = (h->root.u.def.value
5619 + h->root.u.def.section->output_section->vma
5620 + h->root.u.def.section->output_offset);
5621 }
5622 else
5623 {
5624 BFD_ASSERT ((h->got.offset & 1) == 0);
5625 bfd_put_32 (output_bfd, (bfd_vma) 0,
5626 sgot->contents + h->got.offset);
5627 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_GLOB_DAT);
5628 rela.r_addend = 0;
5629 }
5630
5631 loc = srela->contents;
5632 loc += srela->reloc_count * sizeof (Elf32_External_Rela);
5633 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5634 ++srela->reloc_count;
5635 }
5636
5637 if (h->needs_copy)
5638 {
5639 asection *s;
5640 Elf_Internal_Rela rela;
5641
5642 /* This symbols needs a copy reloc. Set it up. */
5643
5644 BFD_ASSERT (h->dynindx != -1
5645 && (h->root.type == bfd_link_hash_defined
5646 || h->root.type == bfd_link_hash_defweak));
5647
5648 s = bfd_get_section_by_name (h->root.u.def.section->owner, ".rela.bss");
5649 BFD_ASSERT (s != NULL);
5650
5651 rela.r_offset = (h->root.u.def.value
5652 + h->root.u.def.section->output_section->vma
5653 + h->root.u.def.section->output_offset);
5654 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_COPY);
5655 rela.r_addend = 0;
5656 loc = s->contents;
5657 loc += s->reloc_count * sizeof (Elf32_External_Rela);
5658 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5659 ++s->reloc_count;
5660 }
5661
5662 /* Mark some specially defined symbols as absolute. */
5663 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
5664 || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
5665 sym->st_shndx = SHN_ABS;
5666
5667 return TRUE;
5668}
5669
5670
5671/* Finish up the dynamic sections. */
5672
5673static bfd_boolean
5674nds32_elf_finish_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info)
5675{
5676 struct elf_nds32_link_hash_table *htab;
5677 bfd *dynobj;
5678 asection *sdyn;
5679 asection *sgot;
5680
5681 htab = nds32_elf_hash_table (info);
5682 dynobj = htab->root.dynobj;
5683
5684 sgot = htab->sgotplt;
5685 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
5686
5687 if (htab->root.dynamic_sections_created)
5688 {
5689 asection *splt;
5690 Elf32_External_Dyn *dyncon, *dynconend;
5691
5692 BFD_ASSERT (sgot != NULL && sdyn != NULL);
5693
5694 dyncon = (Elf32_External_Dyn *) sdyn->contents;
5695 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
5696
5697 for (; dyncon < dynconend; dyncon++)
5698 {
5699 Elf_Internal_Dyn dyn;
5700 asection *s;
5701
5702 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
5703
5704 switch (dyn.d_tag)
5705 {
5706 default:
5707 break;
5708
5709 case DT_PLTGOT:
4ade44b7 5710 s = htab->sgotplt;
35c08157
KLC
5711 goto get_vma;
5712 case DT_JMPREL:
4ade44b7 5713 s = htab->srelplt;
35c08157 5714 get_vma:
4ade44b7 5715 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
35c08157
KLC
5716 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5717 break;
5718
5719 case DT_PLTRELSZ:
4ade44b7 5720 s = htab->srelplt;
35c08157
KLC
5721 dyn.d_un.d_val = s->size;
5722 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5723 break;
5724
5725 case DT_RELASZ:
5726 /* My reading of the SVR4 ABI indicates that the
5727 procedure linkage table relocs (DT_JMPREL) should be
5728 included in the overall relocs (DT_RELA). This is
5729 what Solaris does. However, UnixWare can not handle
5730 that case. Therefore, we override the DT_RELASZ entry
5731 here to make it not include the JMPREL relocs. Since
5732 the linker script arranges for .rela.plt to follow all
5733 other relocation sections, we don't have to worry
5734 about changing the DT_RELA entry. */
5735 if (htab->srelplt != NULL)
5736 {
4ade44b7 5737 s = htab->srelplt;
35c08157
KLC
5738 dyn.d_un.d_val -= s->size;
5739 }
5740 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5741 break;
5742 }
5743 }
5744
5745 /* Fill in the first entry in the procedure linkage table. */
5746 splt = htab->splt;
5747 if (splt && splt->size > 0)
5748 {
0e1862bb 5749 if (bfd_link_pic (info))
35c08157
KLC
5750 {
5751 unsigned long insn;
5752 long offset;
5753
5754 /* FIXME, sda_base is 65536, it will damage opcode. */
5755 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5756 offset = sgot->output_section->vma + sgot->output_offset + 4
5757 - elf_gp (output_bfd);
5758 insn = PLT0_PIC_ENTRY_WORD0 | ((offset >> 12) & 0xfffff);
5759 bfd_putb32 (insn, splt->contents);
5760
5761 /* insn = PLT0_PIC_ENTRY_WORD0 | (((8 - sda_base) >> 2) & 0x7fff) ; */
5762 /* here has a typo? */
5763 insn = PLT0_PIC_ENTRY_WORD1 | (offset & 0xfff);
5764 bfd_putb32 (insn, splt->contents + 4);
5765
5766 insn = PLT0_PIC_ENTRY_WORD2;
5767 bfd_putb32 (insn, splt->contents + 8);
5768
5769 insn = PLT0_PIC_ENTRY_WORD3;
5770 bfd_putb32 (insn, splt->contents + 12);
5771
5772 insn = PLT0_PIC_ENTRY_WORD4;
5773 bfd_putb32 (insn, splt->contents + 16);
5774
5775 insn = PLT0_PIC_ENTRY_WORD5;
5776 bfd_putb32 (insn, splt->contents + 20);
5777 }
5778 else
5779 {
5780 unsigned long insn;
5781 unsigned long addr;
5782
5783 /* addr = .got + 4 */
5784 addr = sgot->output_section->vma + sgot->output_offset + 4;
5785 insn = PLT0_ENTRY_WORD0 | ((addr >> 12) & 0xfffff);
5786 bfd_putb32 (insn, splt->contents);
5787
5788 insn = PLT0_ENTRY_WORD1 | (addr & 0x0fff);
5789 bfd_putb32 (insn, splt->contents + 4);
5790
5791 insn = PLT0_ENTRY_WORD2;
5792 bfd_putb32 (insn, splt->contents + 8);
5793
5794 insn = PLT0_ENTRY_WORD3;
5795 bfd_putb32 (insn, splt->contents + 12);
5796
5797 insn = PLT0_ENTRY_WORD4;
5798 bfd_putb32 (insn, splt->contents + 16);
5799 }
5800
5801 elf_section_data (splt->output_section)->this_hdr.sh_entsize =
5802 PLT_ENTRY_SIZE;
5803 }
5804 }
5805
5806 /* Fill in the first three entries in the global offset table. */
5807 if (sgot && sgot->size > 0)
5808 {
5809 if (sdyn == NULL)
5810 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
5811 else
5812 bfd_put_32 (output_bfd,
5813 sdyn->output_section->vma + sdyn->output_offset,
5814 sgot->contents);
5815 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
5816 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
5817
5818 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
5819 }
5820
5821 return TRUE;
5822}
5823\f
5824
5825/* Set the right machine number. */
5826
5827static bfd_boolean
5828nds32_elf_object_p (bfd *abfd)
5829{
5830 static unsigned int cur_arch = 0;
5831
5832 if (E_N1_ARCH != (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH))
5833 {
5834 /* E_N1_ARCH is a wild card, so it is set only when no others exist. */
5835 cur_arch = (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH);
5836 }
5837
5838 switch (cur_arch)
5839 {
5840 default:
5841 case E_N1_ARCH:
5842 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1);
5843 break;
5844 case E_N1H_ARCH:
5845 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h);
5846 break;
5847 case E_NDS_ARCH_STAR_V2_0:
5848 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v2);
5849 break;
5850 case E_NDS_ARCH_STAR_V3_0:
5851 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3);
5852 break;
5853 case E_NDS_ARCH_STAR_V3_M:
5854 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3m);
5855 break;
5856 }
5857
5858 return TRUE;
5859}
5860
5861/* Store the machine number in the flags field. */
5862
5863static void
5864nds32_elf_final_write_processing (bfd *abfd,
5865 bfd_boolean linker ATTRIBUTE_UNUSED)
5866{
5867 unsigned long val;
5868 static unsigned int cur_mach = 0;
5869
5870 if (bfd_mach_n1 != bfd_get_mach (abfd))
5871 {
5872 cur_mach = bfd_get_mach (abfd);
5873 }
5874
5875 switch (cur_mach)
5876 {
5877 case bfd_mach_n1:
5878 /* Only happen when object is empty, since the case is abandon. */
5879 val = E_N1_ARCH;
5880 val |= E_NDS_ABI_AABI;
5881 val |= E_NDS32_ELF_VER_1_4;
5882 break;
5883 case bfd_mach_n1h:
5884 val = E_N1H_ARCH;
5885 break;
5886 case bfd_mach_n1h_v2:
5887 val = E_NDS_ARCH_STAR_V2_0;
5888 break;
5889 case bfd_mach_n1h_v3:
5890 val = E_NDS_ARCH_STAR_V3_0;
5891 break;
5892 case bfd_mach_n1h_v3m:
5893 val = E_NDS_ARCH_STAR_V3_M;
5894 break;
5895 default:
5896 val = 0;
5897 break;
5898 }
5899
5900 elf_elfheader (abfd)->e_flags &= ~EF_NDS_ARCH;
5901 elf_elfheader (abfd)->e_flags |= val;
5902}
5903
5904/* Function to keep NDS32 specific file flags. */
5905
5906static bfd_boolean
5907nds32_elf_set_private_flags (bfd *abfd, flagword flags)
5908{
5909 BFD_ASSERT (!elf_flags_init (abfd)
5910 || elf_elfheader (abfd)->e_flags == flags);
5911
5912 elf_elfheader (abfd)->e_flags = flags;
5913 elf_flags_init (abfd) = TRUE;
5914 return TRUE;
5915}
5916
5917static unsigned int
5918convert_e_flags (unsigned int e_flags, unsigned int arch)
5919{
5920 if ((e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9)
5921 {
5922 /* From 0.9 to 1.0. */
5923 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V1_0;
5924
5925 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5926 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5927 if (arch == E_NDS_ARCH_STAR_V1_0)
5928 {
5929 /* Done. */
5930 return e_flags;
5931 }
5932 }
5933
5934 /* From 1.0 to 2.0. */
5935 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V2_0;
5936
5937 /* Clear E_NDS32_HAS_MFUSR_PC_INST. */
5938 e_flags &= ~E_NDS32_HAS_MFUSR_PC_INST;
5939
5940 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5941 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5942 return e_flags;
5943}
5944
5945static bfd_boolean
5946nds32_check_vec_size (bfd *ibfd)
5947{
5948 static unsigned int nds32_vec_size = 0;
5949
5950 asection *sec_t = NULL;
5951 bfd_byte *contents = NULL;
5952
5953 sec_t = bfd_get_section_by_name (ibfd, ".nds32_e_flags");
5954
5955 if (sec_t && sec_t->size >= 4)
5956 {
5957 /* Get vec_size in file. */
5958 unsigned int flag_t;
5959
0c4bd9d9 5960 nds32_get_section_contents (ibfd, sec_t, &contents, TRUE);
35c08157
KLC
5961 flag_t = bfd_get_32 (ibfd, contents);
5962
5963 /* The value could only be 4 or 16. */
5964
5965 if (!nds32_vec_size)
5966 /* Set if not set yet. */
5967 nds32_vec_size = (flag_t & 0x3);
5968 else if (nds32_vec_size != (flag_t & 0x3))
5969 {
4eca0228
AM
5970 _bfd_error_handler
5971 (_("%B: ISR vector size mismatch"
5972 " with previous modules, previous %u-byte, current %u-byte"),
5973 ibfd,
5974 nds32_vec_size == 1 ? 4 : nds32_vec_size == 2 ? 16 : 0xffffffff,
5975 (flag_t & 0x3) == 1 ? 4 : (flag_t & 0x3) == 2 ? 16 : 0xffffffff);
35c08157
KLC
5976 return FALSE;
5977 }
5978 else
5979 /* Only keep the first vec_size section. */
5980 sec_t->flags |= SEC_EXCLUDE;
5981 }
5982
5983 return TRUE;
5984}
5985
5986/* Merge backend specific data from an object file to the output
5987 object file when linking. */
5988
5989static bfd_boolean
5990nds32_elf_merge_private_bfd_data (bfd *ibfd, bfd *obfd)
5991{
5992 flagword out_flags;
5993 flagword in_flags;
5994 flagword out_16regs;
5995 flagword in_no_mac;
5996 flagword out_no_mac;
5997 flagword in_16regs;
5998 flagword out_version;
5999 flagword in_version;
6000 flagword out_fpu_config;
6001 flagword in_fpu_config;
6002
6003 /* TODO: Revise to use object-attributes instead. */
6004 if (!nds32_check_vec_size (ibfd))
6005 return FALSE;
6006
6007 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
6008 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
6009 return TRUE;
6010
6011 if (bfd_little_endian (ibfd) != bfd_little_endian (obfd))
6012 {
4eca0228 6013 _bfd_error_handler
35c08157
KLC
6014 (_("%B: warning: Endian mismatch with previous modules."), ibfd);
6015
6016 bfd_set_error (bfd_error_bad_value);
6017 return FALSE;
6018 }
6019
6020 in_version = elf_elfheader (ibfd)->e_flags & EF_NDS32_ELF_VERSION;
6021 if (in_version == E_NDS32_ELF_VER_1_2)
6022 {
4eca0228 6023 _bfd_error_handler
35c08157
KLC
6024 (_("%B: warning: Older version of object file encountered, "
6025 "Please recompile with current tool chain."), ibfd);
6026 }
6027
6028 /* We may need to merge V1 and V2 arch object files to V2. */
6029 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6030 != (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
6031 {
6032 /* Need to convert version. */
6033 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6034 == E_NDS_ARCH_STAR_RESERVED)
6035 {
6036 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
6037 }
6038 else if ((elf_elfheader (obfd)->e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9
6039 || (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6040 > (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
6041 {
6042 elf_elfheader (obfd)->e_flags =
6043 convert_e_flags (elf_elfheader (obfd)->e_flags,
6044 (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH));
6045 }
6046 else
6047 {
6048 elf_elfheader (ibfd)->e_flags =
6049 convert_e_flags (elf_elfheader (ibfd)->e_flags,
6050 (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH));
6051 }
6052 }
6053
6054 /* Extract some flags. */
6055 in_flags = elf_elfheader (ibfd)->e_flags
6056 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6057 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6058
6059 /* The following flags need special treatment. */
6060 in_16regs = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6061 in_no_mac = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6062 in_fpu_config = elf_elfheader (ibfd)->e_flags & E_NDS32_FPU_REG_CONF;
6063
6064 /* Extract some flags. */
6065 out_flags = elf_elfheader (obfd)->e_flags
6066 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6067 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6068
6069 /* The following flags need special treatment. */
6070 out_16regs = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6071 out_no_mac = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6072 out_fpu_config = elf_elfheader (obfd)->e_flags & E_NDS32_FPU_REG_CONF;
6073 out_version = elf_elfheader (obfd)->e_flags & EF_NDS32_ELF_VERSION;
6074 if (!elf_flags_init (obfd))
6075 {
6076 /* If the input is the default architecture then do not
6077 bother setting the flags for the output architecture,
6078 instead allow future merges to do this. If no future
6079 merges ever set these flags then they will retain their
6080 unitialised values, which surprise surprise, correspond
6081 to the default values. */
6082 if (bfd_get_arch_info (ibfd)->the_default)
6083 return TRUE;
6084
6085 elf_flags_init (obfd) = TRUE;
6086 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
6087
6088 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
6089 && bfd_get_arch_info (obfd)->the_default)
6090 {
6091 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
6092 bfd_get_mach (ibfd));
6093 }
6094
6095 return TRUE;
6096 }
6097
6098 /* Check flag compatibility. */
6099 if ((in_flags & EF_NDS_ABI) != (out_flags & EF_NDS_ABI))
6100 {
4eca0228 6101 _bfd_error_handler
35c08157
KLC
6102 (_("%B: error: ABI mismatch with previous modules."), ibfd);
6103
6104 bfd_set_error (bfd_error_bad_value);
6105 return FALSE;
6106 }
6107
6108 if ((in_flags & EF_NDS_ARCH) != (out_flags & EF_NDS_ARCH))
6109 {
6110 if (((in_flags & EF_NDS_ARCH) != E_N1_ARCH))
6111 {
4eca0228 6112 _bfd_error_handler
35c08157
KLC
6113 (_("%B: error: Instruction set mismatch with previous modules."), ibfd);
6114
6115 bfd_set_error (bfd_error_bad_value);
6116 return FALSE;
6117 }
6118 }
6119
6120 /* When linking with V1.2 and V1.3 objects together the output is V1.2.
6121 and perf ext1 and DIV are mergerd to perf ext1. */
6122 if (in_version == E_NDS32_ELF_VER_1_2 || out_version == E_NDS32_ELF_VER_1_2)
6123 {
6124 elf_elfheader (obfd)->e_flags =
6125 (in_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6126 | (out_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6127 | (((in_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6128 ? E_NDS32_HAS_EXT_INST : 0)
6129 | (((out_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6130 ? E_NDS32_HAS_EXT_INST : 0)
6131 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6132 | ((in_version > out_version) ? out_version : in_version);
6133 }
6134 else
6135 {
6136 if (in_version != out_version)
4eca0228
AM
6137 _bfd_error_handler
6138 (_("%B: warning: Incompatible elf-versions %s and %s."),
6139 ibfd, nds32_elfver_strtab[out_version],
6140 nds32_elfver_strtab[in_version]);
35c08157
KLC
6141
6142 elf_elfheader (obfd)->e_flags = in_flags | out_flags
6143 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6144 | (in_fpu_config > out_fpu_config ? in_fpu_config : out_fpu_config)
6145 | (in_version > out_version ? out_version : in_version);
6146 }
6147
6148 return TRUE;
6149}
6150
6151/* Display the flags field. */
6152
6153static bfd_boolean
6154nds32_elf_print_private_bfd_data (bfd *abfd, void *ptr)
6155{
6156 FILE *file = (FILE *) ptr;
6157
6158 BFD_ASSERT (abfd != NULL && ptr != NULL);
6159
6160 _bfd_elf_print_private_bfd_data (abfd, ptr);
6161
6162 fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
6163
6164 switch (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH)
6165 {
6166 default:
6167 case E_N1_ARCH:
6168 fprintf (file, _(": n1 instructions"));
6169 break;
6170 case E_N1H_ARCH:
6171 fprintf (file, _(": n1h instructions"));
6172 break;
6173 }
6174
6175 fputc ('\n', file);
6176
6177 return TRUE;
6178}
6179
6180static unsigned int
6181nds32_elf_action_discarded (asection *sec)
6182{
6183
6184 if (strncmp
6185 (".gcc_except_table", sec->name, sizeof (".gcc_except_table") - 1) == 0)
6186 return 0;
6187
6188 return _bfd_elf_default_action_discarded (sec);
6189}
6190
6191static asection *
6192nds32_elf_gc_mark_hook (asection *sec, struct bfd_link_info *info,
6193 Elf_Internal_Rela *rel, struct elf_link_hash_entry *h,
6194 Elf_Internal_Sym *sym)
6195{
6196 if (h != NULL)
6197 switch (ELF32_R_TYPE (rel->r_info))
6198 {
6199 case R_NDS32_GNU_VTINHERIT:
6200 case R_NDS32_GNU_VTENTRY:
6201 case R_NDS32_RELA_GNU_VTINHERIT:
6202 case R_NDS32_RELA_GNU_VTENTRY:
6203 return NULL;
6204 }
6205
6206 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
6207}
6208
6209static bfd_boolean
6210nds32_elf_gc_sweep_hook (bfd *abfd, struct bfd_link_info *info, asection *sec,
6211 const Elf_Internal_Rela *relocs)
6212{
6213 /* Update the got entry reference counts for the section being removed. */
6214 Elf_Internal_Shdr *symtab_hdr;
6215 struct elf_link_hash_entry **sym_hashes;
6216 bfd_signed_vma *local_got_refcounts;
6217 const Elf_Internal_Rela *rel, *relend;
6218
6219 elf_section_data (sec)->local_dynrel = NULL;
6220
6221 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6222 sym_hashes = elf_sym_hashes (abfd);
6223 local_got_refcounts = elf_local_got_refcounts (abfd);
6224
6225 relend = relocs + sec->reloc_count;
6226 for (rel = relocs; rel < relend; rel++)
6227 {
6228 unsigned long r_symndx;
6229 struct elf_link_hash_entry *h = NULL;
6230
6231 r_symndx = ELF32_R_SYM (rel->r_info);
6232 if (r_symndx >= symtab_hdr->sh_info)
6233 {
6234 /* External symbol. */
6235 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6236 while (h->root.type == bfd_link_hash_indirect
6237 || h->root.type == bfd_link_hash_warning)
6238 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6239 }
6240
6241 switch (ELF32_R_TYPE (rel->r_info))
6242 {
6243 case R_NDS32_GOT_HI20:
6244 case R_NDS32_GOT_LO12:
6245 case R_NDS32_GOT_LO15:
6246 case R_NDS32_GOT_LO19:
6247 case R_NDS32_GOT17S2_RELA:
6248 case R_NDS32_GOT15S2_RELA:
6249 case R_NDS32_GOTOFF:
6250 case R_NDS32_GOTOFF_HI20:
6251 case R_NDS32_GOTOFF_LO12:
6252 case R_NDS32_GOTOFF_LO15:
6253 case R_NDS32_GOTOFF_LO19:
6254 case R_NDS32_GOT20:
6255 case R_NDS32_GOTPC_HI20:
6256 case R_NDS32_GOTPC_LO12:
6257 case R_NDS32_GOTPC20:
6258 if (h != NULL)
6259 {
6260 if (h->got.refcount > 0)
6261 h->got.refcount--;
6262 }
6263 else
6264 {
6265 if (local_got_refcounts && local_got_refcounts[r_symndx] > 0)
6266 local_got_refcounts[r_symndx]--;
6267 }
6268 break;
6269
6270 case R_NDS32_16_RELA:
6271 case R_NDS32_20_RELA:
6272 case R_NDS32_5_RELA:
6273 case R_NDS32_32_RELA:
6274 case R_NDS32_HI20_RELA:
6275 case R_NDS32_LO12S3_RELA:
6276 case R_NDS32_LO12S2_RELA:
6277 case R_NDS32_LO12S2_DP_RELA:
6278 case R_NDS32_LO12S2_SP_RELA:
6279 case R_NDS32_LO12S1_RELA:
6280 case R_NDS32_LO12S0_RELA:
6281 case R_NDS32_LO12S0_ORI_RELA:
6282 case R_NDS32_SDA16S3_RELA:
6283 case R_NDS32_SDA17S2_RELA:
6284 case R_NDS32_SDA18S1_RELA:
6285 case R_NDS32_SDA19S0_RELA:
6286 case R_NDS32_SDA15S3_RELA:
6287 case R_NDS32_SDA15S2_RELA:
6288 case R_NDS32_SDA12S2_DP_RELA:
6289 case R_NDS32_SDA12S2_SP_RELA:
6290 case R_NDS32_SDA15S1_RELA:
6291 case R_NDS32_SDA15S0_RELA:
6292 case R_NDS32_SDA_FP7U2_RELA:
6293 case R_NDS32_15_PCREL_RELA:
6294 case R_NDS32_17_PCREL_RELA:
6295 case R_NDS32_25_PCREL_RELA:
6296 if (h != NULL)
6297 {
6298 struct elf_nds32_link_hash_entry *eh;
6299 struct elf_nds32_dyn_relocs **pp;
6300 struct elf_nds32_dyn_relocs *p;
6301
0e1862bb 6302 if (!bfd_link_pic (info) && h->plt.refcount > 0)
35c08157
KLC
6303 h->plt.refcount -= 1;
6304
6305 eh = (struct elf_nds32_link_hash_entry *) h;
6306
6307 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; pp = &p->next)
6308 if (p->sec == sec)
6309 {
6310 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6311 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA
6312 || ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA)
6313 p->pc_count -= 1;
6314 p->count -= 1;
6315 if (p->count == 0)
6316 *pp = p->next;
6317 break;
6318 }
6319 }
6320 break;
6321
6322 case R_NDS32_9_PLTREL:
6323 case R_NDS32_25_PLTREL:
6324 if (h != NULL)
6325 {
6326 if (h->plt.refcount > 0)
6327 h->plt.refcount--;
6328 }
6329 break;
6330
6331 default:
6332 break;
6333 }
6334 }
6335
6336 return TRUE;
6337}
6338
6339/* Look through the relocs for a section during the first phase.
6340 Since we don't do .gots or .plts, we just need to consider the
6341 virtual table relocs for gc. */
6342
6343static bfd_boolean
6344nds32_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
6345 asection *sec, const Elf_Internal_Rela *relocs)
6346{
6347 Elf_Internal_Shdr *symtab_hdr;
6348 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
6349 const Elf_Internal_Rela *rel;
6350 const Elf_Internal_Rela *rel_end;
6351 struct elf_nds32_link_hash_table *htab;
6352 bfd *dynobj;
6353 asection *sreloc = NULL;
6354
0e1862bb 6355 if (bfd_link_relocatable (info))
35c08157
KLC
6356 return TRUE;
6357
6358 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6359 sym_hashes = elf_sym_hashes (abfd);
6360 sym_hashes_end =
6361 sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
6362 if (!elf_bad_symtab (abfd))
6363 sym_hashes_end -= symtab_hdr->sh_info;
6364
6365 htab = nds32_elf_hash_table (info);
6366 dynobj = htab->root.dynobj;
6367
6368 rel_end = relocs + sec->reloc_count;
6369 for (rel = relocs; rel < rel_end; rel++)
6370 {
6371 enum elf_nds32_reloc_type r_type;
6372 struct elf_link_hash_entry *h;
6373 unsigned long r_symndx;
1c8f6a4d 6374 int tls_type, old_tls_type;
35c08157
KLC
6375
6376 r_symndx = ELF32_R_SYM (rel->r_info);
6377 r_type = ELF32_R_TYPE (rel->r_info);
6378 if (r_symndx < symtab_hdr->sh_info)
6379 h = NULL;
6380 else
6381 {
6382 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6383 while (h->root.type == bfd_link_hash_indirect
6384 || h->root.type == bfd_link_hash_warning)
6385 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6386 }
6387
1c8f6a4d
KLC
6388 /* Some relocs require a global offset table. We create
6389 got section here, since these relocation need got section
6390 and it is not created yet. */
35c08157
KLC
6391 if (htab->sgot == NULL)
6392 {
6393 switch (r_type)
6394 {
6395 case R_NDS32_GOT_HI20:
6396 case R_NDS32_GOT_LO12:
6397 case R_NDS32_GOT_LO15:
6398 case R_NDS32_GOT_LO19:
6399 case R_NDS32_GOT17S2_RELA:
6400 case R_NDS32_GOT15S2_RELA:
6401 case R_NDS32_GOTOFF:
6402 case R_NDS32_GOTOFF_HI20:
6403 case R_NDS32_GOTOFF_LO12:
6404 case R_NDS32_GOTOFF_LO15:
6405 case R_NDS32_GOTOFF_LO19:
6406 case R_NDS32_GOTPC20:
6407 case R_NDS32_GOTPC_HI20:
6408 case R_NDS32_GOTPC_LO12:
6409 case R_NDS32_GOT20:
1c8f6a4d
KLC
6410 case R_NDS32_TLS_IE_HI20:
6411 case R_NDS32_TLS_IE_LO12S2:
35c08157
KLC
6412 if (dynobj == NULL)
6413 htab->root.dynobj = dynobj = abfd;
6414 if (!create_got_section (dynobj, info))
6415 return FALSE;
6416 break;
6417
6418 default:
6419 break;
6420 }
6421 }
6422
6423 switch ((int) r_type)
6424 {
6425 case R_NDS32_GOT_HI20:
6426 case R_NDS32_GOT_LO12:
6427 case R_NDS32_GOT_LO15:
6428 case R_NDS32_GOT_LO19:
6429 case R_NDS32_GOT20:
1c8f6a4d
KLC
6430 case R_NDS32_TLS_IE_HI20:
6431 case R_NDS32_TLS_IE_LO12S2:
6432 switch (r_type)
6433 {
6434 case R_NDS32_TLS_IE_HI20:
6435 case R_NDS32_TLS_IE_LO12S2:
6436 tls_type = GOT_TLS_IE;
6437 break;
6438 default:
6439 tls_type = GOT_NORMAL;
6440 break;
6441 }
35c08157 6442 if (h != NULL)
1c8f6a4d
KLC
6443 {
6444 old_tls_type = elf32_nds32_hash_entry (h)->tls_type;
6445 h->got.refcount += 1;
6446 }
35c08157
KLC
6447 else
6448 {
6449 bfd_signed_vma *local_got_refcounts;
6450
6451 /* This is a global offset table entry for a local
6452 symbol. */
6453 local_got_refcounts = elf_local_got_refcounts (abfd);
6454 if (local_got_refcounts == NULL)
6455 {
6456 bfd_size_type size;
6457
6458 size = symtab_hdr->sh_info;
6459 size *= sizeof (bfd_signed_vma);
6460 local_got_refcounts = (bfd_signed_vma *) bfd_zalloc (abfd, size);
6461 if (local_got_refcounts == NULL)
6462 return FALSE;
6463 elf_local_got_refcounts (abfd) = local_got_refcounts;
6464 }
6465 local_got_refcounts[r_symndx] += 1;
1c8f6a4d 6466 old_tls_type = elf32_nds32_local_got_tls_type (abfd)[r_symndx];
35c08157 6467 }
35c08157 6468
1c8f6a4d
KLC
6469 /* We will already have issued an error message if there
6470 is a TLS/non-TLS mismatch, based on the symbol
6471 type. So just combine any TLS types needed. */
6472 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
6473 && tls_type != GOT_NORMAL)
6474 tls_type |= old_tls_type;
6475
6476 if (old_tls_type != tls_type)
6477 {
6478 if (h != NULL)
6479 elf32_nds32_hash_entry (h)->tls_type = tls_type;
6480 else
6481 elf32_nds32_local_got_tls_type (abfd)[r_symndx] = tls_type;
6482 }
6483 break;
6484 case R_NDS32_9_PLTREL:
35c08157
KLC
6485 case R_NDS32_25_PLTREL:
6486 case R_NDS32_PLTREL_HI20:
6487 case R_NDS32_PLTREL_LO12:
6488 case R_NDS32_PLT_GOTREL_HI20:
6489 case R_NDS32_PLT_GOTREL_LO12:
6490 case R_NDS32_PLT_GOTREL_LO15:
6491 case R_NDS32_PLT_GOTREL_LO19:
6492 case R_NDS32_PLT_GOTREL_LO20:
6493
6494 /* This symbol requires a procedure linkage table entry. We
6495 actually build the entry in adjust_dynamic_symbol,
6496 because this might be a case of linking PIC code without
6497 linking in any dynamic objects, in which case we don't
6498 need to generate a procedure linkage table after all. */
6499
6500 /* If this is a local symbol, we resolve it directly without
6501 creating a procedure linkage table entry. */
6502 if (h == NULL)
6503 continue;
6504
6505 if (h->forced_local)
6506 break;
6507
1c8f6a4d 6508 elf32_nds32_hash_entry (h)->tls_type = GOT_NORMAL;
35c08157
KLC
6509 h->needs_plt = 1;
6510 h->plt.refcount += 1;
6511 break;
6512
6513 case R_NDS32_16_RELA:
6514 case R_NDS32_20_RELA:
6515 case R_NDS32_5_RELA:
6516 case R_NDS32_32_RELA:
6517 case R_NDS32_HI20_RELA:
6518 case R_NDS32_LO12S3_RELA:
6519 case R_NDS32_LO12S2_RELA:
6520 case R_NDS32_LO12S2_DP_RELA:
6521 case R_NDS32_LO12S2_SP_RELA:
6522 case R_NDS32_LO12S1_RELA:
6523 case R_NDS32_LO12S0_RELA:
6524 case R_NDS32_LO12S0_ORI_RELA:
6525 case R_NDS32_SDA16S3_RELA:
6526 case R_NDS32_SDA17S2_RELA:
6527 case R_NDS32_SDA18S1_RELA:
6528 case R_NDS32_SDA19S0_RELA:
6529 case R_NDS32_SDA15S3_RELA:
6530 case R_NDS32_SDA15S2_RELA:
6531 case R_NDS32_SDA12S2_DP_RELA:
6532 case R_NDS32_SDA12S2_SP_RELA:
6533 case R_NDS32_SDA15S1_RELA:
6534 case R_NDS32_SDA15S0_RELA:
6535 case R_NDS32_SDA_FP7U2_RELA:
6536 case R_NDS32_15_PCREL_RELA:
6537 case R_NDS32_17_PCREL_RELA:
6538 case R_NDS32_25_PCREL_RELA:
6539
0e1862bb 6540 if (h != NULL && !bfd_link_pic (info))
35c08157
KLC
6541 {
6542 h->non_got_ref = 1;
6543 h->plt.refcount += 1;
6544 }
6545
6546 /* If we are creating a shared library, and this is a reloc against
6547 a global symbol, or a non PC relative reloc against a local
6548 symbol, then we need to copy the reloc into the shared library.
6549 However, if we are linking with -Bsymbolic, we do not need to
6550 copy a reloc against a global symbol which is defined in an
6551 object we are including in the link (i.e., DEF_REGULAR is set).
6552 At this point we have not seen all the input files, so it is
6553 possible that DEF_REGULAR is not set now but will be set later
6554 (it is never cleared). We account for that possibility below by
6555 storing information in the dyn_relocs field of the hash table
6556 entry. A similar situation occurs when creating shared libraries
6557 and symbol visibility changes render the symbol local.
6558
6559 If on the other hand, we are creating an executable, we may need
6560 to keep relocations for symbols satisfied by a dynamic library
6561 if we manage to avoid copy relocs for the symbol. */
0e1862bb 6562 if ((bfd_link_pic (info)
35c08157
KLC
6563 && (sec->flags & SEC_ALLOC) != 0
6564 && ((r_type != R_NDS32_25_PCREL_RELA
6565 && r_type != R_NDS32_15_PCREL_RELA
6566 && r_type != R_NDS32_17_PCREL_RELA
6567 && !(r_type == R_NDS32_32_RELA
6568 && strcmp (sec->name, ".eh_frame") == 0))
6569 || (h != NULL
6570 && (!info->symbolic
6571 || h->root.type == bfd_link_hash_defweak
6572 || !h->def_regular))))
0e1862bb 6573 || (!bfd_link_pic (info)
35c08157
KLC
6574 && (sec->flags & SEC_ALLOC) != 0
6575 && h != NULL
6576 && (h->root.type == bfd_link_hash_defweak
6577 || !h->def_regular)))
6578 {
6579 struct elf_nds32_dyn_relocs *p;
6580 struct elf_nds32_dyn_relocs **head;
6581
6582 if (dynobj == NULL)
6583 htab->root.dynobj = dynobj = abfd;
6584
6585 /* When creating a shared object, we must copy these
6586 relocs into the output file. We create a reloc
6587 section in dynobj and make room for the reloc. */
6588 if (sreloc == NULL)
6589 {
6590 const char *name;
6591
6592 name = bfd_elf_string_from_elf_section
6593 (abfd, elf_elfheader (abfd)->e_shstrndx,
6594 elf_section_data (sec)->rela.hdr->sh_name);
6595 if (name == NULL)
6596 return FALSE;
6597
6598 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
6599 && strcmp (bfd_get_section_name (abfd, sec),
6600 name + 5) == 0);
6601
6602 sreloc = bfd_get_section_by_name (dynobj, name);
6603 if (sreloc == NULL)
6604 {
6605 flagword flags;
6606
6607 sreloc = bfd_make_section (dynobj, name);
6608 flags = (SEC_HAS_CONTENTS | SEC_READONLY
6609 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
6610 if ((sec->flags & SEC_ALLOC) != 0)
6611 flags |= SEC_ALLOC | SEC_LOAD;
6612 if (sreloc == NULL
6613 || !bfd_set_section_flags (dynobj, sreloc, flags)
6614 || !bfd_set_section_alignment (dynobj, sreloc, 2))
6615 return FALSE;
6616
6617 elf_section_type (sreloc) = SHT_RELA;
6618 }
6619 elf_section_data (sec)->sreloc = sreloc;
6620 }
6621
6622 /* If this is a global symbol, we count the number of
6623 relocations we need for this symbol. */
6624 if (h != NULL)
6625 head = &((struct elf_nds32_link_hash_entry *) h)->dyn_relocs;
6626 else
6627 {
6628 asection *s;
6629
6630 Elf_Internal_Sym *isym;
6631 isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, r_symndx);
6632 if (isym == NULL)
6633 return FALSE;
6634
6635 /* Track dynamic relocs needed for local syms too. */
6636 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
6637 if (s == NULL)
6638 return FALSE;
6639
6640 head = ((struct elf_nds32_dyn_relocs **)
6641 &elf_section_data (s)->local_dynrel);
6642 }
6643
6644 p = *head;
6645 if (p == NULL || p->sec != sec)
6646 {
6647 bfd_size_type amt = sizeof (*p);
6648 p = (struct elf_nds32_dyn_relocs *) bfd_alloc (dynobj, amt);
6649 if (p == NULL)
6650 return FALSE;
6651 p->next = *head;
6652 *head = p;
6653 p->sec = sec;
6654 p->count = 0;
6655 p->pc_count = 0;
6656 }
6657
6658 p->count += 1;
6659 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA
6660 || ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6661 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA)
6662 p->pc_count += 1;
6663 }
6664 break;
6665
6666 /* This relocation describes the C++ object vtable hierarchy.
6667 Reconstruct it for later use during GC. */
6668 case R_NDS32_RELA_GNU_VTINHERIT:
6669 case R_NDS32_GNU_VTINHERIT:
6670 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
6671 return FALSE;
6672 break;
6673
6674 /* This relocation describes which C++ vtable entries are actually
6675 used. Record for later use during GC. */
6676 case R_NDS32_GNU_VTENTRY:
6677 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
6678 return FALSE;
6679 break;
6680 case R_NDS32_RELA_GNU_VTENTRY:
6681 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
6682 return FALSE;
6683 break;
6684 }
6685 }
6686
6687 return TRUE;
6688}
6689
6690/* Write VAL in uleb128 format to P, returning a pointer to the
6691 following byte.
6692 This code is copied from elf-attr.c. */
6693
6694static bfd_byte *
6695write_uleb128 (bfd_byte *p, unsigned int val)
6696{
6697 bfd_byte c;
6698 do
6699 {
6700 c = val & 0x7f;
6701 val >>= 7;
6702 if (val)
6703 c |= 0x80;
6704 *(p++) = c;
6705 }
6706 while (val);
6707 return p;
6708}
6709
6710static bfd_signed_vma
6711calculate_offset (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
6712 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr,
6713 int *pic_ext_target)
6714{
6715 bfd_signed_vma foff;
6716 bfd_vma symval, addend;
6717 asection *sym_sec;
6718
6719 /* Get the value of the symbol referred to by the reloc. */
6720 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6721 {
6722 Elf_Internal_Sym *isym;
6723
6724 /* A local symbol. */
6725 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6726
6727 if (isym->st_shndx == SHN_UNDEF)
6728 sym_sec = bfd_und_section_ptr;
6729 else if (isym->st_shndx == SHN_ABS)
6730 sym_sec = bfd_abs_section_ptr;
6731 else if (isym->st_shndx == SHN_COMMON)
6732 sym_sec = bfd_com_section_ptr;
6733 else
6734 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6735 symval = isym->st_value + sym_sec->output_section->vma
6736 + sym_sec->output_offset;
6737 }
6738 else
6739 {
6740 unsigned long indx;
6741 struct elf_link_hash_entry *h;
6742 bfd *owner;
6743
6744 /* An external symbol. */
6745 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6746 h = elf_sym_hashes (abfd)[indx];
6747 BFD_ASSERT (h != NULL);
6748
6749 if (h->root.type != bfd_link_hash_defined
6750 && h->root.type != bfd_link_hash_defweak)
6751 /* This appears to be a reference to an undefined
6752 symbol. Just ignore it--it will be caught by the
6753 regular reloc processing. */
6754 return 0;
6755 owner = h->root.u.def.section->owner;
6756 if (owner && (elf_elfheader (owner)->e_flags & E_NDS32_HAS_PIC))
6757 *pic_ext_target = 1;
6758
6759 if (h->root.u.def.section->flags & SEC_MERGE)
6760 {
6761 sym_sec = h->root.u.def.section;
6762 symval = _bfd_merged_section_offset (abfd, &sym_sec,
6763 elf_section_data (sym_sec)->sec_info,
6764 h->root.u.def.value);
6765 symval = symval + sym_sec->output_section->vma
6766 + sym_sec->output_offset;
6767 }
6768 else
6769 symval = (h->root.u.def.value
6770 + h->root.u.def.section->output_section->vma
6771 + h->root.u.def.section->output_offset);
6772 }
6773
6774 addend = irel->r_addend;
6775
6776 foff = (symval + addend
6777 - (irel->r_offset + sec->output_section->vma + sec->output_offset));
6778 return foff;
6779}
6780
6781static bfd_vma
6782calculate_plt_memory_address (bfd *abfd, struct bfd_link_info *link_info,
6783 Elf_Internal_Sym *isymbuf,
6784 Elf_Internal_Rela *irel,
6785 Elf_Internal_Shdr *symtab_hdr)
6786{
6787 bfd_vma symval;
6788
6789 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6790 {
6791 Elf_Internal_Sym *isym;
6792 asection *sym_sec;
6793 /* A local symbol. */
6794 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6795
6796 if (isym->st_shndx == SHN_UNDEF)
6797 sym_sec = bfd_und_section_ptr;
6798 else if (isym->st_shndx == SHN_ABS)
6799 sym_sec = bfd_abs_section_ptr;
6800 else if (isym->st_shndx == SHN_COMMON)
6801 sym_sec = bfd_com_section_ptr;
6802 else
6803 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6804 symval = isym->st_value + sym_sec->output_section->vma
6805 + sym_sec->output_offset;
6806 }
6807 else
6808 {
6809 unsigned long indx;
6810 struct elf_link_hash_entry *h;
6811 struct elf_nds32_link_hash_table *htab;
6812 asection *splt;
6813
6814 /* An external symbol. */
6815 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6816 h = elf_sym_hashes (abfd)[indx];
6817 BFD_ASSERT (h != NULL);
6818 htab = nds32_elf_hash_table (link_info);
6819 splt = htab->splt;
6820
6821 while (h->root.type == bfd_link_hash_indirect
6822 || h->root.type == bfd_link_hash_warning)
6823 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6824
6825 if (h->plt.offset == (bfd_vma) - 1)
6826 {
6827 if (h->root.type != bfd_link_hash_defined
6828 && h->root.type != bfd_link_hash_defweak)
6829 /* This appears to be a reference to an undefined
6830 * symbol. Just ignore it--it will be caught by the
6831 * regular reloc processing. */
6832 return 0;
6833 symval = (h->root.u.def.value
6834 + h->root.u.def.section->output_section->vma
6835 + h->root.u.def.section->output_offset);
6836 }
6837 else
6838 symval = splt->output_section->vma + h->plt.offset;
6839 }
6840
6841 return symval;
6842}
6843
6844static bfd_signed_vma
6845calculate_plt_offset (bfd *abfd, asection *sec, struct bfd_link_info *link_info,
6846 Elf_Internal_Sym *isymbuf, Elf_Internal_Rela *irel,
6847 Elf_Internal_Shdr *symtab_hdr)
6848{
6849 bfd_vma foff;
6850 if ((foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
6851 symtab_hdr)) == 0)
6852 return 0;
6853 else
6854 return foff - (irel->r_offset
6855 + sec->output_section->vma + sec->output_offset);
6856}
6857\f
6858/* Convert a 32-bit instruction to 16-bit one.
6859 INSN is the input 32-bit instruction, INSN16 is the output 16-bit
6860 instruction. If INSN_TYPE is not NULL, it the CGEN instruction
6861 type of INSN16. Return 1 if successful. */
6862
6863static int
6864nds32_convert_32_to_16_alu1 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6865 int *pinsn_type)
6866{
6867 uint16_t insn16 = 0;
6cae483a 6868 int insn_type = 0;
35c08157
KLC
6869 unsigned long mach = bfd_get_mach (abfd);
6870
6871 if (N32_SH5 (insn) != 0)
6872 return 0;
6873
6874 switch (N32_SUB5 (insn))
6875 {
6876 case N32_ALU1_ADD_SLLI:
6877 case N32_ALU1_ADD_SRLI:
6878 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6879 {
6880 insn16 = N16_TYPE333 (ADD333, N32_RT5 (insn), N32_RA5 (insn),
6881 N32_RB5 (insn));
6882 insn_type = NDS32_INSN_ADD333;
6883 }
6884 else if (N32_IS_RT4 (insn))
6885 {
6886 if (N32_RT5 (insn) == N32_RA5 (insn))
6887 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RB5 (insn));
6888 else if (N32_RT5 (insn) == N32_RB5 (insn))
6889 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RA5 (insn));
6890 insn_type = NDS32_INSN_ADD45;
6891 }
6892 break;
6893
6894 case N32_ALU1_SUB_SLLI:
6895 case N32_ALU1_SUB_SRLI:
6896 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6897 {
6898 insn16 = N16_TYPE333 (SUB333, N32_RT5 (insn), N32_RA5 (insn),
6899 N32_RB5 (insn));
6900 insn_type = NDS32_INSN_SUB333;
6901 }
6902 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6903 {
6904 insn16 = N16_TYPE45 (SUB45, N32_RT54 (insn), N32_RB5 (insn));
6905 insn_type = NDS32_INSN_SUB45;
6906 }
6907 break;
6908
6909 case N32_ALU1_AND_SLLI:
6910 case N32_ALU1_AND_SRLI:
6911 /* and $rt, $rt, $rb -> and33 for v3, v3m. */
6912 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6913 && N32_IS_RB3 (insn))
6914 {
6915 if (N32_RT5 (insn) == N32_RA5 (insn))
6916 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RB5 (insn));
6917 else if (N32_RT5 (insn) == N32_RB5 (insn))
6918 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RA5 (insn));
6919 if (insn16)
6920 insn_type = NDS32_INSN_AND33;
6921 }
6922 break;
6923
6924 case N32_ALU1_XOR_SLLI:
6925 case N32_ALU1_XOR_SRLI:
6926 /* xor $rt, $rt, $rb -> xor33 for v3, v3m. */
6927 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6928 && N32_IS_RB3 (insn))
6929 {
6930 if (N32_RT5 (insn) == N32_RA5 (insn))
6931 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RB5 (insn));
6932 else if (N32_RT5 (insn) == N32_RB5 (insn))
6933 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RA5 (insn));
6934 if (insn16)
6935 insn_type = NDS32_INSN_XOR33;
6936 }
6937 break;
6938
6939 case N32_ALU1_OR_SLLI:
6940 case N32_ALU1_OR_SRLI:
6941 /* or $rt, $rt, $rb -> or33 for v3, v3m. */
6942 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6943 && N32_IS_RB3 (insn))
6944 {
6945 if (N32_RT5 (insn) == N32_RA5 (insn))
6946 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RB5 (insn));
6947 else if (N32_RT5 (insn) == N32_RB5 (insn))
6948 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RA5 (insn));
6949 if (insn16)
6950 insn_type = NDS32_INSN_OR33;
6951 }
6952 break;
6953 case N32_ALU1_NOR:
6954 /* nor $rt, $ra, $ra -> not33 for v3, v3m. */
6955 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RB3 (insn)
6956 && N32_RA5 (insn) == N32_RB5 (insn))
6957 {
6958 insn16 = N16_MISC33 (NOT33, N32_RT5 (insn), N32_RA5 (insn));
6959 insn_type = NDS32_INSN_NOT33;
6960 }
6961 break;
6962 case N32_ALU1_SRAI:
6963 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6964 {
6965 insn16 = N16_TYPE45 (SRAI45, N32_RT54 (insn), N32_UB5 (insn));
6966 insn_type = NDS32_INSN_SRAI45;
6967 }
6968 break;
6969
6970 case N32_ALU1_SRLI:
6971 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6972 {
6973 insn16 = N16_TYPE45 (SRLI45, N32_RT54 (insn), N32_UB5 (insn));
6974 insn_type = NDS32_INSN_SRLI45;
6975 }
6976 break;
6977
6978 case N32_ALU1_SLLI:
6979 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_UB5 (insn) < 8)
6980 {
6981 insn16 = N16_TYPE333 (SLLI333, N32_RT5 (insn), N32_RA5 (insn),
6982 N32_UB5 (insn));
6983 insn_type = NDS32_INSN_SLLI333;
6984 }
6985 break;
6986
6987 case N32_ALU1_ZEH:
6988 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6989 {
6990 insn16 = N16_BFMI333 (ZEH33, N32_RT5 (insn), N32_RA5 (insn));
6991 insn_type = NDS32_INSN_ZEH33;
6992 }
6993 break;
6994
6995 case N32_ALU1_SEB:
6996 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6997 {
6998 insn16 = N16_BFMI333 (SEB33, N32_RT5 (insn), N32_RA5 (insn));
6999 insn_type = NDS32_INSN_SEB33;
7000 }
7001 break;
7002
7003 case N32_ALU1_SEH:
7004 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7005 {
7006 insn16 = N16_BFMI333 (SEH33, N32_RT5 (insn), N32_RA5 (insn));
7007 insn_type = NDS32_INSN_SEH33;
7008 }
7009 break;
7010
7011 case N32_ALU1_SLT:
7012 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
7013 {
7014 /* Implicit r15. */
7015 insn16 = N16_TYPE45 (SLT45, N32_RA54 (insn), N32_RB5 (insn));
7016 insn_type = NDS32_INSN_SLT45;
7017 }
7018 break;
7019
7020 case N32_ALU1_SLTS:
7021 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
7022 {
7023 /* Implicit r15. */
7024 insn16 = N16_TYPE45 (SLTS45, N32_RA54 (insn), N32_RB5 (insn));
7025 insn_type = NDS32_INSN_SLTS45;
7026 }
7027 break;
7028 }
7029
7030 if ((insn16 & 0x8000) == 0)
7031 return 0;
7032
7033 if (pinsn16)
7034 *pinsn16 = insn16;
7035 if (pinsn_type)
7036 *pinsn_type = insn_type;
7037 return 1;
7038}
7039
7040static int
7041nds32_convert_32_to_16_alu2 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7042 int *pinsn_type)
7043{
7044 uint16_t insn16 = 0;
7045 int insn_type;
7046 unsigned long mach = bfd_get_mach (abfd);
7047
7048 /* TODO: bset, bclr, btgl, btst. */
7049 if (__GF (insn, 6, 4) != 0)
7050 return 0;
7051
7052 switch (N32_IMMU (insn, 6))
7053 {
7054 case N32_ALU2_MUL:
7055 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7056 && N32_IS_RB3 (insn))
7057 {
7058 if (N32_RT5 (insn) == N32_RA5 (insn))
7059 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RB5 (insn));
7060 else if (N32_RT5 (insn) == N32_RB5 (insn))
7061 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RA5 (insn));
7062 if (insn16)
7063 insn_type = NDS32_INSN_MUL33;
7064 }
7065 }
7066
7067 if ((insn16 & 0x8000) == 0)
7068 return 0;
7069
7070 if (pinsn16)
7071 *pinsn16 = insn16;
7072 if (pinsn_type)
7073 *pinsn_type = insn_type;
7074 return 1;
7075}
7076
7077int
7078nds32_convert_32_to_16 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7079 int *pinsn_type)
7080{
7081 int op6;
7082 uint16_t insn16 = 0;
7083 int insn_type;
7084 unsigned long mach = bfd_get_mach (abfd);
7085
7086 /* Decode 32-bit instruction. */
7087 if (insn & 0x80000000)
7088 {
7089 /* Not 32-bit insn. */
7090 return 0;
7091 }
7092
7093 op6 = N32_OP6 (insn);
7094
7095 /* Convert it to 16-bit instruction. */
7096 switch (op6)
7097 {
7098 case N32_OP6_MOVI:
7099 if (IS_WITHIN_S (N32_IMM20S (insn), 5))
7100 {
7101 insn16 = N16_TYPE55 (MOVI55, N32_RT5 (insn), N32_IMM20S (insn));
7102 insn_type = NDS32_INSN_MOVI55;
7103 }
7104 else if (mach >= MACH_V3 && N32_IMM20S (insn) >= 16
7105 && N32_IMM20S (insn) < 48 && N32_IS_RT4 (insn))
7106 {
7107 insn16 = N16_TYPE45 (MOVPI45, N32_RT54 (insn),
7108 N32_IMM20S (insn) - 16);
7109 insn_type = NDS32_INSN_MOVPI45;
7110 }
7111 break;
7112
7113 case N32_OP6_ADDI:
7114 if (N32_IMM15S (insn) == 0)
7115 {
7116 /* Do not convert `addi $sp, $sp, 0' to `mov55 $sp, $sp',
7117 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
7118 if (mach <= MACH_V2
7119 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
7120 {
7121 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
7122 insn_type = NDS32_INSN_MOV55;
7123 }
7124 }
7125 else if (N32_IMM15S (insn) > 0)
7126 {
7127 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) < 8)
7128 {
7129 insn16 = N16_TYPE333 (ADDI333, N32_RT5 (insn), N32_RA5 (insn),
7130 N32_IMM15S (insn));
7131 insn_type = NDS32_INSN_ADDI333;
7132 }
7133 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
7134 && N32_IMM15S (insn) < 32)
7135 {
7136 insn16 = N16_TYPE45 (ADDI45, N32_RT54 (insn), N32_IMM15S (insn));
7137 insn_type = NDS32_INSN_ADDI45;
7138 }
7139 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
7140 && N32_RT5 (insn) == N32_RA5 (insn)
7141 && N32_IMM15S (insn) < 512)
7142 {
7143 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
7144 insn_type = NDS32_INSN_ADDI10_SP;
7145 }
7146 else if (mach >= MACH_V3 && N32_IS_RT3 (insn)
7147 && N32_RA5 (insn) == REG_SP && N32_IMM15S (insn) < 256
7148 && (N32_IMM15S (insn) % 4 == 0))
7149 {
7150 insn16 = N16_TYPE36 (ADDRI36_SP, N32_RT5 (insn),
7151 N32_IMM15S (insn) >> 2);
7152 insn_type = NDS32_INSN_ADDRI36_SP;
7153 }
7154 }
7155 else
7156 {
7157 /* Less than 0. */
7158 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) > -8)
7159 {
7160 insn16 = N16_TYPE333 (SUBI333, N32_RT5 (insn), N32_RA5 (insn),
7161 0 - N32_IMM15S (insn));
7162 insn_type = NDS32_INSN_SUBI333;
7163 }
7164 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
7165 && N32_IMM15S (insn) > -32)
7166 {
1c8f6a4d
KLC
7167 insn16 = N16_TYPE45 (SUBI45, N32_RT54 (insn),
7168 0 - N32_IMM15S (insn));
35c08157
KLC
7169 insn_type = NDS32_INSN_SUBI45;
7170 }
7171 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
7172 && N32_RT5 (insn) == N32_RA5 (insn)
7173 && N32_IMM15S (insn) >= -512)
7174 {
7175 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
7176 insn_type = NDS32_INSN_ADDI10_SP;
7177 }
7178 }
7179 break;
7180
7181 case N32_OP6_ORI:
7182 if (N32_IMM15S (insn) == 0)
7183 {
7184 /* Do not convert `ori $sp, $sp, 0' to `mov55 $sp, $sp',
7185 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
7186 if (mach <= MACH_V2
7187 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
7188 {
7189 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
7190 insn_type = NDS32_INSN_MOV55;
7191 }
7192 }
7193 break;
7194
7195 case N32_OP6_SUBRI:
7196 if (mach >= MACH_V3 && N32_IS_RT3 (insn)
7197 && N32_IS_RA3 (insn) && N32_IMM15S (insn) == 0)
7198 {
7199 insn16 = N16_MISC33 (NEG33, N32_RT5 (insn), N32_RA5 (insn));
7200 insn_type = NDS32_INSN_NEG33;
7201 }
7202 break;
7203
7204 case N32_OP6_ANDI:
7205 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7206 {
7207 if (N32_IMM15U (insn) == 1)
7208 {
7209 insn16 = N16_BFMI333 (XLSB33, N32_RT5 (insn), N32_RA5 (insn));
7210 insn_type = NDS32_INSN_XLSB33;
7211 }
7212 else if (N32_IMM15U (insn) == 0x7ff)
7213 {
7214 insn16 = N16_BFMI333 (X11B33, N32_RT5 (insn), N32_RA5 (insn));
7215 insn_type = NDS32_INSN_X11B33;
7216 }
7217 else if (N32_IMM15U (insn) == 0xff)
7218 {
7219 insn16 = N16_BFMI333 (ZEB33, N32_RT5 (insn), N32_RA5 (insn));
7220 insn_type = NDS32_INSN_ZEB33;
7221 }
7222 else if (mach >= MACH_V3 && N32_RT5 (insn) == N32_RA5 (insn)
7223 && N32_IMM15U (insn) < 256)
7224 {
7225 int imm15u = N32_IMM15U (insn);
7226
7227 if (__builtin_popcount (imm15u) == 1)
7228 {
7229 /* BMSKI33 */
7230 int imm3u = __builtin_ctz (imm15u);
7231
7232 insn16 = N16_BFMI333 (BMSKI33, N32_RT5 (insn), imm3u);
7233 insn_type = NDS32_INSN_BMSKI33;
7234 }
7235 else if (imm15u != 0 && __builtin_popcount (imm15u + 1) == 1)
7236 {
7237 /* FEXTI33 */
7238 int imm3u = __builtin_ctz (imm15u + 1) - 1;
7239
7240 insn16 = N16_BFMI333 (FEXTI33, N32_RT5 (insn), imm3u);
7241 insn_type = NDS32_INSN_FEXTI33;
7242 }
7243 }
7244 }
7245 break;
7246
7247 case N32_OP6_SLTI:
7248 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7249 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7250 {
7251 insn16 = N16_TYPE45 (SLTI45, N32_RA54 (insn), N32_IMM15S (insn));
7252 insn_type = NDS32_INSN_SLTI45;
7253 }
7254 break;
7255
7256 case N32_OP6_SLTSI:
7257 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7258 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7259 {
7260 insn16 = N16_TYPE45 (SLTSI45, N32_RA54 (insn), N32_IMM15S (insn));
7261 insn_type = NDS32_INSN_SLTSI45;
7262 }
7263 break;
7264
7265 case N32_OP6_LWI:
7266 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7267 {
7268 insn16 = N16_TYPE45 (LWI450, N32_RT54 (insn), N32_RA5 (insn));
7269 insn_type = NDS32_INSN_LWI450;
7270 }
7271 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7272 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7273 {
7274 insn16 = N16_TYPE333 (LWI333, N32_RT5 (insn), N32_RA5 (insn),
7275 N32_IMM15S (insn));
7276 insn_type = NDS32_INSN_LWI333;
7277 }
7278 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7279 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7280 {
7281 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7282 insn_type = NDS32_INSN_LWI37;
7283 }
7284 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7285 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7286 {
7287 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 0, N32_IMM15S (insn));
7288 insn_type = NDS32_INSN_LWI37_SP;
7289 }
7290 else if (mach >= MACH_V2 && N32_IS_RT4 (insn) && N32_RA5 (insn) == REG_R8
7291 && -32 <= N32_IMM15S (insn) && N32_IMM15S (insn) < 0)
7292 {
1c8f6a4d
KLC
7293 insn16 = N16_TYPE45 (LWI45_FE, N32_RT54 (insn),
7294 N32_IMM15S (insn) + 32);
35c08157
KLC
7295 insn_type = NDS32_INSN_LWI45_FE;
7296 }
7297 break;
7298
7299 case N32_OP6_SWI:
7300 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7301 {
7302 insn16 = N16_TYPE45 (SWI450, N32_RT54 (insn), N32_RA5 (insn));
7303 insn_type = NDS32_INSN_SWI450;
7304 }
7305 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7306 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7307 {
1c8f6a4d
KLC
7308 insn16 = N16_TYPE333 (SWI333, N32_RT5 (insn), N32_RA5 (insn),
7309 N32_IMM15S (insn));
35c08157
KLC
7310 insn_type = NDS32_INSN_SWI333;
7311 }
7312 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7313 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7314 {
7315 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7316 insn_type = NDS32_INSN_SWI37;
7317 }
7318 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7319 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7320 {
7321 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 1, N32_IMM15S (insn));
7322 insn_type = NDS32_INSN_SWI37_SP;
7323 }
7324 break;
7325
7326 case N32_OP6_LWI_BI:
7327 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7328 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7329 {
7330 insn16 = N16_TYPE333 (LWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7331 N32_IMM15S (insn));
7332 insn_type = NDS32_INSN_LWI333_BI;
7333 }
7334 break;
7335
7336 case N32_OP6_SWI_BI:
7337 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7338 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7339 {
7340 insn16 = N16_TYPE333 (SWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7341 N32_IMM15S (insn));
7342 insn_type = NDS32_INSN_SWI333_BI;
7343 }
7344 break;
7345
7346 case N32_OP6_LHI:
7347 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7348 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7349 {
7350 insn16 = N16_TYPE333 (LHI333, N32_RT5 (insn), N32_RA5 (insn),
7351 N32_IMM15S (insn));
7352 insn_type = NDS32_INSN_LHI333;
7353 }
7354 break;
7355
7356 case N32_OP6_SHI:
7357 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7358 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7359 {
7360 insn16 = N16_TYPE333 (SHI333, N32_RT5 (insn), N32_RA5 (insn),
7361 N32_IMM15S (insn));
7362 insn_type = NDS32_INSN_SHI333;
7363 }
7364 break;
7365
7366 case N32_OP6_LBI:
7367 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7368 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7369 {
7370 insn16 = N16_TYPE333 (LBI333, N32_RT5 (insn), N32_RA5 (insn),
7371 N32_IMM15S (insn));
7372 insn_type = NDS32_INSN_LBI333;
7373 }
7374 break;
7375
7376 case N32_OP6_SBI:
7377 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7378 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7379 {
7380 insn16 = N16_TYPE333 (SBI333, N32_RT5 (insn), N32_RA5 (insn),
7381 N32_IMM15S (insn));
7382 insn_type = NDS32_INSN_SBI333;
7383 }
7384 break;
7385
7386 case N32_OP6_ALU1:
7387 return nds32_convert_32_to_16_alu1 (abfd, insn, pinsn16, pinsn_type);
7388
7389 case N32_OP6_ALU2:
7390 return nds32_convert_32_to_16_alu2 (abfd, insn, pinsn16, pinsn_type);
7391
7392 case N32_OP6_BR1:
7393 if (!IS_WITHIN_S (N32_IMM14S (insn), 8))
7394 goto done;
7395
7396 if ((insn & __BIT (14)) == 0)
7397 {
7398 /* N32_BR1_BEQ */
7399 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7400 && N32_RT5 (insn) != REG_R5)
7401 insn16 = N16_TYPE38 (BEQS38, N32_RT5 (insn), N32_IMM14S (insn));
7402 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7403 && N32_RA5 (insn) != REG_R5)
7404 insn16 = N16_TYPE38 (BEQS38, N32_RA5 (insn), N32_IMM14S (insn));
7405 insn_type = NDS32_INSN_BEQS38;
7406 break;
7407 }
7408 else
7409 {
7410 /* N32_BR1_BNE */
7411 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7412 && N32_RT5 (insn) != REG_R5)
7413 insn16 = N16_TYPE38 (BNES38, N32_RT5 (insn), N32_IMM14S (insn));
7414 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7415 && N32_RA5 (insn) != REG_R5)
7416 insn16 = N16_TYPE38 (BNES38, N32_RA5 (insn), N32_IMM14S (insn));
7417 insn_type = NDS32_INSN_BNES38;
7418 break;
7419 }
7420 break;
7421
7422 case N32_OP6_BR2:
7423 switch (N32_BR2_SUB (insn))
7424 {
7425 case N32_BR2_BEQZ:
7426 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7427 {
7428 insn16 = N16_TYPE38 (BEQZ38, N32_RT5 (insn), N32_IMM16S (insn));
7429 insn_type = NDS32_INSN_BEQZ38;
7430 }
1c8f6a4d
KLC
7431 else if (N32_RT5 (insn) == REG_R15
7432 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC
7433 {
7434 insn16 = N16_TYPE8 (BEQZS8, N32_IMM16S (insn));
7435 insn_type = NDS32_INSN_BEQZS8;
7436 }
7437 break;
7438
7439 case N32_BR2_BNEZ:
7440 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7441 {
7442 insn16 = N16_TYPE38 (BNEZ38, N32_RT5 (insn), N32_IMM16S (insn));
7443 insn_type = NDS32_INSN_BNEZ38;
7444 }
1c8f6a4d
KLC
7445 else if (N32_RT5 (insn) == REG_R15
7446 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC
7447 {
7448 insn16 = N16_TYPE8 (BNEZS8, N32_IMM16S (insn));
7449 insn_type = NDS32_INSN_BNEZS8;
7450 }
7451 break;
7452
7453 case N32_BR2_IFCALL:
7454 if (IS_WITHIN_U (N32_IMM16S (insn), 9))
7455 {
7456 insn16 = N16_TYPE9 (IFCALL9, N32_IMM16S (insn));
7457 insn_type = NDS32_INSN_IFCALL9;
7458 }
7459 break;
7460 }
7461 break;
7462
7463 case N32_OP6_JI:
7464 if ((insn & __BIT (24)) == 0)
7465 {
7466 /* N32_JI_J */
7467 if (IS_WITHIN_S (N32_IMM24S (insn), 8))
7468 {
7469 insn16 = N16_TYPE8 (J8, N32_IMM24S (insn));
7470 insn_type = NDS32_INSN_J8;
7471 }
7472 }
7473 break;
7474
7475 case N32_OP6_JREG:
7476 if (__GF (insn, 8, 2) != 0)
7477 goto done;
7478
7479 switch (N32_IMMU (insn, 5))
7480 {
7481 case N32_JREG_JR:
7482 if (N32_JREG_HINT (insn) == 0)
7483 {
7484 /* jr */
7485 insn16 = N16_TYPE5 (JR5, N32_RB5 (insn));
7486 insn_type = NDS32_INSN_JR5;
7487 }
7488 else if (N32_JREG_HINT (insn) == 1)
7489 {
7490 /* ret */
7491 insn16 = N16_TYPE5 (RET5, N32_RB5 (insn));
7492 insn_type = NDS32_INSN_RET5;
7493 }
7494 else if (N32_JREG_HINT (insn) == 3)
7495 {
7496 /* ifret = mov55 $sp, $sp */
7497 insn16 = N16_TYPE55 (MOV55, REG_SP, REG_SP);
7498 insn_type = NDS32_INSN_IFRET;
7499 }
7500 break;
7501
7502 case N32_JREG_JRAL:
7503 /* It's convertible when return rt5 is $lp and address
7504 translation is kept. */
7505 if (N32_RT5 (insn) == REG_LP && N32_JREG_HINT (insn) == 0)
7506 {
7507 insn16 = N16_TYPE5 (JRAL5, N32_RB5 (insn));
7508 insn_type = NDS32_INSN_JRAL5;
7509 }
7510 break;
7511 }
7512 break;
7513
7514 case N32_OP6_MISC:
7515 if (N32_SUB5 (insn) == N32_MISC_BREAK && N32_SWID (insn) < 32)
7516 {
7517 /* For v3, swid above 31 are used for ex9.it. */
7518 insn16 = N16_TYPE5 (BREAK16, N32_SWID (insn));
7519 insn_type = NDS32_INSN_BREAK16;
7520 }
7521 break;
7522
7523 default:
7524 /* This instruction has no 16-bit variant. */
7525 goto done;
7526 }
7527
7528done:
7529 /* Bit-15 of insn16 should be set for a valid instruction. */
7530 if ((insn16 & 0x8000) == 0)
7531 return 0;
7532
7533 if (pinsn16)
7534 *pinsn16 = insn16;
7535 if (pinsn_type)
7536 *pinsn_type = insn_type;
7537 return 1;
7538}
7539
7540static int
7541special_convert_32_to_16 (unsigned long insn, uint16_t *pinsn16,
7542 Elf_Internal_Rela *reloc)
7543{
7544 uint16_t insn16 = 0;
7545
7546 if ((reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG) == 0
7547 || (ELF32_R_TYPE (reloc->r_info) != R_NDS32_INSN16))
7548 return 0;
7549
7550 if (!N32_IS_RT3 (insn))
7551 return 0;
7552
7553 switch (N32_OP6 (insn))
7554 {
7555 case N32_OP6_LWI:
7556 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7557 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7558 break;
7559 case N32_OP6_SWI:
7560 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7561 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7562 break;
7563 case N32_OP6_HWGP:
7564 if (!IS_WITHIN_U (N32_IMM17S (insn), 7))
7565 break;
7566
7567 if (__GF (insn, 17, 3) == 6)
7568 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM17S (insn));
7569 else if (__GF (insn, 17, 3) == 7)
7570 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM17S (insn));
7571 break;
7572 }
7573
7574 if ((insn16 & 0x8000) == 0)
7575 return 0;
7576
7577 *pinsn16 = insn16;
7578 return 1;
7579}
7580
7581/* Convert a 16-bit instruction to 32-bit one.
7582 INSN16 it the input and PINSN it the point to output.
7583 Return non-zero on successful. Otherwise 0 is returned. */
7584
7585int
7586nds32_convert_16_to_32 (bfd *abfd, uint16_t insn16, uint32_t *pinsn)
7587{
7588 uint32_t insn = 0xffffffff;
7589 unsigned long mach = bfd_get_mach (abfd);
7590
7591 /* NOTE: push25, pop25 and movd44 do not have 32-bit variants. */
7592
7593 switch (__GF (insn16, 9, 6))
7594 {
7595 case 0x4: /* add45 */
1c8f6a4d
KLC
7596 insn = N32_ALU1 (ADD, N16_RT4 (insn16), N16_RT4 (insn16),
7597 N16_RA5 (insn16));
35c08157
KLC
7598 goto done;
7599 case 0x5: /* sub45 */
1c8f6a4d
KLC
7600 insn = N32_ALU1 (SUB, N16_RT4 (insn16), N16_RT4 (insn16),
7601 N16_RA5 (insn16));
35c08157
KLC
7602 goto done;
7603 case 0x6: /* addi45 */
1c8f6a4d
KLC
7604 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7605 N16_IMM5U (insn16));
35c08157
KLC
7606 goto done;
7607 case 0x7: /* subi45 */
1c8f6a4d
KLC
7608 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7609 -N16_IMM5U (insn16));
35c08157
KLC
7610 goto done;
7611 case 0x8: /* srai45 */
1c8f6a4d
KLC
7612 insn = N32_ALU1 (SRAI, N16_RT4 (insn16), N16_RT4 (insn16),
7613 N16_IMM5U (insn16));
35c08157
KLC
7614 goto done;
7615 case 0x9: /* srli45 */
1c8f6a4d
KLC
7616 insn = N32_ALU1 (SRLI, N16_RT4 (insn16), N16_RT4 (insn16),
7617 N16_IMM5U (insn16));
35c08157 7618 goto done;
35c08157 7619 case 0xa: /* slli333 */
1c8f6a4d
KLC
7620 insn = N32_ALU1 (SLLI, N16_RT3 (insn16), N16_RA3 (insn16),
7621 N16_IMM3U (insn16));
35c08157
KLC
7622 goto done;
7623 case 0xc: /* add333 */
1c8f6a4d
KLC
7624 insn = N32_ALU1 (ADD, N16_RT3 (insn16), N16_RA3 (insn16),
7625 N16_RB3 (insn16));
35c08157
KLC
7626 goto done;
7627 case 0xd: /* sub333 */
1c8f6a4d
KLC
7628 insn = N32_ALU1 (SUB, N16_RT3 (insn16), N16_RA3 (insn16),
7629 N16_RB3 (insn16));
35c08157
KLC
7630 goto done;
7631 case 0xe: /* addi333 */
1c8f6a4d
KLC
7632 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7633 N16_IMM3U (insn16));
35c08157
KLC
7634 goto done;
7635 case 0xf: /* subi333 */
1c8f6a4d
KLC
7636 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7637 -N16_IMM3U (insn16));
35c08157 7638 goto done;
35c08157 7639 case 0x10: /* lwi333 */
1c8f6a4d
KLC
7640 insn = N32_TYPE2 (LWI, N16_RT3 (insn16), N16_RA3 (insn16),
7641 N16_IMM3U (insn16));
35c08157
KLC
7642 goto done;
7643 case 0x12: /* lhi333 */
1c8f6a4d
KLC
7644 insn = N32_TYPE2 (LHI, N16_RT3 (insn16), N16_RA3 (insn16),
7645 N16_IMM3U (insn16));
35c08157
KLC
7646 goto done;
7647 case 0x13: /* lbi333 */
1c8f6a4d
KLC
7648 insn = N32_TYPE2 (LBI, N16_RT3 (insn16), N16_RA3 (insn16),
7649 N16_IMM3U (insn16));
35c08157
KLC
7650 goto done;
7651 case 0x11: /* lwi333.bi */
1c8f6a4d
KLC
7652 insn = N32_TYPE2 (LWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7653 N16_IMM3U (insn16));
35c08157
KLC
7654 goto done;
7655 case 0x14: /* swi333 */
1c8f6a4d
KLC
7656 insn = N32_TYPE2 (SWI, N16_RT3 (insn16), N16_RA3 (insn16),
7657 N16_IMM3U (insn16));
35c08157
KLC
7658 goto done;
7659 case 0x16: /* shi333 */
1c8f6a4d
KLC
7660 insn = N32_TYPE2 (SHI, N16_RT3 (insn16), N16_RA3 (insn16),
7661 N16_IMM3U (insn16));
35c08157
KLC
7662 goto done;
7663 case 0x17: /* sbi333 */
1c8f6a4d
KLC
7664 insn = N32_TYPE2 (SBI, N16_RT3 (insn16), N16_RA3 (insn16),
7665 N16_IMM3U (insn16));
35c08157
KLC
7666 goto done;
7667 case 0x15: /* swi333.bi */
1c8f6a4d
KLC
7668 insn = N32_TYPE2 (SWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7669 N16_IMM3U (insn16));
35c08157 7670 goto done;
35c08157 7671 case 0x18: /* addri36.sp */
1c8f6a4d
KLC
7672 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), REG_SP,
7673 N16_IMM6U (insn16) << 2);
35c08157 7674 goto done;
35c08157 7675 case 0x19: /* lwi45.fe */
1c8f6a4d
KLC
7676 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), REG_R8,
7677 (N16_IMM5U (insn16) - 32));
35c08157
KLC
7678 goto done;
7679 case 0x1a: /* lwi450 */
7680 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7681 goto done;
7682 case 0x1b: /* swi450 */
7683 insn = N32_TYPE2 (SWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7684 goto done;
7685
1c8f6a4d 7686 /* These are r15 implied instructions. */
35c08157
KLC
7687 case 0x30: /* slts45 */
7688 insn = N32_ALU1 (SLTS, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7689 goto done;
7690 case 0x31: /* slt45 */
7691 insn = N32_ALU1 (SLT, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7692 goto done;
7693 case 0x32: /* sltsi45 */
7694 insn = N32_TYPE2 (SLTSI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7695 goto done;
7696 case 0x33: /* slti45 */
7697 insn = N32_TYPE2 (SLTI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7698 goto done;
7699 case 0x34: /* beqzs8, bnezs8 */
7700 if (insn16 & __BIT (8))
7701 insn = N32_BR2 (BNEZ, REG_TA, N16_IMM8S (insn16));
7702 else
7703 insn = N32_BR2 (BEQZ, REG_TA, N16_IMM8S (insn16));
7704 goto done;
7705
7706 case 0x35: /* break16, ex9.it */
7707 /* Only consider range of v3 break16. */
7708 insn = N32_TYPE0 (MISC, (N16_IMM5U (insn16) << 5) | N32_MISC_BREAK);
7709 goto done;
7710
7711 case 0x3c: /* ifcall9 */
7712 insn = N32_BR2 (IFCALL, 0, N16_IMM9U (insn16));
7713 goto done;
7714 case 0x3d: /* movpi45 */
7715 insn = N32_TYPE1 (MOVI, N16_RT4 (insn16), N16_IMM5U (insn16) + 16);
7716 goto done;
7717
7718 case 0x3f: /* MISC33 */
1c8f6a4d 7719 switch (insn16 & 0x7)
35c08157
KLC
7720 {
7721 case 2: /* neg33 */
7722 insn = N32_TYPE2 (SUBRI, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7723 break;
7724 case 3: /* not33 */
1c8f6a4d
KLC
7725 insn = N32_ALU1 (NOR, N16_RT3 (insn16), N16_RA3 (insn16),
7726 N16_RA3 (insn16));
35c08157
KLC
7727 break;
7728 case 4: /* mul33 */
1c8f6a4d
KLC
7729 insn = N32_ALU2 (MUL, N16_RT3 (insn16), N16_RT3 (insn16),
7730 N16_RA3 (insn16));
35c08157
KLC
7731 break;
7732 case 5: /* xor33 */
1c8f6a4d
KLC
7733 insn = N32_ALU1 (XOR, N16_RT3 (insn16), N16_RT3 (insn16),
7734 N16_RA3 (insn16));
35c08157
KLC
7735 break;
7736 case 6: /* and33 */
1c8f6a4d
KLC
7737 insn = N32_ALU1 (AND, N16_RT3 (insn16), N16_RT3 (insn16),
7738 N16_RA3 (insn16));
35c08157
KLC
7739 break;
7740 case 7: /* or33 */
1c8f6a4d
KLC
7741 insn = N32_ALU1 (OR, N16_RT3 (insn16), N16_RT3 (insn16),
7742 N16_RA3 (insn16));
35c08157
KLC
7743 break;
7744 }
7745 goto done;
7746
1c8f6a4d 7747 case 0xb:
35c08157
KLC
7748 switch (insn16 & 0x7)
7749 {
7750 case 0: /* zeb33 */
7751 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0xff);
7752 break;
7753 case 1: /* zeh33 */
7754 insn = N32_ALU1 (ZEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7755 break;
7756 case 2: /* seb33 */
7757 insn = N32_ALU1 (SEB, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7758 break;
7759 case 3: /* seh33 */
7760 insn = N32_ALU1 (SEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7761 break;
7762 case 4: /* xlsb33 */
7763 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 1);
7764 break;
7765 case 5: /* x11b33 */
7766 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0x7ff);
7767 break;
7768 case 6: /* bmski33 */
7769 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 7770 1 << __GF (insn16, 3, 3));
35c08157
KLC
7771 break;
7772 case 7: /* fexti33 */
7773 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 7774 (1 << (__GF (insn16, 3, 3) + 1)) - 1);
35c08157
KLC
7775 break;
7776 }
7777 goto done;
7778 }
7779
7780 switch (__GF (insn16, 10, 5))
7781 {
7782 case 0x0: /* mov55 or ifret16 */
7783 if (mach >= MACH_V3 && N16_RT5 (insn16) == REG_SP
7784 && N16_RT5 (insn16) == N16_RA5 (insn16))
1c8f6a4d 7785 insn = N32_JREG (JR, 0, 0, 0, 3);
35c08157 7786 else
1c8f6a4d 7787 insn = N32_TYPE2 (ADDI, N16_RT5 (insn16), N16_RA5 (insn16), 0);
35c08157
KLC
7788 goto done;
7789 case 0x1: /* movi55 */
7790 insn = N32_TYPE1 (MOVI, N16_RT5 (insn16), N16_IMM5S (insn16));
7791 goto done;
7792 case 0x1b: /* addi10s (V2) */
7793 insn = N32_TYPE2 (ADDI, REG_SP, REG_SP, N16_IMM10S (insn16));
7794 goto done;
7795 }
7796
7797 switch (__GF (insn16, 11, 4))
7798 {
7799 case 0x7: /* lwi37.fp/swi37.fp */
7800 if (insn16 & __BIT (7)) /* swi37.fp */
7801 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7802 else /* lwi37.fp */
7803 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7804 goto done;
7805 case 0x8: /* beqz38 */
7806 insn = N32_BR2 (BEQZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7807 goto done;
7808 case 0x9: /* bnez38 */
7809 insn = N32_BR2 (BNEZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7810 goto done;
7811 case 0xa: /* beqs38/j8, implied r5 */
7812 if (N16_RT38 (insn16) == 5)
7813 insn = N32_JI (J, N16_IMM8S (insn16));
7814 else
7815 insn = N32_BR1 (BEQ, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7816 goto done;
7817 case 0xb: /* bnes38 and others */
7818 if (N16_RT38 (insn16) == 5)
7819 {
7820 switch (__GF (insn16, 5, 3))
7821 {
7822 case 0: /* jr5 */
7823 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 0);
7824 break;
7825 case 4: /* ret5 */
7826 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 1);
7827 break;
7828 case 1: /* jral5 */
7829 insn = N32_JREG (JRAL, REG_LP, N16_RA5 (insn16), 0, 0);
7830 break;
7831 case 2: /* ex9.it imm5 */
7832 /* ex9.it had no 32-bit variantl. */
7833 break;
7834 case 5: /* add5.pc */
7835 /* add5.pc had no 32-bit variantl. */
7836 break;
7837 }
7838 }
7839 else /* bnes38 */
7840 insn = N32_BR1 (BNE, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7841 goto done;
7842 case 0xe: /* lwi37/swi37 */
7843 if (insn16 & (1 << 7)) /* swi37.sp */
7844 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7845 else /* lwi37.sp */
7846 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7847 goto done;
7848 }
7849
7850done:
7851 if (insn & 0x80000000)
7852 return 0;
7853
7854 if (pinsn)
7855 *pinsn = insn;
7856 return 1;
7857}
7858\f
7859static bfd_boolean
7860is_sda_access_insn (unsigned long insn)
7861{
7862 switch (N32_OP6 (insn))
7863 {
7864 case N32_OP6_LWI:
7865 case N32_OP6_LHI:
7866 case N32_OP6_LHSI:
7867 case N32_OP6_LBI:
7868 case N32_OP6_LBSI:
7869 case N32_OP6_SWI:
7870 case N32_OP6_SHI:
7871 case N32_OP6_SBI:
7872 case N32_OP6_LWC:
7873 case N32_OP6_LDC:
7874 case N32_OP6_SWC:
7875 case N32_OP6_SDC:
7876 return TRUE;
7877 default:
7878 ;
7879 }
7880 return FALSE;
7881}
7882
7883static unsigned long
7884turn_insn_to_sda_access (uint32_t insn, bfd_signed_vma type, uint32_t *pinsn)
7885{
7886 uint32_t oinsn = 0;
7887
7888 switch (type)
7889 {
7890 case R_NDS32_GOT_LO12:
7891 case R_NDS32_GOTOFF_LO12:
7892 case R_NDS32_PLTREL_LO12:
7893 case R_NDS32_PLT_GOTREL_LO12:
7894 case R_NDS32_LO12S0_RELA:
7895 switch (N32_OP6 (insn))
7896 {
7897 case N32_OP6_LBI:
7898 /* lbi.gp */
7899 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
7900 break;
7901 case N32_OP6_LBSI:
7902 /* lbsi.gp */
7903 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19));
7904 break;
7905 case N32_OP6_SBI:
7906 /* sbi.gp */
7907 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
7908 break;
7909 case N32_OP6_ORI:
7910 /* addi.gp */
7911 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
7912 break;
7913 }
7914 break;
7915
7916 case R_NDS32_LO12S1_RELA:
7917 switch (N32_OP6 (insn))
7918 {
7919 case N32_OP6_LHI:
7920 /* lhi.gp */
7921 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
7922 break;
7923 case N32_OP6_LHSI:
7924 /* lhsi.gp */
7925 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18));
7926 break;
7927 case N32_OP6_SHI:
7928 /* shi.gp */
7929 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19));
7930 break;
7931 }
7932 break;
7933
7934 case R_NDS32_LO12S2_RELA:
7935 switch (N32_OP6 (insn))
7936 {
7937 case N32_OP6_LWI:
7938 /* lwi.gp */
7939 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
7940 break;
7941 case N32_OP6_SWI:
7942 /* swi.gp */
7943 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
7944 break;
7945 }
7946 break;
7947
7948 case R_NDS32_LO12S2_DP_RELA:
7949 case R_NDS32_LO12S2_SP_RELA:
7950 oinsn = (insn & 0x7ff07000) | (REG_GP << 15);
7951 break;
7952 }
7953
7954 if (oinsn)
7955 *pinsn = oinsn;
7956
7957 return oinsn != 0;
7958}
7959
7960/* Linker hasn't found the correct merge section for non-section symbol
7961 in relax time, this work is left to the function elf_link_input_bfd().
7962 So for non-section symbol, _bfd_merged_section_offset is also needed
7963 to find the correct symbol address. */
7964
7965static bfd_vma
7966nds32_elf_rela_local_sym (bfd *abfd, Elf_Internal_Sym *sym,
7967 asection **psec, Elf_Internal_Rela *rel)
7968{
7969 asection *sec = *psec;
7970 bfd_vma relocation;
7971
7972 relocation = (sec->output_section->vma
7973 + sec->output_offset + sym->st_value);
7974 if ((sec->flags & SEC_MERGE) && sec->sec_info_type == SEC_INFO_TYPE_MERGE)
7975 {
7976 if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
7977 rel->r_addend =
7978 _bfd_merged_section_offset (abfd, psec,
7979 elf_section_data (sec)->sec_info,
7980 sym->st_value + rel->r_addend);
7981 else
7982 rel->r_addend =
7983 _bfd_merged_section_offset (abfd, psec,
7984 elf_section_data (sec)->sec_info,
7985 sym->st_value) + rel->r_addend;
7986
7987 if (sec != *psec)
7988 {
7989 /* If we have changed the section, and our original section is
7990 marked with SEC_EXCLUDE, it means that the original
7991 SEC_MERGE section has been completely subsumed in some
7992 other SEC_MERGE section. In this case, we need to leave
7993 some info around for --emit-relocs. */
7994 if ((sec->flags & SEC_EXCLUDE) != 0)
7995 sec->kept_section = *psec;
7996 sec = *psec;
7997 }
7998 rel->r_addend -= relocation;
7999 rel->r_addend += sec->output_section->vma + sec->output_offset;
8000 }
8001 return relocation;
8002}
8003
8004static bfd_vma
8005calculate_memory_address (bfd *abfd, Elf_Internal_Rela *irel,
8006 Elf_Internal_Sym *isymbuf,
8007 Elf_Internal_Shdr *symtab_hdr)
8008{
8009 bfd_signed_vma foff;
8010 bfd_vma symval, addend;
8011 Elf_Internal_Rela irel_fn;
8012 Elf_Internal_Sym *isym;
8013 asection *sym_sec;
8014
8015 /* Get the value of the symbol referred to by the reloc. */
8016 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
8017 {
8018 /* A local symbol. */
8019 isym = isymbuf + ELF32_R_SYM (irel->r_info);
8020
8021 if (isym->st_shndx == SHN_UNDEF)
8022 sym_sec = bfd_und_section_ptr;
8023 else if (isym->st_shndx == SHN_ABS)
8024 sym_sec = bfd_abs_section_ptr;
8025 else if (isym->st_shndx == SHN_COMMON)
8026 sym_sec = bfd_com_section_ptr;
8027 else
8028 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
8029 memcpy (&irel_fn, irel, sizeof (Elf_Internal_Rela));
8030 symval = nds32_elf_rela_local_sym (abfd, isym, &sym_sec, &irel_fn);
8031 addend = irel_fn.r_addend;
8032 }
8033 else
8034 {
8035 unsigned long indx;
8036 struct elf_link_hash_entry *h;
8037
8038 /* An external symbol. */
8039 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
8040 h = elf_sym_hashes (abfd)[indx];
8041 BFD_ASSERT (h != NULL);
8042
8043 while (h->root.type == bfd_link_hash_indirect
8044 || h->root.type == bfd_link_hash_warning)
8045 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8046
8047 if (h->root.type != bfd_link_hash_defined
8048 && h->root.type != bfd_link_hash_defweak)
8049 /* This appears to be a reference to an undefined
8050 symbol. Just ignore it--it will be caught by the
8051 regular reloc processing. */
8052 return 0;
8053
8054 if (h->root.u.def.section->flags & SEC_MERGE)
8055 {
8056 sym_sec = h->root.u.def.section;
8057 symval = _bfd_merged_section_offset (abfd, &sym_sec, elf_section_data
8058 (sym_sec)->sec_info, h->root.u.def.value);
8059 symval = symval + sym_sec->output_section->vma
8060 + sym_sec->output_offset;
8061 }
8062 else
8063 symval = (h->root.u.def.value
8064 + h->root.u.def.section->output_section->vma
8065 + h->root.u.def.section->output_offset);
8066 addend = irel->r_addend;
8067 }
8068
8069 foff = symval + addend;
8070
8071 return foff;
8072}
8073
8074static bfd_vma
8075calculate_got_memory_address (bfd *abfd, struct bfd_link_info *link_info,
8076 Elf_Internal_Rela *irel,
8077 Elf_Internal_Shdr *symtab_hdr)
8078{
8079 int symndx;
8080 bfd_vma *local_got_offsets;
8081 /* Get the value of the symbol referred to by the reloc. */
8082 struct elf_link_hash_entry *h;
8083 struct elf_nds32_link_hash_table *htab = nds32_elf_hash_table (link_info);
8084
8085 /* An external symbol. */
8086 symndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
8087 h = elf_sym_hashes (abfd)[symndx];
8088 while (h->root.type == bfd_link_hash_indirect
8089 || h->root.type == bfd_link_hash_warning)
8090 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8091
8092 if (symndx >= 0)
8093 {
8094 BFD_ASSERT (h != NULL);
8095 return htab->sgot->output_section->vma + htab->sgot->output_offset
8096 + h->got.offset;
8097 }
8098 else
8099 {
8100 local_got_offsets = elf_local_got_offsets (abfd);
8101 BFD_ASSERT (local_got_offsets != NULL);
8102 return htab->sgot->output_section->vma + htab->sgot->output_offset
8103 + local_got_offsets[ELF32_R_SYM (irel->r_info)];
8104 }
8105
8106 /* The _GLOBAL_OFFSET_TABLE_ may be undefweak(or should be?). */
8107 /* The check of h->root.type is passed. */
8108}
8109
8110static int
8111is_16bit_NOP (bfd *abfd ATTRIBUTE_UNUSED,
8112 asection *sec, Elf_Internal_Rela *rel)
8113{
8114 bfd_byte *contents;
8115 unsigned short insn16;
8116
8117 if (!(rel->r_addend & R_NDS32_INSN16_CONVERT_FLAG))
8118 return FALSE;
8119 contents = elf_section_data (sec)->this_hdr.contents;
8120 insn16 = bfd_getb16 (contents + rel->r_offset);
8121 if (insn16 == NDS32_NOP16)
8122 return TRUE;
8123 return FALSE;
8124}
8125
8126/* It checks whether the instruction could be converted to
8127 16-bit form and returns the converted one.
8128
8129 `internal_relocs' is supposed to be sorted. */
8130
8131static int
8132is_convert_32_to_16 (bfd *abfd, asection *sec,
8133 Elf_Internal_Rela *reloc,
8134 Elf_Internal_Rela *internal_relocs,
8135 Elf_Internal_Rela *irelend,
8136 uint16_t *insn16)
8137{
8138#define NORMAL_32_TO_16 (1 << 0)
8139#define SPECIAL_32_TO_16 (1 << 1)
8140 bfd_byte *contents = NULL;
8141 bfd_signed_vma off;
8142 bfd_vma mem_addr;
8143 uint32_t insn = 0;
8144 Elf_Internal_Rela *pc_rel;
8145 int pic_ext_target = 0;
8146 Elf_Internal_Shdr *symtab_hdr;
8147 Elf_Internal_Sym *isymbuf = NULL;
8148 int convert_type;
8149 bfd_vma offset;
8150
8151 if (reloc->r_offset + 4 > sec->size)
8152 return FALSE;
8153
8154 offset = reloc->r_offset;
8155
0c4bd9d9 8156 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
35c08157
KLC
8157 return FALSE;
8158 insn = bfd_getb32 (contents + offset);
8159
8160 if (nds32_convert_32_to_16 (abfd, insn, insn16, NULL))
8161 convert_type = NORMAL_32_TO_16;
8162 else if (special_convert_32_to_16 (insn, insn16, reloc))
8163 convert_type = SPECIAL_32_TO_16;
8164 else
8165 return FALSE;
8166
8167 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8168 if (!nds32_get_local_syms (abfd, sec, &isymbuf))
8169 return FALSE;
8170
8171 /* Find the first relocation of the same relocation-type,
8172 so we iteratie them forward. */
8173 pc_rel = reloc;
1c8f6a4d 8174 while ((pc_rel - 1) >= internal_relocs && pc_rel[-1].r_offset == offset)
35c08157
KLC
8175 pc_rel--;
8176
8177 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8178 {
8179 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8180 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8181 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA
8182 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8183 {
8184 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
8185 &pic_ext_target);
1c8f6a4d
KLC
8186 if (off >= ACCURATE_8BIT_S1 || off < -ACCURATE_8BIT_S1
8187 || off == 0)
35c08157
KLC
8188 return FALSE;
8189 break;
8190 }
8191 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8192 {
8193 /* movi => movi55 */
1c8f6a4d
KLC
8194 mem_addr = calculate_memory_address (abfd, pc_rel, isymbuf,
8195 symtab_hdr);
8196 /* mem_addr is unsigned, but the value should
8197 be between [-16, 15]. */
35c08157
KLC
8198 if ((mem_addr + 0x10) >> 5)
8199 return FALSE;
8200 break;
8201 }
1c8f6a4d
KLC
8202 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_20)
8203 || (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_LO12))
8204 {
8205 /* It never happen movi to movi55 for R_NDS32_TLS_LE_20,
8206 because it can be relaxed to addi for TLS_LE_ADD. */
8207 return FALSE;
8208 }
35c08157
KLC
8209 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8210 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8211 && (reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG)
8212 && convert_type == SPECIAL_32_TO_16)
8213 {
8214 /* fp-as-gp
8215 We've selected a best fp-base for this access, so we can
8216 always resolve it anyway. Do nothing. */
8217 break;
8218 }
8219 else if ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_NONE
8220 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_RELA_GNU_VTINHERIT))
8221 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_RELA_GNU_VTENTRY)
8222 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_INSN16))
8223 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_LOADSTORE)
8224 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_DWARF2_OP1_RELA)))
8225 {
1c8f6a4d
KLC
8226 /* Prevent unresolved addi instruction translate
8227 to addi45 or addi333. */
35c08157
KLC
8228 return FALSE;
8229 }
1c8f6a4d
KLC
8230 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8231 {
8232 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
8233 &pic_ext_target);
8234 if (off >= ACCURATE_U9BIT_S1 || off <= 0)
8235 return FALSE;
8236 break;
8237 }
35c08157
KLC
8238 }
8239
8240 return TRUE;
8241}
8242
8243static void
8244nds32_elf_write_16 (bfd *abfd ATTRIBUTE_UNUSED, bfd_byte *contents,
8245 Elf_Internal_Rela *reloc,
8246 Elf_Internal_Rela *internal_relocs,
8247 Elf_Internal_Rela *irelend,
8248 unsigned short insn16)
8249{
8250 Elf_Internal_Rela *pc_rel;
8251 bfd_vma offset;
8252
8253 offset = reloc->r_offset;
8254 bfd_putb16 (insn16, contents + offset);
8255 /* Find the first relocation of the same relocation-type,
8256 so we iteratie them forward. */
8257 pc_rel = reloc;
8258 while ((pc_rel - 1) > internal_relocs && pc_rel[-1].r_offset == offset)
8259 pc_rel--;
8260
8261 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8262 {
8263 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8264 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8265 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA)
8266 {
8267 pc_rel->r_info =
8268 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PCREL_RELA);
8269 }
8270 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8271 pc_rel->r_info =
8272 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PLTREL);
8273 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8274 pc_rel->r_info =
8275 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_5_RELA);
8276 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8277 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8278 pc_rel->r_info =
8279 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_SDA_FP7U2_RELA);
1c8f6a4d
KLC
8280 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8281 pc_rel->r_info =
8282 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC
8283 }
8284}
8285
8286/* Find a relocation of type specified by `reloc_type'
8287 of the same r_offset with reloc.
8288 If not found, return irelend.
8289
8290 Assuming relocations are sorted by r_offset,
8291 we find the relocation from `reloc' backward untill relocs,
8292 or find it from `reloc' forward untill irelend. */
8293
8294static Elf_Internal_Rela *
8295find_relocs_at_address (Elf_Internal_Rela *reloc,
8296 Elf_Internal_Rela *relocs,
8297 Elf_Internal_Rela *irelend,
8298 enum elf_nds32_reloc_type reloc_type)
8299{
8300 Elf_Internal_Rela *rel_t;
8301
8302 /* Find backward. */
8303 for (rel_t = reloc;
8304 rel_t >= relocs && rel_t->r_offset == reloc->r_offset;
8305 rel_t--)
8306 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8307 return rel_t;
8308
1c8f6a4d 8309 /* We didn't find it backward. Try find it forward. */
35c08157
KLC
8310 for (rel_t = reloc;
8311 rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8312 rel_t++)
8313 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8314 return rel_t;
8315
8316 return irelend;
8317}
8318
8319/* Find a relocation of specified type and offset.
8320 `reloc' is just a refence point to find a relocation at specified offset.
8321 If not found, return irelend.
8322
8323 Assuming relocations are sorted by r_offset,
8324 we find the relocation from `reloc' backward untill relocs,
8325 or find it from `reloc' forward untill irelend. */
8326
8327static Elf_Internal_Rela *
8328find_relocs_at_address_addr (Elf_Internal_Rela *reloc,
8329 Elf_Internal_Rela *relocs,
8330 Elf_Internal_Rela *irelend,
6cae483a 8331 enum elf_nds32_reloc_type reloc_type,
35c08157
KLC
8332 bfd_vma offset_p)
8333{
8334 Elf_Internal_Rela *rel_t = NULL;
8335
8336 /* First, we try to find a relocation of offset `offset_p',
8337 and then we use find_relocs_at_address to find specific type. */
8338
8339 if (reloc->r_offset > offset_p)
8340 {
8341 /* Find backward. */
8342 for (rel_t = reloc;
8343 rel_t >= relocs && rel_t->r_offset > offset_p; rel_t--)
8344 /* Do nothing. */;
8345 }
8346 else if (reloc->r_offset < offset_p)
8347 {
8348 /* Find forward. */
8349 for (rel_t = reloc;
8350 rel_t < irelend && rel_t->r_offset < offset_p; rel_t++)
8351 /* Do nothing. */;
8352 }
8353 else
8354 rel_t = reloc;
8355
8356 /* Not found? */
8357 if (rel_t < relocs || rel_t == irelend || rel_t->r_offset != offset_p)
8358 return irelend;
8359
8360 return find_relocs_at_address (rel_t, relocs, irelend, reloc_type);
8361}
8362
8363static bfd_boolean
8364nds32_elf_check_dup_relocs (Elf_Internal_Rela *reloc,
8365 Elf_Internal_Rela *internal_relocs,
8366 Elf_Internal_Rela *irelend,
8367 unsigned char reloc_type)
8368{
8369 Elf_Internal_Rela *rel_t;
8370
8371 for (rel_t = reloc;
8372 rel_t >= internal_relocs && rel_t->r_offset == reloc->r_offset;
8373 rel_t--)
8374 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8375 {
8376 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8377 && rel_t->r_addend == reloc->r_addend)
8378 continue;
8379 return TRUE;
8380 }
8381
8382 for (rel_t = reloc; rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8383 rel_t++)
8384 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8385 {
8386 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8387 && rel_t->r_addend == reloc->r_addend)
8388 continue;
8389 return TRUE;
8390 }
8391
8392 return FALSE;
8393}
8394
8395typedef struct nds32_elf_blank nds32_elf_blank_t;
8396struct nds32_elf_blank
8397{
8398 /* Where the blank begins. */
8399 bfd_vma offset;
8400 /* The size of the blank. */
8401 bfd_vma size;
8402 /* The accumulative size before this blank. */
8403 bfd_vma total_size;
8404 nds32_elf_blank_t *next;
8405 nds32_elf_blank_t *prev;
8406};
8407
8408static nds32_elf_blank_t *blank_free_list = NULL;
8409
8410static nds32_elf_blank_t *
8411create_nds32_elf_blank (bfd_vma offset_p, bfd_vma size_p)
8412{
8413 nds32_elf_blank_t *blank_t;
8414
8415 if (blank_free_list)
8416 {
8417 blank_t = blank_free_list;
8418 blank_free_list = blank_free_list->next;
8419 }
8420 else
8421 blank_t = bfd_malloc (sizeof (nds32_elf_blank_t));
8422
8423 if (blank_t == NULL)
8424 return NULL;
8425
8426 blank_t->offset = offset_p;
8427 blank_t->size = size_p;
8428 blank_t->total_size = 0;
8429 blank_t->next = NULL;
8430 blank_t->prev = NULL;
8431
8432 return blank_t;
8433}
8434
8435static void
8436remove_nds32_elf_blank (nds32_elf_blank_t *blank_p)
8437{
8438 if (blank_free_list)
8439 {
8440 blank_free_list->prev = blank_p;
8441 blank_p->next = blank_free_list;
8442 }
8443 else
8444 blank_p->next = NULL;
8445
8446 blank_p->prev = NULL;
8447 blank_free_list = blank_p;
8448}
8449
8450static void
8451clean_nds32_elf_blank (void)
8452{
8453 nds32_elf_blank_t *blank_t;
8454
8455 while (blank_free_list)
8456 {
8457 blank_t = blank_free_list;
8458 blank_free_list = blank_free_list->next;
8459 free (blank_t);
8460 }
8461}
8462
8463static nds32_elf_blank_t *
8464search_nds32_elf_blank (nds32_elf_blank_t *blank_p, bfd_vma addr)
8465{
8466 nds32_elf_blank_t *blank_t;
8467
8468 if (!blank_p)
8469 return NULL;
8470 blank_t = blank_p;
8471
8472 while (blank_t && addr < blank_t->offset)
8473 blank_t = blank_t->prev;
8474 while (blank_t && blank_t->next && addr >= blank_t->next->offset)
8475 blank_t = blank_t->next;
8476
8477 return blank_t;
8478}
8479
8480static bfd_vma
8481get_nds32_elf_blank_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8482 int overwrite)
8483{
8484 nds32_elf_blank_t *blank_t;
8485
8486 blank_t = search_nds32_elf_blank (*blank_p, addr);
8487 if (!blank_t)
8488 return 0;
8489
8490 if (overwrite)
8491 *blank_p = blank_t;
8492
8493 if (addr < blank_t->offset + blank_t->size)
8494 return blank_t->total_size + (addr - blank_t->offset);
8495 else
8496 return blank_t->total_size + blank_t->size;
8497}
8498
8499static bfd_boolean
8500insert_nds32_elf_blank (nds32_elf_blank_t **blank_p, bfd_vma addr, bfd_vma len)
8501{
8502 nds32_elf_blank_t *blank_t, *blank_t2;
8503
8504 if (!*blank_p)
8505 {
8506 *blank_p = create_nds32_elf_blank (addr, len);
8507 return *blank_p ? TRUE : FALSE;
8508 }
8509
8510 blank_t = search_nds32_elf_blank (*blank_p, addr);
8511
8512 if (blank_t == NULL)
8513 {
8514 blank_t = create_nds32_elf_blank (addr, len);
8515 if (!blank_t)
8516 return FALSE;
8517 while ((*blank_p)->prev != NULL)
8518 *blank_p = (*blank_p)->prev;
8519 blank_t->next = *blank_p;
8520 (*blank_p)->prev = blank_t;
8521 (*blank_p) = blank_t;
8522 return TRUE;
8523 }
8524
8525 if (addr < blank_t->offset + blank_t->size)
8526 {
8527 if (addr > blank_t->offset + blank_t->size)
8528 blank_t->size = addr - blank_t->offset;
8529 }
8530 else
8531 {
8532 blank_t2 = create_nds32_elf_blank (addr, len);
8533 if (!blank_t2)
8534 return FALSE;
8535 if (blank_t->next)
8536 {
8537 blank_t->next->prev = blank_t2;
8538 blank_t2->next = blank_t->next;
8539 }
8540 blank_t2->prev = blank_t;
8541 blank_t->next = blank_t2;
8542 *blank_p = blank_t2;
8543 }
8544
8545 return TRUE;
8546}
8547
8548static bfd_boolean
8549insert_nds32_elf_blank_recalc_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8550 bfd_vma len)
8551{
8552 nds32_elf_blank_t *blank_t;
8553
8554 if (!insert_nds32_elf_blank (blank_p, addr, len))
8555 return FALSE;
8556
8557 blank_t = *blank_p;
8558
8559 if (!blank_t->prev)
8560 {
8561 blank_t->total_size = 0;
8562 blank_t = blank_t->next;
8563 }
8564
8565 while (blank_t)
8566 {
8567 blank_t->total_size = blank_t->prev->total_size + blank_t->prev->size;
8568 blank_t = blank_t->next;
8569 }
8570
8571 return TRUE;
8572}
8573
8574static void
8575calc_nds32_blank_total (nds32_elf_blank_t *blank_p)
8576{
8577 nds32_elf_blank_t *blank_t;
8578 bfd_vma total_size = 0;
8579
8580 if (!blank_p)
8581 return;
8582
8583 blank_t = blank_p;
8584 while (blank_t->prev)
8585 blank_t = blank_t->prev;
8586 while (blank_t)
8587 {
8588 blank_t->total_size = total_size;
8589 total_size += blank_t->size;
8590 blank_t = blank_t->next;
8591 }
8592}
8593
8594static bfd_boolean
8595nds32_elf_relax_delete_blanks (bfd *abfd, asection *sec,
8596 nds32_elf_blank_t *blank_p)
8597{
8598 Elf_Internal_Shdr *symtab_hdr; /* Symbol table header of this bfd. */
1c8f6a4d 8599 Elf_Internal_Sym *isym = NULL; /* Symbol table of this bfd. */
35c08157
KLC
8600 Elf_Internal_Sym *isymend; /* Symbol entry iterator. */
8601 unsigned int sec_shndx; /* The section the be relaxed. */
8602 bfd_byte *contents; /* Contents data of iterating section. */
8603 Elf_Internal_Rela *internal_relocs;
8604 Elf_Internal_Rela *irel;
8605 Elf_Internal_Rela *irelend;
8606 struct elf_link_hash_entry **sym_hashes;
8607 struct elf_link_hash_entry **end_hashes;
8608 unsigned int symcount;
8609 asection *sect;
8610 nds32_elf_blank_t *blank_t;
8611 nds32_elf_blank_t *blank_t2;
8612 nds32_elf_blank_t *blank_head;
8613
8614 blank_head = blank_t = blank_p;
8615 while (blank_head->prev != NULL)
8616 blank_head = blank_head->prev;
8617 while (blank_t->next != NULL)
8618 blank_t = blank_t->next;
8619
8620 if (blank_t->offset + blank_t->size <= sec->size)
8621 {
8622 blank_t->next = create_nds32_elf_blank (sec->size + 4, 0);
8623 blank_t->next->prev = blank_t;
8624 }
8625 if (blank_head->offset > 0)
8626 {
8627 blank_head->prev = create_nds32_elf_blank (0, 0);
8628 blank_head->prev->next = blank_head;
8629 blank_head = blank_head->prev;
8630 }
8631
8632 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
8633
8634 /* The deletion must stop at the next ALIGN reloc for an alignment
8635 power larger than the number of bytes we are deleting. */
8636
8637 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8638 if (!nds32_get_local_syms (abfd, sec, &isym))
8639 return FALSE;
8640
8641 if (isym == NULL)
8642 {
8643 isym = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8644 symtab_hdr->sh_info, 0, NULL, NULL, NULL);
8645 symtab_hdr->contents = (bfd_byte *) isym;
8646 }
8647
8648 if (isym == NULL || symtab_hdr->sh_info == 0)
8649 return FALSE;
8650
8651 blank_t = blank_head;
8652 calc_nds32_blank_total (blank_head);
8653
8654 for (sect = abfd->sections; sect != NULL; sect = sect->next)
8655 {
8656 /* Adjust all the relocs. */
8657
8658 /* Relocations MUST be kept in memory, because relaxation adjust them. */
8659 internal_relocs = _bfd_elf_link_read_relocs (abfd, sect, NULL, NULL,
8660 TRUE /* keep_memory */);
8661 irelend = internal_relocs + sect->reloc_count;
8662
8663 blank_t = blank_head;
8664 blank_t2 = blank_head;
8665
8666 if (!(sect->flags & SEC_RELOC))
8667 continue;
8668
0c4bd9d9 8669 nds32_get_section_contents (abfd, sect, &contents, TRUE);
35c08157
KLC
8670
8671 for (irel = internal_relocs; irel < irelend; irel++)
8672 {
8673 bfd_vma raddr;
8674
8675 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_DIFF8
8676 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_DIFF32
8677 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8678 {
8679 unsigned long val = 0;
1c8f6a4d
KLC
8680 unsigned long mask;
8681 long before, between;
6cae483a 8682 long offset = 0;
35c08157
KLC
8683
8684 switch (ELF32_R_TYPE (irel->r_info))
8685 {
8686 case R_NDS32_DIFF8:
1c8f6a4d 8687 offset = bfd_get_8 (abfd, contents + irel->r_offset);
35c08157
KLC
8688 break;
8689 case R_NDS32_DIFF16:
1c8f6a4d 8690 offset = bfd_get_16 (abfd, contents + irel->r_offset);
35c08157
KLC
8691 break;
8692 case R_NDS32_DIFF32:
8693 val = bfd_get_32 (abfd, contents + irel->r_offset);
1c8f6a4d
KLC
8694 /* Get the signed bit and mask for the high part. The
8695 gcc will alarm when right shift 32-bit since the
8696 type size of long may be 32-bit. */
8697 mask = 0 - (val >> 31);
8698 if (mask)
8699 offset = (val | (mask - 0xffffffff));
8700 else
8701 offset = val;
35c08157
KLC
8702 break;
8703 default:
8704 BFD_ASSERT (0);
8705 }
8706
8707 /* DIFF value
8708 0 |encoded in location|
8709 |------------|-------------------|---------
8710 sym+off(addend)
8711 -- before ---| *****************
8712 --------------------- between ---|
8713
1c8f6a4d
KLC
8714 We only care how much data are relax between DIFF,
8715 marked as ***. */
35c08157
KLC
8716
8717 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC
8718 between = get_nds32_elf_blank_total (&blank_t,
8719 irel->r_addend + offset, 0);
35c08157
KLC
8720 if (between == before)
8721 goto done_adjust_diff;
8722
8723 switch (ELF32_R_TYPE (irel->r_info))
8724 {
8725 case R_NDS32_DIFF8:
1c8f6a4d
KLC
8726 bfd_put_8 (abfd, offset - (between - before),
8727 contents + irel->r_offset);
35c08157
KLC
8728 break;
8729 case R_NDS32_DIFF16:
1c8f6a4d
KLC
8730 bfd_put_16 (abfd, offset - (between - before),
8731 contents + irel->r_offset);
35c08157
KLC
8732 break;
8733 case R_NDS32_DIFF32:
1c8f6a4d
KLC
8734 bfd_put_32 (abfd, offset - (between - before),
8735 contents + irel->r_offset);
35c08157
KLC
8736 break;
8737 }
8738 }
8739 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_DIFF_ULEB128
8740 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8741 {
8742 bfd_vma val = 0;
8743 unsigned int len = 0;
8744 unsigned long before, between;
8745 bfd_byte *endp, *p;
8746
1c8f6a4d
KLC
8747 val = read_unsigned_leb128 (abfd, contents + irel->r_offset,
8748 &len);
35c08157
KLC
8749
8750 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC
8751 between = get_nds32_elf_blank_total (&blank_t,
8752 irel->r_addend + val, 0);
35c08157
KLC
8753 if (between == before)
8754 goto done_adjust_diff;
8755
8756 p = contents + irel->r_offset;
8757 endp = p + len -1;
8758 memset (p, 0x80, len);
8759 *(endp) = 0;
8760 p = write_uleb128 (p, val - (between - before)) - 1;
8761 if (p < endp)
8762 *p |= 0x80;
8763 }
8764done_adjust_diff:
8765
8766 if (sec == sect)
8767 {
8768 raddr = irel->r_offset;
1c8f6a4d
KLC
8769 irel->r_offset -= get_nds32_elf_blank_total (&blank_t2,
8770 irel->r_offset, 1);
35c08157
KLC
8771
8772 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
8773 continue;
8774 if (blank_t2 && blank_t2->next
1c8f6a4d
KLC
8775 && (blank_t2->offset > raddr
8776 || blank_t2->next->offset <= raddr))
4eca0228 8777 _bfd_error_handler
1c8f6a4d
KLC
8778 (_("%B: %s\n"), abfd,
8779 "Error: search_nds32_elf_blank reports wrong node");
35c08157
KLC
8780
8781 /* Mark reloc in deleted portion as NONE.
8782 For some relocs like R_NDS32_LABEL that doesn't modify the
8783 content in the section. R_NDS32_LABEL doesn't belong to the
8784 instruction in the section, so we should preserve it. */
8785 if (raddr >= blank_t2->offset
8786 && raddr < blank_t2->offset + blank_t2->size
8787 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL
8788 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_BEGIN
8789 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
8790 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
8791 && ELF32_R_TYPE (irel->r_info) != R_NDS32_SUBTRAHEND
8792 && ELF32_R_TYPE (irel->r_info) != R_NDS32_MINUEND)
8793 {
8794 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
8795 R_NDS32_NONE);
8796 continue;
8797 }
8798 }
8799
8800 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE
8801 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
8802 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
8803 continue;
8804
8805 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info
8806 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx
8807 && ELF_ST_TYPE (isym[ELF32_R_SYM (irel->r_info)].st_info) == STT_SECTION)
8808 {
8809 if (irel->r_addend <= sec->size)
8810 irel->r_addend -=
8811 get_nds32_elf_blank_total (&blank_t, irel->r_addend, 1);
8812 }
8813 }
8814 }
8815
8816 /* Adjust the local symbols defined in this section. */
8817 blank_t = blank_head;
8818 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
8819 {
8820 if (isym->st_shndx == sec_shndx)
8821 {
8822 if (isym->st_value <= sec->size)
8823 {
8824 bfd_vma ahead;
8825 bfd_vma orig_addr = isym->st_value;
8826
8827 ahead = get_nds32_elf_blank_total (&blank_t, isym->st_value, 1);
8828 isym->st_value -= ahead;
8829
8830 /* Adjust function size. */
1c8f6a4d
KLC
8831 if (ELF32_ST_TYPE (isym->st_info) == STT_FUNC
8832 && isym->st_size > 0)
8833 isym->st_size -=
8834 get_nds32_elf_blank_total
8835 (&blank_t, orig_addr + isym->st_size, 0) - ahead;
35c08157
KLC
8836 }
8837 }
8838 }
8839
8840 /* Now adjust the global symbols defined in this section. */
8841 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
8842 - symtab_hdr->sh_info);
8843 sym_hashes = elf_sym_hashes (abfd);
8844 end_hashes = sym_hashes + symcount;
8845 blank_t = blank_head;
8846 for (; sym_hashes < end_hashes; sym_hashes++)
8847 {
8848 struct elf_link_hash_entry *sym_hash = *sym_hashes;
8849
8850 if ((sym_hash->root.type == bfd_link_hash_defined
8851 || sym_hash->root.type == bfd_link_hash_defweak)
8852 && sym_hash->root.u.def.section == sec)
8853 {
8854 if (sym_hash->root.u.def.value <= sec->size)
8855 {
8856 bfd_vma ahead;
8857 bfd_vma orig_addr = sym_hash->root.u.def.value;
8858
8859 ahead = get_nds32_elf_blank_total (&blank_t, sym_hash->root.u.def.value, 1);
8860 sym_hash->root.u.def.value -= ahead;
8861
8862 /* Adjust function size. */
8863 if (sym_hash->type == STT_FUNC)
1c8f6a4d
KLC
8864 sym_hash->size -=
8865 get_nds32_elf_blank_total
8866 (&blank_t, orig_addr + sym_hash->size, 0) - ahead;
35c08157
KLC
8867
8868 }
8869 }
8870 }
8871
8872 contents = elf_section_data (sec)->this_hdr.contents;
8873 blank_t = blank_head;
8874 while (blank_t->next)
8875 {
8876 /* Actually delete the bytes. */
8877
8878 /* If current blank is the last blank overlap with current section,
8879 go to finish process. */
8880 if (sec->size <= (blank_t->next->offset))
8881 break;
8882
8883 memmove (contents + blank_t->offset - blank_t->total_size,
8884 contents + blank_t->offset + blank_t->size,
8885 blank_t->next->offset - (blank_t->offset + blank_t->size));
8886
8887 blank_t = blank_t->next;
8888 }
8889
8890 if (sec->size > (blank_t->offset + blank_t->size))
8891 {
8892 /* There are remaining code between blank and section boundary.
8893 Move the remaining code to appropriate location. */
8894 memmove (contents + blank_t->offset - blank_t->total_size,
8895 contents + blank_t->offset + blank_t->size,
8896 sec->size - (blank_t->offset + blank_t->size));
8897 sec->size -= blank_t->total_size + blank_t->size;
8898 }
8899 else
8900 /* This blank is not entirely included in the section,
8901 reduce the section size by only part of the blank size. */
8902 sec->size -= blank_t->total_size + (sec->size - blank_t->offset);
8903
8904 while (blank_head)
8905 {
8906 blank_t = blank_head;
8907 blank_head = blank_head->next;
8908 remove_nds32_elf_blank (blank_t);
8909 }
8910
8911 return TRUE;
8912}
8913
8914/* Get the contents of a section. */
8915
8916static int
0c4bd9d9
KLC
8917nds32_get_section_contents (bfd *abfd, asection *sec,
8918 bfd_byte **contents_p, bfd_boolean cache)
35c08157
KLC
8919{
8920 /* Get the section contents. */
8921 if (elf_section_data (sec)->this_hdr.contents != NULL)
8922 *contents_p = elf_section_data (sec)->this_hdr.contents;
8923 else
8924 {
8925 if (!bfd_malloc_and_get_section (abfd, sec, contents_p))
8926 return FALSE;
0c4bd9d9
KLC
8927 if (cache)
8928 elf_section_data (sec)->this_hdr.contents = *contents_p;
35c08157
KLC
8929 }
8930
8931 return TRUE;
8932}
8933
8934/* Get the contents of the internal symbol of abfd. */
8935
8936static int
8937nds32_get_local_syms (bfd *abfd, asection *sec ATTRIBUTE_UNUSED,
8938 Elf_Internal_Sym **isymbuf_p)
8939{
8940 Elf_Internal_Shdr *symtab_hdr;
8941 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8942
8943 /* Read this BFD's local symbols if we haven't done so already. */
8944 if (*isymbuf_p == NULL && symtab_hdr->sh_info != 0)
8945 {
8946 *isymbuf_p = (Elf_Internal_Sym *) symtab_hdr->contents;
8947 if (*isymbuf_p == NULL)
8948 {
8949 *isymbuf_p = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8950 symtab_hdr->sh_info, 0,
8951 NULL, NULL, NULL);
8952 if (*isymbuf_p == NULL)
8953 return FALSE;
8954 }
8955 }
8956 symtab_hdr->contents = (bfd_byte *) (*isymbuf_p);
8957
8958 return TRUE;
8959}
8960
8961/* Range of small data. */
1c8f6a4d
KLC
8962static bfd_vma sdata_range[2][2];
8963static bfd_vma const sdata_init_range[2] =
8964{ ACCURATE_12BIT_S1, ACCURATE_19BIT };
35c08157
KLC
8965
8966static int
8967nds32_elf_insn_size (bfd *abfd ATTRIBUTE_UNUSED,
8968 bfd_byte *contents, bfd_vma addr)
8969{
8970 unsigned long insn = bfd_getb32 (contents + addr);
8971
8972 if (insn & 0x80000000)
8973 return 2;
8974
8975 return 4;
8976}
8977
8978/* Set the gp relax range. We have to measure the safe range
8979 to do gp relaxation. */
8980
8981static void
8982relax_range_measurement (bfd *abfd)
8983{
8984 asection *sec_f, *sec_b;
8985 /* For upper bound. */
8986 bfd_vma maxpgsz = get_elf_backend_data (abfd)->maxpagesize;
8987 bfd_vma align;
35c08157
KLC
8988 static int decide_relax_range = 0;
8989 int i;
1c8f6a4d 8990 int range_number = sizeof (sdata_init_range) / sizeof (sdata_init_range[0]);
35c08157
KLC
8991
8992 if (decide_relax_range)
8993 return;
8994 decide_relax_range = 1;
8995
8996 if (sda_rela_sec == NULL)
8997 {
8998 /* Since there is no data sections, we assume the range is page size. */
1c8f6a4d 8999 for (i = 0; i < range_number; i++)
35c08157
KLC
9000 {
9001 sdata_range[i][0] = sdata_init_range[i] - 0x1000;
9002 sdata_range[i][1] = sdata_init_range[i] - 0x1000;
9003 }
9004 return;
9005 }
9006
9007 /* Get the biggest alignment power after the gp located section. */
9008 sec_f = sda_rela_sec->output_section;
9009 sec_b = sec_f->next;
9010 align = 0;
9011 while (sec_b != NULL)
9012 {
9013 if ((unsigned)(1 << sec_b->alignment_power) > align)
9014 align = (1 << sec_b->alignment_power);
9015 sec_b = sec_b->next;
9016 }
9017
9018 /* I guess we can not determine the section before
9019 gp located section, so we assume the align is max page size. */
1c8f6a4d 9020 for (i = 0; i < range_number; i++)
35c08157 9021 {
1c8f6a4d 9022 sdata_range[i][1] = sdata_init_range[i] - align;
35c08157 9023 BFD_ASSERT (sdata_range[i][1] <= sdata_init_range[i]);
1c8f6a4d 9024 sdata_range[i][0] = sdata_init_range[i] - maxpgsz;
35c08157
KLC
9025 BFD_ASSERT (sdata_range[i][0] <= sdata_init_range[i]);
9026 }
9027}
9028
9029/* These are macros used to check flags encoded in r_addend.
9030 They are only used by nds32_elf_relax_section (). */
9031#define GET_SEQ_LEN(addend) ((addend) & 0x000000ff)
9032#define IS_1ST_CONVERT(addend) ((addend) & 0x80000000)
9033#define IS_OPTIMIZE(addend) ((addend) & 0x40000000)
9034#define IS_16BIT_ON(addend) ((addend) & 0x20000000)
9035
1c8f6a4d
KLC
9036/* Relax LONGCALL1 relocation for nds32_elf_relax_section. */
9037
35c08157 9038static bfd_boolean
1c8f6a4d
KLC
9039nds32_elf_relax_longcall1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9040 Elf_Internal_Rela *internal_relocs, int *insn_len,
9041 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9042 Elf_Internal_Shdr *symtab_hdr)
9043{
9044 /* There are 3 variations for LONGCALL1
9045 case 4-4-2; 16-bit on, optimize off or optimize for space
9046 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9047 ori ta, ta, lo12(symbol) ; LO12S0
9048 jral5 ta ;
9049
9050 case 4-4-4; 16-bit off, optimize don't care
9051 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9052 ori ta, ta, lo12(symbol) ; LO12S0
9053 jral ta ;
9054
9055 case 4-4-4; 16-bit on, optimize for speed
9056 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9057 ori ta, ta, lo12(symbol) ; LO12S0
9058 jral ta ;
9059 Check code for -mlong-calls output. */
9060
9061 /* Get the reloc for the address from which the register is
9062 being loaded. This reloc will tell us which function is
9063 actually being called. */
9064
9065 bfd_vma laddr;
9066 int seq_len; /* Original length of instruction sequence. */
35c08157 9067 uint32_t insn;
1c8f6a4d
KLC
9068 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9069 int pic_ext_target = 0;
9070 bfd_signed_vma foff;
35c08157 9071 uint16_t insn16;
35c08157 9072
1c8f6a4d
KLC
9073 irelend = internal_relocs + sec->reloc_count;
9074 seq_len = GET_SEQ_LEN (irel->r_addend);
9075 laddr = irel->r_offset;
9076 *insn_len = seq_len;
35c08157 9077
1c8f6a4d
KLC
9078 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9079 R_NDS32_HI20_RELA, laddr);
9080 lo_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9081 R_NDS32_LO12S0_ORI_RELA,
9082 laddr + 4);
35c08157 9083
1c8f6a4d 9084 if (hi_irelfn == irelend || lo_irelfn == irelend)
35c08157 9085 {
4eca0228 9086 _bfd_error_handler
1c8f6a4d
KLC
9087 ("%B: warning: R_NDS32_LONGCALL1 points to unrecognized"
9088 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9089 return FALSE;
35c08157
KLC
9090 }
9091
1c8f6a4d
KLC
9092 /* Get the value of the symbol referred to by the reloc. */
9093 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9094 &pic_ext_target);
35c08157 9095
1c8f6a4d
KLC
9096 /* This condition only happened when symbol is undefined. */
9097 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9098 || foff >= CONSERVATIVE_24BIT_S1)
9099 return FALSE;
35c08157 9100
1c8f6a4d
KLC
9101 /* Relax to: jal symbol; 25_PCREL */
9102 /* For simplicity of coding, we are going to modify the section
9103 contents, the section relocs, and the BFD symbol table. We
9104 must tell the rest of the code not to free up this
9105 information. It would be possible to instead create a table
9106 of changes which have to be made, as is done in coff-mips.c;
9107 that would be more work, but would require less memory when
9108 the linker is run. */
9109
9110 /* Replace the long call with a jal. */
9111 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9112 R_NDS32_25_PCREL_RELA);
9113 irel->r_addend = hi_irelfn->r_addend;
9114
9115 /* We don't resolve this here but resolve it in relocate_section. */
9116 insn = INSN_JAL;
9117 bfd_putb32 (insn, contents + irel->r_offset);
9118
9119 hi_irelfn->r_info =
9120 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9121 lo_irelfn->r_info =
9122 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9123 *insn_len = 4;
9124
9125 if (seq_len & 0x2)
9126 {
9127 insn16 = NDS32_NOP16;
9128 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9129 lo_irelfn->r_info =
9130 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9131 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9132 *insn_len += 2;
9133 }
9134 return TRUE;
9135}
35c08157 9136
1c8f6a4d
KLC
9137#define CONVERT_CONDITION_CALL(insn) (((insn) & 0xffff0000) ^ 0x90000)
9138/* Relax LONGCALL2 relocation for nds32_elf_relax_section. */
35c08157 9139
1c8f6a4d
KLC
9140static bfd_boolean
9141nds32_elf_relax_longcall2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9142 Elf_Internal_Rela *internal_relocs, int *insn_len,
9143 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9144 Elf_Internal_Shdr *symtab_hdr)
9145{
9146 /* bltz rt, .L1 ; LONGCALL2
9147 jal symbol ; 25_PCREL
9148 .L1: */
35c08157 9149
1c8f6a4d
KLC
9150 /* Get the reloc for the address from which the register is
9151 being loaded. This reloc will tell us which function is
9152 actually being called. */
35c08157 9153
1c8f6a4d
KLC
9154 bfd_vma laddr;
9155 uint32_t insn;
9156 Elf_Internal_Rela *i1_irelfn, *cond_irelfn, *irelend;
9157 int pic_ext_target = 0;
9158 bfd_signed_vma foff;
35c08157 9159
1c8f6a4d
KLC
9160 irelend = internal_relocs + sec->reloc_count;
9161 laddr = irel->r_offset;
9162 i1_irelfn =
9163 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9164 R_NDS32_25_PCREL_RELA, laddr + 4);
9165
9166 if (i1_irelfn == irelend)
35c08157 9167 {
4eca0228 9168 _bfd_error_handler
1c8f6a4d
KLC
9169 ("%B: warning: R_NDS32_LONGCALL2 points to unrecognized"
9170 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9171 return FALSE;
35c08157
KLC
9172 }
9173
1c8f6a4d 9174 insn = bfd_getb32 (contents + laddr);
35c08157 9175
1c8f6a4d
KLC
9176 /* Get the value of the symbol referred to by the reloc. */
9177 foff = calculate_offset (abfd, sec, i1_irelfn, isymbuf, symtab_hdr,
9178 &pic_ext_target);
35c08157 9179
1c8f6a4d
KLC
9180 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9181 || foff >= CONSERVATIVE_16BIT_S1)
9182 return FALSE;
35c08157 9183
1c8f6a4d
KLC
9184 /* Relax to bgezal rt, label ; 17_PCREL
9185 or bltzal rt, label ; 17_PCREL */
9186
9187 /* Convert to complimentary conditional call. */
9188 insn = CONVERT_CONDITION_CALL (insn);
9189
9190 /* For simplicity of coding, we are going to modify the section
9191 contents, the section relocs, and the BFD symbol table. We
9192 must tell the rest of the code not to free up this
9193 information. It would be possible to instead create a table
9194 of changes which have to be made, as is done in coff-mips.c;
9195 that would be more work, but would require less memory when
9196 the linker is run. */
9197
9198 /* Clean unnessary relocations. */
9199 i1_irelfn->r_info =
9200 ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), R_NDS32_NONE);
9201 cond_irelfn =
9202 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9203 R_NDS32_17_PCREL_RELA, laddr);
9204 if (cond_irelfn != irelend)
9205 cond_irelfn->r_info =
9206 ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info), R_NDS32_NONE);
9207
9208 /* Replace the long call with a bgezal. */
9209 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info),
9210 R_NDS32_17_PCREL_RELA);
9211 irel->r_addend = i1_irelfn->r_addend;
9212
9213 bfd_putb32 (insn, contents + irel->r_offset);
9214
9215 *insn_len = 4;
9216 return TRUE;
9217}
35c08157 9218
1c8f6a4d
KLC
9219/* Relax LONGCALL3 relocation for nds32_elf_relax_section. */
9220
9221static bfd_boolean
9222nds32_elf_relax_longcall3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9223 Elf_Internal_Rela *internal_relocs, int *insn_len,
9224 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9225 Elf_Internal_Shdr *symtab_hdr)
9226{
9227 /* There are 3 variations for LONGCALL3
9228 case 4-4-4-2; 16-bit on, optimize off or optimize for space
9229 bltz rt, $1 ; LONGCALL3
9230 sethi ta, hi20(symbol) ; HI20
9231 ori ta, ta, lo12(symbol) ; LO12S0
9232 jral5 ta ;
9233 $1
9234
9235 case 4-4-4-4; 16-bit off, optimize don't care
9236 bltz rt, $1 ; LONGCALL3
9237 sethi ta, hi20(symbol) ; HI20
9238 ori ta, ta, lo12(symbol) ; LO12S0
9239 jral ta ;
9240 $1
9241
9242 case 4-4-4-4; 16-bit on, optimize for speed
9243 bltz rt, $1 ; LONGCALL3
9244 sethi ta, hi20(symbol) ; HI20
9245 ori ta, ta, lo12(symbol) ; LO12S0
9246 jral ta ;
9247 $1 */
9248
9249 /* Get the reloc for the address from which the register is
9250 being loaded. This reloc will tell us which function is
9251 actually being called. */
9252
9253 bfd_vma laddr;
9254 int seq_len; /* Original length of instruction sequence. */
9255 uint32_t insn;
9256 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9257 int pic_ext_target = 0;
9258 bfd_signed_vma foff;
9259 uint16_t insn16;
9260
9261 irelend = internal_relocs + sec->reloc_count;
9262 seq_len = GET_SEQ_LEN (irel->r_addend);
9263 laddr = irel->r_offset;
9264 *insn_len = seq_len;
9265
9266 hi_irelfn =
9267 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9268 R_NDS32_HI20_RELA, laddr + 4);
9269 lo_irelfn =
9270 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9271 R_NDS32_LO12S0_ORI_RELA, laddr + 8);
9272
9273 if (hi_irelfn == irelend || lo_irelfn == irelend)
9274 {
4eca0228 9275 _bfd_error_handler
1c8f6a4d
KLC
9276 ("%B: warning: R_NDS32_LONGCALL3 points to unrecognized"
9277 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9278 return FALSE;
35c08157
KLC
9279 }
9280
1c8f6a4d
KLC
9281 /* Get the value of the symbol referred to by the reloc. */
9282 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9283 &pic_ext_target);
35c08157 9284
1c8f6a4d
KLC
9285 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9286 || foff >= CONSERVATIVE_24BIT_S1)
9287 return FALSE;
35c08157 9288
1c8f6a4d
KLC
9289 insn = bfd_getb32 (contents + laddr);
9290 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
35c08157 9291 {
1c8f6a4d
KLC
9292 /* Relax to bgezal rt, label ; 17_PCREL
9293 or bltzal rt, label ; 17_PCREL */
35c08157 9294
1c8f6a4d
KLC
9295 /* Convert to complimentary conditional call. */
9296 insn = CONVERT_CONDITION_CALL (insn);
9297 bfd_putb32 (insn, contents + irel->r_offset);
35c08157 9298
1c8f6a4d
KLC
9299 *insn_len = 4;
9300 irel->r_info =
9301 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9302 hi_irelfn->r_info =
9303 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9304 lo_irelfn->r_info =
9305 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9306
9307 cond_irelfn =
9308 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9309 R_NDS32_17_PCREL_RELA, laddr);
9310 if (cond_irelfn != irelend)
35c08157 9311 {
1c8f6a4d
KLC
9312 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9313 R_NDS32_17_PCREL_RELA);
9314 cond_irelfn->r_addend = hi_irelfn->r_addend;
35c08157 9315 }
1c8f6a4d
KLC
9316
9317 if (seq_len & 0x2)
35c08157 9318 {
1c8f6a4d
KLC
9319 insn16 = NDS32_NOP16;
9320 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9321 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9322 R_NDS32_INSN16);
9323 hi_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9324 insn_len += 2;
35c08157 9325 }
1c8f6a4d
KLC
9326 }
9327 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
9328 {
9329 /* Relax to the following instruction sequence
9330 bltz rt, $1 ; LONGCALL2
9331 jal symbol ; 25_PCREL
9332 $1 */
9333 *insn_len = 8;
9334 insn = INSN_JAL;
9335 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
35c08157 9336
1c8f6a4d
KLC
9337 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9338 R_NDS32_25_PCREL_RELA);
9339 irel->r_info =
9340 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL2);
9341
9342 lo_irelfn->r_info =
9343 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 9344
1c8f6a4d 9345 if (seq_len & 0x2)
35c08157 9346 {
1c8f6a4d
KLC
9347 insn16 = NDS32_NOP16;
9348 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9349 lo_irelfn->r_info =
9350 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9351 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9352 insn_len += 2;
9353 }
9354 }
9355 return TRUE;
9356}
35c08157 9357
1c8f6a4d 9358/* Relax LONGJUMP1 relocation for nds32_elf_relax_section. */
35c08157 9359
1c8f6a4d
KLC
9360static bfd_boolean
9361nds32_elf_relax_longjump1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9362 Elf_Internal_Rela *internal_relocs, int *insn_len,
9363 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9364 Elf_Internal_Shdr *symtab_hdr)
9365{
9366 /* There are 3 variations for LONGJUMP1
9367 case 4-4-2; 16-bit bit on, optimize off or optimize for space
9368 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9369 ori ta, ta, lo12(symbol) ; LO12S0
9370 jr5 ta ;
9371
9372 case 4-4-4; 16-bit off, optimize don't care
9373 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9374 ori ta, ta, lo12(symbol) ; LO12S0
9375 jr ta ;
9376
9377 case 4-4-4; 16-bit on, optimize for speed
9378 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9379 ori ta, ta, lo12(symbol) ; LO12S0
9380 jr ta ; */
9381
9382 /* Get the reloc for the address from which the register is
9383 being loaded. This reloc will tell us which function is
9384 actually being called. */
9385
9386 bfd_vma laddr;
9387 int seq_len; /* Original length of instruction sequence. */
9388 int insn16_on; /* 16-bit on/off. */
9389 uint32_t insn;
9390 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9391 int pic_ext_target = 0;
9392 bfd_signed_vma foff;
9393 uint16_t insn16;
9394 unsigned long reloc;
35c08157 9395
1c8f6a4d
KLC
9396 irelend = internal_relocs + sec->reloc_count;
9397 seq_len = GET_SEQ_LEN (irel->r_addend);
9398 laddr = irel->r_offset;
9399 *insn_len = seq_len;
9400 insn16_on = IS_16BIT_ON (irel->r_addend);
9401
9402 hi_irelfn =
9403 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9404 R_NDS32_HI20_RELA, laddr);
9405 lo_irelfn =
9406 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9407 R_NDS32_LO12S0_ORI_RELA, laddr + 4);
9408 if (hi_irelfn == irelend || lo_irelfn == irelend)
9409 {
4eca0228 9410 _bfd_error_handler
1c8f6a4d
KLC
9411 ("%B: warning: R_NDS32_LONGJUMP1 points to unrecognized"
9412 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9413 return FALSE;
9414 }
35c08157 9415
1c8f6a4d
KLC
9416 /* Get the value of the symbol referred to by the reloc. */
9417 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9418 &pic_ext_target);
35c08157 9419
1c8f6a4d
KLC
9420 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
9421 || foff < -CONSERVATIVE_24BIT_S1)
9422 return FALSE;
35c08157 9423
1c8f6a4d
KLC
9424 if (insn16_on && foff >= -ACCURATE_8BIT_S1
9425 && foff < ACCURATE_8BIT_S1 && (seq_len & 0x2))
9426 {
9427 /* j8 label */
9428 /* 16-bit on, but not optimized for speed. */
9429 reloc = R_NDS32_9_PCREL_RELA;
9430 insn16 = INSN_J8;
9431 bfd_putb16 (insn16, contents + irel->r_offset);
9432 *insn_len = 2;
9433 irel->r_info =
9434 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9435 }
9436 else
9437 {
9438 /* j label */
9439 reloc = R_NDS32_25_PCREL_RELA;
9440 insn = INSN_J;
9441 bfd_putb32 (insn, contents + irel->r_offset);
9442 *insn_len = 4;
9443 irel->r_info =
9444 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_INSN16);
9445 irel->r_addend = 0;
9446 }
35c08157 9447
1c8f6a4d
KLC
9448 hi_irelfn->r_info =
9449 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9450 lo_irelfn->r_info =
9451 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 9452
1c8f6a4d
KLC
9453 if ((seq_len & 0x2) && ((*insn_len & 2) == 0))
9454 {
9455 insn16 = NDS32_NOP16;
9456 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9457 lo_irelfn->r_info =
9458 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9459 R_NDS32_INSN16);
9460 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9461 *insn_len += 2;
9462 }
9463 return TRUE;
9464}
9465
9466/* Revert condition branch. This function does not check if the input
9467 instruction is condition branch or not. */
9468
9469static void
9470nds32_elf_convert_branch (uint16_t insn16, uint32_t insn,
9471 uint16_t *re_insn16, uint32_t *re_insn)
9472{
9473 uint32_t comp_insn = 0;
9474 uint16_t comp_insn16 = 0;
9475
9476 if (insn)
9477 {
9478 if (N32_OP6 (insn) == N32_OP6_BR1)
9479 {
9480 /* beqs label. */
9481 comp_insn = (insn ^ 0x4000) & 0xffffc000;
9482 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5)
35c08157 9483 {
1c8f6a4d
KLC
9484 /* Insn can be contracted to 16-bit implied r5. */
9485 comp_insn16 =
9486 (comp_insn & 0x4000) ? INSN_BNES38 : INSN_BEQS38;
9487 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
35c08157 9488 }
1c8f6a4d
KLC
9489 }
9490 else if (N32_OP6 (insn) == N32_OP6_BR3)
9491 {
9492 /* bnec $ta, imm11, label. */
9493 comp_insn = (insn ^ 0x80000) & 0xffffff00;
9494 }
9495 else
9496 {
9497 comp_insn = (insn ^ 0x10000) & 0xffffc000;
9498 if (N32_BR2_SUB (insn) == N32_BR2_BEQZ
9499 || N32_BR2_SUB (insn) == N32_BR2_BNEZ)
35c08157 9500 {
1c8f6a4d 9501 if (N32_IS_RT3 (insn))
35c08157 9502 {
1c8f6a4d
KLC
9503 /* Insn can be contracted to 16-bit. */
9504 comp_insn16 =
9505 (comp_insn & 0x10000) ? INSN_BNEZ38 : INSN_BEQZ38;
9506 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
9507 }
9508 else if (N32_RT5 (insn) == REG_R15)
9509 {
9510 /* Insn can be contracted to 16-bit. */
9511 comp_insn16 =
9512 (comp_insn & 0x10000) ? INSN_BNES38 : INSN_BEQS38;
35c08157 9513 }
35c08157
KLC
9514 }
9515 }
1c8f6a4d
KLC
9516 }
9517 else
9518 {
9519 switch ((insn16 & 0xf000) >> 12)
35c08157 9520 {
1c8f6a4d
KLC
9521 case 0xc:
9522 /* beqz38 or bnez38 */
9523 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9524 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNEZ : INSN_BEQZ;
9525 comp_insn |= ((comp_insn16 & 0x0700) >> 8) << 20;
9526 break;
35c08157 9527
1c8f6a4d
KLC
9528 case 0xd:
9529 /* beqs38 or bnes38 */
9530 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9531 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNE : INSN_BEQ;
9532 comp_insn |= (((comp_insn16 & 0x0700) >> 8) << 20)
9533 | (REG_R5 << 15);
9534 break;
35c08157 9535
1c8f6a4d
KLC
9536 case 0xe:
9537 /* beqzS8 or bnezS8 */
9538 comp_insn16 = (insn16 ^ 0x0100) & 0xff00;
9539 comp_insn = (comp_insn16 & 0x0100) ? INSN_BNEZ : INSN_BEQZ;
9540 comp_insn |= REG_R15 << 20;
9541 break;
35c08157 9542
1c8f6a4d
KLC
9543 default:
9544 break;
9545 }
9546 }
9547 if (comp_insn && re_insn)
9548 *re_insn = comp_insn;
9549 if (comp_insn16 && re_insn16)
9550 *re_insn16 = comp_insn16;
9551}
35c08157 9552
1c8f6a4d 9553/* Relax LONGJUMP2 relocation for nds32_elf_relax_section. */
35c08157 9554
1c8f6a4d
KLC
9555static bfd_boolean
9556nds32_elf_relax_longjump2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9557 Elf_Internal_Rela *internal_relocs, int *insn_len,
9558 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9559 Elf_Internal_Shdr *symtab_hdr)
9560{
9561 /* There are 3 variations for LONGJUMP2
9562 case 2-4; 1st insn convertible, 16-bit on,
9563 optimize off or optimize for space
9564 bnes38 rt, ra, $1 ; LONGJUMP2
9565 j label ; 25_PCREL
9566 $1:
9567
9568 case 4-4; 1st insn not convertible
9569 bne rt, ra, $1 ; LONGJUMP2
9570 j label ; 25_PCREL
9571 $1:
9572
9573 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9574 bne rt, ra, $1 ; LONGJUMP2
9575 j label ; 25_PCREL
9576 $1: */
9577
9578 /* Get the reloc for the address from which the register is
9579 being loaded. This reloc will tell us which function is
9580 actually being called. */
9581
9582 bfd_vma laddr;
9583 int seq_len; /* Original length of instruction sequence. */
9584 Elf_Internal_Rela *i2_irelfn, *cond_irelfn, *irelend;
9585 int pic_ext_target = 0, first_size;
9586 unsigned int i;
9587 bfd_signed_vma foff;
9588 uint32_t insn, re_insn = 0;
9589 uint16_t insn16, re_insn16 = 0;
9590 unsigned long reloc, cond_reloc;
35c08157 9591
1c8f6a4d
KLC
9592 enum elf_nds32_reloc_type checked_types[] =
9593 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
35c08157 9594
1c8f6a4d
KLC
9595 irelend = internal_relocs + sec->reloc_count;
9596 seq_len = GET_SEQ_LEN (irel->r_addend);
9597 laddr = irel->r_offset;
9598 *insn_len = seq_len;
9599 first_size = (seq_len == 6) ? 2 : 4;
9600
9601 i2_irelfn =
9602 find_relocs_at_address_addr (irel, internal_relocs,
9603 irelend, R_NDS32_25_PCREL_RELA,
9604 laddr + first_size);
9605
9606 for (i = 0; i < sizeof (checked_types) / sizeof(checked_types[0]); i++)
9607 {
9608 cond_irelfn =
9609 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9610 checked_types[i], laddr);
9611 if (cond_irelfn != irelend)
9612 break;
9613 }
35c08157 9614
1c8f6a4d
KLC
9615 if (i2_irelfn == irelend || cond_irelfn == irelend)
9616 {
4eca0228 9617 _bfd_error_handler
1c8f6a4d
KLC
9618 ("%B: warning: R_NDS32_LONGJUMP2 points to unrecognized"
9619 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9620 return FALSE;
9621 }
35c08157 9622
1c8f6a4d
KLC
9623 /* Get the value of the symbol referred to by the reloc. */
9624 foff =
9625 calculate_offset (abfd, sec, i2_irelfn, isymbuf, symtab_hdr,
9626 &pic_ext_target);
9627 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9628 || foff >= CONSERVATIVE_16BIT_S1)
9629 return FALSE;
35c08157 9630
1c8f6a4d
KLC
9631 /* Get the all corresponding instructions. */
9632 if (first_size == 4)
9633 {
9634 insn = bfd_getb32 (contents + laddr);
9635 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9636 }
9637 else
9638 {
9639 insn16 = bfd_getb16 (contents + laddr);
9640 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9641 }
35c08157 9642
1c8f6a4d
KLC
9643 if (re_insn16 && foff >= -(ACCURATE_8BIT_S1 - first_size)
9644 && foff < ACCURATE_8BIT_S1 - first_size)
9645 {
9646 if (first_size == 4)
9647 {
9648 /* Don't convert it to 16-bit now, keep this as relaxable for
9649 ``label reloc; INSN16''. */
35c08157 9650
1c8f6a4d
KLC
9651 /* Save comp_insn32 to buffer. */
9652 bfd_putb32 (re_insn, contents + irel->r_offset);
9653 *insn_len = 4;
9654 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9655 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9656 cond_reloc = R_NDS32_INSN16;
9657 }
9658 else
9659 {
9660 bfd_putb16 (re_insn16, contents + irel->r_offset);
9661 *insn_len = 2;
9662 reloc = R_NDS32_9_PCREL_RELA;
9663 cond_reloc = R_NDS32_NONE;
9664 }
9665 }
9666 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9667 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9668 && foff < ACCURATE_14BIT_S1 - first_size))
9669 {
9670 /* beqs label ; 15_PCREL */
9671 bfd_putb32 (re_insn, contents + irel->r_offset);
9672 *insn_len = 4;
9673 reloc = R_NDS32_15_PCREL_RELA;
9674 cond_reloc = R_NDS32_NONE;
9675 }
9676 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9677 && foff >= -CONSERVATIVE_16BIT_S1
9678 && foff < CONSERVATIVE_16BIT_S1)
9679 {
9680 /* beqz label ; 17_PCREL */
9681 bfd_putb32 (re_insn, contents + irel->r_offset);
9682 *insn_len = 4;
9683 reloc = R_NDS32_17_PCREL_RELA;
9684 cond_reloc = R_NDS32_NONE;
9685 }
9686 else
9687 return FALSE;
35c08157 9688
1c8f6a4d
KLC
9689 /* Set all relocations. */
9690 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info), reloc);
9691 irel->r_addend = i2_irelfn->r_addend;
35c08157 9692
1c8f6a4d
KLC
9693 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9694 cond_reloc);
9695 cond_irelfn->r_addend = 0;
35c08157 9696
1c8f6a4d
KLC
9697 if ((seq_len ^ *insn_len ) & 0x2)
9698 {
9699 insn16 = NDS32_NOP16;
9700 bfd_putb16 (insn16, contents + irel->r_offset + 4);
9701 i2_irelfn->r_offset = 4;
9702 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9703 R_NDS32_INSN16);
9704 i2_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9705 *insn_len += 2;
9706 }
9707 else
9708 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9709 R_NDS32_NONE);
9710 return TRUE;
9711}
35c08157 9712
1c8f6a4d 9713/* Relax LONGJUMP3 relocation for nds32_elf_relax_section. */
35c08157 9714
1c8f6a4d
KLC
9715static bfd_boolean
9716nds32_elf_relax_longjump3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9717 Elf_Internal_Rela *internal_relocs, int *insn_len,
9718 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9719 Elf_Internal_Shdr *symtab_hdr)
9720{
9721 /* There are 5 variations for LONGJUMP3
9722 case 1: 2-4-4-2; 1st insn convertible, 16-bit on,
9723 optimize off or optimize for space
9724 bnes38 rt, ra, $1 ; LONGJUMP3
9725 sethi ta, hi20(symbol) ; HI20
9726 ori ta, ta, lo12(symbol) ; LO12S0
9727 jr5 ta ;
9728 $1: ;
9729
9730 case 2: 2-4-4-2; 1st insn convertible, 16-bit on, optimize for speed
9731 bnes38 rt, ra, $1 ; LONGJUMP3
9732 sethi ta, hi20(symbol) ; HI20
9733 ori ta, ta, lo12(symbol) ; LO12S0
9734 jr5 ta ;
9735 $1: ; LABEL
9736
9737 case 3: 4-4-4-2; 1st insn not convertible, 16-bit on,
9738 optimize off or optimize for space
9739 bne rt, ra, $1 ; LONGJUMP3
9740 sethi ta, hi20(symbol) ; HI20
9741 ori ta, ta, lo12(symbol) ; LO12S0
9742 jr5 ta ;
9743 $1: ;
9744
9745 case 4: 4-4-4-4; 1st insn don't care, 16-bit off, optimize don't care
9746 16-bit off if no INSN16
9747 bne rt, ra, $1 ; LONGJUMP3
9748 sethi ta, hi20(symbol) ; HI20
9749 ori ta, ta, lo12(symbol) ; LO12S0
9750 jr ta ;
9751 $1: ;
9752
9753 case 5: 4-4-4-4; 1st insn not convertible, 16-bit on, optimize for speed
9754 16-bit off if no INSN16
9755 bne rt, ra, $1 ; LONGJUMP3
9756 sethi ta, hi20(symbol) ; HI20
9757 ori ta, ta, lo12(symbol) ; LO12S0
9758 jr ta ;
9759 $1: ; LABEL */
9760
9761 /* Get the reloc for the address from which the register is
9762 being loaded. This reloc will tell us which function is
9763 actually being called. */
9764 enum elf_nds32_reloc_type checked_types[] =
9765 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
9766
9767 int reloc_off = 0, cond_removed = 0, convertible;
9768 bfd_vma laddr;
9769 int seq_len; /* Original length of instruction sequence. */
9770 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9771 int pic_ext_target = 0, first_size;
9772 unsigned int i;
9773 bfd_signed_vma foff;
9774 uint32_t insn, re_insn = 0;
9775 uint16_t insn16, re_insn16 = 0;
9776 unsigned long reloc, cond_reloc;
35c08157 9777
1c8f6a4d
KLC
9778 irelend = internal_relocs + sec->reloc_count;
9779 seq_len = GET_SEQ_LEN (irel->r_addend);
9780 laddr = irel->r_offset;
9781 *insn_len = seq_len;
35c08157 9782
1c8f6a4d 9783 convertible = IS_1ST_CONVERT (irel->r_addend);
35c08157 9784
1c8f6a4d
KLC
9785 if (convertible)
9786 first_size = 2;
9787 else
9788 first_size = 4;
9789
9790 /* Get all needed relocations. */
9791 hi_irelfn =
9792 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9793 R_NDS32_HI20_RELA, laddr + first_size);
9794 lo_irelfn =
9795 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9796 R_NDS32_LO12S0_ORI_RELA,
9797 laddr + first_size + 4);
9798
9799 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
9800 {
9801 cond_irelfn =
9802 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9803 checked_types[i], laddr);
9804 if (cond_irelfn != irelend)
9805 break;
9806 }
35c08157 9807
1c8f6a4d
KLC
9808 if (hi_irelfn == irelend || lo_irelfn == irelend || cond_irelfn == irelend)
9809 {
4eca0228 9810 _bfd_error_handler
1c8f6a4d
KLC
9811 ("%B: warning: R_NDS32_LONGJUMP3 points to unrecognized"
9812 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9813 return FALSE;
9814 }
35c08157 9815
1c8f6a4d
KLC
9816 /* Get the value of the symbol referred to by the reloc. */
9817 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9818 &pic_ext_target);
35c08157 9819
1c8f6a4d
KLC
9820 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9821 || foff >= CONSERVATIVE_24BIT_S1)
9822 return FALSE;
35c08157 9823
1c8f6a4d
KLC
9824 /* Get the all corresponding instructions. */
9825 if (first_size == 4)
9826 {
9827 insn = bfd_getb32 (contents + laddr);
9828 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9829 }
9830 else
9831 {
9832 insn16 = bfd_getb16 (contents + laddr);
9833 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9834 }
35c08157 9835
1c8f6a4d
KLC
9836 /* For simplicity of coding, we are going to modify the section
9837 contents, the section relocs, and the BFD symbol table. We
9838 must tell the rest of the code not to free up this
9839 information. It would be possible to instead create a table
9840 of changes which have to be made, as is done in coff-mips.c;
9841 that would be more work, but would require less memory when
9842 the linker is run. */
35c08157 9843
1c8f6a4d
KLC
9844 if (re_insn16 && foff >= -ACCURATE_8BIT_S1 - first_size
9845 && foff < ACCURATE_8BIT_S1 - first_size)
9846 {
9847 if (!(seq_len & 0x2))
9848 {
9849 /* Don't convert it to 16-bit now, keep this as relaxable
9850 for ``label reloc; INSN1a''6. */
9851 /* Save comp_insn32 to buffer. */
9852 bfd_putb32 (re_insn, contents + irel->r_offset);
9853 *insn_len = 4;
9854 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9855 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9856 cond_reloc = R_NDS32_INSN16;
9857 }
9858 else
9859 {
9860 /* Not optimize for speed; convert sequence to 16-bit. */
9861 /* Save comp_insn16 to buffer. */
9862 bfd_putb16 (re_insn16, contents + irel->r_offset);
9863 *insn_len = 2;
9864 reloc = R_NDS32_9_PCREL_RELA;
9865 cond_reloc = R_NDS32_NONE;
9866 }
9867 cond_removed = 1;
9868 }
9869 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9870 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9871 && foff < ACCURATE_14BIT_S1 - first_size))
9872 {
9873 /* beqs label ; 15_PCREL */
9874 bfd_putb32 (re_insn, contents + irel->r_offset);
9875 *insn_len = 4;
9876 reloc = R_NDS32_15_PCREL_RELA;
9877 cond_reloc = R_NDS32_NONE;
9878 cond_removed = 1;
9879 }
9880 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9881 && foff >= -CONSERVATIVE_16BIT_S1
9882 && foff < CONSERVATIVE_16BIT_S1)
9883 {
9884 /* beqz label ; 17_PCREL */
9885 bfd_putb32 (re_insn, contents + irel->r_offset);
9886 *insn_len = 4;
9887 reloc = R_NDS32_17_PCREL_RELA;
9888 cond_reloc = R_NDS32_NONE;
9889 cond_removed = 1;
9890 }
9891 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
9892 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
9893 {
9894 /* Relax to one of the following 3 variations
9895
9896 case 2-4; 1st insn convertible, 16-bit on, optimize off or optimize
9897 for space
9898 bnes38 rt, $1 ; LONGJUMP2
9899 j label ; 25_PCREL
9900 $1
9901
9902 case 4-4; 1st insn not convertible, others don't care
9903 bne rt, ra, $1 ; LONGJUMP2
9904 j label ; 25_PCREL
9905 $1
9906
9907 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9908 bne rt, ra, $1 ; LONGJUMP2
9909 j label ; 25_PCREL
9910 $1 */
9911
9912 /* Offset for first instruction. */
9913
9914 /* Use j label as second instruction. */
9915 *insn_len = 4 + first_size;
9916 insn = INSN_J;
9917 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
9918 reloc = R_NDS32_LONGJUMP2;
9919 cond_reloc = R_NDS32_25_PLTREL;
9920 }
9921 else
9922 return FALSE;
35c08157 9923
1c8f6a4d
KLC
9924 if (cond_removed == 1)
9925 {
9926 /* Set all relocations. */
9927 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9928 irel->r_addend = hi_irelfn->r_addend;
9929
9930 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9931 cond_reloc);
9932 cond_irelfn->r_addend = 0;
9933 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9934 R_NDS32_NONE);
9935 }
9936 else
9937 {
9938 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
9939 irel->r_addend = irel->r_addend;
9940 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9941 cond_reloc);
9942 }
35c08157 9943
1c8f6a4d
KLC
9944 if ((seq_len ^ *insn_len ) & 0x2)
9945 {
9946 insn16 = NDS32_NOP16;
9947 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9948 lo_irelfn->r_offset = *insn_len;
9949 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9950 R_NDS32_INSN16);
9951 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9952 *insn_len += 2;
9953 }
9954 else
9955 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9956 R_NDS32_NONE);
9957 return TRUE;
9958}
35c08157 9959
1c8f6a4d 9960/* Relax LONGCALL4 relocation for nds32_elf_relax_section. */
35c08157 9961
1c8f6a4d
KLC
9962static bfd_boolean
9963nds32_elf_relax_longcall4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9964 Elf_Internal_Rela *internal_relocs, int *insn_len,
9965 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9966 Elf_Internal_Shdr *symtab_hdr)
9967{
9968 /* The pattern for LONGCALL4. Support for function cse.
9969 sethi ta, hi20(symbol) ; LONGCALL4/HI20
9970 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
9971 jral ta ; PTR_RES/EMPTY/INSN16 */
35c08157 9972
1c8f6a4d
KLC
9973 bfd_vma laddr;
9974 uint32_t insn;
9975 Elf_Internal_Rela *hi_irel, *ptr_irel, *insn_irel, *em_irel, *call_irel;
9976 Elf_Internal_Rela *irelend;
9977 int pic_ext_target = 0;
9978 bfd_signed_vma foff;
35c08157 9979
1c8f6a4d
KLC
9980 irelend = internal_relocs + sec->reloc_count;
9981 laddr = irel->r_offset;
35c08157 9982
1c8f6a4d
KLC
9983 /* Get the reloc for the address from which the register is
9984 being loaded. This reloc will tell us which function is
9985 actually being called. */
9986 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9987 R_NDS32_HI20_RELA, laddr);
35c08157 9988
1c8f6a4d
KLC
9989 if (hi_irel == irelend)
9990 {
4eca0228 9991 _bfd_error_handler
1c8f6a4d
KLC
9992 ("%B: warning: R_NDS32_LONGCALL4 points to unrecognized"
9993 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9994 return FALSE;
9995 }
35c08157 9996
1c8f6a4d
KLC
9997 /* Get the value of the symbol referred to by the reloc. */
9998 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
9999 &pic_ext_target);
35c08157 10000
1c8f6a4d
KLC
10001 /* This condition only happened when symbol is undefined. */
10002 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10003 || foff >= CONSERVATIVE_24BIT_S1)
10004 return FALSE;
35c08157 10005
1c8f6a4d
KLC
10006 /* Relax to: jal symbol; 25_PCREL */
10007 /* For simplicity of coding, we are going to modify the section
10008 contents, the section relocs, and the BFD symbol table. We
10009 must tell the rest of the code not to free up this
10010 information. It would be possible to instead create a table
10011 of changes which have to be made, as is done in coff-mips.c;
10012 that would be more work, but would require less memory when
10013 the linker is run. */
35c08157 10014
1c8f6a4d
KLC
10015 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10016 R_NDS32_PTR_RESOLVED, irel->r_addend);
10017 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10018 R_NDS32_EMPTY, irel->r_addend);
35c08157 10019
1c8f6a4d
KLC
10020 if (ptr_irel == irelend || em_irel == irelend)
10021 {
4eca0228 10022 _bfd_error_handler
1c8f6a4d
KLC
10023 ("%B: warning: R_NDS32_LONGCALL4 points to unrecognized"
10024 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10025 return FALSE;
10026 }
10027 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
10028 insn = bfd_getb32 (contents + irel->r_addend);
10029 if (insn & 0x80000000)
10030 return FALSE;
35c08157 10031
1c8f6a4d
KLC
10032 /* Replace the long call with a jal. */
10033 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10034 R_NDS32_25_PCREL_RELA);
10035 ptr_irel->r_addend = 1;
35c08157 10036
1c8f6a4d
KLC
10037 /* We don't resolve this here but resolve it in relocate_section. */
10038 insn = INSN_JAL;
10039 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10040
1c8f6a4d
KLC
10041 irel->r_info =
10042 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10043
1c8f6a4d
KLC
10044 /* If there is function cse, HI20 can not remove now. */
10045 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10046 R_NDS32_LONGCALL4, laddr);
10047 if (call_irel == irelend)
10048 {
10049 *insn_len = 0;
10050 hi_irel->r_info =
10051 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10052 }
35c08157 10053
1c8f6a4d
KLC
10054 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10055 R_NDS32_INSN16, irel->r_addend);
10056 if (insn_irel != irelend)
10057 insn_irel->r_info =
10058 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10059
1c8f6a4d
KLC
10060 return TRUE;
10061}
35c08157 10062
1c8f6a4d 10063/* Relax LONGCALL5 relocation for nds32_elf_relax_section. */
35c08157 10064
1c8f6a4d
KLC
10065static bfd_boolean
10066nds32_elf_relax_longcall5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10067 Elf_Internal_Rela *internal_relocs, int *insn_len,
10068 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10069 Elf_Internal_Shdr *symtab_hdr)
10070{
10071 /* The pattern for LONGCALL5.
10072 bltz rt, .L1 ; LONGCALL5/17_PCREL
10073 jal symbol ; 25_PCREL
10074 .L1: */
35c08157 10075
1c8f6a4d
KLC
10076 bfd_vma laddr;
10077 uint32_t insn;
10078 Elf_Internal_Rela *cond_irel, *irelend;
10079 int pic_ext_target = 0;
10080 bfd_signed_vma foff;
35c08157 10081
1c8f6a4d
KLC
10082 irelend = internal_relocs + sec->reloc_count;
10083 laddr = irel->r_offset;
10084 insn = bfd_getb32 (contents + laddr);
35c08157 10085
1c8f6a4d
KLC
10086 /* Get the reloc for the address from which the register is
10087 being loaded. This reloc will tell us which function is
10088 actually being called. */
10089 cond_irel =
10090 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10091 R_NDS32_25_PCREL_RELA, irel->r_addend);
10092 if (cond_irel == irelend)
10093 {
4eca0228 10094 _bfd_error_handler
1c8f6a4d
KLC
10095 ("%B: warning: R_NDS32_LONGCALL5 points to unrecognized"
10096 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10097 return FALSE;
10098 }
35c08157 10099
1c8f6a4d
KLC
10100 /* Get the value of the symbol referred to by the reloc. */
10101 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10102 &pic_ext_target);
35c08157 10103
1c8f6a4d
KLC
10104 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10105 || foff >= CONSERVATIVE_16BIT_S1)
10106 return FALSE;
35c08157 10107
1c8f6a4d
KLC
10108 /* Relax to bgezal rt, label ; 17_PCREL
10109 or bltzal rt, label ; 17_PCREL */
35c08157 10110
1c8f6a4d
KLC
10111 /* Convert to complimentary conditional call. */
10112 insn = CONVERT_CONDITION_CALL (insn);
35c08157 10113
1c8f6a4d
KLC
10114 /* For simplicity of coding, we are going to modify the section
10115 contents, the section relocs, and the BFD symbol table. We
10116 must tell the rest of the code not to free up this
10117 information. It would be possible to instead create a table
10118 of changes which have to be made, as is done in coff-mips.c;
10119 that would be more work, but would require less memory when
10120 the linker is run. */
35c08157 10121
1c8f6a4d
KLC
10122 /* Modify relocation and contents. */
10123 cond_irel->r_info =
10124 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_17_PCREL_RELA);
35c08157 10125
1c8f6a4d
KLC
10126 /* Replace the long call with a bgezal. */
10127 bfd_putb32 (insn, contents + cond_irel->r_offset);
10128 *insn_len = 0;
35c08157 10129
1c8f6a4d
KLC
10130 /* Clean unnessary relocations. */
10131 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10132
1c8f6a4d
KLC
10133 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10134 R_NDS32_17_PCREL_RELA, laddr);
10135 cond_irel->r_info =
10136 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10137
1c8f6a4d
KLC
10138 return TRUE;
10139}
35c08157 10140
1c8f6a4d 10141/* Relax LONGCALL6 relocation for nds32_elf_relax_section. */
35c08157 10142
1c8f6a4d
KLC
10143static bfd_boolean
10144nds32_elf_relax_longcall6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10145 Elf_Internal_Rela *internal_relocs, int *insn_len,
10146 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10147 Elf_Internal_Shdr *symtab_hdr)
10148{
10149 /* The pattern for LONGCALL6.
10150 bltz rt, .L1 ; LONGCALL6/17_PCREL
10151 sethi ta, hi20(symbol) ; HI20/PTR
10152 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10153 jral ta ; PTR_RES/EMPTY/INSN16
10154 .L1 */
10155
10156 bfd_vma laddr;
10157 uint32_t insn;
10158 Elf_Internal_Rela *em_irel, *cond_irel, *irelend;
10159 int pic_ext_target = 0;
10160 bfd_signed_vma foff;
35c08157 10161
1c8f6a4d
KLC
10162 irelend = internal_relocs + sec->reloc_count;
10163 laddr = irel->r_offset;
35c08157 10164
1c8f6a4d
KLC
10165 /* Get the reloc for the address from which the register is
10166 being loaded. This reloc will tell us which function is
10167 actually being called. */
10168 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10169 R_NDS32_EMPTY, irel->r_addend);
35c08157 10170
1c8f6a4d
KLC
10171 if (em_irel == irelend)
10172 {
4eca0228 10173 _bfd_error_handler
1c8f6a4d
KLC
10174 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10175 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10176 return FALSE;
10177 }
35c08157 10178
1c8f6a4d
KLC
10179 /* Get the value of the symbol referred to by the reloc. */
10180 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10181 &pic_ext_target);
35c08157 10182
1c8f6a4d
KLC
10183 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10184 || foff >= CONSERVATIVE_24BIT_S1)
10185 return FALSE;
35c08157 10186
1c8f6a4d
KLC
10187 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
10188 insn = bfd_getb32 (contents + irel->r_addend);
10189 if (insn & 0x80000000)
10190 return FALSE;
35c08157 10191
1c8f6a4d
KLC
10192 insn = bfd_getb32 (contents + laddr);
10193 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10194 {
10195 /* Relax to bgezal rt, label ; 17_PCREL
10196 or bltzal rt, label ; 17_PCREL */
35c08157 10197
1c8f6a4d
KLC
10198 /* Convert to complimentary conditional call. */
10199 *insn_len = 0;
10200 insn = CONVERT_CONDITION_CALL (insn);
10201 bfd_putb32 (insn, contents + em_irel->r_offset);
10202
10203 em_irel->r_info =
10204 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_17_PCREL_RELA);
10205
10206 /* Set resolved relocation. */
10207 cond_irel =
10208 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10209 R_NDS32_PTR_RESOLVED, irel->r_addend);
10210 if (cond_irel == irelend)
35c08157 10211 {
4eca0228 10212 _bfd_error_handler
1c8f6a4d
KLC
10213 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10214 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10215 return FALSE;
10216 }
10217 cond_irel->r_addend = 1;
35c08157 10218
1c8f6a4d 10219 /* Clear relocations. */
35c08157 10220
1c8f6a4d
KLC
10221 irel->r_info =
10222 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10223
1c8f6a4d
KLC
10224 cond_irel =
10225 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10226 R_NDS32_17_PCREL_RELA, laddr);
10227 if (cond_irel != irelend)
10228 cond_irel->r_info =
10229 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10230
1c8f6a4d
KLC
10231 cond_irel =
10232 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10233 R_NDS32_INSN16, irel->r_addend);
10234 if (cond_irel != irelend)
10235 cond_irel->r_info =
10236 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10237
1c8f6a4d
KLC
10238 }
10239 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
10240 {
10241 /* Relax to the following instruction sequence
10242 bltz rt, .L1 ; LONGCALL2/17_PCREL
10243 jal symbol ; 25_PCREL/PTR_RES
10244 .L1 */
10245 *insn_len = 4;
10246 /* Convert instruction. */
10247 insn = INSN_JAL;
10248 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10249
1c8f6a4d
KLC
10250 /* Convert relocations. */
10251 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10252 R_NDS32_25_PCREL_RELA);
10253 irel->r_info =
10254 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL5);
35c08157 10255
1c8f6a4d
KLC
10256 /* Set resolved relocation. */
10257 cond_irel =
10258 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10259 R_NDS32_PTR_RESOLVED, irel->r_addend);
10260 if (cond_irel == irelend)
10261 {
4eca0228 10262 _bfd_error_handler
1c8f6a4d
KLC
10263 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10264 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10265 return FALSE;
10266 }
10267 cond_irel->r_addend = 1;
35c08157 10268
1c8f6a4d
KLC
10269 cond_irel =
10270 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10271 R_NDS32_INSN16, irel->r_addend);
10272 if (cond_irel != irelend)
10273 cond_irel->r_info =
10274 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10275 }
10276 return TRUE;
10277}
35c08157 10278
1c8f6a4d 10279/* Relax LONGJUMP4 relocation for nds32_elf_relax_section. */
35c08157 10280
1c8f6a4d
KLC
10281static bfd_boolean
10282nds32_elf_relax_longjump4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10283 Elf_Internal_Rela *internal_relocs, int *insn_len,
10284 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10285 Elf_Internal_Shdr *symtab_hdr)
10286{
10287 /* The pattern for LONGJUMP4.
10288 sethi ta, hi20(symbol) ; LONGJUMP4/HI20
10289 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10290 jr ta ; PTR_RES/INSN16/EMPTY */
10291
10292 bfd_vma laddr;
10293 int seq_len; /* Original length of instruction sequence. */
10294 uint32_t insn;
10295 Elf_Internal_Rela *hi_irel, *ptr_irel, *em_irel, *call_irel, *irelend;
10296 int pic_ext_target = 0;
10297 bfd_signed_vma foff;
35c08157 10298
1c8f6a4d
KLC
10299 irelend = internal_relocs + sec->reloc_count;
10300 seq_len = GET_SEQ_LEN (irel->r_addend);
10301 laddr = irel->r_offset;
10302 *insn_len = seq_len;
35c08157 10303
1c8f6a4d
KLC
10304 /* Get the reloc for the address from which the register is
10305 being loaded. This reloc will tell us which function is
10306 actually being called. */
35c08157 10307
1c8f6a4d
KLC
10308 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10309 R_NDS32_HI20_RELA, laddr);
35c08157 10310
1c8f6a4d
KLC
10311 if (hi_irel == irelend)
10312 {
4eca0228 10313 _bfd_error_handler
1c8f6a4d
KLC
10314 ("%B: warning: R_NDS32_LONGJUMP4 points to unrecognized"
10315 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10316 return FALSE;
10317 }
35c08157 10318
1c8f6a4d
KLC
10319 /* Get the value of the symbol referred to by the reloc. */
10320 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
10321 &pic_ext_target);
35c08157 10322
1c8f6a4d
KLC
10323 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
10324 || foff < -CONSERVATIVE_24BIT_S1)
10325 return FALSE;
35c08157 10326
1c8f6a4d
KLC
10327 /* Convert it to "j label", it may be converted to j8 in the final
10328 pass of relaxation. Therefore, we do not consider this currently. */
10329 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10330 R_NDS32_PTR_RESOLVED, irel->r_addend);
10331 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10332 R_NDS32_EMPTY, irel->r_addend);
35c08157 10333
1c8f6a4d
KLC
10334 if (ptr_irel == irelend || em_irel == irelend)
10335 {
4eca0228 10336 _bfd_error_handler
1c8f6a4d
KLC
10337 ("%B: warning: R_NDS32_LONGJUMP4 points to unrecognized"
10338 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10339 return FALSE;
10340 }
35c08157 10341
1c8f6a4d
KLC
10342 em_irel->r_info =
10343 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_25_PCREL_RELA);
10344 ptr_irel->r_addend = 1;
35c08157 10345
1c8f6a4d
KLC
10346 /* Write instruction. */
10347 insn = INSN_J;
10348 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10349
1c8f6a4d
KLC
10350 /* Clear relocations. */
10351 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10352
1c8f6a4d
KLC
10353 /* If there is function cse, HI20 can not remove now. */
10354 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10355 R_NDS32_LONGJUMP4, laddr);
10356 if (call_irel == irelend)
10357 {
10358 *insn_len = 0;
10359 hi_irel->r_info =
10360 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10361 }
35c08157 10362
1c8f6a4d
KLC
10363 return TRUE;
10364}
35c08157 10365
1c8f6a4d 10366/* Relax LONGJUMP5 relocation for nds32_elf_relax_section. */
35c08157 10367
1c8f6a4d
KLC
10368static bfd_boolean
10369nds32_elf_relax_longjump5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10370 Elf_Internal_Rela *internal_relocs, int *insn_len,
10371 int *seq_len, bfd_byte *contents,
10372 Elf_Internal_Sym *isymbuf,
10373 Elf_Internal_Shdr *symtab_hdr)
10374{
10375 /* There are 2 variations for LONGJUMP5
10376 case 2-4; 1st insn convertible, 16-bit on.
10377 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10378 j label ; 25_PCREL/INSN16
10379 $1:
10380
10381 case 4-4; 1st insn not convertible
10382 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10383 j label ; 25_PCREL/INSN16
10384 .L1: */
10385
10386 bfd_vma laddr;
10387 Elf_Internal_Rela *cond_irel, *irelend;
10388 int pic_ext_target = 0;
10389 unsigned int i;
10390 bfd_signed_vma foff;
10391 uint32_t insn, re_insn = 0;
10392 uint16_t insn16, re_insn16 = 0;
10393 unsigned long reloc;
35c08157 10394
1c8f6a4d
KLC
10395 enum elf_nds32_reloc_type checked_types[] =
10396 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10397 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
35c08157 10398
1c8f6a4d
KLC
10399 irelend = internal_relocs + sec->reloc_count;
10400 laddr = irel->r_offset;
35c08157 10401
1c8f6a4d
KLC
10402 /* Get the reloc for the address from which the register is
10403 being loaded. This reloc will tell us which function is
10404 actually being called. */
35c08157 10405
1c8f6a4d
KLC
10406 cond_irel =
10407 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10408 R_NDS32_25_PCREL_RELA, irel->r_addend);
10409 if (cond_irel == irelend)
10410 {
4eca0228 10411 _bfd_error_handler
1c8f6a4d
KLC
10412 ("%B: warning: R_NDS32_LONGJUMP5 points to unrecognized"
10413 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10414 return FALSE;
10415 }
35c08157 10416
1c8f6a4d
KLC
10417 /* Get the value of the symbol referred to by the reloc. */
10418 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10419 &pic_ext_target);
35c08157 10420
1c8f6a4d
KLC
10421 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10422 || foff >= CONSERVATIVE_16BIT_S1)
10423 return FALSE;
35c08157 10424
1c8f6a4d
KLC
10425 /* Get the all corresponding instructions. */
10426 insn = bfd_getb32 (contents + laddr);
10427 /* Check instruction size. */
10428 if (insn & 0x80000000)
10429 {
10430 *seq_len = 0;
10431 insn16 = insn >> 16;
10432 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10433 }
10434 else
10435 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 10436
1c8f6a4d
KLC
10437 if (N32_OP6 (re_insn) == N32_OP6_BR1
10438 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10439 {
10440 /* beqs label ; 15_PCREL. */
10441 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10442 reloc = R_NDS32_15_PCREL_RELA;
10443 }
10444 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10445 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10446 {
10447 /* beqz label ; 17_PCREL. */
10448 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10449 reloc = R_NDS32_17_PCREL_RELA;
10450 }
10451 else if ( N32_OP6 (re_insn) == N32_OP6_BR3
10452 && foff >= -CONSERVATIVE_8BIT_S1 && foff < CONSERVATIVE_8BIT_S1)
10453 {
10454 /* beqc label ; 9_PCREL. */
10455 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10456 reloc = R_NDS32_WORD_9_PCREL_RELA;
10457 }
10458 else
10459 return FALSE;
35c08157 10460
1c8f6a4d
KLC
10461 /* Set all relocations. */
10462 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), reloc);
35c08157 10463
1c8f6a4d
KLC
10464 /* Clean relocations. */
10465 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10466 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10467 {
10468 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10469 checked_types[i], laddr);
10470 if (cond_irel != irelend)
10471 {
10472 if (*seq_len == 0
10473 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
35c08157 10474 {
1c8f6a4d
KLC
10475 /* If the branch instruction is 2 byte, it cannot remove
10476 directly. Only convert it to nop16 and remove it after
10477 checking alignment issue. */
10478 insn16 = NDS32_NOP16;
10479 bfd_putb16 (insn16, contents + laddr);
10480 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157
KLC
10481 }
10482 else
1c8f6a4d
KLC
10483 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10484 R_NDS32_NONE);
35c08157 10485 }
1c8f6a4d
KLC
10486 }
10487 *insn_len = 0;
35c08157 10488
1c8f6a4d
KLC
10489 return TRUE;
10490}
35c08157 10491
1c8f6a4d 10492/* Relax LONGJUMP6 relocation for nds32_elf_relax_section. */
35c08157 10493
1c8f6a4d
KLC
10494static bfd_boolean
10495nds32_elf_relax_longjump6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10496 Elf_Internal_Rela *internal_relocs, int *insn_len,
10497 int *seq_len, bfd_byte *contents,
10498 Elf_Internal_Sym *isymbuf,
10499 Elf_Internal_Shdr *symtab_hdr)
10500{
10501 /* There are 5 variations for LONGJUMP6
10502 case : 2-4-4-4; 1st insn convertible, 16-bit on.
10503 bnes38 rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10504 sethi ta, hi20(symbol) ; HI20/PTR
10505 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10506 jr ta ; PTR_RES/INSN16/EMPTY
10507 .L1:
10508
10509 case : 4-4-4-4; 1st insn not convertible, 16-bit on.
10510 bne rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10511 sethi ta, hi20(symbol) ; HI20/PTR
10512 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10513 jr ta ; PTR_RES/INSN16/EMPTY
10514 .L1: */
10515
10516 enum elf_nds32_reloc_type checked_types[] =
10517 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10518 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
10519
10520 int reloc_off = 0, cond_removed = 0;
10521 bfd_vma laddr;
10522 Elf_Internal_Rela *cond_irel, *em_irel, *irelend, *insn_irel;
10523 int pic_ext_target = 0;
10524 unsigned int i;
10525 bfd_signed_vma foff;
10526 uint32_t insn, re_insn = 0;
10527 uint16_t insn16, re_insn16 = 0;
10528 unsigned long reloc;
35c08157 10529
1c8f6a4d
KLC
10530 irelend = internal_relocs + sec->reloc_count;
10531 laddr = irel->r_offset;
35c08157 10532
1c8f6a4d
KLC
10533 /* Get the reloc for the address from which the register is
10534 being loaded. This reloc will tell us which function is
10535 actually being called. */
10536 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10537 R_NDS32_EMPTY, irel->r_addend);
35c08157 10538
1c8f6a4d
KLC
10539 if (em_irel == irelend)
10540 {
4eca0228 10541 _bfd_error_handler
1c8f6a4d
KLC
10542 ("%B: warning: R_NDS32_LONGJUMP6 points to unrecognized"
10543 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10544 return FALSE;
10545 }
35c08157 10546
1c8f6a4d
KLC
10547 /* Get the value of the symbol referred to by the reloc. */
10548 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10549 &pic_ext_target);
35c08157 10550
1c8f6a4d
KLC
10551 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10552 || foff >= CONSERVATIVE_24BIT_S1)
10553 return FALSE;
35c08157 10554
1c8f6a4d
KLC
10555 insn = bfd_getb32 (contents + laddr);
10556 /* Check instruction size. */
10557 if (insn & 0x80000000)
10558 {
10559 *seq_len = 0;
10560 insn16 = insn >> 16;
10561 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10562 }
10563 else
10564 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 10565
1c8f6a4d
KLC
10566 /* For simplicity of coding, we are going to modify the section
10567 contents, the section relocs, and the BFD symbol table. We
10568 must tell the rest of the code not to free up this
10569 information. It would be possible to instead create a table
10570 of changes which have to be made, as is done in coff-mips.c;
10571 that would be more work, but would require less memory when
10572 the linker is run. */
35c08157 10573
1c8f6a4d
KLC
10574 if (N32_OP6 (re_insn) == N32_OP6_BR1
10575 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10576 {
10577 /* beqs label ; 15_PCREL */
10578 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10579 reloc = R_NDS32_15_PCREL_RELA;
10580 cond_removed = 1;
10581 }
10582 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10583 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10584 {
10585 /* beqz label ; 17_PCREL */
10586 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10587 reloc = R_NDS32_17_PCREL_RELA;
10588 cond_removed = 1;
10589 }
10590 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
10591 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
10592 {
10593 /* Relax to one of the following 2 variations
35c08157 10594
1c8f6a4d
KLC
10595 case 2-4; 1st insn convertible, 16-bit on.
10596 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10597 j label ; 25_PCREL/INSN16
10598 $1:
35c08157 10599
1c8f6a4d
KLC
10600 case 4-4; 1st insn not convertible
10601 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10602 j label ; 25_PCREL/INSN16
10603 .L1: */
35c08157 10604
1c8f6a4d
KLC
10605 /* Use j label as second instruction. */
10606 insn = INSN_J;
10607 reloc = R_NDS32_25_PCREL_RELA;
10608 bfd_putb32 (insn, contents + em_irel->r_offset);
10609 }
10610 else
10611 return FALSE;
35c08157 10612
1c8f6a4d
KLC
10613 /* Set all relocations. */
10614 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), reloc);
35c08157 10615
1c8f6a4d
KLC
10616 cond_irel =
10617 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10618 R_NDS32_PTR_RESOLVED, em_irel->r_offset);
10619 cond_irel->r_addend = 1;
35c08157 10620
1c8f6a4d
KLC
10621 /* Use INSN16 of first branch instruction to distinguish if keeping
10622 INSN16 of final instruction or not. */
10623 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10624 R_NDS32_INSN16, irel->r_offset);
10625 if (insn_irel == irelend)
10626 {
10627 /* Clean the final INSN16. */
10628 insn_irel =
10629 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10630 R_NDS32_INSN16, em_irel->r_offset);
10631 insn_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10632 R_NDS32_NONE);
10633 }
10634
10635 if (cond_removed == 1)
10636 {
10637 *insn_len = 0;
10638
10639 /* Clear relocations. */
10640 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10641
1c8f6a4d
KLC
10642 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10643 {
10644 cond_irel =
10645 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10646 checked_types[i], laddr);
10647 if (cond_irel != irelend)
35c08157 10648 {
1c8f6a4d
KLC
10649 if (*seq_len == 0
10650 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
10651 {
10652 /* If the branch instruction is 2 byte, it cannot remove
10653 directly. Only convert it to nop16 and remove it after
10654 checking alignment issue. */
10655 insn16 = NDS32_NOP16;
10656 bfd_putb16 (insn16, contents + laddr);
10657 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10658 }
10659 else
10660 cond_irel->r_info =
10661 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10662 }
35c08157 10663 }
1c8f6a4d
KLC
10664 }
10665 else
10666 {
10667 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
10668 R_NDS32_LONGJUMP5);
10669 }
35c08157 10670
1c8f6a4d
KLC
10671 return TRUE;
10672}
35c08157 10673
1c8f6a4d 10674/* Relax LONGJUMP7 relocation for nds32_elf_relax_section. */
35c08157 10675
1c8f6a4d
KLC
10676static bfd_boolean
10677nds32_elf_relax_longjump7 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10678 Elf_Internal_Rela *internal_relocs, int *insn_len,
10679 int *seq_len, bfd_byte *contents,
10680 Elf_Internal_Sym *isymbuf,
10681 Elf_Internal_Shdr *symtab_hdr)
10682{
10683 /* There are 2 variations for LONGJUMP5
10684 case 2-4; 1st insn convertible, 16-bit on.
10685 movi55 ta, imm11 ; LONGJUMP7/INSN16
10686 beq rt, ta, label ; 15_PCREL
10687
10688 case 4-4; 1st insn not convertible
10689 movi55 ta, imm11 ; LONGJUMP7/INSN16
10690 beq rt, ta, label ; 15_PCREL */
10691
10692 bfd_vma laddr;
10693 Elf_Internal_Rela *cond_irel, *irelend, *insn_irel;
10694 int pic_ext_target = 0;
10695 bfd_signed_vma foff;
10696 uint32_t insn, re_insn = 0;
10697 uint16_t insn16;
10698 uint32_t imm11;
35c08157 10699
1c8f6a4d
KLC
10700 irelend = internal_relocs + sec->reloc_count;
10701 laddr = irel->r_offset;
35c08157 10702
1c8f6a4d
KLC
10703 /* Get the reloc for the address from which the register is
10704 being loaded. This reloc will tell us which function is
10705 actually being called. */
35c08157 10706
1c8f6a4d
KLC
10707 cond_irel =
10708 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10709 R_NDS32_15_PCREL_RELA, irel->r_addend);
10710 if (cond_irel == irelend)
10711 {
4eca0228 10712 _bfd_error_handler
1c8f6a4d
KLC
10713 ("%B: warning: R_NDS32_LONGJUMP7 points to unrecognized"
10714 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10715 return FALSE;
10716 }
35c08157 10717
1c8f6a4d
KLC
10718 /* Get the value of the symbol referred to by the reloc. */
10719 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10720 &pic_ext_target);
35c08157 10721
1c8f6a4d
KLC
10722 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_8BIT_S1
10723 || foff >= CONSERVATIVE_8BIT_S1)
10724 return FALSE;
35c08157 10725
1c8f6a4d
KLC
10726 /* Get the first instruction for its size. */
10727 insn = bfd_getb32 (contents + laddr);
10728 if (insn & 0x80000000)
10729 {
10730 *seq_len = 0;
10731 /* Get the immediate from movi55. */
10732 imm11 = N16_IMM5S (insn >> 16);
10733 }
10734 else
10735 {
10736 /* Get the immediate from movi. */
10737 imm11 = N32_IMM20S (insn);
35c08157
KLC
10738 }
10739
1c8f6a4d
KLC
10740 /* Get the branch instruction. */
10741 insn = bfd_getb32 (contents + irel->r_addend);
10742 /* Convert instruction to BR3. */
10743 if ((insn >> 14) & 0x1)
10744 re_insn = N32_BR3 (BNEC, N32_RT5 (insn), imm11, 0);
10745 else
10746 re_insn = N32_BR3 (BEQC, N32_RT5 (insn), imm11, 0);
35c08157 10747
1c8f6a4d 10748 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
35c08157 10749
1c8f6a4d
KLC
10750 /* Set all relocations. */
10751 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10752 R_NDS32_WORD_9_PCREL_RELA);
10753
10754 /* Clean relocations. */
10755 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10756 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10757 R_NDS32_INSN16, irel->r_offset);
10758 if (insn_irel != irelend)
10759 {
10760 if (*seq_len == 0)
35c08157 10761 {
1c8f6a4d
KLC
10762 /* If the first insntruction is 16bit, convert it to nop16. */
10763 insn16 = NDS32_NOP16;
10764 bfd_putb16 (insn16, contents + laddr);
10765 insn_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157 10766 }
1c8f6a4d
KLC
10767 else
10768 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10769 R_NDS32_NONE);
35c08157 10770 }
1c8f6a4d 10771 *insn_len = 0;
35c08157 10772
1c8f6a4d
KLC
10773 return TRUE;
10774}
35c08157 10775
1c8f6a4d 10776#define GET_LOADSTORE_RANGE(addend) (((addend) >> 8) & 0x3f)
35c08157 10777
1c8f6a4d 10778/* Relax LOADSTORE relocation for nds32_elf_relax_section. */
35c08157 10779
1c8f6a4d
KLC
10780static bfd_boolean
10781nds32_elf_relax_loadstore (struct bfd_link_info *link_info, bfd *abfd,
10782 asection *sec, Elf_Internal_Rela *irel,
10783 Elf_Internal_Rela *internal_relocs, int *insn_len,
10784 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10785 Elf_Internal_Shdr *symtab_hdr, int load_store_relax)
10786{
6cae483a
AM
10787 int eliminate_sethi = 0, range_type;
10788 unsigned int i;
1c8f6a4d
KLC
10789 bfd_vma local_sda, laddr;
10790 int seq_len; /* Original length of instruction sequence. */
10791 uint32_t insn;
10792 Elf_Internal_Rela *hi_irelfn = NULL, *irelend;
10793 bfd_vma access_addr = 0;
10794 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10795 enum elf_nds32_reloc_type checked_types[] =
10796 { R_NDS32_HI20_RELA, R_NDS32_GOT_HI20,
10797 R_NDS32_GOTPC_HI20, R_NDS32_GOTOFF_HI20,
10798 R_NDS32_PLTREL_HI20, R_NDS32_PLT_GOTREL_HI20,
10799 R_NDS32_TLS_LE_HI20
10800 };
35c08157 10801
1c8f6a4d
KLC
10802 irelend = internal_relocs + sec->reloc_count;
10803 seq_len = GET_SEQ_LEN (irel->r_addend);
10804 laddr = irel->r_offset;
10805 *insn_len = seq_len;
35c08157 10806
1c8f6a4d 10807 /* Get the high part relocation. */
6cae483a 10808 for (i = 0; i < ARRAY_SIZE (checked_types); i++)
1c8f6a4d
KLC
10809 {
10810 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10811 checked_types[i], laddr);
10812 if (hi_irelfn != irelend)
10813 break;
10814 }
35c08157 10815
1c8f6a4d
KLC
10816 if (hi_irelfn == irelend)
10817 {
4eca0228 10818 _bfd_error_handler
1c8f6a4d
KLC
10819 ("%B: warning: R_NDS32_LOADSTORE points to unrecognized"
10820 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10821 return FALSE;
10822 }
35c08157 10823
1c8f6a4d
KLC
10824 range_type = GET_LOADSTORE_RANGE (irel->r_addend);
10825 nds32_elf_final_sda_base (sec->output_section->owner,
10826 link_info, &local_sda, FALSE);
35c08157 10827
1c8f6a4d
KLC
10828 switch (ELF32_R_TYPE (hi_irelfn->r_info))
10829 {
10830 case R_NDS32_HI20_RELA:
10831 insn = bfd_getb32 (contents + laddr);
10832 access_addr =
10833 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10834
10835 if (range_type == NDS32_LOADSTORE_IMM)
10836 {
10837 struct elf_link_hash_entry *h = NULL;
10838 int indx;
35c08157 10839
1c8f6a4d 10840 if (ELF32_R_SYM (hi_irelfn->r_info) >= symtab_hdr->sh_info)
35c08157 10841 {
1c8f6a4d
KLC
10842 indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info;
10843 h = elf_sym_hashes (abfd)[indx];
35c08157 10844 }
35c08157 10845
1c8f6a4d
KLC
10846 if ((access_addr < CONSERVATIVE_20BIT)
10847 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
35c08157 10848 {
1c8f6a4d
KLC
10849 eliminate_sethi = 1;
10850 break;
35c08157 10851 }
1c8f6a4d
KLC
10852
10853 /* This is avoid to relax symbol address which is fixed
10854 relocations. Ex: _stack. */
10855 if (h && bfd_is_abs_section (h->root.u.def.section))
10856 return FALSE;
10857 }
10858
10859 if (!load_store_relax)
10860 return FALSE;
10861
10862 /* Case for set gp register. */
10863 if (N32_RT5 (insn) == REG_GP)
10864 break;
10865
10866 if (range_type == NDS32_LOADSTORE_FLOAT_S
10867 || range_type == NDS32_LOADSTORE_FLOAT_S)
10868 {
10869 range_l = sdata_range[0][0];
10870 range_h = sdata_range[0][1];
10871 }
10872 else
10873 {
10874 range_l = sdata_range[1][0];
10875 range_h = sdata_range[1][1];
10876 }
10877 break;
10878
10879 case R_NDS32_GOT_HI20:
10880 access_addr =
10881 calculate_got_memory_address (abfd, link_info, hi_irelfn, symtab_hdr);
10882
10883 /* If this symbol is not in .got, the return value will be -1.
10884 Since the gp value is set to SDA_BASE but not GLOBAL_OFFSET_TABLE,
10885 a negative offset is allowed. */
10886 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10887 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10888 eliminate_sethi = 1;
10889 break;
10890
10891 case R_NDS32_PLT_GOTREL_HI20:
10892 access_addr = calculate_plt_memory_address (abfd, link_info, isymbuf,
10893 hi_irelfn, symtab_hdr);
10894
10895 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10896 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10897 eliminate_sethi = 1;
10898 break;
10899
10900 case R_NDS32_GOTOFF_HI20:
10901 access_addr =
10902 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10903
10904 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10905 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10906 eliminate_sethi = 1;
10907 break;
10908
10909 case R_NDS32_GOTPC_HI20:
10910 /* The access_addr must consider r_addend of hi_irel. */
10911 access_addr = sec->output_section->vma + sec->output_offset
10912 + irel->r_offset + hi_irelfn->r_addend;
10913
10914 if ((bfd_signed_vma) (local_sda - access_addr) < CONSERVATIVE_20BIT
10915 && (bfd_signed_vma) (local_sda - access_addr) >= -CONSERVATIVE_20BIT)
10916 eliminate_sethi = 1;
10917 break;
10918
10919 case R_NDS32_TLS_LE_HI20:
10920 access_addr =
10921 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10922 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10923 access_addr -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10924 if ((range_type == NDS32_LOADSTORE_IMM)
10925 && (bfd_signed_vma) (access_addr) < CONSERVATIVE_20BIT
10926 && (bfd_signed_vma) (access_addr) >= -CONSERVATIVE_20BIT)
10927 eliminate_sethi = 1;
10928 break;
10929
10930 default:
10931 return FALSE;
10932 }
10933
10934 /* Delete sethi instruction. */
10935 if (eliminate_sethi == 1
10936 || (local_sda <= access_addr && (access_addr - local_sda) < range_h)
10937 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
10938 {
10939 hi_irelfn->r_info =
10940 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
10941 irel->r_info =
10942 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10943 *insn_len = 0;
10944 }
10945 return TRUE;
10946}
10947
10948/* Relax LO12 relocation for nds32_elf_relax_section. */
10949
10950static void
10951nds32_elf_relax_lo12 (struct bfd_link_info *link_info, bfd *abfd,
10952 asection *sec, Elf_Internal_Rela *irel,
10953 Elf_Internal_Rela *internal_relocs, bfd_byte *contents,
10954 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr)
10955{
10956 uint32_t insn;
10957 bfd_vma local_sda, laddr;
10958 unsigned long reloc;
10959 bfd_vma access_addr;
10960 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10961 Elf_Internal_Rela *irelfn = NULL, *irelend;
10962 struct elf_link_hash_entry *h = NULL;
10963 int indx;
10964
10965 /* For SDA base relative relaxation. */
10966 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10967 &local_sda, FALSE);
10968
10969 irelend = internal_relocs + sec->reloc_count;
10970 laddr = irel->r_offset;
10971 insn = bfd_getb32 (contents + laddr);
10972
10973 if (!is_sda_access_insn (insn) && N32_OP6 (insn) != N32_OP6_ORI)
10974 return;
10975
10976 access_addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10977
10978 if (ELF32_R_SYM (irel->r_info) >= symtab_hdr->sh_info)
10979 {
10980 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
10981 h = elf_sym_hashes (abfd)[indx];
10982 }
10983
10984 if (N32_OP6 (insn) == N32_OP6_ORI && access_addr < CONSERVATIVE_20BIT
10985 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
10986 {
10987 reloc = R_NDS32_20_RELA;
10988 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10989 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10990 bfd_putb32 (insn, contents + laddr);
10991 }
10992 /* This is avoid to relax symbol address which is fixed
10993 relocations. Ex: _stack. */
10994 else if (N32_OP6 (insn) == N32_OP6_ORI
10995 && h && bfd_is_abs_section (h->root.u.def.section))
10996 return;
10997 else
10998 {
10999 range_l = sdata_range[1][0];
11000 range_h = sdata_range[1][1];
11001 switch (ELF32_R_TYPE (irel->r_info))
11002 {
11003 case R_NDS32_LO12S0_RELA:
11004 reloc = R_NDS32_SDA19S0_RELA;
11005 break;
11006 case R_NDS32_LO12S1_RELA:
11007 reloc = R_NDS32_SDA18S1_RELA;
11008 break;
11009 case R_NDS32_LO12S2_RELA:
11010 reloc = R_NDS32_SDA17S2_RELA;
11011 break;
11012 case R_NDS32_LO12S2_DP_RELA:
11013 range_l = sdata_range[0][0];
11014 range_h = sdata_range[0][1];
11015 reloc = R_NDS32_SDA12S2_DP_RELA;
11016 break;
11017 case R_NDS32_LO12S2_SP_RELA:
11018 range_l = sdata_range[0][0];
11019 range_h = sdata_range[0][1];
11020 reloc = R_NDS32_SDA12S2_SP_RELA;
11021 break;
11022 default:
11023 return;
11024 }
11025
11026 /* There are range_h and range_l because linker has to promise
11027 all sections move cross one page together. */
11028 if ((local_sda <= access_addr && (access_addr - local_sda) < range_h)
11029 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
11030 {
11031 if (N32_OP6 (insn) == N32_OP6_ORI && N32_RT5 (insn) == REG_GP)
35c08157 11032 {
1c8f6a4d
KLC
11033 /* Maybe we should add R_NDS32_INSN16 reloc type here
11034 or manually do some optimization. sethi can't be
11035 eliminated when updating $gp so the relative ori
11036 needs to be preserved. */
11037 return;
35c08157 11038 }
1c8f6a4d
KLC
11039 if (!turn_insn_to_sda_access (insn, ELF32_R_TYPE (irel->r_info),
11040 &insn))
11041 return;
11042 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11043 bfd_putb32 (insn, contents + laddr);
11044
11045 irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11046 R_NDS32_INSN16);
11047 /* SDA17 must keep INSN16 for converting fp_as_gp. */
11048 if (irelfn != irelend && reloc != R_NDS32_SDA17S2_RELA)
11049 irelfn->r_info =
11050 ELF32_R_INFO (ELF32_R_SYM (irelfn->r_info), R_NDS32_NONE);
11051
35c08157 11052 }
1c8f6a4d
KLC
11053 }
11054 return;
11055}
35c08157 11056
1c8f6a4d
KLC
11057/* Relax low part of PIC instruction pattern. */
11058
11059static void
11060nds32_elf_relax_piclo12 (struct bfd_link_info *link_info, bfd *abfd,
11061 asection *sec, Elf_Internal_Rela *irel,
11062 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11063 Elf_Internal_Shdr *symtab_hdr)
11064{
11065 uint32_t insn;
11066 bfd_vma local_sda, laddr;
11067 bfd_signed_vma foff;
11068 unsigned long reloc;
11069
11070 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11071 &local_sda, FALSE);
11072 laddr = irel->r_offset;
11073 insn = bfd_getb32 (contents + laddr);
11074
11075 if (N32_OP6 (insn) != N32_OP6_ORI)
11076 return;
11077
11078 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12)
11079 {
11080 foff = calculate_got_memory_address (abfd, link_info, irel,
11081 symtab_hdr) - local_sda;
11082 reloc = R_NDS32_GOT20;
11083 }
11084 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12)
11085 {
11086 foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
11087 symtab_hdr) - local_sda;
11088 reloc = R_NDS32_PLT_GOTREL_LO20;
11089 }
11090 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12)
11091 {
11092 foff = calculate_memory_address (abfd, irel, isymbuf,
11093 symtab_hdr) - local_sda;
11094 reloc = R_NDS32_GOTOFF;
11095 }
11096 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12)
11097 {
11098 foff = local_sda - sec->output_section->vma + sec->output_offset
11099 + irel->r_offset + irel->r_addend;
11100 reloc = R_NDS32_GOTPC20;
11101 }
11102 else
11103 return;
11104
11105 if ((foff < CONSERVATIVE_20BIT) && (foff >= -CONSERVATIVE_20BIT))
11106 {
11107 /* Turn into MOVI. */
11108 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11109 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
11110 bfd_putb32 (insn, contents + laddr);
11111 }
11112}
11113
11114/* Relax low part of LE TLS instruction pattern. */
11115
11116static void
11117nds32_elf_relax_letlslo12 (struct bfd_link_info *link_info, bfd *abfd,
11118 Elf_Internal_Rela *irel,
11119 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11120 Elf_Internal_Shdr *symtab_hdr)
11121{
11122 uint32_t insn;
11123 bfd_vma laddr;
11124 bfd_signed_vma foff;
11125 unsigned long reloc;
11126
11127 laddr = irel->r_offset;
11128 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11129 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11130 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11131 insn = bfd_getb32 (contents + laddr);
11132
11133 if ( (bfd_signed_vma) (foff) < CONSERVATIVE_20BIT
11134 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_20BIT)
11135 {
11136 /* Pattern sethi-ori transform to movi. */
11137 reloc = R_NDS32_TLS_LE_20;
11138 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11139 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
11140 bfd_putb32 (insn, contents + laddr);
11141 }
11142}
11143
11144/* Relax LE TLS calculate address instruction pattern. */
11145
11146static void
11147nds32_elf_relax_letlsadd (struct bfd_link_info *link_info, bfd *abfd,
11148 asection *sec, Elf_Internal_Rela *irel,
11149 Elf_Internal_Rela *internal_relocs,
11150 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11151 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11152{
11153 /* Local TLS non-pic
11154 sethi ta, hi20(symbol@tpoff) ; TLS_LE_HI20
11155 ori ta, ta, lo12(symbol@tpoff) ; TLS_LE_LO12
11156 add ra, ta, tp ; TLS_LE_ADD */
11157
11158 uint32_t insn;
11159 bfd_vma laddr;
11160 bfd_signed_vma foff;
11161 Elf_Internal_Rela *i1_irelfn, *irelend;
11162
11163 irelend = internal_relocs + sec->reloc_count;
11164 laddr = irel->r_offset;
11165 insn = bfd_getb32 (contents + laddr);
11166 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11167 R_NDS32_PTR_RESOLVED);
11168 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11169 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11170 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11171
11172 /* The range is +/-16k. */
11173 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
11174 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
11175 {
11176 /* Transform add to addi. */
11177 insn = N32_TYPE2 (ADDI, N32_RT5 (insn), N32_RB5 (insn), 0);
11178 irel->r_info =
11179 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
11180
11181 bfd_putb32 (insn, contents + laddr);
11182 if (i1_irelfn != irelend)
11183 {
11184 i1_irelfn->r_addend |= 1;
11185 *again = TRUE;
11186 }
11187 }
11188}
11189
11190/* Relax LE TLS load store instruction pattern. */
11191
11192static void
11193nds32_elf_relax_letlsls (struct bfd_link_info *link_info, bfd *abfd,
11194 asection *sec, Elf_Internal_Rela *irel,
11195 Elf_Internal_Rela *internal_relocs,
11196 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11197 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11198{
11199
11200 uint32_t insn;
11201 bfd_vma laddr;
11202 bfd_signed_vma foff;
11203 Elf_Internal_Rela *i1_irelfn, *irelend;
11204 int success = 0;
11205
11206 irelend = internal_relocs + sec->reloc_count;
11207 laddr = irel->r_offset;
11208 insn = bfd_getb32 (contents + laddr);
11209 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11210 R_NDS32_PTR_RESOLVED);
11211 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11212 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11213 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11214
11215 switch ((N32_OP6 (insn) << 8) | (insn & 0xff))
11216 {
11217 case (N32_OP6_MEM << 8) | N32_MEM_LB:
11218 case (N32_OP6_MEM << 8) | N32_MEM_SB:
11219 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
11220 /* The range is +/-16k. */
11221 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
11222 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
11223 {
11224 insn =
11225 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11226 irel->r_info =
11227 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
11228 success = 1;
11229 break;
11230 }
11231 case (N32_OP6_MEM << 8) | N32_MEM_LH:
11232 case (N32_OP6_MEM << 8) | N32_MEM_SH:
11233 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
11234 /* The range is +/-32k. */
11235 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S1
11236 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S1)
35c08157 11237 {
1c8f6a4d
KLC
11238 insn =
11239 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11240 irel->r_info =
11241 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S1);
11242 success = 1;
11243 break;
11244 }
11245 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11246 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11247 /* The range is +/-64k. */
11248 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S2
11249 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S2)
11250 {
11251 insn =
11252 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11253 irel->r_info =
11254 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S2);
11255 success = 1;
11256 break;
11257 }
11258 default:
11259 break;
11260 }
35c08157 11261
1c8f6a4d
KLC
11262 if (success)
11263 {
11264 bfd_putb32 (insn, contents + laddr);
11265 if (i1_irelfn != irelend)
11266 {
11267 i1_irelfn->r_addend |= 1;
11268 *again = TRUE;
11269 }
11270 }
11271}
35c08157 11272
1c8f6a4d 11273/* Relax PTR relocation for nds32_elf_relax_section. */
35c08157 11274
1c8f6a4d
KLC
11275static bfd_boolean
11276nds32_elf_relax_ptr (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
11277 Elf_Internal_Rela *internal_relocs, int *insn_len,
11278 int *seq_len, bfd_byte *contents)
11279{
11280 Elf_Internal_Rela *ptr_irel, *irelend, *count_irel, *re_irel;
35c08157 11281
1c8f6a4d 11282 irelend = internal_relocs + sec->reloc_count;
35c08157 11283
1c8f6a4d
KLC
11284 re_irel =
11285 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11286 R_NDS32_PTR_RESOLVED, irel->r_addend);
35c08157 11287
1c8f6a4d
KLC
11288 if (re_irel == irelend)
11289 {
4eca0228 11290 _bfd_error_handler
1c8f6a4d
KLC
11291 ("%B: warning: R_NDS32_PTR points to unrecognized reloc at 0x%lx.",
11292 abfd, (long) irel->r_offset);
11293 return FALSE;
11294 }
35c08157 11295
1c8f6a4d
KLC
11296 if (re_irel->r_addend != 1)
11297 return FALSE;
35c08157 11298
1c8f6a4d
KLC
11299 /* Pointed target is relaxed and no longer needs this void *,
11300 change the type to NONE. */
11301 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 11302
1c8f6a4d
KLC
11303 /* Find PTR_COUNT to decide remove it or not. If PTR_COUNT does
11304 not exist, it means only count 1 and remove it directly. */
11305 /* TODO: I hope we can obsolate R_NDS32_COUNT in the future. */
11306 count_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11307 R_NDS32_PTR_COUNT);
11308 ptr_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11309 R_NDS32_PTR);
11310 if (count_irel != irelend)
11311 {
11312 if (--count_irel->r_addend > 0)
11313 return FALSE;
11314 }
11315
11316 if (ptr_irel != irelend)
11317 return FALSE;
11318
11319 /* If the PTR_COUNT is already 0, remove current instruction. */
11320 *seq_len = nds32_elf_insn_size (abfd, contents, irel->r_offset);
11321 *insn_len = 0;
11322 return TRUE;
11323}
11324
11325/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11326
11327static void
11328nds32_elf_relax_pltgot_suff (struct bfd_link_info *link_info, bfd *abfd,
11329 asection *sec, Elf_Internal_Rela *irel,
11330 Elf_Internal_Rela *internal_relocs,
11331 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11332 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11333{
11334 uint32_t insn;
11335 bfd_signed_vma foff;
11336 Elf_Internal_Rela *i1_irelfn, *irelend;
11337 bfd_vma local_sda, laddr;
11338
11339 irelend = internal_relocs + sec->reloc_count;
11340 laddr = irel->r_offset;
11341 insn = bfd_getb32 (contents + laddr);
11342
11343 /* FIXME: It's a little trouble to turn JRAL5 to JAL since
11344 we need additional space. It might be help if we could
11345 borrow some space from instructions to be eliminated
11346 such as sethi, ori, add. */
11347 if (insn & 0x80000000)
11348 return;
11349
11350 if (nds32_elf_check_dup_relocs
11351 (irel, internal_relocs, irelend, R_NDS32_PLT_GOT_SUFF))
11352 return;
11353
11354 i1_irelfn =
11355 find_relocs_at_address (irel, internal_relocs, irelend,
11356 R_NDS32_PTR_RESOLVED);
11357
11358 /* FIXIT 090606
11359 The boundary should be reduced since the .plt section hasn't
11360 been created and the address of specific entry is still unknown
11361 Maybe the range between the function call and the begin of the
11362 .text section can be used to decide if the .plt is in the range
11363 of function call. */
11364
11365 if (N32_OP6 (insn) == N32_OP6_ALU1
11366 && N32_SUB5 (insn) == N32_ALU1_ADD)
11367 {
11368 /* Get the value of the symbol referred to by the reloc. */
11369 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11370 &local_sda, FALSE);
11371 foff = (bfd_signed_vma) (calculate_plt_memory_address
11372 (abfd, link_info, isymbuf, irel,
11373 symtab_hdr) - local_sda);
11374 /* This condition only happened when symbol is undefined. */
11375 if (foff == 0)
11376 return;
11377
11378 if (foff < -CONSERVATIVE_19BIT || foff >= CONSERVATIVE_19BIT)
11379 return;
11380 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11381 R_NDS32_PLT_GOTREL_LO19);
11382 /* addi.gp */
11383 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
11384 }
11385 else if (N32_OP6 (insn) == N32_OP6_JREG
11386 && N32_SUB5 (insn) == N32_JREG_JRAL)
11387 {
11388 /* Get the value of the symbol referred to by the reloc. */
11389 foff =
11390 calculate_plt_offset (abfd, sec, link_info, isymbuf, irel, symtab_hdr);
11391 /* This condition only happened when symbol is undefined. */
11392 if (foff == 0)
11393 return;
11394 if (foff < -CONSERVATIVE_24BIT_S1 || foff >= CONSERVATIVE_24BIT_S1)
11395 return;
11396 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_25_PLTREL);
11397 insn = INSN_JAL;
11398 }
11399 else
11400 return;
11401
11402 bfd_putb32 (insn, contents + laddr);
11403 if (i1_irelfn != irelend)
11404 {
11405 i1_irelfn->r_addend |= 1;
11406 *again = TRUE;
11407 }
11408}
11409
11410/* Relax GOT_SUFF relocation for nds32_elf_relax_section. */
11411
11412static void
11413nds32_elf_relax_got_suff (struct bfd_link_info *link_info, bfd *abfd,
11414 asection *sec, Elf_Internal_Rela *irel,
11415 Elf_Internal_Rela *internal_relocs,
11416 bfd_byte *contents, Elf_Internal_Shdr *symtab_hdr,
11417 bfd_boolean *again)
11418{
11419 uint32_t insn;
11420 bfd_signed_vma foff;
11421 Elf_Internal_Rela *i1_irelfn, *irelend;
11422 bfd_vma local_sda, laddr;
11423
11424 irelend = internal_relocs + sec->reloc_count;
11425 laddr = irel->r_offset;
11426 insn = bfd_getb32 (contents + laddr);
11427 if (insn & 0x80000000)
11428 return;
11429
11430 if (nds32_elf_check_dup_relocs
11431 (irel, internal_relocs, irelend, R_NDS32_GOT_SUFF))
11432 return;
11433
11434 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11435 R_NDS32_PTR_RESOLVED);
11436
11437 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11438 &local_sda, FALSE);
11439 foff = calculate_got_memory_address (abfd, link_info, irel,
11440 symtab_hdr) - local_sda;
11441
11442 if (foff < CONSERVATIVE_19BIT && foff >= -CONSERVATIVE_19BIT)
11443 {
11444 /* Turn LW to LWI.GP. Change relocation type to R_NDS32_GOT_REL. */
11445 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11446 irel->r_info =
11447 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_GOT17S2_RELA);
11448 bfd_putb32 (insn, contents + laddr);
11449 if (i1_irelfn != irelend)
11450 {
11451 i1_irelfn->r_addend |= 1;
11452 *again = TRUE;
11453 }
11454 }
11455}
11456
11457/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11458
11459static void
11460nds32_elf_relax_gotoff_suff (struct bfd_link_info *link_info, bfd *abfd,
11461 asection *sec, Elf_Internal_Rela *irel,
11462 Elf_Internal_Rela *internal_relocs,
11463 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11464 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11465{
11466 int opc_insn_gotoff;
11467 uint32_t insn;
11468 bfd_signed_vma foff;
11469 Elf_Internal_Rela *i1_irelfn, *i2_irelfn, *irelend;
11470 bfd_vma local_sda, laddr;
11471
11472 irelend = internal_relocs + sec->reloc_count;
11473 laddr = irel->r_offset;
11474 insn = bfd_getb32 (contents + laddr);
11475
11476 if (insn & 0x80000000)
11477 return;
11478
11479 if (nds32_elf_check_dup_relocs
11480 (irel, internal_relocs, irelend, R_NDS32_GOTOFF_SUFF))
11481 return;
11482
11483 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11484 R_NDS32_PTR_RESOLVED);
11485 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11486 &local_sda, FALSE);
11487 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11488 foff = foff - local_sda;
11489
11490 if (foff >= CONSERVATIVE_19BIT || foff < -CONSERVATIVE_19BIT)
11491 return;
11492
11493 /* Concatenate opcode and sub-opcode for switch case.
11494 It may be MEM or ALU1. */
11495 opc_insn_gotoff = (N32_OP6 (insn) << 8) | (insn & 0xff);
11496 switch (opc_insn_gotoff)
11497 {
11498 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11499 /* 4-byte aligned. */
11500 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11501 irel->r_info =
11502 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11503 break;
11504 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11505 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
11506 irel->r_info =
11507 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11508 break;
11509 case (N32_OP6_MEM << 8) | N32_MEM_LH:
11510 /* 2-byte aligned. */
11511 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
11512 irel->r_info =
11513 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11514 break;
11515 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
11516 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18));
11517 irel->r_info =
11518 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11519 break;
11520 case (N32_OP6_MEM << 8) | N32_MEM_SH:
11521 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19));
11522 irel->r_info =
11523 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11524 break;
11525 case (N32_OP6_MEM << 8) | N32_MEM_LB:
11526 /* 1-byte aligned. */
11527 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
11528 irel->r_info =
11529 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11530 break;
11531 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
11532 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19));
11533 irel->r_info =
11534 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11535 break;
11536 case (N32_OP6_MEM << 8) | N32_MEM_SB:
11537 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
11538 irel->r_info =
11539 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11540 break;
11541 case (N32_OP6_ALU1 << 8) | N32_ALU1_ADD:
11542 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
11543 irel->r_info =
11544 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11545 break;
11546 default:
11547 return;
11548 }
11549
11550 bfd_putb32 (insn, contents + laddr);
11551 if (i1_irelfn != irelend)
11552 {
11553 i1_irelfn->r_addend |= 1;
11554 *again = TRUE;
11555 }
11556 if ((i2_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11557 R_NDS32_INSN16)) != irelend)
11558 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11559
11560}
11561
11562static bfd_boolean
11563nds32_relax_adjust_label (bfd *abfd, asection *sec,
11564 Elf_Internal_Rela *internal_relocs,
11565 bfd_byte *contents,
11566 nds32_elf_blank_t **relax_blank_list,
11567 int optimize, int opt_size)
11568{
11569 /* This code block is used to adjust 4-byte alignment by relax a pair
11570 of instruction a time.
11571
11572 It recognizes three types of relocations.
11573 1. R_NDS32_LABEL - a aligment.
11574 2. R_NDS32_INSN16 - relax a 32-bit instruction to 16-bit.
11575 3. is_16bit_NOP () - remove a 16-bit instruction. */
11576
11577 /* TODO: It seems currently implementation only support 4-byte aligment.
11578 We should handle any-aligment. */
11579
11580 Elf_Internal_Rela *insn_rel = NULL, *label_rel = NULL, *irel;
11581 Elf_Internal_Rela *tmp_rel, *tmp2_rel = NULL;
11582 Elf_Internal_Rela rel_temp;
11583 Elf_Internal_Rela *irelend;
11584 bfd_vma address;
11585 uint16_t insn16;
11586
11587 /* Checking for branch relaxation relies on the relocations to
11588 be sorted on 'r_offset'. This is not guaranteed so we must sort. */
11589 nds32_insertion_sort (internal_relocs, sec->reloc_count,
11590 sizeof (Elf_Internal_Rela), compar_reloc);
11591
11592 irelend = internal_relocs + sec->reloc_count;
11593
11594 /* Force R_NDS32_LABEL before R_NDS32_INSN16. */
11595 /* FIXME: Can we generate the right order in assembler?
11596 So we don't have to swapping them here. */
11597
11598 for (label_rel = internal_relocs, insn_rel = internal_relocs;
11599 label_rel < irelend; label_rel++)
11600 {
11601 if (ELF32_R_TYPE (label_rel->r_info) != R_NDS32_LABEL)
11602 continue;
11603
11604 /* Find the first reloc has the same offset with label_rel. */
11605 while (insn_rel < irelend && insn_rel->r_offset < label_rel->r_offset)
11606 insn_rel++;
11607
11608 for (;insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset;
11609 insn_rel++)
11610 /* Check if there were R_NDS32_INSN16 and R_NDS32_LABEL at the same
11611 address. */
11612 if (ELF32_R_TYPE (insn_rel->r_info) == R_NDS32_INSN16)
11613 break;
11614
11615 if (insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset
11616 && insn_rel < label_rel)
11617 {
11618 /* Swap the two reloc if the R_NDS32_INSN16 is
11619 before R_NDS32_LABEL. */
11620 memcpy (&rel_temp, insn_rel, sizeof (Elf_Internal_Rela));
11621 memcpy (insn_rel, label_rel, sizeof (Elf_Internal_Rela));
11622 memcpy (label_rel, &rel_temp, sizeof (Elf_Internal_Rela));
11623 }
11624 }
11625
11626 label_rel = NULL;
11627 insn_rel = NULL;
11628 /* If there were a sequence of R_NDS32_LABEL end up with .align 2
11629 or higher, remove other R_NDS32_LABEL with lower alignment.
11630 If an R_NDS32_INSN16 in between R_NDS32_LABELs must be converted,
11631 then the R_NDS32_LABEL sequence is broke. */
11632 for (tmp_rel = internal_relocs; tmp_rel < irelend; tmp_rel++)
11633 {
11634 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_LABEL)
11635 {
11636 if (label_rel == NULL)
11637 {
11638 if (tmp_rel->r_addend < 2)
11639 label_rel = tmp_rel;
11640 continue;
11641 }
11642 else if (tmp_rel->r_addend > 1)
11643 {
11644 /* Remove all LABEL relocation from label_rel to tmp_rel
11645 including relocations with same offset as tmp_rel. */
11646 for (tmp2_rel = label_rel; tmp2_rel < tmp_rel
11647 || tmp2_rel->r_offset == tmp_rel->r_offset; tmp2_rel++)
11648 {
11649 if (ELF32_R_TYPE (tmp2_rel->r_info) == R_NDS32_LABEL
11650 && tmp2_rel->r_addend < 2)
11651 tmp2_rel->r_info =
11652 ELF32_R_INFO (ELF32_R_SYM (tmp2_rel->r_info),
11653 R_NDS32_NONE);
11654 }
11655 label_rel = NULL;
11656 }
11657 }
11658 else if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16 && label_rel)
11659 {
11660 /* A new INSN16 which can be converted, so clear label_rel. */
11661 if (is_convert_32_to_16 (abfd, sec, tmp_rel, internal_relocs,
11662 irelend, &insn16)
11663 || is_16bit_NOP (abfd, sec, tmp_rel))
11664 label_rel = NULL;
11665 }
11666 }
11667
11668 label_rel = NULL;
11669 insn_rel = NULL;
11670 /* Optimized for speed and nothing has not been relaxed.
11671 It's time to align labels.
11672 We may convert a 16-bit instruction right before a label to
11673 32-bit, in order to align the label if necessary
11674 all reloc entries has been sorted by r_offset. */
11675 for (irel = internal_relocs; irel < irelend; irel++)
11676 {
11677 if (ELF32_R_TYPE (irel->r_info) != R_NDS32_INSN16
11678 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL)
11679 continue;
11680
11681 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_INSN16)
11682 {
11683 /* A new INSN16 found, resize the old one. */
11684 if (is_convert_32_to_16
11685 (abfd, sec, irel, internal_relocs, irelend, &insn16)
11686 || is_16bit_NOP (abfd, sec, irel))
11687 {
11688 if (insn_rel)
11689 {
11690 /* Previous INSN16 reloc exists, reduce its
11691 size to 16-bit. */
11692 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11693 irelend, &insn16))
35c08157 11694 {
1c8f6a4d
KLC
11695 nds32_elf_write_16 (abfd, contents, insn_rel,
11696 internal_relocs, irelend, insn16);
11697
11698 if (!insert_nds32_elf_blank_recalc_total
11699 (relax_blank_list, insn_rel->r_offset + 2, 2))
11700 return FALSE;
11701 }
11702 else if (is_16bit_NOP (abfd, sec, insn_rel))
11703 {
11704 if (!insert_nds32_elf_blank_recalc_total
11705 (relax_blank_list, insn_rel->r_offset, 2))
11706 return FALSE;
11707 }
11708 insn_rel->r_info =
11709 ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info), R_NDS32_NONE);
11710 }
11711 /* Save the new one for later use. */
11712 insn_rel = irel;
11713 }
11714 else
11715 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11716 R_NDS32_NONE);
11717 }
11718 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL)
11719 {
11720 /* Search for label. */
11721 int force_relax = 0;
11722
11723 /* Label on 16-bit instruction or optimization
11724 needless, just reset this reloc. */
11725 insn16 = bfd_getb16 (contents + irel->r_offset);
11726 if ((irel->r_addend & 0x1f) < 2 && (!optimize || (insn16 & 0x8000)))
11727 {
11728 irel->r_info =
11729 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11730 continue;
11731 }
11732
11733 address =
11734 irel->r_offset - get_nds32_elf_blank_total (relax_blank_list,
11735 irel->r_offset, 1);
11736
11737 if (!insn_rel)
11738 {
11739 /* Check if there is case which can not be aligned. */
11740 if (irel->r_addend == 2 && address & 0x2)
11741 return FALSE;
11742 continue;
11743 }
11744
11745 /* Try to align this label. */
11746
11747 if ((irel->r_addend & 0x1f) < 2)
11748 {
11749 /* Check if there is a INSN16 at the same address.
11750 Label_rel always seats before insn_rel after
11751 our sort. */
11752
11753 /* Search for INSN16 at LABEL location. If INSN16 is at
11754 same location and this LABEL alignment is lower than 2,
11755 the INSN16 can be converted to 2-byte. */
11756 for (tmp_rel = irel;
11757 tmp_rel < irelend && tmp_rel->r_offset == irel->r_offset;
11758 tmp_rel++)
11759 {
11760 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16
11761 && (is_convert_32_to_16
11762 (abfd, sec, tmp_rel, internal_relocs,
11763 irelend, &insn16)
11764 || is_16bit_NOP (abfd, sec, tmp_rel)))
11765 {
11766 force_relax = 1;
11767 break;
11768 }
11769 }
11770 }
11771
11772 if (force_relax || irel->r_addend == 1 || address & 0x2)
11773 {
11774 /* Label not aligned. */
11775 /* Previous reloc exists, reduce its size to 16-bit. */
11776 if (is_convert_32_to_16 (abfd, sec, insn_rel,
11777 internal_relocs, irelend, &insn16))
11778 {
11779 nds32_elf_write_16 (abfd, contents, insn_rel,
11780 internal_relocs, irelend, insn16);
11781
11782 if (!insert_nds32_elf_blank_recalc_total
11783 (relax_blank_list, insn_rel->r_offset + 2, 2))
11784 return FALSE;
11785 }
11786 else if (is_16bit_NOP (abfd, sec, insn_rel))
11787 {
11788 if (!insert_nds32_elf_blank_recalc_total
11789 (relax_blank_list, insn_rel->r_offset, 2))
11790 return FALSE;
11791 }
11792
11793 }
11794 /* INSN16 reloc is used. */
11795 insn_rel = NULL;
11796 }
11797 }
11798
11799 address =
11800 sec->size - get_nds32_elf_blank_total (relax_blank_list, sec->size, 0);
11801 if (insn_rel && (address & 0x2 || opt_size))
11802 {
11803 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11804 irelend, &insn16))
11805 {
11806 nds32_elf_write_16 (abfd, contents, insn_rel, internal_relocs,
11807 irelend, insn16);
11808 if (!insert_nds32_elf_blank_recalc_total
11809 (relax_blank_list, insn_rel->r_offset + 2, 2))
11810 return FALSE;
11811 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11812 R_NDS32_NONE);
11813 }
11814 else if (is_16bit_NOP (abfd, sec, insn_rel))
11815 {
11816 if (!insert_nds32_elf_blank_recalc_total
11817 (relax_blank_list, insn_rel->r_offset, 2))
11818 return FALSE;
11819 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11820 R_NDS32_NONE);
11821 }
11822 }
11823 insn_rel = NULL;
11824 return TRUE;
11825}
11826
11827/* Pick relaxation round. */
11828
11829static int
11830nds32_elf_pick_relax (bfd_boolean init, asection *sec, bfd_boolean *again,
11831 struct elf_nds32_link_hash_table *table,
11832 struct bfd_link_info *link_info)
11833{
18393a2e
KLC
11834 static asection *final_sec, *first_sec = NULL;
11835 static bfd_boolean normal_again = FALSE;
1c8f6a4d
KLC
11836 static bfd_boolean set = FALSE;
11837 static bfd_boolean first = TRUE;
11838 int round_table[] = {
11839 NDS32_RELAX_NORMAL_ROUND,
11840 NDS32_RELAX_JUMP_IFC_ROUND,
11841 NDS32_RELAX_EX9_BUILD_ROUND,
11842 NDS32_RELAX_EX9_REPLACE_ROUND,
11843 };
11844 static int pass = 0;
11845 static int relax_round;
11846
18393a2e
KLC
11847 /* The new round. */
11848 if (init && first_sec == sec)
11849 {
11850 set = TRUE;
11851 normal_again = FALSE;
11852 }
11853
1c8f6a4d
KLC
11854 if (first)
11855 {
11856 /* Run an empty run to get the final section. */
11857 relax_round = NDS32_RELAX_EMPTY_ROUND;
11858
11859 /* It has to enter relax again because we can
11860 not make sure what the final turn is. */
11861 *again = TRUE;
18393a2e 11862
1c8f6a4d 11863 first = FALSE;
18393a2e 11864 first_sec = sec;
1c8f6a4d
KLC
11865 }
11866
18393a2e 11867 if (!set)
1c8f6a4d 11868 {
18393a2e 11869 /* Not reenter yet. */
1c8f6a4d
KLC
11870 final_sec = sec;
11871 return relax_round;
11872 }
11873
1c8f6a4d
KLC
11874 relax_round = round_table[pass];
11875
18393a2e
KLC
11876 if (!init && relax_round == NDS32_RELAX_NORMAL_ROUND && *again)
11877 normal_again = TRUE;
11878
1c8f6a4d
KLC
11879 if (!init && final_sec == sec)
11880 {
11881 switch (relax_round)
11882 {
11883 case NDS32_RELAX_NORMAL_ROUND:
18393a2e 11884 if (!normal_again)
1c8f6a4d
KLC
11885 {
11886 /* Normal relaxation done. */
11887 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11888 {
11889 pass++;
11890 *again = TRUE;
11891 }
11892 else if (table->target_optimize & NDS32_RELAX_EX9_ON)
11893 {
11894 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11895 *again = TRUE;
11896 }
11897 else if (table->ex9_import_file)
11898 {
11899 /* Import ex9 table. */
11900 if (table->update_ex9_table)
11901 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11902 else
11903 pass += 3; /* NDS32_RELAX_EX9_REPLACE_ROUND */
11904 nds32_elf_ex9_import_table (link_info);
11905 *again = TRUE;
11906 }
11907 }
11908 break;
11909 case NDS32_RELAX_JUMP_IFC_ROUND:
11910 if (!nds32_elf_ifc_finish (link_info))
4eca0228 11911 _bfd_error_handler (_("error: Jump IFC Fail."));
1c8f6a4d
KLC
11912 if (table->target_optimize & NDS32_RELAX_EX9_ON)
11913 {
11914 pass++;
11915 *again = TRUE;
11916 }
11917 break;
11918 case NDS32_RELAX_EX9_BUILD_ROUND:
11919 nds32_elf_ex9_finish (link_info);
11920 pass++;
11921 *again = TRUE;
11922 break;
11923 case NDS32_RELAX_EX9_REPLACE_ROUND:
11924 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11925 {
11926 /* Do jump IFC optimization again. */
11927 if (!nds32_elf_ifc_finish (link_info))
4eca0228 11928 _bfd_error_handler (_("error: Jump IFC Fail."));
1c8f6a4d
KLC
11929 }
11930 break;
11931 default:
11932 break;
11933 }
11934 }
11935
11936 return relax_round;
11937}
11938
11939static bfd_boolean
11940nds32_elf_relax_section (bfd *abfd, asection *sec,
11941 struct bfd_link_info *link_info, bfd_boolean *again)
11942{
11943 nds32_elf_blank_t *relax_blank_list = NULL;
11944 Elf_Internal_Shdr *symtab_hdr;
11945 Elf_Internal_Rela *internal_relocs;
11946 Elf_Internal_Rela *irel;
11947 Elf_Internal_Rela *irelend;
11948 Elf_Internal_Sym *isymbuf = NULL;
11949 bfd_byte *contents = NULL;
11950 bfd_boolean result = TRUE;
11951 int optimize = 0;
11952 int opt_size = 0;
11953 uint32_t insn;
11954 uint16_t insn16;
11955
11956 /* Target dependnet option. */
11957 struct elf_nds32_link_hash_table *table;
11958 int load_store_relax;
11959 int relax_round;
11960
11961 relax_blank_list = NULL;
11962
11963 *again = FALSE;
11964
11965 /* Nothing to do for
11966 * relocatable link or
11967 * non-relocatable section or
11968 * non-code section or
11969 * empty content or
11970 * no reloc entry. */
0e1862bb 11971 if (bfd_link_relocatable (link_info)
1c8f6a4d
KLC
11972 || (sec->flags & SEC_RELOC) == 0
11973 || (sec->flags & SEC_EXCLUDE) == 1
11974 || (sec->flags & SEC_CODE) == 0
11975 || sec->size == 0)
11976 return TRUE;
11977
11978 /* 09.12.11 Workaround. */
11979 /* We have to adjust align for R_NDS32_LABEL if needed.
11980 The adjust approach only can fix 2-byte align once. */
11981 if (sec->alignment_power > 2)
11982 return TRUE;
11983
11984 /* The optimization type to do. */
11985
11986 table = nds32_elf_hash_table (link_info);
11987 relax_round = nds32_elf_pick_relax (TRUE, sec, again, table, link_info);
11988 switch (relax_round)
11989 {
11990 case NDS32_RELAX_JUMP_IFC_ROUND:
11991 /* Here is the entrance of ifc jump relaxation. */
11992 if (!nds32_elf_ifc_calc (link_info, abfd, sec))
11993 return FALSE;
11994 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11995 return TRUE;
11996
11997 case NDS32_RELAX_EX9_BUILD_ROUND:
11998 /* Here is the entrance of ex9 relaxation. There are two pass of
11999 ex9 relaxation. The one is to traverse all instructions and build
12000 the hash table. The other one is to compare instructions and replace
12001 it by ex9.it. */
12002 if (!nds32_elf_ex9_build_hash_table (abfd, sec, link_info))
12003 return FALSE;
12004 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12005 return TRUE;
12006
12007 case NDS32_RELAX_EX9_REPLACE_ROUND:
12008 if (!nds32_elf_ex9_replace_instruction (link_info, abfd, sec))
12009 return FALSE;
12010 return TRUE;
12011
12012 case NDS32_RELAX_EMPTY_ROUND:
12013 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12014 return TRUE;
12015
12016 case NDS32_RELAX_NORMAL_ROUND:
12017 default:
12018 if (sec->reloc_count == 0)
12019 return TRUE;
12020 break;
12021 }
12022
12023 /* The begining of general relaxation. */
12024
12025 if (is_SDA_BASE_set == 0)
12026 {
12027 bfd_vma gp;
12028 is_SDA_BASE_set = 1;
12029 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
12030 &gp, FALSE);
12031 relax_range_measurement (abfd);
12032 }
12033
12034 if (is_ITB_BASE_set == 0)
12035 {
12036 /* Set the _ITB_BASE_. */
12037 if (!nds32_elf_ex9_itb_base (link_info))
12038 {
4eca0228 12039 _bfd_error_handler (_("%B: error: Cannot set _ITB_BASE_"), abfd);
1c8f6a4d
KLC
12040 bfd_set_error (bfd_error_bad_value);
12041 }
12042 }
12043
12044 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12045 /* Relocations MUST be kept in memory, because relaxation adjust them. */
12046 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
12047 TRUE /* keep_memory */);
12048 if (internal_relocs == NULL)
12049 goto error_return;
12050
12051 irelend = internal_relocs + sec->reloc_count;
12052 irel = find_relocs_at_address (internal_relocs, internal_relocs,
12053 irelend, R_NDS32_RELAX_ENTRY);
12054
12055 if (irel == irelend)
12056 return TRUE;
12057
12058 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
12059 {
12060 if (irel->r_addend & R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG)
18393a2e
KLC
12061 {
12062 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12063 return TRUE;
12064 }
1c8f6a4d
KLC
12065
12066 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FLAG)
12067 optimize = 1;
12068
12069 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FOR_SPACE_FLAG)
12070 opt_size = 1;
12071 }
12072
12073 load_store_relax = table->load_store_relax;
12074
12075 /* Get symbol table and section content. */
0c4bd9d9 12076 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
1c8f6a4d
KLC
12077 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12078 goto error_return;
12079
12080 /* Do relax loop only when finalize is not done.
12081 Take care of relaxable relocs except INSN16. */
12082 for (irel = internal_relocs; irel < irelend; irel++)
12083 {
12084 int seq_len; /* Original length of instruction sequence. */
12085 int insn_len = 0; /* Final length of instruction sequence. */
12086 bfd_boolean removed;
12087
12088 insn = 0;
12089 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
12090 && (irel->r_addend & 0x1f) >= 2)
12091 optimize = 1;
12092
12093 /* Relocation Types
12094 R_NDS32_LONGCALL1 53
12095 R_NDS32_LONGCALL2 54
12096 R_NDS32_LONGCALL3 55
12097 R_NDS32_LONGJUMP1 56
12098 R_NDS32_LONGJUMP2 57
12099 R_NDS32_LONGJUMP3 58
12100 R_NDS32_LOADSTORE 59 */
12101 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL1
12102 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LOADSTORE)
12103 seq_len = GET_SEQ_LEN (irel->r_addend);
12104
12105 /* Relocation Types
12106 R_NDS32_LONGCALL4 107
12107 R_NDS32_LONGCALL5 108
12108 R_NDS32_LONGCALL6 109
12109 R_NDS32_LONGJUMP4 110
12110 R_NDS32_LONGJUMP5 111
12111 R_NDS32_LONGJUMP6 112
12112 R_NDS32_LONGJUMP7 113 */
12113 else if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL4
12114 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LONGJUMP7)
12115 seq_len = 4;
12116
12117 /* Relocation Types
12118 R_NDS32_LO12S0_RELA 30
12119 R_NDS32_LO12S1_RELA 29
12120 R_NDS32_LO12S2_RELA 28
12121 R_NDS32_LO12S2_SP_RELA 71
12122 R_NDS32_LO12S2_DP_RELA 70
12123 R_NDS32_GOT_LO12 46
12124 R_NDS32_GOTOFF_LO12 50
12125 R_NDS32_PLTREL_LO12 65
12126 R_NDS32_PLT_GOTREL_LO12 67
12127 R_NDS32_17IFC_PCREL_RELA 96
12128 R_NDS32_GOT_SUFF 193
12129 R_NDS32_GOTOFF_SUFF 194
12130 R_NDS32_PLT_GOT_SUFF 195
12131 R_NDS32_MULCALL_SUFF 196
12132 R_NDS32_PTR 197 */
12133 else if ((ELF32_R_TYPE (irel->r_info) <= R_NDS32_LO12S0_RELA
12134 && ELF32_R_TYPE (irel->r_info) >= R_NDS32_LO12S2_RELA)
12135 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_SP_RELA
12136 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_DP_RELA
12137 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12
12138 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12
12139 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12
12140 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLTREL_LO12
12141 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12
12142 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_GOT_SUFF
12143 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_PTR)
12144 || ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12145 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LO12
12146 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_ADD
12147 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LS)
12148 seq_len = 0;
12149 else
12150 continue;
12151
12152 insn_len = seq_len;
12153 removed = FALSE;
12154
12155 switch (ELF32_R_TYPE (irel->r_info))
12156 {
12157 case R_NDS32_LONGCALL1:
12158 removed = nds32_elf_relax_longcall1 (abfd, sec, irel, internal_relocs,
12159 &insn_len, contents, isymbuf,
12160 symtab_hdr);
12161 break;
12162 case R_NDS32_LONGCALL2:
12163 removed = nds32_elf_relax_longcall2 (abfd, sec, irel, internal_relocs,
12164 &insn_len, contents, isymbuf,
12165 symtab_hdr);
12166 break;
12167 case R_NDS32_LONGCALL3:
12168 removed = nds32_elf_relax_longcall3 (abfd, sec, irel, internal_relocs,
12169 &insn_len, contents, isymbuf,
12170 symtab_hdr);
12171 break;
12172 case R_NDS32_LONGJUMP1:
12173 removed = nds32_elf_relax_longjump1 (abfd, sec, irel, internal_relocs,
12174 &insn_len, contents, isymbuf,
12175 symtab_hdr);
12176 break;
12177 case R_NDS32_LONGJUMP2:
12178 removed = nds32_elf_relax_longjump2 (abfd, sec, irel, internal_relocs,
12179 &insn_len, contents, isymbuf,
12180 symtab_hdr);
12181 break;
12182 case R_NDS32_LONGJUMP3:
12183 removed = nds32_elf_relax_longjump3 (abfd, sec, irel, internal_relocs,
12184 &insn_len, contents, isymbuf,
12185 symtab_hdr);
12186 break;
12187 case R_NDS32_LONGCALL4:
12188 removed = nds32_elf_relax_longcall4 (abfd, sec, irel, internal_relocs,
12189 &insn_len, contents, isymbuf,
12190 symtab_hdr);
12191 break;
12192 case R_NDS32_LONGCALL5:
12193 removed = nds32_elf_relax_longcall5 (abfd, sec, irel, internal_relocs,
12194 &insn_len, contents, isymbuf,
12195 symtab_hdr);
12196 break;
12197 case R_NDS32_LONGCALL6:
12198 removed = nds32_elf_relax_longcall6 (abfd, sec, irel, internal_relocs,
12199 &insn_len, contents, isymbuf,
12200 symtab_hdr);
12201 break;
12202 case R_NDS32_LONGJUMP4:
12203 removed = nds32_elf_relax_longjump4 (abfd, sec, irel, internal_relocs,
12204 &insn_len, contents, isymbuf,
12205 symtab_hdr);
12206 break;
12207 case R_NDS32_LONGJUMP5:
12208 removed = nds32_elf_relax_longjump5 (abfd, sec, irel, internal_relocs,
12209 &insn_len, &seq_len, contents,
12210 isymbuf, symtab_hdr);
12211 break;
12212 case R_NDS32_LONGJUMP6:
12213 removed = nds32_elf_relax_longjump6 (abfd, sec, irel, internal_relocs,
12214 &insn_len, &seq_len, contents,
12215 isymbuf, symtab_hdr);
12216 break;
12217 case R_NDS32_LONGJUMP7:
12218 removed = nds32_elf_relax_longjump7 (abfd, sec, irel, internal_relocs,
12219 &insn_len, &seq_len, contents,
12220 isymbuf, symtab_hdr);
12221 break;
12222 case R_NDS32_LOADSTORE:
12223 removed = nds32_elf_relax_loadstore (link_info, abfd, sec, irel,
12224 internal_relocs, &insn_len,
12225 contents, isymbuf, symtab_hdr,
12226 load_store_relax);
12227 break;
12228 case R_NDS32_LO12S0_RELA:
12229 case R_NDS32_LO12S1_RELA:
12230 case R_NDS32_LO12S2_DP_RELA:
12231 case R_NDS32_LO12S2_SP_RELA:
12232 case R_NDS32_LO12S2_RELA:
12233 /* Relax for low part. */
12234 nds32_elf_relax_lo12 (link_info, abfd, sec, irel, internal_relocs,
12235 contents, isymbuf, symtab_hdr);
12236
12237 /* It is impossible to delete blank, so just continue. */
12238 continue;
12239 case R_NDS32_GOT_LO12:
12240 case R_NDS32_GOTOFF_LO12:
12241 case R_NDS32_PLTREL_LO12:
12242 case R_NDS32_PLT_GOTREL_LO12:
12243 case R_NDS32_GOTPC_LO12:
12244 /* Relax for PIC gp-relative low part. */
12245 nds32_elf_relax_piclo12 (link_info, abfd, sec, irel, contents,
12246 isymbuf, symtab_hdr);
35c08157 12247
1c8f6a4d
KLC
12248 /* It is impossible to delete blank, so just continue. */
12249 continue;
12250 case R_NDS32_TLS_LE_LO12:
12251 /* Relax for LE TLS low part. */
12252 nds32_elf_relax_letlslo12 (link_info, abfd, irel, contents,
12253 isymbuf, symtab_hdr);
35c08157 12254
1c8f6a4d
KLC
12255 /* It is impossible to delete blank, so just continue. */
12256 continue;
12257 case R_NDS32_TLS_LE_ADD:
12258 nds32_elf_relax_letlsadd (link_info, abfd, sec, irel, internal_relocs,
12259 contents, isymbuf, symtab_hdr, again);
12260 /* It is impossible to delete blank, so just continue. */
12261 continue;
12262 case R_NDS32_TLS_LE_LS:
12263 nds32_elf_relax_letlsls (link_info, abfd, sec, irel, internal_relocs,
12264 contents, isymbuf, symtab_hdr, again);
12265 continue;
12266 case R_NDS32_PTR:
12267 removed = nds32_elf_relax_ptr (abfd, sec, irel, internal_relocs,
12268 &insn_len, &seq_len, contents);
12269 break;
12270 case R_NDS32_PLT_GOT_SUFF:
12271 nds32_elf_relax_pltgot_suff (link_info, abfd, sec, irel,
12272 internal_relocs, contents,
12273 isymbuf, symtab_hdr, again);
12274 /* It is impossible to delete blank, so just continue. */
12275 continue;
12276 case R_NDS32_GOT_SUFF:
12277 nds32_elf_relax_got_suff (link_info, abfd, sec, irel,
12278 internal_relocs, contents,
12279 symtab_hdr, again);
12280 /* It is impossible to delete blank, so just continue. */
12281 continue;
12282 case R_NDS32_GOTOFF_SUFF:
12283 nds32_elf_relax_gotoff_suff (link_info, abfd, sec, irel,
12284 internal_relocs, contents,
12285 isymbuf, symtab_hdr, again);
12286 /* It is impossible to delete blank, so just continue. */
12287 continue;
12288 default:
12289 continue;
12290
12291 }
12292 if (removed && seq_len - insn_len > 0)
12293 {
12294 if (!insert_nds32_elf_blank
12295 (&relax_blank_list, irel->r_offset + insn_len,
12296 seq_len - insn_len))
12297 goto error_return;
12298 *again = TRUE;
35c08157 12299 }
1c8f6a4d
KLC
12300 }
12301
12302 calc_nds32_blank_total (relax_blank_list);
12303
12304 if (table->relax_fp_as_gp)
12305 {
12306 if (!nds32_relax_fp_as_gp (link_info, abfd, sec, internal_relocs,
12307 irelend, isymbuf))
12308 goto error_return;
35c08157 12309
1c8f6a4d 12310 if (*again == FALSE)
35c08157 12311 {
1c8f6a4d
KLC
12312 if (!nds32_fag_remove_unused_fpbase (abfd, sec, internal_relocs,
12313 irelend))
12314 goto error_return;
35c08157
KLC
12315 }
12316 }
1c8f6a4d
KLC
12317
12318 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12319
12320 if (*again == FALSE)
12321 {
12322 if (!nds32_relax_adjust_label (abfd, sec, internal_relocs, contents,
12323 &relax_blank_list, optimize, opt_size))
12324 goto error_return;
12325 }
12326
12327 /* It doesn't matter optimize_for_space_no_align anymore.
35c08157
KLC
12328 If object file is assembled with flag '-Os',
12329 the we don't adjust jump-destination on 4-byte boundary. */
12330
12331 if (relax_blank_list)
12332 {
12333 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12334 relax_blank_list = NULL;
12335 }
12336
12337 if (*again == FALSE)
12338 {
12339 /* Closing the section, so we don't relax it anymore. */
12340 bfd_vma sec_size_align;
12341 Elf_Internal_Rela *tmp_rel;
12342
12343 /* Pad to alignment boundary. Only handle current section alignment. */
609332f1
NC
12344 sec_size_align = (sec->size + (~((-1U) << sec->alignment_power)))
12345 & ((-1U) << sec->alignment_power);
35c08157
KLC
12346 if ((sec_size_align - sec->size) & 0x2)
12347 {
12348 insn16 = NDS32_NOP16;
12349 bfd_putb16 (insn16, contents + sec->size);
12350 sec->size += 2;
12351 }
12352
12353 while (sec_size_align != sec->size)
12354 {
12355 insn = NDS32_NOP32;
12356 bfd_putb32 (insn, contents + sec->size);
12357 sec->size += 4;
12358 }
12359
1c8f6a4d
KLC
12360 tmp_rel = find_relocs_at_address (internal_relocs, internal_relocs,
12361 irelend, R_NDS32_RELAX_ENTRY);
35c08157
KLC
12362 if (tmp_rel != irelend)
12363 tmp_rel->r_addend |= R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG;
12364
12365 clean_nds32_elf_blank ();
12366 }
12367
12368finish:
12369 if (internal_relocs != NULL
12370 && elf_section_data (sec)->relocs != internal_relocs)
12371 free (internal_relocs);
12372
12373 if (contents != NULL
12374 && elf_section_data (sec)->this_hdr.contents != contents)
12375 free (contents);
12376
12377 if (isymbuf != NULL && symtab_hdr->contents != (bfd_byte *) isymbuf)
12378 free (isymbuf);
12379
12380 return result;
12381
12382error_return:
12383 result = FALSE;
12384 goto finish;
12385}
12386
12387static struct bfd_elf_special_section const nds32_elf_special_sections[] =
12388{
12389 {".sdata", 6, -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE},
12390 {".sbss", 5, -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE},
12391 {NULL, 0, 0, 0, 0}
12392};
12393
12394static bfd_boolean
12395nds32_elf_output_arch_syms (bfd *output_bfd ATTRIBUTE_UNUSED,
12396 struct bfd_link_info *info,
12397 void *finfo ATTRIBUTE_UNUSED,
12398 bfd_boolean (*func) (void *, const char *,
12399 Elf_Internal_Sym *,
12400 asection *,
12401 struct elf_link_hash_entry *)
12402 ATTRIBUTE_UNUSED)
12403{
12404 FILE *sym_ld_script = NULL;
12405 struct elf_nds32_link_hash_table *table;
12406
12407 table = nds32_elf_hash_table (info);
12408 sym_ld_script = table->sym_ld_script;
12409
12410 if (check_start_export_sym)
12411 fprintf (sym_ld_script, "}\n");
12412
12413 return TRUE;
12414}
12415
12416static enum elf_reloc_type_class
12417nds32_elf_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
12418 const asection *rel_sec ATTRIBUTE_UNUSED,
12419 const Elf_Internal_Rela *rela)
12420{
12421 switch ((int) ELF32_R_TYPE (rela->r_info))
12422 {
12423 case R_NDS32_RELATIVE:
12424 return reloc_class_relative;
12425 case R_NDS32_JMP_SLOT:
12426 return reloc_class_plt;
12427 case R_NDS32_COPY:
12428 return reloc_class_copy;
12429 default:
12430 return reloc_class_normal;
12431 }
12432}
12433
12434/* Put target dependent option into info hash table. */
12435void
12436bfd_elf32_nds32_set_target_option (struct bfd_link_info *link_info,
12437 int relax_fp_as_gp,
12438 int eliminate_gc_relocs,
12439 FILE * sym_ld_script, int load_store_relax,
12440 int target_optimize, int relax_status,
12441 int relax_round, FILE * ex9_export_file,
12442 FILE * ex9_import_file,
12443 int update_ex9_table, int ex9_limit,
12444 bfd_boolean ex9_loop_aware,
12445 bfd_boolean ifc_loop_aware)
12446{
12447 struct elf_nds32_link_hash_table *table;
12448
12449 table = nds32_elf_hash_table (link_info);
12450 if (table == NULL)
12451 return;
12452
12453 table->relax_fp_as_gp = relax_fp_as_gp;
12454 table->eliminate_gc_relocs = eliminate_gc_relocs;
12455 table->sym_ld_script = sym_ld_script;
12456 table ->load_store_relax = load_store_relax;
12457 table->target_optimize = target_optimize;
12458 table->relax_status = relax_status;
12459 table->relax_round = relax_round;
12460 table->ex9_export_file = ex9_export_file;
12461 table->ex9_import_file = ex9_import_file;
12462 table->update_ex9_table = update_ex9_table;
12463 table->ex9_limit = ex9_limit;
12464 table->ex9_loop_aware = ex9_loop_aware;
12465 table->ifc_loop_aware = ifc_loop_aware;
12466}
12467\f
12468/* These functions and data-structures are used for fp-as-gp
12469 optimization. */
12470
12471#define FAG_THRESHOLD 3 /* At least 3 gp-access. */
1c8f6a4d
KLC
12472/* lwi37.fp covers 508 bytes, but there may be 32-byte padding between
12473 the read-only section and read-write section. */
12474#define FAG_WINDOW (508 - 32)
35c08157
KLC
12475
12476/* An nds32_fag represent a gp-relative access.
12477 We find best fp-base by using a sliding window
12478 to find a base address which can cover most gp-access. */
12479struct nds32_fag
12480{
12481 struct nds32_fag *next; /* NULL-teminated linked list. */
12482 bfd_vma addr; /* The address of this fag. */
12483 Elf_Internal_Rela **relas; /* The relocations associated with this fag.
12484 It is used for applying FP7U2_FLAG. */
12485 int count; /* How many times this address is referred.
12486 There should be exactly `count' relocations
12487 in relas. */
12488 int relas_capcity; /* The buffer size of relas.
12489 We use an array instead of linked-list,
12490 and realloc is used to adjust buffer size. */
12491};
12492
12493static void
12494nds32_fag_init (struct nds32_fag *head)
12495{
12496 memset (head, 0, sizeof (struct nds32_fag));
12497}
12498
12499static void
12500nds32_fag_verify (struct nds32_fag *head)
12501{
12502 struct nds32_fag *iter;
12503 struct nds32_fag *prev;
12504
12505 prev = NULL;
12506 iter = head->next;
12507 while (iter)
12508 {
12509 if (prev && prev->addr >= iter->addr)
12510 puts ("Bug in fp-as-gp insertion.");
12511 prev = iter;
12512 iter = iter->next;
12513 }
12514}
12515
12516/* Insert a fag in ascending order.
12517 If a fag of the same address already exists,
12518 they are chained by relas array. */
12519
12520static void
12521nds32_fag_insert (struct nds32_fag *head, bfd_vma addr,
12522 Elf_Internal_Rela * rel)
12523{
12524 struct nds32_fag *iter;
12525 struct nds32_fag *new_fag;
12526 const int INIT_RELAS_CAP = 4;
12527
12528 for (iter = head;
12529 iter->next && iter->next->addr <= addr;
12530 iter = iter->next)
12531 /* Find somewhere to insert. */ ;
12532
12533 /* `iter' will be equal to `head' if the list is empty. */
12534 if (iter != head && iter->addr == addr)
12535 {
12536 /* The address exists in the list.
12537 Insert `rel' into relocation list, relas. */
12538
12539 /* Check whether relas is big enough. */
12540 if (iter->count >= iter->relas_capcity)
12541 {
12542 iter->relas_capcity *= 2;
12543 iter->relas = bfd_realloc
12544 (iter->relas, iter->relas_capcity * sizeof (void *));
12545 }
12546 iter->relas[iter->count++] = rel;
12547 return;
12548 }
12549
12550 /* This is a new address. Create a fag node for it. */
12551 new_fag = bfd_malloc (sizeof (struct nds32_fag));
12552 memset (new_fag, 0, sizeof (*new_fag));
12553 new_fag->addr = addr;
12554 new_fag->count = 1;
12555 new_fag->next = iter->next;
12556 new_fag->relas_capcity = INIT_RELAS_CAP;
12557 new_fag->relas = (Elf_Internal_Rela **)
12558 bfd_malloc (new_fag->relas_capcity * sizeof (void *));
12559 new_fag->relas[0] = rel;
12560 iter->next = new_fag;
12561
12562 nds32_fag_verify (head);
12563}
12564
12565static void
12566nds32_fag_free_list (struct nds32_fag *head)
12567{
12568 struct nds32_fag *iter;
12569
12570 iter = head->next;
12571 while (iter)
12572 {
12573 struct nds32_fag *tmp = iter;
12574 iter = iter->next;
12575 free (tmp->relas);
12576 tmp->relas = NULL;
12577 free (tmp);
12578 }
12579}
12580
35c08157
KLC
12581/* Find the best fp-base address.
12582 The relocation associated with that address is returned,
12583 so we can track the symbol instead of a fixed address.
12584
12585 When relaxation, the address of an datum may change,
12586 because a text section is shrinked, so the data section
1c8f6a4d 12587 moves forward. If the aligments of text and data section
35c08157
KLC
12588 are different, their distance may change too.
12589 Therefore, tracking a fixed address is not appriate. */
12590
12591static int
12592nds32_fag_find_base (struct nds32_fag *head, struct nds32_fag **bestpp)
12593{
12594 struct nds32_fag *base; /* First fag in the window. */
12595 struct nds32_fag *last; /* First fag outside the window. */
12596 int accu = 0; /* Usage accumulation. */
12597 struct nds32_fag *best; /* Best fag. */
12598 int baccu = 0; /* Best accumulation. */
12599
12600 /* Use first fag for initial, and find the last fag in the window.
12601
12602 In each iteration, we could simply subtract previous fag
12603 and accumulate following fags which are inside the window,
12604 untill we each the end. */
12605
1c8f6a4d
KLC
12606 if (head->next == NULL)
12607 {
12608 *bestpp = NULL;
12609 return 0;
12610 }
35c08157
KLC
12611
12612 /* Initialize base. */
12613 base = head->next;
12614 best = base;
12615 for (last = base;
12616 last && last->addr < base->addr + FAG_WINDOW;
12617 last = last->next)
12618 accu += last->count;
12619
12620 baccu = accu;
12621
12622 /* Record the best base in each iteration. */
12623 while (base->next)
1c8f6a4d
KLC
12624 {
12625 accu -= base->count;
12626 base = base->next;
12627 /* Account fags in window. */
12628 for (/* Nothing. */;
12629 last && last->addr < base->addr + FAG_WINDOW;
12630 last = last->next)
12631 accu += last->count;
12632
12633 /* A better fp-base? */
12634 if (accu > baccu)
12635 {
12636 best = base;
12637 baccu = accu;
12638 }
12639 }
35c08157
KLC
12640
12641 if (bestpp)
12642 *bestpp = best;
12643 return baccu;
12644}
12645
12646/* Apply R_NDS32_INSN16_FP7U2_FLAG on gp-relative accesses,
12647 so we can convert it fo fp-relative access later.
12648 `best_fag' is the best fp-base. Only those inside the window
12649 of best_fag is applied the flag. */
12650
12651static bfd_boolean
12652nds32_fag_mark_relax (struct bfd_link_info *link_info,
12653 bfd *abfd, struct nds32_fag *best_fag,
12654 Elf_Internal_Rela *internal_relocs,
12655 Elf_Internal_Rela *irelend)
12656{
12657 struct nds32_fag *ifag;
12658 bfd_vma best_fpbase, gp;
12659 bfd *output_bfd;
12660
12661 output_bfd = abfd->sections->output_section->owner;
12662 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
12663 best_fpbase = best_fag->addr;
12664
1c8f6a4d
KLC
12665 if (best_fpbase > gp + sdata_range[1][1]
12666 || best_fpbase < gp - sdata_range[1][0])
35c08157
KLC
12667 return FALSE;
12668
12669 /* Mark these inside the window R_NDS32_INSN16_FP7U2_FLAG flag,
12670 so we know they can be converted to lwi37.fp. */
12671 for (ifag = best_fag;
12672 ifag && ifag->addr < best_fpbase + FAG_WINDOW; ifag = ifag->next)
12673 {
12674 int i;
12675
12676 for (i = 0; i < ifag->count; i++)
12677 {
12678 Elf_Internal_Rela *insn16_rel;
12679 Elf_Internal_Rela *fag_rel;
12680
12681 fag_rel = ifag->relas[i];
12682
12683 /* Only if this is within the WINDOWS, FP7U2_FLAG
12684 is applied. */
12685
12686 insn16_rel = find_relocs_at_address
12687 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12688
12689 if (insn16_rel != irelend)
12690 insn16_rel->r_addend = R_NDS32_INSN16_FP7U2_FLAG;
12691 }
12692 }
12693 return TRUE;
12694}
12695
1c8f6a4d
KLC
12696/* Reset INSN16 to clean fp as gp. */
12697
12698static void
12699nds32_fag_unmark_relax (struct nds32_fag *fag,
12700 Elf_Internal_Rela *internal_relocs,
12701 Elf_Internal_Rela *irelend)
12702{
12703 struct nds32_fag *ifag;
12704 int i;
12705 Elf_Internal_Rela *insn16_rel;
12706 Elf_Internal_Rela *fag_rel;
12707
12708 for (ifag = fag; ifag; ifag = ifag->next)
12709 {
12710 for (i = 0; i < ifag->count; i++)
12711 {
12712 fag_rel = ifag->relas[i];
12713
12714 /* Restore the INSN16 relocation. */
12715 insn16_rel = find_relocs_at_address
12716 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12717
12718 if (insn16_rel != irelend)
12719 insn16_rel->r_addend &= ~R_NDS32_INSN16_FP7U2_FLAG;
12720 }
12721 }
12722}
12723
35c08157
KLC
12724/* This is the main function of fp-as-gp optimization.
12725 It should be called by relax_section. */
12726
12727static bfd_boolean
12728nds32_relax_fp_as_gp (struct bfd_link_info *link_info,
12729 bfd *abfd, asection *sec,
12730 Elf_Internal_Rela *internal_relocs,
12731 Elf_Internal_Rela *irelend,
12732 Elf_Internal_Sym *isymbuf)
12733{
12734 Elf_Internal_Rela *begin_rel = NULL;
12735 Elf_Internal_Rela *irel;
12736 struct nds32_fag fag_head;
12737 Elf_Internal_Shdr *symtab_hdr;
12738 bfd_byte *contents;
1c8f6a4d 12739 bfd_boolean ifc_inside = FALSE;
35c08157
KLC
12740
12741 /* FIXME: Can we bfd_elf_link_read_relocs for the relocs? */
12742
12743 /* Per-function fp-base selection.
12744 1. Create a list for all the gp-relative access.
12745 2. Base on those gp-relative address,
12746 find a fp-base which can cover most access.
12747 3. Use the fp-base for fp-as-gp relaxation.
12748
12749 NOTE: If fp-as-gp is not worth to do, (e.g., less than 3 times),
12750 we should
12751 1. delete the `la $fp, _FP_BASE_' instruction and
12752 2. not convert lwi.gp to lwi37.fp.
12753
12754 To delete the _FP_BASE_ instruction, we simply apply
12755 R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG flag in the r_addend to disable it.
12756
12757 To suppress the conversion, we simply NOT to apply
12758 R_NDS32_INSN16_FP7U2_FLAG flag. */
12759
12760 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12761
0c4bd9d9 12762 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
35c08157
KLC
12763 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12764 return FALSE;
12765
12766 /* Check whether it is worth for fp-as-gp optimization,
12767 i.e., at least 3 gp-load.
12768
12769 Set R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG if we should NOT
12770 apply this optimization. */
12771
12772 for (irel = internal_relocs; irel < irelend; irel++)
12773 {
12774 /* We recognize R_NDS32_RELAX_REGION_BEGIN/_END for the region.
12775 One we enter the begin of the region, we track all the LW/ST
12776 instructions, so when we leave the region, we try to find
12777 the best fp-base address for those LW/ST instructions. */
12778
12779 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12780 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12781 {
12782 /* Begin of the region. */
12783 if (begin_rel)
4eca0228 12784 _bfd_error_handler (_("%B: Nested OMIT_FP in %A."), abfd, sec);
35c08157
KLC
12785
12786 begin_rel = irel;
12787 nds32_fag_init (&fag_head);
1c8f6a4d 12788 ifc_inside = FALSE;
35c08157
KLC
12789 }
12790 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12791 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12792 {
12793 int accu;
1c8f6a4d 12794 struct nds32_fag *best_fag, *tmp_fag;
35c08157
KLC
12795 int dist;
12796
12797 /* End of the region.
12798 Check whether it is worth to do fp-as-gp. */
12799
12800 if (begin_rel == NULL)
12801 {
4eca0228 12802 _bfd_error_handler (_("%B: Unmatched OMIT_FP in %A."), abfd, sec);
35c08157
KLC
12803 continue;
12804 }
12805
12806 accu = nds32_fag_find_base (&fag_head, &best_fag);
12807
1c8f6a4d
KLC
12808 /* Clean FP7U2_FLAG because they may set ever. */
12809 tmp_fag = fag_head.next;
12810 nds32_fag_unmark_relax (tmp_fag, internal_relocs, irelend);
12811
35c08157
KLC
12812 /* Check if it is worth, and FP_BASE is near enough to SDA_BASE. */
12813 if (accu < FAG_THRESHOLD
12814 || !nds32_fag_mark_relax (link_info, abfd, best_fag,
12815 internal_relocs, irelend))
12816 {
12817 /* Not worth to do fp-as-gp. */
12818 begin_rel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12819 begin_rel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12820 irel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12821 irel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12822 nds32_fag_free_list (&fag_head);
12823 begin_rel = NULL;
12824 continue;
12825 }
12826
12827 /* R_SYM of R_NDS32_RELAX_REGION_BEGIN is not used by assembler,
12828 so we use it to record the distance to the reloction of best
12829 fp-base. */
12830 dist = best_fag->relas[0] - begin_rel;
12831 BFD_ASSERT (dist > 0 && dist < 0xffffff);
12832 /* Use high 16 bits of addend to record the _FP_BASE_ matched
12833 relocation. And get the base value when relocating. */
1c8f6a4d 12834 begin_rel->r_addend &= (0x1 << 16) - 1;
35c08157
KLC
12835 begin_rel->r_addend |= dist << 16;
12836
12837 nds32_fag_free_list (&fag_head);
12838 begin_rel = NULL;
12839 }
12840
1c8f6a4d 12841 if (begin_rel == NULL || ifc_inside)
35c08157
KLC
12842 /* Skip if we are not in the region of fp-as-gp. */
12843 continue;
12844
12845 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S2_RELA
12846 || ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA17S2_RELA)
12847 {
12848 bfd_vma addr;
12849 uint32_t insn;
12850
12851 /* A gp-relative access is found. Insert it to the fag-list. */
12852
12853 /* Rt is necessary an RT3, so it can be converted to lwi37.fp. */
12854 insn = bfd_getb32 (contents + irel->r_offset);
12855 if (!N32_IS_RT3 (insn))
12856 continue;
12857
12858 addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
12859 nds32_fag_insert (&fag_head, addr, irel);
12860 }
12861 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA_FP7U2_RELA)
12862 {
12863 begin_rel = NULL;
12864 }
1c8f6a4d
KLC
12865 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12866 || ELF32_R_TYPE (irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
12867 {
12868 /* Suppress fp as gp when encounter ifc. */
12869 ifc_inside = TRUE;
12870 }
35c08157
KLC
12871 }
12872
12873 return TRUE;
12874}
12875
12876/* Remove unused `la $fp, _FD_BASE_' instruction. */
12877
12878static bfd_boolean
12879nds32_fag_remove_unused_fpbase (bfd *abfd, asection *sec,
12880 Elf_Internal_Rela *internal_relocs,
12881 Elf_Internal_Rela *irelend)
12882{
12883 Elf_Internal_Rela *irel;
12884 Elf_Internal_Shdr *symtab_hdr;
12885 bfd_byte *contents = NULL;
12886 nds32_elf_blank_t *relax_blank_list = NULL;
12887 bfd_boolean result = TRUE;
12888 bfd_boolean unused_region = FALSE;
12889
12890 /*
12891 NOTE: Disable fp-as-gp if we encounter ifcall relocations.
12892 * R_NDS32_17IFC_PCREL_RELA
12893 * R_NDS32_10IFCU_PCREL_RELA
12894
12895 CASE??????????????
12896 */
12897
12898 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
0c4bd9d9 12899 nds32_get_section_contents (abfd, sec, &contents, TRUE);
35c08157
KLC
12900
12901 for (irel = internal_relocs; irel < irelend; irel++)
12902 {
12903 /* To remove unused fp-base, we simply find the REGION_NOT_OMIT_FP
12904 we marked to in previous pass.
12905 DO NOT scan relocations again, since we've alreadly decided it
12906 and set the flag. */
12907 const char *syname;
12908 int syndx;
12909 uint32_t insn;
12910
12911 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12912 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12913 unused_region = TRUE;
12914 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12915 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12916 unused_region = FALSE;
12917
12918 /* We're not in the region. */
12919 if (!unused_region)
12920 continue;
12921
12922 /* _FP_BASE_ must be a GLOBAL symbol. */
12923 syndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
12924 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
12925 continue;
12926
12927 /* The symbol name must be _FP_BASE_. */
12928 syname = elf_sym_hashes (abfd)[syndx]->root.root.string;
12929 if (strcmp (syname, FP_BASE_NAME) != 0)
12930 continue;
12931
12932 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA19S0_RELA)
12933 {
12934 /* addi.gp $fp, -256 */
12935 insn = bfd_getb32 (contents + irel->r_offset);
12936 if (insn != INSN_ADDIGP_TO_FP)
12937 continue;
12938 }
12939 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S0_RELA)
12940 {
12941 /* addi $fp, $gp, -256 */
12942 insn = bfd_getb32 (contents + irel->r_offset);
12943 if (insn != INSN_ADDI_GP_TO_FP)
12944 continue;
12945 }
12946 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_20_RELA)
12947 {
12948 /* movi $fp, FP_BASE */
12949 insn = bfd_getb32 (contents + irel->r_offset);
12950 if (insn != INSN_MOVI_TO_FP)
12951 continue;
12952 }
12953 else
12954 continue;
12955
12956 /* We got here because a FP_BASE instruction is found. */
12957 if (!insert_nds32_elf_blank_recalc_total
12958 (&relax_blank_list, irel->r_offset, 4))
12959 goto error_return;
12960 }
12961
12962finish:
12963 if (relax_blank_list)
12964 {
12965 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12966 relax_blank_list = NULL;
12967 }
12968 return result;
12969
12970error_return:
12971 result = FALSE;
12972 goto finish;
12973}
1c8f6a4d
KLC
12974
12975/* This is a version of bfd_generic_get_relocated_section_contents.
12976 We need this variety because relaxation will modify the dwarf
12977 infomation. When there is undefined symbol reference error mesage,
12978 linker need to dump line number where the symbol be used. However
12979 the address is be relaxed, it can not get the original dwarf contents.
12980 The variety only modify function call for reading in the section. */
12981
12982static bfd_byte *
12983nds32_elf_get_relocated_section_contents (bfd *abfd,
12984 struct bfd_link_info *link_info,
12985 struct bfd_link_order *link_order,
12986 bfd_byte *data,
12987 bfd_boolean relocatable,
12988 asymbol **symbols)
12989{
12990 bfd *input_bfd = link_order->u.indirect.section->owner;
12991 asection *input_section = link_order->u.indirect.section;
12992 long reloc_size;
12993 arelent **reloc_vector;
12994 long reloc_count;
12995
12996 reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
12997 if (reloc_size < 0)
12998 return NULL;
12999
13000 /* Read in the section. */
0c4bd9d9 13001 if (!nds32_get_section_contents (input_bfd, input_section, &data, FALSE))
1c8f6a4d
KLC
13002 return NULL;
13003
13004 if (reloc_size == 0)
13005 return data;
13006
13007 reloc_vector = (arelent **) bfd_malloc (reloc_size);
13008 if (reloc_vector == NULL)
13009 return NULL;
13010
13011 reloc_count = bfd_canonicalize_reloc (input_bfd, input_section,
13012 reloc_vector, symbols);
13013 if (reloc_count < 0)
13014 goto error_return;
13015
13016 if (reloc_count > 0)
13017 {
13018 arelent **parent;
13019 for (parent = reloc_vector; *parent != NULL; parent++)
13020 {
13021 char *error_message = NULL;
13022 asymbol *symbol;
13023 bfd_reloc_status_type r;
13024
13025 symbol = *(*parent)->sym_ptr_ptr;
13026 if (symbol->section && discarded_section (symbol->section))
13027 {
13028 bfd_byte *p;
13029 static reloc_howto_type none_howto
13030 = HOWTO (0, 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL,
13031 "unused", FALSE, 0, 0, FALSE);
13032
13033 p = data + (*parent)->address * bfd_octets_per_byte (input_bfd);
13034 _bfd_clear_contents ((*parent)->howto, input_bfd, input_section,
13035 p);
13036 (*parent)->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
13037 (*parent)->addend = 0;
13038 (*parent)->howto = &none_howto;
13039 r = bfd_reloc_ok;
13040 }
13041 else
13042 r = bfd_perform_relocation (input_bfd, *parent, data,
13043 input_section,
13044 relocatable ? abfd : NULL,
13045 &error_message);
13046
13047 if (relocatable)
13048 {
13049 asection *os = input_section->output_section;
13050
13051 /* A partial link, so keep the relocs. */
13052 os->orelocation[os->reloc_count] = *parent;
13053 os->reloc_count++;
13054 }
13055
13056 if (r != bfd_reloc_ok)
13057 {
13058 switch (r)
13059 {
13060 case bfd_reloc_undefined:
1a72702b
AM
13061 (*link_info->callbacks->undefined_symbol)
13062 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
13063 input_bfd, input_section, (*parent)->address, TRUE);
1c8f6a4d
KLC
13064 break;
13065 case bfd_reloc_dangerous:
13066 BFD_ASSERT (error_message != NULL);
1a72702b
AM
13067 (*link_info->callbacks->reloc_dangerous)
13068 (link_info, error_message,
13069 input_bfd, input_section, (*parent)->address);
1c8f6a4d
KLC
13070 break;
13071 case bfd_reloc_overflow:
1a72702b
AM
13072 (*link_info->callbacks->reloc_overflow)
13073 (link_info, NULL,
13074 bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
13075 (*parent)->howto->name, (*parent)->addend,
13076 input_bfd, input_section, (*parent)->address);
1c8f6a4d
KLC
13077 break;
13078 case bfd_reloc_outofrange:
13079 /* PR ld/13730:
13080 This error can result when processing some partially
13081 complete binaries. Do not abort, but issue an error
13082 message instead. */
13083 link_info->callbacks->einfo
13084 (_("%X%P: %B(%A): relocation \"%R\" goes out of range\n"),
13085 abfd, input_section, * parent);
13086 goto error_return;
13087
13088 default:
13089 abort ();
13090 break;
13091 }
13092 }
13093 }
13094 }
13095
13096 free (reloc_vector);
13097 return data;
13098
13099error_return:
13100 free (reloc_vector);
13101 return NULL;
13102}
35c08157
KLC
13103\f
13104/* Link-time IFC relaxation.
13105 In this optimization, we chains jump instructions
13106 of the same destination with ifcall. */
13107
13108
13109/* List to save jal and j relocation. */
13110struct elf_nds32_ifc_symbol_entry
13111{
13112 asection *sec;
13113 struct elf_link_hash_entry *h;
13114 struct elf_nds32_ifc_irel_list *irel_head;
13115 unsigned long insn;
13116 int times;
13117 int enable; /* Apply ifc. */
13118 int ex9_enable; /* Apply ifc after ex9. */
13119 struct elf_nds32_ifc_symbol_entry *next;
13120};
13121
13122struct elf_nds32_ifc_irel_list
13123{
13124 Elf_Internal_Rela *irel;
13125 asection *sec;
13126 bfd_vma addr;
13127 /* If this is set, then it is the last instruction for
13128 ifc-chain, so it must be keep for the actual branching. */
13129 int keep;
13130 struct elf_nds32_ifc_irel_list *next;
13131};
13132
13133static struct elf_nds32_ifc_symbol_entry *ifc_symbol_head = NULL;
13134
13135/* Insert symbol of jal and j for ifc. */
13136
13137static void
13138nds32_elf_ifc_insert_symbol (asection *sec,
13139 struct elf_link_hash_entry *h,
13140 Elf_Internal_Rela *irel,
13141 unsigned long insn)
13142{
13143 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13144
13145 /* Check there is target of existing entry the same as the new one. */
13146 while (ptr != NULL)
13147 {
13148 if (((h == NULL && ptr->sec == sec
13149 && ELF32_R_SYM (ptr->irel_head->irel->r_info) == ELF32_R_SYM (irel->r_info)
13150 && ptr->irel_head->irel->r_addend == irel->r_addend)
13151 || h != NULL)
13152 && ptr->h == h
13153 && ptr->insn == insn)
13154 {
13155 /* The same target exist, so insert into list. */
13156 struct elf_nds32_ifc_irel_list *irel_list = ptr->irel_head;
13157
13158 while (irel_list->next != NULL)
13159 irel_list = irel_list->next;
13160 irel_list->next = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
13161 irel_list = irel_list->next;
13162 irel_list->irel = irel;
13163 irel_list->keep = 1;
13164
13165 if (h == NULL)
13166 irel_list->sec = NULL;
13167 else
13168 irel_list->sec = sec;
13169 irel_list->next = NULL;
13170 return;
13171 }
13172 if (ptr->next == NULL)
13173 break;
13174 ptr = ptr->next;
13175 }
13176
13177 /* There is no same target entry, so build a new one. */
13178 if (ifc_symbol_head == NULL)
13179 {
13180 ifc_symbol_head = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
13181 ptr = ifc_symbol_head;
13182 }
13183 else
13184 {
13185 ptr->next = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
13186 ptr = ptr->next;
13187 }
13188
13189 ptr->h = h;
13190 ptr->irel_head = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
13191 ptr->irel_head->irel = irel;
13192 ptr->insn = insn;
13193 ptr->irel_head->keep = 1;
13194
13195 if (h == NULL)
13196 {
13197 /* Local symbols. */
13198 ptr->sec = sec;
13199 ptr->irel_head->sec = NULL;
13200 }
13201 else
13202 {
13203 /* Global symbol. */
13204 ptr->sec = NULL;
13205 ptr->irel_head->sec = sec;
13206 }
13207
13208 ptr->irel_head->next = NULL;
13209 ptr->times = 0;
13210 ptr->enable = 0;
13211 ptr->ex9_enable = 0;
13212 ptr->next = NULL;
13213}
13214
13215/* Gather all jal and j instructions. */
13216
13217static bfd_boolean
13218nds32_elf_ifc_calc (struct bfd_link_info *info,
13219 bfd *abfd, asection *sec)
13220{
13221 Elf_Internal_Rela *internal_relocs;
13222 Elf_Internal_Rela *irelend;
13223 Elf_Internal_Rela *irel;
13224 Elf_Internal_Shdr *symtab_hdr;
13225 bfd_byte *contents = NULL;
1c8f6a4d 13226 uint32_t insn, insn_with_reg;
35c08157
KLC
13227 unsigned long r_symndx;
13228 struct elf_link_hash_entry *h;
13229 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
13230 struct elf_nds32_link_hash_table *table;
13231 bfd_boolean ifc_loop_aware;
13232
13233 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
13234 TRUE /* keep_memory */);
13235 irelend = internal_relocs + sec->reloc_count;
13236 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
13237
13238 /* Check if the object enable ifc. */
13239 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
13240 R_NDS32_RELAX_ENTRY);
13241
13242 if (irel == NULL
13243 || irel >= irelend
13244 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
13245 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
13246 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_IFC_FLAG)))
13247 return TRUE;
13248
0c4bd9d9 13249 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
35c08157
KLC
13250 return FALSE;
13251
13252 table = nds32_elf_hash_table (info);
13253 ifc_loop_aware = table->ifc_loop_aware;
13254 while (irel != NULL && irel < irelend)
13255 {
13256 /* Traverse all relocation and gather all of them to build the list. */
13257
13258 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN)
13259 {
13260 if (ifc_loop_aware == 1
13261 && (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0)
13262 {
13263 /* Check the region if loop or not. If it is true and
13264 ifc-loop-aware is true, ignore the region till region end. */
13265 while (irel != NULL
13266 && irel < irelend
13267 && (ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
13268 || (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0))
13269 irel++;
13270 }
13271 }
13272
13273 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
13274 {
13275 insn = bfd_getb32 (contents + irel->r_offset);
13276 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
13277 r_symndx = ELF32_R_SYM (irel->r_info);
13278 if (r_symndx < symtab_hdr->sh_info)
13279 {
13280 /* Local symbol. */
13281 nds32_elf_ifc_insert_symbol (sec, NULL, irel, insn_with_reg);
13282 }
13283 else
13284 {
13285 /* External symbol. */
13286 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13287 nds32_elf_ifc_insert_symbol (sec, h, irel, insn_with_reg);
13288 }
13289 }
13290 irel++;
13291 }
13292 return TRUE;
13293}
13294
13295/* Determine whether j and jal should be substituted. */
13296
13297static void
13298nds32_elf_ifc_filter (struct bfd_link_info *info)
13299{
13300 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13301 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13302 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13303 struct elf_nds32_link_hash_table *table;
13304 int target_optimize;
13305 bfd_vma address;
13306
13307 table = nds32_elf_hash_table (info);
13308 target_optimize = table->target_optimize;
13309 while (ptr)
13310 {
13311 irel_ptr = ptr->irel_head;
13312 if (ptr->h == NULL)
13313 {
13314 /* Local symbol. */
13315 irel_keeper = irel_ptr;
13316 while (irel_ptr && irel_ptr->next)
13317 {
13318 /* Check there is jump target can be used. */
13319 if ((irel_ptr->next->irel->r_offset
13320 - irel_keeper->irel->r_offset) > 1022)
13321 irel_keeper = irel_ptr->next;
13322 else
13323 {
13324 ptr->enable = 1;
13325 irel_ptr->keep = 0;
13326 }
13327 irel_ptr = irel_ptr->next;
13328 }
13329 }
13330 else
13331 {
1c8f6a4d
KLC
13332 /* Global symbol. */
13333 /* We have to get the absolute address and decide
13334 whether to keep it or not. */
35c08157
KLC
13335 while (irel_ptr)
13336 {
13337 address = (irel_ptr->irel->r_offset
13338 + irel_ptr->sec->output_section->vma
13339 + irel_ptr->sec->output_offset);
13340 irel_ptr->addr = address;
13341 irel_ptr = irel_ptr->next;
13342 }
13343
13344 irel_ptr = ptr->irel_head;
13345 while (irel_ptr)
13346 {
1c8f6a4d 13347 /* Sort by address. */
35c08157
KLC
13348 struct elf_nds32_ifc_irel_list *irel_dest = irel_ptr;
13349 struct elf_nds32_ifc_irel_list *irel_temp = irel_ptr;
13350 struct elf_nds32_ifc_irel_list *irel_ptr_prev = NULL;
13351 struct elf_nds32_ifc_irel_list *irel_dest_prev = NULL;
13352
1c8f6a4d 13353 /* Get the smallest one. */
35c08157
KLC
13354 while (irel_temp->next)
13355 {
13356 if (irel_temp->next->addr < irel_dest->addr)
13357 {
13358 irel_dest_prev = irel_temp;
13359 irel_dest = irel_temp->next;
13360 }
13361 irel_temp = irel_temp->next;
13362 }
1c8f6a4d 13363
35c08157
KLC
13364 if (irel_dest != irel_ptr)
13365 {
13366 if (irel_ptr_prev)
13367 irel_ptr_prev->next = irel_dest;
13368 if (irel_dest_prev)
13369 irel_dest_prev->next = irel_ptr;
13370 irel_temp = irel_ptr->next;
13371 irel_ptr->next = irel_dest->next;
13372 irel_dest->next = irel_temp;
13373 }
13374 irel_ptr_prev = irel_ptr;
13375 irel_ptr = irel_ptr->next;
13376 }
13377
13378 irel_ptr = ptr->irel_head;
13379 irel_keeper = irel_ptr;
13380 while (irel_ptr && irel_ptr->next)
13381 {
13382 if ((irel_ptr->next->addr - irel_keeper->addr) > 1022)
13383 irel_keeper = irel_ptr->next;
13384 else
13385 {
13386 ptr->enable = 1;
13387 irel_ptr->keep = 0;
13388 }
13389 irel_ptr = irel_ptr->next;
13390 }
13391 }
13392
1c8f6a4d 13393 /* Ex9 enable. Reserve it for ex9. */
35c08157
KLC
13394 if ((target_optimize & NDS32_RELAX_EX9_ON)
13395 && ptr->irel_head != irel_keeper)
13396 ptr->enable = 0;
13397 ptr = ptr->next;
13398 }
13399}
13400
13401/* Determine whether j and jal should be substituted after ex9 done. */
13402
13403static void
13404nds32_elf_ifc_filter_after_ex9 (void)
13405{
13406 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13407 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13408
13409 while (ptr)
13410 {
13411 if (ptr->enable == 0)
13412 {
13413 /* Check whether ifc is applied or not. */
13414 irel_ptr = ptr->irel_head;
13415 ptr->ex9_enable = 1;
13416 while (irel_ptr)
13417 {
13418 if (ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_TRAN)
13419 {
13420 /* Ex9 already. */
13421 ptr->ex9_enable = 0;
13422 break;
13423 }
13424 irel_ptr = irel_ptr->next;
13425 }
13426 }
13427 ptr = ptr->next;
13428 }
13429}
13430
13431/* Wrapper to do ifc relaxation. */
13432
13433bfd_boolean
13434nds32_elf_ifc_finish (struct bfd_link_info *info)
13435{
13436 int relax_status;
13437 struct elf_nds32_link_hash_table *table;
13438
13439 table = nds32_elf_hash_table (info);
13440 relax_status = table->relax_status;
13441
13442 if (!(relax_status & NDS32_RELAX_JUMP_IFC_DONE))
13443 nds32_elf_ifc_filter (info);
13444 else
13445 nds32_elf_ifc_filter_after_ex9 ();
13446
13447 if (!nds32_elf_ifc_replace (info))
13448 return FALSE;
13449
13450 if (table)
13451 table->relax_status |= NDS32_RELAX_JUMP_IFC_DONE;
13452 return TRUE;
13453}
13454
13455/* Traverse the result of ifc filter and replace it with ifcall9. */
13456
13457static bfd_boolean
13458nds32_elf_ifc_replace (struct bfd_link_info *info)
13459{
13460 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13461 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13462 nds32_elf_blank_t *relax_blank_list = NULL;
13463 bfd_byte *contents = NULL;
13464 Elf_Internal_Rela *internal_relocs;
13465 Elf_Internal_Rela *irel;
13466 Elf_Internal_Rela *irelend;
13467 unsigned short insn16 = INSN_IFCALL9;
13468 struct elf_nds32_link_hash_table *table;
13469 int relax_status;
13470
13471 table = nds32_elf_hash_table (info);
13472 relax_status = table->relax_status;
13473
13474 while (ptr)
13475 {
13476 /* Traverse the ifc gather list, and replace the
13477 filter entries by ifcall9. */
13478 if ((!(relax_status & NDS32_RELAX_JUMP_IFC_DONE) && ptr->enable == 1)
1c8f6a4d
KLC
13479 || ((relax_status & NDS32_RELAX_JUMP_IFC_DONE)
13480 && ptr->ex9_enable == 1))
35c08157
KLC
13481 {
13482 irel_ptr = ptr->irel_head;
13483 if (ptr->h == NULL)
13484 {
13485 /* Local symbol. */
13486 internal_relocs = _bfd_elf_link_read_relocs
13487 (ptr->sec->owner, ptr->sec, NULL, NULL, TRUE /* keep_memory */);
13488 irelend = internal_relocs + ptr->sec->reloc_count;
13489
1c8f6a4d 13490 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
0c4bd9d9 13491 &contents, TRUE))
35c08157
KLC
13492 return FALSE;
13493
13494 while (irel_ptr)
13495 {
13496 if (irel_ptr->keep == 0 && irel_ptr->next)
13497 {
1c8f6a4d 13498 /* The one can be replaced. We have to check whether
35c08157
KLC
13499 there is any alignment point in the region. */
13500 irel = irel_ptr->irel;
1c8f6a4d
KLC
13501 while (((irel_ptr->next->keep == 0
13502 && irel < irel_ptr->next->irel)
35c08157
KLC
13503 || (irel_ptr->next->keep == 1 && irel < irelend))
13504 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13505 && (irel->r_addend & 0x1f) == 2))
13506 irel++;
13507 if (irel >= irelend
13508 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13509 && (irel->r_addend & 0x1f) == 2
1c8f6a4d
KLC
13510 && ((irel->r_offset - get_nds32_elf_blank_total
13511 (&relax_blank_list, irel->r_offset, 1))
13512 & 0x02) == 0))
35c08157
KLC
13513 {
13514 /* Replace by ifcall9. */
13515 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13516 if (!insert_nds32_elf_blank_recalc_total
13517 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13518 return FALSE;
13519 irel_ptr->irel->r_info =
1c8f6a4d
KLC
13520 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13521 R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC
13522 }
13523 }
13524 irel_ptr = irel_ptr->next;
13525 }
13526
13527 /* Delete the redundant code. */
13528 if (relax_blank_list)
13529 {
13530 nds32_elf_relax_delete_blanks (ptr->sec->owner, ptr->sec,
13531 relax_blank_list);
13532 relax_blank_list = NULL;
13533 }
13534 }
13535 else
13536 {
13537 /* Global symbol. */
13538 while (irel_ptr)
13539 {
13540 if (irel_ptr->keep == 0 && irel_ptr->next)
13541 {
13542 /* The one can be replaced, and we have to check
13543 whether there is any alignment point in the region. */
13544 internal_relocs = _bfd_elf_link_read_relocs
13545 (irel_ptr->sec->owner, irel_ptr->sec, NULL, NULL,
13546 TRUE /* keep_memory */);
13547 irelend = internal_relocs + irel_ptr->sec->reloc_count;
0c4bd9d9
KLC
13548 if (!nds32_get_section_contents (irel_ptr->sec->owner,
13549 irel_ptr->sec, &contents,
13550 TRUE))
35c08157
KLC
13551 return FALSE;
13552
13553 irel = irel_ptr->irel;
13554 while (((irel_ptr->sec == irel_ptr->next->sec
13555 && irel_ptr->next->keep == 0
13556 && irel < irel_ptr->next->irel)
13557 || ((irel_ptr->sec != irel_ptr->next->sec
13558 || irel_ptr->next->keep == 1)
13559 && irel < irelend))
13560 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13561 && (irel->r_addend & 0x1f) == 2))
13562 irel++;
13563 if (irel >= irelend
13564 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13565 && (irel->r_addend & 0x1f) == 2
13566 && ((irel->r_offset
13567 - get_nds32_elf_blank_total (&relax_blank_list,
13568 irel->r_offset, 1)) & 0x02) == 0))
13569 {
13570 /* Replace by ifcall9. */
13571 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13572 if (!insert_nds32_elf_blank_recalc_total
13573 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13574 return FALSE;
13575
13576 /* Delete the redundant code, and clear the relocation. */
13577 nds32_elf_relax_delete_blanks (irel_ptr->sec->owner,
13578 irel_ptr->sec,
13579 relax_blank_list);
13580 irel_ptr->irel->r_info =
1c8f6a4d
KLC
13581 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13582 R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC
13583 relax_blank_list = NULL;
13584 }
13585 }
13586
13587 irel_ptr = irel_ptr->next;
13588 }
13589 }
13590 }
13591 ptr = ptr->next;
13592 }
13593
13594 return TRUE;
13595}
13596
13597/* Relocate ifcall. */
13598
1c8f6a4d 13599static bfd_boolean
35c08157
KLC
13600nds32_elf_ifc_reloc (void)
13601{
13602 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13603 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13604 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13605 bfd_vma relocation, address;
13606 unsigned short insn16;
35c08157 13607 bfd_byte *contents = NULL;
1c8f6a4d
KLC
13608 static bfd_boolean done = FALSE;
13609
13610 if (done)
13611 return TRUE;
13612
13613 done = TRUE;
35c08157
KLC
13614
13615 while (ptr)
13616 {
1c8f6a4d 13617 /* Check the entry is enable ifcall. */
35c08157
KLC
13618 if (ptr->enable == 1 || ptr->ex9_enable == 1)
13619 {
1c8f6a4d 13620 /* Get the reserve jump. */
35c08157
KLC
13621 irel_ptr = ptr->irel_head;
13622 while (irel_ptr)
13623 {
13624 if (irel_ptr->keep == 1)
13625 {
13626 irel_keeper = irel_ptr;
13627 break;
13628 }
13629 irel_ptr = irel_ptr->next;
13630 }
13631
13632 irel_ptr = ptr->irel_head;
13633 if (ptr->h == NULL)
13634 {
13635 /* Local symbol. */
0c4bd9d9
KLC
13636 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
13637 &contents, TRUE))
35c08157
KLC
13638 return FALSE;
13639
13640 while (irel_ptr)
13641 {
13642 if (irel_ptr->keep == 0
1c8f6a4d 13643 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
35c08157
KLC
13644 {
13645 relocation = irel_keeper->irel->r_offset;
13646 relocation = relocation - irel_ptr->irel->r_offset;
13647 while (irel_keeper && relocation > 1022)
13648 {
13649 irel_keeper = irel_keeper->next;
13650 if (irel_keeper && irel_keeper->keep == 1)
13651 {
13652 relocation = irel_keeper->irel->r_offset;
13653 relocation = relocation - irel_ptr->irel->r_offset;
13654 }
13655 }
13656 if (relocation > 1022)
13657 {
13658 /* Double check. */
13659 irel_keeper = ptr->irel_head;
13660 while (irel_keeper)
13661 {
13662 if (irel_keeper->keep == 1)
13663 {
13664 relocation = irel_keeper->irel->r_offset;
13665 relocation = relocation - irel_ptr->irel->r_offset;
13666 }
13667 if (relocation <= 1022)
13668 break;
13669 irel_keeper = irel_keeper->next;
13670 }
13671 if (!irel_keeper)
13672 return FALSE;
13673 }
1c8f6a4d
KLC
13674 irel_ptr->irel->r_info =
13675 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13676 R_NDS32_NONE);
35c08157
KLC
13677 insn16 = INSN_IFCALL9 | (relocation >> 1);
13678 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13679 }
13680 irel_ptr = irel_ptr->next;
13681 }
13682 }
13683 else
13684 {
13685 /* Global symbol. */
13686 while (irel_ptr)
13687 {
13688 if (irel_ptr->keep == 0
1c8f6a4d 13689 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
35c08157 13690 {
1c8f6a4d 13691 /* Get the distance between ifcall and jump. */
35c08157
KLC
13692 relocation = (irel_keeper->irel->r_offset
13693 + irel_keeper->sec->output_section->vma
13694 + irel_keeper->sec->output_offset);
13695 address = (irel_ptr->irel->r_offset
13696 + irel_ptr->sec->output_section->vma
13697 + irel_ptr->sec->output_offset);
13698 relocation = relocation - address;
1c8f6a4d
KLC
13699
13700 /* The distance is over ragne, find callee again. */
35c08157
KLC
13701 while (irel_keeper && relocation > 1022)
13702 {
13703 irel_keeper = irel_keeper->next;
13704 if (irel_keeper && irel_keeper->keep ==1)
13705 {
13706 relocation = (irel_keeper->irel->r_offset
13707 + irel_keeper->sec->output_section->vma
13708 + irel_keeper->sec->output_offset);
13709 relocation = relocation - address;
13710 }
13711 }
13712
13713 if (relocation > 1022)
13714 {
13715 /* Double check. */
13716 irel_keeper = ptr->irel_head;
13717 while (irel_keeper)
13718 {
13719 if (irel_keeper->keep == 1)
13720 {
13721
13722 relocation = (irel_keeper->irel->r_offset
13723 + irel_keeper->sec->output_section->vma
13724 + irel_keeper->sec->output_offset);
13725 relocation = relocation - address;
13726 }
13727 if (relocation <= 1022)
13728 break;
13729 irel_keeper = irel_keeper->next;
13730 }
13731 if (!irel_keeper)
13732 return FALSE;
13733 }
13734 if (!nds32_get_section_contents
0c4bd9d9 13735 (irel_ptr->sec->owner, irel_ptr->sec, &contents, TRUE))
1c8f6a4d
KLC
13736 return FALSE;
13737 insn16 = INSN_IFCALL9 | (relocation >> 1);
13738 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13739 irel_ptr->irel->r_info =
13740 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13741 R_NDS32_NONE);
35c08157
KLC
13742 }
13743 irel_ptr =irel_ptr->next;
13744 }
13745 }
13746 }
13747 ptr = ptr->next;
13748 }
13749
13750 return TRUE;
13751}
13752
13753/* End of IFC relaxation. */
13754\f
13755/* EX9 Instruction Table Relaxation. */
13756
13757/* Global hash list. */
13758struct elf_link_hash_entry_list
13759{
13760 struct elf_link_hash_entry *h;
13761 struct elf_link_hash_entry_list *next;
13762};
13763
13764/* Save different destination but same insn. */
13765struct elf_link_hash_entry_mul_list
13766{
13767 /* Global symbol times. */
13768 int times;
13769 /* Save relocation for each global symbol but useful?? */
13770 Elf_Internal_Rela *irel;
13771 /* For sethi, two sethi may have the same high-part but different low-parts. */
13772 Elf_Internal_Rela rel_backup;
13773 struct elf_link_hash_entry_list *h_list;
13774 struct elf_link_hash_entry_mul_list *next;
13775};
13776
13777/* Instruction hash table. */
13778struct elf_nds32_code_hash_entry
13779{
13780 struct bfd_hash_entry root;
13781 int times;
13782 /* For insn that can use relocation or constant ex: sethi. */
13783 int const_insn;
13784 asection *sec;
13785 struct elf_link_hash_entry_mul_list *m_list;
13786 /* Using r_addend. */
13787 Elf_Internal_Rela *irel;
13788 /* Using r_info. */
13789 Elf_Internal_Rela rel_backup;
13790};
13791
13792/* Instruction count list. */
13793struct elf_nds32_insn_times_entry
13794{
13795 const char *string;
13796 int times;
13797 int order;
13798 asection *sec;
13799 struct elf_link_hash_entry_mul_list *m_list;
13800 Elf_Internal_Rela *irel;
13801 Elf_Internal_Rela rel_backup;
13802 struct elf_nds32_insn_times_entry *next;
13803};
13804
13805/* J and JAL symbol list. */
13806struct elf_nds32_symbol_entry
13807{
13808 char *string;
13809 unsigned long insn;
13810 struct elf_nds32_symbol_entry *next;
13811};
13812
13813/* Relocation list. */
13814struct elf_nds32_irel_entry
13815{
13816 Elf_Internal_Rela *irel;
13817 struct elf_nds32_irel_entry *next;
13818};
13819
13820/* ex9.it insn need to be fixed. */
13821struct elf_nds32_ex9_refix
13822{
13823 Elf_Internal_Rela *irel;
13824 asection *sec;
13825 struct elf_link_hash_entry *h;
13826 int order;
13827 struct elf_nds32_ex9_refix *next;
13828};
13829
13830static struct bfd_hash_table ex9_code_table;
13831static struct elf_nds32_insn_times_entry *ex9_insn_head = NULL;
13832static struct elf_nds32_ex9_refix *ex9_refix_head = NULL;
13833
13834/* EX9 hash function. */
13835
13836static struct bfd_hash_entry *
13837nds32_elf_code_hash_newfunc (struct bfd_hash_entry *entry,
13838 struct bfd_hash_table *table,
13839 const char *string)
13840{
13841 struct elf_nds32_code_hash_entry *ret;
13842
13843 /* Allocate the structure if it has not already been allocated by a
13844 subclass. */
13845 if (entry == NULL)
13846 {
13847 entry = (struct bfd_hash_entry *)
13848 bfd_hash_allocate (table, sizeof (*ret));
13849 if (entry == NULL)
13850 return entry;
13851 }
13852
13853 /* Call the allocation method of the superclass. */
13854 entry = bfd_hash_newfunc (entry, table, string);
13855 if (entry == NULL)
13856 return entry;
13857
13858 ret = (struct elf_nds32_code_hash_entry*) entry;
13859 ret->times = 0;
13860 ret->const_insn = 0;
13861 ret->m_list = NULL;
13862 ret->sec = NULL;
13863 ret->irel = NULL;
13864 return &ret->root;
13865}
13866
13867/* Insert ex9 entry
13868 this insert must be stable sorted by times. */
13869
13870static void
13871nds32_elf_ex9_insert_entry (struct elf_nds32_insn_times_entry *ptr)
13872{
13873 struct elf_nds32_insn_times_entry *temp;
13874 struct elf_nds32_insn_times_entry *temp2;
13875
13876 if (ex9_insn_head == NULL)
13877 {
13878 ex9_insn_head = ptr;
13879 ptr->next = NULL;
13880 }
13881 else
13882 {
13883 temp = ex9_insn_head;
13884 temp2 = ex9_insn_head;
13885 while (temp->next &&
13886 (temp->next->times >= ptr->times
13887 || temp->times == -1))
13888 {
13889 if (temp->times == -1)
13890 temp2 = temp;
13891 temp = temp->next;
13892 }
13893 if (ptr->times > temp->times && temp->times != -1)
13894 {
13895 ptr->next = temp;
13896 if (temp2->times == -1)
13897 temp2->next = ptr;
13898 else
13899 ex9_insn_head = ptr;
13900 }
13901 else if (temp->next == NULL)
13902 {
13903 temp->next = ptr;
13904 ptr->next = NULL;
13905 }
13906 else
13907 {
13908 ptr->next = temp->next;
13909 temp->next = ptr;
13910 }
13911 }
13912}
13913
13914/* Examine each insn times in hash table.
13915 Handle multi-link hash entry.
13916
13917 TODO: This function doesn't assign so much info since it is fake. */
13918
13919static int
13920nds32_elf_examine_insn_times (struct elf_nds32_code_hash_entry *h)
13921{
13922 struct elf_nds32_insn_times_entry *ptr;
13923 int times;
13924
13925 if (h->m_list == NULL)
13926 {
13927 /* Local symbol insn or insn without relocation. */
13928 if (h->times < 3)
13929 return TRUE;
13930
13931 ptr = (struct elf_nds32_insn_times_entry *)
13932 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13933 ptr->times = h->times;
13934 ptr->string = h->root.string;
13935 ptr->m_list = NULL;
13936 ptr->sec = h->sec;
13937 ptr->irel = h->irel;
13938 ptr->rel_backup = h->rel_backup;
13939 nds32_elf_ex9_insert_entry (ptr);
13940 }
13941 else
13942 {
13943 /* Global symbol insn. */
13944 /* Only sethi insn has multiple m_list. */
13945 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
13946
13947 times = 0;
13948 while (m_list)
13949 {
13950 times += m_list->times;
13951 m_list = m_list->next;
13952 }
13953 if (times >= 3)
13954 {
13955 m_list = h->m_list;
13956 ptr = (struct elf_nds32_insn_times_entry *)
13957 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13958 ptr->times = times; /* Use the total times. */
13959 ptr->string = h->root.string;
13960 ptr->m_list = m_list;
13961 ptr->sec = h->sec;
13962 ptr->irel = m_list->irel;
13963 ptr->rel_backup = m_list->rel_backup;
13964 nds32_elf_ex9_insert_entry (ptr);
13965 }
13966 if (h->const_insn == 1)
13967 {
13968 /* sethi with constant value. */
13969 if (h->times < 3)
13970 return TRUE;
13971
13972 ptr = (struct elf_nds32_insn_times_entry *)
13973 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13974 ptr->times = h->times;
13975 ptr->string = h->root.string;
13976 ptr->m_list = NULL;
13977 ptr->sec = NULL;
13978 ptr->irel = NULL;
13979 ptr->rel_backup = h->rel_backup;
13980 nds32_elf_ex9_insert_entry (ptr);
13981 }
13982 }
13983 return TRUE;
13984}
13985
13986/* Count each insn times in hash table.
13987 Handle multi-link hash entry. */
13988
13989static int
13990nds32_elf_count_insn_times (struct elf_nds32_code_hash_entry *h)
13991{
13992 int reservation, times;
13993 unsigned long relocation, min_relocation;
13994 struct elf_nds32_insn_times_entry *ptr;
13995
13996 if (h->m_list == NULL)
13997 {
13998 /* Local symbol insn or insn without relocation. */
13999 if (h->times < 3)
14000 return TRUE;
14001 ptr = (struct elf_nds32_insn_times_entry *)
14002 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14003 ptr->times = h->times;
14004 ptr->string = h->root.string;
14005 ptr->m_list = NULL;
14006 ptr->sec = h->sec;
14007 ptr->irel = h->irel;
14008 ptr->rel_backup = h->rel_backup;
14009 nds32_elf_ex9_insert_entry (ptr);
14010 }
14011 else
14012 {
14013 /* Global symbol insn. */
14014 /* Only sethi insn has multiple m_list. */
14015 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
14016
14017 if (ELF32_R_TYPE (m_list->rel_backup.r_info) == R_NDS32_HI20_RELA
14018 && m_list->next != NULL)
14019 {
14020 /* Sethi insn has different symbol or addend but has same hi20. */
14021 times = 0;
14022 reservation = 1;
14023 relocation = 0;
14024 min_relocation = 0xffffffff;
14025 while (m_list)
14026 {
14027 /* Get the minimum sethi address
14028 and calculate how many entry the sethi-list have to use. */
14029 if ((m_list->h_list->h->root.type == bfd_link_hash_defined
14030 || m_list->h_list->h->root.type == bfd_link_hash_defweak)
14031 && (m_list->h_list->h->root.u.def.section != NULL
14032 && m_list->h_list->h->root.u.def.section->output_section != NULL))
14033 {
14034 relocation = (m_list->h_list->h->root.u.def.value +
14035 m_list->h_list->h->root.u.def.section->output_section->vma +
14036 m_list->h_list->h->root.u.def.section->output_offset);
14037 relocation += m_list->irel->r_addend;
14038 }
14039 else
14040 relocation = 0;
14041 if (relocation < min_relocation)
14042 min_relocation = relocation;
14043 times += m_list->times;
14044 m_list = m_list->next;
14045 }
14046 if (min_relocation < ex9_relax_size)
14047 reservation = (min_relocation >> 12) + 1;
14048 else
14049 reservation = (min_relocation >> 12)
14050 - ((min_relocation - ex9_relax_size) >> 12) + 1;
14051 if (reservation < (times / 3))
14052 {
14053 /* Efficient enough to use ex9. */
14054 int i;
14055
14056 for (i = reservation ; i > 0; i--)
14057 {
14058 /* Allocate number of reservation ex9 entry. */
14059 ptr = (struct elf_nds32_insn_times_entry *)
14060 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14061 ptr->times = h->m_list->times / reservation;
14062 ptr->string = h->root.string;
14063 ptr->m_list = h->m_list;
14064 ptr->sec = h->sec;
14065 ptr->irel = h->m_list->irel;
14066 ptr->rel_backup = h->m_list->rel_backup;
14067 nds32_elf_ex9_insert_entry (ptr);
14068 }
14069 }
14070 }
14071 else
14072 {
14073 /* Normal global symbol that means no different address symbol
14074 using same ex9 entry. */
14075 if (m_list->times >= 3)
14076 {
14077 ptr = (struct elf_nds32_insn_times_entry *)
14078 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14079 ptr->times = m_list->times;
14080 ptr->string = h->root.string;
14081 ptr->m_list = h->m_list;
14082 ptr->sec = h->sec;
14083 ptr->irel = h->m_list->irel;
14084 ptr->rel_backup = h->m_list->rel_backup;
14085 nds32_elf_ex9_insert_entry (ptr);
14086 }
14087 }
14088
14089 if (h->const_insn == 1)
14090 {
14091 /* sethi with constant value. */
14092 if (h->times < 3)
14093 return TRUE;
14094
14095 ptr = (struct elf_nds32_insn_times_entry *)
14096 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14097 ptr->times = h->times;
14098 ptr->string = h->root.string;
14099 ptr->m_list = NULL;
14100 ptr->sec = NULL;
14101 ptr->irel = NULL;
14102 ptr->rel_backup = h->rel_backup;
14103 nds32_elf_ex9_insert_entry (ptr);
14104 }
14105 }
14106
14107 return TRUE;
14108}
14109
14110/* Hash table traverse function. */
14111
14112static void
14113nds32_elf_code_hash_traverse (int (*func) (struct elf_nds32_code_hash_entry*))
14114{
14115 unsigned int i;
14116
14117 ex9_code_table.frozen = 1;
14118 for (i = 0; i < ex9_code_table.size; i++)
14119 {
14120 struct bfd_hash_entry *p;
14121
14122 for (p = ex9_code_table.table[i]; p != NULL; p = p->next)
14123 if (!func ((struct elf_nds32_code_hash_entry *) p))
14124 goto out;
14125 }
14126out:
14127 ex9_code_table.frozen = 0;
14128}
14129
14130
14131/* Give order number to insn list. */
14132
14133static void
14134nds32_elf_order_insn_times (struct bfd_link_info *info)
14135{
14136 struct elf_nds32_insn_times_entry *ex9_insn;
1c8f6a4d 14137 struct elf_nds32_insn_times_entry *temp = NULL;
35c08157 14138 struct elf_nds32_link_hash_table *table;
35c08157 14139 int ex9_limit;
1c8f6a4d
KLC
14140 int number = 0;
14141
14142 if (ex9_insn_head == NULL)
14143 return;
35c08157
KLC
14144
14145/* The max number of entries is 512. */
14146 ex9_insn = ex9_insn_head;
14147 table = nds32_elf_hash_table (info);
14148 ex9_limit = table->ex9_limit;
14149
35c08157
KLC
14150 ex9_insn = ex9_insn_head;
14151
1c8f6a4d 14152 while (ex9_insn != NULL && number < ex9_limit)
35c08157 14153 {
1c8f6a4d 14154 ex9_insn->order = number;
35c08157 14155 number++;
1c8f6a4d 14156 temp = ex9_insn;
35c08157
KLC
14157 ex9_insn = ex9_insn->next;
14158 }
14159
1c8f6a4d
KLC
14160 if (ex9_insn && temp)
14161 temp->next = NULL;
35c08157
KLC
14162
14163 while (ex9_insn != NULL)
14164 {
14165 /* Free useless entry. */
14166 temp = ex9_insn;
14167 ex9_insn = ex9_insn->next;
14168 free (temp);
14169 }
14170}
14171
14172/* Build .ex9.itable section. */
14173
14174static void
14175nds32_elf_ex9_build_itable (struct bfd_link_info *link_info)
14176{
14177 asection *table_sec;
14178 struct elf_nds32_insn_times_entry *ptr;
14179 bfd *it_abfd;
14180 int number = 0;
14181 bfd_byte *contents = NULL;
14182
14183 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
c72f2fb2 14184 it_abfd = it_abfd->link.next)
35c08157
KLC
14185 {
14186 /* Find the section .ex9.itable, and put all entries into it. */
14187 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
14188 if (table_sec != NULL)
14189 {
0c4bd9d9 14190 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE))
35c08157
KLC
14191 return;
14192
14193 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
14194 number++;
14195
14196 table_sec->size = number * 4;
14197
14198 if (number == 0)
1c8f6a4d 14199 return;
35c08157
KLC
14200
14201 elf_elfheader (link_info->output_bfd)->e_flags |= E_NDS32_HAS_EX9_INST;
14202 number = 0;
14203 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
14204 {
14205 long val;
14206
14207 val = strtol (ptr->string, NULL, 16);
14208 bfd_putb32 ((bfd_vma) val, (char *) contents + (number * 4));
14209 number++;
14210 }
14211 break;
14212 }
14213 }
14214}
14215
14216/* Get insn with regs according to relocation type. */
14217
14218static void
14219nds32_elf_get_insn_with_reg (Elf_Internal_Rela *irel,
1c8f6a4d 14220 uint32_t insn, uint32_t *insn_with_reg)
35c08157
KLC
14221{
14222 reloc_howto_type *howto = NULL;
14223
14224 if (irel == NULL
14225 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
14226 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
14227 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
14228 {
14229 *insn_with_reg = insn;
14230 return;
14231 }
14232
14233 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
14234 *insn_with_reg = insn & (0xffffffff ^ howto->dst_mask);
14235}
14236
14237/* Mask number of address bits according to relocation. */
14238
14239static unsigned long
14240nds32_elf_irel_mask (Elf_Internal_Rela *irel)
14241{
14242 reloc_howto_type *howto = NULL;
14243
14244 if (irel == NULL
14245 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
14246 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
14247 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
14248 return 0;
14249
14250 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
14251 return howto->dst_mask;
14252}
14253
14254static void
14255nds32_elf_insert_irel_entry (struct elf_nds32_irel_entry **irel_list,
14256 struct elf_nds32_irel_entry *irel_ptr)
14257{
14258 if (*irel_list == NULL)
14259 {
14260 *irel_list = irel_ptr;
14261 irel_ptr->next = NULL;
14262 }
14263 else
14264 {
14265 irel_ptr->next = *irel_list;
14266 *irel_list = irel_ptr;
14267 }
14268}
14269
14270static void
14271nds32_elf_ex9_insert_fix (asection * sec, Elf_Internal_Rela * irel,
14272 struct elf_link_hash_entry *h, int order)
14273{
14274 struct elf_nds32_ex9_refix *ptr;
14275
14276 ptr = bfd_malloc (sizeof (struct elf_nds32_ex9_refix));
14277 ptr->sec = sec;
14278 ptr->irel = irel;
14279 ptr->h = h;
14280 ptr->order = order;
14281 ptr->next = NULL;
14282
14283 if (ex9_refix_head == NULL)
14284 ex9_refix_head = ptr;
14285 else
14286 {
14287 struct elf_nds32_ex9_refix *temp = ex9_refix_head;
14288
14289 while (temp->next != NULL)
14290 temp = temp->next;
14291 temp->next = ptr;
14292 }
14293}
14294
14295enum
14296{
14297 DATA_EXIST = 1,
14298 CLEAN_PRE = 1 << 1,
14299 PUSH_PRE = 1 << 2
14300};
14301
14302/* Check relocation type if supporting for ex9. */
14303
14304static int
14305nds32_elf_ex9_relocation_check (struct bfd_link_info *info,
14306 Elf_Internal_Rela **irel,
14307 Elf_Internal_Rela *irelend,
14308 nds32_elf_blank_t *relax_blank_list,
f4cb41f4 14309 asection *sec,bfd_vma *off,
35c08157
KLC
14310 bfd_byte *contents)
14311{
14312 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
14313 bfd_boolean nested_ex9, nested_loop;
14314 bfd_boolean ex9_loop_aware;
14315 /* We use the highest 1 byte of result to record
14316 how many bytes location counter has to move. */
14317 int result = 0;
14318 Elf_Internal_Rela *irel_save = NULL;
14319 struct elf_nds32_link_hash_table *table;
14320
14321 table = nds32_elf_hash_table (info);
14322 ex9_loop_aware = table->ex9_loop_aware;
14323
14324 while ((*irel) != NULL && (*irel) < irelend && *off == (*irel)->r_offset)
14325 {
14326 switch (ELF32_R_TYPE ((*irel)->r_info))
14327 {
14328 case R_NDS32_RELAX_REGION_BEGIN:
14329 /* Ignore code block. */
14330 nested_ex9 = FALSE;
14331 nested_loop = FALSE;
14332 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG)
14333 || (ex9_loop_aware
14334 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG)))
14335 {
14336 /* Check the region if loop or not. If it is true and
14337 ex9-loop-aware is true, ignore the region till region end. */
14338 /* To save the status for in .no_relax ex9 region and
14339 loop region to conform the block can do ex9 relaxation. */
14340 nested_ex9 = ((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG);
14341 nested_loop = (ex9_loop_aware
14342 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG));
14343 while ((*irel) && (*irel) < irelend && (nested_ex9 || nested_loop))
14344 {
14345 (*irel)++;
14346 if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_BEGIN)
14347 {
14348 /* There may be nested region. */
14349 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14350 nested_ex9 = TRUE;
14351 else if (ex9_loop_aware
14352 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14353 nested_loop = TRUE;
14354 }
14355 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_END)
14356 {
14357 /* The end of region. */
14358 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14359 nested_ex9 = FALSE;
14360 else if (ex9_loop_aware
14361 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14362 nested_loop = FALSE;
14363 }
1c8f6a4d 14364 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_LABEL
35c08157
KLC
14365 && ((*irel)->r_addend & 0x1f) == 2)
14366 {
14367 /* Alignment exist in the region. */
14368 result |= CLEAN_PRE;
14369 if (((*irel)->r_offset -
14370 get_nds32_elf_blank_total (&relax_blank_list,
14371 (*irel)->r_offset, 0)) & 0x02)
14372 result |= PUSH_PRE;
14373 }
14374 }
14375 if ((*irel) >= irelend)
14376 *off = sec->size;
14377 else
14378 *off = (*irel)->r_offset;
14379
14380 /* The final instruction in the region, regard this one as data to ignore it. */
14381 result |= DATA_EXIST;
14382 return result;
14383 }
14384 break;
14385
14386 case R_NDS32_LABEL:
1c8f6a4d 14387 if (((*irel)->r_addend & 0x1f) == 2)
35c08157
KLC
14388 {
14389 /* Check this point is align and decide to do ex9 or not. */
14390 result |= CLEAN_PRE;
14391 if (((*irel)->r_offset -
14392 get_nds32_elf_blank_total (&relax_blank_list,
14393 (*irel)->r_offset, 0)) & 0x02)
14394 result |= PUSH_PRE;
14395 }
14396 break;
14397 case R_NDS32_32_RELA:
14398 /* Data. */
14399 result |= (4 << 24);
14400 result |= DATA_EXIST;
14401 break;
14402 case R_NDS32_16_RELA:
14403 /* Data. */
14404 result |= (2 << 24);
14405 result |= DATA_EXIST;
14406 break;
14407 case R_NDS32_DATA:
14408 /* Data. */
14409 /* The least code alignment is 2. If the data is only one byte,
14410 we have to shift one more byte. */
14411 if ((*irel)->r_addend == 1)
14412 result |= ((*irel)->r_addend << 25) ;
14413 else
14414 result |= ((*irel)->r_addend << 24) ;
14415
14416 result |= DATA_EXIST;
14417 break;
14418
14419 case R_NDS32_25_PCREL_RELA:
14420 case R_NDS32_SDA16S3_RELA:
14421 case R_NDS32_SDA15S3_RELA:
14422 case R_NDS32_SDA15S3:
14423 case R_NDS32_SDA17S2_RELA:
14424 case R_NDS32_SDA15S2_RELA:
14425 case R_NDS32_SDA12S2_SP_RELA:
14426 case R_NDS32_SDA12S2_DP_RELA:
14427 case R_NDS32_SDA15S2:
14428 case R_NDS32_SDA18S1_RELA:
14429 case R_NDS32_SDA15S1_RELA:
14430 case R_NDS32_SDA15S1:
14431 case R_NDS32_SDA19S0_RELA:
14432 case R_NDS32_SDA15S0_RELA:
14433 case R_NDS32_SDA15S0:
14434 case R_NDS32_HI20_RELA:
14435 case R_NDS32_LO12S0_ORI_RELA:
14436 case R_NDS32_LO12S0_RELA:
14437 case R_NDS32_LO12S1_RELA:
14438 case R_NDS32_LO12S2_RELA:
14439 /* These relocation is supported ex9 relaxation currently. */
14440 /* We have to save the relocation for using later, since we have
14441 to check there is any alignment in the same address. */
14442 irel_save = *irel;
14443 break;
14444 default:
14445 /* Not support relocations. */
14446 if (ELF32_R_TYPE ((*irel)->r_info) < ARRAY_SIZE (nds32_elf_howto_table)
1c8f6a4d
KLC
14447 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_NONE
14448 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_INSN16)
35c08157
KLC
14449 {
14450 /* Note: To optimize aggressively, it maybe can ignore R_NDS32_INSN16 here.
14451 But we have to consider if there is any side-effect. */
14452 if (!(result & DATA_EXIST))
14453 {
14454 /* We have to confirm there is no data relocation in the
14455 same address. In general case, this won't happen. */
14456 /* We have to do ex9 conservative, for those relocation not
14457 considerd we ignore instruction. */
14458 result |= DATA_EXIST;
14459 if (*(contents + *off) & 0x80)
14460 result |= (2 << 24);
14461 else
14462 result |= (4 << 24);
14463 break;
14464 }
14465 }
14466 }
14467 if ((*irel) < irelend
14468 && ((*irel) + 1) < irelend
14469 && (*irel)->r_offset == ((*irel) + 1)->r_offset)
14470 /* There are relocations pointing to the same address, we have to
14471 check all of them. */
14472 (*irel)++;
14473 else
14474 {
14475 if (irel_save)
14476 *irel = irel_save;
14477 return result;
14478 }
14479 }
14480 return result;
14481}
14482
1c8f6a4d
KLC
14483/* Replace with ex9 instruction. */
14484
14485static bfd_boolean
14486nds32_elf_ex9_push_insn (uint16_t insn16, bfd_byte *contents, bfd_vma pre_off,
14487 nds32_elf_blank_t **relax_blank_list,
14488 struct elf_nds32_irel_entry *pre_irel_ptr,
14489 struct elf_nds32_irel_entry **irel_list)
14490{
14491 if (insn16 != 0)
14492 {
14493 /* Implement the ex9 relaxation. */
14494 bfd_putb16 (insn16, contents + pre_off);
14495 if (!insert_nds32_elf_blank_recalc_total (relax_blank_list,
14496 pre_off + 2, 2))
14497 return FALSE;
14498 if (pre_irel_ptr != NULL)
14499 nds32_elf_insert_irel_entry (irel_list, pre_irel_ptr);
14500 }
14501 return TRUE;
14502}
14503
35c08157
KLC
14504/* Replace input file instruction which is in ex9 itable. */
14505
14506static bfd_boolean
14507nds32_elf_ex9_replace_instruction (struct bfd_link_info *info, bfd *abfd, asection *sec)
14508{
14509 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
14510 bfd_byte *contents = NULL;
1c8f6a4d
KLC
14511 bfd_vma off;
14512 uint16_t insn16, insn_ex9;
35c08157 14513 /* `pre_*' are used to track previous instruction that can use ex9.it. */
1c8f6a4d
KLC
14514 bfd_vma pre_off = -1;
14515 uint16_t pre_insn16 = 0;
35c08157
KLC
14516 struct elf_nds32_irel_entry *pre_irel_ptr = NULL;
14517 Elf_Internal_Rela *internal_relocs;
14518 Elf_Internal_Rela *irel;
14519 Elf_Internal_Rela *irelend;
14520 Elf_Internal_Shdr *symtab_hdr;
14521 Elf_Internal_Sym *isym = NULL;
14522 nds32_elf_blank_t *relax_blank_list = NULL;
1c8f6a4d
KLC
14523 uint32_t insn = 0;
14524 uint32_t insn_with_reg = 0;
14525 uint32_t it_insn;
14526 uint32_t it_insn_with_reg;
35c08157
KLC
14527 unsigned long r_symndx;
14528 asection *isec;
14529 struct elf_nds32_irel_entry *irel_list = NULL;
14530 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
14531 int data_flag, do_replace, save_irel;
1c8f6a4d
KLC
14532 struct elf_link_hash_entry_list *h_list;
14533
35c08157
KLC
14534
14535 /* Load section instructions, relocations, and symbol table. */
0c4bd9d9 14536 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
35c08157
KLC
14537 || !nds32_get_local_syms (abfd, sec, &isym))
14538 return FALSE;
1c8f6a4d
KLC
14539 internal_relocs =
14540 _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, TRUE /* keep_memory */);
35c08157
KLC
14541 irelend = internal_relocs + sec->reloc_count;
14542 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
14543
14544 off = 0;
14545
14546 /* Check if the object enable ex9. */
1c8f6a4d
KLC
14547 irel = find_relocs_at_address (internal_relocs, internal_relocs,
14548 irelend, R_NDS32_RELAX_ENTRY);
35c08157
KLC
14549
14550 /* Check this section trigger ex9 relaxation. */
14551 if (irel == NULL
14552 || irel >= irelend
14553 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
14554 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
14555 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
14556 return TRUE;
14557
14558 irel = internal_relocs;
14559
14560 /* Check alignment and fetch proper relocation. */
14561 while (off < sec->size)
14562 {
14563 struct elf_link_hash_entry *h = NULL;
14564 struct elf_nds32_irel_entry *irel_ptr = NULL;
14565
14566 /* Syn the instruction and the relocation. */
14567 while (irel != NULL && irel < irelend && irel->r_offset < off)
14568 irel++;
14569
14570 data_flag = nds32_elf_ex9_relocation_check (info, &irel, irelend,
14571 relax_blank_list, sec,
14572 &off, contents);
14573 if (data_flag & PUSH_PRE)
1c8f6a4d
KLC
14574 if (!nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14575 &relax_blank_list, pre_irel_ptr,
14576 &irel_list))
14577 return FALSE;
35c08157
KLC
14578
14579 if (data_flag & CLEAN_PRE)
14580 {
14581 pre_off = 0;
14582 pre_insn16 = 0;
14583 pre_irel_ptr = NULL;
14584 }
14585 if (data_flag & DATA_EXIST)
14586 {
14587 /* We save the move offset in the highest byte. */
14588 off += (data_flag >> 24);
14589 continue;
14590 }
14591
14592 if (*(contents + off) & 0x80)
14593 {
14594 /* 2-byte instruction. */
14595 off += 2;
14596 continue;
14597 }
14598
14599 /* Load the instruction and its opcode with register for comparing. */
14600 ex9_insn = ex9_insn_head;
14601 insn = bfd_getb32 (contents + off);
14602 insn_with_reg = 0;
14603 while (ex9_insn)
14604 {
14605 it_insn = strtol (ex9_insn->string, NULL, 16);
14606 it_insn_with_reg = 0;
14607 do_replace = 0;
14608 save_irel = 0;
14609
14610 if (irel != NULL && irel < irelend && irel->r_offset == off)
14611 {
14612 /* Insn with relocation. */
14613 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
14614
14615 if (ex9_insn->irel != NULL)
1c8f6a4d
KLC
14616 nds32_elf_get_insn_with_reg (ex9_insn->irel, it_insn,
14617 &it_insn_with_reg);
35c08157
KLC
14618
14619 if (ex9_insn->irel != NULL
1c8f6a4d
KLC
14620 && (ELF32_R_TYPE (irel->r_info) ==
14621 ELF32_R_TYPE (ex9_insn->irel->r_info))
35c08157
KLC
14622 && (insn_with_reg == it_insn_with_reg))
14623 {
14624 /* Insn relocation and format is the same as table entry. */
14625
14626 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
14627 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
14628 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
14629 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
14630 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
14631 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
14632 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
14633 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
14634 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
14635 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
14636 && ELF32_R_TYPE (irel->r_info) <=
14637 R_NDS32_SDA12S2_SP_RELA)
14638 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
14639 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
14640 {
14641 r_symndx = ELF32_R_SYM (irel->r_info);
14642 if (r_symndx < symtab_hdr->sh_info)
14643 {
14644 /* Local symbol. */
14645 int shndx = isym[r_symndx].st_shndx;
14646
14647 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14648 if (ex9_insn->sec == isec
14649 && ex9_insn->irel->r_addend == irel->r_addend
14650 && ex9_insn->irel->r_info == irel->r_info)
14651 {
14652 do_replace = 1;
14653 save_irel = 1;
14654 }
14655 }
14656 else
14657 {
14658 /* External symbol. */
14659 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14660 if (ex9_insn->m_list)
14661 {
35c08157
KLC
14662 h_list = ex9_insn->m_list->h_list;
14663 while (h_list)
14664 {
14665 if (h == h_list->h
1c8f6a4d
KLC
14666 && (ex9_insn->m_list->irel->r_addend ==
14667 irel->r_addend))
35c08157
KLC
14668 {
14669 do_replace = 1;
14670 save_irel = 1;
14671 break;
14672 }
14673 h_list = h_list->next;
14674 }
14675 }
14676 }
14677 }
14678 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA)
14679 {
14680 r_symndx = ELF32_R_SYM (irel->r_info);
14681 if (r_symndx < symtab_hdr->sh_info)
14682 {
14683 /* Local symbols. Compare its base symbol and offset. */
14684 int shndx = isym[r_symndx].st_shndx;
14685
14686 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14687 if (ex9_insn->sec == isec
14688 && ex9_insn->irel->r_addend == irel->r_addend
14689 && ex9_insn->irel->r_info == irel->r_info)
14690 {
14691 do_replace = 1;
14692 save_irel = 1;
14693 }
14694 }
14695 else
14696 {
14697 /* External symbol. */
14698 struct elf_link_hash_entry_mul_list *m_list;
14699
14700 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14701 m_list = ex9_insn->m_list;
14702
14703 while (m_list)
14704 {
1c8f6a4d 14705 h_list = m_list->h_list;
35c08157
KLC
14706
14707 while (h_list)
14708 {
14709 if (h == h_list->h
1c8f6a4d
KLC
14710 && (m_list->irel->r_addend
14711 == irel->r_addend))
35c08157
KLC
14712 {
14713 do_replace = 1;
14714 save_irel = 1;
14715 if (ex9_insn->next
14716 && ex9_insn->m_list
14717 && ex9_insn->m_list == ex9_insn->next->m_list)
14718 {
14719 /* sethi multiple entry must be fixed */
14720 nds32_elf_ex9_insert_fix (sec, irel,
14721 h, ex9_insn->order);
14722 }
14723 break;
14724 }
14725 h_list = h_list->next;
14726 }
14727 m_list = m_list->next;
14728 }
14729 }
14730 }
14731 }
14732
14733 /* Import table: Check the symbol hash table and the
14734 jump target. Only R_NDS32_25_PCREL_RELA now. */
14735 else if (ex9_insn->times == -1
14736 && ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
14737 {
14738 nds32_elf_get_insn_with_reg (irel, it_insn, &it_insn_with_reg);
14739 if (insn_with_reg == it_insn_with_reg)
14740 {
14741 char code[10];
14742 bfd_vma relocation;
14743
14744 r_symndx = ELF32_R_SYM (irel->r_info);
14745 if (r_symndx >= symtab_hdr->sh_info)
14746 {
14747 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14748 if ((h->root.type == bfd_link_hash_defined
14749 || h->root.type == bfd_link_hash_defweak)
1c8f6a4d
KLC
14750 && h->root.u.def.section != NULL
14751 && h->root.u.def.section->output_section != NULL
35c08157 14752 && h->root.u.def.section->gc_mark == 1
1c8f6a4d 14753 && bfd_is_abs_section (h->root.u.def.section)
35c08157
KLC
14754 && h->root.u.def.value > sec->size)
14755 {
1c8f6a4d
KLC
14756 relocation = h->root.u.def.value +
14757 h->root.u.def.section->output_section->vma +
14758 h->root.u.def.section->output_offset;
35c08157 14759 relocation += irel->r_addend;
1c8f6a4d
KLC
14760 insn = insn_with_reg
14761 | ((relocation >> 1) & 0xffffff);
14762 snprintf (code, sizeof (code), "%08x", insn);
35c08157
KLC
14763 if (strcmp (code, ex9_insn->string) == 0)
14764 {
14765 do_replace = 1;
14766 save_irel = 1;
14767 }
14768 }
14769 }
14770 }
14771 }
14772 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
1c8f6a4d
KLC
14773 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
14774 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
35c08157
KLC
14775 {
14776 /* These relocations do not have to relocate contens, so it can
14777 be regard as instruction without relocation. */
14778 if (insn == it_insn && ex9_insn->irel == NULL)
14779 do_replace = 1;
14780 }
14781 }
14782 else
14783 {
14784 /* Instruction without relocation, we only
14785 have to compare their byte code. */
14786 if (insn == it_insn && ex9_insn->irel == NULL)
14787 do_replace = 1;
14788 }
14789
14790 /* Insntruction match so replacing the code here. */
14791 if (do_replace == 1)
14792 {
14793 /* There are two formats of ex9 instruction. */
14794 if (ex9_insn->order < 32)
14795 insn_ex9 = INSN_EX9_IT_2;
14796 else
14797 insn_ex9 = INSN_EX9_IT_1;
14798 insn16 = insn_ex9 | ex9_insn->order;
14799
1c8f6a4d
KLC
14800 /* Insert ex9 instruction. */
14801 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14802 &relax_blank_list, pre_irel_ptr,
14803 &irel_list);
35c08157
KLC
14804 pre_off = off;
14805 pre_insn16 = insn16;
14806
14807 if (save_irel)
14808 {
14809 /* For instuction with relocation do relax. */
14810 irel_ptr = (struct elf_nds32_irel_entry *)
14811 bfd_malloc (sizeof (struct elf_nds32_irel_entry));
14812 irel_ptr->irel = irel;
14813 irel_ptr->next = NULL;
14814 pre_irel_ptr = irel_ptr;
14815 }
14816 else
14817 pre_irel_ptr = NULL;
14818 break;
14819 }
14820 ex9_insn = ex9_insn->next;
14821 }
14822 off += 4;
14823 }
14824
1c8f6a4d
KLC
14825 /* Insert ex9 instruction. */
14826 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14827 &relax_blank_list, pre_irel_ptr,
14828 &irel_list);
35c08157
KLC
14829
14830 /* Delete the redundant code. */
14831 if (relax_blank_list)
14832 {
14833 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
14834 relax_blank_list = NULL;
14835 }
14836
14837 /* Clear the relocation that is replaced by ex9. */
14838 while (irel_list)
14839 {
14840 struct elf_nds32_irel_entry *irel_ptr;
14841
14842 irel_ptr = irel_list;
14843 irel_list = irel_ptr->next;
14844 irel_ptr->irel->r_info =
14845 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), R_NDS32_TRAN);
14846 free (irel_ptr);
14847 }
14848 return TRUE;
14849}
14850
14851/* Initialize ex9 hash table. */
14852
14853int
14854nds32_elf_ex9_init (void)
14855{
14856 if (!bfd_hash_table_init_n (&ex9_code_table, nds32_elf_code_hash_newfunc,
14857 sizeof (struct elf_nds32_code_hash_entry),
14858 1023))
14859 {
4eca0228 14860 _bfd_error_handler (_("Linker: cannot init ex9 hash table error \n"));
35c08157
KLC
14861 return FALSE;
14862 }
14863 return TRUE;
14864}
14865
14866/* Predict how many bytes will be relaxed with ex9 and ifc. */
14867
14868static void
14869nds32_elf_ex9_total_relax (struct bfd_link_info *info)
14870{
14871 struct elf_nds32_insn_times_entry *ex9_insn;
14872 struct elf_nds32_insn_times_entry *temp;
14873 int target_optimize;
14874 struct elf_nds32_link_hash_table *table;
14875
14876 if (ex9_insn_head == NULL)
14877 return;
14878
14879 table = nds32_elf_hash_table (info);
14880 target_optimize = table->target_optimize;
14881 ex9_insn = ex9_insn_head;
14882 while (ex9_insn)
14883 {
14884 ex9_relax_size = ex9_insn->times * 2 + ex9_relax_size;
14885 temp = ex9_insn;
14886 ex9_insn = ex9_insn->next;
14887 free (temp);
14888 }
14889 ex9_insn_head = NULL;
14890
14891 if ((target_optimize & NDS32_RELAX_JUMP_IFC_ON))
14892 {
14893 /* Examine ifc reduce size. */
14894 struct elf_nds32_ifc_symbol_entry *ifc_ent = ifc_symbol_head;
14895 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
14896 int size = 0;
14897
14898 while (ifc_ent)
14899 {
14900 if (ifc_ent->enable == 0)
14901 {
14902 /* Not ifc yet. */
14903 irel_ptr = ifc_ent->irel_head;
14904 while (irel_ptr)
14905 {
14906 size += 2;
14907 irel_ptr = irel_ptr->next;
14908 }
14909 }
14910 size -= 2;
14911 ifc_ent = ifc_ent->next;
14912 }
14913 ex9_relax_size += size;
14914 }
14915}
14916
14917/* Finish ex9 table. */
14918
14919void
14920nds32_elf_ex9_finish (struct bfd_link_info *link_info)
14921{
35c08157
KLC
14922 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
14923 nds32_elf_order_insn_times (link_info);
14924 nds32_elf_ex9_total_relax (link_info);
14925 /* Traverse the hash table and count its times. */
14926 nds32_elf_code_hash_traverse (nds32_elf_count_insn_times);
14927 nds32_elf_order_insn_times (link_info);
14928 nds32_elf_ex9_build_itable (link_info);
35c08157
KLC
14929}
14930
14931/* Relocate the entries in ex9 table. */
14932
14933static bfd_vma
14934nds32_elf_ex9_reloc_insn (struct elf_nds32_insn_times_entry *ptr,
14935 struct bfd_link_info *link_info)
14936{
14937 Elf_Internal_Sym *isym = NULL;
14938 bfd_vma relocation = -1;
1c8f6a4d 14939 struct elf_link_hash_entry *h;
35c08157
KLC
14940
14941 if (ptr->m_list != NULL)
14942 {
14943 /* Global symbol. */
1c8f6a4d
KLC
14944 h = ptr->m_list->h_list->h;
14945 if ((h->root.type == bfd_link_hash_defined
14946 || h->root.type == bfd_link_hash_defweak)
14947 && h->root.u.def.section != NULL
14948 && h->root.u.def.section->output_section != NULL)
35c08157
KLC
14949 {
14950
1c8f6a4d
KLC
14951 relocation = h->root.u.def.value +
14952 h->root.u.def.section->output_section->vma +
14953 h->root.u.def.section->output_offset;
35c08157
KLC
14954 relocation += ptr->m_list->irel->r_addend;
14955 }
14956 else
14957 relocation = 0;
14958 }
14959 else if (ptr->sec !=NULL)
14960 {
14961 /* Local symbol. */
14962 Elf_Internal_Sym sym;
14963 asection *sec = NULL;
14964 asection isec;
14965 asection *isec_ptr = &isec;
14966 Elf_Internal_Rela irel_backup = *(ptr->irel);
14967 asection *sec_backup = ptr->sec;
14968 bfd *abfd = ptr->sec->owner;
14969
14970 if (!nds32_get_local_syms (abfd, sec, &isym))
14971 return FALSE;
14972 isym = isym + ELF32_R_SYM (ptr->irel->r_info);
14973
14974 sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
14975 if (sec != NULL)
14976 *isec_ptr = *sec;
14977 sym = *isym;
14978
14979 /* The purpose is same as elf_link_input_bfd. */
14980 if (isec_ptr != NULL
14981 && isec_ptr->sec_info_type == SEC_INFO_TYPE_MERGE
14982 && ELF_ST_TYPE (isym->st_info) != STT_SECTION)
14983 {
14984 sym.st_value =
14985 _bfd_merged_section_offset (ptr->sec->output_section->owner, &isec_ptr,
14986 elf_section_data (isec_ptr)->sec_info,
14987 isym->st_value);
14988 }
14989 relocation = _bfd_elf_rela_local_sym (link_info->output_bfd, &sym,
14990 &ptr->sec, ptr->irel);
14991 if (ptr->irel != NULL)
14992 relocation += ptr->irel->r_addend;
14993
14994 /* Restore origin value since there may be some insntructions that
14995 could not be replaced with ex9.it. */
14996 *(ptr->irel) = irel_backup;
14997 ptr->sec = sec_backup;
14998 }
14999
15000 return relocation;
15001}
15002
15003/* Import ex9 table and build list. */
15004
15005void
15006nds32_elf_ex9_import_table (struct bfd_link_info *info)
15007{
1c8f6a4d 15008 int num = 0;
35c08157
KLC
15009 bfd_byte *contents;
15010 unsigned long insn;
15011 FILE *ex9_import_file;
15012 int update_ex9_table;
15013 struct elf_nds32_link_hash_table *table;
15014
15015 table = nds32_elf_hash_table (info);
15016 ex9_import_file = table->ex9_import_file;
1c8f6a4d 15017 rewind (table->ex9_import_file);
35c08157
KLC
15018
15019 contents = bfd_malloc (sizeof (bfd_byte) * 4);
15020
35c08157 15021 /* Read instructions from the input file and build the list. */
1c8f6a4d 15022 while (!feof (ex9_import_file))
35c08157
KLC
15023 {
15024 char *code;
15025 struct elf_nds32_insn_times_entry *ptr;
15026 size_t nread;
15027
15028 nread = fread (contents, sizeof (bfd_byte) * 4, 1, ex9_import_file);
1c8f6a4d
KLC
15029 /* Ignore the final byte 0x0a. */
15030 if (nread < 1)
15031 break;
35c08157
KLC
15032 insn = bfd_getb32 (contents);
15033 code = bfd_malloc (sizeof (char) * 9);
15034 snprintf (code, 9, "%08lx", insn);
15035 ptr = bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
15036 ptr->string = code;
15037 ptr->order = num;
15038 ptr->times = -1;
15039 ptr->sec = NULL;
15040 ptr->m_list = NULL;
15041 ptr->rel_backup.r_offset = 0;
15042 ptr->rel_backup.r_info = 0;
15043 ptr->rel_backup.r_addend = 0;
15044 ptr->irel = NULL;
15045 ptr->next = NULL;
15046 nds32_elf_ex9_insert_entry (ptr);
35c08157
KLC
15047 num++;
15048 }
15049
15050 update_ex9_table = table->update_ex9_table;
15051 if (update_ex9_table == 1)
15052 {
15053 /* It has to consider of sethi need to use multiple page
15054 but it not be done yet. */
15055 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
15056 nds32_elf_order_insn_times (info);
15057 }
15058}
15059
15060/* Export ex9 table. */
15061
15062static void
15063nds32_elf_ex9_export (struct bfd_link_info *info,
15064 bfd_byte *contents, int size)
15065{
15066 FILE *ex9_export_file;
15067 struct elf_nds32_link_hash_table *table;
15068
15069 table = nds32_elf_hash_table (info);
15070 ex9_export_file = table->ex9_export_file;
15071 fwrite (contents, sizeof (bfd_byte), size, ex9_export_file);
15072 fclose (ex9_export_file);
15073}
15074
15075/* Adjust relocations of J and JAL in ex9.itable.
15076 Export ex9 table. */
15077
1c8f6a4d 15078static void
35c08157
KLC
15079nds32_elf_ex9_reloc_jmp (struct bfd_link_info *link_info)
15080{
15081 asection *table_sec = NULL;
15082 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
15083 struct elf_nds32_insn_times_entry *temp_ptr, *temp_ptr2;
15084 bfd *it_abfd;
1c8f6a4d 15085 uint32_t insn, insn_with_reg, source_insn;
35c08157
KLC
15086 bfd_byte *contents = NULL, *source_contents = NULL;
15087 int size = 0;
15088 bfd_vma gp;
15089 int shift, update_ex9_table, offset = 0;
15090 reloc_howto_type *howto = NULL;
15091 Elf_Internal_Rela rel_backup;
15092 unsigned short insn_ex9;
15093 struct elf_nds32_link_hash_table *table;
1c8f6a4d
KLC
15094 FILE *ex9_export_file;
15095 static bfd_boolean done = FALSE;
15096
15097 if (done)
15098 return;
15099
15100 done = TRUE;
35c08157
KLC
15101
15102 table = nds32_elf_hash_table (link_info);
15103 if (table)
15104 table->relax_status |= NDS32_RELAX_EX9_DONE;
15105
15106
15107 update_ex9_table = table->update_ex9_table;
15108 /* Generated ex9.itable exactly. */
15109 if (update_ex9_table == 0)
15110 {
15111 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
c72f2fb2 15112 it_abfd = it_abfd->link.next)
35c08157
KLC
15113 {
15114 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
15115 if (table_sec != NULL)
15116 break;
15117 }
15118
15119 if (table_sec != NULL)
15120 {
15121 bfd *output_bfd;
35c08157
KLC
15122
15123 output_bfd = table_sec->output_section->owner;
15124 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15125 if (table_sec->size == 0)
15126 return;
15127
0c4bd9d9 15128 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE))
35c08157 15129 return;
35c08157
KLC
15130 }
15131 }
15132 else
15133 {
15134 /* Set gp. */
15135 bfd *output_bfd;
15136
15137 output_bfd = link_info->input_bfds->sections->output_section->owner;
15138 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15139 contents = bfd_malloc (sizeof (bfd_byte) * 2048);
15140 }
15141
15142 /* Relocate instruction. */
15143 while (ex9_insn)
15144 {
15145 bfd_vma relocation, min_relocation = 0xffffffff;
15146
15147 insn = strtol (ex9_insn->string, NULL, 16);
15148 insn_with_reg = 0;
15149 if (ex9_insn->m_list != NULL || ex9_insn->sec != NULL)
15150 {
15151 if (ex9_insn->m_list)
15152 rel_backup = ex9_insn->m_list->rel_backup;
15153 else
15154 rel_backup = ex9_insn->rel_backup;
15155
15156 nds32_elf_get_insn_with_reg (&rel_backup, insn, &insn_with_reg);
15157 howto =
15158 bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE
15159 (rel_backup.r_info));
15160 shift = howto->rightshift;
15161 if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_25_PCREL_RELA
15162 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_ORI_RELA
15163 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_RELA
15164 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S1_RELA
15165 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S2_RELA)
15166 {
15167 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15168 insn =
15169 insn_with_reg | ((relocation >> shift) &
15170 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15171 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC
15172 }
15173 else if ((ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3
15174 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0)
15175 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3_RELA
15176 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0_RELA)
15177 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA12S2_DP_RELA
15178 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA12S2_SP_RELA)
15179 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA16S3_RELA
15180 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA19S0_RELA))
15181 {
15182 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15183 insn =
15184 insn_with_reg | (((relocation - gp) >> shift) &
15185 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15186 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC
15187 }
15188 else if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_HI20_RELA)
15189 {
15190 /* Sethi may be multiple entry for one insn. */
1c8f6a4d
KLC
15191 if (ex9_insn->next && ex9_insn->m_list
15192 && ex9_insn->m_list == ex9_insn->next->m_list)
35c08157
KLC
15193 {
15194 struct elf_link_hash_entry_mul_list *m_list;
15195 struct elf_nds32_ex9_refix *fix_ptr;
1c8f6a4d 15196 struct elf_link_hash_entry *h;
35c08157
KLC
15197
15198 temp_ptr = ex9_insn;
15199 temp_ptr2 = ex9_insn;
15200 m_list = ex9_insn->m_list;
15201 while (m_list)
15202 {
1c8f6a4d
KLC
15203 h = m_list->h_list->h;
15204 relocation = h->root.u.def.value +
15205 h->root.u.def.section->output_section->vma +
15206 h->root.u.def.section->output_offset;
35c08157
KLC
15207 relocation += m_list->irel->r_addend;
15208
15209 if (relocation < min_relocation)
15210 min_relocation = relocation;
15211 m_list = m_list->next;
15212 }
15213 relocation = min_relocation;
15214
15215 /* Put insntruction into ex9 table. */
15216 insn = insn_with_reg
15217 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15218 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC
15219 relocation = relocation + 0x1000; /* hi20 */
15220
1c8f6a4d
KLC
15221 while (ex9_insn->next && ex9_insn->m_list
15222 && ex9_insn->m_list == ex9_insn->next->m_list)
35c08157
KLC
15223 {
15224 /* Multiple sethi. */
15225 ex9_insn = ex9_insn->next;
15226 size += 4;
35c08157
KLC
15227 insn =
15228 insn_with_reg | ((relocation >> shift) &
15229 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15230 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC
15231 relocation = relocation + 0x1000; /* hi20 */
15232 }
15233
15234 fix_ptr = ex9_refix_head;
15235 while (fix_ptr)
15236 {
15237 /* Fix ex9 insn. */
15238 /* temp_ptr2 points to the head of multiple sethi. */
15239 temp_ptr = temp_ptr2;
15240 while (fix_ptr->order != temp_ptr->order && fix_ptr->next)
15241 {
15242 fix_ptr = fix_ptr->next;
15243 }
15244 if (fix_ptr->order != temp_ptr->order)
15245 break;
15246
15247 /* Set source insn. */
1c8f6a4d
KLC
15248 relocation =
15249 fix_ptr->h->root.u.def.value +
15250 fix_ptr->h->root.u.def.section->output_section->vma +
15251 fix_ptr->h->root.u.def.section->output_offset;
35c08157
KLC
15252 relocation += fix_ptr->irel->r_addend;
15253 /* sethi imm is imm20s. */
15254 source_insn = insn_with_reg | ((relocation >> shift) & 0xfffff);
15255
15256 while (temp_ptr)
15257 {
35c08157
KLC
15258 /* Match entry and source code. */
15259 insn = bfd_getb32 (contents + (temp_ptr->order) * 4 + offset);
15260 if (insn == source_insn)
15261 {
15262 /* Fix the ex9 insn. */
15263 if (temp_ptr->order != fix_ptr->order)
15264 {
15265 if (!nds32_get_section_contents
15266 (fix_ptr->sec->owner, fix_ptr->sec,
0c4bd9d9 15267 &source_contents, TRUE))
4eca0228 15268 _bfd_error_handler
35c08157
KLC
15269 (_("Linker: error cannot fixed ex9 relocation \n"));
15270 if (temp_ptr->order < 32)
15271 insn_ex9 = INSN_EX9_IT_2;
15272 else
15273 insn_ex9 = INSN_EX9_IT_1;
15274 insn_ex9 = insn_ex9 | temp_ptr->order;
15275 bfd_putb16 (insn_ex9, source_contents + fix_ptr->irel->r_offset);
15276 }
15277 break;
15278 }
15279 else
15280 {
15281 if (!temp_ptr->next || temp_ptr->m_list != temp_ptr->next->m_list)
4eca0228 15282 _bfd_error_handler
35c08157
KLC
15283 (_("Linker: error cannot fixed ex9 relocation \n"));
15284 else
15285 temp_ptr = temp_ptr->next;
15286 }
15287 }
15288 fix_ptr = fix_ptr->next;
15289 }
15290 }
15291 else
15292 {
15293 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15294 insn = insn_with_reg
15295 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15296 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC
15297 }
15298 }
15299 }
15300 else
15301 {
15302 /* Insn without relocation does not have to be fixed
15303 if need to update export table. */
15304 if (update_ex9_table == 1)
15305 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15306 }
15307 ex9_insn = ex9_insn->next;
15308 size += 4;
15309 }
15310
15311 ex9_export_file = table->ex9_export_file;
15312 if (ex9_export_file != NULL)
1c8f6a4d 15313 nds32_elf_ex9_export (link_info, contents, table_sec->size);
35c08157
KLC
15314 else if (update_ex9_table == 1)
15315 {
1c8f6a4d
KLC
15316 table->ex9_export_file = table->ex9_import_file;
15317 rewind (table->ex9_export_file);
15318 nds32_elf_ex9_export (link_info, contents, size);
35c08157
KLC
15319 }
15320}
15321
15322/* Generate ex9 hash table. */
15323
15324static bfd_boolean
f4cb41f4 15325nds32_elf_ex9_build_hash_table (bfd *abfd, asection *sec,
35c08157
KLC
15326 struct bfd_link_info *link_info)
15327{
15328 Elf_Internal_Rela *internal_relocs;
15329 Elf_Internal_Rela *irelend;
15330 Elf_Internal_Rela *irel;
15331 Elf_Internal_Rela *jrel;
15332 Elf_Internal_Rela rel_backup;
15333 Elf_Internal_Shdr *symtab_hdr;
15334 Elf_Internal_Sym *isym = NULL;
15335 asection *isec;
15336 struct elf_link_hash_entry **sym_hashes;
15337 bfd_byte *contents = NULL;
f4cb41f4 15338 bfd_vma off = 0;
35c08157 15339 unsigned long r_symndx;
1c8f6a4d 15340 uint32_t insn, insn_with_reg;
35c08157
KLC
15341 struct elf_link_hash_entry *h;
15342 int data_flag, shift, align;
15343 bfd_vma relocation;
15344 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
15345 reloc_howto_type *howto = NULL;
15346
15347 sym_hashes = elf_sym_hashes (abfd);
15348 /* Load section instructions, relocations, and symbol table. */
0c4bd9d9 15349 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
35c08157
KLC
15350 return FALSE;
15351
15352 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
15353 TRUE /* keep_memory */);
15354 irelend = internal_relocs + sec->reloc_count;
15355 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
15356 if (!nds32_get_local_syms (abfd, sec, &isym))
15357 return FALSE;
15358
15359 /* Check the object if enable ex9. */
15360 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
15361 R_NDS32_RELAX_ENTRY);
15362
15363 /* Check this section trigger ex9 relaxation. */
15364 if (irel == NULL
15365 || irel >= irelend
15366 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
15367 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
15368 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
15369 return TRUE;
15370
15371 irel = internal_relocs;
15372
15373 /* Push each insn into hash table. */
15374 while (off < sec->size)
15375 {
15376 char code[10];
15377 struct elf_nds32_code_hash_entry *entry;
15378
15379 while (irel != NULL && irel < irelend && irel->r_offset < off)
15380 irel++;
15381
1c8f6a4d
KLC
15382 data_flag = nds32_elf_ex9_relocation_check (link_info, &irel, irelend,
15383 NULL, sec, &off, contents);
35c08157
KLC
15384 if (data_flag & DATA_EXIST)
15385 {
15386 /* We save the move offset in the highest byte. */
15387 off += (data_flag >> 24);
15388 continue;
15389 }
15390
15391 if (*(contents + off) & 0x80)
15392 {
15393 off += 2;
15394 }
15395 else
15396 {
15397 h = NULL;
15398 isec = NULL;
15399 jrel = NULL;
15400 rel_backup.r_info = 0;
15401 rel_backup.r_offset = 0;
15402 rel_backup.r_addend = 0;
15403 /* Load the instruction and its opcode with register for comparing. */
15404 insn = bfd_getb32 (contents + off);
15405 insn_with_reg = 0;
15406 if (irel != NULL && irel < irelend && irel->r_offset == off)
15407 {
15408 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
15409 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
15410 shift = howto->rightshift;
15411 align = (1 << shift) - 1;
15412 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
15413 || ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA
15414 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
15415 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
15416 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
15417 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
15418 ||(ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15419 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15420 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15421 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15422 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15423 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15424 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15425 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15426 {
15427 r_symndx = ELF32_R_SYM (irel->r_info);
15428 jrel = irel;
15429 rel_backup = *irel;
15430 if (r_symndx < symtab_hdr->sh_info)
15431 {
15432 /* Local symbol. */
15433 int shndx = isym[r_symndx].st_shndx;
15434
15435 bfd_vma st_value = (isym + r_symndx)->st_value;
15436 isec = elf_elfsections (abfd)[shndx]->bfd_section;
15437 relocation = (isec->output_section->vma + isec->output_offset
15438 + st_value + irel->r_addend);
15439 }
15440 else
15441 {
15442 /* External symbol. */
15443 bfd_boolean warned ATTRIBUTE_UNUSED;
15444 bfd_boolean ignored ATTRIBUTE_UNUSED;
15445 bfd_boolean unresolved_reloc ATTRIBUTE_UNUSED;
15446 asection *sym_sec;
15447
15448 /* Maybe there is a better way to get h and relocation */
15449 RELOC_FOR_GLOBAL_SYMBOL (link_info, abfd, sec, irel,
15450 r_symndx, symtab_hdr, sym_hashes,
15451 h, sym_sec, relocation,
15452 unresolved_reloc, warned, ignored);
15453 relocation += irel->r_addend;
1c8f6a4d
KLC
15454 if ((h->root.type != bfd_link_hash_defined
15455 && h->root.type != bfd_link_hash_defweak)
15456 || strcmp (h->root.root.string, "_FP_BASE_") == 0)
35c08157
KLC
15457 {
15458 off += 4;
15459 continue;
15460 }
15461 }
15462
15463 /* Check for gp relative instruction alignment. */
15464 if ((ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15465 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15466 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15467 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15468 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15469 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15470 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15471 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15472 {
15473 bfd_vma gp;
15474 bfd *output_bfd = sec->output_section->owner;
15475 bfd_reloc_status_type r;
15476
15477 /* If the symbol is in the abs section, the out_bfd will be null.
15478 This happens when the relocation has a symbol@GOTOFF. */
15479 r = nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15480 if (r != bfd_reloc_ok)
15481 {
15482 off += 4;
15483 continue;
15484 }
15485
15486 relocation -= gp;
15487
15488 /* Make sure alignment is correct. */
15489 if (relocation & align)
15490 {
15491 /* Incorrect alignment. */
4eca0228 15492 _bfd_error_handler
35c08157
KLC
15493 (_("%s: warning: unaligned small data access. "
15494 "For entry: {%d, %d, %d}, addr = 0x%x, align = 0x%x."),
15495 bfd_get_filename (abfd), irel->r_offset,
15496 irel->r_info, irel->r_addend, relocation, align);
15497 off += 4;
15498 continue;
15499 }
15500 }
15501
15502 insn = insn_with_reg
15503 | ((relocation >> shift) & nds32_elf_irel_mask (irel));
15504 }
15505 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
1c8f6a4d
KLC
15506 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
15507 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
35c08157
KLC
15508 {
15509 /* These relocations do not have to relocate contens, so it can
15510 be regard as instruction without relocation. */
15511 }
15512 else
15513 {
15514 off += 4;
15515 continue;
15516 }
15517 }
15518
1c8f6a4d 15519 snprintf (code, sizeof (code), "%08x", insn);
35c08157
KLC
15520 /* Copy "code". */
15521 entry = (struct elf_nds32_code_hash_entry*)
15522 bfd_hash_lookup (&ex9_code_table, code, TRUE, TRUE);
15523 if (entry == NULL)
15524 {
4eca0228 15525 _bfd_error_handler
35c08157
KLC
15526 (_("%P%F: failed creating ex9.it %s hash table: %E\n"), code);
15527 return FALSE;
15528 }
15529 if (h)
15530 {
15531 if (h->root.type == bfd_link_hash_undefined)
15532 return TRUE;
15533 /* Global symbol. */
15534 /* In order to do sethi with different symbol but same value. */
15535 if (entry->m_list == NULL)
15536 {
15537 struct elf_link_hash_entry_mul_list *m_list_new;
15538 struct elf_link_hash_entry_list *h_list_new;
15539
15540 m_list_new = (struct elf_link_hash_entry_mul_list *)
15541 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15542 h_list_new = (struct elf_link_hash_entry_list *)
15543 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15544 entry->m_list = m_list_new;
15545 m_list_new->h_list = h_list_new;
15546 m_list_new->rel_backup = rel_backup;
15547 m_list_new->times = 1;
15548 m_list_new->irel = jrel;
15549 m_list_new->next = NULL;
15550 h_list_new->h = h;
15551 h_list_new->next = NULL;
15552 }
15553 else
15554 {
15555 struct elf_link_hash_entry_mul_list *m_list = entry->m_list;
15556 struct elf_link_hash_entry_list *h_list;
15557
15558 while (m_list)
15559 {
15560 /* Build the different symbols that point to the same address. */
15561 h_list = m_list->h_list;
15562 if (h_list->h->root.u.def.value == h->root.u.def.value
15563 && h_list->h->root.u.def.section->output_section->vma
15564 == h->root.u.def.section->output_section->vma
15565 && h_list->h->root.u.def.section->output_offset
15566 == h->root.u.def.section->output_offset
15567 && m_list->rel_backup.r_addend == rel_backup.r_addend)
15568 {
15569 m_list->times++;
15570 m_list->irel = jrel;
15571 while (h_list->h != h && h_list->next)
15572 h_list = h_list->next;
15573 if (h_list->h != h)
15574 {
15575 struct elf_link_hash_entry_list *h_list_new;
15576
15577 h_list_new = (struct elf_link_hash_entry_list *)
15578 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15579 h_list->next = h_list_new;
15580 h_list_new->h = h;
15581 h_list_new->next = NULL;
15582 }
15583 break;
15584 }
15585 /* The sethi case may have different address but the
15586 hi20 is the same. */
15587 else if (ELF32_R_TYPE (jrel->r_info) == R_NDS32_HI20_RELA
15588 && m_list->next == NULL)
15589 {
15590 struct elf_link_hash_entry_mul_list *m_list_new;
15591 struct elf_link_hash_entry_list *h_list_new;
15592
15593 m_list_new = (struct elf_link_hash_entry_mul_list *)
15594 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15595 h_list_new = (struct elf_link_hash_entry_list *)
15596 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15597 m_list->next = m_list_new;
15598 m_list_new->h_list = h_list_new;
15599 m_list_new->rel_backup = rel_backup;
15600 m_list_new->times = 1;
15601 m_list_new->irel = jrel;
15602 m_list_new->next = NULL;
15603 h_list_new->h = h;
15604 h_list_new->next = NULL;
15605 break;
15606 }
15607 m_list = m_list->next;
15608 }
15609 if (!m_list)
15610 {
15611 off += 4;
15612 continue;
15613 }
15614 }
15615 }
15616 else
15617 {
15618 /* Local symbol and insn without relocation*/
15619 entry->times++;
15620 entry->rel_backup = rel_backup;
15621 }
15622
15623 /* Use in sethi insn with constant and global symbol in same format. */
15624 if (!jrel)
15625 entry->const_insn = 1;
15626 else
15627 entry->irel = jrel;
15628 entry->sec = isec;
15629 off += 4;
15630 }
15631 }
15632 return TRUE;
15633}
15634
15635/* Set the _ITB_BASE, and point it to ex9 table. */
15636
15637bfd_boolean
15638nds32_elf_ex9_itb_base (struct bfd_link_info *link_info)
15639{
15640 bfd *abfd;
15641 asection *sec;
15642 bfd *output_bfd = NULL;
15643 struct bfd_link_hash_entry *bh = NULL;
35c08157
KLC
15644
15645 if (is_ITB_BASE_set == 1)
15646 return TRUE;
15647
15648 is_ITB_BASE_set = 1;
15649
1c8f6a4d
KLC
15650 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_", FALSE, FALSE, TRUE);
15651
15652 if (bh && (bh->type == bfd_link_hash_defined
15653 || bh->type == bfd_link_hash_defweak))
15654 return TRUE;
35c08157
KLC
15655
15656 for (abfd = link_info->input_bfds; abfd != NULL;
c72f2fb2 15657 abfd = abfd->link.next)
35c08157
KLC
15658 {
15659 sec = bfd_get_section_by_name (abfd, ".ex9.itable");
15660 if (sec != NULL)
15661 {
15662 output_bfd = sec->output_section->owner;
15663 break;
15664 }
15665 }
15666 if (output_bfd == NULL)
15667 {
15668 output_bfd = link_info->output_bfd;
15669 if (output_bfd->sections == NULL)
15670 return TRUE;
15671 else
15672 sec = bfd_abs_section_ptr;
15673 }
15674 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_",
15675 FALSE, FALSE, TRUE);
15676 return (_bfd_generic_link_add_one_symbol
15677 (link_info, output_bfd, "_ITB_BASE_",
1c8f6a4d 15678 BSF_GLOBAL | BSF_WEAK, sec, 0,
35c08157
KLC
15679 (const char *) NULL, FALSE, get_elf_backend_data
15680 (output_bfd)->collect, &bh));
15681} /* End EX9.IT */
15682\f
15683
15684#define ELF_ARCH bfd_arch_nds32
15685#define ELF_MACHINE_CODE EM_NDS32
15686#define ELF_MAXPAGESIZE 0x1000
1c8f6a4d 15687#define ELF_TARGET_ID NDS32_ELF_DATA
35c08157 15688
6d00b590 15689#define TARGET_BIG_SYM nds32_elf32_be_vec
35c08157 15690#define TARGET_BIG_NAME "elf32-nds32be"
6d00b590 15691#define TARGET_LITTLE_SYM nds32_elf32_le_vec
35c08157
KLC
15692#define TARGET_LITTLE_NAME "elf32-nds32le"
15693
15694#define elf_info_to_howto nds32_info_to_howto
15695#define elf_info_to_howto_rel nds32_info_to_howto_rel
15696
15697#define bfd_elf32_bfd_link_hash_table_create nds32_elf_link_hash_table_create
15698#define bfd_elf32_bfd_merge_private_bfd_data nds32_elf_merge_private_bfd_data
15699#define bfd_elf32_bfd_print_private_bfd_data nds32_elf_print_private_bfd_data
15700#define bfd_elf32_bfd_relax_section nds32_elf_relax_section
15701#define bfd_elf32_bfd_set_private_flags nds32_elf_set_private_flags
15702
1c8f6a4d 15703#define bfd_elf32_mkobject nds32_elf_mkobject
35c08157
KLC
15704#define elf_backend_action_discarded nds32_elf_action_discarded
15705#define elf_backend_add_symbol_hook nds32_elf_add_symbol_hook
15706#define elf_backend_check_relocs nds32_elf_check_relocs
15707#define elf_backend_adjust_dynamic_symbol nds32_elf_adjust_dynamic_symbol
15708#define elf_backend_create_dynamic_sections nds32_elf_create_dynamic_sections
15709#define elf_backend_finish_dynamic_sections nds32_elf_finish_dynamic_sections
15710#define elf_backend_finish_dynamic_symbol nds32_elf_finish_dynamic_symbol
15711#define elf_backend_size_dynamic_sections nds32_elf_size_dynamic_sections
15712#define elf_backend_relocate_section nds32_elf_relocate_section
15713#define elf_backend_gc_mark_hook nds32_elf_gc_mark_hook
15714#define elf_backend_gc_sweep_hook nds32_elf_gc_sweep_hook
15715#define elf_backend_grok_prstatus nds32_elf_grok_prstatus
15716#define elf_backend_grok_psinfo nds32_elf_grok_psinfo
15717#define elf_backend_reloc_type_class nds32_elf_reloc_type_class
15718#define elf_backend_copy_indirect_symbol nds32_elf_copy_indirect_symbol
15719#define elf_backend_link_output_symbol_hook nds32_elf_output_symbol_hook
15720#define elf_backend_output_arch_syms nds32_elf_output_arch_syms
15721#define elf_backend_object_p nds32_elf_object_p
15722#define elf_backend_final_write_processing nds32_elf_final_write_processing
15723#define elf_backend_special_sections nds32_elf_special_sections
1c8f6a4d
KLC
15724#define bfd_elf32_bfd_get_relocated_section_contents \
15725 nds32_elf_get_relocated_section_contents
35c08157
KLC
15726
15727#define elf_backend_can_gc_sections 1
15728#define elf_backend_can_refcount 1
15729#define elf_backend_want_got_plt 1
15730#define elf_backend_plt_readonly 1
15731#define elf_backend_want_plt_sym 0
15732#define elf_backend_got_header_size 12
15733#define elf_backend_may_use_rel_p 1
15734#define elf_backend_default_use_rela_p 1
15735#define elf_backend_may_use_rela_p 1
15736
15737#include "elf32-target.h"
15738
15739#undef ELF_MAXPAGESIZE
15740#define ELF_MAXPAGESIZE 0x2000
15741
15742#undef TARGET_BIG_SYM
6d00b590 15743#define TARGET_BIG_SYM nds32_elf32_linux_be_vec
35c08157
KLC
15744#undef TARGET_BIG_NAME
15745#define TARGET_BIG_NAME "elf32-nds32be-linux"
15746#undef TARGET_LITTLE_SYM
6d00b590 15747#define TARGET_LITTLE_SYM nds32_elf32_linux_le_vec
35c08157
KLC
15748#undef TARGET_LITTLE_NAME
15749#define TARGET_LITTLE_NAME "elf32-nds32le-linux"
15750#undef elf32_bed
15751#define elf32_bed elf32_nds32_lin_bed
15752
15753#include "elf32-target.h"