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252b5132 1/* V850-specific support for 32-bit ELF
e460dd0d 2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
dbaa2011
AM
3 2006, 2007, 2008, 2009, 2010, 2011, 2012
4 Free Software Foundation, Inc.
252b5132 5
86aba9db 6 This file is part of BFD, the Binary File Descriptor library.
252b5132 7
86aba9db
NC
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
cd123cb7 10 the Free Software Foundation; either version 3 of the License, or
86aba9db 11 (at your option) any later version.
252b5132 12
86aba9db
NC
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
252b5132 17
86aba9db
NC
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
47b0e7ad
NC
20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
252b5132 22
cd123cb7 23
252b5132 24/* XXX FIXME: This code is littered with 32bit int, 16bit short, 8bit char
86aba9db 25 dependencies. As is the gas & simulator code for the v850. */
252b5132 26
252b5132 27#include "sysdep.h"
3db64b00 28#include "bfd.h"
252b5132
RH
29#include "bfdlink.h"
30#include "libbfd.h"
31#include "elf-bfd.h"
32#include "elf/v850.h"
e12dd2ea 33#include "libiberty.h"
252b5132 34
1cd986c5
NC
35/* Sign-extend a 17-bit number. */
36#define SEXT17(x) ((((x) & 0x1ffff) ^ 0x10000) - 0x10000)
37
38/* Sign-extend a 22-bit number. */
39#define SEXT22(x) ((((x) & 0x3fffff) ^ 0x200000) - 0x200000)
435b1e90 40
e460dd0d
AM
41static reloc_howto_type v850_elf_howto_table[];
42
252b5132
RH
43/* Look through the relocs for a section during the first phase, and
44 allocate space in the global offset table or procedure linkage
45 table. */
46
b34976b6 47static bfd_boolean
47b0e7ad
NC
48v850_elf_check_relocs (bfd *abfd,
49 struct bfd_link_info *info,
50 asection *sec,
51 const Elf_Internal_Rela *relocs)
252b5132 52{
b34976b6 53 bfd_boolean ret = TRUE;
252b5132
RH
54 Elf_Internal_Shdr *symtab_hdr;
55 struct elf_link_hash_entry **sym_hashes;
56 const Elf_Internal_Rela *rel;
57 const Elf_Internal_Rela *rel_end;
252b5132
RH
58 enum v850_reloc_type r_type;
59 int other = 0;
47b0e7ad 60 const char *common = NULL;
252b5132 61
1049f94e 62 if (info->relocatable)
b34976b6 63 return TRUE;
252b5132
RH
64
65#ifdef DEBUG
d003868e
AM
66 _bfd_error_handler ("v850_elf_check_relocs called for section %A in %B",
67 sec, abfd);
252b5132
RH
68#endif
69
252b5132
RH
70 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
71 sym_hashes = elf_sym_hashes (abfd);
252b5132
RH
72
73 rel_end = relocs + sec->reloc_count;
74 for (rel = relocs; rel < rel_end; rel++)
75 {
76 unsigned long r_symndx;
77 struct elf_link_hash_entry *h;
78
79 r_symndx = ELF32_R_SYM (rel->r_info);
80 if (r_symndx < symtab_hdr->sh_info)
81 h = NULL;
82 else
973a3492
L
83 {
84 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
85 while (h->root.type == bfd_link_hash_indirect
86 || h->root.type == bfd_link_hash_warning)
87 h = (struct elf_link_hash_entry *) h->root.u.i.link;
88 }
252b5132
RH
89
90 r_type = (enum v850_reloc_type) ELF32_R_TYPE (rel->r_info);
91 switch (r_type)
92 {
93 default:
94 case R_V850_NONE:
95 case R_V850_9_PCREL:
1cd986c5
NC
96 case R_V850_16_PCREL:
97 case R_V850_17_PCREL:
252b5132 98 case R_V850_22_PCREL:
1cd986c5
NC
99 case R_V850_32_PCREL:
100 case R_V850_32_ABS:
252b5132 101 case R_V850_HI16:
1cd986c5 102 case R_V850_HI16_S:
252b5132 103 case R_V850_LO16:
1cd986c5 104 case R_V850_LO16_S1:
1e50d24d 105 case R_V850_LO16_SPLIT_OFFSET:
1cd986c5 106 case R_V850_23:
e30ddb24
NC
107 case R_V850_ABS32:
108 case R_V850_REL32:
252b5132 109 case R_V850_16:
1cd986c5
NC
110 case R_V850_16_S1:
111 case R_V850_16_SPLIT_OFFSET:
252b5132
RH
112 case R_V850_8:
113 case R_V850_CALLT_6_7_OFFSET:
1cd986c5 114 case R_V850_CALLT_15_16_OFFSET:
252b5132
RH
115 case R_V850_CALLT_16_16_OFFSET:
116 break;
117
118 /* This relocation describes the C++ object vtable hierarchy.
119 Reconstruct it for later use during GC. */
120 case R_V850_GNU_VTINHERIT:
c152c796 121 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 122 return FALSE;
252b5132
RH
123 break;
124
e12dd2ea
NC
125 /* This relocation describes which C++ vtable entries
126 are actually used. Record for later use during GC. */
252b5132 127 case R_V850_GNU_VTENTRY:
d17e0c6e
JB
128 BFD_ASSERT (h != NULL);
129 if (h != NULL
130 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
b34976b6 131 return FALSE;
252b5132
RH
132 break;
133
134 case R_V850_SDA_16_16_SPLIT_OFFSET:
135 case R_V850_SDA_16_16_OFFSET:
136 case R_V850_SDA_15_16_OFFSET:
137 other = V850_OTHER_SDA;
138 common = ".scommon";
139 goto small_data_common;
435b1e90 140
252b5132
RH
141 case R_V850_ZDA_16_16_SPLIT_OFFSET:
142 case R_V850_ZDA_16_16_OFFSET:
143 case R_V850_ZDA_15_16_OFFSET:
144 other = V850_OTHER_ZDA;
145 common = ".zcommon";
146 goto small_data_common;
435b1e90 147
252b5132 148 case R_V850_TDA_4_4_OFFSET:
1cd986c5
NC
149 case R_V850_TDA_4_5_OFFSET:
150 case R_V850_TDA_7_7_OFFSET:
252b5132
RH
151 case R_V850_TDA_6_8_OFFSET:
152 case R_V850_TDA_7_8_OFFSET:
252b5132
RH
153 case R_V850_TDA_16_16_OFFSET:
154 other = V850_OTHER_TDA;
155 common = ".tcommon";
156 /* fall through */
157
158#define V850_OTHER_MASK (V850_OTHER_TDA | V850_OTHER_SDA | V850_OTHER_ZDA)
159
160 small_data_common:
161 if (h)
162 {
e12dd2ea
NC
163 /* Flag which type of relocation was used. */
164 h->other |= other;
252b5132
RH
165 if ((h->other & V850_OTHER_MASK) != (other & V850_OTHER_MASK)
166 && (h->other & V850_OTHER_ERROR) == 0)
167 {
168 const char * msg;
169 static char buff[200]; /* XXX */
170
171 switch (h->other & V850_OTHER_MASK)
172 {
173 default:
174 msg = _("Variable `%s' cannot occupy in multiple small data regions");
175 break;
176 case V850_OTHER_SDA | V850_OTHER_ZDA | V850_OTHER_TDA:
177 msg = _("Variable `%s' can only be in one of the small, zero, and tiny data regions");
178 break;
179 case V850_OTHER_SDA | V850_OTHER_ZDA:
180 msg = _("Variable `%s' cannot be in both small and zero data regions simultaneously");
181 break;
182 case V850_OTHER_SDA | V850_OTHER_TDA:
183 msg = _("Variable `%s' cannot be in both small and tiny data regions simultaneously");
184 break;
185 case V850_OTHER_ZDA | V850_OTHER_TDA:
186 msg = _("Variable `%s' cannot be in both zero and tiny data regions simultaneously");
187 break;
188 }
189
190 sprintf (buff, msg, h->root.root.string);
191 info->callbacks->warning (info, buff, h->root.root.string,
dc810e39
AM
192 abfd, h->root.u.def.section,
193 (bfd_vma) 0);
252b5132
RH
194
195 bfd_set_error (bfd_error_bad_value);
196 h->other |= V850_OTHER_ERROR;
b34976b6 197 ret = FALSE;
252b5132
RH
198 }
199 }
200
201 if (h && h->root.type == bfd_link_hash_common
202 && h->root.u.c.p
203 && !strcmp (bfd_get_section_name (abfd, h->root.u.c.p->section), "COMMON"))
204 {
e12dd2ea
NC
205 asection * section;
206
207 section = h->root.u.c.p->section = bfd_make_section_old_way (abfd, common);
252b5132
RH
208 section->flags |= SEC_IS_COMMON;
209 }
210
211#ifdef DEBUG
212 fprintf (stderr, "v850_elf_check_relocs, found %s relocation for %s%s\n",
213 v850_elf_howto_table[ (int)r_type ].name,
214 (h && h->root.root.string) ? h->root.root.string : "<unknown>",
215 (h->root.type == bfd_link_hash_common) ? ", symbol is common" : "");
216#endif
217 break;
218 }
219 }
220
221 return ret;
222}
223
e12dd2ea
NC
224/* In the old version, when an entry was checked out from the table,
225 it was deleted. This produced an error if the entry was needed
226 more than once, as the second attempted retry failed.
227
228 In the current version, the entry is not deleted, instead we set
b34976b6 229 the field 'found' to TRUE. If a second lookup matches the same
e12dd2ea
NC
230 entry, then we know that the hi16s reloc has already been updated
231 and does not need to be updated a second time.
232
233 TODO - TOFIX: If it is possible that we need to restore 2 different
234 addresses from the same table entry, where the first generates an
235 overflow, whilst the second do not, then this code will fail. */
252b5132
RH
236
237typedef struct hi16s_location
238{
47b0e7ad
NC
239 bfd_vma addend;
240 bfd_byte * address;
241 unsigned long counter;
242 bfd_boolean found;
243 struct hi16s_location * next;
252b5132
RH
244}
245hi16s_location;
246
47b0e7ad
NC
247static hi16s_location * previous_hi16s;
248static hi16s_location * free_hi16s;
249static unsigned long hi16s_counter;
252b5132
RH
250
251static void
47b0e7ad 252remember_hi16s_reloc (bfd *abfd, bfd_vma addend, bfd_byte *address)
252b5132
RH
253{
254 hi16s_location * entry = NULL;
dc810e39 255 bfd_size_type amt = sizeof (* free_hi16s);
435b1e90 256
252b5132
RH
257 /* Find a free structure. */
258 if (free_hi16s == NULL)
47b0e7ad 259 free_hi16s = bfd_zalloc (abfd, amt);
252b5132
RH
260
261 entry = free_hi16s;
262 free_hi16s = free_hi16s->next;
435b1e90 263
252b5132
RH
264 entry->addend = addend;
265 entry->address = address;
266 entry->counter = hi16s_counter ++;
b34976b6 267 entry->found = FALSE;
252b5132
RH
268 entry->next = previous_hi16s;
269 previous_hi16s = entry;
435b1e90 270
252b5132
RH
271 /* Cope with wrap around of our counter. */
272 if (hi16s_counter == 0)
273 {
47b0e7ad 274 /* XXX: Assume that all counter entries differ only in their low 16 bits. */
252b5132
RH
275 for (entry = previous_hi16s; entry != NULL; entry = entry->next)
276 entry->counter &= 0xffff;
277
278 hi16s_counter = 0x10000;
279 }
252b5132
RH
280}
281
282static bfd_byte *
47b0e7ad 283find_remembered_hi16s_reloc (bfd_vma addend, bfd_boolean *already_found)
252b5132 284{
b34976b6
AM
285 hi16s_location *match = NULL;
286 hi16s_location *entry;
b34976b6 287 bfd_byte *addr;
435b1e90 288
252b5132
RH
289 /* Search the table. Record the most recent entry that matches. */
290 for (entry = previous_hi16s; entry; entry = entry->next)
291 {
292 if (entry->addend == addend
293 && (match == NULL || match->counter < entry->counter))
294 {
252b5132
RH
295 match = entry;
296 }
252b5132
RH
297 }
298
299 if (match == NULL)
300 return NULL;
301
302 /* Extract the address. */
303 addr = match->address;
304
4cc11e76 305 /* Remember if this entry has already been used before. */
252b5132
RH
306 if (already_found)
307 * already_found = match->found;
308
309 /* Note that this entry has now been used. */
b34976b6 310 match->found = TRUE;
435b1e90 311
252b5132 312 return addr;
435b1e90 313}
252b5132 314
1e50d24d
RS
315/* Calculate the final operand value for a R_V850_LO16 or
316 R_V850_LO16_SPLIT_OFFSET. *INSN is the current operand value and
317 ADDEND is the sum of the relocation symbol and offset. Store the
318 operand value in *INSN and return true on success.
319
320 The assembler has already done some of this: If the value stored in
321 the instruction has its 15th bit set, (counting from zero) then the
322 assembler will have added 1 to the value stored in the associated
323 HI16S reloc. So for example, these relocations:
324
325 movhi hi( fred ), r0, r1
326 movea lo( fred ), r1, r1
327
328 will store 0 in the value fields for the MOVHI and MOVEA instructions
329 and addend will be the address of fred, but for these instructions:
330
1cd986c5
NC
331 movhi hi( fred + 0x123456 ), r0, r1
332 movea lo( fred + 0x123456 ), r1, r1
1e50d24d
RS
333
334 the value stored in the MOVHI instruction will be 0x12 and the value
335 stored in the MOVEA instruction will be 0x3456. If however the
336 instructions were:
337
1cd986c5
NC
338 movhi hi( fred + 0x10ffff ), r0, r1
339 movea lo( fred + 0x10ffff ), r1, r1
1e50d24d
RS
340
341 then the value stored in the MOVHI instruction would be 0x11 (not
342 0x10) and the value stored in the MOVEA instruction would be 0xffff.
343 Thus (assuming for the moment that the addend is 0), at run time the
344 MOVHI instruction loads 0x110000 into r1, then the MOVEA instruction
345 adds 0xffffffff (sign extension!) producing 0x10ffff. Similarly if
346 the instructions were:
347
1cd986c5
NC
348 movhi hi( fred - 1 ), r0, r1
349 movea lo( fred - 1 ), r1, r1
1e50d24d
RS
350
351 then 0 is stored in the MOVHI instruction and -1 is stored in the
352 MOVEA instruction.
353
354 Overflow can occur if the addition of the value stored in the
355 instruction plus the addend sets the 15th bit when before it was clear.
356 This is because the 15th bit will be sign extended into the high part,
357 thus reducing its value by one, but since the 15th bit was originally
358 clear, the assembler will not have added 1 to the previous HI16S reloc
359 to compensate for this effect. For example:
360
1cd986c5
NC
361 movhi hi( fred + 0x123456 ), r0, r1
362 movea lo( fred + 0x123456 ), r1, r1
1e50d24d
RS
363
364 The value stored in HI16S reloc is 0x12, the value stored in the LO16
365 reloc is 0x3456. If we assume that the address of fred is 0x00007000
366 then the relocations become:
367
368 HI16S: 0x0012 + (0x00007000 >> 16) = 0x12
369 LO16: 0x3456 + (0x00007000 & 0xffff) = 0xa456
370
371 but when the instructions are executed, the MOVEA instruction's value
372 is signed extended, so the sum becomes:
373
374 0x00120000
375 + 0xffffa456
376 ------------
377 0x0011a456 but 'fred + 0x123456' = 0x0012a456
378
379 Note that if the 15th bit was set in the value stored in the LO16
380 reloc, then we do not have to do anything:
381
1cd986c5
NC
382 movhi hi( fred + 0x10ffff ), r0, r1
383 movea lo( fred + 0x10ffff ), r1, r1
1e50d24d
RS
384
385 HI16S: 0x0011 + (0x00007000 >> 16) = 0x11
386 LO16: 0xffff + (0x00007000 & 0xffff) = 0x6fff
387
388 0x00110000
389 + 0x00006fff
390 ------------
391 0x00116fff = fred + 0x10ffff = 0x7000 + 0x10ffff
392
393 Overflow can also occur if the computation carries into the 16th bit
394 and it also results in the 15th bit having the same value as the 15th
395 bit of the original value. What happens is that the HI16S reloc
396 will have already examined the 15th bit of the original value and
397 added 1 to the high part if the bit is set. This compensates for the
398 sign extension of 15th bit of the result of the computation. But now
399 there is a carry into the 16th bit, and this has not been allowed for.
400
401 So, for example if fred is at address 0xf000:
402
1cd986c5
NC
403 movhi hi( fred + 0xffff ), r0, r1 [bit 15 of the offset is set]
404 movea lo( fred + 0xffff ), r1, r1
1e50d24d
RS
405
406 HI16S: 0x0001 + (0x0000f000 >> 16) = 0x0001
407 LO16: 0xffff + (0x0000f000 & 0xffff) = 0xefff (carry into bit 16 is lost)
408
409 0x00010000
410 + 0xffffefff
411 ------------
412 0x0000efff but 'fred + 0xffff' = 0x0001efff
413
414 Similarly, if the 15th bit remains clear, but overflow occurs into
415 the 16th bit then (assuming the address of fred is 0xf000):
416
1cd986c5
NC
417 movhi hi( fred + 0x7000 ), r0, r1 [bit 15 of the offset is clear]
418 movea lo( fred + 0x7000 ), r1, r1
1e50d24d
RS
419
420 HI16S: 0x0000 + (0x0000f000 >> 16) = 0x0000
421 LO16: 0x7000 + (0x0000f000 & 0xffff) = 0x6fff (carry into bit 16 is lost)
422
423 0x00000000
424 + 0x00006fff
425 ------------
426 0x00006fff but 'fred + 0x7000' = 0x00016fff
427
428 Note - there is no need to change anything if a carry occurs, and the
429 15th bit changes its value from being set to being clear, as the HI16S
430 reloc will have already added in 1 to the high part for us:
431
1cd986c5
NC
432 movhi hi( fred + 0xffff ), r0, r1 [bit 15 of the offset is set]
433 movea lo( fred + 0xffff ), r1, r1
1e50d24d
RS
434
435 HI16S: 0x0001 + (0x00007000 >> 16)
436 LO16: 0xffff + (0x00007000 & 0xffff) = 0x6fff (carry into bit 16 is lost)
437
438 0x00010000
439 + 0x00006fff (bit 15 not set, so the top half is zero)
440 ------------
441 0x00016fff which is right (assuming that fred is at 0x7000)
442
443 but if the 15th bit goes from being clear to being set, then we must
444 once again handle overflow:
445
1cd986c5
NC
446 movhi hi( fred + 0x7000 ), r0, r1 [bit 15 of the offset is clear]
447 movea lo( fred + 0x7000 ), r1, r1
1e50d24d
RS
448
449 HI16S: 0x0000 + (0x0000ffff >> 16)
450 LO16: 0x7000 + (0x0000ffff & 0xffff) = 0x6fff (carry into bit 16)
451
452 0x00000000
453 + 0x00006fff (bit 15 not set, so the top half is zero)
454 ------------
455 0x00006fff which is wrong (assuming that fred is at 0xffff). */
456
457static bfd_boolean
458v850_elf_perform_lo16_relocation (bfd *abfd, unsigned long *insn,
459 unsigned long addend)
460{
461#define BIT15_SET(x) ((x) & 0x8000)
462#define OVERFLOWS(a,i) ((((a) & 0xffff) + (i)) > 0xffff)
47b0e7ad 463
1e50d24d
RS
464 if ((BIT15_SET (*insn + addend) && ! BIT15_SET (addend))
465 || (OVERFLOWS (addend, *insn)
466 && ((! BIT15_SET (*insn)) || (BIT15_SET (addend)))))
467 {
468 bfd_boolean already_updated;
469 bfd_byte *hi16s_address = find_remembered_hi16s_reloc
470 (addend, & already_updated);
471
472 /* Amend the matching HI16_S relocation. */
473 if (hi16s_address != NULL)
474 {
475 if (! already_updated)
476 {
477 unsigned long hi_insn = bfd_get_16 (abfd, hi16s_address);
478 hi_insn += 1;
479 bfd_put_16 (abfd, hi_insn, hi16s_address);
480 }
481 }
482 else
483 {
4a97a0e5 484 (*_bfd_error_handler) (_("FAILED to find previous HI16 reloc"));
1e50d24d
RS
485 return FALSE;
486 }
487 }
488#undef OVERFLOWS
489#undef BIT15_SET
490
491 /* Do not complain if value has top bit set, as this has been
492 anticipated. */
493 *insn = (*insn + addend) & 0xffff;
494 return TRUE;
495}
496
252b5132 497/* FIXME: The code here probably ought to be removed and the code in reloc.c
4cc11e76 498 allowed to do its stuff instead. At least for most of the relocs, anyway. */
e12dd2ea 499
252b5132 500static bfd_reloc_status_type
47b0e7ad
NC
501v850_elf_perform_relocation (bfd *abfd,
502 unsigned int r_type,
503 bfd_vma addend,
504 bfd_byte *address)
252b5132
RH
505{
506 unsigned long insn;
1e50d24d 507 unsigned long result;
252b5132 508 bfd_signed_vma saddend = (bfd_signed_vma) addend;
435b1e90 509
252b5132
RH
510 switch (r_type)
511 {
512 default:
252b5132 513 return bfd_reloc_notsupported;
435b1e90 514
e30ddb24
NC
515 case R_V850_REL32:
516 case R_V850_ABS32:
252b5132
RH
517 bfd_put_32 (abfd, addend, address);
518 return bfd_reloc_ok;
435b1e90 519
1cd986c5
NC
520 case R_V850_23:
521 insn = bfd_get_32 (abfd, address);
522 insn &= ~((0x7f << 4) | (0x7fff80 << (16-7)));
523 insn |= ((addend & 0x7f) << 4) | ((addend & 0x7fff80) << (16-7));
524 bfd_put_32 (abfd, (bfd_vma) insn, address);
525 return bfd_reloc_ok;
526
252b5132
RH
527 case R_V850_22_PCREL:
528 if (saddend > 0x1fffff || saddend < -0x200000)
529 return bfd_reloc_overflow;
435b1e90 530
252b5132
RH
531 if ((addend % 2) != 0)
532 return bfd_reloc_dangerous;
435b1e90 533
252b5132
RH
534 insn = bfd_get_32 (abfd, address);
535 insn &= ~0xfffe003f;
536 insn |= (((addend & 0xfffe) << 16) | ((addend & 0x3f0000) >> 16));
dc810e39 537 bfd_put_32 (abfd, (bfd_vma) insn, address);
252b5132 538 return bfd_reloc_ok;
435b1e90 539
1cd986c5
NC
540 case R_V850_17_PCREL:
541 if (saddend > 0xffff || saddend < -0x10000)
542 return bfd_reloc_overflow;
543
544 if ((addend % 2) != 0)
545 return bfd_reloc_dangerous;
546
547 insn = bfd_get_32 (abfd, address);
548 insn &= ~ 0xfffe0010;
549 insn |= ((addend & 0xfffe) << 16) | ((addend & 0x10000) >> (16-4));
550 break;
551
552 case R_V850_16_PCREL:
553 if ((saddend < -0xffff) || (saddend > 0))
554 return bfd_reloc_overflow;
555
556 if ((addend % 2) != 0)
557 return bfd_reloc_dangerous;
558
559 insn = bfd_get_16 (abfd, address);
560 insn &= ~0xfffe;
561 insn |= (-addend & 0xfffe);
562 break;
563
252b5132
RH
564 case R_V850_9_PCREL:
565 if (saddend > 0xff || saddend < -0x100)
566 return bfd_reloc_overflow;
435b1e90 567
252b5132
RH
568 if ((addend % 2) != 0)
569 return bfd_reloc_dangerous;
435b1e90 570
252b5132
RH
571 insn = bfd_get_16 (abfd, address);
572 insn &= ~ 0xf870;
573 insn |= ((addend & 0x1f0) << 7) | ((addend & 0x0e) << 3);
574 break;
435b1e90 575
252b5132
RH
576 case R_V850_HI16:
577 addend += (bfd_get_16 (abfd, address) << 16);
578 addend = (addend >> 16);
579 insn = addend;
580 break;
435b1e90 581
252b5132
RH
582 case R_V850_HI16_S:
583 /* Remember where this relocation took place. */
584 remember_hi16s_reloc (abfd, addend, address);
585
586 addend += (bfd_get_16 (abfd, address) << 16);
587 addend = (addend >> 16) + ((addend & 0x8000) != 0);
435b1e90
KH
588
589 /* This relocation cannot overflow. */
4d421096 590 if (addend > 0xffff)
252b5132 591 addend = 0;
435b1e90 592
252b5132
RH
593 insn = addend;
594 break;
435b1e90 595
252b5132 596 case R_V850_LO16:
1e50d24d
RS
597 insn = bfd_get_16 (abfd, address);
598 if (! v850_elf_perform_lo16_relocation (abfd, &insn, addend))
599 return bfd_reloc_overflow;
600 break;
252b5132
RH
601
602 case R_V850_8:
603 addend += (char) bfd_get_8 (abfd, address);
604
605 saddend = (bfd_signed_vma) addend;
435b1e90 606
252b5132
RH
607 if (saddend > 0x7f || saddend < -0x80)
608 return bfd_reloc_overflow;
609
610 bfd_put_8 (abfd, addend, address);
611 return bfd_reloc_ok;
612
613 case R_V850_CALLT_16_16_OFFSET:
614 addend += bfd_get_16 (abfd, address);
435b1e90 615
252b5132 616 saddend = (bfd_signed_vma) addend;
435b1e90 617
252b5132
RH
618 if (saddend > 0xffff || saddend < 0)
619 return bfd_reloc_overflow;
620
621 insn = addend;
622 break;
435b1e90 623
1cd986c5
NC
624 case R_V850_CALLT_15_16_OFFSET:
625 insn = bfd_get_16 (abfd, address);
626
627 addend += insn & 0xfffe;;
628
629 saddend = (bfd_signed_vma) addend;
630
631 if (saddend > 0xffff || saddend < 0)
632 return bfd_reloc_overflow;
633
634 insn = (0xfffe & addend)
635 | (insn & ~0xfffe);
636 break;
637
638 case R_V850_CALLT_6_7_OFFSET:
639 insn = bfd_get_16 (abfd, address);
640 addend += ((insn & 0x3f) << 1);
641
642 saddend = (bfd_signed_vma) addend;
643
644 if (saddend > 0x7e || saddend < 0)
645 return bfd_reloc_overflow;
646
647 if (addend & 1)
648 return bfd_reloc_dangerous;
649
650 insn &= 0xff80;
651 insn |= (addend >> 1);
652 break;
653
252b5132 654 case R_V850_16:
252b5132
RH
655 case R_V850_SDA_16_16_OFFSET:
656 case R_V850_ZDA_16_16_OFFSET:
657 case R_V850_TDA_16_16_OFFSET:
658 addend += bfd_get_16 (abfd, address);
435b1e90 659
252b5132 660 saddend = (bfd_signed_vma) addend;
435b1e90 661
252b5132
RH
662 if (saddend > 0x7fff || saddend < -0x8000)
663 return bfd_reloc_overflow;
664
665 insn = addend;
666 break;
435b1e90 667
1cd986c5 668 case R_V850_16_S1:
252b5132
RH
669 case R_V850_SDA_15_16_OFFSET:
670 case R_V850_ZDA_15_16_OFFSET:
671 insn = bfd_get_16 (abfd, address);
672 addend += (insn & 0xfffe);
435b1e90 673
252b5132 674 saddend = (bfd_signed_vma) addend;
435b1e90 675
252b5132
RH
676 if (saddend > 0x7ffe || saddend < -0x8000)
677 return bfd_reloc_overflow;
435b1e90 678
252b5132
RH
679 if (addend & 1)
680 return bfd_reloc_dangerous;
435b1e90 681
dc810e39 682 insn = (addend &~ (bfd_vma) 1) | (insn & 1);
252b5132 683 break;
435b1e90 684
252b5132
RH
685 case R_V850_TDA_6_8_OFFSET:
686 insn = bfd_get_16 (abfd, address);
687 addend += ((insn & 0x7e) << 1);
435b1e90 688
252b5132 689 saddend = (bfd_signed_vma) addend;
435b1e90 690
252b5132
RH
691 if (saddend > 0xfc || saddend < 0)
692 return bfd_reloc_overflow;
435b1e90 693
252b5132
RH
694 if (addend & 3)
695 return bfd_reloc_dangerous;
435b1e90 696
252b5132
RH
697 insn &= 0xff81;
698 insn |= (addend >> 1);
699 break;
435b1e90 700
252b5132
RH
701 case R_V850_TDA_7_8_OFFSET:
702 insn = bfd_get_16 (abfd, address);
703 addend += ((insn & 0x7f) << 1);
435b1e90 704
252b5132 705 saddend = (bfd_signed_vma) addend;
435b1e90 706
252b5132
RH
707 if (saddend > 0xfe || saddend < 0)
708 return bfd_reloc_overflow;
435b1e90 709
252b5132
RH
710 if (addend & 1)
711 return bfd_reloc_dangerous;
435b1e90 712
252b5132
RH
713 insn &= 0xff80;
714 insn |= (addend >> 1);
715 break;
435b1e90 716
252b5132
RH
717 case R_V850_TDA_7_7_OFFSET:
718 insn = bfd_get_16 (abfd, address);
719 addend += insn & 0x7f;
435b1e90 720
252b5132 721 saddend = (bfd_signed_vma) addend;
435b1e90 722
252b5132
RH
723 if (saddend > 0x7f || saddend < 0)
724 return bfd_reloc_overflow;
435b1e90 725
252b5132
RH
726 insn &= 0xff80;
727 insn |= addend;
728 break;
435b1e90 729
252b5132
RH
730 case R_V850_TDA_4_5_OFFSET:
731 insn = bfd_get_16 (abfd, address);
732 addend += ((insn & 0xf) << 1);
435b1e90 733
252b5132 734 saddend = (bfd_signed_vma) addend;
435b1e90 735
252b5132
RH
736 if (saddend > 0x1e || saddend < 0)
737 return bfd_reloc_overflow;
435b1e90 738
252b5132
RH
739 if (addend & 1)
740 return bfd_reloc_dangerous;
435b1e90 741
252b5132
RH
742 insn &= 0xfff0;
743 insn |= (addend >> 1);
744 break;
435b1e90 745
252b5132
RH
746 case R_V850_TDA_4_4_OFFSET:
747 insn = bfd_get_16 (abfd, address);
748 addend += insn & 0xf;
435b1e90 749
252b5132 750 saddend = (bfd_signed_vma) addend;
435b1e90 751
252b5132
RH
752 if (saddend > 0xf || saddend < 0)
753 return bfd_reloc_overflow;
435b1e90 754
252b5132
RH
755 insn &= 0xfff0;
756 insn |= addend;
757 break;
435b1e90 758
1cd986c5
NC
759 case R_V850_LO16_S1:
760 insn = bfd_get_16 (abfd, address);
761 result = insn & 0xfffe;
762 if (! v850_elf_perform_lo16_relocation (abfd, &result, addend))
763 return bfd_reloc_overflow;
764 if (result & 1)
765 return bfd_reloc_overflow;
766 insn = (result & 0xfffe)
767 | (insn & ~0xfffe);
768 bfd_put_16 (abfd, insn, address);
769 return bfd_reloc_ok;
770
1e50d24d
RS
771 case R_V850_LO16_SPLIT_OFFSET:
772 insn = bfd_get_32 (abfd, address);
773 result = ((insn & 0xfffe0000) >> 16) | ((insn & 0x20) >> 5);
774 if (! v850_elf_perform_lo16_relocation (abfd, &result, addend))
775 return bfd_reloc_overflow;
776 insn = (((result << 16) & 0xfffe0000)
777 | ((result << 5) & 0x20)
778 | (insn & ~0xfffe0020));
779 bfd_put_32 (abfd, insn, address);
780 return bfd_reloc_ok;
781
1cd986c5 782 case R_V850_16_SPLIT_OFFSET:
252b5132 783 case R_V850_SDA_16_16_SPLIT_OFFSET:
1cd986c5 784 case R_V850_ZDA_16_16_SPLIT_OFFSET:
252b5132
RH
785 insn = bfd_get_32 (abfd, address);
786 addend += ((insn & 0xfffe0000) >> 16) + ((insn & 0x20) >> 5);
435b1e90 787
252b5132 788 saddend = (bfd_signed_vma) addend;
435b1e90 789
252b5132
RH
790 if (saddend > 0x7fff || saddend < -0x8000)
791 return bfd_reloc_overflow;
435b1e90 792
252b5132
RH
793 insn &= 0x0001ffdf;
794 insn |= (addend & 1) << 5;
dc810e39 795 insn |= (addend &~ (bfd_vma) 1) << 16;
435b1e90 796
dc810e39 797 bfd_put_32 (abfd, (bfd_vma) insn, address);
252b5132 798 return bfd_reloc_ok;
435b1e90 799
252b5132
RH
800 case R_V850_GNU_VTINHERIT:
801 case R_V850_GNU_VTENTRY:
802 return bfd_reloc_ok;
803
804 }
805
dc810e39 806 bfd_put_16 (abfd, (bfd_vma) insn, address);
252b5132
RH
807 return bfd_reloc_ok;
808}
252b5132
RH
809\f
810/* Insert the addend into the instruction. */
e12dd2ea 811
252b5132 812static bfd_reloc_status_type
47b0e7ad
NC
813v850_elf_reloc (bfd *abfd ATTRIBUTE_UNUSED,
814 arelent *reloc,
815 asymbol *symbol,
816 void * data ATTRIBUTE_UNUSED,
817 asection *isection,
818 bfd *obfd,
819 char **err ATTRIBUTE_UNUSED)
252b5132
RH
820{
821 long relocation;
435b1e90 822
252b5132
RH
823 /* If there is an output BFD,
824 and the symbol is not a section name (which is only defined at final link time),
825 and either we are not putting the addend into the instruction
e12dd2ea 826 or the addend is zero, so there is nothing to add into the instruction
252b5132 827 then just fixup the address and return. */
47b0e7ad 828 if (obfd != NULL
252b5132
RH
829 && (symbol->flags & BSF_SECTION_SYM) == 0
830 && (! reloc->howto->partial_inplace
831 || reloc->addend == 0))
832 {
833 reloc->address += isection->output_offset;
834 return bfd_reloc_ok;
835 }
435b1e90 836
252b5132
RH
837 /* Catch relocs involving undefined symbols. */
838 if (bfd_is_und_section (symbol->section)
839 && (symbol->flags & BSF_WEAK) == 0
840 && obfd == NULL)
841 return bfd_reloc_undefined;
842
843 /* We handle final linking of some relocs ourselves. */
844
845 /* Is the address of the relocation really within the section? */
07515404 846 if (reloc->address > bfd_get_section_limit (abfd, isection))
252b5132 847 return bfd_reloc_outofrange;
435b1e90 848
4cc11e76 849 /* Work out which section the relocation is targeted at and the
252b5132 850 initial relocation command value. */
435b1e90 851
b34976b6 852 if (reloc->howto->pc_relative)
86aba9db
NC
853 return bfd_reloc_ok;
854
252b5132
RH
855 /* Get symbol value. (Common symbols are special.) */
856 if (bfd_is_com_section (symbol->section))
857 relocation = 0;
858 else
859 relocation = symbol->value;
435b1e90 860
252b5132
RH
861 /* Convert input-section-relative symbol value to absolute + addend. */
862 relocation += symbol->section->output_section->vma;
863 relocation += symbol->section->output_offset;
864 relocation += reloc->addend;
435b1e90 865
435b1e90 866 reloc->addend = relocation;
252b5132
RH
867 return bfd_reloc_ok;
868}
86aba9db
NC
869
870/* This function is used for relocs which are only used
871 for relaxing, which the linker should otherwise ignore. */
872
873static bfd_reloc_status_type
47b0e7ad
NC
874v850_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED,
875 arelent *reloc_entry,
876 asymbol *symbol ATTRIBUTE_UNUSED,
877 void * data ATTRIBUTE_UNUSED,
878 asection *input_section,
879 bfd *output_bfd,
880 char **error_message ATTRIBUTE_UNUSED)
86aba9db
NC
881{
882 if (output_bfd != NULL)
883 reloc_entry->address += input_section->output_offset;
884
885 return bfd_reloc_ok;
886}
47b0e7ad 887/* Note: It is REQUIRED that the 'type' value of each entry
1cd986c5
NC
888 in this array match the index of the entry in the array.
889 SeeAlso: RELOC_NUBMER in include/elf/v850.h */
47b0e7ad
NC
890static reloc_howto_type v850_elf_howto_table[] =
891{
892 /* This reloc does nothing. */
893 HOWTO (R_V850_NONE, /* Type. */
894 0, /* Rightshift. */
895 2, /* Size (0 = byte, 1 = short, 2 = long). */
896 32, /* Bitsize. */
897 FALSE, /* PC_relative. */
898 0, /* Bitpos. */
899 complain_overflow_bitfield, /* Complain_on_overflow. */
900 bfd_elf_generic_reloc, /* Special_function. */
901 "R_V850_NONE", /* Name. */
902 FALSE, /* Partial_inplace. */
903 0, /* Src_mask. */
904 0, /* Dst_mask. */
905 FALSE), /* PCrel_offset. */
906
907 /* A PC relative 9 bit branch. */
908 HOWTO (R_V850_9_PCREL, /* Type. */
1cd986c5
NC
909 0, /* Rightshift. */
910 1, /* Size (0 = byte, 1 = short, 2 = long). */
911 9, /* Bitsize. */
47b0e7ad
NC
912 TRUE, /* PC_relative. */
913 0, /* Bitpos. */
914 complain_overflow_bitfield, /* Complain_on_overflow. */
915 v850_elf_reloc, /* Special_function. */
916 "R_V850_9_PCREL", /* Name. */
917 FALSE, /* Partial_inplace. */
918 0x00ffffff, /* Src_mask. */
919 0x00ffffff, /* Dst_mask. */
920 TRUE), /* PCrel_offset. */
921
922 /* A PC relative 22 bit branch. */
923 HOWTO (R_V850_22_PCREL, /* Type. */
1cd986c5 924 0, /* Rightshift. */
47b0e7ad
NC
925 2, /* Size (0 = byte, 1 = short, 2 = long). */
926 22, /* Bitsize. */
927 TRUE, /* PC_relative. */
1cd986c5 928 0, /* Bitpos. */
47b0e7ad
NC
929 complain_overflow_signed, /* Complain_on_overflow. */
930 v850_elf_reloc, /* Special_function. */
931 "R_V850_22_PCREL", /* Name. */
932 FALSE, /* Partial_inplace. */
933 0x07ffff80, /* Src_mask. */
934 0x07ffff80, /* Dst_mask. */
935 TRUE), /* PCrel_offset. */
936
937 /* High 16 bits of symbol value. */
938 HOWTO (R_V850_HI16_S, /* Type. */
939 0, /* Rightshift. */
940 1, /* Size (0 = byte, 1 = short, 2 = long). */
941 16, /* Bitsize. */
942 FALSE, /* PC_relative. */
943 0, /* Bitpos. */
944 complain_overflow_dont, /* Complain_on_overflow. */
945 v850_elf_reloc, /* Special_function. */
946 "R_V850_HI16_S", /* Name. */
947 FALSE, /* Partial_inplace. */
948 0xffff, /* Src_mask. */
949 0xffff, /* Dst_mask. */
950 FALSE), /* PCrel_offset. */
951
952 /* High 16 bits of symbol value. */
953 HOWTO (R_V850_HI16, /* Type. */
954 0, /* Rightshift. */
955 1, /* Size (0 = byte, 1 = short, 2 = long). */
956 16, /* Bitsize. */
957 FALSE, /* PC_relative. */
958 0, /* Bitpos. */
959 complain_overflow_dont, /* Complain_on_overflow. */
960 v850_elf_reloc, /* Special_function. */
961 "R_V850_HI16", /* Name. */
962 FALSE, /* Partial_inplace. */
963 0xffff, /* Src_mask. */
964 0xffff, /* Dst_mask. */
965 FALSE), /* PCrel_offset. */
966
967 /* Low 16 bits of symbol value. */
968 HOWTO (R_V850_LO16, /* Type. */
969 0, /* Rightshift. */
970 1, /* Size (0 = byte, 1 = short, 2 = long). */
971 16, /* Bitsize. */
972 FALSE, /* PC_relative. */
973 0, /* Bitpos. */
974 complain_overflow_dont, /* Complain_on_overflow. */
975 v850_elf_reloc, /* Special_function. */
976 "R_V850_LO16", /* Name. */
977 FALSE, /* Partial_inplace. */
978 0xffff, /* Src_mask. */
979 0xffff, /* Dst_mask. */
980 FALSE), /* PCrel_offset. */
981
982 /* Simple 32bit reloc. */
983 HOWTO (R_V850_ABS32, /* Type. */
984 0, /* Rightshift. */
985 2, /* Size (0 = byte, 1 = short, 2 = long). */
986 32, /* Bitsize. */
987 FALSE, /* PC_relative. */
988 0, /* Bitpos. */
989 complain_overflow_dont, /* Complain_on_overflow. */
990 v850_elf_reloc, /* Special_function. */
991 "R_V850_ABS32", /* Name. */
992 FALSE, /* Partial_inplace. */
993 0xffffffff, /* Src_mask. */
994 0xffffffff, /* Dst_mask. */
995 FALSE), /* PCrel_offset. */
996
997 /* Simple 16bit reloc. */
998 HOWTO (R_V850_16, /* Type. */
999 0, /* Rightshift. */
1000 1, /* Size (0 = byte, 1 = short, 2 = long). */
1001 16, /* Bitsize. */
1002 FALSE, /* PC_relative. */
1003 0, /* Bitpos. */
1004 complain_overflow_dont, /* Complain_on_overflow. */
1005 bfd_elf_generic_reloc, /* Special_function. */
1006 "R_V850_16", /* Name. */
1007 FALSE, /* Partial_inplace. */
1008 0xffff, /* Src_mask. */
1009 0xffff, /* Dst_mask. */
1010 FALSE), /* PCrel_offset. */
1011
1012 /* Simple 8bit reloc. */
1013 HOWTO (R_V850_8, /* Type. */
1014 0, /* Rightshift. */
1015 0, /* Size (0 = byte, 1 = short, 2 = long). */
1016 8, /* Bitsize. */
1017 FALSE, /* PC_relative. */
1018 0, /* Bitpos. */
1019 complain_overflow_dont, /* Complain_on_overflow. */
1020 bfd_elf_generic_reloc, /* Special_function. */
1021 "R_V850_8", /* Name. */
1022 FALSE, /* Partial_inplace. */
1023 0xff, /* Src_mask. */
1024 0xff, /* Dst_mask. */
1025 FALSE), /* PCrel_offset. */
1026
1027 /* 16 bit offset from the short data area pointer. */
1028 HOWTO (R_V850_SDA_16_16_OFFSET, /* Type. */
1029 0, /* Rightshift. */
1030 1, /* Size (0 = byte, 1 = short, 2 = long). */
1031 16, /* Bitsize. */
1032 FALSE, /* PC_relative. */
1033 0, /* Bitpos. */
1034 complain_overflow_dont, /* Complain_on_overflow. */
1035 v850_elf_reloc, /* Special_function. */
1036 "R_V850_SDA_16_16_OFFSET", /* Name. */
1037 FALSE, /* Partial_inplace. */
1038 0xffff, /* Src_mask. */
1039 0xffff, /* Dst_mask. */
1040 FALSE), /* PCrel_offset. */
1041
1042 /* 15 bit offset from the short data area pointer. */
1043 HOWTO (R_V850_SDA_15_16_OFFSET, /* Type. */
1044 1, /* Rightshift. */
1045 1, /* Size (0 = byte, 1 = short, 2 = long). */
1046 16, /* Bitsize. */
1047 FALSE, /* PC_relative. */
1048 1, /* Bitpos. */
1049 complain_overflow_dont, /* Complain_on_overflow. */
1050 v850_elf_reloc, /* Special_function. */
1051 "R_V850_SDA_15_16_OFFSET", /* Name. */
1052 FALSE, /* Partial_inplace. */
1053 0xfffe, /* Src_mask. */
1054 0xfffe, /* Dst_mask. */
1055 FALSE), /* PCrel_offset. */
1056
1057 /* 16 bit offset from the zero data area pointer. */
1058 HOWTO (R_V850_ZDA_16_16_OFFSET, /* Type. */
1059 0, /* Rightshift. */
1060 1, /* Size (0 = byte, 1 = short, 2 = long). */
1061 16, /* Bitsize. */
1062 FALSE, /* PC_relative. */
1063 0, /* Bitpos. */
1064 complain_overflow_dont, /* Complain_on_overflow. */
1065 v850_elf_reloc, /* Special_function. */
1066 "R_V850_ZDA_16_16_OFFSET", /* Name. */
1067 FALSE, /* Partial_inplace. */
1068 0xffff, /* Src_mask. */
1069 0xffff, /* Dst_mask. */
1070 FALSE), /* PCrel_offset. */
1071
1072 /* 15 bit offset from the zero data area pointer. */
1073 HOWTO (R_V850_ZDA_15_16_OFFSET, /* Type. */
1074 1, /* Rightshift. */
1075 1, /* Size (0 = byte, 1 = short, 2 = long). */
1076 16, /* Bitsize. */
1077 FALSE, /* PC_relative. */
1078 1, /* Bitpos. */
1079 complain_overflow_dont, /* Complain_on_overflow. */
1080 v850_elf_reloc, /* Special_function. */
1081 "R_V850_ZDA_15_16_OFFSET", /* Name. */
1082 FALSE, /* Partial_inplace. */
1083 0xfffe, /* Src_mask. */
1084 0xfffe, /* Dst_mask. */
1085 FALSE), /* PCrel_offset. */
1086
1087 /* 6 bit offset from the tiny data area pointer. */
1088 HOWTO (R_V850_TDA_6_8_OFFSET, /* Type. */
1089 2, /* Rightshift. */
1090 1, /* Size (0 = byte, 1 = short, 2 = long). */
1091 8, /* Bitsize. */
1092 FALSE, /* PC_relative. */
1093 1, /* Bitpos. */
1094 complain_overflow_dont, /* Complain_on_overflow. */
1095 v850_elf_reloc, /* Special_function. */
1096 "R_V850_TDA_6_8_OFFSET", /* Name. */
1097 FALSE, /* Partial_inplace. */
1098 0x7e, /* Src_mask. */
1099 0x7e, /* Dst_mask. */
1100 FALSE), /* PCrel_offset. */
1101
1102 /* 8 bit offset from the tiny data area pointer. */
1103 HOWTO (R_V850_TDA_7_8_OFFSET, /* Type. */
1104 1, /* Rightshift. */
1105 1, /* Size (0 = byte, 1 = short, 2 = long). */
1106 8, /* Bitsize. */
1107 FALSE, /* PC_relative. */
1108 0, /* Bitpos. */
1109 complain_overflow_dont, /* Complain_on_overflow. */
1110 v850_elf_reloc, /* Special_function. */
1111 "R_V850_TDA_7_8_OFFSET", /* Name. */
1112 FALSE, /* Partial_inplace. */
1113 0x7f, /* Src_mask. */
1114 0x7f, /* Dst_mask. */
1115 FALSE), /* PCrel_offset. */
1116
1117 /* 7 bit offset from the tiny data area pointer. */
1118 HOWTO (R_V850_TDA_7_7_OFFSET, /* Type. */
1119 0, /* Rightshift. */
1120 1, /* Size (0 = byte, 1 = short, 2 = long). */
1121 7, /* Bitsize. */
1122 FALSE, /* PC_relative. */
1123 0, /* Bitpos. */
1124 complain_overflow_dont, /* Complain_on_overflow. */
1125 v850_elf_reloc, /* Special_function. */
1126 "R_V850_TDA_7_7_OFFSET", /* Name. */
1127 FALSE, /* Partial_inplace. */
1128 0x7f, /* Src_mask. */
1129 0x7f, /* Dst_mask. */
1130 FALSE), /* PCrel_offset. */
1131
1132 /* 16 bit offset from the tiny data area pointer! */
1133 HOWTO (R_V850_TDA_16_16_OFFSET, /* Type. */
1134 0, /* Rightshift. */
1135 1, /* Size (0 = byte, 1 = short, 2 = long). */
1136 16, /* Bitsize. */
1137 FALSE, /* PC_relative. */
1138 0, /* Bitpos. */
1139 complain_overflow_dont, /* Complain_on_overflow. */
1140 v850_elf_reloc, /* Special_function. */
1141 "R_V850_TDA_16_16_OFFSET", /* Name. */
1142 FALSE, /* Partial_inplace. */
1143 0xffff, /* Src_mask. */
1144 0xfff, /* Dst_mask. */
1145 FALSE), /* PCrel_offset. */
1146
1147 /* 5 bit offset from the tiny data area pointer. */
1148 HOWTO (R_V850_TDA_4_5_OFFSET, /* Type. */
1149 1, /* Rightshift. */
1150 1, /* Size (0 = byte, 1 = short, 2 = long). */
1151 5, /* Bitsize. */
1152 FALSE, /* PC_relative. */
1153 0, /* Bitpos. */
1154 complain_overflow_dont, /* Complain_on_overflow. */
1155 v850_elf_reloc, /* Special_function. */
1156 "R_V850_TDA_4_5_OFFSET", /* Name. */
1157 FALSE, /* Partial_inplace. */
1158 0x0f, /* Src_mask. */
1159 0x0f, /* Dst_mask. */
1160 FALSE), /* PCrel_offset. */
1161
1162 /* 4 bit offset from the tiny data area pointer. */
1163 HOWTO (R_V850_TDA_4_4_OFFSET, /* Type. */
1164 0, /* Rightshift. */
1165 1, /* Size (0 = byte, 1 = short, 2 = long). */
1166 4, /* Bitsize. */
1167 FALSE, /* PC_relative. */
1168 0, /* Bitpos. */
1169 complain_overflow_dont, /* Complain_on_overflow. */
1170 v850_elf_reloc, /* Special_function. */
1171 "R_V850_TDA_4_4_OFFSET", /* Name. */
1172 FALSE, /* Partial_inplace. */
1173 0x0f, /* Src_mask. */
1174 0x0f, /* Dst_mask. */
1175 FALSE), /* PCrel_offset. */
1176
1177 /* 16 bit offset from the short data area pointer. */
1178 HOWTO (R_V850_SDA_16_16_SPLIT_OFFSET, /* Type. */
1179 0, /* Rightshift. */
1180 2, /* Size (0 = byte, 1 = short, 2 = long). */
1181 16, /* Bitsize. */
1182 FALSE, /* PC_relative. */
1183 0, /* Bitpos. */
1184 complain_overflow_dont, /* Complain_on_overflow. */
1185 v850_elf_reloc, /* Special_function. */
1186 "R_V850_SDA_16_16_SPLIT_OFFSET",/* Name. */
1187 FALSE, /* Partial_inplace. */
1188 0xfffe0020, /* Src_mask. */
1189 0xfffe0020, /* Dst_mask. */
1190 FALSE), /* PCrel_offset. */
1191
1192 /* 16 bit offset from the zero data area pointer. */
1193 HOWTO (R_V850_ZDA_16_16_SPLIT_OFFSET, /* Type. */
1194 0, /* Rightshift. */
1195 2, /* Size (0 = byte, 1 = short, 2 = long). */
1196 16, /* Bitsize. */
1197 FALSE, /* PC_relative. */
1198 0, /* Bitpos. */
1199 complain_overflow_dont, /* Complain_on_overflow. */
1200 v850_elf_reloc, /* Special_function. */
1201 "R_V850_ZDA_16_16_SPLIT_OFFSET",/* Name. */
1202 FALSE, /* Partial_inplace. */
1203 0xfffe0020, /* Src_mask. */
1204 0xfffe0020, /* Dst_mask. */
1205 FALSE), /* PCrel_offset. */
1206
1207 /* 6 bit offset from the call table base pointer. */
1208 HOWTO (R_V850_CALLT_6_7_OFFSET, /* Type. */
1209 0, /* Rightshift. */
1210 1, /* Size (0 = byte, 1 = short, 2 = long). */
1211 7, /* Bitsize. */
1212 FALSE, /* PC_relative. */
1213 0, /* Bitpos. */
1214 complain_overflow_dont, /* Complain_on_overflow. */
1215 v850_elf_reloc, /* Special_function. */
1216 "R_V850_CALLT_6_7_OFFSET", /* Name. */
1217 FALSE, /* Partial_inplace. */
1218 0x3f, /* Src_mask. */
1219 0x3f, /* Dst_mask. */
1220 FALSE), /* PCrel_offset. */
1221
1222 /* 16 bit offset from the call table base pointer. */
1223 HOWTO (R_V850_CALLT_16_16_OFFSET, /* Type. */
1224 0, /* Rightshift. */
1225 1, /* Size (0 = byte, 1 = short, 2 = long). */
1226 16, /* Bitsize. */
1227 FALSE, /* PC_relative. */
1228 0, /* Bitpos. */
1229 complain_overflow_dont, /* Complain_on_overflow. */
1230 v850_elf_reloc, /* Special_function. */
1231 "R_V850_CALLT_16_16_OFFSET", /* Name. */
1232 FALSE, /* Partial_inplace. */
1233 0xffff, /* Src_mask. */
1234 0xffff, /* Dst_mask. */
1235 FALSE), /* PCrel_offset. */
1236
1cd986c5 1237
47b0e7ad
NC
1238 /* GNU extension to record C++ vtable hierarchy */
1239 HOWTO (R_V850_GNU_VTINHERIT, /* Type. */
1cd986c5
NC
1240 0, /* Rightshift. */
1241 2, /* Size (0 = byte, 1 = short, 2 = long). */
1242 0, /* Bitsize. */
1243 FALSE, /* PC_relative. */
1244 0, /* Bitpos. */
1245 complain_overflow_dont, /* Complain_on_overflow. */
1246 NULL, /* Special_function. */
1247 "R_V850_GNU_VTINHERIT", /* Name. */
1248 FALSE, /* Partial_inplace. */
1249 0, /* Src_mask. */
1250 0, /* Dst_mask. */
1251 FALSE), /* PCrel_offset. */
1252
1253 /* GNU extension to record C++ vtable member usage. */
47b0e7ad 1254 HOWTO (R_V850_GNU_VTENTRY, /* Type. */
1cd986c5
NC
1255 0, /* Rightshift. */
1256 2, /* Size (0 = byte, 1 = short, 2 = long). */
1257 0, /* Bitsize. */
1258 FALSE, /* PC_relative. */
1259 0, /* Bitpos. */
1260 complain_overflow_dont, /* Complain_on_overflow. */
1261 _bfd_elf_rel_vtable_reloc_fn, /* Special_function. */
1262 "R_V850_GNU_VTENTRY", /* Name. */
1263 FALSE, /* Partial_inplace. */
1264 0, /* Src_mask. */
1265 0, /* Dst_mask. */
1266 FALSE), /* PCrel_offset. */
47b0e7ad
NC
1267
1268 /* Indicates a .longcall pseudo-op. The compiler will generate a .longcall
1269 pseudo-op when it finds a function call which can be relaxed. */
1270 HOWTO (R_V850_LONGCALL, /* Type. */
1cd986c5
NC
1271 0, /* Rightshift. */
1272 2, /* Size (0 = byte, 1 = short, 2 = long). */
1273 32, /* Bitsize. */
1274 TRUE, /* PC_relative. */
1275 0, /* Bitpos. */
1276 complain_overflow_signed, /* Complain_on_overflow. */
1277 v850_elf_ignore_reloc, /* Special_function. */
1278 "R_V850_LONGCALL", /* Name. */
1279 FALSE, /* Partial_inplace. */
1280 0, /* Src_mask. */
1281 0, /* Dst_mask. */
1282 TRUE), /* PCrel_offset. */
47b0e7ad
NC
1283
1284 /* Indicates a .longjump pseudo-op. The compiler will generate a
1285 .longjump pseudo-op when it finds a branch which can be relaxed. */
1286 HOWTO (R_V850_LONGJUMP, /* Type. */
1cd986c5
NC
1287 0, /* Rightshift. */
1288 2, /* Size (0 = byte, 1 = short, 2 = long). */
1289 32, /* Bitsize. */
1290 TRUE, /* PC_relative. */
1291 0, /* Bitpos. */
1292 complain_overflow_signed, /* Complain_on_overflow. */
1293 v850_elf_ignore_reloc, /* Special_function. */
1294 "R_V850_LONGJUMP", /* Name. */
1295 FALSE, /* Partial_inplace. */
1296 0, /* Src_mask. */
1297 0, /* Dst_mask. */
1298 TRUE), /* PCrel_offset. */
47b0e7ad
NC
1299
1300 HOWTO (R_V850_ALIGN, /* Type. */
1cd986c5
NC
1301 0, /* Rightshift. */
1302 1, /* Size (0 = byte, 1 = short, 2 = long). */
1303 0, /* Bitsize. */
1304 FALSE, /* PC_relative. */
1305 0, /* Bitpos. */
1306 complain_overflow_unsigned, /* Complain_on_overflow. */
1307 v850_elf_ignore_reloc, /* Special_function. */
1308 "R_V850_ALIGN", /* Name. */
1309 FALSE, /* Partial_inplace. */
1310 0, /* Src_mask. */
1311 0, /* Dst_mask. */
1312 TRUE), /* PCrel_offset. */
1313
47b0e7ad
NC
1314 /* Simple pc-relative 32bit reloc. */
1315 HOWTO (R_V850_REL32, /* Type. */
1316 0, /* Rightshift. */
1317 2, /* Size (0 = byte, 1 = short, 2 = long). */
1318 32, /* Bitsize. */
1319 TRUE, /* PC_relative. */
1320 0, /* Bitpos. */
1321 complain_overflow_dont, /* Complain_on_overflow. */
1322 v850_elf_reloc, /* Special_function. */
1323 "R_V850_REL32", /* Name. */
1324 FALSE, /* Partial_inplace. */
1325 0xffffffff, /* Src_mask. */
1326 0xffffffff, /* Dst_mask. */
1327 FALSE), /* PCrel_offset. */
1328
1329 /* An ld.bu version of R_V850_LO16. */
1330 HOWTO (R_V850_LO16_SPLIT_OFFSET, /* Type. */
1331 0, /* Rightshift. */
1332 2, /* Size (0 = byte, 1 = short, 2 = long). */
1333 16, /* Bitsize. */
1334 FALSE, /* PC_relative. */
1335 0, /* Bitpos. */
1336 complain_overflow_dont, /* Complain_on_overflow. */
1337 v850_elf_reloc, /* Special_function. */
1338 "R_V850_LO16_SPLIT_OFFSET", /* Name. */
1339 FALSE, /* Partial_inplace. */
1340 0xfffe0020, /* Src_mask. */
1341 0xfffe0020, /* Dst_mask. */
1342 FALSE), /* PCrel_offset. */
1cd986c5
NC
1343
1344 /* A unsigned PC relative 16 bit loop. */
1345 HOWTO (R_V850_16_PCREL, /* Type. */
1346 0, /* Rightshift. */
1347 1, /* Size (0 = byte, 1 = short, 2 = long). */
1348 16, /* Bitsize. */
1349 TRUE, /* PC_relative. */
1350 0, /* Bitpos. */
1351 complain_overflow_bitfield, /* Complain_on_overflow. */
1352 v850_elf_reloc, /* Special_function. */
1353 "R_V850_16_PCREL", /* Name. */
1354 FALSE, /* Partial_inplace. */
1355 0xfffe, /* Src_mask. */
1356 0xfffe, /* Dst_mask. */
1357 TRUE), /* PCrel_offset. */
1358
1359 /* A PC relative 17 bit branch. */
1360 HOWTO (R_V850_17_PCREL, /* Type. */
1361 0, /* Rightshift. */
1362 2, /* Size (0 = byte, 1 = short, 2 = long). */
1363 17, /* Bitsize. */
1364 TRUE, /* PC_relative. */
1365 0, /* Bitpos. */
1366 complain_overflow_bitfield, /* Complain_on_overflow. */
1367 v850_elf_reloc, /* Special_function. */
1368 "R_V850_17_PCREL", /* Name. */
1369 FALSE, /* Partial_inplace. */
1370 0x0010fffe, /* Src_mask. */
1371 0x0010fffe, /* Dst_mask. */
1372 TRUE), /* PCrel_offset. */
1373
1374 /* A 23bit offset ld/st. */
1375 HOWTO (R_V850_23, /* type. */
1376 0, /* rightshift. */
1377 2, /* size (0 = byte, 1 = short, 2 = long). */
1378 23, /* bitsize. */
1379 FALSE, /* pc_relative. */
1380 0, /* bitpos. */
1381 complain_overflow_dont, /* complain_on_overflow. */
1382 v850_elf_reloc, /* special_function. */
1383 "R_V850_23", /* name. */
1384 FALSE, /* partial_inplace. */
1385 0xffff07f0, /* src_mask. */
1386 0xffff07f0, /* dst_mask. */
1387 FALSE), /* pcrel_offset. */
1388
1389 /* A PC relative 32 bit branch. */
1390 HOWTO (R_V850_32_PCREL, /* type. */
1391 1, /* rightshift. */
1392 2, /* size (0 = byte, 1 = short, 2 = long). */
1393 32, /* bitsize. */
1394 TRUE, /* pc_relative. */
1395 1, /* bitpos. */
1396 complain_overflow_signed, /* complain_on_overflow. */
1397 v850_elf_reloc, /* special_function. */
1398 "R_V850_32_PCREL", /* name. */
1399 FALSE, /* partial_inplace. */
1400 0xfffffffe, /* src_mask. */
1401 0xfffffffe, /* dst_mask. */
1402 TRUE), /* pcrel_offset. */
1403
1404 /* A absolute 32 bit branch. */
1405 HOWTO (R_V850_32_ABS, /* type. */
1406 1, /* rightshift. */
1407 2, /* size (0 = byte, 1 = short, 2 = long). */
1408 32, /* bitsize. */
1409 TRUE, /* pc_relative. */
1410 1, /* bitpos. */
1411 complain_overflow_signed, /* complain_on_overflow. */
1412 v850_elf_reloc, /* special_function. */
1413 "R_V850_32_ABS", /* name. */
1414 FALSE, /* partial_inplace. */
1415 0xfffffffe, /* src_mask. */
1416 0xfffffffe, /* dst_mask. */
1417 FALSE), /* pcrel_offset. */
1418
1419 /* High 16 bits of symbol value. */
1420 HOWTO (R_V850_HI16, /* Type. */
1421 0, /* Rightshift. */
1422 1, /* Size (0 = byte, 1 = short, 2 = long). */
1423 16, /* Bitsize. */
1424 FALSE, /* PC_relative. */
1425 0, /* Bitpos. */
1426 complain_overflow_dont, /* Complain_on_overflow. */
1427 v850_elf_reloc, /* Special_function. */
1428 "R_V850_HI16", /* Name. */
1429 FALSE, /* Partial_inplace. */
1430 0xffff, /* Src_mask. */
1431 0xffff, /* Dst_mask. */
1432 FALSE), /* PCrel_offset. */
1433
1434 /* Low 16 bits of symbol value. */
1435 HOWTO (R_V850_16_S1, /* type. */
1436 1, /* rightshift. */
1437 1, /* size (0 = byte, 1 = short, 2 = long). */
1438 16, /* bitsize. */
1439 FALSE, /* pc_relative. */
1440 1, /* bitpos. */
1441 complain_overflow_dont, /* complain_on_overflow. */
1442 v850_elf_reloc, /* special_function. */
1443 "R_V850_16_S1", /* name. */
1444 FALSE, /* partial_inplace. */
1445 0xfffe, /* src_mask. */
1446 0xfffe, /* dst_mask. */
1447 FALSE), /* pcrel_offset. */
1448
1449 /* Low 16 bits of symbol value. */
1450 HOWTO (R_V850_LO16_S1, /* type. */
1451 1, /* rightshift. */
1452 1, /* size (0 = byte, 1 = short, 2 = long). */
1453 16, /* bitsize. */
1454 FALSE, /* pc_relative. */
1455 1, /* bitpos. */
1456 complain_overflow_dont, /* complain_on_overflow. */
1457 v850_elf_reloc, /* special_function. */
1458 "R_V850_LO16_S1", /* name. */
1459 FALSE, /* partial_inplace. */
1460 0xfffe, /* src_mask. */
1461 0xfffe, /* dst_mask. */
1462 FALSE), /* pcrel_offset. */
1463
1464 /* 16 bit offset from the call table base pointer. */
1465 HOWTO (R_V850_CALLT_15_16_OFFSET, /* type. */
1466 1, /* rightshift. */
1467 1, /* size (0 = byte, 1 = short, 2 = long). */
1468 16, /* bitsize. */
1469 FALSE, /* pc_relative. */
1470 1, /* bitpos. */
1471 complain_overflow_dont, /* complain_on_overflow. */
1472 v850_elf_reloc, /* special_function. */
1473 "R_V850_CALLT_15_16_OFFSET", /* name. */
1474 FALSE, /* partial_inplace. */
1475 0xfffe, /* src_mask. */
1476 0xfffe, /* dst_mask. */
1477 FALSE), /* pcrel_offset. */
1478
1479 /* Like R_V850_32 PCREL, but referring to the GOT table entry for
1480 the symbol. */
1481 HOWTO (R_V850_32_GOTPCREL, /* type. */
1482 0, /* rightshift. */
1483 2, /* size (0 = byte, 1 = short, 2 = long). */
1484 32, /* bitsize. */
1485 TRUE, /* pc_relative. */
1486 0, /* bitpos. */
1487 complain_overflow_unsigned, /* complain_on_overflow. */
1488 v850_elf_reloc, /* special_function. */
1489 "R_V850_32_GOTPCREL", /* name. */
1490 FALSE, /* partial_inplace. */
1491 0xffffffff, /* src_mask. */
1492 0xffffffff, /* dst_mask. */
1493 TRUE), /* pcrel_offset. */
1494
1495 /* Like R_V850_SDA_, but referring to the GOT table entry for
1496 the symbol. */
1497 HOWTO (R_V850_16_GOT, /* type. */
1498 0, /* rightshift. */
1499 2, /* size (0 = byte, 1 = short, 2 = long). */
1500 16, /* bitsize. */
1501 FALSE, /* pc_relative. */
1502 0, /* bitpos. */
1503 complain_overflow_unsigned, /* complain_on_overflow. */
1504 bfd_elf_generic_reloc, /* special_function. */
1505 "R_V850_16_GOT", /* name. */
1506 FALSE, /* partial_inplace. */
1507 0xffff, /* src_mask. */
1508 0xffff, /* dst_mask. */
1509 FALSE), /* pcrel_offset. */
1510
1511 HOWTO (R_V850_32_GOT, /* type. */
1512 0, /* rightshift. */
1513 2, /* size (0 = byte, 1 = short, 2 = long). */
1514 32, /* bitsize. */
1515 FALSE, /* pc_relative. */
1516 0, /* bitpos. */
1517 complain_overflow_unsigned, /* complain_on_overflow. */
1518 bfd_elf_generic_reloc, /* special_function. */
1519 "R_V850_32_GOT", /* name. */
1520 FALSE, /* partial_inplace. */
1521 0xffffffff, /* src_mask. */
1522 0xffffffff, /* dst_mask. */
1523 FALSE), /* pcrel_offset. */
1524
1525 /* Like R_V850_22_PCREL, but referring to the procedure linkage table
1526 entry for the symbol. */
1527 HOWTO (R_V850_22_PLT, /* type. */
1528 1, /* rightshift. */
1529 2, /* size (0 = byte, 1 = short, 2 = long). */
1530 22, /* bitsize. */
1531 TRUE, /* pc_relative. */
1532 7, /* bitpos. */
1533 complain_overflow_signed, /* complain_on_overflow. */
1534 bfd_elf_generic_reloc, /* special_function. */
1535 "R_V850_22_PLT", /* name. */
1536 FALSE, /* partial_inplace. */
1537 0x07ffff80, /* src_mask. */
1538 0x07ffff80, /* dst_mask. */
1539 TRUE), /* pcrel_offset. */
1540
1541 HOWTO (R_V850_32_PLT, /* type. */
1542 1, /* rightshift. */
1543 2, /* size (0 = byte, 1 = short, 2 = long). */
1544 32, /* bitsize. */
1545 TRUE, /* pc_relative. */
1546 1, /* bitpos. */
1547 complain_overflow_signed, /* complain_on_overflow. */
1548 bfd_elf_generic_reloc, /* special_function. */
1549 "R_V850_32_PLT", /* name. */
1550 FALSE, /* partial_inplace. */
1551 0xffffffff, /* src_mask. */
1552 0xffffffff, /* dst_mask. */
1553 TRUE), /* pcrel_offset. */
1554
1555 /* This is used only by the dynamic linker. The symbol should exist
1556 both in the object being run and in some shared library. The
1557 dynamic linker copies the data addressed by the symbol from the
1558 shared library into the object, because the object being
1559 run has to have the data at some particular address. */
1560 HOWTO (R_V850_COPY, /* type. */
1561 0, /* rightshift. */
1562 2, /* size (0 = byte, 1 = short, 2 = long). */
1563 32, /* bitsize. */
1564 FALSE, /* pc_relative. */
1565 0, /* bitpos. */
1566 complain_overflow_bitfield, /* complain_on_overflow. */
1567 bfd_elf_generic_reloc, /* special_function. */
1568 "R_V850_COPY", /* name. */
1569 FALSE, /* partial_inplace. */
1570 0xffffffff, /* src_mask. */
1571 0xffffffff, /* dst_mask. */
1572 FALSE), /* pcrel_offset. */
1573
1574 /* Like R_M32R_24, but used when setting global offset table
1575 entries. */
1576 HOWTO (R_V850_GLOB_DAT, /* type. */
1577 0, /* rightshift. */
1578 2, /* size (0 = byte, 1 = short, 2 = long) */
1579 32, /* bitsize. */
1580 FALSE, /* pc_relative. */
1581 0, /* bitpos. */
1582 complain_overflow_bitfield, /* complain_on_overflow. */
1583 bfd_elf_generic_reloc, /* special_function. */
1584 "R_V850_GLOB_DAT", /* name. */
1585 FALSE, /* partial_inplace. */
1586 0xffffffff, /* src_mask. */
1587 0xffffffff, /* dst_mask. */
1588 FALSE), /* pcrel_offset. */
1589
1590 /* Marks a procedure linkage table entry for a symbol. */
1591 HOWTO (R_V850_JMP_SLOT, /* type. */
1592 0, /* rightshift. */
1593 2, /* size (0 = byte, 1 = short, 2 = long) */
1594 32, /* bitsize. */
1595 FALSE, /* pc_relative. */
1596 0, /* bitpos. */
1597 complain_overflow_bitfield, /* complain_on_overflow. */
1598 bfd_elf_generic_reloc, /* special_function. */
1599 "R_V850_JMP_SLOT", /* name. */
1600 FALSE, /* partial_inplace. */
1601 0xffffffff, /* src_mask. */
1602 0xffffffff, /* dst_mask. */
1603 FALSE), /* pcrel_offset. */
1604
1605 /* Used only by the dynamic linker. When the object is run, this
1606 longword is set to the load address of the object, plus the
1607 addend. */
1608 HOWTO (R_V850_RELATIVE, /* type. */
1609 0, /* rightshift. */
1610 2, /* size (0 = byte, 1 = short, 2 = long) */
1611 32, /* bitsize. */
1612 FALSE, /* pc_relative. */
1613 0, /* bitpos. */
1614 complain_overflow_bitfield, /* complain_on_overflow. */
1615 bfd_elf_generic_reloc, /* special_function. */
1616 "R_V850_RELATIVE", /* name. */
1617 FALSE, /* partial_inplace. */
1618 0xffffffff, /* src_mask. */
1619 0xffffffff, /* dst_mask. */
1620 FALSE), /* pcrel_offset. */
1621
1622 HOWTO (R_V850_16_GOTOFF, /* type. */
1623 0, /* rightshift. */
1624 2, /* size (0 = byte, 1 = short, 2 = long) */
1625 16, /* bitsize. */
1626 FALSE, /* pc_relative. */
1627 0, /* bitpos. */
1628 complain_overflow_bitfield, /* complain_on_overflow. */
1629 bfd_elf_generic_reloc, /* special_function. */
1630 "R_V850_16_GOTOFF", /* name. */
1631 FALSE, /* partial_inplace. */
1632 0xffff, /* src_mask. */
1633 0xffff, /* dst_mask. */
1634 FALSE), /* pcrel_offset. */
1635
1636 HOWTO (R_V850_32_GOTOFF, /* type. */
1637 0, /* rightshift. */
1638 2, /* size (0 = byte, 1 = short, 2 = long) */
1639 32, /* bitsize. */
1640 FALSE, /* pc_relative. */
1641 0, /* bitpos. */
1642 complain_overflow_bitfield, /* complain_on_overflow. */
1643 bfd_elf_generic_reloc, /* special_function. */
1644 "R_V850_32_GOTOFF", /* name. */
1645 FALSE, /* partial_inplace. */
1646 0xffffffff, /* src_mask. */
1647 0xffffffff, /* dst_mask. */
1648 FALSE), /* pcrel_offset. */
1649
1650 HOWTO (R_V850_CODE, /* type. */
1651 0, /* rightshift. */
1652 1, /* size (0 = byte, 1 = short, 2 = long) */
1653 0, /* bitsize. */
1654 FALSE, /* pc_relative. */
1655 0, /* bitpos. */
1656 complain_overflow_unsigned, /* complain_on_overflow. */
1657 v850_elf_ignore_reloc, /* special_function. */
1658 "R_V850_CODE", /* name. */
1659 FALSE, /* partial_inplace. */
1660 0, /* src_mask. */
1661 0, /* dst_mask. */
1662 TRUE), /* pcrel_offset. */
1663
1664 HOWTO (R_V850_DATA, /* type. */
1665 0, /* rightshift. */
1666 1, /* size (0 = byte, 1 = short, 2 = long) */
1667 0, /* bitsize. */
1668 FALSE, /* pc_relative. */
1669 0, /* bitpos. */
1670 complain_overflow_unsigned, /* complain_on_overflow. */
1671 v850_elf_ignore_reloc, /* special_function. */
1672 "R_V850_DATA", /* name. */
1673 FALSE, /* partial_inplace. */
1674 0, /* src_mask. */
1675 0, /* dst_mask. */
1676 TRUE), /* pcrel_offset. */
1677
47b0e7ad
NC
1678};
1679
1680/* Map BFD reloc types to V850 ELF reloc types. */
1681
1682struct v850_elf_reloc_map
1683{
1684 /* BFD_RELOC_V850_CALLT_16_16_OFFSET is 258, which will not fix in an
1685 unsigned char. */
1686 bfd_reloc_code_real_type bfd_reloc_val;
1687 unsigned int elf_reloc_val;
1688};
1689
1690static const struct v850_elf_reloc_map v850_elf_reloc_map[] =
1691{
1cd986c5
NC
1692 { BFD_RELOC_NONE, R_V850_NONE },
1693 { BFD_RELOC_V850_9_PCREL, R_V850_9_PCREL },
1694 { BFD_RELOC_V850_22_PCREL, R_V850_22_PCREL },
1695 { BFD_RELOC_HI16_S, R_V850_HI16_S },
1696 { BFD_RELOC_HI16, R_V850_HI16 },
1697 { BFD_RELOC_LO16, R_V850_LO16 },
1698 { BFD_RELOC_32, R_V850_ABS32 },
1699 { BFD_RELOC_32_PCREL, R_V850_REL32 },
1700 { BFD_RELOC_16, R_V850_16 },
1701 { BFD_RELOC_8, R_V850_8 },
47b0e7ad
NC
1702 { BFD_RELOC_V850_SDA_16_16_OFFSET, R_V850_SDA_16_16_OFFSET },
1703 { BFD_RELOC_V850_SDA_15_16_OFFSET, R_V850_SDA_15_16_OFFSET },
1704 { BFD_RELOC_V850_ZDA_16_16_OFFSET, R_V850_ZDA_16_16_OFFSET },
1705 { BFD_RELOC_V850_ZDA_15_16_OFFSET, R_V850_ZDA_15_16_OFFSET },
1706 { BFD_RELOC_V850_TDA_6_8_OFFSET, R_V850_TDA_6_8_OFFSET },
1707 { BFD_RELOC_V850_TDA_7_8_OFFSET, R_V850_TDA_7_8_OFFSET },
1708 { BFD_RELOC_V850_TDA_7_7_OFFSET, R_V850_TDA_7_7_OFFSET },
1709 { BFD_RELOC_V850_TDA_16_16_OFFSET, R_V850_TDA_16_16_OFFSET },
1710 { BFD_RELOC_V850_TDA_4_5_OFFSET, R_V850_TDA_4_5_OFFSET },
1711 { BFD_RELOC_V850_TDA_4_4_OFFSET, R_V850_TDA_4_4_OFFSET },
1712 { BFD_RELOC_V850_LO16_SPLIT_OFFSET, R_V850_LO16_SPLIT_OFFSET },
1713 { BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET, R_V850_SDA_16_16_SPLIT_OFFSET },
1714 { BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET, R_V850_ZDA_16_16_SPLIT_OFFSET },
1715 { BFD_RELOC_V850_CALLT_6_7_OFFSET, R_V850_CALLT_6_7_OFFSET },
1716 { BFD_RELOC_V850_CALLT_16_16_OFFSET, R_V850_CALLT_16_16_OFFSET },
1717 { BFD_RELOC_VTABLE_INHERIT, R_V850_GNU_VTINHERIT },
1718 { BFD_RELOC_VTABLE_ENTRY, R_V850_GNU_VTENTRY },
1719 { BFD_RELOC_V850_LONGCALL, R_V850_LONGCALL },
1720 { BFD_RELOC_V850_LONGJUMP, R_V850_LONGJUMP },
1721 { BFD_RELOC_V850_ALIGN, R_V850_ALIGN },
1cd986c5
NC
1722 { BFD_RELOC_V850_16_PCREL, R_V850_16_PCREL },
1723 { BFD_RELOC_V850_17_PCREL, R_V850_17_PCREL },
1724 { BFD_RELOC_V850_23, R_V850_23 },
1725 { BFD_RELOC_V850_32_PCREL, R_V850_32_PCREL },
1726 { BFD_RELOC_V850_32_ABS, R_V850_32_ABS },
1727 { BFD_RELOC_V850_16_SPLIT_OFFSET, R_V850_HI16 },
1728 { BFD_RELOC_V850_16_S1, R_V850_16_S1 },
1729 { BFD_RELOC_V850_LO16_S1, R_V850_LO16_S1 },
1730 { BFD_RELOC_V850_CALLT_15_16_OFFSET, R_V850_CALLT_15_16_OFFSET },
1731 { BFD_RELOC_V850_32_GOTPCREL, R_V850_32_GOTPCREL },
1732 { BFD_RELOC_V850_16_GOT, R_V850_16_GOT },
1733 { BFD_RELOC_V850_32_GOT, R_V850_32_GOT },
1734 { BFD_RELOC_V850_22_PLT_PCREL, R_V850_22_PLT },
1735 { BFD_RELOC_V850_32_PLT_PCREL, R_V850_32_PLT },
1736 { BFD_RELOC_V850_COPY, R_V850_COPY },
1737 { BFD_RELOC_V850_GLOB_DAT, R_V850_GLOB_DAT },
1738 { BFD_RELOC_V850_JMP_SLOT, R_V850_JMP_SLOT },
1739 { BFD_RELOC_V850_RELATIVE, R_V850_RELATIVE },
1740 { BFD_RELOC_V850_16_GOTOFF, R_V850_16_GOTOFF },
1741 { BFD_RELOC_V850_32_GOTOFF, R_V850_32_GOTOFF },
1742 { BFD_RELOC_V850_CODE, R_V850_CODE },
1743 { BFD_RELOC_V850_DATA, R_V850_DATA },
47b0e7ad
NC
1744};
1745\f
1746/* Map a bfd relocation into the appropriate howto structure. */
1747
1748static reloc_howto_type *
1749v850_elf_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1750 bfd_reloc_code_real_type code)
1751{
1752 unsigned int i;
1753
1754 for (i = ARRAY_SIZE (v850_elf_reloc_map); i --;)
1755 if (v850_elf_reloc_map[i].bfd_reloc_val == code)
1756 {
1757 unsigned int elf_reloc_val = v850_elf_reloc_map[i].elf_reloc_val;
1758
1759 BFD_ASSERT (v850_elf_howto_table[elf_reloc_val].type == elf_reloc_val);
1760
1761 return v850_elf_howto_table + elf_reloc_val;
1762 }
1763
1764 return NULL;
1765}
157090f7
AM
1766
1767static reloc_howto_type *
1768v850_elf_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1769 const char *r_name)
1770{
1771 unsigned int i;
1772
1773 for (i = 0;
1774 i < sizeof (v850_elf_howto_table) / sizeof (v850_elf_howto_table[0]);
1775 i++)
1776 if (v850_elf_howto_table[i].name != NULL
1777 && strcasecmp (v850_elf_howto_table[i].name, r_name) == 0)
1778 return &v850_elf_howto_table[i];
1779
1780 return NULL;
1781}
47b0e7ad
NC
1782\f
1783/* Set the howto pointer for an V850 ELF reloc. */
1784
1785static void
1786v850_elf_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED,
1787 arelent *cache_ptr,
1788 Elf_Internal_Rela *dst)
1789{
1790 unsigned int r_type;
1791
1792 r_type = ELF32_R_TYPE (dst->r_info);
1793 BFD_ASSERT (r_type < (unsigned int) R_V850_max);
1794 cache_ptr->howto = &v850_elf_howto_table[r_type];
1795}
1796
1797/* Set the howto pointer for a V850 ELF reloc (type RELA). */
1798
1799static void
1800v850_elf_info_to_howto_rela (bfd *abfd ATTRIBUTE_UNUSED,
1801 arelent * cache_ptr,
1802 Elf_Internal_Rela *dst)
1803{
1804 unsigned int r_type;
1805
1806 r_type = ELF32_R_TYPE (dst->r_info);
1807 BFD_ASSERT (r_type < (unsigned int) R_V850_max);
1808 cache_ptr->howto = &v850_elf_howto_table[r_type];
1809}
252b5132 1810\f
b34976b6 1811static bfd_boolean
47b0e7ad 1812v850_elf_is_local_label_name (bfd *abfd ATTRIBUTE_UNUSED, const char *name)
252b5132
RH
1813{
1814 return ( (name[0] == '.' && (name[1] == 'L' || name[1] == '.'))
1815 || (name[0] == '_' && name[1] == '.' && name[2] == 'L' && name[3] == '_'));
1816}
252b5132 1817\f
5cec6941
NC
1818/* We overload some of the bfd_reloc error codes for own purposes. */
1819#define bfd_reloc_gp_not_found bfd_reloc_other
1820#define bfd_reloc_ep_not_found bfd_reloc_continue
1821#define bfd_reloc_ctbp_not_found (bfd_reloc_dangerous + 1)
1822
252b5132 1823/* Perform a relocation as part of a final link. */
e12dd2ea 1824
252b5132 1825static bfd_reloc_status_type
47b0e7ad
NC
1826v850_elf_final_link_relocate (reloc_howto_type *howto,
1827 bfd *input_bfd,
1828 bfd *output_bfd ATTRIBUTE_UNUSED,
1829 asection *input_section,
1830 bfd_byte *contents,
1831 bfd_vma offset,
1832 bfd_vma value,
1833 bfd_vma addend,
1834 struct bfd_link_info *info,
1835 asection *sym_sec,
1836 int is_local ATTRIBUTE_UNUSED)
252b5132 1837{
b34976b6
AM
1838 unsigned int r_type = howto->type;
1839 bfd_byte *hit_data = contents + offset;
252b5132
RH
1840
1841 /* Adjust the value according to the relocation. */
1842 switch (r_type)
1843 {
1844 case R_V850_9_PCREL:
1845 value -= (input_section->output_section->vma
1846 + input_section->output_offset);
1847 value -= offset;
1848 break;
435b1e90 1849
1cd986c5
NC
1850 case R_V850_16_PCREL:
1851 value -= (input_section->output_section->vma
1852 + input_section->output_offset
1853 + offset);
1854
1855 /* If the sign extension will corrupt the value then we have overflowed. */
1856 if ((value & 0xffff0000) != 0xffff0000)
1857 return bfd_reloc_overflow;
1858
1859 break;
1860
1861 case R_V850_17_PCREL:
1862 value -= (input_section->output_section->vma
1863 + input_section->output_offset
1864 + offset);
1865
1866 /* If the sign extension will corrupt the value then we have overflowed. */
1867 if (((value & 0xffff0000) != 0x0) && ((value & 0xffff0000) != 0xffff0000))
1868 return bfd_reloc_overflow;
1869
1870 value = SEXT17 (value);
1871 break;
1872
252b5132
RH
1873 case R_V850_22_PCREL:
1874 value -= (input_section->output_section->vma
1875 + input_section->output_offset
1876 + offset);
1877
232fb1a3 1878 /* If the sign extension will corrupt the value then we have overflowed. */
1cd986c5 1879 if (((value & 0xffe00000) != 0x0) && ((value & 0xffe00000) != 0xffe00000))
232fb1a3 1880 return bfd_reloc_overflow;
435b1e90 1881
1cd986c5
NC
1882 /* Only the bottom 22 bits of the PC are valid. */
1883 value = SEXT22 (value);
252b5132 1884 break;
435b1e90 1885
1cd986c5 1886 case R_V850_32_PCREL:
e30ddb24
NC
1887 value -= (input_section->output_section->vma
1888 + input_section->output_offset
1889 + offset);
1890 break;
1891
1cd986c5
NC
1892 case R_V850_32_ABS:
1893 case R_V850_23:
252b5132
RH
1894 case R_V850_HI16_S:
1895 case R_V850_HI16:
1896 case R_V850_LO16:
1cd986c5 1897 case R_V850_LO16_S1:
1e50d24d 1898 case R_V850_LO16_SPLIT_OFFSET:
252b5132 1899 case R_V850_16:
e30ddb24 1900 case R_V850_ABS32:
252b5132
RH
1901 case R_V850_8:
1902 break;
1903
435b1e90 1904 case R_V850_ZDA_15_16_OFFSET:
252b5132
RH
1905 case R_V850_ZDA_16_16_OFFSET:
1906 case R_V850_ZDA_16_16_SPLIT_OFFSET:
1907 if (sym_sec == NULL)
1908 return bfd_reloc_undefined;
435b1e90 1909
252b5132
RH
1910 value -= sym_sec->output_section->vma;
1911 break;
1912
1913 case R_V850_SDA_15_16_OFFSET:
1914 case R_V850_SDA_16_16_OFFSET:
1915 case R_V850_SDA_16_16_SPLIT_OFFSET:
1916 {
1917 unsigned long gp;
1918 struct bfd_link_hash_entry * h;
1919
1920 if (sym_sec == NULL)
1921 return bfd_reloc_undefined;
435b1e90 1922
252b5132 1923 /* Get the value of __gp. */
b34976b6 1924 h = bfd_link_hash_lookup (info->hash, "__gp", FALSE, FALSE, TRUE);
47b0e7ad 1925 if (h == NULL
252b5132 1926 || h->type != bfd_link_hash_defined)
5cec6941 1927 return bfd_reloc_gp_not_found;
252b5132
RH
1928
1929 gp = (h->u.def.value
1930 + h->u.def.section->output_section->vma
1931 + h->u.def.section->output_offset);
1932
1933 value -= sym_sec->output_section->vma;
1934 value -= (gp - sym_sec->output_section->vma);
1935 }
1936 break;
1937
1938 case R_V850_TDA_4_4_OFFSET:
1939 case R_V850_TDA_4_5_OFFSET:
252b5132
RH
1940 case R_V850_TDA_7_7_OFFSET:
1941 case R_V850_TDA_7_8_OFFSET:
1942 case R_V850_TDA_6_8_OFFSET:
1cd986c5 1943 case R_V850_TDA_16_16_OFFSET:
252b5132
RH
1944 {
1945 unsigned long ep;
1946 struct bfd_link_hash_entry * h;
435b1e90 1947
252b5132 1948 /* Get the value of __ep. */
b34976b6 1949 h = bfd_link_hash_lookup (info->hash, "__ep", FALSE, FALSE, TRUE);
47b0e7ad 1950 if (h == NULL
252b5132 1951 || h->type != bfd_link_hash_defined)
5cec6941 1952 return bfd_reloc_ep_not_found;
252b5132
RH
1953
1954 ep = (h->u.def.value
1955 + h->u.def.section->output_section->vma
1956 + h->u.def.section->output_offset);
1957
1958 value -= ep;
1959 }
1960 break;
435b1e90 1961
252b5132
RH
1962 case R_V850_CALLT_6_7_OFFSET:
1963 {
1964 unsigned long ctbp;
1965 struct bfd_link_hash_entry * h;
435b1e90 1966
252b5132 1967 /* Get the value of __ctbp. */
b34976b6 1968 h = bfd_link_hash_lookup (info->hash, "__ctbp", FALSE, FALSE, TRUE);
47b0e7ad 1969 if (h == NULL
252b5132 1970 || h->type != bfd_link_hash_defined)
5cec6941 1971 return bfd_reloc_ctbp_not_found;
252b5132
RH
1972
1973 ctbp = (h->u.def.value
1974 + h->u.def.section->output_section->vma
1975 + h->u.def.section->output_offset);
1976 value -= ctbp;
1977 }
1978 break;
435b1e90 1979
1cd986c5 1980 case R_V850_CALLT_15_16_OFFSET:
252b5132
RH
1981 case R_V850_CALLT_16_16_OFFSET:
1982 {
1983 unsigned long ctbp;
1984 struct bfd_link_hash_entry * h;
1985
1986 if (sym_sec == NULL)
1987 return bfd_reloc_undefined;
435b1e90 1988
252b5132 1989 /* Get the value of __ctbp. */
b34976b6 1990 h = bfd_link_hash_lookup (info->hash, "__ctbp", FALSE, FALSE, TRUE);
47b0e7ad 1991 if (h == NULL
252b5132 1992 || h->type != bfd_link_hash_defined)
5cec6941 1993 return bfd_reloc_ctbp_not_found;
252b5132
RH
1994
1995 ctbp = (h->u.def.value
1996 + h->u.def.section->output_section->vma
1997 + h->u.def.section->output_offset);
1998
1999 value -= sym_sec->output_section->vma;
2000 value -= (ctbp - sym_sec->output_section->vma);
2001 }
2002 break;
435b1e90 2003
252b5132
RH
2004 case R_V850_NONE:
2005 case R_V850_GNU_VTINHERIT:
2006 case R_V850_GNU_VTENTRY:
86aba9db
NC
2007 case R_V850_LONGCALL:
2008 case R_V850_LONGJUMP:
2009 case R_V850_ALIGN:
252b5132
RH
2010 return bfd_reloc_ok;
2011
2012 default:
2013 return bfd_reloc_notsupported;
2014 }
2015
2016 /* Perform the relocation. */
435b1e90 2017 return v850_elf_perform_relocation (input_bfd, r_type, value + addend, hit_data);
252b5132 2018}
252b5132
RH
2019\f
2020/* Relocate an V850 ELF section. */
e12dd2ea 2021
b34976b6 2022static bfd_boolean
47b0e7ad
NC
2023v850_elf_relocate_section (bfd *output_bfd,
2024 struct bfd_link_info *info,
2025 bfd *input_bfd,
2026 asection *input_section,
2027 bfd_byte *contents,
2028 Elf_Internal_Rela *relocs,
2029 Elf_Internal_Sym *local_syms,
2030 asection **local_sections)
252b5132 2031{
b34976b6
AM
2032 Elf_Internal_Shdr *symtab_hdr;
2033 struct elf_link_hash_entry **sym_hashes;
2034 Elf_Internal_Rela *rel;
2035 Elf_Internal_Rela *relend;
252b5132
RH
2036
2037 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
2038 sym_hashes = elf_sym_hashes (input_bfd);
2039
252b5132
RH
2040 /* Reset the list of remembered HI16S relocs to empty. */
2041 free_hi16s = previous_hi16s;
2042 previous_hi16s = NULL;
2043 hi16s_counter = 0;
435b1e90 2044
252b5132
RH
2045 rel = relocs;
2046 relend = relocs + input_section->reloc_count;
2047 for (; rel < relend; rel++)
2048 {
b34976b6
AM
2049 int r_type;
2050 reloc_howto_type *howto;
2051 unsigned long r_symndx;
2052 Elf_Internal_Sym *sym;
2053 asection *sec;
2054 struct elf_link_hash_entry *h;
2055 bfd_vma relocation;
2056 bfd_reloc_status_type r;
252b5132
RH
2057
2058 r_symndx = ELF32_R_SYM (rel->r_info);
2059 r_type = ELF32_R_TYPE (rel->r_info);
2060
2061 if (r_type == R_V850_GNU_VTENTRY
2062 || r_type == R_V850_GNU_VTINHERIT)
2063 continue;
2064
f0fe0e16 2065 howto = v850_elf_howto_table + r_type;
252b5132
RH
2066 h = NULL;
2067 sym = NULL;
2068 sec = NULL;
2069 if (r_symndx < symtab_hdr->sh_info)
2070 {
2071 sym = local_syms + r_symndx;
2072 sec = local_sections[r_symndx];
8517fae7 2073 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH
2074 }
2075 else
2076 {
59c2e50f 2077 bfd_boolean unresolved_reloc, warned;
435b1e90 2078
47b0e7ad
NC
2079 /* Note - this check is delayed until now as it is possible and
2080 valid to have a file without any symbols but with relocs that
2081 can be processed. */
641bd093
NC
2082 if (sym_hashes == NULL)
2083 {
2084 info->callbacks->warning
2085 (info, "no hash table available",
2086 NULL, input_bfd, input_section, (bfd_vma) 0);
2087
2088 return FALSE;
2089 }
2090
b2a8e766
AM
2091 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
2092 r_symndx, symtab_hdr, sym_hashes,
2093 h, sec, relocation,
2094 unresolved_reloc, warned);
252b5132
RH
2095 }
2096
dbaa2011 2097 if (sec != NULL && discarded_section (sec))
e4067dbb
DJ
2098 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
2099 rel, relend, howto, contents);
ab96bf03
AM
2100
2101 if (info->relocatable)
2102 continue;
2103
e12dd2ea 2104 /* FIXME: We should use the addend, but the COFF relocations don't. */
252b5132
RH
2105 r = v850_elf_final_link_relocate (howto, input_bfd, output_bfd,
2106 input_section,
2107 contents, rel->r_offset,
2108 relocation, rel->r_addend,
2109 info, sec, h == NULL);
2110
2111 if (r != bfd_reloc_ok)
2112 {
2113 const char * name;
47b0e7ad 2114 const char * msg = NULL;
252b5132
RH
2115
2116 if (h != NULL)
2117 name = h->root.root.string;
2118 else
2119 {
2120 name = (bfd_elf_string_from_elf_section
2121 (input_bfd, symtab_hdr->sh_link, sym->st_name));
2122 if (name == NULL || *name == '\0')
2123 name = bfd_section_name (input_bfd, sec);
2124 }
2125
ceaf50a2 2126 switch ((int) r)
252b5132
RH
2127 {
2128 case bfd_reloc_overflow:
2129 if (! ((*info->callbacks->reloc_overflow)
dfeffb9f
L
2130 (info, (h ? &h->root : NULL), name, howto->name,
2131 (bfd_vma) 0, input_bfd, input_section,
2132 rel->r_offset)))
b34976b6 2133 return FALSE;
252b5132
RH
2134 break;
2135
2136 case bfd_reloc_undefined:
2137 if (! ((*info->callbacks->undefined_symbol)
2138 (info, name, input_bfd, input_section,
b34976b6
AM
2139 rel->r_offset, TRUE)))
2140 return FALSE;
252b5132
RH
2141 break;
2142
2143 case bfd_reloc_outofrange:
2144 msg = _("internal error: out of range error");
2145 goto common_error;
2146
2147 case bfd_reloc_notsupported:
2148 msg = _("internal error: unsupported relocation error");
2149 goto common_error;
2150
2151 case bfd_reloc_dangerous:
2152 msg = _("internal error: dangerous relocation");
2153 goto common_error;
2154
5cec6941 2155 case bfd_reloc_gp_not_found:
252b5132
RH
2156 msg = _("could not locate special linker symbol __gp");
2157 goto common_error;
2158
5cec6941 2159 case bfd_reloc_ep_not_found:
252b5132
RH
2160 msg = _("could not locate special linker symbol __ep");
2161 goto common_error;
2162
5cec6941 2163 case bfd_reloc_ctbp_not_found:
252b5132
RH
2164 msg = _("could not locate special linker symbol __ctbp");
2165 goto common_error;
435b1e90 2166
252b5132
RH
2167 default:
2168 msg = _("internal error: unknown error");
2169 /* fall through */
2170
2171 common_error:
2172 if (!((*info->callbacks->warning)
2173 (info, msg, name, input_bfd, input_section,
2174 rel->r_offset)))
b34976b6 2175 return FALSE;
252b5132
RH
2176 break;
2177 }
2178 }
2179 }
2180
b34976b6 2181 return TRUE;
252b5132
RH
2182}
2183
252b5132 2184static asection *
47b0e7ad 2185v850_elf_gc_mark_hook (asection *sec,
07adf181 2186 struct bfd_link_info *info,
47b0e7ad
NC
2187 Elf_Internal_Rela *rel,
2188 struct elf_link_hash_entry *h,
2189 Elf_Internal_Sym *sym)
252b5132
RH
2190{
2191 if (h != NULL)
07adf181 2192 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH
2193 {
2194 case R_V850_GNU_VTINHERIT:
2195 case R_V850_GNU_VTENTRY:
07adf181
AM
2196 return NULL;
2197 }
9ad5cbcf 2198
07adf181 2199 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132 2200}
e12dd2ea 2201
252b5132 2202/* Set the right machine number. */
e12dd2ea 2203
b34976b6 2204static bfd_boolean
47b0e7ad 2205v850_elf_object_p (bfd *abfd)
252b5132
RH
2206{
2207 switch (elf_elfheader (abfd)->e_flags & EF_V850_ARCH)
2208 {
2209 default:
250d94fd
AM
2210 case E_V850_ARCH:
2211 bfd_default_set_arch_mach (abfd, bfd_arch_v850, bfd_mach_v850);
2212 break;
2213 case E_V850E_ARCH:
2214 bfd_default_set_arch_mach (abfd, bfd_arch_v850, bfd_mach_v850e);
2215 break;
8ad30312
NC
2216 case E_V850E1_ARCH:
2217 bfd_default_set_arch_mach (abfd, bfd_arch_v850, bfd_mach_v850e1);
2218 break;
1cd986c5
NC
2219 case E_V850E2_ARCH:
2220 bfd_default_set_arch_mach (abfd, bfd_arch_v850, bfd_mach_v850e2);
2221 break;
2222 case E_V850E2V3_ARCH:
2223 bfd_default_set_arch_mach (abfd, bfd_arch_v850, bfd_mach_v850e2v3);
2224 break;
252b5132 2225 }
b34976b6 2226 return TRUE;
252b5132
RH
2227}
2228
2229/* Store the machine number in the flags field. */
e12dd2ea 2230
252b5132 2231static void
47b0e7ad
NC
2232v850_elf_final_write_processing (bfd *abfd,
2233 bfd_boolean linker ATTRIBUTE_UNUSED)
252b5132
RH
2234{
2235 unsigned long val;
2236
2237 switch (bfd_get_mach (abfd))
2238 {
b34976b6 2239 default:
47b0e7ad
NC
2240 case bfd_mach_v850: val = E_V850_ARCH; break;
2241 case bfd_mach_v850e: val = E_V850E_ARCH; break;
2242 case bfd_mach_v850e1: val = E_V850E1_ARCH; break;
1cd986c5
NC
2243 case bfd_mach_v850e2: val = E_V850E2_ARCH; break;
2244 case bfd_mach_v850e2v3: val = E_V850E2V3_ARCH; break;
252b5132
RH
2245 }
2246
2247 elf_elfheader (abfd)->e_flags &=~ EF_V850_ARCH;
2248 elf_elfheader (abfd)->e_flags |= val;
2249}
2250
435b1e90 2251/* Function to keep V850 specific file flags. */
e12dd2ea 2252
b34976b6 2253static bfd_boolean
47b0e7ad 2254v850_elf_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH
2255{
2256 BFD_ASSERT (!elf_flags_init (abfd)
2257 || elf_elfheader (abfd)->e_flags == flags);
2258
2259 elf_elfheader (abfd)->e_flags = flags;
b34976b6
AM
2260 elf_flags_init (abfd) = TRUE;
2261 return TRUE;
252b5132
RH
2262}
2263
e12dd2ea
NC
2264/* Merge backend specific data from an object file
2265 to the output object file when linking. */
47b0e7ad 2266
b34976b6 2267static bfd_boolean
47b0e7ad 2268v850_elf_merge_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH
2269{
2270 flagword out_flags;
2271 flagword in_flags;
2272
2273 if ( bfd_get_flavour (ibfd) != bfd_target_elf_flavour
2274 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
b34976b6 2275 return TRUE;
252b5132
RH
2276
2277 in_flags = elf_elfheader (ibfd)->e_flags;
2278 out_flags = elf_elfheader (obfd)->e_flags;
2279
2280 if (! elf_flags_init (obfd))
2281 {
2282 /* If the input is the default architecture then do not
2283 bother setting the flags for the output architecture,
2284 instead allow future merges to do this. If no future
2285 merges ever set these flags then they will retain their
2286 unitialised values, which surprise surprise, correspond
2287 to the default values. */
2288 if (bfd_get_arch_info (ibfd)->the_default)
b34976b6 2289 return TRUE;
435b1e90 2290
b34976b6 2291 elf_flags_init (obfd) = TRUE;
252b5132
RH
2292 elf_elfheader (obfd)->e_flags = in_flags;
2293
2294 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
2295 && bfd_get_arch_info (obfd)->the_default)
e12dd2ea 2296 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
252b5132 2297
b34976b6 2298 return TRUE;
252b5132
RH
2299 }
2300
2301 /* Check flag compatibility. */
2302 if (in_flags == out_flags)
b34976b6 2303 return TRUE;
252b5132
RH
2304
2305 if ((in_flags & EF_V850_ARCH) != (out_flags & EF_V850_ARCH)
2306 && (in_flags & EF_V850_ARCH) != E_V850_ARCH)
8ad30312 2307 {
1cd986c5 2308
8ad30312 2309 /* Allow v850e1 binaries to be linked with v850e binaries.
1cd986c5 2310 Set the output binary to v850e. */
8ad30312 2311 if ((in_flags & EF_V850_ARCH) == E_V850E1_ARCH
1cd986c5
NC
2312 && (out_flags & EF_V850_ARCH) == E_V850E_ARCH)
2313 return TRUE;
8ad30312 2314
1cd986c5
NC
2315 if ((in_flags & EF_V850_ARCH) == E_V850_ARCH
2316 && (out_flags & EF_V850_ARCH) == E_V850E_ARCH)
8ad30312
NC
2317 {
2318 elf_elfheader (obfd)->e_flags =
2319 ((out_flags & ~ EF_V850_ARCH) | E_V850E_ARCH);
2320 return TRUE;
2321 }
2322
1cd986c5
NC
2323 if (((in_flags & EF_V850_ARCH) == E_V850_ARCH
2324 || (in_flags & EF_V850_ARCH) == E_V850E_ARCH)
2325 && (out_flags & EF_V850_ARCH) == E_V850E2_ARCH)
2326 {
2327 elf_elfheader (obfd)->e_flags =
2328 ((out_flags & ~ EF_V850_ARCH) | E_V850E2_ARCH);
2329 return TRUE;
2330 }
2331
2332 if (((in_flags & EF_V850_ARCH) == E_V850_ARCH
2333 || (in_flags & EF_V850_ARCH) == E_V850E_ARCH
2334 || (in_flags & EF_V850_ARCH) == E_V850E2_ARCH)
2335 && (out_flags & EF_V850_ARCH) == E_V850E2V3_ARCH)
2336 {
2337 elf_elfheader (obfd)->e_flags =
2338 ((out_flags & ~ EF_V850_ARCH) | E_V850E2V3_ARCH);
2339 return TRUE;
2340 }
2341
d003868e
AM
2342 _bfd_error_handler (_("%B: Architecture mismatch with previous modules"),
2343 ibfd);
8ad30312 2344 }
252b5132 2345
b34976b6 2346 return TRUE;
252b5132 2347}
e12dd2ea
NC
2348
2349/* Display the flags field. */
252b5132 2350
b34976b6 2351static bfd_boolean
47b0e7ad 2352v850_elf_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132
RH
2353{
2354 FILE * file = (FILE *) ptr;
435b1e90 2355
252b5132 2356 BFD_ASSERT (abfd != NULL && ptr != NULL);
435b1e90 2357
252b5132 2358 _bfd_elf_print_private_bfd_data (abfd, ptr);
435b1e90 2359
1cd986c5 2360 /* xgettext:c-format. */
252b5132 2361 fprintf (file, _("private flags = %lx: "), elf_elfheader (abfd)->e_flags);
435b1e90 2362
252b5132
RH
2363 switch (elf_elfheader (abfd)->e_flags & EF_V850_ARCH)
2364 {
2365 default:
2366 case E_V850_ARCH: fprintf (file, _("v850 architecture")); break;
47b0e7ad 2367 case E_V850E_ARCH: fprintf (file, _("v850e architecture")); break;
8ad30312 2368 case E_V850E1_ARCH: fprintf (file, _("v850e1 architecture")); break;
1cd986c5
NC
2369 case E_V850E2_ARCH: fprintf (file, _("v850e2 architecture")); break;
2370 case E_V850E2V3_ARCH: fprintf (file, _("v850e2v3 architecture")); break;
252b5132 2371 }
435b1e90 2372
252b5132 2373 fputc ('\n', file);
435b1e90 2374
b34976b6 2375 return TRUE;
252b5132
RH
2376}
2377
2378/* V850 ELF uses four common sections. One is the usual one, and the
2379 others are for (small) objects in one of the special data areas:
2380 small, tiny and zero. All the objects are kept together, and then
2381 referenced via the gp register, the ep register or the r0 register
2382 respectively, which yields smaller, faster assembler code. This
2383 approach is copied from elf32-mips.c. */
2384
2385static asection v850_elf_scom_section;
2386static asymbol v850_elf_scom_symbol;
2387static asymbol * v850_elf_scom_symbol_ptr;
2388static asection v850_elf_tcom_section;
2389static asymbol v850_elf_tcom_symbol;
2390static asymbol * v850_elf_tcom_symbol_ptr;
2391static asection v850_elf_zcom_section;
2392static asymbol v850_elf_zcom_symbol;
2393static asymbol * v850_elf_zcom_symbol_ptr;
2394
e12dd2ea
NC
2395/* Given a BFD section, try to locate the
2396 corresponding ELF section index. */
252b5132 2397
b34976b6 2398static bfd_boolean
47b0e7ad
NC
2399v850_elf_section_from_bfd_section (bfd *abfd ATTRIBUTE_UNUSED,
2400 asection *sec,
2401 int *retval)
252b5132
RH
2402{
2403 if (strcmp (bfd_get_section_name (abfd, sec), ".scommon") == 0)
2404 *retval = SHN_V850_SCOMMON;
2405 else if (strcmp (bfd_get_section_name (abfd, sec), ".tcommon") == 0)
2406 *retval = SHN_V850_TCOMMON;
2407 else if (strcmp (bfd_get_section_name (abfd, sec), ".zcommon") == 0)
2408 *retval = SHN_V850_ZCOMMON;
2409 else
b34976b6 2410 return FALSE;
435b1e90 2411
b34976b6 2412 return TRUE;
252b5132
RH
2413}
2414
2415/* Handle the special V850 section numbers that a symbol may use. */
2416
2417static void
47b0e7ad 2418v850_elf_symbol_processing (bfd *abfd, asymbol *asym)
252b5132
RH
2419{
2420 elf_symbol_type * elfsym = (elf_symbol_type *) asym;
9ad5cbcf 2421 unsigned int indx;
435b1e90 2422
9ad5cbcf 2423 indx = elfsym->internal_elf_sym.st_shndx;
252b5132
RH
2424
2425 /* If the section index is an "ordinary" index, then it may
2426 refer to a v850 specific section created by the assembler.
2427 Check the section's type and change the index it matches.
435b1e90 2428
252b5132 2429 FIXME: Should we alter the st_shndx field as well ? */
435b1e90 2430
9ad5cbcf 2431 if (indx < elf_numsections (abfd))
1cd986c5 2432 switch (elf_elfsections (abfd)[indx]->sh_type)
252b5132
RH
2433 {
2434 case SHT_V850_SCOMMON:
9ad5cbcf 2435 indx = SHN_V850_SCOMMON;
252b5132 2436 break;
435b1e90 2437
252b5132 2438 case SHT_V850_TCOMMON:
9ad5cbcf 2439 indx = SHN_V850_TCOMMON;
252b5132 2440 break;
435b1e90 2441
252b5132 2442 case SHT_V850_ZCOMMON:
9ad5cbcf 2443 indx = SHN_V850_ZCOMMON;
252b5132 2444 break;
435b1e90 2445
252b5132
RH
2446 default:
2447 break;
2448 }
435b1e90 2449
9ad5cbcf 2450 switch (indx)
252b5132
RH
2451 {
2452 case SHN_V850_SCOMMON:
2453 if (v850_elf_scom_section.name == NULL)
2454 {
2455 /* Initialize the small common section. */
2456 v850_elf_scom_section.name = ".scommon";
2457 v850_elf_scom_section.flags = SEC_IS_COMMON | SEC_ALLOC | SEC_DATA;
2458 v850_elf_scom_section.output_section = & v850_elf_scom_section;
2459 v850_elf_scom_section.symbol = & v850_elf_scom_symbol;
2460 v850_elf_scom_section.symbol_ptr_ptr = & v850_elf_scom_symbol_ptr;
2461 v850_elf_scom_symbol.name = ".scommon";
2462 v850_elf_scom_symbol.flags = BSF_SECTION_SYM;
2463 v850_elf_scom_symbol.section = & v850_elf_scom_section;
2464 v850_elf_scom_symbol_ptr = & v850_elf_scom_symbol;
2465 }
2466 asym->section = & v850_elf_scom_section;
2467 asym->value = elfsym->internal_elf_sym.st_size;
2468 break;
435b1e90 2469
252b5132
RH
2470 case SHN_V850_TCOMMON:
2471 if (v850_elf_tcom_section.name == NULL)
2472 {
2473 /* Initialize the tcommon section. */
2474 v850_elf_tcom_section.name = ".tcommon";
2475 v850_elf_tcom_section.flags = SEC_IS_COMMON;
2476 v850_elf_tcom_section.output_section = & v850_elf_tcom_section;
2477 v850_elf_tcom_section.symbol = & v850_elf_tcom_symbol;
2478 v850_elf_tcom_section.symbol_ptr_ptr = & v850_elf_tcom_symbol_ptr;
2479 v850_elf_tcom_symbol.name = ".tcommon";
2480 v850_elf_tcom_symbol.flags = BSF_SECTION_SYM;
2481 v850_elf_tcom_symbol.section = & v850_elf_tcom_section;
2482 v850_elf_tcom_symbol_ptr = & v850_elf_tcom_symbol;
2483 }
2484 asym->section = & v850_elf_tcom_section;
2485 asym->value = elfsym->internal_elf_sym.st_size;
2486 break;
2487
2488 case SHN_V850_ZCOMMON:
2489 if (v850_elf_zcom_section.name == NULL)
2490 {
2491 /* Initialize the zcommon section. */
2492 v850_elf_zcom_section.name = ".zcommon";
2493 v850_elf_zcom_section.flags = SEC_IS_COMMON;
2494 v850_elf_zcom_section.output_section = & v850_elf_zcom_section;
2495 v850_elf_zcom_section.symbol = & v850_elf_zcom_symbol;
2496 v850_elf_zcom_section.symbol_ptr_ptr = & v850_elf_zcom_symbol_ptr;
2497 v850_elf_zcom_symbol.name = ".zcommon";
2498 v850_elf_zcom_symbol.flags = BSF_SECTION_SYM;
2499 v850_elf_zcom_symbol.section = & v850_elf_zcom_section;
2500 v850_elf_zcom_symbol_ptr = & v850_elf_zcom_symbol;
2501 }
2502 asym->section = & v850_elf_zcom_section;
2503 asym->value = elfsym->internal_elf_sym.st_size;
2504 break;
2505 }
2506}
2507
2508/* Hook called by the linker routine which adds symbols from an object
2509 file. We must handle the special v850 section numbers here. */
2510
b34976b6 2511static bfd_boolean
47b0e7ad
NC
2512v850_elf_add_symbol_hook (bfd *abfd,
2513 struct bfd_link_info *info ATTRIBUTE_UNUSED,
2514 Elf_Internal_Sym *sym,
2515 const char **namep ATTRIBUTE_UNUSED,
2516 flagword *flagsp ATTRIBUTE_UNUSED,
2517 asection **secp,
2518 bfd_vma *valp)
252b5132 2519{
9ad5cbcf 2520 unsigned int indx = sym->st_shndx;
435b1e90 2521
252b5132
RH
2522 /* If the section index is an "ordinary" index, then it may
2523 refer to a v850 specific section created by the assembler.
2524 Check the section's type and change the index it matches.
435b1e90 2525
252b5132 2526 FIXME: Should we alter the st_shndx field as well ? */
435b1e90 2527
9ad5cbcf 2528 if (indx < elf_numsections (abfd))
1cd986c5 2529 switch (elf_elfsections (abfd)[indx]->sh_type)
252b5132
RH
2530 {
2531 case SHT_V850_SCOMMON:
9ad5cbcf 2532 indx = SHN_V850_SCOMMON;
252b5132 2533 break;
435b1e90 2534
252b5132 2535 case SHT_V850_TCOMMON:
9ad5cbcf 2536 indx = SHN_V850_TCOMMON;
252b5132 2537 break;
435b1e90 2538
252b5132 2539 case SHT_V850_ZCOMMON:
9ad5cbcf 2540 indx = SHN_V850_ZCOMMON;
252b5132 2541 break;
435b1e90 2542
252b5132
RH
2543 default:
2544 break;
2545 }
435b1e90 2546
9ad5cbcf 2547 switch (indx)
252b5132
RH
2548 {
2549 case SHN_V850_SCOMMON:
2550 *secp = bfd_make_section_old_way (abfd, ".scommon");
2551 (*secp)->flags |= SEC_IS_COMMON;
2552 *valp = sym->st_size;
2553 break;
435b1e90 2554
252b5132
RH
2555 case SHN_V850_TCOMMON:
2556 *secp = bfd_make_section_old_way (abfd, ".tcommon");
2557 (*secp)->flags |= SEC_IS_COMMON;
2558 *valp = sym->st_size;
2559 break;
435b1e90 2560
252b5132
RH
2561 case SHN_V850_ZCOMMON:
2562 *secp = bfd_make_section_old_way (abfd, ".zcommon");
2563 (*secp)->flags |= SEC_IS_COMMON;
2564 *valp = sym->st_size;
2565 break;
2566 }
2567
b34976b6 2568 return TRUE;
252b5132
RH
2569}
2570
6e0b88f1 2571static int
47b0e7ad
NC
2572v850_elf_link_output_symbol_hook (struct bfd_link_info *info ATTRIBUTE_UNUSED,
2573 const char *name ATTRIBUTE_UNUSED,
2574 Elf_Internal_Sym *sym,
2575 asection *input_sec,
3dd2d30b 2576 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
252b5132
RH
2577{
2578 /* If we see a common symbol, which implies a relocatable link, then
2579 if a symbol was in a special common section in an input file, mark
2580 it as a special common in the output file. */
435b1e90 2581
252b5132
RH
2582 if (sym->st_shndx == SHN_COMMON)
2583 {
2584 if (strcmp (input_sec->name, ".scommon") == 0)
2585 sym->st_shndx = SHN_V850_SCOMMON;
2586 else if (strcmp (input_sec->name, ".tcommon") == 0)
2587 sym->st_shndx = SHN_V850_TCOMMON;
2588 else if (strcmp (input_sec->name, ".zcommon") == 0)
2589 sym->st_shndx = SHN_V850_ZCOMMON;
2590 }
2591
d4c87fc1
AM
2592 /* The price we pay for using h->other unused bits as flags in the
2593 linker is cleaning up after ourselves. */
3dd2d30b
AM
2594
2595 sym->st_other &= ~(V850_OTHER_SDA | V850_OTHER_ZDA | V850_OTHER_TDA
2596 | V850_OTHER_ERROR);
d4c87fc1 2597
6e0b88f1 2598 return 1;
252b5132
RH
2599}
2600
b34976b6 2601static bfd_boolean
6dc132d9
L
2602v850_elf_section_from_shdr (bfd *abfd,
2603 Elf_Internal_Shdr *hdr,
2604 const char *name,
2605 int shindex)
252b5132
RH
2606{
2607 /* There ought to be a place to keep ELF backend specific flags, but
2608 at the moment there isn't one. We just keep track of the
2609 sections by their name, instead. */
2610
6dc132d9 2611 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
b34976b6 2612 return FALSE;
252b5132
RH
2613
2614 switch (hdr->sh_type)
2615 {
2616 case SHT_V850_SCOMMON:
2617 case SHT_V850_TCOMMON:
2618 case SHT_V850_ZCOMMON:
2619 if (! bfd_set_section_flags (abfd, hdr->bfd_section,
2620 (bfd_get_section_flags (abfd,
2621 hdr->bfd_section)
2622 | SEC_IS_COMMON)))
b34976b6 2623 return FALSE;
252b5132
RH
2624 }
2625
b34976b6 2626 return TRUE;
252b5132
RH
2627}
2628
e12dd2ea
NC
2629/* Set the correct type for a V850 ELF section. We do this
2630 by the section name, which is a hack, but ought to work. */
2631
b34976b6 2632static bfd_boolean
47b0e7ad
NC
2633v850_elf_fake_sections (bfd *abfd ATTRIBUTE_UNUSED,
2634 Elf_Internal_Shdr *hdr,
2635 asection *sec)
252b5132 2636{
47b0e7ad 2637 const char * name;
252b5132
RH
2638
2639 name = bfd_get_section_name (abfd, sec);
2640
2641 if (strcmp (name, ".scommon") == 0)
47b0e7ad 2642 hdr->sh_type = SHT_V850_SCOMMON;
252b5132 2643 else if (strcmp (name, ".tcommon") == 0)
47b0e7ad 2644 hdr->sh_type = SHT_V850_TCOMMON;
252b5132
RH
2645 else if (strcmp (name, ".zcommon") == 0)
2646 hdr->sh_type = SHT_V850_ZCOMMON;
435b1e90 2647
b34976b6 2648 return TRUE;
252b5132 2649}
86aba9db
NC
2650
2651/* Delete some bytes from a section while relaxing. */
2652
b34976b6 2653static bfd_boolean
47b0e7ad
NC
2654v850_elf_relax_delete_bytes (bfd *abfd,
2655 asection *sec,
2656 bfd_vma addr,
2657 bfd_vma toaddr,
2658 int count)
86aba9db 2659{
b34976b6
AM
2660 Elf_Internal_Shdr *symtab_hdr;
2661 Elf32_External_Sym *extsyms;
2662 Elf32_External_Sym *esym;
2663 Elf32_External_Sym *esymend;
91d6fa6a 2664 int sym_index;
b34976b6
AM
2665 unsigned int sec_shndx;
2666 bfd_byte *contents;
2667 Elf_Internal_Rela *irel;
2668 Elf_Internal_Rela *irelend;
2669 struct elf_link_hash_entry *sym_hash;
2670 Elf_Internal_Shdr *shndx_hdr;
2671 Elf_External_Sym_Shndx *shndx;
86aba9db
NC
2672
2673 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
2674 extsyms = (Elf32_External_Sym *) symtab_hdr->contents;
2675
2676 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
2677
2678 contents = elf_section_data (sec)->this_hdr.contents;
2679
2680 /* The deletion must stop at the next ALIGN reloc for an alignment
2681 power larger than the number of bytes we are deleting. */
2682
2683 /* Actually delete the bytes. */
2684#if (DEBUG_RELAX & 2)
2685 fprintf (stderr, "relax_delete: contents: sec: %s %p .. %p %x\n",
2686 sec->name, addr, toaddr, count );
2687#endif
2688 memmove (contents + addr, contents + addr + count,
2689 toaddr - addr - count);
2690 memset (contents + toaddr-count, 0, count);
2691
2692 /* Adjust all the relocs. */
2693 irel = elf_section_data (sec)->relocs;
2694 irelend = irel + sec->reloc_count;
2695 shndx_hdr = &elf_tdata (abfd)->symtab_shndx_hdr;
2696 shndx = (Elf_External_Sym_Shndx *) shndx_hdr->contents;
2697
2698 for (; irel < irelend; irel++)
2699 {
2700 bfd_vma raddr, paddr, symval;
2701 Elf_Internal_Sym isym;
2702
2703 /* Get the new reloc address. */
2704 raddr = irel->r_offset;
2705 if ((raddr >= (addr + count) && raddr < toaddr))
b34976b6 2706 irel->r_offset -= count;
86aba9db
NC
2707
2708 if (raddr >= addr && raddr < addr + count)
2709 {
2710 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
2711 (int) R_V850_NONE);
2712 continue;
2713 }
b34976b6 2714
86aba9db
NC
2715 if (ELF32_R_TYPE (irel->r_info) == (int) R_V850_ALIGN)
2716 continue;
2717
2718 bfd_elf32_swap_symbol_in (abfd,
2719 extsyms + ELF32_R_SYM (irel->r_info),
2720 shndx ? shndx + ELF32_R_SYM (irel->r_info) : NULL,
2721 & isym);
b34976b6 2722
86aba9db
NC
2723 if (isym.st_shndx != sec_shndx)
2724 continue;
2725
2726 /* Get the value of the symbol referred to by the reloc. */
2727 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
2728 {
2729 symval = isym.st_value;
2730#if (DEBUG_RELAX & 2)
2731 {
2732 char * name = bfd_elf_string_from_elf_section
2733 (abfd, symtab_hdr->sh_link, isym.st_name);
2734 fprintf (stderr,
2735 "relax_delete: local: sec: %s, sym: %s (%d), value: %x + %x + %x addend %x\n",
2736 sec->name, name, isym.st_name,
2737 sec->output_section->vma, sec->output_offset,
2738 isym.st_value, irel->r_addend);
2739 }
2740#endif
2741 }
2742 else
2743 {
2744 unsigned long indx;
2745 struct elf_link_hash_entry * h;
2746
2747 /* An external symbol. */
2748 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
2749
2750 h = elf_sym_hashes (abfd) [indx];
2751 BFD_ASSERT (h != NULL);
2752
2753 symval = h->root.u.def.value;
2754#if (DEBUG_RELAX & 2)
2755 fprintf (stderr,
2756 "relax_delete: defined: sec: %s, name: %s, value: %x + %x + %x addend %x\n",
2757 sec->name, h->root.root.string, h->root.u.def.value,
2758 sec->output_section->vma, sec->output_offset, irel->r_addend);
2759#endif
2760 }
b34976b6 2761
86aba9db 2762 paddr = symval + irel->r_addend;
b34976b6 2763
86aba9db
NC
2764 if ( (symval >= addr + count && symval < toaddr)
2765 && (paddr < addr + count || paddr >= toaddr))
2766 irel->r_addend += count;
2767 else if ( (symval < addr + count || symval >= toaddr)
2768 && (paddr >= addr + count && paddr < toaddr))
2769 irel->r_addend -= count;
2770 }
2771
2772 /* Adjust the local symbols defined in this section. */
2773 esym = extsyms;
2774 esymend = esym + symtab_hdr->sh_info;
2775
2776 for (; esym < esymend; esym++, shndx = (shndx ? shndx + 1 : NULL))
2777 {
2778 Elf_Internal_Sym isym;
2779
2780 bfd_elf32_swap_symbol_in (abfd, esym, shndx, & isym);
2781
2782 if (isym.st_shndx == sec_shndx
2783 && isym.st_value >= addr + count
2784 && isym.st_value < toaddr)
2785 {
2786 isym.st_value -= count;
2787
2788 if (isym.st_value + isym.st_size >= toaddr)
b34976b6
AM
2789 isym.st_size += count;
2790
63a23799 2791 bfd_elf32_swap_symbol_out (abfd, & isym, esym, shndx);
86aba9db
NC
2792 }
2793 else if (isym.st_shndx == sec_shndx
2794 && isym.st_value < addr + count)
2795 {
2796 if (isym.st_value+isym.st_size >= addr + count
2797 && isym.st_value+isym.st_size < toaddr)
2798 isym.st_size -= count;
2799
2800 if (isym.st_value >= addr
2801 && isym.st_value < addr + count)
2802 isym.st_value = addr;
2803
63a23799 2804 bfd_elf32_swap_symbol_out (abfd, & isym, esym, shndx);
86aba9db
NC
2805 }
2806 }
2807
2808 /* Now adjust the global symbols defined in this section. */
2809 esym = extsyms + symtab_hdr->sh_info;
2810 esymend = extsyms + (symtab_hdr->sh_size / sizeof (Elf32_External_Sym));
2811
91d6fa6a 2812 for (sym_index = 0; esym < esymend; esym ++, sym_index ++)
86aba9db
NC
2813 {
2814 Elf_Internal_Sym isym;
2815
2816 bfd_elf32_swap_symbol_in (abfd, esym, shndx, & isym);
91d6fa6a 2817 sym_hash = elf_sym_hashes (abfd) [sym_index];
86aba9db
NC
2818
2819 if (isym.st_shndx == sec_shndx
2820 && ((sym_hash)->root.type == bfd_link_hash_defined
2821 || (sym_hash)->root.type == bfd_link_hash_defweak)
2822 && (sym_hash)->root.u.def.section == sec
2823 && (sym_hash)->root.u.def.value >= addr + count
2824 && (sym_hash)->root.u.def.value < toaddr)
2825 {
2826 if ((sym_hash)->root.u.def.value + isym.st_size >= toaddr)
2827 {
2828 isym.st_size += count;
63a23799 2829 bfd_elf32_swap_symbol_out (abfd, & isym, esym, shndx);
86aba9db
NC
2830 }
2831
2832 (sym_hash)->root.u.def.value -= count;
2833 }
2834 else if (isym.st_shndx == sec_shndx
2835 && ((sym_hash)->root.type == bfd_link_hash_defined
2836 || (sym_hash)->root.type == bfd_link_hash_defweak)
2837 && (sym_hash)->root.u.def.section == sec
2838 && (sym_hash)->root.u.def.value < addr + count)
2839 {
2840 if ((sym_hash)->root.u.def.value+isym.st_size >= addr + count
2841 && (sym_hash)->root.u.def.value+isym.st_size < toaddr)
2842 isym.st_size -= count;
2843
2844 if ((sym_hash)->root.u.def.value >= addr
2845 && (sym_hash)->root.u.def.value < addr + count)
2846 (sym_hash)->root.u.def.value = addr;
2847
63a23799 2848 bfd_elf32_swap_symbol_out (abfd, & isym, esym, shndx);
86aba9db
NC
2849 }
2850
2851 if (shndx)
2852 ++ shndx;
2853 }
2854
b34976b6 2855 return TRUE;
86aba9db
NC
2856}
2857
2858#define NOP_OPCODE (0x0000)
1cd986c5 2859#define MOVHI 0x0640 /* 4byte. */
86aba9db 2860#define MOVHI_MASK 0x07e0
1cd986c5 2861#define MOVHI_R1(insn) ((insn) & 0x1f) /* 4byte. */
86aba9db 2862#define MOVHI_R2(insn) ((insn) >> 11)
1cd986c5 2863#define MOVEA 0x0620 /* 2byte. */
86aba9db
NC
2864#define MOVEA_MASK 0x07e0
2865#define MOVEA_R1(insn) ((insn) & 0x1f)
2866#define MOVEA_R2(insn) ((insn) >> 11)
1cd986c5 2867#define JARL_4 0x00040780 /* 4byte. */
86aba9db
NC
2868#define JARL_4_MASK 0xFFFF07FF
2869#define JARL_R2(insn) (int)(((insn) & (~JARL_4_MASK)) >> 11)
1cd986c5 2870#define ADD_I 0x0240 /* 2byte. */
86aba9db 2871#define ADD_I_MASK 0x07e0
1cd986c5 2872#define ADD_I5(insn) ((((insn) & 0x001f) << 11) >> 11) /* 2byte. */
86aba9db 2873#define ADD_R2(insn) ((insn) >> 11)
1cd986c5 2874#define JMP_R 0x0060 /* 2byte. */
86aba9db
NC
2875#define JMP_R_MASK 0xFFE0
2876#define JMP_R1(insn) ((insn) & 0x1f)
2877
b34976b6 2878static bfd_boolean
47b0e7ad
NC
2879v850_elf_relax_section (bfd *abfd,
2880 asection *sec,
2881 struct bfd_link_info *link_info,
2882 bfd_boolean *again)
86aba9db 2883{
b34976b6
AM
2884 Elf_Internal_Shdr *symtab_hdr;
2885 Elf_Internal_Rela *internal_relocs;
2886 Elf_Internal_Rela *irel;
2887 Elf_Internal_Rela *irelend;
2888 Elf_Internal_Rela *irelalign = NULL;
2889 Elf_Internal_Sym *isymbuf = NULL;
2890 bfd_byte *contents = NULL;
2891 bfd_vma addr = 0;
2892 bfd_vma toaddr;
2893 int align_pad_size = 0;
2894 bfd_boolean result = TRUE;
2895
2896 *again = FALSE;
86aba9db 2897
1049f94e 2898 if (link_info->relocatable
86aba9db
NC
2899 || (sec->flags & SEC_RELOC) == 0
2900 || sec->reloc_count == 0)
b34976b6 2901 return TRUE;
86aba9db 2902
86aba9db
NC
2903 symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
2904
45d6a902 2905 internal_relocs = (_bfd_elf_link_read_relocs
47b0e7ad 2906 (abfd, sec, NULL, NULL, link_info->keep_memory));
86aba9db
NC
2907 if (internal_relocs == NULL)
2908 goto error_return;
86aba9db
NC
2909
2910 irelend = internal_relocs + sec->reloc_count;
b34976b6 2911
eea6121a 2912 while (addr < sec->size)
86aba9db 2913 {
eea6121a 2914 toaddr = sec->size;
86aba9db
NC
2915
2916 for (irel = internal_relocs; irel < irelend; irel ++)
2917 if (ELF32_R_TYPE (irel->r_info) == (int) R_V850_ALIGN
2918 && irel->r_offset > addr
2919 && irel->r_offset < toaddr)
2920 toaddr = irel->r_offset;
b34976b6 2921
86aba9db
NC
2922#ifdef DEBUG_RELAX
2923 fprintf (stderr, "relax region 0x%x to 0x%x align pad %d\n",
2924 addr, toaddr, align_pad_size);
2925#endif
2926 if (irelalign)
2927 {
2928 bfd_vma alignto;
2929 bfd_vma alignmoveto;
2930
2931 alignmoveto = BFD_ALIGN (addr - align_pad_size, 1 << irelalign->r_addend);
2932 alignto = BFD_ALIGN (addr, 1 << irelalign->r_addend);
2933
2934 if (alignmoveto < alignto)
2935 {
2936 unsigned int i;
2937
2938 align_pad_size = alignto - alignmoveto;
2939#ifdef DEBUG_RELAX
2940 fprintf (stderr, "relax move region 0x%x to 0x%x delete size 0x%x\n",
2941 alignmoveto, toaddr, align_pad_size);
2942#endif
2943 if (!v850_elf_relax_delete_bytes (abfd, sec, alignmoveto,
2944 toaddr, align_pad_size))
b34976b6 2945 goto error_return;
86aba9db
NC
2946
2947 for (i = BFD_ALIGN (toaddr - align_pad_size, 1);
2948 (i + 1) < toaddr; i += 2)
2949 bfd_put_16 (abfd, NOP_OPCODE, contents + i);
2950
2951 addr = alignmoveto;
2952 }
2953 else
2954 align_pad_size = 0;
2955 }
2956
2957 for (irel = internal_relocs; irel < irelend; irel++)
2958 {
b34976b6
AM
2959 bfd_vma laddr;
2960 bfd_vma addend;
2961 bfd_vma symval;
2962 int insn[5];
2963 int no_match = -1;
2964 Elf_Internal_Rela *hi_irelfn;
2965 Elf_Internal_Rela *lo_irelfn;
2966 Elf_Internal_Rela *irelcall;
2967 bfd_signed_vma foff;
86aba9db
NC
2968
2969 if (! (irel->r_offset >= addr && irel->r_offset < toaddr
2970 && (ELF32_R_TYPE (irel->r_info) == (int) R_V850_LONGCALL
2971 || ELF32_R_TYPE (irel->r_info) == (int) R_V850_LONGJUMP)))
2972 continue;
2973
2974#ifdef DEBUG_RELAX
2975 fprintf (stderr, "relax check r_info 0x%x r_offset 0x%x r_addend 0x%x\n",
2976 irel->r_info,
2977 irel->r_offset,
2978 irel->r_addend );
2979#endif
2980
2981 /* Get the section contents. */
2982 if (contents == NULL)
2983 {
2984 if (elf_section_data (sec)->this_hdr.contents != NULL)
2985 contents = elf_section_data (sec)->this_hdr.contents;
2986 else
2987 {
47b0e7ad 2988 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
86aba9db
NC
2989 goto error_return;
2990 }
2991 }
2992
5cec6941
NC
2993 /* Read this BFD's local symbols if we haven't done so already. */
2994 if (isymbuf == NULL && symtab_hdr->sh_info != 0)
86aba9db 2995 {
5cec6941
NC
2996 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
2997 if (isymbuf == NULL)
2998 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
2999 symtab_hdr->sh_info, 0,
3000 NULL, NULL, NULL);
3001 if (isymbuf == NULL)
3002 goto error_return;
86aba9db
NC
3003 }
3004
3005 laddr = irel->r_offset;
3006
3007 if (ELF32_R_TYPE (irel->r_info) == (int) R_V850_LONGCALL)
3008 {
3009 /* Check code for -mlong-calls output. */
eea6121a 3010 if (laddr + 16 <= (bfd_vma) sec->size)
86aba9db
NC
3011 {
3012 insn[0] = bfd_get_16 (abfd, contents + laddr);
3013 insn[1] = bfd_get_16 (abfd, contents + laddr + 4);
3014 insn[2] = bfd_get_32 (abfd, contents + laddr + 8);
3015 insn[3] = bfd_get_16 (abfd, contents + laddr + 12);
3016 insn[4] = bfd_get_16 (abfd, contents + laddr + 14);
b34976b6 3017
86aba9db
NC
3018 if ((insn[0] & MOVHI_MASK) != MOVHI
3019 || MOVHI_R1 (insn[0]) != 0)
3020 no_match = 0;
3021
3022 if (no_match < 0
3023 && ((insn[1] & MOVEA_MASK) != MOVEA
3024 || MOVHI_R2 (insn[0]) != MOVEA_R1 (insn[1])))
3025 no_match = 1;
3026
3027 if (no_match < 0
3028 && (insn[2] & JARL_4_MASK) != JARL_4)
3029 no_match = 2;
3030
3031 if (no_match < 0
3032 && ((insn[3] & ADD_I_MASK) != ADD_I
3033 || ADD_I5 (insn[3]) != 4
3034 || JARL_R2 (insn[2]) != ADD_R2 (insn[3])))
3035 no_match = 3;
3036
3037 if (no_match < 0
3038 && ((insn[4] & JMP_R_MASK) != JMP_R
3039 || MOVEA_R2 (insn[1]) != JMP_R1 (insn[4])))
3040 no_match = 4;
3041 }
3042 else
3043 {
3044 ((*_bfd_error_handler)
3045 ("%s: 0x%lx: warning: R_V850_LONGCALL points to unrecognized insns",
3046 bfd_get_filename (abfd), (unsigned long) irel->r_offset));
3047
3048 continue;
3049 }
3050
3051 if (no_match >= 0)
3052 {
3053 ((*_bfd_error_handler)
3054 ("%s: 0x%lx: warning: R_V850_LONGCALL points to unrecognized insn 0x%x",
3055 bfd_get_filename (abfd), (unsigned long) irel->r_offset+no_match, insn[no_match]));
3056
3057 continue;
b34976b6 3058 }
86aba9db
NC
3059
3060 /* Get the reloc for the address from which the register is
3061 being loaded. This reloc will tell us which function is
3062 actually being called. */
3063 for (hi_irelfn = internal_relocs; hi_irelfn < irelend; hi_irelfn ++)
3064 if (hi_irelfn->r_offset == laddr + 2
b34976b6 3065 && ELF32_R_TYPE (hi_irelfn->r_info)
86aba9db
NC
3066 == (int) R_V850_HI16_S)
3067 break;
3068
3069 for (lo_irelfn = internal_relocs; lo_irelfn < irelend; lo_irelfn ++)
3070 if (lo_irelfn->r_offset == laddr + 6
3071 && ELF32_R_TYPE (lo_irelfn->r_info)
3072 == (int) R_V850_LO16)
3073 break;
3074
3075 for (irelcall = internal_relocs; irelcall < irelend; irelcall ++)
3076 if (irelcall->r_offset == laddr + 8
3077 && ELF32_R_TYPE (irelcall->r_info)
3078 == (int) R_V850_22_PCREL)
3079 break;
3080
3081 if ( hi_irelfn == irelend
3082 || lo_irelfn == irelend
3083 || irelcall == irelend)
3084 {
3085 ((*_bfd_error_handler)
3086 ("%s: 0x%lx: warning: R_V850_LONGCALL points to unrecognized reloc",
3087 bfd_get_filename (abfd), (unsigned long) irel->r_offset ));
3088
3089 continue;
3090 }
b34976b6 3091
86aba9db
NC
3092 if (ELF32_R_SYM (irelcall->r_info) < symtab_hdr->sh_info)
3093 {
5cec6941 3094 Elf_Internal_Sym * isym;
86aba9db
NC
3095
3096 /* A local symbol. */
5cec6941 3097 isym = isymbuf + ELF32_R_SYM (irelcall->r_info);
86aba9db 3098
5cec6941 3099 symval = isym->st_value;
86aba9db
NC
3100 }
3101 else
3102 {
3103 unsigned long indx;
3104 struct elf_link_hash_entry * h;
3105
3106 /* An external symbol. */
3107 indx = ELF32_R_SYM (irelcall->r_info) - symtab_hdr->sh_info;
3108 h = elf_sym_hashes (abfd)[indx];
3109 BFD_ASSERT (h != NULL);
3110
3111 if ( h->root.type != bfd_link_hash_defined
3112 && h->root.type != bfd_link_hash_defweak)
3113 /* This appears to be a reference to an undefined
3114 symbol. Just ignore it--it will be caught by the
3115 regular reloc processing. */
3116 continue;
3117
3118 symval = h->root.u.def.value;
3119 }
3120
3121 if (symval + irelcall->r_addend != irelcall->r_offset + 4)
3122 {
3123 ((*_bfd_error_handler)
3124 ("%s: 0x%lx: warning: R_V850_LONGCALL points to unrecognized reloc 0x%lx",
3125 bfd_get_filename (abfd), (unsigned long) irel->r_offset, irelcall->r_offset ));
3126
3127 continue;
3128 }
3129
3130 /* Get the value of the symbol referred to by the reloc. */
3131 if (ELF32_R_SYM (hi_irelfn->r_info) < symtab_hdr->sh_info)
3132 {
b34976b6
AM
3133 Elf_Internal_Sym *isym;
3134 asection *sym_sec;
86aba9db
NC
3135
3136 /* A local symbol. */
5cec6941 3137 isym = isymbuf + ELF32_R_SYM (hi_irelfn->r_info);
b34976b6 3138
5cec6941 3139 if (isym->st_shndx == SHN_UNDEF)
86aba9db 3140 sym_sec = bfd_und_section_ptr;
5cec6941 3141 else if (isym->st_shndx == SHN_ABS)
86aba9db 3142 sym_sec = bfd_abs_section_ptr;
5cec6941 3143 else if (isym->st_shndx == SHN_COMMON)
86aba9db
NC
3144 sym_sec = bfd_com_section_ptr;
3145 else
5cec6941
NC
3146 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
3147 symval = (isym->st_value
86aba9db
NC
3148 + sym_sec->output_section->vma
3149 + sym_sec->output_offset);
3150 }
3151 else
3152 {
3153 unsigned long indx;
b34976b6 3154 struct elf_link_hash_entry *h;
86aba9db
NC
3155
3156 /* An external symbol. */
5cec6941 3157 indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info;
86aba9db
NC
3158 h = elf_sym_hashes (abfd)[indx];
3159 BFD_ASSERT (h != NULL);
3160
3161 if ( h->root.type != bfd_link_hash_defined
3162 && h->root.type != bfd_link_hash_defweak)
3163 /* This appears to be a reference to an undefined
3164 symbol. Just ignore it--it will be caught by the
3165 regular reloc processing. */
3166 continue;
3167
3168 symval = (h->root.u.def.value
3169 + h->root.u.def.section->output_section->vma
3170 + h->root.u.def.section->output_offset);
3171 }
3172
3173 addend = irel->r_addend;
3174
3175 foff = (symval + addend
3176 - (irel->r_offset
3177 + sec->output_section->vma
3178 + sec->output_offset
3179 + 4));
3180#ifdef DEBUG_RELAX
3181 fprintf (stderr, "relax longcall r_offset 0x%x ptr 0x%x symbol 0x%x addend 0x%x distance 0x%x\n",
3182 irel->r_offset,
3183 (irel->r_offset
3184 + sec->output_section->vma
3185 + sec->output_offset),
3186 symval, addend, foff);
3187#endif
3188
3189 if (foff < -0x100000 || foff >= 0x100000)
3190 /* After all that work, we can't shorten this function call. */
3191 continue;
3192
3193 /* For simplicity of coding, we are going to modify the section
3194 contents, the section relocs, and the BFD symbol table. We
3195 must tell the rest of the code not to free up this
3196 information. It would be possible to instead create a table
3197 of changes which have to be made, as is done in coff-mips.c;
3198 that would be more work, but would require less memory when
3199 the linker is run. */
3200 elf_section_data (sec)->relocs = internal_relocs;
86aba9db 3201 elf_section_data (sec)->this_hdr.contents = contents;
5cec6941 3202 symtab_hdr->contents = (bfd_byte *) isymbuf;
b34976b6 3203
86aba9db
NC
3204 /* Replace the long call with a jarl. */
3205 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_V850_22_PCREL);
3206
3207 addend = 0;
3208
3209 if (ELF32_R_SYM (hi_irelfn->r_info) < symtab_hdr->sh_info)
3210 /* If this needs to be changed because of future relaxing,
3211 it will be handled here like other internal IND12W
3212 relocs. */
3213 bfd_put_32 (abfd,
3214 0x00000780 | (JARL_R2 (insn[2])<<11) | ((addend << 16) & 0xffff) | ((addend >> 16) & 0xf),
3215 contents + irel->r_offset);
3216 else
3217 /* We can't fully resolve this yet, because the external
3218 symbol value may be changed by future relaxing.
3219 We let the final link phase handle it. */
3220 bfd_put_32 (abfd, 0x00000780 | (JARL_R2 (insn[2])<<11),
3221 contents + irel->r_offset);
3222
b34976b6 3223 hi_irelfn->r_info =
86aba9db
NC
3224 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_V850_NONE);
3225 lo_irelfn->r_info =
3226 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_V850_NONE);
3227 irelcall->r_info =
3228 ELF32_R_INFO (ELF32_R_SYM (irelcall->r_info), R_V850_NONE);
3229
3230 if (! v850_elf_relax_delete_bytes (abfd, sec,
3231 irel->r_offset + 4, toaddr, 12))
3232 goto error_return;
3233
3234 align_pad_size += 12;
3235 }
3236 else if (ELF32_R_TYPE (irel->r_info) == (int) R_V850_LONGJUMP)
3237 {
3238 /* Check code for -mlong-jumps output. */
eea6121a 3239 if (laddr + 10 <= (bfd_vma) sec->size)
86aba9db
NC
3240 {
3241 insn[0] = bfd_get_16 (abfd, contents + laddr);
3242 insn[1] = bfd_get_16 (abfd, contents + laddr + 4);
3243 insn[2] = bfd_get_16 (abfd, contents + laddr + 8);
3244
3245 if ((insn[0] & MOVHI_MASK) != MOVHI
3246 || MOVHI_R1 (insn[0]) != 0)
3247 no_match = 0;
3248
3249 if (no_match < 0
3250 && ((insn[1] & MOVEA_MASK) != MOVEA
3251 || MOVHI_R2 (insn[0]) != MOVEA_R1 (insn[1])))
3252 no_match = 1;
3253
3254 if (no_match < 0
3255 && ((insn[2] & JMP_R_MASK) != JMP_R
3256 || MOVEA_R2 (insn[1]) != JMP_R1 (insn[2])))
3257 no_match = 4;
3258 }
3259 else
3260 {
3261 ((*_bfd_error_handler)
3262 ("%s: 0x%lx: warning: R_V850_LONGJUMP points to unrecognized insns",
3263 bfd_get_filename (abfd), (unsigned long) irel->r_offset));
3264
3265 continue;
3266 }
3267
3268 if (no_match >= 0)
3269 {
3270 ((*_bfd_error_handler)
3271 ("%s: 0x%lx: warning: R_V850_LONGJUMP points to unrecognized insn 0x%x",
3272 bfd_get_filename (abfd), (unsigned long) irel->r_offset+no_match, insn[no_match]));
3273
3274 continue;
3275 }
3276
3277 /* Get the reloc for the address from which the register is
3278 being loaded. This reloc will tell us which function is
3279 actually being called. */
3280 for (hi_irelfn = internal_relocs; hi_irelfn < irelend; hi_irelfn ++)
3281 if (hi_irelfn->r_offset == laddr + 2
b34976b6 3282 && ELF32_R_TYPE (hi_irelfn->r_info) == (int) R_V850_HI16_S)
86aba9db
NC
3283 break;
3284
3285 for (lo_irelfn = internal_relocs; lo_irelfn < irelend; lo_irelfn ++)
3286 if (lo_irelfn->r_offset == laddr + 6
3287 && ELF32_R_TYPE (lo_irelfn->r_info) == (int) R_V850_LO16)
3288 break;
3289
3290 if ( hi_irelfn == irelend
3291 || lo_irelfn == irelend)
3292 {
3293 ((*_bfd_error_handler)
3294 ("%s: 0x%lx: warning: R_V850_LONGJUMP points to unrecognized reloc",
3295 bfd_get_filename (abfd), (unsigned long) irel->r_offset ));
3296
3297 continue;
3298 }
b34976b6 3299
86aba9db
NC
3300 /* Get the value of the symbol referred to by the reloc. */
3301 if (ELF32_R_SYM (hi_irelfn->r_info) < symtab_hdr->sh_info)
3302 {
5cec6941
NC
3303 Elf_Internal_Sym * isym;
3304 asection * sym_sec;
86aba9db
NC
3305
3306 /* A local symbol. */
5cec6941
NC
3307 isym = isymbuf + ELF32_R_SYM (hi_irelfn->r_info);
3308
3309 if (isym->st_shndx == SHN_UNDEF)
86aba9db 3310 sym_sec = bfd_und_section_ptr;
5cec6941 3311 else if (isym->st_shndx == SHN_ABS)
86aba9db 3312 sym_sec = bfd_abs_section_ptr;
5cec6941 3313 else if (isym->st_shndx == SHN_COMMON)
86aba9db
NC
3314 sym_sec = bfd_com_section_ptr;
3315 else
5cec6941
NC
3316 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
3317 symval = (isym->st_value
86aba9db
NC
3318 + sym_sec->output_section->vma
3319 + sym_sec->output_offset);
3320#ifdef DEBUG_RELAX
3321 {
3322 char * name = bfd_elf_string_from_elf_section
5cec6941 3323 (abfd, symtab_hdr->sh_link, isym->st_name);
86aba9db
NC
3324
3325 fprintf (stderr, "relax long jump local: sec: %s, sym: %s (%d), value: %x + %x + %x addend %x\n",
5cec6941
NC
3326 sym_sec->name, name, isym->st_name,
3327 sym_sec->output_section->vma,
3328 sym_sec->output_offset,
3329 isym->st_value, irel->r_addend);
86aba9db
NC
3330 }
3331#endif
3332 }
3333 else
3334 {
3335 unsigned long indx;
3336 struct elf_link_hash_entry * h;
3337
3338 /* An external symbol. */
3339 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
3340 h = elf_sym_hashes (abfd)[indx];
3341 BFD_ASSERT (h != NULL);
3342
3343 if ( h->root.type != bfd_link_hash_defined
3344 && h->root.type != bfd_link_hash_defweak)
3345 /* This appears to be a reference to an undefined
3346 symbol. Just ignore it--it will be caught by the
3347 regular reloc processing. */
3348 continue;
3349
3350 symval = (h->root.u.def.value
3351 + h->root.u.def.section->output_section->vma
3352 + h->root.u.def.section->output_offset);
3353#ifdef DEBUG_RELAX
3354 fprintf (stderr,
3355 "relax longjump defined: sec: %s, name: %s, value: %x + %x + %x addend %x\n",
3356 sec->name, h->root.root.string, h->root.u.def.value,
3357 sec->output_section->vma, sec->output_offset, irel->r_addend);
3358#endif
3359 }
3360
3361 addend = irel->r_addend;
3362
3363 foff = (symval + addend
3364 - (irel->r_offset
3365 + sec->output_section->vma
3366 + sec->output_offset
3367 + 4));
3368#ifdef DEBUG_RELAX
3369 fprintf (stderr, "relax longjump r_offset 0x%x ptr 0x%x symbol 0x%x addend 0x%x distance 0x%x\n",
3370 irel->r_offset,
3371 (irel->r_offset
3372 + sec->output_section->vma
3373 + sec->output_offset),
3374 symval, addend, foff);
3375#endif
3376 if (foff < -0x100000 || foff >= 0x100000)
3377 /* After all that work, we can't shorten this function call. */
3378 continue;
3379
3380 /* For simplicity of coding, we are going to modify the section
3381 contents, the section relocs, and the BFD symbol table. We
3382 must tell the rest of the code not to free up this
3383 information. It would be possible to instead create a table
3384 of changes which have to be made, as is done in coff-mips.c;
3385 that would be more work, but would require less memory when
3386 the linker is run. */
3387 elf_section_data (sec)->relocs = internal_relocs;
86aba9db 3388 elf_section_data (sec)->this_hdr.contents = contents;
5cec6941 3389 symtab_hdr->contents = (bfd_byte *) isymbuf;
86aba9db
NC
3390
3391 if (foff < -0x100 || foff >= 0x100)
3392 {
3393 /* Replace the long jump with a jr. */
3394
3395 irel->r_info =
b34976b6
AM
3396 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_V850_22_PCREL);
3397
86aba9db
NC
3398 irel->r_addend = addend;
3399 addend = 0;
3400
3401 if (ELF32_R_SYM (hi_irelfn->r_info) < symtab_hdr->sh_info)
3402 /* If this needs to be changed because of future relaxing,
3403 it will be handled here like other internal IND12W
3404 relocs. */
3405 bfd_put_32 (abfd,
3406 0x00000780 | ((addend << 15) & 0xffff0000) | ((addend >> 17) & 0xf),
3407 contents + irel->r_offset);
3408 else
3409 /* We can't fully resolve this yet, because the external
3410 symbol value may be changed by future relaxing.
3411 We let the final link phase handle it. */
3412 bfd_put_32 (abfd, 0x00000780, contents + irel->r_offset);
3413
3414 hi_irelfn->r_info =
3415 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_V850_NONE);
3416 lo_irelfn->r_info =
3417 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_V850_NONE);
3418 if (!v850_elf_relax_delete_bytes (abfd, sec,
3419 irel->r_offset + 4, toaddr, 6))
3420 goto error_return;
3421
3422 align_pad_size += 6;
3423 }
3424 else
3425 {
3426 /* Replace the long jump with a br. */
3427
3428 irel->r_info =
3429 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_V850_9_PCREL);
3430
3431 irel->r_addend = addend;
3432 addend = 0;
3433
3434 if (ELF32_R_SYM (hi_irelfn->r_info) < symtab_hdr->sh_info)
3435 /* If this needs to be changed because of future relaxing,
3436 it will be handled here like other internal IND12W
3437 relocs. */
3438 bfd_put_16 (abfd,
3439 0x0585 | ((addend << 10) & 0xf800) | ((addend << 3) & 0x0070),
3440 contents + irel->r_offset);
3441 else
3442 /* We can't fully resolve this yet, because the external
3443 symbol value may be changed by future relaxing.
3444 We let the final link phase handle it. */
3445 bfd_put_16 (abfd, 0x0585, contents + irel->r_offset);
3446
3447 hi_irelfn->r_info =
3448 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_V850_NONE);
3449 lo_irelfn->r_info =
3450 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_V850_NONE);
3451 if (!v850_elf_relax_delete_bytes (abfd, sec,
3452 irel->r_offset + 2, toaddr, 8))
3453 goto error_return;
3454
3455 align_pad_size += 8;
3456 }
3457 }
3458 }
3459
3460 irelalign = NULL;
3461 for (irel = internal_relocs; irel < irelend; irel++)
3462 {
3463 if (ELF32_R_TYPE (irel->r_info) == (int) R_V850_ALIGN
3464 && irel->r_offset == toaddr)
3465 {
3466 irel->r_offset -= align_pad_size;
3467
3468 if (irelalign == NULL || irelalign->r_addend > irel->r_addend)
3469 irelalign = irel;
3470 }
3471 }
3472
3473 addr = toaddr;
3474 }
3475
3476 if (!irelalign)
3477 {
3478#ifdef DEBUG_RELAX
3479 fprintf (stderr, "relax pad %d shorten %d -> %d\n",
3480 align_pad_size,
eea6121a
AM
3481 sec->size,
3482 sec->size - align_pad_size);
86aba9db 3483#endif
eea6121a 3484 sec->size -= align_pad_size;
86aba9db
NC
3485 }
3486
5cec6941
NC
3487 finish:
3488 if (internal_relocs != NULL
3489 && elf_section_data (sec)->relocs != internal_relocs)
3490 free (internal_relocs);
86aba9db 3491
5cec6941
NC
3492 if (contents != NULL
3493 && elf_section_data (sec)->this_hdr.contents != (unsigned char *) contents)
3494 free (contents);
86aba9db 3495
5cec6941
NC
3496 if (isymbuf != NULL
3497 && symtab_hdr->contents != (bfd_byte *) isymbuf)
3498 free (isymbuf);
86aba9db 3499
5cec6941 3500 return result;
86aba9db 3501
5cec6941 3502 error_return:
b34976b6 3503 result = FALSE;
5cec6941 3504 goto finish;
86aba9db 3505}
2f89ff8d 3506
b35d266b 3507static const struct bfd_elf_special_section v850_elf_special_sections[] =
7f4d3958 3508{
0112cd26
NC
3509 { STRING_COMMA_LEN (".call_table_data"), 0, SHT_PROGBITS, (SHF_ALLOC + SHF_WRITE) },
3510 { STRING_COMMA_LEN (".call_table_text"), 0, SHT_PROGBITS, (SHF_ALLOC + SHF_WRITE
3511 + SHF_EXECINSTR) },
3512 { STRING_COMMA_LEN (".rosdata"), -2, SHT_PROGBITS, (SHF_ALLOC
3513 + SHF_V850_GPREL) },
3514 { STRING_COMMA_LEN (".rozdata"), -2, SHT_PROGBITS, (SHF_ALLOC
3515 + SHF_V850_R0REL) },
3516 { STRING_COMMA_LEN (".sbss"), -2, SHT_NOBITS, (SHF_ALLOC + SHF_WRITE
3517 + SHF_V850_GPREL) },
3518 { STRING_COMMA_LEN (".scommon"), -2, SHT_V850_SCOMMON, (SHF_ALLOC + SHF_WRITE
3519 + SHF_V850_GPREL) },
3520 { STRING_COMMA_LEN (".sdata"), -2, SHT_PROGBITS, (SHF_ALLOC + SHF_WRITE
3521 + SHF_V850_GPREL) },
3522 { STRING_COMMA_LEN (".tbss"), -2, SHT_NOBITS, (SHF_ALLOC + SHF_WRITE
3523 + SHF_V850_EPREL) },
3524 { STRING_COMMA_LEN (".tcommon"), -2, SHT_V850_TCOMMON, (SHF_ALLOC + SHF_WRITE
3525 + SHF_V850_R0REL) },
3526 { STRING_COMMA_LEN (".tdata"), -2, SHT_PROGBITS, (SHF_ALLOC + SHF_WRITE
3527 + SHF_V850_EPREL) },
3528 { STRING_COMMA_LEN (".zbss"), -2, SHT_NOBITS, (SHF_ALLOC + SHF_WRITE
3529 + SHF_V850_R0REL) },
3530 { STRING_COMMA_LEN (".zcommon"), -2, SHT_V850_ZCOMMON, (SHF_ALLOC + SHF_WRITE
3531 + SHF_V850_R0REL) },
3532 { STRING_COMMA_LEN (".zdata"), -2, SHT_PROGBITS, (SHF_ALLOC + SHF_WRITE
3533 + SHF_V850_R0REL) },
3534 { NULL, 0, 0, 0, 0 }
7f4d3958 3535};
252b5132
RH
3536\f
3537#define TARGET_LITTLE_SYM bfd_elf32_v850_vec
3538#define TARGET_LITTLE_NAME "elf32-v850"
3539#define ELF_ARCH bfd_arch_v850
aa4f99bb
AO
3540#define ELF_MACHINE_CODE EM_V850
3541#define ELF_MACHINE_ALT1 EM_CYGNUS_V850
46767561 3542#define ELF_MACHINE_ALT2 EM_V800 /* This is the value used by the GreenHills toolchain. */
252b5132 3543#define ELF_MAXPAGESIZE 0x1000
435b1e90 3544
252b5132
RH
3545#define elf_info_to_howto v850_elf_info_to_howto_rela
3546#define elf_info_to_howto_rel v850_elf_info_to_howto_rel
3547
3548#define elf_backend_check_relocs v850_elf_check_relocs
3549#define elf_backend_relocate_section v850_elf_relocate_section
3550#define elf_backend_object_p v850_elf_object_p
3551#define elf_backend_final_write_processing v850_elf_final_write_processing
3552#define elf_backend_section_from_bfd_section v850_elf_section_from_bfd_section
3553#define elf_backend_symbol_processing v850_elf_symbol_processing
3554#define elf_backend_add_symbol_hook v850_elf_add_symbol_hook
3555#define elf_backend_link_output_symbol_hook v850_elf_link_output_symbol_hook
3556#define elf_backend_section_from_shdr v850_elf_section_from_shdr
3557#define elf_backend_fake_sections v850_elf_fake_sections
3558#define elf_backend_gc_mark_hook v850_elf_gc_mark_hook
29ef7005 3559#define elf_backend_special_sections v850_elf_special_sections
252b5132
RH
3560
3561#define elf_backend_can_gc_sections 1
f0fe0e16 3562#define elf_backend_rela_normal 1
252b5132 3563
252b5132
RH
3564#define bfd_elf32_bfd_is_local_label_name v850_elf_is_local_label_name
3565#define bfd_elf32_bfd_reloc_type_lookup v850_elf_reloc_type_lookup
157090f7 3566#define bfd_elf32_bfd_reloc_name_lookup v850_elf_reloc_name_lookup
252b5132
RH
3567#define bfd_elf32_bfd_merge_private_bfd_data v850_elf_merge_private_bfd_data
3568#define bfd_elf32_bfd_set_private_flags v850_elf_set_private_flags
3569#define bfd_elf32_bfd_print_private_bfd_data v850_elf_print_private_bfd_data
86aba9db 3570#define bfd_elf32_bfd_relax_section v850_elf_relax_section
252b5132
RH
3571
3572#define elf_symbol_leading_char '_'
3573
3574#include "elf32-target.h"