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e0001a05 | 1 | /* Xtensa-specific support for 32-bit ELF. |
b3adc24a | 2 | Copyright (C) 2003-2020 Free Software Foundation, Inc. |
e0001a05 NC |
3 | |
4 | This file is part of BFD, the Binary File Descriptor library. | |
5 | ||
6 | This program is free software; you can redistribute it and/or | |
7 | modify it under the terms of the GNU General Public License as | |
cd123cb7 | 8 | published by the Free Software Foundation; either version 3 of the |
e0001a05 NC |
9 | License, or (at your option) any later version. |
10 | ||
11 | This program is distributed in the hope that it will be useful, but | |
12 | WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
3e110533 | 18 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA |
53e09e0a | 19 | 02110-1301, USA. */ |
e0001a05 | 20 | |
e0001a05 | 21 | #include "sysdep.h" |
3db64b00 | 22 | #include "bfd.h" |
e0001a05 | 23 | |
e0001a05 | 24 | #include <stdarg.h> |
e0001a05 NC |
25 | #include <strings.h> |
26 | ||
27 | #include "bfdlink.h" | |
28 | #include "libbfd.h" | |
29 | #include "elf-bfd.h" | |
30 | #include "elf/xtensa.h" | |
4c2af04f | 31 | #include "splay-tree.h" |
e0001a05 NC |
32 | #include "xtensa-isa.h" |
33 | #include "xtensa-config.h" | |
34 | ||
bb294208 AM |
35 | /* All users of this file have bfd_octets_per_byte (abfd, sec) == 1. */ |
36 | #define OCTETS_PER_BYTE(ABFD, SEC) 1 | |
37 | ||
43cd72b9 BW |
38 | #define XTENSA_NO_NOP_REMOVAL 0 |
39 | ||
7a77f1ac MF |
40 | #ifndef XSHAL_ABI |
41 | #define XSHAL_ABI 0 | |
42 | #endif | |
43 | ||
44 | #ifndef XTHAL_ABI_UNDEFINED | |
45 | #define XTHAL_ABI_UNDEFINED -1 | |
46 | #endif | |
47 | ||
48 | #ifndef XTHAL_ABI_WINDOWED | |
49 | #define XTHAL_ABI_WINDOWED 0 | |
50 | #endif | |
51 | ||
52 | #ifndef XTHAL_ABI_CALL0 | |
53 | #define XTHAL_ABI_CALL0 1 | |
54 | #endif | |
55 | ||
e0001a05 NC |
56 | /* Local helper functions. */ |
57 | ||
f0e6fdb2 | 58 | static bfd_boolean add_extra_plt_sections (struct bfd_link_info *, int); |
2db662be | 59 | static char *vsprint_msg (const char *, const char *, int, ...) ATTRIBUTE_PRINTF(2,4); |
e0001a05 | 60 | static bfd_reloc_status_type bfd_elf_xtensa_reloc |
7fa3d080 | 61 | (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); |
43cd72b9 | 62 | static bfd_boolean do_fix_for_relocatable_link |
7fa3d080 | 63 | (Elf_Internal_Rela *, bfd *, asection *, bfd_byte *); |
e0001a05 | 64 | static void do_fix_for_final_link |
7fa3d080 | 65 | (Elf_Internal_Rela *, bfd *, asection *, bfd_byte *, bfd_vma *); |
e0001a05 NC |
66 | |
67 | /* Local functions to handle Xtensa configurability. */ | |
68 | ||
7fa3d080 BW |
69 | static bfd_boolean is_indirect_call_opcode (xtensa_opcode); |
70 | static bfd_boolean is_direct_call_opcode (xtensa_opcode); | |
71 | static bfd_boolean is_windowed_call_opcode (xtensa_opcode); | |
72 | static xtensa_opcode get_const16_opcode (void); | |
73 | static xtensa_opcode get_l32r_opcode (void); | |
74 | static bfd_vma l32r_offset (bfd_vma, bfd_vma); | |
75 | static int get_relocation_opnd (xtensa_opcode, int); | |
76 | static int get_relocation_slot (int); | |
e0001a05 | 77 | static xtensa_opcode get_relocation_opcode |
7fa3d080 | 78 | (bfd *, asection *, bfd_byte *, Elf_Internal_Rela *); |
e0001a05 | 79 | static bfd_boolean is_l32r_relocation |
7fa3d080 BW |
80 | (bfd *, asection *, bfd_byte *, Elf_Internal_Rela *); |
81 | static bfd_boolean is_alt_relocation (int); | |
82 | static bfd_boolean is_operand_relocation (int); | |
43cd72b9 | 83 | static bfd_size_type insn_decode_len |
7fa3d080 | 84 | (bfd_byte *, bfd_size_type, bfd_size_type); |
e0d0c518 MF |
85 | static int insn_num_slots |
86 | (bfd_byte *, bfd_size_type, bfd_size_type); | |
43cd72b9 | 87 | static xtensa_opcode insn_decode_opcode |
7fa3d080 | 88 | (bfd_byte *, bfd_size_type, bfd_size_type, int); |
43cd72b9 | 89 | static bfd_boolean check_branch_target_aligned |
7fa3d080 | 90 | (bfd_byte *, bfd_size_type, bfd_vma, bfd_vma); |
43cd72b9 | 91 | static bfd_boolean check_loop_aligned |
7fa3d080 BW |
92 | (bfd_byte *, bfd_size_type, bfd_vma, bfd_vma); |
93 | static bfd_boolean check_branch_target_aligned_address (bfd_vma, int); | |
43cd72b9 | 94 | static bfd_size_type get_asm_simplify_size |
7fa3d080 | 95 | (bfd_byte *, bfd_size_type, bfd_size_type); |
e0001a05 NC |
96 | |
97 | /* Functions for link-time code simplifications. */ | |
98 | ||
43cd72b9 | 99 | static bfd_reloc_status_type elf_xtensa_do_asm_simplify |
7fa3d080 | 100 | (bfd_byte *, bfd_vma, bfd_vma, char **); |
e0001a05 | 101 | static bfd_reloc_status_type contract_asm_expansion |
7fa3d080 BW |
102 | (bfd_byte *, bfd_vma, Elf_Internal_Rela *, char **); |
103 | static xtensa_opcode swap_callx_for_call_opcode (xtensa_opcode); | |
104 | static xtensa_opcode get_expanded_call_opcode (bfd_byte *, int, bfd_boolean *); | |
e0001a05 NC |
105 | |
106 | /* Access to internal relocations, section contents and symbols. */ | |
107 | ||
108 | static Elf_Internal_Rela *retrieve_internal_relocs | |
7fa3d080 BW |
109 | (bfd *, asection *, bfd_boolean); |
110 | static void pin_internal_relocs (asection *, Elf_Internal_Rela *); | |
111 | static void release_internal_relocs (asection *, Elf_Internal_Rela *); | |
112 | static bfd_byte *retrieve_contents (bfd *, asection *, bfd_boolean); | |
113 | static void pin_contents (asection *, bfd_byte *); | |
114 | static void release_contents (asection *, bfd_byte *); | |
115 | static Elf_Internal_Sym *retrieve_local_syms (bfd *); | |
e0001a05 NC |
116 | |
117 | /* Miscellaneous utility functions. */ | |
118 | ||
f0e6fdb2 BW |
119 | static asection *elf_xtensa_get_plt_section (struct bfd_link_info *, int); |
120 | static asection *elf_xtensa_get_gotplt_section (struct bfd_link_info *, int); | |
7fa3d080 | 121 | static asection *get_elf_r_symndx_section (bfd *, unsigned long); |
e0001a05 | 122 | static struct elf_link_hash_entry *get_elf_r_symndx_hash_entry |
7fa3d080 BW |
123 | (bfd *, unsigned long); |
124 | static bfd_vma get_elf_r_symndx_offset (bfd *, unsigned long); | |
125 | static bfd_boolean is_reloc_sym_weak (bfd *, Elf_Internal_Rela *); | |
126 | static bfd_boolean pcrel_reloc_fits (xtensa_opcode, int, bfd_vma, bfd_vma); | |
127 | static bfd_boolean xtensa_is_property_section (asection *); | |
1d25768e | 128 | static bfd_boolean xtensa_is_insntable_section (asection *); |
7fa3d080 | 129 | static bfd_boolean xtensa_is_littable_section (asection *); |
1d25768e | 130 | static bfd_boolean xtensa_is_proptable_section (asection *); |
7fa3d080 BW |
131 | static int internal_reloc_compare (const void *, const void *); |
132 | static int internal_reloc_matches (const void *, const void *); | |
51c8ebc1 | 133 | static asection *xtensa_get_property_section (asection *, const char *); |
7fa3d080 | 134 | static flagword xtensa_get_property_predef_flags (asection *); |
e0001a05 NC |
135 | |
136 | /* Other functions called directly by the linker. */ | |
137 | ||
138 | typedef void (*deps_callback_t) | |
7fa3d080 | 139 | (asection *, bfd_vma, asection *, bfd_vma, void *); |
e0001a05 | 140 | extern bfd_boolean xtensa_callback_required_dependence |
7fa3d080 | 141 | (bfd *, asection *, struct bfd_link_info *, deps_callback_t, void *); |
e0001a05 NC |
142 | |
143 | ||
43cd72b9 BW |
144 | /* Globally visible flag for choosing size optimization of NOP removal |
145 | instead of branch-target-aware minimization for NOP removal. | |
146 | When nonzero, narrow all instructions and remove all NOPs possible | |
147 | around longcall expansions. */ | |
7fa3d080 | 148 | |
43cd72b9 BW |
149 | int elf32xtensa_size_opt; |
150 | ||
151 | ||
152 | /* The "new_section_hook" is used to set up a per-section | |
153 | "xtensa_relax_info" data structure with additional information used | |
154 | during relaxation. */ | |
e0001a05 | 155 | |
7fa3d080 | 156 | typedef struct xtensa_relax_info_struct xtensa_relax_info; |
e0001a05 | 157 | |
43cd72b9 | 158 | |
43cd72b9 BW |
159 | /* The GNU tools do not easily allow extending interfaces to pass around |
160 | the pointer to the Xtensa ISA information, so instead we add a global | |
161 | variable here (in BFD) that can be used by any of the tools that need | |
162 | this information. */ | |
163 | ||
164 | xtensa_isa xtensa_default_isa; | |
165 | ||
166 | ||
e0001a05 NC |
167 | /* When this is true, relocations may have been modified to refer to |
168 | symbols from other input files. The per-section list of "fix" | |
169 | records needs to be checked when resolving relocations. */ | |
170 | ||
171 | static bfd_boolean relaxing_section = FALSE; | |
172 | ||
43cd72b9 BW |
173 | /* When this is true, during final links, literals that cannot be |
174 | coalesced and their relocations may be moved to other sections. */ | |
175 | ||
176 | int elf32xtensa_no_literal_movement = 1; | |
177 | ||
8255c61b MF |
178 | /* Place property records for a section into individual property section |
179 | with xt.prop. prefix. */ | |
180 | ||
181 | bfd_boolean elf32xtensa_separate_props = FALSE; | |
182 | ||
7a77f1ac MF |
183 | /* Xtensa ABI. It affects PLT entry code. */ |
184 | ||
185 | int elf32xtensa_abi = XTHAL_ABI_UNDEFINED; | |
186 | ||
b0dddeec AM |
187 | /* Rename one of the generic section flags to better document how it |
188 | is used here. */ | |
189 | /* Whether relocations have been processed. */ | |
190 | #define reloc_done sec_flg0 | |
e0001a05 NC |
191 | \f |
192 | static reloc_howto_type elf_howto_table[] = | |
193 | { | |
6346d5ca | 194 | HOWTO (R_XTENSA_NONE, 0, 3, 0, FALSE, 0, complain_overflow_dont, |
e0001a05 | 195 | bfd_elf_xtensa_reloc, "R_XTENSA_NONE", |
e5f131d1 | 196 | FALSE, 0, 0, FALSE), |
e0001a05 NC |
197 | HOWTO (R_XTENSA_32, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, |
198 | bfd_elf_xtensa_reloc, "R_XTENSA_32", | |
199 | TRUE, 0xffffffff, 0xffffffff, FALSE), | |
e5f131d1 | 200 | |
e0001a05 NC |
201 | /* Replace a 32-bit value with a value from the runtime linker (only |
202 | used by linker-generated stub functions). The r_addend value is | |
203 | special: 1 means to substitute a pointer to the runtime linker's | |
204 | dynamic resolver function; 2 means to substitute the link map for | |
205 | the shared object. */ | |
206 | HOWTO (R_XTENSA_RTLD, 0, 2, 32, FALSE, 0, complain_overflow_dont, | |
e5f131d1 BW |
207 | NULL, "R_XTENSA_RTLD", FALSE, 0, 0, FALSE), |
208 | ||
e0001a05 NC |
209 | HOWTO (R_XTENSA_GLOB_DAT, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, |
210 | bfd_elf_generic_reloc, "R_XTENSA_GLOB_DAT", | |
e5f131d1 | 211 | FALSE, 0, 0xffffffff, FALSE), |
e0001a05 NC |
212 | HOWTO (R_XTENSA_JMP_SLOT, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, |
213 | bfd_elf_generic_reloc, "R_XTENSA_JMP_SLOT", | |
e5f131d1 | 214 | FALSE, 0, 0xffffffff, FALSE), |
e0001a05 NC |
215 | HOWTO (R_XTENSA_RELATIVE, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, |
216 | bfd_elf_generic_reloc, "R_XTENSA_RELATIVE", | |
e5f131d1 | 217 | FALSE, 0, 0xffffffff, FALSE), |
e0001a05 NC |
218 | HOWTO (R_XTENSA_PLT, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, |
219 | bfd_elf_xtensa_reloc, "R_XTENSA_PLT", | |
e5f131d1 BW |
220 | FALSE, 0, 0xffffffff, FALSE), |
221 | ||
e0001a05 | 222 | EMPTY_HOWTO (7), |
e5f131d1 BW |
223 | |
224 | /* Old relocations for backward compatibility. */ | |
e0001a05 | 225 | HOWTO (R_XTENSA_OP0, 0, 0, 0, TRUE, 0, complain_overflow_dont, |
e5f131d1 | 226 | bfd_elf_xtensa_reloc, "R_XTENSA_OP0", FALSE, 0, 0, TRUE), |
e0001a05 | 227 | HOWTO (R_XTENSA_OP1, 0, 0, 0, TRUE, 0, complain_overflow_dont, |
e5f131d1 | 228 | bfd_elf_xtensa_reloc, "R_XTENSA_OP1", FALSE, 0, 0, TRUE), |
e0001a05 | 229 | HOWTO (R_XTENSA_OP2, 0, 0, 0, TRUE, 0, complain_overflow_dont, |
e5f131d1 BW |
230 | bfd_elf_xtensa_reloc, "R_XTENSA_OP2", FALSE, 0, 0, TRUE), |
231 | ||
e0001a05 NC |
232 | /* Assembly auto-expansion. */ |
233 | HOWTO (R_XTENSA_ASM_EXPAND, 0, 0, 0, TRUE, 0, complain_overflow_dont, | |
e5f131d1 | 234 | bfd_elf_xtensa_reloc, "R_XTENSA_ASM_EXPAND", FALSE, 0, 0, TRUE), |
e0001a05 NC |
235 | /* Relax assembly auto-expansion. */ |
236 | HOWTO (R_XTENSA_ASM_SIMPLIFY, 0, 0, 0, TRUE, 0, complain_overflow_dont, | |
e5f131d1 BW |
237 | bfd_elf_xtensa_reloc, "R_XTENSA_ASM_SIMPLIFY", FALSE, 0, 0, TRUE), |
238 | ||
e0001a05 | 239 | EMPTY_HOWTO (13), |
1bbb5f21 BW |
240 | |
241 | HOWTO (R_XTENSA_32_PCREL, 0, 2, 32, TRUE, 0, complain_overflow_bitfield, | |
242 | bfd_elf_xtensa_reloc, "R_XTENSA_32_PCREL", | |
243 | FALSE, 0, 0xffffffff, TRUE), | |
e5f131d1 | 244 | |
e0001a05 NC |
245 | /* GNU extension to record C++ vtable hierarchy. */ |
246 | HOWTO (R_XTENSA_GNU_VTINHERIT, 0, 2, 0, FALSE, 0, complain_overflow_dont, | |
07d6d2b8 | 247 | NULL, "R_XTENSA_GNU_VTINHERIT", |
e5f131d1 | 248 | FALSE, 0, 0, FALSE), |
e0001a05 NC |
249 | /* GNU extension to record C++ vtable member usage. */ |
250 | HOWTO (R_XTENSA_GNU_VTENTRY, 0, 2, 0, FALSE, 0, complain_overflow_dont, | |
07d6d2b8 | 251 | _bfd_elf_rel_vtable_reloc_fn, "R_XTENSA_GNU_VTENTRY", |
e5f131d1 | 252 | FALSE, 0, 0, FALSE), |
43cd72b9 BW |
253 | |
254 | /* Relocations for supporting difference of symbols. */ | |
1058c753 | 255 | HOWTO (R_XTENSA_DIFF8, 0, 0, 8, FALSE, 0, complain_overflow_signed, |
e5f131d1 | 256 | bfd_elf_xtensa_reloc, "R_XTENSA_DIFF8", FALSE, 0, 0xff, FALSE), |
1058c753 | 257 | HOWTO (R_XTENSA_DIFF16, 0, 1, 16, FALSE, 0, complain_overflow_signed, |
e5f131d1 | 258 | bfd_elf_xtensa_reloc, "R_XTENSA_DIFF16", FALSE, 0, 0xffff, FALSE), |
1058c753 | 259 | HOWTO (R_XTENSA_DIFF32, 0, 2, 32, FALSE, 0, complain_overflow_signed, |
e5f131d1 | 260 | bfd_elf_xtensa_reloc, "R_XTENSA_DIFF32", FALSE, 0, 0xffffffff, FALSE), |
43cd72b9 BW |
261 | |
262 | /* General immediate operand relocations. */ | |
263 | HOWTO (R_XTENSA_SLOT0_OP, 0, 0, 0, TRUE, 0, complain_overflow_dont, | |
e5f131d1 | 264 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT0_OP", FALSE, 0, 0, TRUE), |
43cd72b9 | 265 | HOWTO (R_XTENSA_SLOT1_OP, 0, 0, 0, TRUE, 0, complain_overflow_dont, |
e5f131d1 | 266 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT1_OP", FALSE, 0, 0, TRUE), |
43cd72b9 | 267 | HOWTO (R_XTENSA_SLOT2_OP, 0, 0, 0, TRUE, 0, complain_overflow_dont, |
e5f131d1 | 268 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT2_OP", FALSE, 0, 0, TRUE), |
43cd72b9 | 269 | HOWTO (R_XTENSA_SLOT3_OP, 0, 0, 0, TRUE, 0, complain_overflow_dont, |
e5f131d1 | 270 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT3_OP", FALSE, 0, 0, TRUE), |
43cd72b9 | 271 | HOWTO (R_XTENSA_SLOT4_OP, 0, 0, 0, TRUE, 0, complain_overflow_dont, |
e5f131d1 | 272 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT4_OP", FALSE, 0, 0, TRUE), |
43cd72b9 | 273 | HOWTO (R_XTENSA_SLOT5_OP, 0, 0, 0, TRUE, 0, complain_overflow_dont, |
e5f131d1 | 274 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT5_OP", FALSE, 0, 0, TRUE), |
43cd72b9 | 275 | HOWTO (R_XTENSA_SLOT6_OP, 0, 0, 0, TRUE, 0, complain_overflow_dont, |
e5f131d1 | 276 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT6_OP", FALSE, 0, 0, TRUE), |
43cd72b9 | 277 | HOWTO (R_XTENSA_SLOT7_OP, 0, 0, 0, TRUE, 0, complain_overflow_dont, |
e5f131d1 | 278 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT7_OP", FALSE, 0, 0, TRUE), |
43cd72b9 | 279 | HOWTO (R_XTENSA_SLOT8_OP, 0, 0, 0, TRUE, 0, complain_overflow_dont, |
e5f131d1 | 280 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT8_OP", FALSE, 0, 0, TRUE), |
43cd72b9 | 281 | HOWTO (R_XTENSA_SLOT9_OP, 0, 0, 0, TRUE, 0, complain_overflow_dont, |
e5f131d1 | 282 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT9_OP", FALSE, 0, 0, TRUE), |
43cd72b9 | 283 | HOWTO (R_XTENSA_SLOT10_OP, 0, 0, 0, TRUE, 0, complain_overflow_dont, |
e5f131d1 | 284 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT10_OP", FALSE, 0, 0, TRUE), |
43cd72b9 | 285 | HOWTO (R_XTENSA_SLOT11_OP, 0, 0, 0, TRUE, 0, complain_overflow_dont, |
e5f131d1 | 286 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT11_OP", FALSE, 0, 0, TRUE), |
43cd72b9 | 287 | HOWTO (R_XTENSA_SLOT12_OP, 0, 0, 0, TRUE, 0, complain_overflow_dont, |
e5f131d1 | 288 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT12_OP", FALSE, 0, 0, TRUE), |
43cd72b9 | 289 | HOWTO (R_XTENSA_SLOT13_OP, 0, 0, 0, TRUE, 0, complain_overflow_dont, |
e5f131d1 | 290 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT13_OP", FALSE, 0, 0, TRUE), |
43cd72b9 | 291 | HOWTO (R_XTENSA_SLOT14_OP, 0, 0, 0, TRUE, 0, complain_overflow_dont, |
e5f131d1 | 292 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT14_OP", FALSE, 0, 0, TRUE), |
43cd72b9 BW |
293 | |
294 | /* "Alternate" relocations. The meaning of these is opcode-specific. */ | |
295 | HOWTO (R_XTENSA_SLOT0_ALT, 0, 0, 0, TRUE, 0, complain_overflow_dont, | |
e5f131d1 | 296 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT0_ALT", FALSE, 0, 0, TRUE), |
43cd72b9 | 297 | HOWTO (R_XTENSA_SLOT1_ALT, 0, 0, 0, TRUE, 0, complain_overflow_dont, |
e5f131d1 | 298 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT1_ALT", FALSE, 0, 0, TRUE), |
43cd72b9 | 299 | HOWTO (R_XTENSA_SLOT2_ALT, 0, 0, 0, TRUE, 0, complain_overflow_dont, |
e5f131d1 | 300 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT2_ALT", FALSE, 0, 0, TRUE), |
43cd72b9 | 301 | HOWTO (R_XTENSA_SLOT3_ALT, 0, 0, 0, TRUE, 0, complain_overflow_dont, |
e5f131d1 | 302 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT3_ALT", FALSE, 0, 0, TRUE), |
43cd72b9 | 303 | HOWTO (R_XTENSA_SLOT4_ALT, 0, 0, 0, TRUE, 0, complain_overflow_dont, |
e5f131d1 | 304 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT4_ALT", FALSE, 0, 0, TRUE), |
43cd72b9 | 305 | HOWTO (R_XTENSA_SLOT5_ALT, 0, 0, 0, TRUE, 0, complain_overflow_dont, |
e5f131d1 | 306 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT5_ALT", FALSE, 0, 0, TRUE), |
43cd72b9 | 307 | HOWTO (R_XTENSA_SLOT6_ALT, 0, 0, 0, TRUE, 0, complain_overflow_dont, |
e5f131d1 | 308 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT6_ALT", FALSE, 0, 0, TRUE), |
43cd72b9 | 309 | HOWTO (R_XTENSA_SLOT7_ALT, 0, 0, 0, TRUE, 0, complain_overflow_dont, |
e5f131d1 | 310 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT7_ALT", FALSE, 0, 0, TRUE), |
43cd72b9 | 311 | HOWTO (R_XTENSA_SLOT8_ALT, 0, 0, 0, TRUE, 0, complain_overflow_dont, |
e5f131d1 | 312 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT8_ALT", FALSE, 0, 0, TRUE), |
43cd72b9 | 313 | HOWTO (R_XTENSA_SLOT9_ALT, 0, 0, 0, TRUE, 0, complain_overflow_dont, |
e5f131d1 | 314 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT9_ALT", FALSE, 0, 0, TRUE), |
43cd72b9 | 315 | HOWTO (R_XTENSA_SLOT10_ALT, 0, 0, 0, TRUE, 0, complain_overflow_dont, |
e5f131d1 | 316 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT10_ALT", FALSE, 0, 0, TRUE), |
43cd72b9 | 317 | HOWTO (R_XTENSA_SLOT11_ALT, 0, 0, 0, TRUE, 0, complain_overflow_dont, |
e5f131d1 | 318 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT11_ALT", FALSE, 0, 0, TRUE), |
43cd72b9 | 319 | HOWTO (R_XTENSA_SLOT12_ALT, 0, 0, 0, TRUE, 0, complain_overflow_dont, |
e5f131d1 | 320 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT12_ALT", FALSE, 0, 0, TRUE), |
43cd72b9 | 321 | HOWTO (R_XTENSA_SLOT13_ALT, 0, 0, 0, TRUE, 0, complain_overflow_dont, |
e5f131d1 | 322 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT13_ALT", FALSE, 0, 0, TRUE), |
43cd72b9 | 323 | HOWTO (R_XTENSA_SLOT14_ALT, 0, 0, 0, TRUE, 0, complain_overflow_dont, |
e5f131d1 | 324 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT14_ALT", FALSE, 0, 0, TRUE), |
28dbbc02 BW |
325 | |
326 | /* TLS relocations. */ | |
327 | HOWTO (R_XTENSA_TLSDESC_FN, 0, 2, 32, FALSE, 0, complain_overflow_dont, | |
328 | bfd_elf_xtensa_reloc, "R_XTENSA_TLSDESC_FN", | |
329 | FALSE, 0, 0xffffffff, FALSE), | |
330 | HOWTO (R_XTENSA_TLSDESC_ARG, 0, 2, 32, FALSE, 0, complain_overflow_dont, | |
331 | bfd_elf_xtensa_reloc, "R_XTENSA_TLSDESC_ARG", | |
332 | FALSE, 0, 0xffffffff, FALSE), | |
333 | HOWTO (R_XTENSA_TLS_DTPOFF, 0, 2, 32, FALSE, 0, complain_overflow_dont, | |
334 | bfd_elf_xtensa_reloc, "R_XTENSA_TLS_DTPOFF", | |
335 | FALSE, 0, 0xffffffff, FALSE), | |
336 | HOWTO (R_XTENSA_TLS_TPOFF, 0, 2, 32, FALSE, 0, complain_overflow_dont, | |
337 | bfd_elf_xtensa_reloc, "R_XTENSA_TLS_TPOFF", | |
338 | FALSE, 0, 0xffffffff, FALSE), | |
339 | HOWTO (R_XTENSA_TLS_FUNC, 0, 0, 0, FALSE, 0, complain_overflow_dont, | |
340 | bfd_elf_xtensa_reloc, "R_XTENSA_TLS_FUNC", | |
341 | FALSE, 0, 0, FALSE), | |
342 | HOWTO (R_XTENSA_TLS_ARG, 0, 0, 0, FALSE, 0, complain_overflow_dont, | |
343 | bfd_elf_xtensa_reloc, "R_XTENSA_TLS_ARG", | |
344 | FALSE, 0, 0, FALSE), | |
345 | HOWTO (R_XTENSA_TLS_CALL, 0, 0, 0, FALSE, 0, complain_overflow_dont, | |
346 | bfd_elf_xtensa_reloc, "R_XTENSA_TLS_CALL", | |
347 | FALSE, 0, 0, FALSE), | |
30ce8e47 MF |
348 | |
349 | HOWTO (R_XTENSA_PDIFF8, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, | |
350 | bfd_elf_xtensa_reloc, "R_XTENSA_PDIFF8", FALSE, 0, 0xff, FALSE), | |
351 | HOWTO (R_XTENSA_PDIFF16, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, | |
352 | bfd_elf_xtensa_reloc, "R_XTENSA_PDIFF16", FALSE, 0, 0xffff, FALSE), | |
353 | HOWTO (R_XTENSA_PDIFF32, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, | |
354 | bfd_elf_xtensa_reloc, "R_XTENSA_PDIFF32", FALSE, 0, 0xffffffff, FALSE), | |
355 | ||
356 | HOWTO (R_XTENSA_NDIFF8, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, | |
357 | bfd_elf_xtensa_reloc, "R_XTENSA_NDIFF8", FALSE, 0, 0xff, FALSE), | |
358 | HOWTO (R_XTENSA_NDIFF16, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, | |
359 | bfd_elf_xtensa_reloc, "R_XTENSA_NDIFF16", FALSE, 0, 0xffff, FALSE), | |
360 | HOWTO (R_XTENSA_NDIFF32, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, | |
361 | bfd_elf_xtensa_reloc, "R_XTENSA_NDIFF32", FALSE, 0, 0xffffffff, FALSE), | |
e0001a05 NC |
362 | }; |
363 | ||
43cd72b9 | 364 | #if DEBUG_GEN_RELOC |
e0001a05 NC |
365 | #define TRACE(str) \ |
366 | fprintf (stderr, "Xtensa bfd reloc lookup %d (%s)\n", code, str) | |
367 | #else | |
368 | #define TRACE(str) | |
369 | #endif | |
370 | ||
371 | static reloc_howto_type * | |
7fa3d080 BW |
372 | elf_xtensa_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, |
373 | bfd_reloc_code_real_type code) | |
e0001a05 NC |
374 | { |
375 | switch (code) | |
376 | { | |
377 | case BFD_RELOC_NONE: | |
378 | TRACE ("BFD_RELOC_NONE"); | |
379 | return &elf_howto_table[(unsigned) R_XTENSA_NONE ]; | |
380 | ||
381 | case BFD_RELOC_32: | |
382 | TRACE ("BFD_RELOC_32"); | |
383 | return &elf_howto_table[(unsigned) R_XTENSA_32 ]; | |
384 | ||
1bbb5f21 BW |
385 | case BFD_RELOC_32_PCREL: |
386 | TRACE ("BFD_RELOC_32_PCREL"); | |
387 | return &elf_howto_table[(unsigned) R_XTENSA_32_PCREL ]; | |
388 | ||
43cd72b9 BW |
389 | case BFD_RELOC_XTENSA_DIFF8: |
390 | TRACE ("BFD_RELOC_XTENSA_DIFF8"); | |
391 | return &elf_howto_table[(unsigned) R_XTENSA_DIFF8 ]; | |
392 | ||
393 | case BFD_RELOC_XTENSA_DIFF16: | |
394 | TRACE ("BFD_RELOC_XTENSA_DIFF16"); | |
395 | return &elf_howto_table[(unsigned) R_XTENSA_DIFF16 ]; | |
396 | ||
397 | case BFD_RELOC_XTENSA_DIFF32: | |
398 | TRACE ("BFD_RELOC_XTENSA_DIFF32"); | |
399 | return &elf_howto_table[(unsigned) R_XTENSA_DIFF32 ]; | |
400 | ||
30ce8e47 MF |
401 | case BFD_RELOC_XTENSA_PDIFF8: |
402 | TRACE ("BFD_RELOC_XTENSA_PDIFF8"); | |
403 | return &elf_howto_table[(unsigned) R_XTENSA_PDIFF8 ]; | |
404 | ||
405 | case BFD_RELOC_XTENSA_PDIFF16: | |
406 | TRACE ("BFD_RELOC_XTENSA_PDIFF16"); | |
407 | return &elf_howto_table[(unsigned) R_XTENSA_PDIFF16 ]; | |
408 | ||
409 | case BFD_RELOC_XTENSA_PDIFF32: | |
410 | TRACE ("BFD_RELOC_XTENSA_PDIFF32"); | |
411 | return &elf_howto_table[(unsigned) R_XTENSA_PDIFF32 ]; | |
412 | ||
413 | case BFD_RELOC_XTENSA_NDIFF8: | |
414 | TRACE ("BFD_RELOC_XTENSA_NDIFF8"); | |
415 | return &elf_howto_table[(unsigned) R_XTENSA_NDIFF8 ]; | |
416 | ||
417 | case BFD_RELOC_XTENSA_NDIFF16: | |
418 | TRACE ("BFD_RELOC_XTENSA_NDIFF16"); | |
419 | return &elf_howto_table[(unsigned) R_XTENSA_NDIFF16 ]; | |
420 | ||
421 | case BFD_RELOC_XTENSA_NDIFF32: | |
422 | TRACE ("BFD_RELOC_XTENSA_NDIFF32"); | |
423 | return &elf_howto_table[(unsigned) R_XTENSA_NDIFF32 ]; | |
424 | ||
e0001a05 NC |
425 | case BFD_RELOC_XTENSA_RTLD: |
426 | TRACE ("BFD_RELOC_XTENSA_RTLD"); | |
427 | return &elf_howto_table[(unsigned) R_XTENSA_RTLD ]; | |
428 | ||
429 | case BFD_RELOC_XTENSA_GLOB_DAT: | |
430 | TRACE ("BFD_RELOC_XTENSA_GLOB_DAT"); | |
431 | return &elf_howto_table[(unsigned) R_XTENSA_GLOB_DAT ]; | |
432 | ||
433 | case BFD_RELOC_XTENSA_JMP_SLOT: | |
434 | TRACE ("BFD_RELOC_XTENSA_JMP_SLOT"); | |
435 | return &elf_howto_table[(unsigned) R_XTENSA_JMP_SLOT ]; | |
436 | ||
437 | case BFD_RELOC_XTENSA_RELATIVE: | |
438 | TRACE ("BFD_RELOC_XTENSA_RELATIVE"); | |
439 | return &elf_howto_table[(unsigned) R_XTENSA_RELATIVE ]; | |
440 | ||
441 | case BFD_RELOC_XTENSA_PLT: | |
442 | TRACE ("BFD_RELOC_XTENSA_PLT"); | |
443 | return &elf_howto_table[(unsigned) R_XTENSA_PLT ]; | |
444 | ||
445 | case BFD_RELOC_XTENSA_OP0: | |
446 | TRACE ("BFD_RELOC_XTENSA_OP0"); | |
447 | return &elf_howto_table[(unsigned) R_XTENSA_OP0 ]; | |
448 | ||
449 | case BFD_RELOC_XTENSA_OP1: | |
450 | TRACE ("BFD_RELOC_XTENSA_OP1"); | |
451 | return &elf_howto_table[(unsigned) R_XTENSA_OP1 ]; | |
452 | ||
453 | case BFD_RELOC_XTENSA_OP2: | |
454 | TRACE ("BFD_RELOC_XTENSA_OP2"); | |
455 | return &elf_howto_table[(unsigned) R_XTENSA_OP2 ]; | |
456 | ||
457 | case BFD_RELOC_XTENSA_ASM_EXPAND: | |
458 | TRACE ("BFD_RELOC_XTENSA_ASM_EXPAND"); | |
459 | return &elf_howto_table[(unsigned) R_XTENSA_ASM_EXPAND ]; | |
460 | ||
461 | case BFD_RELOC_XTENSA_ASM_SIMPLIFY: | |
462 | TRACE ("BFD_RELOC_XTENSA_ASM_SIMPLIFY"); | |
463 | return &elf_howto_table[(unsigned) R_XTENSA_ASM_SIMPLIFY ]; | |
464 | ||
465 | case BFD_RELOC_VTABLE_INHERIT: | |
466 | TRACE ("BFD_RELOC_VTABLE_INHERIT"); | |
467 | return &elf_howto_table[(unsigned) R_XTENSA_GNU_VTINHERIT ]; | |
468 | ||
469 | case BFD_RELOC_VTABLE_ENTRY: | |
470 | TRACE ("BFD_RELOC_VTABLE_ENTRY"); | |
471 | return &elf_howto_table[(unsigned) R_XTENSA_GNU_VTENTRY ]; | |
472 | ||
28dbbc02 BW |
473 | case BFD_RELOC_XTENSA_TLSDESC_FN: |
474 | TRACE ("BFD_RELOC_XTENSA_TLSDESC_FN"); | |
475 | return &elf_howto_table[(unsigned) R_XTENSA_TLSDESC_FN ]; | |
476 | ||
477 | case BFD_RELOC_XTENSA_TLSDESC_ARG: | |
478 | TRACE ("BFD_RELOC_XTENSA_TLSDESC_ARG"); | |
479 | return &elf_howto_table[(unsigned) R_XTENSA_TLSDESC_ARG ]; | |
480 | ||
481 | case BFD_RELOC_XTENSA_TLS_DTPOFF: | |
482 | TRACE ("BFD_RELOC_XTENSA_TLS_DTPOFF"); | |
483 | return &elf_howto_table[(unsigned) R_XTENSA_TLS_DTPOFF ]; | |
484 | ||
485 | case BFD_RELOC_XTENSA_TLS_TPOFF: | |
486 | TRACE ("BFD_RELOC_XTENSA_TLS_TPOFF"); | |
487 | return &elf_howto_table[(unsigned) R_XTENSA_TLS_TPOFF ]; | |
488 | ||
489 | case BFD_RELOC_XTENSA_TLS_FUNC: | |
490 | TRACE ("BFD_RELOC_XTENSA_TLS_FUNC"); | |
491 | return &elf_howto_table[(unsigned) R_XTENSA_TLS_FUNC ]; | |
492 | ||
493 | case BFD_RELOC_XTENSA_TLS_ARG: | |
494 | TRACE ("BFD_RELOC_XTENSA_TLS_ARG"); | |
495 | return &elf_howto_table[(unsigned) R_XTENSA_TLS_ARG ]; | |
496 | ||
497 | case BFD_RELOC_XTENSA_TLS_CALL: | |
498 | TRACE ("BFD_RELOC_XTENSA_TLS_CALL"); | |
499 | return &elf_howto_table[(unsigned) R_XTENSA_TLS_CALL ]; | |
500 | ||
e0001a05 | 501 | default: |
43cd72b9 BW |
502 | if (code >= BFD_RELOC_XTENSA_SLOT0_OP |
503 | && code <= BFD_RELOC_XTENSA_SLOT14_OP) | |
504 | { | |
505 | unsigned n = (R_XTENSA_SLOT0_OP + | |
506 | (code - BFD_RELOC_XTENSA_SLOT0_OP)); | |
507 | return &elf_howto_table[n]; | |
508 | } | |
509 | ||
510 | if (code >= BFD_RELOC_XTENSA_SLOT0_ALT | |
511 | && code <= BFD_RELOC_XTENSA_SLOT14_ALT) | |
512 | { | |
513 | unsigned n = (R_XTENSA_SLOT0_ALT + | |
514 | (code - BFD_RELOC_XTENSA_SLOT0_ALT)); | |
515 | return &elf_howto_table[n]; | |
516 | } | |
517 | ||
e0001a05 NC |
518 | break; |
519 | } | |
520 | ||
f3185997 | 521 | /* xgettext:c-format */ |
e8f5af78 | 522 | _bfd_error_handler (_("%pB: unsupported relocation type %#x"), abfd, (int) code); |
f3185997 | 523 | bfd_set_error (bfd_error_bad_value); |
e0001a05 NC |
524 | TRACE ("Unknown"); |
525 | return NULL; | |
526 | } | |
527 | ||
157090f7 AM |
528 | static reloc_howto_type * |
529 | elf_xtensa_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, | |
530 | const char *r_name) | |
531 | { | |
532 | unsigned int i; | |
533 | ||
534 | for (i = 0; i < sizeof (elf_howto_table) / sizeof (elf_howto_table[0]); i++) | |
535 | if (elf_howto_table[i].name != NULL | |
536 | && strcasecmp (elf_howto_table[i].name, r_name) == 0) | |
537 | return &elf_howto_table[i]; | |
538 | ||
539 | return NULL; | |
540 | } | |
541 | ||
e0001a05 NC |
542 | |
543 | /* Given an ELF "rela" relocation, find the corresponding howto and record | |
544 | it in the BFD internal arelent representation of the relocation. */ | |
545 | ||
f3185997 | 546 | static bfd_boolean |
0aa13fee | 547 | elf_xtensa_info_to_howto_rela (bfd *abfd, |
7fa3d080 BW |
548 | arelent *cache_ptr, |
549 | Elf_Internal_Rela *dst) | |
e0001a05 NC |
550 | { |
551 | unsigned int r_type = ELF32_R_TYPE (dst->r_info); | |
552 | ||
5860e3f8 NC |
553 | if (r_type >= (unsigned int) R_XTENSA_max) |
554 | { | |
695344c0 | 555 | /* xgettext:c-format */ |
0aa13fee AM |
556 | _bfd_error_handler (_("%pB: unsupported relocation type %#x"), |
557 | abfd, r_type); | |
f3185997 NC |
558 | bfd_set_error (bfd_error_bad_value); |
559 | return FALSE; | |
5860e3f8 | 560 | } |
e0001a05 | 561 | cache_ptr->howto = &elf_howto_table[r_type]; |
f3185997 | 562 | return TRUE; |
e0001a05 NC |
563 | } |
564 | ||
565 | \f | |
566 | /* Functions for the Xtensa ELF linker. */ | |
567 | ||
568 | /* The name of the dynamic interpreter. This is put in the .interp | |
569 | section. */ | |
570 | ||
571 | #define ELF_DYNAMIC_INTERPRETER "/lib/ld.so" | |
572 | ||
573 | /* The size in bytes of an entry in the procedure linkage table. | |
574 | (This does _not_ include the space for the literals associated with | |
575 | the PLT entry.) */ | |
576 | ||
577 | #define PLT_ENTRY_SIZE 16 | |
578 | ||
579 | /* For _really_ large PLTs, we may need to alternate between literals | |
580 | and code to keep the literals within the 256K range of the L32R | |
581 | instructions in the code. It's unlikely that anyone would ever need | |
582 | such a big PLT, but an arbitrary limit on the PLT size would be bad. | |
583 | Thus, we split the PLT into chunks. Since there's very little | |
584 | overhead (2 extra literals) for each chunk, the chunk size is kept | |
585 | small so that the code for handling multiple chunks get used and | |
586 | tested regularly. With 254 entries, there are 1K of literals for | |
587 | each chunk, and that seems like a nice round number. */ | |
588 | ||
589 | #define PLT_ENTRIES_PER_CHUNK 254 | |
590 | ||
591 | /* PLT entries are actually used as stub functions for lazy symbol | |
592 | resolution. Once the symbol is resolved, the stub function is never | |
593 | invoked. Note: the 32-byte frame size used here cannot be changed | |
594 | without a corresponding change in the runtime linker. */ | |
595 | ||
f7e16c2a | 596 | static const bfd_byte elf_xtensa_be_plt_entry[][PLT_ENTRY_SIZE] = |
e0001a05 | 597 | { |
f7e16c2a MF |
598 | { |
599 | 0x6c, 0x10, 0x04, /* entry sp, 32 */ | |
600 | 0x18, 0x00, 0x00, /* l32r a8, [got entry for rtld's resolver] */ | |
601 | 0x1a, 0x00, 0x00, /* l32r a10, [got entry for rtld's link map] */ | |
602 | 0x1b, 0x00, 0x00, /* l32r a11, [literal for reloc index] */ | |
603 | 0x0a, 0x80, 0x00, /* jx a8 */ | |
604 | 0 /* unused */ | |
605 | }, | |
606 | { | |
607 | 0x18, 0x00, 0x00, /* l32r a8, [got entry for rtld's resolver] */ | |
608 | 0x1a, 0x00, 0x00, /* l32r a10, [got entry for rtld's link map] */ | |
609 | 0x1b, 0x00, 0x00, /* l32r a11, [literal for reloc index] */ | |
610 | 0x0a, 0x80, 0x00, /* jx a8 */ | |
611 | 0 /* unused */ | |
612 | } | |
e0001a05 NC |
613 | }; |
614 | ||
f7e16c2a | 615 | static const bfd_byte elf_xtensa_le_plt_entry[][PLT_ENTRY_SIZE] = |
e0001a05 | 616 | { |
f7e16c2a MF |
617 | { |
618 | 0x36, 0x41, 0x00, /* entry sp, 32 */ | |
619 | 0x81, 0x00, 0x00, /* l32r a8, [got entry for rtld's resolver] */ | |
620 | 0xa1, 0x00, 0x00, /* l32r a10, [got entry for rtld's link map] */ | |
621 | 0xb1, 0x00, 0x00, /* l32r a11, [literal for reloc index] */ | |
622 | 0xa0, 0x08, 0x00, /* jx a8 */ | |
623 | 0 /* unused */ | |
624 | }, | |
625 | { | |
626 | 0x81, 0x00, 0x00, /* l32r a8, [got entry for rtld's resolver] */ | |
627 | 0xa1, 0x00, 0x00, /* l32r a10, [got entry for rtld's link map] */ | |
628 | 0xb1, 0x00, 0x00, /* l32r a11, [literal for reloc index] */ | |
629 | 0xa0, 0x08, 0x00, /* jx a8 */ | |
630 | 0 /* unused */ | |
631 | } | |
e0001a05 NC |
632 | }; |
633 | ||
28dbbc02 BW |
634 | /* The size of the thread control block. */ |
635 | #define TCB_SIZE 8 | |
636 | ||
637 | struct elf_xtensa_link_hash_entry | |
638 | { | |
639 | struct elf_link_hash_entry elf; | |
640 | ||
641 | bfd_signed_vma tlsfunc_refcount; | |
642 | ||
643 | #define GOT_UNKNOWN 0 | |
644 | #define GOT_NORMAL 1 | |
645 | #define GOT_TLS_GD 2 /* global or local dynamic */ | |
646 | #define GOT_TLS_IE 4 /* initial or local exec */ | |
647 | #define GOT_TLS_ANY (GOT_TLS_GD | GOT_TLS_IE) | |
648 | unsigned char tls_type; | |
649 | }; | |
650 | ||
651 | #define elf_xtensa_hash_entry(ent) ((struct elf_xtensa_link_hash_entry *)(ent)) | |
652 | ||
653 | struct elf_xtensa_obj_tdata | |
654 | { | |
655 | struct elf_obj_tdata root; | |
656 | ||
657 | /* tls_type for each local got entry. */ | |
658 | char *local_got_tls_type; | |
659 | ||
660 | bfd_signed_vma *local_tlsfunc_refcounts; | |
661 | }; | |
662 | ||
663 | #define elf_xtensa_tdata(abfd) \ | |
664 | ((struct elf_xtensa_obj_tdata *) (abfd)->tdata.any) | |
665 | ||
666 | #define elf_xtensa_local_got_tls_type(abfd) \ | |
667 | (elf_xtensa_tdata (abfd)->local_got_tls_type) | |
668 | ||
669 | #define elf_xtensa_local_tlsfunc_refcounts(abfd) \ | |
670 | (elf_xtensa_tdata (abfd)->local_tlsfunc_refcounts) | |
671 | ||
672 | #define is_xtensa_elf(bfd) \ | |
673 | (bfd_get_flavour (bfd) == bfd_target_elf_flavour \ | |
674 | && elf_tdata (bfd) != NULL \ | |
4dfe6ac6 | 675 | && elf_object_id (bfd) == XTENSA_ELF_DATA) |
28dbbc02 BW |
676 | |
677 | static bfd_boolean | |
678 | elf_xtensa_mkobject (bfd *abfd) | |
679 | { | |
680 | return bfd_elf_allocate_object (abfd, sizeof (struct elf_xtensa_obj_tdata), | |
4dfe6ac6 | 681 | XTENSA_ELF_DATA); |
28dbbc02 BW |
682 | } |
683 | ||
f0e6fdb2 BW |
684 | /* Xtensa ELF linker hash table. */ |
685 | ||
686 | struct elf_xtensa_link_hash_table | |
687 | { | |
688 | struct elf_link_hash_table elf; | |
689 | ||
690 | /* Short-cuts to get to dynamic linker sections. */ | |
f0e6fdb2 BW |
691 | asection *sgotloc; |
692 | asection *spltlittbl; | |
693 | ||
694 | /* Total count of PLT relocations seen during check_relocs. | |
695 | The actual PLT code must be split into multiple sections and all | |
696 | the sections have to be created before size_dynamic_sections, | |
697 | where we figure out the exact number of PLT entries that will be | |
698 | needed. It is OK if this count is an overestimate, e.g., some | |
699 | relocations may be removed by GC. */ | |
700 | int plt_reloc_count; | |
28dbbc02 BW |
701 | |
702 | struct elf_xtensa_link_hash_entry *tlsbase; | |
f0e6fdb2 BW |
703 | }; |
704 | ||
705 | /* Get the Xtensa ELF linker hash table from a link_info structure. */ | |
706 | ||
707 | #define elf_xtensa_hash_table(p) \ | |
4dfe6ac6 NC |
708 | (elf_hash_table_id ((struct elf_link_hash_table *) ((p)->hash)) \ |
709 | == XTENSA_ELF_DATA ? ((struct elf_xtensa_link_hash_table *) ((p)->hash)) : NULL) | |
f0e6fdb2 | 710 | |
28dbbc02 BW |
711 | /* Create an entry in an Xtensa ELF linker hash table. */ |
712 | ||
713 | static struct bfd_hash_entry * | |
714 | elf_xtensa_link_hash_newfunc (struct bfd_hash_entry *entry, | |
715 | struct bfd_hash_table *table, | |
716 | const char *string) | |
717 | { | |
718 | /* Allocate the structure if it has not already been allocated by a | |
719 | subclass. */ | |
720 | if (entry == NULL) | |
721 | { | |
722 | entry = bfd_hash_allocate (table, | |
723 | sizeof (struct elf_xtensa_link_hash_entry)); | |
724 | if (entry == NULL) | |
725 | return entry; | |
726 | } | |
727 | ||
728 | /* Call the allocation method of the superclass. */ | |
729 | entry = _bfd_elf_link_hash_newfunc (entry, table, string); | |
730 | if (entry != NULL) | |
731 | { | |
732 | struct elf_xtensa_link_hash_entry *eh = elf_xtensa_hash_entry (entry); | |
733 | eh->tlsfunc_refcount = 0; | |
734 | eh->tls_type = GOT_UNKNOWN; | |
735 | } | |
736 | ||
737 | return entry; | |
738 | } | |
739 | ||
f0e6fdb2 BW |
740 | /* Create an Xtensa ELF linker hash table. */ |
741 | ||
742 | static struct bfd_link_hash_table * | |
743 | elf_xtensa_link_hash_table_create (bfd *abfd) | |
744 | { | |
28dbbc02 | 745 | struct elf_link_hash_entry *tlsbase; |
f0e6fdb2 | 746 | struct elf_xtensa_link_hash_table *ret; |
986f0783 | 747 | size_t amt = sizeof (struct elf_xtensa_link_hash_table); |
f0e6fdb2 | 748 | |
7bf52ea2 | 749 | ret = bfd_zmalloc (amt); |
f0e6fdb2 BW |
750 | if (ret == NULL) |
751 | return NULL; | |
752 | ||
753 | if (!_bfd_elf_link_hash_table_init (&ret->elf, abfd, | |
28dbbc02 | 754 | elf_xtensa_link_hash_newfunc, |
4dfe6ac6 NC |
755 | sizeof (struct elf_xtensa_link_hash_entry), |
756 | XTENSA_ELF_DATA)) | |
f0e6fdb2 BW |
757 | { |
758 | free (ret); | |
759 | return NULL; | |
760 | } | |
761 | ||
28dbbc02 BW |
762 | /* Create a hash entry for "_TLS_MODULE_BASE_" to speed up checking |
763 | for it later. */ | |
764 | tlsbase = elf_link_hash_lookup (&ret->elf, "_TLS_MODULE_BASE_", | |
765 | TRUE, FALSE, FALSE); | |
766 | tlsbase->root.type = bfd_link_hash_new; | |
767 | tlsbase->root.u.undef.abfd = NULL; | |
768 | tlsbase->non_elf = 0; | |
769 | ret->tlsbase = elf_xtensa_hash_entry (tlsbase); | |
770 | ret->tlsbase->tls_type = GOT_UNKNOWN; | |
771 | ||
f0e6fdb2 BW |
772 | return &ret->elf.root; |
773 | } | |
571b5725 | 774 | |
28dbbc02 BW |
775 | /* Copy the extra info we tack onto an elf_link_hash_entry. */ |
776 | ||
777 | static void | |
778 | elf_xtensa_copy_indirect_symbol (struct bfd_link_info *info, | |
779 | struct elf_link_hash_entry *dir, | |
780 | struct elf_link_hash_entry *ind) | |
781 | { | |
782 | struct elf_xtensa_link_hash_entry *edir, *eind; | |
783 | ||
784 | edir = elf_xtensa_hash_entry (dir); | |
785 | eind = elf_xtensa_hash_entry (ind); | |
786 | ||
787 | if (ind->root.type == bfd_link_hash_indirect) | |
788 | { | |
789 | edir->tlsfunc_refcount += eind->tlsfunc_refcount; | |
790 | eind->tlsfunc_refcount = 0; | |
791 | ||
792 | if (dir->got.refcount <= 0) | |
793 | { | |
794 | edir->tls_type = eind->tls_type; | |
795 | eind->tls_type = GOT_UNKNOWN; | |
796 | } | |
797 | } | |
798 | ||
799 | _bfd_elf_link_hash_copy_indirect (info, dir, ind); | |
800 | } | |
801 | ||
571b5725 | 802 | static inline bfd_boolean |
4608f3d9 | 803 | elf_xtensa_dynamic_symbol_p (struct elf_link_hash_entry *h, |
7fa3d080 | 804 | struct bfd_link_info *info) |
571b5725 BW |
805 | { |
806 | /* Check if we should do dynamic things to this symbol. The | |
807 | "ignore_protected" argument need not be set, because Xtensa code | |
808 | does not require special handling of STV_PROTECTED to make function | |
809 | pointer comparisons work properly. The PLT addresses are never | |
810 | used for function pointers. */ | |
811 | ||
812 | return _bfd_elf_dynamic_symbol_p (h, info, 0); | |
813 | } | |
814 | ||
e0001a05 NC |
815 | \f |
816 | static int | |
7fa3d080 | 817 | property_table_compare (const void *ap, const void *bp) |
e0001a05 NC |
818 | { |
819 | const property_table_entry *a = (const property_table_entry *) ap; | |
820 | const property_table_entry *b = (const property_table_entry *) bp; | |
821 | ||
43cd72b9 BW |
822 | if (a->address == b->address) |
823 | { | |
43cd72b9 BW |
824 | if (a->size != b->size) |
825 | return (a->size - b->size); | |
826 | ||
827 | if ((a->flags & XTENSA_PROP_ALIGN) != (b->flags & XTENSA_PROP_ALIGN)) | |
828 | return ((b->flags & XTENSA_PROP_ALIGN) | |
829 | - (a->flags & XTENSA_PROP_ALIGN)); | |
830 | ||
831 | if ((a->flags & XTENSA_PROP_ALIGN) | |
832 | && (GET_XTENSA_PROP_ALIGNMENT (a->flags) | |
833 | != GET_XTENSA_PROP_ALIGNMENT (b->flags))) | |
834 | return (GET_XTENSA_PROP_ALIGNMENT (a->flags) | |
835 | - GET_XTENSA_PROP_ALIGNMENT (b->flags)); | |
68ffbac6 | 836 | |
43cd72b9 BW |
837 | if ((a->flags & XTENSA_PROP_UNREACHABLE) |
838 | != (b->flags & XTENSA_PROP_UNREACHABLE)) | |
839 | return ((b->flags & XTENSA_PROP_UNREACHABLE) | |
840 | - (a->flags & XTENSA_PROP_UNREACHABLE)); | |
841 | ||
842 | return (a->flags - b->flags); | |
843 | } | |
844 | ||
845 | return (a->address - b->address); | |
846 | } | |
847 | ||
848 | ||
849 | static int | |
7fa3d080 | 850 | property_table_matches (const void *ap, const void *bp) |
43cd72b9 BW |
851 | { |
852 | const property_table_entry *a = (const property_table_entry *) ap; | |
853 | const property_table_entry *b = (const property_table_entry *) bp; | |
854 | ||
855 | /* Check if one entry overlaps with the other. */ | |
e0001a05 NC |
856 | if ((b->address >= a->address && b->address < (a->address + a->size)) |
857 | || (a->address >= b->address && a->address < (b->address + b->size))) | |
858 | return 0; | |
859 | ||
860 | return (a->address - b->address); | |
861 | } | |
862 | ||
863 | ||
43cd72b9 BW |
864 | /* Get the literal table or property table entries for the given |
865 | section. Sets TABLE_P and returns the number of entries. On | |
866 | error, returns a negative value. */ | |
e0001a05 | 867 | |
4b8e28c7 | 868 | int |
7fa3d080 BW |
869 | xtensa_read_table_entries (bfd *abfd, |
870 | asection *section, | |
871 | property_table_entry **table_p, | |
872 | const char *sec_name, | |
873 | bfd_boolean output_addr) | |
e0001a05 NC |
874 | { |
875 | asection *table_section; | |
e0001a05 NC |
876 | bfd_size_type table_size = 0; |
877 | bfd_byte *table_data; | |
878 | property_table_entry *blocks; | |
e4115460 | 879 | int blk, block_count; |
e0001a05 | 880 | bfd_size_type num_records; |
bcc2cc8e BW |
881 | Elf_Internal_Rela *internal_relocs, *irel, *rel_end; |
882 | bfd_vma section_addr, off; | |
43cd72b9 | 883 | flagword predef_flags; |
bcc2cc8e | 884 | bfd_size_type table_entry_size, section_limit; |
43cd72b9 BW |
885 | |
886 | if (!section | |
887 | || !(section->flags & SEC_ALLOC) | |
888 | || (section->flags & SEC_DEBUGGING)) | |
889 | { | |
890 | *table_p = NULL; | |
891 | return 0; | |
892 | } | |
e0001a05 | 893 | |
74869ac7 | 894 | table_section = xtensa_get_property_section (section, sec_name); |
43cd72b9 | 895 | if (table_section) |
eea6121a | 896 | table_size = table_section->size; |
43cd72b9 | 897 | |
68ffbac6 | 898 | if (table_size == 0) |
e0001a05 NC |
899 | { |
900 | *table_p = NULL; | |
901 | return 0; | |
902 | } | |
903 | ||
43cd72b9 BW |
904 | predef_flags = xtensa_get_property_predef_flags (table_section); |
905 | table_entry_size = 12; | |
906 | if (predef_flags) | |
907 | table_entry_size -= 4; | |
908 | ||
909 | num_records = table_size / table_entry_size; | |
e0001a05 NC |
910 | table_data = retrieve_contents (abfd, table_section, TRUE); |
911 | blocks = (property_table_entry *) | |
912 | bfd_malloc (num_records * sizeof (property_table_entry)); | |
913 | block_count = 0; | |
43cd72b9 BW |
914 | |
915 | if (output_addr) | |
916 | section_addr = section->output_section->vma + section->output_offset; | |
917 | else | |
918 | section_addr = section->vma; | |
3ba3bc8c | 919 | |
e0001a05 | 920 | internal_relocs = retrieve_internal_relocs (abfd, table_section, TRUE); |
3ba3bc8c | 921 | if (internal_relocs && !table_section->reloc_done) |
e0001a05 | 922 | { |
bcc2cc8e BW |
923 | qsort (internal_relocs, table_section->reloc_count, |
924 | sizeof (Elf_Internal_Rela), internal_reloc_compare); | |
925 | irel = internal_relocs; | |
926 | } | |
927 | else | |
928 | irel = NULL; | |
929 | ||
930 | section_limit = bfd_get_section_limit (abfd, section); | |
931 | rel_end = internal_relocs + table_section->reloc_count; | |
932 | ||
68ffbac6 | 933 | for (off = 0; off < table_size; off += table_entry_size) |
bcc2cc8e BW |
934 | { |
935 | bfd_vma address = bfd_get_32 (abfd, table_data + off); | |
936 | ||
937 | /* Skip any relocations before the current offset. This should help | |
938 | avoid confusion caused by unexpected relocations for the preceding | |
939 | table entry. */ | |
940 | while (irel && | |
941 | (irel->r_offset < off | |
942 | || (irel->r_offset == off | |
943 | && ELF32_R_TYPE (irel->r_info) == R_XTENSA_NONE))) | |
944 | { | |
945 | irel += 1; | |
946 | if (irel >= rel_end) | |
947 | irel = 0; | |
948 | } | |
e0001a05 | 949 | |
bcc2cc8e | 950 | if (irel && irel->r_offset == off) |
e0001a05 | 951 | { |
bcc2cc8e BW |
952 | bfd_vma sym_off; |
953 | unsigned long r_symndx = ELF32_R_SYM (irel->r_info); | |
954 | BFD_ASSERT (ELF32_R_TYPE (irel->r_info) == R_XTENSA_32); | |
e0001a05 | 955 | |
bcc2cc8e | 956 | if (get_elf_r_symndx_section (abfd, r_symndx) != section) |
e0001a05 NC |
957 | continue; |
958 | ||
bcc2cc8e BW |
959 | sym_off = get_elf_r_symndx_offset (abfd, r_symndx); |
960 | BFD_ASSERT (sym_off == 0); | |
961 | address += (section_addr + sym_off + irel->r_addend); | |
e0001a05 | 962 | } |
bcc2cc8e | 963 | else |
e0001a05 | 964 | { |
bcc2cc8e BW |
965 | if (address < section_addr |
966 | || address >= section_addr + section_limit) | |
967 | continue; | |
e0001a05 | 968 | } |
bcc2cc8e BW |
969 | |
970 | blocks[block_count].address = address; | |
971 | blocks[block_count].size = bfd_get_32 (abfd, table_data + off + 4); | |
972 | if (predef_flags) | |
973 | blocks[block_count].flags = predef_flags; | |
974 | else | |
975 | blocks[block_count].flags = bfd_get_32 (abfd, table_data + off + 8); | |
976 | block_count++; | |
e0001a05 NC |
977 | } |
978 | ||
979 | release_contents (table_section, table_data); | |
980 | release_internal_relocs (table_section, internal_relocs); | |
981 | ||
43cd72b9 | 982 | if (block_count > 0) |
e0001a05 NC |
983 | { |
984 | /* Now sort them into address order for easy reference. */ | |
985 | qsort (blocks, block_count, sizeof (property_table_entry), | |
986 | property_table_compare); | |
e4115460 BW |
987 | |
988 | /* Check that the table contents are valid. Problems may occur, | |
07d6d2b8 | 989 | for example, if an unrelocated object file is stripped. */ |
e4115460 BW |
990 | for (blk = 1; blk < block_count; blk++) |
991 | { | |
992 | /* The only circumstance where two entries may legitimately | |
993 | have the same address is when one of them is a zero-size | |
994 | placeholder to mark a place where fill can be inserted. | |
995 | The zero-size entry should come first. */ | |
996 | if (blocks[blk - 1].address == blocks[blk].address && | |
997 | blocks[blk - 1].size != 0) | |
998 | { | |
695344c0 | 999 | /* xgettext:c-format */ |
871b3ab2 | 1000 | _bfd_error_handler (_("%pB(%pA): invalid property table"), |
4eca0228 | 1001 | abfd, section); |
e4115460 BW |
1002 | bfd_set_error (bfd_error_bad_value); |
1003 | free (blocks); | |
1004 | return -1; | |
1005 | } | |
1006 | } | |
e0001a05 | 1007 | } |
43cd72b9 | 1008 | |
e0001a05 NC |
1009 | *table_p = blocks; |
1010 | return block_count; | |
1011 | } | |
1012 | ||
1013 | ||
7fa3d080 BW |
1014 | static property_table_entry * |
1015 | elf_xtensa_find_property_entry (property_table_entry *property_table, | |
1016 | int property_table_size, | |
1017 | bfd_vma addr) | |
e0001a05 NC |
1018 | { |
1019 | property_table_entry entry; | |
43cd72b9 | 1020 | property_table_entry *rv; |
e0001a05 | 1021 | |
43cd72b9 BW |
1022 | if (property_table_size == 0) |
1023 | return NULL; | |
e0001a05 NC |
1024 | |
1025 | entry.address = addr; | |
1026 | entry.size = 1; | |
43cd72b9 | 1027 | entry.flags = 0; |
e0001a05 | 1028 | |
43cd72b9 BW |
1029 | rv = bsearch (&entry, property_table, property_table_size, |
1030 | sizeof (property_table_entry), property_table_matches); | |
1031 | return rv; | |
1032 | } | |
1033 | ||
1034 | ||
1035 | static bfd_boolean | |
7fa3d080 BW |
1036 | elf_xtensa_in_literal_pool (property_table_entry *lit_table, |
1037 | int lit_table_size, | |
1038 | bfd_vma addr) | |
43cd72b9 BW |
1039 | { |
1040 | if (elf_xtensa_find_property_entry (lit_table, lit_table_size, addr)) | |
e0001a05 NC |
1041 | return TRUE; |
1042 | ||
1043 | return FALSE; | |
1044 | } | |
1045 | ||
1046 | \f | |
1047 | /* Look through the relocs for a section during the first phase, and | |
1048 | calculate needed space in the dynamic reloc sections. */ | |
1049 | ||
1050 | static bfd_boolean | |
7fa3d080 BW |
1051 | elf_xtensa_check_relocs (bfd *abfd, |
1052 | struct bfd_link_info *info, | |
1053 | asection *sec, | |
1054 | const Elf_Internal_Rela *relocs) | |
e0001a05 | 1055 | { |
f0e6fdb2 | 1056 | struct elf_xtensa_link_hash_table *htab; |
e0001a05 NC |
1057 | Elf_Internal_Shdr *symtab_hdr; |
1058 | struct elf_link_hash_entry **sym_hashes; | |
1059 | const Elf_Internal_Rela *rel; | |
1060 | const Elf_Internal_Rela *rel_end; | |
e0001a05 | 1061 | |
c4b126b8 | 1062 | if (bfd_link_relocatable (info)) |
e0001a05 NC |
1063 | return TRUE; |
1064 | ||
28dbbc02 BW |
1065 | BFD_ASSERT (is_xtensa_elf (abfd)); |
1066 | ||
f0e6fdb2 | 1067 | htab = elf_xtensa_hash_table (info); |
4dfe6ac6 NC |
1068 | if (htab == NULL) |
1069 | return FALSE; | |
1070 | ||
e0001a05 NC |
1071 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; |
1072 | sym_hashes = elf_sym_hashes (abfd); | |
1073 | ||
e0001a05 NC |
1074 | rel_end = relocs + sec->reloc_count; |
1075 | for (rel = relocs; rel < rel_end; rel++) | |
1076 | { | |
1077 | unsigned int r_type; | |
d42c267e | 1078 | unsigned r_symndx; |
28dbbc02 BW |
1079 | struct elf_link_hash_entry *h = NULL; |
1080 | struct elf_xtensa_link_hash_entry *eh; | |
1081 | int tls_type, old_tls_type; | |
1082 | bfd_boolean is_got = FALSE; | |
1083 | bfd_boolean is_plt = FALSE; | |
1084 | bfd_boolean is_tlsfunc = FALSE; | |
e0001a05 NC |
1085 | |
1086 | r_symndx = ELF32_R_SYM (rel->r_info); | |
1087 | r_type = ELF32_R_TYPE (rel->r_info); | |
1088 | ||
1089 | if (r_symndx >= NUM_SHDR_ENTRIES (symtab_hdr)) | |
1090 | { | |
695344c0 | 1091 | /* xgettext:c-format */ |
871b3ab2 | 1092 | _bfd_error_handler (_("%pB: bad symbol index: %d"), |
4eca0228 | 1093 | abfd, r_symndx); |
e0001a05 NC |
1094 | return FALSE; |
1095 | } | |
1096 | ||
28dbbc02 | 1097 | if (r_symndx >= symtab_hdr->sh_info) |
e0001a05 NC |
1098 | { |
1099 | h = sym_hashes[r_symndx - symtab_hdr->sh_info]; | |
1100 | while (h->root.type == bfd_link_hash_indirect | |
1101 | || h->root.type == bfd_link_hash_warning) | |
1102 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
1103 | } | |
28dbbc02 | 1104 | eh = elf_xtensa_hash_entry (h); |
e0001a05 NC |
1105 | |
1106 | switch (r_type) | |
1107 | { | |
28dbbc02 | 1108 | case R_XTENSA_TLSDESC_FN: |
0e1862bb | 1109 | if (bfd_link_pic (info)) |
28dbbc02 BW |
1110 | { |
1111 | tls_type = GOT_TLS_GD; | |
1112 | is_got = TRUE; | |
1113 | is_tlsfunc = TRUE; | |
1114 | } | |
1115 | else | |
1116 | tls_type = GOT_TLS_IE; | |
1117 | break; | |
e0001a05 | 1118 | |
28dbbc02 | 1119 | case R_XTENSA_TLSDESC_ARG: |
0e1862bb | 1120 | if (bfd_link_pic (info)) |
e0001a05 | 1121 | { |
28dbbc02 BW |
1122 | tls_type = GOT_TLS_GD; |
1123 | is_got = TRUE; | |
1124 | } | |
1125 | else | |
1126 | { | |
1127 | tls_type = GOT_TLS_IE; | |
1128 | if (h && elf_xtensa_hash_entry (h) != htab->tlsbase) | |
1129 | is_got = TRUE; | |
e0001a05 NC |
1130 | } |
1131 | break; | |
1132 | ||
28dbbc02 | 1133 | case R_XTENSA_TLS_DTPOFF: |
0e1862bb | 1134 | if (bfd_link_pic (info)) |
28dbbc02 BW |
1135 | tls_type = GOT_TLS_GD; |
1136 | else | |
1137 | tls_type = GOT_TLS_IE; | |
1138 | break; | |
1139 | ||
1140 | case R_XTENSA_TLS_TPOFF: | |
1141 | tls_type = GOT_TLS_IE; | |
0e1862bb | 1142 | if (bfd_link_pic (info)) |
28dbbc02 | 1143 | info->flags |= DF_STATIC_TLS; |
0e1862bb | 1144 | if (bfd_link_pic (info) || h) |
28dbbc02 BW |
1145 | is_got = TRUE; |
1146 | break; | |
1147 | ||
1148 | case R_XTENSA_32: | |
1149 | tls_type = GOT_NORMAL; | |
1150 | is_got = TRUE; | |
1151 | break; | |
1152 | ||
e0001a05 | 1153 | case R_XTENSA_PLT: |
28dbbc02 BW |
1154 | tls_type = GOT_NORMAL; |
1155 | is_plt = TRUE; | |
1156 | break; | |
e0001a05 | 1157 | |
28dbbc02 BW |
1158 | case R_XTENSA_GNU_VTINHERIT: |
1159 | /* This relocation describes the C++ object vtable hierarchy. | |
1160 | Reconstruct it for later use during GC. */ | |
1161 | if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset)) | |
1162 | return FALSE; | |
1163 | continue; | |
1164 | ||
1165 | case R_XTENSA_GNU_VTENTRY: | |
1166 | /* This relocation describes which C++ vtable entries are actually | |
1167 | used. Record for later use during GC. */ | |
a0ea3a14 | 1168 | if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend)) |
28dbbc02 BW |
1169 | return FALSE; |
1170 | continue; | |
1171 | ||
1172 | default: | |
1173 | /* Nothing to do for any other relocations. */ | |
1174 | continue; | |
1175 | } | |
1176 | ||
1177 | if (h) | |
1178 | { | |
1179 | if (is_plt) | |
e0001a05 | 1180 | { |
b45329f9 BW |
1181 | if (h->plt.refcount <= 0) |
1182 | { | |
1183 | h->needs_plt = 1; | |
1184 | h->plt.refcount = 1; | |
1185 | } | |
1186 | else | |
1187 | h->plt.refcount += 1; | |
e0001a05 NC |
1188 | |
1189 | /* Keep track of the total PLT relocation count even if we | |
1190 | don't yet know whether the dynamic sections will be | |
1191 | created. */ | |
f0e6fdb2 | 1192 | htab->plt_reloc_count += 1; |
e0001a05 NC |
1193 | |
1194 | if (elf_hash_table (info)->dynamic_sections_created) | |
1195 | { | |
f0e6fdb2 | 1196 | if (! add_extra_plt_sections (info, htab->plt_reloc_count)) |
e0001a05 NC |
1197 | return FALSE; |
1198 | } | |
1199 | } | |
28dbbc02 | 1200 | else if (is_got) |
b45329f9 BW |
1201 | { |
1202 | if (h->got.refcount <= 0) | |
1203 | h->got.refcount = 1; | |
1204 | else | |
1205 | h->got.refcount += 1; | |
1206 | } | |
28dbbc02 BW |
1207 | |
1208 | if (is_tlsfunc) | |
1209 | eh->tlsfunc_refcount += 1; | |
e0001a05 | 1210 | |
28dbbc02 BW |
1211 | old_tls_type = eh->tls_type; |
1212 | } | |
1213 | else | |
1214 | { | |
1215 | /* Allocate storage the first time. */ | |
1216 | if (elf_local_got_refcounts (abfd) == NULL) | |
e0001a05 | 1217 | { |
28dbbc02 BW |
1218 | bfd_size_type size = symtab_hdr->sh_info; |
1219 | void *mem; | |
e0001a05 | 1220 | |
28dbbc02 BW |
1221 | mem = bfd_zalloc (abfd, size * sizeof (bfd_signed_vma)); |
1222 | if (mem == NULL) | |
1223 | return FALSE; | |
1224 | elf_local_got_refcounts (abfd) = (bfd_signed_vma *) mem; | |
e0001a05 | 1225 | |
28dbbc02 BW |
1226 | mem = bfd_zalloc (abfd, size); |
1227 | if (mem == NULL) | |
1228 | return FALSE; | |
1229 | elf_xtensa_local_got_tls_type (abfd) = (char *) mem; | |
1230 | ||
1231 | mem = bfd_zalloc (abfd, size * sizeof (bfd_signed_vma)); | |
1232 | if (mem == NULL) | |
1233 | return FALSE; | |
1234 | elf_xtensa_local_tlsfunc_refcounts (abfd) | |
1235 | = (bfd_signed_vma *) mem; | |
e0001a05 | 1236 | } |
e0001a05 | 1237 | |
28dbbc02 BW |
1238 | /* This is a global offset table entry for a local symbol. */ |
1239 | if (is_got || is_plt) | |
1240 | elf_local_got_refcounts (abfd) [r_symndx] += 1; | |
e0001a05 | 1241 | |
28dbbc02 BW |
1242 | if (is_tlsfunc) |
1243 | elf_xtensa_local_tlsfunc_refcounts (abfd) [r_symndx] += 1; | |
e0001a05 | 1244 | |
28dbbc02 BW |
1245 | old_tls_type = elf_xtensa_local_got_tls_type (abfd) [r_symndx]; |
1246 | } | |
1247 | ||
1248 | if ((old_tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_IE)) | |
1249 | tls_type |= old_tls_type; | |
1250 | /* If a TLS symbol is accessed using IE at least once, | |
1251 | there is no point to use a dynamic model for it. */ | |
1252 | else if (old_tls_type != tls_type && old_tls_type != GOT_UNKNOWN | |
1253 | && ((old_tls_type & GOT_TLS_GD) == 0 | |
1254 | || (tls_type & GOT_TLS_IE) == 0)) | |
1255 | { | |
1256 | if ((old_tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GD)) | |
1257 | tls_type = old_tls_type; | |
1258 | else if ((old_tls_type & GOT_TLS_GD) && (tls_type & GOT_TLS_GD)) | |
1259 | tls_type |= old_tls_type; | |
1260 | else | |
1261 | { | |
4eca0228 | 1262 | _bfd_error_handler |
695344c0 | 1263 | /* xgettext:c-format */ |
871b3ab2 | 1264 | (_("%pB: `%s' accessed both as normal and thread local symbol"), |
28dbbc02 BW |
1265 | abfd, |
1266 | h ? h->root.root.string : "<local>"); | |
1267 | return FALSE; | |
1268 | } | |
1269 | } | |
1270 | ||
1271 | if (old_tls_type != tls_type) | |
1272 | { | |
1273 | if (eh) | |
1274 | eh->tls_type = tls_type; | |
1275 | else | |
1276 | elf_xtensa_local_got_tls_type (abfd) [r_symndx] = tls_type; | |
e0001a05 NC |
1277 | } |
1278 | } | |
1279 | ||
e0001a05 NC |
1280 | return TRUE; |
1281 | } | |
1282 | ||
1283 | ||
95147441 BW |
1284 | static void |
1285 | elf_xtensa_make_sym_local (struct bfd_link_info *info, | |
07d6d2b8 | 1286 | struct elf_link_hash_entry *h) |
95147441 | 1287 | { |
0e1862bb | 1288 | if (bfd_link_pic (info)) |
95147441 BW |
1289 | { |
1290 | if (h->plt.refcount > 0) | |
07d6d2b8 | 1291 | { |
95147441 BW |
1292 | /* For shared objects, there's no need for PLT entries for local |
1293 | symbols (use RELATIVE relocs instead of JMP_SLOT relocs). */ | |
07d6d2b8 AM |
1294 | if (h->got.refcount < 0) |
1295 | h->got.refcount = 0; | |
1296 | h->got.refcount += h->plt.refcount; | |
1297 | h->plt.refcount = 0; | |
1298 | } | |
95147441 BW |
1299 | } |
1300 | else | |
1301 | { | |
1302 | /* Don't need any dynamic relocations at all. */ | |
1303 | h->plt.refcount = 0; | |
1304 | h->got.refcount = 0; | |
1305 | } | |
1306 | } | |
1307 | ||
1308 | ||
1309 | static void | |
1310 | elf_xtensa_hide_symbol (struct bfd_link_info *info, | |
07d6d2b8 AM |
1311 | struct elf_link_hash_entry *h, |
1312 | bfd_boolean force_local) | |
95147441 BW |
1313 | { |
1314 | /* For a shared link, move the plt refcount to the got refcount to leave | |
1315 | space for RELATIVE relocs. */ | |
1316 | elf_xtensa_make_sym_local (info, h); | |
1317 | ||
1318 | _bfd_elf_link_hash_hide_symbol (info, h, force_local); | |
1319 | } | |
1320 | ||
1321 | ||
e0001a05 NC |
1322 | /* Return the section that should be marked against GC for a given |
1323 | relocation. */ | |
1324 | ||
1325 | static asection * | |
7fa3d080 | 1326 | elf_xtensa_gc_mark_hook (asection *sec, |
07adf181 | 1327 | struct bfd_link_info *info, |
7fa3d080 BW |
1328 | Elf_Internal_Rela *rel, |
1329 | struct elf_link_hash_entry *h, | |
1330 | Elf_Internal_Sym *sym) | |
e0001a05 | 1331 | { |
e1e5c0b5 BW |
1332 | /* Property sections are marked "KEEP" in the linker scripts, but they |
1333 | should not cause other sections to be marked. (This approach relies | |
1334 | on elf_xtensa_discard_info to remove property table entries that | |
1335 | describe discarded sections. Alternatively, it might be more | |
1336 | efficient to avoid using "KEEP" in the linker scripts and instead use | |
1337 | the gc_mark_extra_sections hook to mark only the property sections | |
1338 | that describe marked sections. That alternative does not work well | |
1339 | with the current property table sections, which do not correspond | |
1340 | one-to-one with the sections they describe, but that should be fixed | |
1341 | someday.) */ | |
1342 | if (xtensa_is_property_section (sec)) | |
1343 | return NULL; | |
1344 | ||
07adf181 AM |
1345 | if (h != NULL) |
1346 | switch (ELF32_R_TYPE (rel->r_info)) | |
1347 | { | |
1348 | case R_XTENSA_GNU_VTINHERIT: | |
1349 | case R_XTENSA_GNU_VTENTRY: | |
1350 | return NULL; | |
1351 | } | |
1352 | ||
1353 | return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym); | |
e0001a05 NC |
1354 | } |
1355 | ||
7fa3d080 | 1356 | |
e0001a05 NC |
1357 | /* Create all the dynamic sections. */ |
1358 | ||
1359 | static bfd_boolean | |
7fa3d080 | 1360 | elf_xtensa_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info) |
e0001a05 | 1361 | { |
f0e6fdb2 | 1362 | struct elf_xtensa_link_hash_table *htab; |
e901de89 | 1363 | flagword flags, noalloc_flags; |
f0e6fdb2 BW |
1364 | |
1365 | htab = elf_xtensa_hash_table (info); | |
4dfe6ac6 NC |
1366 | if (htab == NULL) |
1367 | return FALSE; | |
e0001a05 NC |
1368 | |
1369 | /* First do all the standard stuff. */ | |
1370 | if (! _bfd_elf_create_dynamic_sections (dynobj, info)) | |
1371 | return FALSE; | |
1372 | ||
1373 | /* Create any extra PLT sections in case check_relocs has already | |
1374 | been called on all the non-dynamic input files. */ | |
f0e6fdb2 | 1375 | if (! add_extra_plt_sections (info, htab->plt_reloc_count)) |
e0001a05 NC |
1376 | return FALSE; |
1377 | ||
e901de89 BW |
1378 | noalloc_flags = (SEC_HAS_CONTENTS | SEC_IN_MEMORY |
1379 | | SEC_LINKER_CREATED | SEC_READONLY); | |
1380 | flags = noalloc_flags | SEC_ALLOC | SEC_LOAD; | |
e0001a05 NC |
1381 | |
1382 | /* Mark the ".got.plt" section READONLY. */ | |
ce558b89 | 1383 | if (htab->elf.sgotplt == NULL |
fd361982 | 1384 | || !bfd_set_section_flags (htab->elf.sgotplt, flags)) |
e0001a05 NC |
1385 | return FALSE; |
1386 | ||
e901de89 | 1387 | /* Create ".got.loc" (literal tables for use by dynamic linker). */ |
3d4d4302 AM |
1388 | htab->sgotloc = bfd_make_section_anyway_with_flags (dynobj, ".got.loc", |
1389 | flags); | |
f0e6fdb2 | 1390 | if (htab->sgotloc == NULL |
fd361982 | 1391 | || !bfd_set_section_alignment (htab->sgotloc, 2)) |
e901de89 BW |
1392 | return FALSE; |
1393 | ||
e0001a05 | 1394 | /* Create ".xt.lit.plt" (literal table for ".got.plt*"). */ |
3d4d4302 AM |
1395 | htab->spltlittbl = bfd_make_section_anyway_with_flags (dynobj, ".xt.lit.plt", |
1396 | noalloc_flags); | |
f0e6fdb2 | 1397 | if (htab->spltlittbl == NULL |
fd361982 | 1398 | || !bfd_set_section_alignment (htab->spltlittbl, 2)) |
e0001a05 NC |
1399 | return FALSE; |
1400 | ||
1401 | return TRUE; | |
1402 | } | |
1403 | ||
1404 | ||
1405 | static bfd_boolean | |
f0e6fdb2 | 1406 | add_extra_plt_sections (struct bfd_link_info *info, int count) |
e0001a05 | 1407 | { |
f0e6fdb2 | 1408 | bfd *dynobj = elf_hash_table (info)->dynobj; |
e0001a05 NC |
1409 | int chunk; |
1410 | ||
1411 | /* Iterate over all chunks except 0 which uses the standard ".plt" and | |
1412 | ".got.plt" sections. */ | |
1413 | for (chunk = count / PLT_ENTRIES_PER_CHUNK; chunk > 0; chunk--) | |
1414 | { | |
1415 | char *sname; | |
1416 | flagword flags; | |
1417 | asection *s; | |
1418 | ||
1419 | /* Stop when we find a section has already been created. */ | |
f0e6fdb2 | 1420 | if (elf_xtensa_get_plt_section (info, chunk)) |
e0001a05 NC |
1421 | break; |
1422 | ||
1423 | flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | |
1424 | | SEC_LINKER_CREATED | SEC_READONLY); | |
1425 | ||
1426 | sname = (char *) bfd_malloc (10); | |
1427 | sprintf (sname, ".plt.%u", chunk); | |
3d4d4302 | 1428 | s = bfd_make_section_anyway_with_flags (dynobj, sname, flags | SEC_CODE); |
e0001a05 | 1429 | if (s == NULL |
fd361982 | 1430 | || !bfd_set_section_alignment (s, 2)) |
e0001a05 NC |
1431 | return FALSE; |
1432 | ||
1433 | sname = (char *) bfd_malloc (14); | |
1434 | sprintf (sname, ".got.plt.%u", chunk); | |
3d4d4302 | 1435 | s = bfd_make_section_anyway_with_flags (dynobj, sname, flags); |
e0001a05 | 1436 | if (s == NULL |
fd361982 | 1437 | || !bfd_set_section_alignment (s, 2)) |
e0001a05 NC |
1438 | return FALSE; |
1439 | } | |
1440 | ||
1441 | return TRUE; | |
1442 | } | |
1443 | ||
1444 | ||
1445 | /* Adjust a symbol defined by a dynamic object and referenced by a | |
1446 | regular object. The current definition is in some section of the | |
1447 | dynamic object, but we're not including those sections. We have to | |
1448 | change the definition to something the rest of the link can | |
1449 | understand. */ | |
1450 | ||
1451 | static bfd_boolean | |
7fa3d080 BW |
1452 | elf_xtensa_adjust_dynamic_symbol (struct bfd_link_info *info ATTRIBUTE_UNUSED, |
1453 | struct elf_link_hash_entry *h) | |
e0001a05 NC |
1454 | { |
1455 | /* If this is a weak symbol, and there is a real definition, the | |
1456 | processor independent code will have arranged for us to see the | |
1457 | real definition first, and we can just use the same value. */ | |
60d67dc8 | 1458 | if (h->is_weakalias) |
e0001a05 | 1459 | { |
60d67dc8 AM |
1460 | struct elf_link_hash_entry *def = weakdef (h); |
1461 | BFD_ASSERT (def->root.type == bfd_link_hash_defined); | |
1462 | h->root.u.def.section = def->root.u.def.section; | |
1463 | h->root.u.def.value = def->root.u.def.value; | |
e0001a05 NC |
1464 | return TRUE; |
1465 | } | |
1466 | ||
1467 | /* This is a reference to a symbol defined by a dynamic object. The | |
1468 | reference must go through the GOT, so there's no need for COPY relocs, | |
1469 | .dynbss, etc. */ | |
1470 | ||
1471 | return TRUE; | |
1472 | } | |
1473 | ||
1474 | ||
e0001a05 | 1475 | static bfd_boolean |
f1ab2340 | 1476 | elf_xtensa_allocate_dynrelocs (struct elf_link_hash_entry *h, void *arg) |
e0001a05 | 1477 | { |
f1ab2340 BW |
1478 | struct bfd_link_info *info; |
1479 | struct elf_xtensa_link_hash_table *htab; | |
28dbbc02 | 1480 | struct elf_xtensa_link_hash_entry *eh = elf_xtensa_hash_entry (h); |
e0001a05 | 1481 | |
f1ab2340 BW |
1482 | if (h->root.type == bfd_link_hash_indirect) |
1483 | return TRUE; | |
e0001a05 | 1484 | |
f1ab2340 BW |
1485 | info = (struct bfd_link_info *) arg; |
1486 | htab = elf_xtensa_hash_table (info); | |
4dfe6ac6 NC |
1487 | if (htab == NULL) |
1488 | return FALSE; | |
e0001a05 | 1489 | |
28dbbc02 BW |
1490 | /* If we saw any use of an IE model for this symbol, we can then optimize |
1491 | away GOT entries for any TLSDESC_FN relocs. */ | |
1492 | if ((eh->tls_type & GOT_TLS_IE) != 0) | |
1493 | { | |
1494 | BFD_ASSERT (h->got.refcount >= eh->tlsfunc_refcount); | |
1495 | h->got.refcount -= eh->tlsfunc_refcount; | |
1496 | } | |
e0001a05 | 1497 | |
28dbbc02 | 1498 | if (! elf_xtensa_dynamic_symbol_p (h, info)) |
95147441 | 1499 | elf_xtensa_make_sym_local (info, h); |
e0001a05 | 1500 | |
c451bb34 MF |
1501 | if (! elf_xtensa_dynamic_symbol_p (h, info) |
1502 | && h->root.type == bfd_link_hash_undefweak) | |
1503 | return TRUE; | |
1504 | ||
f1ab2340 | 1505 | if (h->plt.refcount > 0) |
ce558b89 | 1506 | htab->elf.srelplt->size += (h->plt.refcount * sizeof (Elf32_External_Rela)); |
e0001a05 NC |
1507 | |
1508 | if (h->got.refcount > 0) | |
ce558b89 | 1509 | htab->elf.srelgot->size += (h->got.refcount * sizeof (Elf32_External_Rela)); |
e0001a05 NC |
1510 | |
1511 | return TRUE; | |
1512 | } | |
1513 | ||
1514 | ||
1515 | static void | |
f0e6fdb2 | 1516 | elf_xtensa_allocate_local_got_size (struct bfd_link_info *info) |
e0001a05 | 1517 | { |
f0e6fdb2 | 1518 | struct elf_xtensa_link_hash_table *htab; |
e0001a05 NC |
1519 | bfd *i; |
1520 | ||
f0e6fdb2 | 1521 | htab = elf_xtensa_hash_table (info); |
4dfe6ac6 NC |
1522 | if (htab == NULL) |
1523 | return; | |
f0e6fdb2 | 1524 | |
c72f2fb2 | 1525 | for (i = info->input_bfds; i; i = i->link.next) |
e0001a05 NC |
1526 | { |
1527 | bfd_signed_vma *local_got_refcounts; | |
1528 | bfd_size_type j, cnt; | |
1529 | Elf_Internal_Shdr *symtab_hdr; | |
1530 | ||
1531 | local_got_refcounts = elf_local_got_refcounts (i); | |
1532 | if (!local_got_refcounts) | |
1533 | continue; | |
1534 | ||
1535 | symtab_hdr = &elf_tdata (i)->symtab_hdr; | |
1536 | cnt = symtab_hdr->sh_info; | |
1537 | ||
1538 | for (j = 0; j < cnt; ++j) | |
1539 | { | |
28dbbc02 BW |
1540 | /* If we saw any use of an IE model for this symbol, we can |
1541 | then optimize away GOT entries for any TLSDESC_FN relocs. */ | |
1542 | if ((elf_xtensa_local_got_tls_type (i) [j] & GOT_TLS_IE) != 0) | |
1543 | { | |
1544 | bfd_signed_vma *tlsfunc_refcount | |
1545 | = &elf_xtensa_local_tlsfunc_refcounts (i) [j]; | |
1546 | BFD_ASSERT (local_got_refcounts[j] >= *tlsfunc_refcount); | |
1547 | local_got_refcounts[j] -= *tlsfunc_refcount; | |
1548 | } | |
1549 | ||
e0001a05 | 1550 | if (local_got_refcounts[j] > 0) |
ce558b89 AM |
1551 | htab->elf.srelgot->size += (local_got_refcounts[j] |
1552 | * sizeof (Elf32_External_Rela)); | |
e0001a05 NC |
1553 | } |
1554 | } | |
1555 | } | |
1556 | ||
1557 | ||
1558 | /* Set the sizes of the dynamic sections. */ | |
1559 | ||
1560 | static bfd_boolean | |
7fa3d080 BW |
1561 | elf_xtensa_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, |
1562 | struct bfd_link_info *info) | |
e0001a05 | 1563 | { |
f0e6fdb2 | 1564 | struct elf_xtensa_link_hash_table *htab; |
e901de89 BW |
1565 | bfd *dynobj, *abfd; |
1566 | asection *s, *srelplt, *splt, *sgotplt, *srelgot, *spltlittbl, *sgotloc; | |
e0001a05 NC |
1567 | bfd_boolean relplt, relgot; |
1568 | int plt_entries, plt_chunks, chunk; | |
1569 | ||
1570 | plt_entries = 0; | |
1571 | plt_chunks = 0; | |
e0001a05 | 1572 | |
f0e6fdb2 | 1573 | htab = elf_xtensa_hash_table (info); |
4dfe6ac6 NC |
1574 | if (htab == NULL) |
1575 | return FALSE; | |
1576 | ||
e0001a05 NC |
1577 | dynobj = elf_hash_table (info)->dynobj; |
1578 | if (dynobj == NULL) | |
1579 | abort (); | |
ce558b89 AM |
1580 | srelgot = htab->elf.srelgot; |
1581 | srelplt = htab->elf.srelplt; | |
e0001a05 NC |
1582 | |
1583 | if (elf_hash_table (info)->dynamic_sections_created) | |
1584 | { | |
ce558b89 AM |
1585 | BFD_ASSERT (htab->elf.srelgot != NULL |
1586 | && htab->elf.srelplt != NULL | |
1587 | && htab->elf.sgot != NULL | |
f0e6fdb2 BW |
1588 | && htab->spltlittbl != NULL |
1589 | && htab->sgotloc != NULL); | |
1590 | ||
e0001a05 | 1591 | /* Set the contents of the .interp section to the interpreter. */ |
9b8b325a | 1592 | if (bfd_link_executable (info) && !info->nointerp) |
e0001a05 | 1593 | { |
3d4d4302 | 1594 | s = bfd_get_linker_section (dynobj, ".interp"); |
e0001a05 NC |
1595 | if (s == NULL) |
1596 | abort (); | |
eea6121a | 1597 | s->size = sizeof ELF_DYNAMIC_INTERPRETER; |
e0001a05 NC |
1598 | s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER; |
1599 | } | |
1600 | ||
1601 | /* Allocate room for one word in ".got". */ | |
ce558b89 | 1602 | htab->elf.sgot->size = 4; |
e0001a05 | 1603 | |
f1ab2340 BW |
1604 | /* Allocate space in ".rela.got" for literals that reference global |
1605 | symbols and space in ".rela.plt" for literals that have PLT | |
1606 | entries. */ | |
e0001a05 | 1607 | elf_link_hash_traverse (elf_hash_table (info), |
f1ab2340 | 1608 | elf_xtensa_allocate_dynrelocs, |
7fa3d080 | 1609 | (void *) info); |
e0001a05 | 1610 | |
e0001a05 NC |
1611 | /* If we are generating a shared object, we also need space in |
1612 | ".rela.got" for R_XTENSA_RELATIVE relocs for literals that | |
1613 | reference local symbols. */ | |
0e1862bb | 1614 | if (bfd_link_pic (info)) |
f0e6fdb2 | 1615 | elf_xtensa_allocate_local_got_size (info); |
e0001a05 | 1616 | |
e0001a05 NC |
1617 | /* Allocate space in ".plt" to match the size of ".rela.plt". For |
1618 | each PLT entry, we need the PLT code plus a 4-byte literal. | |
1619 | For each chunk of ".plt", we also need two more 4-byte | |
1620 | literals, two corresponding entries in ".rela.got", and an | |
1621 | 8-byte entry in ".xt.lit.plt". */ | |
f0e6fdb2 | 1622 | spltlittbl = htab->spltlittbl; |
eea6121a | 1623 | plt_entries = srelplt->size / sizeof (Elf32_External_Rela); |
e0001a05 NC |
1624 | plt_chunks = |
1625 | (plt_entries + PLT_ENTRIES_PER_CHUNK - 1) / PLT_ENTRIES_PER_CHUNK; | |
1626 | ||
1627 | /* Iterate over all the PLT chunks, including any extra sections | |
1628 | created earlier because the initial count of PLT relocations | |
1629 | was an overestimate. */ | |
1630 | for (chunk = 0; | |
f0e6fdb2 | 1631 | (splt = elf_xtensa_get_plt_section (info, chunk)) != NULL; |
e0001a05 NC |
1632 | chunk++) |
1633 | { | |
1634 | int chunk_entries; | |
1635 | ||
f0e6fdb2 BW |
1636 | sgotplt = elf_xtensa_get_gotplt_section (info, chunk); |
1637 | BFD_ASSERT (sgotplt != NULL); | |
e0001a05 NC |
1638 | |
1639 | if (chunk < plt_chunks - 1) | |
1640 | chunk_entries = PLT_ENTRIES_PER_CHUNK; | |
1641 | else if (chunk == plt_chunks - 1) | |
1642 | chunk_entries = plt_entries - (chunk * PLT_ENTRIES_PER_CHUNK); | |
1643 | else | |
1644 | chunk_entries = 0; | |
1645 | ||
1646 | if (chunk_entries != 0) | |
1647 | { | |
eea6121a AM |
1648 | sgotplt->size = 4 * (chunk_entries + 2); |
1649 | splt->size = PLT_ENTRY_SIZE * chunk_entries; | |
1650 | srelgot->size += 2 * sizeof (Elf32_External_Rela); | |
1651 | spltlittbl->size += 8; | |
e0001a05 NC |
1652 | } |
1653 | else | |
1654 | { | |
eea6121a AM |
1655 | sgotplt->size = 0; |
1656 | splt->size = 0; | |
e0001a05 NC |
1657 | } |
1658 | } | |
e901de89 BW |
1659 | |
1660 | /* Allocate space in ".got.loc" to match the total size of all the | |
1661 | literal tables. */ | |
f0e6fdb2 | 1662 | sgotloc = htab->sgotloc; |
eea6121a | 1663 | sgotloc->size = spltlittbl->size; |
c72f2fb2 | 1664 | for (abfd = info->input_bfds; abfd != NULL; abfd = abfd->link.next) |
e901de89 BW |
1665 | { |
1666 | if (abfd->flags & DYNAMIC) | |
1667 | continue; | |
1668 | for (s = abfd->sections; s != NULL; s = s->next) | |
1669 | { | |
dbaa2011 | 1670 | if (! discarded_section (s) |
b536dc1e BW |
1671 | && xtensa_is_littable_section (s) |
1672 | && s != spltlittbl) | |
eea6121a | 1673 | sgotloc->size += s->size; |
e901de89 BW |
1674 | } |
1675 | } | |
e0001a05 NC |
1676 | } |
1677 | ||
1678 | /* Allocate memory for dynamic sections. */ | |
1679 | relplt = FALSE; | |
1680 | relgot = FALSE; | |
1681 | for (s = dynobj->sections; s != NULL; s = s->next) | |
1682 | { | |
1683 | const char *name; | |
e0001a05 NC |
1684 | |
1685 | if ((s->flags & SEC_LINKER_CREATED) == 0) | |
1686 | continue; | |
1687 | ||
1688 | /* It's OK to base decisions on the section name, because none | |
1689 | of the dynobj section names depend upon the input files. */ | |
fd361982 | 1690 | name = bfd_section_name (s); |
e0001a05 | 1691 | |
0112cd26 | 1692 | if (CONST_STRNEQ (name, ".rela")) |
e0001a05 | 1693 | { |
c456f082 | 1694 | if (s->size != 0) |
e0001a05 | 1695 | { |
c456f082 AM |
1696 | if (strcmp (name, ".rela.plt") == 0) |
1697 | relplt = TRUE; | |
1698 | else if (strcmp (name, ".rela.got") == 0) | |
1699 | relgot = TRUE; | |
1700 | ||
1701 | /* We use the reloc_count field as a counter if we need | |
1702 | to copy relocs into the output file. */ | |
1703 | s->reloc_count = 0; | |
e0001a05 NC |
1704 | } |
1705 | } | |
0112cd26 NC |
1706 | else if (! CONST_STRNEQ (name, ".plt.") |
1707 | && ! CONST_STRNEQ (name, ".got.plt.") | |
c456f082 | 1708 | && strcmp (name, ".got") != 0 |
e0001a05 NC |
1709 | && strcmp (name, ".plt") != 0 |
1710 | && strcmp (name, ".got.plt") != 0 | |
e901de89 BW |
1711 | && strcmp (name, ".xt.lit.plt") != 0 |
1712 | && strcmp (name, ".got.loc") != 0) | |
e0001a05 NC |
1713 | { |
1714 | /* It's not one of our sections, so don't allocate space. */ | |
1715 | continue; | |
1716 | } | |
1717 | ||
c456f082 AM |
1718 | if (s->size == 0) |
1719 | { | |
1720 | /* If we don't need this section, strip it from the output | |
1721 | file. We must create the ".plt*" and ".got.plt*" | |
1722 | sections in create_dynamic_sections and/or check_relocs | |
1723 | based on a conservative estimate of the PLT relocation | |
1724 | count, because the sections must be created before the | |
1725 | linker maps input sections to output sections. The | |
1726 | linker does that before size_dynamic_sections, where we | |
1727 | compute the exact size of the PLT, so there may be more | |
1728 | of these sections than are actually needed. */ | |
1729 | s->flags |= SEC_EXCLUDE; | |
1730 | } | |
1731 | else if ((s->flags & SEC_HAS_CONTENTS) != 0) | |
e0001a05 NC |
1732 | { |
1733 | /* Allocate memory for the section contents. */ | |
eea6121a | 1734 | s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size); |
c456f082 | 1735 | if (s->contents == NULL) |
e0001a05 NC |
1736 | return FALSE; |
1737 | } | |
1738 | } | |
1739 | ||
1740 | if (elf_hash_table (info)->dynamic_sections_created) | |
1741 | { | |
1742 | /* Add the special XTENSA_RTLD relocations now. The offsets won't be | |
1743 | known until finish_dynamic_sections, but we need to get the relocs | |
1744 | in place before they are sorted. */ | |
e0001a05 NC |
1745 | for (chunk = 0; chunk < plt_chunks; chunk++) |
1746 | { | |
1747 | Elf_Internal_Rela irela; | |
1748 | bfd_byte *loc; | |
1749 | ||
1750 | irela.r_offset = 0; | |
1751 | irela.r_info = ELF32_R_INFO (0, R_XTENSA_RTLD); | |
1752 | irela.r_addend = 0; | |
1753 | ||
1754 | loc = (srelgot->contents | |
1755 | + srelgot->reloc_count * sizeof (Elf32_External_Rela)); | |
1756 | bfd_elf32_swap_reloca_out (output_bfd, &irela, loc); | |
1757 | bfd_elf32_swap_reloca_out (output_bfd, &irela, | |
1758 | loc + sizeof (Elf32_External_Rela)); | |
1759 | srelgot->reloc_count += 2; | |
1760 | } | |
1761 | ||
1762 | /* Add some entries to the .dynamic section. We fill in the | |
1763 | values later, in elf_xtensa_finish_dynamic_sections, but we | |
1764 | must add the entries now so that we get the correct size for | |
1765 | the .dynamic section. The DT_DEBUG entry is filled in by the | |
1766 | dynamic linker and used by the debugger. */ | |
1767 | #define add_dynamic_entry(TAG, VAL) \ | |
5a580b3a | 1768 | _bfd_elf_add_dynamic_entry (info, TAG, VAL) |
e0001a05 | 1769 | |
0e1862bb | 1770 | if (bfd_link_executable (info)) |
e0001a05 NC |
1771 | { |
1772 | if (!add_dynamic_entry (DT_DEBUG, 0)) | |
1773 | return FALSE; | |
1774 | } | |
1775 | ||
1776 | if (relplt) | |
1777 | { | |
c243ad3b | 1778 | if (!add_dynamic_entry (DT_PLTRELSZ, 0) |
e0001a05 NC |
1779 | || !add_dynamic_entry (DT_PLTREL, DT_RELA) |
1780 | || !add_dynamic_entry (DT_JMPREL, 0)) | |
1781 | return FALSE; | |
1782 | } | |
1783 | ||
1784 | if (relgot) | |
1785 | { | |
1786 | if (!add_dynamic_entry (DT_RELA, 0) | |
1787 | || !add_dynamic_entry (DT_RELASZ, 0) | |
1788 | || !add_dynamic_entry (DT_RELAENT, sizeof (Elf32_External_Rela))) | |
1789 | return FALSE; | |
1790 | } | |
1791 | ||
c243ad3b BW |
1792 | if (!add_dynamic_entry (DT_PLTGOT, 0) |
1793 | || !add_dynamic_entry (DT_XTENSA_GOT_LOC_OFF, 0) | |
e0001a05 NC |
1794 | || !add_dynamic_entry (DT_XTENSA_GOT_LOC_SZ, 0)) |
1795 | return FALSE; | |
1796 | } | |
1797 | #undef add_dynamic_entry | |
1798 | ||
1799 | return TRUE; | |
1800 | } | |
1801 | ||
28dbbc02 BW |
1802 | static bfd_boolean |
1803 | elf_xtensa_always_size_sections (bfd *output_bfd, | |
1804 | struct bfd_link_info *info) | |
1805 | { | |
1806 | struct elf_xtensa_link_hash_table *htab; | |
1807 | asection *tls_sec; | |
1808 | ||
1809 | htab = elf_xtensa_hash_table (info); | |
4dfe6ac6 NC |
1810 | if (htab == NULL) |
1811 | return FALSE; | |
1812 | ||
28dbbc02 BW |
1813 | tls_sec = htab->elf.tls_sec; |
1814 | ||
1815 | if (tls_sec && (htab->tlsbase->tls_type & GOT_TLS_ANY) != 0) | |
1816 | { | |
1817 | struct elf_link_hash_entry *tlsbase = &htab->tlsbase->elf; | |
1818 | struct bfd_link_hash_entry *bh = &tlsbase->root; | |
1819 | const struct elf_backend_data *bed = get_elf_backend_data (output_bfd); | |
1820 | ||
1821 | tlsbase->type = STT_TLS; | |
1822 | if (!(_bfd_generic_link_add_one_symbol | |
1823 | (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL, | |
1824 | tls_sec, 0, NULL, FALSE, | |
1825 | bed->collect, &bh))) | |
1826 | return FALSE; | |
1827 | tlsbase->def_regular = 1; | |
1828 | tlsbase->other = STV_HIDDEN; | |
1829 | (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE); | |
1830 | } | |
1831 | ||
1832 | return TRUE; | |
1833 | } | |
1834 | ||
e0001a05 | 1835 | \f |
28dbbc02 BW |
1836 | /* Return the base VMA address which should be subtracted from real addresses |
1837 | when resolving @dtpoff relocation. | |
1838 | This is PT_TLS segment p_vaddr. */ | |
1839 | ||
1840 | static bfd_vma | |
1841 | dtpoff_base (struct bfd_link_info *info) | |
1842 | { | |
1843 | /* If tls_sec is NULL, we should have signalled an error already. */ | |
1844 | if (elf_hash_table (info)->tls_sec == NULL) | |
1845 | return 0; | |
1846 | return elf_hash_table (info)->tls_sec->vma; | |
1847 | } | |
1848 | ||
1849 | /* Return the relocation value for @tpoff relocation | |
1850 | if STT_TLS virtual address is ADDRESS. */ | |
1851 | ||
1852 | static bfd_vma | |
1853 | tpoff (struct bfd_link_info *info, bfd_vma address) | |
1854 | { | |
1855 | struct elf_link_hash_table *htab = elf_hash_table (info); | |
1856 | bfd_vma base; | |
1857 | ||
1858 | /* If tls_sec is NULL, we should have signalled an error already. */ | |
1859 | if (htab->tls_sec == NULL) | |
1860 | return 0; | |
1861 | base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power); | |
1862 | return address - htab->tls_sec->vma + base; | |
1863 | } | |
1864 | ||
e0001a05 NC |
1865 | /* Perform the specified relocation. The instruction at (contents + address) |
1866 | is modified to set one operand to represent the value in "relocation". The | |
1867 | operand position is determined by the relocation type recorded in the | |
1868 | howto. */ | |
1869 | ||
1870 | #define CALL_SEGMENT_BITS (30) | |
7fa3d080 | 1871 | #define CALL_SEGMENT_SIZE (1 << CALL_SEGMENT_BITS) |
e0001a05 NC |
1872 | |
1873 | static bfd_reloc_status_type | |
7fa3d080 BW |
1874 | elf_xtensa_do_reloc (reloc_howto_type *howto, |
1875 | bfd *abfd, | |
1876 | asection *input_section, | |
1877 | bfd_vma relocation, | |
1878 | bfd_byte *contents, | |
1879 | bfd_vma address, | |
1880 | bfd_boolean is_weak_undef, | |
1881 | char **error_message) | |
e0001a05 | 1882 | { |
43cd72b9 | 1883 | xtensa_format fmt; |
e0001a05 | 1884 | xtensa_opcode opcode; |
e0001a05 | 1885 | xtensa_isa isa = xtensa_default_isa; |
43cd72b9 BW |
1886 | static xtensa_insnbuf ibuff = NULL; |
1887 | static xtensa_insnbuf sbuff = NULL; | |
1bbb5f21 | 1888 | bfd_vma self_address; |
43cd72b9 BW |
1889 | bfd_size_type input_size; |
1890 | int opnd, slot; | |
e0001a05 NC |
1891 | uint32 newval; |
1892 | ||
43cd72b9 BW |
1893 | if (!ibuff) |
1894 | { | |
1895 | ibuff = xtensa_insnbuf_alloc (isa); | |
1896 | sbuff = xtensa_insnbuf_alloc (isa); | |
1897 | } | |
1898 | ||
1899 | input_size = bfd_get_section_limit (abfd, input_section); | |
1900 | ||
1bbb5f21 BW |
1901 | /* Calculate the PC address for this instruction. */ |
1902 | self_address = (input_section->output_section->vma | |
1903 | + input_section->output_offset | |
1904 | + address); | |
1905 | ||
e0001a05 NC |
1906 | switch (howto->type) |
1907 | { | |
1908 | case R_XTENSA_NONE: | |
43cd72b9 BW |
1909 | case R_XTENSA_DIFF8: |
1910 | case R_XTENSA_DIFF16: | |
1911 | case R_XTENSA_DIFF32: | |
30ce8e47 MF |
1912 | case R_XTENSA_PDIFF8: |
1913 | case R_XTENSA_PDIFF16: | |
1914 | case R_XTENSA_PDIFF32: | |
1915 | case R_XTENSA_NDIFF8: | |
1916 | case R_XTENSA_NDIFF16: | |
1917 | case R_XTENSA_NDIFF32: | |
28dbbc02 BW |
1918 | case R_XTENSA_TLS_FUNC: |
1919 | case R_XTENSA_TLS_ARG: | |
1920 | case R_XTENSA_TLS_CALL: | |
e0001a05 NC |
1921 | return bfd_reloc_ok; |
1922 | ||
1923 | case R_XTENSA_ASM_EXPAND: | |
1924 | if (!is_weak_undef) | |
1925 | { | |
1926 | /* Check for windowed CALL across a 1GB boundary. */ | |
91d6fa6a NC |
1927 | opcode = get_expanded_call_opcode (contents + address, |
1928 | input_size - address, 0); | |
e0001a05 NC |
1929 | if (is_windowed_call_opcode (opcode)) |
1930 | { | |
43cd72b9 | 1931 | if ((self_address >> CALL_SEGMENT_BITS) |
68ffbac6 | 1932 | != (relocation >> CALL_SEGMENT_BITS)) |
e0001a05 NC |
1933 | { |
1934 | *error_message = "windowed longcall crosses 1GB boundary; " | |
1935 | "return may fail"; | |
1936 | return bfd_reloc_dangerous; | |
1937 | } | |
1938 | } | |
1939 | } | |
1940 | return bfd_reloc_ok; | |
1941 | ||
1942 | case R_XTENSA_ASM_SIMPLIFY: | |
43cd72b9 | 1943 | { |
07d6d2b8 | 1944 | /* Convert the L32R/CALLX to CALL. */ |
43cd72b9 BW |
1945 | bfd_reloc_status_type retval = |
1946 | elf_xtensa_do_asm_simplify (contents, address, input_size, | |
1947 | error_message); | |
e0001a05 | 1948 | if (retval != bfd_reloc_ok) |
43cd72b9 | 1949 | return bfd_reloc_dangerous; |
e0001a05 NC |
1950 | |
1951 | /* The CALL needs to be relocated. Continue below for that part. */ | |
1952 | address += 3; | |
c46082c8 | 1953 | self_address += 3; |
43cd72b9 | 1954 | howto = &elf_howto_table[(unsigned) R_XTENSA_SLOT0_OP ]; |
e0001a05 NC |
1955 | } |
1956 | break; | |
1957 | ||
1958 | case R_XTENSA_32: | |
e0001a05 NC |
1959 | { |
1960 | bfd_vma x; | |
1961 | x = bfd_get_32 (abfd, contents + address); | |
1962 | x = x + relocation; | |
1963 | bfd_put_32 (abfd, x, contents + address); | |
1964 | } | |
1965 | return bfd_reloc_ok; | |
1bbb5f21 BW |
1966 | |
1967 | case R_XTENSA_32_PCREL: | |
1968 | bfd_put_32 (abfd, relocation - self_address, contents + address); | |
1969 | return bfd_reloc_ok; | |
28dbbc02 BW |
1970 | |
1971 | case R_XTENSA_PLT: | |
1972 | case R_XTENSA_TLSDESC_FN: | |
1973 | case R_XTENSA_TLSDESC_ARG: | |
1974 | case R_XTENSA_TLS_DTPOFF: | |
1975 | case R_XTENSA_TLS_TPOFF: | |
1976 | bfd_put_32 (abfd, relocation, contents + address); | |
1977 | return bfd_reloc_ok; | |
e0001a05 NC |
1978 | } |
1979 | ||
43cd72b9 BW |
1980 | /* Only instruction slot-specific relocations handled below.... */ |
1981 | slot = get_relocation_slot (howto->type); | |
1982 | if (slot == XTENSA_UNDEFINED) | |
e0001a05 | 1983 | { |
43cd72b9 | 1984 | *error_message = "unexpected relocation"; |
e0001a05 NC |
1985 | return bfd_reloc_dangerous; |
1986 | } | |
1987 | ||
43cd72b9 BW |
1988 | /* Read the instruction into a buffer and decode the opcode. */ |
1989 | xtensa_insnbuf_from_chars (isa, ibuff, contents + address, | |
1990 | input_size - address); | |
1991 | fmt = xtensa_format_decode (isa, ibuff); | |
1992 | if (fmt == XTENSA_UNDEFINED) | |
e0001a05 | 1993 | { |
43cd72b9 | 1994 | *error_message = "cannot decode instruction format"; |
e0001a05 NC |
1995 | return bfd_reloc_dangerous; |
1996 | } | |
1997 | ||
43cd72b9 | 1998 | xtensa_format_get_slot (isa, fmt, slot, ibuff, sbuff); |
e0001a05 | 1999 | |
43cd72b9 BW |
2000 | opcode = xtensa_opcode_decode (isa, fmt, slot, sbuff); |
2001 | if (opcode == XTENSA_UNDEFINED) | |
e0001a05 | 2002 | { |
43cd72b9 | 2003 | *error_message = "cannot decode instruction opcode"; |
e0001a05 NC |
2004 | return bfd_reloc_dangerous; |
2005 | } | |
2006 | ||
43cd72b9 BW |
2007 | /* Check for opcode-specific "alternate" relocations. */ |
2008 | if (is_alt_relocation (howto->type)) | |
2009 | { | |
2010 | if (opcode == get_l32r_opcode ()) | |
2011 | { | |
2012 | /* Handle the special-case of non-PC-relative L32R instructions. */ | |
2013 | bfd *output_bfd = input_section->output_section->owner; | |
2014 | asection *lit4_sec = bfd_get_section_by_name (output_bfd, ".lit4"); | |
2015 | if (!lit4_sec) | |
2016 | { | |
2017 | *error_message = "relocation references missing .lit4 section"; | |
2018 | return bfd_reloc_dangerous; | |
2019 | } | |
2020 | self_address = ((lit4_sec->vma & ~0xfff) | |
2021 | + 0x40000 - 3); /* -3 to compensate for do_reloc */ | |
2022 | newval = relocation; | |
2023 | opnd = 1; | |
2024 | } | |
2025 | else if (opcode == get_const16_opcode ()) | |
2026 | { | |
00863b8e MF |
2027 | /* ALT used for high 16 bits. |
2028 | Ignore 32-bit overflow. */ | |
2029 | newval = (relocation >> 16) & 0xffff; | |
43cd72b9 BW |
2030 | opnd = 1; |
2031 | } | |
2032 | else | |
2033 | { | |
2034 | /* No other "alternate" relocations currently defined. */ | |
2035 | *error_message = "unexpected relocation"; | |
2036 | return bfd_reloc_dangerous; | |
2037 | } | |
2038 | } | |
2039 | else /* Not an "alternate" relocation.... */ | |
2040 | { | |
2041 | if (opcode == get_const16_opcode ()) | |
2042 | { | |
2043 | newval = relocation & 0xffff; | |
2044 | opnd = 1; | |
2045 | } | |
2046 | else | |
2047 | { | |
2048 | /* ...normal PC-relative relocation.... */ | |
2049 | ||
2050 | /* Determine which operand is being relocated. */ | |
2051 | opnd = get_relocation_opnd (opcode, howto->type); | |
2052 | if (opnd == XTENSA_UNDEFINED) | |
2053 | { | |
2054 | *error_message = "unexpected relocation"; | |
2055 | return bfd_reloc_dangerous; | |
2056 | } | |
2057 | ||
2058 | if (!howto->pc_relative) | |
2059 | { | |
2060 | *error_message = "expected PC-relative relocation"; | |
2061 | return bfd_reloc_dangerous; | |
2062 | } | |
e0001a05 | 2063 | |
43cd72b9 BW |
2064 | newval = relocation; |
2065 | } | |
2066 | } | |
e0001a05 | 2067 | |
43cd72b9 BW |
2068 | /* Apply the relocation. */ |
2069 | if (xtensa_operand_do_reloc (isa, opcode, opnd, &newval, self_address) | |
2070 | || xtensa_operand_encode (isa, opcode, opnd, &newval) | |
2071 | || xtensa_operand_set_field (isa, opcode, opnd, fmt, slot, | |
2072 | sbuff, newval)) | |
e0001a05 | 2073 | { |
2db662be BW |
2074 | const char *opname = xtensa_opcode_name (isa, opcode); |
2075 | const char *msg; | |
2076 | ||
2077 | msg = "cannot encode"; | |
2078 | if (is_direct_call_opcode (opcode)) | |
2079 | { | |
2080 | if ((relocation & 0x3) != 0) | |
2081 | msg = "misaligned call target"; | |
2082 | else | |
2083 | msg = "call target out of range"; | |
2084 | } | |
2085 | else if (opcode == get_l32r_opcode ()) | |
2086 | { | |
2087 | if ((relocation & 0x3) != 0) | |
2088 | msg = "misaligned literal target"; | |
2089 | else if (is_alt_relocation (howto->type)) | |
2090 | msg = "literal target out of range (too many literals)"; | |
2091 | else if (self_address > relocation) | |
2092 | msg = "literal target out of range (try using text-section-literals)"; | |
2093 | else | |
2094 | msg = "literal placed after use"; | |
2095 | } | |
2096 | ||
2097 | *error_message = vsprint_msg (opname, ": %s", strlen (msg) + 2, msg); | |
e0001a05 NC |
2098 | return bfd_reloc_dangerous; |
2099 | } | |
2100 | ||
43cd72b9 | 2101 | /* Check for calls across 1GB boundaries. */ |
e0001a05 NC |
2102 | if (is_direct_call_opcode (opcode) |
2103 | && is_windowed_call_opcode (opcode)) | |
2104 | { | |
43cd72b9 | 2105 | if ((self_address >> CALL_SEGMENT_BITS) |
68ffbac6 | 2106 | != (relocation >> CALL_SEGMENT_BITS)) |
e0001a05 | 2107 | { |
43cd72b9 BW |
2108 | *error_message = |
2109 | "windowed call crosses 1GB boundary; return may fail"; | |
e0001a05 NC |
2110 | return bfd_reloc_dangerous; |
2111 | } | |
2112 | } | |
2113 | ||
43cd72b9 BW |
2114 | /* Write the modified instruction back out of the buffer. */ |
2115 | xtensa_format_set_slot (isa, fmt, slot, ibuff, sbuff); | |
2116 | xtensa_insnbuf_to_chars (isa, ibuff, contents + address, | |
2117 | input_size - address); | |
e0001a05 NC |
2118 | return bfd_reloc_ok; |
2119 | } | |
2120 | ||
2121 | ||
2db662be | 2122 | static char * |
7fa3d080 | 2123 | vsprint_msg (const char *origmsg, const char *fmt, int arglen, ...) |
e0001a05 NC |
2124 | { |
2125 | /* To reduce the size of the memory leak, | |
2126 | we only use a single message buffer. */ | |
2127 | static bfd_size_type alloc_size = 0; | |
2128 | static char *message = NULL; | |
2129 | bfd_size_type orig_len, len = 0; | |
2130 | bfd_boolean is_append; | |
1651e569 | 2131 | va_list ap; |
e0001a05 | 2132 | |
1651e569 | 2133 | va_start (ap, arglen); |
68ffbac6 L |
2134 | |
2135 | is_append = (origmsg == message); | |
e0001a05 NC |
2136 | |
2137 | orig_len = strlen (origmsg); | |
2138 | len = orig_len + strlen (fmt) + arglen + 20; | |
2139 | if (len > alloc_size) | |
2140 | { | |
515ef31d | 2141 | message = (char *) bfd_realloc_or_free (message, len); |
e0001a05 NC |
2142 | alloc_size = len; |
2143 | } | |
515ef31d NC |
2144 | if (message != NULL) |
2145 | { | |
2146 | if (!is_append) | |
2147 | memcpy (message, origmsg, orig_len); | |
2148 | vsprintf (message + orig_len, fmt, ap); | |
2149 | } | |
1651e569 | 2150 | va_end (ap); |
e0001a05 NC |
2151 | return message; |
2152 | } | |
2153 | ||
2154 | ||
e0001a05 NC |
2155 | /* This function is registered as the "special_function" in the |
2156 | Xtensa howto for handling simplify operations. | |
2157 | bfd_perform_relocation / bfd_install_relocation use it to | |
2158 | perform (install) the specified relocation. Since this replaces the code | |
2159 | in bfd_perform_relocation, it is basically an Xtensa-specific, | |
2160 | stripped-down version of bfd_perform_relocation. */ | |
2161 | ||
2162 | static bfd_reloc_status_type | |
7fa3d080 BW |
2163 | bfd_elf_xtensa_reloc (bfd *abfd, |
2164 | arelent *reloc_entry, | |
2165 | asymbol *symbol, | |
2166 | void *data, | |
2167 | asection *input_section, | |
2168 | bfd *output_bfd, | |
2169 | char **error_message) | |
e0001a05 NC |
2170 | { |
2171 | bfd_vma relocation; | |
2172 | bfd_reloc_status_type flag; | |
61826503 | 2173 | bfd_size_type octets = (reloc_entry->address |
bb294208 | 2174 | * OCTETS_PER_BYTE (abfd, input_section)); |
e0001a05 NC |
2175 | bfd_vma output_base = 0; |
2176 | reloc_howto_type *howto = reloc_entry->howto; | |
2177 | asection *reloc_target_output_section; | |
2178 | bfd_boolean is_weak_undef; | |
2179 | ||
dd1a320b BW |
2180 | if (!xtensa_default_isa) |
2181 | xtensa_default_isa = xtensa_isa_init (0, 0); | |
2182 | ||
1049f94e | 2183 | /* ELF relocs are against symbols. If we are producing relocatable |
e0001a05 NC |
2184 | output, and the reloc is against an external symbol, the resulting |
2185 | reloc will also be against the same symbol. In such a case, we | |
2186 | don't want to change anything about the way the reloc is handled, | |
2187 | since it will all be done at final link time. This test is similar | |
2188 | to what bfd_elf_generic_reloc does except that it lets relocs with | |
2189 | howto->partial_inplace go through even if the addend is non-zero. | |
2190 | (The real problem is that partial_inplace is set for XTENSA_32 | |
2191 | relocs to begin with, but that's a long story and there's little we | |
2192 | can do about it now....) */ | |
2193 | ||
7fa3d080 | 2194 | if (output_bfd && (symbol->flags & BSF_SECTION_SYM) == 0) |
e0001a05 NC |
2195 | { |
2196 | reloc_entry->address += input_section->output_offset; | |
2197 | return bfd_reloc_ok; | |
2198 | } | |
2199 | ||
2200 | /* Is the address of the relocation really within the section? */ | |
07515404 | 2201 | if (reloc_entry->address > bfd_get_section_limit (abfd, input_section)) |
e0001a05 NC |
2202 | return bfd_reloc_outofrange; |
2203 | ||
4cc11e76 | 2204 | /* Work out which section the relocation is targeted at and the |
e0001a05 NC |
2205 | initial relocation command value. */ |
2206 | ||
2207 | /* Get symbol value. (Common symbols are special.) */ | |
2208 | if (bfd_is_com_section (symbol->section)) | |
2209 | relocation = 0; | |
2210 | else | |
2211 | relocation = symbol->value; | |
2212 | ||
2213 | reloc_target_output_section = symbol->section->output_section; | |
2214 | ||
2215 | /* Convert input-section-relative symbol value to absolute. */ | |
2216 | if ((output_bfd && !howto->partial_inplace) | |
2217 | || reloc_target_output_section == NULL) | |
2218 | output_base = 0; | |
2219 | else | |
2220 | output_base = reloc_target_output_section->vma; | |
2221 | ||
2222 | relocation += output_base + symbol->section->output_offset; | |
2223 | ||
2224 | /* Add in supplied addend. */ | |
2225 | relocation += reloc_entry->addend; | |
2226 | ||
2227 | /* Here the variable relocation holds the final address of the | |
2228 | symbol we are relocating against, plus any addend. */ | |
2229 | if (output_bfd) | |
2230 | { | |
2231 | if (!howto->partial_inplace) | |
2232 | { | |
2233 | /* This is a partial relocation, and we want to apply the relocation | |
2234 | to the reloc entry rather than the raw data. Everything except | |
2235 | relocations against section symbols has already been handled | |
2236 | above. */ | |
43cd72b9 | 2237 | |
e0001a05 NC |
2238 | BFD_ASSERT (symbol->flags & BSF_SECTION_SYM); |
2239 | reloc_entry->addend = relocation; | |
2240 | reloc_entry->address += input_section->output_offset; | |
2241 | return bfd_reloc_ok; | |
2242 | } | |
2243 | else | |
2244 | { | |
2245 | reloc_entry->address += input_section->output_offset; | |
2246 | reloc_entry->addend = 0; | |
2247 | } | |
2248 | } | |
2249 | ||
2250 | is_weak_undef = (bfd_is_und_section (symbol->section) | |
2251 | && (symbol->flags & BSF_WEAK) != 0); | |
2252 | flag = elf_xtensa_do_reloc (howto, abfd, input_section, relocation, | |
2253 | (bfd_byte *) data, (bfd_vma) octets, | |
2254 | is_weak_undef, error_message); | |
2255 | ||
2256 | if (flag == bfd_reloc_dangerous) | |
2257 | { | |
2258 | /* Add the symbol name to the error message. */ | |
2259 | if (! *error_message) | |
2260 | *error_message = ""; | |
2261 | *error_message = vsprint_msg (*error_message, ": (%s + 0x%lx)", | |
2262 | strlen (symbol->name) + 17, | |
70961b9d AM |
2263 | symbol->name, |
2264 | (unsigned long) reloc_entry->addend); | |
e0001a05 NC |
2265 | } |
2266 | ||
2267 | return flag; | |
2268 | } | |
2269 | ||
7a77f1ac MF |
2270 | int xtensa_abi_choice (void) |
2271 | { | |
2272 | if (elf32xtensa_abi == XTHAL_ABI_UNDEFINED) | |
2273 | return XSHAL_ABI; | |
2274 | else | |
2275 | return elf32xtensa_abi; | |
2276 | } | |
e0001a05 NC |
2277 | |
2278 | /* Set up an entry in the procedure linkage table. */ | |
2279 | ||
2280 | static bfd_vma | |
f0e6fdb2 | 2281 | elf_xtensa_create_plt_entry (struct bfd_link_info *info, |
7fa3d080 BW |
2282 | bfd *output_bfd, |
2283 | unsigned reloc_index) | |
e0001a05 NC |
2284 | { |
2285 | asection *splt, *sgotplt; | |
2286 | bfd_vma plt_base, got_base; | |
92b3f008 | 2287 | bfd_vma code_offset, lit_offset, abi_offset; |
e0001a05 | 2288 | int chunk; |
7a77f1ac | 2289 | int abi = xtensa_abi_choice (); |
e0001a05 NC |
2290 | |
2291 | chunk = reloc_index / PLT_ENTRIES_PER_CHUNK; | |
f0e6fdb2 BW |
2292 | splt = elf_xtensa_get_plt_section (info, chunk); |
2293 | sgotplt = elf_xtensa_get_gotplt_section (info, chunk); | |
e0001a05 NC |
2294 | BFD_ASSERT (splt != NULL && sgotplt != NULL); |
2295 | ||
2296 | plt_base = splt->output_section->vma + splt->output_offset; | |
2297 | got_base = sgotplt->output_section->vma + sgotplt->output_offset; | |
2298 | ||
2299 | lit_offset = 8 + (reloc_index % PLT_ENTRIES_PER_CHUNK) * 4; | |
2300 | code_offset = (reloc_index % PLT_ENTRIES_PER_CHUNK) * PLT_ENTRY_SIZE; | |
2301 | ||
2302 | /* Fill in the literal entry. This is the offset of the dynamic | |
2303 | relocation entry. */ | |
2304 | bfd_put_32 (output_bfd, reloc_index * sizeof (Elf32_External_Rela), | |
2305 | sgotplt->contents + lit_offset); | |
2306 | ||
2307 | /* Fill in the entry in the procedure linkage table. */ | |
2308 | memcpy (splt->contents + code_offset, | |
2309 | (bfd_big_endian (output_bfd) | |
7a77f1ac MF |
2310 | ? elf_xtensa_be_plt_entry[abi != XTHAL_ABI_WINDOWED] |
2311 | : elf_xtensa_le_plt_entry[abi != XTHAL_ABI_WINDOWED]), | |
e0001a05 | 2312 | PLT_ENTRY_SIZE); |
7a77f1ac | 2313 | abi_offset = abi == XTHAL_ABI_WINDOWED ? 3 : 0; |
e0001a05 | 2314 | bfd_put_16 (output_bfd, l32r_offset (got_base + 0, |
92b3f008 MF |
2315 | plt_base + code_offset + abi_offset), |
2316 | splt->contents + code_offset + abi_offset + 1); | |
e0001a05 | 2317 | bfd_put_16 (output_bfd, l32r_offset (got_base + 4, |
92b3f008 MF |
2318 | plt_base + code_offset + abi_offset + 3), |
2319 | splt->contents + code_offset + abi_offset + 4); | |
e0001a05 | 2320 | bfd_put_16 (output_bfd, l32r_offset (got_base + lit_offset, |
92b3f008 MF |
2321 | plt_base + code_offset + abi_offset + 6), |
2322 | splt->contents + code_offset + abi_offset + 7); | |
e0001a05 NC |
2323 | |
2324 | return plt_base + code_offset; | |
2325 | } | |
2326 | ||
2327 | ||
28dbbc02 BW |
2328 | static bfd_boolean get_indirect_call_dest_reg (xtensa_opcode, unsigned *); |
2329 | ||
2330 | static bfd_boolean | |
2331 | replace_tls_insn (Elf_Internal_Rela *rel, | |
2332 | bfd *abfd, | |
2333 | asection *input_section, | |
2334 | bfd_byte *contents, | |
2335 | bfd_boolean is_ld_model, | |
2336 | char **error_message) | |
2337 | { | |
2338 | static xtensa_insnbuf ibuff = NULL; | |
2339 | static xtensa_insnbuf sbuff = NULL; | |
2340 | xtensa_isa isa = xtensa_default_isa; | |
2341 | xtensa_format fmt; | |
2342 | xtensa_opcode old_op, new_op; | |
2343 | bfd_size_type input_size; | |
2344 | int r_type; | |
2345 | unsigned dest_reg, src_reg; | |
2346 | ||
2347 | if (ibuff == NULL) | |
2348 | { | |
2349 | ibuff = xtensa_insnbuf_alloc (isa); | |
2350 | sbuff = xtensa_insnbuf_alloc (isa); | |
2351 | } | |
2352 | ||
2353 | input_size = bfd_get_section_limit (abfd, input_section); | |
2354 | ||
2355 | /* Read the instruction into a buffer and decode the opcode. */ | |
2356 | xtensa_insnbuf_from_chars (isa, ibuff, contents + rel->r_offset, | |
2357 | input_size - rel->r_offset); | |
2358 | fmt = xtensa_format_decode (isa, ibuff); | |
2359 | if (fmt == XTENSA_UNDEFINED) | |
2360 | { | |
2361 | *error_message = "cannot decode instruction format"; | |
2362 | return FALSE; | |
2363 | } | |
2364 | ||
2365 | BFD_ASSERT (xtensa_format_num_slots (isa, fmt) == 1); | |
2366 | xtensa_format_get_slot (isa, fmt, 0, ibuff, sbuff); | |
2367 | ||
2368 | old_op = xtensa_opcode_decode (isa, fmt, 0, sbuff); | |
2369 | if (old_op == XTENSA_UNDEFINED) | |
2370 | { | |
2371 | *error_message = "cannot decode instruction opcode"; | |
2372 | return FALSE; | |
2373 | } | |
2374 | ||
2375 | r_type = ELF32_R_TYPE (rel->r_info); | |
2376 | switch (r_type) | |
2377 | { | |
2378 | case R_XTENSA_TLS_FUNC: | |
2379 | case R_XTENSA_TLS_ARG: | |
2380 | if (old_op != get_l32r_opcode () | |
2381 | || xtensa_operand_get_field (isa, old_op, 0, fmt, 0, | |
2382 | sbuff, &dest_reg) != 0) | |
2383 | { | |
2384 | *error_message = "cannot extract L32R destination for TLS access"; | |
2385 | return FALSE; | |
2386 | } | |
2387 | break; | |
2388 | ||
2389 | case R_XTENSA_TLS_CALL: | |
2390 | if (! get_indirect_call_dest_reg (old_op, &dest_reg) | |
2391 | || xtensa_operand_get_field (isa, old_op, 0, fmt, 0, | |
2392 | sbuff, &src_reg) != 0) | |
2393 | { | |
2394 | *error_message = "cannot extract CALLXn operands for TLS access"; | |
2395 | return FALSE; | |
2396 | } | |
2397 | break; | |
2398 | ||
2399 | default: | |
2400 | abort (); | |
2401 | } | |
2402 | ||
2403 | if (is_ld_model) | |
2404 | { | |
2405 | switch (r_type) | |
2406 | { | |
2407 | case R_XTENSA_TLS_FUNC: | |
2408 | case R_XTENSA_TLS_ARG: | |
2409 | /* Change the instruction to a NOP (or "OR a1, a1, a1" for older | |
2410 | versions of Xtensa). */ | |
2411 | new_op = xtensa_opcode_lookup (isa, "nop"); | |
2412 | if (new_op == XTENSA_UNDEFINED) | |
2413 | { | |
2414 | new_op = xtensa_opcode_lookup (isa, "or"); | |
2415 | if (new_op == XTENSA_UNDEFINED | |
2416 | || xtensa_opcode_encode (isa, fmt, 0, sbuff, new_op) != 0 | |
2417 | || xtensa_operand_set_field (isa, new_op, 0, fmt, 0, | |
2418 | sbuff, 1) != 0 | |
2419 | || xtensa_operand_set_field (isa, new_op, 1, fmt, 0, | |
2420 | sbuff, 1) != 0 | |
2421 | || xtensa_operand_set_field (isa, new_op, 2, fmt, 0, | |
2422 | sbuff, 1) != 0) | |
2423 | { | |
2424 | *error_message = "cannot encode OR for TLS access"; | |
2425 | return FALSE; | |
2426 | } | |
2427 | } | |
2428 | else | |
2429 | { | |
2430 | if (xtensa_opcode_encode (isa, fmt, 0, sbuff, new_op) != 0) | |
2431 | { | |
2432 | *error_message = "cannot encode NOP for TLS access"; | |
2433 | return FALSE; | |
2434 | } | |
2435 | } | |
2436 | break; | |
2437 | ||
2438 | case R_XTENSA_TLS_CALL: | |
2439 | /* Read THREADPTR into the CALLX's return value register. */ | |
2440 | new_op = xtensa_opcode_lookup (isa, "rur.threadptr"); | |
2441 | if (new_op == XTENSA_UNDEFINED | |
2442 | || xtensa_opcode_encode (isa, fmt, 0, sbuff, new_op) != 0 | |
2443 | || xtensa_operand_set_field (isa, new_op, 0, fmt, 0, | |
2444 | sbuff, dest_reg + 2) != 0) | |
2445 | { | |
2446 | *error_message = "cannot encode RUR.THREADPTR for TLS access"; | |
2447 | return FALSE; | |
2448 | } | |
2449 | break; | |
2450 | } | |
2451 | } | |
2452 | else | |
2453 | { | |
2454 | switch (r_type) | |
2455 | { | |
2456 | case R_XTENSA_TLS_FUNC: | |
2457 | new_op = xtensa_opcode_lookup (isa, "rur.threadptr"); | |
2458 | if (new_op == XTENSA_UNDEFINED | |
2459 | || xtensa_opcode_encode (isa, fmt, 0, sbuff, new_op) != 0 | |
2460 | || xtensa_operand_set_field (isa, new_op, 0, fmt, 0, | |
2461 | sbuff, dest_reg) != 0) | |
2462 | { | |
2463 | *error_message = "cannot encode RUR.THREADPTR for TLS access"; | |
2464 | return FALSE; | |
2465 | } | |
2466 | break; | |
2467 | ||
2468 | case R_XTENSA_TLS_ARG: | |
2469 | /* Nothing to do. Keep the original L32R instruction. */ | |
2470 | return TRUE; | |
2471 | ||
2472 | case R_XTENSA_TLS_CALL: | |
2473 | /* Add the CALLX's src register (holding the THREADPTR value) | |
2474 | to the first argument register (holding the offset) and put | |
2475 | the result in the CALLX's return value register. */ | |
2476 | new_op = xtensa_opcode_lookup (isa, "add"); | |
2477 | if (new_op == XTENSA_UNDEFINED | |
2478 | || xtensa_opcode_encode (isa, fmt, 0, sbuff, new_op) != 0 | |
2479 | || xtensa_operand_set_field (isa, new_op, 0, fmt, 0, | |
2480 | sbuff, dest_reg + 2) != 0 | |
2481 | || xtensa_operand_set_field (isa, new_op, 1, fmt, 0, | |
2482 | sbuff, dest_reg + 2) != 0 | |
2483 | || xtensa_operand_set_field (isa, new_op, 2, fmt, 0, | |
2484 | sbuff, src_reg) != 0) | |
2485 | { | |
2486 | *error_message = "cannot encode ADD for TLS access"; | |
2487 | return FALSE; | |
2488 | } | |
2489 | break; | |
2490 | } | |
2491 | } | |
2492 | ||
2493 | xtensa_format_set_slot (isa, fmt, 0, ibuff, sbuff); | |
2494 | xtensa_insnbuf_to_chars (isa, ibuff, contents + rel->r_offset, | |
07d6d2b8 | 2495 | input_size - rel->r_offset); |
28dbbc02 BW |
2496 | |
2497 | return TRUE; | |
2498 | } | |
2499 | ||
2500 | ||
2501 | #define IS_XTENSA_TLS_RELOC(R_TYPE) \ | |
2502 | ((R_TYPE) == R_XTENSA_TLSDESC_FN \ | |
2503 | || (R_TYPE) == R_XTENSA_TLSDESC_ARG \ | |
2504 | || (R_TYPE) == R_XTENSA_TLS_DTPOFF \ | |
2505 | || (R_TYPE) == R_XTENSA_TLS_TPOFF \ | |
2506 | || (R_TYPE) == R_XTENSA_TLS_FUNC \ | |
2507 | || (R_TYPE) == R_XTENSA_TLS_ARG \ | |
2508 | || (R_TYPE) == R_XTENSA_TLS_CALL) | |
2509 | ||
e0001a05 | 2510 | /* Relocate an Xtensa ELF section. This is invoked by the linker for |
1049f94e | 2511 | both relocatable and final links. */ |
e0001a05 NC |
2512 | |
2513 | static bfd_boolean | |
7fa3d080 BW |
2514 | elf_xtensa_relocate_section (bfd *output_bfd, |
2515 | struct bfd_link_info *info, | |
2516 | bfd *input_bfd, | |
2517 | asection *input_section, | |
2518 | bfd_byte *contents, | |
2519 | Elf_Internal_Rela *relocs, | |
2520 | Elf_Internal_Sym *local_syms, | |
2521 | asection **local_sections) | |
e0001a05 | 2522 | { |
f0e6fdb2 | 2523 | struct elf_xtensa_link_hash_table *htab; |
e0001a05 NC |
2524 | Elf_Internal_Shdr *symtab_hdr; |
2525 | Elf_Internal_Rela *rel; | |
2526 | Elf_Internal_Rela *relend; | |
2527 | struct elf_link_hash_entry **sym_hashes; | |
88d65ad6 BW |
2528 | property_table_entry *lit_table = 0; |
2529 | int ltblsize = 0; | |
28dbbc02 | 2530 | char *local_got_tls_types; |
e0001a05 | 2531 | char *error_message = NULL; |
43cd72b9 | 2532 | bfd_size_type input_size; |
28dbbc02 | 2533 | int tls_type; |
e0001a05 | 2534 | |
43cd72b9 BW |
2535 | if (!xtensa_default_isa) |
2536 | xtensa_default_isa = xtensa_isa_init (0, 0); | |
e0001a05 | 2537 | |
7af5d5c4 AM |
2538 | if (!is_xtensa_elf (input_bfd)) |
2539 | { | |
2540 | bfd_set_error (bfd_error_wrong_format); | |
2541 | return FALSE; | |
2542 | } | |
28dbbc02 | 2543 | |
f0e6fdb2 | 2544 | htab = elf_xtensa_hash_table (info); |
4dfe6ac6 NC |
2545 | if (htab == NULL) |
2546 | return FALSE; | |
2547 | ||
e0001a05 NC |
2548 | symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; |
2549 | sym_hashes = elf_sym_hashes (input_bfd); | |
28dbbc02 | 2550 | local_got_tls_types = elf_xtensa_local_got_tls_type (input_bfd); |
e0001a05 | 2551 | |
88d65ad6 BW |
2552 | if (elf_hash_table (info)->dynamic_sections_created) |
2553 | { | |
2554 | ltblsize = xtensa_read_table_entries (input_bfd, input_section, | |
43cd72b9 BW |
2555 | &lit_table, XTENSA_LIT_SEC_NAME, |
2556 | TRUE); | |
88d65ad6 BW |
2557 | if (ltblsize < 0) |
2558 | return FALSE; | |
2559 | } | |
2560 | ||
43cd72b9 BW |
2561 | input_size = bfd_get_section_limit (input_bfd, input_section); |
2562 | ||
e0001a05 NC |
2563 | rel = relocs; |
2564 | relend = relocs + input_section->reloc_count; | |
2565 | for (; rel < relend; rel++) | |
2566 | { | |
2567 | int r_type; | |
2568 | reloc_howto_type *howto; | |
2569 | unsigned long r_symndx; | |
2570 | struct elf_link_hash_entry *h; | |
2571 | Elf_Internal_Sym *sym; | |
28dbbc02 BW |
2572 | char sym_type; |
2573 | const char *name; | |
e0001a05 NC |
2574 | asection *sec; |
2575 | bfd_vma relocation; | |
2576 | bfd_reloc_status_type r; | |
2577 | bfd_boolean is_weak_undef; | |
2578 | bfd_boolean unresolved_reloc; | |
9b8c98a4 | 2579 | bfd_boolean warned; |
28dbbc02 | 2580 | bfd_boolean dynamic_symbol; |
e0001a05 NC |
2581 | |
2582 | r_type = ELF32_R_TYPE (rel->r_info); | |
2583 | if (r_type == (int) R_XTENSA_GNU_VTINHERIT | |
2584 | || r_type == (int) R_XTENSA_GNU_VTENTRY) | |
2585 | continue; | |
2586 | ||
2587 | if (r_type < 0 || r_type >= (int) R_XTENSA_max) | |
2588 | { | |
2589 | bfd_set_error (bfd_error_bad_value); | |
2590 | return FALSE; | |
2591 | } | |
2592 | howto = &elf_howto_table[r_type]; | |
2593 | ||
2594 | r_symndx = ELF32_R_SYM (rel->r_info); | |
2595 | ||
ab96bf03 AM |
2596 | h = NULL; |
2597 | sym = NULL; | |
2598 | sec = NULL; | |
2599 | is_weak_undef = FALSE; | |
2600 | unresolved_reloc = FALSE; | |
2601 | warned = FALSE; | |
2602 | ||
0e1862bb | 2603 | if (howto->partial_inplace && !bfd_link_relocatable (info)) |
ab96bf03 AM |
2604 | { |
2605 | /* Because R_XTENSA_32 was made partial_inplace to fix some | |
2606 | problems with DWARF info in partial links, there may be | |
2607 | an addend stored in the contents. Take it out of there | |
2608 | and move it back into the addend field of the reloc. */ | |
2609 | rel->r_addend += bfd_get_32 (input_bfd, contents + rel->r_offset); | |
2610 | bfd_put_32 (input_bfd, 0, contents + rel->r_offset); | |
2611 | } | |
2612 | ||
2613 | if (r_symndx < symtab_hdr->sh_info) | |
2614 | { | |
2615 | sym = local_syms + r_symndx; | |
28dbbc02 | 2616 | sym_type = ELF32_ST_TYPE (sym->st_info); |
ab96bf03 AM |
2617 | sec = local_sections[r_symndx]; |
2618 | relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel); | |
2619 | } | |
2620 | else | |
2621 | { | |
62d887d4 L |
2622 | bfd_boolean ignored; |
2623 | ||
ab96bf03 AM |
2624 | RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, |
2625 | r_symndx, symtab_hdr, sym_hashes, | |
2626 | h, sec, relocation, | |
62d887d4 | 2627 | unresolved_reloc, warned, ignored); |
ab96bf03 AM |
2628 | |
2629 | if (relocation == 0 | |
2630 | && !unresolved_reloc | |
2631 | && h->root.type == bfd_link_hash_undefweak) | |
2632 | is_weak_undef = TRUE; | |
28dbbc02 BW |
2633 | |
2634 | sym_type = h->type; | |
ab96bf03 AM |
2635 | } |
2636 | ||
dbaa2011 | 2637 | if (sec != NULL && discarded_section (sec)) |
e4067dbb | 2638 | RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, |
545fd46b | 2639 | rel, 1, relend, howto, 0, contents); |
ab96bf03 | 2640 | |
0e1862bb | 2641 | if (bfd_link_relocatable (info)) |
e0001a05 | 2642 | { |
7aa09196 SA |
2643 | bfd_vma dest_addr; |
2644 | asection * sym_sec = get_elf_r_symndx_section (input_bfd, r_symndx); | |
2645 | ||
43cd72b9 | 2646 | /* This is a relocatable link. |
e0001a05 NC |
2647 | 1) If the reloc is against a section symbol, adjust |
2648 | according to the output section. | |
2649 | 2) If there is a new target for this relocation, | |
2650 | the new target will be in the same output section. | |
2651 | We adjust the relocation by the output section | |
2652 | difference. */ | |
2653 | ||
2654 | if (relaxing_section) | |
2655 | { | |
2656 | /* Check if this references a section in another input file. */ | |
43cd72b9 BW |
2657 | if (!do_fix_for_relocatable_link (rel, input_bfd, input_section, |
2658 | contents)) | |
2659 | return FALSE; | |
e0001a05 NC |
2660 | } |
2661 | ||
7aa09196 SA |
2662 | dest_addr = sym_sec->output_section->vma + sym_sec->output_offset |
2663 | + get_elf_r_symndx_offset (input_bfd, r_symndx) + rel->r_addend; | |
2664 | ||
43cd72b9 | 2665 | if (r_type == R_XTENSA_ASM_SIMPLIFY) |
e0001a05 | 2666 | { |
91d6fa6a | 2667 | error_message = NULL; |
e0001a05 NC |
2668 | /* Convert ASM_SIMPLIFY into the simpler relocation |
2669 | so that they never escape a relaxing link. */ | |
43cd72b9 BW |
2670 | r = contract_asm_expansion (contents, input_size, rel, |
2671 | &error_message); | |
2672 | if (r != bfd_reloc_ok) | |
1a72702b AM |
2673 | (*info->callbacks->reloc_dangerous) |
2674 | (info, error_message, | |
2675 | input_bfd, input_section, rel->r_offset); | |
2676 | ||
e0001a05 NC |
2677 | r_type = ELF32_R_TYPE (rel->r_info); |
2678 | } | |
2679 | ||
1049f94e | 2680 | /* This is a relocatable link, so we don't have to change |
e0001a05 NC |
2681 | anything unless the reloc is against a section symbol, |
2682 | in which case we have to adjust according to where the | |
2683 | section symbol winds up in the output section. */ | |
2684 | if (r_symndx < symtab_hdr->sh_info) | |
2685 | { | |
2686 | sym = local_syms + r_symndx; | |
2687 | if (ELF_ST_TYPE (sym->st_info) == STT_SECTION) | |
2688 | { | |
2689 | sec = local_sections[r_symndx]; | |
2690 | rel->r_addend += sec->output_offset + sym->st_value; | |
2691 | } | |
2692 | } | |
2693 | ||
2694 | /* If there is an addend with a partial_inplace howto, | |
2695 | then move the addend to the contents. This is a hack | |
1049f94e | 2696 | to work around problems with DWARF in relocatable links |
e0001a05 NC |
2697 | with some previous version of BFD. Now we can't easily get |
2698 | rid of the hack without breaking backward compatibility.... */ | |
7aa09196 SA |
2699 | r = bfd_reloc_ok; |
2700 | howto = &elf_howto_table[r_type]; | |
2701 | if (howto->partial_inplace && rel->r_addend) | |
2702 | { | |
2703 | r = elf_xtensa_do_reloc (howto, input_bfd, input_section, | |
2704 | rel->r_addend, contents, | |
2705 | rel->r_offset, FALSE, | |
2706 | &error_message); | |
2707 | rel->r_addend = 0; | |
2708 | } | |
2709 | else | |
e0001a05 | 2710 | { |
7aa09196 SA |
2711 | /* Put the correct bits in the target instruction, even |
2712 | though the relocation will still be present in the output | |
2713 | file. This makes disassembly clearer, as well as | |
2714 | allowing loadable kernel modules to work without needing | |
2715 | relocations on anything other than calls and l32r's. */ | |
2716 | ||
2717 | /* If it is not in the same section, there is nothing we can do. */ | |
2718 | if (r_type >= R_XTENSA_SLOT0_OP && r_type <= R_XTENSA_SLOT14_OP && | |
2719 | sym_sec->output_section == input_section->output_section) | |
e0001a05 NC |
2720 | { |
2721 | r = elf_xtensa_do_reloc (howto, input_bfd, input_section, | |
7aa09196 | 2722 | dest_addr, contents, |
e0001a05 NC |
2723 | rel->r_offset, FALSE, |
2724 | &error_message); | |
e0001a05 NC |
2725 | } |
2726 | } | |
7aa09196 | 2727 | if (r != bfd_reloc_ok) |
1a72702b AM |
2728 | (*info->callbacks->reloc_dangerous) |
2729 | (info, error_message, | |
2730 | input_bfd, input_section, rel->r_offset); | |
e0001a05 | 2731 | |
1049f94e | 2732 | /* Done with work for relocatable link; continue with next reloc. */ |
e0001a05 NC |
2733 | continue; |
2734 | } | |
2735 | ||
2736 | /* This is a final link. */ | |
2737 | ||
e0001a05 NC |
2738 | if (relaxing_section) |
2739 | { | |
2740 | /* Check if this references a section in another input file. */ | |
43cd72b9 BW |
2741 | do_fix_for_final_link (rel, input_bfd, input_section, contents, |
2742 | &relocation); | |
e0001a05 NC |
2743 | } |
2744 | ||
2745 | /* Sanity check the address. */ | |
43cd72b9 | 2746 | if (rel->r_offset >= input_size |
e0001a05 NC |
2747 | && ELF32_R_TYPE (rel->r_info) != R_XTENSA_NONE) |
2748 | { | |
4eca0228 | 2749 | _bfd_error_handler |
695344c0 | 2750 | /* xgettext:c-format */ |
2dcf00ce AM |
2751 | (_("%pB(%pA+%#" PRIx64 "): " |
2752 | "relocation offset out of range (size=%#" PRIx64 ")"), | |
2753 | input_bfd, input_section, (uint64_t) rel->r_offset, | |
2754 | (uint64_t) input_size); | |
e0001a05 NC |
2755 | bfd_set_error (bfd_error_bad_value); |
2756 | return FALSE; | |
2757 | } | |
2758 | ||
28dbbc02 BW |
2759 | if (h != NULL) |
2760 | name = h->root.root.string; | |
2761 | else | |
e0001a05 | 2762 | { |
28dbbc02 BW |
2763 | name = (bfd_elf_string_from_elf_section |
2764 | (input_bfd, symtab_hdr->sh_link, sym->st_name)); | |
2765 | if (name == NULL || *name == '\0') | |
fd361982 | 2766 | name = bfd_section_name (sec); |
28dbbc02 | 2767 | } |
e0001a05 | 2768 | |
cf35638d | 2769 | if (r_symndx != STN_UNDEF |
28dbbc02 BW |
2770 | && r_type != R_XTENSA_NONE |
2771 | && (h == NULL | |
2772 | || h->root.type == bfd_link_hash_defined | |
2773 | || h->root.type == bfd_link_hash_defweak) | |
2774 | && IS_XTENSA_TLS_RELOC (r_type) != (sym_type == STT_TLS)) | |
2775 | { | |
4eca0228 | 2776 | _bfd_error_handler |
28dbbc02 | 2777 | ((sym_type == STT_TLS |
695344c0 | 2778 | /* xgettext:c-format */ |
2dcf00ce | 2779 | ? _("%pB(%pA+%#" PRIx64 "): %s used with TLS symbol %s") |
695344c0 | 2780 | /* xgettext:c-format */ |
2dcf00ce | 2781 | : _("%pB(%pA+%#" PRIx64 "): %s used with non-TLS symbol %s")), |
28dbbc02 BW |
2782 | input_bfd, |
2783 | input_section, | |
2dcf00ce | 2784 | (uint64_t) rel->r_offset, |
28dbbc02 BW |
2785 | howto->name, |
2786 | name); | |
2787 | } | |
2788 | ||
2789 | dynamic_symbol = elf_xtensa_dynamic_symbol_p (h, info); | |
2790 | ||
2791 | tls_type = GOT_UNKNOWN; | |
2792 | if (h) | |
2793 | tls_type = elf_xtensa_hash_entry (h)->tls_type; | |
2794 | else if (local_got_tls_types) | |
2795 | tls_type = local_got_tls_types [r_symndx]; | |
2796 | ||
2797 | switch (r_type) | |
2798 | { | |
2799 | case R_XTENSA_32: | |
2800 | case R_XTENSA_PLT: | |
2801 | if (elf_hash_table (info)->dynamic_sections_created | |
2802 | && (input_section->flags & SEC_ALLOC) != 0 | |
0e1862bb | 2803 | && (dynamic_symbol || bfd_link_pic (info))) |
e0001a05 NC |
2804 | { |
2805 | Elf_Internal_Rela outrel; | |
2806 | bfd_byte *loc; | |
2807 | asection *srel; | |
2808 | ||
2809 | if (dynamic_symbol && r_type == R_XTENSA_PLT) | |
ce558b89 | 2810 | srel = htab->elf.srelplt; |
e0001a05 | 2811 | else |
ce558b89 | 2812 | srel = htab->elf.srelgot; |
e0001a05 NC |
2813 | |
2814 | BFD_ASSERT (srel != NULL); | |
2815 | ||
2816 | outrel.r_offset = | |
2817 | _bfd_elf_section_offset (output_bfd, info, | |
2818 | input_section, rel->r_offset); | |
2819 | ||
2820 | if ((outrel.r_offset | 1) == (bfd_vma) -1) | |
2821 | memset (&outrel, 0, sizeof outrel); | |
2822 | else | |
2823 | { | |
f0578e28 BW |
2824 | outrel.r_offset += (input_section->output_section->vma |
2825 | + input_section->output_offset); | |
e0001a05 | 2826 | |
88d65ad6 BW |
2827 | /* Complain if the relocation is in a read-only section |
2828 | and not in a literal pool. */ | |
2829 | if ((input_section->flags & SEC_READONLY) != 0 | |
2830 | && !elf_xtensa_in_literal_pool (lit_table, ltblsize, | |
3ba3bc8c | 2831 | outrel.r_offset)) |
88d65ad6 BW |
2832 | { |
2833 | error_message = | |
2834 | _("dynamic relocation in read-only section"); | |
1a72702b AM |
2835 | (*info->callbacks->reloc_dangerous) |
2836 | (info, error_message, | |
2837 | input_bfd, input_section, rel->r_offset); | |
88d65ad6 BW |
2838 | } |
2839 | ||
e0001a05 NC |
2840 | if (dynamic_symbol) |
2841 | { | |
2842 | outrel.r_addend = rel->r_addend; | |
2843 | rel->r_addend = 0; | |
2844 | ||
2845 | if (r_type == R_XTENSA_32) | |
2846 | { | |
2847 | outrel.r_info = | |
2848 | ELF32_R_INFO (h->dynindx, R_XTENSA_GLOB_DAT); | |
2849 | relocation = 0; | |
2850 | } | |
2851 | else /* r_type == R_XTENSA_PLT */ | |
2852 | { | |
2853 | outrel.r_info = | |
2854 | ELF32_R_INFO (h->dynindx, R_XTENSA_JMP_SLOT); | |
2855 | ||
2856 | /* Create the PLT entry and set the initial | |
2857 | contents of the literal entry to the address of | |
2858 | the PLT entry. */ | |
43cd72b9 | 2859 | relocation = |
f0e6fdb2 | 2860 | elf_xtensa_create_plt_entry (info, output_bfd, |
e0001a05 NC |
2861 | srel->reloc_count); |
2862 | } | |
2863 | unresolved_reloc = FALSE; | |
2864 | } | |
c451bb34 | 2865 | else if (!is_weak_undef) |
e0001a05 NC |
2866 | { |
2867 | /* Generate a RELATIVE relocation. */ | |
2868 | outrel.r_info = ELF32_R_INFO (0, R_XTENSA_RELATIVE); | |
2869 | outrel.r_addend = 0; | |
2870 | } | |
c451bb34 MF |
2871 | else |
2872 | { | |
2873 | continue; | |
2874 | } | |
e0001a05 NC |
2875 | } |
2876 | ||
2877 | loc = (srel->contents | |
2878 | + srel->reloc_count++ * sizeof (Elf32_External_Rela)); | |
2879 | bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc); | |
2880 | BFD_ASSERT (sizeof (Elf32_External_Rela) * srel->reloc_count | |
eea6121a | 2881 | <= srel->size); |
e0001a05 | 2882 | } |
d9ab3f29 BW |
2883 | else if (r_type == R_XTENSA_ASM_EXPAND && dynamic_symbol) |
2884 | { | |
2885 | /* This should only happen for non-PIC code, which is not | |
2886 | supposed to be used on systems with dynamic linking. | |
2887 | Just ignore these relocations. */ | |
2888 | continue; | |
2889 | } | |
28dbbc02 BW |
2890 | break; |
2891 | ||
2892 | case R_XTENSA_TLS_TPOFF: | |
2893 | /* Switch to LE model for local symbols in an executable. */ | |
0e1862bb | 2894 | if (! bfd_link_pic (info) && ! dynamic_symbol) |
28dbbc02 BW |
2895 | { |
2896 | relocation = tpoff (info, relocation); | |
2897 | break; | |
2898 | } | |
2899 | /* fall through */ | |
2900 | ||
2901 | case R_XTENSA_TLSDESC_FN: | |
2902 | case R_XTENSA_TLSDESC_ARG: | |
2903 | { | |
2904 | if (r_type == R_XTENSA_TLSDESC_FN) | |
2905 | { | |
0e1862bb | 2906 | if (! bfd_link_pic (info) || (tls_type & GOT_TLS_IE) != 0) |
28dbbc02 BW |
2907 | r_type = R_XTENSA_NONE; |
2908 | } | |
2909 | else if (r_type == R_XTENSA_TLSDESC_ARG) | |
2910 | { | |
0e1862bb | 2911 | if (bfd_link_pic (info)) |
28dbbc02 BW |
2912 | { |
2913 | if ((tls_type & GOT_TLS_IE) != 0) | |
2914 | r_type = R_XTENSA_TLS_TPOFF; | |
2915 | } | |
2916 | else | |
2917 | { | |
2918 | r_type = R_XTENSA_TLS_TPOFF; | |
2919 | if (! dynamic_symbol) | |
2920 | { | |
2921 | relocation = tpoff (info, relocation); | |
2922 | break; | |
2923 | } | |
2924 | } | |
2925 | } | |
2926 | ||
2927 | if (r_type == R_XTENSA_NONE) | |
2928 | /* Nothing to do here; skip to the next reloc. */ | |
2929 | continue; | |
2930 | ||
2931 | if (! elf_hash_table (info)->dynamic_sections_created) | |
2932 | { | |
2933 | error_message = | |
2934 | _("TLS relocation invalid without dynamic sections"); | |
1a72702b AM |
2935 | (*info->callbacks->reloc_dangerous) |
2936 | (info, error_message, | |
2937 | input_bfd, input_section, rel->r_offset); | |
28dbbc02 BW |
2938 | } |
2939 | else | |
2940 | { | |
2941 | Elf_Internal_Rela outrel; | |
2942 | bfd_byte *loc; | |
ce558b89 | 2943 | asection *srel = htab->elf.srelgot; |
28dbbc02 BW |
2944 | int indx; |
2945 | ||
2946 | outrel.r_offset = (input_section->output_section->vma | |
2947 | + input_section->output_offset | |
2948 | + rel->r_offset); | |
2949 | ||
2950 | /* Complain if the relocation is in a read-only section | |
2951 | and not in a literal pool. */ | |
2952 | if ((input_section->flags & SEC_READONLY) != 0 | |
2953 | && ! elf_xtensa_in_literal_pool (lit_table, ltblsize, | |
2954 | outrel.r_offset)) | |
2955 | { | |
2956 | error_message = | |
2957 | _("dynamic relocation in read-only section"); | |
1a72702b AM |
2958 | (*info->callbacks->reloc_dangerous) |
2959 | (info, error_message, | |
2960 | input_bfd, input_section, rel->r_offset); | |
28dbbc02 BW |
2961 | } |
2962 | ||
2963 | indx = h && h->dynindx != -1 ? h->dynindx : 0; | |
2964 | if (indx == 0) | |
2965 | outrel.r_addend = relocation - dtpoff_base (info); | |
2966 | else | |
2967 | outrel.r_addend = 0; | |
2968 | rel->r_addend = 0; | |
2969 | ||
2970 | outrel.r_info = ELF32_R_INFO (indx, r_type); | |
2971 | relocation = 0; | |
2972 | unresolved_reloc = FALSE; | |
2973 | ||
2974 | BFD_ASSERT (srel); | |
2975 | loc = (srel->contents | |
2976 | + srel->reloc_count++ * sizeof (Elf32_External_Rela)); | |
2977 | bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc); | |
2978 | BFD_ASSERT (sizeof (Elf32_External_Rela) * srel->reloc_count | |
2979 | <= srel->size); | |
2980 | } | |
2981 | } | |
2982 | break; | |
2983 | ||
2984 | case R_XTENSA_TLS_DTPOFF: | |
0e1862bb | 2985 | if (! bfd_link_pic (info)) |
28dbbc02 BW |
2986 | /* Switch from LD model to LE model. */ |
2987 | relocation = tpoff (info, relocation); | |
2988 | else | |
2989 | relocation -= dtpoff_base (info); | |
2990 | break; | |
2991 | ||
2992 | case R_XTENSA_TLS_FUNC: | |
2993 | case R_XTENSA_TLS_ARG: | |
2994 | case R_XTENSA_TLS_CALL: | |
2995 | /* Check if optimizing to IE or LE model. */ | |
2996 | if ((tls_type & GOT_TLS_IE) != 0) | |
2997 | { | |
2998 | bfd_boolean is_ld_model = | |
2999 | (h && elf_xtensa_hash_entry (h) == htab->tlsbase); | |
3000 | if (! replace_tls_insn (rel, input_bfd, input_section, contents, | |
3001 | is_ld_model, &error_message)) | |
1a72702b AM |
3002 | (*info->callbacks->reloc_dangerous) |
3003 | (info, error_message, | |
3004 | input_bfd, input_section, rel->r_offset); | |
28dbbc02 BW |
3005 | |
3006 | if (r_type != R_XTENSA_TLS_ARG || is_ld_model) | |
3007 | { | |
3008 | /* Skip subsequent relocations on the same instruction. */ | |
3009 | while (rel + 1 < relend && rel[1].r_offset == rel->r_offset) | |
3010 | rel++; | |
3011 | } | |
3012 | } | |
3013 | continue; | |
3014 | ||
3015 | default: | |
3016 | if (elf_hash_table (info)->dynamic_sections_created | |
3017 | && dynamic_symbol && (is_operand_relocation (r_type) | |
3018 | || r_type == R_XTENSA_32_PCREL)) | |
3019 | { | |
3020 | error_message = | |
3021 | vsprint_msg ("invalid relocation for dynamic symbol", ": %s", | |
3022 | strlen (name) + 2, name); | |
1a72702b AM |
3023 | (*info->callbacks->reloc_dangerous) |
3024 | (info, error_message, input_bfd, input_section, rel->r_offset); | |
28dbbc02 BW |
3025 | continue; |
3026 | } | |
3027 | break; | |
e0001a05 NC |
3028 | } |
3029 | ||
3030 | /* Dynamic relocs are not propagated for SEC_DEBUGGING sections | |
3031 | because such sections are not SEC_ALLOC and thus ld.so will | |
3032 | not process them. */ | |
3033 | if (unresolved_reloc | |
3034 | && !((input_section->flags & SEC_DEBUGGING) != 0 | |
1d5316ab AM |
3035 | && h->def_dynamic) |
3036 | && _bfd_elf_section_offset (output_bfd, info, input_section, | |
3037 | rel->r_offset) != (bfd_vma) -1) | |
bf1747de | 3038 | { |
4eca0228 | 3039 | _bfd_error_handler |
695344c0 | 3040 | /* xgettext:c-format */ |
2dcf00ce AM |
3041 | (_("%pB(%pA+%#" PRIx64 "): " |
3042 | "unresolvable %s relocation against symbol `%s'"), | |
bf1747de BW |
3043 | input_bfd, |
3044 | input_section, | |
2dcf00ce | 3045 | (uint64_t) rel->r_offset, |
bf1747de | 3046 | howto->name, |
28dbbc02 | 3047 | name); |
bf1747de BW |
3048 | return FALSE; |
3049 | } | |
e0001a05 | 3050 | |
28dbbc02 BW |
3051 | /* TLS optimizations may have changed r_type; update "howto". */ |
3052 | howto = &elf_howto_table[r_type]; | |
3053 | ||
e0001a05 NC |
3054 | /* There's no point in calling bfd_perform_relocation here. |
3055 | Just go directly to our "special function". */ | |
3056 | r = elf_xtensa_do_reloc (howto, input_bfd, input_section, | |
3057 | relocation + rel->r_addend, | |
3058 | contents, rel->r_offset, is_weak_undef, | |
3059 | &error_message); | |
43cd72b9 | 3060 | |
9b8c98a4 | 3061 | if (r != bfd_reloc_ok && !warned) |
e0001a05 | 3062 | { |
43cd72b9 | 3063 | BFD_ASSERT (r == bfd_reloc_dangerous || r == bfd_reloc_other); |
7fa3d080 | 3064 | BFD_ASSERT (error_message != NULL); |
e0001a05 | 3065 | |
28dbbc02 BW |
3066 | if (rel->r_addend == 0) |
3067 | error_message = vsprint_msg (error_message, ": %s", | |
3068 | strlen (name) + 2, name); | |
e0001a05 | 3069 | else |
28dbbc02 BW |
3070 | error_message = vsprint_msg (error_message, ": (%s+0x%x)", |
3071 | strlen (name) + 22, | |
3072 | name, (int) rel->r_addend); | |
43cd72b9 | 3073 | |
1a72702b AM |
3074 | (*info->callbacks->reloc_dangerous) |
3075 | (info, error_message, input_bfd, input_section, rel->r_offset); | |
e0001a05 NC |
3076 | } |
3077 | } | |
3078 | ||
c9594989 | 3079 | free (lit_table); |
3ba3bc8c BW |
3080 | input_section->reloc_done = TRUE; |
3081 | ||
e0001a05 NC |
3082 | return TRUE; |
3083 | } | |
3084 | ||
3085 | ||
3086 | /* Finish up dynamic symbol handling. There's not much to do here since | |
3087 | the PLT and GOT entries are all set up by relocate_section. */ | |
3088 | ||
3089 | static bfd_boolean | |
7fa3d080 BW |
3090 | elf_xtensa_finish_dynamic_symbol (bfd *output_bfd ATTRIBUTE_UNUSED, |
3091 | struct bfd_link_info *info ATTRIBUTE_UNUSED, | |
3092 | struct elf_link_hash_entry *h, | |
3093 | Elf_Internal_Sym *sym) | |
e0001a05 | 3094 | { |
bf1747de | 3095 | if (h->needs_plt && !h->def_regular) |
e0001a05 NC |
3096 | { |
3097 | /* Mark the symbol as undefined, rather than as defined in | |
3098 | the .plt section. Leave the value alone. */ | |
3099 | sym->st_shndx = SHN_UNDEF; | |
bf1747de BW |
3100 | /* If the symbol is weak, we do need to clear the value. |
3101 | Otherwise, the PLT entry would provide a definition for | |
3102 | the symbol even if the symbol wasn't defined anywhere, | |
3103 | and so the symbol would never be NULL. */ | |
3104 | if (!h->ref_regular_nonweak) | |
3105 | sym->st_value = 0; | |
e0001a05 NC |
3106 | } |
3107 | ||
3108 | /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */ | |
9637f6ef | 3109 | if (h == elf_hash_table (info)->hdynamic |
22edb2f1 | 3110 | || h == elf_hash_table (info)->hgot) |
e0001a05 NC |
3111 | sym->st_shndx = SHN_ABS; |
3112 | ||
3113 | return TRUE; | |
3114 | } | |
3115 | ||
3116 | ||
3117 | /* Combine adjacent literal table entries in the output. Adjacent | |
3118 | entries within each input section may have been removed during | |
3119 | relaxation, but we repeat the process here, even though it's too late | |
3120 | to shrink the output section, because it's important to minimize the | |
3121 | number of literal table entries to reduce the start-up work for the | |
3122 | runtime linker. Returns the number of remaining table entries or -1 | |
3123 | on error. */ | |
3124 | ||
3125 | static int | |
7fa3d080 BW |
3126 | elf_xtensa_combine_prop_entries (bfd *output_bfd, |
3127 | asection *sxtlit, | |
3128 | asection *sgotloc) | |
e0001a05 | 3129 | { |
e0001a05 NC |
3130 | bfd_byte *contents; |
3131 | property_table_entry *table; | |
e901de89 | 3132 | bfd_size_type section_size, sgotloc_size; |
e0001a05 NC |
3133 | bfd_vma offset; |
3134 | int n, m, num; | |
3135 | ||
eea6121a | 3136 | section_size = sxtlit->size; |
e0001a05 NC |
3137 | BFD_ASSERT (section_size % 8 == 0); |
3138 | num = section_size / 8; | |
3139 | ||
eea6121a | 3140 | sgotloc_size = sgotloc->size; |
e901de89 | 3141 | if (sgotloc_size != section_size) |
b536dc1e | 3142 | { |
4eca0228 | 3143 | _bfd_error_handler |
43cd72b9 | 3144 | (_("internal inconsistency in size of .got.loc section")); |
b536dc1e BW |
3145 | return -1; |
3146 | } | |
e901de89 | 3147 | |
eea6121a AM |
3148 | table = bfd_malloc (num * sizeof (property_table_entry)); |
3149 | if (table == 0) | |
e0001a05 NC |
3150 | return -1; |
3151 | ||
3152 | /* The ".xt.lit.plt" section has the SEC_IN_MEMORY flag set and this | |
3153 | propagates to the output section, where it doesn't really apply and | |
eea6121a | 3154 | where it breaks the following call to bfd_malloc_and_get_section. */ |
e901de89 | 3155 | sxtlit->flags &= ~SEC_IN_MEMORY; |
e0001a05 | 3156 | |
eea6121a AM |
3157 | if (!bfd_malloc_and_get_section (output_bfd, sxtlit, &contents)) |
3158 | { | |
c9594989 | 3159 | free (contents); |
eea6121a AM |
3160 | free (table); |
3161 | return -1; | |
3162 | } | |
e0001a05 NC |
3163 | |
3164 | /* There should never be any relocations left at this point, so this | |
3165 | is quite a bit easier than what is done during relaxation. */ | |
3166 | ||
3167 | /* Copy the raw contents into a property table array and sort it. */ | |
3168 | offset = 0; | |
3169 | for (n = 0; n < num; n++) | |
3170 | { | |
3171 | table[n].address = bfd_get_32 (output_bfd, &contents[offset]); | |
3172 | table[n].size = bfd_get_32 (output_bfd, &contents[offset + 4]); | |
3173 | offset += 8; | |
3174 | } | |
3175 | qsort (table, num, sizeof (property_table_entry), property_table_compare); | |
3176 | ||
3177 | for (n = 0; n < num; n++) | |
3178 | { | |
91d6fa6a | 3179 | bfd_boolean remove_entry = FALSE; |
e0001a05 NC |
3180 | |
3181 | if (table[n].size == 0) | |
91d6fa6a NC |
3182 | remove_entry = TRUE; |
3183 | else if (n > 0 | |
3184 | && (table[n-1].address + table[n-1].size == table[n].address)) | |
e0001a05 NC |
3185 | { |
3186 | table[n-1].size += table[n].size; | |
91d6fa6a | 3187 | remove_entry = TRUE; |
e0001a05 NC |
3188 | } |
3189 | ||
91d6fa6a | 3190 | if (remove_entry) |
e0001a05 NC |
3191 | { |
3192 | for (m = n; m < num - 1; m++) | |
3193 | { | |
3194 | table[m].address = table[m+1].address; | |
3195 | table[m].size = table[m+1].size; | |
3196 | } | |
3197 | ||
3198 | n--; | |
3199 | num--; | |
3200 | } | |
3201 | } | |
3202 | ||
3203 | /* Copy the data back to the raw contents. */ | |
3204 | offset = 0; | |
3205 | for (n = 0; n < num; n++) | |
3206 | { | |
3207 | bfd_put_32 (output_bfd, table[n].address, &contents[offset]); | |
3208 | bfd_put_32 (output_bfd, table[n].size, &contents[offset + 4]); | |
3209 | offset += 8; | |
3210 | } | |
3211 | ||
3212 | /* Clear the removed bytes. */ | |
3213 | if ((bfd_size_type) (num * 8) < section_size) | |
b54d4b07 | 3214 | memset (&contents[num * 8], 0, section_size - num * 8); |
e0001a05 | 3215 | |
e901de89 BW |
3216 | if (! bfd_set_section_contents (output_bfd, sxtlit, contents, 0, |
3217 | section_size)) | |
e0001a05 NC |
3218 | return -1; |
3219 | ||
e901de89 BW |
3220 | /* Copy the contents to ".got.loc". */ |
3221 | memcpy (sgotloc->contents, contents, section_size); | |
3222 | ||
e0001a05 | 3223 | free (contents); |
b614a702 | 3224 | free (table); |
e0001a05 NC |
3225 | return num; |
3226 | } | |
3227 | ||
3228 | ||
3229 | /* Finish up the dynamic sections. */ | |
3230 | ||
3231 | static bfd_boolean | |
7fa3d080 BW |
3232 | elf_xtensa_finish_dynamic_sections (bfd *output_bfd, |
3233 | struct bfd_link_info *info) | |
e0001a05 | 3234 | { |
f0e6fdb2 | 3235 | struct elf_xtensa_link_hash_table *htab; |
e0001a05 | 3236 | bfd *dynobj; |
f82863d7 | 3237 | asection *sdyn, *srelplt, *srelgot, *sgot, *sxtlit, *sgotloc; |
e0001a05 | 3238 | Elf32_External_Dyn *dyncon, *dynconend; |
d9ab3f29 | 3239 | int num_xtlit_entries = 0; |
e0001a05 NC |
3240 | |
3241 | if (! elf_hash_table (info)->dynamic_sections_created) | |
3242 | return TRUE; | |
3243 | ||
f0e6fdb2 | 3244 | htab = elf_xtensa_hash_table (info); |
4dfe6ac6 NC |
3245 | if (htab == NULL) |
3246 | return FALSE; | |
3247 | ||
e0001a05 | 3248 | dynobj = elf_hash_table (info)->dynobj; |
3d4d4302 | 3249 | sdyn = bfd_get_linker_section (dynobj, ".dynamic"); |
e0001a05 NC |
3250 | BFD_ASSERT (sdyn != NULL); |
3251 | ||
3252 | /* Set the first entry in the global offset table to the address of | |
3253 | the dynamic section. */ | |
ce558b89 | 3254 | sgot = htab->elf.sgot; |
e0001a05 NC |
3255 | if (sgot) |
3256 | { | |
eea6121a | 3257 | BFD_ASSERT (sgot->size == 4); |
e0001a05 | 3258 | if (sdyn == NULL) |
7fa3d080 | 3259 | bfd_put_32 (output_bfd, 0, sgot->contents); |
e0001a05 NC |
3260 | else |
3261 | bfd_put_32 (output_bfd, | |
3262 | sdyn->output_section->vma + sdyn->output_offset, | |
3263 | sgot->contents); | |
3264 | } | |
3265 | ||
ce558b89 | 3266 | srelplt = htab->elf.srelplt; |
f82863d7 | 3267 | srelgot = htab->elf.srelgot; |
7fa3d080 | 3268 | if (srelplt && srelplt->size != 0) |
e0001a05 | 3269 | { |
f82863d7 | 3270 | asection *sgotplt, *spltlittbl; |
e0001a05 NC |
3271 | int chunk, plt_chunks, plt_entries; |
3272 | Elf_Internal_Rela irela; | |
3273 | bfd_byte *loc; | |
3274 | unsigned rtld_reloc; | |
3275 | ||
f0e6fdb2 BW |
3276 | spltlittbl = htab->spltlittbl; |
3277 | BFD_ASSERT (srelgot != NULL && spltlittbl != NULL); | |
e0001a05 NC |
3278 | |
3279 | /* Find the first XTENSA_RTLD relocation. Presumably the rest | |
3280 | of them follow immediately after.... */ | |
3281 | for (rtld_reloc = 0; rtld_reloc < srelgot->reloc_count; rtld_reloc++) | |
3282 | { | |
3283 | loc = srelgot->contents + rtld_reloc * sizeof (Elf32_External_Rela); | |
3284 | bfd_elf32_swap_reloca_in (output_bfd, loc, &irela); | |
3285 | if (ELF32_R_TYPE (irela.r_info) == R_XTENSA_RTLD) | |
3286 | break; | |
3287 | } | |
3288 | BFD_ASSERT (rtld_reloc < srelgot->reloc_count); | |
3289 | ||
eea6121a | 3290 | plt_entries = srelplt->size / sizeof (Elf32_External_Rela); |
e0001a05 NC |
3291 | plt_chunks = |
3292 | (plt_entries + PLT_ENTRIES_PER_CHUNK - 1) / PLT_ENTRIES_PER_CHUNK; | |
3293 | ||
3294 | for (chunk = 0; chunk < plt_chunks; chunk++) | |
3295 | { | |
3296 | int chunk_entries = 0; | |
3297 | ||
f0e6fdb2 | 3298 | sgotplt = elf_xtensa_get_gotplt_section (info, chunk); |
e0001a05 NC |
3299 | BFD_ASSERT (sgotplt != NULL); |
3300 | ||
3301 | /* Emit special RTLD relocations for the first two entries in | |
3302 | each chunk of the .got.plt section. */ | |
3303 | ||
3304 | loc = srelgot->contents + rtld_reloc * sizeof (Elf32_External_Rela); | |
3305 | bfd_elf32_swap_reloca_in (output_bfd, loc, &irela); | |
3306 | BFD_ASSERT (ELF32_R_TYPE (irela.r_info) == R_XTENSA_RTLD); | |
3307 | irela.r_offset = (sgotplt->output_section->vma | |
3308 | + sgotplt->output_offset); | |
3309 | irela.r_addend = 1; /* tell rtld to set value to resolver function */ | |
3310 | bfd_elf32_swap_reloca_out (output_bfd, &irela, loc); | |
3311 | rtld_reloc += 1; | |
3312 | BFD_ASSERT (rtld_reloc <= srelgot->reloc_count); | |
3313 | ||
3314 | /* Next literal immediately follows the first. */ | |
3315 | loc += sizeof (Elf32_External_Rela); | |
3316 | bfd_elf32_swap_reloca_in (output_bfd, loc, &irela); | |
3317 | BFD_ASSERT (ELF32_R_TYPE (irela.r_info) == R_XTENSA_RTLD); | |
3318 | irela.r_offset = (sgotplt->output_section->vma | |
3319 | + sgotplt->output_offset + 4); | |
3320 | /* Tell rtld to set value to object's link map. */ | |
3321 | irela.r_addend = 2; | |
3322 | bfd_elf32_swap_reloca_out (output_bfd, &irela, loc); | |
3323 | rtld_reloc += 1; | |
3324 | BFD_ASSERT (rtld_reloc <= srelgot->reloc_count); | |
3325 | ||
3326 | /* Fill in the literal table. */ | |
3327 | if (chunk < plt_chunks - 1) | |
3328 | chunk_entries = PLT_ENTRIES_PER_CHUNK; | |
3329 | else | |
3330 | chunk_entries = plt_entries - (chunk * PLT_ENTRIES_PER_CHUNK); | |
3331 | ||
eea6121a | 3332 | BFD_ASSERT ((unsigned) (chunk + 1) * 8 <= spltlittbl->size); |
e0001a05 NC |
3333 | bfd_put_32 (output_bfd, |
3334 | sgotplt->output_section->vma + sgotplt->output_offset, | |
3335 | spltlittbl->contents + (chunk * 8) + 0); | |
3336 | bfd_put_32 (output_bfd, | |
3337 | 8 + (chunk_entries * 4), | |
3338 | spltlittbl->contents + (chunk * 8) + 4); | |
3339 | } | |
3340 | ||
e0001a05 NC |
3341 | /* The .xt.lit.plt section has just been modified. This must |
3342 | happen before the code below which combines adjacent literal | |
3343 | table entries, and the .xt.lit.plt contents have to be forced to | |
3344 | the output here. */ | |
3345 | if (! bfd_set_section_contents (output_bfd, | |
3346 | spltlittbl->output_section, | |
3347 | spltlittbl->contents, | |
3348 | spltlittbl->output_offset, | |
eea6121a | 3349 | spltlittbl->size)) |
e0001a05 NC |
3350 | return FALSE; |
3351 | /* Clear SEC_HAS_CONTENTS so the contents won't be output again. */ | |
3352 | spltlittbl->flags &= ~SEC_HAS_CONTENTS; | |
3353 | } | |
3354 | ||
f82863d7 MF |
3355 | /* All the dynamic relocations have been emitted at this point. |
3356 | Make sure the relocation sections are the correct size. */ | |
3357 | if ((srelgot && srelgot->size != (sizeof (Elf32_External_Rela) | |
3358 | * srelgot->reloc_count)) | |
3359 | || (srelplt && srelplt->size != (sizeof (Elf32_External_Rela) | |
3360 | * srelplt->reloc_count))) | |
3361 | abort (); | |
3362 | ||
e0001a05 | 3363 | /* Combine adjacent literal table entries. */ |
0e1862bb | 3364 | BFD_ASSERT (! bfd_link_relocatable (info)); |
e901de89 | 3365 | sxtlit = bfd_get_section_by_name (output_bfd, ".xt.lit"); |
f0e6fdb2 | 3366 | sgotloc = htab->sgotloc; |
d9ab3f29 BW |
3367 | BFD_ASSERT (sgotloc); |
3368 | if (sxtlit) | |
3369 | { | |
3370 | num_xtlit_entries = | |
3371 | elf_xtensa_combine_prop_entries (output_bfd, sxtlit, sgotloc); | |
3372 | if (num_xtlit_entries < 0) | |
3373 | return FALSE; | |
3374 | } | |
e0001a05 NC |
3375 | |
3376 | dyncon = (Elf32_External_Dyn *) sdyn->contents; | |
eea6121a | 3377 | dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size); |
e0001a05 NC |
3378 | for (; dyncon < dynconend; dyncon++) |
3379 | { | |
3380 | Elf_Internal_Dyn dyn; | |
e0001a05 NC |
3381 | |
3382 | bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn); | |
3383 | ||
3384 | switch (dyn.d_tag) | |
3385 | { | |
3386 | default: | |
3387 | break; | |
3388 | ||
3389 | case DT_XTENSA_GOT_LOC_SZ: | |
e0001a05 NC |
3390 | dyn.d_un.d_val = num_xtlit_entries; |
3391 | break; | |
3392 | ||
3393 | case DT_XTENSA_GOT_LOC_OFF: | |
4ade44b7 AM |
3394 | dyn.d_un.d_ptr = (htab->sgotloc->output_section->vma |
3395 | + htab->sgotloc->output_offset); | |
f0e6fdb2 BW |
3396 | break; |
3397 | ||
e0001a05 | 3398 | case DT_PLTGOT: |
ce558b89 AM |
3399 | dyn.d_un.d_ptr = (htab->elf.sgot->output_section->vma |
3400 | + htab->elf.sgot->output_offset); | |
f0e6fdb2 BW |
3401 | break; |
3402 | ||
e0001a05 | 3403 | case DT_JMPREL: |
ce558b89 AM |
3404 | dyn.d_un.d_ptr = (htab->elf.srelplt->output_section->vma |
3405 | + htab->elf.srelplt->output_offset); | |
e0001a05 NC |
3406 | break; |
3407 | ||
3408 | case DT_PLTRELSZ: | |
ce558b89 | 3409 | dyn.d_un.d_val = htab->elf.srelplt->size; |
e0001a05 | 3410 | break; |
e0001a05 NC |
3411 | } |
3412 | ||
3413 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); | |
3414 | } | |
3415 | ||
3416 | return TRUE; | |
3417 | } | |
3418 | ||
3419 | \f | |
3420 | /* Functions for dealing with the e_flags field. */ | |
3421 | ||
3422 | /* Merge backend specific data from an object file to the output | |
3423 | object file when linking. */ | |
3424 | ||
3425 | static bfd_boolean | |
50e03d47 | 3426 | elf_xtensa_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info) |
e0001a05 | 3427 | { |
50e03d47 | 3428 | bfd *obfd = info->output_bfd; |
e0001a05 NC |
3429 | unsigned out_mach, in_mach; |
3430 | flagword out_flag, in_flag; | |
3431 | ||
cc643b88 | 3432 | /* Check if we have the same endianness. */ |
50e03d47 | 3433 | if (!_bfd_generic_verify_endian_match (ibfd, info)) |
e0001a05 NC |
3434 | return FALSE; |
3435 | ||
3436 | /* Don't even pretend to support mixed-format linking. */ | |
3437 | if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour | |
3438 | || bfd_get_flavour (obfd) != bfd_target_elf_flavour) | |
3439 | return FALSE; | |
3440 | ||
3441 | out_flag = elf_elfheader (obfd)->e_flags; | |
3442 | in_flag = elf_elfheader (ibfd)->e_flags; | |
3443 | ||
3444 | out_mach = out_flag & EF_XTENSA_MACH; | |
3445 | in_mach = in_flag & EF_XTENSA_MACH; | |
43cd72b9 | 3446 | if (out_mach != in_mach) |
e0001a05 | 3447 | { |
4eca0228 | 3448 | _bfd_error_handler |
695344c0 | 3449 | /* xgettext:c-format */ |
38f14ab8 | 3450 | (_("%pB: incompatible machine type; output is 0x%x; input is 0x%x"), |
d003868e | 3451 | ibfd, out_mach, in_mach); |
e0001a05 NC |
3452 | bfd_set_error (bfd_error_wrong_format); |
3453 | return FALSE; | |
3454 | } | |
3455 | ||
3456 | if (! elf_flags_init (obfd)) | |
3457 | { | |
3458 | elf_flags_init (obfd) = TRUE; | |
3459 | elf_elfheader (obfd)->e_flags = in_flag; | |
43cd72b9 | 3460 | |
e0001a05 NC |
3461 | if (bfd_get_arch (obfd) == bfd_get_arch (ibfd) |
3462 | && bfd_get_arch_info (obfd)->the_default) | |
3463 | return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), | |
3464 | bfd_get_mach (ibfd)); | |
43cd72b9 | 3465 | |
e0001a05 NC |
3466 | return TRUE; |
3467 | } | |
3468 | ||
68ffbac6 | 3469 | if ((out_flag & EF_XTENSA_XT_INSN) != (in_flag & EF_XTENSA_XT_INSN)) |
43cd72b9 | 3470 | elf_elfheader (obfd)->e_flags &= (~ EF_XTENSA_XT_INSN); |
e0001a05 | 3471 | |
68ffbac6 | 3472 | if ((out_flag & EF_XTENSA_XT_LIT) != (in_flag & EF_XTENSA_XT_LIT)) |
43cd72b9 | 3473 | elf_elfheader (obfd)->e_flags &= (~ EF_XTENSA_XT_LIT); |
e0001a05 NC |
3474 | |
3475 | return TRUE; | |
3476 | } | |
3477 | ||
3478 | ||
3479 | static bfd_boolean | |
7fa3d080 | 3480 | elf_xtensa_set_private_flags (bfd *abfd, flagword flags) |
e0001a05 NC |
3481 | { |
3482 | BFD_ASSERT (!elf_flags_init (abfd) | |
3483 | || elf_elfheader (abfd)->e_flags == flags); | |
3484 | ||
3485 | elf_elfheader (abfd)->e_flags |= flags; | |
3486 | elf_flags_init (abfd) = TRUE; | |
3487 | ||
3488 | return TRUE; | |
3489 | } | |
3490 | ||
3491 | ||
e0001a05 | 3492 | static bfd_boolean |
7fa3d080 | 3493 | elf_xtensa_print_private_bfd_data (bfd *abfd, void *farg) |
e0001a05 NC |
3494 | { |
3495 | FILE *f = (FILE *) farg; | |
3496 | flagword e_flags = elf_elfheader (abfd)->e_flags; | |
3497 | ||
3498 | fprintf (f, "\nXtensa header:\n"); | |
43cd72b9 | 3499 | if ((e_flags & EF_XTENSA_MACH) == E_XTENSA_MACH) |
e0001a05 NC |
3500 | fprintf (f, "\nMachine = Base\n"); |
3501 | else | |
3502 | fprintf (f, "\nMachine Id = 0x%x\n", e_flags & EF_XTENSA_MACH); | |
3503 | ||
3504 | fprintf (f, "Insn tables = %s\n", | |
3505 | (e_flags & EF_XTENSA_XT_INSN) ? "true" : "false"); | |
3506 | ||
3507 | fprintf (f, "Literal tables = %s\n", | |
3508 | (e_flags & EF_XTENSA_XT_LIT) ? "true" : "false"); | |
3509 | ||
3510 | return _bfd_elf_print_private_bfd_data (abfd, farg); | |
3511 | } | |
3512 | ||
3513 | ||
3514 | /* Set the right machine number for an Xtensa ELF file. */ | |
3515 | ||
3516 | static bfd_boolean | |
7fa3d080 | 3517 | elf_xtensa_object_p (bfd *abfd) |
e0001a05 NC |
3518 | { |
3519 | int mach; | |
3520 | unsigned long arch = elf_elfheader (abfd)->e_flags & EF_XTENSA_MACH; | |
3521 | ||
3522 | switch (arch) | |
3523 | { | |
3524 | case E_XTENSA_MACH: | |
3525 | mach = bfd_mach_xtensa; | |
3526 | break; | |
3527 | default: | |
3528 | return FALSE; | |
3529 | } | |
3530 | ||
3531 | (void) bfd_default_set_arch_mach (abfd, bfd_arch_xtensa, mach); | |
3532 | return TRUE; | |
3533 | } | |
3534 | ||
3535 | ||
3536 | /* The final processing done just before writing out an Xtensa ELF object | |
3537 | file. This gets the Xtensa architecture right based on the machine | |
3538 | number. */ | |
3539 | ||
cc364be6 AM |
3540 | static bfd_boolean |
3541 | elf_xtensa_final_write_processing (bfd *abfd) | |
e0001a05 NC |
3542 | { |
3543 | int mach; | |
c5e20471 | 3544 | unsigned long val = elf_elfheader (abfd)->e_flags & EF_XTENSA_MACH; |
e0001a05 NC |
3545 | |
3546 | switch (mach = bfd_get_mach (abfd)) | |
3547 | { | |
3548 | case bfd_mach_xtensa: | |
3549 | val = E_XTENSA_MACH; | |
3550 | break; | |
3551 | default: | |
c5e20471 | 3552 | break; |
e0001a05 NC |
3553 | } |
3554 | ||
c5e20471 | 3555 | elf_elfheader (abfd)->e_flags &= ~EF_XTENSA_MACH; |
e0001a05 | 3556 | elf_elfheader (abfd)->e_flags |= val; |
cc364be6 | 3557 | return _bfd_elf_final_write_processing (abfd); |
e0001a05 NC |
3558 | } |
3559 | ||
3560 | ||
3561 | static enum elf_reloc_type_class | |
7e612e98 AM |
3562 | elf_xtensa_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED, |
3563 | const asection *rel_sec ATTRIBUTE_UNUSED, | |
3564 | const Elf_Internal_Rela *rela) | |
e0001a05 NC |
3565 | { |
3566 | switch ((int) ELF32_R_TYPE (rela->r_info)) | |
3567 | { | |
3568 | case R_XTENSA_RELATIVE: | |
3569 | return reloc_class_relative; | |
3570 | case R_XTENSA_JMP_SLOT: | |
3571 | return reloc_class_plt; | |
3572 | default: | |
3573 | return reloc_class_normal; | |
3574 | } | |
3575 | } | |
3576 | ||
3577 | \f | |
3578 | static bfd_boolean | |
7fa3d080 BW |
3579 | elf_xtensa_discard_info_for_section (bfd *abfd, |
3580 | struct elf_reloc_cookie *cookie, | |
3581 | struct bfd_link_info *info, | |
3582 | asection *sec) | |
e0001a05 NC |
3583 | { |
3584 | bfd_byte *contents; | |
e0001a05 | 3585 | bfd_vma offset, actual_offset; |
1d25768e BW |
3586 | bfd_size_type removed_bytes = 0; |
3587 | bfd_size_type entry_size; | |
e0001a05 NC |
3588 | |
3589 | if (sec->output_section | |
3590 | && bfd_is_abs_section (sec->output_section)) | |
3591 | return FALSE; | |
3592 | ||
1d25768e BW |
3593 | if (xtensa_is_proptable_section (sec)) |
3594 | entry_size = 12; | |
3595 | else | |
3596 | entry_size = 8; | |
3597 | ||
a3ef2d63 | 3598 | if (sec->size == 0 || sec->size % entry_size != 0) |
1d25768e BW |
3599 | return FALSE; |
3600 | ||
e0001a05 NC |
3601 | contents = retrieve_contents (abfd, sec, info->keep_memory); |
3602 | if (!contents) | |
3603 | return FALSE; | |
3604 | ||
3605 | cookie->rels = retrieve_internal_relocs (abfd, sec, info->keep_memory); | |
3606 | if (!cookie->rels) | |
3607 | { | |
3608 | release_contents (sec, contents); | |
3609 | return FALSE; | |
3610 | } | |
3611 | ||
1d25768e BW |
3612 | /* Sort the relocations. They should already be in order when |
3613 | relaxation is enabled, but it might not be. */ | |
3614 | qsort (cookie->rels, sec->reloc_count, sizeof (Elf_Internal_Rela), | |
3615 | internal_reloc_compare); | |
3616 | ||
e0001a05 NC |
3617 | cookie->rel = cookie->rels; |
3618 | cookie->relend = cookie->rels + sec->reloc_count; | |
3619 | ||
a3ef2d63 | 3620 | for (offset = 0; offset < sec->size; offset += entry_size) |
e0001a05 NC |
3621 | { |
3622 | actual_offset = offset - removed_bytes; | |
3623 | ||
3624 | /* The ...symbol_deleted_p function will skip over relocs but it | |
3625 | won't adjust their offsets, so do that here. */ | |
3626 | while (cookie->rel < cookie->relend | |
3627 | && cookie->rel->r_offset < offset) | |
3628 | { | |
3629 | cookie->rel->r_offset -= removed_bytes; | |
3630 | cookie->rel++; | |
3631 | } | |
3632 | ||
3633 | while (cookie->rel < cookie->relend | |
3634 | && cookie->rel->r_offset == offset) | |
3635 | { | |
c152c796 | 3636 | if (bfd_elf_reloc_symbol_deleted_p (offset, cookie)) |
e0001a05 NC |
3637 | { |
3638 | /* Remove the table entry. (If the reloc type is NONE, then | |
3639 | the entry has already been merged with another and deleted | |
3640 | during relaxation.) */ | |
3641 | if (ELF32_R_TYPE (cookie->rel->r_info) != R_XTENSA_NONE) | |
3642 | { | |
3643 | /* Shift the contents up. */ | |
a3ef2d63 | 3644 | if (offset + entry_size < sec->size) |
e0001a05 | 3645 | memmove (&contents[actual_offset], |
1d25768e | 3646 | &contents[actual_offset + entry_size], |
a3ef2d63 | 3647 | sec->size - offset - entry_size); |
1d25768e | 3648 | removed_bytes += entry_size; |
e0001a05 NC |
3649 | } |
3650 | ||
3651 | /* Remove this relocation. */ | |
3652 | cookie->rel->r_info = ELF32_R_INFO (0, R_XTENSA_NONE); | |
3653 | } | |
3654 | ||
3655 | /* Adjust the relocation offset for previous removals. This | |
3656 | should not be done before calling ...symbol_deleted_p | |
3657 | because it might mess up the offset comparisons there. | |
3658 | Make sure the offset doesn't underflow in the case where | |
3659 | the first entry is removed. */ | |
3660 | if (cookie->rel->r_offset >= removed_bytes) | |
3661 | cookie->rel->r_offset -= removed_bytes; | |
3662 | else | |
3663 | cookie->rel->r_offset = 0; | |
3664 | ||
3665 | cookie->rel++; | |
3666 | } | |
3667 | } | |
3668 | ||
3669 | if (removed_bytes != 0) | |
3670 | { | |
3671 | /* Adjust any remaining relocs (shouldn't be any). */ | |
3672 | for (; cookie->rel < cookie->relend; cookie->rel++) | |
3673 | { | |
3674 | if (cookie->rel->r_offset >= removed_bytes) | |
3675 | cookie->rel->r_offset -= removed_bytes; | |
3676 | else | |
3677 | cookie->rel->r_offset = 0; | |
3678 | } | |
3679 | ||
3680 | /* Clear the removed bytes. */ | |
a3ef2d63 | 3681 | memset (&contents[sec->size - removed_bytes], 0, removed_bytes); |
e0001a05 NC |
3682 | |
3683 | pin_contents (sec, contents); | |
3684 | pin_internal_relocs (sec, cookie->rels); | |
3685 | ||
eea6121a | 3686 | /* Shrink size. */ |
a3ef2d63 BW |
3687 | if (sec->rawsize == 0) |
3688 | sec->rawsize = sec->size; | |
3689 | sec->size -= removed_bytes; | |
b536dc1e BW |
3690 | |
3691 | if (xtensa_is_littable_section (sec)) | |
3692 | { | |
f0e6fdb2 BW |
3693 | asection *sgotloc = elf_xtensa_hash_table (info)->sgotloc; |
3694 | if (sgotloc) | |
3695 | sgotloc->size -= removed_bytes; | |
b536dc1e | 3696 | } |
e0001a05 NC |
3697 | } |
3698 | else | |
3699 | { | |
3700 | release_contents (sec, contents); | |
3701 | release_internal_relocs (sec, cookie->rels); | |
3702 | } | |
3703 | ||
3704 | return (removed_bytes != 0); | |
3705 | } | |
3706 | ||
3707 | ||
3708 | static bfd_boolean | |
7fa3d080 BW |
3709 | elf_xtensa_discard_info (bfd *abfd, |
3710 | struct elf_reloc_cookie *cookie, | |
3711 | struct bfd_link_info *info) | |
e0001a05 NC |
3712 | { |
3713 | asection *sec; | |
3714 | bfd_boolean changed = FALSE; | |
3715 | ||
3716 | for (sec = abfd->sections; sec != NULL; sec = sec->next) | |
3717 | { | |
3718 | if (xtensa_is_property_section (sec)) | |
3719 | { | |
3720 | if (elf_xtensa_discard_info_for_section (abfd, cookie, info, sec)) | |
3721 | changed = TRUE; | |
3722 | } | |
3723 | } | |
3724 | ||
3725 | return changed; | |
3726 | } | |
3727 | ||
3728 | ||
3729 | static bfd_boolean | |
7fa3d080 | 3730 | elf_xtensa_ignore_discarded_relocs (asection *sec) |
e0001a05 NC |
3731 | { |
3732 | return xtensa_is_property_section (sec); | |
3733 | } | |
3734 | ||
a77dc2cc BW |
3735 | |
3736 | static unsigned int | |
3737 | elf_xtensa_action_discarded (asection *sec) | |
3738 | { | |
3739 | if (strcmp (".xt_except_table", sec->name) == 0) | |
3740 | return 0; | |
3741 | ||
3742 | if (strcmp (".xt_except_desc", sec->name) == 0) | |
3743 | return 0; | |
3744 | ||
3745 | return _bfd_elf_default_action_discarded (sec); | |
3746 | } | |
3747 | ||
e0001a05 NC |
3748 | \f |
3749 | /* Support for core dump NOTE sections. */ | |
3750 | ||
3751 | static bfd_boolean | |
7fa3d080 | 3752 | elf_xtensa_grok_prstatus (bfd *abfd, Elf_Internal_Note *note) |
e0001a05 NC |
3753 | { |
3754 | int offset; | |
eea6121a | 3755 | unsigned int size; |
e0001a05 NC |
3756 | |
3757 | /* The size for Xtensa is variable, so don't try to recognize the format | |
3758 | based on the size. Just assume this is GNU/Linux. */ | |
3759 | ||
3760 | /* pr_cursig */ | |
228e534f | 3761 | elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12); |
e0001a05 NC |
3762 | |
3763 | /* pr_pid */ | |
228e534f | 3764 | elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24); |
e0001a05 NC |
3765 | |
3766 | /* pr_reg */ | |
3767 | offset = 72; | |
eea6121a | 3768 | size = note->descsz - offset - 4; |
e0001a05 NC |
3769 | |
3770 | /* Make a ".reg/999" section. */ | |
3771 | return _bfd_elfcore_make_pseudosection (abfd, ".reg", | |
eea6121a | 3772 | size, note->descpos + offset); |
e0001a05 NC |
3773 | } |
3774 | ||
3775 | ||
3776 | static bfd_boolean | |
7fa3d080 | 3777 | elf_xtensa_grok_psinfo (bfd *abfd, Elf_Internal_Note *note) |
e0001a05 NC |
3778 | { |
3779 | switch (note->descsz) | |
3780 | { | |
3781 | default: | |
3782 | return FALSE; | |
3783 | ||
3784 | case 128: /* GNU/Linux elf_prpsinfo */ | |
228e534f | 3785 | elf_tdata (abfd)->core->program |
e0001a05 | 3786 | = _bfd_elfcore_strndup (abfd, note->descdata + 32, 16); |
228e534f | 3787 | elf_tdata (abfd)->core->command |
e0001a05 NC |
3788 | = _bfd_elfcore_strndup (abfd, note->descdata + 48, 80); |
3789 | } | |
3790 | ||
3791 | /* Note that for some reason, a spurious space is tacked | |
3792 | onto the end of the args in some (at least one anyway) | |
3793 | implementations, so strip it off if it exists. */ | |
3794 | ||
3795 | { | |
228e534f | 3796 | char *command = elf_tdata (abfd)->core->command; |
e0001a05 NC |
3797 | int n = strlen (command); |
3798 | ||
3799 | if (0 < n && command[n - 1] == ' ') | |
3800 | command[n - 1] = '\0'; | |
3801 | } | |
3802 | ||
3803 | return TRUE; | |
3804 | } | |
3805 | ||
3806 | \f | |
3807 | /* Generic Xtensa configurability stuff. */ | |
3808 | ||
3809 | static xtensa_opcode callx0_op = XTENSA_UNDEFINED; | |
3810 | static xtensa_opcode callx4_op = XTENSA_UNDEFINED; | |
3811 | static xtensa_opcode callx8_op = XTENSA_UNDEFINED; | |
3812 | static xtensa_opcode callx12_op = XTENSA_UNDEFINED; | |
3813 | static xtensa_opcode call0_op = XTENSA_UNDEFINED; | |
3814 | static xtensa_opcode call4_op = XTENSA_UNDEFINED; | |
3815 | static xtensa_opcode call8_op = XTENSA_UNDEFINED; | |
3816 | static xtensa_opcode call12_op = XTENSA_UNDEFINED; | |
3817 | ||
3818 | static void | |
7fa3d080 | 3819 | init_call_opcodes (void) |
e0001a05 NC |
3820 | { |
3821 | if (callx0_op == XTENSA_UNDEFINED) | |
3822 | { | |
3823 | callx0_op = xtensa_opcode_lookup (xtensa_default_isa, "callx0"); | |
3824 | callx4_op = xtensa_opcode_lookup (xtensa_default_isa, "callx4"); | |
3825 | callx8_op = xtensa_opcode_lookup (xtensa_default_isa, "callx8"); | |
3826 | callx12_op = xtensa_opcode_lookup (xtensa_default_isa, "callx12"); | |
3827 | call0_op = xtensa_opcode_lookup (xtensa_default_isa, "call0"); | |
3828 | call4_op = xtensa_opcode_lookup (xtensa_default_isa, "call4"); | |
3829 | call8_op = xtensa_opcode_lookup (xtensa_default_isa, "call8"); | |
3830 | call12_op = xtensa_opcode_lookup (xtensa_default_isa, "call12"); | |
3831 | } | |
3832 | } | |
3833 | ||
3834 | ||
3835 | static bfd_boolean | |
7fa3d080 | 3836 | is_indirect_call_opcode (xtensa_opcode opcode) |
e0001a05 NC |
3837 | { |
3838 | init_call_opcodes (); | |
3839 | return (opcode == callx0_op | |
3840 | || opcode == callx4_op | |
3841 | || opcode == callx8_op | |
3842 | || opcode == callx12_op); | |
3843 | } | |
3844 | ||
3845 | ||
3846 | static bfd_boolean | |
7fa3d080 | 3847 | is_direct_call_opcode (xtensa_opcode opcode) |
e0001a05 NC |
3848 | { |
3849 | init_call_opcodes (); | |
3850 | return (opcode == call0_op | |
3851 | || opcode == call4_op | |
3852 | || opcode == call8_op | |
3853 | || opcode == call12_op); | |
3854 | } | |
3855 | ||
3856 | ||
3857 | static bfd_boolean | |
7fa3d080 | 3858 | is_windowed_call_opcode (xtensa_opcode opcode) |
e0001a05 NC |
3859 | { |
3860 | init_call_opcodes (); | |
3861 | return (opcode == call4_op | |
3862 | || opcode == call8_op | |
3863 | || opcode == call12_op | |
3864 | || opcode == callx4_op | |
3865 | || opcode == callx8_op | |
3866 | || opcode == callx12_op); | |
3867 | } | |
3868 | ||
3869 | ||
28dbbc02 BW |
3870 | static bfd_boolean |
3871 | get_indirect_call_dest_reg (xtensa_opcode opcode, unsigned *pdst) | |
3872 | { | |
3873 | unsigned dst = (unsigned) -1; | |
3874 | ||
3875 | init_call_opcodes (); | |
3876 | if (opcode == callx0_op) | |
3877 | dst = 0; | |
3878 | else if (opcode == callx4_op) | |
3879 | dst = 4; | |
3880 | else if (opcode == callx8_op) | |
3881 | dst = 8; | |
3882 | else if (opcode == callx12_op) | |
3883 | dst = 12; | |
3884 | ||
3885 | if (dst == (unsigned) -1) | |
3886 | return FALSE; | |
3887 | ||
3888 | *pdst = dst; | |
3889 | return TRUE; | |
3890 | } | |
3891 | ||
3892 | ||
43cd72b9 BW |
3893 | static xtensa_opcode |
3894 | get_const16_opcode (void) | |
3895 | { | |
3896 | static bfd_boolean done_lookup = FALSE; | |
3897 | static xtensa_opcode const16_opcode = XTENSA_UNDEFINED; | |
3898 | if (!done_lookup) | |
3899 | { | |
3900 | const16_opcode = xtensa_opcode_lookup (xtensa_default_isa, "const16"); | |
3901 | done_lookup = TRUE; | |
3902 | } | |
3903 | return const16_opcode; | |
3904 | } | |
3905 | ||
3906 | ||
e0001a05 NC |
3907 | static xtensa_opcode |
3908 | get_l32r_opcode (void) | |
3909 | { | |
3910 | static xtensa_opcode l32r_opcode = XTENSA_UNDEFINED; | |
43cd72b9 BW |
3911 | static bfd_boolean done_lookup = FALSE; |
3912 | ||
3913 | if (!done_lookup) | |
e0001a05 NC |
3914 | { |
3915 | l32r_opcode = xtensa_opcode_lookup (xtensa_default_isa, "l32r"); | |
43cd72b9 | 3916 | done_lookup = TRUE; |
e0001a05 NC |
3917 | } |
3918 | return l32r_opcode; | |
3919 | } | |
3920 | ||
3921 | ||
3922 | static bfd_vma | |
7fa3d080 | 3923 | l32r_offset (bfd_vma addr, bfd_vma pc) |
e0001a05 NC |
3924 | { |
3925 | bfd_vma offset; | |
3926 | ||
3927 | offset = addr - ((pc+3) & -4); | |
3928 | BFD_ASSERT ((offset & ((1 << 2) - 1)) == 0); | |
3929 | offset = (signed int) offset >> 2; | |
3930 | BFD_ASSERT ((signed int) offset >> 16 == -1); | |
3931 | return offset; | |
3932 | } | |
3933 | ||
3934 | ||
e0d0c518 MF |
3935 | static xtensa_opcode |
3936 | get_rsr_lend_opcode (void) | |
3937 | { | |
3938 | static xtensa_opcode rsr_lend_opcode = XTENSA_UNDEFINED; | |
3939 | static bfd_boolean done_lookup = FALSE; | |
3940 | if (!done_lookup) | |
3941 | { | |
3942 | rsr_lend_opcode = xtensa_opcode_lookup (xtensa_default_isa, "rsr.lend"); | |
3943 | done_lookup = TRUE; | |
3944 | } | |
3945 | return rsr_lend_opcode; | |
3946 | } | |
3947 | ||
3948 | static xtensa_opcode | |
3949 | get_wsr_lbeg_opcode (void) | |
3950 | { | |
3951 | static xtensa_opcode wsr_lbeg_opcode = XTENSA_UNDEFINED; | |
3952 | static bfd_boolean done_lookup = FALSE; | |
3953 | if (!done_lookup) | |
3954 | { | |
3955 | wsr_lbeg_opcode = xtensa_opcode_lookup (xtensa_default_isa, "wsr.lbeg"); | |
3956 | done_lookup = TRUE; | |
3957 | } | |
3958 | return wsr_lbeg_opcode; | |
3959 | } | |
3960 | ||
3961 | ||
e0001a05 | 3962 | static int |
7fa3d080 | 3963 | get_relocation_opnd (xtensa_opcode opcode, int r_type) |
e0001a05 | 3964 | { |
43cd72b9 BW |
3965 | xtensa_isa isa = xtensa_default_isa; |
3966 | int last_immed, last_opnd, opi; | |
3967 | ||
3968 | if (opcode == XTENSA_UNDEFINED) | |
3969 | return XTENSA_UNDEFINED; | |
3970 | ||
3971 | /* Find the last visible PC-relative immediate operand for the opcode. | |
3972 | If there are no PC-relative immediates, then choose the last visible | |
3973 | immediate; otherwise, fail and return XTENSA_UNDEFINED. */ | |
3974 | last_immed = XTENSA_UNDEFINED; | |
3975 | last_opnd = xtensa_opcode_num_operands (isa, opcode); | |
3976 | for (opi = last_opnd - 1; opi >= 0; opi--) | |
3977 | { | |
3978 | if (xtensa_operand_is_visible (isa, opcode, opi) == 0) | |
3979 | continue; | |
3980 | if (xtensa_operand_is_PCrelative (isa, opcode, opi) == 1) | |
3981 | { | |
3982 | last_immed = opi; | |
3983 | break; | |
3984 | } | |
3985 | if (last_immed == XTENSA_UNDEFINED | |
3986 | && xtensa_operand_is_register (isa, opcode, opi) == 0) | |
3987 | last_immed = opi; | |
3988 | } | |
3989 | if (last_immed < 0) | |
3990 | return XTENSA_UNDEFINED; | |
3991 | ||
3992 | /* If the operand number was specified in an old-style relocation, | |
3993 | check for consistency with the operand computed above. */ | |
3994 | if (r_type >= R_XTENSA_OP0 && r_type <= R_XTENSA_OP2) | |
3995 | { | |
3996 | int reloc_opnd = r_type - R_XTENSA_OP0; | |
3997 | if (reloc_opnd != last_immed) | |
3998 | return XTENSA_UNDEFINED; | |
3999 | } | |
4000 | ||
4001 | return last_immed; | |
4002 | } | |
4003 | ||
4004 | ||
4005 | int | |
7fa3d080 | 4006 | get_relocation_slot (int r_type) |
43cd72b9 BW |
4007 | { |
4008 | switch (r_type) | |
4009 | { | |
4010 | case R_XTENSA_OP0: | |
4011 | case R_XTENSA_OP1: | |
4012 | case R_XTENSA_OP2: | |
4013 | return 0; | |
4014 | ||
4015 | default: | |
4016 | if (r_type >= R_XTENSA_SLOT0_OP && r_type <= R_XTENSA_SLOT14_OP) | |
4017 | return r_type - R_XTENSA_SLOT0_OP; | |
4018 | if (r_type >= R_XTENSA_SLOT0_ALT && r_type <= R_XTENSA_SLOT14_ALT) | |
4019 | return r_type - R_XTENSA_SLOT0_ALT; | |
4020 | break; | |
4021 | } | |
4022 | ||
4023 | return XTENSA_UNDEFINED; | |
e0001a05 NC |
4024 | } |
4025 | ||
4026 | ||
4027 | /* Get the opcode for a relocation. */ | |
4028 | ||
4029 | static xtensa_opcode | |
7fa3d080 BW |
4030 | get_relocation_opcode (bfd *abfd, |
4031 | asection *sec, | |
4032 | bfd_byte *contents, | |
4033 | Elf_Internal_Rela *irel) | |
e0001a05 NC |
4034 | { |
4035 | static xtensa_insnbuf ibuff = NULL; | |
43cd72b9 | 4036 | static xtensa_insnbuf sbuff = NULL; |
e0001a05 | 4037 | xtensa_isa isa = xtensa_default_isa; |
43cd72b9 BW |
4038 | xtensa_format fmt; |
4039 | int slot; | |
e0001a05 NC |
4040 | |
4041 | if (contents == NULL) | |
4042 | return XTENSA_UNDEFINED; | |
4043 | ||
43cd72b9 | 4044 | if (bfd_get_section_limit (abfd, sec) <= irel->r_offset) |
e0001a05 NC |
4045 | return XTENSA_UNDEFINED; |
4046 | ||
4047 | if (ibuff == NULL) | |
43cd72b9 BW |
4048 | { |
4049 | ibuff = xtensa_insnbuf_alloc (isa); | |
4050 | sbuff = xtensa_insnbuf_alloc (isa); | |
4051 | } | |
4052 | ||
e0001a05 | 4053 | /* Decode the instruction. */ |
43cd72b9 BW |
4054 | xtensa_insnbuf_from_chars (isa, ibuff, &contents[irel->r_offset], |
4055 | sec->size - irel->r_offset); | |
4056 | fmt = xtensa_format_decode (isa, ibuff); | |
4057 | slot = get_relocation_slot (ELF32_R_TYPE (irel->r_info)); | |
4058 | if (slot == XTENSA_UNDEFINED) | |
4059 | return XTENSA_UNDEFINED; | |
4060 | xtensa_format_get_slot (isa, fmt, slot, ibuff, sbuff); | |
4061 | return xtensa_opcode_decode (isa, fmt, slot, sbuff); | |
e0001a05 NC |
4062 | } |
4063 | ||
4064 | ||
4065 | bfd_boolean | |
7fa3d080 BW |
4066 | is_l32r_relocation (bfd *abfd, |
4067 | asection *sec, | |
4068 | bfd_byte *contents, | |
4069 | Elf_Internal_Rela *irel) | |
e0001a05 NC |
4070 | { |
4071 | xtensa_opcode opcode; | |
43cd72b9 | 4072 | if (!is_operand_relocation (ELF32_R_TYPE (irel->r_info))) |
e0001a05 | 4073 | return FALSE; |
43cd72b9 | 4074 | opcode = get_relocation_opcode (abfd, sec, contents, irel); |
e0001a05 NC |
4075 | return (opcode == get_l32r_opcode ()); |
4076 | } | |
4077 | ||
e0001a05 | 4078 | |
43cd72b9 | 4079 | static bfd_size_type |
7fa3d080 BW |
4080 | get_asm_simplify_size (bfd_byte *contents, |
4081 | bfd_size_type content_len, | |
4082 | bfd_size_type offset) | |
e0001a05 | 4083 | { |
43cd72b9 | 4084 | bfd_size_type insnlen, size = 0; |
e0001a05 | 4085 | |
43cd72b9 BW |
4086 | /* Decode the size of the next two instructions. */ |
4087 | insnlen = insn_decode_len (contents, content_len, offset); | |
4088 | if (insnlen == 0) | |
4089 | return 0; | |
e0001a05 | 4090 | |
43cd72b9 | 4091 | size += insnlen; |
68ffbac6 | 4092 | |
43cd72b9 BW |
4093 | insnlen = insn_decode_len (contents, content_len, offset + size); |
4094 | if (insnlen == 0) | |
4095 | return 0; | |
e0001a05 | 4096 | |
43cd72b9 BW |
4097 | size += insnlen; |
4098 | return size; | |
4099 | } | |
e0001a05 | 4100 | |
43cd72b9 BW |
4101 | |
4102 | bfd_boolean | |
7fa3d080 | 4103 | is_alt_relocation (int r_type) |
43cd72b9 BW |
4104 | { |
4105 | return (r_type >= R_XTENSA_SLOT0_ALT | |
4106 | && r_type <= R_XTENSA_SLOT14_ALT); | |
e0001a05 NC |
4107 | } |
4108 | ||
4109 | ||
43cd72b9 | 4110 | bfd_boolean |
7fa3d080 | 4111 | is_operand_relocation (int r_type) |
e0001a05 | 4112 | { |
43cd72b9 BW |
4113 | switch (r_type) |
4114 | { | |
4115 | case R_XTENSA_OP0: | |
4116 | case R_XTENSA_OP1: | |
4117 | case R_XTENSA_OP2: | |
4118 | return TRUE; | |
e0001a05 | 4119 | |
43cd72b9 BW |
4120 | default: |
4121 | if (r_type >= R_XTENSA_SLOT0_OP && r_type <= R_XTENSA_SLOT14_OP) | |
4122 | return TRUE; | |
4123 | if (r_type >= R_XTENSA_SLOT0_ALT && r_type <= R_XTENSA_SLOT14_ALT) | |
4124 | return TRUE; | |
4125 | break; | |
4126 | } | |
e0001a05 | 4127 | |
43cd72b9 | 4128 | return FALSE; |
e0001a05 NC |
4129 | } |
4130 | ||
68ffbac6 | 4131 | |
43cd72b9 | 4132 | #define MIN_INSN_LENGTH 2 |
e0001a05 | 4133 | |
43cd72b9 BW |
4134 | /* Return 0 if it fails to decode. */ |
4135 | ||
4136 | bfd_size_type | |
7fa3d080 BW |
4137 | insn_decode_len (bfd_byte *contents, |
4138 | bfd_size_type content_len, | |
4139 | bfd_size_type offset) | |
e0001a05 | 4140 | { |
43cd72b9 BW |
4141 | int insn_len; |
4142 | xtensa_isa isa = xtensa_default_isa; | |
4143 | xtensa_format fmt; | |
4144 | static xtensa_insnbuf ibuff = NULL; | |
e0001a05 | 4145 | |
43cd72b9 BW |
4146 | if (offset + MIN_INSN_LENGTH > content_len) |
4147 | return 0; | |
e0001a05 | 4148 | |
43cd72b9 BW |
4149 | if (ibuff == NULL) |
4150 | ibuff = xtensa_insnbuf_alloc (isa); | |
4151 | xtensa_insnbuf_from_chars (isa, ibuff, &contents[offset], | |
4152 | content_len - offset); | |
4153 | fmt = xtensa_format_decode (isa, ibuff); | |
4154 | if (fmt == XTENSA_UNDEFINED) | |
4155 | return 0; | |
4156 | insn_len = xtensa_format_length (isa, fmt); | |
4157 | if (insn_len == XTENSA_UNDEFINED) | |
4158 | return 0; | |
4159 | return insn_len; | |
e0001a05 NC |
4160 | } |
4161 | ||
e0d0c518 MF |
4162 | int |
4163 | insn_num_slots (bfd_byte *contents, | |
4164 | bfd_size_type content_len, | |
4165 | bfd_size_type offset) | |
4166 | { | |
4167 | xtensa_isa isa = xtensa_default_isa; | |
4168 | xtensa_format fmt; | |
4169 | static xtensa_insnbuf ibuff = NULL; | |
4170 | ||
4171 | if (offset + MIN_INSN_LENGTH > content_len) | |
4172 | return XTENSA_UNDEFINED; | |
4173 | ||
4174 | if (ibuff == NULL) | |
4175 | ibuff = xtensa_insnbuf_alloc (isa); | |
4176 | xtensa_insnbuf_from_chars (isa, ibuff, &contents[offset], | |
4177 | content_len - offset); | |
4178 | fmt = xtensa_format_decode (isa, ibuff); | |
4179 | if (fmt == XTENSA_UNDEFINED) | |
4180 | return XTENSA_UNDEFINED; | |
4181 | return xtensa_format_num_slots (isa, fmt); | |
4182 | } | |
4183 | ||
e0001a05 | 4184 | |
43cd72b9 BW |
4185 | /* Decode the opcode for a single slot instruction. |
4186 | Return 0 if it fails to decode or the instruction is multi-slot. */ | |
e0001a05 | 4187 | |
43cd72b9 | 4188 | xtensa_opcode |
7fa3d080 BW |
4189 | insn_decode_opcode (bfd_byte *contents, |
4190 | bfd_size_type content_len, | |
4191 | bfd_size_type offset, | |
4192 | int slot) | |
e0001a05 | 4193 | { |
e0001a05 | 4194 | xtensa_isa isa = xtensa_default_isa; |
43cd72b9 BW |
4195 | xtensa_format fmt; |
4196 | static xtensa_insnbuf insnbuf = NULL; | |
4197 | static xtensa_insnbuf slotbuf = NULL; | |
4198 | ||
4199 | if (offset + MIN_INSN_LENGTH > content_len) | |
e0001a05 NC |
4200 | return XTENSA_UNDEFINED; |
4201 | ||
4202 | if (insnbuf == NULL) | |
43cd72b9 BW |
4203 | { |
4204 | insnbuf = xtensa_insnbuf_alloc (isa); | |
4205 | slotbuf = xtensa_insnbuf_alloc (isa); | |
4206 | } | |
4207 | ||
4208 | xtensa_insnbuf_from_chars (isa, insnbuf, &contents[offset], | |
4209 | content_len - offset); | |
4210 | fmt = xtensa_format_decode (isa, insnbuf); | |
4211 | if (fmt == XTENSA_UNDEFINED) | |
e0001a05 | 4212 | return XTENSA_UNDEFINED; |
43cd72b9 BW |
4213 | |
4214 | if (slot >= xtensa_format_num_slots (isa, fmt)) | |
e0001a05 | 4215 | return XTENSA_UNDEFINED; |
e0001a05 | 4216 | |
43cd72b9 BW |
4217 | xtensa_format_get_slot (isa, fmt, slot, insnbuf, slotbuf); |
4218 | return xtensa_opcode_decode (isa, fmt, slot, slotbuf); | |
4219 | } | |
e0001a05 | 4220 | |
e0001a05 | 4221 | |
43cd72b9 BW |
4222 | /* The offset is the offset in the contents. |
4223 | The address is the address of that offset. */ | |
e0001a05 | 4224 | |
43cd72b9 | 4225 | static bfd_boolean |
7fa3d080 BW |
4226 | check_branch_target_aligned (bfd_byte *contents, |
4227 | bfd_size_type content_length, | |
4228 | bfd_vma offset, | |
4229 | bfd_vma address) | |
43cd72b9 BW |
4230 | { |
4231 | bfd_size_type insn_len = insn_decode_len (contents, content_length, offset); | |
4232 | if (insn_len == 0) | |
4233 | return FALSE; | |
4234 | return check_branch_target_aligned_address (address, insn_len); | |
4235 | } | |
e0001a05 | 4236 | |
e0001a05 | 4237 | |
43cd72b9 | 4238 | static bfd_boolean |
7fa3d080 BW |
4239 | check_loop_aligned (bfd_byte *contents, |
4240 | bfd_size_type content_length, | |
4241 | bfd_vma offset, | |
4242 | bfd_vma address) | |
e0001a05 | 4243 | { |
43cd72b9 | 4244 | bfd_size_type loop_len, insn_len; |
64b607e6 | 4245 | xtensa_opcode opcode; |
e0001a05 | 4246 | |
64b607e6 BW |
4247 | opcode = insn_decode_opcode (contents, content_length, offset, 0); |
4248 | if (opcode == XTENSA_UNDEFINED | |
4249 | || xtensa_opcode_is_loop (xtensa_default_isa, opcode) != 1) | |
4250 | { | |
4251 | BFD_ASSERT (FALSE); | |
4252 | return FALSE; | |
4253 | } | |
68ffbac6 | 4254 | |
43cd72b9 | 4255 | loop_len = insn_decode_len (contents, content_length, offset); |
43cd72b9 | 4256 | insn_len = insn_decode_len (contents, content_length, offset + loop_len); |
64b607e6 BW |
4257 | if (loop_len == 0 || insn_len == 0) |
4258 | { | |
4259 | BFD_ASSERT (FALSE); | |
4260 | return FALSE; | |
4261 | } | |
e0001a05 | 4262 | |
e0d0c518 MF |
4263 | /* If this is relaxed loop, analyze first instruction of the actual loop |
4264 | body. It must be at offset 27 from the loop instruction address. */ | |
4265 | if (insn_len == 3 | |
4266 | && insn_num_slots (contents, content_length, offset + loop_len) == 1 | |
4267 | && insn_decode_opcode (contents, content_length, | |
4268 | offset + loop_len, 0) == get_rsr_lend_opcode() | |
4269 | && insn_decode_len (contents, content_length, offset + loop_len + 3) == 3 | |
4270 | && insn_num_slots (contents, content_length, offset + loop_len + 3) == 1 | |
4271 | && insn_decode_opcode (contents, content_length, | |
4272 | offset + loop_len + 3, 0) == get_wsr_lbeg_opcode()) | |
4273 | { | |
4274 | loop_len = 27; | |
4275 | insn_len = insn_decode_len (contents, content_length, offset + loop_len); | |
4276 | } | |
43cd72b9 BW |
4277 | return check_branch_target_aligned_address (address + loop_len, insn_len); |
4278 | } | |
e0001a05 | 4279 | |
e0001a05 NC |
4280 | |
4281 | static bfd_boolean | |
7fa3d080 | 4282 | check_branch_target_aligned_address (bfd_vma addr, int len) |
e0001a05 | 4283 | { |
43cd72b9 BW |
4284 | if (len == 8) |
4285 | return (addr % 8 == 0); | |
4286 | return ((addr >> 2) == ((addr + len - 1) >> 2)); | |
e0001a05 NC |
4287 | } |
4288 | ||
43cd72b9 BW |
4289 | \f |
4290 | /* Instruction widening and narrowing. */ | |
e0001a05 | 4291 | |
7fa3d080 BW |
4292 | /* When FLIX is available we need to access certain instructions only |
4293 | when they are 16-bit or 24-bit instructions. This table caches | |
4294 | information about such instructions by walking through all the | |
4295 | opcodes and finding the smallest single-slot format into which each | |
4296 | can be encoded. */ | |
4297 | ||
4298 | static xtensa_format *op_single_fmt_table = NULL; | |
e0001a05 NC |
4299 | |
4300 | ||
7fa3d080 BW |
4301 | static void |
4302 | init_op_single_format_table (void) | |
e0001a05 | 4303 | { |
7fa3d080 BW |
4304 | xtensa_isa isa = xtensa_default_isa; |
4305 | xtensa_insnbuf ibuf; | |
4306 | xtensa_opcode opcode; | |
4307 | xtensa_format fmt; | |
4308 | int num_opcodes; | |
4309 | ||
4310 | if (op_single_fmt_table) | |
4311 | return; | |
4312 | ||
4313 | ibuf = xtensa_insnbuf_alloc (isa); | |
4314 | num_opcodes = xtensa_isa_num_opcodes (isa); | |
4315 | ||
4316 | op_single_fmt_table = (xtensa_format *) | |
4317 | bfd_malloc (sizeof (xtensa_format) * num_opcodes); | |
4318 | for (opcode = 0; opcode < num_opcodes; opcode++) | |
4319 | { | |
4320 | op_single_fmt_table[opcode] = XTENSA_UNDEFINED; | |
4321 | for (fmt = 0; fmt < xtensa_isa_num_formats (isa); fmt++) | |
4322 | { | |
4323 | if (xtensa_format_num_slots (isa, fmt) == 1 | |
4324 | && xtensa_opcode_encode (isa, fmt, 0, ibuf, opcode) == 0) | |
4325 | { | |
4326 | xtensa_opcode old_fmt = op_single_fmt_table[opcode]; | |
4327 | int fmt_length = xtensa_format_length (isa, fmt); | |
4328 | if (old_fmt == XTENSA_UNDEFINED | |
4329 | || fmt_length < xtensa_format_length (isa, old_fmt)) | |
4330 | op_single_fmt_table[opcode] = fmt; | |
4331 | } | |
4332 | } | |
4333 | } | |
4334 | xtensa_insnbuf_free (isa, ibuf); | |
4335 | } | |
4336 | ||
4337 | ||
4338 | static xtensa_format | |
4339 | get_single_format (xtensa_opcode opcode) | |
4340 | { | |
4341 | init_op_single_format_table (); | |
4342 | return op_single_fmt_table[opcode]; | |
4343 | } | |
e0001a05 | 4344 | |
e0001a05 | 4345 | |
43cd72b9 BW |
4346 | /* For the set of narrowable instructions we do NOT include the |
4347 | narrowings beqz -> beqz.n or bnez -> bnez.n because of complexities | |
4348 | involved during linker relaxation that may require these to | |
4349 | re-expand in some conditions. Also, the narrowing "or" -> mov.n | |
4350 | requires special case code to ensure it only works when op1 == op2. */ | |
e0001a05 | 4351 | |
7fa3d080 BW |
4352 | struct string_pair |
4353 | { | |
4354 | const char *wide; | |
4355 | const char *narrow; | |
4356 | }; | |
4357 | ||
43cd72b9 | 4358 | struct string_pair narrowable[] = |
e0001a05 | 4359 | { |
43cd72b9 BW |
4360 | { "add", "add.n" }, |
4361 | { "addi", "addi.n" }, | |
4362 | { "addmi", "addi.n" }, | |
4363 | { "l32i", "l32i.n" }, | |
4364 | { "movi", "movi.n" }, | |
4365 | { "ret", "ret.n" }, | |
4366 | { "retw", "retw.n" }, | |
4367 | { "s32i", "s32i.n" }, | |
4368 | { "or", "mov.n" } /* special case only when op1 == op2 */ | |
4369 | }; | |
e0001a05 | 4370 | |
43cd72b9 | 4371 | struct string_pair widenable[] = |
e0001a05 | 4372 | { |
43cd72b9 BW |
4373 | { "add", "add.n" }, |
4374 | { "addi", "addi.n" }, | |
4375 | { "addmi", "addi.n" }, | |
4376 | { "beqz", "beqz.n" }, | |
4377 | { "bnez", "bnez.n" }, | |
4378 | { "l32i", "l32i.n" }, | |
4379 | { "movi", "movi.n" }, | |
4380 | { "ret", "ret.n" }, | |
4381 | { "retw", "retw.n" }, | |
4382 | { "s32i", "s32i.n" }, | |
4383 | { "or", "mov.n" } /* special case only when op1 == op2 */ | |
4384 | }; | |
e0001a05 NC |
4385 | |
4386 | ||
64b607e6 BW |
4387 | /* Check if an instruction can be "narrowed", i.e., changed from a standard |
4388 | 3-byte instruction to a 2-byte "density" instruction. If it is valid, | |
4389 | return the instruction buffer holding the narrow instruction. Otherwise, | |
4390 | return 0. The set of valid narrowing are specified by a string table | |
43cd72b9 BW |
4391 | but require some special case operand checks in some cases. */ |
4392 | ||
64b607e6 BW |
4393 | static xtensa_insnbuf |
4394 | can_narrow_instruction (xtensa_insnbuf slotbuf, | |
4395 | xtensa_format fmt, | |
4396 | xtensa_opcode opcode) | |
e0001a05 | 4397 | { |
43cd72b9 | 4398 | xtensa_isa isa = xtensa_default_isa; |
64b607e6 BW |
4399 | xtensa_format o_fmt; |
4400 | unsigned opi; | |
e0001a05 | 4401 | |
43cd72b9 BW |
4402 | static xtensa_insnbuf o_insnbuf = NULL; |
4403 | static xtensa_insnbuf o_slotbuf = NULL; | |
e0001a05 | 4404 | |
64b607e6 | 4405 | if (o_insnbuf == NULL) |
43cd72b9 | 4406 | { |
43cd72b9 BW |
4407 | o_insnbuf = xtensa_insnbuf_alloc (isa); |
4408 | o_slotbuf = xtensa_insnbuf_alloc (isa); | |
4409 | } | |
e0001a05 | 4410 | |
64b607e6 | 4411 | for (opi = 0; opi < (sizeof (narrowable)/sizeof (struct string_pair)); opi++) |
43cd72b9 BW |
4412 | { |
4413 | bfd_boolean is_or = (strcmp ("or", narrowable[opi].wide) == 0); | |
e0001a05 | 4414 | |
43cd72b9 BW |
4415 | if (opcode == xtensa_opcode_lookup (isa, narrowable[opi].wide)) |
4416 | { | |
4417 | uint32 value, newval; | |
4418 | int i, operand_count, o_operand_count; | |
4419 | xtensa_opcode o_opcode; | |
e0001a05 | 4420 | |
43cd72b9 BW |
4421 | /* Address does not matter in this case. We might need to |
4422 | fix it to handle branches/jumps. */ | |
4423 | bfd_vma self_address = 0; | |
e0001a05 | 4424 | |
43cd72b9 BW |
4425 | o_opcode = xtensa_opcode_lookup (isa, narrowable[opi].narrow); |
4426 | if (o_opcode == XTENSA_UNDEFINED) | |
64b607e6 | 4427 | return 0; |
43cd72b9 BW |
4428 | o_fmt = get_single_format (o_opcode); |
4429 | if (o_fmt == XTENSA_UNDEFINED) | |
64b607e6 | 4430 | return 0; |
e0001a05 | 4431 | |
43cd72b9 BW |
4432 | if (xtensa_format_length (isa, fmt) != 3 |
4433 | || xtensa_format_length (isa, o_fmt) != 2) | |
64b607e6 | 4434 | return 0; |
e0001a05 | 4435 | |
43cd72b9 BW |
4436 | xtensa_format_encode (isa, o_fmt, o_insnbuf); |
4437 | operand_count = xtensa_opcode_num_operands (isa, opcode); | |
4438 | o_operand_count = xtensa_opcode_num_operands (isa, o_opcode); | |
e0001a05 | 4439 | |
43cd72b9 | 4440 | if (xtensa_opcode_encode (isa, o_fmt, 0, o_slotbuf, o_opcode) != 0) |
64b607e6 | 4441 | return 0; |
e0001a05 | 4442 | |
43cd72b9 BW |
4443 | if (!is_or) |
4444 | { | |
4445 | if (xtensa_opcode_num_operands (isa, o_opcode) != operand_count) | |
64b607e6 | 4446 | return 0; |
43cd72b9 BW |
4447 | } |
4448 | else | |
4449 | { | |
4450 | uint32 rawval0, rawval1, rawval2; | |
e0001a05 | 4451 | |
64b607e6 BW |
4452 | if (o_operand_count + 1 != operand_count |
4453 | || xtensa_operand_get_field (isa, opcode, 0, | |
4454 | fmt, 0, slotbuf, &rawval0) != 0 | |
4455 | || xtensa_operand_get_field (isa, opcode, 1, | |
4456 | fmt, 0, slotbuf, &rawval1) != 0 | |
4457 | || xtensa_operand_get_field (isa, opcode, 2, | |
4458 | fmt, 0, slotbuf, &rawval2) != 0 | |
4459 | || rawval1 != rawval2 | |
4460 | || rawval0 == rawval1 /* it is a nop */) | |
4461 | return 0; | |
43cd72b9 | 4462 | } |
e0001a05 | 4463 | |
43cd72b9 BW |
4464 | for (i = 0; i < o_operand_count; ++i) |
4465 | { | |
4466 | if (xtensa_operand_get_field (isa, opcode, i, fmt, 0, | |
4467 | slotbuf, &value) | |
4468 | || xtensa_operand_decode (isa, opcode, i, &value)) | |
64b607e6 | 4469 | return 0; |
e0001a05 | 4470 | |
43cd72b9 BW |
4471 | /* PC-relative branches need adjustment, but |
4472 | the PC-rel operand will always have a relocation. */ | |
4473 | newval = value; | |
4474 | if (xtensa_operand_do_reloc (isa, o_opcode, i, &newval, | |
4475 | self_address) | |
4476 | || xtensa_operand_encode (isa, o_opcode, i, &newval) | |
4477 | || xtensa_operand_set_field (isa, o_opcode, i, o_fmt, 0, | |
4478 | o_slotbuf, newval)) | |
64b607e6 | 4479 | return 0; |
43cd72b9 | 4480 | } |
e0001a05 | 4481 | |
64b607e6 BW |
4482 | if (xtensa_format_set_slot (isa, o_fmt, 0, o_insnbuf, o_slotbuf)) |
4483 | return 0; | |
e0001a05 | 4484 | |
64b607e6 | 4485 | return o_insnbuf; |
43cd72b9 BW |
4486 | } |
4487 | } | |
64b607e6 | 4488 | return 0; |
43cd72b9 | 4489 | } |
e0001a05 | 4490 | |
e0001a05 | 4491 | |
64b607e6 BW |
4492 | /* Attempt to narrow an instruction. If the narrowing is valid, perform |
4493 | the action in-place directly into the contents and return TRUE. Otherwise, | |
4494 | the return value is FALSE and the contents are not modified. */ | |
e0001a05 | 4495 | |
43cd72b9 | 4496 | static bfd_boolean |
64b607e6 BW |
4497 | narrow_instruction (bfd_byte *contents, |
4498 | bfd_size_type content_length, | |
4499 | bfd_size_type offset) | |
e0001a05 | 4500 | { |
43cd72b9 | 4501 | xtensa_opcode opcode; |
64b607e6 | 4502 | bfd_size_type insn_len; |
43cd72b9 | 4503 | xtensa_isa isa = xtensa_default_isa; |
64b607e6 BW |
4504 | xtensa_format fmt; |
4505 | xtensa_insnbuf o_insnbuf; | |
e0001a05 | 4506 | |
43cd72b9 BW |
4507 | static xtensa_insnbuf insnbuf = NULL; |
4508 | static xtensa_insnbuf slotbuf = NULL; | |
e0001a05 | 4509 | |
43cd72b9 BW |
4510 | if (insnbuf == NULL) |
4511 | { | |
4512 | insnbuf = xtensa_insnbuf_alloc (isa); | |
4513 | slotbuf = xtensa_insnbuf_alloc (isa); | |
43cd72b9 | 4514 | } |
e0001a05 | 4515 | |
43cd72b9 | 4516 | BFD_ASSERT (offset < content_length); |
2c8c90bc | 4517 | |
43cd72b9 | 4518 | if (content_length < 2) |
e0001a05 NC |
4519 | return FALSE; |
4520 | ||
64b607e6 | 4521 | /* We will hand-code a few of these for a little while. |
43cd72b9 BW |
4522 | These have all been specified in the assembler aleady. */ |
4523 | xtensa_insnbuf_from_chars (isa, insnbuf, &contents[offset], | |
4524 | content_length - offset); | |
4525 | fmt = xtensa_format_decode (isa, insnbuf); | |
4526 | if (xtensa_format_num_slots (isa, fmt) != 1) | |
e0001a05 NC |
4527 | return FALSE; |
4528 | ||
43cd72b9 | 4529 | if (xtensa_format_get_slot (isa, fmt, 0, insnbuf, slotbuf) != 0) |
e0001a05 NC |
4530 | return FALSE; |
4531 | ||
43cd72b9 BW |
4532 | opcode = xtensa_opcode_decode (isa, fmt, 0, slotbuf); |
4533 | if (opcode == XTENSA_UNDEFINED) | |
e0001a05 | 4534 | return FALSE; |
43cd72b9 BW |
4535 | insn_len = xtensa_format_length (isa, fmt); |
4536 | if (insn_len > content_length) | |
4537 | return FALSE; | |
4538 | ||
64b607e6 BW |
4539 | o_insnbuf = can_narrow_instruction (slotbuf, fmt, opcode); |
4540 | if (o_insnbuf) | |
4541 | { | |
4542 | xtensa_insnbuf_to_chars (isa, o_insnbuf, contents + offset, | |
4543 | content_length - offset); | |
4544 | return TRUE; | |
4545 | } | |
4546 | ||
4547 | return FALSE; | |
4548 | } | |
4549 | ||
4550 | ||
4551 | /* Check if an instruction can be "widened", i.e., changed from a 2-byte | |
4552 | "density" instruction to a standard 3-byte instruction. If it is valid, | |
4553 | return the instruction buffer holding the wide instruction. Otherwise, | |
4554 | return 0. The set of valid widenings are specified by a string table | |
4555 | but require some special case operand checks in some cases. */ | |
4556 | ||
4557 | static xtensa_insnbuf | |
4558 | can_widen_instruction (xtensa_insnbuf slotbuf, | |
4559 | xtensa_format fmt, | |
4560 | xtensa_opcode opcode) | |
4561 | { | |
4562 | xtensa_isa isa = xtensa_default_isa; | |
4563 | xtensa_format o_fmt; | |
4564 | unsigned opi; | |
4565 | ||
4566 | static xtensa_insnbuf o_insnbuf = NULL; | |
4567 | static xtensa_insnbuf o_slotbuf = NULL; | |
4568 | ||
4569 | if (o_insnbuf == NULL) | |
4570 | { | |
4571 | o_insnbuf = xtensa_insnbuf_alloc (isa); | |
4572 | o_slotbuf = xtensa_insnbuf_alloc (isa); | |
4573 | } | |
4574 | ||
4575 | for (opi = 0; opi < (sizeof (widenable)/sizeof (struct string_pair)); opi++) | |
e0001a05 | 4576 | { |
43cd72b9 BW |
4577 | bfd_boolean is_or = (strcmp ("or", widenable[opi].wide) == 0); |
4578 | bfd_boolean is_branch = (strcmp ("beqz", widenable[opi].wide) == 0 | |
4579 | || strcmp ("bnez", widenable[opi].wide) == 0); | |
e0001a05 | 4580 | |
43cd72b9 BW |
4581 | if (opcode == xtensa_opcode_lookup (isa, widenable[opi].narrow)) |
4582 | { | |
4583 | uint32 value, newval; | |
4584 | int i, operand_count, o_operand_count, check_operand_count; | |
4585 | xtensa_opcode o_opcode; | |
e0001a05 | 4586 | |
43cd72b9 BW |
4587 | /* Address does not matter in this case. We might need to fix it |
4588 | to handle branches/jumps. */ | |
4589 | bfd_vma self_address = 0; | |
e0001a05 | 4590 | |
43cd72b9 BW |
4591 | o_opcode = xtensa_opcode_lookup (isa, widenable[opi].wide); |
4592 | if (o_opcode == XTENSA_UNDEFINED) | |
64b607e6 | 4593 | return 0; |
43cd72b9 BW |
4594 | o_fmt = get_single_format (o_opcode); |
4595 | if (o_fmt == XTENSA_UNDEFINED) | |
64b607e6 | 4596 | return 0; |
e0001a05 | 4597 | |
43cd72b9 BW |
4598 | if (xtensa_format_length (isa, fmt) != 2 |
4599 | || xtensa_format_length (isa, o_fmt) != 3) | |
64b607e6 | 4600 | return 0; |
e0001a05 | 4601 | |
43cd72b9 BW |
4602 | xtensa_format_encode (isa, o_fmt, o_insnbuf); |
4603 | operand_count = xtensa_opcode_num_operands (isa, opcode); | |
4604 | o_operand_count = xtensa_opcode_num_operands (isa, o_opcode); | |
4605 | check_operand_count = o_operand_count; | |
e0001a05 | 4606 | |
43cd72b9 | 4607 | if (xtensa_opcode_encode (isa, o_fmt, 0, o_slotbuf, o_opcode) != 0) |
64b607e6 | 4608 | return 0; |
e0001a05 | 4609 | |
43cd72b9 BW |
4610 | if (!is_or) |
4611 | { | |
4612 | if (xtensa_opcode_num_operands (isa, o_opcode) != operand_count) | |
64b607e6 | 4613 | return 0; |
43cd72b9 BW |
4614 | } |
4615 | else | |
4616 | { | |
4617 | uint32 rawval0, rawval1; | |
4618 | ||
64b607e6 BW |
4619 | if (o_operand_count != operand_count + 1 |
4620 | || xtensa_operand_get_field (isa, opcode, 0, | |
4621 | fmt, 0, slotbuf, &rawval0) != 0 | |
4622 | || xtensa_operand_get_field (isa, opcode, 1, | |
4623 | fmt, 0, slotbuf, &rawval1) != 0 | |
4624 | || rawval0 == rawval1 /* it is a nop */) | |
4625 | return 0; | |
43cd72b9 BW |
4626 | } |
4627 | if (is_branch) | |
4628 | check_operand_count--; | |
4629 | ||
64b607e6 | 4630 | for (i = 0; i < check_operand_count; i++) |
43cd72b9 BW |
4631 | { |
4632 | int new_i = i; | |
4633 | if (is_or && i == o_operand_count - 1) | |
4634 | new_i = i - 1; | |
4635 | if (xtensa_operand_get_field (isa, opcode, new_i, fmt, 0, | |
4636 | slotbuf, &value) | |
4637 | || xtensa_operand_decode (isa, opcode, new_i, &value)) | |
64b607e6 | 4638 | return 0; |
43cd72b9 BW |
4639 | |
4640 | /* PC-relative branches need adjustment, but | |
4641 | the PC-rel operand will always have a relocation. */ | |
4642 | newval = value; | |
4643 | if (xtensa_operand_do_reloc (isa, o_opcode, i, &newval, | |
4644 | self_address) | |
4645 | || xtensa_operand_encode (isa, o_opcode, i, &newval) | |
4646 | || xtensa_operand_set_field (isa, o_opcode, i, o_fmt, 0, | |
4647 | o_slotbuf, newval)) | |
64b607e6 | 4648 | return 0; |
43cd72b9 BW |
4649 | } |
4650 | ||
4651 | if (xtensa_format_set_slot (isa, o_fmt, 0, o_insnbuf, o_slotbuf)) | |
64b607e6 | 4652 | return 0; |
43cd72b9 | 4653 | |
64b607e6 | 4654 | return o_insnbuf; |
43cd72b9 BW |
4655 | } |
4656 | } | |
64b607e6 BW |
4657 | return 0; |
4658 | } | |
4659 | ||
68ffbac6 | 4660 | |
64b607e6 BW |
4661 | /* Attempt to widen an instruction. If the widening is valid, perform |
4662 | the action in-place directly into the contents and return TRUE. Otherwise, | |
4663 | the return value is FALSE and the contents are not modified. */ | |
4664 | ||
4665 | static bfd_boolean | |
4666 | widen_instruction (bfd_byte *contents, | |
4667 | bfd_size_type content_length, | |
4668 | bfd_size_type offset) | |
4669 | { | |
4670 | xtensa_opcode opcode; | |
4671 | bfd_size_type insn_len; | |
4672 | xtensa_isa isa = xtensa_default_isa; | |
4673 | xtensa_format fmt; | |
4674 | xtensa_insnbuf o_insnbuf; | |
4675 | ||
4676 | static xtensa_insnbuf insnbuf = NULL; | |
4677 | static xtensa_insnbuf slotbuf = NULL; | |
4678 | ||
4679 | if (insnbuf == NULL) | |
4680 | { | |
4681 | insnbuf = xtensa_insnbuf_alloc (isa); | |
4682 | slotbuf = xtensa_insnbuf_alloc (isa); | |
4683 | } | |
4684 | ||
4685 | BFD_ASSERT (offset < content_length); | |
4686 | ||
4687 | if (content_length < 2) | |
4688 | return FALSE; | |
4689 | ||
4690 | /* We will hand-code a few of these for a little while. | |
4691 | These have all been specified in the assembler aleady. */ | |
4692 | xtensa_insnbuf_from_chars (isa, insnbuf, &contents[offset], | |
4693 | content_length - offset); | |
4694 | fmt = xtensa_format_decode (isa, insnbuf); | |
4695 | if (xtensa_format_num_slots (isa, fmt) != 1) | |
4696 | return FALSE; | |
4697 | ||
4698 | if (xtensa_format_get_slot (isa, fmt, 0, insnbuf, slotbuf) != 0) | |
4699 | return FALSE; | |
4700 | ||
4701 | opcode = xtensa_opcode_decode (isa, fmt, 0, slotbuf); | |
4702 | if (opcode == XTENSA_UNDEFINED) | |
4703 | return FALSE; | |
4704 | insn_len = xtensa_format_length (isa, fmt); | |
4705 | if (insn_len > content_length) | |
4706 | return FALSE; | |
4707 | ||
4708 | o_insnbuf = can_widen_instruction (slotbuf, fmt, opcode); | |
4709 | if (o_insnbuf) | |
4710 | { | |
4711 | xtensa_insnbuf_to_chars (isa, o_insnbuf, contents + offset, | |
4712 | content_length - offset); | |
4713 | return TRUE; | |
4714 | } | |
43cd72b9 | 4715 | return FALSE; |
e0001a05 NC |
4716 | } |
4717 | ||
43cd72b9 BW |
4718 | \f |
4719 | /* Code for transforming CALLs at link-time. */ | |
e0001a05 | 4720 | |
43cd72b9 | 4721 | static bfd_reloc_status_type |
7fa3d080 BW |
4722 | elf_xtensa_do_asm_simplify (bfd_byte *contents, |
4723 | bfd_vma address, | |
4724 | bfd_vma content_length, | |
4725 | char **error_message) | |
e0001a05 | 4726 | { |
43cd72b9 BW |
4727 | static xtensa_insnbuf insnbuf = NULL; |
4728 | static xtensa_insnbuf slotbuf = NULL; | |
4729 | xtensa_format core_format = XTENSA_UNDEFINED; | |
4730 | xtensa_opcode opcode; | |
4731 | xtensa_opcode direct_call_opcode; | |
4732 | xtensa_isa isa = xtensa_default_isa; | |
4733 | bfd_byte *chbuf = contents + address; | |
4734 | int opn; | |
e0001a05 | 4735 | |
43cd72b9 | 4736 | if (insnbuf == NULL) |
e0001a05 | 4737 | { |
43cd72b9 BW |
4738 | insnbuf = xtensa_insnbuf_alloc (isa); |
4739 | slotbuf = xtensa_insnbuf_alloc (isa); | |
e0001a05 | 4740 | } |
e0001a05 | 4741 | |
43cd72b9 BW |
4742 | if (content_length < address) |
4743 | { | |
38f14ab8 | 4744 | *error_message = _("attempt to convert L32R/CALLX to CALL failed"); |
43cd72b9 BW |
4745 | return bfd_reloc_other; |
4746 | } | |
e0001a05 | 4747 | |
43cd72b9 BW |
4748 | opcode = get_expanded_call_opcode (chbuf, content_length - address, 0); |
4749 | direct_call_opcode = swap_callx_for_call_opcode (opcode); | |
4750 | if (direct_call_opcode == XTENSA_UNDEFINED) | |
4751 | { | |
38f14ab8 | 4752 | *error_message = _("attempt to convert L32R/CALLX to CALL failed"); |
43cd72b9 BW |
4753 | return bfd_reloc_other; |
4754 | } | |
68ffbac6 | 4755 | |
43cd72b9 BW |
4756 | /* Assemble a NOP ("or a1, a1, a1") into the 0 byte offset. */ |
4757 | core_format = xtensa_format_lookup (isa, "x24"); | |
4758 | opcode = xtensa_opcode_lookup (isa, "or"); | |
4759 | xtensa_opcode_encode (isa, core_format, 0, slotbuf, opcode); | |
68ffbac6 | 4760 | for (opn = 0; opn < 3; opn++) |
43cd72b9 BW |
4761 | { |
4762 | uint32 regno = 1; | |
4763 | xtensa_operand_encode (isa, opcode, opn, ®no); | |
4764 | xtensa_operand_set_field (isa, opcode, opn, core_format, 0, | |
4765 | slotbuf, regno); | |
4766 | } | |
4767 | xtensa_format_encode (isa, core_format, insnbuf); | |
4768 | xtensa_format_set_slot (isa, core_format, 0, insnbuf, slotbuf); | |
4769 | xtensa_insnbuf_to_chars (isa, insnbuf, chbuf, content_length - address); | |
e0001a05 | 4770 | |
43cd72b9 BW |
4771 | /* Assemble a CALL ("callN 0") into the 3 byte offset. */ |
4772 | xtensa_opcode_encode (isa, core_format, 0, slotbuf, direct_call_opcode); | |
4773 | xtensa_operand_set_field (isa, opcode, 0, core_format, 0, slotbuf, 0); | |
e0001a05 | 4774 | |
43cd72b9 BW |
4775 | xtensa_format_encode (isa, core_format, insnbuf); |
4776 | xtensa_format_set_slot (isa, core_format, 0, insnbuf, slotbuf); | |
4777 | xtensa_insnbuf_to_chars (isa, insnbuf, chbuf + 3, | |
4778 | content_length - address - 3); | |
e0001a05 | 4779 | |
43cd72b9 BW |
4780 | return bfd_reloc_ok; |
4781 | } | |
e0001a05 | 4782 | |
e0001a05 | 4783 | |
43cd72b9 | 4784 | static bfd_reloc_status_type |
7fa3d080 BW |
4785 | contract_asm_expansion (bfd_byte *contents, |
4786 | bfd_vma content_length, | |
4787 | Elf_Internal_Rela *irel, | |
4788 | char **error_message) | |
43cd72b9 BW |
4789 | { |
4790 | bfd_reloc_status_type retval = | |
4791 | elf_xtensa_do_asm_simplify (contents, irel->r_offset, content_length, | |
4792 | error_message); | |
e0001a05 | 4793 | |
43cd72b9 BW |
4794 | if (retval != bfd_reloc_ok) |
4795 | return bfd_reloc_dangerous; | |
e0001a05 | 4796 | |
43cd72b9 BW |
4797 | /* Update the irel->r_offset field so that the right immediate and |
4798 | the right instruction are modified during the relocation. */ | |
4799 | irel->r_offset += 3; | |
4800 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_XTENSA_SLOT0_OP); | |
4801 | return bfd_reloc_ok; | |
4802 | } | |
e0001a05 | 4803 | |
e0001a05 | 4804 | |
43cd72b9 | 4805 | static xtensa_opcode |
7fa3d080 | 4806 | swap_callx_for_call_opcode (xtensa_opcode opcode) |
e0001a05 | 4807 | { |
43cd72b9 | 4808 | init_call_opcodes (); |
e0001a05 | 4809 | |
43cd72b9 BW |
4810 | if (opcode == callx0_op) return call0_op; |
4811 | if (opcode == callx4_op) return call4_op; | |
4812 | if (opcode == callx8_op) return call8_op; | |
4813 | if (opcode == callx12_op) return call12_op; | |
e0001a05 | 4814 | |
43cd72b9 BW |
4815 | /* Return XTENSA_UNDEFINED if the opcode is not an indirect call. */ |
4816 | return XTENSA_UNDEFINED; | |
4817 | } | |
e0001a05 | 4818 | |
e0001a05 | 4819 | |
43cd72b9 BW |
4820 | /* Check if "buf" is pointing to a "L32R aN; CALLX aN" or "CONST16 aN; |
4821 | CONST16 aN; CALLX aN" sequence, and if so, return the CALLX opcode. | |
4822 | If not, return XTENSA_UNDEFINED. */ | |
e0001a05 | 4823 | |
43cd72b9 BW |
4824 | #define L32R_TARGET_REG_OPERAND 0 |
4825 | #define CONST16_TARGET_REG_OPERAND 0 | |
4826 | #define CALLN_SOURCE_OPERAND 0 | |
e0001a05 | 4827 | |
68ffbac6 | 4828 | static xtensa_opcode |
7fa3d080 | 4829 | get_expanded_call_opcode (bfd_byte *buf, int bufsize, bfd_boolean *p_uses_l32r) |
e0001a05 | 4830 | { |
43cd72b9 BW |
4831 | static xtensa_insnbuf insnbuf = NULL; |
4832 | static xtensa_insnbuf slotbuf = NULL; | |
4833 | xtensa_format fmt; | |
4834 | xtensa_opcode opcode; | |
4835 | xtensa_isa isa = xtensa_default_isa; | |
4836 | uint32 regno, const16_regno, call_regno; | |
4837 | int offset = 0; | |
e0001a05 | 4838 | |
43cd72b9 | 4839 | if (insnbuf == NULL) |
e0001a05 | 4840 | { |
43cd72b9 BW |
4841 | insnbuf = xtensa_insnbuf_alloc (isa); |
4842 | slotbuf = xtensa_insnbuf_alloc (isa); | |
e0001a05 | 4843 | } |
43cd72b9 BW |
4844 | |
4845 | xtensa_insnbuf_from_chars (isa, insnbuf, buf, bufsize); | |
4846 | fmt = xtensa_format_decode (isa, insnbuf); | |
4847 | if (fmt == XTENSA_UNDEFINED | |
4848 | || xtensa_format_get_slot (isa, fmt, 0, insnbuf, slotbuf)) | |
4849 | return XTENSA_UNDEFINED; | |
4850 | ||
4851 | opcode = xtensa_opcode_decode (isa, fmt, 0, slotbuf); | |
4852 | if (opcode == XTENSA_UNDEFINED) | |
4853 | return XTENSA_UNDEFINED; | |
4854 | ||
4855 | if (opcode == get_l32r_opcode ()) | |
e0001a05 | 4856 | { |
43cd72b9 BW |
4857 | if (p_uses_l32r) |
4858 | *p_uses_l32r = TRUE; | |
4859 | if (xtensa_operand_get_field (isa, opcode, L32R_TARGET_REG_OPERAND, | |
4860 | fmt, 0, slotbuf, ®no) | |
4861 | || xtensa_operand_decode (isa, opcode, L32R_TARGET_REG_OPERAND, | |
4862 | ®no)) | |
4863 | return XTENSA_UNDEFINED; | |
e0001a05 | 4864 | } |
43cd72b9 | 4865 | else if (opcode == get_const16_opcode ()) |
e0001a05 | 4866 | { |
43cd72b9 BW |
4867 | if (p_uses_l32r) |
4868 | *p_uses_l32r = FALSE; | |
4869 | if (xtensa_operand_get_field (isa, opcode, CONST16_TARGET_REG_OPERAND, | |
4870 | fmt, 0, slotbuf, ®no) | |
4871 | || xtensa_operand_decode (isa, opcode, CONST16_TARGET_REG_OPERAND, | |
4872 | ®no)) | |
4873 | return XTENSA_UNDEFINED; | |
4874 | ||
4875 | /* Check that the next instruction is also CONST16. */ | |
4876 | offset += xtensa_format_length (isa, fmt); | |
4877 | xtensa_insnbuf_from_chars (isa, insnbuf, buf + offset, bufsize - offset); | |
4878 | fmt = xtensa_format_decode (isa, insnbuf); | |
4879 | if (fmt == XTENSA_UNDEFINED | |
4880 | || xtensa_format_get_slot (isa, fmt, 0, insnbuf, slotbuf)) | |
4881 | return XTENSA_UNDEFINED; | |
4882 | opcode = xtensa_opcode_decode (isa, fmt, 0, slotbuf); | |
4883 | if (opcode != get_const16_opcode ()) | |
4884 | return XTENSA_UNDEFINED; | |
4885 | ||
4886 | if (xtensa_operand_get_field (isa, opcode, CONST16_TARGET_REG_OPERAND, | |
4887 | fmt, 0, slotbuf, &const16_regno) | |
4888 | || xtensa_operand_decode (isa, opcode, CONST16_TARGET_REG_OPERAND, | |
4889 | &const16_regno) | |
4890 | || const16_regno != regno) | |
4891 | return XTENSA_UNDEFINED; | |
e0001a05 | 4892 | } |
43cd72b9 BW |
4893 | else |
4894 | return XTENSA_UNDEFINED; | |
e0001a05 | 4895 | |
43cd72b9 BW |
4896 | /* Next instruction should be an CALLXn with operand 0 == regno. */ |
4897 | offset += xtensa_format_length (isa, fmt); | |
4898 | xtensa_insnbuf_from_chars (isa, insnbuf, buf + offset, bufsize - offset); | |
4899 | fmt = xtensa_format_decode (isa, insnbuf); | |
4900 | if (fmt == XTENSA_UNDEFINED | |
4901 | || xtensa_format_get_slot (isa, fmt, 0, insnbuf, slotbuf)) | |
4902 | return XTENSA_UNDEFINED; | |
4903 | opcode = xtensa_opcode_decode (isa, fmt, 0, slotbuf); | |
68ffbac6 | 4904 | if (opcode == XTENSA_UNDEFINED |
43cd72b9 BW |
4905 | || !is_indirect_call_opcode (opcode)) |
4906 | return XTENSA_UNDEFINED; | |
e0001a05 | 4907 | |
43cd72b9 BW |
4908 | if (xtensa_operand_get_field (isa, opcode, CALLN_SOURCE_OPERAND, |
4909 | fmt, 0, slotbuf, &call_regno) | |
4910 | || xtensa_operand_decode (isa, opcode, CALLN_SOURCE_OPERAND, | |
4911 | &call_regno)) | |
4912 | return XTENSA_UNDEFINED; | |
e0001a05 | 4913 | |
43cd72b9 BW |
4914 | if (call_regno != regno) |
4915 | return XTENSA_UNDEFINED; | |
e0001a05 | 4916 | |
43cd72b9 BW |
4917 | return opcode; |
4918 | } | |
e0001a05 | 4919 | |
43cd72b9 BW |
4920 | \f |
4921 | /* Data structures used during relaxation. */ | |
e0001a05 | 4922 | |
43cd72b9 | 4923 | /* r_reloc: relocation values. */ |
e0001a05 | 4924 | |
43cd72b9 BW |
4925 | /* Through the relaxation process, we need to keep track of the values |
4926 | that will result from evaluating relocations. The standard ELF | |
4927 | relocation structure is not sufficient for this purpose because we're | |
4928 | operating on multiple input files at once, so we need to know which | |
4929 | input file a relocation refers to. The r_reloc structure thus | |
4930 | records both the input file (bfd) and ELF relocation. | |
e0001a05 | 4931 | |
43cd72b9 BW |
4932 | For efficiency, an r_reloc also contains a "target_offset" field to |
4933 | cache the target-section-relative offset value that is represented by | |
4934 | the relocation. | |
68ffbac6 | 4935 | |
43cd72b9 BW |
4936 | The r_reloc also contains a virtual offset that allows multiple |
4937 | inserted literals to be placed at the same "address" with | |
4938 | different offsets. */ | |
e0001a05 | 4939 | |
43cd72b9 | 4940 | typedef struct r_reloc_struct r_reloc; |
e0001a05 | 4941 | |
43cd72b9 | 4942 | struct r_reloc_struct |
e0001a05 | 4943 | { |
43cd72b9 BW |
4944 | bfd *abfd; |
4945 | Elf_Internal_Rela rela; | |
e0001a05 | 4946 | bfd_vma target_offset; |
43cd72b9 | 4947 | bfd_vma virtual_offset; |
e0001a05 NC |
4948 | }; |
4949 | ||
e0001a05 | 4950 | |
43cd72b9 BW |
4951 | /* The r_reloc structure is included by value in literal_value, but not |
4952 | every literal_value has an associated relocation -- some are simple | |
4953 | constants. In such cases, we set all the fields in the r_reloc | |
4954 | struct to zero. The r_reloc_is_const function should be used to | |
4955 | detect this case. */ | |
e0001a05 | 4956 | |
43cd72b9 | 4957 | static bfd_boolean |
7fa3d080 | 4958 | r_reloc_is_const (const r_reloc *r_rel) |
e0001a05 | 4959 | { |
43cd72b9 | 4960 | return (r_rel->abfd == NULL); |
e0001a05 NC |
4961 | } |
4962 | ||
4963 | ||
43cd72b9 | 4964 | static bfd_vma |
7fa3d080 | 4965 | r_reloc_get_target_offset (const r_reloc *r_rel) |
e0001a05 | 4966 | { |
43cd72b9 BW |
4967 | bfd_vma target_offset; |
4968 | unsigned long r_symndx; | |
e0001a05 | 4969 | |
43cd72b9 BW |
4970 | BFD_ASSERT (!r_reloc_is_const (r_rel)); |
4971 | r_symndx = ELF32_R_SYM (r_rel->rela.r_info); | |
4972 | target_offset = get_elf_r_symndx_offset (r_rel->abfd, r_symndx); | |
4973 | return (target_offset + r_rel->rela.r_addend); | |
4974 | } | |
e0001a05 | 4975 | |
e0001a05 | 4976 | |
43cd72b9 | 4977 | static struct elf_link_hash_entry * |
7fa3d080 | 4978 | r_reloc_get_hash_entry (const r_reloc *r_rel) |
e0001a05 | 4979 | { |
43cd72b9 BW |
4980 | unsigned long r_symndx = ELF32_R_SYM (r_rel->rela.r_info); |
4981 | return get_elf_r_symndx_hash_entry (r_rel->abfd, r_symndx); | |
4982 | } | |
e0001a05 | 4983 | |
43cd72b9 BW |
4984 | |
4985 | static asection * | |
7fa3d080 | 4986 | r_reloc_get_section (const r_reloc *r_rel) |
43cd72b9 BW |
4987 | { |
4988 | unsigned long r_symndx = ELF32_R_SYM (r_rel->rela.r_info); | |
4989 | return get_elf_r_symndx_section (r_rel->abfd, r_symndx); | |
4990 | } | |
e0001a05 NC |
4991 | |
4992 | ||
4993 | static bfd_boolean | |
7fa3d080 | 4994 | r_reloc_is_defined (const r_reloc *r_rel) |
e0001a05 | 4995 | { |
43cd72b9 BW |
4996 | asection *sec; |
4997 | if (r_rel == NULL) | |
e0001a05 | 4998 | return FALSE; |
e0001a05 | 4999 | |
43cd72b9 BW |
5000 | sec = r_reloc_get_section (r_rel); |
5001 | if (sec == bfd_abs_section_ptr | |
5002 | || sec == bfd_com_section_ptr | |
5003 | || sec == bfd_und_section_ptr) | |
5004 | return FALSE; | |
5005 | return TRUE; | |
e0001a05 NC |
5006 | } |
5007 | ||
5008 | ||
7fa3d080 BW |
5009 | static void |
5010 | r_reloc_init (r_reloc *r_rel, | |
5011 | bfd *abfd, | |
5012 | Elf_Internal_Rela *irel, | |
5013 | bfd_byte *contents, | |
5014 | bfd_size_type content_length) | |
5015 | { | |
5016 | int r_type; | |
5017 | reloc_howto_type *howto; | |
5018 | ||
5019 | if (irel) | |
5020 | { | |
5021 | r_rel->rela = *irel; | |
5022 | r_rel->abfd = abfd; | |
5023 | r_rel->target_offset = r_reloc_get_target_offset (r_rel); | |
5024 | r_rel->virtual_offset = 0; | |
5025 | r_type = ELF32_R_TYPE (r_rel->rela.r_info); | |
5026 | howto = &elf_howto_table[r_type]; | |
5027 | if (howto->partial_inplace) | |
5028 | { | |
5029 | bfd_vma inplace_val; | |
5030 | BFD_ASSERT (r_rel->rela.r_offset < content_length); | |
5031 | ||
5032 | inplace_val = bfd_get_32 (abfd, &contents[r_rel->rela.r_offset]); | |
5033 | r_rel->target_offset += inplace_val; | |
5034 | } | |
5035 | } | |
5036 | else | |
5037 | memset (r_rel, 0, sizeof (r_reloc)); | |
5038 | } | |
5039 | ||
5040 | ||
43cd72b9 BW |
5041 | #if DEBUG |
5042 | ||
e0001a05 | 5043 | static void |
7fa3d080 | 5044 | print_r_reloc (FILE *fp, const r_reloc *r_rel) |
e0001a05 | 5045 | { |
43cd72b9 BW |
5046 | if (r_reloc_is_defined (r_rel)) |
5047 | { | |
5048 | asection *sec = r_reloc_get_section (r_rel); | |
5049 | fprintf (fp, " %s(%s + ", sec->owner->filename, sec->name); | |
5050 | } | |
5051 | else if (r_reloc_get_hash_entry (r_rel)) | |
5052 | fprintf (fp, " %s + ", r_reloc_get_hash_entry (r_rel)->root.root.string); | |
5053 | else | |
5054 | fprintf (fp, " ?? + "); | |
e0001a05 | 5055 | |
43cd72b9 BW |
5056 | fprintf_vma (fp, r_rel->target_offset); |
5057 | if (r_rel->virtual_offset) | |
5058 | { | |
5059 | fprintf (fp, " + "); | |
5060 | fprintf_vma (fp, r_rel->virtual_offset); | |
5061 | } | |
68ffbac6 | 5062 | |
43cd72b9 BW |
5063 | fprintf (fp, ")"); |
5064 | } | |
e0001a05 | 5065 | |
43cd72b9 | 5066 | #endif /* DEBUG */ |
e0001a05 | 5067 | |
43cd72b9 BW |
5068 | \f |
5069 | /* source_reloc: relocations that reference literals. */ | |
e0001a05 | 5070 | |
43cd72b9 BW |
5071 | /* To determine whether literals can be coalesced, we need to first |
5072 | record all the relocations that reference the literals. The | |
5073 | source_reloc structure below is used for this purpose. The | |
5074 | source_reloc entries are kept in a per-literal-section array, sorted | |
5075 | by offset within the literal section (i.e., target offset). | |
e0001a05 | 5076 | |
43cd72b9 BW |
5077 | The source_sec and r_rel.rela.r_offset fields identify the source of |
5078 | the relocation. The r_rel field records the relocation value, i.e., | |
5079 | the offset of the literal being referenced. The opnd field is needed | |
5080 | to determine the range of the immediate field to which the relocation | |
5081 | applies, so we can determine whether another literal with the same | |
5082 | value is within range. The is_null field is true when the relocation | |
5083 | is being removed (e.g., when an L32R is being removed due to a CALLX | |
5084 | that is converted to a direct CALL). */ | |
e0001a05 | 5085 | |
43cd72b9 BW |
5086 | typedef struct source_reloc_struct source_reloc; |
5087 | ||
5088 | struct source_reloc_struct | |
e0001a05 | 5089 | { |
43cd72b9 BW |
5090 | asection *source_sec; |
5091 | r_reloc r_rel; | |
5092 | xtensa_opcode opcode; | |
5093 | int opnd; | |
5094 | bfd_boolean is_null; | |
5095 | bfd_boolean is_abs_literal; | |
5096 | }; | |
e0001a05 | 5097 | |
e0001a05 | 5098 | |
e0001a05 | 5099 | static void |
7fa3d080 BW |
5100 | init_source_reloc (source_reloc *reloc, |
5101 | asection *source_sec, | |
5102 | const r_reloc *r_rel, | |
5103 | xtensa_opcode opcode, | |
5104 | int opnd, | |
5105 | bfd_boolean is_abs_literal) | |
e0001a05 | 5106 | { |
43cd72b9 BW |
5107 | reloc->source_sec = source_sec; |
5108 | reloc->r_rel = *r_rel; | |
5109 | reloc->opcode = opcode; | |
5110 | reloc->opnd = opnd; | |
5111 | reloc->is_null = FALSE; | |
5112 | reloc->is_abs_literal = is_abs_literal; | |
e0001a05 NC |
5113 | } |
5114 | ||
e0001a05 | 5115 | |
43cd72b9 BW |
5116 | /* Find the source_reloc for a particular source offset and relocation |
5117 | type. Note that the array is sorted by _target_ offset, so this is | |
5118 | just a linear search. */ | |
e0001a05 | 5119 | |
43cd72b9 | 5120 | static source_reloc * |
7fa3d080 BW |
5121 | find_source_reloc (source_reloc *src_relocs, |
5122 | int src_count, | |
5123 | asection *sec, | |
5124 | Elf_Internal_Rela *irel) | |
e0001a05 | 5125 | { |
43cd72b9 | 5126 | int i; |
e0001a05 | 5127 | |
43cd72b9 BW |
5128 | for (i = 0; i < src_count; i++) |
5129 | { | |
5130 | if (src_relocs[i].source_sec == sec | |
5131 | && src_relocs[i].r_rel.rela.r_offset == irel->r_offset | |
5132 | && (ELF32_R_TYPE (src_relocs[i].r_rel.rela.r_info) | |
5133 | == ELF32_R_TYPE (irel->r_info))) | |
5134 | return &src_relocs[i]; | |
5135 | } | |
e0001a05 | 5136 | |
43cd72b9 | 5137 | return NULL; |
e0001a05 NC |
5138 | } |
5139 | ||
5140 | ||
43cd72b9 | 5141 | static int |
7fa3d080 | 5142 | source_reloc_compare (const void *ap, const void *bp) |
e0001a05 | 5143 | { |
43cd72b9 BW |
5144 | const source_reloc *a = (const source_reloc *) ap; |
5145 | const source_reloc *b = (const source_reloc *) bp; | |
e0001a05 | 5146 | |
43cd72b9 BW |
5147 | if (a->r_rel.target_offset != b->r_rel.target_offset) |
5148 | return (a->r_rel.target_offset - b->r_rel.target_offset); | |
e0001a05 | 5149 | |
43cd72b9 BW |
5150 | /* We don't need to sort on these criteria for correctness, |
5151 | but enforcing a more strict ordering prevents unstable qsort | |
5152 | from behaving differently with different implementations. | |
5153 | Without the code below we get correct but different results | |
5154 | on Solaris 2.7 and 2.8. We would like to always produce the | |
5155 | same results no matter the host. */ | |
5156 | ||
5157 | if ((!a->is_null) - (!b->is_null)) | |
5158 | return ((!a->is_null) - (!b->is_null)); | |
5159 | return internal_reloc_compare (&a->r_rel.rela, &b->r_rel.rela); | |
e0001a05 NC |
5160 | } |
5161 | ||
43cd72b9 BW |
5162 | \f |
5163 | /* Literal values and value hash tables. */ | |
e0001a05 | 5164 | |
43cd72b9 BW |
5165 | /* Literals with the same value can be coalesced. The literal_value |
5166 | structure records the value of a literal: the "r_rel" field holds the | |
5167 | information from the relocation on the literal (if there is one) and | |
5168 | the "value" field holds the contents of the literal word itself. | |
e0001a05 | 5169 | |
43cd72b9 BW |
5170 | The value_map structure records a literal value along with the |
5171 | location of a literal holding that value. The value_map hash table | |
5172 | is indexed by the literal value, so that we can quickly check if a | |
5173 | particular literal value has been seen before and is thus a candidate | |
5174 | for coalescing. */ | |
e0001a05 | 5175 | |
43cd72b9 BW |
5176 | typedef struct literal_value_struct literal_value; |
5177 | typedef struct value_map_struct value_map; | |
5178 | typedef struct value_map_hash_table_struct value_map_hash_table; | |
e0001a05 | 5179 | |
43cd72b9 | 5180 | struct literal_value_struct |
e0001a05 | 5181 | { |
68ffbac6 | 5182 | r_reloc r_rel; |
43cd72b9 BW |
5183 | unsigned long value; |
5184 | bfd_boolean is_abs_literal; | |
5185 | }; | |
5186 | ||
5187 | struct value_map_struct | |
5188 | { | |
5189 | literal_value val; /* The literal value. */ | |
5190 | r_reloc loc; /* Location of the literal. */ | |
5191 | value_map *next; | |
5192 | }; | |
5193 | ||
5194 | struct value_map_hash_table_struct | |
5195 | { | |
5196 | unsigned bucket_count; | |
5197 | value_map **buckets; | |
5198 | unsigned count; | |
5199 | bfd_boolean has_last_loc; | |
5200 | r_reloc last_loc; | |
5201 | }; | |
5202 | ||
5203 | ||
e0001a05 | 5204 | static void |
7fa3d080 BW |
5205 | init_literal_value (literal_value *lit, |
5206 | const r_reloc *r_rel, | |
5207 | unsigned long value, | |
5208 | bfd_boolean is_abs_literal) | |
e0001a05 | 5209 | { |
43cd72b9 BW |
5210 | lit->r_rel = *r_rel; |
5211 | lit->value = value; | |
5212 | lit->is_abs_literal = is_abs_literal; | |
e0001a05 NC |
5213 | } |
5214 | ||
5215 | ||
43cd72b9 | 5216 | static bfd_boolean |
7fa3d080 BW |
5217 | literal_value_equal (const literal_value *src1, |
5218 | const literal_value *src2, | |
5219 | bfd_boolean final_static_link) | |
e0001a05 | 5220 | { |
43cd72b9 | 5221 | struct elf_link_hash_entry *h1, *h2; |
e0001a05 | 5222 | |
68ffbac6 | 5223 | if (r_reloc_is_const (&src1->r_rel) != r_reloc_is_const (&src2->r_rel)) |
43cd72b9 | 5224 | return FALSE; |
e0001a05 | 5225 | |
43cd72b9 BW |
5226 | if (r_reloc_is_const (&src1->r_rel)) |
5227 | return (src1->value == src2->value); | |
e0001a05 | 5228 | |
43cd72b9 BW |
5229 | if (ELF32_R_TYPE (src1->r_rel.rela.r_info) |
5230 | != ELF32_R_TYPE (src2->r_rel.rela.r_info)) | |
5231 | return FALSE; | |
e0001a05 | 5232 | |
43cd72b9 BW |
5233 | if (src1->r_rel.target_offset != src2->r_rel.target_offset) |
5234 | return FALSE; | |
68ffbac6 | 5235 | |
43cd72b9 BW |
5236 | if (src1->r_rel.virtual_offset != src2->r_rel.virtual_offset) |
5237 | return FALSE; | |
5238 | ||
5239 | if (src1->value != src2->value) | |
5240 | return FALSE; | |
68ffbac6 | 5241 | |
43cd72b9 BW |
5242 | /* Now check for the same section (if defined) or the same elf_hash |
5243 | (if undefined or weak). */ | |
5244 | h1 = r_reloc_get_hash_entry (&src1->r_rel); | |
5245 | h2 = r_reloc_get_hash_entry (&src2->r_rel); | |
5246 | if (r_reloc_is_defined (&src1->r_rel) | |
5247 | && (final_static_link | |
5248 | || ((!h1 || h1->root.type != bfd_link_hash_defweak) | |
5249 | && (!h2 || h2->root.type != bfd_link_hash_defweak)))) | |
5250 | { | |
5251 | if (r_reloc_get_section (&src1->r_rel) | |
5252 | != r_reloc_get_section (&src2->r_rel)) | |
5253 | return FALSE; | |
5254 | } | |
5255 | else | |
5256 | { | |
5257 | /* Require that the hash entries (i.e., symbols) be identical. */ | |
5258 | if (h1 != h2 || h1 == 0) | |
5259 | return FALSE; | |
5260 | } | |
5261 | ||
5262 | if (src1->is_abs_literal != src2->is_abs_literal) | |
5263 | return FALSE; | |
5264 | ||
5265 | return TRUE; | |
e0001a05 NC |
5266 | } |
5267 | ||
e0001a05 | 5268 | |
43cd72b9 BW |
5269 | /* Must be power of 2. */ |
5270 | #define INITIAL_HASH_RELOC_BUCKET_COUNT 1024 | |
e0001a05 | 5271 | |
43cd72b9 | 5272 | static value_map_hash_table * |
7fa3d080 | 5273 | value_map_hash_table_init (void) |
43cd72b9 BW |
5274 | { |
5275 | value_map_hash_table *values; | |
e0001a05 | 5276 | |
43cd72b9 BW |
5277 | values = (value_map_hash_table *) |
5278 | bfd_zmalloc (sizeof (value_map_hash_table)); | |
5279 | values->bucket_count = INITIAL_HASH_RELOC_BUCKET_COUNT; | |
5280 | values->count = 0; | |
5281 | values->buckets = (value_map **) | |
5282 | bfd_zmalloc (sizeof (value_map *) * values->bucket_count); | |
68ffbac6 | 5283 | if (values->buckets == NULL) |
43cd72b9 BW |
5284 | { |
5285 | free (values); | |
5286 | return NULL; | |
5287 | } | |
5288 | values->has_last_loc = FALSE; | |
5289 | ||
5290 | return values; | |
5291 | } | |
5292 | ||
5293 | ||
5294 | static void | |
7fa3d080 | 5295 | value_map_hash_table_delete (value_map_hash_table *table) |
e0001a05 | 5296 | { |
43cd72b9 BW |
5297 | free (table->buckets); |
5298 | free (table); | |
5299 | } | |
5300 | ||
5301 | ||
5302 | static unsigned | |
7fa3d080 | 5303 | hash_bfd_vma (bfd_vma val) |
43cd72b9 BW |
5304 | { |
5305 | return (val >> 2) + (val >> 10); | |
5306 | } | |
5307 | ||
5308 | ||
5309 | static unsigned | |
7fa3d080 | 5310 | literal_value_hash (const literal_value *src) |
43cd72b9 BW |
5311 | { |
5312 | unsigned hash_val; | |
e0001a05 | 5313 | |
43cd72b9 BW |
5314 | hash_val = hash_bfd_vma (src->value); |
5315 | if (!r_reloc_is_const (&src->r_rel)) | |
e0001a05 | 5316 | { |
43cd72b9 BW |
5317 | void *sec_or_hash; |
5318 | ||
5319 | hash_val += hash_bfd_vma (src->is_abs_literal * 1000); | |
5320 | hash_val += hash_bfd_vma (src->r_rel.target_offset); | |
5321 | hash_val += hash_bfd_vma (src->r_rel.virtual_offset); | |
68ffbac6 | 5322 | |
43cd72b9 BW |
5323 | /* Now check for the same section and the same elf_hash. */ |
5324 | if (r_reloc_is_defined (&src->r_rel)) | |
5325 | sec_or_hash = r_reloc_get_section (&src->r_rel); | |
5326 | else | |
5327 | sec_or_hash = r_reloc_get_hash_entry (&src->r_rel); | |
f60ca5e3 | 5328 | hash_val += hash_bfd_vma ((bfd_vma) (size_t) sec_or_hash); |
e0001a05 | 5329 | } |
43cd72b9 BW |
5330 | return hash_val; |
5331 | } | |
e0001a05 | 5332 | |
e0001a05 | 5333 | |
43cd72b9 | 5334 | /* Check if the specified literal_value has been seen before. */ |
e0001a05 | 5335 | |
43cd72b9 | 5336 | static value_map * |
7fa3d080 BW |
5337 | value_map_get_cached_value (value_map_hash_table *map, |
5338 | const literal_value *val, | |
5339 | bfd_boolean final_static_link) | |
43cd72b9 BW |
5340 | { |
5341 | value_map *map_e; | |
5342 | value_map *bucket; | |
5343 | unsigned idx; | |
5344 | ||
5345 | idx = literal_value_hash (val); | |
5346 | idx = idx & (map->bucket_count - 1); | |
5347 | bucket = map->buckets[idx]; | |
5348 | for (map_e = bucket; map_e; map_e = map_e->next) | |
e0001a05 | 5349 | { |
43cd72b9 BW |
5350 | if (literal_value_equal (&map_e->val, val, final_static_link)) |
5351 | return map_e; | |
5352 | } | |
5353 | return NULL; | |
5354 | } | |
e0001a05 | 5355 | |
e0001a05 | 5356 | |
43cd72b9 BW |
5357 | /* Record a new literal value. It is illegal to call this if VALUE |
5358 | already has an entry here. */ | |
5359 | ||
5360 | static value_map * | |
7fa3d080 BW |
5361 | add_value_map (value_map_hash_table *map, |
5362 | const literal_value *val, | |
5363 | const r_reloc *loc, | |
5364 | bfd_boolean final_static_link) | |
43cd72b9 BW |
5365 | { |
5366 | value_map **bucket_p; | |
5367 | unsigned idx; | |
5368 | ||
5369 | value_map *val_e = (value_map *) bfd_zmalloc (sizeof (value_map)); | |
5370 | if (val_e == NULL) | |
5371 | { | |
5372 | bfd_set_error (bfd_error_no_memory); | |
5373 | return NULL; | |
e0001a05 NC |
5374 | } |
5375 | ||
43cd72b9 BW |
5376 | BFD_ASSERT (!value_map_get_cached_value (map, val, final_static_link)); |
5377 | val_e->val = *val; | |
5378 | val_e->loc = *loc; | |
5379 | ||
5380 | idx = literal_value_hash (val); | |
5381 | idx = idx & (map->bucket_count - 1); | |
5382 | bucket_p = &map->buckets[idx]; | |
5383 | ||
5384 | val_e->next = *bucket_p; | |
5385 | *bucket_p = val_e; | |
5386 | map->count++; | |
5387 | /* FIXME: Consider resizing the hash table if we get too many entries. */ | |
68ffbac6 | 5388 | |
43cd72b9 | 5389 | return val_e; |
e0001a05 NC |
5390 | } |
5391 | ||
43cd72b9 BW |
5392 | \f |
5393 | /* Lists of text actions (ta_) for narrowing, widening, longcall | |
5394 | conversion, space fill, code & literal removal, etc. */ | |
5395 | ||
5396 | /* The following text actions are generated: | |
5397 | ||
07d6d2b8 AM |
5398 | "ta_remove_insn" remove an instruction or instructions |
5399 | "ta_remove_longcall" convert longcall to call | |
43cd72b9 | 5400 | "ta_convert_longcall" convert longcall to nop/call |
07d6d2b8 AM |
5401 | "ta_narrow_insn" narrow a wide instruction |
5402 | "ta_widen" widen a narrow instruction | |
5403 | "ta_fill" add fill or remove fill | |
43cd72b9 BW |
5404 | removed < 0 is a fill; branches to the fill address will be |
5405 | changed to address + fill size (e.g., address - removed) | |
5406 | removed >= 0 branches to the fill address will stay unchanged | |
07d6d2b8 | 5407 | "ta_remove_literal" remove a literal; this action is |
43cd72b9 | 5408 | indicated when a literal is removed |
07d6d2b8 AM |
5409 | or replaced. |
5410 | "ta_add_literal" insert a new literal; this action is | |
5411 | indicated when a literal has been moved. | |
5412 | It may use a virtual_offset because | |
43cd72b9 | 5413 | multiple literals can be placed at the |
07d6d2b8 | 5414 | same location. |
43cd72b9 BW |
5415 | |
5416 | For each of these text actions, we also record the number of bytes | |
5417 | removed by performing the text action. In the case of a "ta_widen" | |
5418 | or a "ta_fill" that adds space, the removed_bytes will be negative. */ | |
5419 | ||
5420 | typedef struct text_action_struct text_action; | |
5421 | typedef struct text_action_list_struct text_action_list; | |
5422 | typedef enum text_action_enum_t text_action_t; | |
5423 | ||
5424 | enum text_action_enum_t | |
5425 | { | |
5426 | ta_none, | |
07d6d2b8 AM |
5427 | ta_remove_insn, /* removed = -size */ |
5428 | ta_remove_longcall, /* removed = -size */ | |
5429 | ta_convert_longcall, /* removed = 0 */ | |
5430 | ta_narrow_insn, /* removed = -1 */ | |
5431 | ta_widen_insn, /* removed = +1 */ | |
5432 | ta_fill, /* removed = +size */ | |
43cd72b9 BW |
5433 | ta_remove_literal, |
5434 | ta_add_literal | |
5435 | }; | |
e0001a05 | 5436 | |
e0001a05 | 5437 | |
43cd72b9 BW |
5438 | /* Structure for a text action record. */ |
5439 | struct text_action_struct | |
e0001a05 | 5440 | { |
43cd72b9 BW |
5441 | text_action_t action; |
5442 | asection *sec; /* Optional */ | |
5443 | bfd_vma offset; | |
5444 | bfd_vma virtual_offset; /* Zero except for adding literals. */ | |
5445 | int removed_bytes; | |
5446 | literal_value value; /* Only valid when adding literals. */ | |
43cd72b9 | 5447 | }; |
e0001a05 | 5448 | |
071aa5c9 MF |
5449 | struct removal_by_action_entry_struct |
5450 | { | |
5451 | bfd_vma offset; | |
5452 | int removed; | |
5453 | int eq_removed; | |
5454 | int eq_removed_before_fill; | |
5455 | }; | |
5456 | typedef struct removal_by_action_entry_struct removal_by_action_entry; | |
5457 | ||
5458 | struct removal_by_action_map_struct | |
5459 | { | |
5460 | unsigned n_entries; | |
5461 | removal_by_action_entry *entry; | |
5462 | }; | |
5463 | typedef struct removal_by_action_map_struct removal_by_action_map; | |
5464 | ||
e0001a05 | 5465 | |
43cd72b9 BW |
5466 | /* List of all of the actions taken on a text section. */ |
5467 | struct text_action_list_struct | |
5468 | { | |
4c2af04f MF |
5469 | unsigned count; |
5470 | splay_tree tree; | |
071aa5c9 | 5471 | removal_by_action_map map; |
43cd72b9 | 5472 | }; |
e0001a05 | 5473 | |
e0001a05 | 5474 | |
7fa3d080 BW |
5475 | static text_action * |
5476 | find_fill_action (text_action_list *l, asection *sec, bfd_vma offset) | |
43cd72b9 | 5477 | { |
4c2af04f | 5478 | text_action a; |
43cd72b9 BW |
5479 | |
5480 | /* It is not necessary to fill at the end of a section. */ | |
5481 | if (sec->size == offset) | |
5482 | return NULL; | |
5483 | ||
4c2af04f MF |
5484 | a.offset = offset; |
5485 | a.action = ta_fill; | |
5486 | ||
5487 | splay_tree_node node = splay_tree_lookup (l->tree, (splay_tree_key)&a); | |
5488 | if (node) | |
5489 | return (text_action *)node->value; | |
43cd72b9 BW |
5490 | return NULL; |
5491 | } | |
5492 | ||
5493 | ||
5494 | static int | |
7fa3d080 BW |
5495 | compute_removed_action_diff (const text_action *ta, |
5496 | asection *sec, | |
5497 | bfd_vma offset, | |
5498 | int removed, | |
5499 | int removable_space) | |
43cd72b9 BW |
5500 | { |
5501 | int new_removed; | |
5502 | int current_removed = 0; | |
5503 | ||
7fa3d080 | 5504 | if (ta) |
43cd72b9 BW |
5505 | current_removed = ta->removed_bytes; |
5506 | ||
5507 | BFD_ASSERT (ta == NULL || ta->offset == offset); | |
5508 | BFD_ASSERT (ta == NULL || ta->action == ta_fill); | |
5509 | ||
5510 | /* It is not necessary to fill at the end of a section. Clean this up. */ | |
5511 | if (sec->size == offset) | |
5512 | new_removed = removable_space - 0; | |
5513 | else | |
5514 | { | |
5515 | int space; | |
5516 | int added = -removed - current_removed; | |
5517 | /* Ignore multiples of the section alignment. */ | |
5518 | added = ((1 << sec->alignment_power) - 1) & added; | |
5519 | new_removed = (-added); | |
5520 | ||
5521 | /* Modify for removable. */ | |
5522 | space = removable_space - new_removed; | |
5523 | new_removed = (removable_space | |
5524 | - (((1 << sec->alignment_power) - 1) & space)); | |
5525 | } | |
5526 | return (new_removed - current_removed); | |
5527 | } | |
5528 | ||
5529 | ||
7fa3d080 BW |
5530 | static void |
5531 | adjust_fill_action (text_action *ta, int fill_diff) | |
43cd72b9 BW |
5532 | { |
5533 | ta->removed_bytes += fill_diff; | |
5534 | } | |
5535 | ||
5536 | ||
4c2af04f MF |
5537 | static int |
5538 | text_action_compare (splay_tree_key a, splay_tree_key b) | |
5539 | { | |
5540 | text_action *pa = (text_action *)a; | |
5541 | text_action *pb = (text_action *)b; | |
5542 | static const int action_priority[] = | |
5543 | { | |
5544 | [ta_fill] = 0, | |
5545 | [ta_none] = 1, | |
5546 | [ta_convert_longcall] = 2, | |
5547 | [ta_narrow_insn] = 3, | |
5548 | [ta_remove_insn] = 4, | |
5549 | [ta_remove_longcall] = 5, | |
5550 | [ta_remove_literal] = 6, | |
5551 | [ta_widen_insn] = 7, | |
5552 | [ta_add_literal] = 8, | |
5553 | }; | |
5554 | ||
5555 | if (pa->offset == pb->offset) | |
5556 | { | |
5557 | if (pa->action == pb->action) | |
5558 | return 0; | |
5559 | return action_priority[pa->action] - action_priority[pb->action]; | |
5560 | } | |
5561 | else | |
5562 | return pa->offset < pb->offset ? -1 : 1; | |
5563 | } | |
5564 | ||
5565 | static text_action * | |
5566 | action_first (text_action_list *action_list) | |
5567 | { | |
5568 | splay_tree_node node = splay_tree_min (action_list->tree); | |
5569 | return node ? (text_action *)node->value : NULL; | |
5570 | } | |
5571 | ||
5572 | static text_action * | |
5573 | action_next (text_action_list *action_list, text_action *action) | |
5574 | { | |
5575 | splay_tree_node node = splay_tree_successor (action_list->tree, | |
5576 | (splay_tree_key)action); | |
5577 | return node ? (text_action *)node->value : NULL; | |
5578 | } | |
5579 | ||
43cd72b9 BW |
5580 | /* Add a modification action to the text. For the case of adding or |
5581 | removing space, modify any current fill and assume that | |
5582 | "unreachable_space" bytes can be freely contracted. Note that a | |
5583 | negative removed value is a fill. */ | |
5584 | ||
68ffbac6 | 5585 | static void |
7fa3d080 BW |
5586 | text_action_add (text_action_list *l, |
5587 | text_action_t action, | |
5588 | asection *sec, | |
5589 | bfd_vma offset, | |
5590 | int removed) | |
43cd72b9 | 5591 | { |
43cd72b9 | 5592 | text_action *ta; |
4c2af04f | 5593 | text_action a; |
43cd72b9 BW |
5594 | |
5595 | /* It is not necessary to fill at the end of a section. */ | |
5596 | if (action == ta_fill && sec->size == offset) | |
5597 | return; | |
5598 | ||
5599 | /* It is not necessary to fill 0 bytes. */ | |
5600 | if (action == ta_fill && removed == 0) | |
5601 | return; | |
5602 | ||
4c2af04f MF |
5603 | a.action = action; |
5604 | a.offset = offset; | |
5605 | ||
5606 | if (action == ta_fill) | |
43cd72b9 | 5607 | { |
4c2af04f | 5608 | splay_tree_node node = splay_tree_lookup (l->tree, (splay_tree_key)&a); |
68ffbac6 | 5609 | |
4c2af04f | 5610 | if (node) |
43cd72b9 | 5611 | { |
4c2af04f MF |
5612 | ta = (text_action *)node->value; |
5613 | ta->removed_bytes += removed; | |
5614 | return; | |
43cd72b9 BW |
5615 | } |
5616 | } | |
4c2af04f MF |
5617 | else |
5618 | BFD_ASSERT (splay_tree_lookup (l->tree, (splay_tree_key)&a) == NULL); | |
43cd72b9 | 5619 | |
43cd72b9 BW |
5620 | ta = (text_action *) bfd_zmalloc (sizeof (text_action)); |
5621 | ta->action = action; | |
5622 | ta->sec = sec; | |
5623 | ta->offset = offset; | |
5624 | ta->removed_bytes = removed; | |
4c2af04f MF |
5625 | splay_tree_insert (l->tree, (splay_tree_key)ta, (splay_tree_value)ta); |
5626 | ++l->count; | |
43cd72b9 BW |
5627 | } |
5628 | ||
5629 | ||
5630 | static void | |
7fa3d080 BW |
5631 | text_action_add_literal (text_action_list *l, |
5632 | text_action_t action, | |
5633 | const r_reloc *loc, | |
5634 | const literal_value *value, | |
5635 | int removed) | |
43cd72b9 | 5636 | { |
43cd72b9 BW |
5637 | text_action *ta; |
5638 | asection *sec = r_reloc_get_section (loc); | |
5639 | bfd_vma offset = loc->target_offset; | |
5640 | bfd_vma virtual_offset = loc->virtual_offset; | |
5641 | ||
5642 | BFD_ASSERT (action == ta_add_literal); | |
5643 | ||
43cd72b9 BW |
5644 | /* Create a new record and fill it up. */ |
5645 | ta = (text_action *) bfd_zmalloc (sizeof (text_action)); | |
5646 | ta->action = action; | |
5647 | ta->sec = sec; | |
5648 | ta->offset = offset; | |
5649 | ta->virtual_offset = virtual_offset; | |
5650 | ta->value = *value; | |
5651 | ta->removed_bytes = removed; | |
4c2af04f MF |
5652 | |
5653 | BFD_ASSERT (splay_tree_lookup (l->tree, (splay_tree_key)ta) == NULL); | |
5654 | splay_tree_insert (l->tree, (splay_tree_key)ta, (splay_tree_value)ta); | |
5655 | ++l->count; | |
43cd72b9 BW |
5656 | } |
5657 | ||
5658 | ||
03669f1c BW |
5659 | /* Find the total offset adjustment for the relaxations specified by |
5660 | text_actions, beginning from a particular starting action. This is | |
5661 | typically used from offset_with_removed_text to search an entire list of | |
5662 | actions, but it may also be called directly when adjusting adjacent offsets | |
5663 | so that each search may begin where the previous one left off. */ | |
5664 | ||
5665 | static int | |
4c2af04f MF |
5666 | removed_by_actions (text_action_list *action_list, |
5667 | text_action **p_start_action, | |
03669f1c BW |
5668 | bfd_vma offset, |
5669 | bfd_boolean before_fill) | |
43cd72b9 BW |
5670 | { |
5671 | text_action *r; | |
5672 | int removed = 0; | |
5673 | ||
03669f1c | 5674 | r = *p_start_action; |
4c2af04f MF |
5675 | if (r) |
5676 | { | |
5677 | splay_tree_node node = splay_tree_lookup (action_list->tree, | |
5678 | (splay_tree_key)r); | |
5679 | BFD_ASSERT (node != NULL && r == (text_action *)node->value); | |
5680 | } | |
5681 | ||
03669f1c | 5682 | while (r) |
43cd72b9 | 5683 | { |
03669f1c BW |
5684 | if (r->offset > offset) |
5685 | break; | |
5686 | ||
5687 | if (r->offset == offset | |
5688 | && (before_fill || r->action != ta_fill || r->removed_bytes >= 0)) | |
5689 | break; | |
5690 | ||
5691 | removed += r->removed_bytes; | |
5692 | ||
4c2af04f | 5693 | r = action_next (action_list, r); |
43cd72b9 BW |
5694 | } |
5695 | ||
03669f1c BW |
5696 | *p_start_action = r; |
5697 | return removed; | |
5698 | } | |
5699 | ||
5700 | ||
68ffbac6 | 5701 | static bfd_vma |
03669f1c BW |
5702 | offset_with_removed_text (text_action_list *action_list, bfd_vma offset) |
5703 | { | |
4c2af04f MF |
5704 | text_action *r = action_first (action_list); |
5705 | ||
5706 | return offset - removed_by_actions (action_list, &r, offset, FALSE); | |
43cd72b9 BW |
5707 | } |
5708 | ||
5709 | ||
03e94c08 BW |
5710 | static unsigned |
5711 | action_list_count (text_action_list *action_list) | |
5712 | { | |
4c2af04f | 5713 | return action_list->count; |
03e94c08 BW |
5714 | } |
5715 | ||
4c2af04f MF |
5716 | typedef struct map_action_fn_context_struct map_action_fn_context; |
5717 | struct map_action_fn_context_struct | |
071aa5c9 | 5718 | { |
4c2af04f | 5719 | int removed; |
071aa5c9 MF |
5720 | removal_by_action_map map; |
5721 | bfd_boolean eq_complete; | |
4c2af04f | 5722 | }; |
071aa5c9 | 5723 | |
4c2af04f MF |
5724 | static int |
5725 | map_action_fn (splay_tree_node node, void *p) | |
5726 | { | |
5727 | map_action_fn_context *ctx = p; | |
5728 | text_action *r = (text_action *)node->value; | |
5729 | removal_by_action_entry *ientry = ctx->map.entry + ctx->map.n_entries; | |
071aa5c9 | 5730 | |
4c2af04f | 5731 | if (ctx->map.n_entries && (ientry - 1)->offset == r->offset) |
071aa5c9 | 5732 | { |
4c2af04f MF |
5733 | --ientry; |
5734 | } | |
5735 | else | |
5736 | { | |
5737 | ++ctx->map.n_entries; | |
5738 | ctx->eq_complete = FALSE; | |
5739 | ientry->offset = r->offset; | |
5740 | ientry->eq_removed_before_fill = ctx->removed; | |
5741 | } | |
071aa5c9 | 5742 | |
4c2af04f MF |
5743 | if (!ctx->eq_complete) |
5744 | { | |
5745 | if (r->action != ta_fill || r->removed_bytes >= 0) | |
071aa5c9 | 5746 | { |
4c2af04f MF |
5747 | ientry->eq_removed = ctx->removed; |
5748 | ctx->eq_complete = TRUE; | |
071aa5c9 MF |
5749 | } |
5750 | else | |
4c2af04f MF |
5751 | ientry->eq_removed = ctx->removed + r->removed_bytes; |
5752 | } | |
071aa5c9 | 5753 | |
4c2af04f MF |
5754 | ctx->removed += r->removed_bytes; |
5755 | ientry->removed = ctx->removed; | |
5756 | return 0; | |
5757 | } | |
071aa5c9 | 5758 | |
4c2af04f MF |
5759 | static void |
5760 | map_removal_by_action (text_action_list *action_list) | |
5761 | { | |
5762 | map_action_fn_context ctx; | |
5763 | ||
5764 | ctx.removed = 0; | |
5765 | ctx.map.n_entries = 0; | |
5766 | ctx.map.entry = bfd_malloc (action_list_count (action_list) * | |
5767 | sizeof (removal_by_action_entry)); | |
5768 | ctx.eq_complete = FALSE; | |
5769 | ||
5770 | splay_tree_foreach (action_list->tree, map_action_fn, &ctx); | |
5771 | action_list->map = ctx.map; | |
071aa5c9 MF |
5772 | } |
5773 | ||
5774 | static int | |
5775 | removed_by_actions_map (text_action_list *action_list, bfd_vma offset, | |
5776 | bfd_boolean before_fill) | |
5777 | { | |
5778 | unsigned a, b; | |
5779 | ||
5780 | if (!action_list->map.entry) | |
5781 | map_removal_by_action (action_list); | |
5782 | ||
5783 | if (!action_list->map.n_entries) | |
5784 | return 0; | |
5785 | ||
5786 | a = 0; | |
5787 | b = action_list->map.n_entries; | |
5788 | ||
5789 | while (b - a > 1) | |
5790 | { | |
5791 | unsigned c = (a + b) / 2; | |
5792 | ||
5793 | if (action_list->map.entry[c].offset <= offset) | |
5794 | a = c; | |
5795 | else | |
5796 | b = c; | |
5797 | } | |
5798 | ||
5799 | if (action_list->map.entry[a].offset < offset) | |
5800 | { | |
5801 | return action_list->map.entry[a].removed; | |
5802 | } | |
5803 | else if (action_list->map.entry[a].offset == offset) | |
5804 | { | |
5805 | return before_fill ? | |
5806 | action_list->map.entry[a].eq_removed_before_fill : | |
5807 | action_list->map.entry[a].eq_removed; | |
5808 | } | |
5809 | else | |
5810 | { | |
5811 | return 0; | |
5812 | } | |
5813 | } | |
5814 | ||
5815 | static bfd_vma | |
5816 | offset_with_removed_text_map (text_action_list *action_list, bfd_vma offset) | |
5817 | { | |
5818 | int removed = removed_by_actions_map (action_list, offset, FALSE); | |
5819 | return offset - removed; | |
5820 | } | |
5821 | ||
03e94c08 | 5822 | |
43cd72b9 BW |
5823 | /* The find_insn_action routine will only find non-fill actions. */ |
5824 | ||
7fa3d080 BW |
5825 | static text_action * |
5826 | find_insn_action (text_action_list *action_list, bfd_vma offset) | |
43cd72b9 | 5827 | { |
4c2af04f | 5828 | static const text_action_t action[] = |
43cd72b9 | 5829 | { |
4c2af04f MF |
5830 | ta_convert_longcall, |
5831 | ta_remove_longcall, | |
5832 | ta_widen_insn, | |
5833 | ta_narrow_insn, | |
5834 | ta_remove_insn, | |
5835 | }; | |
5836 | text_action a; | |
5837 | unsigned i; | |
5838 | ||
5839 | a.offset = offset; | |
5840 | for (i = 0; i < sizeof (action) / sizeof (*action); ++i) | |
5841 | { | |
5842 | splay_tree_node node; | |
5843 | ||
5844 | a.action = action[i]; | |
5845 | node = splay_tree_lookup (action_list->tree, (splay_tree_key)&a); | |
5846 | if (node) | |
5847 | return (text_action *)node->value; | |
43cd72b9 BW |
5848 | } |
5849 | return NULL; | |
5850 | } | |
5851 | ||
5852 | ||
5853 | #if DEBUG | |
5854 | ||
5855 | static void | |
4c2af04f MF |
5856 | print_action (FILE *fp, text_action *r) |
5857 | { | |
5858 | const char *t = "unknown"; | |
5859 | switch (r->action) | |
5860 | { | |
5861 | case ta_remove_insn: | |
5862 | t = "remove_insn"; break; | |
5863 | case ta_remove_longcall: | |
5864 | t = "remove_longcall"; break; | |
5865 | case ta_convert_longcall: | |
5866 | t = "convert_longcall"; break; | |
5867 | case ta_narrow_insn: | |
5868 | t = "narrow_insn"; break; | |
5869 | case ta_widen_insn: | |
5870 | t = "widen_insn"; break; | |
5871 | case ta_fill: | |
5872 | t = "fill"; break; | |
5873 | case ta_none: | |
5874 | t = "none"; break; | |
5875 | case ta_remove_literal: | |
5876 | t = "remove_literal"; break; | |
5877 | case ta_add_literal: | |
5878 | t = "add_literal"; break; | |
5879 | } | |
5880 | ||
5881 | fprintf (fp, "%s: %s[0x%lx] \"%s\" %d\n", | |
5882 | r->sec->owner->filename, | |
5883 | r->sec->name, (unsigned long) r->offset, t, r->removed_bytes); | |
5884 | } | |
5885 | ||
5886 | static int | |
5887 | print_action_list_fn (splay_tree_node node, void *p) | |
43cd72b9 | 5888 | { |
4c2af04f | 5889 | text_action *r = (text_action *)node->value; |
43cd72b9 | 5890 | |
4c2af04f MF |
5891 | print_action (p, r); |
5892 | return 0; | |
5893 | } | |
43cd72b9 | 5894 | |
4c2af04f MF |
5895 | static void |
5896 | print_action_list (FILE *fp, text_action_list *action_list) | |
5897 | { | |
5898 | fprintf (fp, "Text Action\n"); | |
5899 | splay_tree_foreach (action_list->tree, print_action_list_fn, fp); | |
43cd72b9 BW |
5900 | } |
5901 | ||
5902 | #endif /* DEBUG */ | |
5903 | ||
5904 | \f | |
5905 | /* Lists of literals being coalesced or removed. */ | |
5906 | ||
5907 | /* In the usual case, the literal identified by "from" is being | |
5908 | coalesced with another literal identified by "to". If the literal is | |
5909 | unused and is being removed altogether, "to.abfd" will be NULL. | |
5910 | The removed_literal entries are kept on a per-section list, sorted | |
5911 | by the "from" offset field. */ | |
5912 | ||
5913 | typedef struct removed_literal_struct removed_literal; | |
3439c466 | 5914 | typedef struct removed_literal_map_entry_struct removed_literal_map_entry; |
43cd72b9 BW |
5915 | typedef struct removed_literal_list_struct removed_literal_list; |
5916 | ||
5917 | struct removed_literal_struct | |
5918 | { | |
5919 | r_reloc from; | |
5920 | r_reloc to; | |
5921 | removed_literal *next; | |
5922 | }; | |
5923 | ||
3439c466 MF |
5924 | struct removed_literal_map_entry_struct |
5925 | { | |
5926 | bfd_vma addr; | |
5927 | removed_literal *literal; | |
5928 | }; | |
5929 | ||
43cd72b9 BW |
5930 | struct removed_literal_list_struct |
5931 | { | |
5932 | removed_literal *head; | |
5933 | removed_literal *tail; | |
3439c466 MF |
5934 | |
5935 | unsigned n_map; | |
5936 | removed_literal_map_entry *map; | |
43cd72b9 BW |
5937 | }; |
5938 | ||
5939 | ||
43cd72b9 BW |
5940 | /* Record that the literal at "from" is being removed. If "to" is not |
5941 | NULL, the "from" literal is being coalesced with the "to" literal. */ | |
5942 | ||
5943 | static void | |
7fa3d080 BW |
5944 | add_removed_literal (removed_literal_list *removed_list, |
5945 | const r_reloc *from, | |
5946 | const r_reloc *to) | |
43cd72b9 BW |
5947 | { |
5948 | removed_literal *r, *new_r, *next_r; | |
5949 | ||
5950 | new_r = (removed_literal *) bfd_zmalloc (sizeof (removed_literal)); | |
5951 | ||
5952 | new_r->from = *from; | |
5953 | if (to) | |
5954 | new_r->to = *to; | |
5955 | else | |
5956 | new_r->to.abfd = NULL; | |
5957 | new_r->next = NULL; | |
68ffbac6 | 5958 | |
43cd72b9 | 5959 | r = removed_list->head; |
68ffbac6 | 5960 | if (r == NULL) |
43cd72b9 BW |
5961 | { |
5962 | removed_list->head = new_r; | |
5963 | removed_list->tail = new_r; | |
5964 | } | |
5965 | /* Special check for common case of append. */ | |
5966 | else if (removed_list->tail->from.target_offset < from->target_offset) | |
5967 | { | |
5968 | removed_list->tail->next = new_r; | |
5969 | removed_list->tail = new_r; | |
5970 | } | |
5971 | else | |
5972 | { | |
68ffbac6 | 5973 | while (r->from.target_offset < from->target_offset && r->next) |
43cd72b9 BW |
5974 | { |
5975 | r = r->next; | |
5976 | } | |
5977 | next_r = r->next; | |
5978 | r->next = new_r; | |
5979 | new_r->next = next_r; | |
5980 | if (next_r == NULL) | |
5981 | removed_list->tail = new_r; | |
5982 | } | |
5983 | } | |
5984 | ||
3439c466 MF |
5985 | static void |
5986 | map_removed_literal (removed_literal_list *removed_list) | |
5987 | { | |
5988 | unsigned n_map = 0; | |
5989 | unsigned i; | |
5990 | removed_literal_map_entry *map = NULL; | |
5991 | removed_literal *r = removed_list->head; | |
5992 | ||
5993 | for (i = 0; r; ++i, r = r->next) | |
5994 | { | |
5995 | if (i == n_map) | |
5996 | { | |
5997 | n_map = (n_map * 2) + 2; | |
5998 | map = bfd_realloc (map, n_map * sizeof (*map)); | |
5999 | } | |
6000 | map[i].addr = r->from.target_offset; | |
6001 | map[i].literal = r; | |
6002 | } | |
6003 | removed_list->map = map; | |
6004 | removed_list->n_map = i; | |
6005 | } | |
6006 | ||
6007 | static int | |
6008 | removed_literal_compare (const void *a, const void *b) | |
6009 | { | |
6010 | const removed_literal_map_entry *pa = a; | |
6011 | const removed_literal_map_entry *pb = b; | |
6012 | ||
6013 | if (pa->addr == pb->addr) | |
6014 | return 0; | |
6015 | else | |
6016 | return pa->addr < pb->addr ? -1 : 1; | |
6017 | } | |
43cd72b9 BW |
6018 | |
6019 | /* Check if the list of removed literals contains an entry for the | |
6020 | given address. Return the entry if found. */ | |
6021 | ||
6022 | static removed_literal * | |
7fa3d080 | 6023 | find_removed_literal (removed_literal_list *removed_list, bfd_vma addr) |
43cd72b9 | 6024 | { |
3439c466 MF |
6025 | removed_literal_map_entry *p; |
6026 | removed_literal *r = NULL; | |
6027 | ||
6028 | if (removed_list->map == NULL) | |
6029 | map_removed_literal (removed_list); | |
6030 | ||
6031 | p = bsearch (&addr, removed_list->map, removed_list->n_map, | |
6032 | sizeof (*removed_list->map), removed_literal_compare); | |
6033 | if (p) | |
6034 | { | |
6035 | while (p != removed_list->map && (p - 1)->addr == addr) | |
6036 | --p; | |
6037 | r = p->literal; | |
6038 | } | |
6039 | return r; | |
43cd72b9 BW |
6040 | } |
6041 | ||
6042 | ||
6043 | #if DEBUG | |
6044 | ||
6045 | static void | |
7fa3d080 | 6046 | print_removed_literals (FILE *fp, removed_literal_list *removed_list) |
43cd72b9 BW |
6047 | { |
6048 | removed_literal *r; | |
6049 | r = removed_list->head; | |
6050 | if (r) | |
6051 | fprintf (fp, "Removed Literals\n"); | |
6052 | for (; r != NULL; r = r->next) | |
6053 | { | |
6054 | print_r_reloc (fp, &r->from); | |
6055 | fprintf (fp, " => "); | |
6056 | if (r->to.abfd == NULL) | |
6057 | fprintf (fp, "REMOVED"); | |
6058 | else | |
6059 | print_r_reloc (fp, &r->to); | |
6060 | fprintf (fp, "\n"); | |
6061 | } | |
6062 | } | |
6063 | ||
6064 | #endif /* DEBUG */ | |
6065 | ||
6066 | \f | |
6067 | /* Per-section data for relaxation. */ | |
6068 | ||
6069 | typedef struct reloc_bfd_fix_struct reloc_bfd_fix; | |
6070 | ||
6071 | struct xtensa_relax_info_struct | |
6072 | { | |
6073 | bfd_boolean is_relaxable_literal_section; | |
6074 | bfd_boolean is_relaxable_asm_section; | |
6075 | int visited; /* Number of times visited. */ | |
6076 | ||
6077 | source_reloc *src_relocs; /* Array[src_count]. */ | |
6078 | int src_count; | |
6079 | int src_next; /* Next src_relocs entry to assign. */ | |
6080 | ||
6081 | removed_literal_list removed_list; | |
6082 | text_action_list action_list; | |
6083 | ||
6084 | reloc_bfd_fix *fix_list; | |
6085 | reloc_bfd_fix *fix_array; | |
6086 | unsigned fix_array_count; | |
6087 | ||
6088 | /* Support for expanding the reloc array that is stored | |
6089 | in the section structure. If the relocations have been | |
6090 | reallocated, the newly allocated relocations will be referenced | |
6091 | here along with the actual size allocated. The relocation | |
6092 | count will always be found in the section structure. */ | |
68ffbac6 | 6093 | Elf_Internal_Rela *allocated_relocs; |
43cd72b9 BW |
6094 | unsigned relocs_count; |
6095 | unsigned allocated_relocs_count; | |
6096 | }; | |
6097 | ||
6098 | struct elf_xtensa_section_data | |
6099 | { | |
6100 | struct bfd_elf_section_data elf; | |
6101 | xtensa_relax_info relax_info; | |
6102 | }; | |
6103 | ||
43cd72b9 BW |
6104 | |
6105 | static bfd_boolean | |
7fa3d080 | 6106 | elf_xtensa_new_section_hook (bfd *abfd, asection *sec) |
43cd72b9 | 6107 | { |
f592407e AM |
6108 | if (!sec->used_by_bfd) |
6109 | { | |
6110 | struct elf_xtensa_section_data *sdata; | |
986f0783 | 6111 | size_t amt = sizeof (*sdata); |
43cd72b9 | 6112 | |
f592407e AM |
6113 | sdata = bfd_zalloc (abfd, amt); |
6114 | if (sdata == NULL) | |
6115 | return FALSE; | |
6116 | sec->used_by_bfd = sdata; | |
6117 | } | |
43cd72b9 BW |
6118 | |
6119 | return _bfd_elf_new_section_hook (abfd, sec); | |
6120 | } | |
6121 | ||
6122 | ||
7fa3d080 BW |
6123 | static xtensa_relax_info * |
6124 | get_xtensa_relax_info (asection *sec) | |
6125 | { | |
6126 | struct elf_xtensa_section_data *section_data; | |
6127 | ||
6128 | /* No info available if no section or if it is an output section. */ | |
6129 | if (!sec || sec == sec->output_section) | |
6130 | return NULL; | |
6131 | ||
6132 | section_data = (struct elf_xtensa_section_data *) elf_section_data (sec); | |
6133 | return §ion_data->relax_info; | |
6134 | } | |
6135 | ||
6136 | ||
43cd72b9 | 6137 | static void |
7fa3d080 | 6138 | init_xtensa_relax_info (asection *sec) |
43cd72b9 BW |
6139 | { |
6140 | xtensa_relax_info *relax_info = get_xtensa_relax_info (sec); | |
6141 | ||
6142 | relax_info->is_relaxable_literal_section = FALSE; | |
6143 | relax_info->is_relaxable_asm_section = FALSE; | |
6144 | relax_info->visited = 0; | |
6145 | ||
6146 | relax_info->src_relocs = NULL; | |
6147 | relax_info->src_count = 0; | |
6148 | relax_info->src_next = 0; | |
6149 | ||
6150 | relax_info->removed_list.head = NULL; | |
6151 | relax_info->removed_list.tail = NULL; | |
6152 | ||
4c2af04f MF |
6153 | relax_info->action_list.tree = splay_tree_new (text_action_compare, |
6154 | NULL, NULL); | |
071aa5c9 MF |
6155 | relax_info->action_list.map.n_entries = 0; |
6156 | relax_info->action_list.map.entry = NULL; | |
6157 | ||
43cd72b9 BW |
6158 | relax_info->fix_list = NULL; |
6159 | relax_info->fix_array = NULL; | |
6160 | relax_info->fix_array_count = 0; | |
6161 | ||
68ffbac6 | 6162 | relax_info->allocated_relocs = NULL; |
43cd72b9 BW |
6163 | relax_info->relocs_count = 0; |
6164 | relax_info->allocated_relocs_count = 0; | |
6165 | } | |
6166 | ||
43cd72b9 BW |
6167 | \f |
6168 | /* Coalescing literals may require a relocation to refer to a section in | |
6169 | a different input file, but the standard relocation information | |
6170 | cannot express that. Instead, the reloc_bfd_fix structures are used | |
6171 | to "fix" the relocations that refer to sections in other input files. | |
6172 | These structures are kept on per-section lists. The "src_type" field | |
6173 | records the relocation type in case there are multiple relocations on | |
6174 | the same location. FIXME: This is ugly; an alternative might be to | |
6175 | add new symbols with the "owner" field to some other input file. */ | |
6176 | ||
6177 | struct reloc_bfd_fix_struct | |
6178 | { | |
6179 | asection *src_sec; | |
6180 | bfd_vma src_offset; | |
6181 | unsigned src_type; /* Relocation type. */ | |
68ffbac6 | 6182 | |
43cd72b9 BW |
6183 | asection *target_sec; |
6184 | bfd_vma target_offset; | |
6185 | bfd_boolean translated; | |
68ffbac6 | 6186 | |
43cd72b9 BW |
6187 | reloc_bfd_fix *next; |
6188 | }; | |
6189 | ||
6190 | ||
43cd72b9 | 6191 | static reloc_bfd_fix * |
7fa3d080 BW |
6192 | reloc_bfd_fix_init (asection *src_sec, |
6193 | bfd_vma src_offset, | |
6194 | unsigned src_type, | |
7fa3d080 BW |
6195 | asection *target_sec, |
6196 | bfd_vma target_offset, | |
6197 | bfd_boolean translated) | |
43cd72b9 BW |
6198 | { |
6199 | reloc_bfd_fix *fix; | |
6200 | ||
6201 | fix = (reloc_bfd_fix *) bfd_malloc (sizeof (reloc_bfd_fix)); | |
6202 | fix->src_sec = src_sec; | |
6203 | fix->src_offset = src_offset; | |
6204 | fix->src_type = src_type; | |
43cd72b9 BW |
6205 | fix->target_sec = target_sec; |
6206 | fix->target_offset = target_offset; | |
6207 | fix->translated = translated; | |
6208 | ||
6209 | return fix; | |
6210 | } | |
6211 | ||
6212 | ||
6213 | static void | |
7fa3d080 | 6214 | add_fix (asection *src_sec, reloc_bfd_fix *fix) |
43cd72b9 BW |
6215 | { |
6216 | xtensa_relax_info *relax_info; | |
6217 | ||
6218 | relax_info = get_xtensa_relax_info (src_sec); | |
6219 | fix->next = relax_info->fix_list; | |
6220 | relax_info->fix_list = fix; | |
6221 | } | |
6222 | ||
6223 | ||
6224 | static int | |
7fa3d080 | 6225 | fix_compare (const void *ap, const void *bp) |
43cd72b9 BW |
6226 | { |
6227 | const reloc_bfd_fix *a = (const reloc_bfd_fix *) ap; | |
6228 | const reloc_bfd_fix *b = (const reloc_bfd_fix *) bp; | |
6229 | ||
6230 | if (a->src_offset != b->src_offset) | |
6231 | return (a->src_offset - b->src_offset); | |
6232 | return (a->src_type - b->src_type); | |
6233 | } | |
6234 | ||
6235 | ||
6236 | static void | |
7fa3d080 | 6237 | cache_fix_array (asection *sec) |
43cd72b9 BW |
6238 | { |
6239 | unsigned i, count = 0; | |
6240 | reloc_bfd_fix *r; | |
6241 | xtensa_relax_info *relax_info = get_xtensa_relax_info (sec); | |
6242 | ||
6243 | if (relax_info == NULL) | |
6244 | return; | |
6245 | if (relax_info->fix_list == NULL) | |
6246 | return; | |
6247 | ||
6248 | for (r = relax_info->fix_list; r != NULL; r = r->next) | |
6249 | count++; | |
6250 | ||
6251 | relax_info->fix_array = | |
6252 | (reloc_bfd_fix *) bfd_malloc (sizeof (reloc_bfd_fix) * count); | |
6253 | relax_info->fix_array_count = count; | |
6254 | ||
6255 | r = relax_info->fix_list; | |
6256 | for (i = 0; i < count; i++, r = r->next) | |
6257 | { | |
6258 | relax_info->fix_array[count - 1 - i] = *r; | |
6259 | relax_info->fix_array[count - 1 - i].next = NULL; | |
6260 | } | |
6261 | ||
6262 | qsort (relax_info->fix_array, relax_info->fix_array_count, | |
6263 | sizeof (reloc_bfd_fix), fix_compare); | |
6264 | } | |
6265 | ||
6266 | ||
6267 | static reloc_bfd_fix * | |
7fa3d080 | 6268 | get_bfd_fix (asection *sec, bfd_vma offset, unsigned type) |
43cd72b9 BW |
6269 | { |
6270 | xtensa_relax_info *relax_info = get_xtensa_relax_info (sec); | |
6271 | reloc_bfd_fix *rv; | |
6272 | reloc_bfd_fix key; | |
6273 | ||
6274 | if (relax_info == NULL) | |
6275 | return NULL; | |
6276 | if (relax_info->fix_list == NULL) | |
6277 | return NULL; | |
6278 | ||
6279 | if (relax_info->fix_array == NULL) | |
6280 | cache_fix_array (sec); | |
6281 | ||
6282 | key.src_offset = offset; | |
6283 | key.src_type = type; | |
6284 | rv = bsearch (&key, relax_info->fix_array, relax_info->fix_array_count, | |
6285 | sizeof (reloc_bfd_fix), fix_compare); | |
6286 | return rv; | |
6287 | } | |
6288 | ||
6289 | \f | |
6290 | /* Section caching. */ | |
6291 | ||
6292 | typedef struct section_cache_struct section_cache_t; | |
6293 | ||
6294 | struct section_cache_struct | |
6295 | { | |
6296 | asection *sec; | |
6297 | ||
6298 | bfd_byte *contents; /* Cache of the section contents. */ | |
6299 | bfd_size_type content_length; | |
6300 | ||
6301 | property_table_entry *ptbl; /* Cache of the section property table. */ | |
6302 | unsigned pte_count; | |
6303 | ||
6304 | Elf_Internal_Rela *relocs; /* Cache of the section relocations. */ | |
6305 | unsigned reloc_count; | |
6306 | }; | |
6307 | ||
6308 | ||
7fa3d080 BW |
6309 | static void |
6310 | init_section_cache (section_cache_t *sec_cache) | |
6311 | { | |
6312 | memset (sec_cache, 0, sizeof (*sec_cache)); | |
6313 | } | |
43cd72b9 BW |
6314 | |
6315 | ||
6316 | static void | |
65e911f9 | 6317 | free_section_cache (section_cache_t *sec_cache) |
43cd72b9 | 6318 | { |
7fa3d080 BW |
6319 | if (sec_cache->sec) |
6320 | { | |
6321 | release_contents (sec_cache->sec, sec_cache->contents); | |
6322 | release_internal_relocs (sec_cache->sec, sec_cache->relocs); | |
c9594989 | 6323 | free (sec_cache->ptbl); |
7fa3d080 | 6324 | } |
43cd72b9 BW |
6325 | } |
6326 | ||
6327 | ||
6328 | static bfd_boolean | |
7fa3d080 BW |
6329 | section_cache_section (section_cache_t *sec_cache, |
6330 | asection *sec, | |
6331 | struct bfd_link_info *link_info) | |
43cd72b9 BW |
6332 | { |
6333 | bfd *abfd; | |
6334 | property_table_entry *prop_table = NULL; | |
6335 | int ptblsize = 0; | |
6336 | bfd_byte *contents = NULL; | |
6337 | Elf_Internal_Rela *internal_relocs = NULL; | |
6338 | bfd_size_type sec_size; | |
6339 | ||
6340 | if (sec == NULL) | |
6341 | return FALSE; | |
6342 | if (sec == sec_cache->sec) | |
6343 | return TRUE; | |
6344 | ||
6345 | abfd = sec->owner; | |
6346 | sec_size = bfd_get_section_limit (abfd, sec); | |
6347 | ||
6348 | /* Get the contents. */ | |
6349 | contents = retrieve_contents (abfd, sec, link_info->keep_memory); | |
6350 | if (contents == NULL && sec_size != 0) | |
6351 | goto err; | |
6352 | ||
6353 | /* Get the relocations. */ | |
6354 | internal_relocs = retrieve_internal_relocs (abfd, sec, | |
6355 | link_info->keep_memory); | |
6356 | ||
6357 | /* Get the entry table. */ | |
6358 | ptblsize = xtensa_read_table_entries (abfd, sec, &prop_table, | |
6359 | XTENSA_PROP_SEC_NAME, FALSE); | |
6360 | if (ptblsize < 0) | |
6361 | goto err; | |
6362 | ||
6363 | /* Fill in the new section cache. */ | |
65e911f9 AM |
6364 | free_section_cache (sec_cache); |
6365 | init_section_cache (sec_cache); | |
43cd72b9 BW |
6366 | |
6367 | sec_cache->sec = sec; | |
6368 | sec_cache->contents = contents; | |
6369 | sec_cache->content_length = sec_size; | |
6370 | sec_cache->relocs = internal_relocs; | |
6371 | sec_cache->reloc_count = sec->reloc_count; | |
6372 | sec_cache->pte_count = ptblsize; | |
6373 | sec_cache->ptbl = prop_table; | |
6374 | ||
6375 | return TRUE; | |
6376 | ||
6377 | err: | |
6378 | release_contents (sec, contents); | |
6379 | release_internal_relocs (sec, internal_relocs); | |
c9594989 | 6380 | free (prop_table); |
43cd72b9 BW |
6381 | return FALSE; |
6382 | } | |
6383 | ||
43cd72b9 BW |
6384 | \f |
6385 | /* Extended basic blocks. */ | |
6386 | ||
6387 | /* An ebb_struct represents an Extended Basic Block. Within this | |
6388 | range, we guarantee that all instructions are decodable, the | |
6389 | property table entries are contiguous, and no property table | |
6390 | specifies a segment that cannot have instructions moved. This | |
6391 | structure contains caches of the contents, property table and | |
6392 | relocations for the specified section for easy use. The range is | |
6393 | specified by ranges of indices for the byte offset, property table | |
6394 | offsets and relocation offsets. These must be consistent. */ | |
6395 | ||
6396 | typedef struct ebb_struct ebb_t; | |
6397 | ||
6398 | struct ebb_struct | |
6399 | { | |
6400 | asection *sec; | |
6401 | ||
6402 | bfd_byte *contents; /* Cache of the section contents. */ | |
6403 | bfd_size_type content_length; | |
6404 | ||
6405 | property_table_entry *ptbl; /* Cache of the section property table. */ | |
6406 | unsigned pte_count; | |
6407 | ||
6408 | Elf_Internal_Rela *relocs; /* Cache of the section relocations. */ | |
6409 | unsigned reloc_count; | |
6410 | ||
6411 | bfd_vma start_offset; /* Offset in section. */ | |
6412 | unsigned start_ptbl_idx; /* Offset in the property table. */ | |
6413 | unsigned start_reloc_idx; /* Offset in the relocations. */ | |
6414 | ||
6415 | bfd_vma end_offset; | |
6416 | unsigned end_ptbl_idx; | |
6417 | unsigned end_reloc_idx; | |
6418 | ||
6419 | bfd_boolean ends_section; /* Is this the last ebb in a section? */ | |
6420 | ||
6421 | /* The unreachable property table at the end of this set of blocks; | |
6422 | NULL if the end is not an unreachable block. */ | |
6423 | property_table_entry *ends_unreachable; | |
6424 | }; | |
6425 | ||
6426 | ||
6427 | enum ebb_target_enum | |
6428 | { | |
6429 | EBB_NO_ALIGN = 0, | |
6430 | EBB_DESIRE_TGT_ALIGN, | |
6431 | EBB_REQUIRE_TGT_ALIGN, | |
6432 | EBB_REQUIRE_LOOP_ALIGN, | |
6433 | EBB_REQUIRE_ALIGN | |
6434 | }; | |
6435 | ||
6436 | ||
6437 | /* proposed_action_struct is similar to the text_action_struct except | |
6438 | that is represents a potential transformation, not one that will | |
6439 | occur. We build a list of these for an extended basic block | |
6440 | and use them to compute the actual actions desired. We must be | |
6441 | careful that the entire set of actual actions we perform do not | |
6442 | break any relocations that would fit if the actions were not | |
6443 | performed. */ | |
6444 | ||
6445 | typedef struct proposed_action_struct proposed_action; | |
6446 | ||
6447 | struct proposed_action_struct | |
6448 | { | |
6449 | enum ebb_target_enum align_type; /* for the target alignment */ | |
6450 | bfd_vma alignment_pow; | |
6451 | text_action_t action; | |
6452 | bfd_vma offset; | |
6453 | int removed_bytes; | |
6454 | bfd_boolean do_action; /* If false, then we will not perform the action. */ | |
6455 | }; | |
6456 | ||
6457 | ||
6458 | /* The ebb_constraint_struct keeps a set of proposed actions for an | |
6459 | extended basic block. */ | |
6460 | ||
6461 | typedef struct ebb_constraint_struct ebb_constraint; | |
6462 | ||
6463 | struct ebb_constraint_struct | |
6464 | { | |
6465 | ebb_t ebb; | |
6466 | bfd_boolean start_movable; | |
6467 | ||
6468 | /* Bytes of extra space at the beginning if movable. */ | |
6469 | int start_extra_space; | |
6470 | ||
6471 | enum ebb_target_enum start_align; | |
6472 | ||
6473 | bfd_boolean end_movable; | |
6474 | ||
6475 | /* Bytes of extra space at the end if movable. */ | |
6476 | int end_extra_space; | |
6477 | ||
6478 | unsigned action_count; | |
6479 | unsigned action_allocated; | |
6480 | ||
6481 | /* Array of proposed actions. */ | |
6482 | proposed_action *actions; | |
6483 | ||
6484 | /* Action alignments -- one for each proposed action. */ | |
6485 | enum ebb_target_enum *action_aligns; | |
6486 | }; | |
6487 | ||
6488 | ||
43cd72b9 | 6489 | static void |
7fa3d080 | 6490 | init_ebb_constraint (ebb_constraint *c) |
43cd72b9 BW |
6491 | { |
6492 | memset (c, 0, sizeof (ebb_constraint)); | |
6493 | } | |
6494 | ||
6495 | ||
6496 | static void | |
7fa3d080 | 6497 | free_ebb_constraint (ebb_constraint *c) |
43cd72b9 | 6498 | { |
c9594989 | 6499 | free (c->actions); |
43cd72b9 BW |
6500 | } |
6501 | ||
6502 | ||
6503 | static void | |
7fa3d080 BW |
6504 | init_ebb (ebb_t *ebb, |
6505 | asection *sec, | |
6506 | bfd_byte *contents, | |
6507 | bfd_size_type content_length, | |
6508 | property_table_entry *prop_table, | |
6509 | unsigned ptblsize, | |
6510 | Elf_Internal_Rela *internal_relocs, | |
6511 | unsigned reloc_count) | |
43cd72b9 BW |
6512 | { |
6513 | memset (ebb, 0, sizeof (ebb_t)); | |
6514 | ebb->sec = sec; | |
6515 | ebb->contents = contents; | |
6516 | ebb->content_length = content_length; | |
6517 | ebb->ptbl = prop_table; | |
6518 | ebb->pte_count = ptblsize; | |
6519 | ebb->relocs = internal_relocs; | |
6520 | ebb->reloc_count = reloc_count; | |
6521 | ebb->start_offset = 0; | |
6522 | ebb->end_offset = ebb->content_length - 1; | |
6523 | ebb->start_ptbl_idx = 0; | |
6524 | ebb->end_ptbl_idx = ptblsize; | |
6525 | ebb->start_reloc_idx = 0; | |
6526 | ebb->end_reloc_idx = reloc_count; | |
6527 | } | |
6528 | ||
6529 | ||
6530 | /* Extend the ebb to all decodable contiguous sections. The algorithm | |
6531 | for building a basic block around an instruction is to push it | |
6532 | forward until we hit the end of a section, an unreachable block or | |
6533 | a block that cannot be transformed. Then we push it backwards | |
6534 | searching for similar conditions. */ | |
6535 | ||
7fa3d080 BW |
6536 | static bfd_boolean extend_ebb_bounds_forward (ebb_t *); |
6537 | static bfd_boolean extend_ebb_bounds_backward (ebb_t *); | |
6538 | static bfd_size_type insn_block_decodable_len | |
6539 | (bfd_byte *, bfd_size_type, bfd_vma, bfd_size_type); | |
6540 | ||
43cd72b9 | 6541 | static bfd_boolean |
7fa3d080 | 6542 | extend_ebb_bounds (ebb_t *ebb) |
43cd72b9 BW |
6543 | { |
6544 | if (!extend_ebb_bounds_forward (ebb)) | |
6545 | return FALSE; | |
6546 | if (!extend_ebb_bounds_backward (ebb)) | |
6547 | return FALSE; | |
6548 | return TRUE; | |
6549 | } | |
6550 | ||
6551 | ||
6552 | static bfd_boolean | |
7fa3d080 | 6553 | extend_ebb_bounds_forward (ebb_t *ebb) |
43cd72b9 BW |
6554 | { |
6555 | property_table_entry *the_entry, *new_entry; | |
6556 | ||
6557 | the_entry = &ebb->ptbl[ebb->end_ptbl_idx]; | |
6558 | ||
6559 | /* Stop when (1) we cannot decode an instruction, (2) we are at | |
6560 | the end of the property tables, (3) we hit a non-contiguous property | |
6561 | table entry, (4) we hit a NO_TRANSFORM region. */ | |
6562 | ||
6563 | while (1) | |
6564 | { | |
6565 | bfd_vma entry_end; | |
6566 | bfd_size_type insn_block_len; | |
6567 | ||
6568 | entry_end = the_entry->address - ebb->sec->vma + the_entry->size; | |
6569 | insn_block_len = | |
6570 | insn_block_decodable_len (ebb->contents, ebb->content_length, | |
6571 | ebb->end_offset, | |
6572 | entry_end - ebb->end_offset); | |
6573 | if (insn_block_len != (entry_end - ebb->end_offset)) | |
6574 | { | |
4eca0228 | 6575 | _bfd_error_handler |
695344c0 | 6576 | /* xgettext:c-format */ |
2dcf00ce | 6577 | (_("%pB(%pA+%#" PRIx64 "): could not decode instruction; " |
d42c267e | 6578 | "possible configuration mismatch"), |
2dcf00ce AM |
6579 | ebb->sec->owner, ebb->sec, |
6580 | (uint64_t) (ebb->end_offset + insn_block_len)); | |
43cd72b9 BW |
6581 | return FALSE; |
6582 | } | |
6583 | ebb->end_offset += insn_block_len; | |
6584 | ||
6585 | if (ebb->end_offset == ebb->sec->size) | |
6586 | ebb->ends_section = TRUE; | |
6587 | ||
6588 | /* Update the reloc counter. */ | |
6589 | while (ebb->end_reloc_idx + 1 < ebb->reloc_count | |
6590 | && (ebb->relocs[ebb->end_reloc_idx + 1].r_offset | |
6591 | < ebb->end_offset)) | |
6592 | { | |
6593 | ebb->end_reloc_idx++; | |
6594 | } | |
6595 | ||
6596 | if (ebb->end_ptbl_idx + 1 == ebb->pte_count) | |
6597 | return TRUE; | |
6598 | ||
6599 | new_entry = &ebb->ptbl[ebb->end_ptbl_idx + 1]; | |
6600 | if (((new_entry->flags & XTENSA_PROP_INSN) == 0) | |
99ded152 | 6601 | || ((new_entry->flags & XTENSA_PROP_NO_TRANSFORM) != 0) |
43cd72b9 BW |
6602 | || ((the_entry->flags & XTENSA_PROP_ALIGN) != 0)) |
6603 | break; | |
6604 | ||
6605 | if (the_entry->address + the_entry->size != new_entry->address) | |
6606 | break; | |
6607 | ||
6608 | the_entry = new_entry; | |
6609 | ebb->end_ptbl_idx++; | |
6610 | } | |
6611 | ||
6612 | /* Quick check for an unreachable or end of file just at the end. */ | |
6613 | if (ebb->end_ptbl_idx + 1 == ebb->pte_count) | |
6614 | { | |
6615 | if (ebb->end_offset == ebb->content_length) | |
6616 | ebb->ends_section = TRUE; | |
6617 | } | |
6618 | else | |
6619 | { | |
6620 | new_entry = &ebb->ptbl[ebb->end_ptbl_idx + 1]; | |
6621 | if ((new_entry->flags & XTENSA_PROP_UNREACHABLE) != 0 | |
6622 | && the_entry->address + the_entry->size == new_entry->address) | |
6623 | ebb->ends_unreachable = new_entry; | |
6624 | } | |
6625 | ||
6626 | /* Any other ending requires exact alignment. */ | |
6627 | return TRUE; | |
6628 | } | |
6629 | ||
6630 | ||
6631 | static bfd_boolean | |
7fa3d080 | 6632 | extend_ebb_bounds_backward (ebb_t *ebb) |
43cd72b9 BW |
6633 | { |
6634 | property_table_entry *the_entry, *new_entry; | |
6635 | ||
6636 | the_entry = &ebb->ptbl[ebb->start_ptbl_idx]; | |
6637 | ||
6638 | /* Stop when (1) we cannot decode the instructions in the current entry. | |
6639 | (2) we are at the beginning of the property tables, (3) we hit a | |
6640 | non-contiguous property table entry, (4) we hit a NO_TRANSFORM region. */ | |
6641 | ||
6642 | while (1) | |
6643 | { | |
6644 | bfd_vma block_begin; | |
6645 | bfd_size_type insn_block_len; | |
6646 | ||
6647 | block_begin = the_entry->address - ebb->sec->vma; | |
6648 | insn_block_len = | |
6649 | insn_block_decodable_len (ebb->contents, ebb->content_length, | |
6650 | block_begin, | |
6651 | ebb->start_offset - block_begin); | |
6652 | if (insn_block_len != ebb->start_offset - block_begin) | |
6653 | { | |
4eca0228 | 6654 | _bfd_error_handler |
695344c0 | 6655 | /* xgettext:c-format */ |
2dcf00ce | 6656 | (_("%pB(%pA+%#" PRIx64 "): could not decode instruction; " |
d42c267e | 6657 | "possible configuration mismatch"), |
2dcf00ce AM |
6658 | ebb->sec->owner, ebb->sec, |
6659 | (uint64_t) (ebb->end_offset + insn_block_len)); | |
43cd72b9 BW |
6660 | return FALSE; |
6661 | } | |
6662 | ebb->start_offset -= insn_block_len; | |
6663 | ||
6664 | /* Update the reloc counter. */ | |
6665 | while (ebb->start_reloc_idx > 0 | |
6666 | && (ebb->relocs[ebb->start_reloc_idx - 1].r_offset | |
6667 | >= ebb->start_offset)) | |
6668 | { | |
6669 | ebb->start_reloc_idx--; | |
6670 | } | |
6671 | ||
6672 | if (ebb->start_ptbl_idx == 0) | |
6673 | return TRUE; | |
6674 | ||
6675 | new_entry = &ebb->ptbl[ebb->start_ptbl_idx - 1]; | |
6676 | if ((new_entry->flags & XTENSA_PROP_INSN) == 0 | |
99ded152 | 6677 | || ((new_entry->flags & XTENSA_PROP_NO_TRANSFORM) != 0) |
43cd72b9 BW |
6678 | || ((new_entry->flags & XTENSA_PROP_ALIGN) != 0)) |
6679 | return TRUE; | |
6680 | if (new_entry->address + new_entry->size != the_entry->address) | |
6681 | return TRUE; | |
6682 | ||
6683 | the_entry = new_entry; | |
6684 | ebb->start_ptbl_idx--; | |
6685 | } | |
6686 | return TRUE; | |
6687 | } | |
6688 | ||
6689 | ||
6690 | static bfd_size_type | |
7fa3d080 BW |
6691 | insn_block_decodable_len (bfd_byte *contents, |
6692 | bfd_size_type content_len, | |
6693 | bfd_vma block_offset, | |
6694 | bfd_size_type block_len) | |
43cd72b9 BW |
6695 | { |
6696 | bfd_vma offset = block_offset; | |
6697 | ||
6698 | while (offset < block_offset + block_len) | |
6699 | { | |
6700 | bfd_size_type insn_len = 0; | |
6701 | ||
6702 | insn_len = insn_decode_len (contents, content_len, offset); | |
6703 | if (insn_len == 0) | |
6704 | return (offset - block_offset); | |
6705 | offset += insn_len; | |
6706 | } | |
6707 | return (offset - block_offset); | |
6708 | } | |
6709 | ||
6710 | ||
6711 | static void | |
7fa3d080 | 6712 | ebb_propose_action (ebb_constraint *c, |
7fa3d080 | 6713 | enum ebb_target_enum align_type, |
288f74fa | 6714 | bfd_vma alignment_pow, |
7fa3d080 BW |
6715 | text_action_t action, |
6716 | bfd_vma offset, | |
6717 | int removed_bytes, | |
6718 | bfd_boolean do_action) | |
43cd72b9 | 6719 | { |
b08b5071 | 6720 | proposed_action *act; |
43cd72b9 | 6721 | |
43cd72b9 BW |
6722 | if (c->action_allocated <= c->action_count) |
6723 | { | |
b08b5071 | 6724 | unsigned new_allocated, i; |
823fc61f | 6725 | proposed_action *new_actions; |
b08b5071 BW |
6726 | |
6727 | new_allocated = (c->action_count + 2) * 2; | |
823fc61f | 6728 | new_actions = (proposed_action *) |
43cd72b9 BW |
6729 | bfd_zmalloc (sizeof (proposed_action) * new_allocated); |
6730 | ||
6731 | for (i = 0; i < c->action_count; i++) | |
6732 | new_actions[i] = c->actions[i]; | |
c9594989 | 6733 | free (c->actions); |
43cd72b9 BW |
6734 | c->actions = new_actions; |
6735 | c->action_allocated = new_allocated; | |
6736 | } | |
b08b5071 BW |
6737 | |
6738 | act = &c->actions[c->action_count]; | |
6739 | act->align_type = align_type; | |
6740 | act->alignment_pow = alignment_pow; | |
6741 | act->action = action; | |
6742 | act->offset = offset; | |
6743 | act->removed_bytes = removed_bytes; | |
6744 | act->do_action = do_action; | |
6745 | ||
43cd72b9 BW |
6746 | c->action_count++; |
6747 | } | |
6748 | ||
6749 | \f | |
6750 | /* Access to internal relocations, section contents and symbols. */ | |
6751 | ||
6752 | /* During relaxation, we need to modify relocations, section contents, | |
6753 | and symbol definitions, and we need to keep the original values from | |
6754 | being reloaded from the input files, i.e., we need to "pin" the | |
6755 | modified values in memory. We also want to continue to observe the | |
6756 | setting of the "keep-memory" flag. The following functions wrap the | |
6757 | standard BFD functions to take care of this for us. */ | |
6758 | ||
6759 | static Elf_Internal_Rela * | |
7fa3d080 | 6760 | retrieve_internal_relocs (bfd *abfd, asection *sec, bfd_boolean keep_memory) |
43cd72b9 BW |
6761 | { |
6762 | Elf_Internal_Rela *internal_relocs; | |
6763 | ||
6764 | if ((sec->flags & SEC_LINKER_CREATED) != 0) | |
6765 | return NULL; | |
6766 | ||
6767 | internal_relocs = elf_section_data (sec)->relocs; | |
6768 | if (internal_relocs == NULL) | |
6769 | internal_relocs = (_bfd_elf_link_read_relocs | |
7fa3d080 | 6770 | (abfd, sec, NULL, NULL, keep_memory)); |
43cd72b9 BW |
6771 | return internal_relocs; |
6772 | } | |
6773 | ||
6774 | ||
6775 | static void | |
7fa3d080 | 6776 | pin_internal_relocs (asection *sec, Elf_Internal_Rela *internal_relocs) |
43cd72b9 BW |
6777 | { |
6778 | elf_section_data (sec)->relocs = internal_relocs; | |
6779 | } | |
6780 | ||
6781 | ||
6782 | static void | |
7fa3d080 | 6783 | release_internal_relocs (asection *sec, Elf_Internal_Rela *internal_relocs) |
43cd72b9 | 6784 | { |
c9594989 | 6785 | if (elf_section_data (sec)->relocs != internal_relocs) |
43cd72b9 BW |
6786 | free (internal_relocs); |
6787 | } | |
6788 | ||
6789 | ||
6790 | static bfd_byte * | |
7fa3d080 | 6791 | retrieve_contents (bfd *abfd, asection *sec, bfd_boolean keep_memory) |
43cd72b9 BW |
6792 | { |
6793 | bfd_byte *contents; | |
6794 | bfd_size_type sec_size; | |
6795 | ||
6796 | sec_size = bfd_get_section_limit (abfd, sec); | |
6797 | contents = elf_section_data (sec)->this_hdr.contents; | |
68ffbac6 | 6798 | |
43cd72b9 BW |
6799 | if (contents == NULL && sec_size != 0) |
6800 | { | |
6801 | if (!bfd_malloc_and_get_section (abfd, sec, &contents)) | |
6802 | { | |
c9594989 | 6803 | free (contents); |
43cd72b9 BW |
6804 | return NULL; |
6805 | } | |
68ffbac6 | 6806 | if (keep_memory) |
43cd72b9 BW |
6807 | elf_section_data (sec)->this_hdr.contents = contents; |
6808 | } | |
6809 | return contents; | |
6810 | } | |
6811 | ||
6812 | ||
6813 | static void | |
7fa3d080 | 6814 | pin_contents (asection *sec, bfd_byte *contents) |
43cd72b9 BW |
6815 | { |
6816 | elf_section_data (sec)->this_hdr.contents = contents; | |
6817 | } | |
6818 | ||
6819 | ||
6820 | static void | |
7fa3d080 | 6821 | release_contents (asection *sec, bfd_byte *contents) |
43cd72b9 | 6822 | { |
c9594989 | 6823 | if (elf_section_data (sec)->this_hdr.contents != contents) |
43cd72b9 BW |
6824 | free (contents); |
6825 | } | |
6826 | ||
6827 | ||
6828 | static Elf_Internal_Sym * | |
7fa3d080 | 6829 | retrieve_local_syms (bfd *input_bfd) |
43cd72b9 BW |
6830 | { |
6831 | Elf_Internal_Shdr *symtab_hdr; | |
6832 | Elf_Internal_Sym *isymbuf; | |
6833 | size_t locsymcount; | |
6834 | ||
6835 | symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; | |
6836 | locsymcount = symtab_hdr->sh_info; | |
6837 | ||
6838 | isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; | |
6839 | if (isymbuf == NULL && locsymcount != 0) | |
6840 | isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr, locsymcount, 0, | |
6841 | NULL, NULL, NULL); | |
6842 | ||
6843 | /* Save the symbols for this input file so they won't be read again. */ | |
6844 | if (isymbuf && isymbuf != (Elf_Internal_Sym *) symtab_hdr->contents) | |
6845 | symtab_hdr->contents = (unsigned char *) isymbuf; | |
6846 | ||
6847 | return isymbuf; | |
6848 | } | |
6849 | ||
6850 | \f | |
6851 | /* Code for link-time relaxation. */ | |
6852 | ||
6853 | /* Initialization for relaxation: */ | |
7fa3d080 | 6854 | static bfd_boolean analyze_relocations (struct bfd_link_info *); |
43cd72b9 | 6855 | static bfd_boolean find_relaxable_sections |
7fa3d080 | 6856 | (bfd *, asection *, struct bfd_link_info *, bfd_boolean *); |
43cd72b9 | 6857 | static bfd_boolean collect_source_relocs |
7fa3d080 | 6858 | (bfd *, asection *, struct bfd_link_info *); |
43cd72b9 | 6859 | static bfd_boolean is_resolvable_asm_expansion |
7fa3d080 BW |
6860 | (bfd *, asection *, bfd_byte *, Elf_Internal_Rela *, struct bfd_link_info *, |
6861 | bfd_boolean *); | |
43cd72b9 | 6862 | static Elf_Internal_Rela *find_associated_l32r_irel |
7fa3d080 | 6863 | (bfd *, asection *, bfd_byte *, Elf_Internal_Rela *, Elf_Internal_Rela *); |
43cd72b9 | 6864 | static bfd_boolean compute_text_actions |
7fa3d080 BW |
6865 | (bfd *, asection *, struct bfd_link_info *); |
6866 | static bfd_boolean compute_ebb_proposed_actions (ebb_constraint *); | |
6867 | static bfd_boolean compute_ebb_actions (ebb_constraint *); | |
b2b326d2 | 6868 | typedef struct reloc_range_list_struct reloc_range_list; |
43cd72b9 | 6869 | static bfd_boolean check_section_ebb_pcrels_fit |
b2b326d2 MF |
6870 | (bfd *, asection *, bfd_byte *, Elf_Internal_Rela *, |
6871 | reloc_range_list *, const ebb_constraint *, | |
cb337148 | 6872 | const xtensa_opcode *); |
7fa3d080 | 6873 | static bfd_boolean check_section_ebb_reduces (const ebb_constraint *); |
43cd72b9 | 6874 | static void text_action_add_proposed |
7fa3d080 | 6875 | (text_action_list *, const ebb_constraint *, asection *); |
43cd72b9 BW |
6876 | |
6877 | /* First pass: */ | |
6878 | static bfd_boolean compute_removed_literals | |
7fa3d080 | 6879 | (bfd *, asection *, struct bfd_link_info *, value_map_hash_table *); |
43cd72b9 | 6880 | static Elf_Internal_Rela *get_irel_at_offset |
7fa3d080 | 6881 | (asection *, Elf_Internal_Rela *, bfd_vma); |
68ffbac6 | 6882 | static bfd_boolean is_removable_literal |
99ded152 BW |
6883 | (const source_reloc *, int, const source_reloc *, int, asection *, |
6884 | property_table_entry *, int); | |
43cd72b9 | 6885 | static bfd_boolean remove_dead_literal |
7fa3d080 | 6886 | (bfd *, asection *, struct bfd_link_info *, Elf_Internal_Rela *, |
68ffbac6 | 6887 | Elf_Internal_Rela *, source_reloc *, property_table_entry *, int); |
7fa3d080 BW |
6888 | static bfd_boolean identify_literal_placement |
6889 | (bfd *, asection *, bfd_byte *, struct bfd_link_info *, | |
6890 | value_map_hash_table *, bfd_boolean *, Elf_Internal_Rela *, int, | |
6891 | source_reloc *, property_table_entry *, int, section_cache_t *, | |
6892 | bfd_boolean); | |
6893 | static bfd_boolean relocations_reach (source_reloc *, int, const r_reloc *); | |
43cd72b9 | 6894 | static bfd_boolean coalesce_shared_literal |
7fa3d080 | 6895 | (asection *, source_reloc *, property_table_entry *, int, value_map *); |
43cd72b9 | 6896 | static bfd_boolean move_shared_literal |
7fa3d080 BW |
6897 | (asection *, struct bfd_link_info *, source_reloc *, property_table_entry *, |
6898 | int, const r_reloc *, const literal_value *, section_cache_t *); | |
43cd72b9 BW |
6899 | |
6900 | /* Second pass: */ | |
7fa3d080 BW |
6901 | static bfd_boolean relax_section (bfd *, asection *, struct bfd_link_info *); |
6902 | static bfd_boolean translate_section_fixes (asection *); | |
6903 | static bfd_boolean translate_reloc_bfd_fix (reloc_bfd_fix *); | |
9b7f5d20 | 6904 | static asection *translate_reloc (const r_reloc *, r_reloc *, asection *); |
43cd72b9 | 6905 | static void shrink_dynamic_reloc_sections |
7fa3d080 | 6906 | (struct bfd_link_info *, bfd *, asection *, Elf_Internal_Rela *); |
43cd72b9 | 6907 | static bfd_boolean move_literal |
7fa3d080 BW |
6908 | (bfd *, struct bfd_link_info *, asection *, bfd_vma, bfd_byte *, |
6909 | xtensa_relax_info *, Elf_Internal_Rela **, const literal_value *); | |
43cd72b9 | 6910 | static bfd_boolean relax_property_section |
7fa3d080 | 6911 | (bfd *, asection *, struct bfd_link_info *); |
43cd72b9 BW |
6912 | |
6913 | /* Third pass: */ | |
7fa3d080 | 6914 | static bfd_boolean relax_section_symbols (bfd *, asection *); |
43cd72b9 BW |
6915 | |
6916 | ||
68ffbac6 | 6917 | static bfd_boolean |
7fa3d080 BW |
6918 | elf_xtensa_relax_section (bfd *abfd, |
6919 | asection *sec, | |
6920 | struct bfd_link_info *link_info, | |
6921 | bfd_boolean *again) | |
43cd72b9 BW |
6922 | { |
6923 | static value_map_hash_table *values = NULL; | |
6924 | static bfd_boolean relocations_analyzed = FALSE; | |
6925 | xtensa_relax_info *relax_info; | |
6926 | ||
6927 | if (!relocations_analyzed) | |
6928 | { | |
6929 | /* Do some overall initialization for relaxation. */ | |
6930 | values = value_map_hash_table_init (); | |
6931 | if (values == NULL) | |
6932 | return FALSE; | |
6933 | relaxing_section = TRUE; | |
6934 | if (!analyze_relocations (link_info)) | |
6935 | return FALSE; | |
6936 | relocations_analyzed = TRUE; | |
6937 | } | |
6938 | *again = FALSE; | |
6939 | ||
6940 | /* Don't mess with linker-created sections. */ | |
6941 | if ((sec->flags & SEC_LINKER_CREATED) != 0) | |
6942 | return TRUE; | |
6943 | ||
6944 | relax_info = get_xtensa_relax_info (sec); | |
6945 | BFD_ASSERT (relax_info != NULL); | |
6946 | ||
6947 | switch (relax_info->visited) | |
6948 | { | |
6949 | case 0: | |
6950 | /* Note: It would be nice to fold this pass into | |
6951 | analyze_relocations, but it is important for this step that the | |
6952 | sections be examined in link order. */ | |
6953 | if (!compute_removed_literals (abfd, sec, link_info, values)) | |
6954 | return FALSE; | |
6955 | *again = TRUE; | |
6956 | break; | |
6957 | ||
6958 | case 1: | |
6959 | if (values) | |
6960 | value_map_hash_table_delete (values); | |
6961 | values = NULL; | |
6962 | if (!relax_section (abfd, sec, link_info)) | |
6963 | return FALSE; | |
6964 | *again = TRUE; | |
6965 | break; | |
6966 | ||
6967 | case 2: | |
6968 | if (!relax_section_symbols (abfd, sec)) | |
6969 | return FALSE; | |
6970 | break; | |
6971 | } | |
6972 | ||
6973 | relax_info->visited++; | |
6974 | return TRUE; | |
6975 | } | |
6976 | ||
6977 | \f | |
6978 | /* Initialization for relaxation. */ | |
6979 | ||
6980 | /* This function is called once at the start of relaxation. It scans | |
6981 | all the input sections and marks the ones that are relaxable (i.e., | |
6982 | literal sections with L32R relocations against them), and then | |
6983 | collects source_reloc information for all the relocations against | |
6984 | those relaxable sections. During this process, it also detects | |
6985 | longcalls, i.e., calls relaxed by the assembler into indirect | |
6986 | calls, that can be optimized back into direct calls. Within each | |
6987 | extended basic block (ebb) containing an optimized longcall, it | |
6988 | computes a set of "text actions" that can be performed to remove | |
6989 | the L32R associated with the longcall while optionally preserving | |
6990 | branch target alignments. */ | |
6991 | ||
6992 | static bfd_boolean | |
7fa3d080 | 6993 | analyze_relocations (struct bfd_link_info *link_info) |
43cd72b9 BW |
6994 | { |
6995 | bfd *abfd; | |
6996 | asection *sec; | |
6997 | bfd_boolean is_relaxable = FALSE; | |
6998 | ||
6999 | /* Initialize the per-section relaxation info. */ | |
c72f2fb2 | 7000 | for (abfd = link_info->input_bfds; abfd != NULL; abfd = abfd->link.next) |
43cd72b9 BW |
7001 | for (sec = abfd->sections; sec != NULL; sec = sec->next) |
7002 | { | |
7003 | init_xtensa_relax_info (sec); | |
7004 | } | |
7005 | ||
7006 | /* Mark relaxable sections (and count relocations against each one). */ | |
c72f2fb2 | 7007 | for (abfd = link_info->input_bfds; abfd != NULL; abfd = abfd->link.next) |
43cd72b9 BW |
7008 | for (sec = abfd->sections; sec != NULL; sec = sec->next) |
7009 | { | |
7010 | if (!find_relaxable_sections (abfd, sec, link_info, &is_relaxable)) | |
7011 | return FALSE; | |
7012 | } | |
7013 | ||
7014 | /* Bail out if there are no relaxable sections. */ | |
7015 | if (!is_relaxable) | |
7016 | return TRUE; | |
7017 | ||
7018 | /* Allocate space for source_relocs. */ | |
c72f2fb2 | 7019 | for (abfd = link_info->input_bfds; abfd != NULL; abfd = abfd->link.next) |
43cd72b9 BW |
7020 | for (sec = abfd->sections; sec != NULL; sec = sec->next) |
7021 | { | |
7022 | xtensa_relax_info *relax_info; | |
7023 | ||
7024 | relax_info = get_xtensa_relax_info (sec); | |
7025 | if (relax_info->is_relaxable_literal_section | |
7026 | || relax_info->is_relaxable_asm_section) | |
7027 | { | |
7028 | relax_info->src_relocs = (source_reloc *) | |
7029 | bfd_malloc (relax_info->src_count * sizeof (source_reloc)); | |
7030 | } | |
25c6282a BW |
7031 | else |
7032 | relax_info->src_count = 0; | |
43cd72b9 BW |
7033 | } |
7034 | ||
7035 | /* Collect info on relocations against each relaxable section. */ | |
c72f2fb2 | 7036 | for (abfd = link_info->input_bfds; abfd != NULL; abfd = abfd->link.next) |
43cd72b9 BW |
7037 | for (sec = abfd->sections; sec != NULL; sec = sec->next) |
7038 | { | |
7039 | if (!collect_source_relocs (abfd, sec, link_info)) | |
7040 | return FALSE; | |
7041 | } | |
7042 | ||
7043 | /* Compute the text actions. */ | |
c72f2fb2 | 7044 | for (abfd = link_info->input_bfds; abfd != NULL; abfd = abfd->link.next) |
43cd72b9 BW |
7045 | for (sec = abfd->sections; sec != NULL; sec = sec->next) |
7046 | { | |
7047 | if (!compute_text_actions (abfd, sec, link_info)) | |
7048 | return FALSE; | |
7049 | } | |
7050 | ||
7051 | return TRUE; | |
7052 | } | |
7053 | ||
7054 | ||
7055 | /* Find all the sections that might be relaxed. The motivation for | |
7056 | this pass is that collect_source_relocs() needs to record _all_ the | |
7057 | relocations that target each relaxable section. That is expensive | |
7058 | and unnecessary unless the target section is actually going to be | |
7059 | relaxed. This pass identifies all such sections by checking if | |
7060 | they have L32Rs pointing to them. In the process, the total number | |
7061 | of relocations targeting each section is also counted so that we | |
7062 | know how much space to allocate for source_relocs against each | |
7063 | relaxable literal section. */ | |
7064 | ||
7065 | static bfd_boolean | |
7fa3d080 BW |
7066 | find_relaxable_sections (bfd *abfd, |
7067 | asection *sec, | |
7068 | struct bfd_link_info *link_info, | |
7069 | bfd_boolean *is_relaxable_p) | |
43cd72b9 BW |
7070 | { |
7071 | Elf_Internal_Rela *internal_relocs; | |
7072 | bfd_byte *contents; | |
7073 | bfd_boolean ok = TRUE; | |
7074 | unsigned i; | |
7075 | xtensa_relax_info *source_relax_info; | |
25c6282a | 7076 | bfd_boolean is_l32r_reloc; |
43cd72b9 BW |
7077 | |
7078 | internal_relocs = retrieve_internal_relocs (abfd, sec, | |
7079 | link_info->keep_memory); | |
68ffbac6 | 7080 | if (internal_relocs == NULL) |
43cd72b9 BW |
7081 | return ok; |
7082 | ||
7083 | contents = retrieve_contents (abfd, sec, link_info->keep_memory); | |
7084 | if (contents == NULL && sec->size != 0) | |
7085 | { | |
7086 | ok = FALSE; | |
7087 | goto error_return; | |
7088 | } | |
7089 | ||
7090 | source_relax_info = get_xtensa_relax_info (sec); | |
68ffbac6 | 7091 | for (i = 0; i < sec->reloc_count; i++) |
43cd72b9 BW |
7092 | { |
7093 | Elf_Internal_Rela *irel = &internal_relocs[i]; | |
7094 | r_reloc r_rel; | |
7095 | asection *target_sec; | |
7096 | xtensa_relax_info *target_relax_info; | |
7097 | ||
7098 | /* If this section has not already been marked as "relaxable", and | |
7099 | if it contains any ASM_EXPAND relocations (marking expanded | |
7100 | longcalls) that can be optimized into direct calls, then mark | |
7101 | the section as "relaxable". */ | |
7102 | if (source_relax_info | |
7103 | && !source_relax_info->is_relaxable_asm_section | |
7104 | && ELF32_R_TYPE (irel->r_info) == R_XTENSA_ASM_EXPAND) | |
7105 | { | |
7106 | bfd_boolean is_reachable = FALSE; | |
7107 | if (is_resolvable_asm_expansion (abfd, sec, contents, irel, | |
7108 | link_info, &is_reachable) | |
7109 | && is_reachable) | |
7110 | { | |
7111 | source_relax_info->is_relaxable_asm_section = TRUE; | |
7112 | *is_relaxable_p = TRUE; | |
7113 | } | |
7114 | } | |
7115 | ||
7116 | r_reloc_init (&r_rel, abfd, irel, contents, | |
7117 | bfd_get_section_limit (abfd, sec)); | |
7118 | ||
7119 | target_sec = r_reloc_get_section (&r_rel); | |
7120 | target_relax_info = get_xtensa_relax_info (target_sec); | |
7121 | if (!target_relax_info) | |
7122 | continue; | |
7123 | ||
7124 | /* Count PC-relative operand relocations against the target section. | |
07d6d2b8 | 7125 | Note: The conditions tested here must match the conditions under |
43cd72b9 | 7126 | which init_source_reloc is called in collect_source_relocs(). */ |
25c6282a BW |
7127 | is_l32r_reloc = FALSE; |
7128 | if (is_operand_relocation (ELF32_R_TYPE (irel->r_info))) | |
7129 | { | |
7130 | xtensa_opcode opcode = | |
7131 | get_relocation_opcode (abfd, sec, contents, irel); | |
7132 | if (opcode != XTENSA_UNDEFINED) | |
7133 | { | |
7134 | is_l32r_reloc = (opcode == get_l32r_opcode ()); | |
7135 | if (!is_alt_relocation (ELF32_R_TYPE (irel->r_info)) | |
7136 | || is_l32r_reloc) | |
7137 | target_relax_info->src_count++; | |
7138 | } | |
7139 | } | |
43cd72b9 | 7140 | |
25c6282a | 7141 | if (is_l32r_reloc && r_reloc_is_defined (&r_rel)) |
43cd72b9 BW |
7142 | { |
7143 | /* Mark the target section as relaxable. */ | |
7144 | target_relax_info->is_relaxable_literal_section = TRUE; | |
7145 | *is_relaxable_p = TRUE; | |
7146 | } | |
7147 | } | |
7148 | ||
7149 | error_return: | |
7150 | release_contents (sec, contents); | |
7151 | release_internal_relocs (sec, internal_relocs); | |
7152 | return ok; | |
7153 | } | |
7154 | ||
7155 | ||
7156 | /* Record _all_ the relocations that point to relaxable sections, and | |
7157 | get rid of ASM_EXPAND relocs by either converting them to | |
7158 | ASM_SIMPLIFY or by removing them. */ | |
7159 | ||
7160 | static bfd_boolean | |
7fa3d080 BW |
7161 | collect_source_relocs (bfd *abfd, |
7162 | asection *sec, | |
7163 | struct bfd_link_info *link_info) | |
43cd72b9 BW |
7164 | { |
7165 | Elf_Internal_Rela *internal_relocs; | |
7166 | bfd_byte *contents; | |
7167 | bfd_boolean ok = TRUE; | |
7168 | unsigned i; | |
7169 | bfd_size_type sec_size; | |
7170 | ||
68ffbac6 | 7171 | internal_relocs = retrieve_internal_relocs (abfd, sec, |
43cd72b9 | 7172 | link_info->keep_memory); |
68ffbac6 | 7173 | if (internal_relocs == NULL) |
43cd72b9 BW |
7174 | return ok; |
7175 | ||
7176 | sec_size = bfd_get_section_limit (abfd, sec); | |
7177 | contents = retrieve_contents (abfd, sec, link_info->keep_memory); | |
7178 | if (contents == NULL && sec_size != 0) | |
7179 | { | |
7180 | ok = FALSE; | |
7181 | goto error_return; | |
7182 | } | |
7183 | ||
7184 | /* Record relocations against relaxable literal sections. */ | |
68ffbac6 | 7185 | for (i = 0; i < sec->reloc_count; i++) |
43cd72b9 BW |
7186 | { |
7187 | Elf_Internal_Rela *irel = &internal_relocs[i]; | |
7188 | r_reloc r_rel; | |
7189 | asection *target_sec; | |
7190 | xtensa_relax_info *target_relax_info; | |
7191 | ||
7192 | r_reloc_init (&r_rel, abfd, irel, contents, sec_size); | |
7193 | ||
7194 | target_sec = r_reloc_get_section (&r_rel); | |
7195 | target_relax_info = get_xtensa_relax_info (target_sec); | |
7196 | ||
7197 | if (target_relax_info | |
7198 | && (target_relax_info->is_relaxable_literal_section | |
7199 | || target_relax_info->is_relaxable_asm_section)) | |
7200 | { | |
7201 | xtensa_opcode opcode = XTENSA_UNDEFINED; | |
7202 | int opnd = -1; | |
7203 | bfd_boolean is_abs_literal = FALSE; | |
7204 | ||
7205 | if (is_alt_relocation (ELF32_R_TYPE (irel->r_info))) | |
7206 | { | |
7207 | /* None of the current alternate relocs are PC-relative, | |
7208 | and only PC-relative relocs matter here. However, we | |
7209 | still need to record the opcode for literal | |
7210 | coalescing. */ | |
7211 | opcode = get_relocation_opcode (abfd, sec, contents, irel); | |
7212 | if (opcode == get_l32r_opcode ()) | |
7213 | { | |
7214 | is_abs_literal = TRUE; | |
7215 | opnd = 1; | |
7216 | } | |
7217 | else | |
7218 | opcode = XTENSA_UNDEFINED; | |
7219 | } | |
7220 | else if (is_operand_relocation (ELF32_R_TYPE (irel->r_info))) | |
7221 | { | |
7222 | opcode = get_relocation_opcode (abfd, sec, contents, irel); | |
7223 | opnd = get_relocation_opnd (opcode, ELF32_R_TYPE (irel->r_info)); | |
7224 | } | |
7225 | ||
7226 | if (opcode != XTENSA_UNDEFINED) | |
7227 | { | |
7228 | int src_next = target_relax_info->src_next++; | |
7229 | source_reloc *s_reloc = &target_relax_info->src_relocs[src_next]; | |
7230 | ||
7231 | init_source_reloc (s_reloc, sec, &r_rel, opcode, opnd, | |
7232 | is_abs_literal); | |
7233 | } | |
7234 | } | |
7235 | } | |
7236 | ||
7237 | /* Now get rid of ASM_EXPAND relocations. At this point, the | |
7238 | src_relocs array for the target literal section may still be | |
7239 | incomplete, but it must at least contain the entries for the L32R | |
7240 | relocations associated with ASM_EXPANDs because they were just | |
7241 | added in the preceding loop over the relocations. */ | |
7242 | ||
68ffbac6 | 7243 | for (i = 0; i < sec->reloc_count; i++) |
43cd72b9 BW |
7244 | { |
7245 | Elf_Internal_Rela *irel = &internal_relocs[i]; | |
7246 | bfd_boolean is_reachable; | |
7247 | ||
7248 | if (!is_resolvable_asm_expansion (abfd, sec, contents, irel, link_info, | |
7249 | &is_reachable)) | |
7250 | continue; | |
7251 | ||
7252 | if (is_reachable) | |
7253 | { | |
7254 | Elf_Internal_Rela *l32r_irel; | |
7255 | r_reloc r_rel; | |
7256 | asection *target_sec; | |
7257 | xtensa_relax_info *target_relax_info; | |
7258 | ||
7259 | /* Mark the source_reloc for the L32R so that it will be | |
7260 | removed in compute_removed_literals(), along with the | |
7261 | associated literal. */ | |
7262 | l32r_irel = find_associated_l32r_irel (abfd, sec, contents, | |
7263 | irel, internal_relocs); | |
7264 | if (l32r_irel == NULL) | |
7265 | continue; | |
7266 | ||
7267 | r_reloc_init (&r_rel, abfd, l32r_irel, contents, sec_size); | |
7268 | ||
7269 | target_sec = r_reloc_get_section (&r_rel); | |
7270 | target_relax_info = get_xtensa_relax_info (target_sec); | |
7271 | ||
7272 | if (target_relax_info | |
7273 | && (target_relax_info->is_relaxable_literal_section | |
7274 | || target_relax_info->is_relaxable_asm_section)) | |
7275 | { | |
7276 | source_reloc *s_reloc; | |
7277 | ||
7278 | /* Search the source_relocs for the entry corresponding to | |
7279 | the l32r_irel. Note: The src_relocs array is not yet | |
7280 | sorted, but it wouldn't matter anyway because we're | |
7281 | searching by source offset instead of target offset. */ | |
68ffbac6 | 7282 | s_reloc = find_source_reloc (target_relax_info->src_relocs, |
43cd72b9 BW |
7283 | target_relax_info->src_next, |
7284 | sec, l32r_irel); | |
7285 | BFD_ASSERT (s_reloc); | |
7286 | s_reloc->is_null = TRUE; | |
7287 | } | |
7288 | ||
7289 | /* Convert this reloc to ASM_SIMPLIFY. */ | |
7290 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
7291 | R_XTENSA_ASM_SIMPLIFY); | |
7292 | l32r_irel->r_info = ELF32_R_INFO (0, R_XTENSA_NONE); | |
7293 | ||
7294 | pin_internal_relocs (sec, internal_relocs); | |
7295 | } | |
7296 | else | |
7297 | { | |
7298 | /* It is resolvable but doesn't reach. We resolve now | |
7299 | by eliminating the relocation -- the call will remain | |
7300 | expanded into L32R/CALLX. */ | |
7301 | irel->r_info = ELF32_R_INFO (0, R_XTENSA_NONE); | |
7302 | pin_internal_relocs (sec, internal_relocs); | |
7303 | } | |
7304 | } | |
7305 | ||
7306 | error_return: | |
7307 | release_contents (sec, contents); | |
7308 | release_internal_relocs (sec, internal_relocs); | |
7309 | return ok; | |
7310 | } | |
7311 | ||
7312 | ||
7313 | /* Return TRUE if the asm expansion can be resolved. Generally it can | |
7314 | be resolved on a final link or when a partial link locates it in the | |
7315 | same section as the target. Set "is_reachable" flag if the target of | |
7316 | the call is within the range of a direct call, given the current VMA | |
7317 | for this section and the target section. */ | |
7318 | ||
7319 | bfd_boolean | |
7fa3d080 BW |
7320 | is_resolvable_asm_expansion (bfd *abfd, |
7321 | asection *sec, | |
7322 | bfd_byte *contents, | |
7323 | Elf_Internal_Rela *irel, | |
7324 | struct bfd_link_info *link_info, | |
7325 | bfd_boolean *is_reachable_p) | |
43cd72b9 BW |
7326 | { |
7327 | asection *target_sec; | |
eed62915 MF |
7328 | asection *s; |
7329 | bfd_vma first_vma; | |
7330 | bfd_vma last_vma; | |
7331 | unsigned int first_align; | |
7332 | unsigned int adjust; | |
43cd72b9 BW |
7333 | bfd_vma target_offset; |
7334 | r_reloc r_rel; | |
7335 | xtensa_opcode opcode, direct_call_opcode; | |
7336 | bfd_vma self_address; | |
7337 | bfd_vma dest_address; | |
7338 | bfd_boolean uses_l32r; | |
7339 | bfd_size_type sec_size; | |
7340 | ||
7341 | *is_reachable_p = FALSE; | |
7342 | ||
7343 | if (contents == NULL) | |
7344 | return FALSE; | |
7345 | ||
68ffbac6 | 7346 | if (ELF32_R_TYPE (irel->r_info) != R_XTENSA_ASM_EXPAND) |
43cd72b9 BW |
7347 | return FALSE; |
7348 | ||
7349 | sec_size = bfd_get_section_limit (abfd, sec); | |
7350 | opcode = get_expanded_call_opcode (contents + irel->r_offset, | |
7351 | sec_size - irel->r_offset, &uses_l32r); | |
7352 | /* Optimization of longcalls that use CONST16 is not yet implemented. */ | |
7353 | if (!uses_l32r) | |
7354 | return FALSE; | |
68ffbac6 | 7355 | |
43cd72b9 BW |
7356 | direct_call_opcode = swap_callx_for_call_opcode (opcode); |
7357 | if (direct_call_opcode == XTENSA_UNDEFINED) | |
7358 | return FALSE; | |
7359 | ||
7360 | /* Check and see that the target resolves. */ | |
7361 | r_reloc_init (&r_rel, abfd, irel, contents, sec_size); | |
7362 | if (!r_reloc_is_defined (&r_rel)) | |
7363 | return FALSE; | |
7364 | ||
7365 | target_sec = r_reloc_get_section (&r_rel); | |
7366 | target_offset = r_rel.target_offset; | |
7367 | ||
7368 | /* If the target is in a shared library, then it doesn't reach. This | |
7369 | isn't supposed to come up because the compiler should never generate | |
7370 | non-PIC calls on systems that use shared libraries, but the linker | |
7371 | shouldn't crash regardless. */ | |
7372 | if (!target_sec->output_section) | |
7373 | return FALSE; | |
68ffbac6 | 7374 | |
43cd72b9 BW |
7375 | /* For relocatable sections, we can only simplify when the output |
7376 | section of the target is the same as the output section of the | |
7377 | source. */ | |
0e1862bb | 7378 | if (bfd_link_relocatable (link_info) |
43cd72b9 BW |
7379 | && (target_sec->output_section != sec->output_section |
7380 | || is_reloc_sym_weak (abfd, irel))) | |
7381 | return FALSE; | |
7382 | ||
331ed130 SA |
7383 | if (target_sec->output_section != sec->output_section) |
7384 | { | |
7385 | /* If the two sections are sufficiently far away that relaxation | |
7386 | might take the call out of range, we can't simplify. For | |
7387 | example, a positive displacement call into another memory | |
7388 | could get moved to a lower address due to literal removal, | |
7389 | but the destination won't move, and so the displacment might | |
7390 | get larger. | |
7391 | ||
7392 | If the displacement is negative, assume the destination could | |
7393 | move as far back as the start of the output section. The | |
7394 | self_address will be at least as far into the output section | |
7395 | as it is prior to relaxation. | |
7396 | ||
7397 | If the displacement is postive, assume the destination will be in | |
7398 | it's pre-relaxed location (because relaxation only makes sections | |
7399 | smaller). The self_address could go all the way to the beginning | |
7400 | of the output section. */ | |
7401 | ||
7402 | dest_address = target_sec->output_section->vma; | |
7403 | self_address = sec->output_section->vma; | |
7404 | ||
7405 | if (sec->output_section->vma > target_sec->output_section->vma) | |
7406 | self_address += sec->output_offset + irel->r_offset + 3; | |
7407 | else | |
7408 | dest_address += bfd_get_section_limit (abfd, target_sec->output_section); | |
7409 | /* Call targets should be four-byte aligned. */ | |
7410 | dest_address = (dest_address + 3) & ~3; | |
7411 | } | |
7412 | else | |
7413 | { | |
7414 | ||
7415 | self_address = (sec->output_section->vma | |
7416 | + sec->output_offset + irel->r_offset + 3); | |
7417 | dest_address = (target_sec->output_section->vma | |
7418 | + target_sec->output_offset + target_offset); | |
7419 | } | |
68ffbac6 | 7420 | |
eed62915 MF |
7421 | /* Adjust addresses with alignments for the worst case to see if call insn |
7422 | can fit. Don't relax l32r + callx to call if the target can be out of | |
7423 | range due to alignment. | |
7424 | Caller and target addresses are highest and lowest address. | |
7425 | Search all sections between caller and target, looking for max alignment. | |
7426 | The adjustment is max alignment bytes. If the alignment at the lowest | |
7427 | address is less than the adjustment, apply the adjustment to highest | |
7428 | address. */ | |
7429 | ||
7430 | /* Start from lowest address. | |
7431 | Lowest address aligmnet is from input section. | |
7432 | Initial alignment (adjust) is from input section. */ | |
7433 | if (dest_address > self_address) | |
7434 | { | |
7435 | s = sec->output_section; | |
7436 | last_vma = dest_address; | |
7437 | first_align = sec->alignment_power; | |
7438 | adjust = target_sec->alignment_power; | |
7439 | } | |
7440 | else | |
7441 | { | |
7442 | s = target_sec->output_section; | |
7443 | last_vma = self_address; | |
7444 | first_align = target_sec->alignment_power; | |
7445 | adjust = sec->alignment_power; | |
7446 | } | |
7447 | ||
7448 | first_vma = s->vma; | |
7449 | ||
7450 | /* Find the largest alignment in output section list. */ | |
7451 | for (; s && s->vma >= first_vma && s->vma <= last_vma ; s = s->next) | |
7452 | { | |
7453 | if (s->alignment_power > adjust) | |
7454 | adjust = s->alignment_power; | |
7455 | } | |
7456 | ||
7457 | if (adjust > first_align) | |
7458 | { | |
7459 | /* Alignment may enlarge the range, adjust highest address. */ | |
7460 | adjust = 1 << adjust; | |
7461 | if (dest_address > self_address) | |
7462 | { | |
7463 | dest_address += adjust; | |
7464 | } | |
7465 | else | |
7466 | { | |
7467 | self_address += adjust; | |
7468 | } | |
7469 | } | |
7470 | ||
43cd72b9 BW |
7471 | *is_reachable_p = pcrel_reloc_fits (direct_call_opcode, 0, |
7472 | self_address, dest_address); | |
7473 | ||
7474 | if ((self_address >> CALL_SEGMENT_BITS) != | |
7475 | (dest_address >> CALL_SEGMENT_BITS)) | |
7476 | return FALSE; | |
7477 | ||
7478 | return TRUE; | |
7479 | } | |
7480 | ||
7481 | ||
7482 | static Elf_Internal_Rela * | |
7fa3d080 BW |
7483 | find_associated_l32r_irel (bfd *abfd, |
7484 | asection *sec, | |
7485 | bfd_byte *contents, | |
7486 | Elf_Internal_Rela *other_irel, | |
7487 | Elf_Internal_Rela *internal_relocs) | |
43cd72b9 BW |
7488 | { |
7489 | unsigned i; | |
e0001a05 | 7490 | |
68ffbac6 | 7491 | for (i = 0; i < sec->reloc_count; i++) |
43cd72b9 BW |
7492 | { |
7493 | Elf_Internal_Rela *irel = &internal_relocs[i]; | |
e0001a05 | 7494 | |
43cd72b9 BW |
7495 | if (irel == other_irel) |
7496 | continue; | |
7497 | if (irel->r_offset != other_irel->r_offset) | |
7498 | continue; | |
7499 | if (is_l32r_relocation (abfd, sec, contents, irel)) | |
7500 | return irel; | |
7501 | } | |
7502 | ||
7503 | return NULL; | |
e0001a05 NC |
7504 | } |
7505 | ||
7506 | ||
cb337148 BW |
7507 | static xtensa_opcode * |
7508 | build_reloc_opcodes (bfd *abfd, | |
7509 | asection *sec, | |
7510 | bfd_byte *contents, | |
7511 | Elf_Internal_Rela *internal_relocs) | |
7512 | { | |
7513 | unsigned i; | |
7514 | xtensa_opcode *reloc_opcodes = | |
7515 | (xtensa_opcode *) bfd_malloc (sizeof (xtensa_opcode) * sec->reloc_count); | |
7516 | for (i = 0; i < sec->reloc_count; i++) | |
7517 | { | |
7518 | Elf_Internal_Rela *irel = &internal_relocs[i]; | |
7519 | reloc_opcodes[i] = get_relocation_opcode (abfd, sec, contents, irel); | |
7520 | } | |
7521 | return reloc_opcodes; | |
7522 | } | |
7523 | ||
b2b326d2 MF |
7524 | struct reloc_range_struct |
7525 | { | |
7526 | bfd_vma addr; | |
7527 | bfd_boolean add; /* TRUE if start of a range, FALSE otherwise. */ | |
7528 | /* Original irel index in the array of relocations for a section. */ | |
7529 | unsigned irel_index; | |
7530 | }; | |
7531 | typedef struct reloc_range_struct reloc_range; | |
7532 | ||
7533 | typedef struct reloc_range_list_entry_struct reloc_range_list_entry; | |
7534 | struct reloc_range_list_entry_struct | |
7535 | { | |
7536 | reloc_range_list_entry *next; | |
7537 | reloc_range_list_entry *prev; | |
7538 | Elf_Internal_Rela *irel; | |
7539 | xtensa_opcode opcode; | |
7540 | int opnum; | |
7541 | }; | |
7542 | ||
7543 | struct reloc_range_list_struct | |
7544 | { | |
7545 | /* The rest of the structure is only meaningful when ok is TRUE. */ | |
7546 | bfd_boolean ok; | |
7547 | ||
7548 | unsigned n_range; /* Number of range markers. */ | |
7549 | reloc_range *range; /* Sorted range markers. */ | |
7550 | ||
7551 | unsigned first; /* Index of a first range element in the list. */ | |
7552 | unsigned last; /* One past index of a last range element in the list. */ | |
7553 | ||
7554 | unsigned n_list; /* Number of list elements. */ | |
7555 | reloc_range_list_entry *reloc; /* */ | |
7556 | reloc_range_list_entry list_root; | |
7557 | }; | |
7558 | ||
7559 | static int | |
7560 | reloc_range_compare (const void *a, const void *b) | |
7561 | { | |
7562 | const reloc_range *ra = a; | |
7563 | const reloc_range *rb = b; | |
7564 | ||
7565 | if (ra->addr != rb->addr) | |
7566 | return ra->addr < rb->addr ? -1 : 1; | |
7567 | if (ra->add != rb->add) | |
7568 | return ra->add ? -1 : 1; | |
7569 | return 0; | |
7570 | } | |
7571 | ||
7572 | static void | |
7573 | build_reloc_ranges (bfd *abfd, asection *sec, | |
7574 | bfd_byte *contents, | |
7575 | Elf_Internal_Rela *internal_relocs, | |
7576 | xtensa_opcode *reloc_opcodes, | |
7577 | reloc_range_list *list) | |
7578 | { | |
7579 | unsigned i; | |
7580 | size_t n = 0; | |
7581 | size_t max_n = 0; | |
7582 | reloc_range *ranges = NULL; | |
7583 | reloc_range_list_entry *reloc = | |
7584 | bfd_malloc (sec->reloc_count * sizeof (*reloc)); | |
7585 | ||
7586 | memset (list, 0, sizeof (*list)); | |
7587 | list->ok = TRUE; | |
7588 | ||
7589 | for (i = 0; i < sec->reloc_count; i++) | |
7590 | { | |
7591 | Elf_Internal_Rela *irel = &internal_relocs[i]; | |
7592 | int r_type = ELF32_R_TYPE (irel->r_info); | |
7593 | reloc_howto_type *howto = &elf_howto_table[r_type]; | |
7594 | r_reloc r_rel; | |
7595 | ||
7596 | if (r_type == R_XTENSA_ASM_SIMPLIFY | |
7597 | || r_type == R_XTENSA_32_PCREL | |
7598 | || !howto->pc_relative) | |
7599 | continue; | |
7600 | ||
7601 | r_reloc_init (&r_rel, abfd, irel, contents, | |
7602 | bfd_get_section_limit (abfd, sec)); | |
7603 | ||
7604 | if (r_reloc_get_section (&r_rel) != sec) | |
7605 | continue; | |
7606 | ||
7607 | if (n + 2 > max_n) | |
7608 | { | |
7609 | max_n = (max_n + 2) * 2; | |
7610 | ranges = bfd_realloc (ranges, max_n * sizeof (*ranges)); | |
7611 | } | |
7612 | ||
7613 | ranges[n].addr = irel->r_offset; | |
7614 | ranges[n + 1].addr = r_rel.target_offset; | |
7615 | ||
7616 | ranges[n].add = ranges[n].addr < ranges[n + 1].addr; | |
7617 | ranges[n + 1].add = !ranges[n].add; | |
7618 | ||
7619 | ranges[n].irel_index = i; | |
7620 | ranges[n + 1].irel_index = i; | |
7621 | ||
7622 | n += 2; | |
7623 | ||
7624 | reloc[i].irel = irel; | |
7625 | ||
7626 | /* Every relocation won't possibly be checked in the optimized version of | |
07d6d2b8 | 7627 | check_section_ebb_pcrels_fit, so this needs to be done here. */ |
b2b326d2 MF |
7628 | if (is_alt_relocation (ELF32_R_TYPE (irel->r_info))) |
7629 | { | |
7630 | /* None of the current alternate relocs are PC-relative, | |
7631 | and only PC-relative relocs matter here. */ | |
7632 | } | |
7633 | else | |
7634 | { | |
7635 | xtensa_opcode opcode; | |
7636 | int opnum; | |
7637 | ||
7638 | if (reloc_opcodes) | |
7639 | opcode = reloc_opcodes[i]; | |
7640 | else | |
7641 | opcode = get_relocation_opcode (abfd, sec, contents, irel); | |
7642 | ||
7643 | if (opcode == XTENSA_UNDEFINED) | |
7644 | { | |
7645 | list->ok = FALSE; | |
7646 | break; | |
7647 | } | |
7648 | ||
7649 | opnum = get_relocation_opnd (opcode, ELF32_R_TYPE (irel->r_info)); | |
7650 | if (opnum == XTENSA_UNDEFINED) | |
7651 | { | |
7652 | list->ok = FALSE; | |
7653 | break; | |
7654 | } | |
7655 | ||
7656 | /* Record relocation opcode and opnum as we've calculated them | |
7657 | anyway and they won't change. */ | |
7658 | reloc[i].opcode = opcode; | |
7659 | reloc[i].opnum = opnum; | |
7660 | } | |
7661 | } | |
7662 | ||
7663 | if (list->ok) | |
7664 | { | |
7665 | ranges = bfd_realloc (ranges, n * sizeof (*ranges)); | |
7666 | qsort (ranges, n, sizeof (*ranges), reloc_range_compare); | |
7667 | ||
7668 | list->n_range = n; | |
7669 | list->range = ranges; | |
7670 | list->reloc = reloc; | |
7671 | list->list_root.prev = &list->list_root; | |
7672 | list->list_root.next = &list->list_root; | |
7673 | } | |
7674 | else | |
7675 | { | |
7676 | free (ranges); | |
7677 | free (reloc); | |
7678 | } | |
7679 | } | |
7680 | ||
7681 | static void reloc_range_list_append (reloc_range_list *list, | |
7682 | unsigned irel_index) | |
7683 | { | |
7684 | reloc_range_list_entry *entry = list->reloc + irel_index; | |
7685 | ||
7686 | entry->prev = list->list_root.prev; | |
7687 | entry->next = &list->list_root; | |
7688 | entry->prev->next = entry; | |
7689 | entry->next->prev = entry; | |
7690 | ++list->n_list; | |
7691 | } | |
7692 | ||
7693 | static void reloc_range_list_remove (reloc_range_list *list, | |
7694 | unsigned irel_index) | |
7695 | { | |
7696 | reloc_range_list_entry *entry = list->reloc + irel_index; | |
7697 | ||
7698 | entry->next->prev = entry->prev; | |
7699 | entry->prev->next = entry->next; | |
7700 | --list->n_list; | |
7701 | } | |
7702 | ||
7703 | /* Update relocation list object so that it lists all relocations that cross | |
7704 | [first; last] range. Range bounds should not decrease with successive | |
7705 | invocations. */ | |
7706 | static void reloc_range_list_update_range (reloc_range_list *list, | |
7707 | bfd_vma first, bfd_vma last) | |
7708 | { | |
7709 | /* This should not happen: EBBs are iterated from lower addresses to higher. | |
7710 | But even if that happens there's no need to break: just flush current list | |
7711 | and start from scratch. */ | |
7712 | if ((list->last > 0 && list->range[list->last - 1].addr > last) || | |
7713 | (list->first > 0 && list->range[list->first - 1].addr >= first)) | |
7714 | { | |
7715 | list->first = 0; | |
7716 | list->last = 0; | |
7717 | list->n_list = 0; | |
7718 | list->list_root.next = &list->list_root; | |
7719 | list->list_root.prev = &list->list_root; | |
7720 | fprintf (stderr, "%s: move backwards requested\n", __func__); | |
7721 | } | |
7722 | ||
7723 | for (; list->last < list->n_range && | |
7724 | list->range[list->last].addr <= last; ++list->last) | |
7725 | if (list->range[list->last].add) | |
7726 | reloc_range_list_append (list, list->range[list->last].irel_index); | |
7727 | ||
7728 | for (; list->first < list->n_range && | |
7729 | list->range[list->first].addr < first; ++list->first) | |
7730 | if (!list->range[list->first].add) | |
7731 | reloc_range_list_remove (list, list->range[list->first].irel_index); | |
7732 | } | |
7733 | ||
7734 | static void free_reloc_range_list (reloc_range_list *list) | |
7735 | { | |
7736 | free (list->range); | |
7737 | free (list->reloc); | |
7738 | } | |
cb337148 | 7739 | |
43cd72b9 BW |
7740 | /* The compute_text_actions function will build a list of potential |
7741 | transformation actions for code in the extended basic block of each | |
7742 | longcall that is optimized to a direct call. From this list we | |
7743 | generate a set of actions to actually perform that optimizes for | |
7744 | space and, if not using size_opt, maintains branch target | |
7745 | alignments. | |
e0001a05 | 7746 | |
43cd72b9 BW |
7747 | These actions to be performed are placed on a per-section list. |
7748 | The actual changes are performed by relax_section() in the second | |
7749 | pass. */ | |
7750 | ||
7751 | bfd_boolean | |
7fa3d080 BW |
7752 | compute_text_actions (bfd *abfd, |
7753 | asection *sec, | |
7754 | struct bfd_link_info *link_info) | |
e0001a05 | 7755 | { |
cb337148 | 7756 | xtensa_opcode *reloc_opcodes = NULL; |
43cd72b9 | 7757 | xtensa_relax_info *relax_info; |
e0001a05 | 7758 | bfd_byte *contents; |
43cd72b9 | 7759 | Elf_Internal_Rela *internal_relocs; |
e0001a05 NC |
7760 | bfd_boolean ok = TRUE; |
7761 | unsigned i; | |
43cd72b9 BW |
7762 | property_table_entry *prop_table = 0; |
7763 | int ptblsize = 0; | |
7764 | bfd_size_type sec_size; | |
b2b326d2 | 7765 | reloc_range_list relevant_relocs; |
43cd72b9 | 7766 | |
43cd72b9 BW |
7767 | relax_info = get_xtensa_relax_info (sec); |
7768 | BFD_ASSERT (relax_info); | |
25c6282a BW |
7769 | BFD_ASSERT (relax_info->src_next == relax_info->src_count); |
7770 | ||
7771 | /* Do nothing if the section contains no optimized longcalls. */ | |
43cd72b9 BW |
7772 | if (!relax_info->is_relaxable_asm_section) |
7773 | return ok; | |
e0001a05 NC |
7774 | |
7775 | internal_relocs = retrieve_internal_relocs (abfd, sec, | |
7776 | link_info->keep_memory); | |
e0001a05 | 7777 | |
43cd72b9 BW |
7778 | if (internal_relocs) |
7779 | qsort (internal_relocs, sec->reloc_count, sizeof (Elf_Internal_Rela), | |
7780 | internal_reloc_compare); | |
7781 | ||
7782 | sec_size = bfd_get_section_limit (abfd, sec); | |
e0001a05 | 7783 | contents = retrieve_contents (abfd, sec, link_info->keep_memory); |
43cd72b9 | 7784 | if (contents == NULL && sec_size != 0) |
e0001a05 NC |
7785 | { |
7786 | ok = FALSE; | |
7787 | goto error_return; | |
7788 | } | |
7789 | ||
43cd72b9 BW |
7790 | ptblsize = xtensa_read_table_entries (abfd, sec, &prop_table, |
7791 | XTENSA_PROP_SEC_NAME, FALSE); | |
7792 | if (ptblsize < 0) | |
7793 | { | |
7794 | ok = FALSE; | |
7795 | goto error_return; | |
7796 | } | |
7797 | ||
b2b326d2 MF |
7798 | /* Precompute the opcode for each relocation. */ |
7799 | reloc_opcodes = build_reloc_opcodes (abfd, sec, contents, internal_relocs); | |
7800 | ||
7801 | build_reloc_ranges (abfd, sec, contents, internal_relocs, reloc_opcodes, | |
7802 | &relevant_relocs); | |
7803 | ||
43cd72b9 | 7804 | for (i = 0; i < sec->reloc_count; i++) |
e0001a05 NC |
7805 | { |
7806 | Elf_Internal_Rela *irel = &internal_relocs[i]; | |
43cd72b9 BW |
7807 | bfd_vma r_offset; |
7808 | property_table_entry *the_entry; | |
7809 | int ptbl_idx; | |
7810 | ebb_t *ebb; | |
7811 | ebb_constraint ebb_table; | |
7812 | bfd_size_type simplify_size; | |
7813 | ||
7814 | if (irel && ELF32_R_TYPE (irel->r_info) != R_XTENSA_ASM_SIMPLIFY) | |
7815 | continue; | |
7816 | r_offset = irel->r_offset; | |
e0001a05 | 7817 | |
43cd72b9 BW |
7818 | simplify_size = get_asm_simplify_size (contents, sec_size, r_offset); |
7819 | if (simplify_size == 0) | |
7820 | { | |
4eca0228 | 7821 | _bfd_error_handler |
695344c0 | 7822 | /* xgettext:c-format */ |
2dcf00ce | 7823 | (_("%pB(%pA+%#" PRIx64 "): could not decode instruction for " |
d42c267e AM |
7824 | "XTENSA_ASM_SIMPLIFY relocation; " |
7825 | "possible configuration mismatch"), | |
2dcf00ce | 7826 | sec->owner, sec, (uint64_t) r_offset); |
43cd72b9 BW |
7827 | continue; |
7828 | } | |
e0001a05 | 7829 | |
43cd72b9 BW |
7830 | /* If the instruction table is not around, then don't do this |
7831 | relaxation. */ | |
7832 | the_entry = elf_xtensa_find_property_entry (prop_table, ptblsize, | |
7833 | sec->vma + irel->r_offset); | |
7834 | if (the_entry == NULL || XTENSA_NO_NOP_REMOVAL) | |
7835 | { | |
7836 | text_action_add (&relax_info->action_list, | |
7837 | ta_convert_longcall, sec, r_offset, | |
7838 | 0); | |
7839 | continue; | |
7840 | } | |
7841 | ||
7842 | /* If the next longcall happens to be at the same address as an | |
7843 | unreachable section of size 0, then skip forward. */ | |
7844 | ptbl_idx = the_entry - prop_table; | |
7845 | while ((the_entry->flags & XTENSA_PROP_UNREACHABLE) | |
7846 | && the_entry->size == 0 | |
7847 | && ptbl_idx + 1 < ptblsize | |
7848 | && (prop_table[ptbl_idx + 1].address | |
7849 | == prop_table[ptbl_idx].address)) | |
7850 | { | |
7851 | ptbl_idx++; | |
7852 | the_entry++; | |
7853 | } | |
e0001a05 | 7854 | |
99ded152 | 7855 | if (the_entry->flags & XTENSA_PROP_NO_TRANSFORM) |
43cd72b9 BW |
7856 | /* NO_REORDER is OK */ |
7857 | continue; | |
e0001a05 | 7858 | |
43cd72b9 BW |
7859 | init_ebb_constraint (&ebb_table); |
7860 | ebb = &ebb_table.ebb; | |
7861 | init_ebb (ebb, sec, contents, sec_size, prop_table, ptblsize, | |
7862 | internal_relocs, sec->reloc_count); | |
7863 | ebb->start_offset = r_offset + simplify_size; | |
7864 | ebb->end_offset = r_offset + simplify_size; | |
7865 | ebb->start_ptbl_idx = ptbl_idx; | |
7866 | ebb->end_ptbl_idx = ptbl_idx; | |
7867 | ebb->start_reloc_idx = i; | |
7868 | ebb->end_reloc_idx = i; | |
7869 | ||
7870 | if (!extend_ebb_bounds (ebb) | |
7871 | || !compute_ebb_proposed_actions (&ebb_table) | |
7872 | || !compute_ebb_actions (&ebb_table) | |
7873 | || !check_section_ebb_pcrels_fit (abfd, sec, contents, | |
b2b326d2 MF |
7874 | internal_relocs, |
7875 | &relevant_relocs, | |
7876 | &ebb_table, reloc_opcodes) | |
43cd72b9 | 7877 | || !check_section_ebb_reduces (&ebb_table)) |
e0001a05 | 7878 | { |
43cd72b9 BW |
7879 | /* If anything goes wrong or we get unlucky and something does |
7880 | not fit, with our plan because of expansion between | |
7881 | critical branches, just convert to a NOP. */ | |
7882 | ||
7883 | text_action_add (&relax_info->action_list, | |
7884 | ta_convert_longcall, sec, r_offset, 0); | |
7885 | i = ebb_table.ebb.end_reloc_idx; | |
7886 | free_ebb_constraint (&ebb_table); | |
7887 | continue; | |
e0001a05 | 7888 | } |
43cd72b9 BW |
7889 | |
7890 | text_action_add_proposed (&relax_info->action_list, &ebb_table, sec); | |
7891 | ||
7892 | /* Update the index so we do not go looking at the relocations | |
7893 | we have already processed. */ | |
7894 | i = ebb_table.ebb.end_reloc_idx; | |
7895 | free_ebb_constraint (&ebb_table); | |
e0001a05 NC |
7896 | } |
7897 | ||
b2b326d2 MF |
7898 | free_reloc_range_list (&relevant_relocs); |
7899 | ||
43cd72b9 | 7900 | #if DEBUG |
4c2af04f | 7901 | if (action_list_count (&relax_info->action_list)) |
43cd72b9 BW |
7902 | print_action_list (stderr, &relax_info->action_list); |
7903 | #endif | |
7904 | ||
dc1e8a47 | 7905 | error_return: |
e0001a05 NC |
7906 | release_contents (sec, contents); |
7907 | release_internal_relocs (sec, internal_relocs); | |
c9594989 AM |
7908 | free (prop_table); |
7909 | free (reloc_opcodes); | |
43cd72b9 | 7910 | |
e0001a05 NC |
7911 | return ok; |
7912 | } | |
7913 | ||
7914 | ||
64b607e6 BW |
7915 | /* Do not widen an instruction if it is preceeded by a |
7916 | loop opcode. It might cause misalignment. */ | |
7917 | ||
7918 | static bfd_boolean | |
7919 | prev_instr_is_a_loop (bfd_byte *contents, | |
7920 | bfd_size_type content_length, | |
7921 | bfd_size_type offset) | |
7922 | { | |
7923 | xtensa_opcode prev_opcode; | |
7924 | ||
7925 | if (offset < 3) | |
7926 | return FALSE; | |
7927 | prev_opcode = insn_decode_opcode (contents, content_length, offset-3, 0); | |
7928 | return (xtensa_opcode_is_loop (xtensa_default_isa, prev_opcode) == 1); | |
68ffbac6 | 7929 | } |
64b607e6 BW |
7930 | |
7931 | ||
43cd72b9 | 7932 | /* Find all of the possible actions for an extended basic block. */ |
e0001a05 | 7933 | |
43cd72b9 | 7934 | bfd_boolean |
7fa3d080 | 7935 | compute_ebb_proposed_actions (ebb_constraint *ebb_table) |
e0001a05 | 7936 | { |
43cd72b9 BW |
7937 | const ebb_t *ebb = &ebb_table->ebb; |
7938 | unsigned rel_idx = ebb->start_reloc_idx; | |
7939 | property_table_entry *entry, *start_entry, *end_entry; | |
64b607e6 BW |
7940 | bfd_vma offset = 0; |
7941 | xtensa_isa isa = xtensa_default_isa; | |
7942 | xtensa_format fmt; | |
7943 | static xtensa_insnbuf insnbuf = NULL; | |
7944 | static xtensa_insnbuf slotbuf = NULL; | |
7945 | ||
7946 | if (insnbuf == NULL) | |
7947 | { | |
7948 | insnbuf = xtensa_insnbuf_alloc (isa); | |
7949 | slotbuf = xtensa_insnbuf_alloc (isa); | |
7950 | } | |
e0001a05 | 7951 | |
43cd72b9 BW |
7952 | start_entry = &ebb->ptbl[ebb->start_ptbl_idx]; |
7953 | end_entry = &ebb->ptbl[ebb->end_ptbl_idx]; | |
e0001a05 | 7954 | |
43cd72b9 | 7955 | for (entry = start_entry; entry <= end_entry; entry++) |
e0001a05 | 7956 | { |
64b607e6 | 7957 | bfd_vma start_offset, end_offset; |
43cd72b9 | 7958 | bfd_size_type insn_len; |
e0001a05 | 7959 | |
43cd72b9 BW |
7960 | start_offset = entry->address - ebb->sec->vma; |
7961 | end_offset = entry->address + entry->size - ebb->sec->vma; | |
e0001a05 | 7962 | |
43cd72b9 BW |
7963 | if (entry == start_entry) |
7964 | start_offset = ebb->start_offset; | |
7965 | if (entry == end_entry) | |
7966 | end_offset = ebb->end_offset; | |
7967 | offset = start_offset; | |
e0001a05 | 7968 | |
43cd72b9 BW |
7969 | if (offset == entry->address - ebb->sec->vma |
7970 | && (entry->flags & XTENSA_PROP_INSN_BRANCH_TARGET) != 0) | |
7971 | { | |
7972 | enum ebb_target_enum align_type = EBB_DESIRE_TGT_ALIGN; | |
7973 | BFD_ASSERT (offset != end_offset); | |
7974 | if (offset == end_offset) | |
7975 | return FALSE; | |
e0001a05 | 7976 | |
43cd72b9 BW |
7977 | insn_len = insn_decode_len (ebb->contents, ebb->content_length, |
7978 | offset); | |
68ffbac6 | 7979 | if (insn_len == 0) |
64b607e6 BW |
7980 | goto decode_error; |
7981 | ||
43cd72b9 BW |
7982 | if (check_branch_target_aligned_address (offset, insn_len)) |
7983 | align_type = EBB_REQUIRE_TGT_ALIGN; | |
7984 | ||
7985 | ebb_propose_action (ebb_table, align_type, 0, | |
7986 | ta_none, offset, 0, TRUE); | |
7987 | } | |
7988 | ||
7989 | while (offset != end_offset) | |
e0001a05 | 7990 | { |
43cd72b9 | 7991 | Elf_Internal_Rela *irel; |
e0001a05 | 7992 | xtensa_opcode opcode; |
e0001a05 | 7993 | |
43cd72b9 BW |
7994 | while (rel_idx < ebb->end_reloc_idx |
7995 | && (ebb->relocs[rel_idx].r_offset < offset | |
7996 | || (ebb->relocs[rel_idx].r_offset == offset | |
7997 | && (ELF32_R_TYPE (ebb->relocs[rel_idx].r_info) | |
7998 | != R_XTENSA_ASM_SIMPLIFY)))) | |
7999 | rel_idx++; | |
8000 | ||
8001 | /* Check for longcall. */ | |
8002 | irel = &ebb->relocs[rel_idx]; | |
8003 | if (irel->r_offset == offset | |
8004 | && ELF32_R_TYPE (irel->r_info) == R_XTENSA_ASM_SIMPLIFY) | |
8005 | { | |
8006 | bfd_size_type simplify_size; | |
e0001a05 | 8007 | |
68ffbac6 | 8008 | simplify_size = get_asm_simplify_size (ebb->contents, |
43cd72b9 BW |
8009 | ebb->content_length, |
8010 | irel->r_offset); | |
8011 | if (simplify_size == 0) | |
64b607e6 | 8012 | goto decode_error; |
43cd72b9 BW |
8013 | |
8014 | ebb_propose_action (ebb_table, EBB_NO_ALIGN, 0, | |
8015 | ta_convert_longcall, offset, 0, TRUE); | |
68ffbac6 | 8016 | |
43cd72b9 BW |
8017 | offset += simplify_size; |
8018 | continue; | |
8019 | } | |
e0001a05 | 8020 | |
64b607e6 BW |
8021 | if (offset + MIN_INSN_LENGTH > ebb->content_length) |
8022 | goto decode_error; | |
8023 | xtensa_insnbuf_from_chars (isa, insnbuf, &ebb->contents[offset], | |
8024 | ebb->content_length - offset); | |
8025 | fmt = xtensa_format_decode (isa, insnbuf); | |
8026 | if (fmt == XTENSA_UNDEFINED) | |
8027 | goto decode_error; | |
8028 | insn_len = xtensa_format_length (isa, fmt); | |
8029 | if (insn_len == (bfd_size_type) XTENSA_UNDEFINED) | |
8030 | goto decode_error; | |
8031 | ||
8032 | if (xtensa_format_num_slots (isa, fmt) != 1) | |
43cd72b9 | 8033 | { |
64b607e6 BW |
8034 | offset += insn_len; |
8035 | continue; | |
43cd72b9 | 8036 | } |
64b607e6 BW |
8037 | |
8038 | xtensa_format_get_slot (isa, fmt, 0, insnbuf, slotbuf); | |
8039 | opcode = xtensa_opcode_decode (isa, fmt, 0, slotbuf); | |
8040 | if (opcode == XTENSA_UNDEFINED) | |
8041 | goto decode_error; | |
8042 | ||
43cd72b9 | 8043 | if ((entry->flags & XTENSA_PROP_INSN_NO_DENSITY) == 0 |
99ded152 | 8044 | && (entry->flags & XTENSA_PROP_NO_TRANSFORM) == 0 |
64b607e6 | 8045 | && can_narrow_instruction (slotbuf, fmt, opcode) != 0) |
43cd72b9 BW |
8046 | { |
8047 | /* Add an instruction narrow action. */ | |
8048 | ebb_propose_action (ebb_table, EBB_NO_ALIGN, 0, | |
8049 | ta_narrow_insn, offset, 0, FALSE); | |
43cd72b9 | 8050 | } |
99ded152 | 8051 | else if ((entry->flags & XTENSA_PROP_NO_TRANSFORM) == 0 |
64b607e6 BW |
8052 | && can_widen_instruction (slotbuf, fmt, opcode) != 0 |
8053 | && ! prev_instr_is_a_loop (ebb->contents, | |
8054 | ebb->content_length, offset)) | |
43cd72b9 BW |
8055 | { |
8056 | /* Add an instruction widen action. */ | |
8057 | ebb_propose_action (ebb_table, EBB_NO_ALIGN, 0, | |
8058 | ta_widen_insn, offset, 0, FALSE); | |
43cd72b9 | 8059 | } |
64b607e6 | 8060 | else if (xtensa_opcode_is_loop (xtensa_default_isa, opcode) == 1) |
43cd72b9 BW |
8061 | { |
8062 | /* Check for branch targets. */ | |
8063 | ebb_propose_action (ebb_table, EBB_REQUIRE_LOOP_ALIGN, 0, | |
8064 | ta_none, offset, 0, TRUE); | |
43cd72b9 BW |
8065 | } |
8066 | ||
8067 | offset += insn_len; | |
e0001a05 NC |
8068 | } |
8069 | } | |
8070 | ||
43cd72b9 BW |
8071 | if (ebb->ends_unreachable) |
8072 | { | |
8073 | ebb_propose_action (ebb_table, EBB_NO_ALIGN, 0, | |
8074 | ta_fill, ebb->end_offset, 0, TRUE); | |
8075 | } | |
e0001a05 | 8076 | |
43cd72b9 | 8077 | return TRUE; |
64b607e6 BW |
8078 | |
8079 | decode_error: | |
4eca0228 | 8080 | _bfd_error_handler |
695344c0 | 8081 | /* xgettext:c-format */ |
2dcf00ce | 8082 | (_("%pB(%pA+%#" PRIx64 "): could not decode instruction; " |
d42c267e | 8083 | "possible configuration mismatch"), |
2dcf00ce | 8084 | ebb->sec->owner, ebb->sec, (uint64_t) offset); |
64b607e6 | 8085 | return FALSE; |
43cd72b9 BW |
8086 | } |
8087 | ||
8088 | ||
8089 | /* After all of the information has collected about the | |
8090 | transformations possible in an EBB, compute the appropriate actions | |
8091 | here in compute_ebb_actions. We still must check later to make | |
8092 | sure that the actions do not break any relocations. The algorithm | |
8093 | used here is pretty greedy. Basically, it removes as many no-ops | |
8094 | as possible so that the end of the EBB has the same alignment | |
8095 | characteristics as the original. First, it uses narrowing, then | |
8096 | fill space at the end of the EBB, and finally widenings. If that | |
8097 | does not work, it tries again with one fewer no-op removed. The | |
8098 | optimization will only be performed if all of the branch targets | |
8099 | that were aligned before transformation are also aligned after the | |
8100 | transformation. | |
8101 | ||
8102 | When the size_opt flag is set, ignore the branch target alignments, | |
8103 | narrow all wide instructions, and remove all no-ops unless the end | |
8104 | of the EBB prevents it. */ | |
8105 | ||
8106 | bfd_boolean | |
7fa3d080 | 8107 | compute_ebb_actions (ebb_constraint *ebb_table) |
43cd72b9 BW |
8108 | { |
8109 | unsigned i = 0; | |
8110 | unsigned j; | |
8111 | int removed_bytes = 0; | |
8112 | ebb_t *ebb = &ebb_table->ebb; | |
8113 | unsigned seg_idx_start = 0; | |
8114 | unsigned seg_idx_end = 0; | |
8115 | ||
8116 | /* We perform this like the assembler relaxation algorithm: Start by | |
8117 | assuming all instructions are narrow and all no-ops removed; then | |
8118 | walk through.... */ | |
8119 | ||
8120 | /* For each segment of this that has a solid constraint, check to | |
8121 | see if there are any combinations that will keep the constraint. | |
8122 | If so, use it. */ | |
8123 | for (seg_idx_end = 0; seg_idx_end < ebb_table->action_count; seg_idx_end++) | |
e0001a05 | 8124 | { |
43cd72b9 BW |
8125 | bfd_boolean requires_text_end_align = FALSE; |
8126 | unsigned longcall_count = 0; | |
8127 | unsigned longcall_convert_count = 0; | |
8128 | unsigned narrowable_count = 0; | |
8129 | unsigned narrowable_convert_count = 0; | |
8130 | unsigned widenable_count = 0; | |
8131 | unsigned widenable_convert_count = 0; | |
e0001a05 | 8132 | |
43cd72b9 BW |
8133 | proposed_action *action = NULL; |
8134 | int align = (1 << ebb_table->ebb.sec->alignment_power); | |
e0001a05 | 8135 | |
43cd72b9 | 8136 | seg_idx_start = seg_idx_end; |
e0001a05 | 8137 | |
43cd72b9 BW |
8138 | for (i = seg_idx_start; i < ebb_table->action_count; i++) |
8139 | { | |
8140 | action = &ebb_table->actions[i]; | |
8141 | if (action->action == ta_convert_longcall) | |
8142 | longcall_count++; | |
8143 | if (action->action == ta_narrow_insn) | |
8144 | narrowable_count++; | |
8145 | if (action->action == ta_widen_insn) | |
8146 | widenable_count++; | |
8147 | if (action->action == ta_fill) | |
8148 | break; | |
8149 | if (action->align_type == EBB_REQUIRE_LOOP_ALIGN) | |
8150 | break; | |
8151 | if (action->align_type == EBB_REQUIRE_TGT_ALIGN | |
8152 | && !elf32xtensa_size_opt) | |
8153 | break; | |
8154 | } | |
8155 | seg_idx_end = i; | |
e0001a05 | 8156 | |
43cd72b9 BW |
8157 | if (seg_idx_end == ebb_table->action_count && !ebb->ends_unreachable) |
8158 | requires_text_end_align = TRUE; | |
e0001a05 | 8159 | |
43cd72b9 BW |
8160 | if (elf32xtensa_size_opt && !requires_text_end_align |
8161 | && action->align_type != EBB_REQUIRE_LOOP_ALIGN | |
8162 | && action->align_type != EBB_REQUIRE_TGT_ALIGN) | |
8163 | { | |
8164 | longcall_convert_count = longcall_count; | |
8165 | narrowable_convert_count = narrowable_count; | |
8166 | widenable_convert_count = 0; | |
8167 | } | |
8168 | else | |
8169 | { | |
8170 | /* There is a constraint. Convert the max number of longcalls. */ | |
8171 | narrowable_convert_count = 0; | |
8172 | longcall_convert_count = 0; | |
8173 | widenable_convert_count = 0; | |
e0001a05 | 8174 | |
43cd72b9 | 8175 | for (j = 0; j < longcall_count; j++) |
e0001a05 | 8176 | { |
43cd72b9 BW |
8177 | int removed = (longcall_count - j) * 3 & (align - 1); |
8178 | unsigned desire_narrow = (align - removed) & (align - 1); | |
8179 | unsigned desire_widen = removed; | |
8180 | if (desire_narrow <= narrowable_count) | |
8181 | { | |
8182 | narrowable_convert_count = desire_narrow; | |
8183 | narrowable_convert_count += | |
8184 | (align * ((narrowable_count - narrowable_convert_count) | |
8185 | / align)); | |
8186 | longcall_convert_count = (longcall_count - j); | |
8187 | widenable_convert_count = 0; | |
8188 | break; | |
8189 | } | |
8190 | if (desire_widen <= widenable_count && !elf32xtensa_size_opt) | |
8191 | { | |
8192 | narrowable_convert_count = 0; | |
8193 | longcall_convert_count = longcall_count - j; | |
8194 | widenable_convert_count = desire_widen; | |
8195 | break; | |
8196 | } | |
8197 | } | |
8198 | } | |
e0001a05 | 8199 | |
43cd72b9 BW |
8200 | /* Now the number of conversions are saved. Do them. */ |
8201 | for (i = seg_idx_start; i < seg_idx_end; i++) | |
8202 | { | |
8203 | action = &ebb_table->actions[i]; | |
8204 | switch (action->action) | |
8205 | { | |
8206 | case ta_convert_longcall: | |
8207 | if (longcall_convert_count != 0) | |
8208 | { | |
8209 | action->action = ta_remove_longcall; | |
8210 | action->do_action = TRUE; | |
8211 | action->removed_bytes += 3; | |
8212 | longcall_convert_count--; | |
8213 | } | |
8214 | break; | |
8215 | case ta_narrow_insn: | |
8216 | if (narrowable_convert_count != 0) | |
8217 | { | |
8218 | action->do_action = TRUE; | |
8219 | action->removed_bytes += 1; | |
8220 | narrowable_convert_count--; | |
8221 | } | |
8222 | break; | |
8223 | case ta_widen_insn: | |
8224 | if (widenable_convert_count != 0) | |
8225 | { | |
8226 | action->do_action = TRUE; | |
8227 | action->removed_bytes -= 1; | |
8228 | widenable_convert_count--; | |
8229 | } | |
8230 | break; | |
8231 | default: | |
8232 | break; | |
e0001a05 | 8233 | } |
43cd72b9 BW |
8234 | } |
8235 | } | |
e0001a05 | 8236 | |
43cd72b9 BW |
8237 | /* Now we move on to some local opts. Try to remove each of the |
8238 | remaining longcalls. */ | |
e0001a05 | 8239 | |
43cd72b9 BW |
8240 | if (ebb_table->ebb.ends_section || ebb_table->ebb.ends_unreachable) |
8241 | { | |
8242 | removed_bytes = 0; | |
8243 | for (i = 0; i < ebb_table->action_count; i++) | |
e0001a05 | 8244 | { |
43cd72b9 BW |
8245 | int old_removed_bytes = removed_bytes; |
8246 | proposed_action *action = &ebb_table->actions[i]; | |
8247 | ||
8248 | if (action->do_action && action->action == ta_convert_longcall) | |
8249 | { | |
8250 | bfd_boolean bad_alignment = FALSE; | |
8251 | removed_bytes += 3; | |
8252 | for (j = i + 1; j < ebb_table->action_count; j++) | |
8253 | { | |
8254 | proposed_action *new_action = &ebb_table->actions[j]; | |
8255 | bfd_vma offset = new_action->offset; | |
8256 | if (new_action->align_type == EBB_REQUIRE_TGT_ALIGN) | |
8257 | { | |
8258 | if (!check_branch_target_aligned | |
8259 | (ebb_table->ebb.contents, | |
8260 | ebb_table->ebb.content_length, | |
8261 | offset, offset - removed_bytes)) | |
8262 | { | |
8263 | bad_alignment = TRUE; | |
8264 | break; | |
8265 | } | |
8266 | } | |
8267 | if (new_action->align_type == EBB_REQUIRE_LOOP_ALIGN) | |
8268 | { | |
8269 | if (!check_loop_aligned (ebb_table->ebb.contents, | |
8270 | ebb_table->ebb.content_length, | |
8271 | offset, | |
8272 | offset - removed_bytes)) | |
8273 | { | |
8274 | bad_alignment = TRUE; | |
8275 | break; | |
8276 | } | |
8277 | } | |
8278 | if (new_action->action == ta_narrow_insn | |
8279 | && !new_action->do_action | |
8280 | && ebb_table->ebb.sec->alignment_power == 2) | |
8281 | { | |
8282 | /* Narrow an instruction and we are done. */ | |
8283 | new_action->do_action = TRUE; | |
8284 | new_action->removed_bytes += 1; | |
8285 | bad_alignment = FALSE; | |
8286 | break; | |
8287 | } | |
8288 | if (new_action->action == ta_widen_insn | |
8289 | && new_action->do_action | |
8290 | && ebb_table->ebb.sec->alignment_power == 2) | |
8291 | { | |
8292 | /* Narrow an instruction and we are done. */ | |
8293 | new_action->do_action = FALSE; | |
8294 | new_action->removed_bytes += 1; | |
8295 | bad_alignment = FALSE; | |
8296 | break; | |
8297 | } | |
5c5d6806 BW |
8298 | if (new_action->do_action) |
8299 | removed_bytes += new_action->removed_bytes; | |
43cd72b9 BW |
8300 | } |
8301 | if (!bad_alignment) | |
8302 | { | |
8303 | action->removed_bytes += 3; | |
8304 | action->action = ta_remove_longcall; | |
8305 | action->do_action = TRUE; | |
8306 | } | |
8307 | } | |
8308 | removed_bytes = old_removed_bytes; | |
8309 | if (action->do_action) | |
8310 | removed_bytes += action->removed_bytes; | |
e0001a05 NC |
8311 | } |
8312 | } | |
8313 | ||
43cd72b9 BW |
8314 | removed_bytes = 0; |
8315 | for (i = 0; i < ebb_table->action_count; ++i) | |
8316 | { | |
8317 | proposed_action *action = &ebb_table->actions[i]; | |
8318 | if (action->do_action) | |
8319 | removed_bytes += action->removed_bytes; | |
8320 | } | |
8321 | ||
8322 | if ((removed_bytes % (1 << ebb_table->ebb.sec->alignment_power)) != 0 | |
8323 | && ebb->ends_unreachable) | |
8324 | { | |
8325 | proposed_action *action; | |
8326 | int br; | |
8327 | int extra_space; | |
8328 | ||
8329 | BFD_ASSERT (ebb_table->action_count != 0); | |
8330 | action = &ebb_table->actions[ebb_table->action_count - 1]; | |
8331 | BFD_ASSERT (action->action == ta_fill); | |
8332 | BFD_ASSERT (ebb->ends_unreachable->flags & XTENSA_PROP_UNREACHABLE); | |
8333 | ||
4b8e28c7 | 8334 | extra_space = xtensa_compute_fill_extra_space (ebb->ends_unreachable); |
43cd72b9 BW |
8335 | br = action->removed_bytes + removed_bytes + extra_space; |
8336 | br = br & ((1 << ebb->sec->alignment_power ) - 1); | |
8337 | ||
8338 | action->removed_bytes = extra_space - br; | |
8339 | } | |
8340 | return TRUE; | |
e0001a05 NC |
8341 | } |
8342 | ||
8343 | ||
03e94c08 BW |
8344 | /* The xlate_map is a sorted array of address mappings designed to |
8345 | answer the offset_with_removed_text() query with a binary search instead | |
8346 | of a linear search through the section's action_list. */ | |
8347 | ||
8348 | typedef struct xlate_map_entry xlate_map_entry_t; | |
8349 | typedef struct xlate_map xlate_map_t; | |
8350 | ||
8351 | struct xlate_map_entry | |
8352 | { | |
0854d504 MF |
8353 | bfd_vma orig_address; |
8354 | bfd_vma new_address; | |
03e94c08 BW |
8355 | unsigned size; |
8356 | }; | |
8357 | ||
8358 | struct xlate_map | |
8359 | { | |
8360 | unsigned entry_count; | |
8361 | xlate_map_entry_t *entry; | |
8362 | }; | |
8363 | ||
8364 | ||
68ffbac6 | 8365 | static int |
03e94c08 BW |
8366 | xlate_compare (const void *a_v, const void *b_v) |
8367 | { | |
8368 | const xlate_map_entry_t *a = (const xlate_map_entry_t *) a_v; | |
8369 | const xlate_map_entry_t *b = (const xlate_map_entry_t *) b_v; | |
8370 | if (a->orig_address < b->orig_address) | |
8371 | return -1; | |
8372 | if (a->orig_address > (b->orig_address + b->size - 1)) | |
8373 | return 1; | |
8374 | return 0; | |
8375 | } | |
8376 | ||
8377 | ||
8378 | static bfd_vma | |
8379 | xlate_offset_with_removed_text (const xlate_map_t *map, | |
8380 | text_action_list *action_list, | |
8381 | bfd_vma offset) | |
8382 | { | |
03e94c08 BW |
8383 | void *r; |
8384 | xlate_map_entry_t *e; | |
0854d504 | 8385 | struct xlate_map_entry se; |
03e94c08 BW |
8386 | |
8387 | if (map == NULL) | |
8388 | return offset_with_removed_text (action_list, offset); | |
8389 | ||
8390 | if (map->entry_count == 0) | |
8391 | return offset; | |
8392 | ||
0854d504 MF |
8393 | se.orig_address = offset; |
8394 | r = bsearch (&se, map->entry, map->entry_count, | |
03e94c08 BW |
8395 | sizeof (xlate_map_entry_t), &xlate_compare); |
8396 | e = (xlate_map_entry_t *) r; | |
68ffbac6 | 8397 | |
0854d504 MF |
8398 | /* There could be a jump past the end of the section, |
8399 | allow it using the last xlate map entry to translate its address. */ | |
8400 | if (e == NULL) | |
8401 | { | |
8402 | e = map->entry + map->entry_count - 1; | |
8403 | if (xlate_compare (&se, e) <= 0) | |
8404 | e = NULL; | |
8405 | } | |
03e94c08 BW |
8406 | BFD_ASSERT (e != NULL); |
8407 | if (e == NULL) | |
8408 | return offset; | |
8409 | return e->new_address - e->orig_address + offset; | |
8410 | } | |
8411 | ||
4c2af04f MF |
8412 | typedef struct xlate_map_context_struct xlate_map_context; |
8413 | struct xlate_map_context_struct | |
8414 | { | |
8415 | xlate_map_t *map; | |
8416 | xlate_map_entry_t *current_entry; | |
8417 | int removed; | |
8418 | }; | |
8419 | ||
8420 | static int | |
8421 | xlate_map_fn (splay_tree_node node, void *p) | |
8422 | { | |
8423 | text_action *r = (text_action *)node->value; | |
8424 | xlate_map_context *ctx = p; | |
8425 | unsigned orig_size = 0; | |
8426 | ||
8427 | switch (r->action) | |
8428 | { | |
8429 | case ta_none: | |
8430 | case ta_remove_insn: | |
8431 | case ta_convert_longcall: | |
8432 | case ta_remove_literal: | |
8433 | case ta_add_literal: | |
8434 | break; | |
8435 | case ta_remove_longcall: | |
8436 | orig_size = 6; | |
8437 | break; | |
8438 | case ta_narrow_insn: | |
8439 | orig_size = 3; | |
8440 | break; | |
8441 | case ta_widen_insn: | |
8442 | orig_size = 2; | |
8443 | break; | |
8444 | case ta_fill: | |
8445 | break; | |
8446 | } | |
8447 | ctx->current_entry->size = | |
8448 | r->offset + orig_size - ctx->current_entry->orig_address; | |
8449 | if (ctx->current_entry->size != 0) | |
8450 | { | |
8451 | ctx->current_entry++; | |
8452 | ctx->map->entry_count++; | |
8453 | } | |
8454 | ctx->current_entry->orig_address = r->offset + orig_size; | |
8455 | ctx->removed += r->removed_bytes; | |
8456 | ctx->current_entry->new_address = r->offset + orig_size - ctx->removed; | |
8457 | ctx->current_entry->size = 0; | |
8458 | return 0; | |
8459 | } | |
03e94c08 BW |
8460 | |
8461 | /* Build a binary searchable offset translation map from a section's | |
8462 | action list. */ | |
8463 | ||
8464 | static xlate_map_t * | |
8465 | build_xlate_map (asection *sec, xtensa_relax_info *relax_info) | |
8466 | { | |
03e94c08 BW |
8467 | text_action_list *action_list = &relax_info->action_list; |
8468 | unsigned num_actions = 0; | |
4c2af04f | 8469 | xlate_map_context ctx; |
03e94c08 | 8470 | |
4c2af04f MF |
8471 | ctx.map = (xlate_map_t *) bfd_malloc (sizeof (xlate_map_t)); |
8472 | ||
8473 | if (ctx.map == NULL) | |
03e94c08 BW |
8474 | return NULL; |
8475 | ||
8476 | num_actions = action_list_count (action_list); | |
4c2af04f | 8477 | ctx.map->entry = (xlate_map_entry_t *) |
03e94c08 | 8478 | bfd_malloc (sizeof (xlate_map_entry_t) * (num_actions + 1)); |
4c2af04f | 8479 | if (ctx.map->entry == NULL) |
03e94c08 | 8480 | { |
4c2af04f | 8481 | free (ctx.map); |
03e94c08 BW |
8482 | return NULL; |
8483 | } | |
4c2af04f | 8484 | ctx.map->entry_count = 0; |
68ffbac6 | 8485 | |
4c2af04f MF |
8486 | ctx.removed = 0; |
8487 | ctx.current_entry = &ctx.map->entry[0]; | |
03e94c08 | 8488 | |
4c2af04f MF |
8489 | ctx.current_entry->orig_address = 0; |
8490 | ctx.current_entry->new_address = 0; | |
8491 | ctx.current_entry->size = 0; | |
03e94c08 | 8492 | |
4c2af04f | 8493 | splay_tree_foreach (action_list->tree, xlate_map_fn, &ctx); |
03e94c08 | 8494 | |
4c2af04f MF |
8495 | ctx.current_entry->size = (bfd_get_section_limit (sec->owner, sec) |
8496 | - ctx.current_entry->orig_address); | |
8497 | if (ctx.current_entry->size != 0) | |
8498 | ctx.map->entry_count++; | |
03e94c08 | 8499 | |
4c2af04f | 8500 | return ctx.map; |
03e94c08 BW |
8501 | } |
8502 | ||
8503 | ||
8504 | /* Free an offset translation map. */ | |
8505 | ||
68ffbac6 | 8506 | static void |
03e94c08 BW |
8507 | free_xlate_map (xlate_map_t *map) |
8508 | { | |
03e94c08 | 8509 | if (map) |
c9594989 AM |
8510 | { |
8511 | free (map->entry); | |
8512 | free (map); | |
8513 | } | |
03e94c08 BW |
8514 | } |
8515 | ||
8516 | ||
43cd72b9 BW |
8517 | /* Use check_section_ebb_pcrels_fit to make sure that all of the |
8518 | relocations in a section will fit if a proposed set of actions | |
8519 | are performed. */ | |
e0001a05 | 8520 | |
43cd72b9 | 8521 | static bfd_boolean |
7fa3d080 BW |
8522 | check_section_ebb_pcrels_fit (bfd *abfd, |
8523 | asection *sec, | |
8524 | bfd_byte *contents, | |
8525 | Elf_Internal_Rela *internal_relocs, | |
b2b326d2 | 8526 | reloc_range_list *relevant_relocs, |
cb337148 BW |
8527 | const ebb_constraint *constraint, |
8528 | const xtensa_opcode *reloc_opcodes) | |
e0001a05 | 8529 | { |
43cd72b9 | 8530 | unsigned i, j; |
b2b326d2 | 8531 | unsigned n = sec->reloc_count; |
43cd72b9 | 8532 | Elf_Internal_Rela *irel; |
03e94c08 BW |
8533 | xlate_map_t *xmap = NULL; |
8534 | bfd_boolean ok = TRUE; | |
43cd72b9 | 8535 | xtensa_relax_info *relax_info; |
b2b326d2 | 8536 | reloc_range_list_entry *entry = NULL; |
e0001a05 | 8537 | |
43cd72b9 | 8538 | relax_info = get_xtensa_relax_info (sec); |
e0001a05 | 8539 | |
03e94c08 BW |
8540 | if (relax_info && sec->reloc_count > 100) |
8541 | { | |
8542 | xmap = build_xlate_map (sec, relax_info); | |
8543 | /* NULL indicates out of memory, but the slow version | |
8544 | can still be used. */ | |
8545 | } | |
8546 | ||
b2b326d2 MF |
8547 | if (relevant_relocs && constraint->action_count) |
8548 | { | |
8549 | if (!relevant_relocs->ok) | |
8550 | { | |
8551 | ok = FALSE; | |
8552 | n = 0; | |
8553 | } | |
8554 | else | |
8555 | { | |
8556 | bfd_vma min_offset, max_offset; | |
8557 | min_offset = max_offset = constraint->actions[0].offset; | |
8558 | ||
8559 | for (i = 1; i < constraint->action_count; ++i) | |
8560 | { | |
8561 | proposed_action *action = &constraint->actions[i]; | |
8562 | bfd_vma offset = action->offset; | |
8563 | ||
8564 | if (offset < min_offset) | |
8565 | min_offset = offset; | |
8566 | if (offset > max_offset) | |
8567 | max_offset = offset; | |
8568 | } | |
8569 | reloc_range_list_update_range (relevant_relocs, min_offset, | |
8570 | max_offset); | |
8571 | n = relevant_relocs->n_list; | |
8572 | entry = &relevant_relocs->list_root; | |
8573 | } | |
8574 | } | |
8575 | else | |
8576 | { | |
8577 | relevant_relocs = NULL; | |
8578 | } | |
8579 | ||
8580 | for (i = 0; i < n; i++) | |
43cd72b9 BW |
8581 | { |
8582 | r_reloc r_rel; | |
8583 | bfd_vma orig_self_offset, orig_target_offset; | |
8584 | bfd_vma self_offset, target_offset; | |
8585 | int r_type; | |
8586 | reloc_howto_type *howto; | |
8587 | int self_removed_bytes, target_removed_bytes; | |
e0001a05 | 8588 | |
b2b326d2 MF |
8589 | if (relevant_relocs) |
8590 | { | |
8591 | entry = entry->next; | |
8592 | irel = entry->irel; | |
8593 | } | |
8594 | else | |
8595 | { | |
8596 | irel = internal_relocs + i; | |
8597 | } | |
43cd72b9 | 8598 | r_type = ELF32_R_TYPE (irel->r_info); |
e0001a05 | 8599 | |
43cd72b9 BW |
8600 | howto = &elf_howto_table[r_type]; |
8601 | /* We maintain the required invariant: PC-relative relocations | |
8602 | that fit before linking must fit after linking. Thus we only | |
8603 | need to deal with relocations to the same section that are | |
8604 | PC-relative. */ | |
1bbb5f21 BW |
8605 | if (r_type == R_XTENSA_ASM_SIMPLIFY |
8606 | || r_type == R_XTENSA_32_PCREL | |
43cd72b9 BW |
8607 | || !howto->pc_relative) |
8608 | continue; | |
e0001a05 | 8609 | |
43cd72b9 BW |
8610 | r_reloc_init (&r_rel, abfd, irel, contents, |
8611 | bfd_get_section_limit (abfd, sec)); | |
e0001a05 | 8612 | |
43cd72b9 BW |
8613 | if (r_reloc_get_section (&r_rel) != sec) |
8614 | continue; | |
e0001a05 | 8615 | |
43cd72b9 BW |
8616 | orig_self_offset = irel->r_offset; |
8617 | orig_target_offset = r_rel.target_offset; | |
e0001a05 | 8618 | |
43cd72b9 BW |
8619 | self_offset = orig_self_offset; |
8620 | target_offset = orig_target_offset; | |
8621 | ||
8622 | if (relax_info) | |
8623 | { | |
03e94c08 BW |
8624 | self_offset = |
8625 | xlate_offset_with_removed_text (xmap, &relax_info->action_list, | |
8626 | orig_self_offset); | |
8627 | target_offset = | |
8628 | xlate_offset_with_removed_text (xmap, &relax_info->action_list, | |
8629 | orig_target_offset); | |
43cd72b9 BW |
8630 | } |
8631 | ||
8632 | self_removed_bytes = 0; | |
8633 | target_removed_bytes = 0; | |
8634 | ||
8635 | for (j = 0; j < constraint->action_count; ++j) | |
8636 | { | |
8637 | proposed_action *action = &constraint->actions[j]; | |
8638 | bfd_vma offset = action->offset; | |
8639 | int removed_bytes = action->removed_bytes; | |
8640 | if (offset < orig_self_offset | |
8641 | || (offset == orig_self_offset && action->action == ta_fill | |
8642 | && action->removed_bytes < 0)) | |
8643 | self_removed_bytes += removed_bytes; | |
8644 | if (offset < orig_target_offset | |
8645 | || (offset == orig_target_offset && action->action == ta_fill | |
8646 | && action->removed_bytes < 0)) | |
8647 | target_removed_bytes += removed_bytes; | |
8648 | } | |
8649 | self_offset -= self_removed_bytes; | |
8650 | target_offset -= target_removed_bytes; | |
8651 | ||
8652 | /* Try to encode it. Get the operand and check. */ | |
8653 | if (is_alt_relocation (ELF32_R_TYPE (irel->r_info))) | |
8654 | { | |
8655 | /* None of the current alternate relocs are PC-relative, | |
8656 | and only PC-relative relocs matter here. */ | |
8657 | } | |
8658 | else | |
8659 | { | |
8660 | xtensa_opcode opcode; | |
8661 | int opnum; | |
8662 | ||
b2b326d2 | 8663 | if (relevant_relocs) |
03e94c08 | 8664 | { |
b2b326d2 MF |
8665 | opcode = entry->opcode; |
8666 | opnum = entry->opnum; | |
03e94c08 | 8667 | } |
b2b326d2 | 8668 | else |
03e94c08 | 8669 | { |
b2b326d2 MF |
8670 | if (reloc_opcodes) |
8671 | opcode = reloc_opcodes[relevant_relocs ? | |
8672 | (unsigned)(entry - relevant_relocs->reloc) : i]; | |
8673 | else | |
8674 | opcode = get_relocation_opcode (abfd, sec, contents, irel); | |
8675 | if (opcode == XTENSA_UNDEFINED) | |
8676 | { | |
8677 | ok = FALSE; | |
8678 | break; | |
8679 | } | |
8680 | ||
8681 | opnum = get_relocation_opnd (opcode, ELF32_R_TYPE (irel->r_info)); | |
8682 | if (opnum == XTENSA_UNDEFINED) | |
8683 | { | |
8684 | ok = FALSE; | |
8685 | break; | |
8686 | } | |
03e94c08 | 8687 | } |
43cd72b9 BW |
8688 | |
8689 | if (!pcrel_reloc_fits (opcode, opnum, self_offset, target_offset)) | |
03e94c08 BW |
8690 | { |
8691 | ok = FALSE; | |
8692 | break; | |
8693 | } | |
43cd72b9 BW |
8694 | } |
8695 | } | |
8696 | ||
c9594989 | 8697 | free_xlate_map (xmap); |
03e94c08 BW |
8698 | |
8699 | return ok; | |
43cd72b9 BW |
8700 | } |
8701 | ||
8702 | ||
8703 | static bfd_boolean | |
7fa3d080 | 8704 | check_section_ebb_reduces (const ebb_constraint *constraint) |
43cd72b9 BW |
8705 | { |
8706 | int removed = 0; | |
8707 | unsigned i; | |
8708 | ||
8709 | for (i = 0; i < constraint->action_count; i++) | |
8710 | { | |
8711 | const proposed_action *action = &constraint->actions[i]; | |
8712 | if (action->do_action) | |
8713 | removed += action->removed_bytes; | |
8714 | } | |
8715 | if (removed < 0) | |
e0001a05 NC |
8716 | return FALSE; |
8717 | ||
8718 | return TRUE; | |
8719 | } | |
8720 | ||
8721 | ||
43cd72b9 | 8722 | void |
7fa3d080 BW |
8723 | text_action_add_proposed (text_action_list *l, |
8724 | const ebb_constraint *ebb_table, | |
8725 | asection *sec) | |
e0001a05 NC |
8726 | { |
8727 | unsigned i; | |
8728 | ||
43cd72b9 | 8729 | for (i = 0; i < ebb_table->action_count; i++) |
e0001a05 | 8730 | { |
43cd72b9 | 8731 | proposed_action *action = &ebb_table->actions[i]; |
e0001a05 | 8732 | |
43cd72b9 | 8733 | if (!action->do_action) |
e0001a05 | 8734 | continue; |
43cd72b9 BW |
8735 | switch (action->action) |
8736 | { | |
8737 | case ta_remove_insn: | |
8738 | case ta_remove_longcall: | |
8739 | case ta_convert_longcall: | |
8740 | case ta_narrow_insn: | |
8741 | case ta_widen_insn: | |
8742 | case ta_fill: | |
8743 | case ta_remove_literal: | |
8744 | text_action_add (l, action->action, sec, action->offset, | |
8745 | action->removed_bytes); | |
8746 | break; | |
8747 | case ta_none: | |
8748 | break; | |
8749 | default: | |
8750 | BFD_ASSERT (0); | |
8751 | break; | |
8752 | } | |
e0001a05 | 8753 | } |
43cd72b9 | 8754 | } |
e0001a05 | 8755 | |
43cd72b9 BW |
8756 | |
8757 | int | |
4b8e28c7 | 8758 | xtensa_compute_fill_extra_space (property_table_entry *entry) |
43cd72b9 BW |
8759 | { |
8760 | int fill_extra_space; | |
8761 | ||
8762 | if (!entry) | |
8763 | return 0; | |
8764 | ||
8765 | if ((entry->flags & XTENSA_PROP_UNREACHABLE) == 0) | |
8766 | return 0; | |
8767 | ||
8768 | fill_extra_space = entry->size; | |
8769 | if ((entry->flags & XTENSA_PROP_ALIGN) != 0) | |
8770 | { | |
8771 | /* Fill bytes for alignment: | |
8772 | (2**n)-1 - (addr + (2**n)-1) & (2**n -1) */ | |
8773 | int pow = GET_XTENSA_PROP_ALIGNMENT (entry->flags); | |
8774 | int nsm = (1 << pow) - 1; | |
8775 | bfd_vma addr = entry->address + entry->size; | |
8776 | bfd_vma align_fill = nsm - ((addr + nsm) & nsm); | |
8777 | fill_extra_space += align_fill; | |
8778 | } | |
8779 | return fill_extra_space; | |
e0001a05 NC |
8780 | } |
8781 | ||
43cd72b9 | 8782 | \f |
e0001a05 NC |
8783 | /* First relaxation pass. */ |
8784 | ||
43cd72b9 BW |
8785 | /* If the section contains relaxable literals, check each literal to |
8786 | see if it has the same value as another literal that has already | |
8787 | been seen, either in the current section or a previous one. If so, | |
8788 | add an entry to the per-section list of removed literals. The | |
e0001a05 NC |
8789 | actual changes are deferred until the next pass. */ |
8790 | ||
68ffbac6 | 8791 | static bfd_boolean |
7fa3d080 BW |
8792 | compute_removed_literals (bfd *abfd, |
8793 | asection *sec, | |
8794 | struct bfd_link_info *link_info, | |
8795 | value_map_hash_table *values) | |
e0001a05 NC |
8796 | { |
8797 | xtensa_relax_info *relax_info; | |
8798 | bfd_byte *contents; | |
8799 | Elf_Internal_Rela *internal_relocs; | |
43cd72b9 | 8800 | source_reloc *src_relocs, *rel; |
e0001a05 | 8801 | bfd_boolean ok = TRUE; |
43cd72b9 BW |
8802 | property_table_entry *prop_table = NULL; |
8803 | int ptblsize; | |
8804 | int i, prev_i; | |
8805 | bfd_boolean last_loc_is_prev = FALSE; | |
8806 | bfd_vma last_target_offset = 0; | |
8807 | section_cache_t target_sec_cache; | |
8808 | bfd_size_type sec_size; | |
8809 | ||
8810 | init_section_cache (&target_sec_cache); | |
e0001a05 NC |
8811 | |
8812 | /* Do nothing if it is not a relaxable literal section. */ | |
8813 | relax_info = get_xtensa_relax_info (sec); | |
8814 | BFD_ASSERT (relax_info); | |
e0001a05 NC |
8815 | if (!relax_info->is_relaxable_literal_section) |
8816 | return ok; | |
8817 | ||
68ffbac6 | 8818 | internal_relocs = retrieve_internal_relocs (abfd, sec, |
e0001a05 NC |
8819 | link_info->keep_memory); |
8820 | ||
43cd72b9 | 8821 | sec_size = bfd_get_section_limit (abfd, sec); |
e0001a05 | 8822 | contents = retrieve_contents (abfd, sec, link_info->keep_memory); |
43cd72b9 | 8823 | if (contents == NULL && sec_size != 0) |
e0001a05 NC |
8824 | { |
8825 | ok = FALSE; | |
8826 | goto error_return; | |
8827 | } | |
8828 | ||
8829 | /* Sort the source_relocs by target offset. */ | |
8830 | src_relocs = relax_info->src_relocs; | |
8831 | qsort (src_relocs, relax_info->src_count, | |
8832 | sizeof (source_reloc), source_reloc_compare); | |
43cd72b9 BW |
8833 | qsort (internal_relocs, sec->reloc_count, sizeof (Elf_Internal_Rela), |
8834 | internal_reloc_compare); | |
e0001a05 | 8835 | |
43cd72b9 BW |
8836 | ptblsize = xtensa_read_table_entries (abfd, sec, &prop_table, |
8837 | XTENSA_PROP_SEC_NAME, FALSE); | |
8838 | if (ptblsize < 0) | |
8839 | { | |
8840 | ok = FALSE; | |
8841 | goto error_return; | |
8842 | } | |
8843 | ||
8844 | prev_i = -1; | |
e0001a05 NC |
8845 | for (i = 0; i < relax_info->src_count; i++) |
8846 | { | |
e0001a05 | 8847 | Elf_Internal_Rela *irel = NULL; |
e0001a05 NC |
8848 | |
8849 | rel = &src_relocs[i]; | |
43cd72b9 BW |
8850 | if (get_l32r_opcode () != rel->opcode) |
8851 | continue; | |
e0001a05 NC |
8852 | irel = get_irel_at_offset (sec, internal_relocs, |
8853 | rel->r_rel.target_offset); | |
8854 | ||
43cd72b9 BW |
8855 | /* If the relocation on this is not a simple R_XTENSA_32 or |
8856 | R_XTENSA_PLT then do not consider it. This may happen when | |
8857 | the difference of two symbols is used in a literal. */ | |
8858 | if (irel && (ELF32_R_TYPE (irel->r_info) != R_XTENSA_32 | |
8859 | && ELF32_R_TYPE (irel->r_info) != R_XTENSA_PLT)) | |
8860 | continue; | |
8861 | ||
e0001a05 NC |
8862 | /* If the target_offset for this relocation is the same as the |
8863 | previous relocation, then we've already considered whether the | |
8864 | literal can be coalesced. Skip to the next one.... */ | |
43cd72b9 BW |
8865 | if (i != 0 && prev_i != -1 |
8866 | && src_relocs[i-1].r_rel.target_offset == rel->r_rel.target_offset) | |
e0001a05 | 8867 | continue; |
43cd72b9 BW |
8868 | prev_i = i; |
8869 | ||
68ffbac6 | 8870 | if (last_loc_is_prev && |
43cd72b9 BW |
8871 | last_target_offset + 4 != rel->r_rel.target_offset) |
8872 | last_loc_is_prev = FALSE; | |
e0001a05 NC |
8873 | |
8874 | /* Check if the relocation was from an L32R that is being removed | |
8875 | because a CALLX was converted to a direct CALL, and check if | |
8876 | there are no other relocations to the literal. */ | |
68ffbac6 | 8877 | if (is_removable_literal (rel, i, src_relocs, relax_info->src_count, |
99ded152 | 8878 | sec, prop_table, ptblsize)) |
e0001a05 | 8879 | { |
43cd72b9 BW |
8880 | if (!remove_dead_literal (abfd, sec, link_info, internal_relocs, |
8881 | irel, rel, prop_table, ptblsize)) | |
e0001a05 | 8882 | { |
43cd72b9 BW |
8883 | ok = FALSE; |
8884 | goto error_return; | |
e0001a05 | 8885 | } |
43cd72b9 | 8886 | last_target_offset = rel->r_rel.target_offset; |
e0001a05 NC |
8887 | continue; |
8888 | } | |
8889 | ||
43cd72b9 | 8890 | if (!identify_literal_placement (abfd, sec, contents, link_info, |
68ffbac6 L |
8891 | values, |
8892 | &last_loc_is_prev, irel, | |
43cd72b9 BW |
8893 | relax_info->src_count - i, rel, |
8894 | prop_table, ptblsize, | |
8895 | &target_sec_cache, rel->is_abs_literal)) | |
e0001a05 | 8896 | { |
43cd72b9 BW |
8897 | ok = FALSE; |
8898 | goto error_return; | |
8899 | } | |
8900 | last_target_offset = rel->r_rel.target_offset; | |
8901 | } | |
e0001a05 | 8902 | |
43cd72b9 BW |
8903 | #if DEBUG |
8904 | print_removed_literals (stderr, &relax_info->removed_list); | |
8905 | print_action_list (stderr, &relax_info->action_list); | |
8906 | #endif /* DEBUG */ | |
8907 | ||
dc1e8a47 | 8908 | error_return: |
c9594989 | 8909 | free (prop_table); |
65e911f9 | 8910 | free_section_cache (&target_sec_cache); |
43cd72b9 BW |
8911 | |
8912 | release_contents (sec, contents); | |
8913 | release_internal_relocs (sec, internal_relocs); | |
8914 | return ok; | |
8915 | } | |
8916 | ||
8917 | ||
8918 | static Elf_Internal_Rela * | |
7fa3d080 BW |
8919 | get_irel_at_offset (asection *sec, |
8920 | Elf_Internal_Rela *internal_relocs, | |
8921 | bfd_vma offset) | |
43cd72b9 BW |
8922 | { |
8923 | unsigned i; | |
8924 | Elf_Internal_Rela *irel; | |
8925 | unsigned r_type; | |
8926 | Elf_Internal_Rela key; | |
8927 | ||
68ffbac6 | 8928 | if (!internal_relocs) |
43cd72b9 BW |
8929 | return NULL; |
8930 | ||
8931 | key.r_offset = offset; | |
8932 | irel = bsearch (&key, internal_relocs, sec->reloc_count, | |
8933 | sizeof (Elf_Internal_Rela), internal_reloc_matches); | |
8934 | if (!irel) | |
8935 | return NULL; | |
8936 | ||
8937 | /* bsearch does not guarantee which will be returned if there are | |
8938 | multiple matches. We need the first that is not an alignment. */ | |
8939 | i = irel - internal_relocs; | |
8940 | while (i > 0) | |
8941 | { | |
8942 | if (internal_relocs[i-1].r_offset != offset) | |
8943 | break; | |
8944 | i--; | |
8945 | } | |
8946 | for ( ; i < sec->reloc_count; i++) | |
8947 | { | |
8948 | irel = &internal_relocs[i]; | |
8949 | r_type = ELF32_R_TYPE (irel->r_info); | |
8950 | if (irel->r_offset == offset && r_type != R_XTENSA_NONE) | |
8951 | return irel; | |
8952 | } | |
8953 | ||
8954 | return NULL; | |
8955 | } | |
8956 | ||
8957 | ||
8958 | bfd_boolean | |
7fa3d080 BW |
8959 | is_removable_literal (const source_reloc *rel, |
8960 | int i, | |
8961 | const source_reloc *src_relocs, | |
99ded152 BW |
8962 | int src_count, |
8963 | asection *sec, | |
8964 | property_table_entry *prop_table, | |
8965 | int ptblsize) | |
43cd72b9 BW |
8966 | { |
8967 | const source_reloc *curr_rel; | |
99ded152 BW |
8968 | property_table_entry *entry; |
8969 | ||
43cd72b9 BW |
8970 | if (!rel->is_null) |
8971 | return FALSE; | |
68ffbac6 L |
8972 | |
8973 | entry = elf_xtensa_find_property_entry (prop_table, ptblsize, | |
99ded152 BW |
8974 | sec->vma + rel->r_rel.target_offset); |
8975 | if (entry && (entry->flags & XTENSA_PROP_NO_TRANSFORM)) | |
8976 | return FALSE; | |
8977 | ||
43cd72b9 BW |
8978 | for (++i; i < src_count; ++i) |
8979 | { | |
8980 | curr_rel = &src_relocs[i]; | |
8981 | /* If all others have the same target offset.... */ | |
8982 | if (curr_rel->r_rel.target_offset != rel->r_rel.target_offset) | |
8983 | return TRUE; | |
8984 | ||
8985 | if (!curr_rel->is_null | |
8986 | && !xtensa_is_property_section (curr_rel->source_sec) | |
8987 | && !(curr_rel->source_sec->flags & SEC_DEBUGGING)) | |
8988 | return FALSE; | |
8989 | } | |
8990 | return TRUE; | |
8991 | } | |
8992 | ||
8993 | ||
68ffbac6 | 8994 | bfd_boolean |
7fa3d080 BW |
8995 | remove_dead_literal (bfd *abfd, |
8996 | asection *sec, | |
8997 | struct bfd_link_info *link_info, | |
8998 | Elf_Internal_Rela *internal_relocs, | |
8999 | Elf_Internal_Rela *irel, | |
9000 | source_reloc *rel, | |
9001 | property_table_entry *prop_table, | |
9002 | int ptblsize) | |
43cd72b9 BW |
9003 | { |
9004 | property_table_entry *entry; | |
9005 | xtensa_relax_info *relax_info; | |
9006 | ||
9007 | relax_info = get_xtensa_relax_info (sec); | |
9008 | if (!relax_info) | |
9009 | return FALSE; | |
9010 | ||
9011 | entry = elf_xtensa_find_property_entry (prop_table, ptblsize, | |
9012 | sec->vma + rel->r_rel.target_offset); | |
9013 | ||
9014 | /* Mark the unused literal so that it will be removed. */ | |
9015 | add_removed_literal (&relax_info->removed_list, &rel->r_rel, NULL); | |
9016 | ||
9017 | text_action_add (&relax_info->action_list, | |
9018 | ta_remove_literal, sec, rel->r_rel.target_offset, 4); | |
9019 | ||
9020 | /* If the section is 4-byte aligned, do not add fill. */ | |
68ffbac6 | 9021 | if (sec->alignment_power > 2) |
43cd72b9 BW |
9022 | { |
9023 | int fill_extra_space; | |
9024 | bfd_vma entry_sec_offset; | |
9025 | text_action *fa; | |
9026 | property_table_entry *the_add_entry; | |
9027 | int removed_diff; | |
9028 | ||
9029 | if (entry) | |
9030 | entry_sec_offset = entry->address - sec->vma + entry->size; | |
9031 | else | |
9032 | entry_sec_offset = rel->r_rel.target_offset + 4; | |
9033 | ||
9034 | /* If the literal range is at the end of the section, | |
9035 | do not add fill. */ | |
9036 | the_add_entry = elf_xtensa_find_property_entry (prop_table, ptblsize, | |
9037 | entry_sec_offset); | |
4b8e28c7 | 9038 | fill_extra_space = xtensa_compute_fill_extra_space (the_add_entry); |
43cd72b9 BW |
9039 | |
9040 | fa = find_fill_action (&relax_info->action_list, sec, entry_sec_offset); | |
9041 | removed_diff = compute_removed_action_diff (fa, sec, entry_sec_offset, | |
9042 | -4, fill_extra_space); | |
9043 | if (fa) | |
9044 | adjust_fill_action (fa, removed_diff); | |
9045 | else | |
9046 | text_action_add (&relax_info->action_list, | |
9047 | ta_fill, sec, entry_sec_offset, removed_diff); | |
9048 | } | |
9049 | ||
9050 | /* Zero out the relocation on this literal location. */ | |
9051 | if (irel) | |
9052 | { | |
9053 | if (elf_hash_table (link_info)->dynamic_sections_created) | |
9054 | shrink_dynamic_reloc_sections (link_info, abfd, sec, irel); | |
9055 | ||
9056 | irel->r_info = ELF32_R_INFO (0, R_XTENSA_NONE); | |
9057 | pin_internal_relocs (sec, internal_relocs); | |
9058 | } | |
9059 | ||
9060 | /* Do not modify "last_loc_is_prev". */ | |
9061 | return TRUE; | |
9062 | } | |
9063 | ||
9064 | ||
68ffbac6 | 9065 | bfd_boolean |
7fa3d080 BW |
9066 | identify_literal_placement (bfd *abfd, |
9067 | asection *sec, | |
9068 | bfd_byte *contents, | |
9069 | struct bfd_link_info *link_info, | |
9070 | value_map_hash_table *values, | |
9071 | bfd_boolean *last_loc_is_prev_p, | |
9072 | Elf_Internal_Rela *irel, | |
9073 | int remaining_src_rels, | |
9074 | source_reloc *rel, | |
9075 | property_table_entry *prop_table, | |
9076 | int ptblsize, | |
9077 | section_cache_t *target_sec_cache, | |
9078 | bfd_boolean is_abs_literal) | |
43cd72b9 BW |
9079 | { |
9080 | literal_value val; | |
9081 | value_map *val_map; | |
9082 | xtensa_relax_info *relax_info; | |
9083 | bfd_boolean literal_placed = FALSE; | |
9084 | r_reloc r_rel; | |
9085 | unsigned long value; | |
9086 | bfd_boolean final_static_link; | |
9087 | bfd_size_type sec_size; | |
9088 | ||
9089 | relax_info = get_xtensa_relax_info (sec); | |
9090 | if (!relax_info) | |
9091 | return FALSE; | |
9092 | ||
9093 | sec_size = bfd_get_section_limit (abfd, sec); | |
9094 | ||
9095 | final_static_link = | |
0e1862bb | 9096 | (!bfd_link_relocatable (link_info) |
43cd72b9 BW |
9097 | && !elf_hash_table (link_info)->dynamic_sections_created); |
9098 | ||
9099 | /* The placement algorithm first checks to see if the literal is | |
9100 | already in the value map. If so and the value map is reachable | |
9101 | from all uses, then the literal is moved to that location. If | |
9102 | not, then we identify the last location where a fresh literal was | |
9103 | placed. If the literal can be safely moved there, then we do so. | |
9104 | If not, then we assume that the literal is not to move and leave | |
9105 | the literal where it is, marking it as the last literal | |
9106 | location. */ | |
9107 | ||
9108 | /* Find the literal value. */ | |
9109 | value = 0; | |
9110 | r_reloc_init (&r_rel, abfd, irel, contents, sec_size); | |
9111 | if (!irel) | |
9112 | { | |
9113 | BFD_ASSERT (rel->r_rel.target_offset < sec_size); | |
9114 | value = bfd_get_32 (abfd, contents + rel->r_rel.target_offset); | |
9115 | } | |
9116 | init_literal_value (&val, &r_rel, value, is_abs_literal); | |
9117 | ||
9118 | /* Check if we've seen another literal with the same value that | |
9119 | is in the same output section. */ | |
9120 | val_map = value_map_get_cached_value (values, &val, final_static_link); | |
9121 | ||
9122 | if (val_map | |
9123 | && (r_reloc_get_section (&val_map->loc)->output_section | |
9124 | == sec->output_section) | |
9125 | && relocations_reach (rel, remaining_src_rels, &val_map->loc) | |
9126 | && coalesce_shared_literal (sec, rel, prop_table, ptblsize, val_map)) | |
9127 | { | |
9128 | /* No change to last_loc_is_prev. */ | |
9129 | literal_placed = TRUE; | |
9130 | } | |
9131 | ||
9132 | /* For relocatable links, do not try to move literals. To do it | |
9133 | correctly might increase the number of relocations in an input | |
9134 | section making the default relocatable linking fail. */ | |
0e1862bb | 9135 | if (!bfd_link_relocatable (link_info) && !literal_placed |
43cd72b9 BW |
9136 | && values->has_last_loc && !(*last_loc_is_prev_p)) |
9137 | { | |
9138 | asection *target_sec = r_reloc_get_section (&values->last_loc); | |
9139 | if (target_sec && target_sec->output_section == sec->output_section) | |
9140 | { | |
9141 | /* Increment the virtual offset. */ | |
9142 | r_reloc try_loc = values->last_loc; | |
9143 | try_loc.virtual_offset += 4; | |
9144 | ||
9145 | /* There is a last loc that was in the same output section. */ | |
9146 | if (relocations_reach (rel, remaining_src_rels, &try_loc) | |
9147 | && move_shared_literal (sec, link_info, rel, | |
68ffbac6 | 9148 | prop_table, ptblsize, |
43cd72b9 | 9149 | &try_loc, &val, target_sec_cache)) |
e0001a05 | 9150 | { |
43cd72b9 BW |
9151 | values->last_loc.virtual_offset += 4; |
9152 | literal_placed = TRUE; | |
9153 | if (!val_map) | |
9154 | val_map = add_value_map (values, &val, &try_loc, | |
9155 | final_static_link); | |
9156 | else | |
9157 | val_map->loc = try_loc; | |
e0001a05 NC |
9158 | } |
9159 | } | |
43cd72b9 BW |
9160 | } |
9161 | ||
9162 | if (!literal_placed) | |
9163 | { | |
9164 | /* Nothing worked, leave the literal alone but update the last loc. */ | |
9165 | values->has_last_loc = TRUE; | |
9166 | values->last_loc = rel->r_rel; | |
9167 | if (!val_map) | |
9168 | val_map = add_value_map (values, &val, &rel->r_rel, final_static_link); | |
e0001a05 | 9169 | else |
43cd72b9 BW |
9170 | val_map->loc = rel->r_rel; |
9171 | *last_loc_is_prev_p = TRUE; | |
e0001a05 NC |
9172 | } |
9173 | ||
43cd72b9 | 9174 | return TRUE; |
e0001a05 NC |
9175 | } |
9176 | ||
9177 | ||
9178 | /* Check if the original relocations (presumably on L32R instructions) | |
9179 | identified by reloc[0..N] can be changed to reference the literal | |
9180 | identified by r_rel. If r_rel is out of range for any of the | |
9181 | original relocations, then we don't want to coalesce the original | |
9182 | literal with the one at r_rel. We only check reloc[0..N], where the | |
9183 | offsets are all the same as for reloc[0] (i.e., they're all | |
9184 | referencing the same literal) and where N is also bounded by the | |
9185 | number of remaining entries in the "reloc" array. The "reloc" array | |
9186 | is sorted by target offset so we know all the entries for the same | |
9187 | literal will be contiguous. */ | |
9188 | ||
9189 | static bfd_boolean | |
7fa3d080 BW |
9190 | relocations_reach (source_reloc *reloc, |
9191 | int remaining_relocs, | |
9192 | const r_reloc *r_rel) | |
e0001a05 NC |
9193 | { |
9194 | bfd_vma from_offset, source_address, dest_address; | |
9195 | asection *sec; | |
9196 | int i; | |
9197 | ||
9198 | if (!r_reloc_is_defined (r_rel)) | |
9199 | return FALSE; | |
9200 | ||
9201 | sec = r_reloc_get_section (r_rel); | |
9202 | from_offset = reloc[0].r_rel.target_offset; | |
9203 | ||
9204 | for (i = 0; i < remaining_relocs; i++) | |
9205 | { | |
9206 | if (reloc[i].r_rel.target_offset != from_offset) | |
9207 | break; | |
9208 | ||
9209 | /* Ignore relocations that have been removed. */ | |
9210 | if (reloc[i].is_null) | |
9211 | continue; | |
9212 | ||
9213 | /* The original and new output section for these must be the same | |
07d6d2b8 | 9214 | in order to coalesce. */ |
e0001a05 NC |
9215 | if (r_reloc_get_section (&reloc[i].r_rel)->output_section |
9216 | != sec->output_section) | |
9217 | return FALSE; | |
9218 | ||
d638e0ac BW |
9219 | /* Absolute literals in the same output section can always be |
9220 | combined. */ | |
9221 | if (reloc[i].is_abs_literal) | |
9222 | continue; | |
9223 | ||
43cd72b9 BW |
9224 | /* A literal with no PC-relative relocations can be moved anywhere. */ |
9225 | if (reloc[i].opnd != -1) | |
e0001a05 NC |
9226 | { |
9227 | /* Otherwise, check to see that it fits. */ | |
9228 | source_address = (reloc[i].source_sec->output_section->vma | |
9229 | + reloc[i].source_sec->output_offset | |
9230 | + reloc[i].r_rel.rela.r_offset); | |
9231 | dest_address = (sec->output_section->vma | |
9232 | + sec->output_offset | |
9233 | + r_rel->target_offset); | |
9234 | ||
43cd72b9 BW |
9235 | if (!pcrel_reloc_fits (reloc[i].opcode, reloc[i].opnd, |
9236 | source_address, dest_address)) | |
e0001a05 NC |
9237 | return FALSE; |
9238 | } | |
9239 | } | |
9240 | ||
9241 | return TRUE; | |
9242 | } | |
9243 | ||
9244 | ||
43cd72b9 BW |
9245 | /* Move a literal to another literal location because it is |
9246 | the same as the other literal value. */ | |
e0001a05 | 9247 | |
68ffbac6 | 9248 | static bfd_boolean |
7fa3d080 BW |
9249 | coalesce_shared_literal (asection *sec, |
9250 | source_reloc *rel, | |
9251 | property_table_entry *prop_table, | |
9252 | int ptblsize, | |
9253 | value_map *val_map) | |
e0001a05 | 9254 | { |
43cd72b9 BW |
9255 | property_table_entry *entry; |
9256 | text_action *fa; | |
9257 | property_table_entry *the_add_entry; | |
9258 | int removed_diff; | |
9259 | xtensa_relax_info *relax_info; | |
9260 | ||
9261 | relax_info = get_xtensa_relax_info (sec); | |
9262 | if (!relax_info) | |
9263 | return FALSE; | |
9264 | ||
9265 | entry = elf_xtensa_find_property_entry | |
9266 | (prop_table, ptblsize, sec->vma + rel->r_rel.target_offset); | |
99ded152 | 9267 | if (entry && (entry->flags & XTENSA_PROP_NO_TRANSFORM)) |
43cd72b9 BW |
9268 | return TRUE; |
9269 | ||
9270 | /* Mark that the literal will be coalesced. */ | |
9271 | add_removed_literal (&relax_info->removed_list, &rel->r_rel, &val_map->loc); | |
9272 | ||
9273 | text_action_add (&relax_info->action_list, | |
9274 | ta_remove_literal, sec, rel->r_rel.target_offset, 4); | |
9275 | ||
9276 | /* If the section is 4-byte aligned, do not add fill. */ | |
68ffbac6 | 9277 | if (sec->alignment_power > 2) |
e0001a05 | 9278 | { |
43cd72b9 BW |
9279 | int fill_extra_space; |
9280 | bfd_vma entry_sec_offset; | |
9281 | ||
9282 | if (entry) | |
9283 | entry_sec_offset = entry->address - sec->vma + entry->size; | |
9284 | else | |
9285 | entry_sec_offset = rel->r_rel.target_offset + 4; | |
9286 | ||
9287 | /* If the literal range is at the end of the section, | |
9288 | do not add fill. */ | |
9289 | fill_extra_space = 0; | |
9290 | the_add_entry = elf_xtensa_find_property_entry (prop_table, ptblsize, | |
9291 | entry_sec_offset); | |
9292 | if (the_add_entry && (the_add_entry->flags & XTENSA_PROP_UNREACHABLE)) | |
9293 | fill_extra_space = the_add_entry->size; | |
9294 | ||
9295 | fa = find_fill_action (&relax_info->action_list, sec, entry_sec_offset); | |
9296 | removed_diff = compute_removed_action_diff (fa, sec, entry_sec_offset, | |
9297 | -4, fill_extra_space); | |
9298 | if (fa) | |
9299 | adjust_fill_action (fa, removed_diff); | |
9300 | else | |
9301 | text_action_add (&relax_info->action_list, | |
9302 | ta_fill, sec, entry_sec_offset, removed_diff); | |
e0001a05 | 9303 | } |
43cd72b9 BW |
9304 | |
9305 | return TRUE; | |
9306 | } | |
9307 | ||
9308 | ||
9309 | /* Move a literal to another location. This may actually increase the | |
9310 | total amount of space used because of alignments so we need to do | |
9311 | this carefully. Also, it may make a branch go out of range. */ | |
9312 | ||
68ffbac6 | 9313 | static bfd_boolean |
7fa3d080 BW |
9314 | move_shared_literal (asection *sec, |
9315 | struct bfd_link_info *link_info, | |
9316 | source_reloc *rel, | |
9317 | property_table_entry *prop_table, | |
9318 | int ptblsize, | |
9319 | const r_reloc *target_loc, | |
9320 | const literal_value *lit_value, | |
9321 | section_cache_t *target_sec_cache) | |
43cd72b9 BW |
9322 | { |
9323 | property_table_entry *the_add_entry, *src_entry, *target_entry = NULL; | |
9324 | text_action *fa, *target_fa; | |
9325 | int removed_diff; | |
9326 | xtensa_relax_info *relax_info, *target_relax_info; | |
9327 | asection *target_sec; | |
9328 | ebb_t *ebb; | |
9329 | ebb_constraint ebb_table; | |
9330 | bfd_boolean relocs_fit; | |
9331 | ||
9332 | /* If this routine always returns FALSE, the literals that cannot be | |
9333 | coalesced will not be moved. */ | |
9334 | if (elf32xtensa_no_literal_movement) | |
9335 | return FALSE; | |
9336 | ||
9337 | relax_info = get_xtensa_relax_info (sec); | |
9338 | if (!relax_info) | |
9339 | return FALSE; | |
9340 | ||
9341 | target_sec = r_reloc_get_section (target_loc); | |
9342 | target_relax_info = get_xtensa_relax_info (target_sec); | |
9343 | ||
9344 | /* Literals to undefined sections may not be moved because they | |
9345 | must report an error. */ | |
9346 | if (bfd_is_und_section (target_sec)) | |
9347 | return FALSE; | |
9348 | ||
9349 | src_entry = elf_xtensa_find_property_entry | |
9350 | (prop_table, ptblsize, sec->vma + rel->r_rel.target_offset); | |
9351 | ||
9352 | if (!section_cache_section (target_sec_cache, target_sec, link_info)) | |
9353 | return FALSE; | |
9354 | ||
9355 | target_entry = elf_xtensa_find_property_entry | |
68ffbac6 | 9356 | (target_sec_cache->ptbl, target_sec_cache->pte_count, |
43cd72b9 BW |
9357 | target_sec->vma + target_loc->target_offset); |
9358 | ||
9359 | if (!target_entry) | |
9360 | return FALSE; | |
9361 | ||
9362 | /* Make sure that we have not broken any branches. */ | |
9363 | relocs_fit = FALSE; | |
9364 | ||
9365 | init_ebb_constraint (&ebb_table); | |
9366 | ebb = &ebb_table.ebb; | |
68ffbac6 | 9367 | init_ebb (ebb, target_sec_cache->sec, target_sec_cache->contents, |
43cd72b9 BW |
9368 | target_sec_cache->content_length, |
9369 | target_sec_cache->ptbl, target_sec_cache->pte_count, | |
9370 | target_sec_cache->relocs, target_sec_cache->reloc_count); | |
9371 | ||
9372 | /* Propose to add 4 bytes + worst-case alignment size increase to | |
9373 | destination. */ | |
9374 | ebb_propose_action (&ebb_table, EBB_NO_ALIGN, 0, | |
9375 | ta_fill, target_loc->target_offset, | |
9376 | -4 - (1 << target_sec->alignment_power), TRUE); | |
9377 | ||
9378 | /* Check all of the PC-relative relocations to make sure they still fit. */ | |
68ffbac6 | 9379 | relocs_fit = check_section_ebb_pcrels_fit (target_sec->owner, target_sec, |
43cd72b9 | 9380 | target_sec_cache->contents, |
b2b326d2 | 9381 | target_sec_cache->relocs, NULL, |
cb337148 | 9382 | &ebb_table, NULL); |
43cd72b9 | 9383 | |
68ffbac6 | 9384 | if (!relocs_fit) |
43cd72b9 BW |
9385 | return FALSE; |
9386 | ||
9387 | text_action_add_literal (&target_relax_info->action_list, | |
9388 | ta_add_literal, target_loc, lit_value, -4); | |
9389 | ||
68ffbac6 | 9390 | if (target_sec->alignment_power > 2 && target_entry != src_entry) |
43cd72b9 BW |
9391 | { |
9392 | /* May need to add or remove some fill to maintain alignment. */ | |
9393 | int fill_extra_space; | |
9394 | bfd_vma entry_sec_offset; | |
9395 | ||
68ffbac6 | 9396 | entry_sec_offset = |
43cd72b9 BW |
9397 | target_entry->address - target_sec->vma + target_entry->size; |
9398 | ||
9399 | /* If the literal range is at the end of the section, | |
9400 | do not add fill. */ | |
9401 | fill_extra_space = 0; | |
9402 | the_add_entry = | |
9403 | elf_xtensa_find_property_entry (target_sec_cache->ptbl, | |
9404 | target_sec_cache->pte_count, | |
9405 | entry_sec_offset); | |
9406 | if (the_add_entry && (the_add_entry->flags & XTENSA_PROP_UNREACHABLE)) | |
9407 | fill_extra_space = the_add_entry->size; | |
9408 | ||
9409 | target_fa = find_fill_action (&target_relax_info->action_list, | |
9410 | target_sec, entry_sec_offset); | |
9411 | removed_diff = compute_removed_action_diff (target_fa, target_sec, | |
9412 | entry_sec_offset, 4, | |
9413 | fill_extra_space); | |
9414 | if (target_fa) | |
9415 | adjust_fill_action (target_fa, removed_diff); | |
9416 | else | |
9417 | text_action_add (&target_relax_info->action_list, | |
9418 | ta_fill, target_sec, entry_sec_offset, removed_diff); | |
9419 | } | |
9420 | ||
9421 | /* Mark that the literal will be moved to the new location. */ | |
9422 | add_removed_literal (&relax_info->removed_list, &rel->r_rel, target_loc); | |
9423 | ||
9424 | /* Remove the literal. */ | |
9425 | text_action_add (&relax_info->action_list, | |
9426 | ta_remove_literal, sec, rel->r_rel.target_offset, 4); | |
9427 | ||
9428 | /* If the section is 4-byte aligned, do not add fill. */ | |
68ffbac6 | 9429 | if (sec->alignment_power > 2 && target_entry != src_entry) |
43cd72b9 BW |
9430 | { |
9431 | int fill_extra_space; | |
9432 | bfd_vma entry_sec_offset; | |
9433 | ||
9434 | if (src_entry) | |
9435 | entry_sec_offset = src_entry->address - sec->vma + src_entry->size; | |
9436 | else | |
9437 | entry_sec_offset = rel->r_rel.target_offset+4; | |
9438 | ||
9439 | /* If the literal range is at the end of the section, | |
9440 | do not add fill. */ | |
9441 | fill_extra_space = 0; | |
9442 | the_add_entry = elf_xtensa_find_property_entry (prop_table, ptblsize, | |
9443 | entry_sec_offset); | |
9444 | if (the_add_entry && (the_add_entry->flags & XTENSA_PROP_UNREACHABLE)) | |
9445 | fill_extra_space = the_add_entry->size; | |
9446 | ||
9447 | fa = find_fill_action (&relax_info->action_list, sec, entry_sec_offset); | |
9448 | removed_diff = compute_removed_action_diff (fa, sec, entry_sec_offset, | |
9449 | -4, fill_extra_space); | |
9450 | if (fa) | |
9451 | adjust_fill_action (fa, removed_diff); | |
9452 | else | |
9453 | text_action_add (&relax_info->action_list, | |
9454 | ta_fill, sec, entry_sec_offset, removed_diff); | |
9455 | } | |
9456 | ||
9457 | return TRUE; | |
e0001a05 NC |
9458 | } |
9459 | ||
9460 | \f | |
9461 | /* Second relaxation pass. */ | |
9462 | ||
4c2af04f MF |
9463 | static int |
9464 | action_remove_bytes_fn (splay_tree_node node, void *p) | |
9465 | { | |
9466 | bfd_size_type *final_size = p; | |
9467 | text_action *action = (text_action *)node->value; | |
9468 | ||
9469 | *final_size -= action->removed_bytes; | |
9470 | return 0; | |
9471 | } | |
9472 | ||
e0001a05 NC |
9473 | /* Modify all of the relocations to point to the right spot, and if this |
9474 | is a relaxable section, delete the unwanted literals and fix the | |
43cd72b9 | 9475 | section size. */ |
e0001a05 | 9476 | |
43cd72b9 | 9477 | bfd_boolean |
7fa3d080 | 9478 | relax_section (bfd *abfd, asection *sec, struct bfd_link_info *link_info) |
e0001a05 NC |
9479 | { |
9480 | Elf_Internal_Rela *internal_relocs; | |
9481 | xtensa_relax_info *relax_info; | |
9482 | bfd_byte *contents; | |
9483 | bfd_boolean ok = TRUE; | |
9484 | unsigned i; | |
43cd72b9 BW |
9485 | bfd_boolean rv = FALSE; |
9486 | bfd_boolean virtual_action; | |
9487 | bfd_size_type sec_size; | |
e0001a05 | 9488 | |
43cd72b9 | 9489 | sec_size = bfd_get_section_limit (abfd, sec); |
e0001a05 NC |
9490 | relax_info = get_xtensa_relax_info (sec); |
9491 | BFD_ASSERT (relax_info); | |
9492 | ||
43cd72b9 BW |
9493 | /* First translate any of the fixes that have been added already. */ |
9494 | translate_section_fixes (sec); | |
9495 | ||
e0001a05 NC |
9496 | /* Handle property sections (e.g., literal tables) specially. */ |
9497 | if (xtensa_is_property_section (sec)) | |
9498 | { | |
9499 | BFD_ASSERT (!relax_info->is_relaxable_literal_section); | |
9500 | return relax_property_section (abfd, sec, link_info); | |
9501 | } | |
9502 | ||
68ffbac6 | 9503 | internal_relocs = retrieve_internal_relocs (abfd, sec, |
43cd72b9 | 9504 | link_info->keep_memory); |
4c2af04f | 9505 | if (!internal_relocs && !action_list_count (&relax_info->action_list)) |
7aa09196 SA |
9506 | return TRUE; |
9507 | ||
43cd72b9 BW |
9508 | contents = retrieve_contents (abfd, sec, link_info->keep_memory); |
9509 | if (contents == NULL && sec_size != 0) | |
9510 | { | |
9511 | ok = FALSE; | |
9512 | goto error_return; | |
9513 | } | |
9514 | ||
9515 | if (internal_relocs) | |
9516 | { | |
9517 | for (i = 0; i < sec->reloc_count; i++) | |
9518 | { | |
9519 | Elf_Internal_Rela *irel; | |
9520 | xtensa_relax_info *target_relax_info; | |
9521 | bfd_vma source_offset, old_source_offset; | |
9522 | r_reloc r_rel; | |
9523 | unsigned r_type; | |
9524 | asection *target_sec; | |
9525 | ||
9526 | /* Locally change the source address. | |
9527 | Translate the target to the new target address. | |
9528 | If it points to this section and has been removed, | |
9529 | NULLify it. | |
9530 | Write it back. */ | |
9531 | ||
9532 | irel = &internal_relocs[i]; | |
9533 | source_offset = irel->r_offset; | |
9534 | old_source_offset = source_offset; | |
9535 | ||
9536 | r_type = ELF32_R_TYPE (irel->r_info); | |
9537 | r_reloc_init (&r_rel, abfd, irel, contents, | |
9538 | bfd_get_section_limit (abfd, sec)); | |
9539 | ||
9540 | /* If this section could have changed then we may need to | |
9541 | change the relocation's offset. */ | |
9542 | ||
9543 | if (relax_info->is_relaxable_literal_section | |
9544 | || relax_info->is_relaxable_asm_section) | |
9545 | { | |
9b7f5d20 BW |
9546 | pin_internal_relocs (sec, internal_relocs); |
9547 | ||
43cd72b9 BW |
9548 | if (r_type != R_XTENSA_NONE |
9549 | && find_removed_literal (&relax_info->removed_list, | |
9550 | irel->r_offset)) | |
9551 | { | |
9552 | /* Remove this relocation. */ | |
9553 | if (elf_hash_table (link_info)->dynamic_sections_created) | |
9554 | shrink_dynamic_reloc_sections (link_info, abfd, sec, irel); | |
9555 | irel->r_info = ELF32_R_INFO (0, R_XTENSA_NONE); | |
071aa5c9 | 9556 | irel->r_offset = offset_with_removed_text_map |
43cd72b9 | 9557 | (&relax_info->action_list, irel->r_offset); |
43cd72b9 BW |
9558 | continue; |
9559 | } | |
9560 | ||
9561 | if (r_type == R_XTENSA_ASM_SIMPLIFY) | |
9562 | { | |
9563 | text_action *action = | |
9564 | find_insn_action (&relax_info->action_list, | |
9565 | irel->r_offset); | |
9566 | if (action && (action->action == ta_convert_longcall | |
9567 | || action->action == ta_remove_longcall)) | |
9568 | { | |
9569 | bfd_reloc_status_type retval; | |
9570 | char *error_message = NULL; | |
9571 | ||
9572 | retval = contract_asm_expansion (contents, sec_size, | |
9573 | irel, &error_message); | |
9574 | if (retval != bfd_reloc_ok) | |
9575 | { | |
9576 | (*link_info->callbacks->reloc_dangerous) | |
9577 | (link_info, error_message, abfd, sec, | |
9578 | irel->r_offset); | |
9579 | goto error_return; | |
9580 | } | |
9581 | /* Update the action so that the code that moves | |
9582 | the contents will do the right thing. */ | |
4c2af04f | 9583 | /* ta_remove_longcall and ta_remove_insn actions are |
07d6d2b8 | 9584 | grouped together in the tree as well as |
4c2af04f MF |
9585 | ta_convert_longcall and ta_none, so that changes below |
9586 | can be done w/o removing and reinserting action into | |
9587 | the tree. */ | |
9588 | ||
43cd72b9 BW |
9589 | if (action->action == ta_remove_longcall) |
9590 | action->action = ta_remove_insn; | |
9591 | else | |
9592 | action->action = ta_none; | |
9593 | /* Refresh the info in the r_rel. */ | |
9594 | r_reloc_init (&r_rel, abfd, irel, contents, sec_size); | |
9595 | r_type = ELF32_R_TYPE (irel->r_info); | |
9596 | } | |
9597 | } | |
9598 | ||
071aa5c9 | 9599 | source_offset = offset_with_removed_text_map |
43cd72b9 BW |
9600 | (&relax_info->action_list, irel->r_offset); |
9601 | irel->r_offset = source_offset; | |
9602 | } | |
9603 | ||
9604 | /* If the target section could have changed then | |
9605 | we may need to change the relocation's target offset. */ | |
9606 | ||
9607 | target_sec = r_reloc_get_section (&r_rel); | |
43cd72b9 | 9608 | |
ae326da8 BW |
9609 | /* For a reference to a discarded section from a DWARF section, |
9610 | i.e., where action_discarded is PRETEND, the symbol will | |
9611 | eventually be modified to refer to the kept section (at least if | |
9612 | the kept and discarded sections are the same size). Anticipate | |
9613 | that here and adjust things accordingly. */ | |
9614 | if (! elf_xtensa_ignore_discarded_relocs (sec) | |
9615 | && elf_xtensa_action_discarded (sec) == PRETEND | |
dbaa2011 | 9616 | && sec->sec_info_type != SEC_INFO_TYPE_STABS |
ae326da8 | 9617 | && target_sec != NULL |
dbaa2011 | 9618 | && discarded_section (target_sec)) |
ae326da8 BW |
9619 | { |
9620 | /* It would be natural to call _bfd_elf_check_kept_section | |
9621 | here, but it's not exported from elflink.c. It's also a | |
9622 | fairly expensive check. Adjusting the relocations to the | |
9623 | discarded section is fairly harmless; it will only adjust | |
9624 | some addends and difference values. If it turns out that | |
9625 | _bfd_elf_check_kept_section fails later, it won't matter, | |
9626 | so just compare the section names to find the right group | |
9627 | member. */ | |
9628 | asection *kept = target_sec->kept_section; | |
9629 | if (kept != NULL) | |
9630 | { | |
9631 | if ((kept->flags & SEC_GROUP) != 0) | |
9632 | { | |
9633 | asection *first = elf_next_in_group (kept); | |
9634 | asection *s = first; | |
9635 | ||
9636 | kept = NULL; | |
9637 | while (s != NULL) | |
9638 | { | |
9639 | if (strcmp (s->name, target_sec->name) == 0) | |
9640 | { | |
9641 | kept = s; | |
9642 | break; | |
9643 | } | |
9644 | s = elf_next_in_group (s); | |
9645 | if (s == first) | |
9646 | break; | |
9647 | } | |
9648 | } | |
9649 | } | |
9650 | if (kept != NULL | |
9651 | && ((target_sec->rawsize != 0 | |
9652 | ? target_sec->rawsize : target_sec->size) | |
9653 | == (kept->rawsize != 0 ? kept->rawsize : kept->size))) | |
9654 | target_sec = kept; | |
9655 | } | |
9656 | ||
9657 | target_relax_info = get_xtensa_relax_info (target_sec); | |
43cd72b9 BW |
9658 | if (target_relax_info |
9659 | && (target_relax_info->is_relaxable_literal_section | |
9660 | || target_relax_info->is_relaxable_asm_section)) | |
9661 | { | |
9662 | r_reloc new_reloc; | |
9b7f5d20 | 9663 | target_sec = translate_reloc (&r_rel, &new_reloc, target_sec); |
43cd72b9 BW |
9664 | |
9665 | if (r_type == R_XTENSA_DIFF8 | |
9666 | || r_type == R_XTENSA_DIFF16 | |
30ce8e47 MF |
9667 | || r_type == R_XTENSA_DIFF32 |
9668 | || r_type == R_XTENSA_PDIFF8 | |
9669 | || r_type == R_XTENSA_PDIFF16 | |
9670 | || r_type == R_XTENSA_PDIFF32 | |
9671 | || r_type == R_XTENSA_NDIFF8 | |
9672 | || r_type == R_XTENSA_NDIFF16 | |
9673 | || r_type == R_XTENSA_NDIFF32) | |
43cd72b9 | 9674 | { |
1058c753 VA |
9675 | bfd_signed_vma diff_value = 0; |
9676 | bfd_vma new_end_offset, diff_mask = 0; | |
43cd72b9 BW |
9677 | |
9678 | if (bfd_get_section_limit (abfd, sec) < old_source_offset) | |
9679 | { | |
9680 | (*link_info->callbacks->reloc_dangerous) | |
9681 | (link_info, _("invalid relocation address"), | |
9682 | abfd, sec, old_source_offset); | |
9683 | goto error_return; | |
9684 | } | |
9685 | ||
9686 | switch (r_type) | |
9687 | { | |
9688 | case R_XTENSA_DIFF8: | |
d548f47d | 9689 | diff_mask = 0x7f; |
43cd72b9 | 9690 | diff_value = |
1058c753 | 9691 | bfd_get_signed_8 (abfd, &contents[old_source_offset]); |
43cd72b9 BW |
9692 | break; |
9693 | case R_XTENSA_DIFF16: | |
d548f47d | 9694 | diff_mask = 0x7fff; |
43cd72b9 | 9695 | diff_value = |
1058c753 | 9696 | bfd_get_signed_16 (abfd, &contents[old_source_offset]); |
43cd72b9 BW |
9697 | break; |
9698 | case R_XTENSA_DIFF32: | |
d548f47d | 9699 | diff_mask = 0x7fffffff; |
43cd72b9 | 9700 | diff_value = |
1058c753 | 9701 | bfd_get_signed_32 (abfd, &contents[old_source_offset]); |
43cd72b9 | 9702 | break; |
30ce8e47 MF |
9703 | case R_XTENSA_PDIFF8: |
9704 | case R_XTENSA_NDIFF8: | |
d548f47d | 9705 | diff_mask = 0xff; |
30ce8e47 MF |
9706 | diff_value = |
9707 | bfd_get_8 (abfd, &contents[old_source_offset]); | |
9708 | break; | |
9709 | case R_XTENSA_PDIFF16: | |
9710 | case R_XTENSA_NDIFF16: | |
d548f47d | 9711 | diff_mask = 0xffff; |
30ce8e47 MF |
9712 | diff_value = |
9713 | bfd_get_16 (abfd, &contents[old_source_offset]); | |
9714 | break; | |
9715 | case R_XTENSA_PDIFF32: | |
9716 | case R_XTENSA_NDIFF32: | |
d548f47d | 9717 | diff_mask = 0xffffffff; |
30ce8e47 MF |
9718 | diff_value = |
9719 | bfd_get_32 (abfd, &contents[old_source_offset]); | |
9720 | break; | |
43cd72b9 BW |
9721 | } |
9722 | ||
30ce8e47 | 9723 | if (r_type >= R_XTENSA_NDIFF8 |
d548f47d MF |
9724 | && r_type <= R_XTENSA_NDIFF32 |
9725 | && diff_value) | |
9726 | diff_value |= ~diff_mask; | |
30ce8e47 | 9727 | |
071aa5c9 | 9728 | new_end_offset = offset_with_removed_text_map |
43cd72b9 BW |
9729 | (&target_relax_info->action_list, |
9730 | r_rel.target_offset + diff_value); | |
9731 | diff_value = new_end_offset - new_reloc.target_offset; | |
9732 | ||
9733 | switch (r_type) | |
9734 | { | |
9735 | case R_XTENSA_DIFF8: | |
1058c753 | 9736 | bfd_put_signed_8 (abfd, diff_value, |
43cd72b9 BW |
9737 | &contents[old_source_offset]); |
9738 | break; | |
9739 | case R_XTENSA_DIFF16: | |
1058c753 | 9740 | bfd_put_signed_16 (abfd, diff_value, |
43cd72b9 BW |
9741 | &contents[old_source_offset]); |
9742 | break; | |
9743 | case R_XTENSA_DIFF32: | |
1058c753 | 9744 | bfd_put_signed_32 (abfd, diff_value, |
43cd72b9 BW |
9745 | &contents[old_source_offset]); |
9746 | break; | |
30ce8e47 MF |
9747 | case R_XTENSA_PDIFF8: |
9748 | case R_XTENSA_NDIFF8: | |
30ce8e47 MF |
9749 | bfd_put_8 (abfd, diff_value, |
9750 | &contents[old_source_offset]); | |
9751 | break; | |
9752 | case R_XTENSA_PDIFF16: | |
9753 | case R_XTENSA_NDIFF16: | |
30ce8e47 MF |
9754 | bfd_put_16 (abfd, diff_value, |
9755 | &contents[old_source_offset]); | |
9756 | break; | |
9757 | case R_XTENSA_PDIFF32: | |
9758 | case R_XTENSA_NDIFF32: | |
30ce8e47 MF |
9759 | bfd_put_32 (abfd, diff_value, |
9760 | &contents[old_source_offset]); | |
9761 | break; | |
43cd72b9 BW |
9762 | } |
9763 | ||
d548f47d MF |
9764 | /* Check for overflow. Sign bits must be all zeroes or |
9765 | all ones. When sign bits are all ones diff_value | |
9766 | may not be zero. */ | |
9767 | if (((diff_value & ~diff_mask) != 0 | |
9768 | && (diff_value & ~diff_mask) != ~diff_mask) | |
9769 | || (diff_value && (bfd_vma) diff_value == ~diff_mask)) | |
43cd72b9 BW |
9770 | { |
9771 | (*link_info->callbacks->reloc_dangerous) | |
9772 | (link_info, _("overflow after relaxation"), | |
9773 | abfd, sec, old_source_offset); | |
9774 | goto error_return; | |
9775 | } | |
9776 | ||
9777 | pin_contents (sec, contents); | |
9778 | } | |
dc96b90a BW |
9779 | |
9780 | /* If the relocation still references a section in the same | |
9781 | input file, modify the relocation directly instead of | |
9782 | adding a "fix" record. */ | |
9783 | if (target_sec->owner == abfd) | |
9784 | { | |
9785 | unsigned r_symndx = ELF32_R_SYM (new_reloc.rela.r_info); | |
9786 | irel->r_info = ELF32_R_INFO (r_symndx, r_type); | |
9787 | irel->r_addend = new_reloc.rela.r_addend; | |
9788 | pin_internal_relocs (sec, internal_relocs); | |
9789 | } | |
9b7f5d20 BW |
9790 | else |
9791 | { | |
dc96b90a BW |
9792 | bfd_vma addend_displacement; |
9793 | reloc_bfd_fix *fix; | |
9794 | ||
9795 | addend_displacement = | |
9796 | new_reloc.target_offset + new_reloc.virtual_offset; | |
9797 | fix = reloc_bfd_fix_init (sec, source_offset, r_type, | |
9798 | target_sec, | |
9799 | addend_displacement, TRUE); | |
9800 | add_fix (sec, fix); | |
9b7f5d20 | 9801 | } |
43cd72b9 | 9802 | } |
43cd72b9 BW |
9803 | } |
9804 | } | |
9805 | ||
9806 | if ((relax_info->is_relaxable_literal_section | |
9807 | || relax_info->is_relaxable_asm_section) | |
4c2af04f | 9808 | && action_list_count (&relax_info->action_list)) |
43cd72b9 BW |
9809 | { |
9810 | /* Walk through the planned actions and build up a table | |
9811 | of move, copy and fill records. Use the move, copy and | |
9812 | fill records to perform the actions once. */ | |
9813 | ||
43cd72b9 BW |
9814 | bfd_size_type final_size, copy_size, orig_insn_size; |
9815 | bfd_byte *scratch = NULL; | |
9816 | bfd_byte *dup_contents = NULL; | |
a3ef2d63 | 9817 | bfd_size_type orig_size = sec->size; |
43cd72b9 BW |
9818 | bfd_vma orig_dot = 0; |
9819 | bfd_vma orig_dot_copied = 0; /* Byte copied already from | |
9820 | orig dot in physical memory. */ | |
9821 | bfd_vma orig_dot_vo = 0; /* Virtual offset from orig_dot. */ | |
9822 | bfd_vma dup_dot = 0; | |
9823 | ||
4c2af04f | 9824 | text_action *action; |
43cd72b9 BW |
9825 | |
9826 | final_size = sec->size; | |
43cd72b9 | 9827 | |
4c2af04f MF |
9828 | splay_tree_foreach (relax_info->action_list.tree, |
9829 | action_remove_bytes_fn, &final_size); | |
43cd72b9 BW |
9830 | scratch = (bfd_byte *) bfd_zmalloc (final_size); |
9831 | dup_contents = (bfd_byte *) bfd_zmalloc (final_size); | |
9832 | ||
9833 | /* The dot is the current fill location. */ | |
9834 | #if DEBUG | |
9835 | print_action_list (stderr, &relax_info->action_list); | |
9836 | #endif | |
9837 | ||
4c2af04f MF |
9838 | for (action = action_first (&relax_info->action_list); action; |
9839 | action = action_next (&relax_info->action_list, action)) | |
43cd72b9 BW |
9840 | { |
9841 | virtual_action = FALSE; | |
9842 | if (action->offset > orig_dot) | |
9843 | { | |
9844 | orig_dot += orig_dot_copied; | |
9845 | orig_dot_copied = 0; | |
9846 | orig_dot_vo = 0; | |
9847 | /* Out of the virtual world. */ | |
9848 | } | |
9849 | ||
9850 | if (action->offset > orig_dot) | |
9851 | { | |
9852 | copy_size = action->offset - orig_dot; | |
9853 | memmove (&dup_contents[dup_dot], &contents[orig_dot], copy_size); | |
9854 | orig_dot += copy_size; | |
9855 | dup_dot += copy_size; | |
9856 | BFD_ASSERT (action->offset == orig_dot); | |
9857 | } | |
9858 | else if (action->offset < orig_dot) | |
9859 | { | |
9860 | if (action->action == ta_fill | |
9861 | && action->offset - action->removed_bytes == orig_dot) | |
9862 | { | |
9863 | /* This is OK because the fill only effects the dup_dot. */ | |
9864 | } | |
9865 | else if (action->action == ta_add_literal) | |
9866 | { | |
9867 | /* TBD. Might need to handle this. */ | |
9868 | } | |
9869 | } | |
9870 | if (action->offset == orig_dot) | |
9871 | { | |
9872 | if (action->virtual_offset > orig_dot_vo) | |
9873 | { | |
9874 | if (orig_dot_vo == 0) | |
9875 | { | |
9876 | /* Need to copy virtual_offset bytes. Probably four. */ | |
9877 | copy_size = action->virtual_offset - orig_dot_vo; | |
9878 | memmove (&dup_contents[dup_dot], | |
9879 | &contents[orig_dot], copy_size); | |
9880 | orig_dot_copied = copy_size; | |
9881 | dup_dot += copy_size; | |
9882 | } | |
9883 | virtual_action = TRUE; | |
68ffbac6 | 9884 | } |
43cd72b9 BW |
9885 | else |
9886 | BFD_ASSERT (action->virtual_offset <= orig_dot_vo); | |
9887 | } | |
9888 | switch (action->action) | |
9889 | { | |
9890 | case ta_remove_literal: | |
9891 | case ta_remove_insn: | |
9892 | BFD_ASSERT (action->removed_bytes >= 0); | |
9893 | orig_dot += action->removed_bytes; | |
9894 | break; | |
9895 | ||
9896 | case ta_narrow_insn: | |
9897 | orig_insn_size = 3; | |
9898 | copy_size = 2; | |
9899 | memmove (scratch, &contents[orig_dot], orig_insn_size); | |
9900 | BFD_ASSERT (action->removed_bytes == 1); | |
64b607e6 | 9901 | rv = narrow_instruction (scratch, final_size, 0); |
43cd72b9 BW |
9902 | BFD_ASSERT (rv); |
9903 | memmove (&dup_contents[dup_dot], scratch, copy_size); | |
9904 | orig_dot += orig_insn_size; | |
9905 | dup_dot += copy_size; | |
9906 | break; | |
9907 | ||
9908 | case ta_fill: | |
9909 | if (action->removed_bytes >= 0) | |
9910 | orig_dot += action->removed_bytes; | |
9911 | else | |
9912 | { | |
9913 | /* Already zeroed in dup_contents. Just bump the | |
9914 | counters. */ | |
9915 | dup_dot += (-action->removed_bytes); | |
9916 | } | |
9917 | break; | |
9918 | ||
9919 | case ta_none: | |
9920 | BFD_ASSERT (action->removed_bytes == 0); | |
9921 | break; | |
9922 | ||
9923 | case ta_convert_longcall: | |
9924 | case ta_remove_longcall: | |
9925 | /* These will be removed or converted before we get here. */ | |
9926 | BFD_ASSERT (0); | |
9927 | break; | |
9928 | ||
9929 | case ta_widen_insn: | |
9930 | orig_insn_size = 2; | |
9931 | copy_size = 3; | |
9932 | memmove (scratch, &contents[orig_dot], orig_insn_size); | |
9933 | BFD_ASSERT (action->removed_bytes == -1); | |
64b607e6 | 9934 | rv = widen_instruction (scratch, final_size, 0); |
43cd72b9 BW |
9935 | BFD_ASSERT (rv); |
9936 | memmove (&dup_contents[dup_dot], scratch, copy_size); | |
9937 | orig_dot += orig_insn_size; | |
9938 | dup_dot += copy_size; | |
9939 | break; | |
9940 | ||
9941 | case ta_add_literal: | |
9942 | orig_insn_size = 0; | |
9943 | copy_size = 4; | |
9944 | BFD_ASSERT (action->removed_bytes == -4); | |
9945 | /* TBD -- place the literal value here and insert | |
9946 | into the table. */ | |
9947 | memset (&dup_contents[dup_dot], 0, 4); | |
9948 | pin_internal_relocs (sec, internal_relocs); | |
9949 | pin_contents (sec, contents); | |
9950 | ||
9951 | if (!move_literal (abfd, link_info, sec, dup_dot, dup_contents, | |
9952 | relax_info, &internal_relocs, &action->value)) | |
9953 | goto error_return; | |
9954 | ||
68ffbac6 | 9955 | if (virtual_action) |
43cd72b9 BW |
9956 | orig_dot_vo += copy_size; |
9957 | ||
9958 | orig_dot += orig_insn_size; | |
9959 | dup_dot += copy_size; | |
9960 | break; | |
9961 | ||
9962 | default: | |
9963 | /* Not implemented yet. */ | |
9964 | BFD_ASSERT (0); | |
9965 | break; | |
9966 | } | |
9967 | ||
43cd72b9 BW |
9968 | BFD_ASSERT (dup_dot <= final_size); |
9969 | BFD_ASSERT (orig_dot <= orig_size); | |
9970 | } | |
9971 | ||
9972 | orig_dot += orig_dot_copied; | |
9973 | orig_dot_copied = 0; | |
9974 | ||
9975 | if (orig_dot != orig_size) | |
9976 | { | |
9977 | copy_size = orig_size - orig_dot; | |
9978 | BFD_ASSERT (orig_size > orig_dot); | |
9979 | BFD_ASSERT (dup_dot + copy_size == final_size); | |
9980 | memmove (&dup_contents[dup_dot], &contents[orig_dot], copy_size); | |
9981 | orig_dot += copy_size; | |
9982 | dup_dot += copy_size; | |
9983 | } | |
9984 | BFD_ASSERT (orig_size == orig_dot); | |
9985 | BFD_ASSERT (final_size == dup_dot); | |
9986 | ||
9987 | /* Move the dup_contents back. */ | |
9988 | if (final_size > orig_size) | |
9989 | { | |
9990 | /* Contents need to be reallocated. Swap the dup_contents into | |
9991 | contents. */ | |
9992 | sec->contents = dup_contents; | |
9993 | free (contents); | |
9994 | contents = dup_contents; | |
9995 | pin_contents (sec, contents); | |
9996 | } | |
9997 | else | |
9998 | { | |
9999 | BFD_ASSERT (final_size <= orig_size); | |
10000 | memset (contents, 0, orig_size); | |
10001 | memcpy (contents, dup_contents, final_size); | |
10002 | free (dup_contents); | |
10003 | } | |
10004 | free (scratch); | |
10005 | pin_contents (sec, contents); | |
10006 | ||
a3ef2d63 BW |
10007 | if (sec->rawsize == 0) |
10008 | sec->rawsize = sec->size; | |
43cd72b9 BW |
10009 | sec->size = final_size; |
10010 | } | |
10011 | ||
10012 | error_return: | |
10013 | release_internal_relocs (sec, internal_relocs); | |
10014 | release_contents (sec, contents); | |
10015 | return ok; | |
10016 | } | |
10017 | ||
10018 | ||
68ffbac6 | 10019 | static bfd_boolean |
7fa3d080 | 10020 | translate_section_fixes (asection *sec) |
43cd72b9 BW |
10021 | { |
10022 | xtensa_relax_info *relax_info; | |
10023 | reloc_bfd_fix *r; | |
10024 | ||
10025 | relax_info = get_xtensa_relax_info (sec); | |
10026 | if (!relax_info) | |
10027 | return TRUE; | |
10028 | ||
10029 | for (r = relax_info->fix_list; r != NULL; r = r->next) | |
10030 | if (!translate_reloc_bfd_fix (r)) | |
10031 | return FALSE; | |
e0001a05 | 10032 | |
43cd72b9 BW |
10033 | return TRUE; |
10034 | } | |
e0001a05 | 10035 | |
e0001a05 | 10036 | |
43cd72b9 BW |
10037 | /* Translate a fix given the mapping in the relax info for the target |
10038 | section. If it has already been translated, no work is required. */ | |
e0001a05 | 10039 | |
68ffbac6 | 10040 | static bfd_boolean |
7fa3d080 | 10041 | translate_reloc_bfd_fix (reloc_bfd_fix *fix) |
43cd72b9 BW |
10042 | { |
10043 | reloc_bfd_fix new_fix; | |
10044 | asection *sec; | |
10045 | xtensa_relax_info *relax_info; | |
10046 | removed_literal *removed; | |
10047 | bfd_vma new_offset, target_offset; | |
e0001a05 | 10048 | |
43cd72b9 BW |
10049 | if (fix->translated) |
10050 | return TRUE; | |
e0001a05 | 10051 | |
43cd72b9 BW |
10052 | sec = fix->target_sec; |
10053 | target_offset = fix->target_offset; | |
e0001a05 | 10054 | |
43cd72b9 BW |
10055 | relax_info = get_xtensa_relax_info (sec); |
10056 | if (!relax_info) | |
10057 | { | |
10058 | fix->translated = TRUE; | |
10059 | return TRUE; | |
10060 | } | |
e0001a05 | 10061 | |
43cd72b9 | 10062 | new_fix = *fix; |
e0001a05 | 10063 | |
43cd72b9 BW |
10064 | /* The fix does not need to be translated if the section cannot change. */ |
10065 | if (!relax_info->is_relaxable_literal_section | |
10066 | && !relax_info->is_relaxable_asm_section) | |
10067 | { | |
10068 | fix->translated = TRUE; | |
10069 | return TRUE; | |
10070 | } | |
e0001a05 | 10071 | |
43cd72b9 BW |
10072 | /* If the literal has been moved and this relocation was on an |
10073 | opcode, then the relocation should move to the new literal | |
10074 | location. Otherwise, the relocation should move within the | |
10075 | section. */ | |
10076 | ||
10077 | removed = FALSE; | |
10078 | if (is_operand_relocation (fix->src_type)) | |
10079 | { | |
10080 | /* Check if the original relocation is against a literal being | |
10081 | removed. */ | |
10082 | removed = find_removed_literal (&relax_info->removed_list, | |
10083 | target_offset); | |
e0001a05 NC |
10084 | } |
10085 | ||
68ffbac6 | 10086 | if (removed) |
e0001a05 | 10087 | { |
43cd72b9 | 10088 | asection *new_sec; |
e0001a05 | 10089 | |
43cd72b9 BW |
10090 | /* The fact that there is still a relocation to this literal indicates |
10091 | that the literal is being coalesced, not simply removed. */ | |
10092 | BFD_ASSERT (removed->to.abfd != NULL); | |
e0001a05 | 10093 | |
43cd72b9 BW |
10094 | /* This was moved to some other address (possibly another section). */ |
10095 | new_sec = r_reloc_get_section (&removed->to); | |
68ffbac6 | 10096 | if (new_sec != sec) |
e0001a05 | 10097 | { |
43cd72b9 BW |
10098 | sec = new_sec; |
10099 | relax_info = get_xtensa_relax_info (sec); | |
68ffbac6 | 10100 | if (!relax_info || |
43cd72b9 BW |
10101 | (!relax_info->is_relaxable_literal_section |
10102 | && !relax_info->is_relaxable_asm_section)) | |
e0001a05 | 10103 | { |
43cd72b9 BW |
10104 | target_offset = removed->to.target_offset; |
10105 | new_fix.target_sec = new_sec; | |
10106 | new_fix.target_offset = target_offset; | |
10107 | new_fix.translated = TRUE; | |
10108 | *fix = new_fix; | |
10109 | return TRUE; | |
e0001a05 | 10110 | } |
e0001a05 | 10111 | } |
43cd72b9 BW |
10112 | target_offset = removed->to.target_offset; |
10113 | new_fix.target_sec = new_sec; | |
e0001a05 | 10114 | } |
43cd72b9 BW |
10115 | |
10116 | /* The target address may have been moved within its section. */ | |
10117 | new_offset = offset_with_removed_text (&relax_info->action_list, | |
10118 | target_offset); | |
10119 | ||
10120 | new_fix.target_offset = new_offset; | |
10121 | new_fix.target_offset = new_offset; | |
10122 | new_fix.translated = TRUE; | |
10123 | *fix = new_fix; | |
10124 | return TRUE; | |
e0001a05 NC |
10125 | } |
10126 | ||
10127 | ||
10128 | /* Fix up a relocation to take account of removed literals. */ | |
10129 | ||
9b7f5d20 BW |
10130 | static asection * |
10131 | translate_reloc (const r_reloc *orig_rel, r_reloc *new_rel, asection *sec) | |
e0001a05 | 10132 | { |
e0001a05 NC |
10133 | xtensa_relax_info *relax_info; |
10134 | removed_literal *removed; | |
9b7f5d20 | 10135 | bfd_vma target_offset, base_offset; |
e0001a05 NC |
10136 | |
10137 | *new_rel = *orig_rel; | |
10138 | ||
10139 | if (!r_reloc_is_defined (orig_rel)) | |
9b7f5d20 | 10140 | return sec ; |
e0001a05 NC |
10141 | |
10142 | relax_info = get_xtensa_relax_info (sec); | |
9b7f5d20 BW |
10143 | BFD_ASSERT (relax_info && (relax_info->is_relaxable_literal_section |
10144 | || relax_info->is_relaxable_asm_section)); | |
e0001a05 | 10145 | |
43cd72b9 BW |
10146 | target_offset = orig_rel->target_offset; |
10147 | ||
10148 | removed = FALSE; | |
10149 | if (is_operand_relocation (ELF32_R_TYPE (orig_rel->rela.r_info))) | |
10150 | { | |
10151 | /* Check if the original relocation is against a literal being | |
10152 | removed. */ | |
10153 | removed = find_removed_literal (&relax_info->removed_list, | |
10154 | target_offset); | |
10155 | } | |
10156 | if (removed && removed->to.abfd) | |
e0001a05 NC |
10157 | { |
10158 | asection *new_sec; | |
10159 | ||
10160 | /* The fact that there is still a relocation to this literal indicates | |
10161 | that the literal is being coalesced, not simply removed. */ | |
10162 | BFD_ASSERT (removed->to.abfd != NULL); | |
10163 | ||
43cd72b9 BW |
10164 | /* This was moved to some other address |
10165 | (possibly in another section). */ | |
e0001a05 NC |
10166 | *new_rel = removed->to; |
10167 | new_sec = r_reloc_get_section (new_rel); | |
43cd72b9 | 10168 | if (new_sec != sec) |
e0001a05 NC |
10169 | { |
10170 | sec = new_sec; | |
10171 | relax_info = get_xtensa_relax_info (sec); | |
43cd72b9 BW |
10172 | if (!relax_info |
10173 | || (!relax_info->is_relaxable_literal_section | |
10174 | && !relax_info->is_relaxable_asm_section)) | |
9b7f5d20 | 10175 | return sec; |
e0001a05 | 10176 | } |
43cd72b9 | 10177 | target_offset = new_rel->target_offset; |
e0001a05 NC |
10178 | } |
10179 | ||
9b7f5d20 BW |
10180 | /* Find the base offset of the reloc symbol, excluding any addend from the |
10181 | reloc or from the section contents (for a partial_inplace reloc). Then | |
10182 | find the adjusted values of the offsets due to relaxation. The base | |
10183 | offset is needed to determine the change to the reloc's addend; the reloc | |
10184 | addend should not be adjusted due to relaxations located before the base | |
10185 | offset. */ | |
10186 | ||
10187 | base_offset = r_reloc_get_target_offset (new_rel) - new_rel->rela.r_addend; | |
9b7f5d20 BW |
10188 | if (base_offset <= target_offset) |
10189 | { | |
071aa5c9 MF |
10190 | int base_removed = removed_by_actions_map (&relax_info->action_list, |
10191 | base_offset, FALSE); | |
10192 | int addend_removed = removed_by_actions_map (&relax_info->action_list, | |
10193 | target_offset, FALSE) - | |
10194 | base_removed; | |
10195 | ||
9b7f5d20 BW |
10196 | new_rel->target_offset = target_offset - base_removed - addend_removed; |
10197 | new_rel->rela.r_addend -= addend_removed; | |
10198 | } | |
10199 | else | |
10200 | { | |
10201 | /* Handle a negative addend. The base offset comes first. */ | |
071aa5c9 MF |
10202 | int tgt_removed = removed_by_actions_map (&relax_info->action_list, |
10203 | target_offset, FALSE); | |
10204 | int addend_removed = removed_by_actions_map (&relax_info->action_list, | |
10205 | base_offset, FALSE) - | |
10206 | tgt_removed; | |
10207 | ||
9b7f5d20 BW |
10208 | new_rel->target_offset = target_offset - tgt_removed; |
10209 | new_rel->rela.r_addend += addend_removed; | |
10210 | } | |
e0001a05 | 10211 | |
9b7f5d20 | 10212 | return sec; |
e0001a05 NC |
10213 | } |
10214 | ||
10215 | ||
10216 | /* For dynamic links, there may be a dynamic relocation for each | |
10217 | literal. The number of dynamic relocations must be computed in | |
10218 | size_dynamic_sections, which occurs before relaxation. When a | |
10219 | literal is removed, this function checks if there is a corresponding | |
10220 | dynamic relocation and shrinks the size of the appropriate dynamic | |
10221 | relocation section accordingly. At this point, the contents of the | |
10222 | dynamic relocation sections have not yet been filled in, so there's | |
10223 | nothing else that needs to be done. */ | |
10224 | ||
10225 | static void | |
7fa3d080 BW |
10226 | shrink_dynamic_reloc_sections (struct bfd_link_info *info, |
10227 | bfd *abfd, | |
10228 | asection *input_section, | |
10229 | Elf_Internal_Rela *rel) | |
e0001a05 | 10230 | { |
f0e6fdb2 | 10231 | struct elf_xtensa_link_hash_table *htab; |
e0001a05 NC |
10232 | Elf_Internal_Shdr *symtab_hdr; |
10233 | struct elf_link_hash_entry **sym_hashes; | |
10234 | unsigned long r_symndx; | |
10235 | int r_type; | |
10236 | struct elf_link_hash_entry *h; | |
10237 | bfd_boolean dynamic_symbol; | |
10238 | ||
f0e6fdb2 | 10239 | htab = elf_xtensa_hash_table (info); |
4dfe6ac6 NC |
10240 | if (htab == NULL) |
10241 | return; | |
10242 | ||
e0001a05 NC |
10243 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; |
10244 | sym_hashes = elf_sym_hashes (abfd); | |
10245 | ||
10246 | r_type = ELF32_R_TYPE (rel->r_info); | |
10247 | r_symndx = ELF32_R_SYM (rel->r_info); | |
10248 | ||
10249 | if (r_symndx < symtab_hdr->sh_info) | |
10250 | h = NULL; | |
10251 | else | |
10252 | h = sym_hashes[r_symndx - symtab_hdr->sh_info]; | |
10253 | ||
4608f3d9 | 10254 | dynamic_symbol = elf_xtensa_dynamic_symbol_p (h, info); |
e0001a05 NC |
10255 | |
10256 | if ((r_type == R_XTENSA_32 || r_type == R_XTENSA_PLT) | |
10257 | && (input_section->flags & SEC_ALLOC) != 0 | |
e15a8da9 MF |
10258 | && (dynamic_symbol |
10259 | || (bfd_link_pic (info) | |
10260 | && (!h || h->root.type != bfd_link_hash_undefweak)))) | |
e0001a05 | 10261 | { |
e0001a05 NC |
10262 | asection *srel; |
10263 | bfd_boolean is_plt = FALSE; | |
10264 | ||
e0001a05 NC |
10265 | if (dynamic_symbol && r_type == R_XTENSA_PLT) |
10266 | { | |
ce558b89 | 10267 | srel = htab->elf.srelplt; |
e0001a05 NC |
10268 | is_plt = TRUE; |
10269 | } | |
10270 | else | |
ce558b89 | 10271 | srel = htab->elf.srelgot; |
e0001a05 NC |
10272 | |
10273 | /* Reduce size of the .rela.* section by one reloc. */ | |
e0001a05 | 10274 | BFD_ASSERT (srel != NULL); |
eea6121a AM |
10275 | BFD_ASSERT (srel->size >= sizeof (Elf32_External_Rela)); |
10276 | srel->size -= sizeof (Elf32_External_Rela); | |
e0001a05 NC |
10277 | |
10278 | if (is_plt) | |
10279 | { | |
10280 | asection *splt, *sgotplt, *srelgot; | |
10281 | int reloc_index, chunk; | |
10282 | ||
10283 | /* Find the PLT reloc index of the entry being removed. This | |
10284 | is computed from the size of ".rela.plt". It is needed to | |
10285 | figure out which PLT chunk to resize. Usually "last index | |
10286 | = size - 1" since the index starts at zero, but in this | |
10287 | context, the size has just been decremented so there's no | |
10288 | need to subtract one. */ | |
eea6121a | 10289 | reloc_index = srel->size / sizeof (Elf32_External_Rela); |
e0001a05 NC |
10290 | |
10291 | chunk = reloc_index / PLT_ENTRIES_PER_CHUNK; | |
f0e6fdb2 BW |
10292 | splt = elf_xtensa_get_plt_section (info, chunk); |
10293 | sgotplt = elf_xtensa_get_gotplt_section (info, chunk); | |
e0001a05 NC |
10294 | BFD_ASSERT (splt != NULL && sgotplt != NULL); |
10295 | ||
10296 | /* Check if an entire PLT chunk has just been eliminated. */ | |
10297 | if (reloc_index % PLT_ENTRIES_PER_CHUNK == 0) | |
10298 | { | |
10299 | /* The two magic GOT entries for that chunk can go away. */ | |
ce558b89 | 10300 | srelgot = htab->elf.srelgot; |
e0001a05 NC |
10301 | BFD_ASSERT (srelgot != NULL); |
10302 | srelgot->reloc_count -= 2; | |
eea6121a AM |
10303 | srelgot->size -= 2 * sizeof (Elf32_External_Rela); |
10304 | sgotplt->size -= 8; | |
e0001a05 NC |
10305 | |
10306 | /* There should be only one entry left (and it will be | |
10307 | removed below). */ | |
eea6121a AM |
10308 | BFD_ASSERT (sgotplt->size == 4); |
10309 | BFD_ASSERT (splt->size == PLT_ENTRY_SIZE); | |
e0001a05 NC |
10310 | } |
10311 | ||
eea6121a AM |
10312 | BFD_ASSERT (sgotplt->size >= 4); |
10313 | BFD_ASSERT (splt->size >= PLT_ENTRY_SIZE); | |
e0001a05 | 10314 | |
eea6121a AM |
10315 | sgotplt->size -= 4; |
10316 | splt->size -= PLT_ENTRY_SIZE; | |
e0001a05 NC |
10317 | } |
10318 | } | |
10319 | } | |
10320 | ||
10321 | ||
43cd72b9 BW |
10322 | /* Take an r_rel and move it to another section. This usually |
10323 | requires extending the interal_relocation array and pinning it. If | |
10324 | the original r_rel is from the same BFD, we can complete this here. | |
10325 | Otherwise, we add a fix record to let the final link fix the | |
10326 | appropriate address. Contents and internal relocations for the | |
10327 | section must be pinned after calling this routine. */ | |
10328 | ||
10329 | static bfd_boolean | |
7fa3d080 BW |
10330 | move_literal (bfd *abfd, |
10331 | struct bfd_link_info *link_info, | |
10332 | asection *sec, | |
10333 | bfd_vma offset, | |
10334 | bfd_byte *contents, | |
10335 | xtensa_relax_info *relax_info, | |
10336 | Elf_Internal_Rela **internal_relocs_p, | |
10337 | const literal_value *lit) | |
43cd72b9 BW |
10338 | { |
10339 | Elf_Internal_Rela *new_relocs = NULL; | |
10340 | size_t new_relocs_count = 0; | |
10341 | Elf_Internal_Rela this_rela; | |
10342 | const r_reloc *r_rel; | |
10343 | ||
10344 | r_rel = &lit->r_rel; | |
10345 | BFD_ASSERT (elf_section_data (sec)->relocs == *internal_relocs_p); | |
10346 | ||
10347 | if (r_reloc_is_const (r_rel)) | |
10348 | bfd_put_32 (abfd, lit->value, contents + offset); | |
10349 | else | |
10350 | { | |
10351 | int r_type; | |
10352 | unsigned i; | |
43cd72b9 BW |
10353 | reloc_bfd_fix *fix; |
10354 | unsigned insert_at; | |
10355 | ||
10356 | r_type = ELF32_R_TYPE (r_rel->rela.r_info); | |
43cd72b9 BW |
10357 | |
10358 | /* This is the difficult case. We have to create a fix up. */ | |
10359 | this_rela.r_offset = offset; | |
10360 | this_rela.r_info = ELF32_R_INFO (0, r_type); | |
10361 | this_rela.r_addend = | |
10362 | r_rel->target_offset - r_reloc_get_target_offset (r_rel); | |
10363 | bfd_put_32 (abfd, lit->value, contents + offset); | |
10364 | ||
10365 | /* Currently, we cannot move relocations during a relocatable link. */ | |
0e1862bb | 10366 | BFD_ASSERT (!bfd_link_relocatable (link_info)); |
0f5f1638 | 10367 | fix = reloc_bfd_fix_init (sec, offset, r_type, |
43cd72b9 BW |
10368 | r_reloc_get_section (r_rel), |
10369 | r_rel->target_offset + r_rel->virtual_offset, | |
10370 | FALSE); | |
10371 | /* We also need to mark that relocations are needed here. */ | |
10372 | sec->flags |= SEC_RELOC; | |
10373 | ||
10374 | translate_reloc_bfd_fix (fix); | |
10375 | /* This fix has not yet been translated. */ | |
10376 | add_fix (sec, fix); | |
10377 | ||
10378 | /* Add the relocation. If we have already allocated our own | |
10379 | space for the relocations and we have room for more, then use | |
10380 | it. Otherwise, allocate new space and move the literals. */ | |
10381 | insert_at = sec->reloc_count; | |
10382 | for (i = 0; i < sec->reloc_count; ++i) | |
10383 | { | |
10384 | if (this_rela.r_offset < (*internal_relocs_p)[i].r_offset) | |
10385 | { | |
10386 | insert_at = i; | |
10387 | break; | |
10388 | } | |
10389 | } | |
10390 | ||
10391 | if (*internal_relocs_p != relax_info->allocated_relocs | |
10392 | || sec->reloc_count + 1 > relax_info->allocated_relocs_count) | |
10393 | { | |
10394 | BFD_ASSERT (relax_info->allocated_relocs == NULL | |
10395 | || sec->reloc_count == relax_info->relocs_count); | |
10396 | ||
68ffbac6 | 10397 | if (relax_info->allocated_relocs_count == 0) |
43cd72b9 BW |
10398 | new_relocs_count = (sec->reloc_count + 2) * 2; |
10399 | else | |
10400 | new_relocs_count = (relax_info->allocated_relocs_count + 2) * 2; | |
10401 | ||
10402 | new_relocs = (Elf_Internal_Rela *) | |
10403 | bfd_zmalloc (sizeof (Elf_Internal_Rela) * (new_relocs_count)); | |
10404 | if (!new_relocs) | |
10405 | return FALSE; | |
10406 | ||
10407 | /* We could handle this more quickly by finding the split point. */ | |
10408 | if (insert_at != 0) | |
10409 | memcpy (new_relocs, *internal_relocs_p, | |
10410 | insert_at * sizeof (Elf_Internal_Rela)); | |
10411 | ||
10412 | new_relocs[insert_at] = this_rela; | |
10413 | ||
10414 | if (insert_at != sec->reloc_count) | |
10415 | memcpy (new_relocs + insert_at + 1, | |
10416 | (*internal_relocs_p) + insert_at, | |
68ffbac6 | 10417 | (sec->reloc_count - insert_at) |
43cd72b9 BW |
10418 | * sizeof (Elf_Internal_Rela)); |
10419 | ||
10420 | if (*internal_relocs_p != relax_info->allocated_relocs) | |
10421 | { | |
10422 | /* The first time we re-allocate, we can only free the | |
10423 | old relocs if they were allocated with bfd_malloc. | |
10424 | This is not true when keep_memory is in effect. */ | |
10425 | if (!link_info->keep_memory) | |
10426 | free (*internal_relocs_p); | |
10427 | } | |
10428 | else | |
10429 | free (*internal_relocs_p); | |
10430 | relax_info->allocated_relocs = new_relocs; | |
10431 | relax_info->allocated_relocs_count = new_relocs_count; | |
10432 | elf_section_data (sec)->relocs = new_relocs; | |
10433 | sec->reloc_count++; | |
10434 | relax_info->relocs_count = sec->reloc_count; | |
10435 | *internal_relocs_p = new_relocs; | |
10436 | } | |
10437 | else | |
10438 | { | |
10439 | if (insert_at != sec->reloc_count) | |
10440 | { | |
10441 | unsigned idx; | |
10442 | for (idx = sec->reloc_count; idx > insert_at; idx--) | |
10443 | (*internal_relocs_p)[idx] = (*internal_relocs_p)[idx-1]; | |
10444 | } | |
10445 | (*internal_relocs_p)[insert_at] = this_rela; | |
10446 | sec->reloc_count++; | |
10447 | if (relax_info->allocated_relocs) | |
10448 | relax_info->relocs_count = sec->reloc_count; | |
10449 | } | |
10450 | } | |
10451 | return TRUE; | |
10452 | } | |
10453 | ||
10454 | ||
e0001a05 NC |
10455 | /* This is similar to relax_section except that when a target is moved, |
10456 | we shift addresses up. We also need to modify the size. This | |
10457 | algorithm does NOT allow for relocations into the middle of the | |
10458 | property sections. */ | |
10459 | ||
43cd72b9 | 10460 | static bfd_boolean |
7fa3d080 BW |
10461 | relax_property_section (bfd *abfd, |
10462 | asection *sec, | |
10463 | struct bfd_link_info *link_info) | |
e0001a05 NC |
10464 | { |
10465 | Elf_Internal_Rela *internal_relocs; | |
10466 | bfd_byte *contents; | |
1d25768e | 10467 | unsigned i; |
e0001a05 | 10468 | bfd_boolean ok = TRUE; |
43cd72b9 BW |
10469 | bfd_boolean is_full_prop_section; |
10470 | size_t last_zfill_target_offset = 0; | |
10471 | asection *last_zfill_target_sec = NULL; | |
10472 | bfd_size_type sec_size; | |
1d25768e | 10473 | bfd_size_type entry_size; |
e0001a05 | 10474 | |
43cd72b9 | 10475 | sec_size = bfd_get_section_limit (abfd, sec); |
68ffbac6 | 10476 | internal_relocs = retrieve_internal_relocs (abfd, sec, |
e0001a05 NC |
10477 | link_info->keep_memory); |
10478 | contents = retrieve_contents (abfd, sec, link_info->keep_memory); | |
43cd72b9 | 10479 | if (contents == NULL && sec_size != 0) |
e0001a05 NC |
10480 | { |
10481 | ok = FALSE; | |
10482 | goto error_return; | |
10483 | } | |
10484 | ||
1d25768e BW |
10485 | is_full_prop_section = xtensa_is_proptable_section (sec); |
10486 | if (is_full_prop_section) | |
10487 | entry_size = 12; | |
10488 | else | |
10489 | entry_size = 8; | |
43cd72b9 BW |
10490 | |
10491 | if (internal_relocs) | |
e0001a05 | 10492 | { |
43cd72b9 | 10493 | for (i = 0; i < sec->reloc_count; i++) |
e0001a05 NC |
10494 | { |
10495 | Elf_Internal_Rela *irel; | |
10496 | xtensa_relax_info *target_relax_info; | |
e0001a05 NC |
10497 | unsigned r_type; |
10498 | asection *target_sec; | |
43cd72b9 BW |
10499 | literal_value val; |
10500 | bfd_byte *size_p, *flags_p; | |
e0001a05 NC |
10501 | |
10502 | /* Locally change the source address. | |
10503 | Translate the target to the new target address. | |
10504 | If it points to this section and has been removed, MOVE IT. | |
10505 | Also, don't forget to modify the associated SIZE at | |
10506 | (offset + 4). */ | |
10507 | ||
10508 | irel = &internal_relocs[i]; | |
10509 | r_type = ELF32_R_TYPE (irel->r_info); | |
10510 | if (r_type == R_XTENSA_NONE) | |
10511 | continue; | |
10512 | ||
43cd72b9 BW |
10513 | /* Find the literal value. */ |
10514 | r_reloc_init (&val.r_rel, abfd, irel, contents, sec_size); | |
10515 | size_p = &contents[irel->r_offset + 4]; | |
10516 | flags_p = NULL; | |
10517 | if (is_full_prop_section) | |
1d25768e BW |
10518 | flags_p = &contents[irel->r_offset + 8]; |
10519 | BFD_ASSERT (irel->r_offset + entry_size <= sec_size); | |
e0001a05 | 10520 | |
43cd72b9 | 10521 | target_sec = r_reloc_get_section (&val.r_rel); |
e0001a05 NC |
10522 | target_relax_info = get_xtensa_relax_info (target_sec); |
10523 | ||
10524 | if (target_relax_info | |
43cd72b9 BW |
10525 | && (target_relax_info->is_relaxable_literal_section |
10526 | || target_relax_info->is_relaxable_asm_section )) | |
e0001a05 NC |
10527 | { |
10528 | /* Translate the relocation's destination. */ | |
03669f1c BW |
10529 | bfd_vma old_offset = val.r_rel.target_offset; |
10530 | bfd_vma new_offset; | |
e0001a05 | 10531 | long old_size, new_size; |
071aa5c9 MF |
10532 | int removed_by_old_offset = |
10533 | removed_by_actions_map (&target_relax_info->action_list, | |
10534 | old_offset, FALSE); | |
10535 | new_offset = old_offset - removed_by_old_offset; | |
e0001a05 NC |
10536 | |
10537 | /* Assert that we are not out of bounds. */ | |
43cd72b9 | 10538 | old_size = bfd_get_32 (abfd, size_p); |
03669f1c | 10539 | new_size = old_size; |
43cd72b9 BW |
10540 | |
10541 | if (old_size == 0) | |
10542 | { | |
10543 | /* Only the first zero-sized unreachable entry is | |
10544 | allowed to expand. In this case the new offset | |
10545 | should be the offset before the fill and the new | |
10546 | size is the expansion size. For other zero-sized | |
10547 | entries the resulting size should be zero with an | |
10548 | offset before or after the fill address depending | |
10549 | on whether the expanding unreachable entry | |
10550 | preceeds it. */ | |
03669f1c BW |
10551 | if (last_zfill_target_sec == 0 |
10552 | || last_zfill_target_sec != target_sec | |
10553 | || last_zfill_target_offset != old_offset) | |
43cd72b9 | 10554 | { |
03669f1c BW |
10555 | bfd_vma new_end_offset = new_offset; |
10556 | ||
10557 | /* Recompute the new_offset, but this time don't | |
10558 | include any fill inserted by relaxation. */ | |
071aa5c9 MF |
10559 | removed_by_old_offset = |
10560 | removed_by_actions_map (&target_relax_info->action_list, | |
10561 | old_offset, TRUE); | |
10562 | new_offset = old_offset - removed_by_old_offset; | |
43cd72b9 BW |
10563 | |
10564 | /* If it is not unreachable and we have not yet | |
10565 | seen an unreachable at this address, place it | |
10566 | before the fill address. */ | |
03669f1c BW |
10567 | if (flags_p && (bfd_get_32 (abfd, flags_p) |
10568 | & XTENSA_PROP_UNREACHABLE) != 0) | |
43cd72b9 | 10569 | { |
03669f1c BW |
10570 | new_size = new_end_offset - new_offset; |
10571 | ||
43cd72b9 | 10572 | last_zfill_target_sec = target_sec; |
03669f1c | 10573 | last_zfill_target_offset = old_offset; |
43cd72b9 BW |
10574 | } |
10575 | } | |
10576 | } | |
10577 | else | |
071aa5c9 MF |
10578 | { |
10579 | int removed_by_old_offset_size = | |
10580 | removed_by_actions_map (&target_relax_info->action_list, | |
10581 | old_offset + old_size, TRUE); | |
10582 | new_size -= removed_by_old_offset_size - removed_by_old_offset; | |
10583 | } | |
43cd72b9 | 10584 | |
e0001a05 NC |
10585 | if (new_size != old_size) |
10586 | { | |
10587 | bfd_put_32 (abfd, new_size, size_p); | |
10588 | pin_contents (sec, contents); | |
10589 | } | |
43cd72b9 | 10590 | |
03669f1c | 10591 | if (new_offset != old_offset) |
e0001a05 | 10592 | { |
03669f1c | 10593 | bfd_vma diff = new_offset - old_offset; |
e0001a05 NC |
10594 | irel->r_addend += diff; |
10595 | pin_internal_relocs (sec, internal_relocs); | |
10596 | } | |
10597 | } | |
10598 | } | |
10599 | } | |
10600 | ||
10601 | /* Combine adjacent property table entries. This is also done in | |
10602 | finish_dynamic_sections() but at that point it's too late to | |
10603 | reclaim the space in the output section, so we do this twice. */ | |
10604 | ||
0e1862bb | 10605 | if (internal_relocs && (!bfd_link_relocatable (link_info) |
1d25768e | 10606 | || xtensa_is_littable_section (sec))) |
e0001a05 NC |
10607 | { |
10608 | Elf_Internal_Rela *last_irel = NULL; | |
1d25768e | 10609 | Elf_Internal_Rela *irel, *next_rel, *rel_end; |
e0001a05 | 10610 | int removed_bytes = 0; |
1d25768e | 10611 | bfd_vma offset; |
43cd72b9 BW |
10612 | flagword predef_flags; |
10613 | ||
43cd72b9 | 10614 | predef_flags = xtensa_get_property_predef_flags (sec); |
e0001a05 | 10615 | |
1d25768e | 10616 | /* Walk over memory and relocations at the same time. |
07d6d2b8 | 10617 | This REQUIRES that the internal_relocs be sorted by offset. */ |
e0001a05 NC |
10618 | qsort (internal_relocs, sec->reloc_count, sizeof (Elf_Internal_Rela), |
10619 | internal_reloc_compare); | |
e0001a05 NC |
10620 | |
10621 | pin_internal_relocs (sec, internal_relocs); | |
10622 | pin_contents (sec, contents); | |
10623 | ||
1d25768e BW |
10624 | next_rel = internal_relocs; |
10625 | rel_end = internal_relocs + sec->reloc_count; | |
10626 | ||
a3ef2d63 | 10627 | BFD_ASSERT (sec->size % entry_size == 0); |
e0001a05 | 10628 | |
a3ef2d63 | 10629 | for (offset = 0; offset < sec->size; offset += entry_size) |
e0001a05 | 10630 | { |
1d25768e | 10631 | Elf_Internal_Rela *offset_rel, *extra_rel; |
e0001a05 | 10632 | bfd_vma bytes_to_remove, size, actual_offset; |
1d25768e | 10633 | bfd_boolean remove_this_rel; |
43cd72b9 | 10634 | flagword flags; |
e0001a05 | 10635 | |
1d25768e BW |
10636 | /* Find the first relocation for the entry at the current offset. |
10637 | Adjust the offsets of any extra relocations for the previous | |
10638 | entry. */ | |
10639 | offset_rel = NULL; | |
10640 | if (next_rel) | |
10641 | { | |
10642 | for (irel = next_rel; irel < rel_end; irel++) | |
10643 | { | |
10644 | if ((irel->r_offset == offset | |
10645 | && ELF32_R_TYPE (irel->r_info) != R_XTENSA_NONE) | |
10646 | || irel->r_offset > offset) | |
10647 | { | |
10648 | offset_rel = irel; | |
10649 | break; | |
10650 | } | |
10651 | irel->r_offset -= removed_bytes; | |
1d25768e BW |
10652 | } |
10653 | } | |
e0001a05 | 10654 | |
1d25768e BW |
10655 | /* Find the next relocation (if there are any left). */ |
10656 | extra_rel = NULL; | |
10657 | if (offset_rel) | |
e0001a05 | 10658 | { |
1d25768e | 10659 | for (irel = offset_rel + 1; irel < rel_end; irel++) |
e0001a05 | 10660 | { |
1d25768e BW |
10661 | if (ELF32_R_TYPE (irel->r_info) != R_XTENSA_NONE) |
10662 | { | |
10663 | extra_rel = irel; | |
10664 | break; | |
10665 | } | |
e0001a05 | 10666 | } |
e0001a05 NC |
10667 | } |
10668 | ||
1d25768e BW |
10669 | /* Check if there are relocations on the current entry. There |
10670 | should usually be a relocation on the offset field. If there | |
10671 | are relocations on the size or flags, then we can't optimize | |
10672 | this entry. Also, find the next relocation to examine on the | |
10673 | next iteration. */ | |
10674 | if (offset_rel) | |
e0001a05 | 10675 | { |
1d25768e | 10676 | if (offset_rel->r_offset >= offset + entry_size) |
e0001a05 | 10677 | { |
1d25768e BW |
10678 | next_rel = offset_rel; |
10679 | /* There are no relocations on the current entry, but we | |
10680 | might still be able to remove it if the size is zero. */ | |
10681 | offset_rel = NULL; | |
10682 | } | |
10683 | else if (offset_rel->r_offset > offset | |
10684 | || (extra_rel | |
10685 | && extra_rel->r_offset < offset + entry_size)) | |
10686 | { | |
10687 | /* There is a relocation on the size or flags, so we can't | |
10688 | do anything with this entry. Continue with the next. */ | |
10689 | next_rel = offset_rel; | |
10690 | continue; | |
10691 | } | |
10692 | else | |
10693 | { | |
10694 | BFD_ASSERT (offset_rel->r_offset == offset); | |
10695 | offset_rel->r_offset -= removed_bytes; | |
10696 | next_rel = offset_rel + 1; | |
e0001a05 | 10697 | } |
e0001a05 | 10698 | } |
1d25768e BW |
10699 | else |
10700 | next_rel = NULL; | |
e0001a05 | 10701 | |
1d25768e | 10702 | remove_this_rel = FALSE; |
e0001a05 NC |
10703 | bytes_to_remove = 0; |
10704 | actual_offset = offset - removed_bytes; | |
10705 | size = bfd_get_32 (abfd, &contents[actual_offset + 4]); | |
10706 | ||
68ffbac6 | 10707 | if (is_full_prop_section) |
43cd72b9 BW |
10708 | flags = bfd_get_32 (abfd, &contents[actual_offset + 8]); |
10709 | else | |
10710 | flags = predef_flags; | |
10711 | ||
1d25768e BW |
10712 | if (size == 0 |
10713 | && (flags & XTENSA_PROP_ALIGN) == 0 | |
10714 | && (flags & XTENSA_PROP_UNREACHABLE) == 0) | |
e0001a05 | 10715 | { |
43cd72b9 BW |
10716 | /* Always remove entries with zero size and no alignment. */ |
10717 | bytes_to_remove = entry_size; | |
1d25768e BW |
10718 | if (offset_rel) |
10719 | remove_this_rel = TRUE; | |
e0001a05 | 10720 | } |
1d25768e BW |
10721 | else if (offset_rel |
10722 | && ELF32_R_TYPE (offset_rel->r_info) == R_XTENSA_32) | |
e0001a05 | 10723 | { |
1d25768e | 10724 | if (last_irel) |
e0001a05 | 10725 | { |
1d25768e BW |
10726 | flagword old_flags; |
10727 | bfd_vma old_size = | |
10728 | bfd_get_32 (abfd, &contents[last_irel->r_offset + 4]); | |
10729 | bfd_vma old_address = | |
10730 | (last_irel->r_addend | |
10731 | + bfd_get_32 (abfd, &contents[last_irel->r_offset])); | |
10732 | bfd_vma new_address = | |
10733 | (offset_rel->r_addend | |
10734 | + bfd_get_32 (abfd, &contents[actual_offset])); | |
68ffbac6 | 10735 | if (is_full_prop_section) |
1d25768e BW |
10736 | old_flags = bfd_get_32 |
10737 | (abfd, &contents[last_irel->r_offset + 8]); | |
10738 | else | |
10739 | old_flags = predef_flags; | |
10740 | ||
10741 | if ((ELF32_R_SYM (offset_rel->r_info) | |
10742 | == ELF32_R_SYM (last_irel->r_info)) | |
10743 | && old_address + old_size == new_address | |
10744 | && old_flags == flags | |
10745 | && (old_flags & XTENSA_PROP_INSN_BRANCH_TARGET) == 0 | |
10746 | && (old_flags & XTENSA_PROP_INSN_LOOP_TARGET) == 0) | |
e0001a05 | 10747 | { |
1d25768e BW |
10748 | /* Fix the old size. */ |
10749 | bfd_put_32 (abfd, old_size + size, | |
10750 | &contents[last_irel->r_offset + 4]); | |
10751 | bytes_to_remove = entry_size; | |
10752 | remove_this_rel = TRUE; | |
e0001a05 NC |
10753 | } |
10754 | else | |
1d25768e | 10755 | last_irel = offset_rel; |
e0001a05 | 10756 | } |
1d25768e BW |
10757 | else |
10758 | last_irel = offset_rel; | |
e0001a05 NC |
10759 | } |
10760 | ||
1d25768e | 10761 | if (remove_this_rel) |
e0001a05 | 10762 | { |
1d25768e | 10763 | offset_rel->r_info = ELF32_R_INFO (0, R_XTENSA_NONE); |
3df502ae | 10764 | offset_rel->r_offset = 0; |
e0001a05 NC |
10765 | } |
10766 | ||
10767 | if (bytes_to_remove != 0) | |
10768 | { | |
10769 | removed_bytes += bytes_to_remove; | |
a3ef2d63 | 10770 | if (offset + bytes_to_remove < sec->size) |
e0001a05 | 10771 | memmove (&contents[actual_offset], |
43cd72b9 | 10772 | &contents[actual_offset + bytes_to_remove], |
a3ef2d63 | 10773 | sec->size - offset - bytes_to_remove); |
e0001a05 NC |
10774 | } |
10775 | } | |
10776 | ||
43cd72b9 | 10777 | if (removed_bytes) |
e0001a05 | 10778 | { |
1d25768e BW |
10779 | /* Fix up any extra relocations on the last entry. */ |
10780 | for (irel = next_rel; irel < rel_end; irel++) | |
10781 | irel->r_offset -= removed_bytes; | |
10782 | ||
e0001a05 | 10783 | /* Clear the removed bytes. */ |
a3ef2d63 | 10784 | memset (&contents[sec->size - removed_bytes], 0, removed_bytes); |
e0001a05 | 10785 | |
a3ef2d63 BW |
10786 | if (sec->rawsize == 0) |
10787 | sec->rawsize = sec->size; | |
10788 | sec->size -= removed_bytes; | |
e901de89 BW |
10789 | |
10790 | if (xtensa_is_littable_section (sec)) | |
10791 | { | |
f0e6fdb2 BW |
10792 | asection *sgotloc = elf_xtensa_hash_table (link_info)->sgotloc; |
10793 | if (sgotloc) | |
10794 | sgotloc->size -= removed_bytes; | |
e901de89 | 10795 | } |
e0001a05 NC |
10796 | } |
10797 | } | |
e901de89 | 10798 | |
e0001a05 NC |
10799 | error_return: |
10800 | release_internal_relocs (sec, internal_relocs); | |
10801 | release_contents (sec, contents); | |
10802 | return ok; | |
10803 | } | |
10804 | ||
10805 | \f | |
10806 | /* Third relaxation pass. */ | |
10807 | ||
10808 | /* Change symbol values to account for removed literals. */ | |
10809 | ||
43cd72b9 | 10810 | bfd_boolean |
7fa3d080 | 10811 | relax_section_symbols (bfd *abfd, asection *sec) |
e0001a05 NC |
10812 | { |
10813 | xtensa_relax_info *relax_info; | |
10814 | unsigned int sec_shndx; | |
10815 | Elf_Internal_Shdr *symtab_hdr; | |
10816 | Elf_Internal_Sym *isymbuf; | |
10817 | unsigned i, num_syms, num_locals; | |
10818 | ||
10819 | relax_info = get_xtensa_relax_info (sec); | |
10820 | BFD_ASSERT (relax_info); | |
10821 | ||
43cd72b9 BW |
10822 | if (!relax_info->is_relaxable_literal_section |
10823 | && !relax_info->is_relaxable_asm_section) | |
e0001a05 NC |
10824 | return TRUE; |
10825 | ||
10826 | sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); | |
10827 | ||
10828 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; | |
10829 | isymbuf = retrieve_local_syms (abfd); | |
10830 | ||
10831 | num_syms = symtab_hdr->sh_size / sizeof (Elf32_External_Sym); | |
10832 | num_locals = symtab_hdr->sh_info; | |
10833 | ||
10834 | /* Adjust the local symbols defined in this section. */ | |
10835 | for (i = 0; i < num_locals; i++) | |
10836 | { | |
10837 | Elf_Internal_Sym *isym = &isymbuf[i]; | |
10838 | ||
10839 | if (isym->st_shndx == sec_shndx) | |
10840 | { | |
03669f1c | 10841 | bfd_vma orig_addr = isym->st_value; |
071aa5c9 MF |
10842 | int removed = removed_by_actions_map (&relax_info->action_list, |
10843 | orig_addr, FALSE); | |
43cd72b9 | 10844 | |
071aa5c9 | 10845 | isym->st_value -= removed; |
03669f1c BW |
10846 | if (ELF32_ST_TYPE (isym->st_info) == STT_FUNC) |
10847 | isym->st_size -= | |
071aa5c9 MF |
10848 | removed_by_actions_map (&relax_info->action_list, |
10849 | orig_addr + isym->st_size, FALSE) - | |
10850 | removed; | |
e0001a05 NC |
10851 | } |
10852 | } | |
10853 | ||
10854 | /* Now adjust the global symbols defined in this section. */ | |
10855 | for (i = 0; i < (num_syms - num_locals); i++) | |
10856 | { | |
10857 | struct elf_link_hash_entry *sym_hash; | |
10858 | ||
10859 | sym_hash = elf_sym_hashes (abfd)[i]; | |
10860 | ||
10861 | if (sym_hash->root.type == bfd_link_hash_warning) | |
10862 | sym_hash = (struct elf_link_hash_entry *) sym_hash->root.u.i.link; | |
10863 | ||
10864 | if ((sym_hash->root.type == bfd_link_hash_defined | |
10865 | || sym_hash->root.type == bfd_link_hash_defweak) | |
10866 | && sym_hash->root.u.def.section == sec) | |
10867 | { | |
03669f1c | 10868 | bfd_vma orig_addr = sym_hash->root.u.def.value; |
071aa5c9 MF |
10869 | int removed = removed_by_actions_map (&relax_info->action_list, |
10870 | orig_addr, FALSE); | |
43cd72b9 | 10871 | |
071aa5c9 | 10872 | sym_hash->root.u.def.value -= removed; |
43cd72b9 | 10873 | |
03669f1c BW |
10874 | if (sym_hash->type == STT_FUNC) |
10875 | sym_hash->size -= | |
071aa5c9 MF |
10876 | removed_by_actions_map (&relax_info->action_list, |
10877 | orig_addr + sym_hash->size, FALSE) - | |
10878 | removed; | |
e0001a05 NC |
10879 | } |
10880 | } | |
10881 | ||
10882 | return TRUE; | |
10883 | } | |
10884 | ||
10885 | \f | |
10886 | /* "Fix" handling functions, called while performing relocations. */ | |
10887 | ||
43cd72b9 | 10888 | static bfd_boolean |
7fa3d080 BW |
10889 | do_fix_for_relocatable_link (Elf_Internal_Rela *rel, |
10890 | bfd *input_bfd, | |
10891 | asection *input_section, | |
10892 | bfd_byte *contents) | |
e0001a05 NC |
10893 | { |
10894 | r_reloc r_rel; | |
10895 | asection *sec, *old_sec; | |
10896 | bfd_vma old_offset; | |
10897 | int r_type = ELF32_R_TYPE (rel->r_info); | |
e0001a05 NC |
10898 | reloc_bfd_fix *fix; |
10899 | ||
10900 | if (r_type == R_XTENSA_NONE) | |
43cd72b9 | 10901 | return TRUE; |
e0001a05 | 10902 | |
43cd72b9 BW |
10903 | fix = get_bfd_fix (input_section, rel->r_offset, r_type); |
10904 | if (!fix) | |
10905 | return TRUE; | |
e0001a05 | 10906 | |
43cd72b9 BW |
10907 | r_reloc_init (&r_rel, input_bfd, rel, contents, |
10908 | bfd_get_section_limit (input_bfd, input_section)); | |
e0001a05 | 10909 | old_sec = r_reloc_get_section (&r_rel); |
43cd72b9 BW |
10910 | old_offset = r_rel.target_offset; |
10911 | ||
10912 | if (!old_sec || !r_reloc_is_defined (&r_rel)) | |
e0001a05 | 10913 | { |
43cd72b9 BW |
10914 | if (r_type != R_XTENSA_ASM_EXPAND) |
10915 | { | |
4eca0228 | 10916 | _bfd_error_handler |
695344c0 | 10917 | /* xgettext:c-format */ |
2dcf00ce AM |
10918 | (_("%pB(%pA+%#" PRIx64 "): unexpected fix for %s relocation"), |
10919 | input_bfd, input_section, (uint64_t) rel->r_offset, | |
43cd72b9 BW |
10920 | elf_howto_table[r_type].name); |
10921 | return FALSE; | |
10922 | } | |
e0001a05 NC |
10923 | /* Leave it be. Resolution will happen in a later stage. */ |
10924 | } | |
10925 | else | |
10926 | { | |
10927 | sec = fix->target_sec; | |
10928 | rel->r_addend += ((sec->output_offset + fix->target_offset) | |
10929 | - (old_sec->output_offset + old_offset)); | |
10930 | } | |
43cd72b9 | 10931 | return TRUE; |
e0001a05 NC |
10932 | } |
10933 | ||
10934 | ||
10935 | static void | |
7fa3d080 BW |
10936 | do_fix_for_final_link (Elf_Internal_Rela *rel, |
10937 | bfd *input_bfd, | |
10938 | asection *input_section, | |
10939 | bfd_byte *contents, | |
10940 | bfd_vma *relocationp) | |
e0001a05 NC |
10941 | { |
10942 | asection *sec; | |
10943 | int r_type = ELF32_R_TYPE (rel->r_info); | |
e0001a05 | 10944 | reloc_bfd_fix *fix; |
43cd72b9 | 10945 | bfd_vma fixup_diff; |
e0001a05 NC |
10946 | |
10947 | if (r_type == R_XTENSA_NONE) | |
10948 | return; | |
10949 | ||
43cd72b9 BW |
10950 | fix = get_bfd_fix (input_section, rel->r_offset, r_type); |
10951 | if (!fix) | |
e0001a05 NC |
10952 | return; |
10953 | ||
10954 | sec = fix->target_sec; | |
43cd72b9 BW |
10955 | |
10956 | fixup_diff = rel->r_addend; | |
10957 | if (elf_howto_table[fix->src_type].partial_inplace) | |
10958 | { | |
10959 | bfd_vma inplace_val; | |
10960 | BFD_ASSERT (fix->src_offset | |
10961 | < bfd_get_section_limit (input_bfd, input_section)); | |
10962 | inplace_val = bfd_get_32 (input_bfd, &contents[fix->src_offset]); | |
10963 | fixup_diff += inplace_val; | |
10964 | } | |
10965 | ||
e0001a05 NC |
10966 | *relocationp = (sec->output_section->vma |
10967 | + sec->output_offset | |
43cd72b9 | 10968 | + fix->target_offset - fixup_diff); |
e0001a05 NC |
10969 | } |
10970 | ||
10971 | \f | |
10972 | /* Miscellaneous utility functions.... */ | |
10973 | ||
10974 | static asection * | |
f0e6fdb2 | 10975 | elf_xtensa_get_plt_section (struct bfd_link_info *info, int chunk) |
e0001a05 | 10976 | { |
f0e6fdb2 | 10977 | bfd *dynobj; |
0bae9e9e | 10978 | char plt_name[17]; |
e0001a05 NC |
10979 | |
10980 | if (chunk == 0) | |
ce558b89 | 10981 | return elf_hash_table (info)->splt; |
e0001a05 | 10982 | |
f0e6fdb2 | 10983 | dynobj = elf_hash_table (info)->dynobj; |
e0001a05 | 10984 | sprintf (plt_name, ".plt.%u", chunk); |
3d4d4302 | 10985 | return bfd_get_linker_section (dynobj, plt_name); |
e0001a05 NC |
10986 | } |
10987 | ||
10988 | ||
10989 | static asection * | |
f0e6fdb2 | 10990 | elf_xtensa_get_gotplt_section (struct bfd_link_info *info, int chunk) |
e0001a05 | 10991 | { |
f0e6fdb2 | 10992 | bfd *dynobj; |
0bae9e9e | 10993 | char got_name[21]; |
e0001a05 NC |
10994 | |
10995 | if (chunk == 0) | |
ce558b89 | 10996 | return elf_hash_table (info)->sgotplt; |
e0001a05 | 10997 | |
f0e6fdb2 | 10998 | dynobj = elf_hash_table (info)->dynobj; |
e0001a05 | 10999 | sprintf (got_name, ".got.plt.%u", chunk); |
3d4d4302 | 11000 | return bfd_get_linker_section (dynobj, got_name); |
e0001a05 NC |
11001 | } |
11002 | ||
11003 | ||
11004 | /* Get the input section for a given symbol index. | |
11005 | If the symbol is: | |
11006 | . a section symbol, return the section; | |
11007 | . a common symbol, return the common section; | |
11008 | . an undefined symbol, return the undefined section; | |
11009 | . an indirect symbol, follow the links; | |
11010 | . an absolute value, return the absolute section. */ | |
11011 | ||
11012 | static asection * | |
7fa3d080 | 11013 | get_elf_r_symndx_section (bfd *abfd, unsigned long r_symndx) |
e0001a05 NC |
11014 | { |
11015 | Elf_Internal_Shdr *symtab_hdr = &elf_tdata (abfd)->symtab_hdr; | |
11016 | asection *target_sec = NULL; | |
43cd72b9 | 11017 | if (r_symndx < symtab_hdr->sh_info) |
e0001a05 NC |
11018 | { |
11019 | Elf_Internal_Sym *isymbuf; | |
11020 | unsigned int section_index; | |
11021 | ||
11022 | isymbuf = retrieve_local_syms (abfd); | |
11023 | section_index = isymbuf[r_symndx].st_shndx; | |
11024 | ||
11025 | if (section_index == SHN_UNDEF) | |
11026 | target_sec = bfd_und_section_ptr; | |
e0001a05 NC |
11027 | else if (section_index == SHN_ABS) |
11028 | target_sec = bfd_abs_section_ptr; | |
11029 | else if (section_index == SHN_COMMON) | |
11030 | target_sec = bfd_com_section_ptr; | |
43cd72b9 | 11031 | else |
cb33740c | 11032 | target_sec = bfd_section_from_elf_index (abfd, section_index); |
e0001a05 NC |
11033 | } |
11034 | else | |
11035 | { | |
11036 | unsigned long indx = r_symndx - symtab_hdr->sh_info; | |
11037 | struct elf_link_hash_entry *h = elf_sym_hashes (abfd)[indx]; | |
11038 | ||
11039 | while (h->root.type == bfd_link_hash_indirect | |
07d6d2b8 AM |
11040 | || h->root.type == bfd_link_hash_warning) |
11041 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
e0001a05 NC |
11042 | |
11043 | switch (h->root.type) | |
11044 | { | |
11045 | case bfd_link_hash_defined: | |
11046 | case bfd_link_hash_defweak: | |
11047 | target_sec = h->root.u.def.section; | |
11048 | break; | |
11049 | case bfd_link_hash_common: | |
11050 | target_sec = bfd_com_section_ptr; | |
11051 | break; | |
11052 | case bfd_link_hash_undefined: | |
11053 | case bfd_link_hash_undefweak: | |
11054 | target_sec = bfd_und_section_ptr; | |
11055 | break; | |
11056 | default: /* New indirect warning. */ | |
11057 | target_sec = bfd_und_section_ptr; | |
11058 | break; | |
11059 | } | |
11060 | } | |
11061 | return target_sec; | |
11062 | } | |
11063 | ||
11064 | ||
11065 | static struct elf_link_hash_entry * | |
7fa3d080 | 11066 | get_elf_r_symndx_hash_entry (bfd *abfd, unsigned long r_symndx) |
e0001a05 NC |
11067 | { |
11068 | unsigned long indx; | |
11069 | struct elf_link_hash_entry *h; | |
11070 | Elf_Internal_Shdr *symtab_hdr = &elf_tdata (abfd)->symtab_hdr; | |
11071 | ||
11072 | if (r_symndx < symtab_hdr->sh_info) | |
11073 | return NULL; | |
43cd72b9 | 11074 | |
e0001a05 NC |
11075 | indx = r_symndx - symtab_hdr->sh_info; |
11076 | h = elf_sym_hashes (abfd)[indx]; | |
11077 | while (h->root.type == bfd_link_hash_indirect | |
11078 | || h->root.type == bfd_link_hash_warning) | |
11079 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
11080 | return h; | |
11081 | } | |
11082 | ||
11083 | ||
11084 | /* Get the section-relative offset for a symbol number. */ | |
11085 | ||
11086 | static bfd_vma | |
7fa3d080 | 11087 | get_elf_r_symndx_offset (bfd *abfd, unsigned long r_symndx) |
e0001a05 NC |
11088 | { |
11089 | Elf_Internal_Shdr *symtab_hdr = &elf_tdata (abfd)->symtab_hdr; | |
11090 | bfd_vma offset = 0; | |
11091 | ||
43cd72b9 | 11092 | if (r_symndx < symtab_hdr->sh_info) |
e0001a05 NC |
11093 | { |
11094 | Elf_Internal_Sym *isymbuf; | |
11095 | isymbuf = retrieve_local_syms (abfd); | |
11096 | offset = isymbuf[r_symndx].st_value; | |
11097 | } | |
11098 | else | |
11099 | { | |
11100 | unsigned long indx = r_symndx - symtab_hdr->sh_info; | |
11101 | struct elf_link_hash_entry *h = | |
11102 | elf_sym_hashes (abfd)[indx]; | |
11103 | ||
11104 | while (h->root.type == bfd_link_hash_indirect | |
07d6d2b8 | 11105 | || h->root.type == bfd_link_hash_warning) |
e0001a05 NC |
11106 | h = (struct elf_link_hash_entry *) h->root.u.i.link; |
11107 | if (h->root.type == bfd_link_hash_defined | |
07d6d2b8 | 11108 | || h->root.type == bfd_link_hash_defweak) |
e0001a05 NC |
11109 | offset = h->root.u.def.value; |
11110 | } | |
11111 | return offset; | |
11112 | } | |
11113 | ||
11114 | ||
11115 | static bfd_boolean | |
7fa3d080 | 11116 | is_reloc_sym_weak (bfd *abfd, Elf_Internal_Rela *rel) |
43cd72b9 BW |
11117 | { |
11118 | unsigned long r_symndx = ELF32_R_SYM (rel->r_info); | |
11119 | struct elf_link_hash_entry *h; | |
11120 | ||
11121 | h = get_elf_r_symndx_hash_entry (abfd, r_symndx); | |
11122 | if (h && h->root.type == bfd_link_hash_defweak) | |
11123 | return TRUE; | |
11124 | return FALSE; | |
11125 | } | |
11126 | ||
11127 | ||
11128 | static bfd_boolean | |
7fa3d080 BW |
11129 | pcrel_reloc_fits (xtensa_opcode opc, |
11130 | int opnd, | |
11131 | bfd_vma self_address, | |
11132 | bfd_vma dest_address) | |
e0001a05 | 11133 | { |
43cd72b9 BW |
11134 | xtensa_isa isa = xtensa_default_isa; |
11135 | uint32 valp = dest_address; | |
11136 | if (xtensa_operand_do_reloc (isa, opc, opnd, &valp, self_address) | |
11137 | || xtensa_operand_encode (isa, opc, opnd, &valp)) | |
11138 | return FALSE; | |
11139 | return TRUE; | |
e0001a05 NC |
11140 | } |
11141 | ||
11142 | ||
68ffbac6 | 11143 | static bfd_boolean |
7fa3d080 | 11144 | xtensa_is_property_section (asection *sec) |
e0001a05 | 11145 | { |
1d25768e BW |
11146 | if (xtensa_is_insntable_section (sec) |
11147 | || xtensa_is_littable_section (sec) | |
11148 | || xtensa_is_proptable_section (sec)) | |
b614a702 | 11149 | return TRUE; |
e901de89 | 11150 | |
1d25768e BW |
11151 | return FALSE; |
11152 | } | |
11153 | ||
11154 | ||
68ffbac6 | 11155 | static bfd_boolean |
1d25768e BW |
11156 | xtensa_is_insntable_section (asection *sec) |
11157 | { | |
11158 | if (CONST_STRNEQ (sec->name, XTENSA_INSN_SEC_NAME) | |
11159 | || CONST_STRNEQ (sec->name, ".gnu.linkonce.x.")) | |
e901de89 BW |
11160 | return TRUE; |
11161 | ||
e901de89 BW |
11162 | return FALSE; |
11163 | } | |
11164 | ||
11165 | ||
68ffbac6 | 11166 | static bfd_boolean |
7fa3d080 | 11167 | xtensa_is_littable_section (asection *sec) |
e901de89 | 11168 | { |
1d25768e BW |
11169 | if (CONST_STRNEQ (sec->name, XTENSA_LIT_SEC_NAME) |
11170 | || CONST_STRNEQ (sec->name, ".gnu.linkonce.p.")) | |
b614a702 | 11171 | return TRUE; |
e901de89 | 11172 | |
1d25768e BW |
11173 | return FALSE; |
11174 | } | |
11175 | ||
11176 | ||
68ffbac6 | 11177 | static bfd_boolean |
1d25768e BW |
11178 | xtensa_is_proptable_section (asection *sec) |
11179 | { | |
11180 | if (CONST_STRNEQ (sec->name, XTENSA_PROP_SEC_NAME) | |
11181 | || CONST_STRNEQ (sec->name, ".gnu.linkonce.prop.")) | |
e901de89 | 11182 | return TRUE; |
e0001a05 | 11183 | |
e901de89 | 11184 | return FALSE; |
e0001a05 NC |
11185 | } |
11186 | ||
11187 | ||
43cd72b9 | 11188 | static int |
7fa3d080 | 11189 | internal_reloc_compare (const void *ap, const void *bp) |
e0001a05 | 11190 | { |
43cd72b9 BW |
11191 | const Elf_Internal_Rela *a = (const Elf_Internal_Rela *) ap; |
11192 | const Elf_Internal_Rela *b = (const Elf_Internal_Rela *) bp; | |
11193 | ||
11194 | if (a->r_offset != b->r_offset) | |
11195 | return (a->r_offset - b->r_offset); | |
11196 | ||
11197 | /* We don't need to sort on these criteria for correctness, | |
11198 | but enforcing a more strict ordering prevents unstable qsort | |
11199 | from behaving differently with different implementations. | |
11200 | Without the code below we get correct but different results | |
11201 | on Solaris 2.7 and 2.8. We would like to always produce the | |
11202 | same results no matter the host. */ | |
11203 | ||
11204 | if (a->r_info != b->r_info) | |
11205 | return (a->r_info - b->r_info); | |
11206 | ||
11207 | return (a->r_addend - b->r_addend); | |
e0001a05 NC |
11208 | } |
11209 | ||
11210 | ||
11211 | static int | |
7fa3d080 | 11212 | internal_reloc_matches (const void *ap, const void *bp) |
e0001a05 NC |
11213 | { |
11214 | const Elf_Internal_Rela *a = (const Elf_Internal_Rela *) ap; | |
11215 | const Elf_Internal_Rela *b = (const Elf_Internal_Rela *) bp; | |
11216 | ||
43cd72b9 BW |
11217 | /* Check if one entry overlaps with the other; this shouldn't happen |
11218 | except when searching for a match. */ | |
e0001a05 NC |
11219 | return (a->r_offset - b->r_offset); |
11220 | } | |
11221 | ||
11222 | ||
74869ac7 BW |
11223 | /* Predicate function used to look up a section in a particular group. */ |
11224 | ||
11225 | static bfd_boolean | |
11226 | match_section_group (bfd *abfd ATTRIBUTE_UNUSED, asection *sec, void *inf) | |
11227 | { | |
11228 | const char *gname = inf; | |
11229 | const char *group_name = elf_group_name (sec); | |
68ffbac6 | 11230 | |
74869ac7 BW |
11231 | return (group_name == gname |
11232 | || (group_name != NULL | |
11233 | && gname != NULL | |
11234 | && strcmp (group_name, gname) == 0)); | |
11235 | } | |
11236 | ||
11237 | ||
8255c61b MF |
11238 | static char * |
11239 | xtensa_add_names (const char *base, const char *suffix) | |
11240 | { | |
11241 | if (suffix) | |
11242 | { | |
11243 | size_t base_len = strlen (base); | |
11244 | size_t suffix_len = strlen (suffix); | |
11245 | char *str = bfd_malloc (base_len + suffix_len + 1); | |
11246 | ||
11247 | memcpy (str, base, base_len); | |
11248 | memcpy (str + base_len, suffix, suffix_len + 1); | |
11249 | return str; | |
11250 | } | |
11251 | else | |
11252 | { | |
11253 | return strdup (base); | |
11254 | } | |
11255 | } | |
11256 | ||
1d25768e BW |
11257 | static int linkonce_len = sizeof (".gnu.linkonce.") - 1; |
11258 | ||
51c8ebc1 | 11259 | static char * |
8255c61b MF |
11260 | xtensa_property_section_name (asection *sec, const char *base_name, |
11261 | bfd_boolean separate_sections) | |
e0001a05 | 11262 | { |
74869ac7 BW |
11263 | const char *suffix, *group_name; |
11264 | char *prop_sec_name; | |
74869ac7 BW |
11265 | |
11266 | group_name = elf_group_name (sec); | |
11267 | if (group_name) | |
11268 | { | |
11269 | suffix = strrchr (sec->name, '.'); | |
11270 | if (suffix == sec->name) | |
11271 | suffix = 0; | |
8255c61b | 11272 | prop_sec_name = xtensa_add_names (base_name, suffix); |
74869ac7 BW |
11273 | } |
11274 | else if (strncmp (sec->name, ".gnu.linkonce.", linkonce_len) == 0) | |
e0001a05 | 11275 | { |
43cd72b9 | 11276 | char *linkonce_kind = 0; |
b614a702 | 11277 | |
68ffbac6 | 11278 | if (strcmp (base_name, XTENSA_INSN_SEC_NAME) == 0) |
7db48a12 | 11279 | linkonce_kind = "x."; |
68ffbac6 | 11280 | else if (strcmp (base_name, XTENSA_LIT_SEC_NAME) == 0) |
7db48a12 | 11281 | linkonce_kind = "p."; |
43cd72b9 BW |
11282 | else if (strcmp (base_name, XTENSA_PROP_SEC_NAME) == 0) |
11283 | linkonce_kind = "prop."; | |
e0001a05 | 11284 | else |
b614a702 BW |
11285 | abort (); |
11286 | ||
43cd72b9 BW |
11287 | prop_sec_name = (char *) bfd_malloc (strlen (sec->name) |
11288 | + strlen (linkonce_kind) + 1); | |
b614a702 | 11289 | memcpy (prop_sec_name, ".gnu.linkonce.", linkonce_len); |
43cd72b9 | 11290 | strcpy (prop_sec_name + linkonce_len, linkonce_kind); |
b614a702 BW |
11291 | |
11292 | suffix = sec->name + linkonce_len; | |
096c35a7 | 11293 | /* For backward compatibility, replace "t." instead of inserting |
07d6d2b8 | 11294 | the new linkonce_kind (but not for "prop" sections). */ |
0112cd26 | 11295 | if (CONST_STRNEQ (suffix, "t.") && linkonce_kind[1] == '.') |
07d6d2b8 | 11296 | suffix += 2; |
43cd72b9 | 11297 | strcat (prop_sec_name + linkonce_len, suffix); |
74869ac7 BW |
11298 | } |
11299 | else | |
8255c61b MF |
11300 | { |
11301 | prop_sec_name = xtensa_add_names (base_name, | |
11302 | separate_sections ? sec->name : NULL); | |
11303 | } | |
74869ac7 | 11304 | |
51c8ebc1 BW |
11305 | return prop_sec_name; |
11306 | } | |
11307 | ||
11308 | ||
11309 | static asection * | |
8255c61b MF |
11310 | xtensa_get_separate_property_section (asection *sec, const char *base_name, |
11311 | bfd_boolean separate_section) | |
51c8ebc1 BW |
11312 | { |
11313 | char *prop_sec_name; | |
11314 | asection *prop_sec; | |
11315 | ||
8255c61b MF |
11316 | prop_sec_name = xtensa_property_section_name (sec, base_name, |
11317 | separate_section); | |
51c8ebc1 BW |
11318 | prop_sec = bfd_get_section_by_name_if (sec->owner, prop_sec_name, |
11319 | match_section_group, | |
11320 | (void *) elf_group_name (sec)); | |
11321 | free (prop_sec_name); | |
11322 | return prop_sec; | |
11323 | } | |
11324 | ||
8255c61b MF |
11325 | static asection * |
11326 | xtensa_get_property_section (asection *sec, const char *base_name) | |
11327 | { | |
11328 | asection *prop_sec; | |
11329 | ||
11330 | /* Try individual property section first. */ | |
11331 | prop_sec = xtensa_get_separate_property_section (sec, base_name, TRUE); | |
11332 | ||
11333 | /* Refer to a common property section if individual is not present. */ | |
11334 | if (!prop_sec) | |
11335 | prop_sec = xtensa_get_separate_property_section (sec, base_name, FALSE); | |
11336 | ||
11337 | return prop_sec; | |
11338 | } | |
11339 | ||
51c8ebc1 BW |
11340 | |
11341 | asection * | |
11342 | xtensa_make_property_section (asection *sec, const char *base_name) | |
11343 | { | |
11344 | char *prop_sec_name; | |
11345 | asection *prop_sec; | |
11346 | ||
74869ac7 | 11347 | /* Check if the section already exists. */ |
8255c61b MF |
11348 | prop_sec_name = xtensa_property_section_name (sec, base_name, |
11349 | elf32xtensa_separate_props); | |
74869ac7 BW |
11350 | prop_sec = bfd_get_section_by_name_if (sec->owner, prop_sec_name, |
11351 | match_section_group, | |
51c8ebc1 | 11352 | (void *) elf_group_name (sec)); |
74869ac7 BW |
11353 | /* If not, create it. */ |
11354 | if (! prop_sec) | |
11355 | { | |
11356 | flagword flags = (SEC_RELOC | SEC_HAS_CONTENTS | SEC_READONLY); | |
fd361982 | 11357 | flags |= (bfd_section_flags (sec) |
74869ac7 BW |
11358 | & (SEC_LINK_ONCE | SEC_LINK_DUPLICATES)); |
11359 | ||
11360 | prop_sec = bfd_make_section_anyway_with_flags | |
11361 | (sec->owner, strdup (prop_sec_name), flags); | |
11362 | if (! prop_sec) | |
11363 | return 0; | |
b614a702 | 11364 | |
51c8ebc1 | 11365 | elf_group_name (prop_sec) = elf_group_name (sec); |
e0001a05 NC |
11366 | } |
11367 | ||
74869ac7 BW |
11368 | free (prop_sec_name); |
11369 | return prop_sec; | |
e0001a05 NC |
11370 | } |
11371 | ||
43cd72b9 BW |
11372 | |
11373 | flagword | |
7fa3d080 | 11374 | xtensa_get_property_predef_flags (asection *sec) |
43cd72b9 | 11375 | { |
1d25768e | 11376 | if (xtensa_is_insntable_section (sec)) |
43cd72b9 | 11377 | return (XTENSA_PROP_INSN |
99ded152 | 11378 | | XTENSA_PROP_NO_TRANSFORM |
43cd72b9 BW |
11379 | | XTENSA_PROP_INSN_NO_REORDER); |
11380 | ||
11381 | if (xtensa_is_littable_section (sec)) | |
11382 | return (XTENSA_PROP_LITERAL | |
99ded152 | 11383 | | XTENSA_PROP_NO_TRANSFORM |
43cd72b9 BW |
11384 | | XTENSA_PROP_INSN_NO_REORDER); |
11385 | ||
11386 | return 0; | |
11387 | } | |
11388 | ||
e0001a05 NC |
11389 | \f |
11390 | /* Other functions called directly by the linker. */ | |
11391 | ||
11392 | bfd_boolean | |
7fa3d080 BW |
11393 | xtensa_callback_required_dependence (bfd *abfd, |
11394 | asection *sec, | |
11395 | struct bfd_link_info *link_info, | |
11396 | deps_callback_t callback, | |
11397 | void *closure) | |
e0001a05 NC |
11398 | { |
11399 | Elf_Internal_Rela *internal_relocs; | |
11400 | bfd_byte *contents; | |
11401 | unsigned i; | |
11402 | bfd_boolean ok = TRUE; | |
43cd72b9 BW |
11403 | bfd_size_type sec_size; |
11404 | ||
11405 | sec_size = bfd_get_section_limit (abfd, sec); | |
e0001a05 NC |
11406 | |
11407 | /* ".plt*" sections have no explicit relocations but they contain L32R | |
11408 | instructions that reference the corresponding ".got.plt*" sections. */ | |
11409 | if ((sec->flags & SEC_LINKER_CREATED) != 0 | |
0112cd26 | 11410 | && CONST_STRNEQ (sec->name, ".plt")) |
e0001a05 NC |
11411 | { |
11412 | asection *sgotplt; | |
11413 | ||
11414 | /* Find the corresponding ".got.plt*" section. */ | |
11415 | if (sec->name[4] == '\0') | |
ce558b89 | 11416 | sgotplt = elf_hash_table (link_info)->sgotplt; |
e0001a05 NC |
11417 | else |
11418 | { | |
11419 | char got_name[14]; | |
11420 | int chunk = 0; | |
11421 | ||
11422 | BFD_ASSERT (sec->name[4] == '.'); | |
11423 | chunk = strtol (&sec->name[5], NULL, 10); | |
11424 | ||
11425 | sprintf (got_name, ".got.plt.%u", chunk); | |
3d4d4302 | 11426 | sgotplt = bfd_get_linker_section (sec->owner, got_name); |
e0001a05 NC |
11427 | } |
11428 | BFD_ASSERT (sgotplt); | |
11429 | ||
11430 | /* Assume worst-case offsets: L32R at the very end of the ".plt" | |
11431 | section referencing a literal at the very beginning of | |
11432 | ".got.plt". This is very close to the real dependence, anyway. */ | |
43cd72b9 | 11433 | (*callback) (sec, sec_size, sgotplt, 0, closure); |
e0001a05 NC |
11434 | } |
11435 | ||
13161072 BW |
11436 | /* Only ELF files are supported for Xtensa. Check here to avoid a segfault |
11437 | when building uclibc, which runs "ld -b binary /dev/null". */ | |
11438 | if (bfd_get_flavour (abfd) != bfd_target_elf_flavour) | |
11439 | return ok; | |
11440 | ||
68ffbac6 | 11441 | internal_relocs = retrieve_internal_relocs (abfd, sec, |
e0001a05 NC |
11442 | link_info->keep_memory); |
11443 | if (internal_relocs == NULL | |
43cd72b9 | 11444 | || sec->reloc_count == 0) |
e0001a05 NC |
11445 | return ok; |
11446 | ||
11447 | /* Cache the contents for the duration of this scan. */ | |
11448 | contents = retrieve_contents (abfd, sec, link_info->keep_memory); | |
43cd72b9 | 11449 | if (contents == NULL && sec_size != 0) |
e0001a05 NC |
11450 | { |
11451 | ok = FALSE; | |
11452 | goto error_return; | |
11453 | } | |
11454 | ||
43cd72b9 BW |
11455 | if (!xtensa_default_isa) |
11456 | xtensa_default_isa = xtensa_isa_init (0, 0); | |
e0001a05 | 11457 | |
43cd72b9 | 11458 | for (i = 0; i < sec->reloc_count; i++) |
e0001a05 NC |
11459 | { |
11460 | Elf_Internal_Rela *irel = &internal_relocs[i]; | |
43cd72b9 | 11461 | if (is_l32r_relocation (abfd, sec, contents, irel)) |
e0001a05 NC |
11462 | { |
11463 | r_reloc l32r_rel; | |
11464 | asection *target_sec; | |
11465 | bfd_vma target_offset; | |
43cd72b9 BW |
11466 | |
11467 | r_reloc_init (&l32r_rel, abfd, irel, contents, sec_size); | |
e0001a05 NC |
11468 | target_sec = NULL; |
11469 | target_offset = 0; | |
11470 | /* L32Rs must be local to the input file. */ | |
11471 | if (r_reloc_is_defined (&l32r_rel)) | |
11472 | { | |
11473 | target_sec = r_reloc_get_section (&l32r_rel); | |
43cd72b9 | 11474 | target_offset = l32r_rel.target_offset; |
e0001a05 NC |
11475 | } |
11476 | (*callback) (sec, irel->r_offset, target_sec, target_offset, | |
11477 | closure); | |
11478 | } | |
11479 | } | |
11480 | ||
11481 | error_return: | |
11482 | release_internal_relocs (sec, internal_relocs); | |
11483 | release_contents (sec, contents); | |
11484 | return ok; | |
11485 | } | |
11486 | ||
2f89ff8d L |
11487 | /* The default literal sections should always be marked as "code" (i.e., |
11488 | SHF_EXECINSTR). This is particularly important for the Linux kernel | |
11489 | module loader so that the literals are not placed after the text. */ | |
b35d266b | 11490 | static const struct bfd_elf_special_section elf_xtensa_special_sections[] = |
2f89ff8d | 11491 | { |
0112cd26 NC |
11492 | { STRING_COMMA_LEN (".fini.literal"), 0, SHT_PROGBITS, SHF_ALLOC + SHF_EXECINSTR }, |
11493 | { STRING_COMMA_LEN (".init.literal"), 0, SHT_PROGBITS, SHF_ALLOC + SHF_EXECINSTR }, | |
07d6d2b8 AM |
11494 | { STRING_COMMA_LEN (".literal"), 0, SHT_PROGBITS, SHF_ALLOC + SHF_EXECINSTR }, |
11495 | { STRING_COMMA_LEN (".xtensa.info"), 0, SHT_NOTE, 0 }, | |
11496 | { NULL, 0, 0, 0, 0 } | |
7f4d3958 | 11497 | }; |
e0001a05 | 11498 | \f |
ae95ffa6 | 11499 | #define ELF_TARGET_ID XTENSA_ELF_DATA |
e0001a05 | 11500 | #ifndef ELF_ARCH |
6d00b590 | 11501 | #define TARGET_LITTLE_SYM xtensa_elf32_le_vec |
e0001a05 | 11502 | #define TARGET_LITTLE_NAME "elf32-xtensa-le" |
6d00b590 | 11503 | #define TARGET_BIG_SYM xtensa_elf32_be_vec |
e0001a05 NC |
11504 | #define TARGET_BIG_NAME "elf32-xtensa-be" |
11505 | #define ELF_ARCH bfd_arch_xtensa | |
11506 | ||
4af0a1d8 BW |
11507 | #define ELF_MACHINE_CODE EM_XTENSA |
11508 | #define ELF_MACHINE_ALT1 EM_XTENSA_OLD | |
e0001a05 | 11509 | |
f7e16c2a | 11510 | #define ELF_MAXPAGESIZE 0x1000 |
e0001a05 NC |
11511 | #endif /* ELF_ARCH */ |
11512 | ||
11513 | #define elf_backend_can_gc_sections 1 | |
11514 | #define elf_backend_can_refcount 1 | |
11515 | #define elf_backend_plt_readonly 1 | |
11516 | #define elf_backend_got_header_size 4 | |
11517 | #define elf_backend_want_dynbss 0 | |
11518 | #define elf_backend_want_got_plt 1 | |
64f52338 | 11519 | #define elf_backend_dtrel_excludes_plt 1 |
e0001a05 NC |
11520 | |
11521 | #define elf_info_to_howto elf_xtensa_info_to_howto_rela | |
11522 | ||
28dbbc02 BW |
11523 | #define bfd_elf32_mkobject elf_xtensa_mkobject |
11524 | ||
e0001a05 NC |
11525 | #define bfd_elf32_bfd_merge_private_bfd_data elf_xtensa_merge_private_bfd_data |
11526 | #define bfd_elf32_new_section_hook elf_xtensa_new_section_hook | |
11527 | #define bfd_elf32_bfd_print_private_bfd_data elf_xtensa_print_private_bfd_data | |
11528 | #define bfd_elf32_bfd_relax_section elf_xtensa_relax_section | |
11529 | #define bfd_elf32_bfd_reloc_type_lookup elf_xtensa_reloc_type_lookup | |
157090f7 AM |
11530 | #define bfd_elf32_bfd_reloc_name_lookup \ |
11531 | elf_xtensa_reloc_name_lookup | |
e0001a05 | 11532 | #define bfd_elf32_bfd_set_private_flags elf_xtensa_set_private_flags |
f0e6fdb2 | 11533 | #define bfd_elf32_bfd_link_hash_table_create elf_xtensa_link_hash_table_create |
e0001a05 NC |
11534 | |
11535 | #define elf_backend_adjust_dynamic_symbol elf_xtensa_adjust_dynamic_symbol | |
11536 | #define elf_backend_check_relocs elf_xtensa_check_relocs | |
e0001a05 NC |
11537 | #define elf_backend_create_dynamic_sections elf_xtensa_create_dynamic_sections |
11538 | #define elf_backend_discard_info elf_xtensa_discard_info | |
11539 | #define elf_backend_ignore_discarded_relocs elf_xtensa_ignore_discarded_relocs | |
11540 | #define elf_backend_final_write_processing elf_xtensa_final_write_processing | |
11541 | #define elf_backend_finish_dynamic_sections elf_xtensa_finish_dynamic_sections | |
11542 | #define elf_backend_finish_dynamic_symbol elf_xtensa_finish_dynamic_symbol | |
11543 | #define elf_backend_gc_mark_hook elf_xtensa_gc_mark_hook | |
e0001a05 NC |
11544 | #define elf_backend_grok_prstatus elf_xtensa_grok_prstatus |
11545 | #define elf_backend_grok_psinfo elf_xtensa_grok_psinfo | |
95147441 | 11546 | #define elf_backend_hide_symbol elf_xtensa_hide_symbol |
e0001a05 NC |
11547 | #define elf_backend_object_p elf_xtensa_object_p |
11548 | #define elf_backend_reloc_type_class elf_xtensa_reloc_type_class | |
11549 | #define elf_backend_relocate_section elf_xtensa_relocate_section | |
11550 | #define elf_backend_size_dynamic_sections elf_xtensa_size_dynamic_sections | |
28dbbc02 | 11551 | #define elf_backend_always_size_sections elf_xtensa_always_size_sections |
d00dd7dc | 11552 | #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all |
29ef7005 | 11553 | #define elf_backend_special_sections elf_xtensa_special_sections |
a77dc2cc | 11554 | #define elf_backend_action_discarded elf_xtensa_action_discarded |
28dbbc02 | 11555 | #define elf_backend_copy_indirect_symbol elf_xtensa_copy_indirect_symbol |
e0001a05 NC |
11556 | |
11557 | #include "elf32-target.h" |