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8bde7f77
WD
1/*
2 * (C) Copyright 2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * Boot support
26 */
27#include <common.h>
28#include <command.h>
d88af4da 29#include <linux/compiler.h>
8bde7f77 30
d87080b7 31DECLARE_GLOBAL_DATA_PTR;
8bde7f77 32
d88af4da
MF
33__maybe_unused
34static void print_num(const char *name, ulong value)
35{
36 printf("%-12s= 0x%08lX\n", name, value);
37}
8bde7f77 38
5f3dfadc 39__maybe_unused
d88af4da
MF
40static void print_eth(int idx)
41{
42 char name[10], *val;
43 if (idx)
44 sprintf(name, "eth%iaddr", idx);
45 else
46 strcpy(name, "ethaddr");
47 val = getenv(name);
48 if (!val)
49 val = "(not set)";
50 printf("%-12s= %s\n", name, val);
51}
de2dff6f 52
9fc6a06a
MS
53__maybe_unused
54static void print_eths(void)
55{
56 struct eth_device *dev;
57 int i = 0;
58
59 do {
60 dev = eth_get_dev_by_index(i);
61 if (dev) {
62 printf("eth%dname = %s\n", i, dev->name);
63 print_eth(i);
64 i++;
65 }
66 } while (dev);
67
68 printf("current eth = %s\n", eth_get_name());
69 printf("ip_addr = %s\n", getenv("ipaddr"));
70}
71
d88af4da 72__maybe_unused
47708457 73static void print_lnum(const char *name, unsigned long long value)
d88af4da
MF
74{
75 printf("%-12s= 0x%.8llX\n", name, value);
76}
77
78__maybe_unused
79static void print_mhz(const char *name, unsigned long hz)
80{
81 char buf[32];
82
83 printf("%-12s= %6s MHz\n", name, strmhz(buf, hz));
84}
8bde7f77 85
c99ea790 86#if defined(CONFIG_PPC)
e7939464
YS
87void __weak board_detail(void)
88{
89 /* Please define boot_detail() for your platform */
90}
8bde7f77 91
5902e8f7 92int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8bde7f77 93{
8bde7f77 94 bd_t *bd = gd->bd;
8bde7f77
WD
95
96#ifdef DEBUG
5902e8f7
ML
97 print_num("bd address", (ulong)bd);
98#endif
99 print_num("memstart", bd->bi_memstart);
100 print_lnum("memsize", bd->bi_memsize);
101 print_num("flashstart", bd->bi_flashstart);
102 print_num("flashsize", bd->bi_flashsize);
103 print_num("flashoffset", bd->bi_flashoffset);
104 print_num("sramstart", bd->bi_sramstart);
105 print_num("sramsize", bd->bi_sramsize);
106#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || \
107 defined(CONFIG_8260) || defined(CONFIG_E500)
108 print_num("immr_base", bd->bi_immr_base);
109#endif
110 print_num("bootflags", bd->bi_bootflags);
111#if defined(CONFIG_405CR) || defined(CONFIG_405EP) || \
112 defined(CONFIG_405GP) || \
113 defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \
114 defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \
115 defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
116 defined(CONFIG_XILINX_405)
0c277ef9
TT
117 print_mhz("procfreq", bd->bi_procfreq);
118 print_mhz("plb_busfreq", bd->bi_plb_busfreq);
5902e8f7
ML
119#if defined(CONFIG_405EP) || defined(CONFIG_405GP) || \
120 defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \
121 defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \
122 defined(CONFIG_440SPE) || defined(CONFIG_XILINX_405)
0c277ef9 123 print_mhz("pci_busfreq", bd->bi_pci_busfreq);
8bde7f77 124#endif
9fea65a6 125#else /* ! CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */
9c4c5ae3 126#if defined(CONFIG_CPM2)
0c277ef9
TT
127 print_mhz("vco", bd->bi_vco);
128 print_mhz("sccfreq", bd->bi_sccfreq);
129 print_mhz("brgfreq", bd->bi_brgfreq);
8bde7f77 130#endif
0c277ef9 131 print_mhz("intfreq", bd->bi_intfreq);
9c4c5ae3 132#if defined(CONFIG_CPM2)
0c277ef9 133 print_mhz("cpmfreq", bd->bi_cpmfreq);
8bde7f77 134#endif
0c277ef9 135 print_mhz("busfreq", bd->bi_busfreq);
9fea65a6 136#endif /* CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */
03f5c550 137
34e210f5
TT
138#ifdef CONFIG_ENABLE_36BIT_PHYS
139#ifdef CONFIG_PHYS_64BIT
140 puts("addressing = 36-bit\n");
141#else
142 puts("addressing = 32-bit\n");
143#endif
144#endif
145
de2dff6f 146 print_eth(0);
e2ffd59b 147#if defined(CONFIG_HAS_ETH1)
de2dff6f 148 print_eth(1);
03f5c550 149#endif
e2ffd59b 150#if defined(CONFIG_HAS_ETH2)
de2dff6f 151 print_eth(2);
42d1f039 152#endif
e2ffd59b 153#if defined(CONFIG_HAS_ETH3)
de2dff6f 154 print_eth(3);
03f5c550 155#endif
c68a05fe 156#if defined(CONFIG_HAS_ETH4)
de2dff6f 157 print_eth(4);
c68a05fe 158#endif
c68a05fe 159#if defined(CONFIG_HAS_ETH5)
de2dff6f 160 print_eth(5);
c68a05fe 161#endif
162
8bde7f77 163#ifdef CONFIG_HERMES
0c277ef9 164 print_mhz("ethspeed", bd->bi_ethspeed);
8bde7f77 165#endif
50a47d05 166 printf("IP addr = %s\n", getenv("ipaddr"));
a7e5ee9e 167 printf("baudrate = %6u bps\n", bd->bi_baudrate);
5902e8f7 168 print_num("relocaddr", gd->relocaddr);
e7939464 169 board_detail();
8bde7f77
WD
170 return 0;
171}
172
c99ea790 173#elif defined(CONFIG_NIOS2)
5c952cf0 174
5902e8f7 175int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
5c952cf0 176{
5c952cf0
WD
177 bd_t *bd = gd->bd;
178
5902e8f7
ML
179 print_num("mem start", (ulong)bd->bi_memstart);
180 print_lnum("mem size", (u64)bd->bi_memsize);
181 print_num("flash start", (ulong)bd->bi_flashstart);
182 print_num("flash size", (ulong)bd->bi_flashsize);
183 print_num("flash offset", (ulong)bd->bi_flashoffset);
5c952cf0 184
6d0f6bcf 185#if defined(CONFIG_SYS_SRAM_BASE)
5c952cf0
WD
186 print_num ("sram start", (ulong)bd->bi_sramstart);
187 print_num ("sram size", (ulong)bd->bi_sramsize);
188#endif
189
90253178 190#if defined(CONFIG_CMD_NET)
de2dff6f 191 print_eth(0);
50a47d05 192 printf("ip_addr = %s\n", getenv("ipaddr"));
5c952cf0
WD
193#endif
194
7fffe2fa 195 printf("baudrate = %u bps\n", bd->bi_baudrate);
5c952cf0
WD
196
197 return 0;
198}
c99ea790
RM
199
200#elif defined(CONFIG_MICROBLAZE)
cfc67116 201
5902e8f7 202int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
cfc67116 203{
cfc67116 204 bd_t *bd = gd->bd;
5902e8f7
ML
205 print_num("mem start ", (ulong)bd->bi_memstart);
206 print_lnum("mem size ", (u64)bd->bi_memsize);
207 print_num("flash start ", (ulong)bd->bi_flashstart);
208 print_num("flash size ", (ulong)bd->bi_flashsize);
209 print_num("flash offset ", (ulong)bd->bi_flashoffset);
6d0f6bcf 210#if defined(CONFIG_SYS_SRAM_BASE)
5902e8f7
ML
211 print_num("sram start ", (ulong)bd->bi_sramstart);
212 print_num("sram size ", (ulong)bd->bi_sramsize);
cfc67116 213#endif
90253178 214#if defined(CONFIG_CMD_NET)
9fc6a06a 215 print_eths();
cfc67116 216#endif
82b6a476 217 printf("baudrate = %u bps\n", bd->bi_baudrate);
cfc67116
MS
218 return 0;
219}
4a551709 220
c99ea790
RM
221#elif defined(CONFIG_SPARC)
222
54841ab5 223int do_bdinfo(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
00ab32c8
DH
224{
225 bd_t *bd = gd->bd;
00ab32c8
DH
226
227#ifdef DEBUG
228 print_num("bd address ", (ulong) bd);
229#endif
230 print_num("memstart ", bd->bi_memstart);
b57ca3e1 231 print_lnum("memsize ", bd->bi_memsize);
00ab32c8 232 print_num("flashstart ", bd->bi_flashstart);
6d0f6bcf 233 print_num("CONFIG_SYS_MONITOR_BASE ", CONFIG_SYS_MONITOR_BASE);
0e8d1586 234 print_num("CONFIG_ENV_ADDR ", CONFIG_ENV_ADDR);
d97f01a6 235 printf("CONFIG_SYS_RELOC_MONITOR_BASE = 0x%x (%d)\n", CONFIG_SYS_RELOC_MONITOR_BASE,
6d0f6bcf 236 CONFIG_SYS_MONITOR_LEN);
d97f01a6 237 printf("CONFIG_SYS_MALLOC_BASE = 0x%x (%d)\n", CONFIG_SYS_MALLOC_BASE,
6d0f6bcf 238 CONFIG_SYS_MALLOC_LEN);
d97f01a6 239 printf("CONFIG_SYS_INIT_SP_OFFSET = 0x%x (%d)\n", CONFIG_SYS_INIT_SP_OFFSET,
6d0f6bcf 240 CONFIG_SYS_STACK_SIZE);
d97f01a6 241 printf("CONFIG_SYS_PROM_OFFSET = 0x%x (%d)\n", CONFIG_SYS_PROM_OFFSET,
6d0f6bcf 242 CONFIG_SYS_PROM_SIZE);
d97f01a6 243 printf("CONFIG_SYS_GBL_DATA_OFFSET = 0x%x (%d)\n", CONFIG_SYS_GBL_DATA_OFFSET,
25ddd1fb 244 GENERATED_GBL_DATA_SIZE);
00ab32c8
DH
245
246#if defined(CONFIG_CMD_NET)
de2dff6f 247 print_eth(0);
50a47d05 248 printf("ip_addr = %s\n", getenv("ipaddr"));
00ab32c8 249#endif
a8f1f1cd 250 printf("baudrate = %6u bps\n", bd->bi_baudrate);
00ab32c8
DH
251 return 0;
252}
253
c99ea790
RM
254#elif defined(CONFIG_M68K)
255
5902e8f7 256int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8e585f02 257{
8e585f02 258 bd_t *bd = gd->bd;
8ae158cd 259
5902e8f7
ML
260 print_num("memstart", (ulong)bd->bi_memstart);
261 print_lnum("memsize", (u64)bd->bi_memsize);
262 print_num("flashstart", (ulong)bd->bi_flashstart);
263 print_num("flashsize", (ulong)bd->bi_flashsize);
264 print_num("flashoffset", (ulong)bd->bi_flashoffset);
6d0f6bcf 265#if defined(CONFIG_SYS_INIT_RAM_ADDR)
5902e8f7
ML
266 print_num("sramstart", (ulong)bd->bi_sramstart);
267 print_num("sramsize", (ulong)bd->bi_sramsize);
8e585f02 268#endif
6d0f6bcf 269#if defined(CONFIG_SYS_MBAR)
5902e8f7 270 print_num("mbar", bd->bi_mbar_base);
8e585f02 271#endif
0c277ef9
TT
272 print_mhz("cpufreq", bd->bi_intfreq);
273 print_mhz("busfreq", bd->bi_busfreq);
8ae158cd 274#ifdef CONFIG_PCI
0c277ef9 275 print_mhz("pcifreq", bd->bi_pcifreq);
8ae158cd
TL
276#endif
277#ifdef CONFIG_EXTRA_CLOCK
0c277ef9
TT
278 print_mhz("flbfreq", bd->bi_flbfreq);
279 print_mhz("inpfreq", bd->bi_inpfreq);
280 print_mhz("vcofreq", bd->bi_vcofreq);
8ae158cd 281#endif
26667b7f 282#if defined(CONFIG_CMD_NET)
de2dff6f 283 print_eth(0);
8e585f02 284#if defined(CONFIG_HAS_ETH1)
de2dff6f 285 print_eth(1);
8e585f02 286#endif
8e585f02 287#if defined(CONFIG_HAS_ETH2)
de2dff6f 288 print_eth(2);
8e585f02 289#endif
8e585f02 290#if defined(CONFIG_HAS_ETH3)
de2dff6f 291 print_eth(3);
8e585f02
TL
292#endif
293
50a47d05 294 printf("ip_addr = %s\n", getenv("ipaddr"));
26667b7f 295#endif
f5a5b3c5 296 printf("baudrate = %u bps\n", bd->bi_baudrate);
8e585f02
TL
297
298 return 0;
299}
300
8dc48d71 301#elif defined(CONFIG_BLACKFIN)
c99ea790 302
54841ab5 303int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8dc48d71 304{
8dc48d71
MF
305 bd_t *bd = gd->bd;
306
307 printf("U-Boot = %s\n", bd->bi_r_version);
308 printf("CPU = %s\n", bd->bi_cpu);
309 printf("Board = %s\n", bd->bi_board_name);
0c277ef9
TT
310 print_mhz("VCO", bd->bi_vco);
311 print_mhz("CCLK", bd->bi_cclk);
312 print_mhz("SCLK", bd->bi_sclk);
8dc48d71 313
5902e8f7
ML
314 print_num("boot_params", (ulong)bd->bi_boot_params);
315 print_num("memstart", (ulong)bd->bi_memstart);
316 print_lnum("memsize", (u64)bd->bi_memsize);
317 print_num("flashstart", (ulong)bd->bi_flashstart);
318 print_num("flashsize", (ulong)bd->bi_flashsize);
319 print_num("flashoffset", (ulong)bd->bi_flashoffset);
8dc48d71 320
de2dff6f 321 print_eth(0);
50a47d05 322 printf("ip_addr = %s\n", getenv("ipaddr"));
5e84e5a7 323 printf("baudrate = %u bps\n", bd->bi_baudrate);
8dc48d71
MF
324
325 return 0;
326}
327
c99ea790 328#elif defined(CONFIG_MIPS)
8bde7f77 329
5902e8f7 330int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8bde7f77 331{
8bde7f77
WD
332 bd_t *bd = gd->bd;
333
5902e8f7
ML
334 print_num("boot_params", (ulong)bd->bi_boot_params);
335 print_num("memstart", (ulong)bd->bi_memstart);
336 print_lnum("memsize", (u64)bd->bi_memsize);
337 print_num("flashstart", (ulong)bd->bi_flashstart);
338 print_num("flashsize", (ulong)bd->bi_flashsize);
339 print_num("flashoffset", (ulong)bd->bi_flashoffset);
8bde7f77 340
de2dff6f 341 print_eth(0);
50a47d05 342 printf("ip_addr = %s\n", getenv("ipaddr"));
8dc22b00 343 printf("baudrate = %u bps\n", bd->bi_baudrate);
8bde7f77
WD
344
345 return 0;
346}
8bde7f77 347
c99ea790
RM
348#elif defined(CONFIG_AVR32)
349
5902e8f7 350int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
c99ea790
RM
351{
352 bd_t *bd = gd->bd;
353
5902e8f7
ML
354 print_num("boot_params", (ulong)bd->bi_boot_params);
355 print_num("memstart", (ulong)bd->bi_memstart);
356 print_lnum("memsize", (u64)bd->bi_memsize);
357 print_num("flashstart", (ulong)bd->bi_flashstart);
358 print_num("flashsize", (ulong)bd->bi_flashsize);
359 print_num("flashoffset", (ulong)bd->bi_flashoffset);
c99ea790
RM
360
361 print_eth(0);
50a47d05 362 printf("ip_addr = %s\n", getenv("ipaddr"));
15dc95d4 363 printf("baudrate = %u bps\n", bd->bi_baudrate);
c99ea790
RM
364
365 return 0;
366}
367
368#elif defined(CONFIG_ARM)
8bde7f77 369
5902e8f7 370int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8bde7f77 371{
8bde7f77
WD
372 int i;
373 bd_t *bd = gd->bd;
374
5902e8f7
ML
375 print_num("arch_number", bd->bi_arch_number);
376 print_num("boot_params", (ulong)bd->bi_boot_params);
8bde7f77 377
5902e8f7 378 for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
8bde7f77
WD
379 print_num("DRAM bank", i);
380 print_num("-> start", bd->bi_dram[i].start);
381 print_num("-> size", bd->bi_dram[i].size);
382 }
383
a41dbbd9 384#if defined(CONFIG_CMD_NET)
9fc6a06a 385 print_eths();
a41dbbd9 386#endif
e46e31a8 387 printf("baudrate = %u bps\n", bd->bi_baudrate);
e47f2db5 388#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
34fd5d25 389 print_num("TLB addr", gd->arch.tlb_addr);
f1d2b313 390#endif
5902e8f7
ML
391 print_num("relocaddr", gd->relocaddr);
392 print_num("reloc off", gd->reloc_off);
393 print_num("irq_sp", gd->irq_sp); /* irq stack pointer */
394 print_num("sp start ", gd->start_addr_sp);
c8fcd0f2 395#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
5902e8f7 396 print_num("FB base ", gd->fb_base);
c8fcd0f2 397#endif
8f5d4687
HM
398 /*
399 * TODO: Currently only support for davinci SOC's is added.
400 * Remove this check once all the board implement this.
401 */
402#ifdef CONFIG_CLOCKS
403 printf("ARM frequency = %ld MHz\n", gd->bd->bi_arm_freq);
404 printf("DSP frequency = %ld MHz\n", gd->bd->bi_dsp_freq);
405 printf("DDR frequency = %ld MHz\n", gd->bd->bi_ddr_freq);
406#endif
8bde7f77
WD
407 return 0;
408}
409
ebd0d062
NI
410#elif defined(CONFIG_SH)
411
5902e8f7 412int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
ebd0d062
NI
413{
414 bd_t *bd = gd->bd;
5902e8f7
ML
415 print_num("mem start ", (ulong)bd->bi_memstart);
416 print_lnum("mem size ", (u64)bd->bi_memsize);
417 print_num("flash start ", (ulong)bd->bi_flashstart);
418 print_num("flash size ", (ulong)bd->bi_flashsize);
419 print_num("flash offset ", (ulong)bd->bi_flashoffset);
ebd0d062
NI
420
421#if defined(CONFIG_CMD_NET)
422 print_eth(0);
50a47d05 423 printf("ip_addr = %s\n", getenv("ipaddr"));
ebd0d062 424#endif
ecd4551f 425 printf("baudrate = %u bps\n", bd->bi_baudrate);
ebd0d062
NI
426 return 0;
427}
428
a806ee6f
GR
429#elif defined(CONFIG_X86)
430
5902e8f7 431int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
a806ee6f
GR
432{
433 int i;
434 bd_t *bd = gd->bd;
a806ee6f 435
5902e8f7
ML
436 print_num("boot_params", (ulong)bd->bi_boot_params);
437 print_num("bi_memstart", bd->bi_memstart);
438 print_num("bi_memsize", bd->bi_memsize);
439 print_num("bi_flashstart", bd->bi_flashstart);
440 print_num("bi_flashsize", bd->bi_flashsize);
441 print_num("bi_flashoffset", bd->bi_flashoffset);
442 print_num("bi_sramstart", bd->bi_sramstart);
443 print_num("bi_sramsize", bd->bi_sramsize);
444 print_num("bi_bootflags", bd->bi_bootflags);
0c277ef9
TT
445 print_mhz("cpufreq", bd->bi_intfreq);
446 print_mhz("busfreq", bd->bi_busfreq);
5902e8f7
ML
447
448 for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
a806ee6f
GR
449 print_num("DRAM bank", i);
450 print_num("-> start", bd->bi_dram[i].start);
451 print_num("-> size", bd->bi_dram[i].size);
452 }
453
454#if defined(CONFIG_CMD_NET)
455 print_eth(0);
50a47d05 456 printf("ip_addr = %s\n", getenv("ipaddr"));
0c277ef9 457 print_mhz("ethspeed", bd->bi_ethspeed);
a806ee6f 458#endif
55f97c1b 459 printf("baudrate = %u bps\n", bd->bi_baudrate);
a806ee6f
GR
460
461 return 0;
462}
463
6fcc3be4
SG
464#elif defined(CONFIG_SANDBOX)
465
466int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
467{
468 int i;
469 bd_t *bd = gd->bd;
470
471 print_num("boot_params", (ulong)bd->bi_boot_params);
472
473 for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
474 print_num("DRAM bank", i);
475 print_num("-> start", bd->bi_dram[i].start);
476 print_num("-> size", bd->bi_dram[i].size);
477 }
478
479#if defined(CONFIG_CMD_NET)
480 print_eth(0);
50a47d05 481 printf("ip_addr = %s\n", getenv("ipaddr"));
6fcc3be4 482#endif
c8fcd0f2 483#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
6fcc3be4 484 print_num("FB base ", gd->fb_base);
c8fcd0f2 485#endif
6fcc3be4
SG
486 return 0;
487}
488
64d61461
ML
489#elif defined(CONFIG_NDS32)
490
491int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
492{
493 int i;
494 bd_t *bd = gd->bd;
495
496 print_num("arch_number", bd->bi_arch_number);
497 print_num("boot_params", (ulong)bd->bi_boot_params);
498
499 for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
500 print_num("DRAM bank", i);
501 print_num("-> start", bd->bi_dram[i].start);
502 print_num("-> size", bd->bi_dram[i].size);
503 }
504
505#if defined(CONFIG_CMD_NET)
506 print_eth(0);
50a47d05 507 printf("ip_addr = %s\n", getenv("ipaddr"));
64d61461 508#endif
a25356d7 509 printf("baudrate = %u bps\n", bd->bi_baudrate);
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510
511 return 0;
512}
513
2be9fdbf
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514#elif defined(CONFIG_OPENRISC)
515
516int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
517{
518 bd_t *bd = gd->bd;
519
520 print_num("mem start", (ulong)bd->bi_memstart);
521 print_lnum("mem size", (u64)bd->bi_memsize);
522 print_num("flash start", (ulong)bd->bi_flashstart);
523 print_num("flash size", (ulong)bd->bi_flashsize);
524 print_num("flash offset", (ulong)bd->bi_flashoffset);
525
526#if defined(CONFIG_CMD_NET)
527 print_eth(0);
50a47d05 528 printf("ip_addr = %s\n", getenv("ipaddr"));
2be9fdbf
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529#endif
530
7a68e330 531 printf("baudrate = %u bps\n", bd->bi_baudrate);
2be9fdbf
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532
533 return 0;
534}
535
c99ea790
RM
536#else
537 #error "a case for this architecture does not exist!"
538#endif
8bde7f77 539
8bde7f77
WD
540/* -------------------------------------------------------------------- */
541
0d498393
WD
542U_BOOT_CMD(
543 bdinfo, 1, 1, do_bdinfo,
2fb2604d 544 "print Board Info structure",
a89c33db 545 ""
8bde7f77 546);