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atngwmkii: convert to generic board
[people/ms/u-boot.git] / common / cmd_bdinfo.c
CommitLineData
8bde7f77
WD
1/*
2 * (C) Copyright 2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
1a459660 5 * SPDX-License-Identifier: GPL-2.0+
8bde7f77
WD
6 */
7
8/*
9 * Boot support
10 */
11#include <common.h>
12#include <command.h>
d88af4da 13#include <linux/compiler.h>
8bde7f77 14
d87080b7 15DECLARE_GLOBAL_DATA_PTR;
8bde7f77 16
d88af4da
MF
17__maybe_unused
18static void print_num(const char *name, ulong value)
19{
20 printf("%-12s= 0x%08lX\n", name, value);
21}
8bde7f77 22
5f3dfadc 23__maybe_unused
d88af4da
MF
24static void print_eth(int idx)
25{
26 char name[10], *val;
27 if (idx)
28 sprintf(name, "eth%iaddr", idx);
29 else
30 strcpy(name, "ethaddr");
31 val = getenv(name);
32 if (!val)
33 val = "(not set)";
34 printf("%-12s= %s\n", name, val);
35}
de2dff6f 36
9fc6a06a
MS
37__maybe_unused
38static void print_eths(void)
39{
40 struct eth_device *dev;
41 int i = 0;
42
43 do {
44 dev = eth_get_dev_by_index(i);
45 if (dev) {
46 printf("eth%dname = %s\n", i, dev->name);
47 print_eth(i);
48 i++;
49 }
50 } while (dev);
51
52 printf("current eth = %s\n", eth_get_name());
53 printf("ip_addr = %s\n", getenv("ipaddr"));
54}
55
d88af4da 56__maybe_unused
47708457 57static void print_lnum(const char *name, unsigned long long value)
d88af4da
MF
58{
59 printf("%-12s= 0x%.8llX\n", name, value);
60}
61
62__maybe_unused
63static void print_mhz(const char *name, unsigned long hz)
64{
65 char buf[32];
66
67 printf("%-12s= %6s MHz\n", name, strmhz(buf, hz));
68}
8bde7f77 69
c99ea790 70#if defined(CONFIG_PPC)
e7939464
YS
71void __weak board_detail(void)
72{
73 /* Please define boot_detail() for your platform */
74}
8bde7f77 75
5902e8f7 76int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8bde7f77 77{
8bde7f77 78 bd_t *bd = gd->bd;
8bde7f77
WD
79
80#ifdef DEBUG
5902e8f7
ML
81 print_num("bd address", (ulong)bd);
82#endif
83 print_num("memstart", bd->bi_memstart);
84 print_lnum("memsize", bd->bi_memsize);
85 print_num("flashstart", bd->bi_flashstart);
86 print_num("flashsize", bd->bi_flashsize);
87 print_num("flashoffset", bd->bi_flashoffset);
88 print_num("sramstart", bd->bi_sramstart);
89 print_num("sramsize", bd->bi_sramsize);
90#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || \
58dac327 91 defined(CONFIG_MPC8260) || defined(CONFIG_E500)
5902e8f7
ML
92 print_num("immr_base", bd->bi_immr_base);
93#endif
94 print_num("bootflags", bd->bi_bootflags);
3fb85889 95#if defined(CONFIG_405EP) || \
5902e8f7
ML
96 defined(CONFIG_405GP) || \
97 defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \
98 defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \
99 defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
100 defined(CONFIG_XILINX_405)
0c277ef9
TT
101 print_mhz("procfreq", bd->bi_procfreq);
102 print_mhz("plb_busfreq", bd->bi_plb_busfreq);
5902e8f7
ML
103#if defined(CONFIG_405EP) || defined(CONFIG_405GP) || \
104 defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \
105 defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \
106 defined(CONFIG_440SPE) || defined(CONFIG_XILINX_405)
0c277ef9 107 print_mhz("pci_busfreq", bd->bi_pci_busfreq);
8bde7f77 108#endif
3fb85889 109#else /* ! CONFIG_405GP, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */
9c4c5ae3 110#if defined(CONFIG_CPM2)
0c277ef9
TT
111 print_mhz("vco", bd->bi_vco);
112 print_mhz("sccfreq", bd->bi_sccfreq);
113 print_mhz("brgfreq", bd->bi_brgfreq);
8bde7f77 114#endif
0c277ef9 115 print_mhz("intfreq", bd->bi_intfreq);
9c4c5ae3 116#if defined(CONFIG_CPM2)
0c277ef9 117 print_mhz("cpmfreq", bd->bi_cpmfreq);
8bde7f77 118#endif
0c277ef9 119 print_mhz("busfreq", bd->bi_busfreq);
3fb85889 120#endif /* CONFIG_405GP, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */
03f5c550 121
34e210f5
TT
122#ifdef CONFIG_ENABLE_36BIT_PHYS
123#ifdef CONFIG_PHYS_64BIT
124 puts("addressing = 36-bit\n");
125#else
126 puts("addressing = 32-bit\n");
127#endif
128#endif
129
de2dff6f 130 print_eth(0);
e2ffd59b 131#if defined(CONFIG_HAS_ETH1)
de2dff6f 132 print_eth(1);
03f5c550 133#endif
e2ffd59b 134#if defined(CONFIG_HAS_ETH2)
de2dff6f 135 print_eth(2);
42d1f039 136#endif
e2ffd59b 137#if defined(CONFIG_HAS_ETH3)
de2dff6f 138 print_eth(3);
03f5c550 139#endif
c68a05fe 140#if defined(CONFIG_HAS_ETH4)
de2dff6f 141 print_eth(4);
c68a05fe 142#endif
c68a05fe 143#if defined(CONFIG_HAS_ETH5)
de2dff6f 144 print_eth(5);
c68a05fe 145#endif
146
50a47d05 147 printf("IP addr = %s\n", getenv("ipaddr"));
8e261575 148 printf("baudrate = %6u bps\n", gd->baudrate);
5902e8f7 149 print_num("relocaddr", gd->relocaddr);
e7939464 150 board_detail();
8bde7f77
WD
151 return 0;
152}
153
c99ea790 154#elif defined(CONFIG_NIOS2)
5c952cf0 155
5902e8f7 156int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
5c952cf0 157{
5c952cf0
WD
158 bd_t *bd = gd->bd;
159
5902e8f7
ML
160 print_num("mem start", (ulong)bd->bi_memstart);
161 print_lnum("mem size", (u64)bd->bi_memsize);
162 print_num("flash start", (ulong)bd->bi_flashstart);
163 print_num("flash size", (ulong)bd->bi_flashsize);
164 print_num("flash offset", (ulong)bd->bi_flashoffset);
5c952cf0 165
6d0f6bcf 166#if defined(CONFIG_SYS_SRAM_BASE)
5c952cf0
WD
167 print_num ("sram start", (ulong)bd->bi_sramstart);
168 print_num ("sram size", (ulong)bd->bi_sramsize);
169#endif
170
90253178 171#if defined(CONFIG_CMD_NET)
de2dff6f 172 print_eth(0);
50a47d05 173 printf("ip_addr = %s\n", getenv("ipaddr"));
5c952cf0
WD
174#endif
175
8e261575 176 printf("baudrate = %u bps\n", gd->baudrate);
5c952cf0
WD
177
178 return 0;
179}
c99ea790
RM
180
181#elif defined(CONFIG_MICROBLAZE)
cfc67116 182
5902e8f7 183int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
cfc67116 184{
cfc67116 185 bd_t *bd = gd->bd;
e945f6dc
MS
186 int i;
187
188 for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
189 print_num("DRAM bank", i);
190 print_num("-> start", bd->bi_dram[i].start);
191 print_num("-> size", bd->bi_dram[i].size);
192 }
193
5902e8f7
ML
194 print_num("flash start ", (ulong)bd->bi_flashstart);
195 print_num("flash size ", (ulong)bd->bi_flashsize);
196 print_num("flash offset ", (ulong)bd->bi_flashoffset);
6d0f6bcf 197#if defined(CONFIG_SYS_SRAM_BASE)
5902e8f7
ML
198 print_num("sram start ", (ulong)bd->bi_sramstart);
199 print_num("sram size ", (ulong)bd->bi_sramsize);
cfc67116 200#endif
90253178 201#if defined(CONFIG_CMD_NET)
9fc6a06a 202 print_eths();
cfc67116 203#endif
8e261575 204 printf("baudrate = %u bps\n", gd->baudrate);
e945f6dc
MS
205 print_num("relocaddr", gd->relocaddr);
206 print_num("reloc off", gd->reloc_off);
de86765b
MS
207 print_num("fdt_blob", (ulong)gd->fdt_blob);
208 print_num("new_fdt", (ulong)gd->new_fdt);
209 print_num("fdt_size", (ulong)gd->fdt_size);
e945f6dc 210
cfc67116
MS
211 return 0;
212}
4a551709 213
c99ea790
RM
214#elif defined(CONFIG_SPARC)
215
54841ab5 216int do_bdinfo(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
00ab32c8
DH
217{
218 bd_t *bd = gd->bd;
00ab32c8
DH
219
220#ifdef DEBUG
221 print_num("bd address ", (ulong) bd);
222#endif
223 print_num("memstart ", bd->bi_memstart);
b57ca3e1 224 print_lnum("memsize ", bd->bi_memsize);
00ab32c8 225 print_num("flashstart ", bd->bi_flashstart);
6d0f6bcf 226 print_num("CONFIG_SYS_MONITOR_BASE ", CONFIG_SYS_MONITOR_BASE);
0e8d1586 227 print_num("CONFIG_ENV_ADDR ", CONFIG_ENV_ADDR);
d97f01a6 228 printf("CONFIG_SYS_RELOC_MONITOR_BASE = 0x%x (%d)\n", CONFIG_SYS_RELOC_MONITOR_BASE,
6d0f6bcf 229 CONFIG_SYS_MONITOR_LEN);
d97f01a6 230 printf("CONFIG_SYS_MALLOC_BASE = 0x%x (%d)\n", CONFIG_SYS_MALLOC_BASE,
6d0f6bcf 231 CONFIG_SYS_MALLOC_LEN);
d97f01a6 232 printf("CONFIG_SYS_INIT_SP_OFFSET = 0x%x (%d)\n", CONFIG_SYS_INIT_SP_OFFSET,
6d0f6bcf 233 CONFIG_SYS_STACK_SIZE);
d97f01a6 234 printf("CONFIG_SYS_PROM_OFFSET = 0x%x (%d)\n", CONFIG_SYS_PROM_OFFSET,
6d0f6bcf 235 CONFIG_SYS_PROM_SIZE);
d97f01a6 236 printf("CONFIG_SYS_GBL_DATA_OFFSET = 0x%x (%d)\n", CONFIG_SYS_GBL_DATA_OFFSET,
25ddd1fb 237 GENERATED_GBL_DATA_SIZE);
00ab32c8
DH
238
239#if defined(CONFIG_CMD_NET)
de2dff6f 240 print_eth(0);
50a47d05 241 printf("ip_addr = %s\n", getenv("ipaddr"));
00ab32c8 242#endif
8e261575 243 printf("baudrate = %6u bps\n", gd->baudrate);
00ab32c8
DH
244 return 0;
245}
246
c99ea790
RM
247#elif defined(CONFIG_M68K)
248
5902e8f7 249int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8e585f02 250{
8e585f02 251 bd_t *bd = gd->bd;
8ae158cd 252
5902e8f7
ML
253 print_num("memstart", (ulong)bd->bi_memstart);
254 print_lnum("memsize", (u64)bd->bi_memsize);
255 print_num("flashstart", (ulong)bd->bi_flashstart);
256 print_num("flashsize", (ulong)bd->bi_flashsize);
257 print_num("flashoffset", (ulong)bd->bi_flashoffset);
6d0f6bcf 258#if defined(CONFIG_SYS_INIT_RAM_ADDR)
5902e8f7
ML
259 print_num("sramstart", (ulong)bd->bi_sramstart);
260 print_num("sramsize", (ulong)bd->bi_sramsize);
8e585f02 261#endif
6d0f6bcf 262#if defined(CONFIG_SYS_MBAR)
5902e8f7 263 print_num("mbar", bd->bi_mbar_base);
8e585f02 264#endif
0c277ef9
TT
265 print_mhz("cpufreq", bd->bi_intfreq);
266 print_mhz("busfreq", bd->bi_busfreq);
8ae158cd 267#ifdef CONFIG_PCI
0c277ef9 268 print_mhz("pcifreq", bd->bi_pcifreq);
8ae158cd
TL
269#endif
270#ifdef CONFIG_EXTRA_CLOCK
0c277ef9
TT
271 print_mhz("flbfreq", bd->bi_flbfreq);
272 print_mhz("inpfreq", bd->bi_inpfreq);
273 print_mhz("vcofreq", bd->bi_vcofreq);
8ae158cd 274#endif
26667b7f 275#if defined(CONFIG_CMD_NET)
de2dff6f 276 print_eth(0);
8e585f02 277#if defined(CONFIG_HAS_ETH1)
de2dff6f 278 print_eth(1);
8e585f02 279#endif
8e585f02 280#if defined(CONFIG_HAS_ETH2)
de2dff6f 281 print_eth(2);
8e585f02 282#endif
8e585f02 283#if defined(CONFIG_HAS_ETH3)
de2dff6f 284 print_eth(3);
8e585f02
TL
285#endif
286
50a47d05 287 printf("ip_addr = %s\n", getenv("ipaddr"));
26667b7f 288#endif
8e261575 289 printf("baudrate = %u bps\n", gd->baudrate);
8e585f02
TL
290
291 return 0;
292}
293
8dc48d71 294#elif defined(CONFIG_BLACKFIN)
c99ea790 295
54841ab5 296int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8dc48d71 297{
8dc48d71
MF
298 bd_t *bd = gd->bd;
299
300 printf("U-Boot = %s\n", bd->bi_r_version);
301 printf("CPU = %s\n", bd->bi_cpu);
302 printf("Board = %s\n", bd->bi_board_name);
0c277ef9
TT
303 print_mhz("VCO", bd->bi_vco);
304 print_mhz("CCLK", bd->bi_cclk);
305 print_mhz("SCLK", bd->bi_sclk);
8dc48d71 306
5902e8f7
ML
307 print_num("boot_params", (ulong)bd->bi_boot_params);
308 print_num("memstart", (ulong)bd->bi_memstart);
309 print_lnum("memsize", (u64)bd->bi_memsize);
310 print_num("flashstart", (ulong)bd->bi_flashstart);
311 print_num("flashsize", (ulong)bd->bi_flashsize);
312 print_num("flashoffset", (ulong)bd->bi_flashoffset);
8dc48d71 313
de2dff6f 314 print_eth(0);
50a47d05 315 printf("ip_addr = %s\n", getenv("ipaddr"));
8e261575 316 printf("baudrate = %u bps\n", gd->baudrate);
8dc48d71
MF
317
318 return 0;
319}
320
c99ea790 321#elif defined(CONFIG_MIPS)
8bde7f77 322
5902e8f7 323int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8bde7f77 324{
8bde7f77
WD
325 bd_t *bd = gd->bd;
326
5902e8f7
ML
327 print_num("boot_params", (ulong)bd->bi_boot_params);
328 print_num("memstart", (ulong)bd->bi_memstart);
329 print_lnum("memsize", (u64)bd->bi_memsize);
330 print_num("flashstart", (ulong)bd->bi_flashstart);
331 print_num("flashsize", (ulong)bd->bi_flashsize);
332 print_num("flashoffset", (ulong)bd->bi_flashoffset);
8bde7f77 333
de2dff6f 334 print_eth(0);
50a47d05 335 printf("ip_addr = %s\n", getenv("ipaddr"));
8e261575 336 printf("baudrate = %u bps\n", gd->baudrate);
8bde7f77
WD
337
338 return 0;
339}
8bde7f77 340
c99ea790
RM
341#elif defined(CONFIG_AVR32)
342
5902e8f7 343int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
c99ea790
RM
344{
345 bd_t *bd = gd->bd;
346
5902e8f7 347 print_num("boot_params", (ulong)bd->bi_boot_params);
a752a8b4
AB
348 print_num("memstart", (ulong)bd->bi_dram[0].start);
349 print_lnum("memsize", (u64)bd->bi_dram[0].size);
5902e8f7
ML
350 print_num("flashstart", (ulong)bd->bi_flashstart);
351 print_num("flashsize", (ulong)bd->bi_flashsize);
352 print_num("flashoffset", (ulong)bd->bi_flashoffset);
c99ea790
RM
353
354 print_eth(0);
50a47d05 355 printf("ip_addr = %s\n", getenv("ipaddr"));
8e261575 356 printf("baudrate = %u bps\n", gd->baudrate);
c99ea790
RM
357
358 return 0;
359}
360
361#elif defined(CONFIG_ARM)
8bde7f77 362
0e350f81
JH
363static int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc,
364 char * const argv[])
8bde7f77 365{
8bde7f77
WD
366 int i;
367 bd_t *bd = gd->bd;
368
5902e8f7
ML
369 print_num("arch_number", bd->bi_arch_number);
370 print_num("boot_params", (ulong)bd->bi_boot_params);
8bde7f77 371
5902e8f7 372 for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
8bde7f77
WD
373 print_num("DRAM bank", i);
374 print_num("-> start", bd->bi_dram[i].start);
375 print_num("-> size", bd->bi_dram[i].size);
376 }
377
a41dbbd9 378#if defined(CONFIG_CMD_NET)
9fc6a06a 379 print_eths();
a41dbbd9 380#endif
8e261575 381 printf("baudrate = %u bps\n", gd->baudrate);
e47f2db5 382#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
34fd5d25 383 print_num("TLB addr", gd->arch.tlb_addr);
f1d2b313 384#endif
5902e8f7
ML
385 print_num("relocaddr", gd->relocaddr);
386 print_num("reloc off", gd->reloc_off);
387 print_num("irq_sp", gd->irq_sp); /* irq stack pointer */
388 print_num("sp start ", gd->start_addr_sp);
c8fcd0f2 389#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
5902e8f7 390 print_num("FB base ", gd->fb_base);
c8fcd0f2 391#endif
8f5d4687
HM
392 /*
393 * TODO: Currently only support for davinci SOC's is added.
394 * Remove this check once all the board implement this.
395 */
396#ifdef CONFIG_CLOCKS
397 printf("ARM frequency = %ld MHz\n", gd->bd->bi_arm_freq);
398 printf("DSP frequency = %ld MHz\n", gd->bd->bi_dsp_freq);
399 printf("DDR frequency = %ld MHz\n", gd->bd->bi_ddr_freq);
400#endif
8bde7f77
WD
401 return 0;
402}
403
ebd0d062
NI
404#elif defined(CONFIG_SH)
405
5902e8f7 406int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
ebd0d062
NI
407{
408 bd_t *bd = gd->bd;
5902e8f7
ML
409 print_num("mem start ", (ulong)bd->bi_memstart);
410 print_lnum("mem size ", (u64)bd->bi_memsize);
411 print_num("flash start ", (ulong)bd->bi_flashstart);
412 print_num("flash size ", (ulong)bd->bi_flashsize);
413 print_num("flash offset ", (ulong)bd->bi_flashoffset);
ebd0d062
NI
414
415#if defined(CONFIG_CMD_NET)
416 print_eth(0);
50a47d05 417 printf("ip_addr = %s\n", getenv("ipaddr"));
ebd0d062 418#endif
8e261575 419 printf("baudrate = %u bps\n", gd->baudrate);
ebd0d062
NI
420 return 0;
421}
422
a806ee6f
GR
423#elif defined(CONFIG_X86)
424
5902e8f7 425int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
a806ee6f
GR
426{
427 int i;
428 bd_t *bd = gd->bd;
a806ee6f 429
5902e8f7
ML
430 print_num("boot_params", (ulong)bd->bi_boot_params);
431 print_num("bi_memstart", bd->bi_memstart);
432 print_num("bi_memsize", bd->bi_memsize);
433 print_num("bi_flashstart", bd->bi_flashstart);
434 print_num("bi_flashsize", bd->bi_flashsize);
435 print_num("bi_flashoffset", bd->bi_flashoffset);
436 print_num("bi_sramstart", bd->bi_sramstart);
437 print_num("bi_sramsize", bd->bi_sramsize);
438 print_num("bi_bootflags", bd->bi_bootflags);
0c277ef9
TT
439 print_mhz("cpufreq", bd->bi_intfreq);
440 print_mhz("busfreq", bd->bi_busfreq);
5902e8f7
ML
441
442 for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
a806ee6f
GR
443 print_num("DRAM bank", i);
444 print_num("-> start", bd->bi_dram[i].start);
445 print_num("-> size", bd->bi_dram[i].size);
446 }
447
448#if defined(CONFIG_CMD_NET)
449 print_eth(0);
50a47d05 450 printf("ip_addr = %s\n", getenv("ipaddr"));
0c277ef9 451 print_mhz("ethspeed", bd->bi_ethspeed);
a806ee6f 452#endif
8e261575 453 printf("baudrate = %u bps\n", gd->baudrate);
a806ee6f
GR
454
455 return 0;
456}
457
6fcc3be4
SG
458#elif defined(CONFIG_SANDBOX)
459
460int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
461{
462 int i;
463 bd_t *bd = gd->bd;
464
465 print_num("boot_params", (ulong)bd->bi_boot_params);
466
467 for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
468 print_num("DRAM bank", i);
469 print_num("-> start", bd->bi_dram[i].start);
470 print_num("-> size", bd->bi_dram[i].size);
471 }
472
473#if defined(CONFIG_CMD_NET)
474 print_eth(0);
50a47d05 475 printf("ip_addr = %s\n", getenv("ipaddr"));
6fcc3be4 476#endif
c8fcd0f2 477#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
6fcc3be4 478 print_num("FB base ", gd->fb_base);
c8fcd0f2 479#endif
6fcc3be4
SG
480 return 0;
481}
482
64d61461
ML
483#elif defined(CONFIG_NDS32)
484
485int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
486{
487 int i;
488 bd_t *bd = gd->bd;
489
490 print_num("arch_number", bd->bi_arch_number);
491 print_num("boot_params", (ulong)bd->bi_boot_params);
492
493 for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
494 print_num("DRAM bank", i);
495 print_num("-> start", bd->bi_dram[i].start);
496 print_num("-> size", bd->bi_dram[i].size);
497 }
498
499#if defined(CONFIG_CMD_NET)
500 print_eth(0);
50a47d05 501 printf("ip_addr = %s\n", getenv("ipaddr"));
64d61461 502#endif
8e261575 503 printf("baudrate = %u bps\n", gd->baudrate);
64d61461
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504
505 return 0;
506}
507
2be9fdbf
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508#elif defined(CONFIG_OPENRISC)
509
510int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
511{
512 bd_t *bd = gd->bd;
513
514 print_num("mem start", (ulong)bd->bi_memstart);
515 print_lnum("mem size", (u64)bd->bi_memsize);
516 print_num("flash start", (ulong)bd->bi_flashstart);
517 print_num("flash size", (ulong)bd->bi_flashsize);
518 print_num("flash offset", (ulong)bd->bi_flashoffset);
519
520#if defined(CONFIG_CMD_NET)
521 print_eth(0);
50a47d05 522 printf("ip_addr = %s\n", getenv("ipaddr"));
2be9fdbf
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523#endif
524
8e261575 525 printf("baudrate = %u bps\n", gd->baudrate);
2be9fdbf
SK
526
527 return 0;
528}
529
946f6f24 530#elif defined(CONFIG_ARC)
bc5d5428
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531
532int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
533{
534 bd_t *bd = gd->bd;
535
536 print_num("mem start", bd->bi_memstart);
537 print_lnum("mem size", bd->bi_memsize);
538
539#if defined(CONFIG_CMD_NET)
540 print_eth(0);
541 printf("ip_addr = %s\n", getenv("ipaddr"));
542#endif
8e261575 543 printf("baudrate = %d bps\n", gd->baudrate);
bc5d5428
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544
545 return 0;
546}
547
c99ea790
RM
548#else
549 #error "a case for this architecture does not exist!"
550#endif
8bde7f77 551
8bde7f77
WD
552/* -------------------------------------------------------------------- */
553
0d498393
WD
554U_BOOT_CMD(
555 bdinfo, 1, 1, do_bdinfo,
2fb2604d 556 "print Board Info structure",
a89c33db 557 ""
8bde7f77 558);