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Commit | Line | Data |
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8bde7f77 WD |
1 | /* |
2 | * (C) Copyright 2003 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
8bde7f77 WD |
6 | */ |
7 | ||
8 | /* | |
9 | * Boot support | |
10 | */ | |
11 | #include <common.h> | |
12 | #include <command.h> | |
d88af4da | 13 | #include <linux/compiler.h> |
8bde7f77 | 14 | |
d87080b7 | 15 | DECLARE_GLOBAL_DATA_PTR; |
8bde7f77 | 16 | |
d88af4da MF |
17 | __maybe_unused |
18 | static void print_num(const char *name, ulong value) | |
19 | { | |
20 | printf("%-12s= 0x%08lX\n", name, value); | |
21 | } | |
8bde7f77 | 22 | |
5f3dfadc | 23 | __maybe_unused |
d88af4da MF |
24 | static void print_eth(int idx) |
25 | { | |
26 | char name[10], *val; | |
27 | if (idx) | |
28 | sprintf(name, "eth%iaddr", idx); | |
29 | else | |
30 | strcpy(name, "ethaddr"); | |
31 | val = getenv(name); | |
32 | if (!val) | |
33 | val = "(not set)"; | |
34 | printf("%-12s= %s\n", name, val); | |
35 | } | |
de2dff6f | 36 | |
05c3e68f | 37 | #ifndef CONFIG_DM_ETH |
9fc6a06a MS |
38 | __maybe_unused |
39 | static void print_eths(void) | |
40 | { | |
41 | struct eth_device *dev; | |
42 | int i = 0; | |
43 | ||
44 | do { | |
45 | dev = eth_get_dev_by_index(i); | |
46 | if (dev) { | |
47 | printf("eth%dname = %s\n", i, dev->name); | |
48 | print_eth(i); | |
49 | i++; | |
50 | } | |
51 | } while (dev); | |
52 | ||
53 | printf("current eth = %s\n", eth_get_name()); | |
54 | printf("ip_addr = %s\n", getenv("ipaddr")); | |
55 | } | |
05c3e68f | 56 | #endif |
9fc6a06a | 57 | |
d88af4da | 58 | __maybe_unused |
47708457 | 59 | static void print_lnum(const char *name, unsigned long long value) |
d88af4da MF |
60 | { |
61 | printf("%-12s= 0x%.8llX\n", name, value); | |
62 | } | |
63 | ||
64 | __maybe_unused | |
65 | static void print_mhz(const char *name, unsigned long hz) | |
66 | { | |
67 | char buf[32]; | |
68 | ||
69 | printf("%-12s= %6s MHz\n", name, strmhz(buf, hz)); | |
70 | } | |
8bde7f77 | 71 | |
c99ea790 | 72 | #if defined(CONFIG_PPC) |
e7939464 YS |
73 | void __weak board_detail(void) |
74 | { | |
75 | /* Please define boot_detail() for your platform */ | |
76 | } | |
8bde7f77 | 77 | |
5902e8f7 | 78 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
8bde7f77 | 79 | { |
8bde7f77 | 80 | bd_t *bd = gd->bd; |
8bde7f77 WD |
81 | |
82 | #ifdef DEBUG | |
5902e8f7 ML |
83 | print_num("bd address", (ulong)bd); |
84 | #endif | |
85 | print_num("memstart", bd->bi_memstart); | |
86 | print_lnum("memsize", bd->bi_memsize); | |
87 | print_num("flashstart", bd->bi_flashstart); | |
88 | print_num("flashsize", bd->bi_flashsize); | |
89 | print_num("flashoffset", bd->bi_flashoffset); | |
90 | print_num("sramstart", bd->bi_sramstart); | |
91 | print_num("sramsize", bd->bi_sramsize); | |
92 | #if defined(CONFIG_5xx) || defined(CONFIG_8xx) || \ | |
58dac327 | 93 | defined(CONFIG_MPC8260) || defined(CONFIG_E500) |
5902e8f7 ML |
94 | print_num("immr_base", bd->bi_immr_base); |
95 | #endif | |
96 | print_num("bootflags", bd->bi_bootflags); | |
3fb85889 | 97 | #if defined(CONFIG_405EP) || \ |
5902e8f7 ML |
98 | defined(CONFIG_405GP) || \ |
99 | defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \ | |
100 | defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \ | |
101 | defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \ | |
102 | defined(CONFIG_XILINX_405) | |
0c277ef9 TT |
103 | print_mhz("procfreq", bd->bi_procfreq); |
104 | print_mhz("plb_busfreq", bd->bi_plb_busfreq); | |
5902e8f7 ML |
105 | #if defined(CONFIG_405EP) || defined(CONFIG_405GP) || \ |
106 | defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \ | |
107 | defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \ | |
108 | defined(CONFIG_440SPE) || defined(CONFIG_XILINX_405) | |
0c277ef9 | 109 | print_mhz("pci_busfreq", bd->bi_pci_busfreq); |
8bde7f77 | 110 | #endif |
3fb85889 | 111 | #else /* ! CONFIG_405GP, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */ |
9c4c5ae3 | 112 | #if defined(CONFIG_CPM2) |
0c277ef9 TT |
113 | print_mhz("vco", bd->bi_vco); |
114 | print_mhz("sccfreq", bd->bi_sccfreq); | |
115 | print_mhz("brgfreq", bd->bi_brgfreq); | |
8bde7f77 | 116 | #endif |
0c277ef9 | 117 | print_mhz("intfreq", bd->bi_intfreq); |
9c4c5ae3 | 118 | #if defined(CONFIG_CPM2) |
0c277ef9 | 119 | print_mhz("cpmfreq", bd->bi_cpmfreq); |
8bde7f77 | 120 | #endif |
0c277ef9 | 121 | print_mhz("busfreq", bd->bi_busfreq); |
3fb85889 | 122 | #endif /* CONFIG_405GP, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */ |
03f5c550 | 123 | |
34e210f5 TT |
124 | #ifdef CONFIG_ENABLE_36BIT_PHYS |
125 | #ifdef CONFIG_PHYS_64BIT | |
126 | puts("addressing = 36-bit\n"); | |
127 | #else | |
128 | puts("addressing = 32-bit\n"); | |
129 | #endif | |
130 | #endif | |
131 | ||
de2dff6f | 132 | print_eth(0); |
e2ffd59b | 133 | #if defined(CONFIG_HAS_ETH1) |
de2dff6f | 134 | print_eth(1); |
03f5c550 | 135 | #endif |
e2ffd59b | 136 | #if defined(CONFIG_HAS_ETH2) |
de2dff6f | 137 | print_eth(2); |
42d1f039 | 138 | #endif |
e2ffd59b | 139 | #if defined(CONFIG_HAS_ETH3) |
de2dff6f | 140 | print_eth(3); |
03f5c550 | 141 | #endif |
c68a05fe | 142 | #if defined(CONFIG_HAS_ETH4) |
de2dff6f | 143 | print_eth(4); |
c68a05fe | 144 | #endif |
c68a05fe | 145 | #if defined(CONFIG_HAS_ETH5) |
de2dff6f | 146 | print_eth(5); |
c68a05fe | 147 | #endif |
148 | ||
50a47d05 | 149 | printf("IP addr = %s\n", getenv("ipaddr")); |
8e261575 | 150 | printf("baudrate = %6u bps\n", gd->baudrate); |
5902e8f7 | 151 | print_num("relocaddr", gd->relocaddr); |
e7939464 | 152 | board_detail(); |
8bde7f77 WD |
153 | return 0; |
154 | } | |
155 | ||
c99ea790 | 156 | #elif defined(CONFIG_NIOS2) |
5c952cf0 | 157 | |
5902e8f7 | 158 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
5c952cf0 | 159 | { |
5c952cf0 WD |
160 | bd_t *bd = gd->bd; |
161 | ||
5902e8f7 ML |
162 | print_num("mem start", (ulong)bd->bi_memstart); |
163 | print_lnum("mem size", (u64)bd->bi_memsize); | |
164 | print_num("flash start", (ulong)bd->bi_flashstart); | |
165 | print_num("flash size", (ulong)bd->bi_flashsize); | |
166 | print_num("flash offset", (ulong)bd->bi_flashoffset); | |
5c952cf0 | 167 | |
6d0f6bcf | 168 | #if defined(CONFIG_SYS_SRAM_BASE) |
5c952cf0 WD |
169 | print_num ("sram start", (ulong)bd->bi_sramstart); |
170 | print_num ("sram size", (ulong)bd->bi_sramsize); | |
171 | #endif | |
172 | ||
90253178 | 173 | #if defined(CONFIG_CMD_NET) |
de2dff6f | 174 | print_eth(0); |
50a47d05 | 175 | printf("ip_addr = %s\n", getenv("ipaddr")); |
5c952cf0 WD |
176 | #endif |
177 | ||
8e261575 | 178 | printf("baudrate = %u bps\n", gd->baudrate); |
5c952cf0 WD |
179 | |
180 | return 0; | |
181 | } | |
c99ea790 RM |
182 | |
183 | #elif defined(CONFIG_MICROBLAZE) | |
cfc67116 | 184 | |
5902e8f7 | 185 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
cfc67116 | 186 | { |
cfc67116 | 187 | bd_t *bd = gd->bd; |
e945f6dc MS |
188 | int i; |
189 | ||
190 | for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) { | |
191 | print_num("DRAM bank", i); | |
192 | print_num("-> start", bd->bi_dram[i].start); | |
193 | print_num("-> size", bd->bi_dram[i].size); | |
194 | } | |
195 | ||
5902e8f7 ML |
196 | print_num("flash start ", (ulong)bd->bi_flashstart); |
197 | print_num("flash size ", (ulong)bd->bi_flashsize); | |
198 | print_num("flash offset ", (ulong)bd->bi_flashoffset); | |
6d0f6bcf | 199 | #if defined(CONFIG_SYS_SRAM_BASE) |
5902e8f7 ML |
200 | print_num("sram start ", (ulong)bd->bi_sramstart); |
201 | print_num("sram size ", (ulong)bd->bi_sramsize); | |
cfc67116 | 202 | #endif |
90253178 | 203 | #if defined(CONFIG_CMD_NET) |
9fc6a06a | 204 | print_eths(); |
cfc67116 | 205 | #endif |
8e261575 | 206 | printf("baudrate = %u bps\n", gd->baudrate); |
e945f6dc MS |
207 | print_num("relocaddr", gd->relocaddr); |
208 | print_num("reloc off", gd->reloc_off); | |
de86765b MS |
209 | print_num("fdt_blob", (ulong)gd->fdt_blob); |
210 | print_num("new_fdt", (ulong)gd->new_fdt); | |
211 | print_num("fdt_size", (ulong)gd->fdt_size); | |
e945f6dc | 212 | |
cfc67116 MS |
213 | return 0; |
214 | } | |
4a551709 | 215 | |
c99ea790 RM |
216 | #elif defined(CONFIG_SPARC) |
217 | ||
54841ab5 | 218 | int do_bdinfo(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
00ab32c8 DH |
219 | { |
220 | bd_t *bd = gd->bd; | |
00ab32c8 DH |
221 | |
222 | #ifdef DEBUG | |
223 | print_num("bd address ", (ulong) bd); | |
224 | #endif | |
225 | print_num("memstart ", bd->bi_memstart); | |
b57ca3e1 | 226 | print_lnum("memsize ", bd->bi_memsize); |
00ab32c8 | 227 | print_num("flashstart ", bd->bi_flashstart); |
6d0f6bcf | 228 | print_num("CONFIG_SYS_MONITOR_BASE ", CONFIG_SYS_MONITOR_BASE); |
0e8d1586 | 229 | print_num("CONFIG_ENV_ADDR ", CONFIG_ENV_ADDR); |
d97f01a6 | 230 | printf("CONFIG_SYS_RELOC_MONITOR_BASE = 0x%x (%d)\n", CONFIG_SYS_RELOC_MONITOR_BASE, |
6d0f6bcf | 231 | CONFIG_SYS_MONITOR_LEN); |
d97f01a6 | 232 | printf("CONFIG_SYS_MALLOC_BASE = 0x%x (%d)\n", CONFIG_SYS_MALLOC_BASE, |
6d0f6bcf | 233 | CONFIG_SYS_MALLOC_LEN); |
d97f01a6 | 234 | printf("CONFIG_SYS_INIT_SP_OFFSET = 0x%x (%d)\n", CONFIG_SYS_INIT_SP_OFFSET, |
6d0f6bcf | 235 | CONFIG_SYS_STACK_SIZE); |
d97f01a6 | 236 | printf("CONFIG_SYS_PROM_OFFSET = 0x%x (%d)\n", CONFIG_SYS_PROM_OFFSET, |
6d0f6bcf | 237 | CONFIG_SYS_PROM_SIZE); |
d97f01a6 | 238 | printf("CONFIG_SYS_GBL_DATA_OFFSET = 0x%x (%d)\n", CONFIG_SYS_GBL_DATA_OFFSET, |
25ddd1fb | 239 | GENERATED_GBL_DATA_SIZE); |
00ab32c8 DH |
240 | |
241 | #if defined(CONFIG_CMD_NET) | |
de2dff6f | 242 | print_eth(0); |
50a47d05 | 243 | printf("ip_addr = %s\n", getenv("ipaddr")); |
00ab32c8 | 244 | #endif |
8e261575 | 245 | printf("baudrate = %6u bps\n", gd->baudrate); |
00ab32c8 DH |
246 | return 0; |
247 | } | |
248 | ||
c99ea790 RM |
249 | #elif defined(CONFIG_M68K) |
250 | ||
5902e8f7 | 251 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
8e585f02 | 252 | { |
8e585f02 | 253 | bd_t *bd = gd->bd; |
8ae158cd | 254 | |
5902e8f7 ML |
255 | print_num("memstart", (ulong)bd->bi_memstart); |
256 | print_lnum("memsize", (u64)bd->bi_memsize); | |
257 | print_num("flashstart", (ulong)bd->bi_flashstart); | |
258 | print_num("flashsize", (ulong)bd->bi_flashsize); | |
259 | print_num("flashoffset", (ulong)bd->bi_flashoffset); | |
6d0f6bcf | 260 | #if defined(CONFIG_SYS_INIT_RAM_ADDR) |
5902e8f7 ML |
261 | print_num("sramstart", (ulong)bd->bi_sramstart); |
262 | print_num("sramsize", (ulong)bd->bi_sramsize); | |
8e585f02 | 263 | #endif |
6d0f6bcf | 264 | #if defined(CONFIG_SYS_MBAR) |
5902e8f7 | 265 | print_num("mbar", bd->bi_mbar_base); |
8e585f02 | 266 | #endif |
0c277ef9 TT |
267 | print_mhz("cpufreq", bd->bi_intfreq); |
268 | print_mhz("busfreq", bd->bi_busfreq); | |
8ae158cd | 269 | #ifdef CONFIG_PCI |
0c277ef9 | 270 | print_mhz("pcifreq", bd->bi_pcifreq); |
8ae158cd TL |
271 | #endif |
272 | #ifdef CONFIG_EXTRA_CLOCK | |
0c277ef9 TT |
273 | print_mhz("flbfreq", bd->bi_flbfreq); |
274 | print_mhz("inpfreq", bd->bi_inpfreq); | |
275 | print_mhz("vcofreq", bd->bi_vcofreq); | |
8ae158cd | 276 | #endif |
26667b7f | 277 | #if defined(CONFIG_CMD_NET) |
de2dff6f | 278 | print_eth(0); |
8e585f02 | 279 | #if defined(CONFIG_HAS_ETH1) |
de2dff6f | 280 | print_eth(1); |
8e585f02 | 281 | #endif |
8e585f02 | 282 | #if defined(CONFIG_HAS_ETH2) |
de2dff6f | 283 | print_eth(2); |
8e585f02 | 284 | #endif |
8e585f02 | 285 | #if defined(CONFIG_HAS_ETH3) |
de2dff6f | 286 | print_eth(3); |
8e585f02 TL |
287 | #endif |
288 | ||
50a47d05 | 289 | printf("ip_addr = %s\n", getenv("ipaddr")); |
26667b7f | 290 | #endif |
8e261575 | 291 | printf("baudrate = %u bps\n", gd->baudrate); |
8e585f02 TL |
292 | |
293 | return 0; | |
294 | } | |
295 | ||
8dc48d71 | 296 | #elif defined(CONFIG_BLACKFIN) |
c99ea790 | 297 | |
54841ab5 | 298 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
8dc48d71 | 299 | { |
8dc48d71 MF |
300 | bd_t *bd = gd->bd; |
301 | ||
302 | printf("U-Boot = %s\n", bd->bi_r_version); | |
303 | printf("CPU = %s\n", bd->bi_cpu); | |
304 | printf("Board = %s\n", bd->bi_board_name); | |
0c277ef9 TT |
305 | print_mhz("VCO", bd->bi_vco); |
306 | print_mhz("CCLK", bd->bi_cclk); | |
307 | print_mhz("SCLK", bd->bi_sclk); | |
8dc48d71 | 308 | |
5902e8f7 ML |
309 | print_num("boot_params", (ulong)bd->bi_boot_params); |
310 | print_num("memstart", (ulong)bd->bi_memstart); | |
311 | print_lnum("memsize", (u64)bd->bi_memsize); | |
312 | print_num("flashstart", (ulong)bd->bi_flashstart); | |
313 | print_num("flashsize", (ulong)bd->bi_flashsize); | |
314 | print_num("flashoffset", (ulong)bd->bi_flashoffset); | |
8dc48d71 | 315 | |
de2dff6f | 316 | print_eth(0); |
50a47d05 | 317 | printf("ip_addr = %s\n", getenv("ipaddr")); |
8e261575 | 318 | printf("baudrate = %u bps\n", gd->baudrate); |
8dc48d71 MF |
319 | |
320 | return 0; | |
321 | } | |
322 | ||
c99ea790 | 323 | #elif defined(CONFIG_MIPS) |
8bde7f77 | 324 | |
5902e8f7 | 325 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
8bde7f77 | 326 | { |
8bde7f77 WD |
327 | bd_t *bd = gd->bd; |
328 | ||
5902e8f7 ML |
329 | print_num("boot_params", (ulong)bd->bi_boot_params); |
330 | print_num("memstart", (ulong)bd->bi_memstart); | |
331 | print_lnum("memsize", (u64)bd->bi_memsize); | |
332 | print_num("flashstart", (ulong)bd->bi_flashstart); | |
333 | print_num("flashsize", (ulong)bd->bi_flashsize); | |
334 | print_num("flashoffset", (ulong)bd->bi_flashoffset); | |
8bde7f77 | 335 | |
de2dff6f | 336 | print_eth(0); |
50a47d05 | 337 | printf("ip_addr = %s\n", getenv("ipaddr")); |
8e261575 | 338 | printf("baudrate = %u bps\n", gd->baudrate); |
8bde7f77 WD |
339 | |
340 | return 0; | |
341 | } | |
8bde7f77 | 342 | |
c99ea790 RM |
343 | #elif defined(CONFIG_AVR32) |
344 | ||
5902e8f7 | 345 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
c99ea790 RM |
346 | { |
347 | bd_t *bd = gd->bd; | |
348 | ||
5902e8f7 | 349 | print_num("boot_params", (ulong)bd->bi_boot_params); |
a752a8b4 AB |
350 | print_num("memstart", (ulong)bd->bi_dram[0].start); |
351 | print_lnum("memsize", (u64)bd->bi_dram[0].size); | |
5902e8f7 ML |
352 | print_num("flashstart", (ulong)bd->bi_flashstart); |
353 | print_num("flashsize", (ulong)bd->bi_flashsize); | |
354 | print_num("flashoffset", (ulong)bd->bi_flashoffset); | |
c99ea790 RM |
355 | |
356 | print_eth(0); | |
50a47d05 | 357 | printf("ip_addr = %s\n", getenv("ipaddr")); |
8e261575 | 358 | printf("baudrate = %u bps\n", gd->baudrate); |
c99ea790 RM |
359 | |
360 | return 0; | |
361 | } | |
362 | ||
363 | #elif defined(CONFIG_ARM) | |
8bde7f77 | 364 | |
0e350f81 JH |
365 | static int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, |
366 | char * const argv[]) | |
8bde7f77 | 367 | { |
8bde7f77 WD |
368 | int i; |
369 | bd_t *bd = gd->bd; | |
370 | ||
5902e8f7 ML |
371 | print_num("arch_number", bd->bi_arch_number); |
372 | print_num("boot_params", (ulong)bd->bi_boot_params); | |
8bde7f77 | 373 | |
5902e8f7 | 374 | for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) { |
8bde7f77 WD |
375 | print_num("DRAM bank", i); |
376 | print_num("-> start", bd->bi_dram[i].start); | |
377 | print_num("-> size", bd->bi_dram[i].size); | |
378 | } | |
379 | ||
ff973800 | 380 | #if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH) |
9fc6a06a | 381 | print_eths(); |
a41dbbd9 | 382 | #endif |
8e261575 | 383 | printf("baudrate = %u bps\n", gd->baudrate); |
e47f2db5 | 384 | #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) |
34fd5d25 | 385 | print_num("TLB addr", gd->arch.tlb_addr); |
f1d2b313 | 386 | #endif |
5902e8f7 ML |
387 | print_num("relocaddr", gd->relocaddr); |
388 | print_num("reloc off", gd->reloc_off); | |
389 | print_num("irq_sp", gd->irq_sp); /* irq stack pointer */ | |
390 | print_num("sp start ", gd->start_addr_sp); | |
c8fcd0f2 | 391 | #if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) |
5902e8f7 | 392 | print_num("FB base ", gd->fb_base); |
c8fcd0f2 | 393 | #endif |
8f5d4687 HM |
394 | /* |
395 | * TODO: Currently only support for davinci SOC's is added. | |
396 | * Remove this check once all the board implement this. | |
397 | */ | |
398 | #ifdef CONFIG_CLOCKS | |
399 | printf("ARM frequency = %ld MHz\n", gd->bd->bi_arm_freq); | |
400 | printf("DSP frequency = %ld MHz\n", gd->bd->bi_dsp_freq); | |
401 | printf("DDR frequency = %ld MHz\n", gd->bd->bi_ddr_freq); | |
402 | #endif | |
8bde7f77 WD |
403 | return 0; |
404 | } | |
405 | ||
ebd0d062 NI |
406 | #elif defined(CONFIG_SH) |
407 | ||
5902e8f7 | 408 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
ebd0d062 NI |
409 | { |
410 | bd_t *bd = gd->bd; | |
5902e8f7 ML |
411 | print_num("mem start ", (ulong)bd->bi_memstart); |
412 | print_lnum("mem size ", (u64)bd->bi_memsize); | |
413 | print_num("flash start ", (ulong)bd->bi_flashstart); | |
414 | print_num("flash size ", (ulong)bd->bi_flashsize); | |
415 | print_num("flash offset ", (ulong)bd->bi_flashoffset); | |
ebd0d062 NI |
416 | |
417 | #if defined(CONFIG_CMD_NET) | |
418 | print_eth(0); | |
50a47d05 | 419 | printf("ip_addr = %s\n", getenv("ipaddr")); |
ebd0d062 | 420 | #endif |
8e261575 | 421 | printf("baudrate = %u bps\n", gd->baudrate); |
ebd0d062 NI |
422 | return 0; |
423 | } | |
424 | ||
a806ee6f GR |
425 | #elif defined(CONFIG_X86) |
426 | ||
5902e8f7 | 427 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
a806ee6f GR |
428 | { |
429 | int i; | |
430 | bd_t *bd = gd->bd; | |
a806ee6f | 431 | |
5902e8f7 ML |
432 | print_num("boot_params", (ulong)bd->bi_boot_params); |
433 | print_num("bi_memstart", bd->bi_memstart); | |
434 | print_num("bi_memsize", bd->bi_memsize); | |
435 | print_num("bi_flashstart", bd->bi_flashstart); | |
436 | print_num("bi_flashsize", bd->bi_flashsize); | |
437 | print_num("bi_flashoffset", bd->bi_flashoffset); | |
438 | print_num("bi_sramstart", bd->bi_sramstart); | |
439 | print_num("bi_sramsize", bd->bi_sramsize); | |
440 | print_num("bi_bootflags", bd->bi_bootflags); | |
0c277ef9 TT |
441 | print_mhz("cpufreq", bd->bi_intfreq); |
442 | print_mhz("busfreq", bd->bi_busfreq); | |
5902e8f7 ML |
443 | |
444 | for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) { | |
a806ee6f GR |
445 | print_num("DRAM bank", i); |
446 | print_num("-> start", bd->bi_dram[i].start); | |
447 | print_num("-> size", bd->bi_dram[i].size); | |
448 | } | |
449 | ||
450 | #if defined(CONFIG_CMD_NET) | |
451 | print_eth(0); | |
50a47d05 | 452 | printf("ip_addr = %s\n", getenv("ipaddr")); |
0c277ef9 | 453 | print_mhz("ethspeed", bd->bi_ethspeed); |
a806ee6f | 454 | #endif |
8e261575 | 455 | printf("baudrate = %u bps\n", gd->baudrate); |
a806ee6f GR |
456 | |
457 | return 0; | |
458 | } | |
459 | ||
6fcc3be4 SG |
460 | #elif defined(CONFIG_SANDBOX) |
461 | ||
462 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) | |
463 | { | |
464 | int i; | |
465 | bd_t *bd = gd->bd; | |
466 | ||
467 | print_num("boot_params", (ulong)bd->bi_boot_params); | |
468 | ||
469 | for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) { | |
470 | print_num("DRAM bank", i); | |
471 | print_num("-> start", bd->bi_dram[i].start); | |
472 | print_num("-> size", bd->bi_dram[i].size); | |
473 | } | |
474 | ||
475 | #if defined(CONFIG_CMD_NET) | |
476 | print_eth(0); | |
50a47d05 | 477 | printf("ip_addr = %s\n", getenv("ipaddr")); |
6fcc3be4 | 478 | #endif |
c8fcd0f2 | 479 | #if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) |
6fcc3be4 | 480 | print_num("FB base ", gd->fb_base); |
c8fcd0f2 | 481 | #endif |
6fcc3be4 SG |
482 | return 0; |
483 | } | |
484 | ||
64d61461 ML |
485 | #elif defined(CONFIG_NDS32) |
486 | ||
487 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) | |
488 | { | |
489 | int i; | |
490 | bd_t *bd = gd->bd; | |
491 | ||
492 | print_num("arch_number", bd->bi_arch_number); | |
493 | print_num("boot_params", (ulong)bd->bi_boot_params); | |
494 | ||
495 | for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) { | |
496 | print_num("DRAM bank", i); | |
497 | print_num("-> start", bd->bi_dram[i].start); | |
498 | print_num("-> size", bd->bi_dram[i].size); | |
499 | } | |
500 | ||
501 | #if defined(CONFIG_CMD_NET) | |
502 | print_eth(0); | |
50a47d05 | 503 | printf("ip_addr = %s\n", getenv("ipaddr")); |
64d61461 | 504 | #endif |
8e261575 | 505 | printf("baudrate = %u bps\n", gd->baudrate); |
64d61461 ML |
506 | |
507 | return 0; | |
508 | } | |
509 | ||
2be9fdbf SK |
510 | #elif defined(CONFIG_OPENRISC) |
511 | ||
512 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) | |
513 | { | |
514 | bd_t *bd = gd->bd; | |
515 | ||
516 | print_num("mem start", (ulong)bd->bi_memstart); | |
517 | print_lnum("mem size", (u64)bd->bi_memsize); | |
518 | print_num("flash start", (ulong)bd->bi_flashstart); | |
519 | print_num("flash size", (ulong)bd->bi_flashsize); | |
520 | print_num("flash offset", (ulong)bd->bi_flashoffset); | |
521 | ||
522 | #if defined(CONFIG_CMD_NET) | |
523 | print_eth(0); | |
50a47d05 | 524 | printf("ip_addr = %s\n", getenv("ipaddr")); |
2be9fdbf SK |
525 | #endif |
526 | ||
8e261575 | 527 | printf("baudrate = %u bps\n", gd->baudrate); |
2be9fdbf SK |
528 | |
529 | return 0; | |
530 | } | |
531 | ||
946f6f24 | 532 | #elif defined(CONFIG_ARC) |
bc5d5428 AB |
533 | |
534 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) | |
535 | { | |
536 | bd_t *bd = gd->bd; | |
537 | ||
538 | print_num("mem start", bd->bi_memstart); | |
539 | print_lnum("mem size", bd->bi_memsize); | |
540 | ||
541 | #if defined(CONFIG_CMD_NET) | |
542 | print_eth(0); | |
543 | printf("ip_addr = %s\n", getenv("ipaddr")); | |
544 | #endif | |
8e261575 | 545 | printf("baudrate = %d bps\n", gd->baudrate); |
bc5d5428 AB |
546 | |
547 | return 0; | |
548 | } | |
549 | ||
c99ea790 RM |
550 | #else |
551 | #error "a case for this architecture does not exist!" | |
552 | #endif | |
8bde7f77 | 553 | |
8bde7f77 WD |
554 | /* -------------------------------------------------------------------- */ |
555 | ||
0d498393 WD |
556 | U_BOOT_CMD( |
557 | bdinfo, 1, 1, do_bdinfo, | |
2fb2604d | 558 | "print Board Info structure", |
a89c33db | 559 | "" |
8bde7f77 | 560 | ); |