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CommitLineData
8bde7f77
WD
1/*
2 * (C) Copyright 2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * Boot support
26 */
27#include <common.h>
28#include <command.h>
d88af4da 29#include <linux/compiler.h>
8bde7f77 30
d87080b7 31DECLARE_GLOBAL_DATA_PTR;
8bde7f77 32
d88af4da
MF
33__maybe_unused
34static void print_num(const char *name, ulong value)
35{
36 printf("%-12s= 0x%08lX\n", name, value);
37}
8bde7f77 38
5f3dfadc 39__maybe_unused
d88af4da
MF
40static void print_eth(int idx)
41{
42 char name[10], *val;
43 if (idx)
44 sprintf(name, "eth%iaddr", idx);
45 else
46 strcpy(name, "ethaddr");
47 val = getenv(name);
48 if (!val)
49 val = "(not set)";
50 printf("%-12s= %s\n", name, val);
51}
de2dff6f 52
9fc6a06a
MS
53__maybe_unused
54static void print_eths(void)
55{
56 struct eth_device *dev;
57 int i = 0;
58
59 do {
60 dev = eth_get_dev_by_index(i);
61 if (dev) {
62 printf("eth%dname = %s\n", i, dev->name);
63 print_eth(i);
64 i++;
65 }
66 } while (dev);
67
68 printf("current eth = %s\n", eth_get_name());
69 printf("ip_addr = %s\n", getenv("ipaddr"));
70}
71
d88af4da 72__maybe_unused
47708457 73static void print_lnum(const char *name, unsigned long long value)
d88af4da
MF
74{
75 printf("%-12s= 0x%.8llX\n", name, value);
76}
77
78__maybe_unused
79static void print_mhz(const char *name, unsigned long hz)
80{
81 char buf[32];
82
83 printf("%-12s= %6s MHz\n", name, strmhz(buf, hz));
84}
8bde7f77 85
c99ea790 86#if defined(CONFIG_PPC)
8bde7f77 87
5902e8f7 88int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8bde7f77 89{
8bde7f77 90 bd_t *bd = gd->bd;
8bde7f77
WD
91
92#ifdef DEBUG
5902e8f7
ML
93 print_num("bd address", (ulong)bd);
94#endif
95 print_num("memstart", bd->bi_memstart);
96 print_lnum("memsize", bd->bi_memsize);
97 print_num("flashstart", bd->bi_flashstart);
98 print_num("flashsize", bd->bi_flashsize);
99 print_num("flashoffset", bd->bi_flashoffset);
100 print_num("sramstart", bd->bi_sramstart);
101 print_num("sramsize", bd->bi_sramsize);
102#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || \
103 defined(CONFIG_8260) || defined(CONFIG_E500)
104 print_num("immr_base", bd->bi_immr_base);
105#endif
106 print_num("bootflags", bd->bi_bootflags);
107#if defined(CONFIG_405CR) || defined(CONFIG_405EP) || \
108 defined(CONFIG_405GP) || \
109 defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \
110 defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \
111 defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
112 defined(CONFIG_XILINX_405)
0c277ef9
TT
113 print_mhz("procfreq", bd->bi_procfreq);
114 print_mhz("plb_busfreq", bd->bi_plb_busfreq);
5902e8f7
ML
115#if defined(CONFIG_405EP) || defined(CONFIG_405GP) || \
116 defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \
117 defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \
118 defined(CONFIG_440SPE) || defined(CONFIG_XILINX_405)
0c277ef9 119 print_mhz("pci_busfreq", bd->bi_pci_busfreq);
8bde7f77 120#endif
9fea65a6 121#else /* ! CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */
9c4c5ae3 122#if defined(CONFIG_CPM2)
0c277ef9
TT
123 print_mhz("vco", bd->bi_vco);
124 print_mhz("sccfreq", bd->bi_sccfreq);
125 print_mhz("brgfreq", bd->bi_brgfreq);
8bde7f77 126#endif
0c277ef9 127 print_mhz("intfreq", bd->bi_intfreq);
9c4c5ae3 128#if defined(CONFIG_CPM2)
0c277ef9 129 print_mhz("cpmfreq", bd->bi_cpmfreq);
8bde7f77 130#endif
0c277ef9 131 print_mhz("busfreq", bd->bi_busfreq);
9fea65a6 132#endif /* CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */
03f5c550 133
34e210f5
TT
134#ifdef CONFIG_ENABLE_36BIT_PHYS
135#ifdef CONFIG_PHYS_64BIT
136 puts("addressing = 36-bit\n");
137#else
138 puts("addressing = 32-bit\n");
139#endif
140#endif
141
de2dff6f 142 print_eth(0);
e2ffd59b 143#if defined(CONFIG_HAS_ETH1)
de2dff6f 144 print_eth(1);
03f5c550 145#endif
e2ffd59b 146#if defined(CONFIG_HAS_ETH2)
de2dff6f 147 print_eth(2);
42d1f039 148#endif
e2ffd59b 149#if defined(CONFIG_HAS_ETH3)
de2dff6f 150 print_eth(3);
03f5c550 151#endif
c68a05fe 152#if defined(CONFIG_HAS_ETH4)
de2dff6f 153 print_eth(4);
c68a05fe 154#endif
c68a05fe 155#if defined(CONFIG_HAS_ETH5)
de2dff6f 156 print_eth(5);
c68a05fe 157#endif
158
8bde7f77 159#ifdef CONFIG_HERMES
0c277ef9 160 print_mhz("ethspeed", bd->bi_ethspeed);
8bde7f77 161#endif
50a47d05 162 printf("IP addr = %s\n", getenv("ipaddr"));
a7e5ee9e 163 printf("baudrate = %6u bps\n", bd->bi_baudrate);
5902e8f7 164 print_num("relocaddr", gd->relocaddr);
8bde7f77
WD
165 return 0;
166}
167
c99ea790 168#elif defined(CONFIG_NIOS2)
5c952cf0 169
5902e8f7 170int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
5c952cf0 171{
5c952cf0
WD
172 bd_t *bd = gd->bd;
173
5902e8f7
ML
174 print_num("mem start", (ulong)bd->bi_memstart);
175 print_lnum("mem size", (u64)bd->bi_memsize);
176 print_num("flash start", (ulong)bd->bi_flashstart);
177 print_num("flash size", (ulong)bd->bi_flashsize);
178 print_num("flash offset", (ulong)bd->bi_flashoffset);
5c952cf0 179
6d0f6bcf 180#if defined(CONFIG_SYS_SRAM_BASE)
5c952cf0
WD
181 print_num ("sram start", (ulong)bd->bi_sramstart);
182 print_num ("sram size", (ulong)bd->bi_sramsize);
183#endif
184
90253178 185#if defined(CONFIG_CMD_NET)
de2dff6f 186 print_eth(0);
50a47d05 187 printf("ip_addr = %s\n", getenv("ipaddr"));
5c952cf0
WD
188#endif
189
7fffe2fa 190 printf("baudrate = %u bps\n", bd->bi_baudrate);
5c952cf0
WD
191
192 return 0;
193}
c99ea790
RM
194
195#elif defined(CONFIG_MICROBLAZE)
cfc67116 196
5902e8f7 197int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
cfc67116 198{
cfc67116 199 bd_t *bd = gd->bd;
5902e8f7
ML
200 print_num("mem start ", (ulong)bd->bi_memstart);
201 print_lnum("mem size ", (u64)bd->bi_memsize);
202 print_num("flash start ", (ulong)bd->bi_flashstart);
203 print_num("flash size ", (ulong)bd->bi_flashsize);
204 print_num("flash offset ", (ulong)bd->bi_flashoffset);
6d0f6bcf 205#if defined(CONFIG_SYS_SRAM_BASE)
5902e8f7
ML
206 print_num("sram start ", (ulong)bd->bi_sramstart);
207 print_num("sram size ", (ulong)bd->bi_sramsize);
cfc67116 208#endif
90253178 209#if defined(CONFIG_CMD_NET)
9fc6a06a 210 print_eths();
cfc67116 211#endif
82b6a476 212 printf("baudrate = %u bps\n", bd->bi_baudrate);
cfc67116
MS
213 return 0;
214}
4a551709 215
c99ea790
RM
216#elif defined(CONFIG_SPARC)
217
54841ab5 218int do_bdinfo(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
00ab32c8
DH
219{
220 bd_t *bd = gd->bd;
00ab32c8
DH
221
222#ifdef DEBUG
223 print_num("bd address ", (ulong) bd);
224#endif
225 print_num("memstart ", bd->bi_memstart);
b57ca3e1 226 print_lnum("memsize ", bd->bi_memsize);
00ab32c8 227 print_num("flashstart ", bd->bi_flashstart);
6d0f6bcf 228 print_num("CONFIG_SYS_MONITOR_BASE ", CONFIG_SYS_MONITOR_BASE);
0e8d1586 229 print_num("CONFIG_ENV_ADDR ", CONFIG_ENV_ADDR);
d97f01a6 230 printf("CONFIG_SYS_RELOC_MONITOR_BASE = 0x%x (%d)\n", CONFIG_SYS_RELOC_MONITOR_BASE,
6d0f6bcf 231 CONFIG_SYS_MONITOR_LEN);
d97f01a6 232 printf("CONFIG_SYS_MALLOC_BASE = 0x%x (%d)\n", CONFIG_SYS_MALLOC_BASE,
6d0f6bcf 233 CONFIG_SYS_MALLOC_LEN);
d97f01a6 234 printf("CONFIG_SYS_INIT_SP_OFFSET = 0x%x (%d)\n", CONFIG_SYS_INIT_SP_OFFSET,
6d0f6bcf 235 CONFIG_SYS_STACK_SIZE);
d97f01a6 236 printf("CONFIG_SYS_PROM_OFFSET = 0x%x (%d)\n", CONFIG_SYS_PROM_OFFSET,
6d0f6bcf 237 CONFIG_SYS_PROM_SIZE);
d97f01a6 238 printf("CONFIG_SYS_GBL_DATA_OFFSET = 0x%x (%d)\n", CONFIG_SYS_GBL_DATA_OFFSET,
25ddd1fb 239 GENERATED_GBL_DATA_SIZE);
00ab32c8
DH
240
241#if defined(CONFIG_CMD_NET)
de2dff6f 242 print_eth(0);
50a47d05 243 printf("ip_addr = %s\n", getenv("ipaddr"));
00ab32c8 244#endif
a8f1f1cd 245 printf("baudrate = %6u bps\n", bd->bi_baudrate);
00ab32c8
DH
246 return 0;
247}
248
c99ea790
RM
249#elif defined(CONFIG_M68K)
250
5902e8f7 251int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8e585f02 252{
8e585f02 253 bd_t *bd = gd->bd;
8ae158cd 254
5902e8f7
ML
255 print_num("memstart", (ulong)bd->bi_memstart);
256 print_lnum("memsize", (u64)bd->bi_memsize);
257 print_num("flashstart", (ulong)bd->bi_flashstart);
258 print_num("flashsize", (ulong)bd->bi_flashsize);
259 print_num("flashoffset", (ulong)bd->bi_flashoffset);
6d0f6bcf 260#if defined(CONFIG_SYS_INIT_RAM_ADDR)
5902e8f7
ML
261 print_num("sramstart", (ulong)bd->bi_sramstart);
262 print_num("sramsize", (ulong)bd->bi_sramsize);
8e585f02 263#endif
6d0f6bcf 264#if defined(CONFIG_SYS_MBAR)
5902e8f7 265 print_num("mbar", bd->bi_mbar_base);
8e585f02 266#endif
0c277ef9
TT
267 print_mhz("cpufreq", bd->bi_intfreq);
268 print_mhz("busfreq", bd->bi_busfreq);
8ae158cd 269#ifdef CONFIG_PCI
0c277ef9 270 print_mhz("pcifreq", bd->bi_pcifreq);
8ae158cd
TL
271#endif
272#ifdef CONFIG_EXTRA_CLOCK
0c277ef9
TT
273 print_mhz("flbfreq", bd->bi_flbfreq);
274 print_mhz("inpfreq", bd->bi_inpfreq);
275 print_mhz("vcofreq", bd->bi_vcofreq);
8ae158cd 276#endif
26667b7f 277#if defined(CONFIG_CMD_NET)
de2dff6f 278 print_eth(0);
8e585f02 279#if defined(CONFIG_HAS_ETH1)
de2dff6f 280 print_eth(1);
8e585f02 281#endif
8e585f02 282#if defined(CONFIG_HAS_ETH2)
de2dff6f 283 print_eth(2);
8e585f02 284#endif
8e585f02 285#if defined(CONFIG_HAS_ETH3)
de2dff6f 286 print_eth(3);
8e585f02
TL
287#endif
288
50a47d05 289 printf("ip_addr = %s\n", getenv("ipaddr"));
26667b7f 290#endif
f5a5b3c5 291 printf("baudrate = %u bps\n", bd->bi_baudrate);
8e585f02
TL
292
293 return 0;
294}
295
8dc48d71 296#elif defined(CONFIG_BLACKFIN)
c99ea790 297
54841ab5 298int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8dc48d71 299{
8dc48d71
MF
300 bd_t *bd = gd->bd;
301
302 printf("U-Boot = %s\n", bd->bi_r_version);
303 printf("CPU = %s\n", bd->bi_cpu);
304 printf("Board = %s\n", bd->bi_board_name);
0c277ef9
TT
305 print_mhz("VCO", bd->bi_vco);
306 print_mhz("CCLK", bd->bi_cclk);
307 print_mhz("SCLK", bd->bi_sclk);
8dc48d71 308
5902e8f7
ML
309 print_num("boot_params", (ulong)bd->bi_boot_params);
310 print_num("memstart", (ulong)bd->bi_memstart);
311 print_lnum("memsize", (u64)bd->bi_memsize);
312 print_num("flashstart", (ulong)bd->bi_flashstart);
313 print_num("flashsize", (ulong)bd->bi_flashsize);
314 print_num("flashoffset", (ulong)bd->bi_flashoffset);
8dc48d71 315
de2dff6f 316 print_eth(0);
50a47d05 317 printf("ip_addr = %s\n", getenv("ipaddr"));
5e84e5a7 318 printf("baudrate = %u bps\n", bd->bi_baudrate);
8dc48d71
MF
319
320 return 0;
321}
322
c99ea790 323#elif defined(CONFIG_MIPS)
8bde7f77 324
5902e8f7 325int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8bde7f77 326{
8bde7f77
WD
327 bd_t *bd = gd->bd;
328
5902e8f7
ML
329 print_num("boot_params", (ulong)bd->bi_boot_params);
330 print_num("memstart", (ulong)bd->bi_memstart);
331 print_lnum("memsize", (u64)bd->bi_memsize);
332 print_num("flashstart", (ulong)bd->bi_flashstart);
333 print_num("flashsize", (ulong)bd->bi_flashsize);
334 print_num("flashoffset", (ulong)bd->bi_flashoffset);
8bde7f77 335
de2dff6f 336 print_eth(0);
50a47d05 337 printf("ip_addr = %s\n", getenv("ipaddr"));
8dc22b00 338 printf("baudrate = %u bps\n", bd->bi_baudrate);
8bde7f77
WD
339
340 return 0;
341}
8bde7f77 342
c99ea790
RM
343#elif defined(CONFIG_AVR32)
344
5902e8f7 345int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
c99ea790
RM
346{
347 bd_t *bd = gd->bd;
348
5902e8f7
ML
349 print_num("boot_params", (ulong)bd->bi_boot_params);
350 print_num("memstart", (ulong)bd->bi_memstart);
351 print_lnum("memsize", (u64)bd->bi_memsize);
352 print_num("flashstart", (ulong)bd->bi_flashstart);
353 print_num("flashsize", (ulong)bd->bi_flashsize);
354 print_num("flashoffset", (ulong)bd->bi_flashoffset);
c99ea790
RM
355
356 print_eth(0);
50a47d05 357 printf("ip_addr = %s\n", getenv("ipaddr"));
15dc95d4 358 printf("baudrate = %u bps\n", bd->bi_baudrate);
c99ea790
RM
359
360 return 0;
361}
362
363#elif defined(CONFIG_ARM)
8bde7f77 364
5902e8f7 365int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8bde7f77 366{
8bde7f77
WD
367 int i;
368 bd_t *bd = gd->bd;
369
5902e8f7
ML
370 print_num("arch_number", bd->bi_arch_number);
371 print_num("boot_params", (ulong)bd->bi_boot_params);
8bde7f77 372
5902e8f7 373 for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
8bde7f77
WD
374 print_num("DRAM bank", i);
375 print_num("-> start", bd->bi_dram[i].start);
376 print_num("-> size", bd->bi_dram[i].size);
377 }
378
a41dbbd9 379#if defined(CONFIG_CMD_NET)
9fc6a06a 380 print_eths();
a41dbbd9 381#endif
e46e31a8 382 printf("baudrate = %u bps\n", bd->bi_baudrate);
e47f2db5 383#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
34fd5d25 384 print_num("TLB addr", gd->arch.tlb_addr);
f1d2b313 385#endif
5902e8f7
ML
386 print_num("relocaddr", gd->relocaddr);
387 print_num("reloc off", gd->reloc_off);
388 print_num("irq_sp", gd->irq_sp); /* irq stack pointer */
389 print_num("sp start ", gd->start_addr_sp);
c8fcd0f2 390#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
5902e8f7 391 print_num("FB base ", gd->fb_base);
c8fcd0f2 392#endif
8f5d4687
HM
393 /*
394 * TODO: Currently only support for davinci SOC's is added.
395 * Remove this check once all the board implement this.
396 */
397#ifdef CONFIG_CLOCKS
398 printf("ARM frequency = %ld MHz\n", gd->bd->bi_arm_freq);
399 printf("DSP frequency = %ld MHz\n", gd->bd->bi_dsp_freq);
400 printf("DDR frequency = %ld MHz\n", gd->bd->bi_ddr_freq);
401#endif
8bde7f77
WD
402 return 0;
403}
404
ebd0d062
NI
405#elif defined(CONFIG_SH)
406
5902e8f7 407int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
ebd0d062
NI
408{
409 bd_t *bd = gd->bd;
5902e8f7
ML
410 print_num("mem start ", (ulong)bd->bi_memstart);
411 print_lnum("mem size ", (u64)bd->bi_memsize);
412 print_num("flash start ", (ulong)bd->bi_flashstart);
413 print_num("flash size ", (ulong)bd->bi_flashsize);
414 print_num("flash offset ", (ulong)bd->bi_flashoffset);
ebd0d062
NI
415
416#if defined(CONFIG_CMD_NET)
417 print_eth(0);
50a47d05 418 printf("ip_addr = %s\n", getenv("ipaddr"));
ebd0d062 419#endif
ecd4551f 420 printf("baudrate = %u bps\n", bd->bi_baudrate);
ebd0d062
NI
421 return 0;
422}
423
a806ee6f
GR
424#elif defined(CONFIG_X86)
425
5902e8f7 426int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
a806ee6f
GR
427{
428 int i;
429 bd_t *bd = gd->bd;
a806ee6f 430
5902e8f7
ML
431 print_num("boot_params", (ulong)bd->bi_boot_params);
432 print_num("bi_memstart", bd->bi_memstart);
433 print_num("bi_memsize", bd->bi_memsize);
434 print_num("bi_flashstart", bd->bi_flashstart);
435 print_num("bi_flashsize", bd->bi_flashsize);
436 print_num("bi_flashoffset", bd->bi_flashoffset);
437 print_num("bi_sramstart", bd->bi_sramstart);
438 print_num("bi_sramsize", bd->bi_sramsize);
439 print_num("bi_bootflags", bd->bi_bootflags);
0c277ef9
TT
440 print_mhz("cpufreq", bd->bi_intfreq);
441 print_mhz("busfreq", bd->bi_busfreq);
5902e8f7
ML
442
443 for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
a806ee6f
GR
444 print_num("DRAM bank", i);
445 print_num("-> start", bd->bi_dram[i].start);
446 print_num("-> size", bd->bi_dram[i].size);
447 }
448
449#if defined(CONFIG_CMD_NET)
450 print_eth(0);
50a47d05 451 printf("ip_addr = %s\n", getenv("ipaddr"));
0c277ef9 452 print_mhz("ethspeed", bd->bi_ethspeed);
a806ee6f 453#endif
55f97c1b 454 printf("baudrate = %u bps\n", bd->bi_baudrate);
a806ee6f
GR
455
456 return 0;
457}
458
6fcc3be4
SG
459#elif defined(CONFIG_SANDBOX)
460
461int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
462{
463 int i;
464 bd_t *bd = gd->bd;
465
466 print_num("boot_params", (ulong)bd->bi_boot_params);
467
468 for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
469 print_num("DRAM bank", i);
470 print_num("-> start", bd->bi_dram[i].start);
471 print_num("-> size", bd->bi_dram[i].size);
472 }
473
474#if defined(CONFIG_CMD_NET)
475 print_eth(0);
50a47d05 476 printf("ip_addr = %s\n", getenv("ipaddr"));
6fcc3be4 477#endif
c8fcd0f2 478#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
6fcc3be4 479 print_num("FB base ", gd->fb_base);
c8fcd0f2 480#endif
6fcc3be4
SG
481 return 0;
482}
483
64d61461
ML
484#elif defined(CONFIG_NDS32)
485
486int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
487{
488 int i;
489 bd_t *bd = gd->bd;
490
491 print_num("arch_number", bd->bi_arch_number);
492 print_num("boot_params", (ulong)bd->bi_boot_params);
493
494 for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
495 print_num("DRAM bank", i);
496 print_num("-> start", bd->bi_dram[i].start);
497 print_num("-> size", bd->bi_dram[i].size);
498 }
499
500#if defined(CONFIG_CMD_NET)
501 print_eth(0);
50a47d05 502 printf("ip_addr = %s\n", getenv("ipaddr"));
64d61461 503#endif
a25356d7 504 printf("baudrate = %u bps\n", bd->bi_baudrate);
64d61461
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505
506 return 0;
507}
508
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509#elif defined(CONFIG_OPENRISC)
510
511int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
512{
513 bd_t *bd = gd->bd;
514
515 print_num("mem start", (ulong)bd->bi_memstart);
516 print_lnum("mem size", (u64)bd->bi_memsize);
517 print_num("flash start", (ulong)bd->bi_flashstart);
518 print_num("flash size", (ulong)bd->bi_flashsize);
519 print_num("flash offset", (ulong)bd->bi_flashoffset);
520
521#if defined(CONFIG_CMD_NET)
522 print_eth(0);
50a47d05 523 printf("ip_addr = %s\n", getenv("ipaddr"));
2be9fdbf
SK
524#endif
525
7a68e330 526 printf("baudrate = %u bps\n", bd->bi_baudrate);
2be9fdbf
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527
528 return 0;
529}
530
c99ea790
RM
531#else
532 #error "a case for this architecture does not exist!"
533#endif
8bde7f77 534
8bde7f77
WD
535/* -------------------------------------------------------------------- */
536
0d498393
WD
537U_BOOT_CMD(
538 bdinfo, 1, 1, do_bdinfo,
2fb2604d 539 "print Board Info structure",
a89c33db 540 ""
8bde7f77 541);