]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - gas/ChangeLog
projects / thirdparty / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
[gdb,testsuite,doc,NEWS] Fix "the the".
[thirdparty/binutils-gdb.git] / gas / ChangeLog
CommitLineData
3c968de5
NC		 12020-03-06 Nick Clifton <nickc@redhat.com>
2
3 PR 25572
4 * as.c (main): Allow matching input and outputs when they are
5 not regular files.
6
bc49bfd8
JB		 72020-03-06 Jan Beulich <jbeulich@suse.com>
8
9 * config/tc-i386.c (match_mem_size): Generalize broadcast special
10 casing.
11 (check_VecOperands): Zap xmmword/ymmword/zmmword when more than
12 one of byte/word/dword/qword is set alongside a SIMD register in
13 a template's operand.
14
4873e243
JB		 152020-03-06 Jan Beulich <jbeulich@suse.com>
16
17 * config/tc-i386.c (match_template): Extend code in logic
18 rejecting certain suffixes in certain modes to also cover mask
19 register use and VecSIB. Drop special casing of broadcast. Skip
20 immediates in the check.
21
e365e234
JB		 222020-03-06 Jan Beulich <jbeulich@suse.com>
23
24 * config/tc-i386.c (match_template): Fold duplicate code in
25 logic rejecting certain suffixes in certain modes. Drop
26 pointless "else".
27
4ed21b58
JB		 282020-03-06 Jan Beulich <jbeulich@suse.com>
29
30 * config/tc-i386.c (process_suffix): Exlucde !vexw insns
31 alongside !norex64 ones.
32 * testsuite/gas/i386/x86-64-avx512bw.s: Test VPEXTR* and VPINSR*
33 with both 32- and 64-bit GPR operands.
34 * testsuite/gas/i386/x86-64-avx512f.s: Test VEXTRACTPS with both
35 32- and 64-bit GPR operands.
36 * testsuite/gas/i386/x86-64-avx512bw-intel.d,
37 testsuite/gas/i386/x86-64-avx512bw.d,
38 testsuite/gas/i386/x86-64-avx512f-intel.d,
39 testsuite/gas/i386/x86-64-avx512f.d: Adjust expectations.
40
643bb870
JB		 412020-03-06 Jan Beulich <jbeulich@suse.com>
42
43 * config/tc-i386.c (md_assemble): Drop use of rex64.
44 (process_suffix): For REX.W for 64-bit CRC32.
45
a23b33b3
JB		 462020-03-06 Jan Beulich <jbeulich@suse.com>
47
48 * config/tc-i386.c (i386_addressing_mode): For 32-bit
49 addressing for MPX insns without base/index.
50 * testsuite/gas/i386/mpx-16bit.s,
51 * testsuite/gas/i386/mpx-16bit.d: New.
52 * testsuite/gas/i386/i386.exp: Run new test.
53
a0497384
JB		 542020-03-06 Jan Beulich <jbeulich@suse.com>
55
56 * testsuite/gas/i386/adx.s, testsuite/gas/i386/cet.s,
57 testsuite/gas/i386/ept.s, testsuite/gas/i386/fsgs.s,
58 testsuite/gas/i386/invpcid.s, testsuite/gas/i386/movdir.s,
59 testsuite/gas/i386/ptwrite.s, testsuite/gas/i386/vmx.s,
60 * testsuite/gas/i386/code16.s: Add CR, DR, and TR access cases
61 as well as a BSWAP one.
62 * testsuite/gas/i386/rdpid.s: Add 16-bit case.
63 * testsuite/gas/i386/sse2-16bit.s: Cover more insns.
64 * testsuite/gas/i386/adx-intel.d, testsuite/gas/i386/adx.d,
65 testsuite/gas/i386/cet-intel.d, testsuite/gas/i386/cet.d,
66 testsuite/gas/i386/code16.d, testsuite/gas/i386/ept-intel.d,
67 testsuite/gas/i386/ept.d, testsuite/gas/i386/fsgs-intel.d,
68 testsuite/gas/i386/fsgs.d, testsuite/gas/i386/invpcid-intel.d,
69 testsuite/gas/i386/invpcid.d, testsuite/gas/i386/movdir-intel.d,
70 testsuite/gas/i386/movdir.d, testsuite/gas/i386/ptwrite-intel.d,
71 testsuite/gas/i386/ptwrite.d, testsuite/gas/i386/rdpid-intel.d,
72 testsuite/gas/i386/rdpid.d, testsuite/gas/i386/sse2-16bit.d,
73 testsuite/gas/i386/vmx.d: Adjust expectations.
74
b630c145
JB		 752020-03-06 Jan Beulich <jbeulich@suse.com>
76
77 * config/tc-i386.c (md_assemble): Also exclude tpause and umwait
78 from having their operands swapped.
79 * testsuite/gas/i386/waitpkg.s,
80 testsuite/gas/i386/x86-64-waitpkg.s: Add tpause and umwait
81 3-operand cases as well as testing of 16-bit code generation.
82 * testsuite/gas/i386/waitpkg.d,
83 testsuite/gas/i386/waitpkg-intel.d,
84 testsuite/gas/i386/x86-64-waitpkg.d,
85 testsuite/gas/i386/x86-64-waitpkg-intel.d: Adjust expectations.
86
de48783e
NC		 872020-03-04 Nelson Chu <nelson.chu@sifive.com>
88
dee35d02
NC		 89 * config/tc-riscv.c (percent_op_utype): Support the modifier
90 %got_pcrel_hi.
91 * doc/c-riscv.texi: Add documentation.
92 * testsuite/gas/riscv/no-relax-reloc.d: Add test case for the new
93 modifier %got_pcrel_hi.
94 * testsuite/gas/riscv/no-relax-reloc.s: Likewise.
95 * testsuite/gas/riscv/relax-reloc.d: Likewise.
96 * testsuite/gas/riscv/relax-reloc.s: Likewise.
97
de48783e
NC		 98 * doc/c-riscv.texi (relocation modifiers): Add documentation.
99 (RISC-V-Formats): Update the section name from "Instruction Formats"
100 to "RISC-V Instruction Formats".
101
749479c8
AO		 1022020-03-04 Alexandre Oliva <oliva@adacore.com>
103
104 * config/tc-arm.c (md_apply_fix): Warn if a PC-relative load is
105 detected in a section which does not have at least 4 byte
106 alignment.
107 * testsuite/gas/arm/armv8-ar-it-bad.s: Add alignment directive.
108 * testsuite/gas/arm/ldr-t.s: Likewise.
109 * testsuite/gas/arm/sp-pc-usage-t.s: Likewise.
110 * testsuite/gas/arm/sp-pc-usage-t.d: Finish test at end of
111 disassembly, ignoring any NOPs that may have been inserted because
112 of section alignment.
113 * testsuite/gas/arm/ldr-t.d: Likewise.
114
a847e322
JB		 1152020-03-04 Jan Beulich <jbeulich@suse.com>
116
117 * config/tc-i386.c (cpu_arch): Add .sev_es entry.
118 * doc/c-i386.texi: Mention sev_es.
119 * testsuite/gas/i386/arch-13.s: Add SEV-ES case.
120 * testsuite/gas/i386/arch-13.d: Extend -march=. Adjust
121 expectations.
122 * testsuite/gas/i386/arch-13-znver1.d,
123 testsuite/gas/i386/arch-13-znver2.d: Extend -march=.
124
3cd7f3e3
L		 1252020-03-03 H.J. Lu <hongjiu.lu@intel.com>
126
127 * config/tc-i386.c (match_template): Replace ignoresize and
128 defaultsize with mnemonicsize.
129 (process_suffix): Likewise.
130
b8ba1385
SB		 1312020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
132
133 PR 25627
134 * config/tc-z80.c (emit_ld_rr_m): Fix invalid compilation of
135 instruction LD IY,(HL).
136 * testsuite/gas/z80/ez80_adl_all.d: Update expected disassembly.
137 * testsuite/gas/z80/ez80_adl_all.s: Add tests of the instruction.
138 * testsuite/gas/z80/ez80_z80_all.d: Update expected disassembly.
139 * testsuite/gas/z80/ez80_z80_all.s: Add tests of the instruction.
140
10d97a0f
L		 1412020-03-03 H.J. Lu <hongjiu.lu@intel.com>
142
143 PR gas/25622
144 * testsuite/gas/i386/i386.exp: Run x86-64-default-suffix and
145 x86-64-default-suffix-avx.
146 * testsuite/gas/i386/noreg64.s: Remove cvtsi2sd, cvtsi2ss,
147 vcvtsi2sd, vcvtsi2ss, vcvtusi2sd and vcvtusi2ss entries.
148 * testsuite/gas/i386/noreg64.d: Updated.
149 * testsuite/gas/i386/noreg64.l: Likewise.
150 * testsuite/gas/i386/x86-64-default-suffix-avx.d: New file.
151 * testsuite/gas/i386/x86-64-default-suffix.d: Likewise.
152 * testsuite/gas/i386/x86-64-default-suffix.s: Likewise.
153
8326546e
SB		 1542020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
155
156 PR 25604
157 * config/tc-z80.c (contains_register): Prevent an illegal memory
158 access when checking an expression for a register name.
159
e3e896e6
AM		 1602020-03-03 Alan Modra <amodra@gmail.com>
161
162 * config/obj-coff.h: Remove vestiges of coff-m68k and pe-mips
163 support.
164
a4dd6c97
AM		 1652020-03-02 Alan Modra <amodra@gmail.com>
166
167 * config/tc-m32r.c (md_begin): Set SEC_SMALL_DATA on .scommon section.
168 * config/tc-mips.c (s_change_sec): Set SEC_SMALL_DATA for .sdata
169 and .sbss sections.
170 * config/tc-score.c: Delete !BFD_ASSEMBLER code throughout.
171 (s3_s_change_sec): Set SEC_SMALL_DATA for .sbss section.
172 (s3_s_score_lcomm): Likewise.
173 * config/tc-score7.c: Similarly.
174 * read.c (bss_alloc): Set SEC_SMALL_DATA for .sbss section.
175
dec7b24b
YS		 1762020-02-28 YunQiang Su <syq@debian.org>
177
178 PR gas/25539
179 * config/tc-mips.c (fix_loongson3_llsc): Compare label value
180 to handle multi-labels.
181 (has_label_name): New.
182
cceb53b8
MM		 1832020-02-26 Matthew Malcomson <matthew.malcomson@arm.com>
184
185 * config/tc-arm.c (enum pred_instruction_type): Remove
186 NEUTRAL_IT_NO_VPT_INSN predication type.
187 (cxn_handle_predication): Modify to require condition suffixes.
188 (handle_pred_state): Remove NEUTRAL_IT_NO_VPT_INSN cases.
189 * testsuite/gas/arm/cde-scalar.s: Update test.
190 * testsuite/gas/arm/cde-warnings.l: Update test.
191 * testsuite/gas/arm/cde-warnings.s: Update test.
192
da3ec71f
AM		 1932020-02-26 Alan Modra <amodra@gmail.com>
194
195 * config/tc-arm.c (reg_expected_msgs[REG_TYPE_RNB]): Don't use
196 N_() on empty string.
197
42135cad
AM		 1982020-02-26 Alan Modra <amodra@gmail.com>
199
200 * read.c (read_a_source_file): Call strncpy with length one
201 less than size of original_case_string.
202
dc1e8a47
AM		 2032020-02-26 Alan Modra <amodra@gmail.com>
204
205 * config/obj-elf.c: Indent labels correctly.
206 * config/obj-macho.c: Likewise.
207 * config/tc-aarch64.c: Likewise.
208 * config/tc-alpha.c: Likewise.
209 * config/tc-arm.c: Likewise.
210 * config/tc-cr16.c: Likewise.
211 * config/tc-crx.c: Likewise.
212 * config/tc-frv.c: Likewise.
213 * config/tc-i386-intel.c: Likewise.
214 * config/tc-i386.c: Likewise.
215 * config/tc-ia64.c: Likewise.
216 * config/tc-mn10200.c: Likewise.
217 * config/tc-mn10300.c: Likewise.
218 * config/tc-nds32.c: Likewise.
219 * config/tc-riscv.c: Likewise.
220 * config/tc-s12z.c: Likewise.
221 * config/tc-xtensa.c: Likewise.
222 * config/tc-z80.c: Likewise.
223 * read.c: Likewise.
224 * symbols.c: Likewise.
225 * write.c: Likewise.
226
bd0cf5a6
NC		 2272020-02-20 Nelson Chu <nelson.chu@sifive.com>
228
54b2aec1
NC		 229 * config/tc-riscv.c (riscv_ip): New boolean insn_with_csr to indicate
230 we are assembling instruction with CSR. Call riscv_csr_read_only_check
231 after parsing all arguments.
232 (enum csr_insn_type): New enum is used to classify the CSR instruction.
233 (riscv_csr_insn_type, riscv_csr_read_only_check): New functions. These
234 are used to check if we write a read-only CSR by the CSR instruction.
235 * testsuite/gas/riscv/priv-reg-fail-read-only-01.s: New testcase. Test
236 all CSR for the read-only CSR checking.
237 * testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
238 * testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
239 * testsuite/gas/riscv/priv-reg-fail-read-only-02.s: New testcase. Test
240 all CSR instructions for the read-only CSR checking.
241 * testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise.
242 * testsuite/gas/riscv/priv-reg-fail-read-only-02.l: Likewise.
243
2ca89224
NC		 244 * config/tc-riscv.c (struct riscv_set_options): New field csr_check.
245 (riscv_opts): Initialize it.
246 (reg_lookup_internal): Check the `riscv_opts.csr_check`
247 before doing the CSR checking.
248 (enum options): Add OPTION_CSR_CHECK and OPTION_NO_CSR_CHECK.
249 (md_longopts): Add mcsr-check and mno-csr-check.
250 (md_parse_option): Handle new enum option values.
251 (s_riscv_option): Handle new long options.
252 * doc/c-riscv.texi: Add description for the new .option and assembler
253 options.
254 * testsuite/gas/riscv/priv-reg-fail-fext.d: Add `-mcsr-check` to enable
255 the CSR checking.
256 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
257
bd0cf5a6
NC		 258 * config/tc-riscv.c (csr_extra_hash): New.
259 (enum riscv_csr_class): New enum. Used to decide
260 whether or not this CSR is legal in the current ISA string.
261 (struct riscv_csr_extra): New structure to hold all extra information
262 of CSR.
263 (riscv_init_csr_hashes): New. According to the DECLARE_CSR and
264 DECLARE_CSR_ALIAS, insert CSR extra information into csr_extra_hash.
265 Call hash_reg_name to insert CSR address into reg_names_hash.
266 (reg_csr_lookup_internal, riscv_csr_class_check): New functions.
267 Decide whether the CSR is valid according to the csr_extra_hash.
268 (reg_lookup_internal): Call reg_csr_lookup_internal for CSRs.
269 (init_opcode_hash): Update 'if (hash_error != NULL)' as hash_error is
270 not a boolean. This is same as riscv_init_csr_hash, so keep the
271 consistent usage.
272 (md_begin): Call riscv_init_csr_hashes for each DECLARE_CSR.
273 * testsuite/gas/riscv/csr-dw-regnums.d: Add -march=rv32if option.
274 * testsuite/gas/riscv/priv-reg.d: Add f-ext by -march option.
275 * testsuite/gas/riscv/priv-reg-fail-fext.d: New testcase. The source
276 file is `priv-reg.s`, and the ISA is rv32i without f-ext, so the
277 f-ext CSR are not allowed.
278 * testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise.
279 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: New testcase. The
280 source file is `priv-reg.s`, and the ISA is rv64if, so the
281 rv32-only CSR are not allowed.
282 * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
283
10a95fcc
AM		 2842020-02-21 Alan Modra <amodra@gmail.com>
285
286 * config/tc-pdp11.c (md_apply_fix): Handle BFD_RELOC_32.
287 (tc_gen_reloc): Only give a BAD_CASE assertion on pcrel relocs.
288
dda2980f
AM		 2892020-02-21 Alan Modra <amodra@gmail.com>
290
291 PR 25569
292 * config/obj-aout.c (obj_aout_frob_file_before_fix): Don't loop
293 on section size adjustment, instead perform another write if
294 exec header size is larger than section size.
295
bd3380bc
NC		 2962020-02-19 Nelson Chu <nelson.chu@sifive.com>
297
298 * doc/c-riscv.texi: Add the doc entries for -march-attr/
299 -mno-arch-attr command line options.
300
fa164239
JW		 3012020-02-19 Nelson Chu <nelson.chu@sifive.com>
302
303 * testsuite/gas/riscv/c-add-addi.d: New testcase.
304 * testsuite/gas/riscv/c-add-addi.s: Likewise.
305
fcaaac0a
SB		 3062020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
307
308 PR 25576
309 * config/tc-z80.c (md_parse_option): Do not use an underscore
310 prefix for local labels in SDCC compatability mode.
311 (z80_start_line_hook): Remove SDCC dollar label support.
312 * testsuite/gas/z80/sdcc.d: Update expected disassembly.
313 * testsuite/gas/z80/sdcc.s: Likewise.
314
3152020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
316
317 PR 25517
318 * config/tc-z80.c: Add -march option.
319 * doc/as.texi: Update Z80 documentation.
320 * doc/c-z80.texi: Likewise.
321 * testsuite/gas/z80/ez80_adl_all.d: Update command line.
322 * testsuite/gas/z80/ez80_adl_suf.d: Likewise.
323 * testsuite/gas/z80/ez80_pref_dis.d: Likewise.
324 * testsuite/gas/z80/ez80_z80_all.d: Likewise.
325 * testsuite/gas/z80/ez80_z80_suf.d: Likewise.
326 * testsuite/gas/z80/gbz80_all.d: Likewise.
327 * testsuite/gas/z80/r800_extra.d: Likewise.
328 * testsuite/gas/z80/r800_ii8.d: Likewise.
329 * testsuite/gas/z80/r800_z80_doc.d: Likewise.
330 * testsuite/gas/z80/sdcc.d: Likewise.
331 * testsuite/gas/z80/z180.d: Likewise.
332 * testsuite/gas/z80/z180_z80_doc.d: Likewise.
333 * testsuite/gas/z80/z80_doc.d: Likewise.
334 * testsuite/gas/z80/z80_ii8.d: Likewise.
335 * testsuite/gas/z80/z80_in_f_c.d: Likewise.
336 * testsuite/gas/z80/z80_op_ii_ld.d: Likewise.
337 * testsuite/gas/z80/z80_out_c_0.d: Likewise.
338 * testsuite/gas/z80/z80_sli.d: Likewise.
339 * testsuite/gas/z80/z80n_all.d: Likewise.
340 * testsuite/gas/z80/z80n_reloc.d: Likewise.
341
a7e12755
L		 3422020-02-19 H.J. Lu <hongjiu.lu@intel.com>
343
344 * config/tc-i386.c (output_insn): Mark cvtpi2ps and cvtpi2pd
345 with GNU_PROPERTY_X86_FEATURE_2_MMX.
346 * testsuite/gas/i386/i386.exp: Run property-3 and
347 x86-64-property-3.
348 * testsuite/gas/i386/property-3.d: New file.
349 * testsuite/gas/i386/property-3.s: Likewise.
350 * testsuite/gas/i386/x86-64-property-3.d: Likewise.
351
272a84b1
L		 3522020-02-17 H.J. Lu <hongjiu.lu@intel.com>
353
354 * config/tc-i386.c (cpu_arch): Add .popcnt.
355 * doc/c-i386.texi: Remove abm and .abm. Add popcnt and .popcnt.
356 Add a tab before @samp{.sse4a}.
357
c8f8eebc
JB		 3582020-02-17 Jan Beulich <jbeulich@suse.com>
359
360 * config/tc-i386.c (process_suffix): Don't try to guess a suffix
361 for AddrPrefixOpReg templates. Combine the two pieces of
362 addrprefixopreg handling. Reject 16-bit address reg in 64-bit
363 mode.
364
eedb0f2c
JB		 3652020-02-17 Jan Beulich <jbeulich@suse.com>
366
367 PR gas/14439
368 * config/tc-i386.c (md_assemble): Also suppress operand
369 swapping for MONITOR{,X} and MWAIT{,X}.
370 * testsuite/gas/i386/sse3.s, testsuite/gas/i386/x86-64-sse3.s:
371 Add Intel syntax monitor/mwait tests.
372 * testsuite/gas/i386/sse3.d, testsuite/gas/i386/x86-64-sse3.d:
373 Adjust expectations.
374 *testsuite/gas/i386/sse3-intel.d,
375 testsuite/gas/i386/x86-64-sse3-intel.d: New.
376 * testsuite/gas/i386/i386.exp: Run new tests.
377
b9915cbc
JB		 3782020-02-17 Jan Beulich <jbeulich@suse.com>
379
380 PR gas/6518
381 * config/tc-i386.c (process_suffix): Re-work Intel-syntax
382 [XYZ]MMWord memory operand ambiguity recognition logic (largely
383 re-indentation).
384 * testsuite/gas/i386/avx512dq-inval.s: Add vcvtqq2ps/vcvtuqq2ps
385 cases.
386 * testsuite/gas/i386/inval-avx512f.s: Also test vcvtneps2bf16.
387 * testsuite/gas/i386/avx512dq-inval.l,
388 testsuite/gas/i386/inval-avx.l,
389 testsuite/gas/i386/inval-avx512f.l: Adjust expectations.
390 * testsuite/gas/i386/avx512vl-ambig.s,
391 testsuite/gas/i386/avx512vl-ambig.l: New.
392 * testsuite/gas/i386/i386.exp: Run new test.
393
af5c13b0
L		 3942020-02-16 H.J. Lu <hongjiu.lu@intel.com>
395
396 * config/tc-i386.c (cpu_arch): Add .sse4a and nosse4a. Restore
397 nosse4.
398 * doc/c-i386.texi: Document sse4a and nosse4a.
399
07d98387
L		 4002020-02-14 H.J. Lu <hongjiu.lu@intel.com>
401
402 * doc/c-i386.texi: Remove the old movsx and movzx documentation
403 for AT&T syntax.
404
65fca059
JB		 4052020-02-14 Jan Beulich <jbeulich@suse.com>
406
407 PR gas/25438
408 * config/tc-i386.c (md_assemble): Move movsx/movzx special
409 casing ...
410 (process_suffix): ... here. Consider just the first operand
411 initially.
412 (check_long_reg): Drop opcode 0x63 special case again.
413 * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,
414 testsuite/gas/i386/ilp32/x86-64.s, testsuite/gas/i386/x86_64.s:
415 Move ambiguous operand size tests ...
416 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
417 testsuite/gas/i386/noreg64.s: ... here.
418 * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d
419 testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,
420 testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
421 testsuite/gas/i386/movx16.l, testsuite/gas/i386/movx32.l,
422 testsuite/gas/i386/movx64.l, testsuite/gas/i386/noreg16.d,
423 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
424 testsuite/gas/i386/x86-64-movsxd.d,
425 testsuite/gas/i386/x86-64-movsxd-intel.d,
426 testsuite/gas/i386/x86_64.d, testsuite/gas/i386/x86_64-intel.d:
427 Adjust expectations.
428 * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,
429 testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,
430 testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.
431 * testsuite/gas/i386/i386.exp: Run new tests.
432
b6773884
JB		 4332020-02-14 Jan Beulich <jbeulich@suse.com>
434
435 * config/tc-i386.c (process_operands): Also skip segment
436 override prefix emission if it matches an already present one.
437 * testsuite/gas/i386/prefix32.s: Add double segment override
438 cases.
439 * testsuite/gas/i386/prefix32.l: Adjust expectations.
440
92334ad2
JB		 4412020-02-14 Jan Beulich <jbeulich@suse.com>
442
443 * config/tc-i386.c (process_operands): Drop ineffectual segment
444 overrides when optimizing.
445 * testsuite/gas/i386/lea-optimize.d: New.
446 * testsuite/gas/i386/i386.exp: Run new test.
447
4482020-02-14 Jan Beulich <jbeulich@suse.com>
514a8bb0
JB		 449
450 * config/tc-i386.c (process_operands): Also check insn prefix
451 for ineffectual segment override warning. Don't cover possible
452 VEX/EVEX encoded insns there.
453 * testsuite/gas/i386/lea.s, testsuite/gas/i386/lea.d,
454 testsuite/gas/i386/lea.e: New.
455 * testsuite/gas/i386/i386.exp: Run new test.
456
0e6724de
L		 4572020-02-14 H.J. Lu <hongjiu.lu@intel.com>
458
459 PR gas/25438
460 * doc/c-i386.texi: Document movsx, movsxd and movzx for AT&T
461 syntax.
462
292676c1
L		 4632020-02-13 Fangrui Song <maskray@google.com>
464 H.J. Lu <hongjiu.lu@intel.com>
465
466 PR gas/25551
467 * config/tc-i386.c (tc_i386_fix_adjustable): Don't check
468 BFD_RELOC_386_PLT32 nor BFD_RELOC_X86_64_PLT32.
469 * testsuite/gas/i386/i386.exp: Run relax-5 and x86-64-relax-4.
470 * testsuite/gas/i386/relax-5.d: New file.
471 * testsuite/gas/i386/relax-5.s: Likewise.
472 * testsuite/gas/i386/x86-64-relax-4.d: Likewise.
473 * testsuite/gas/i386/x86-64-relax-4.s: Likewise.
474
7deea9aa
JB		 4752020-02-13 Jan Beulich <jbeulich@suse.com>
476
477 * config/tc-i386.c (cpu_noarch): Use CPU_ANY_SSE4_FLAGS in
478 "nosse4" entry.
479
6c0946d0
JB		 4802020-02-12 Jan Beulich <jbeulich@suse.com>
481
482 * config/tc-i386.c (avx512): New (at file scope), moved from
483 (check_VecOperands): ... here.
484 (process_suffix): Add [XYZ]MMword operand size handling.
485 * testsuite/gas/i386/avx512dq-inval.s: Add VFPCLASS tests.
486 * testsuite/gas/i386/noavx512-2.s: Add Intel syntax VFPCLASS
487 tests.
488 * testsuite/gas/i386/avx512dq-inval.l,
489 testsuite/gas/i386/noavx512-2.l: Adjust expectations.
490
5990e377
JB		 4912020-02-12 Jan Beulich <jbeulich@suse.com>
492
493 PR gas/24546
494 * config/tc-i386.c (match_template): Apply AMD64 check to 64-bit
495 code only.
496 * config/tc-i386-intel.c (i386_intel_operand): Also handle
497 CALL/JMP in O_tbyte_ptr case.
498 * doc/c-i386.texi: Mention far call and full pointer load ISA
499 differences.
500 * testsuite/gas/i386/x86-64-branch-3.s,
501 testsuite/gas/i386/x86-64-intel64.s: Add 64-bit far call cases.
502 * testsuite/gas/i386/x86-64-branch-3.d,
503 testsuite/gas/i386/x86-64-intel64.d: Adjust expectations.
504 * testsuite/gas/i386/x86-64-branch-5.l,
505 testsuite/gas/i386/x86-64-branch-5.s: New.
506 * testsuite/gas/i386/i386.exp: Run new test.
507
9706160a
JB		 5082020-02-12 Jan Beulich <jbeulich@suse.com>
509
510 PR gas/25438
511 * config/tc-i386.c (REGISTER_WARNINGS): Delete.
512 (check_byte_reg): Skip only source operand of CRC32. Drop Non-
513 64-bit-only warning.
514 (check_word_reg): Consistently error on mismatching register
515 size and suffix.
516 * testsuite/gas/i386/general.s: Replace dword GPR with word one
517 for movw. Replace suffix / GPR for orb.
518 * testsuite/gas/i386/inval.s: Add tests for movw with dword and
519 byte GPRs as well as ones for inb/outb with a word accumulator.
520 * testsuite/gas/i386/general.l, testsuite/gas/i386/intelbad.l,
521 testsuite/gas/i386/inval.l: Adjust expectations.
522
5de4d9ef
JB		 5232020-02-12 Jan Beulich <jbeulich@suse.com>
524
525 * config/tc-i386.c (operand_type_register_match): Also fall
526 through initial two if()-s when the template allows for a GPR
527 operand. Adjust comment.
528
50128d0c
JB		 5292020-02-11 Jan Beulich <jbeulich@suse.com>
530
531 (struct _i386_insn): New field "short_form".
532 (optimize_encoding): Drop setting of shortform field.
533 (process_suffix): Set i.short_form. Replace shortform use.
534 (process_operands): Replace shortform use.
535
1ed818b4
MM		 5362020-02-11 Matthew Malcomson <matthew.malcomson@arm.com>
537
538 * config/tc-arm.c (vcx_handle_register_arguments): Remove `for`
539 loop initial declaration.
540
5aae9ae9
MM		 5412020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
542
543 * config/tc-arm.c (NEON_MAX_TYPE_ELS): Increment to account for
544 instructions that can have 5 arguments.
545 (enum operand_parse_code): Add new operands.
546 (parse_operands): Account for new operands.
547 (S5): New macro.
548 (enum neon_shape_el): Introduce P suffixes for coprocessor.
549 (neon_select_shape): Account for P suffix.
550 (LOW1): Move macro to global position.
551 (HI4): Move macro to global position.
552 (vcx_assign_vec_d): New.
553 (vcx_assign_vec_m): New.
554 (vcx_assign_vec_n): New.
555 (enum vcx_reg_type): New.
556 (vcx_get_reg_type): New.
557 (vcx_size_pos): New.
558 (vcx_vec_pos): New.
559 (vcx_handle_shape): New.
560 (vcx_ensure_register_in_range): New.
561 (vcx_handle_register_arguments): New.
562 (vcx_handle_insn_block): New.
563 (vcx_handle_common_checks): New.
564 (do_vcx1): New.
565 (do_vcx2): New.
566 (do_vcx3): New.
567 * testsuite/gas/arm/cde-missing-fp.d: New test.
568 * testsuite/gas/arm/cde-missing-fp.l: New test.
569 * testsuite/gas/arm/cde-missing-mve.d: New test.
570 * testsuite/gas/arm/cde-missing-mve.l: New test.
571 * testsuite/gas/arm/cde-mve-or-neon.d: New test.
572 * testsuite/gas/arm/cde-mve-or-neon.s: New test.
573 * testsuite/gas/arm/cde-mve.s: New test.
574 * testsuite/gas/arm/cde-warnings.l:
575 * testsuite/gas/arm/cde-warnings.s:
576 * testsuite/gas/arm/cde.d:
577 * testsuite/gas/arm/cde.s:
578
4934a27c
MM		 5792020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
580 Matthew Malcomson <matthew.malcomson@arm.com>
581
582 * config/tc-arm.c (arm_ext_cde*): New feature sets for each
583 CDE coprocessor that can be enabled.
584 (enum pred_instruction_type): New pred type.
585 (BAD_NO_VPT): New error message.
586 (BAD_CDE): New error message.
587 (BAD_CDE_COPROC): New error message.
588 (enum operand_parse_code): Add new immediate operands.
589 (parse_operands): Account for new immediate operands.
590 (check_cde_operand): New.
591 (cde_coproc_enabled): New.
592 (cde_coproc_pos): New.
593 (cde_handle_coproc): New.
594 (cxn_handle_predication): New.
595 (do_custom_instruction_1): New.
596 (do_custom_instruction_2): New.
597 (do_custom_instruction_3): New.
598 (do_cx1): New.
599 (do_cx1a): New.
600 (do_cx1d): New.
601 (do_cx1da): New.
602 (do_cx2): New.
603 (do_cx2a): New.
604 (do_cx2d): New.
605 (do_cx2da): New.
606 (do_cx3): New.
607 (do_cx3a): New.
608 (do_cx3d): New.
609 (do_cx3da): New.
610 (handle_pred_state): Define new IT block behaviour.
611 (insns): Add newn CX*{,d}{,a} instructions.
612 (CDE_EXTENSIONS,armv8m_main_ext_table,armv8_1m_main_ext_table):
613 Define new cdecp extension strings.
614 * doc/c-arm.texi: Document new cdecp extension arguments.
615 * testsuite/gas/arm/cde-scalar.d: New test.
616 * testsuite/gas/arm/cde-scalar.s: New test.
617 * testsuite/gas/arm/cde-warnings.d: New test.
618 * testsuite/gas/arm/cde-warnings.l: New test.
619 * testsuite/gas/arm/cde-warnings.s: New test.
620 * testsuite/gas/arm/cde.d: New test.
621 * testsuite/gas/arm/cde.s: New test.
622
4b5aaf5f
L		 6232020-02-10 H.J. Lu <hongjiu.lu@intel.com>
624
625 PR gas/25516
626 * config/tc-i386.c (intel64): Renamed to ...
627 (isa64): This.
628 (match_template): Accept Intel64 only instruction by default.
629 (i386_displacement): Updated.
630 (md_parse_option): Updated.
631 * c-i386.texi: Update -mamd64/-mintel64 documentation.
632 * testsuite/gas/i386/i386.exp: Run x86-64-sysenter. Pass
633 -mamd64 to x86-64-sysenter-amd.
634 * testsuite/gas/i386/x86-64-sysenter.d: New file.
635
33176d91
AM		 6362020-02-10 Alan Modra <amodra@gmail.com>
637
638 * config/obj-elf.c (obj_elf_change_section): Error for section
639 type, attr or entsize changes in assembly.
640 * testsuite/gas/elf/elf.exp: Pass -Z to gas for section5 test.
641 * testsuite/gas/elf/section5.l: Update.
642
82194874
AM		 6432020-02-10 Alan Modra <amodra@gmail.com>
644
645 * output-file.c (output_file_close): Do a normal close when
646 flag_always_generate_output.
647 * write.c (write_object_file): Don't stop output when
648 flag_always_generate_output.
649
9fc0b501
SB		 6502020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
651
652 PR 25469
653 * config/tc-z80.c: Add -gbz80 command line option to generate code
654 for the GameBoy Z80. Add support for generating DWARF.
655 * config/tc-z80.h: Add support for DWARF debug information
656 generation.
657 * doc/c-z80.texi: Document new command line option.
658 * testsuite/gas/z80/gbz80_all.d: New file.
659 * testsuite/gas/z80/gbz80_all.s: New file.
660 * testsuite/gas/z80/z80.exp: Run the new tests.
661 * testsuite/gas/z80/z80n_all.d: New file.
662 * testsuite/gas/z80/z80n_all.s: New file.
663 * testsuite/gas/z80/z80n_reloc.d: New file.
664
b7d07216
L		 6652020-02-06 H.J. Lu <hongjiu.lu@intel.com>
666
667 PR gas/25381
668 * config/obj-elf.c (get_section): Also check
669 linked_to_symbol_name.
670 (obj_elf_change_section): Also set map_head.linked_to_symbol_name.
671 (obj_elf_parse_section_letters): Handle the 'o' flag.
672 (build_group_lists): Renamed to ...
673 (build_additional_section_info): This. Set elf_linked_to_section
674 from map_head.linked_to_symbol_name.
675 (elf_adjust_symtab): Updated.
676 * config/obj-elf.h (elf_section_match): Add linked_to_symbol_name.
677 * doc/as.texi: Document the 'o' flag.
678 * testsuite/gas/elf/elf.exp: Run PR gas/25381 tests.
679 * testsuite/gas/elf/section18.d: New file.
680 * testsuite/gas/elf/section18.s: Likewise.
681 * testsuite/gas/elf/section19.d: Likewise.
682 * testsuite/gas/elf/section19.s: Likewise.
683 * testsuite/gas/elf/section20.d: Likewise.
684 * testsuite/gas/elf/section20.s: Likewise.
685 * testsuite/gas/elf/section21.d: Likewise.
686 * testsuite/gas/elf/section21.l: Likewise.
687 * testsuite/gas/elf/section21.s: Likewise.
688
5eb617a7
L		 6892020-02-06 H.J. Lu <hongjiu.lu@intel.com>
690
691 * NEWS: Mention x86 assembler options to align branches for
692 binutils 2.34.
693
986ac314
L		 6942020-02-06 H.J. Lu <hongjiu.lu@intel.com>
695
696 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique
697 only for ELF targets.
698 * testsuite/gas/i386/unique.d: Don't xfail.
699 * testsuite/gas/i386/x86-64-unique.d: Likewise.
700
19234a6d
AM		 7012020-02-06 Alan Modra <amodra@gmail.com>
702
703 * testsuite/gas/i386/unique.d: xfail for non-elf targets.
704 * testsuite/gas/i386/x86-64-unique.d: Likewise.
705
02e0be69
AM		 7062020-02-06 Alan Modra <amodra@gmail.com>
707
708 * testsuite/gas/elf/section12a.d: Use supports_gnu_osabi in
709 xfail, and rename test.
710 * testsuite/gas/elf/section12b.d: Likewise.
711 * testsuite/gas/elf/section16a.d: Likewise.
712 * testsuite/gas/elf/section16b.d: Likewise.
713
a8c4d40b
L		 7142020-02-02 H.J. Lu <hongjiu.lu@intel.com>
715
716 PR gas/25380
717 * config/obj-elf.c (section_match): Removed.
718 (get_section): Also match SEC_ASSEMBLER_SECTION_ID and
719 section_id.
720 (obj_elf_change_section): Replace info and group_name arguments
721 with match_p. Also update the section ID and flags from match_p.
722 (obj_elf_section): Handle "unique,N". Update call to
723 obj_elf_change_section.
724 * config/obj-elf.h (elf_section_match): New.
725 (obj_elf_change_section): Updated.
726 * config/tc-arm.c (start_unwind_section): Update call to
727 obj_elf_change_section.
728 * config/tc-ia64.c (obj_elf_vms_common): Likewise.
729 * config/tc-microblaze.c (microblaze_s_data): Likewise.
730 (microblaze_s_sdata): Likewise.
731 (microblaze_s_rdata): Likewise.
732 (microblaze_s_bss): Likewise.
733 * config/tc-mips.c (s_change_section): Likewise.
734 * config/tc-msp430.c (msp430_profiler): Likewise.
735 * config/tc-rx.c (parse_rx_section): Likewise.
736 * config/tc-tic6x.c (tic6x_start_unwind_section): Likewise.
737 * doc/as.texi: Document "unique,N" in .section directive.
738 * testsuite/gas/elf/elf.exp: Run "unique,N" tests.
739 * testsuite/gas/elf/section15.d: New file.
740 * testsuite/gas/elf/section15.s: Likewise.
741 * testsuite/gas/elf/section16.s: Likewise.
742 * testsuite/gas/elf/section16a.d: Likewise.
743 * testsuite/gas/elf/section16b.d: Likewise.
744 * testsuite/gas/elf/section17.d: Likewise.
745 * testsuite/gas/elf/section17.l: Likewise.
746 * testsuite/gas/elf/section17.s: Likewise.
747 * testsuite/gas/i386/unique.d: Likewise.
748 * testsuite/gas/i386/unique.s: Likewise.
749 * testsuite/gas/i386/x86-64-unique.d: Likewise.
750 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique.
751
575d37ae
L		 7522020-02-02 H.J. Lu <hongjiu.lu@intel.com>
753
754 * testsuite/gas/elf/section13.s: Replace @nobits with %nobits.
755
2384096c
G		 7562020-02-01 Anthony Green <green@moxielogic.com>
757
758 * config/tc-moxie.c (md_begin): Don't force big-endian mode.
759
95441c43
SL		 7602020-01-31 Sandra Loosemore <sandra@codesourcery.com>
761
762 * config/tc-nios2.c (nios2_cons): Handle %gotoff as well as
763 %tls_ldo.
764
d465d695
AV		 7652020-01-31 Andre Vieira <andre.simoesdiasvieira@arm.com>
766
767 PR gas/25472
768 * config/tc-arm.c (armv8m_main_ext_table): Refactored +dsp adding.
769 (armv8_1m_main_ext_table): Refactored +dsp adding and enabled dsp for
770 +mve.
771 * testsuite/gas/arm/mve_dsp.d: New test.
772
d26cc8a9
NC		 7732020-01-31 Nick Clifton <nickc@redhat.com>
774
775 * config/tc-s390.c (s390_elf_suffix): Return ELF_SUFFIX_NONE
776 rather than BFD_RELOC_NONE.
777
90e9955a
SP		 7782020-01-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
779
780 * config/tc-arm.c (fldmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2"
781 to support VLDMIA instruction for MVE.
782 (fldmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VLDMDB
783 instruction for MVE.
784 (fstmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMIA
785 instruction for MVE.
786 (fstmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMDB
787 instruction for MVE.
788 * testsuite/gas/arm/mve-ldst.d: New test.
789 * testsuite/gas/arm/mve-ldst.s: Likewise.
790
53943f32
NC		 7912020-01-31 Nick Clifton <nickc@redhat.com>
792
793 * po/fr.po: Updated French translation.
794 * po/ru.po: Updated Russian translation.
795
c3036ed0
RS		 7962020-01-31 Richard Sandiford <richard.sandiford@arm.com>
797
798 * testsuite/gas/aarch64/sve-bfloat-movprfx.s: Use .h rather than
799 .s for the movprfx.
800 * testsuite/gas/aarch64/sve-bfloat-movprfx.d: Update accordingly.
801 * testsuite/gas/aarch64/sve-movprfx_28.d,
802 * testsuite/gas/aarch64/sve-movprfx_28.l,
803 * testsuite/gas/aarch64/sve-movprfx_28.s: New test.
804
2ae4c703
JB		 8052020-01-30 Jan Beulich <jbeulich@suse.com>
806
807 * config/tc-i386.c (output_disp): Tighten base_opcode check.
808 * testsuite/gas/i386/got.s: Add LSL, MOVLPS, and BNDCN cases.
809 * testsuite/gas/i386/got-no-relax.d, testsuite/gas/i386/got.d:
810 Adjust expectations.
811
bd434cc4
JM		 8122020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
813
814 * testsuite/gas/bpf/alu.d: Update expected opcode for `neg'.
815 * testsuite/gas/bpf/alu-be.d: Likewise.
816 * testsuite/gas/bpf/alu32.d: Likewise for `neg32'.
817 * testsuite/gas/bpf/alu32-be.d: Likewise.
818
aeab2b26
JB		 8192020-01-30 Jan Beulich <jbeulich@suse.com>
820
821 * testsuite/gas/i386/x86-64-branch-2.s,
822 testsuite/gas/i386/x86-64-branch-4.s,
823 testsuite/gas/i386/x86-64-branch.s: Add RETW cases.
824 * testsuite/gas/i386/ilp32/x86-64-branch.d,
825 testsuite/gas/i386/x86-64-branch-2.d,
826 testsuite/gas/i386/x86-64-branch-4.l,
827 testsuite/gas/i386/x86-64-branch.d: Adjust expectations.
828
873494c8
JB		 8292020-01-30 Jan Beulich <jbeulich@suse.com>
830
831 * config/tc-i386.c (process_suffix): .
832 testsuite/gas/i386/noreg64.s: Add IRET and LRET cases.
833 testsuite/gas/i386/x86-64-opcode.s: Add suffix to IRET and LRET.
834 Add LRETQ case.
835 testsuite/gas/i386/x86-64-suffix.s: Drop IRET case without
836 suffix.
837 testsuite/gas/i386/x86_64.s: Add RETF cases.
838 * testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
839 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l,
840 testsuite/gas/i386/x86-64-opcode.d,
841 testsuite/gas/i386/x86-64-suffix-intel.d,
842 testsuite/gas/i386/x86-64-suffix.d,
843 testsuite/gas/i386/x86_64-intel.d
844 testsuite/gas/i386/x86_64.d: Adjust expectations.
845 * testsuite/gas/i386/x86-64-suffix.e,
846 testsuite/gas/i386/x86_64.e: New.
847
62b3f548
JB		 8482020-01-30 Jan Beulich <jbeulich@suse.com>
849
850 * config/tc-i386.c (process_suffix): Redo and move FLDENV et al
851 special case.
852
bc31405e
L		 8532020-01-27 H.J. Lu <hongjiu.lu@intel.com>
854
855 PR binutils/25445
856 * config/tc-i386.c (check_long_reg): Also convert to QWORD for
857 movsxd.
858 * doc/c-i386.texi: Add a node for AMD64 vs. Intel64 ISA
859 differences. Document movslq and movsxd.
860 * testsuite/gas/i386/i386.exp: Run PR binutils/25445 tests.
861 * testsuite/gas/i386/x86-64-movsxd-intel.d: New file.
862 * testsuite/gas/i386/x86-64-movsxd-intel64-intel.d: Likewise.
863 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.l: Likewise.
864 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.s: Likewise.
865 * testsuite/gas/i386/x86-64-movsxd-intel64.d: Likewise.
866 * testsuite/gas/i386/x86-64-movsxd-intel64.s: Likewise.
867 * testsuite/gas/i386/x86-64-movsxd-inval.l: Likewise.
868 * testsuite/gas/i386/x86-64-movsxd-inval.s: Likewise.
869 * testsuite/gas/i386/x86-64-movsxd.d: Likewise.
870 * testsuite/gas/i386/x86-64-movsxd.s: Likewise.
871
e3696f67
AM		 8722020-01-27 Alan Modra <amodra@gmail.com>
873
874 * testsuite/gas/all/gas.exp: Replace case statements with switch
875 statements.
876 * testsuite/gas/elf/elf.exp: Likewise.
877 * testsuite/gas/macros/macros.exp: Likewise.
878 * testsuite/lib/gas-defs.exp: Likewise.
879
7568c93b
TC		 8802020-01-27 Tamar Christina <tamar.christina@arm.com>
881
882 PR 25403
883 * testsuite/gas/aarch64/armv8_4-a.d: Add cfinv.
884 * testsuite/gas/aarch64/armv8_4-a.s: Likewise.
885
403d1bd9
JW		 8862020-01-22 Maxim Blinov <maxim.blinov@embecosm.com>
887
888 * testsuite/gas/riscv/march-ok-s.d: sx is no longer valid and
889 s exts must be known, so rename *ok* to *fail*.
890 * testsuite/gas/riscv/march-ok-sx.d: Likewise.
891 * testsuite/gas/riscv/march-ok-s-with-version: Likewise.
892 * testsuite/gas/riscv/march-fail-s.l: Expected error messages for
893 above change.
894 * testsuite/gas/riscv/march-fail-sx.l: Likewise.
895 * testsuite/gas/riscv/march-fail-sx-with-version.l: Likewise.
896
be4c5e58
L		 8972020-01-22 H.J. Lu <hongjiu.lu@intel.com>
898
899 PR gas/25438
900 * config/tc-i386.c (check_long_reg): Always disallow double word
901 suffix in mnemonic with word general register.
902 * testsuite/gas/i386/general.s: Replace word general register
903 with double word general register for movl.
904 * testsuite/gas/i386/inval.s: Add tests for movl with word general
905 register.
906 * testsuite/gas/i386/general.l: Updated.
907 * testsuite/gas/i386/inval.l: Likewise.
908
9e7028aa
AM		 9092020-01-22 Alan Modra <amodra@gmail.com>
910
911 * config/tc-ppc.c (parse_tls_arg): Handle tls arg for
912 __tls_get_addr_desc and __tls_get_addr_opt.
913
e3ed17f3
JB		 9142020-01-21 Jan Beulich <jbeulich@suse.com>
915
916 * testsuite/gas/i386/inval-crc32.s,
917 testsuite/gas/i386/x86-64-inval-crc32.s: Add alignment directive.
918 * testsuite/gas/i386/inval-crc32.l,
919 testsuite/gas/i386/x86-64-inval-crc32.l: Adjust expectations.
920
1a035124
JB		 9212020-01-21 Jan Beulich <jbeulich@suse.com>
922
923 * config/tc-i386.c (process_suffix): Merge CRC32 handling into
924 generic code path. Deal with No_lSuf being set in a template.
925 * testsuite/gas/i386/inval-crc32.l,
926 testsuite/gas/i386/x86-64-inval-crc32.l: Expect warning(s)
927 instead of error(s) when operand size is ambiguous.
928 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
929 testsuite/gas/i386/noreg64.s: Add CRC32 tests.
930 * testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg16.l,
931 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg32.l,
932 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l:
933 Adjust expectations.
934
c006a730
JB		 9352020-01-21 Jan Beulich <jbeulich@suse.com>
936
937 * config/tc-i386.c (process_suffix): Drop SYSRET special case
938 and an intel_syntax check. Re-write lack-of-suffix processing
939 logic.
940 * doc/c-i386.texi: Document operand size defaults for suffix-
941 less AT&T syntax insns.
942 * testsuite/gas/i386/bundle.s, testsuite/gas/i386/lock-1.s,
943 testsuite/gas/i386/opcode.s, testsuite/gas/i386/sse3.s,
944 testsuite/gas/i386/x86-64-avx-scalar.s,
945 testsuite/gas/i386/x86-64-avx.s,
946 testsuite/gas/i386/x86-64-bundle.s,
947 testsuite/gas/i386/x86-64-intel64.s,
948 testsuite/gas/i386/x86-64-lock-1.s,
949 testsuite/gas/i386/x86-64-opcode.s,
950 testsuite/gas/i386/x86-64-sse2avx.s,
951 testsuite/gas/i386/x86-64-sse3.s: Add missing suffixes.
952 * testsuite/gas/i386/nops.s, testsuite/gas/i386/sse-noavx.s,
953 testsuite/gas/i386/x86-64-nops.s,
954 testsuite/gas/i386/x86-64-ptwrite.s,
955 testsuite/gas/i386/x86-64-simd.s,
956 testsuite/gas/i386/x86-64-sse-noavx.s,
957 testsuite/gas/i386/x86-64-suffix.s: Drop bogus suffix-less
958 insns.
959 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
960 testsuite/gas/i386/noreg64.s: Add further tests.
961 * testsuite/gas/i386/ilp32/x86-64-nops.d,
962 testsuite/gas/i386/nops.d, testsuite/gas/i386/noreg16.d,
963 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
964 testsuite/gas/i386/sse-noavx.d,
965 testsuite/gas/i386/x86-64-intel64.d,
966 testsuite/gas/i386/x86-64-nops.d,
967 testsuite/gas/i386/x86-64-opcode.d,
968 testsuite/gas/i386/x86-64-ptwrite-intel.d,
969 testsuite/gas/i386/x86-64-ptwrite.d,
970 testsuite/gas/i386/x86-64-simd-intel.d,
971 testsuite/gas/i386/x86-64-simd-suffix.d,
972 testsuite/gas/i386/x86-64-simd.d,
973 testsuite/gas/i386/x86-64-sse-noavx.d
974 testsuite/gas/i386/x86-64-suffix.d,
975 testsuite/gas/i386/x86-64-suffix-intel.d: Adjust expectations.
976 * testsuite/gas/i386/noreg16.l, testsuite/gas/i386/noreg32.l,
977 testsuite/gas/i386/noreg64.l: New.
978 * testsuite/gas/i386/i386.exp: Run new tests.
979
c906a69a
JB		 9802020-01-21 Jan Beulich <jbeulich@suse.com>
981
982 * testsuite/gas/i386/avx512_bf16_vl.s,
983 testsuite/gas/i386/x86-64-avx512_bf16_vl.s: Add broadcast forms
984 of VCVTNEPS2BF16{X,Y}. Add operand-size less Intel syntax
985 broadcast forms of VCVTNEPS2BF16.
986 * testsuite/gas/i386/avx512_bf16_vl.d,
987 testsuite/gas/i386/x86-64-avx512_bf16_vl.d: Adjust expectations.
988
26916852
NC		 9892020-01-20 Nick Clifton <nickc@redhat.com>
990
991 * po/uk.po: Updated Ukranian translation.
992
14470f07
L		 9932020-01-20 H.J. Lu <hongjiu.lu@intel.com>
994
995 PR ld/25416
996 * config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix
997 for lea with R_X86_64_GOTPC32_TLSDESC relocation when generating
998 x32 object.
999 * testsuite/gas/i386/ilp32/x32-tls.d: Updated.
1000 * testsuite/gas/i386/ilp32/x32-tls.s: Add tests for lea with
1001 R_X86_64_GOTPC32_TLSDESC relocation.
1002
1b1bb2c6
NC		 10032020-01-18 Nick Clifton <nickc@redhat.com>
1004
1005 * configure: Regenerate.
1006 * po/gas.pot: Regenerate.
1007
ae774686
NC		 10082020-01-18 Nick Clifton <nickc@redhat.com>
1009
1010 Binutils 2.34 branch created.
1011
42e04b36
L		 10122020-01-17 H.J. Lu <hongjiu.lu@intel.com>
1013
1014 * config/tc-i386.c (_i386_insn): Replace vex_encoding_vex2
1015 with vex_encoding_vex.
1016 (parse_insn): Likewise.
1017 * doc/c-i386.texi: Replace {vex2} with {vex}. Update {vex}
1018 and {vex3} documentation.
1019 * testsuite/gas/i386/pseudos.s: Replace 3 {vex2} tests with
1020 {vex}.
1021 * testsuite/gas/i386/x86-64-pseudos.s: Likewise.
1022
2da2eaf4
AV		 10232020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
1024
1025 PR 25376
1026 * config/tc-arm.c (mve_ext, mve_fp_ext): Use CORE_HIGH.
1027 (armv8_1m_main_ext_table): Use CORE_HIGH for mve.
1028 * testsuite/arm/armv8_1-m-fpu-mve-1.s: New.
1029 * testsuite/arm/armv8_1-m-fpu-mve-1.d: New.
1030 * testsuite/arm/armv8_1-m-fpu-mve-2.s: New.
1031 * testsuite/arm/armv8_1-m-fpu-mve-2.d: New.
1032
45a4bb20
JB		 10332020-01-16 Jan Beulich <jbeulich@suse.com>
1034
1035 * config/tc-i386.c (match_template): Drop found_cpu_match local
1036 variable.
1037
4814632e
JB		 10382020-01-16 Jan Beulich <jbeulich@suse.com>
1039
1040 * testsuite/gas/i386/avx512dq-inval.l,
1041 testsuite/gas/i386/avx512dq-inval.s: New.
1042 * testsuite/gas/i386/i386.exp: Run new test.
1043
131cb553
JL		 10442020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1045
1046 * config/tc-msp430.c (CHECK_RELOC_MSP430): Always generate 430X
1047 relocations when the target is 430X, except when extracting part of an
1048 expression.
1049 (msp430_srcoperand): Adjust comment.
1050 Initialize the expp member of the msp430_operand_s struct as
1051 appropriate.
1052 (msp430_dstoperand): Likewise.
1053 * testsuite/gas/msp430/msp430.exp: Run new test.
1054 * testsuite/gas/msp430/reloc-lo-430x.d: New test.
1055 * testsuite/gas/msp430/reloc-lo-430x.s: New test.
1056
c24d0e8d
AM		 10572020-01-15 Alan Modra <amodra@gmail.com>
1058
1059 * configure.tgt: Add sparc-*-freebsd case.
1060
e44925ae
LC		 10612020-01-14 Lili Cui <lili.cui@intel.com>
1062
1063 * testsuite/gas/i386/align-branch-1a.d: Updated for Darwin.
1064 * testsuite/gas/i386/align-branch-1b.d: Likewise.
1065 * testsuite/gas/i386/align-branch-1c.d: Likewise.
1066 * testsuite/gas/i386/align-branch-1d.d: Likewise.
1067 * testsuite/gas/i386/align-branch-1e.d: Likewise.
1068 * testsuite/gas/i386/align-branch-1f.d: Likewise.
1069 * testsuite/gas/i386/align-branch-1g.d: Likewise.
1070 * testsuite/gas/i386/align-branch-1h.d: Likewise.
1071 * testsuite/gas/i386/align-branch-1i.d: Likewise.
1072 * testsuite/gas/i386/align-branch-5.d: Likewise.
1073 * testsuite/gas/i386/x86-64-align-branch-1a.d: Likewise.
1074 * testsuite/gas/i386/x86-64-align-branch-1b.d: Likewise.
1075 * testsuite/gas/i386/x86-64-align-branch-1c.d: Likewise.
1076 * testsuite/gas/i386/x86-64-align-branch-1d.d: Likewise.
1077 * testsuite/gas/i386/x86-64-align-branch-1e.d: Likewise.
1078 * testsuite/gas/i386/x86-64-align-branch-1f.d: Likewise.
1079 * testsuite/gas/i386/x86-64-align-branch-1g.d: Likewise.
1080 * testsuite/gas/i386/x86-64-align-branch-1h.d: Likewise.
1081 * testsuite/gas/i386/x86-64-align-branch-1i.d: Likewise.
1082 * testsuite/gas/i386/x86-64-align-branch-5.d: Likewise.
1083 * testsuite/gas/i386/i386.exp: Skip x86-64-align-branch-2a,
1084 x86-64-align-branch-2b and x86-64-align-branch-2c on Darwin.
1085
7a6bf3be
SB		 10862020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
1087
1088 PR 25377
1089 * config/tc-z80.c: Add support for half precision, single
1090 precision and double precision floating point values.
1091 * config/tc-z80.h b/gas/config/tc-z80.h: Disable string escapes.
1092 * doc/as.texi: Add new z80 command line options.
1093 * doc/c-z80.texi: Document new z80 command line options.
1094 * testsuite/gas/z80/ez80_pref_dis.s: New test.
1095 * testsuite/gas/z80/ez80_pref_dis.d: New test driver.
1096 * testsuite/gas/z80/z80.exp: Run the new test.
1097 * testsuite/gas/z80/fp_math48.d: Use correct command line option.
1098 * testsuite/gas/z80/fp_zeda32.d: Likewise.
1099 * testsuite/gas/z80/strings.d: Update expected output.
1100
82e9597c
MM		 11012020-01-13 Matthew Malcomson <matthew.malcomson@arm.com>
1102
1103 * config/tc-aarch64.c (f64mm, f32mm): Add sve as a feature
1104 dependency.
1105
5e4f7e05
CZ		 11062020-01-13 Claudiu Zissulescu <claziss@gmail.com>
1107
1108 * config/tc-arc.c (arc_select_cpu): Re-init the bfd if we change
1109 the CPU.
1110 * config/tc-arc.h: Add header if/defs.
1111 * testsuite/gas/arc/pseudos.d: Improve matching pattern.
1112
febda64f
AM		 11132020-01-13 Alan Modra <amodra@gmail.com>
1114
1115 * testsuite/gas/wasm32/allinsn.d: Update expected output.
1116
5496abe1
AM		 11172020-01-13 Alan Modra <amodra@gmail.com>
1118
1119 * config/tc-tic4x.c (tic4x_operands_match): Correct tic3x trap
1120 insertion.
1121
ec4181f2
AM		 11222020-01-10 Alan Modra <amodra@gmail.com>
1123
1124 * testsuite/gas/elf/pr14891.s: Don't start directives in first column.
1125 * testsuite/gas/elf/pr21661.d: Don't run on hpux.
1126
40c75bc8
SB		 11272020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1128
1129 PR 25224
1130 * config/tc-z80.c (emit_ld_m_rr): Use integer types when checking
1131 opcode byte values.
1132 (emit_ld_r_r): Likewise.
1133 (emit_ld_rr_m): Likewise.
1134 (emit_ld_rr_nn): Likewise.
1135
72aea328
JB		 11362020-01-09 Jan Beulich <jbeulich@suse.com>
1137
1138 * config/tc-i386.c (optimize_encoding): Add
1139 is_any_vex_encoding() invocations. Drop respective
1140 i.tm.extension_opcode == None checks.
1141
3f93af61
JB		 11422020-01-09 Jan Beulich <jbeulich@suse.com>
1143
1144 * config/tc-i386.c (md_assemble): Check RegRex is clear during
1145 REX transformations. Correct comment indentation.
1146
7697afb6
JB		 11472020-01-09 Jan Beulich <jbeulich@suse.com>
1148
1149 * config/tc-i386.c (optimize_encoding): Generalize register
1150 transformation for TEST optimization.
1151
d835a58b
JB		 11522020-01-09 Jan Beulich <jbeulich@suse.com>
1153
1154 * testsuite/gas/i386/x86-64-sysenter-amd.s,
1155 testsuite/gas/i386/x86-64-sysenter-amd.d,
1156 testsuite/gas/i386/x86-64-sysenter-amd.l,
1157 testsuite/gas/i386/x86-64-sysenter-intel.d,
1158 testsuite/gas/i386/x86-64-sysenter-mixed.d: New.
1159 * testsuite/gas/i386/i386.exp: Run new tests.
1160
915808f6
NC		 11612020-01-08 Nick Clifton <nickc@redhat.com>
1162
1163 PR 25284
1164 * doc/as.texi (Align): Document the fact that all arguments can be
1165 omitted.
1166 (Balign): Likewise.
1167 (P2align): Likewise.
1168
f1f28025
NC		 11692020-01-08 Nick Clifton <nickc@redhat.com>
1170
1171 PR 14891
1172 * config/obj-elf.c (obj_elf_section): Fail if the section name is
1173 already defined as a different symbol type.
1174 * testsuite/gas/elf/pr14891.s: New test source file.
1175 * testsuite/gas/elf/pr14891.d: New test driver.
1176 * testsuite/gas/elf/pr14891.s: New test expected error output.
1177 * testsuite/gas/elf/elf.exp: Run the new test.
1178
030a2e78
AM		 11792020-01-08 Alan Modra <amodra@gmail.com>
1180
1181 * config/tc-z8k.c (md_begin): Make idx unsigned.
1182 (get_specific): Likewise for this_index.
1183
2a1ebfb2
CZ		 11842020-01-07 Claudiu Zissulescu <claziss@synopsys.com>
1185
1186 * onfig/tc-arc.c (parse_reloc_symbol): New function.
1187 (tokenize_arguments): Clean up, use parse_reloc_symbol function.
1188 (md_operand): Set X_md to absent.
1189 (arc_parse_name): Check for X_md.
1190
16d87673
SB		 11912020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1192
1193 PR 25311
1194 * as.h (TC_STRING_ESCAPES): Provide a default definition.
1195 * app.c (do_scrub_chars): Use TC_STRING_ESCAPES instead of
1196 NO_STRING_ESCAPES.
1197 * read.c (next_char_of_string): Likewise.
1198 * config/tc-ppc.h (TC_STRING_ESCAPES): Define.
1199 * config/tc-z80.h (TC_STRING_ESCAPES): Define.
1200
a2322019
NC		 12012020-01-03 Nick Clifton <nickc@redhat.com>
1202
1203 * po/sv.po: Updated Swedish translation.
1204
5437a02a
JB		 12052020-01-03 Jan Beulich <jbeulich@suse.com>
1206
1207 * testsuite/gas/aarch64/f64mm.s: Scale index of LD1RO{H,W,D}.
1208 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1209
567dfba2
JB		 12102020-01-03 Jan Beulich <jbeulich@suse.com>
1211
1212 * testsuite/gas/aarch64/i8mm.s: Add 128-bit form tests for
1213 by-element usdot. Add 64-bit form tests for by-element sudot.
1214 * testsuite/gas/aarch64/i8mm.d: Adjust expectations.
1215
8c45011a
JB		 12162020-01-03 Jan Beulich <jbeulich@suse.com>
1217
1218 * testsuite/gas/aarch64/f64mm.s: Drop 'i' from uzip<n>.
1219 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1220
f4950f76
JB		 12212020-01-03 Jan Beulich <jbeulich@suse.com>
1222
1223 * testsuite/gas/aarch64/f64mm.d,
1224 testsuite/gas/aarch64/sve-movprfx-mm.d: Adjust expectations.
1225
6655dba2
SB		 12262020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
1227
1228 * config/tc-z80.c: Add new architectures: Z180 and eZ80. Add
1229 support for assembler code generated by SDCC. Add new relocation
1230 types. Add z80-elf target support.
1231 * config/tc-z80.h: Add z80-elf target support. Enable dollar local
1232 labels. Local labels starts from ".L".
1233 * NEWS: Mention the new support.
1234 * testsuite/gas/all/fwdexp.d: Fix failure due to symbol conflict.
1235 * testsuite/gas/all/fwdexp.s: Likewise.
1236 * testsuite/gas/all/cond.l: Likewise.
1237 * testsuite/gas/all/cond.s: Likewise.
1238 * testsuite/gas/all/fwdexp.d: Likewise.
1239 * testsuite/gas/all/fwdexp.s: Likewise.
1240 * testsuite/gas/elf/section2.e-mips: Likewise.
1241 * testsuite/gas/elf/section2.l: Likewise.
1242 * testsuite/gas/elf/section2.s: Likewise.
1243 * testsuite/gas/macros/app1.d: Likewise.
1244 * testsuite/gas/macros/app1.s: Likewise.
1245 * testsuite/gas/macros/app2.d: Likewise.
1246 * testsuite/gas/macros/app2.s: Likewise.
1247 * testsuite/gas/macros/app3.d: Likewise.
1248 * testsuite/gas/macros/app3.s: Likewise.
1249 * testsuite/gas/macros/app4.d: Likewise.
1250 * testsuite/gas/macros/app4.s: Likewise.
1251 * testsuite/gas/macros/app4b.s: Likewise.
1252 * testsuite/gas/z80/suffix.d: Fix failure on ELF target.
1253 * testsuite/gas/z80/z80.exp: Add new tests
1254 * testsuite/gas/z80/dollar.d: New file.
1255 * testsuite/gas/z80/dollar.s: New file.
1256 * testsuite/gas/z80/ez80_adl_all.d: New file.
1257 * testsuite/gas/z80/ez80_adl_all.s: New file.
1258 * testsuite/gas/z80/ez80_adl_suf.d: New file.
1259 * testsuite/gas/z80/ez80_isuf.s: New file.
1260 * testsuite/gas/z80/ez80_z80_all.d: New file.
1261 * testsuite/gas/z80/ez80_z80_all.s: New file.
1262 * testsuite/gas/z80/ez80_z80_suf.d: New file.
1263 * testsuite/gas/z80/r800_extra.d: New file.
1264 * testsuite/gas/z80/r800_extra.s: New file.
1265 * testsuite/gas/z80/r800_ii8.d: New file.
1266 * testsuite/gas/z80/r800_z80_doc.d: New file.
1267 * testsuite/gas/z80/z180.d: New file.
1268 * testsuite/gas/z80/z180.s: New file.
1269 * testsuite/gas/z80/z180_z80_doc.d: New file.
1270 * testsuite/gas/z80/z80_doc.d: New file.
1271 * testsuite/gas/z80/z80_doc.s: New file.
1272 * testsuite/gas/z80/z80_ii8.d: New file.
1273 * testsuite/gas/z80/z80_ii8.s: New file.
1274 * testsuite/gas/z80/z80_in_f_c.d: New file.
1275 * testsuite/gas/z80/z80_in_f_c.s: New file.
1276 * testsuite/gas/z80/z80_op_ii_ld.d: New file.
1277 * testsuite/gas/z80/z80_op_ii_ld.s: New file.
1278 * testsuite/gas/z80/z80_out_c_0.d: New file.
1279 * testsuite/gas/z80/z80_out_c_0.s: New file.
1280 * testsuite/gas/z80/z80_reloc.d: New file.
1281 * testsuite/gas/z80/z80_reloc.s: New file.
1282 * testsuite/gas/z80/z80_sli.d: New file.
1283 * testsuite/gas/z80/z80_sli.s: New file.
1284
a65b5de6
SN		 12852020-01-02 Szabolcs Nagy <szabolcs.nagy@arm.com>
1286
1287 * config/tc-arm.c (parse_reg_list): Use REG_TYPE_RN instead of
1288 REGLIST_RN.
1289
b14ce8bf
AM		 12902020-01-01 Alan Modra <amodra@gmail.com>
1291
1292 Update year range in copyright notice of all files.
1293
0b114740 1294For older changes see ChangeLog-2019
3499769a 1295\f
0b114740 1296Copyright (C) 2020 Free Software Foundation, Inc.
3499769a
AM		 1297
1298Copying and distribution of this file, with or without modification,
1299are permitted in any medium without royalty provided the copyright
1300notice and this notice are preserved.
1301
1302Local Variables:
1303mode: change-log
1304left-margin: 8
1305fill-column: 74
1306version-control: never
1307End:
A mirror of the official binutils-gdb repository