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252b5132 1-*- text -*-
96a84ea3 2
a0522545
ML
3* Removed --reduce-memory-overheads and --hash-size as gas now
4 uses hash tables that can be expand and shrink automatically.
5
789198ca
L
6* Add {disp16} pseudo prefix to x86 assembler.
7
260cd341
LC
8* Add support for Intel AMX instructions.
9
939b95c7
L
10* Configure with --enable-x86-used-note by default for Linux/x86.
11
b115b9fd
NC
12Changes in 2.35:
13
bbd19b19
L
14* X86 NaCl target support is removed.
15
6914be53
L
16* Extend .symver directive to update visibility of the original symbol
17 and assign one original symbol to different versioned symbols.
18
6e0e8b45
L
19* Add support for Intel SERIALIZE and TSXLDTRK instructions.
20
9e8f1c90
L
21* Add -mlfence-after-load=, -mlfence-before-indirect-branch= and
22 -mlfence-before-ret= options to x86 assembler to help mitigate
23 CVE-2020-0551.
24
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NC
25* Add --gdwarf-5 option to the assembler to generate DWARF 5 debug output
26 (if such output is being generated). Added the ability to generate
27 version 5 .debug_line sections.
28
251dae91
TC
29* Add -mbig-obj support to i386 MingW targets.
30
ae774686
NC
31Changes in 2.34:
32
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L
33* Add -malign-branch-boundary=NUM, -malign-branch=TYPE[+TYPE...],
34 -malign-branch-prefix-size=NUM and -mbranches-within-32B-boundaries
35 options to x86 assembler to align branches within a fixed boundary
36 with segment prefixes or NOPs.
37
6655dba2
SB
38* Add support for Zilog eZ80 and Zilog Z180 CPUs.
39
40* Add support for z80-elf target.
41
42* Add support for relocation of each byte or word of multibyte value to Z80
43 targets (just use right shift to 0, 8, 16, or 24 bits or AND operation
44 with 0xff/0xffff mask): ld a, label >> 16 \ ld hl, label & 0xffff
45
46* Add SDCC support for Z80 targets.
47
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PB
48Changes in 2.33:
49
7738ddb4
MM
50* Add support for the Arm Scalable Vector Extension version 2 (SVE2)
51 instructions.
52
53* Add support for the Arm Transactional Memory Extension (TME)
54 instructions.
55
514bbb0f
AV
56* Add support for the Armv8.1-M Mainline and M-profile Vector Extension (MVE)
57 instructions.
58
b20d3859
BW
59* For MIPS, Add -m[no-]fix-loongson3-llsc option to fix (or not) Loongson3
60 LLSC Errata. Add a --enable-mips-fix-loongson3-llsc=[yes|no] configure
61 time option to set the default behavior. Set the default if the configure
62 option is not used to "no".
6f2117ba 63
546053ac
DZ
64* Add support for the Arm Cortex-A76AE, Cortex-A77 and Cortex-M35P
65 processors.
66
67* Add support for the AArch64 Cortex-A34, Cortex-A65, Cortex-A65AE,
68 Cortex-A76AE, and Cortex-A77 processors.
69
b20d3859
BW
70* Add .float16 directive for both Arm and AArch64 to allow encoding of 16-bit
71 floating point literals. Add .float16_format directive and
72 -mfp16-format=[ieee|alternative] option for Arm to control the format of the
73 encoding.
74
66f8b2cb
AB
75* Add --gdwarf-cie-version command line flag. This allows control over which
76 version of DWARF CIE the assembler creates.
77
f974f26c
NC
78Changes in 2.32:
79
03751133
L
80* Add -mvexwig=[0|1] option to x86 assembler to control encoding of
81 VEX.W-ignored (WIG) VEX instructions.
82
b4a3a7b4
L
83* Add -mx86-used-note=[yes|no] option to generate (or not) x86 GNU property
84 notes. Add a --enable-x86-used-note configure time option to set the
85 default behavior. Set the default if the configure option is not used
86 to "no".
87
a693765e
CX
88* Add support for the MIPS Loongson EXTensions R2 (EXT2) instructions.
89
bdc6c06e
CX
90* Add support for the MIPS Loongson EXTensions (EXT) instructions.
91
716c08de
CX
92* Add support for the MIPS Loongson Content Address Memory (CAM) ASE.
93
b8891f8d
AJ
94* Add support for the C-SKY processor series.
95
8095d2f7
CX
96* Add support for the MIPS Loongson MultiMedia extensions Instructions (MMI)
97 ASE.
98
719d8288
NC
99Changes in 2.31:
100
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NC
101* The ADR and ADRL pseudo-instructions supported by the ARM assembler
102 now only set the bottom bit of the address of thumb function symbols
103 if the -mthumb-interwork command line option is active.
104
6f20c942
FS
105* Add support for the MIPS Global INValidate (GINV) ASE.
106
730c3174
SE
107* Add support for the MIPS Cyclic Redudancy Check (CRC) ASE.
108
7b4ae824
JD
109* Add support for the Freescale S12Z architecture.
110
0df8ad28
NC
111* Add --generate-missing-build-notes=[yes|no] option to create (or not) GNU
112 Build Attribute notes if none are present in the input sources. Add a
113 --enable-generate-build-notes=[yes|no] configure time option to set the
114 default behaviour. Set the default if the configure option is not used
115 to "no".
116
bd5dea88
L
117* Remove -mold-gcc command-line option for x86 targets.
118
b6f8c7c4
L
119* Add -O[2|s] command-line options to x86 assembler to enable alternate
120 shorter instruction encoding.
121
8f065d3b 122* Add support for .nops directive. It is currently supported only for
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L
123 x86 targets.
124
9176ac5b
NC
125Changes in 2.30:
126
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AO
127* Add support for loaction views in DWARF debug line information.
128
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TG
129Changes in 2.29:
130
a91e1603
L
131* Add support for ELF SHF_GNU_MBIND.
132
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PC
133* Add support for the WebAssembly file format and wasm32 ELF conversion.
134
7e0de605 135* PowerPC gas now checks that the correct register class is used in
ece5dcc1
AM
136 instructions. For instance, "addi %f4,%cr3,%r31" warns three times
137 that the registers are invalid.
7e0de605 138
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DD
139* Add support for the Texas Instruments PRU processor.
140
0cda1e19
TP
141* Support for the ARMv8-R architecture and Cortex-R52 processor has been
142 added to the ARM port.
ced40572 143
9703a4ef
TG
144Changes in 2.28:
145
e23eba97
NC
146* Add support for the RISC-V architecture.
147
b19ea8d2 148* Add support for the ARM Cortex-M23 and Cortex-M33 processors.
ce1b0a45 149
96a84ea3
TG
150Changes in 2.27:
151
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L
152* Default to --enable-compressed-debug-sections=gas for Linux/x86 targets.
153
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NC
154* Add --no-pad-sections to stop the assembler from padding the end of output
155 sections up to their alignment boundary.
156
15afaa63
TP
157* Support for the ARMv8-M architecture has been added to the ARM port. Support
158 for the ARMv8-M Security and DSP Extensions has also been added to the ARM
159 port.
160
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CZ
161* ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and
162 .extCoreRegister pseudo-ops that allow an user to define custom
163 instructions, conditional codes, auxiliary and core registers.
164
b8871f35
L
165* Add a configure option --enable-elf-stt-common to decide whether ELF
166 assembler should generate common symbols with the STT_COMMON type by
167 default. Default to no.
168
a05a5b64 169* New command-line option --elf-stt-common= for ELF targets to control
b8871f35
L
170 whether to generate common symbols with the STT_COMMON type.
171
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NC
172* Add ability to set section flags and types via numeric values for ELF
173 based targets.
81c23f82 174
0cb4071e
L
175* Add a configure option --enable-x86-relax-relocations to decide whether
176 x86 assembler should generate relax relocations by default. Default to
177 yes, except for x86 Solaris targets older than Solaris 12.
178
a05a5b64 179* New command-line option -mrelax-relocations= for x86 target to control
0cb4071e
L
180 whether to generate relax relocations.
181
a05a5b64 182* New command-line option -mfence-as-lock-add=yes for x86 target to encode
9d3fc4e1
L
183 lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)".
184
4670103e
CZ
185* Add assembly-time relaxation option for ARC cpus.
186
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AB
187* Add --with-cpu=TYPE configure option for ARC gas. This allows the default
188 cpu type to be adjusted at configure time.
189
7feec526
TG
190Changes in 2.26:
191
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L
192* Add a configure option --enable-compressed-debug-sections={all,gas} to
193 decide whether DWARF debug sections should be compressed by default.
e12fe555 194
886a2506
NC
195* Add support for the ARC EM/HS, and ARC600/700 architectures. Remove
196 assembler support for Argonaut RISC architectures.
197
d02603dc
NC
198* Symbol and label names can now be enclosed in double quotes (") which allows
199 them to contain characters that are not part of valid symbol names in high
200 level languages.
201
f33026a9
MW
202* Added the correctly spelled -march=armv6kz, for ARMv6KZ support. The
203 previous spelling, -march=armv6zk, is still accepted.
204
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MW
205* Support for the ARMv8.1 architecture has been added to the Aarch64 port.
206 Support for the individual ARMv8.1 Adv.SIMD, LOR and PAN architecture
207 extensions has also been added to the Aarch64 port.
208
a5932920
MW
209* Support for the ARMv8.1 architecture has been added to the ARM port. Support
210 for the individual ARMv8.1 Adv.SIMD and PAN architecture extensions has also
211 been added to the ARM port.
212
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L
213* Extend --compress-debug-sections option to support
214 --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] for ELF
215 targets.
216
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L
217* --compress-debug-sections is turned on for Linux/x86 by default.
218
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TG
219Changes in 2.25:
220
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BS
221* Add support for the AVR Tiny microcontrollers.
222
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CS
223* Replace support for openrisc and or32 with support for or1k.
224
2e6976a8 225* Enhanced the ARM port to accept the assembler output from the CodeComposer
a05a5b64 226 Studio tool. Support is enabled via the new command-line option -mccs.
2e6976a8 227
35c08157
KLC
228* Add support for the Andes NDS32.
229
58ca03a2
TG
230Changes in 2.24:
231
13761a11
NC
232* Add support for the Texas Instruments MSP430X processor.
233
a05a5b64 234* Add -gdwarf-sections command-line option to enable per-code-section
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NC
235 generation of DWARF .debug_line sections.
236
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SL
237* Add support for Altera Nios II.
238
a3c62988
NC
239* Add support for the Imagination Technologies Meta processor.
240
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NC
241* Add support for the v850e3v5.
242
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RS
243* Remove assembler support for MIPS ECOFF targets.
244
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TG
245Changes in 2.23:
246
da2bb560
NC
247* Add support for the 64-bit ARM architecture: AArch64.
248
6927f982
NC
249* Add support for S12X processor.
250
b9c361e0
JL
251* Add support for the VLE extension to the PowerPC architecture.
252
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NC
253* Add support for the Freescale XGATE architecture.
254
fa94de6b
RM
255* Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock
256 directives. These are currently available only for x86 and ARM targets.
257
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DD
258* Add support for the Renesas RL78 architecture.
259
cfb8c092
NC
260* Add support for the Adapteva EPIPHANY architecture.
261
fe13e45b 262* For x86, allow 'rep bsf', 'rep bsr', and 'rep ret' syntax.
29c048b6 263
a7142d94
TG
264Changes in 2.22:
265
69f56ae1 266* Add support for the Tilera TILEPro and TILE-Gx architectures.
44f45767 267
90b3661c 268Changes in 2.21:
44f45767 269
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L
270* Gas no longer requires doubling of ampersands in macros.
271
40b36596
JM
272* Add support for the TMS320C6000 (TI C6X) processor family.
273
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DK
274* GAS now understands an extended syntax in the .section directive flags
275 for COFF targets that allows the section's alignment to be specified. This
276 feature has also been backported to the 2.20 release series, starting with
277 2.20.1.
278
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NC
279* Add support for the Renesas RX processor.
280
a05a5b64 281* New command-line option, --compress-debug-sections, which requests
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CC
282 compression of DWARF debug information sections in the relocatable output
283 file. Compressed debug sections are supported by readelf, objdump, and
284 gold, but not currently by Gnu ld.
285
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TG
286Changes in 2.20:
287
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NC
288* Added support for v850e2 and v850e2v3.
289
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NC
290* GNU/Linux targets now supports "gnu_unique_object" as a value in the .type
291 pseudo op. It marks the symbol as being globally unique in the entire
292 process.
293
c921be7d
NC
294* ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
295 in binary rather than text.
6e33da12 296
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DK
297* Add support for common symbol alignment to PE formats.
298
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CC
299* Add support for the new discriminator column in the DWARF line table,
300 with a discriminator operand for the .loc directive.
301
c3b7224a
NC
302* Add support for Sunplus score architecture.
303
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NC
304* The .type pseudo-op now accepts a type of STT_GNU_IFUNC which can be used to
305 indicate that if the symbol is the target of a relocation, its value should
306 not be use. Instead the function should be invoked and its result used as
307 the value.
fa94de6b 308
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NC
309* Add support for Lattice Mico32 (lm32) architecture.
310
fa94de6b 311* Add support for Xilinx MicroBlaze architecture.
caa03924 312
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TG
313Changes in 2.19:
314
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DJ
315* New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind
316 tables without runtime relocation.
317
a05a5b64 318* New command-line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
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DD
319 adds compatibility with H'00 style hex constants.
320
a05a5b64 321* New command-line option, -msse-check=[none|error|warning], for x86
daf50ae7
L
322 targets.
323
a05a5b64 324* New sub-option added to the assembler's -a command-line switch to
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NC
325 generate a listing output. The 'g' sub-option will insert into the listing
326 various information about the assembly, such as assembler version, the
a05a5b64 327 command-line options used, and a time stamp.
83f10cb2 328
a05a5b64 329* New command-line option -msse2avx for x86 target to encode SSE
c0f3af97
L
330 instructions with VEX prefix.
331
f1f8f695 332* Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target.
c0f3af97 333
a05a5b64 334* New command-line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
ae40c993
L
335 -mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg,
336 -mnaked-reg and -mold-gcc, for x86 targets.
337
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NC
338* Support for generating wide character strings has been added via the new
339 pseudo ops: .string16, .string32 and .string64.
340
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MM
341* Support for SSE5 has been added to the i386 port.
342
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NC
343Changes in 2.18:
344
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NC
345* The GAS sources are now released under the GPLv3.
346
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NC
347* Support for the National Semiconductor CR16 target has been added.
348
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AM
349* Added gas .reloc pseudo. This is a low-level interface for creating
350 relocations.
351
99ad8390
NC
352* Add support for x86_64 PE+ target.
353
1c0d3aa6 354* Add support for Score target.
83518699 355
ec2655a6
NC
356Changes in 2.17:
357
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NC
358* Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
359
08333dc4
NS
360* Support for ms2 architecture has been added.
361
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NC
362* Support for the Z80 processor family has been added.
363
3e8a519c
MM
364* Add support for the "@<file>" syntax to the command line, so that extra
365 switches can be read from <file>.
366
a05a5b64 367* The SH target supports a new command-line switch --enable-reg-prefix which,
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NC
368 if enabled, will allow register names to be optionally prefixed with a $
369 character. This allows register names to be distinguished from label names.
fa94de6b 370
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JB
371* Macros with a variable number of arguments are now supported. See the
372 documentation for how this works.
373
4bdd3565
NC
374* Added --reduce-memory-overheads switch to reduce the size of the hash
375 tables used, at the expense of longer assembly times, and
376 --hash-size=<NUMBER> to set the size of the hash tables used by gas.
377
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JB
378* Macro names and macro parameter names can now be any identifier that would
379 also be legal as a symbol elsewhere. For macro parameter names, this is
380 known to cause problems in certain sources when the respective target uses
381 characters inconsistently, and thus macro parameter references may no longer
382 be recognized as such (see the documentation for details).
fa94de6b 383
d2c5f73e
NC
384* Support the .f_floating, .d_floating, .g_floating and .h_floating directives
385 for the VAX target in order to be more compatible with the VAX MACRO
386 assembler.
387
a05a5b64 388* New command-line option -mtune=[itanium1|itanium2] for IA64 targets.
8c2fda1d 389
957d91c1
NC
390Changes in 2.16:
391
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JB
392* Redefinition of macros now results in an error.
393
a05a5b64 394* New command-line option -mhint.b=[ok|warning|error] for IA64 targets.
91d777ee 395
a05a5b64 396* New command-line option -munwind-check=[warning|error] for IA64
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L
397 targets.
398
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JB
399* The IA64 port now uses automatic dependency violation removal as its default
400 mode.
401
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NC
402* Port to MAXQ processor contributed by HCL Tech.
403
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NC
404* Added support for generating unwind tables for ARM ELF targets.
405
a05a5b64 406* Add a -g command-line option to generate debug information in the target's
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NC
407 preferred debug format.
408
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NC
409* Support for the crx-elf target added.
410
1a320fbb 411* Support for the sh-symbianelf target added.
1fe1f39c 412
0503b355
BF
413* Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations
414 on pe[i]-i386; required for this target's DWARF 2 support.
415
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NC
416* Support for Motorola MCF521x/5249/547x/548x added.
417
fd99574b
NC
418* Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC
419 instrucitons.
420
a05a5b64 421* New command-line option -mno-shared for MIPS ELF targets.
aa6975fb 422
a05a5b64 423* New command-line option --alternate and pseudo-ops .altmacro and .noaltmacro
caa32fe5
NC
424 added to enter (and leave) alternate macro syntax mode.
425
0477af35
NC
426Changes in 2.15:
427
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CD
428* The MIPS -membedded-pic option (Embedded-PIC code generation) is
429 deprecated and will be removed in a future release.
430
6edf0760
NC
431* Added PIC m32r Linux (ELF) and support to M32R assembler.
432
09d92015
MM
433* Added support for ARM V6.
434
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MS
435* Added support for sh4a and variants.
436
eb764db8
NC
437* Support for Renesas M32R2 added.
438
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MS
439* Limited support for Mapping Symbols as specified in the ARM ELF
440 specification has been added to the arm assembler.
ed769ec1 441
0bbf2aa4
NC
442* On ARM architectures, added a new gas directive ".unreq" that undoes
443 definitions created by ".req".
444
3e602632
NC
445* Support for Motorola ColdFire MCF528x added.
446
05da4302
NC
447* Added --gstabs+ switch to enable the generation of STABS debug format
448 information with GNU extensions.
fa94de6b 449
6a265366
CD
450* Added support for MIPS64 Release 2.
451
8ad30312
NC
452* Added support for v850e1.
453
12b55ccc
L
454* Added -n switch for x86 assembler. By default, x86 GAS replaces
455 multiple nop instructions used for alignment within code sections
456 with multi-byte nop instructions such as leal 0(%esi,1),%esi. This
457 switch disables the optimization.
458
78849248
ILT
459* Removed -n option from MIPS assembler. It was not useful, and confused the
460 existing -non_shared option.
461
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CD
462Changes in 2.14:
463
69be0a2b
CD
464* Added support for MIPS32 Release 2.
465
e8fd7476
NC
466* Added support for Xtensa architecture.
467
e16bb312
NC
468* Support for Intel's iWMMXt processor (an ARM variant) added.
469
cce4814f
NC
470* An assembler test generator has been contributed and an example file that
471 uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c).
fa94de6b 472
5177500f
NC
473* Support for SH2E added.
474
fea17916
NC
475* GASP has now been removed.
476
004d9caf
NC
477* Support for Texas Instruments TMS320C4x and TMS320C3x series of
478 DSP's contributed by Michael Hayes and Svein E. Seldal.
fa94de6b 479
a40cbfa3
NC
480* Support for the Ubicom IP2xxx microcontroller added.
481
2cbb2eef
NC
482Changes in 2.13:
483
a40cbfa3
NC
484* Support for the Fujitsu FRV architecture added by Red Hat. Models for FR400
485 and FR500 included.
0ebb9a87 486
a40cbfa3 487* Support for DLX processor added.
52216602 488
a40cbfa3
NC
489* GASP has now been deprecated and will be removed in a future release. Use
490 the macro facilities in GAS instead.
3f965e60 491
a40cbfa3
NC
492* GASP now correctly parses floating point numbers. Unless the base is
493 explicitly specified, they are interpreted as decimal numbers regardless of
494 the currently specified base.
1ac57253 495
9a66911f
NC
496Changes in 2.12:
497
a40cbfa3 498* Support for Don Knuth's MMIX, by Hans-Peter Nilsson.
49fda6c8 499
a40cbfa3 500* Support for the OpenRISC 32-bit embedded processor by OpenCores.
3b16e843 501
fa94de6b
RM
502* The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
503 specifying the target instruction set. The old method of specifying the
a40cbfa3
NC
504 target processor has been deprecated, but is still accepted for
505 compatibility.
03b1477f 506
a40cbfa3
NC
507* Support for the VFP floating-point instruction set has been added to
508 the ARM assembler.
252b5132 509
a40cbfa3
NC
510* New psuedo op: .incbin to include a set of binary data at a given point
511 in the assembly. Contributed by Anders Norlander.
7e005732 512
a40cbfa3
NC
513* The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated
514 but still works for compatability.
ec68c924 515
fa94de6b 516* The MIPS assembler no longer issues a warning by default when it
a05a5b64 517 generates a nop instruction from a macro. The new command-line option
a40cbfa3 518 -n will turn on the warning.
63486801 519
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520Changes in 2.11:
521
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522* Support for PDP-11 and 2.11BSD a.out format, by Lars Brinkhoff.
523
a40cbfa3 524* x86 gas now supports the full Pentium4 instruction set.
a167610d 525
a40cbfa3 526* Support for AMD x86-64 architecture, by Jan Hubicka, SuSE Labs.
c0d8940f 527
a40cbfa3 528* Support for Motorola 68HC11 and 68HC12.
df86943d 529
a40cbfa3 530* Support for Texas Instruments TMS320C54x (tic54x).
39bec121 531
a40cbfa3 532* Support for IA-64.
2dac7317 533
a40cbfa3 534* Support for i860, by Jason Eckhardt.
22b36938 535
a40cbfa3 536* Support for CRIS (Axis Communications ETRAX series).
5bcac8a4 537
a40cbfa3 538* x86 gas has a new .arch pseudo op to specify the target CPU architecture.
a38cf1db 539
a05a5b64 540* x86 gas -q command-line option quietens warnings about register size changes
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541 due to suffix, indirect jmp/call without `*', stand-alone prefixes, and
542 translating various deprecated floating point instructions.
a38cf1db 543
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544Changes in 2.10:
545
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546* Support for the ARM msr instruction was changed to only allow an immediate
547 operand when altering the flags field.
d14442f4 548
a40cbfa3 549* Support for ATMEL AVR.
adde6300 550
a40cbfa3 551* Support for IBM 370 ELF. Somewhat experimental.
b5ebe70e 552
a40cbfa3 553* Support for numbers with suffixes.
3fd9f047 554
a40cbfa3 555* Added support for breaking to the end of repeat loops.
6a6987a9 556
a40cbfa3 557* Added support for parallel instruction syntax (DOUBLEBAR_PARALLEL).
6a6987a9 558
a40cbfa3 559* New .elseif pseudo-op added.
3fd9f047 560
a40cbfa3 561* New --fatal-warnings option.
1f776aa5 562
a40cbfa3 563* picoJava architecture support added.
252b5132 564
a40cbfa3 565* Motorola MCore 210 processor support added.
041dd5a9 566
fa94de6b 567* A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
a40cbfa3 568 assembly programs with intel syntax.
252b5132 569
a40cbfa3 570* New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.
252b5132 571
a40cbfa3 572* Added -gdwarf2 option to generate DWARF 2 debugging information.
041dd5a9 573
a40cbfa3 574* Full 16-bit mode support for i386.
252b5132 575
fa94de6b 576* Greatly improved instruction operand checking for i386. This change will
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577 produce errors or warnings on incorrect assembly code that previous versions
578 of gas accepted. If you get unexpected messages from code that worked with
579 older versions of gas, please double check the code before reporting a bug.
252b5132 580
a40cbfa3 581* Weak symbol support added for COFF targets.
252b5132 582
a40cbfa3 583* Mitsubishi D30V support added.
252b5132 584
a40cbfa3 585* Texas Instruments c80 (tms320c80) support added.
252b5132 586
a40cbfa3 587* i960 ELF support added.
bedf545c 588
a40cbfa3 589* ARM ELF support added.
a057431b 590
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591Changes in 2.9:
592
a40cbfa3 593* Texas Instruments c30 (tms320c30) support added.
252b5132 594
fa94de6b 595* The assembler now optimizes the exception frame information generated by egcs
a40cbfa3 596 and gcc 2.8. The new --traditional-format option disables this optimization.
252b5132 597
a40cbfa3 598* Added --gstabs option to generate stabs debugging information.
252b5132 599
fa94de6b 600* The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
a40cbfa3 601 listing.
252b5132 602
a40cbfa3 603* Added -MD option to print dependencies.
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604
605Changes in 2.8:
606
a40cbfa3 607* BeOS support added.
252b5132 608
a40cbfa3 609* MIPS16 support added.
252b5132 610
a40cbfa3 611* Motorola ColdFire 5200 support added (configure for m68k and use -m5200).
252b5132 612
a40cbfa3 613* Alpha/VMS support added.
252b5132 614
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615* m68k options --base-size-default-16, --base-size-default-32,
616 --disp-size-default-16, and --disp-size-default-32 added.
252b5132 617
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618* The alignment directives now take an optional third argument, which is the
619 maximum number of bytes to skip. If doing the alignment would require
620 skipping more than the given number of bytes, the alignment is not done at
621 all.
252b5132 622
a40cbfa3 623* The ELF assembler has a new pseudo-op, .symver, used for symbol versioning.
252b5132 624
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625* The -a option takes a new suboption, c (e.g., -alc), to skip false
626 conditionals in listings.
252b5132 627
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628* Added new pseudo-op, .equiv; it's like .equ, except that it is an error if
629 the symbol is already defined.
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630
631Changes in 2.7:
632
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633* The PowerPC assembler now allows the use of symbolic register names (r0,
634 etc.) if -mregnames is used. Symbolic names preceded by a '%' (%r0, etc.)
635 can be used any time. PowerPC 860 move to/from SPR instructions have been
636 added.
252b5132 637
a40cbfa3 638* Alpha Linux (ELF) support added.
252b5132 639
a40cbfa3 640* PowerPC ELF support added.
252b5132 641
a40cbfa3 642* m68k Linux (ELF) support added.
252b5132 643
a40cbfa3 644* i960 Hx/Jx support added.
252b5132 645
a40cbfa3 646* i386/PowerPC gnu-win32 support added.
252b5132 647
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648* SCO ELF support added. For OpenServer 5 targets (i386-unknown-sco3.2v5) the
649 default is to build COFF-only support. To get a set of tools that generate
fa94de6b 650 ELF (they'll understand both COFF and ELF), you must configure with
a40cbfa3 651 target=i386-unknown-sco3.2v5elf.
252b5132 652
a40cbfa3 653* m88k-motorola-sysv3* support added.
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654
655Changes in 2.6:
656
a40cbfa3 657* Gas now directly supports macros, without requiring GASP.
252b5132 658
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659* Gas now has an MRI assembler compatibility mode. Use -M or --mri to select
660 MRI mode. The pseudo-op ``.mri 1'' will switch into the MRI mode until the
661 ``.mri 0'' is seen; this can be convenient for inline assembler code.
252b5132 662
a40cbfa3 663* Added --defsym SYM=VALUE option.
252b5132 664
a40cbfa3 665* Added -mips4 support to MIPS assembler.
252b5132 666
a40cbfa3 667* Added PIC support to Solaris and SPARC SunOS 4 assembler.
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668
669Changes in 2.4:
670
a40cbfa3 671* Converted this directory to use an autoconf-generated configure script.
252b5132 672
a40cbfa3 673* ARM support, from Richard Earnshaw.
252b5132 674
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675* Updated VMS support, from Pat Rankin, including considerably improved
676 debugging support.
252b5132 677
a40cbfa3 678* Support for the control registers in the 68060.
252b5132 679
a40cbfa3 680* Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to
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681 provide for possible future gcc changes, for targets where gas provides some
682 features not available in the native assembler. If the native assembler is
a40cbfa3 683 used, it should become obvious pretty quickly what the problem is.
252b5132 684
a40cbfa3 685* Usage message is available with "--help".
252b5132 686
fa94de6b 687* The GNU Assembler Preprocessor (gasp) is included. (Actually, it was in 2.3
a40cbfa3 688 also, but didn't get into the NEWS file.)
252b5132 689
a40cbfa3 690* Weak symbol support for a.out.
252b5132 691
fa94de6b 692* A bug in the listing code which could cause an infinite loop has been fixed.
a40cbfa3 693 Bugs in listings when generating a COFF object file have also been fixed.
252b5132 694
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695* Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by
696 Paul Kranenburg.
252b5132 697
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698* Improved Alpha support. Immediate constants can have a much larger range
699 now. Support for the 21164 has been contributed by Digital.
252b5132 700
a40cbfa3 701* Updated ns32k (pc532-mach, netbsd532) support from Ian Dall.
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702
703Changes in 2.3:
704
a40cbfa3 705* Mach i386 support, by David Mackenzie and Ken Raeburn.
252b5132 706
a40cbfa3 707* RS/6000 and PowerPC support by Ian Taylor.
252b5132 708
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709* VMS command scripts (make-gas.com, config-gas.com) have been worked on a bit,
710 based on mail received from various people. The `-h#' option should work
711 again too.
252b5132 712
a40cbfa3 713* HP-PA work, by Jeff Law. Note, for the PA, gas-2.3 has been designed to work
fa94de6b 714 with gdb-4.12 and gcc-2.6. As gcc-2.6 has not been released yet, a special
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715 version of gcc-2.5.8 has been patched to work with gas-2.3. You can retrieve
716 this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu
717 in the "dist" directory.
252b5132 718
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719* Vax support in gas fixed for BSD, so it builds and seems to run a couple
720 simple tests okay. I haven't put it through extensive testing. (GNU make is
721 currently required for BSD 4.3 builds.)
252b5132 722
fa94de6b 723* Support for the DEC Alpha, running OSF/1 (ECOFF format). The gas support is
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724 based on code donated by CMU, which used an a.out-based format. I'm afraid
725 the alpha-a.out support is pretty badly mangled, and much of it removed;
726 making it work will require rewriting it as BFD support for the format anyways.
252b5132 727
a40cbfa3 728* Irix 5 support.
252b5132 729
fa94de6b 730* The test suites have been fixed up a bit, so that they should work with a
a40cbfa3 731 couple different versions of expect and dejagnu.
252b5132 732
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733* Symbols' values are now handled internally as expressions, permitting more
734 flexibility in evaluating them in some cases. Some details of relocation
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735 handling have also changed, and simple constant pool management has been
736 added, to make the Alpha port easier.
252b5132 737
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738* New option "--statistics" for printing out program run times. This is
739 intended to be used with the gcc "-Q" option, which prints out times spent in
740 various phases of compilation. (You should be able to get all of them
741 printed out with "gcc -Q -Wa,--statistics", I think.)
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742
743Changes in 2.2:
744
a40cbfa3 745* RS/6000 AIX and MIPS SGI Irix 5 support has been added.
252b5132 746
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747* Configurations that are still in development (and therefore are convenient to
748 have listed in configure.in) still get rejected without a minor change to
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749 gas/Makefile.in, so people not doing development work shouldn't get the
750 impression that support for such configurations is actually believed to be
751 reliable.
252b5132 752
fa94de6b 753* The program name (usually "as") is printed when a fatal error message is
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754 displayed. This should prevent some confusion about the source of occasional
755 messages about "internal errors".
252b5132 756
fa94de6b 757* ELF support is falling into place. Support for the 386 should be working.
a40cbfa3 758 Support for SPARC Solaris is in. HPPA support from Utah is being integrated.
252b5132 759
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760* Symbol values are maintained as expressions instead of being immediately
761 boiled down to add-symbol, sub-symbol, and constant. This permits slightly
762 more complex calculations involving symbols whose values are not alreadey
763 known.
252b5132 764
a40cbfa3 765* DBX-style debugging info ("stabs") is now supported for COFF formats.
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766 If any stabs directives are seen in the source, GAS will create two new
767 sections: a ".stab" and a ".stabstr" section. The format of the .stab
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768 section is nearly identical to the a.out symbol format, and .stabstr is
769 its string table. For this to be useful, you must have configured GCC
770 to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB
771 that can use the stab sections (4.11 or later).
252b5132 772
fa94de6b 773* LynxOS, on i386 and m68k platforms, is now supported. SPARC LynxOS
a40cbfa3 774 support is in progress.
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775
776Changes in 2.1:
777
fa94de6b 778* Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
a40cbfa3 779 incorporated, but not well tested yet.
252b5132 780
fa94de6b 781* Altered the opcode table split for m68k; it should require less VM to compile
a40cbfa3 782 with gcc now.
252b5132 783
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784* Some minor adjustments to add (Convergent Technologies') Miniframe support,
785 suggested by Ronald Cole.
252b5132 786
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787* HPPA support (running OSF only, not HPUX) has been contributed by Utah. This
788 includes improved ELF support, which I've started adapting for SPARC Solaris
789 2.x. Integration isn't completely, so it probably won't work.
252b5132 790
a40cbfa3 791* HP9000/300 support, donated by HP, has been merged in.
252b5132 792
a40cbfa3 793* Ian Taylor has finished the MIPS ECOFF (Ultrix, Irix) support.
252b5132 794
a40cbfa3 795* Better error messages for unsupported configurations (e.g., hppa-hpux).
252b5132 796
a40cbfa3 797* Test suite framework is starting to become reasonable.
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798
799Changes in 2.0:
800
a40cbfa3 801* Mostly bug fixes.
252b5132 802
a40cbfa3 803* Some more merging of BFD and ELF code, but ELF still doesn't work.
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804
805Changes in 1.94:
806
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807* BFD merge is partly done. Adventurous souls may try giving configure the
808 "--with-bfd-assembler" option. Currently, ELF format requires it, a.out
809 format accepts it; SPARC CPU accepts it. It's the default only for OS "elf"
810 or "solaris". (ELF isn't really supported yet. It needs work. I've got
811 some code from Utah for HP-PA ELF, and from DG for m88k ELF, but they're not
812 fully merged yet.)
252b5132 813
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814* The 68K opcode table has been split in half. It should now compile under gcc
815 without consuming ridiculous amounts of memory.
252b5132 816
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817* A couple data structures have been reduced in size. This should result in
818 saving a little bit of space at runtime.
252b5132 819
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820* Support for MIPS, from OSF and Ralph Campbell, has been merged in. The OSF
821 code provided ROSE format support, which I haven't merged in yet. (I can
822 make it available, if anyone wants to try it out.) Ralph's code, for BSD
823 4.4, supports a.out format. We don't have ECOFF support in just yet; it's
824 coming.
252b5132 825
a40cbfa3 826* Support for the Hitachi H8/500 has been added.
252b5132 827
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828* VMS host and target support should be working now, thanks chiefly to Eric
829 Youngdale.
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830
831Changes in 1.93.01:
832
a40cbfa3 833* For m68k, support for more processors has been added: 68040, CPU32, 68851.
252b5132 834
a40cbfa3 835* For i386, .align is now power-of-two; was number-of-bytes.
252b5132 836
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837* For m68k, "%" is now accepted before register names. For COFF format, which
838 doesn't use underscore prefixes for C labels, it is required, so variable "a0"
839 can be distinguished from the register.
252b5132 840
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841* Last public release was 1.38. Lots of configuration changes since then, lots
842 of new CPUs and formats, lots of bugs fixed.
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843
844\f
b3adc24a 845Copyright (C) 2012-2020 Free Software Foundation, Inc.
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846
847Copying and distribution of this file, with or without modification,
848are permitted in any medium without royalty provided the copyright
849notice and this notice are preserved.
850
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851Local variables:
852fill-column: 79
853End: