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252b5132 1-*- text -*-
6d96a594 2
58bf9b6a
L
3* Add support for Intel AVX VNNI instructions.
4
c1fa250a
LC
5* Add support for Intel HRESET instruction.
6
f64c42a9
LC
7* Add support for Intel UINTR instructions.
8
6d96a594
C
9* Support non-absolute segment values for i386 lcall and ljmp.
10
b71702f1
NC
11* When setting the link order attribute of ELF sections, it is now possible to
12 use a numeric section index instead of symbol name.
42c36b73 13
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NC
14* Add support for Cortex-A78, Cortex-A78AE and Cortex-X1 for AArch64 and ARM.
15 Add support for Cortex-R82, Neoverse V1, and Neoverse N2 for ARM.
77718e5b 16
b71702f1
NC
17* Add support for ETMv4 (Embedded Trace Macrocell), ETE (Embedded Trace
18 Extension) and TRBE (Trace Buffer Extension) system registers for AArch64.
c81946ef
AC
19
20* Add support for Armv8-R AArch64.
21
81d54bb7 22* Add support for Intel TDX instructions.
96a84ea3 23
c4694f17
TG
24* Add support for Intel Key Locker instructions.
25
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NC
26* Added a .nop directive to generate a single no-op instruction in a target
27 neutral manner. This instruction does have an effect on DWARF line number
28 generation, if that is active.
29
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ML
30* Removed --reduce-memory-overheads and --hash-size as gas now
31 uses hash tables that can be expand and shrink automatically.
32
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L
33* Add {disp16} pseudo prefix to x86 assembler.
34
260cd341
LC
35* Add support for Intel AMX instructions.
36
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L
37* Configure with --enable-x86-used-note by default for Linux/x86.
38
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NC
39Changes in 2.35:
40
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L
41* X86 NaCl target support is removed.
42
6914be53
L
43* Extend .symver directive to update visibility of the original symbol
44 and assign one original symbol to different versioned symbols.
45
6e0e8b45
L
46* Add support for Intel SERIALIZE and TSXLDTRK instructions.
47
9e8f1c90
L
48* Add -mlfence-after-load=, -mlfence-before-indirect-branch= and
49 -mlfence-before-ret= options to x86 assembler to help mitigate
50 CVE-2020-0551.
51
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NC
52* Add --gdwarf-5 option to the assembler to generate DWARF 5 debug output
53 (if such output is being generated). Added the ability to generate
54 version 5 .debug_line sections.
55
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TC
56* Add -mbig-obj support to i386 MingW targets.
57
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NC
58Changes in 2.34:
59
5eb617a7
L
60* Add -malign-branch-boundary=NUM, -malign-branch=TYPE[+TYPE...],
61 -malign-branch-prefix-size=NUM and -mbranches-within-32B-boundaries
62 options to x86 assembler to align branches within a fixed boundary
63 with segment prefixes or NOPs.
64
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SB
65* Add support for Zilog eZ80 and Zilog Z180 CPUs.
66
67* Add support for z80-elf target.
68
69* Add support for relocation of each byte or word of multibyte value to Z80
70 targets (just use right shift to 0, 8, 16, or 24 bits or AND operation
71 with 0xff/0xffff mask): ld a, label >> 16 \ ld hl, label & 0xffff
72
73* Add SDCC support for Z80 targets.
74
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PB
75Changes in 2.33:
76
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MM
77* Add support for the Arm Scalable Vector Extension version 2 (SVE2)
78 instructions.
79
80* Add support for the Arm Transactional Memory Extension (TME)
81 instructions.
82
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AV
83* Add support for the Armv8.1-M Mainline and M-profile Vector Extension (MVE)
84 instructions.
85
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BW
86* For MIPS, Add -m[no-]fix-loongson3-llsc option to fix (or not) Loongson3
87 LLSC Errata. Add a --enable-mips-fix-loongson3-llsc=[yes|no] configure
88 time option to set the default behavior. Set the default if the configure
89 option is not used to "no".
6f2117ba 90
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DZ
91* Add support for the Arm Cortex-A76AE, Cortex-A77 and Cortex-M35P
92 processors.
93
94* Add support for the AArch64 Cortex-A34, Cortex-A65, Cortex-A65AE,
95 Cortex-A76AE, and Cortex-A77 processors.
96
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BW
97* Add .float16 directive for both Arm and AArch64 to allow encoding of 16-bit
98 floating point literals. Add .float16_format directive and
99 -mfp16-format=[ieee|alternative] option for Arm to control the format of the
100 encoding.
101
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102* Add --gdwarf-cie-version command line flag. This allows control over which
103 version of DWARF CIE the assembler creates.
104
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NC
105Changes in 2.32:
106
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107* Add -mvexwig=[0|1] option to x86 assembler to control encoding of
108 VEX.W-ignored (WIG) VEX instructions.
109
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110* Add -mx86-used-note=[yes|no] option to generate (or not) x86 GNU property
111 notes. Add a --enable-x86-used-note configure time option to set the
112 default behavior. Set the default if the configure option is not used
113 to "no".
114
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115* Add support for the MIPS Loongson EXTensions R2 (EXT2) instructions.
116
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CX
117* Add support for the MIPS Loongson EXTensions (EXT) instructions.
118
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119* Add support for the MIPS Loongson Content Address Memory (CAM) ASE.
120
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AJ
121* Add support for the C-SKY processor series.
122
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123* Add support for the MIPS Loongson MultiMedia extensions Instructions (MMI)
124 ASE.
125
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NC
126Changes in 2.31:
127
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NC
128* The ADR and ADRL pseudo-instructions supported by the ARM assembler
129 now only set the bottom bit of the address of thumb function symbols
130 if the -mthumb-interwork command line option is active.
131
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132* Add support for the MIPS Global INValidate (GINV) ASE.
133
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SE
134* Add support for the MIPS Cyclic Redudancy Check (CRC) ASE.
135
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136* Add support for the Freescale S12Z architecture.
137
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NC
138* Add --generate-missing-build-notes=[yes|no] option to create (or not) GNU
139 Build Attribute notes if none are present in the input sources. Add a
140 --enable-generate-build-notes=[yes|no] configure time option to set the
141 default behaviour. Set the default if the configure option is not used
142 to "no".
143
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144* Remove -mold-gcc command-line option for x86 targets.
145
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L
146* Add -O[2|s] command-line options to x86 assembler to enable alternate
147 shorter instruction encoding.
148
8f065d3b 149* Add support for .nops directive. It is currently supported only for
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L
150 x86 targets.
151
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NC
152Changes in 2.30:
153
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AO
154* Add support for loaction views in DWARF debug line information.
155
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TG
156Changes in 2.29:
157
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158* Add support for ELF SHF_GNU_MBIND.
159
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160* Add support for the WebAssembly file format and wasm32 ELF conversion.
161
7e0de605 162* PowerPC gas now checks that the correct register class is used in
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AM
163 instructions. For instance, "addi %f4,%cr3,%r31" warns three times
164 that the registers are invalid.
7e0de605 165
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DD
166* Add support for the Texas Instruments PRU processor.
167
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TP
168* Support for the ARMv8-R architecture and Cortex-R52 processor has been
169 added to the ARM port.
ced40572 170
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TG
171Changes in 2.28:
172
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NC
173* Add support for the RISC-V architecture.
174
b19ea8d2 175* Add support for the ARM Cortex-M23 and Cortex-M33 processors.
ce1b0a45 176
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TG
177Changes in 2.27:
178
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L
179* Default to --enable-compressed-debug-sections=gas for Linux/x86 targets.
180
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NC
181* Add --no-pad-sections to stop the assembler from padding the end of output
182 sections up to their alignment boundary.
183
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TP
184* Support for the ARMv8-M architecture has been added to the ARM port. Support
185 for the ARMv8-M Security and DSP Extensions has also been added to the ARM
186 port.
187
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CZ
188* ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and
189 .extCoreRegister pseudo-ops that allow an user to define custom
190 instructions, conditional codes, auxiliary and core registers.
191
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L
192* Add a configure option --enable-elf-stt-common to decide whether ELF
193 assembler should generate common symbols with the STT_COMMON type by
194 default. Default to no.
195
a05a5b64 196* New command-line option --elf-stt-common= for ELF targets to control
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L
197 whether to generate common symbols with the STT_COMMON type.
198
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NC
199* Add ability to set section flags and types via numeric values for ELF
200 based targets.
81c23f82 201
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L
202* Add a configure option --enable-x86-relax-relocations to decide whether
203 x86 assembler should generate relax relocations by default. Default to
204 yes, except for x86 Solaris targets older than Solaris 12.
205
a05a5b64 206* New command-line option -mrelax-relocations= for x86 target to control
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L
207 whether to generate relax relocations.
208
a05a5b64 209* New command-line option -mfence-as-lock-add=yes for x86 target to encode
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210 lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)".
211
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CZ
212* Add assembly-time relaxation option for ARC cpus.
213
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214* Add --with-cpu=TYPE configure option for ARC gas. This allows the default
215 cpu type to be adjusted at configure time.
216
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TG
217Changes in 2.26:
218
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L
219* Add a configure option --enable-compressed-debug-sections={all,gas} to
220 decide whether DWARF debug sections should be compressed by default.
e12fe555 221
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NC
222* Add support for the ARC EM/HS, and ARC600/700 architectures. Remove
223 assembler support for Argonaut RISC architectures.
224
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NC
225* Symbol and label names can now be enclosed in double quotes (") which allows
226 them to contain characters that are not part of valid symbol names in high
227 level languages.
228
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MW
229* Added the correctly spelled -march=armv6kz, for ARMv6KZ support. The
230 previous spelling, -march=armv6zk, is still accepted.
231
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MW
232* Support for the ARMv8.1 architecture has been added to the Aarch64 port.
233 Support for the individual ARMv8.1 Adv.SIMD, LOR and PAN architecture
234 extensions has also been added to the Aarch64 port.
235
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236* Support for the ARMv8.1 architecture has been added to the ARM port. Support
237 for the individual ARMv8.1 Adv.SIMD and PAN architecture extensions has also
238 been added to the ARM port.
239
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240* Extend --compress-debug-sections option to support
241 --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] for ELF
242 targets.
243
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L
244* --compress-debug-sections is turned on for Linux/x86 by default.
245
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TG
246Changes in 2.25:
247
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248* Add support for the AVR Tiny microcontrollers.
249
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CS
250* Replace support for openrisc and or32 with support for or1k.
251
2e6976a8 252* Enhanced the ARM port to accept the assembler output from the CodeComposer
a05a5b64 253 Studio tool. Support is enabled via the new command-line option -mccs.
2e6976a8 254
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KLC
255* Add support for the Andes NDS32.
256
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TG
257Changes in 2.24:
258
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NC
259* Add support for the Texas Instruments MSP430X processor.
260
a05a5b64 261* Add -gdwarf-sections command-line option to enable per-code-section
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NC
262 generation of DWARF .debug_line sections.
263
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SL
264* Add support for Altera Nios II.
265
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NC
266* Add support for the Imagination Technologies Meta processor.
267
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NC
268* Add support for the v850e3v5.
269
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RS
270* Remove assembler support for MIPS ECOFF targets.
271
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TG
272Changes in 2.23:
273
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NC
274* Add support for the 64-bit ARM architecture: AArch64.
275
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NC
276* Add support for S12X processor.
277
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JL
278* Add support for the VLE extension to the PowerPC architecture.
279
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280* Add support for the Freescale XGATE architecture.
281
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RM
282* Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock
283 directives. These are currently available only for x86 and ARM targets.
284
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DD
285* Add support for the Renesas RL78 architecture.
286
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NC
287* Add support for the Adapteva EPIPHANY architecture.
288
fe13e45b 289* For x86, allow 'rep bsf', 'rep bsr', and 'rep ret' syntax.
29c048b6 290
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TG
291Changes in 2.22:
292
69f56ae1 293* Add support for the Tilera TILEPro and TILE-Gx architectures.
44f45767 294
90b3661c 295Changes in 2.21:
44f45767 296
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297* Gas no longer requires doubling of ampersands in macros.
298
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JM
299* Add support for the TMS320C6000 (TI C6X) processor family.
300
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301* GAS now understands an extended syntax in the .section directive flags
302 for COFF targets that allows the section's alignment to be specified. This
303 feature has also been backported to the 2.20 release series, starting with
304 2.20.1.
305
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NC
306* Add support for the Renesas RX processor.
307
a05a5b64 308* New command-line option, --compress-debug-sections, which requests
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309 compression of DWARF debug information sections in the relocatable output
310 file. Compressed debug sections are supported by readelf, objdump, and
311 gold, but not currently by Gnu ld.
312
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TG
313Changes in 2.20:
314
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315* Added support for v850e2 and v850e2v3.
316
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NC
317* GNU/Linux targets now supports "gnu_unique_object" as a value in the .type
318 pseudo op. It marks the symbol as being globally unique in the entire
319 process.
320
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NC
321* ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
322 in binary rather than text.
6e33da12 323
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324* Add support for common symbol alignment to PE formats.
325
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CC
326* Add support for the new discriminator column in the DWARF line table,
327 with a discriminator operand for the .loc directive.
328
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NC
329* Add support for Sunplus score architecture.
330
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NC
331* The .type pseudo-op now accepts a type of STT_GNU_IFUNC which can be used to
332 indicate that if the symbol is the target of a relocation, its value should
333 not be use. Instead the function should be invoked and its result used as
334 the value.
fa94de6b 335
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NC
336* Add support for Lattice Mico32 (lm32) architecture.
337
fa94de6b 338* Add support for Xilinx MicroBlaze architecture.
caa03924 339
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TG
340Changes in 2.19:
341
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DJ
342* New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind
343 tables without runtime relocation.
344
a05a5b64 345* New command-line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
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DD
346 adds compatibility with H'00 style hex constants.
347
a05a5b64 348* New command-line option, -msse-check=[none|error|warning], for x86
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L
349 targets.
350
a05a5b64 351* New sub-option added to the assembler's -a command-line switch to
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NC
352 generate a listing output. The 'g' sub-option will insert into the listing
353 various information about the assembly, such as assembler version, the
a05a5b64 354 command-line options used, and a time stamp.
83f10cb2 355
a05a5b64 356* New command-line option -msse2avx for x86 target to encode SSE
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L
357 instructions with VEX prefix.
358
f1f8f695 359* Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target.
c0f3af97 360
a05a5b64 361* New command-line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
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L
362 -mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg,
363 -mnaked-reg and -mold-gcc, for x86 targets.
364
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NC
365* Support for generating wide character strings has been added via the new
366 pseudo ops: .string16, .string32 and .string64.
367
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MM
368* Support for SSE5 has been added to the i386 port.
369
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NC
370Changes in 2.18:
371
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NC
372* The GAS sources are now released under the GPLv3.
373
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NC
374* Support for the National Semiconductor CR16 target has been added.
375
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AM
376* Added gas .reloc pseudo. This is a low-level interface for creating
377 relocations.
378
99ad8390
NC
379* Add support for x86_64 PE+ target.
380
1c0d3aa6 381* Add support for Score target.
83518699 382
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NC
383Changes in 2.17:
384
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NC
385* Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
386
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NS
387* Support for ms2 architecture has been added.
388
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NC
389* Support for the Z80 processor family has been added.
390
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MM
391* Add support for the "@<file>" syntax to the command line, so that extra
392 switches can be read from <file>.
393
a05a5b64 394* The SH target supports a new command-line switch --enable-reg-prefix which,
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NC
395 if enabled, will allow register names to be optionally prefixed with a $
396 character. This allows register names to be distinguished from label names.
fa94de6b 397
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JB
398* Macros with a variable number of arguments are now supported. See the
399 documentation for how this works.
400
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NC
401* Added --reduce-memory-overheads switch to reduce the size of the hash
402 tables used, at the expense of longer assembly times, and
403 --hash-size=<NUMBER> to set the size of the hash tables used by gas.
404
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JB
405* Macro names and macro parameter names can now be any identifier that would
406 also be legal as a symbol elsewhere. For macro parameter names, this is
407 known to cause problems in certain sources when the respective target uses
408 characters inconsistently, and thus macro parameter references may no longer
409 be recognized as such (see the documentation for details).
fa94de6b 410
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NC
411* Support the .f_floating, .d_floating, .g_floating and .h_floating directives
412 for the VAX target in order to be more compatible with the VAX MACRO
413 assembler.
414
a05a5b64 415* New command-line option -mtune=[itanium1|itanium2] for IA64 targets.
8c2fda1d 416
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NC
417Changes in 2.16:
418
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JB
419* Redefinition of macros now results in an error.
420
a05a5b64 421* New command-line option -mhint.b=[ok|warning|error] for IA64 targets.
91d777ee 422
a05a5b64 423* New command-line option -munwind-check=[warning|error] for IA64
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L
424 targets.
425
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JB
426* The IA64 port now uses automatic dependency violation removal as its default
427 mode.
428
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NC
429* Port to MAXQ processor contributed by HCL Tech.
430
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NC
431* Added support for generating unwind tables for ARM ELF targets.
432
a05a5b64 433* Add a -g command-line option to generate debug information in the target's
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NC
434 preferred debug format.
435
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NC
436* Support for the crx-elf target added.
437
1a320fbb 438* Support for the sh-symbianelf target added.
1fe1f39c 439
0503b355
BF
440* Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations
441 on pe[i]-i386; required for this target's DWARF 2 support.
442
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NC
443* Support for Motorola MCF521x/5249/547x/548x added.
444
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NC
445* Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC
446 instrucitons.
447
a05a5b64 448* New command-line option -mno-shared for MIPS ELF targets.
aa6975fb 449
a05a5b64 450* New command-line option --alternate and pseudo-ops .altmacro and .noaltmacro
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NC
451 added to enter (and leave) alternate macro syntax mode.
452
0477af35
NC
453Changes in 2.15:
454
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CD
455* The MIPS -membedded-pic option (Embedded-PIC code generation) is
456 deprecated and will be removed in a future release.
457
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NC
458* Added PIC m32r Linux (ELF) and support to M32R assembler.
459
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MM
460* Added support for ARM V6.
461
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MS
462* Added support for sh4a and variants.
463
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NC
464* Support for Renesas M32R2 added.
465
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MS
466* Limited support for Mapping Symbols as specified in the ARM ELF
467 specification has been added to the arm assembler.
ed769ec1 468
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NC
469* On ARM architectures, added a new gas directive ".unreq" that undoes
470 definitions created by ".req".
471
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NC
472* Support for Motorola ColdFire MCF528x added.
473
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NC
474* Added --gstabs+ switch to enable the generation of STABS debug format
475 information with GNU extensions.
fa94de6b 476
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CD
477* Added support for MIPS64 Release 2.
478
8ad30312
NC
479* Added support for v850e1.
480
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L
481* Added -n switch for x86 assembler. By default, x86 GAS replaces
482 multiple nop instructions used for alignment within code sections
483 with multi-byte nop instructions such as leal 0(%esi,1),%esi. This
484 switch disables the optimization.
485
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ILT
486* Removed -n option from MIPS assembler. It was not useful, and confused the
487 existing -non_shared option.
488
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CD
489Changes in 2.14:
490
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CD
491* Added support for MIPS32 Release 2.
492
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NC
493* Added support for Xtensa architecture.
494
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NC
495* Support for Intel's iWMMXt processor (an ARM variant) added.
496
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NC
497* An assembler test generator has been contributed and an example file that
498 uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c).
fa94de6b 499
5177500f
NC
500* Support for SH2E added.
501
fea17916
NC
502* GASP has now been removed.
503
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NC
504* Support for Texas Instruments TMS320C4x and TMS320C3x series of
505 DSP's contributed by Michael Hayes and Svein E. Seldal.
fa94de6b 506
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NC
507* Support for the Ubicom IP2xxx microcontroller added.
508
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NC
509Changes in 2.13:
510
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NC
511* Support for the Fujitsu FRV architecture added by Red Hat. Models for FR400
512 and FR500 included.
0ebb9a87 513
a40cbfa3 514* Support for DLX processor added.
52216602 515
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516* GASP has now been deprecated and will be removed in a future release. Use
517 the macro facilities in GAS instead.
3f965e60 518
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519* GASP now correctly parses floating point numbers. Unless the base is
520 explicitly specified, they are interpreted as decimal numbers regardless of
521 the currently specified base.
1ac57253 522
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523Changes in 2.12:
524
a40cbfa3 525* Support for Don Knuth's MMIX, by Hans-Peter Nilsson.
49fda6c8 526
a40cbfa3 527* Support for the OpenRISC 32-bit embedded processor by OpenCores.
3b16e843 528
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529* The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
530 specifying the target instruction set. The old method of specifying the
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531 target processor has been deprecated, but is still accepted for
532 compatibility.
03b1477f 533
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534* Support for the VFP floating-point instruction set has been added to
535 the ARM assembler.
252b5132 536
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537* New psuedo op: .incbin to include a set of binary data at a given point
538 in the assembly. Contributed by Anders Norlander.
7e005732 539
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540* The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated
541 but still works for compatability.
ec68c924 542
fa94de6b 543* The MIPS assembler no longer issues a warning by default when it
a05a5b64 544 generates a nop instruction from a macro. The new command-line option
a40cbfa3 545 -n will turn on the warning.
63486801 546
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547Changes in 2.11:
548
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549* Support for PDP-11 and 2.11BSD a.out format, by Lars Brinkhoff.
550
a40cbfa3 551* x86 gas now supports the full Pentium4 instruction set.
a167610d 552
a40cbfa3 553* Support for AMD x86-64 architecture, by Jan Hubicka, SuSE Labs.
c0d8940f 554
a40cbfa3 555* Support for Motorola 68HC11 and 68HC12.
df86943d 556
a40cbfa3 557* Support for Texas Instruments TMS320C54x (tic54x).
39bec121 558
a40cbfa3 559* Support for IA-64.
2dac7317 560
a40cbfa3 561* Support for i860, by Jason Eckhardt.
22b36938 562
a40cbfa3 563* Support for CRIS (Axis Communications ETRAX series).
5bcac8a4 564
a40cbfa3 565* x86 gas has a new .arch pseudo op to specify the target CPU architecture.
a38cf1db 566
a05a5b64 567* x86 gas -q command-line option quietens warnings about register size changes
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568 due to suffix, indirect jmp/call without `*', stand-alone prefixes, and
569 translating various deprecated floating point instructions.
a38cf1db 570
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571Changes in 2.10:
572
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573* Support for the ARM msr instruction was changed to only allow an immediate
574 operand when altering the flags field.
d14442f4 575
a40cbfa3 576* Support for ATMEL AVR.
adde6300 577
a40cbfa3 578* Support for IBM 370 ELF. Somewhat experimental.
b5ebe70e 579
a40cbfa3 580* Support for numbers with suffixes.
3fd9f047 581
a40cbfa3 582* Added support for breaking to the end of repeat loops.
6a6987a9 583
a40cbfa3 584* Added support for parallel instruction syntax (DOUBLEBAR_PARALLEL).
6a6987a9 585
a40cbfa3 586* New .elseif pseudo-op added.
3fd9f047 587
a40cbfa3 588* New --fatal-warnings option.
1f776aa5 589
a40cbfa3 590* picoJava architecture support added.
252b5132 591
a40cbfa3 592* Motorola MCore 210 processor support added.
041dd5a9 593
fa94de6b 594* A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
a40cbfa3 595 assembly programs with intel syntax.
252b5132 596
a40cbfa3 597* New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.
252b5132 598
a40cbfa3 599* Added -gdwarf2 option to generate DWARF 2 debugging information.
041dd5a9 600
a40cbfa3 601* Full 16-bit mode support for i386.
252b5132 602
fa94de6b 603* Greatly improved instruction operand checking for i386. This change will
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604 produce errors or warnings on incorrect assembly code that previous versions
605 of gas accepted. If you get unexpected messages from code that worked with
606 older versions of gas, please double check the code before reporting a bug.
252b5132 607
a40cbfa3 608* Weak symbol support added for COFF targets.
252b5132 609
a40cbfa3 610* Mitsubishi D30V support added.
252b5132 611
a40cbfa3 612* Texas Instruments c80 (tms320c80) support added.
252b5132 613
a40cbfa3 614* i960 ELF support added.
bedf545c 615
a40cbfa3 616* ARM ELF support added.
a057431b 617
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618Changes in 2.9:
619
a40cbfa3 620* Texas Instruments c30 (tms320c30) support added.
252b5132 621
fa94de6b 622* The assembler now optimizes the exception frame information generated by egcs
a40cbfa3 623 and gcc 2.8. The new --traditional-format option disables this optimization.
252b5132 624
a40cbfa3 625* Added --gstabs option to generate stabs debugging information.
252b5132 626
fa94de6b 627* The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
a40cbfa3 628 listing.
252b5132 629
a40cbfa3 630* Added -MD option to print dependencies.
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631
632Changes in 2.8:
633
a40cbfa3 634* BeOS support added.
252b5132 635
a40cbfa3 636* MIPS16 support added.
252b5132 637
a40cbfa3 638* Motorola ColdFire 5200 support added (configure for m68k and use -m5200).
252b5132 639
a40cbfa3 640* Alpha/VMS support added.
252b5132 641
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642* m68k options --base-size-default-16, --base-size-default-32,
643 --disp-size-default-16, and --disp-size-default-32 added.
252b5132 644
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645* The alignment directives now take an optional third argument, which is the
646 maximum number of bytes to skip. If doing the alignment would require
647 skipping more than the given number of bytes, the alignment is not done at
648 all.
252b5132 649
a40cbfa3 650* The ELF assembler has a new pseudo-op, .symver, used for symbol versioning.
252b5132 651
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652* The -a option takes a new suboption, c (e.g., -alc), to skip false
653 conditionals in listings.
252b5132 654
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655* Added new pseudo-op, .equiv; it's like .equ, except that it is an error if
656 the symbol is already defined.
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657
658Changes in 2.7:
659
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660* The PowerPC assembler now allows the use of symbolic register names (r0,
661 etc.) if -mregnames is used. Symbolic names preceded by a '%' (%r0, etc.)
662 can be used any time. PowerPC 860 move to/from SPR instructions have been
663 added.
252b5132 664
a40cbfa3 665* Alpha Linux (ELF) support added.
252b5132 666
a40cbfa3 667* PowerPC ELF support added.
252b5132 668
a40cbfa3 669* m68k Linux (ELF) support added.
252b5132 670
a40cbfa3 671* i960 Hx/Jx support added.
252b5132 672
a40cbfa3 673* i386/PowerPC gnu-win32 support added.
252b5132 674
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675* SCO ELF support added. For OpenServer 5 targets (i386-unknown-sco3.2v5) the
676 default is to build COFF-only support. To get a set of tools that generate
fa94de6b 677 ELF (they'll understand both COFF and ELF), you must configure with
a40cbfa3 678 target=i386-unknown-sco3.2v5elf.
252b5132 679
a40cbfa3 680* m88k-motorola-sysv3* support added.
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681
682Changes in 2.6:
683
a40cbfa3 684* Gas now directly supports macros, without requiring GASP.
252b5132 685
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686* Gas now has an MRI assembler compatibility mode. Use -M or --mri to select
687 MRI mode. The pseudo-op ``.mri 1'' will switch into the MRI mode until the
688 ``.mri 0'' is seen; this can be convenient for inline assembler code.
252b5132 689
a40cbfa3 690* Added --defsym SYM=VALUE option.
252b5132 691
a40cbfa3 692* Added -mips4 support to MIPS assembler.
252b5132 693
a40cbfa3 694* Added PIC support to Solaris and SPARC SunOS 4 assembler.
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695
696Changes in 2.4:
697
a40cbfa3 698* Converted this directory to use an autoconf-generated configure script.
252b5132 699
a40cbfa3 700* ARM support, from Richard Earnshaw.
252b5132 701
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702* Updated VMS support, from Pat Rankin, including considerably improved
703 debugging support.
252b5132 704
a40cbfa3 705* Support for the control registers in the 68060.
252b5132 706
a40cbfa3 707* Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to
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708 provide for possible future gcc changes, for targets where gas provides some
709 features not available in the native assembler. If the native assembler is
a40cbfa3 710 used, it should become obvious pretty quickly what the problem is.
252b5132 711
a40cbfa3 712* Usage message is available with "--help".
252b5132 713
fa94de6b 714* The GNU Assembler Preprocessor (gasp) is included. (Actually, it was in 2.3
a40cbfa3 715 also, but didn't get into the NEWS file.)
252b5132 716
a40cbfa3 717* Weak symbol support for a.out.
252b5132 718
fa94de6b 719* A bug in the listing code which could cause an infinite loop has been fixed.
a40cbfa3 720 Bugs in listings when generating a COFF object file have also been fixed.
252b5132 721
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722* Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by
723 Paul Kranenburg.
252b5132 724
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725* Improved Alpha support. Immediate constants can have a much larger range
726 now. Support for the 21164 has been contributed by Digital.
252b5132 727
a40cbfa3 728* Updated ns32k (pc532-mach, netbsd532) support from Ian Dall.
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729
730Changes in 2.3:
731
a40cbfa3 732* Mach i386 support, by David Mackenzie and Ken Raeburn.
252b5132 733
a40cbfa3 734* RS/6000 and PowerPC support by Ian Taylor.
252b5132 735
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736* VMS command scripts (make-gas.com, config-gas.com) have been worked on a bit,
737 based on mail received from various people. The `-h#' option should work
738 again too.
252b5132 739
a40cbfa3 740* HP-PA work, by Jeff Law. Note, for the PA, gas-2.3 has been designed to work
fa94de6b 741 with gdb-4.12 and gcc-2.6. As gcc-2.6 has not been released yet, a special
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742 version of gcc-2.5.8 has been patched to work with gas-2.3. You can retrieve
743 this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu
744 in the "dist" directory.
252b5132 745
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746* Vax support in gas fixed for BSD, so it builds and seems to run a couple
747 simple tests okay. I haven't put it through extensive testing. (GNU make is
748 currently required for BSD 4.3 builds.)
252b5132 749
fa94de6b 750* Support for the DEC Alpha, running OSF/1 (ECOFF format). The gas support is
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751 based on code donated by CMU, which used an a.out-based format. I'm afraid
752 the alpha-a.out support is pretty badly mangled, and much of it removed;
753 making it work will require rewriting it as BFD support for the format anyways.
252b5132 754
a40cbfa3 755* Irix 5 support.
252b5132 756
fa94de6b 757* The test suites have been fixed up a bit, so that they should work with a
a40cbfa3 758 couple different versions of expect and dejagnu.
252b5132 759
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760* Symbols' values are now handled internally as expressions, permitting more
761 flexibility in evaluating them in some cases. Some details of relocation
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762 handling have also changed, and simple constant pool management has been
763 added, to make the Alpha port easier.
252b5132 764
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765* New option "--statistics" for printing out program run times. This is
766 intended to be used with the gcc "-Q" option, which prints out times spent in
767 various phases of compilation. (You should be able to get all of them
768 printed out with "gcc -Q -Wa,--statistics", I think.)
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769
770Changes in 2.2:
771
a40cbfa3 772* RS/6000 AIX and MIPS SGI Irix 5 support has been added.
252b5132 773
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774* Configurations that are still in development (and therefore are convenient to
775 have listed in configure.in) still get rejected without a minor change to
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776 gas/Makefile.in, so people not doing development work shouldn't get the
777 impression that support for such configurations is actually believed to be
778 reliable.
252b5132 779
fa94de6b 780* The program name (usually "as") is printed when a fatal error message is
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781 displayed. This should prevent some confusion about the source of occasional
782 messages about "internal errors".
252b5132 783
fa94de6b 784* ELF support is falling into place. Support for the 386 should be working.
a40cbfa3 785 Support for SPARC Solaris is in. HPPA support from Utah is being integrated.
252b5132 786
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787* Symbol values are maintained as expressions instead of being immediately
788 boiled down to add-symbol, sub-symbol, and constant. This permits slightly
789 more complex calculations involving symbols whose values are not alreadey
790 known.
252b5132 791
a40cbfa3 792* DBX-style debugging info ("stabs") is now supported for COFF formats.
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793 If any stabs directives are seen in the source, GAS will create two new
794 sections: a ".stab" and a ".stabstr" section. The format of the .stab
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795 section is nearly identical to the a.out symbol format, and .stabstr is
796 its string table. For this to be useful, you must have configured GCC
797 to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB
798 that can use the stab sections (4.11 or later).
252b5132 799
fa94de6b 800* LynxOS, on i386 and m68k platforms, is now supported. SPARC LynxOS
a40cbfa3 801 support is in progress.
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802
803Changes in 2.1:
804
fa94de6b 805* Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
a40cbfa3 806 incorporated, but not well tested yet.
252b5132 807
fa94de6b 808* Altered the opcode table split for m68k; it should require less VM to compile
a40cbfa3 809 with gcc now.
252b5132 810
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811* Some minor adjustments to add (Convergent Technologies') Miniframe support,
812 suggested by Ronald Cole.
252b5132 813
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814* HPPA support (running OSF only, not HPUX) has been contributed by Utah. This
815 includes improved ELF support, which I've started adapting for SPARC Solaris
816 2.x. Integration isn't completely, so it probably won't work.
252b5132 817
a40cbfa3 818* HP9000/300 support, donated by HP, has been merged in.
252b5132 819
a40cbfa3 820* Ian Taylor has finished the MIPS ECOFF (Ultrix, Irix) support.
252b5132 821
a40cbfa3 822* Better error messages for unsupported configurations (e.g., hppa-hpux).
252b5132 823
a40cbfa3 824* Test suite framework is starting to become reasonable.
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825
826Changes in 2.0:
827
a40cbfa3 828* Mostly bug fixes.
252b5132 829
a40cbfa3 830* Some more merging of BFD and ELF code, but ELF still doesn't work.
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831
832Changes in 1.94:
833
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834* BFD merge is partly done. Adventurous souls may try giving configure the
835 "--with-bfd-assembler" option. Currently, ELF format requires it, a.out
836 format accepts it; SPARC CPU accepts it. It's the default only for OS "elf"
837 or "solaris". (ELF isn't really supported yet. It needs work. I've got
838 some code from Utah for HP-PA ELF, and from DG for m88k ELF, but they're not
839 fully merged yet.)
252b5132 840
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841* The 68K opcode table has been split in half. It should now compile under gcc
842 without consuming ridiculous amounts of memory.
252b5132 843
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844* A couple data structures have been reduced in size. This should result in
845 saving a little bit of space at runtime.
252b5132 846
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847* Support for MIPS, from OSF and Ralph Campbell, has been merged in. The OSF
848 code provided ROSE format support, which I haven't merged in yet. (I can
849 make it available, if anyone wants to try it out.) Ralph's code, for BSD
850 4.4, supports a.out format. We don't have ECOFF support in just yet; it's
851 coming.
252b5132 852
a40cbfa3 853* Support for the Hitachi H8/500 has been added.
252b5132 854
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855* VMS host and target support should be working now, thanks chiefly to Eric
856 Youngdale.
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857
858Changes in 1.93.01:
859
a40cbfa3 860* For m68k, support for more processors has been added: 68040, CPU32, 68851.
252b5132 861
a40cbfa3 862* For i386, .align is now power-of-two; was number-of-bytes.
252b5132 863
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864* For m68k, "%" is now accepted before register names. For COFF format, which
865 doesn't use underscore prefixes for C labels, it is required, so variable "a0"
866 can be distinguished from the register.
252b5132 867
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868* Last public release was 1.38. Lots of configuration changes since then, lots
869 of new CPUs and formats, lots of bugs fixed.
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870
871\f
b3adc24a 872Copyright (C) 2012-2020 Free Software Foundation, Inc.
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873
874Copying and distribution of this file, with or without modification,
875are permitted in any medium without royalty provided the copyright
876notice and this notice are preserved.
877
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878Local variables:
879fill-column: 79
880End: