]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - gas/NEWS
aarch64: Add DSB instruction Armv8.7-a variant
[thirdparty/binutils-gdb.git] / gas / NEWS
CommitLineData
252b5132 1-*- text -*-
6d96a594 2
58bf9b6a
L
3* Add support for Intel AVX VNNI instructions.
4
c1fa250a
LC
5* Add support for Intel HRESET instruction.
6
f64c42a9
LC
7* Add support for Intel UINTR instructions.
8
6d96a594
C
9* Support non-absolute segment values for i386 lcall and ljmp.
10
b71702f1
NC
11* When setting the link order attribute of ELF sections, it is now possible to
12 use a numeric section index instead of symbol name.
42c36b73 13
b71702f1
NC
14* Add support for Cortex-A78, Cortex-A78AE and Cortex-X1 for AArch64 and ARM.
15 Add support for Cortex-R82, Neoverse V1, and Neoverse N2 for ARM.
77718e5b 16
b71702f1 17* Add support for ETMv4 (Embedded Trace Macrocell), ETE (Embedded Trace
6278c6a6
PW
18 Extension), TRBE (Trace Buffer Extension), CSRE (Call Stack Recorder
19 Extension) and BRBE (Branch Record Buffer Extension) system registers for
20 AArch64.
c81946ef 21
8926e54e 22* Add support for Armv8-R and Armv8.7-A AArch64.
c81946ef 23
fd195909
PW
24* Add support for DSB memory nXS barrier instruction for Armv8.7 AArch64.
25
81d54bb7 26* Add support for Intel TDX instructions.
96a84ea3 27
c4694f17
TG
28* Add support for Intel Key Locker instructions.
29
b1766e7c
NC
30* Added a .nop directive to generate a single no-op instruction in a target
31 neutral manner. This instruction does have an effect on DWARF line number
32 generation, if that is active.
33
a0522545
ML
34* Removed --reduce-memory-overheads and --hash-size as gas now
35 uses hash tables that can be expand and shrink automatically.
36
789198ca
L
37* Add {disp16} pseudo prefix to x86 assembler.
38
260cd341
LC
39* Add support for Intel AMX instructions.
40
939b95c7
L
41* Configure with --enable-x86-used-note by default for Linux/x86.
42
b115b9fd
NC
43Changes in 2.35:
44
bbd19b19
L
45* X86 NaCl target support is removed.
46
6914be53
L
47* Extend .symver directive to update visibility of the original symbol
48 and assign one original symbol to different versioned symbols.
49
6e0e8b45
L
50* Add support for Intel SERIALIZE and TSXLDTRK instructions.
51
9e8f1c90
L
52* Add -mlfence-after-load=, -mlfence-before-indirect-branch= and
53 -mlfence-before-ret= options to x86 assembler to help mitigate
54 CVE-2020-0551.
55
5496f3c6
NC
56* Add --gdwarf-5 option to the assembler to generate DWARF 5 debug output
57 (if such output is being generated). Added the ability to generate
58 version 5 .debug_line sections.
59
251dae91
TC
60* Add -mbig-obj support to i386 MingW targets.
61
ae774686
NC
62Changes in 2.34:
63
5eb617a7
L
64* Add -malign-branch-boundary=NUM, -malign-branch=TYPE[+TYPE...],
65 -malign-branch-prefix-size=NUM and -mbranches-within-32B-boundaries
66 options to x86 assembler to align branches within a fixed boundary
67 with segment prefixes or NOPs.
68
6655dba2
SB
69* Add support for Zilog eZ80 and Zilog Z180 CPUs.
70
71* Add support for z80-elf target.
72
73* Add support for relocation of each byte or word of multibyte value to Z80
74 targets (just use right shift to 0, 8, 16, or 24 bits or AND operation
75 with 0xff/0xffff mask): ld a, label >> 16 \ ld hl, label & 0xffff
76
77* Add SDCC support for Z80 targets.
78
60391a25
PB
79Changes in 2.33:
80
7738ddb4
MM
81* Add support for the Arm Scalable Vector Extension version 2 (SVE2)
82 instructions.
83
84* Add support for the Arm Transactional Memory Extension (TME)
85 instructions.
86
514bbb0f
AV
87* Add support for the Armv8.1-M Mainline and M-profile Vector Extension (MVE)
88 instructions.
89
b20d3859
BW
90* For MIPS, Add -m[no-]fix-loongson3-llsc option to fix (or not) Loongson3
91 LLSC Errata. Add a --enable-mips-fix-loongson3-llsc=[yes|no] configure
92 time option to set the default behavior. Set the default if the configure
93 option is not used to "no".
6f2117ba 94
546053ac
DZ
95* Add support for the Arm Cortex-A76AE, Cortex-A77 and Cortex-M35P
96 processors.
97
98* Add support for the AArch64 Cortex-A34, Cortex-A65, Cortex-A65AE,
99 Cortex-A76AE, and Cortex-A77 processors.
100
b20d3859
BW
101* Add .float16 directive for both Arm and AArch64 to allow encoding of 16-bit
102 floating point literals. Add .float16_format directive and
103 -mfp16-format=[ieee|alternative] option for Arm to control the format of the
104 encoding.
105
66f8b2cb
AB
106* Add --gdwarf-cie-version command line flag. This allows control over which
107 version of DWARF CIE the assembler creates.
108
f974f26c
NC
109Changes in 2.32:
110
03751133
L
111* Add -mvexwig=[0|1] option to x86 assembler to control encoding of
112 VEX.W-ignored (WIG) VEX instructions.
113
b4a3a7b4
L
114* Add -mx86-used-note=[yes|no] option to generate (or not) x86 GNU property
115 notes. Add a --enable-x86-used-note configure time option to set the
116 default behavior. Set the default if the configure option is not used
117 to "no".
118
a693765e
CX
119* Add support for the MIPS Loongson EXTensions R2 (EXT2) instructions.
120
bdc6c06e
CX
121* Add support for the MIPS Loongson EXTensions (EXT) instructions.
122
716c08de
CX
123* Add support for the MIPS Loongson Content Address Memory (CAM) ASE.
124
b8891f8d
AJ
125* Add support for the C-SKY processor series.
126
8095d2f7
CX
127* Add support for the MIPS Loongson MultiMedia extensions Instructions (MMI)
128 ASE.
129
719d8288
NC
130Changes in 2.31:
131
fc6141f0
NC
132* The ADR and ADRL pseudo-instructions supported by the ARM assembler
133 now only set the bottom bit of the address of thumb function symbols
134 if the -mthumb-interwork command line option is active.
135
6f20c942
FS
136* Add support for the MIPS Global INValidate (GINV) ASE.
137
730c3174
SE
138* Add support for the MIPS Cyclic Redudancy Check (CRC) ASE.
139
7b4ae824
JD
140* Add support for the Freescale S12Z architecture.
141
0df8ad28
NC
142* Add --generate-missing-build-notes=[yes|no] option to create (or not) GNU
143 Build Attribute notes if none are present in the input sources. Add a
144 --enable-generate-build-notes=[yes|no] configure time option to set the
145 default behaviour. Set the default if the configure option is not used
146 to "no".
147
bd5dea88
L
148* Remove -mold-gcc command-line option for x86 targets.
149
b6f8c7c4
L
150* Add -O[2|s] command-line options to x86 assembler to enable alternate
151 shorter instruction encoding.
152
8f065d3b 153* Add support for .nops directive. It is currently supported only for
62a02d25
L
154 x86 targets.
155
9176ac5b
NC
156Changes in 2.30:
157
ba8826a8
AO
158* Add support for loaction views in DWARF debug line information.
159
55a09eb6
TG
160Changes in 2.29:
161
a91e1603
L
162* Add support for ELF SHF_GNU_MBIND.
163
f96bd6c2
PC
164* Add support for the WebAssembly file format and wasm32 ELF conversion.
165
7e0de605 166* PowerPC gas now checks that the correct register class is used in
ece5dcc1
AM
167 instructions. For instance, "addi %f4,%cr3,%r31" warns three times
168 that the registers are invalid.
7e0de605 169
93f11b16
DD
170* Add support for the Texas Instruments PRU processor.
171
0cda1e19
TP
172* Support for the ARMv8-R architecture and Cortex-R52 processor has been
173 added to the ARM port.
ced40572 174
9703a4ef
TG
175Changes in 2.28:
176
e23eba97
NC
177* Add support for the RISC-V architecture.
178
b19ea8d2 179* Add support for the ARM Cortex-M23 and Cortex-M33 processors.
ce1b0a45 180
96a84ea3
TG
181Changes in 2.27:
182
4e3e1fdf
L
183* Default to --enable-compressed-debug-sections=gas for Linux/x86 targets.
184
2edb36e7
NC
185* Add --no-pad-sections to stop the assembler from padding the end of output
186 sections up to their alignment boundary.
187
15afaa63
TP
188* Support for the ARMv8-M architecture has been added to the ARM port. Support
189 for the ARMv8-M Security and DSP Extensions has also been added to the ARM
190 port.
191
f36e33da
CZ
192* ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and
193 .extCoreRegister pseudo-ops that allow an user to define custom
194 instructions, conditional codes, auxiliary and core registers.
195
b8871f35
L
196* Add a configure option --enable-elf-stt-common to decide whether ELF
197 assembler should generate common symbols with the STT_COMMON type by
198 default. Default to no.
199
a05a5b64 200* New command-line option --elf-stt-common= for ELF targets to control
b8871f35
L
201 whether to generate common symbols with the STT_COMMON type.
202
9fb71ee4
NC
203* Add ability to set section flags and types via numeric values for ELF
204 based targets.
81c23f82 205
0cb4071e
L
206* Add a configure option --enable-x86-relax-relocations to decide whether
207 x86 assembler should generate relax relocations by default. Default to
208 yes, except for x86 Solaris targets older than Solaris 12.
209
a05a5b64 210* New command-line option -mrelax-relocations= for x86 target to control
0cb4071e
L
211 whether to generate relax relocations.
212
a05a5b64 213* New command-line option -mfence-as-lock-add=yes for x86 target to encode
9d3fc4e1
L
214 lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)".
215
4670103e
CZ
216* Add assembly-time relaxation option for ARC cpus.
217
9004b6bd
AB
218* Add --with-cpu=TYPE configure option for ARC gas. This allows the default
219 cpu type to be adjusted at configure time.
220
7feec526
TG
221Changes in 2.26:
222
edeefb67
L
223* Add a configure option --enable-compressed-debug-sections={all,gas} to
224 decide whether DWARF debug sections should be compressed by default.
e12fe555 225
886a2506
NC
226* Add support for the ARC EM/HS, and ARC600/700 architectures. Remove
227 assembler support for Argonaut RISC architectures.
228
d02603dc
NC
229* Symbol and label names can now be enclosed in double quotes (") which allows
230 them to contain characters that are not part of valid symbol names in high
231 level languages.
232
f33026a9
MW
233* Added the correctly spelled -march=armv6kz, for ARMv6KZ support. The
234 previous spelling, -march=armv6zk, is still accepted.
235
88f0ea34
MW
236* Support for the ARMv8.1 architecture has been added to the Aarch64 port.
237 Support for the individual ARMv8.1 Adv.SIMD, LOR and PAN architecture
238 extensions has also been added to the Aarch64 port.
239
a5932920
MW
240* Support for the ARMv8.1 architecture has been added to the ARM port. Support
241 for the individual ARMv8.1 Adv.SIMD and PAN architecture extensions has also
242 been added to the ARM port.
243
ea556d25
L
244* Extend --compress-debug-sections option to support
245 --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] for ELF
246 targets.
247
0d2b51ad
L
248* --compress-debug-sections is turned on for Linux/x86 by default.
249
c50415e2
TG
250Changes in 2.25:
251
f36e8886
BS
252* Add support for the AVR Tiny microcontrollers.
253
73589c9d
CS
254* Replace support for openrisc and or32 with support for or1k.
255
2e6976a8 256* Enhanced the ARM port to accept the assembler output from the CodeComposer
a05a5b64 257 Studio tool. Support is enabled via the new command-line option -mccs.
2e6976a8 258
35c08157
KLC
259* Add support for the Andes NDS32.
260
58ca03a2
TG
261Changes in 2.24:
262
13761a11
NC
263* Add support for the Texas Instruments MSP430X processor.
264
a05a5b64 265* Add -gdwarf-sections command-line option to enable per-code-section
b40bf0a2
NC
266 generation of DWARF .debug_line sections.
267
36591ba1
SL
268* Add support for Altera Nios II.
269
a3c62988
NC
270* Add support for the Imagination Technologies Meta processor.
271
5bf135a7
NC
272* Add support for the v850e3v5.
273
e8044f35
RS
274* Remove assembler support for MIPS ECOFF targets.
275
af18cb59
TG
276Changes in 2.23:
277
da2bb560
NC
278* Add support for the 64-bit ARM architecture: AArch64.
279
6927f982
NC
280* Add support for S12X processor.
281
b9c361e0
JL
282* Add support for the VLE extension to the PowerPC architecture.
283
f6c1a2d5
NC
284* Add support for the Freescale XGATE architecture.
285
fa94de6b
RM
286* Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock
287 directives. These are currently available only for x86 and ARM targets.
288
99c513f6
DD
289* Add support for the Renesas RL78 architecture.
290
cfb8c092
NC
291* Add support for the Adapteva EPIPHANY architecture.
292
fe13e45b 293* For x86, allow 'rep bsf', 'rep bsr', and 'rep ret' syntax.
29c048b6 294
a7142d94
TG
295Changes in 2.22:
296
69f56ae1 297* Add support for the Tilera TILEPro and TILE-Gx architectures.
44f45767 298
90b3661c 299Changes in 2.21:
44f45767 300
5fec8599
L
301* Gas no longer requires doubling of ampersands in macros.
302
40b36596
JM
303* Add support for the TMS320C6000 (TI C6X) processor family.
304
31907d5e
DK
305* GAS now understands an extended syntax in the .section directive flags
306 for COFF targets that allows the section's alignment to be specified. This
307 feature has also been backported to the 2.20 release series, starting with
308 2.20.1.
309
c7927a3c
NC
310* Add support for the Renesas RX processor.
311
a05a5b64 312* New command-line option, --compress-debug-sections, which requests
700c4060
CC
313 compression of DWARF debug information sections in the relocatable output
314 file. Compressed debug sections are supported by readelf, objdump, and
315 gold, but not currently by Gnu ld.
316
81c23f82
TG
317Changes in 2.20:
318
1cd986c5
NC
319* Added support for v850e2 and v850e2v3.
320
3e7a7d11
NC
321* GNU/Linux targets now supports "gnu_unique_object" as a value in the .type
322 pseudo op. It marks the symbol as being globally unique in the entire
323 process.
324
c921be7d
NC
325* ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
326 in binary rather than text.
6e33da12 327
c1711530
DK
328* Add support for common symbol alignment to PE formats.
329
92846e72
CC
330* Add support for the new discriminator column in the DWARF line table,
331 with a discriminator operand for the .loc directive.
332
c3b7224a
NC
333* Add support for Sunplus score architecture.
334
d8045f23
NC
335* The .type pseudo-op now accepts a type of STT_GNU_IFUNC which can be used to
336 indicate that if the symbol is the target of a relocation, its value should
337 not be use. Instead the function should be invoked and its result used as
338 the value.
fa94de6b 339
84e94c90
NC
340* Add support for Lattice Mico32 (lm32) architecture.
341
fa94de6b 342* Add support for Xilinx MicroBlaze architecture.
caa03924 343
6e33da12
TG
344Changes in 2.19:
345
4f6d9c90
DJ
346* New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind
347 tables without runtime relocation.
348
a05a5b64 349* New command-line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
6fd4f6cc
DD
350 adds compatibility with H'00 style hex constants.
351
a05a5b64 352* New command-line option, -msse-check=[none|error|warning], for x86
daf50ae7
L
353 targets.
354
a05a5b64 355* New sub-option added to the assembler's -a command-line switch to
83f10cb2
NC
356 generate a listing output. The 'g' sub-option will insert into the listing
357 various information about the assembly, such as assembler version, the
a05a5b64 358 command-line options used, and a time stamp.
83f10cb2 359
a05a5b64 360* New command-line option -msse2avx for x86 target to encode SSE
c0f3af97
L
361 instructions with VEX prefix.
362
f1f8f695 363* Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target.
c0f3af97 364
a05a5b64 365* New command-line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
ae40c993
L
366 -mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg,
367 -mnaked-reg and -mold-gcc, for x86 targets.
368
38a57ae7
NC
369* Support for generating wide character strings has been added via the new
370 pseudo ops: .string16, .string32 and .string64.
371
85f10a01
MM
372* Support for SSE5 has been added to the i386 port.
373
7c3d153f
NC
374Changes in 2.18:
375
ec2655a6
NC
376* The GAS sources are now released under the GPLv3.
377
3d3d428f
NC
378* Support for the National Semiconductor CR16 target has been added.
379
3f9ce309
AM
380* Added gas .reloc pseudo. This is a low-level interface for creating
381 relocations.
382
99ad8390
NC
383* Add support for x86_64 PE+ target.
384
1c0d3aa6 385* Add support for Score target.
83518699 386
ec2655a6
NC
387Changes in 2.17:
388
d70c5fc7
NC
389* Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
390
08333dc4
NS
391* Support for ms2 architecture has been added.
392
b7b8fb1d
NC
393* Support for the Z80 processor family has been added.
394
3e8a519c
MM
395* Add support for the "@<file>" syntax to the command line, so that extra
396 switches can be read from <file>.
397
a05a5b64 398* The SH target supports a new command-line switch --enable-reg-prefix which,
37dedf66
NC
399 if enabled, will allow register names to be optionally prefixed with a $
400 character. This allows register names to be distinguished from label names.
fa94de6b 401
6eaeac8a
JB
402* Macros with a variable number of arguments are now supported. See the
403 documentation for how this works.
404
4bdd3565
NC
405* Added --reduce-memory-overheads switch to reduce the size of the hash
406 tables used, at the expense of longer assembly times, and
407 --hash-size=<NUMBER> to set the size of the hash tables used by gas.
408
5e75c3ab
JB
409* Macro names and macro parameter names can now be any identifier that would
410 also be legal as a symbol elsewhere. For macro parameter names, this is
411 known to cause problems in certain sources when the respective target uses
412 characters inconsistently, and thus macro parameter references may no longer
413 be recognized as such (see the documentation for details).
fa94de6b 414
d2c5f73e
NC
415* Support the .f_floating, .d_floating, .g_floating and .h_floating directives
416 for the VAX target in order to be more compatible with the VAX MACRO
417 assembler.
418
a05a5b64 419* New command-line option -mtune=[itanium1|itanium2] for IA64 targets.
8c2fda1d 420
957d91c1
NC
421Changes in 2.16:
422
fffeaa5f
JB
423* Redefinition of macros now results in an error.
424
a05a5b64 425* New command-line option -mhint.b=[ok|warning|error] for IA64 targets.
91d777ee 426
a05a5b64 427* New command-line option -munwind-check=[warning|error] for IA64
970d6792
L
428 targets.
429
f1dab70d
JB
430* The IA64 port now uses automatic dependency violation removal as its default
431 mode.
432
7499d566
NC
433* Port to MAXQ processor contributed by HCL Tech.
434
7ed4c4c5
NC
435* Added support for generating unwind tables for ARM ELF targets.
436
a05a5b64 437* Add a -g command-line option to generate debug information in the target's
329e276d
NC
438 preferred debug format.
439
1fe1f39c
NC
440* Support for the crx-elf target added.
441
1a320fbb 442* Support for the sh-symbianelf target added.
1fe1f39c 443
0503b355
BF
444* Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations
445 on pe[i]-i386; required for this target's DWARF 2 support.
446
6b6e92f4
NC
447* Support for Motorola MCF521x/5249/547x/548x added.
448
fd99574b
NC
449* Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC
450 instrucitons.
451
a05a5b64 452* New command-line option -mno-shared for MIPS ELF targets.
aa6975fb 453
a05a5b64 454* New command-line option --alternate and pseudo-ops .altmacro and .noaltmacro
caa32fe5
NC
455 added to enter (and leave) alternate macro syntax mode.
456
0477af35
NC
457Changes in 2.15:
458
7a7f4e42
CD
459* The MIPS -membedded-pic option (Embedded-PIC code generation) is
460 deprecated and will be removed in a future release.
461
6edf0760
NC
462* Added PIC m32r Linux (ELF) and support to M32R assembler.
463
09d92015
MM
464* Added support for ARM V6.
465
88da98f3
MS
466* Added support for sh4a and variants.
467
eb764db8
NC
468* Support for Renesas M32R2 added.
469
88da98f3
MS
470* Limited support for Mapping Symbols as specified in the ARM ELF
471 specification has been added to the arm assembler.
ed769ec1 472
0bbf2aa4
NC
473* On ARM architectures, added a new gas directive ".unreq" that undoes
474 definitions created by ".req".
475
3e602632
NC
476* Support for Motorola ColdFire MCF528x added.
477
05da4302
NC
478* Added --gstabs+ switch to enable the generation of STABS debug format
479 information with GNU extensions.
fa94de6b 480
6a265366
CD
481* Added support for MIPS64 Release 2.
482
8ad30312
NC
483* Added support for v850e1.
484
12b55ccc
L
485* Added -n switch for x86 assembler. By default, x86 GAS replaces
486 multiple nop instructions used for alignment within code sections
487 with multi-byte nop instructions such as leal 0(%esi,1),%esi. This
488 switch disables the optimization.
489
78849248
ILT
490* Removed -n option from MIPS assembler. It was not useful, and confused the
491 existing -non_shared option.
492
43c58ae6
CD
493Changes in 2.14:
494
69be0a2b
CD
495* Added support for MIPS32 Release 2.
496
e8fd7476
NC
497* Added support for Xtensa architecture.
498
e16bb312
NC
499* Support for Intel's iWMMXt processor (an ARM variant) added.
500
cce4814f
NC
501* An assembler test generator has been contributed and an example file that
502 uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c).
fa94de6b 503
5177500f
NC
504* Support for SH2E added.
505
fea17916
NC
506* GASP has now been removed.
507
004d9caf
NC
508* Support for Texas Instruments TMS320C4x and TMS320C3x series of
509 DSP's contributed by Michael Hayes and Svein E. Seldal.
fa94de6b 510
a40cbfa3
NC
511* Support for the Ubicom IP2xxx microcontroller added.
512
2cbb2eef
NC
513Changes in 2.13:
514
a40cbfa3
NC
515* Support for the Fujitsu FRV architecture added by Red Hat. Models for FR400
516 and FR500 included.
0ebb9a87 517
a40cbfa3 518* Support for DLX processor added.
52216602 519
a40cbfa3
NC
520* GASP has now been deprecated and will be removed in a future release. Use
521 the macro facilities in GAS instead.
3f965e60 522
a40cbfa3
NC
523* GASP now correctly parses floating point numbers. Unless the base is
524 explicitly specified, they are interpreted as decimal numbers regardless of
525 the currently specified base.
1ac57253 526
9a66911f
NC
527Changes in 2.12:
528
a40cbfa3 529* Support for Don Knuth's MMIX, by Hans-Peter Nilsson.
49fda6c8 530
a40cbfa3 531* Support for the OpenRISC 32-bit embedded processor by OpenCores.
3b16e843 532
fa94de6b
RM
533* The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
534 specifying the target instruction set. The old method of specifying the
a40cbfa3
NC
535 target processor has been deprecated, but is still accepted for
536 compatibility.
03b1477f 537
a40cbfa3
NC
538* Support for the VFP floating-point instruction set has been added to
539 the ARM assembler.
252b5132 540
a40cbfa3
NC
541* New psuedo op: .incbin to include a set of binary data at a given point
542 in the assembly. Contributed by Anders Norlander.
7e005732 543
a40cbfa3
NC
544* The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated
545 but still works for compatability.
ec68c924 546
fa94de6b 547* The MIPS assembler no longer issues a warning by default when it
a05a5b64 548 generates a nop instruction from a macro. The new command-line option
a40cbfa3 549 -n will turn on the warning.
63486801 550
2dac7317
JW
551Changes in 2.11:
552
500800ca
NC
553* Support for PDP-11 and 2.11BSD a.out format, by Lars Brinkhoff.
554
a40cbfa3 555* x86 gas now supports the full Pentium4 instruction set.
a167610d 556
a40cbfa3 557* Support for AMD x86-64 architecture, by Jan Hubicka, SuSE Labs.
c0d8940f 558
a40cbfa3 559* Support for Motorola 68HC11 and 68HC12.
df86943d 560
a40cbfa3 561* Support for Texas Instruments TMS320C54x (tic54x).
39bec121 562
a40cbfa3 563* Support for IA-64.
2dac7317 564
a40cbfa3 565* Support for i860, by Jason Eckhardt.
22b36938 566
a40cbfa3 567* Support for CRIS (Axis Communications ETRAX series).
5bcac8a4 568
a40cbfa3 569* x86 gas has a new .arch pseudo op to specify the target CPU architecture.
a38cf1db 570
a05a5b64 571* x86 gas -q command-line option quietens warnings about register size changes
a40cbfa3
NC
572 due to suffix, indirect jmp/call without `*', stand-alone prefixes, and
573 translating various deprecated floating point instructions.
a38cf1db 574
252b5132
RH
575Changes in 2.10:
576
a40cbfa3
NC
577* Support for the ARM msr instruction was changed to only allow an immediate
578 operand when altering the flags field.
d14442f4 579
a40cbfa3 580* Support for ATMEL AVR.
adde6300 581
a40cbfa3 582* Support for IBM 370 ELF. Somewhat experimental.
b5ebe70e 583
a40cbfa3 584* Support for numbers with suffixes.
3fd9f047 585
a40cbfa3 586* Added support for breaking to the end of repeat loops.
6a6987a9 587
a40cbfa3 588* Added support for parallel instruction syntax (DOUBLEBAR_PARALLEL).
6a6987a9 589
a40cbfa3 590* New .elseif pseudo-op added.
3fd9f047 591
a40cbfa3 592* New --fatal-warnings option.
1f776aa5 593
a40cbfa3 594* picoJava architecture support added.
252b5132 595
a40cbfa3 596* Motorola MCore 210 processor support added.
041dd5a9 597
fa94de6b 598* A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
a40cbfa3 599 assembly programs with intel syntax.
252b5132 600
a40cbfa3 601* New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.
252b5132 602
a40cbfa3 603* Added -gdwarf2 option to generate DWARF 2 debugging information.
041dd5a9 604
a40cbfa3 605* Full 16-bit mode support for i386.
252b5132 606
fa94de6b 607* Greatly improved instruction operand checking for i386. This change will
a40cbfa3
NC
608 produce errors or warnings on incorrect assembly code that previous versions
609 of gas accepted. If you get unexpected messages from code that worked with
610 older versions of gas, please double check the code before reporting a bug.
252b5132 611
a40cbfa3 612* Weak symbol support added for COFF targets.
252b5132 613
a40cbfa3 614* Mitsubishi D30V support added.
252b5132 615
a40cbfa3 616* Texas Instruments c80 (tms320c80) support added.
252b5132 617
a40cbfa3 618* i960 ELF support added.
bedf545c 619
a40cbfa3 620* ARM ELF support added.
a057431b 621
252b5132
RH
622Changes in 2.9:
623
a40cbfa3 624* Texas Instruments c30 (tms320c30) support added.
252b5132 625
fa94de6b 626* The assembler now optimizes the exception frame information generated by egcs
a40cbfa3 627 and gcc 2.8. The new --traditional-format option disables this optimization.
252b5132 628
a40cbfa3 629* Added --gstabs option to generate stabs debugging information.
252b5132 630
fa94de6b 631* The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
a40cbfa3 632 listing.
252b5132 633
a40cbfa3 634* Added -MD option to print dependencies.
252b5132
RH
635
636Changes in 2.8:
637
a40cbfa3 638* BeOS support added.
252b5132 639
a40cbfa3 640* MIPS16 support added.
252b5132 641
a40cbfa3 642* Motorola ColdFire 5200 support added (configure for m68k and use -m5200).
252b5132 643
a40cbfa3 644* Alpha/VMS support added.
252b5132 645
a40cbfa3
NC
646* m68k options --base-size-default-16, --base-size-default-32,
647 --disp-size-default-16, and --disp-size-default-32 added.
252b5132 648
a40cbfa3
NC
649* The alignment directives now take an optional third argument, which is the
650 maximum number of bytes to skip. If doing the alignment would require
651 skipping more than the given number of bytes, the alignment is not done at
652 all.
252b5132 653
a40cbfa3 654* The ELF assembler has a new pseudo-op, .symver, used for symbol versioning.
252b5132 655
a40cbfa3
NC
656* The -a option takes a new suboption, c (e.g., -alc), to skip false
657 conditionals in listings.
252b5132 658
a40cbfa3
NC
659* Added new pseudo-op, .equiv; it's like .equ, except that it is an error if
660 the symbol is already defined.
252b5132
RH
661
662Changes in 2.7:
663
a40cbfa3
NC
664* The PowerPC assembler now allows the use of symbolic register names (r0,
665 etc.) if -mregnames is used. Symbolic names preceded by a '%' (%r0, etc.)
666 can be used any time. PowerPC 860 move to/from SPR instructions have been
667 added.
252b5132 668
a40cbfa3 669* Alpha Linux (ELF) support added.
252b5132 670
a40cbfa3 671* PowerPC ELF support added.
252b5132 672
a40cbfa3 673* m68k Linux (ELF) support added.
252b5132 674
a40cbfa3 675* i960 Hx/Jx support added.
252b5132 676
a40cbfa3 677* i386/PowerPC gnu-win32 support added.
252b5132 678
a40cbfa3
NC
679* SCO ELF support added. For OpenServer 5 targets (i386-unknown-sco3.2v5) the
680 default is to build COFF-only support. To get a set of tools that generate
fa94de6b 681 ELF (they'll understand both COFF and ELF), you must configure with
a40cbfa3 682 target=i386-unknown-sco3.2v5elf.
252b5132 683
a40cbfa3 684* m88k-motorola-sysv3* support added.
252b5132
RH
685
686Changes in 2.6:
687
a40cbfa3 688* Gas now directly supports macros, without requiring GASP.
252b5132 689
a40cbfa3
NC
690* Gas now has an MRI assembler compatibility mode. Use -M or --mri to select
691 MRI mode. The pseudo-op ``.mri 1'' will switch into the MRI mode until the
692 ``.mri 0'' is seen; this can be convenient for inline assembler code.
252b5132 693
a40cbfa3 694* Added --defsym SYM=VALUE option.
252b5132 695
a40cbfa3 696* Added -mips4 support to MIPS assembler.
252b5132 697
a40cbfa3 698* Added PIC support to Solaris and SPARC SunOS 4 assembler.
252b5132
RH
699
700Changes in 2.4:
701
a40cbfa3 702* Converted this directory to use an autoconf-generated configure script.
252b5132 703
a40cbfa3 704* ARM support, from Richard Earnshaw.
252b5132 705
a40cbfa3
NC
706* Updated VMS support, from Pat Rankin, including considerably improved
707 debugging support.
252b5132 708
a40cbfa3 709* Support for the control registers in the 68060.
252b5132 710
a40cbfa3 711* Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to
fa94de6b
RM
712 provide for possible future gcc changes, for targets where gas provides some
713 features not available in the native assembler. If the native assembler is
a40cbfa3 714 used, it should become obvious pretty quickly what the problem is.
252b5132 715
a40cbfa3 716* Usage message is available with "--help".
252b5132 717
fa94de6b 718* The GNU Assembler Preprocessor (gasp) is included. (Actually, it was in 2.3
a40cbfa3 719 also, but didn't get into the NEWS file.)
252b5132 720
a40cbfa3 721* Weak symbol support for a.out.
252b5132 722
fa94de6b 723* A bug in the listing code which could cause an infinite loop has been fixed.
a40cbfa3 724 Bugs in listings when generating a COFF object file have also been fixed.
252b5132 725
a40cbfa3
NC
726* Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by
727 Paul Kranenburg.
252b5132 728
a40cbfa3
NC
729* Improved Alpha support. Immediate constants can have a much larger range
730 now. Support for the 21164 has been contributed by Digital.
252b5132 731
a40cbfa3 732* Updated ns32k (pc532-mach, netbsd532) support from Ian Dall.
252b5132
RH
733
734Changes in 2.3:
735
a40cbfa3 736* Mach i386 support, by David Mackenzie and Ken Raeburn.
252b5132 737
a40cbfa3 738* RS/6000 and PowerPC support by Ian Taylor.
252b5132 739
a40cbfa3
NC
740* VMS command scripts (make-gas.com, config-gas.com) have been worked on a bit,
741 based on mail received from various people. The `-h#' option should work
742 again too.
252b5132 743
a40cbfa3 744* HP-PA work, by Jeff Law. Note, for the PA, gas-2.3 has been designed to work
fa94de6b 745 with gdb-4.12 and gcc-2.6. As gcc-2.6 has not been released yet, a special
a40cbfa3
NC
746 version of gcc-2.5.8 has been patched to work with gas-2.3. You can retrieve
747 this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu
748 in the "dist" directory.
252b5132 749
a40cbfa3
NC
750* Vax support in gas fixed for BSD, so it builds and seems to run a couple
751 simple tests okay. I haven't put it through extensive testing. (GNU make is
752 currently required for BSD 4.3 builds.)
252b5132 753
fa94de6b 754* Support for the DEC Alpha, running OSF/1 (ECOFF format). The gas support is
a40cbfa3
NC
755 based on code donated by CMU, which used an a.out-based format. I'm afraid
756 the alpha-a.out support is pretty badly mangled, and much of it removed;
757 making it work will require rewriting it as BFD support for the format anyways.
252b5132 758
a40cbfa3 759* Irix 5 support.
252b5132 760
fa94de6b 761* The test suites have been fixed up a bit, so that they should work with a
a40cbfa3 762 couple different versions of expect and dejagnu.
252b5132 763
fa94de6b
RM
764* Symbols' values are now handled internally as expressions, permitting more
765 flexibility in evaluating them in some cases. Some details of relocation
a40cbfa3
NC
766 handling have also changed, and simple constant pool management has been
767 added, to make the Alpha port easier.
252b5132 768
a40cbfa3
NC
769* New option "--statistics" for printing out program run times. This is
770 intended to be used with the gcc "-Q" option, which prints out times spent in
771 various phases of compilation. (You should be able to get all of them
772 printed out with "gcc -Q -Wa,--statistics", I think.)
252b5132
RH
773
774Changes in 2.2:
775
a40cbfa3 776* RS/6000 AIX and MIPS SGI Irix 5 support has been added.
252b5132 777
fa94de6b
RM
778* Configurations that are still in development (and therefore are convenient to
779 have listed in configure.in) still get rejected without a minor change to
a40cbfa3
NC
780 gas/Makefile.in, so people not doing development work shouldn't get the
781 impression that support for such configurations is actually believed to be
782 reliable.
252b5132 783
fa94de6b 784* The program name (usually "as") is printed when a fatal error message is
a40cbfa3
NC
785 displayed. This should prevent some confusion about the source of occasional
786 messages about "internal errors".
252b5132 787
fa94de6b 788* ELF support is falling into place. Support for the 386 should be working.
a40cbfa3 789 Support for SPARC Solaris is in. HPPA support from Utah is being integrated.
252b5132 790
a40cbfa3
NC
791* Symbol values are maintained as expressions instead of being immediately
792 boiled down to add-symbol, sub-symbol, and constant. This permits slightly
793 more complex calculations involving symbols whose values are not alreadey
794 known.
252b5132 795
a40cbfa3 796* DBX-style debugging info ("stabs") is now supported for COFF formats.
fa94de6b
RM
797 If any stabs directives are seen in the source, GAS will create two new
798 sections: a ".stab" and a ".stabstr" section. The format of the .stab
a40cbfa3
NC
799 section is nearly identical to the a.out symbol format, and .stabstr is
800 its string table. For this to be useful, you must have configured GCC
801 to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB
802 that can use the stab sections (4.11 or later).
252b5132 803
fa94de6b 804* LynxOS, on i386 and m68k platforms, is now supported. SPARC LynxOS
a40cbfa3 805 support is in progress.
252b5132
RH
806
807Changes in 2.1:
808
fa94de6b 809* Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
a40cbfa3 810 incorporated, but not well tested yet.
252b5132 811
fa94de6b 812* Altered the opcode table split for m68k; it should require less VM to compile
a40cbfa3 813 with gcc now.
252b5132 814
a40cbfa3
NC
815* Some minor adjustments to add (Convergent Technologies') Miniframe support,
816 suggested by Ronald Cole.
252b5132 817
a40cbfa3
NC
818* HPPA support (running OSF only, not HPUX) has been contributed by Utah. This
819 includes improved ELF support, which I've started adapting for SPARC Solaris
820 2.x. Integration isn't completely, so it probably won't work.
252b5132 821
a40cbfa3 822* HP9000/300 support, donated by HP, has been merged in.
252b5132 823
a40cbfa3 824* Ian Taylor has finished the MIPS ECOFF (Ultrix, Irix) support.
252b5132 825
a40cbfa3 826* Better error messages for unsupported configurations (e.g., hppa-hpux).
252b5132 827
a40cbfa3 828* Test suite framework is starting to become reasonable.
252b5132
RH
829
830Changes in 2.0:
831
a40cbfa3 832* Mostly bug fixes.
252b5132 833
a40cbfa3 834* Some more merging of BFD and ELF code, but ELF still doesn't work.
252b5132
RH
835
836Changes in 1.94:
837
a40cbfa3
NC
838* BFD merge is partly done. Adventurous souls may try giving configure the
839 "--with-bfd-assembler" option. Currently, ELF format requires it, a.out
840 format accepts it; SPARC CPU accepts it. It's the default only for OS "elf"
841 or "solaris". (ELF isn't really supported yet. It needs work. I've got
842 some code from Utah for HP-PA ELF, and from DG for m88k ELF, but they're not
843 fully merged yet.)
252b5132 844
a40cbfa3
NC
845* The 68K opcode table has been split in half. It should now compile under gcc
846 without consuming ridiculous amounts of memory.
252b5132 847
a40cbfa3
NC
848* A couple data structures have been reduced in size. This should result in
849 saving a little bit of space at runtime.
252b5132 850
a40cbfa3
NC
851* Support for MIPS, from OSF and Ralph Campbell, has been merged in. The OSF
852 code provided ROSE format support, which I haven't merged in yet. (I can
853 make it available, if anyone wants to try it out.) Ralph's code, for BSD
854 4.4, supports a.out format. We don't have ECOFF support in just yet; it's
855 coming.
252b5132 856
a40cbfa3 857* Support for the Hitachi H8/500 has been added.
252b5132 858
a40cbfa3
NC
859* VMS host and target support should be working now, thanks chiefly to Eric
860 Youngdale.
252b5132
RH
861
862Changes in 1.93.01:
863
a40cbfa3 864* For m68k, support for more processors has been added: 68040, CPU32, 68851.
252b5132 865
a40cbfa3 866* For i386, .align is now power-of-two; was number-of-bytes.
252b5132 867
a40cbfa3
NC
868* For m68k, "%" is now accepted before register names. For COFF format, which
869 doesn't use underscore prefixes for C labels, it is required, so variable "a0"
870 can be distinguished from the register.
252b5132 871
a40cbfa3
NC
872* Last public release was 1.38. Lots of configuration changes since then, lots
873 of new CPUs and formats, lots of bugs fixed.
252b5132
RH
874
875\f
b3adc24a 876Copyright (C) 2012-2020 Free Software Foundation, Inc.
5bf135a7
NC
877
878Copying and distribution of this file, with or without modification,
879are permitted in any medium without royalty provided the copyright
880notice and this notice are preserved.
881
252b5132
RH
882Local variables:
883fill-column: 79
884End: