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252b5132 | 1 | /* tc-arc.c -- Assembler for the ARC |
1dab94dd KH |
2 | Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000 |
3 | Free Software Foundation, Inc. | |
252b5132 RH |
4 | Contributed by Doug Evans (dje@cygnus.com). |
5 | ||
6 | This file is part of GAS, the GNU Assembler. | |
7 | ||
8 | GAS is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2, or (at your option) | |
11 | any later version. | |
12 | ||
13 | GAS is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
310b5aa2 ILT |
19 | along with GAS; see the file COPYING. If not, write to the Free |
20 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA | |
1dab94dd | 21 | 02111-1307, USA. */ |
252b5132 RH |
22 | |
23 | #include <stdio.h> | |
24 | #include <ctype.h> | |
25 | #include "as.h" | |
26 | #include "subsegs.h" | |
27 | #include "opcode/arc.h" | |
28 | #include "elf/arc.h" | |
29 | ||
30 | extern int arc_get_mach PARAMS ((char *)); | |
31 | ||
32 | static arc_insn arc_insert_operand PARAMS ((arc_insn, | |
33 | const struct arc_operand *, int, | |
34 | const struct arc_operand_value *, | |
35 | offsetT, char *, unsigned int)); | |
36 | static void arc_common PARAMS ((int)); | |
37 | static void arc_cpu PARAMS ((int)); | |
38 | /*static void arc_rename PARAMS ((int));*/ | |
39 | static int get_arc_exp_reloc_type PARAMS ((int, int, expressionS *, | |
40 | expressionS *)); | |
41 | ||
42 | const pseudo_typeS md_pseudo_table[] = | |
43 | { | |
44 | { "align", s_align_bytes, 0 }, /* Defaulting is invalid (0) */ | |
45 | { "common", arc_common, 0 }, | |
46 | /*{ "hword", cons, 2 }, - already exists */ | |
47 | { "word", cons, 4 }, | |
48 | /*{ "xword", cons, 8 },*/ | |
49 | { "cpu", arc_cpu, 0 }, | |
50 | /*{ "rename", arc_rename, 0 },*/ | |
51 | { NULL, 0, 0 }, | |
52 | }; | |
53 | ||
54 | /* This array holds the chars that always start a comment. If the | |
55 | pre-processor is disabled, these aren't very useful */ | |
56 | const char comment_chars[] = "#;"; | |
57 | ||
58 | /* This array holds the chars that only start a comment at the beginning of | |
59 | a line. If the line seems to have the form '# 123 filename' | |
60 | .line and .file directives will appear in the pre-processed output */ | |
61 | /* Note that input_file.c hand checks for '#' at the beginning of the | |
62 | first line of the input file. This is because the compiler outputs | |
1dab94dd | 63 | #NO_APP at the beginning of its output. */ |
252b5132 | 64 | /* Also note that comments started like this one will always |
1dab94dd | 65 | work if '/' isn't otherwise defined. */ |
252b5132 RH |
66 | const char line_comment_chars[] = "#"; |
67 | ||
68 | const char line_separator_chars[] = ""; | |
69 | ||
70 | /* Chars that can be used to separate mant from exp in floating point nums */ | |
71 | const char EXP_CHARS[] = "eE"; | |
72 | ||
73 | /* Chars that mean this number is a floating point constant */ | |
74 | /* As in 0f12.456 */ | |
75 | /* or 0d1.2345e12 */ | |
76 | const char FLT_CHARS[] = "rRsSfFdD"; | |
77 | ||
78 | /* Byte order. */ | |
79 | extern int target_big_endian; | |
80 | const char *arc_target_format = DEFAULT_TARGET_FORMAT; | |
81 | static int byte_order = DEFAULT_BYTE_ORDER; | |
82 | ||
83 | /* One of bfd_mach_arc_xxx. */ | |
84 | static int arc_mach_type = bfd_mach_arc_base; | |
85 | ||
86 | /* Non-zero if the cpu type has been explicitly specified. */ | |
87 | static int mach_type_specified_p = 0; | |
88 | ||
89 | /* Non-zero if opcode tables have been initialized. | |
90 | A .cpu command must appear before any instructions. */ | |
91 | static int cpu_tables_init_p = 0; | |
92 | ||
93 | static struct hash_control *arc_suffix_hash = NULL; | |
94 | \f | |
95 | const char *md_shortopts = ""; | |
96 | struct option md_longopts[] = | |
97 | { | |
98 | #define OPTION_EB (OPTION_MD_BASE + 0) | |
99 | {"EB", no_argument, NULL, OPTION_EB}, | |
100 | #define OPTION_EL (OPTION_MD_BASE + 1) | |
101 | {"EL", no_argument, NULL, OPTION_EL}, | |
102 | { NULL, no_argument, NULL, 0 } | |
103 | }; | |
104 | size_t md_longopts_size = sizeof (md_longopts); | |
105 | ||
106 | /* | |
107 | * md_parse_option | |
108 | * | |
109 | * Invocation line includes a switch not recognized by the base assembler. | |
110 | * See if it's a processor-specific option. | |
111 | */ | |
112 | ||
113 | int | |
114 | md_parse_option (c, arg) | |
115 | int c; | |
116 | char *arg; | |
117 | { | |
118 | switch (c) | |
119 | { | |
120 | case OPTION_EB: | |
121 | byte_order = BIG_ENDIAN; | |
122 | arc_target_format = "elf32-bigarc"; | |
123 | break; | |
124 | case OPTION_EL: | |
125 | byte_order = LITTLE_ENDIAN; | |
126 | arc_target_format = "elf32-littlearc"; | |
127 | break; | |
128 | default: | |
129 | return 0; | |
130 | } | |
131 | return 1; | |
132 | } | |
133 | ||
134 | void | |
135 | md_show_usage (stream) | |
136 | FILE *stream; | |
137 | { | |
138 | fprintf (stream, _("\ | |
139 | ARC options:\n\ | |
140 | -EB generate big endian output\n\ | |
141 | -EL generate little endian output\n")); | |
142 | } | |
143 | ||
144 | /* This function is called once, at assembler startup time. It should | |
145 | set up all the tables, etc. that the MD part of the assembler will need. | |
146 | Opcode selection is defered until later because we might see a .cpu | |
147 | command. */ | |
148 | ||
149 | void | |
150 | md_begin () | |
151 | { | |
152 | /* The endianness can be chosen "at the factory". */ | |
153 | target_big_endian = byte_order == BIG_ENDIAN; | |
154 | ||
155 | if (!bfd_set_arch_mach (stdoutput, bfd_arch_arc, arc_mach_type)) | |
156 | as_warn (_("could not set architecture and machine")); | |
157 | ||
158 | /* Assume the base cpu. This call is necessary because we need to | |
159 | initialize `arc_operand_map' which may be needed before we see the | |
160 | first insn. */ | |
161 | arc_opcode_init_tables (arc_get_opcode_mach (bfd_mach_arc_base, | |
162 | target_big_endian)); | |
163 | } | |
164 | ||
165 | /* Initialize the various opcode and operand tables. | |
166 | MACH is one of bfd_mach_arc_xxx. */ | |
167 | ||
168 | static void | |
169 | init_opcode_tables (mach) | |
170 | int mach; | |
171 | { | |
172 | register unsigned int i; | |
173 | char *last; | |
174 | ||
175 | if ((arc_suffix_hash = hash_new ()) == NULL) | |
176 | as_fatal (_("virtual memory exhausted")); | |
177 | ||
178 | if (!bfd_set_arch_mach (stdoutput, bfd_arch_arc, mach)) | |
179 | as_warn (_("could not set architecture and machine")); | |
180 | ||
181 | /* This initializes a few things in arc-opc.c that we need. | |
182 | This must be called before the various arc_xxx_supported fns. */ | |
183 | arc_opcode_init_tables (arc_get_opcode_mach (mach, target_big_endian)); | |
184 | ||
185 | /* Only put the first entry of each equivalently named suffix in the | |
186 | table. */ | |
187 | last = ""; | |
188 | for (i = 0; i < arc_suffixes_count; i++) | |
189 | { | |
190 | if (! arc_opval_supported (&arc_suffixes[i])) | |
191 | continue; | |
192 | if (strcmp (arc_suffixes[i].name, last) != 0) | |
193 | hash_insert (arc_suffix_hash, arc_suffixes[i].name, (PTR) (arc_suffixes + i)); | |
194 | last = arc_suffixes[i].name; | |
195 | } | |
196 | ||
197 | /* Since registers don't have a prefix, we put them in the symbol table so | |
198 | they can't be used as symbols. This also simplifies argument parsing as | |
199 | we can let gas parse registers for us. The recorded register number is | |
200 | the index in `arc_reg_names'. */ | |
201 | for (i = 0; i < arc_reg_names_count; i++) | |
202 | { | |
203 | if (! arc_opval_supported (&arc_reg_names[i])) | |
204 | continue; | |
205 | /* Use symbol_create here instead of symbol_new so we don't try to | |
206 | output registers into the object file's symbol table. */ | |
207 | symbol_table_insert (symbol_create (arc_reg_names[i].name, reg_section, | |
208 | i, &zero_address_frag)); | |
209 | } | |
210 | ||
211 | /* Tell `s_cpu' it's too late. */ | |
212 | cpu_tables_init_p = 1; | |
213 | } | |
214 | \f | |
215 | /* Insert an operand value into an instruction. | |
216 | If REG is non-NULL, it is a register number and ignore VAL. */ | |
217 | ||
218 | static arc_insn | |
219 | arc_insert_operand (insn, operand, mods, reg, val, file, line) | |
220 | arc_insn insn; | |
221 | const struct arc_operand *operand; | |
222 | int mods; | |
223 | const struct arc_operand_value *reg; | |
224 | offsetT val; | |
225 | char *file; | |
226 | unsigned int line; | |
227 | { | |
228 | if (operand->bits != 32) | |
229 | { | |
230 | long min, max; | |
231 | offsetT test; | |
232 | ||
233 | if ((operand->flags & ARC_OPERAND_SIGNED) != 0) | |
234 | { | |
235 | if ((operand->flags & ARC_OPERAND_SIGNOPT) != 0) | |
236 | max = (1 << operand->bits) - 1; | |
237 | else | |
238 | max = (1 << (operand->bits - 1)) - 1; | |
239 | min = - (1 << (operand->bits - 1)); | |
240 | } | |
241 | else | |
242 | { | |
243 | max = (1 << operand->bits) - 1; | |
244 | min = 0; | |
245 | } | |
246 | ||
247 | if ((operand->flags & ARC_OPERAND_NEGATIVE) != 0) | |
248 | test = - val; | |
249 | else | |
250 | test = val; | |
251 | ||
252 | if (test < (offsetT) min || test > (offsetT) max) | |
253 | { | |
254 | const char *err = | |
255 | _("operand out of range (%s not between %ld and %ld)"); | |
256 | char buf[100]; | |
257 | ||
258 | sprint_value (buf, test); | |
259 | if (file == (char *) NULL) | |
260 | as_warn (err, buf, min, max); | |
261 | else | |
262 | as_warn_where (file, line, err, buf, min, max); | |
263 | } | |
264 | } | |
265 | ||
266 | if (operand->insert) | |
267 | { | |
268 | const char *errmsg; | |
269 | ||
270 | errmsg = NULL; | |
271 | insn = (*operand->insert) (insn, operand, mods, reg, (long) val, &errmsg); | |
272 | if (errmsg != (const char *) NULL) | |
273 | as_warn (errmsg); | |
274 | } | |
275 | else | |
276 | insn |= (((long) val & ((1 << operand->bits) - 1)) | |
277 | << operand->shift); | |
278 | ||
279 | return insn; | |
280 | } | |
281 | ||
282 | /* We need to keep a list of fixups. We can't simply generate them as | |
283 | we go, because that would require us to first create the frag, and | |
284 | that would screw up references to ``.''. */ | |
285 | ||
286 | struct arc_fixup | |
287 | { | |
288 | /* index into `arc_operands' */ | |
289 | int opindex; | |
290 | expressionS exp; | |
291 | }; | |
292 | ||
293 | #define MAX_FIXUPS 5 | |
294 | ||
295 | #define MAX_SUFFIXES 5 | |
296 | ||
297 | /* This routine is called for each instruction to be assembled. */ | |
298 | ||
299 | void | |
300 | md_assemble (str) | |
301 | char *str; | |
302 | { | |
303 | const struct arc_opcode *opcode; | |
304 | char *start; | |
305 | arc_insn insn; | |
306 | static int init_tables_p = 0; | |
307 | ||
308 | /* Opcode table initialization is deferred until here because we have to | |
309 | wait for a possible .cpu command. */ | |
310 | if (!init_tables_p) | |
311 | { | |
312 | init_opcode_tables (arc_mach_type); | |
313 | init_tables_p = 1; | |
314 | } | |
315 | ||
316 | /* Skip leading white space. */ | |
317 | while (isspace (*str)) | |
318 | str++; | |
319 | ||
320 | /* The instructions are stored in lists hashed by the first letter (though | |
321 | we needn't care how they're hashed). Get the first in the list. */ | |
322 | ||
323 | opcode = arc_opcode_lookup_asm (str); | |
324 | ||
325 | /* Keep looking until we find a match. */ | |
326 | ||
327 | start = str; | |
328 | for ( ; opcode != NULL; opcode = ARC_OPCODE_NEXT_ASM (opcode)) | |
329 | { | |
330 | int past_opcode_p, fc, num_suffixes; | |
331 | char *syn; | |
332 | struct arc_fixup fixups[MAX_FIXUPS]; | |
333 | /* Used as a sanity check. If we need a limm reloc, make sure we ask | |
334 | for an extra 4 bytes from frag_more. */ | |
335 | int limm_reloc_p; | |
336 | const struct arc_operand_value *insn_suffixes[MAX_SUFFIXES]; | |
337 | ||
338 | /* Is this opcode supported by the selected cpu? */ | |
339 | if (! arc_opcode_supported (opcode)) | |
340 | continue; | |
341 | ||
342 | /* Scan the syntax string. If it doesn't match, try the next one. */ | |
343 | ||
344 | arc_opcode_init_insert (); | |
345 | insn = opcode->value; | |
346 | fc = 0; | |
347 | past_opcode_p = 0; | |
348 | num_suffixes = 0; | |
349 | limm_reloc_p = 0; | |
350 | ||
351 | /* We don't check for (*str != '\0') here because we want to parse | |
352 | any trailing fake arguments in the syntax string. */ | |
353 | for (str = start, syn = opcode->syntax; *syn != '\0'; ) | |
354 | { | |
355 | int mods; | |
356 | const struct arc_operand *operand; | |
357 | ||
358 | /* Non operand chars must match exactly. */ | |
359 | if (*syn != '%' || *++syn == '%') | |
360 | { | |
361 | /* Handle '+' specially as we want to allow "ld r0,[sp-4]". */ | |
362 | /* ??? The syntax has changed to [sp,-4]. */ | |
363 | if (0 && *syn == '+' && *str == '-') | |
364 | { | |
365 | /* Skip over syn's +, but leave str's - alone. | |
366 | That makes the case identical to "ld r0,[sp+-4]". */ | |
367 | ++syn; | |
368 | } | |
369 | else if (*str == *syn) | |
370 | { | |
371 | if (*syn == ' ') | |
372 | past_opcode_p = 1; | |
373 | ++syn; | |
374 | ++str; | |
375 | } | |
376 | else | |
377 | break; | |
378 | continue; | |
379 | } | |
380 | ||
381 | /* We have an operand. Pick out any modifiers. */ | |
382 | mods = 0; | |
383 | while (ARC_MOD_P (arc_operands[arc_operand_map[*syn]].flags)) | |
384 | { | |
385 | mods |= arc_operands[arc_operand_map[*syn]].flags & ARC_MOD_BITS; | |
386 | ++syn; | |
387 | } | |
388 | operand = arc_operands + arc_operand_map[*syn]; | |
389 | if (operand->fmt == 0) | |
390 | as_fatal (_("unknown syntax format character `%c'"), *syn); | |
391 | ||
392 | if (operand->flags & ARC_OPERAND_FAKE) | |
393 | { | |
394 | const char *errmsg = NULL; | |
395 | if (operand->insert) | |
396 | { | |
397 | insn = (*operand->insert) (insn, operand, mods, NULL, 0, &errmsg); | |
398 | /* If we get an error, go on to try the next insn. */ | |
399 | if (errmsg) | |
400 | break; | |
401 | } | |
402 | ++syn; | |
403 | } | |
404 | /* Are we finished with suffixes? */ | |
405 | else if (!past_opcode_p) | |
406 | { | |
407 | int found; | |
408 | char c; | |
409 | char *s,*t; | |
410 | const struct arc_operand_value *suf,*suffix,*suffix_end; | |
411 | ||
412 | if (!(operand->flags & ARC_OPERAND_SUFFIX)) | |
413 | abort (); | |
414 | ||
415 | /* If we're at a space in the input string, we want to skip the | |
416 | remaining suffixes. There may be some fake ones though, so | |
417 | just go on to try the next one. */ | |
418 | if (*str == ' ') | |
419 | { | |
420 | ++syn; | |
421 | continue; | |
422 | } | |
423 | ||
424 | s = str; | |
425 | if (mods & ARC_MOD_DOT) | |
426 | { | |
427 | if (*s != '.') | |
428 | break; | |
429 | ++s; | |
430 | } | |
431 | else | |
432 | { | |
433 | /* This can happen in "b.nd foo" and we're currently looking | |
434 | for "%q" (ie: a condition code suffix). */ | |
435 | if (*s == '.') | |
436 | { | |
437 | ++syn; | |
438 | continue; | |
439 | } | |
440 | } | |
441 | ||
442 | /* Pick the suffix out and look it up via the hash table. */ | |
443 | for (t = s; *t && isalpha (*t); ++t) | |
444 | continue; | |
445 | c = *t; | |
446 | *t = '\0'; | |
447 | suf = hash_find (arc_suffix_hash, s); | |
448 | *t = c; | |
449 | if (!suf) | |
450 | { | |
451 | /* This can happen in "blle foo" and we're currently using | |
452 | the template "b%q%.n %j". The "bl" insn occurs later in | |
453 | the table so "lle" isn't an illegal suffix. */ | |
454 | break; | |
455 | } | |
456 | ||
457 | /* Is it the right type? Note that the same character is used | |
458 | several times, so we have to examine all of them. This is | |
459 | relatively efficient as equivalent entries are kept | |
460 | together. If it's not the right type, don't increment `str' | |
461 | so we try the next one in the series. */ | |
462 | found = 0; | |
463 | suffix_end = arc_suffixes + arc_suffixes_count; | |
464 | for (suffix = suf; | |
465 | suffix < suffix_end && strcmp (suffix->name, suf->name) == 0; | |
466 | ++suffix) | |
467 | { | |
468 | if (arc_operands[suffix->type].fmt == *syn) | |
469 | { | |
470 | /* Insert the suffix's value into the insn. */ | |
471 | if (operand->insert) | |
472 | insn = (*operand->insert) (insn, operand, | |
473 | mods, NULL, suffix->value, | |
474 | NULL); | |
475 | else | |
476 | insn |= suffix->value << operand->shift; | |
477 | ||
478 | str = t; | |
479 | found = 1; | |
480 | break; | |
481 | } | |
482 | } | |
483 | ++syn; | |
484 | if (!found) | |
485 | ; /* Wrong type. Just go on to try next insn entry. */ | |
486 | else | |
487 | { | |
488 | if (num_suffixes == MAX_SUFFIXES) | |
489 | as_bad (_("too many suffixes")); | |
490 | else | |
491 | insn_suffixes[num_suffixes++] = suffix; | |
492 | } | |
493 | } | |
494 | else | |
495 | /* This is either a register or an expression of some kind. */ | |
496 | { | |
497 | char c; | |
498 | char *hold; | |
499 | const struct arc_operand_value *reg = NULL; | |
500 | long value = 0; | |
501 | expressionS exp; | |
502 | ||
503 | if (operand->flags & ARC_OPERAND_SUFFIX) | |
504 | abort (); | |
505 | ||
506 | /* Is there anything left to parse? | |
507 | We don't check for this at the top because we want to parse | |
508 | any trailing fake arguments in the syntax string. */ | |
509 | if (*str == '\0') | |
510 | break; | |
511 | #if 0 | |
512 | /* Is this a syntax character? Eg: is there a '[' present when | |
513 | there shouldn't be? */ | |
514 | if (!isalnum (*str) | |
515 | /* '.' as in ".LLC0" */ | |
516 | && *str != '.' | |
517 | /* '_' as in "_print" */ | |
518 | && *str != '_' | |
519 | /* '-' as in "[fp,-4]" */ | |
520 | && *str != '-' | |
521 | /* '%' as in "%ia(_func)" */ | |
522 | && *str != '%') | |
523 | break; | |
524 | #endif | |
525 | ||
526 | /* Parse the operand. */ | |
527 | hold = input_line_pointer; | |
528 | input_line_pointer = str; | |
529 | expression (&exp); | |
530 | str = input_line_pointer; | |
531 | input_line_pointer = hold; | |
532 | ||
533 | if (exp.X_op == O_illegal) | |
534 | as_bad (_("illegal operand")); | |
535 | else if (exp.X_op == O_absent) | |
536 | as_bad (_("missing operand")); | |
537 | else if (exp.X_op == O_constant) | |
538 | { | |
539 | value = exp.X_add_number; | |
540 | } | |
541 | else if (exp.X_op == O_register) | |
542 | { | |
543 | reg = arc_reg_names + exp.X_add_number; | |
544 | } | |
545 | else | |
546 | { | |
547 | /* We need to generate a fixup for this expression. */ | |
548 | if (fc >= MAX_FIXUPS) | |
549 | as_fatal (_("too many fixups")); | |
550 | fixups[fc].exp = exp; | |
551 | ||
552 | /* If this is a register constant (IE: one whose | |
553 | register value gets stored as 61-63) then this | |
554 | must be a limm. We don't support shimm relocs. */ | |
555 | /* ??? This bit could use some cleaning up. | |
556 | Referencing the format chars like this goes | |
557 | against style. */ | |
558 | #define IS_REG_OPERAND(o) ((o) == 'a' || (o) == 'b' || (o) == 'c') | |
559 | if (IS_REG_OPERAND (*syn)) | |
560 | { | |
561 | const char *junk; | |
562 | ||
563 | fixups[fc].opindex = arc_operand_map['L']; | |
564 | limm_reloc_p = 1; | |
565 | /* Tell insert_reg we need a limm. This is | |
566 | needed because the value at this point is | |
567 | zero, a shimm. */ | |
568 | /* ??? We need a cleaner interface than this. */ | |
569 | (*arc_operands[arc_operand_map['Q']].insert) | |
570 | (insn, operand, mods, reg, 0L, &junk); | |
571 | } | |
572 | else | |
573 | fixups[fc].opindex = arc_operand_map[*syn]; | |
574 | ++fc; | |
575 | value = 0; | |
576 | } | |
577 | ||
578 | /* Insert the register or expression into the instruction. */ | |
579 | if (operand->insert) | |
580 | { | |
581 | const char *errmsg = NULL; | |
582 | insn = (*operand->insert) (insn, operand, mods, | |
583 | reg, (long) value, &errmsg); | |
584 | #if 0 | |
585 | if (errmsg != (const char *) NULL) | |
586 | as_warn (errmsg); | |
587 | #endif | |
588 | /* FIXME: We want to try shimm insns for limm ones. But if | |
589 | the constant won't fit, we must go on to try the next | |
590 | possibility. Where do we issue warnings for constants | |
591 | that are too big then? At present, we'll flag the insn | |
592 | as unrecognizable! Maybe have the "bad instruction" | |
593 | error message include our `errmsg'? */ | |
594 | if (errmsg != (const char *) NULL) | |
595 | break; | |
596 | } | |
597 | else | |
598 | insn |= (value & ((1 << operand->bits) - 1)) << operand->shift; | |
599 | ||
600 | ++syn; | |
601 | } | |
602 | } | |
603 | ||
604 | /* If we're at the end of the syntax string, we're done. */ | |
605 | /* FIXME: try to move this to a separate function. */ | |
606 | if (*syn == '\0') | |
607 | { | |
608 | int i; | |
609 | char *f; | |
610 | long limm, limm_p; | |
611 | ||
612 | /* For the moment we assume a valid `str' can only contain blanks | |
613 | now. IE: We needn't try again with a longer version of the | |
614 | insn and it is assumed that longer versions of insns appear | |
615 | before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */ | |
616 | ||
617 | while (isspace (*str)) | |
618 | ++str; | |
619 | ||
620 | if (*str != '\0') | |
621 | as_bad (_("junk at end of line: `%s'"), str); | |
622 | ||
623 | /* Is there a limm value? */ | |
624 | limm_p = arc_opcode_limm_p (&limm); | |
625 | ||
626 | /* Perform various error and warning tests. */ | |
627 | ||
628 | { | |
629 | static int in_delay_slot_p = 0; | |
630 | static int prev_insn_needs_cc_nop_p = 0; | |
631 | /* delay slot type seen */ | |
632 | int delay_slot_type = ARC_DELAY_NONE; | |
633 | /* conditional execution flag seen */ | |
634 | int conditional = 0; | |
635 | /* 1 if condition codes are being set */ | |
636 | int cc_set_p = 0; | |
637 | /* 1 if conditional branch, including `b' "branch always" */ | |
638 | int cond_branch_p = opcode->flags & ARC_OPCODE_COND_BRANCH; | |
639 | int need_cc_nop_p = 0; | |
640 | ||
641 | for (i = 0; i < num_suffixes; ++i) | |
642 | { | |
643 | switch (arc_operands[insn_suffixes[i]->type].fmt) | |
644 | { | |
645 | case 'n' : | |
646 | delay_slot_type = insn_suffixes[i]->value; | |
647 | break; | |
648 | case 'q' : | |
649 | conditional = insn_suffixes[i]->value; | |
650 | break; | |
651 | case 'f' : | |
652 | cc_set_p = 1; | |
653 | break; | |
654 | } | |
655 | } | |
656 | ||
657 | /* Putting an insn with a limm value in a delay slot is supposed to | |
658 | be legal, but let's warn the user anyway. Ditto for 8 byte | |
659 | jumps with delay slots. */ | |
660 | if (in_delay_slot_p && limm_p) | |
661 | as_warn (_("8 byte instruction in delay slot")); | |
662 | if (delay_slot_type != ARC_DELAY_NONE && limm_p) | |
663 | as_warn (_("8 byte jump instruction with delay slot")); | |
664 | in_delay_slot_p = (delay_slot_type != ARC_DELAY_NONE) && !limm_p; | |
665 | ||
666 | /* Warn when a conditional branch immediately follows a set of | |
667 | the condition codes. Note that this needn't be done if the | |
668 | insn that sets the condition codes uses a limm. */ | |
669 | if (cond_branch_p && conditional != 0 /* 0 = "always" */ | |
670 | && prev_insn_needs_cc_nop_p) | |
671 | as_warn (_("conditional branch follows set of flags")); | |
672 | prev_insn_needs_cc_nop_p = cc_set_p && !limm_p; | |
673 | } | |
674 | ||
675 | /* Write out the instruction. | |
676 | It is important to fetch enough space in one call to `frag_more'. | |
677 | We use (f - frag_now->fr_literal) to compute where we are and we | |
678 | don't want frag_now to change between calls. */ | |
679 | if (limm_p) | |
680 | { | |
681 | f = frag_more (8); | |
682 | md_number_to_chars (f, insn, 4); | |
683 | md_number_to_chars (f + 4, limm, 4); | |
684 | } | |
685 | else if (limm_reloc_p) | |
686 | { | |
687 | /* We need a limm reloc, but the tables think we don't. */ | |
688 | abort (); | |
689 | } | |
690 | else | |
691 | { | |
692 | f = frag_more (4); | |
693 | md_number_to_chars (f, insn, 4); | |
694 | } | |
695 | ||
696 | /* Create any fixups. */ | |
697 | for (i = 0; i < fc; ++i) | |
698 | { | |
699 | int op_type, reloc_type; | |
700 | expressionS exptmp; | |
701 | const struct arc_operand *operand; | |
702 | ||
703 | /* Create a fixup for this operand. | |
704 | At this point we do not use a bfd_reloc_code_real_type for | |
705 | operands residing in the insn, but instead just use the | |
706 | operand index. This lets us easily handle fixups for any | |
707 | operand type, although that is admittedly not a very exciting | |
708 | feature. We pick a BFD reloc type in md_apply_fix. | |
709 | ||
710 | Limm values (4 byte immediate "constants") must be treated | |
711 | normally because they're not part of the actual insn word | |
712 | and thus the insertion routines don't handle them. */ | |
713 | ||
714 | if (arc_operands[fixups[i].opindex].flags & ARC_OPERAND_LIMM) | |
715 | { | |
716 | op_type = fixups[i].opindex; | |
717 | /* FIXME: can we add this data to the operand table? */ | |
718 | if (op_type == arc_operand_map['L']) | |
719 | reloc_type = BFD_RELOC_32; | |
720 | else if (op_type == arc_operand_map['J']) | |
721 | reloc_type = BFD_RELOC_ARC_B26; | |
722 | else | |
723 | abort (); | |
724 | reloc_type = get_arc_exp_reloc_type (1, reloc_type, | |
725 | &fixups[i].exp, | |
726 | &exptmp); | |
727 | } | |
728 | else | |
729 | { | |
730 | op_type = get_arc_exp_reloc_type (0, fixups[i].opindex, | |
731 | &fixups[i].exp, &exptmp); | |
732 | reloc_type = op_type + (int) BFD_RELOC_UNUSED; | |
733 | } | |
734 | operand = &arc_operands[op_type]; | |
735 | fix_new_exp (frag_now, | |
736 | ((f - frag_now->fr_literal) | |
737 | + (operand->flags & ARC_OPERAND_LIMM ? 4 : 0)), 4, | |
738 | &exptmp, | |
739 | (operand->flags & ARC_OPERAND_RELATIVE_BRANCH) != 0, | |
740 | (bfd_reloc_code_real_type) reloc_type); | |
741 | } | |
742 | ||
743 | /* All done. */ | |
744 | return; | |
745 | } | |
746 | ||
747 | /* Try the next entry. */ | |
748 | } | |
749 | ||
750 | as_bad (_("bad instruction `%s'"), start); | |
751 | } | |
752 | \f | |
753 | /* ??? This was copied from tc-sparc.c, I think. Is it necessary? */ | |
754 | ||
755 | static void | |
756 | arc_common (ignore) | |
757 | int ignore; | |
758 | { | |
759 | char *name; | |
760 | char c; | |
761 | char *p; | |
762 | int temp, size; | |
763 | symbolS *symbolP; | |
764 | ||
765 | name = input_line_pointer; | |
766 | c = get_symbol_end (); | |
767 | /* just after name is now '\0' */ | |
768 | p = input_line_pointer; | |
769 | *p = c; | |
770 | SKIP_WHITESPACE (); | |
771 | if (*input_line_pointer != ',') | |
772 | { | |
773 | as_bad (_("expected comma after symbol-name")); | |
774 | ignore_rest_of_line (); | |
775 | return; | |
776 | } | |
777 | input_line_pointer++; /* skip ',' */ | |
778 | if ((temp = get_absolute_expression ()) < 0) | |
779 | { | |
780 | as_bad (_(".COMMon length (%d.) <0! Ignored."), temp); | |
781 | ignore_rest_of_line (); | |
782 | return; | |
783 | } | |
784 | size = temp; | |
785 | *p = 0; | |
786 | symbolP = symbol_find_or_make (name); | |
787 | *p = c; | |
788 | if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) | |
789 | { | |
790 | as_bad (_("ignoring attempt to re-define symbol")); | |
791 | ignore_rest_of_line (); | |
792 | return; | |
793 | } | |
794 | if (S_GET_VALUE (symbolP) != 0) | |
795 | { | |
796 | if (S_GET_VALUE (symbolP) != size) | |
797 | { | |
798 | as_warn (_("Length of .comm \"%s\" is already %ld. Not changed to %d."), | |
799 | S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size); | |
800 | } | |
801 | } | |
7dcc9865 | 802 | assert (symbol_get_frag (symbolP) == &zero_address_frag); |
252b5132 RH |
803 | if (*input_line_pointer != ',') |
804 | { | |
805 | as_bad (_("expected comma after common length")); | |
806 | ignore_rest_of_line (); | |
807 | return; | |
808 | } | |
809 | input_line_pointer++; | |
810 | SKIP_WHITESPACE (); | |
811 | if (*input_line_pointer != '"') | |
812 | { | |
813 | temp = get_absolute_expression (); | |
814 | if (temp < 0) | |
815 | { | |
816 | temp = 0; | |
817 | as_warn (_("Common alignment negative; 0 assumed")); | |
818 | } | |
819 | if (symbolP->local) | |
820 | { | |
821 | segT old_sec; | |
822 | int old_subsec; | |
823 | char *p; | |
824 | int align; | |
825 | ||
826 | allocate_bss: | |
827 | old_sec = now_seg; | |
828 | old_subsec = now_subseg; | |
829 | align = temp; | |
830 | record_alignment (bss_section, align); | |
831 | subseg_set (bss_section, 0); | |
832 | if (align) | |
833 | frag_align (align, 0, 0); | |
834 | if (S_GET_SEGMENT (symbolP) == bss_section) | |
7dcc9865 ILT |
835 | symbol_get_frag (symbolP)->fr_symbol = 0; |
836 | symbol_set_frag (symbolP, frag_now); | |
252b5132 RH |
837 | p = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, |
838 | (offsetT) size, (char *) 0); | |
839 | *p = 0; | |
840 | S_SET_SEGMENT (symbolP, bss_section); | |
841 | S_CLEAR_EXTERNAL (symbolP); | |
842 | subseg_set (old_sec, old_subsec); | |
843 | } | |
844 | else | |
845 | { | |
846 | allocate_common: | |
847 | S_SET_VALUE (symbolP, (valueT) size); | |
848 | S_SET_ALIGN (symbolP, temp); | |
849 | S_SET_EXTERNAL (symbolP); | |
850 | S_SET_SEGMENT (symbolP, bfd_com_section_ptr); | |
851 | } | |
852 | } | |
853 | else | |
854 | { | |
855 | input_line_pointer++; | |
856 | /* ??? Some say data, some say bss. */ | |
857 | if (strncmp (input_line_pointer, ".bss\"", 5) | |
858 | && strncmp (input_line_pointer, ".data\"", 6)) | |
859 | { | |
860 | input_line_pointer--; | |
861 | goto bad_common_segment; | |
862 | } | |
863 | while (*input_line_pointer++ != '"') | |
864 | ; | |
865 | goto allocate_common; | |
866 | } | |
867 | demand_empty_rest_of_line (); | |
868 | return; | |
869 | ||
870 | { | |
871 | bad_common_segment: | |
872 | p = input_line_pointer; | |
873 | while (*p && *p != '\n') | |
874 | p++; | |
875 | c = *p; | |
876 | *p = '\0'; | |
877 | as_bad (_("bad .common segment %s"), input_line_pointer + 1); | |
878 | *p = c; | |
879 | input_line_pointer = p; | |
880 | ignore_rest_of_line (); | |
881 | return; | |
882 | } | |
883 | } | |
884 | ||
885 | /* Select the cpu we're assembling for. */ | |
886 | ||
887 | static void | |
888 | arc_cpu (ignore) | |
889 | int ignore; | |
890 | { | |
891 | int mach; | |
892 | char c; | |
893 | char *cpu; | |
894 | ||
895 | /* If an instruction has already been seen, it's too late. */ | |
896 | if (cpu_tables_init_p) | |
897 | { | |
898 | as_bad (_(".cpu command must appear before any instructions")); | |
899 | ignore_rest_of_line (); | |
900 | return; | |
901 | } | |
902 | ||
903 | cpu = input_line_pointer; | |
904 | c = get_symbol_end (); | |
905 | mach = arc_get_mach (cpu); | |
906 | *input_line_pointer = c; | |
907 | if (mach == -1) | |
908 | goto bad_cpu; | |
909 | ||
910 | demand_empty_rest_of_line (); | |
911 | ||
912 | /* The cpu may have been selected on the command line. | |
913 | The choices must match. */ | |
914 | /* ??? This was a command line option early on. It's gone now, but | |
915 | leave this in. */ | |
916 | if (mach_type_specified_p && mach != arc_mach_type) | |
917 | as_bad (_(".cpu conflicts with previous value")); | |
918 | else | |
919 | { | |
920 | arc_mach_type = mach; | |
921 | mach_type_specified_p = 1; | |
922 | if (!bfd_set_arch_mach (stdoutput, bfd_arch_arc, mach)) | |
923 | as_warn (_("could not set architecture and machine")); | |
924 | } | |
925 | return; | |
926 | ||
927 | bad_cpu: | |
928 | as_bad (_("bad .cpu op")); | |
929 | ignore_rest_of_line (); | |
930 | } | |
931 | ||
932 | #if 0 | |
933 | /* The .rename pseudo-op. This is used by gcc to implement | |
934 | -mmangle-cpu-libgcc. */ | |
935 | ||
936 | static void | |
937 | arc_rename (ignore) | |
938 | int ignore; | |
939 | { | |
940 | char *name,*new; | |
941 | char c; | |
942 | symbolS *sym; | |
943 | int len; | |
944 | ||
945 | name = input_line_pointer; | |
946 | c = get_symbol_end (); | |
947 | sym = symbol_find_or_make (name); | |
948 | *input_line_pointer = c; | |
949 | ||
950 | if (*input_line_pointer != ',') | |
951 | { | |
952 | as_bad (_("missing rename string")); | |
953 | ignore_rest_of_line (); | |
954 | return; | |
955 | } | |
956 | ++input_line_pointer; | |
957 | SKIP_WHITESPACE (); | |
958 | ||
959 | name = input_line_pointer; | |
960 | c = get_symbol_end (); | |
961 | if (*name == '\0') | |
962 | { | |
963 | *input_line_pointer = c; | |
964 | as_bad (_("invalid symbol to rename to")); | |
965 | ignore_rest_of_line (); | |
966 | return; | |
967 | } | |
968 | new = (char *) xmalloc (strlen (name) + 1); | |
969 | strcpy (new, name); | |
970 | *input_line_pointer = c; | |
7dcc9865 | 971 | symbol_get_tc (sym)->real_name = new; |
252b5132 RH |
972 | |
973 | demand_empty_rest_of_line (); | |
974 | } | |
975 | #endif | |
976 | \f | |
977 | /* Turn a string in input_line_pointer into a floating point constant of type | |
978 | type, and store the appropriate bytes in *litP. The number of LITTLENUMS | |
979 | emitted is stored in *sizeP. | |
980 | An error message is returned, or NULL on OK. */ | |
981 | ||
982 | /* Equal to MAX_PRECISION in atof-ieee.c */ | |
983 | #define MAX_LITTLENUMS 6 | |
984 | ||
985 | char * | |
986 | md_atof (type, litP, sizeP) | |
987 | char type; | |
988 | char *litP; | |
989 | int *sizeP; | |
990 | { | |
991 | int prec; | |
992 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
993 | LITTLENUM_TYPE *wordP; | |
994 | char *t; | |
995 | char *atof_ieee (); | |
996 | ||
997 | switch (type) | |
998 | { | |
999 | case 'f': | |
1000 | case 'F': | |
1001 | prec = 2; | |
1002 | break; | |
1003 | ||
1004 | case 'd': | |
1005 | case 'D': | |
1006 | prec = 4; | |
1007 | break; | |
1008 | ||
1009 | default: | |
1010 | *sizeP = 0; | |
1011 | return _("bad call to md_atof"); | |
1012 | } | |
1013 | ||
1014 | t = atof_ieee (input_line_pointer, type, words); | |
1015 | if (t) | |
1016 | input_line_pointer = t; | |
1017 | *sizeP = prec * sizeof (LITTLENUM_TYPE); | |
1018 | for (wordP = words; prec--;) | |
1019 | { | |
1020 | md_number_to_chars (litP, (valueT) (*wordP++), sizeof (LITTLENUM_TYPE)); | |
1021 | litP += sizeof (LITTLENUM_TYPE); | |
1022 | } | |
1023 | ||
1024 | return NULL; | |
1025 | } | |
1026 | ||
1027 | /* Write a value out to the object file, using the appropriate | |
1028 | endianness. */ | |
1029 | ||
1030 | void | |
1031 | md_number_to_chars (buf, val, n) | |
1032 | char *buf; | |
1033 | valueT val; | |
1034 | int n; | |
1035 | { | |
1036 | if (target_big_endian) | |
1037 | number_to_chars_bigendian (buf, val, n); | |
1038 | else | |
1039 | number_to_chars_littleendian (buf, val, n); | |
1040 | } | |
1041 | ||
1dab94dd | 1042 | /* Round up a section size to the appropriate boundary. */ |
252b5132 RH |
1043 | |
1044 | valueT | |
1045 | md_section_align (segment, size) | |
1046 | segT segment; | |
1047 | valueT size; | |
1048 | { | |
1049 | int align = bfd_get_section_alignment (stdoutput, segment); | |
1050 | ||
1051 | return ((size + (1 << align) - 1) & (-1 << align)); | |
1052 | } | |
1053 | ||
1054 | /* We don't have any form of relaxing. */ | |
1055 | ||
1056 | int | |
1057 | md_estimate_size_before_relax (fragp, seg) | |
1058 | fragS *fragp; | |
1059 | asection *seg; | |
1060 | { | |
1061 | abort (); | |
1062 | } | |
1063 | ||
1064 | /* Convert a machine dependent frag. We never generate these. */ | |
1065 | ||
1066 | void | |
1067 | md_convert_frag (abfd, sec, fragp) | |
1068 | bfd *abfd; | |
1069 | asection *sec; | |
1070 | fragS *fragp; | |
1071 | { | |
1072 | abort (); | |
1073 | } | |
1074 | ||
1075 | /* Parse an operand that is machine-specific. | |
1076 | ||
1077 | The ARC has a special %-op to adjust addresses so they're usable in | |
1078 | branches. The "st" is short for the STatus register. | |
1079 | ??? Later expand this to take a flags value too. | |
1080 | ||
1081 | ??? We can't create new expression types so we map the %-op's onto the | |
1082 | existing syntax. This means that the user could use the chosen syntax | |
1083 | to achieve the same effect. Perhaps put a special cookie in X_add_number | |
1084 | to mark the expression as special. */ | |
1085 | ||
1dab94dd | 1086 | void |
252b5132 RH |
1087 | md_operand (expressionP) |
1088 | expressionS *expressionP; | |
1089 | { | |
1090 | char *p = input_line_pointer; | |
1091 | ||
1092 | if (*p == '%' && strncmp (p, "%st(", 4) == 0) | |
1093 | { | |
1094 | input_line_pointer += 4; | |
1095 | expression (expressionP); | |
1096 | if (*input_line_pointer != ')') | |
1097 | { | |
1098 | as_bad (_("missing ')' in %-op")); | |
1099 | return; | |
1100 | } | |
1101 | ++input_line_pointer; | |
1102 | if (expressionP->X_op == O_symbol | |
1103 | && expressionP->X_add_number == 0 | |
1dab94dd | 1104 | /* I think this test is unnecessary but just as a sanity check... */ |
252b5132 RH |
1105 | && expressionP->X_op_symbol == NULL) |
1106 | { | |
1107 | expressionS two; | |
1108 | ||
1109 | expressionP->X_op = O_right_shift; | |
1110 | two.X_op = O_constant; | |
1111 | two.X_add_symbol = two.X_op_symbol = NULL; | |
1112 | two.X_add_number = 2; | |
1113 | expressionP->X_op_symbol = make_expr_symbol (&two); | |
1114 | } | |
1115 | /* allow %st(sym1-sym2) */ | |
1116 | else if (expressionP->X_op == O_subtract | |
1117 | && expressionP->X_add_symbol != NULL | |
1118 | && expressionP->X_op_symbol != NULL | |
1119 | && expressionP->X_add_number == 0) | |
1120 | { | |
1121 | expressionS two; | |
1122 | ||
1123 | expressionP->X_add_symbol = make_expr_symbol (expressionP); | |
1124 | expressionP->X_op = O_right_shift; | |
1125 | two.X_op = O_constant; | |
1126 | two.X_add_symbol = two.X_op_symbol = NULL; | |
1127 | two.X_add_number = 2; | |
1128 | expressionP->X_op_symbol = make_expr_symbol (&two); | |
1129 | } | |
1130 | else | |
1131 | { | |
1132 | as_bad (_("expression too complex for %%st")); | |
1133 | return; | |
1134 | } | |
1135 | } | |
1136 | } | |
1137 | ||
1138 | /* We have no need to default values of symbols. | |
1139 | We could catch register names here, but that is handled by inserting | |
1140 | them all in the symbol table to begin with. */ | |
1141 | ||
1142 | symbolS * | |
1143 | md_undefined_symbol (name) | |
1144 | char *name; | |
1145 | { | |
1146 | return 0; | |
1147 | } | |
1148 | \f | |
1149 | /* Functions concerning expressions. */ | |
1150 | ||
1151 | /* Parse a .byte, .word, etc. expression. | |
1152 | ||
1153 | Values for the status register are specified with %st(label). | |
1154 | `label' will be right shifted by 2. */ | |
1155 | ||
1156 | void | |
1157 | arc_parse_cons_expression (exp, nbytes) | |
1158 | expressionS *exp; | |
1159 | int nbytes; | |
1160 | { | |
1161 | expr (0, exp); | |
1162 | } | |
1163 | ||
1164 | /* Record a fixup for a cons expression. */ | |
1165 | ||
1166 | void | |
1167 | arc_cons_fix_new (frag, where, nbytes, exp) | |
1168 | fragS *frag; | |
1169 | int where; | |
1170 | int nbytes; | |
1171 | expressionS *exp; | |
1172 | { | |
1173 | if (nbytes == 4) | |
1174 | { | |
1175 | int reloc_type; | |
1176 | expressionS exptmp; | |
1177 | ||
1178 | /* This may be a special ARC reloc (eg: %st()). */ | |
1179 | reloc_type = get_arc_exp_reloc_type (1, BFD_RELOC_32, exp, &exptmp); | |
1180 | fix_new_exp (frag, where, nbytes, &exptmp, 0, reloc_type); | |
1181 | } | |
1182 | else | |
1183 | { | |
1184 | fix_new_exp (frag, where, nbytes, exp, 0, | |
1185 | nbytes == 2 ? BFD_RELOC_16 | |
1186 | : nbytes == 8 ? BFD_RELOC_64 | |
1187 | : BFD_RELOC_32); | |
1188 | } | |
1189 | } | |
1190 | \f | |
1191 | /* Functions concerning relocs. */ | |
1192 | ||
1193 | /* The location from which a PC relative jump should be calculated, | |
1194 | given a PC relative reloc. */ | |
1195 | ||
1dab94dd | 1196 | long |
252b5132 RH |
1197 | md_pcrel_from (fixP) |
1198 | fixS *fixP; | |
1199 | { | |
1200 | if (fixP->fx_addsy != (symbolS *) NULL | |
1201 | && ! S_IS_DEFINED (fixP->fx_addsy)) | |
1202 | { | |
1203 | /* The symbol is undefined. Let the linker figure it out. */ | |
1204 | return 0; | |
1205 | } | |
1206 | ||
1207 | /* Return the address of the delay slot. */ | |
1208 | return fixP->fx_frag->fr_address + fixP->fx_where + fixP->fx_size; | |
1209 | } | |
1210 | ||
1211 | /* Compute the reloc type of an expression. | |
1212 | The possibly modified expression is stored in EXPNEW. | |
1213 | ||
1214 | This is used to convert the expressions generated by the %-op's into | |
1215 | the appropriate operand type. It is called for both data in instructions | |
1216 | (operands) and data outside instructions (variables, debugging info, etc.). | |
1217 | ||
1218 | Currently supported %-ops: | |
1219 | ||
1220 | %st(symbol): represented as "symbol >> 2" | |
1221 | "st" is short for STatus as in the status register (pc) | |
1222 | ||
1223 | DEFAULT_TYPE is the type to use if no special processing is required. | |
1224 | ||
1225 | DATA_P is non-zero for data or limm values, zero for insn operands. | |
1226 | Remember that the opcode "insertion fns" cannot be used on data, they're | |
1227 | only for inserting operands into insns. They also can't be used for limm | |
1228 | values as the insertion routines don't handle limm values. When called for | |
1229 | insns we return fudged reloc types (real_value - BFD_RELOC_UNUSED). When | |
1230 | called for data or limm values we use real reloc types. */ | |
1231 | ||
1232 | static int | |
1233 | get_arc_exp_reloc_type (data_p, default_type, exp, expnew) | |
1234 | int data_p; | |
1235 | int default_type; | |
1236 | expressionS *exp; | |
1237 | expressionS *expnew; | |
1238 | { | |
1239 | /* If the expression is "symbol >> 2" we must change it to just "symbol", | |
1240 | as fix_new_exp can't handle it. Similarily for (symbol - symbol) >> 2. | |
1241 | That's ok though. What's really going on here is that we're using | |
1242 | ">> 2" as a special syntax for specifying BFD_RELOC_ARC_B26. */ | |
1243 | ||
1244 | if (exp->X_op == O_right_shift | |
1245 | && exp->X_op_symbol != NULL | |
a77f5182 ILT |
1246 | && symbol_constant_p (exp->X_op_symbol) |
1247 | && S_GET_VALUE (exp->X_op_symbol) == 2 | |
252b5132 RH |
1248 | && exp->X_add_number == 0) |
1249 | { | |
1250 | if (exp->X_add_symbol != NULL | |
a77f5182 ILT |
1251 | && (symbol_constant_p (exp->X_add_symbol) |
1252 | || symbol_equated_p (exp->X_add_symbol))) | |
252b5132 RH |
1253 | { |
1254 | *expnew = *exp; | |
1255 | expnew->X_op = O_symbol; | |
1256 | expnew->X_op_symbol = NULL; | |
1257 | return data_p ? BFD_RELOC_ARC_B26 : arc_operand_map['J']; | |
1258 | } | |
1259 | else if (exp->X_add_symbol != NULL | |
a77f5182 ILT |
1260 | && (symbol_get_value_expression (exp->X_add_symbol)->X_op |
1261 | == O_subtract)) | |
252b5132 | 1262 | { |
a77f5182 | 1263 | *expnew = *symbol_get_value_expression (exp->X_add_symbol); |
252b5132 RH |
1264 | return data_p ? BFD_RELOC_ARC_B26 : arc_operand_map['J']; |
1265 | } | |
1266 | } | |
1267 | ||
1268 | *expnew = *exp; | |
1269 | return default_type; | |
1270 | } | |
1271 | ||
1272 | /* Apply a fixup to the object code. This is called for all the | |
1273 | fixups we generated by the call to fix_new_exp, above. In the call | |
1274 | above we used a reloc code which was the largest legal reloc code | |
1275 | plus the operand index. Here we undo that to recover the operand | |
1276 | index. At this point all symbol values should be fully resolved, | |
1277 | and we attempt to completely resolve the reloc. If we can not do | |
1278 | that, we determine the correct reloc code and put it back in the fixup. */ | |
1279 | ||
1280 | int | |
1281 | md_apply_fix3 (fixP, valueP, seg) | |
1282 | fixS *fixP; | |
1283 | valueT *valueP; | |
1284 | segT seg; | |
1285 | { | |
1286 | /*char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;*/ | |
1287 | valueT value; | |
1288 | ||
1289 | /* FIXME FIXME FIXME: The value we are passed in *valueP includes | |
1290 | the symbol values. Since we are using BFD_ASSEMBLER, if we are | |
1291 | doing this relocation the code in write.c is going to call | |
1292 | bfd_perform_relocation, which is also going to use the symbol | |
1293 | value. That means that if the reloc is fully resolved we want to | |
1294 | use *valueP since bfd_perform_relocation is not being used. | |
1295 | However, if the reloc is not fully resolved we do not want to use | |
1296 | *valueP, and must use fx_offset instead. However, if the reloc | |
1297 | is PC relative, we do want to use *valueP since it includes the | |
1298 | result of md_pcrel_from. This is confusing. */ | |
1299 | ||
1300 | if (fixP->fx_addsy == (symbolS *) NULL) | |
1301 | { | |
1302 | value = *valueP; | |
1303 | fixP->fx_done = 1; | |
1304 | } | |
1305 | else if (fixP->fx_pcrel) | |
1306 | { | |
1307 | value = *valueP; | |
1308 | /* ELF relocations are against symbols. | |
1309 | If this symbol is in a different section then we need to leave it for | |
1310 | the linker to deal with. Unfortunately, md_pcrel_from can't tell, | |
1311 | so we have to undo it's effects here. */ | |
1312 | if (S_IS_DEFINED (fixP->fx_addsy) | |
1313 | && S_GET_SEGMENT (fixP->fx_addsy) != seg) | |
1314 | value += md_pcrel_from (fixP); | |
1315 | } | |
1316 | else | |
1317 | { | |
1318 | value = fixP->fx_offset; | |
1319 | if (fixP->fx_subsy != (symbolS *) NULL) | |
1320 | { | |
1321 | if (S_GET_SEGMENT (fixP->fx_subsy) == absolute_section) | |
1322 | value -= S_GET_VALUE (fixP->fx_subsy); | |
1323 | else | |
1324 | { | |
1325 | /* We can't actually support subtracting a symbol. */ | |
1326 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1327 | _("expression too complex")); | |
1328 | } | |
1329 | } | |
1330 | } | |
1331 | ||
1332 | if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED) | |
1333 | { | |
1334 | int opindex; | |
1335 | const struct arc_operand *operand; | |
1336 | char *where; | |
1337 | arc_insn insn; | |
1338 | ||
1339 | opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED; | |
1340 | ||
1341 | operand = &arc_operands[opindex]; | |
1342 | ||
1343 | /* Fetch the instruction, insert the fully resolved operand | |
1344 | value, and stuff the instruction back again. */ | |
1345 | where = fixP->fx_frag->fr_literal + fixP->fx_where; | |
1346 | if (target_big_endian) | |
1347 | insn = bfd_getb32 ((unsigned char *) where); | |
1348 | else | |
1349 | insn = bfd_getl32 ((unsigned char *) where); | |
1350 | insn = arc_insert_operand (insn, operand, -1, NULL, (offsetT) value, | |
1351 | fixP->fx_file, fixP->fx_line); | |
1352 | if (target_big_endian) | |
1353 | bfd_putb32 ((bfd_vma) insn, (unsigned char *) where); | |
1354 | else | |
1355 | bfd_putl32 ((bfd_vma) insn, (unsigned char *) where); | |
1356 | ||
1357 | if (fixP->fx_done) | |
1358 | { | |
1359 | /* Nothing else to do here. */ | |
1360 | return 1; | |
1361 | } | |
1362 | ||
1363 | /* Determine a BFD reloc value based on the operand information. | |
1364 | We are only prepared to turn a few of the operands into relocs. | |
1365 | !!! Note that we can't handle limm values here. Since we're using | |
1366 | implicit addends the addend must be inserted into the instruction, | |
1367 | however, the opcode insertion routines currently do nothing with | |
1368 | limm values. */ | |
1369 | if (operand->fmt == 'B') | |
1370 | { | |
1371 | assert ((operand->flags & ARC_OPERAND_RELATIVE_BRANCH) != 0 | |
1372 | && operand->bits == 20 | |
1373 | && operand->shift == 7); | |
1374 | fixP->fx_r_type = BFD_RELOC_ARC_B22_PCREL; | |
1375 | } | |
1376 | else if (0 && operand->fmt == 'J') | |
1377 | { | |
1378 | assert ((operand->flags & ARC_OPERAND_ABSOLUTE_BRANCH) != 0 | |
1379 | && operand->bits == 24 | |
1380 | && operand->shift == 32); | |
1381 | fixP->fx_r_type = BFD_RELOC_ARC_B26; | |
1382 | } | |
1383 | else if (0 && operand->fmt == 'L') | |
1384 | { | |
1385 | assert ((operand->flags & ARC_OPERAND_LIMM) != 0 | |
1386 | && operand->bits == 32 | |
1387 | && operand->shift == 32); | |
1388 | fixP->fx_r_type = BFD_RELOC_32; | |
1389 | } | |
1390 | else | |
1391 | { | |
1392 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1393 | _("unresolved expression that must be resolved")); | |
1394 | fixP->fx_done = 1; | |
1395 | return 1; | |
1396 | } | |
1397 | } | |
1398 | else | |
1399 | { | |
1400 | switch (fixP->fx_r_type) | |
1401 | { | |
1402 | case BFD_RELOC_8: | |
1403 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
1404 | value, 1); | |
1405 | break; | |
1406 | case BFD_RELOC_16: | |
1407 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
1408 | value, 2); | |
1409 | break; | |
1410 | case BFD_RELOC_32: | |
1411 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
1412 | value, 4); | |
1413 | break; | |
1414 | #if 0 | |
1415 | case BFD_RELOC_64: | |
1416 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
1417 | value, 8); | |
1418 | break; | |
1419 | #endif | |
1420 | case BFD_RELOC_ARC_B26: | |
1421 | /* If !fixP->fx_done then `value' is an implicit addend. | |
1422 | We must shift it right by 2 in this case as well because the | |
1423 | linker performs the relocation and then adds this in (as opposed | |
1424 | to adding this in and then shifting right by 2). */ | |
1425 | value >>= 2; | |
1426 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
1427 | value, 4); | |
1428 | break; | |
1429 | default: | |
1430 | abort (); | |
1431 | } | |
1432 | } | |
1433 | ||
1434 | fixP->fx_addnumber = value; | |
1435 | ||
1436 | return 1; | |
1437 | } | |
1438 | ||
1439 | /* Translate internal representation of relocation info to BFD target | |
1440 | format. */ | |
1441 | ||
1442 | arelent * | |
1443 | tc_gen_reloc (section, fixP) | |
1444 | asection *section; | |
1445 | fixS *fixP; | |
1446 | { | |
1447 | arelent *reloc; | |
1448 | ||
1449 | reloc = (arelent *) xmalloc (sizeof (arelent)); | |
1450 | ||
310b5aa2 ILT |
1451 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); |
1452 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixP->fx_addsy); | |
252b5132 RH |
1453 | reloc->address = fixP->fx_frag->fr_address + fixP->fx_where; |
1454 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type); | |
1455 | if (reloc->howto == (reloc_howto_type *) NULL) | |
1456 | { | |
1457 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1458 | _("internal error: can't export reloc type %d (`%s')"), | |
1459 | fixP->fx_r_type, bfd_get_reloc_code_name (fixP->fx_r_type)); | |
1460 | return NULL; | |
1461 | } | |
1462 | ||
1463 | assert (!fixP->fx_pcrel == !reloc->howto->pc_relative); | |
1464 | ||
1465 | reloc->addend = fixP->fx_addnumber; | |
1466 | ||
1467 | return reloc; | |
1468 | } | |
1469 | \f | |
1470 | /* Frobbers. */ | |
1471 | ||
1472 | #if 0 | |
1473 | /* Set the real name if the .rename pseudo-op was used. | |
1474 | Return 1 if the symbol should not be included in the symbol table. */ | |
1475 | ||
1476 | int | |
1477 | arc_frob_symbol (sym) | |
1478 | symbolS *sym; | |
1479 | { | |
7dcc9865 ILT |
1480 | if (symbol_get_tc (sym)->real_name != (char *) NULL) |
1481 | S_SET_NAME (sym, symbol_get_tc (sym)->real_name); | |
252b5132 RH |
1482 | |
1483 | return 0; | |
1484 | } | |
1485 | #endif |