]>
Commit | Line | Data |
---|---|---|
adde6300 AM |
1 | /* tc-avr.c -- Assembler code for the ATMEL AVR |
2 | ||
17e57237 | 3 | Copyright 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008, 2009, |
fb5b7503 | 4 | 2010, 2012, 2013 Free Software Foundation, Inc. |
adde6300 AM |
5 | Contributed by Denis Chertykov <denisc@overta.ru> |
6 | ||
7 | This file is part of GAS, the GNU Assembler. | |
8 | ||
9 | GAS is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
ec2655a6 | 11 | the Free Software Foundation; either version 3, or (at your option) |
adde6300 AM |
12 | any later version. |
13 | ||
14 | GAS is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
20 | along with GAS; see the file COPYING. If not, write to | |
4b4da160 NC |
21 | the Free Software Foundation, 51 Franklin Street - Fifth Floor, |
22 | Boston, MA 02110-1301, USA. */ | |
adde6300 | 23 | |
adde6300 | 24 | #include "as.h" |
3882b010 | 25 | #include "safe-ctype.h" |
adde6300 | 26 | #include "subsegs.h" |
fb5b7503 | 27 | #include "dwarf2dbg.h" |
af3ecb4a RH |
28 | #include "dw2gencfi.h" |
29 | ||
adde6300 | 30 | |
1188e082 DC |
31 | struct avr_opcodes_s |
32 | { | |
dc191a8f NC |
33 | char * name; |
34 | char * constraints; | |
8cc66334 | 35 | char * opcode; |
dc191a8f NC |
36 | int insn_size; /* In words. */ |
37 | int isa; | |
38 | unsigned int bin_opcode; | |
1188e082 DC |
39 | }; |
40 | ||
41 | #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \ | |
8cc66334 | 42 | {#NAME, CONSTR, OPCODE, SIZE, ISA, BIN}, |
1188e082 DC |
43 | |
44 | struct avr_opcodes_s avr_opcodes[] = | |
45 | { | |
46 | #include "opcode/avr.h" | |
8cc66334 | 47 | {NULL, NULL, NULL, 0, 0, 0} |
1188e082 DC |
48 | }; |
49 | ||
adde6300 AM |
50 | const char comment_chars[] = ";"; |
51 | const char line_comment_chars[] = "#"; | |
52 | const char line_separator_chars[] = "$"; | |
53 | ||
adde6300 AM |
54 | const char *md_shortopts = "m:"; |
55 | struct mcu_type_s | |
56 | { | |
57 | char *name; | |
58 | int isa; | |
59 | int mach; | |
60 | }; | |
61 | ||
1f8ae5e6 | 62 | /* XXX - devices that don't seem to exist (renamed, replaced with larger |
7b21ac3f | 63 | ones, or planned but never produced), left here for compatibility. */ |
1f8ae5e6 | 64 | |
adde6300 AM |
65 | static struct mcu_type_s mcu_types[] = |
66 | { | |
7b21ac3f EW |
67 | {"avr1", AVR_ISA_AVR1, bfd_mach_avr1}, |
68 | /* TODO: insruction set for avr2 architecture should be AVR_ISA_AVR2, | |
99700d6f NC |
69 | but set to AVR_ISA_AVR25 for some following version |
70 | of GCC (from 4.3) for backward compatibility. */ | |
7b21ac3f EW |
71 | {"avr2", AVR_ISA_AVR25, bfd_mach_avr2}, |
72 | {"avr25", AVR_ISA_AVR25, bfd_mach_avr25}, | |
99700d6f NC |
73 | /* TODO: insruction set for avr3 architecture should be AVR_ISA_AVR3, |
74 | but set to AVR_ISA_AVR3_ALL for some following version | |
7b21ac3f EW |
75 | of GCC (from 4.3) for backward compatibility. */ |
76 | {"avr3", AVR_ISA_AVR3_ALL, bfd_mach_avr3}, | |
77 | {"avr31", AVR_ISA_AVR31, bfd_mach_avr31}, | |
78 | {"avr35", AVR_ISA_AVR35, bfd_mach_avr35}, | |
79 | {"avr4", AVR_ISA_AVR4, bfd_mach_avr4}, | |
99700d6f NC |
80 | /* TODO: insruction set for avr5 architecture should be AVR_ISA_AVR5, |
81 | but set to AVR_ISA_AVR51 for some following version | |
7b21ac3f EW |
82 | of GCC (from 4.3) for backward compatibility. */ |
83 | {"avr5", AVR_ISA_AVR51, bfd_mach_avr5}, | |
84 | {"avr51", AVR_ISA_AVR51, bfd_mach_avr51}, | |
85 | {"avr6", AVR_ISA_AVR6, bfd_mach_avr6}, | |
8cc66334 EW |
86 | {"avrxmega1", AVR_ISA_XMEGA, bfd_mach_avrxmega1}, |
87 | {"avrxmega2", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, | |
88 | {"avrxmega3", AVR_ISA_XMEGA, bfd_mach_avrxmega3}, | |
89 | {"avrxmega4", AVR_ISA_XMEGA, bfd_mach_avrxmega4}, | |
90 | {"avrxmega5", AVR_ISA_XMEGA, bfd_mach_avrxmega5}, | |
91 | {"avrxmega6", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, | |
92 | {"avrxmega7", AVR_ISA_XMEGA, bfd_mach_avrxmega7}, | |
28c9d252 | 93 | {"at90s1200", AVR_ISA_1200, bfd_mach_avr1}, |
7b21ac3f EW |
94 | {"attiny11", AVR_ISA_AVR1, bfd_mach_avr1}, |
95 | {"attiny12", AVR_ISA_AVR1, bfd_mach_avr1}, | |
96 | {"attiny15", AVR_ISA_AVR1, bfd_mach_avr1}, | |
97 | {"attiny28", AVR_ISA_AVR1, bfd_mach_avr1}, | |
98 | {"at90s2313", AVR_ISA_AVR2, bfd_mach_avr2}, | |
99 | {"at90s2323", AVR_ISA_AVR2, bfd_mach_avr2}, | |
100 | {"at90s2333", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 4433 */ | |
101 | {"at90s2343", AVR_ISA_AVR2, bfd_mach_avr2}, | |
102 | {"attiny22", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 2343 */ | |
d669d37f | 103 | {"attiny26", AVR_ISA_2xxe, bfd_mach_avr2}, |
7b21ac3f EW |
104 | {"at90s4414", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8515 */ |
105 | {"at90s4433", AVR_ISA_AVR2, bfd_mach_avr2}, | |
106 | {"at90s4434", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8535 */ | |
107 | {"at90s8515", AVR_ISA_AVR2, bfd_mach_avr2}, | |
108 | {"at90c8534", AVR_ISA_AVR2, bfd_mach_avr2}, | |
109 | {"at90s8535", AVR_ISA_AVR2, bfd_mach_avr2}, | |
110 | {"attiny13", AVR_ISA_AVR25, bfd_mach_avr25}, | |
111 | {"attiny13a", AVR_ISA_AVR25, bfd_mach_avr25}, | |
112 | {"attiny2313", AVR_ISA_AVR25, bfd_mach_avr25}, | |
8453da2e | 113 | {"attiny2313a",AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f | 114 | {"attiny24", AVR_ISA_AVR25, bfd_mach_avr25}, |
8453da2e EW |
115 | {"attiny24a", AVR_ISA_AVR25, bfd_mach_avr25}, |
116 | {"attiny4313", AVR_ISA_AVR25, bfd_mach_avr25}, | |
7b21ac3f | 117 | {"attiny44", AVR_ISA_AVR25, bfd_mach_avr25}, |
8453da2e | 118 | {"attiny44a", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f | 119 | {"attiny84", AVR_ISA_AVR25, bfd_mach_avr25}, |
e760a81b | 120 | {"attiny84a", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f EW |
121 | {"attiny25", AVR_ISA_AVR25, bfd_mach_avr25}, |
122 | {"attiny45", AVR_ISA_AVR25, bfd_mach_avr25}, | |
123 | {"attiny85", AVR_ISA_AVR25, bfd_mach_avr25}, | |
124 | {"attiny261", AVR_ISA_AVR25, bfd_mach_avr25}, | |
8453da2e | 125 | {"attiny261a", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f | 126 | {"attiny461", AVR_ISA_AVR25, bfd_mach_avr25}, |
e760a81b | 127 | {"attiny461a", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f | 128 | {"attiny861", AVR_ISA_AVR25, bfd_mach_avr25}, |
8453da2e | 129 | {"attiny861a", AVR_ISA_AVR25, bfd_mach_avr25}, |
2b02f87c | 130 | {"attiny87", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f EW |
131 | {"attiny43u", AVR_ISA_AVR25, bfd_mach_avr25}, |
132 | {"attiny48", AVR_ISA_AVR25, bfd_mach_avr25}, | |
133 | {"attiny88", AVR_ISA_AVR25, bfd_mach_avr25}, | |
134 | {"at86rf401", AVR_ISA_RF401, bfd_mach_avr25}, | |
a53fddce | 135 | {"ata6289", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f EW |
136 | {"at43usb355", AVR_ISA_AVR3, bfd_mach_avr3}, |
137 | {"at76c711", AVR_ISA_AVR3, bfd_mach_avr3}, | |
138 | {"atmega103", AVR_ISA_AVR31, bfd_mach_avr31}, | |
139 | {"at43usb320", AVR_ISA_AVR31, bfd_mach_avr31}, | |
140 | {"attiny167", AVR_ISA_AVR35, bfd_mach_avr35}, | |
141 | {"at90usb82", AVR_ISA_AVR35, bfd_mach_avr35}, | |
142 | {"at90usb162", AVR_ISA_AVR35, bfd_mach_avr35}, | |
11908008 EW |
143 | {"atmega8u2", AVR_ISA_AVR35, bfd_mach_avr35}, |
144 | {"atmega16u2", AVR_ISA_AVR35, bfd_mach_avr35}, | |
145 | {"atmega32u2", AVR_ISA_AVR35, bfd_mach_avr35}, | |
28c9d252 | 146 | {"atmega8", AVR_ISA_M8, bfd_mach_avr4}, |
7b21ac3f | 147 | {"atmega48", AVR_ISA_AVR4, bfd_mach_avr4}, |
e760a81b | 148 | {"atmega48a", AVR_ISA_AVR4, bfd_mach_avr4}, |
7b21ac3f EW |
149 | {"atmega48p", AVR_ISA_AVR4, bfd_mach_avr4}, |
150 | {"atmega88", AVR_ISA_AVR4, bfd_mach_avr4}, | |
e760a81b | 151 | {"atmega88a", AVR_ISA_AVR4, bfd_mach_avr4}, |
7b21ac3f | 152 | {"atmega88p", AVR_ISA_AVR4, bfd_mach_avr4}, |
e760a81b | 153 | {"atmega88pa", AVR_ISA_AVR4, bfd_mach_avr4}, |
28c9d252 NC |
154 | {"atmega8515", AVR_ISA_M8, bfd_mach_avr4}, |
155 | {"atmega8535", AVR_ISA_M8, bfd_mach_avr4}, | |
7b21ac3f EW |
156 | {"atmega8hva", AVR_ISA_AVR4, bfd_mach_avr4}, |
157 | {"at90pwm1", AVR_ISA_AVR4, bfd_mach_avr4}, | |
158 | {"at90pwm2", AVR_ISA_AVR4, bfd_mach_avr4}, | |
159 | {"at90pwm2b", AVR_ISA_AVR4, bfd_mach_avr4}, | |
160 | {"at90pwm3", AVR_ISA_AVR4, bfd_mach_avr4}, | |
161 | {"at90pwm3b", AVR_ISA_AVR4, bfd_mach_avr4}, | |
2b02f87c | 162 | {"at90pwm81", AVR_ISA_AVR4, bfd_mach_avr4}, |
7b21ac3f | 163 | {"atmega16", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 164 | {"atmega16a", AVR_ISA_AVR5, bfd_mach_avr5}, |
28c9d252 | 165 | {"atmega161", AVR_ISA_M161, bfd_mach_avr5}, |
7b21ac3f | 166 | {"atmega162", AVR_ISA_AVR5, bfd_mach_avr5}, |
28c9d252 | 167 | {"atmega163", AVR_ISA_M161, bfd_mach_avr5}, |
e760a81b | 168 | {"atmega164a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
169 | {"atmega164p", AVR_ISA_AVR5, bfd_mach_avr5}, |
170 | {"atmega165", AVR_ISA_AVR5, bfd_mach_avr5}, | |
e760a81b | 171 | {"atmega165a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
172 | {"atmega165p", AVR_ISA_AVR5, bfd_mach_avr5}, |
173 | {"atmega168", AVR_ISA_AVR5, bfd_mach_avr5}, | |
e760a81b | 174 | {"atmega168a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
175 | {"atmega168p", AVR_ISA_AVR5, bfd_mach_avr5}, |
176 | {"atmega169", AVR_ISA_AVR5, bfd_mach_avr5}, | |
e760a81b | 177 | {"atmega169a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 178 | {"atmega169p", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 179 | {"atmega169pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
180 | {"atmega32", AVR_ISA_AVR5, bfd_mach_avr5}, |
181 | {"atmega323", AVR_ISA_AVR5, bfd_mach_avr5}, | |
e760a81b | 182 | {"atmega324a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 183 | {"atmega324p", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 184 | {"atmega324pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 185 | {"atmega325", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 186 | {"atmega325a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 187 | {"atmega325p", AVR_ISA_AVR5, bfd_mach_avr5}, |
b8c610a7 | 188 | {"atmega325pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 189 | {"atmega3250", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 190 | {"atmega3250a",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 191 | {"atmega3250p",AVR_ISA_AVR5, bfd_mach_avr5}, |
b8c610a7 | 192 | {"atmega3250pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 193 | {"atmega328", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
194 | {"atmega328p", AVR_ISA_AVR5, bfd_mach_avr5}, |
195 | {"atmega329", AVR_ISA_AVR5, bfd_mach_avr5}, | |
e760a81b | 196 | {"atmega329a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 197 | {"atmega329p", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 198 | {"atmega329pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 199 | {"atmega3290", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 200 | {"atmega3290a",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 201 | {"atmega3290p",AVR_ISA_AVR5, bfd_mach_avr5}, |
b8c610a7 | 202 | {"atmega3290pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
203 | {"atmega406", AVR_ISA_AVR5, bfd_mach_avr5}, |
204 | {"atmega64", AVR_ISA_AVR5, bfd_mach_avr5}, | |
205 | {"atmega640", AVR_ISA_AVR5, bfd_mach_avr5}, | |
206 | {"atmega644", AVR_ISA_AVR5, bfd_mach_avr5}, | |
e760a81b | 207 | {"atmega644a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 208 | {"atmega644p", AVR_ISA_AVR5, bfd_mach_avr5}, |
8453da2e | 209 | {"atmega644pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 210 | {"atmega645", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b EW |
211 | {"atmega645a", AVR_ISA_AVR5, bfd_mach_avr5}, |
212 | {"atmega645p", AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 213 | {"atmega649", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b EW |
214 | {"atmega649a", AVR_ISA_AVR5, bfd_mach_avr5}, |
215 | {"atmega649p", AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 216 | {"atmega6450", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b EW |
217 | {"atmega6450a",AVR_ISA_AVR5, bfd_mach_avr5}, |
218 | {"atmega6450p",AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 219 | {"atmega6490", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b EW |
220 | {"atmega6490a",AVR_ISA_AVR5, bfd_mach_avr5}, |
221 | {"atmega6490p",AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 222 | {"atmega16hva",AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 223 | {"atmega16hva2",AVR_ISA_AVR5, bfd_mach_avr5}, |
2b02f87c | 224 | {"atmega16hvb",AVR_ISA_AVR5, bfd_mach_avr5}, |
b8c610a7 | 225 | {"atmega16hvbrevb",AVR_ISA_AVR5,bfd_mach_avr5}, |
2b02f87c | 226 | {"atmega32hvb",AVR_ISA_AVR5, bfd_mach_avr5}, |
b8c610a7 | 227 | {"atmega32hvbrevb",AVR_ISA_AVR5,bfd_mach_avr5}, |
e760a81b | 228 | {"atmega64hve",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
229 | {"at90can32" , AVR_ISA_AVR5, bfd_mach_avr5}, |
230 | {"at90can64" , AVR_ISA_AVR5, bfd_mach_avr5}, | |
b8c610a7 | 231 | {"at90pwm161", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
232 | {"at90pwm216", AVR_ISA_AVR5, bfd_mach_avr5}, |
233 | {"at90pwm316", AVR_ISA_AVR5, bfd_mach_avr5}, | |
234 | {"atmega32c1", AVR_ISA_AVR5, bfd_mach_avr5}, | |
2b02f87c NC |
235 | {"atmega64c1", AVR_ISA_AVR5, bfd_mach_avr5}, |
236 | {"atmega16m1", AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 237 | {"atmega32m1", AVR_ISA_AVR5, bfd_mach_avr5}, |
2b02f87c NC |
238 | {"atmega64m1", AVR_ISA_AVR5, bfd_mach_avr5}, |
239 | {"atmega16u4", AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 240 | {"atmega32u4", AVR_ISA_AVR5, bfd_mach_avr5}, |
2b02f87c | 241 | {"atmega32u6", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
242 | {"at90usb646", AVR_ISA_AVR5, bfd_mach_avr5}, |
243 | {"at90usb647", AVR_ISA_AVR5, bfd_mach_avr5}, | |
2b02f87c | 244 | {"at90scr100", AVR_ISA_AVR5, bfd_mach_avr5}, |
28c9d252 | 245 | {"at94k", AVR_ISA_94K, bfd_mach_avr5}, |
e760a81b | 246 | {"m3000", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
247 | {"atmega128", AVR_ISA_AVR51, bfd_mach_avr51}, |
248 | {"atmega1280", AVR_ISA_AVR51, bfd_mach_avr51}, | |
249 | {"atmega1281", AVR_ISA_AVR51, bfd_mach_avr51}, | |
250 | {"atmega1284p",AVR_ISA_AVR51, bfd_mach_avr51}, | |
17f4880d | 251 | {"atmega128rfa1",AVR_ISA_AVR51, bfd_mach_avr51}, |
7b21ac3f EW |
252 | {"at90can128", AVR_ISA_AVR51, bfd_mach_avr51}, |
253 | {"at90usb1286",AVR_ISA_AVR51, bfd_mach_avr51}, | |
254 | {"at90usb1287",AVR_ISA_AVR51, bfd_mach_avr51}, | |
255 | {"atmega2560", AVR_ISA_AVR6, bfd_mach_avr6}, | |
256 | {"atmega2561", AVR_ISA_AVR6, bfd_mach_avr6}, | |
8cc66334 EW |
257 | {"atxmega16a4", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, |
258 | {"atxmega16d4", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, | |
6f8a4444 | 259 | {"atxmega16x1", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, |
8cc66334 EW |
260 | {"atxmega32a4", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, |
261 | {"atxmega32d4", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, | |
6f8a4444 | 262 | {"atxmega32x1", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, |
8cc66334 EW |
263 | {"atxmega64a3", AVR_ISA_XMEGA, bfd_mach_avrxmega4}, |
264 | {"atxmega64d3", AVR_ISA_XMEGA, bfd_mach_avrxmega4}, | |
265 | {"atxmega64a1", AVR_ISA_XMEGA, bfd_mach_avrxmega5}, | |
6f8a4444 | 266 | {"atxmega64a1u",AVR_ISA_XMEGA, bfd_mach_avrxmega5}, |
8cc66334 | 267 | {"atxmega128a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, |
6f8a4444 | 268 | {"atxmega128b1", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, |
8cc66334 EW |
269 | {"atxmega128d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, |
270 | {"atxmega192a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, | |
271 | {"atxmega192d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, | |
272 | {"atxmega256a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, | |
273 | {"atxmega256a3b",AVR_ISA_XMEGA, bfd_mach_avrxmega6}, | |
6f8a4444 | 274 | {"atxmega256a3bu",AVR_ISA_XMEGA,bfd_mach_avrxmega6}, |
8cc66334 EW |
275 | {"atxmega256d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, |
276 | {"atxmega128a1", AVR_ISA_XMEGA, bfd_mach_avrxmega7}, | |
6f8a4444 | 277 | {"atxmega128a1u", AVR_ISA_XMEGA, bfd_mach_avrxmega7}, |
adde6300 AM |
278 | {NULL, 0, 0} |
279 | }; | |
280 | ||
adde6300 | 281 | /* Current MCU type. */ |
7b21ac3f | 282 | static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_AVR2, bfd_mach_avr2}; |
dc191a8f | 283 | static struct mcu_type_s * avr_mcu = & default_mcu; |
adde6300 | 284 | |
00d2865b NC |
285 | /* AVR target-specific switches. */ |
286 | struct avr_opt_s | |
287 | { | |
dc191a8f NC |
288 | int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes. */ |
289 | int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns. */ | |
290 | int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */ | |
00d2865b NC |
291 | }; |
292 | ||
293 | static struct avr_opt_s avr_opt = { 0, 0, 0 }; | |
294 | ||
adde6300 AM |
295 | const char EXP_CHARS[] = "eE"; |
296 | const char FLT_CHARS[] = "dD"; | |
dc191a8f NC |
297 | |
298 | static void avr_set_arch (int); | |
adde6300 AM |
299 | |
300 | /* The target specific pseudo-ops which we support. */ | |
301 | const pseudo_typeS md_pseudo_table[] = | |
302 | { | |
303 | {"arch", avr_set_arch, 0}, | |
304 | { NULL, NULL, 0} | |
305 | }; | |
306 | ||
307 | #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00)) | |
adde6300 | 308 | |
dc191a8f NC |
309 | #define EXP_MOD_NAME(i) exp_mod[i].name |
310 | #define EXP_MOD_RELOC(i) exp_mod[i].reloc | |
311 | #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc | |
312 | #define HAVE_PM_P(i) exp_mod[i].have_pm | |
adde6300 AM |
313 | |
314 | struct exp_mod_s | |
315 | { | |
dc191a8f NC |
316 | char * name; |
317 | bfd_reloc_code_real_type reloc; | |
318 | bfd_reloc_code_real_type neg_reloc; | |
319 | int have_pm; | |
adde6300 AM |
320 | }; |
321 | ||
c6a7ab1f NC |
322 | static struct exp_mod_s exp_mod[] = |
323 | { | |
adde6300 AM |
324 | {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1}, |
325 | {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0}, | |
326 | {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1}, | |
327 | {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0}, | |
328 | {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1}, | |
329 | {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0}, | |
df406460 | 330 | {"hlo8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 0}, |
e4efb665 | 331 | {"hhi8", BFD_RELOC_AVR_MS8_LDI, BFD_RELOC_AVR_MS8_LDI_NEG, 0}, |
adde6300 AM |
332 | }; |
333 | ||
8ad7c533 NC |
334 | /* A union used to store indicies into the exp_mod[] array |
335 | in a hash table which expects void * data types. */ | |
336 | typedef union | |
337 | { | |
338 | void * ptr; | |
339 | int index; | |
340 | } mod_index; | |
341 | ||
adde6300 AM |
342 | /* Opcode hash table. */ |
343 | static struct hash_control *avr_hash; | |
344 | ||
345 | /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */ | |
346 | static struct hash_control *avr_mod_hash; | |
347 | ||
00d2865b | 348 | #define OPTION_MMCU 'm' |
dc191a8f NC |
349 | enum options |
350 | { | |
351 | OPTION_ALL_OPCODES = OPTION_MD_BASE + 1, | |
352 | OPTION_NO_SKIP_BUG, | |
353 | OPTION_NO_WRAP | |
354 | }; | |
adde6300 | 355 | |
c6a7ab1f NC |
356 | struct option md_longopts[] = |
357 | { | |
00d2865b NC |
358 | { "mmcu", required_argument, NULL, OPTION_MMCU }, |
359 | { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES }, | |
360 | { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG }, | |
361 | { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP }, | |
362 | { NULL, no_argument, NULL, 0 } | |
adde6300 | 363 | }; |
adde6300 | 364 | |
c6a7ab1f | 365 | size_t md_longopts_size = sizeof (md_longopts); |
00d2865b NC |
366 | |
367 | /* Display nicely formatted list of known MCU names. */ | |
c6a7ab1f | 368 | |
00d2865b | 369 | static void |
dc191a8f | 370 | show_mcu_list (FILE *stream) |
00d2865b NC |
371 | { |
372 | int i, x; | |
373 | ||
374 | fprintf (stream, _("Known MCU names:")); | |
375 | x = 1000; | |
1dab94dd | 376 | |
00d2865b NC |
377 | for (i = 0; mcu_types[i].name; i++) |
378 | { | |
379 | int len = strlen (mcu_types[i].name); | |
1dab94dd | 380 | |
00d2865b | 381 | x += len + 1; |
1dab94dd | 382 | |
00d2865b | 383 | if (x < 75) |
c6a7ab1f | 384 | fprintf (stream, " %s", mcu_types[i].name); |
00d2865b NC |
385 | else |
386 | { | |
387 | fprintf (stream, "\n %s", mcu_types[i].name); | |
388 | x = len + 2; | |
389 | } | |
390 | } | |
1dab94dd | 391 | |
c6a7ab1f | 392 | fprintf (stream, "\n"); |
00d2865b NC |
393 | } |
394 | ||
adde6300 | 395 | static inline char * |
dc191a8f | 396 | skip_space (char *s) |
adde6300 AM |
397 | { |
398 | while (*s == ' ' || *s == '\t') | |
399 | ++s; | |
400 | return s; | |
401 | } | |
402 | ||
403 | /* Extract one word from FROM and copy it to TO. */ | |
c6a7ab1f | 404 | |
adde6300 AM |
405 | static char * |
406 | extract_word (char *from, char *to, int limit) | |
407 | { | |
adde6300 AM |
408 | char *op_end; |
409 | int size = 0; | |
410 | ||
411 | /* Drop leading whitespace. */ | |
412 | from = skip_space (from); | |
413 | *to = 0; | |
c6a7ab1f | 414 | |
adde6300 | 415 | /* Find the op code end. */ |
87975d2a | 416 | for (op_end = from; *op_end != 0 && is_part_of_name (*op_end);) |
adde6300 AM |
417 | { |
418 | to[size++] = *op_end++; | |
419 | if (size + 1 >= limit) | |
420 | break; | |
421 | } | |
1dab94dd | 422 | |
adde6300 AM |
423 | to[size] = 0; |
424 | return op_end; | |
425 | } | |
426 | ||
427 | int | |
dc191a8f NC |
428 | md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED, |
429 | asection *seg ATTRIBUTE_UNUSED) | |
adde6300 AM |
430 | { |
431 | abort (); | |
432 | return 0; | |
433 | } | |
434 | ||
435 | void | |
dc191a8f | 436 | md_show_usage (FILE *stream) |
adde6300 | 437 | { |
00d2865b | 438 | fprintf (stream, |
4fb8d1c6 | 439 | _("AVR Assembler options:\n" |
adde6300 AM |
440 | " -mmcu=[avr-name] select microcontroller variant\n" |
441 | " [avr-name] can be:\n" | |
7b21ac3f EW |
442 | " avr1 - classic AVR core without data RAM\n" |
443 | " avr2 - classic AVR core with up to 8K program memory\n" | |
444 | " avr25 - classic AVR core with up to 8K program memory\n" | |
445 | " plus the MOVW instruction\n" | |
446 | " avr3 - classic AVR core with up to 64K program memory\n" | |
447 | " avr31 - classic AVR core with up to 128K program memory\n" | |
448 | " avr35 - classic AVR core with up to 64K program memory\n" | |
449 | " plus the MOVW instruction\n" | |
450 | " avr4 - enhanced AVR core with up to 8K program memory\n" | |
451 | " avr5 - enhanced AVR core with up to 64K program memory\n" | |
452 | " avr51 - enhanced AVR core with up to 128K program memory\n" | |
453 | " avr6 - enhanced AVR core with up to 256K program memory\n" | |
8cc66334 EW |
454 | " avrxmega3 - XMEGA, > 8K, <= 64K FLASH, > 64K RAM\n" |
455 | " avrxmega4 - XMEGA, > 64K, <= 128K FLASH, <= 64K RAM\n" | |
456 | " avrxmega5 - XMEGA, > 64K, <= 128K FLASH, > 64K RAM\n" | |
457 | " avrxmega6 - XMEGA, > 128K, <= 256K FLASH, <= 64K RAM\n" | |
458 | " avrxmega7 - XMEGA, > 128K, <= 256K FLASH, > 64K RAM\n" | |
adde6300 | 459 | " or immediate microcontroller name.\n")); |
00d2865b NC |
460 | fprintf (stream, |
461 | _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n" | |
462 | " -mno-skip-bug disable warnings for skipping two-word instructions\n" | |
463 | " (default for avr4, avr5)\n" | |
464 | " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n" | |
465 | " (default for avr3, avr5)\n")); | |
466 | show_mcu_list (stream); | |
adde6300 AM |
467 | } |
468 | ||
469 | static void | |
dc191a8f | 470 | avr_set_arch (int dummy ATTRIBUTE_UNUSED) |
adde6300 | 471 | { |
dc191a8f | 472 | char str[20]; |
1dab94dd | 473 | |
adde6300 | 474 | input_line_pointer = extract_word (input_line_pointer, str, 20); |
00d2865b | 475 | md_parse_option (OPTION_MMCU, str); |
adde6300 AM |
476 | bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach); |
477 | } | |
478 | ||
479 | int | |
dc191a8f | 480 | md_parse_option (int c, char *arg) |
adde6300 | 481 | { |
00d2865b | 482 | switch (c) |
adde6300 | 483 | { |
00d2865b NC |
484 | case OPTION_MMCU: |
485 | { | |
486 | int i; | |
487 | char *s = alloca (strlen (arg) + 1); | |
adde6300 | 488 | |
00d2865b NC |
489 | { |
490 | char *t = s; | |
491 | char *arg1 = arg; | |
492 | ||
493 | do | |
3882b010 | 494 | *t = TOLOWER (*arg1++); |
00d2865b NC |
495 | while (*t++); |
496 | } | |
497 | ||
498 | for (i = 0; mcu_types[i].name; ++i) | |
499 | if (strcmp (mcu_types[i].name, s) == 0) | |
500 | break; | |
adde6300 | 501 | |
00d2865b NC |
502 | if (!mcu_types[i].name) |
503 | { | |
504 | show_mcu_list (stderr); | |
505 | as_fatal (_("unknown MCU: %s\n"), arg); | |
506 | } | |
65aa24b6 | 507 | |
00d2865b NC |
508 | /* It is OK to redefine mcu type within the same avr[1-5] bfd machine |
509 | type - this for allows passing -mmcu=... via gcc ASM_SPEC as well | |
510 | as .arch ... in the asm output at the same time. */ | |
00d2865b NC |
511 | if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach) |
512 | avr_mcu = &mcu_types[i]; | |
513 | else | |
514 | as_fatal (_("redefinition of mcu type `%s' to `%s'"), | |
515 | avr_mcu->name, mcu_types[i].name); | |
516 | return 1; | |
517 | } | |
518 | case OPTION_ALL_OPCODES: | |
519 | avr_opt.all_opcodes = 1; | |
520 | return 1; | |
521 | case OPTION_NO_SKIP_BUG: | |
522 | avr_opt.no_skip_bug = 1; | |
523 | return 1; | |
524 | case OPTION_NO_WRAP: | |
525 | avr_opt.no_wrap = 1; | |
adde6300 AM |
526 | return 1; |
527 | } | |
1dab94dd | 528 | |
adde6300 AM |
529 | return 0; |
530 | } | |
531 | ||
532 | symbolS * | |
dc191a8f | 533 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
adde6300 | 534 | { |
dc191a8f | 535 | return NULL; |
adde6300 AM |
536 | } |
537 | ||
adde6300 | 538 | char * |
dc191a8f | 539 | md_atof (int type, char *litP, int *sizeP) |
adde6300 | 540 | { |
499ac353 | 541 | return ieee_md_atof (type, litP, sizeP, FALSE); |
adde6300 AM |
542 | } |
543 | ||
544 | void | |
dc191a8f NC |
545 | md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, |
546 | asection *sec ATTRIBUTE_UNUSED, | |
547 | fragS *fragP ATTRIBUTE_UNUSED) | |
adde6300 AM |
548 | { |
549 | abort (); | |
550 | } | |
551 | ||
adde6300 | 552 | void |
dc191a8f | 553 | md_begin (void) |
adde6300 | 554 | { |
df136245 | 555 | unsigned int i; |
adde6300 | 556 | struct avr_opcodes_s *opcode; |
dc191a8f | 557 | |
c6a7ab1f | 558 | avr_hash = hash_new (); |
adde6300 AM |
559 | |
560 | /* Insert unique names into hash table. This hash table then provides a | |
561 | quick index to the first opcode with a particular name in the opcode | |
562 | table. */ | |
adde6300 AM |
563 | for (opcode = avr_opcodes; opcode->name; opcode++) |
564 | hash_insert (avr_hash, opcode->name, (char *) opcode); | |
565 | ||
566 | avr_mod_hash = hash_new (); | |
567 | ||
dc191a8f | 568 | for (i = 0; i < ARRAY_SIZE (exp_mod); ++i) |
8ad7c533 NC |
569 | { |
570 | mod_index m; | |
571 | ||
572 | m.index = i + 10; | |
573 | hash_insert (avr_mod_hash, EXP_MOD_NAME (i), m.ptr); | |
574 | } | |
c6a7ab1f | 575 | |
adde6300 AM |
576 | bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach); |
577 | } | |
578 | ||
df136245 | 579 | /* Resolve STR as a constant expression and return the result. |
c6a7ab1f | 580 | If result greater than MAX then error. */ |
df136245 DC |
581 | |
582 | static unsigned int | |
dc191a8f | 583 | avr_get_constant (char *str, int max) |
df136245 DC |
584 | { |
585 | expressionS ex; | |
dc191a8f | 586 | |
df136245 DC |
587 | str = skip_space (str); |
588 | input_line_pointer = str; | |
dc191a8f | 589 | expression (& ex); |
df136245 DC |
590 | |
591 | if (ex.X_op != O_constant) | |
592 | as_bad (_("constant value required")); | |
593 | ||
594 | if (ex.X_add_number > max || ex.X_add_number < 0) | |
73f4d86e | 595 | as_bad (_("number must be positive and less than %d"), max + 1); |
1dab94dd | 596 | |
df136245 DC |
597 | return ex.X_add_number; |
598 | } | |
599 | ||
dc191a8f | 600 | /* Parse for ldd/std offset. */ |
df136245 | 601 | |
dc191a8f NC |
602 | static void |
603 | avr_offset_expression (expressionS *exp) | |
adde6300 | 604 | { |
dc191a8f NC |
605 | char *str = input_line_pointer; |
606 | char *tmp; | |
607 | char op[8]; | |
adde6300 | 608 | |
dc191a8f NC |
609 | tmp = str; |
610 | str = extract_word (str, op, sizeof (op)); | |
611 | ||
612 | input_line_pointer = tmp; | |
613 | expression (exp); | |
614 | ||
615 | /* Warn about expressions that fail to use lo8 (). */ | |
616 | if (exp->X_op == O_constant) | |
adde6300 | 617 | { |
dc191a8f | 618 | int x = exp->X_add_number; |
28c9d252 | 619 | |
dc191a8f NC |
620 | if (x < -255 || x > 255) |
621 | as_warn (_("constant out of 8-bit range: %d"), x); | |
622 | } | |
623 | } | |
adde6300 | 624 | |
dc191a8f | 625 | /* Parse ordinary expression. */ |
adde6300 | 626 | |
dc191a8f NC |
627 | static char * |
628 | parse_exp (char *s, expressionS *op) | |
629 | { | |
630 | input_line_pointer = s; | |
631 | expression (op); | |
632 | if (op->X_op == O_absent) | |
633 | as_bad (_("missing operand")); | |
634 | return input_line_pointer; | |
635 | } | |
1dab94dd | 636 | |
dc191a8f NC |
637 | /* Parse special expressions (needed for LDI command): |
638 | xx8 (address) | |
639 | xx8 (-address) | |
640 | pm_xx8 (address) | |
641 | pm_xx8 (-address) | |
642 | where xx is: hh, hi, lo. */ | |
adde6300 | 643 | |
dc191a8f NC |
644 | static bfd_reloc_code_real_type |
645 | avr_ldi_expression (expressionS *exp) | |
646 | { | |
647 | char *str = input_line_pointer; | |
648 | char *tmp; | |
649 | char op[8]; | |
650 | int mod; | |
28c9d252 NC |
651 | int linker_stubs_should_be_generated = 0; |
652 | ||
dc191a8f | 653 | tmp = str; |
adde6300 | 654 | |
dc191a8f | 655 | str = extract_word (str, op, sizeof (op)); |
adde6300 | 656 | |
dc191a8f NC |
657 | if (op[0]) |
658 | { | |
8ad7c533 | 659 | mod_index m; |
28c9d252 | 660 | |
8ad7c533 NC |
661 | m.ptr = hash_find (avr_mod_hash, op); |
662 | mod = m.index; | |
1dab94dd | 663 | |
dc191a8f NC |
664 | if (mod) |
665 | { | |
666 | int closes = 0; | |
b170af93 | 667 | |
dc191a8f NC |
668 | mod -= 10; |
669 | str = skip_space (str); | |
00d2865b | 670 | |
dc191a8f NC |
671 | if (*str == '(') |
672 | { | |
28c9d252 | 673 | bfd_reloc_code_real_type reloc_to_return; |
dc191a8f | 674 | int neg_p = 0; |
00d2865b | 675 | |
dc191a8f | 676 | ++str; |
00d2865b | 677 | |
dc191a8f | 678 | if (strncmp ("pm(", str, 3) == 0 |
28c9d252 NC |
679 | || strncmp ("gs(",str,3) == 0 |
680 | || strncmp ("-(gs(",str,5) == 0 | |
dc191a8f NC |
681 | || strncmp ("-(pm(", str, 5) == 0) |
682 | { | |
683 | if (HAVE_PM_P (mod)) | |
684 | { | |
685 | ++mod; | |
686 | ++closes; | |
687 | } | |
688 | else | |
689 | as_bad (_("illegal expression")); | |
b170af93 | 690 | |
28c9d252 NC |
691 | if (str[0] == 'g' || str[2] == 'g') |
692 | linker_stubs_should_be_generated = 1; | |
693 | ||
dc191a8f NC |
694 | if (*str == '-') |
695 | { | |
696 | neg_p = 1; | |
697 | ++closes; | |
698 | str += 5; | |
699 | } | |
700 | else | |
701 | str += 3; | |
702 | } | |
adde6300 | 703 | |
dc191a8f NC |
704 | if (*str == '-' && *(str + 1) == '(') |
705 | { | |
706 | neg_p ^= 1; | |
707 | ++closes; | |
708 | str += 2; | |
709 | } | |
750bce0e | 710 | |
dc191a8f NC |
711 | input_line_pointer = str; |
712 | expression (exp); | |
750bce0e | 713 | |
dc191a8f NC |
714 | do |
715 | { | |
716 | if (*input_line_pointer != ')') | |
717 | { | |
718 | as_bad (_("`)' required")); | |
719 | break; | |
720 | } | |
721 | input_line_pointer++; | |
722 | } | |
723 | while (closes--); | |
724 | ||
28c9d252 NC |
725 | reloc_to_return = |
726 | neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod); | |
727 | if (linker_stubs_should_be_generated) | |
728 | { | |
729 | switch (reloc_to_return) | |
730 | { | |
731 | case BFD_RELOC_AVR_LO8_LDI_PM: | |
732 | reloc_to_return = BFD_RELOC_AVR_LO8_LDI_GS; | |
733 | break; | |
734 | case BFD_RELOC_AVR_HI8_LDI_PM: | |
735 | reloc_to_return = BFD_RELOC_AVR_HI8_LDI_GS; | |
736 | break; | |
737 | ||
738 | default: | |
0a903bab NC |
739 | /* PR 5523: Do not generate a warning here, |
740 | legitimate code can trigger this case. */ | |
741 | break; | |
28c9d252 NC |
742 | } |
743 | } | |
744 | return reloc_to_return; | |
dc191a8f NC |
745 | } |
746 | } | |
747 | } | |
750bce0e NC |
748 | |
749 | input_line_pointer = tmp; | |
750 | expression (exp); | |
751 | ||
752 | /* Warn about expressions that fail to use lo8 (). */ | |
753 | if (exp->X_op == O_constant) | |
754 | { | |
755 | int x = exp->X_add_number; | |
dc191a8f | 756 | |
750bce0e NC |
757 | if (x < -255 || x > 255) |
758 | as_warn (_("constant out of 8-bit range: %d"), x); | |
759 | } | |
dc191a8f NC |
760 | |
761 | return BFD_RELOC_AVR_LDI; | |
750bce0e NC |
762 | } |
763 | ||
df136245 | 764 | /* Parse one instruction operand. |
c6a7ab1f NC |
765 | Return operand bitmask. Also fixups can be generated. */ |
766 | ||
adde6300 | 767 | static unsigned int |
dc191a8f NC |
768 | avr_operand (struct avr_opcodes_s *opcode, |
769 | int where, | |
770 | char *op, | |
771 | char **line) | |
adde6300 | 772 | { |
adde6300 | 773 | expressionS op_expr; |
df136245 DC |
774 | unsigned int op_mask = 0; |
775 | char *str = skip_space (*line); | |
adde6300 | 776 | |
adde6300 AM |
777 | switch (*op) |
778 | { | |
779 | /* Any register operand. */ | |
780 | case 'w': | |
781 | case 'd': | |
782 | case 'r': | |
b170af93 DC |
783 | case 'a': |
784 | case 'v': | |
c6a7ab1f NC |
785 | if (*str == 'r' || *str == 'R') |
786 | { | |
787 | char r_name[20]; | |
1dab94dd | 788 | |
c6a7ab1f | 789 | str = extract_word (str, r_name, sizeof (r_name)); |
65b1d096 | 790 | op_mask = 0xff; |
3882b010 | 791 | if (ISDIGIT (r_name[1])) |
c6a7ab1f NC |
792 | { |
793 | if (r_name[2] == '\0') | |
794 | op_mask = r_name[1] - '0'; | |
795 | else if (r_name[1] != '0' | |
3882b010 | 796 | && ISDIGIT (r_name[2]) |
c6a7ab1f NC |
797 | && r_name[3] == '\0') |
798 | op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0'; | |
799 | } | |
800 | } | |
801 | else | |
802 | { | |
803 | op_mask = avr_get_constant (str, 31); | |
804 | str = input_line_pointer; | |
805 | } | |
1dab94dd | 806 | |
c6a7ab1f NC |
807 | if (op_mask <= 31) |
808 | { | |
809 | switch (*op) | |
810 | { | |
811 | case 'a': | |
812 | if (op_mask < 16 || op_mask > 23) | |
813 | as_bad (_("register r16-r23 required")); | |
814 | op_mask -= 16; | |
815 | break; | |
1dab94dd | 816 | |
c6a7ab1f NC |
817 | case 'd': |
818 | if (op_mask < 16) | |
819 | as_bad (_("register number above 15 required")); | |
820 | op_mask -= 16; | |
821 | break; | |
1dab94dd | 822 | |
c6a7ab1f NC |
823 | case 'v': |
824 | if (op_mask & 1) | |
825 | as_bad (_("even register number required")); | |
826 | op_mask >>= 1; | |
827 | break; | |
1dab94dd | 828 | |
c6a7ab1f | 829 | case 'w': |
65b1d096 | 830 | if ((op_mask & 1) || op_mask < 24) |
c6a7ab1f | 831 | as_bad (_("register r24, r26, r28 or r30 required")); |
65b1d096 | 832 | op_mask = (op_mask - 24) >> 1; |
c6a7ab1f NC |
833 | break; |
834 | } | |
835 | break; | |
836 | } | |
837 | as_bad (_("register name or number from 0 to 31 required")); | |
adde6300 AM |
838 | break; |
839 | ||
840 | case 'e': | |
841 | { | |
842 | char c; | |
1dab94dd | 843 | |
adde6300 AM |
844 | if (*str == '-') |
845 | { | |
c6a7ab1f | 846 | str = skip_space (str + 1); |
adde6300 AM |
847 | op_mask = 0x1002; |
848 | } | |
3882b010 | 849 | c = TOLOWER (*str); |
adde6300 AM |
850 | if (c == 'x') |
851 | op_mask |= 0x100c; | |
852 | else if (c == 'y') | |
853 | op_mask |= 0x8; | |
854 | else if (c != 'z') | |
00d2865b | 855 | as_bad (_("pointer register (X, Y or Z) required")); |
adde6300 | 856 | |
c6a7ab1f | 857 | str = skip_space (str + 1); |
adde6300 AM |
858 | if (*str == '+') |
859 | { | |
860 | ++str; | |
861 | if (op_mask & 2) | |
00d2865b | 862 | as_bad (_("cannot both predecrement and postincrement")); |
adde6300 AM |
863 | op_mask |= 0x1001; |
864 | } | |
e38c9cc2 | 865 | |
1188e082 | 866 | /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer |
e38c9cc2 | 867 | registers, no predecrement, no postincrement. */ |
00d2865b NC |
868 | if (!avr_opt.all_opcodes && (op_mask & 0x100F) |
869 | && !(avr_mcu->isa & AVR_ISA_SRAM)) | |
870 | as_bad (_("addressing mode not supported")); | |
adde6300 AM |
871 | } |
872 | break; | |
873 | ||
b170af93 | 874 | case 'z': |
c6a7ab1f NC |
875 | if (*str == '-') |
876 | as_bad (_("can't predecrement")); | |
1dab94dd | 877 | |
c6a7ab1f NC |
878 | if (! (*str == 'z' || *str == 'Z')) |
879 | as_bad (_("pointer register Z required")); | |
1dab94dd | 880 | |
c6a7ab1f NC |
881 | str = skip_space (str + 1); |
882 | ||
883 | if (*str == '+') | |
884 | { | |
885 | ++str; | |
8cc66334 EW |
886 | char *s; |
887 | for (s = opcode->opcode; *s; ++s) | |
888 | { | |
889 | if (*s == '+') | |
890 | op_mask |= (1 << (15 - (s - opcode->opcode))); | |
891 | } | |
c6a7ab1f | 892 | } |
d669d37f NC |
893 | |
894 | /* attiny26 can do "lpm" and "lpm r,Z" but not "lpm r,Z+". */ | |
895 | if (!avr_opt.all_opcodes | |
896 | && (op_mask & 0x0001) | |
897 | && !(avr_mcu->isa & AVR_ISA_MOVW)) | |
898 | as_bad (_("postincrement not supported")); | |
b170af93 DC |
899 | break; |
900 | ||
adde6300 AM |
901 | case 'b': |
902 | { | |
3882b010 | 903 | char c = TOLOWER (*str++); |
1dab94dd | 904 | |
adde6300 AM |
905 | if (c == 'y') |
906 | op_mask |= 0x8; | |
907 | else if (c != 'z') | |
00d2865b | 908 | as_bad (_("pointer register (Y or Z) required")); |
adde6300 AM |
909 | str = skip_space (str); |
910 | if (*str++ == '+') | |
911 | { | |
750bce0e NC |
912 | input_line_pointer = str; |
913 | avr_offset_expression (& op_expr); | |
adde6300 | 914 | str = input_line_pointer; |
750bce0e NC |
915 | fix_new_exp (frag_now, where, 3, |
916 | &op_expr, FALSE, BFD_RELOC_AVR_6); | |
adde6300 AM |
917 | } |
918 | } | |
919 | break; | |
920 | ||
921 | case 'h': | |
c6a7ab1f NC |
922 | str = parse_exp (str, &op_expr); |
923 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
b34976b6 | 924 | &op_expr, FALSE, BFD_RELOC_AVR_CALL); |
adde6300 AM |
925 | break; |
926 | ||
927 | case 'L': | |
c6a7ab1f NC |
928 | str = parse_exp (str, &op_expr); |
929 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
b34976b6 | 930 | &op_expr, TRUE, BFD_RELOC_AVR_13_PCREL); |
adde6300 AM |
931 | break; |
932 | ||
933 | case 'l': | |
c6a7ab1f NC |
934 | str = parse_exp (str, &op_expr); |
935 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
b34976b6 | 936 | &op_expr, TRUE, BFD_RELOC_AVR_7_PCREL); |
adde6300 AM |
937 | break; |
938 | ||
939 | case 'i': | |
c6a7ab1f NC |
940 | str = parse_exp (str, &op_expr); |
941 | fix_new_exp (frag_now, where + 2, opcode->insn_size * 2, | |
b34976b6 | 942 | &op_expr, FALSE, BFD_RELOC_16); |
adde6300 AM |
943 | break; |
944 | ||
945 | case 'M': | |
946 | { | |
947 | bfd_reloc_code_real_type r_type; | |
1dab94dd | 948 | |
c6a7ab1f NC |
949 | input_line_pointer = str; |
950 | r_type = avr_ldi_expression (&op_expr); | |
951 | str = input_line_pointer; | |
adde6300 | 952 | fix_new_exp (frag_now, where, 3, |
b34976b6 | 953 | &op_expr, FALSE, r_type); |
adde6300 AM |
954 | } |
955 | break; | |
956 | ||
957 | case 'n': | |
958 | { | |
959 | unsigned int x; | |
1dab94dd | 960 | |
adde6300 AM |
961 | x = ~avr_get_constant (str, 255); |
962 | str = input_line_pointer; | |
963 | op_mask |= (x & 0xf) | ((x << 4) & 0xf00); | |
964 | } | |
965 | break; | |
966 | ||
967 | case 'K': | |
750bce0e NC |
968 | input_line_pointer = str; |
969 | avr_offset_expression (& op_expr); | |
970 | str = input_line_pointer; | |
971 | fix_new_exp (frag_now, where, 3, | |
972 | & op_expr, FALSE, BFD_RELOC_AVR_6_ADIW); | |
adde6300 AM |
973 | break; |
974 | ||
975 | case 'S': | |
976 | case 's': | |
977 | { | |
978 | unsigned int x; | |
1dab94dd | 979 | |
adde6300 AM |
980 | x = avr_get_constant (str, 7); |
981 | str = input_line_pointer; | |
982 | if (*op == 'S') | |
983 | x <<= 4; | |
984 | op_mask |= x; | |
985 | } | |
986 | break; | |
987 | ||
988 | case 'P': | |
989 | { | |
990 | unsigned int x; | |
1dab94dd | 991 | |
adde6300 AM |
992 | x = avr_get_constant (str, 63); |
993 | str = input_line_pointer; | |
994 | op_mask |= (x & 0xf) | ((x & 0x30) << 5); | |
995 | } | |
996 | break; | |
997 | ||
998 | case 'p': | |
999 | { | |
1000 | unsigned int x; | |
1dab94dd | 1001 | |
adde6300 AM |
1002 | x = avr_get_constant (str, 31); |
1003 | str = input_line_pointer; | |
1004 | op_mask |= x << 3; | |
1005 | } | |
1006 | break; | |
1dab94dd | 1007 | |
8cc66334 EW |
1008 | case 'E': |
1009 | { | |
1010 | unsigned int x; | |
1011 | ||
1012 | x = avr_get_constant (str, 15); | |
1013 | str = input_line_pointer; | |
1014 | op_mask |= (x << 4); | |
1015 | } | |
1016 | break; | |
99700d6f | 1017 | |
1188e082 DC |
1018 | case '?': |
1019 | break; | |
1dab94dd | 1020 | |
adde6300 | 1021 | default: |
00d2865b | 1022 | as_bad (_("unknown constraint `%c'"), *op); |
adde6300 | 1023 | } |
1dab94dd | 1024 | |
adde6300 AM |
1025 | *line = str; |
1026 | return op_mask; | |
1027 | } | |
1028 | ||
dc191a8f NC |
1029 | /* Parse instruction operands. |
1030 | Return binary opcode. */ | |
1031 | ||
1032 | static unsigned int | |
1033 | avr_operands (struct avr_opcodes_s *opcode, char **line) | |
1034 | { | |
1035 | char *op = opcode->constraints; | |
1036 | unsigned int bin = opcode->bin_opcode; | |
1037 | char *frag = frag_more (opcode->insn_size * 2); | |
1038 | char *str = *line; | |
1039 | int where = frag - frag_now->fr_literal; | |
1040 | static unsigned int prev = 0; /* Previous opcode. */ | |
1041 | ||
1042 | /* Opcode have operands. */ | |
1043 | if (*op) | |
1044 | { | |
1045 | unsigned int reg1 = 0; | |
1046 | unsigned int reg2 = 0; | |
1047 | int reg1_present = 0; | |
1048 | int reg2_present = 0; | |
1049 | ||
1050 | /* Parse first operand. */ | |
1051 | if (REGISTER_P (*op)) | |
1052 | reg1_present = 1; | |
1053 | reg1 = avr_operand (opcode, where, op, &str); | |
1054 | ++op; | |
1055 | ||
1056 | /* Parse second operand. */ | |
1057 | if (*op) | |
1058 | { | |
1059 | if (*op == ',') | |
1060 | ++op; | |
1061 | ||
1062 | if (*op == '=') | |
1063 | { | |
1064 | reg2 = reg1; | |
1065 | reg2_present = 1; | |
1066 | } | |
1067 | else | |
1068 | { | |
1069 | if (REGISTER_P (*op)) | |
1070 | reg2_present = 1; | |
1071 | ||
1072 | str = skip_space (str); | |
1073 | if (*str++ != ',') | |
1074 | as_bad (_("`,' required")); | |
1075 | str = skip_space (str); | |
1076 | ||
1077 | reg2 = avr_operand (opcode, where, op, &str); | |
1078 | } | |
1079 | ||
1080 | if (reg1_present && reg2_present) | |
1081 | reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200); | |
1082 | else if (reg2_present) | |
1083 | reg2 <<= 4; | |
1084 | } | |
1085 | if (reg1_present) | |
1086 | reg1 <<= 4; | |
1087 | bin |= reg1 | reg2; | |
1088 | } | |
1089 | ||
1090 | /* Detect undefined combinations (like ld r31,Z+). */ | |
1091 | if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin)) | |
1092 | as_warn (_("undefined combination of operands")); | |
1093 | ||
1094 | if (opcode->insn_size == 2) | |
1095 | { | |
1096 | /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs | |
1097 | (AVR core bug, fixed in the newer devices). */ | |
1098 | if (!(avr_opt.no_skip_bug || | |
1099 | (avr_mcu->isa & (AVR_ISA_MUL | AVR_ISA_MOVW))) | |
1100 | && AVR_SKIP_P (prev)) | |
1101 | as_warn (_("skipping two-word instruction")); | |
1102 | ||
1103 | bfd_putl32 ((bfd_vma) bin, frag); | |
1104 | } | |
1105 | else | |
1106 | bfd_putl16 ((bfd_vma) bin, frag); | |
1107 | ||
1108 | prev = bin; | |
1109 | *line = str; | |
1110 | return bin; | |
1111 | } | |
1112 | ||
adde6300 AM |
1113 | /* GAS will call this function for each section at the end of the assembly, |
1114 | to permit the CPU backend to adjust the alignment of a section. */ | |
c6a7ab1f | 1115 | |
adde6300 | 1116 | valueT |
dc191a8f | 1117 | md_section_align (asection *seg, valueT addr) |
adde6300 AM |
1118 | { |
1119 | int align = bfd_get_section_alignment (stdoutput, seg); | |
1120 | return ((addr + (1 << align) - 1) & (-1 << align)); | |
1121 | } | |
1122 | ||
1123 | /* If you define this macro, it should return the offset between the | |
1124 | address of a PC relative fixup and the position from which the PC | |
1125 | relative adjustment should be made. On many processors, the base | |
1126 | of a PC relative instruction is the next instruction, so this | |
1127 | macro would return the length of an instruction. */ | |
c6a7ab1f | 1128 | |
adde6300 | 1129 | long |
dc191a8f | 1130 | md_pcrel_from_section (fixS *fixp, segT sec) |
adde6300 | 1131 | { |
c6a7ab1f | 1132 | if (fixp->fx_addsy != (symbolS *) NULL |
adde6300 AM |
1133 | && (!S_IS_DEFINED (fixp->fx_addsy) |
1134 | || (S_GET_SEGMENT (fixp->fx_addsy) != sec))) | |
1135 | return 0; | |
1dab94dd | 1136 | |
adde6300 AM |
1137 | return fixp->fx_frag->fr_address + fixp->fx_where; |
1138 | } | |
1139 | ||
1140 | /* GAS will call this for each fixup. It should store the correct | |
c6a7ab1f NC |
1141 | value in the object file. */ |
1142 | ||
94f592af | 1143 | void |
dc191a8f | 1144 | md_apply_fix (fixS *fixP, valueT * valP, segT seg) |
adde6300 AM |
1145 | { |
1146 | unsigned char *where; | |
1147 | unsigned long insn; | |
a161fe53 | 1148 | long value = *valP; |
adde6300 | 1149 | |
94f592af NC |
1150 | if (fixP->fx_addsy == (symbolS *) NULL) |
1151 | fixP->fx_done = 1; | |
1152 | ||
87733541 AM |
1153 | else if (fixP->fx_pcrel) |
1154 | { | |
1155 | segT s = S_GET_SEGMENT (fixP->fx_addsy); | |
1156 | ||
1157 | if (s == seg || s == absolute_section) | |
1158 | { | |
1159 | value += S_GET_VALUE (fixP->fx_addsy); | |
1160 | fixP->fx_done = 1; | |
1161 | } | |
1162 | } | |
1163 | ||
a161fe53 AM |
1164 | /* We don't actually support subtracting a symbol. */ |
1165 | if (fixP->fx_subsy != (symbolS *) NULL) | |
1166 | as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex")); | |
1dab94dd | 1167 | |
94f592af | 1168 | switch (fixP->fx_r_type) |
adde6300 AM |
1169 | { |
1170 | default: | |
94f592af | 1171 | fixP->fx_no_overflow = 1; |
adde6300 AM |
1172 | break; |
1173 | case BFD_RELOC_AVR_7_PCREL: | |
1174 | case BFD_RELOC_AVR_13_PCREL: | |
1175 | case BFD_RELOC_32: | |
1176 | case BFD_RELOC_16: | |
1177 | case BFD_RELOC_AVR_CALL: | |
1178 | break; | |
1179 | } | |
1180 | ||
94f592af | 1181 | if (fixP->fx_done) |
adde6300 AM |
1182 | { |
1183 | /* Fetch the instruction, insert the fully resolved operand | |
1184 | value, and stuff the instruction back again. */ | |
2132e3a3 | 1185 | where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where; |
adde6300 AM |
1186 | insn = bfd_getl16 (where); |
1187 | ||
94f592af | 1188 | switch (fixP->fx_r_type) |
adde6300 AM |
1189 | { |
1190 | case BFD_RELOC_AVR_7_PCREL: | |
1191 | if (value & 1) | |
94f592af | 1192 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 1193 | _("odd address operand: %ld"), value); |
1dab94dd | 1194 | |
adde6300 AM |
1195 | /* Instruction addresses are always right-shifted by 1. */ |
1196 | value >>= 1; | |
1197 | --value; /* Correct PC. */ | |
1dab94dd | 1198 | |
adde6300 | 1199 | if (value < -64 || value > 63) |
94f592af | 1200 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
1201 | _("operand out of range: %ld"), value); |
1202 | value = (value << 3) & 0x3f8; | |
1203 | bfd_putl16 ((bfd_vma) (value | insn), where); | |
1204 | break; | |
1205 | ||
1206 | case BFD_RELOC_AVR_13_PCREL: | |
1207 | if (value & 1) | |
94f592af | 1208 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 1209 | _("odd address operand: %ld"), value); |
1dab94dd | 1210 | |
adde6300 AM |
1211 | /* Instruction addresses are always right-shifted by 1. */ |
1212 | value >>= 1; | |
1213 | --value; /* Correct PC. */ | |
adde6300 AM |
1214 | |
1215 | if (value < -2048 || value > 2047) | |
1216 | { | |
65aa24b6 | 1217 | /* No wrap for devices with >8K of program memory. */ |
00d2865b | 1218 | if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap) |
94f592af | 1219 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
1220 | _("operand out of range: %ld"), value); |
1221 | } | |
1222 | ||
1223 | value &= 0xfff; | |
1224 | bfd_putl16 ((bfd_vma) (value | insn), where); | |
1225 | break; | |
1226 | ||
1227 | case BFD_RELOC_32: | |
0b649256 | 1228 | bfd_putl32 ((bfd_vma) value, where); |
adde6300 AM |
1229 | break; |
1230 | ||
1231 | case BFD_RELOC_16: | |
1232 | bfd_putl16 ((bfd_vma) value, where); | |
1233 | break; | |
1234 | ||
17e57237 NC |
1235 | case BFD_RELOC_8: |
1236 | if (value > 255 || value < -128) | |
1237 | as_warn_where (fixP->fx_file, fixP->fx_line, | |
1238 | _("operand out of range: %ld"), value); | |
1239 | *where = value; | |
1240 | break; | |
1241 | ||
adde6300 | 1242 | case BFD_RELOC_AVR_16_PM: |
c6a7ab1f | 1243 | bfd_putl16 ((bfd_vma) (value >> 1), where); |
adde6300 AM |
1244 | break; |
1245 | ||
750bce0e NC |
1246 | case BFD_RELOC_AVR_LDI: |
1247 | if (value > 255) | |
1248 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1249 | _("operand out of range: %ld"), value); | |
1250 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where); | |
1251 | break; | |
1252 | ||
1253 | case BFD_RELOC_AVR_6: | |
1254 | if ((value > 63) || (value < 0)) | |
1255 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1256 | _("operand out of range: %ld"), value); | |
1257 | bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) | ((value & (1 << 5)) << 8)), where); | |
1258 | break; | |
1259 | ||
1260 | case BFD_RELOC_AVR_6_ADIW: | |
1261 | if ((value > 63) || (value < 0)) | |
1262 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1263 | _("operand out of range: %ld"), value); | |
1264 | bfd_putl16 ((bfd_vma) insn | (value & 0xf) | ((value & 0x30) << 2), where); | |
1265 | break; | |
1266 | ||
adde6300 AM |
1267 | case BFD_RELOC_AVR_LO8_LDI: |
1268 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where); | |
1269 | break; | |
1270 | ||
adde6300 AM |
1271 | case BFD_RELOC_AVR_HI8_LDI: |
1272 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where); | |
1273 | break; | |
1274 | ||
df406460 | 1275 | case BFD_RELOC_AVR_MS8_LDI: |
adde6300 AM |
1276 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where); |
1277 | break; | |
1278 | ||
1279 | case BFD_RELOC_AVR_HH8_LDI: | |
1280 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where); | |
1281 | break; | |
1282 | ||
1283 | case BFD_RELOC_AVR_LO8_LDI_NEG: | |
1284 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where); | |
1285 | break; | |
1286 | ||
adde6300 AM |
1287 | case BFD_RELOC_AVR_HI8_LDI_NEG: |
1288 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where); | |
1289 | break; | |
1290 | ||
df406460 | 1291 | case BFD_RELOC_AVR_MS8_LDI_NEG: |
adde6300 AM |
1292 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where); |
1293 | break; | |
1294 | ||
1295 | case BFD_RELOC_AVR_HH8_LDI_NEG: | |
1296 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where); | |
1297 | break; | |
1298 | ||
1299 | case BFD_RELOC_AVR_LO8_LDI_PM: | |
1300 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where); | |
1301 | break; | |
1302 | ||
1303 | case BFD_RELOC_AVR_HI8_LDI_PM: | |
1304 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where); | |
1305 | break; | |
1306 | ||
1307 | case BFD_RELOC_AVR_HH8_LDI_PM: | |
1308 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where); | |
1309 | break; | |
1310 | ||
1311 | case BFD_RELOC_AVR_LO8_LDI_PM_NEG: | |
1312 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where); | |
1313 | break; | |
1314 | ||
1315 | case BFD_RELOC_AVR_HI8_LDI_PM_NEG: | |
1316 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where); | |
1317 | break; | |
1318 | ||
1319 | case BFD_RELOC_AVR_HH8_LDI_PM_NEG: | |
1320 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where); | |
1321 | break; | |
1322 | ||
1323 | case BFD_RELOC_AVR_CALL: | |
1324 | { | |
1325 | unsigned long x; | |
1dab94dd | 1326 | |
adde6300 AM |
1327 | x = bfd_getl16 (where); |
1328 | if (value & 1) | |
94f592af | 1329 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
1330 | _("odd address operand: %ld"), value); |
1331 | value >>= 1; | |
1332 | x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16; | |
1333 | bfd_putl16 ((bfd_vma) x, where); | |
c6a7ab1f | 1334 | bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2); |
adde6300 AM |
1335 | } |
1336 | break; | |
1337 | ||
99700d6f NC |
1338 | case BFD_RELOC_AVR_8_LO: |
1339 | *where = 0xff & value; | |
1340 | break; | |
1341 | ||
1342 | case BFD_RELOC_AVR_8_HI: | |
1343 | *where = 0xff & (value >> 8); | |
1344 | break; | |
1345 | ||
40551fb8 | 1346 | case BFD_RELOC_AVR_8_HLO: |
99700d6f NC |
1347 | *where = 0xff & (value >> 16); |
1348 | break; | |
1349 | ||
1350 | default: | |
c6a7ab1f | 1351 | as_fatal (_("line %d: unknown relocation type: 0x%x"), |
94f592af | 1352 | fixP->fx_line, fixP->fx_r_type); |
adde6300 AM |
1353 | break; |
1354 | } | |
1355 | } | |
1356 | else | |
1357 | { | |
a61a9fbc | 1358 | switch ((int) fixP->fx_r_type) |
adde6300 AM |
1359 | { |
1360 | case -BFD_RELOC_AVR_HI8_LDI_NEG: | |
1361 | case -BFD_RELOC_AVR_HI8_LDI: | |
1362 | case -BFD_RELOC_AVR_LO8_LDI_NEG: | |
1363 | case -BFD_RELOC_AVR_LO8_LDI: | |
94f592af | 1364 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 1365 | _("only constant expression allowed")); |
94f592af | 1366 | fixP->fx_done = 1; |
adde6300 AM |
1367 | break; |
1368 | default: | |
1369 | break; | |
1370 | } | |
adde6300 | 1371 | } |
adde6300 AM |
1372 | } |
1373 | ||
7be1c489 AM |
1374 | /* GAS will call this to generate a reloc, passing the resulting reloc |
1375 | to `bfd_install_relocation'. This currently works poorly, as | |
1376 | `bfd_install_relocation' often does the wrong thing, and instances of | |
1377 | `tc_gen_reloc' have been written to work around the problems, which | |
1378 | in turns makes it difficult to fix `bfd_install_relocation'. */ | |
adde6300 AM |
1379 | |
1380 | /* If while processing a fixup, a reloc really needs to be created | |
1381 | then it is done here. */ | |
1382 | ||
1383 | arelent * | |
dc191a8f NC |
1384 | tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, |
1385 | fixS *fixp) | |
adde6300 AM |
1386 | { |
1387 | arelent *reloc; | |
1388 | ||
df406460 NC |
1389 | if (fixp->fx_addsy && fixp->fx_subsy) |
1390 | { | |
1391 | long value = 0; | |
1392 | ||
1393 | if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy)) | |
1394 | || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section) | |
1395 | { | |
1396 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
1397 | "Difference of symbols in different sections is not supported"); | |
1398 | return NULL; | |
1399 | } | |
1400 | ||
28c9d252 | 1401 | /* We are dealing with two symbols defined in the same section. |
df406460 NC |
1402 | Let us fix-up them here. */ |
1403 | value += S_GET_VALUE (fixp->fx_addsy); | |
1404 | value -= S_GET_VALUE (fixp->fx_subsy); | |
1405 | ||
1406 | /* When fx_addsy and fx_subsy both are zero, md_apply_fix | |
1407 | only takes it's second operands for the fixup value. */ | |
1408 | fixp->fx_addsy = NULL; | |
1409 | fixp->fx_subsy = NULL; | |
1410 | md_apply_fix (fixp, (valueT *) &value, NULL); | |
1411 | ||
1412 | return NULL; | |
1413 | } | |
1414 | ||
dc191a8f | 1415 | reloc = xmalloc (sizeof (arelent)); |
adde6300 | 1416 | |
dc191a8f | 1417 | reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *)); |
adde6300 AM |
1418 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); |
1419 | ||
1420 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
1421 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
1422 | if (reloc->howto == (reloc_howto_type *) NULL) | |
1423 | { | |
1424 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
c6a7ab1f NC |
1425 | _("reloc %d not supported by object file format"), |
1426 | (int) fixp->fx_r_type); | |
adde6300 AM |
1427 | return NULL; |
1428 | } | |
1429 | ||
1430 | if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
1431 | || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
1432 | reloc->address = fixp->fx_offset; | |
1433 | ||
1434 | reloc->addend = fixp->fx_offset; | |
1435 | ||
1436 | return reloc; | |
1437 | } | |
1438 | ||
adde6300 | 1439 | void |
dc191a8f | 1440 | md_assemble (char *str) |
adde6300 | 1441 | { |
c6a7ab1f | 1442 | struct avr_opcodes_s *opcode; |
adde6300 AM |
1443 | char op[11]; |
1444 | ||
c6a7ab1f | 1445 | str = skip_space (extract_word (str, op, sizeof (op))); |
adde6300 AM |
1446 | |
1447 | if (!op[0]) | |
00d2865b | 1448 | as_bad (_("can't find opcode ")); |
adde6300 AM |
1449 | |
1450 | opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op); | |
1451 | ||
1452 | if (opcode == NULL) | |
1453 | { | |
00d2865b | 1454 | as_bad (_("unknown opcode `%s'"), op); |
adde6300 AM |
1455 | return; |
1456 | } | |
1457 | ||
b170af93 | 1458 | /* Special case for opcodes with optional operands (lpm, elpm) - |
1188e082 | 1459 | version with operands exists in avr_opcodes[] in the next entry. */ |
c6a7ab1f | 1460 | |
1188e082 DC |
1461 | if (*str && *opcode->constraints == '?') |
1462 | ++opcode; | |
b170af93 | 1463 | |
00d2865b NC |
1464 | if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa) |
1465 | as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name); | |
adde6300 | 1466 | |
d4f4f3fb AM |
1467 | dwarf2_emit_insn (0); |
1468 | ||
adde6300 AM |
1469 | /* We used to set input_line_pointer to the result of get_operands, |
1470 | but that is wrong. Our caller assumes we don't change it. */ | |
1471 | { | |
1472 | char *t = input_line_pointer; | |
dc191a8f | 1473 | |
adde6300 | 1474 | avr_operands (opcode, &str); |
b170af93 | 1475 | if (*skip_space (str)) |
00d2865b | 1476 | as_bad (_("garbage at end of line")); |
adde6300 AM |
1477 | input_line_pointer = t; |
1478 | } | |
1479 | } | |
1480 | ||
99700d6f NC |
1481 | typedef struct |
1482 | { | |
1483 | /* Name of the expression modifier allowed with .byte, .word, etc. */ | |
1484 | const char *name; | |
1485 | ||
1486 | /* Only allowed with n bytes of data. */ | |
1487 | int nbytes; | |
1488 | ||
1489 | /* Associated RELOC. */ | |
1490 | bfd_reloc_code_real_type reloc; | |
1491 | ||
1492 | /* Part of the error message. */ | |
1493 | const char *error; | |
1494 | } exp_mod_data_t; | |
1495 | ||
1496 | static const exp_mod_data_t exp_mod_data[] = | |
1497 | { | |
1498 | /* Default, must be first. */ | |
1499 | { "", 0, BFD_RELOC_16, "" }, | |
1500 | /* Divides by 2 to get word address. Generate Stub. */ | |
1501 | { "gs", 2, BFD_RELOC_AVR_16_PM, "`gs' " }, | |
1502 | { "pm", 2, BFD_RELOC_AVR_16_PM, "`pm' " }, | |
1503 | /* The following are used together with avr-gcc's __memx address space | |
1504 | in order to initialize a 24-bit pointer variable with a 24-bit address. | |
40551fb8 NC |
1505 | For address in flash, hlo8 will contain the flash segment if the |
1506 | symbol is located in flash. If the symbol is located in RAM; hlo8 | |
99700d6f NC |
1507 | will contain 0x80 which matches avr-gcc's notion of how 24-bit RAM/flash |
1508 | addresses linearize address space. */ | |
1509 | { "lo8", 1, BFD_RELOC_AVR_8_LO, "`lo8' " }, | |
1510 | { "hi8", 1, BFD_RELOC_AVR_8_HI, "`hi8' " }, | |
40551fb8 NC |
1511 | { "hlo8", 1, BFD_RELOC_AVR_8_HLO, "`hlo8' " }, |
1512 | { "hh8", 1, BFD_RELOC_AVR_8_HLO, "`hh8' " }, | |
99700d6f NC |
1513 | /* End of list. */ |
1514 | { NULL, 0, 0, NULL } | |
1515 | }; | |
1516 | ||
1517 | /* Data to pass between `avr_parse_cons_expression' and `avr_cons_fix_new'. */ | |
1518 | static const exp_mod_data_t *pexp_mod_data = &exp_mod_data[0]; | |
adde6300 | 1519 | |
99700d6f NC |
1520 | /* Parse special CONS expression: pm (expression) or alternatively |
1521 | gs (expression). These are used for addressing program memory. Moreover, | |
40551fb8 | 1522 | define lo8 (expression), hi8 (expression) and hlo8 (expression). */ |
c6a7ab1f | 1523 | |
adde6300 | 1524 | void |
dc191a8f | 1525 | avr_parse_cons_expression (expressionS *exp, int nbytes) |
adde6300 | 1526 | { |
99700d6f | 1527 | const exp_mod_data_t *pexp = &exp_mod_data[0]; |
c6a7ab1f | 1528 | char *tmp; |
adde6300 | 1529 | |
99700d6f | 1530 | pexp_mod_data = pexp; |
adde6300 AM |
1531 | |
1532 | tmp = input_line_pointer = skip_space (input_line_pointer); | |
1533 | ||
99700d6f NC |
1534 | /* The first entry of exp_mod_data[] contains an entry if no |
1535 | expression modifier is present. Skip it. */ | |
1536 | ||
1537 | for (pexp++; pexp->name; pexp++) | |
adde6300 | 1538 | { |
99700d6f | 1539 | int len = strlen (pexp->name); |
1dab94dd | 1540 | |
99700d6f NC |
1541 | if (nbytes == pexp->nbytes |
1542 | && strncasecmp (input_line_pointer, pexp->name, len) == 0) | |
adde6300 AM |
1543 | { |
1544 | input_line_pointer = skip_space (input_line_pointer + len); | |
1dab94dd | 1545 | |
adde6300 AM |
1546 | if (*input_line_pointer == '(') |
1547 | { | |
1548 | input_line_pointer = skip_space (input_line_pointer + 1); | |
99700d6f | 1549 | pexp_mod_data = pexp; |
adde6300 | 1550 | expression (exp); |
1dab94dd | 1551 | |
adde6300 AM |
1552 | if (*input_line_pointer == ')') |
1553 | ++input_line_pointer; | |
1554 | else | |
1555 | { | |
00d2865b | 1556 | as_bad (_("`)' required")); |
99700d6f | 1557 | pexp_mod_data = &exp_mod_data[0]; |
adde6300 | 1558 | } |
1dab94dd | 1559 | |
adde6300 AM |
1560 | return; |
1561 | } | |
1dab94dd | 1562 | |
adde6300 | 1563 | input_line_pointer = tmp; |
99700d6f NC |
1564 | |
1565 | break; | |
adde6300 AM |
1566 | } |
1567 | } | |
1dab94dd | 1568 | |
adde6300 AM |
1569 | expression (exp); |
1570 | } | |
1571 | ||
1572 | void | |
dc191a8f NC |
1573 | avr_cons_fix_new (fragS *frag, |
1574 | int where, | |
1575 | int nbytes, | |
1576 | expressionS *exp) | |
adde6300 | 1577 | { |
99700d6f NC |
1578 | int bad = 0; |
1579 | ||
1580 | switch (pexp_mod_data->reloc) | |
adde6300 | 1581 | { |
99700d6f | 1582 | default: |
17e57237 NC |
1583 | if (nbytes == 1) |
1584 | fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_8); | |
1585 | else if (nbytes == 2) | |
b34976b6 | 1586 | fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16); |
adde6300 | 1587 | else if (nbytes == 4) |
b34976b6 | 1588 | fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32); |
adde6300 | 1589 | else |
99700d6f NC |
1590 | bad = 1; |
1591 | break; | |
1592 | ||
1593 | case BFD_RELOC_AVR_16_PM: | |
1594 | case BFD_RELOC_AVR_8_LO: | |
1595 | case BFD_RELOC_AVR_8_HI: | |
40551fb8 | 1596 | case BFD_RELOC_AVR_8_HLO: |
99700d6f NC |
1597 | if (nbytes == pexp_mod_data->nbytes) |
1598 | fix_new_exp (frag, where, nbytes, exp, FALSE, pexp_mod_data->reloc); | |
adde6300 | 1599 | else |
99700d6f NC |
1600 | bad = 1; |
1601 | break; | |
adde6300 | 1602 | } |
99700d6f NC |
1603 | |
1604 | if (bad) | |
1605 | as_bad (_("illegal %srelocation size: %d"), pexp_mod_data->error, nbytes); | |
1606 | ||
1607 | pexp_mod_data = &exp_mod_data[0]; | |
adde6300 | 1608 | } |
af3ecb4a RH |
1609 | |
1610 | void | |
1611 | tc_cfi_frame_initial_instructions (void) | |
1612 | { | |
1613 | /* AVR6 pushes 3 bytes for calls. */ | |
1614 | int return_size = (avr_mcu->mach == bfd_mach_avr6 ? 3 : 2); | |
1615 | ||
1616 | /* The CFA is the caller's stack location before the call insn. */ | |
1617 | /* Note that the stack pointer is dwarf register number 32. */ | |
1618 | cfi_add_CFA_def_cfa (32, return_size); | |
1619 | ||
1620 | /* Note that AVR consistently uses post-decrement, which means that things | |
1621 | do not line up the same way as for targers that use pre-decrement. */ | |
1622 | cfi_add_CFA_offset (DWARF2_DEFAULT_RETURN_COLUMN, 1-return_size); | |
1623 | } |