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adde6300 AM |
1 | /* tc-avr.c -- Assembler code for the ATMEL AVR |
2 | ||
17e57237 NC |
3 | Copyright 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008, 2009, |
4 | 2010 Free Software Foundation, Inc. | |
adde6300 AM |
5 | Contributed by Denis Chertykov <denisc@overta.ru> |
6 | ||
7 | This file is part of GAS, the GNU Assembler. | |
8 | ||
9 | GAS is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
ec2655a6 | 11 | the Free Software Foundation; either version 3, or (at your option) |
adde6300 AM |
12 | any later version. |
13 | ||
14 | GAS is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
20 | along with GAS; see the file COPYING. If not, write to | |
4b4da160 NC |
21 | the Free Software Foundation, 51 Franklin Street - Fifth Floor, |
22 | Boston, MA 02110-1301, USA. */ | |
adde6300 | 23 | |
adde6300 | 24 | #include "as.h" |
3882b010 | 25 | #include "safe-ctype.h" |
adde6300 AM |
26 | #include "subsegs.h" |
27 | ||
1188e082 DC |
28 | struct avr_opcodes_s |
29 | { | |
dc191a8f NC |
30 | char * name; |
31 | char * constraints; | |
32 | int insn_size; /* In words. */ | |
33 | int isa; | |
34 | unsigned int bin_opcode; | |
1188e082 DC |
35 | }; |
36 | ||
37 | #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \ | |
38 | {#NAME, CONSTR, SIZE, ISA, BIN}, | |
39 | ||
40 | struct avr_opcodes_s avr_opcodes[] = | |
41 | { | |
42 | #include "opcode/avr.h" | |
43 | {NULL, NULL, 0, 0, 0} | |
44 | }; | |
45 | ||
adde6300 AM |
46 | const char comment_chars[] = ";"; |
47 | const char line_comment_chars[] = "#"; | |
48 | const char line_separator_chars[] = "$"; | |
49 | ||
adde6300 AM |
50 | const char *md_shortopts = "m:"; |
51 | struct mcu_type_s | |
52 | { | |
53 | char *name; | |
54 | int isa; | |
55 | int mach; | |
56 | }; | |
57 | ||
1f8ae5e6 | 58 | /* XXX - devices that don't seem to exist (renamed, replaced with larger |
7b21ac3f | 59 | ones, or planned but never produced), left here for compatibility. */ |
1f8ae5e6 | 60 | |
adde6300 AM |
61 | static struct mcu_type_s mcu_types[] = |
62 | { | |
7b21ac3f EW |
63 | {"avr1", AVR_ISA_AVR1, bfd_mach_avr1}, |
64 | /* TODO: insruction set for avr2 architecture should be AVR_ISA_AVR2, | |
65 | but set to AVR_ISA_AVR25 for some following version | |
66 | of GCC (from 4.3) for backward compatibility. */ | |
67 | {"avr2", AVR_ISA_AVR25, bfd_mach_avr2}, | |
68 | {"avr25", AVR_ISA_AVR25, bfd_mach_avr25}, | |
69 | /* TODO: insruction set for avr3 architecture should be AVR_ISA_AVR3, | |
70 | but set to AVR_ISA_AVR3_ALL for some following version | |
71 | of GCC (from 4.3) for backward compatibility. */ | |
72 | {"avr3", AVR_ISA_AVR3_ALL, bfd_mach_avr3}, | |
73 | {"avr31", AVR_ISA_AVR31, bfd_mach_avr31}, | |
74 | {"avr35", AVR_ISA_AVR35, bfd_mach_avr35}, | |
75 | {"avr4", AVR_ISA_AVR4, bfd_mach_avr4}, | |
76 | /* TODO: insruction set for avr5 architecture should be AVR_ISA_AVR5, | |
77 | but set to AVR_ISA_AVR51 for some following version | |
78 | of GCC (from 4.3) for backward compatibility. */ | |
79 | {"avr5", AVR_ISA_AVR51, bfd_mach_avr5}, | |
80 | {"avr51", AVR_ISA_AVR51, bfd_mach_avr51}, | |
81 | {"avr6", AVR_ISA_AVR6, bfd_mach_avr6}, | |
28c9d252 | 82 | {"at90s1200", AVR_ISA_1200, bfd_mach_avr1}, |
7b21ac3f EW |
83 | {"attiny11", AVR_ISA_AVR1, bfd_mach_avr1}, |
84 | {"attiny12", AVR_ISA_AVR1, bfd_mach_avr1}, | |
85 | {"attiny15", AVR_ISA_AVR1, bfd_mach_avr1}, | |
86 | {"attiny28", AVR_ISA_AVR1, bfd_mach_avr1}, | |
87 | {"at90s2313", AVR_ISA_AVR2, bfd_mach_avr2}, | |
88 | {"at90s2323", AVR_ISA_AVR2, bfd_mach_avr2}, | |
89 | {"at90s2333", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 4433 */ | |
90 | {"at90s2343", AVR_ISA_AVR2, bfd_mach_avr2}, | |
91 | {"attiny22", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 2343 */ | |
d669d37f | 92 | {"attiny26", AVR_ISA_2xxe, bfd_mach_avr2}, |
7b21ac3f EW |
93 | {"at90s4414", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8515 */ |
94 | {"at90s4433", AVR_ISA_AVR2, bfd_mach_avr2}, | |
95 | {"at90s4434", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8535 */ | |
96 | {"at90s8515", AVR_ISA_AVR2, bfd_mach_avr2}, | |
97 | {"at90c8534", AVR_ISA_AVR2, bfd_mach_avr2}, | |
98 | {"at90s8535", AVR_ISA_AVR2, bfd_mach_avr2}, | |
99 | {"attiny13", AVR_ISA_AVR25, bfd_mach_avr25}, | |
100 | {"attiny13a", AVR_ISA_AVR25, bfd_mach_avr25}, | |
101 | {"attiny2313", AVR_ISA_AVR25, bfd_mach_avr25}, | |
8453da2e | 102 | {"attiny2313a",AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f | 103 | {"attiny24", AVR_ISA_AVR25, bfd_mach_avr25}, |
8453da2e EW |
104 | {"attiny24a", AVR_ISA_AVR25, bfd_mach_avr25}, |
105 | {"attiny4313", AVR_ISA_AVR25, bfd_mach_avr25}, | |
7b21ac3f | 106 | {"attiny44", AVR_ISA_AVR25, bfd_mach_avr25}, |
8453da2e | 107 | {"attiny44a", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f | 108 | {"attiny84", AVR_ISA_AVR25, bfd_mach_avr25}, |
e760a81b | 109 | {"attiny84a", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f EW |
110 | {"attiny25", AVR_ISA_AVR25, bfd_mach_avr25}, |
111 | {"attiny45", AVR_ISA_AVR25, bfd_mach_avr25}, | |
112 | {"attiny85", AVR_ISA_AVR25, bfd_mach_avr25}, | |
113 | {"attiny261", AVR_ISA_AVR25, bfd_mach_avr25}, | |
8453da2e | 114 | {"attiny261a", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f | 115 | {"attiny461", AVR_ISA_AVR25, bfd_mach_avr25}, |
e760a81b | 116 | {"attiny461a", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f | 117 | {"attiny861", AVR_ISA_AVR25, bfd_mach_avr25}, |
8453da2e | 118 | {"attiny861a", AVR_ISA_AVR25, bfd_mach_avr25}, |
2b02f87c | 119 | {"attiny87", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f EW |
120 | {"attiny43u", AVR_ISA_AVR25, bfd_mach_avr25}, |
121 | {"attiny48", AVR_ISA_AVR25, bfd_mach_avr25}, | |
122 | {"attiny88", AVR_ISA_AVR25, bfd_mach_avr25}, | |
123 | {"at86rf401", AVR_ISA_RF401, bfd_mach_avr25}, | |
a53fddce | 124 | {"ata6289", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f EW |
125 | {"at43usb355", AVR_ISA_AVR3, bfd_mach_avr3}, |
126 | {"at76c711", AVR_ISA_AVR3, bfd_mach_avr3}, | |
127 | {"atmega103", AVR_ISA_AVR31, bfd_mach_avr31}, | |
128 | {"at43usb320", AVR_ISA_AVR31, bfd_mach_avr31}, | |
129 | {"attiny167", AVR_ISA_AVR35, bfd_mach_avr35}, | |
130 | {"at90usb82", AVR_ISA_AVR35, bfd_mach_avr35}, | |
131 | {"at90usb162", AVR_ISA_AVR35, bfd_mach_avr35}, | |
11908008 EW |
132 | {"atmega8u2", AVR_ISA_AVR35, bfd_mach_avr35}, |
133 | {"atmega16u2", AVR_ISA_AVR35, bfd_mach_avr35}, | |
134 | {"atmega32u2", AVR_ISA_AVR35, bfd_mach_avr35}, | |
28c9d252 | 135 | {"atmega8", AVR_ISA_M8, bfd_mach_avr4}, |
7b21ac3f | 136 | {"atmega48", AVR_ISA_AVR4, bfd_mach_avr4}, |
e760a81b | 137 | {"atmega48a", AVR_ISA_AVR4, bfd_mach_avr4}, |
7b21ac3f EW |
138 | {"atmega48p", AVR_ISA_AVR4, bfd_mach_avr4}, |
139 | {"atmega88", AVR_ISA_AVR4, bfd_mach_avr4}, | |
e760a81b | 140 | {"atmega88a", AVR_ISA_AVR4, bfd_mach_avr4}, |
7b21ac3f | 141 | {"atmega88p", AVR_ISA_AVR4, bfd_mach_avr4}, |
e760a81b | 142 | {"atmega88pa", AVR_ISA_AVR4, bfd_mach_avr4}, |
28c9d252 NC |
143 | {"atmega8515", AVR_ISA_M8, bfd_mach_avr4}, |
144 | {"atmega8535", AVR_ISA_M8, bfd_mach_avr4}, | |
7b21ac3f EW |
145 | {"atmega8hva", AVR_ISA_AVR4, bfd_mach_avr4}, |
146 | {"at90pwm1", AVR_ISA_AVR4, bfd_mach_avr4}, | |
147 | {"at90pwm2", AVR_ISA_AVR4, bfd_mach_avr4}, | |
148 | {"at90pwm2b", AVR_ISA_AVR4, bfd_mach_avr4}, | |
149 | {"at90pwm3", AVR_ISA_AVR4, bfd_mach_avr4}, | |
150 | {"at90pwm3b", AVR_ISA_AVR4, bfd_mach_avr4}, | |
2b02f87c | 151 | {"at90pwm81", AVR_ISA_AVR4, bfd_mach_avr4}, |
7b21ac3f | 152 | {"atmega16", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 153 | {"atmega16a", AVR_ISA_AVR5, bfd_mach_avr5}, |
28c9d252 | 154 | {"atmega161", AVR_ISA_M161, bfd_mach_avr5}, |
7b21ac3f | 155 | {"atmega162", AVR_ISA_AVR5, bfd_mach_avr5}, |
28c9d252 | 156 | {"atmega163", AVR_ISA_M161, bfd_mach_avr5}, |
e760a81b | 157 | {"atmega164a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
158 | {"atmega164p", AVR_ISA_AVR5, bfd_mach_avr5}, |
159 | {"atmega165", AVR_ISA_AVR5, bfd_mach_avr5}, | |
e760a81b | 160 | {"atmega165a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
161 | {"atmega165p", AVR_ISA_AVR5, bfd_mach_avr5}, |
162 | {"atmega168", AVR_ISA_AVR5, bfd_mach_avr5}, | |
e760a81b | 163 | {"atmega168a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
164 | {"atmega168p", AVR_ISA_AVR5, bfd_mach_avr5}, |
165 | {"atmega169", AVR_ISA_AVR5, bfd_mach_avr5}, | |
e760a81b | 166 | {"atmega169a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 167 | {"atmega169p", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 168 | {"atmega169pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
169 | {"atmega32", AVR_ISA_AVR5, bfd_mach_avr5}, |
170 | {"atmega323", AVR_ISA_AVR5, bfd_mach_avr5}, | |
e760a81b | 171 | {"atmega324a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 172 | {"atmega324p", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 173 | {"atmega324pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 174 | {"atmega325", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 175 | {"atmega325a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
176 | {"atmega325p", AVR_ISA_AVR5, bfd_mach_avr5}, |
177 | {"atmega3250", AVR_ISA_AVR5, bfd_mach_avr5}, | |
e760a81b | 178 | {"atmega3250a",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 179 | {"atmega3250p",AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 180 | {"atmega328", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
181 | {"atmega328p", AVR_ISA_AVR5, bfd_mach_avr5}, |
182 | {"atmega329", AVR_ISA_AVR5, bfd_mach_avr5}, | |
e760a81b | 183 | {"atmega329a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 184 | {"atmega329p", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 185 | {"atmega329pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 186 | {"atmega3290", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 187 | {"atmega3290a",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
188 | {"atmega3290p",AVR_ISA_AVR5, bfd_mach_avr5}, |
189 | {"atmega406", AVR_ISA_AVR5, bfd_mach_avr5}, | |
190 | {"atmega64", AVR_ISA_AVR5, bfd_mach_avr5}, | |
191 | {"atmega640", AVR_ISA_AVR5, bfd_mach_avr5}, | |
192 | {"atmega644", AVR_ISA_AVR5, bfd_mach_avr5}, | |
e760a81b | 193 | {"atmega644a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 194 | {"atmega644p", AVR_ISA_AVR5, bfd_mach_avr5}, |
8453da2e | 195 | {"atmega644pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 196 | {"atmega645", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b EW |
197 | {"atmega645a", AVR_ISA_AVR5, bfd_mach_avr5}, |
198 | {"atmega645p", AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 199 | {"atmega649", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b EW |
200 | {"atmega649a", AVR_ISA_AVR5, bfd_mach_avr5}, |
201 | {"atmega649p", AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 202 | {"atmega6450", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b EW |
203 | {"atmega6450a",AVR_ISA_AVR5, bfd_mach_avr5}, |
204 | {"atmega6450p",AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 205 | {"atmega6490", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b EW |
206 | {"atmega6490a",AVR_ISA_AVR5, bfd_mach_avr5}, |
207 | {"atmega6490p",AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 208 | {"atmega16hva",AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 209 | {"atmega16hva2",AVR_ISA_AVR5, bfd_mach_avr5}, |
2b02f87c NC |
210 | {"atmega16hvb",AVR_ISA_AVR5, bfd_mach_avr5}, |
211 | {"atmega32hvb",AVR_ISA_AVR5, bfd_mach_avr5}, | |
e760a81b | 212 | {"atmega64hve",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
213 | {"at90can32" , AVR_ISA_AVR5, bfd_mach_avr5}, |
214 | {"at90can64" , AVR_ISA_AVR5, bfd_mach_avr5}, | |
215 | {"at90pwm216", AVR_ISA_AVR5, bfd_mach_avr5}, | |
216 | {"at90pwm316", AVR_ISA_AVR5, bfd_mach_avr5}, | |
217 | {"atmega32c1", AVR_ISA_AVR5, bfd_mach_avr5}, | |
2b02f87c NC |
218 | {"atmega64c1", AVR_ISA_AVR5, bfd_mach_avr5}, |
219 | {"atmega16m1", AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 220 | {"atmega32m1", AVR_ISA_AVR5, bfd_mach_avr5}, |
2b02f87c NC |
221 | {"atmega64m1", AVR_ISA_AVR5, bfd_mach_avr5}, |
222 | {"atmega16u4", AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 223 | {"atmega32u4", AVR_ISA_AVR5, bfd_mach_avr5}, |
2b02f87c | 224 | {"atmega32u6", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
225 | {"at90usb646", AVR_ISA_AVR5, bfd_mach_avr5}, |
226 | {"at90usb647", AVR_ISA_AVR5, bfd_mach_avr5}, | |
2b02f87c | 227 | {"at90scr100", AVR_ISA_AVR5, bfd_mach_avr5}, |
28c9d252 | 228 | {"at94k", AVR_ISA_94K, bfd_mach_avr5}, |
e760a81b | 229 | {"m3000", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
230 | {"atmega128", AVR_ISA_AVR51, bfd_mach_avr51}, |
231 | {"atmega1280", AVR_ISA_AVR51, bfd_mach_avr51}, | |
232 | {"atmega1281", AVR_ISA_AVR51, bfd_mach_avr51}, | |
233 | {"atmega1284p",AVR_ISA_AVR51, bfd_mach_avr51}, | |
17f4880d | 234 | {"atmega128rfa1",AVR_ISA_AVR51, bfd_mach_avr51}, |
7b21ac3f EW |
235 | {"at90can128", AVR_ISA_AVR51, bfd_mach_avr51}, |
236 | {"at90usb1286",AVR_ISA_AVR51, bfd_mach_avr51}, | |
237 | {"at90usb1287",AVR_ISA_AVR51, bfd_mach_avr51}, | |
238 | {"atmega2560", AVR_ISA_AVR6, bfd_mach_avr6}, | |
239 | {"atmega2561", AVR_ISA_AVR6, bfd_mach_avr6}, | |
adde6300 AM |
240 | {NULL, 0, 0} |
241 | }; | |
242 | ||
adde6300 | 243 | /* Current MCU type. */ |
7b21ac3f | 244 | static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_AVR2, bfd_mach_avr2}; |
dc191a8f | 245 | static struct mcu_type_s * avr_mcu = & default_mcu; |
adde6300 | 246 | |
00d2865b NC |
247 | /* AVR target-specific switches. */ |
248 | struct avr_opt_s | |
249 | { | |
dc191a8f NC |
250 | int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes. */ |
251 | int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns. */ | |
252 | int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */ | |
00d2865b NC |
253 | }; |
254 | ||
255 | static struct avr_opt_s avr_opt = { 0, 0, 0 }; | |
256 | ||
adde6300 AM |
257 | const char EXP_CHARS[] = "eE"; |
258 | const char FLT_CHARS[] = "dD"; | |
dc191a8f NC |
259 | |
260 | static void avr_set_arch (int); | |
adde6300 AM |
261 | |
262 | /* The target specific pseudo-ops which we support. */ | |
263 | const pseudo_typeS md_pseudo_table[] = | |
264 | { | |
265 | {"arch", avr_set_arch, 0}, | |
266 | { NULL, NULL, 0} | |
267 | }; | |
268 | ||
269 | #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00)) | |
adde6300 | 270 | |
dc191a8f NC |
271 | #define EXP_MOD_NAME(i) exp_mod[i].name |
272 | #define EXP_MOD_RELOC(i) exp_mod[i].reloc | |
273 | #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc | |
274 | #define HAVE_PM_P(i) exp_mod[i].have_pm | |
adde6300 AM |
275 | |
276 | struct exp_mod_s | |
277 | { | |
dc191a8f NC |
278 | char * name; |
279 | bfd_reloc_code_real_type reloc; | |
280 | bfd_reloc_code_real_type neg_reloc; | |
281 | int have_pm; | |
adde6300 AM |
282 | }; |
283 | ||
c6a7ab1f NC |
284 | static struct exp_mod_s exp_mod[] = |
285 | { | |
adde6300 AM |
286 | {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1}, |
287 | {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0}, | |
288 | {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1}, | |
289 | {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0}, | |
290 | {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1}, | |
291 | {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0}, | |
df406460 NC |
292 | {"hlo8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 0}, |
293 | {"hhi8", BFD_RELOC_AVR_MS8_LDI, BFD_RELOC_AVR_MS8_LDI_NEG, 0}, | |
adde6300 AM |
294 | }; |
295 | ||
8ad7c533 NC |
296 | /* A union used to store indicies into the exp_mod[] array |
297 | in a hash table which expects void * data types. */ | |
298 | typedef union | |
299 | { | |
300 | void * ptr; | |
301 | int index; | |
302 | } mod_index; | |
303 | ||
adde6300 AM |
304 | /* Opcode hash table. */ |
305 | static struct hash_control *avr_hash; | |
306 | ||
307 | /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */ | |
308 | static struct hash_control *avr_mod_hash; | |
309 | ||
00d2865b | 310 | #define OPTION_MMCU 'm' |
dc191a8f NC |
311 | enum options |
312 | { | |
313 | OPTION_ALL_OPCODES = OPTION_MD_BASE + 1, | |
314 | OPTION_NO_SKIP_BUG, | |
315 | OPTION_NO_WRAP | |
316 | }; | |
adde6300 | 317 | |
c6a7ab1f NC |
318 | struct option md_longopts[] = |
319 | { | |
00d2865b NC |
320 | { "mmcu", required_argument, NULL, OPTION_MMCU }, |
321 | { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES }, | |
322 | { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG }, | |
323 | { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP }, | |
324 | { NULL, no_argument, NULL, 0 } | |
adde6300 | 325 | }; |
adde6300 | 326 | |
c6a7ab1f | 327 | size_t md_longopts_size = sizeof (md_longopts); |
00d2865b NC |
328 | |
329 | /* Display nicely formatted list of known MCU names. */ | |
c6a7ab1f | 330 | |
00d2865b | 331 | static void |
dc191a8f | 332 | show_mcu_list (FILE *stream) |
00d2865b NC |
333 | { |
334 | int i, x; | |
335 | ||
336 | fprintf (stream, _("Known MCU names:")); | |
337 | x = 1000; | |
1dab94dd | 338 | |
00d2865b NC |
339 | for (i = 0; mcu_types[i].name; i++) |
340 | { | |
341 | int len = strlen (mcu_types[i].name); | |
1dab94dd | 342 | |
00d2865b | 343 | x += len + 1; |
1dab94dd | 344 | |
00d2865b | 345 | if (x < 75) |
c6a7ab1f | 346 | fprintf (stream, " %s", mcu_types[i].name); |
00d2865b NC |
347 | else |
348 | { | |
349 | fprintf (stream, "\n %s", mcu_types[i].name); | |
350 | x = len + 2; | |
351 | } | |
352 | } | |
1dab94dd | 353 | |
c6a7ab1f | 354 | fprintf (stream, "\n"); |
00d2865b NC |
355 | } |
356 | ||
adde6300 | 357 | static inline char * |
dc191a8f | 358 | skip_space (char *s) |
adde6300 AM |
359 | { |
360 | while (*s == ' ' || *s == '\t') | |
361 | ++s; | |
362 | return s; | |
363 | } | |
364 | ||
365 | /* Extract one word from FROM and copy it to TO. */ | |
c6a7ab1f | 366 | |
adde6300 AM |
367 | static char * |
368 | extract_word (char *from, char *to, int limit) | |
369 | { | |
370 | char *op_start; | |
371 | char *op_end; | |
372 | int size = 0; | |
373 | ||
374 | /* Drop leading whitespace. */ | |
375 | from = skip_space (from); | |
376 | *to = 0; | |
c6a7ab1f | 377 | |
adde6300 | 378 | /* Find the op code end. */ |
c6a7ab1f | 379 | for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);) |
adde6300 AM |
380 | { |
381 | to[size++] = *op_end++; | |
382 | if (size + 1 >= limit) | |
383 | break; | |
384 | } | |
1dab94dd | 385 | |
adde6300 AM |
386 | to[size] = 0; |
387 | return op_end; | |
388 | } | |
389 | ||
390 | int | |
dc191a8f NC |
391 | md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED, |
392 | asection *seg ATTRIBUTE_UNUSED) | |
adde6300 AM |
393 | { |
394 | abort (); | |
395 | return 0; | |
396 | } | |
397 | ||
398 | void | |
dc191a8f | 399 | md_show_usage (FILE *stream) |
adde6300 | 400 | { |
00d2865b NC |
401 | fprintf (stream, |
402 | _("AVR options:\n" | |
adde6300 AM |
403 | " -mmcu=[avr-name] select microcontroller variant\n" |
404 | " [avr-name] can be:\n" | |
7b21ac3f EW |
405 | " avr1 - classic AVR core without data RAM\n" |
406 | " avr2 - classic AVR core with up to 8K program memory\n" | |
407 | " avr25 - classic AVR core with up to 8K program memory\n" | |
408 | " plus the MOVW instruction\n" | |
409 | " avr3 - classic AVR core with up to 64K program memory\n" | |
410 | " avr31 - classic AVR core with up to 128K program memory\n" | |
411 | " avr35 - classic AVR core with up to 64K program memory\n" | |
412 | " plus the MOVW instruction\n" | |
413 | " avr4 - enhanced AVR core with up to 8K program memory\n" | |
414 | " avr5 - enhanced AVR core with up to 64K program memory\n" | |
415 | " avr51 - enhanced AVR core with up to 128K program memory\n" | |
416 | " avr6 - enhanced AVR core with up to 256K program memory\n" | |
adde6300 | 417 | " or immediate microcontroller name.\n")); |
00d2865b NC |
418 | fprintf (stream, |
419 | _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n" | |
420 | " -mno-skip-bug disable warnings for skipping two-word instructions\n" | |
421 | " (default for avr4, avr5)\n" | |
422 | " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n" | |
423 | " (default for avr3, avr5)\n")); | |
424 | show_mcu_list (stream); | |
adde6300 AM |
425 | } |
426 | ||
427 | static void | |
dc191a8f | 428 | avr_set_arch (int dummy ATTRIBUTE_UNUSED) |
adde6300 | 429 | { |
dc191a8f | 430 | char str[20]; |
1dab94dd | 431 | |
adde6300 | 432 | input_line_pointer = extract_word (input_line_pointer, str, 20); |
00d2865b | 433 | md_parse_option (OPTION_MMCU, str); |
adde6300 AM |
434 | bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach); |
435 | } | |
436 | ||
437 | int | |
dc191a8f | 438 | md_parse_option (int c, char *arg) |
adde6300 | 439 | { |
00d2865b | 440 | switch (c) |
adde6300 | 441 | { |
00d2865b NC |
442 | case OPTION_MMCU: |
443 | { | |
444 | int i; | |
445 | char *s = alloca (strlen (arg) + 1); | |
adde6300 | 446 | |
00d2865b NC |
447 | { |
448 | char *t = s; | |
449 | char *arg1 = arg; | |
450 | ||
451 | do | |
3882b010 | 452 | *t = TOLOWER (*arg1++); |
00d2865b NC |
453 | while (*t++); |
454 | } | |
455 | ||
456 | for (i = 0; mcu_types[i].name; ++i) | |
457 | if (strcmp (mcu_types[i].name, s) == 0) | |
458 | break; | |
adde6300 | 459 | |
00d2865b NC |
460 | if (!mcu_types[i].name) |
461 | { | |
462 | show_mcu_list (stderr); | |
463 | as_fatal (_("unknown MCU: %s\n"), arg); | |
464 | } | |
65aa24b6 | 465 | |
00d2865b NC |
466 | /* It is OK to redefine mcu type within the same avr[1-5] bfd machine |
467 | type - this for allows passing -mmcu=... via gcc ASM_SPEC as well | |
468 | as .arch ... in the asm output at the same time. */ | |
00d2865b NC |
469 | if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach) |
470 | avr_mcu = &mcu_types[i]; | |
471 | else | |
472 | as_fatal (_("redefinition of mcu type `%s' to `%s'"), | |
473 | avr_mcu->name, mcu_types[i].name); | |
474 | return 1; | |
475 | } | |
476 | case OPTION_ALL_OPCODES: | |
477 | avr_opt.all_opcodes = 1; | |
478 | return 1; | |
479 | case OPTION_NO_SKIP_BUG: | |
480 | avr_opt.no_skip_bug = 1; | |
481 | return 1; | |
482 | case OPTION_NO_WRAP: | |
483 | avr_opt.no_wrap = 1; | |
adde6300 AM |
484 | return 1; |
485 | } | |
1dab94dd | 486 | |
adde6300 AM |
487 | return 0; |
488 | } | |
489 | ||
490 | symbolS * | |
dc191a8f | 491 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
adde6300 | 492 | { |
dc191a8f | 493 | return NULL; |
adde6300 AM |
494 | } |
495 | ||
adde6300 | 496 | char * |
dc191a8f | 497 | md_atof (int type, char *litP, int *sizeP) |
adde6300 | 498 | { |
499ac353 | 499 | return ieee_md_atof (type, litP, sizeP, FALSE); |
adde6300 AM |
500 | } |
501 | ||
502 | void | |
dc191a8f NC |
503 | md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, |
504 | asection *sec ATTRIBUTE_UNUSED, | |
505 | fragS *fragP ATTRIBUTE_UNUSED) | |
adde6300 AM |
506 | { |
507 | abort (); | |
508 | } | |
509 | ||
adde6300 | 510 | void |
dc191a8f | 511 | md_begin (void) |
adde6300 | 512 | { |
df136245 | 513 | unsigned int i; |
adde6300 | 514 | struct avr_opcodes_s *opcode; |
dc191a8f | 515 | |
c6a7ab1f | 516 | avr_hash = hash_new (); |
adde6300 AM |
517 | |
518 | /* Insert unique names into hash table. This hash table then provides a | |
519 | quick index to the first opcode with a particular name in the opcode | |
520 | table. */ | |
adde6300 AM |
521 | for (opcode = avr_opcodes; opcode->name; opcode++) |
522 | hash_insert (avr_hash, opcode->name, (char *) opcode); | |
523 | ||
524 | avr_mod_hash = hash_new (); | |
525 | ||
dc191a8f | 526 | for (i = 0; i < ARRAY_SIZE (exp_mod); ++i) |
8ad7c533 NC |
527 | { |
528 | mod_index m; | |
529 | ||
530 | m.index = i + 10; | |
531 | hash_insert (avr_mod_hash, EXP_MOD_NAME (i), m.ptr); | |
532 | } | |
c6a7ab1f | 533 | |
adde6300 AM |
534 | bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach); |
535 | } | |
536 | ||
df136245 | 537 | /* Resolve STR as a constant expression and return the result. |
c6a7ab1f | 538 | If result greater than MAX then error. */ |
df136245 DC |
539 | |
540 | static unsigned int | |
dc191a8f | 541 | avr_get_constant (char *str, int max) |
df136245 DC |
542 | { |
543 | expressionS ex; | |
dc191a8f | 544 | |
df136245 DC |
545 | str = skip_space (str); |
546 | input_line_pointer = str; | |
dc191a8f | 547 | expression (& ex); |
df136245 DC |
548 | |
549 | if (ex.X_op != O_constant) | |
550 | as_bad (_("constant value required")); | |
551 | ||
552 | if (ex.X_add_number > max || ex.X_add_number < 0) | |
73f4d86e | 553 | as_bad (_("number must be positive and less than %d"), max + 1); |
1dab94dd | 554 | |
df136245 DC |
555 | return ex.X_add_number; |
556 | } | |
557 | ||
dc191a8f | 558 | /* Parse for ldd/std offset. */ |
df136245 | 559 | |
dc191a8f NC |
560 | static void |
561 | avr_offset_expression (expressionS *exp) | |
adde6300 | 562 | { |
dc191a8f NC |
563 | char *str = input_line_pointer; |
564 | char *tmp; | |
565 | char op[8]; | |
adde6300 | 566 | |
dc191a8f NC |
567 | tmp = str; |
568 | str = extract_word (str, op, sizeof (op)); | |
569 | ||
570 | input_line_pointer = tmp; | |
571 | expression (exp); | |
572 | ||
573 | /* Warn about expressions that fail to use lo8 (). */ | |
574 | if (exp->X_op == O_constant) | |
adde6300 | 575 | { |
dc191a8f | 576 | int x = exp->X_add_number; |
28c9d252 | 577 | |
dc191a8f NC |
578 | if (x < -255 || x > 255) |
579 | as_warn (_("constant out of 8-bit range: %d"), x); | |
580 | } | |
581 | } | |
adde6300 | 582 | |
dc191a8f | 583 | /* Parse ordinary expression. */ |
adde6300 | 584 | |
dc191a8f NC |
585 | static char * |
586 | parse_exp (char *s, expressionS *op) | |
587 | { | |
588 | input_line_pointer = s; | |
589 | expression (op); | |
590 | if (op->X_op == O_absent) | |
591 | as_bad (_("missing operand")); | |
592 | return input_line_pointer; | |
593 | } | |
1dab94dd | 594 | |
dc191a8f NC |
595 | /* Parse special expressions (needed for LDI command): |
596 | xx8 (address) | |
597 | xx8 (-address) | |
598 | pm_xx8 (address) | |
599 | pm_xx8 (-address) | |
600 | where xx is: hh, hi, lo. */ | |
adde6300 | 601 | |
dc191a8f NC |
602 | static bfd_reloc_code_real_type |
603 | avr_ldi_expression (expressionS *exp) | |
604 | { | |
605 | char *str = input_line_pointer; | |
606 | char *tmp; | |
607 | char op[8]; | |
608 | int mod; | |
28c9d252 NC |
609 | int linker_stubs_should_be_generated = 0; |
610 | ||
dc191a8f | 611 | tmp = str; |
adde6300 | 612 | |
dc191a8f | 613 | str = extract_word (str, op, sizeof (op)); |
adde6300 | 614 | |
dc191a8f NC |
615 | if (op[0]) |
616 | { | |
8ad7c533 | 617 | mod_index m; |
28c9d252 | 618 | |
8ad7c533 NC |
619 | m.ptr = hash_find (avr_mod_hash, op); |
620 | mod = m.index; | |
1dab94dd | 621 | |
dc191a8f NC |
622 | if (mod) |
623 | { | |
624 | int closes = 0; | |
b170af93 | 625 | |
dc191a8f NC |
626 | mod -= 10; |
627 | str = skip_space (str); | |
00d2865b | 628 | |
dc191a8f NC |
629 | if (*str == '(') |
630 | { | |
28c9d252 | 631 | bfd_reloc_code_real_type reloc_to_return; |
dc191a8f | 632 | int neg_p = 0; |
00d2865b | 633 | |
dc191a8f | 634 | ++str; |
00d2865b | 635 | |
dc191a8f | 636 | if (strncmp ("pm(", str, 3) == 0 |
28c9d252 NC |
637 | || strncmp ("gs(",str,3) == 0 |
638 | || strncmp ("-(gs(",str,5) == 0 | |
dc191a8f NC |
639 | || strncmp ("-(pm(", str, 5) == 0) |
640 | { | |
641 | if (HAVE_PM_P (mod)) | |
642 | { | |
643 | ++mod; | |
644 | ++closes; | |
645 | } | |
646 | else | |
647 | as_bad (_("illegal expression")); | |
b170af93 | 648 | |
28c9d252 NC |
649 | if (str[0] == 'g' || str[2] == 'g') |
650 | linker_stubs_should_be_generated = 1; | |
651 | ||
dc191a8f NC |
652 | if (*str == '-') |
653 | { | |
654 | neg_p = 1; | |
655 | ++closes; | |
656 | str += 5; | |
657 | } | |
658 | else | |
659 | str += 3; | |
660 | } | |
adde6300 | 661 | |
dc191a8f NC |
662 | if (*str == '-' && *(str + 1) == '(') |
663 | { | |
664 | neg_p ^= 1; | |
665 | ++closes; | |
666 | str += 2; | |
667 | } | |
750bce0e | 668 | |
dc191a8f NC |
669 | input_line_pointer = str; |
670 | expression (exp); | |
750bce0e | 671 | |
dc191a8f NC |
672 | do |
673 | { | |
674 | if (*input_line_pointer != ')') | |
675 | { | |
676 | as_bad (_("`)' required")); | |
677 | break; | |
678 | } | |
679 | input_line_pointer++; | |
680 | } | |
681 | while (closes--); | |
682 | ||
28c9d252 NC |
683 | reloc_to_return = |
684 | neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod); | |
685 | if (linker_stubs_should_be_generated) | |
686 | { | |
687 | switch (reloc_to_return) | |
688 | { | |
689 | case BFD_RELOC_AVR_LO8_LDI_PM: | |
690 | reloc_to_return = BFD_RELOC_AVR_LO8_LDI_GS; | |
691 | break; | |
692 | case BFD_RELOC_AVR_HI8_LDI_PM: | |
693 | reloc_to_return = BFD_RELOC_AVR_HI8_LDI_GS; | |
694 | break; | |
695 | ||
696 | default: | |
0a903bab NC |
697 | /* PR 5523: Do not generate a warning here, |
698 | legitimate code can trigger this case. */ | |
699 | break; | |
28c9d252 NC |
700 | } |
701 | } | |
702 | return reloc_to_return; | |
dc191a8f NC |
703 | } |
704 | } | |
705 | } | |
750bce0e NC |
706 | |
707 | input_line_pointer = tmp; | |
708 | expression (exp); | |
709 | ||
710 | /* Warn about expressions that fail to use lo8 (). */ | |
711 | if (exp->X_op == O_constant) | |
712 | { | |
713 | int x = exp->X_add_number; | |
dc191a8f | 714 | |
750bce0e NC |
715 | if (x < -255 || x > 255) |
716 | as_warn (_("constant out of 8-bit range: %d"), x); | |
717 | } | |
dc191a8f NC |
718 | |
719 | return BFD_RELOC_AVR_LDI; | |
750bce0e NC |
720 | } |
721 | ||
df136245 | 722 | /* Parse one instruction operand. |
c6a7ab1f NC |
723 | Return operand bitmask. Also fixups can be generated. */ |
724 | ||
adde6300 | 725 | static unsigned int |
dc191a8f NC |
726 | avr_operand (struct avr_opcodes_s *opcode, |
727 | int where, | |
728 | char *op, | |
729 | char **line) | |
adde6300 | 730 | { |
adde6300 | 731 | expressionS op_expr; |
df136245 DC |
732 | unsigned int op_mask = 0; |
733 | char *str = skip_space (*line); | |
adde6300 | 734 | |
adde6300 AM |
735 | switch (*op) |
736 | { | |
737 | /* Any register operand. */ | |
738 | case 'w': | |
739 | case 'd': | |
740 | case 'r': | |
b170af93 DC |
741 | case 'a': |
742 | case 'v': | |
c6a7ab1f NC |
743 | if (*str == 'r' || *str == 'R') |
744 | { | |
745 | char r_name[20]; | |
1dab94dd | 746 | |
c6a7ab1f | 747 | str = extract_word (str, r_name, sizeof (r_name)); |
65b1d096 | 748 | op_mask = 0xff; |
3882b010 | 749 | if (ISDIGIT (r_name[1])) |
c6a7ab1f NC |
750 | { |
751 | if (r_name[2] == '\0') | |
752 | op_mask = r_name[1] - '0'; | |
753 | else if (r_name[1] != '0' | |
3882b010 | 754 | && ISDIGIT (r_name[2]) |
c6a7ab1f NC |
755 | && r_name[3] == '\0') |
756 | op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0'; | |
757 | } | |
758 | } | |
759 | else | |
760 | { | |
761 | op_mask = avr_get_constant (str, 31); | |
762 | str = input_line_pointer; | |
763 | } | |
1dab94dd | 764 | |
c6a7ab1f NC |
765 | if (op_mask <= 31) |
766 | { | |
767 | switch (*op) | |
768 | { | |
769 | case 'a': | |
770 | if (op_mask < 16 || op_mask > 23) | |
771 | as_bad (_("register r16-r23 required")); | |
772 | op_mask -= 16; | |
773 | break; | |
1dab94dd | 774 | |
c6a7ab1f NC |
775 | case 'd': |
776 | if (op_mask < 16) | |
777 | as_bad (_("register number above 15 required")); | |
778 | op_mask -= 16; | |
779 | break; | |
1dab94dd | 780 | |
c6a7ab1f NC |
781 | case 'v': |
782 | if (op_mask & 1) | |
783 | as_bad (_("even register number required")); | |
784 | op_mask >>= 1; | |
785 | break; | |
1dab94dd | 786 | |
c6a7ab1f | 787 | case 'w': |
65b1d096 | 788 | if ((op_mask & 1) || op_mask < 24) |
c6a7ab1f | 789 | as_bad (_("register r24, r26, r28 or r30 required")); |
65b1d096 | 790 | op_mask = (op_mask - 24) >> 1; |
c6a7ab1f NC |
791 | break; |
792 | } | |
793 | break; | |
794 | } | |
795 | as_bad (_("register name or number from 0 to 31 required")); | |
adde6300 AM |
796 | break; |
797 | ||
798 | case 'e': | |
799 | { | |
800 | char c; | |
1dab94dd | 801 | |
adde6300 AM |
802 | if (*str == '-') |
803 | { | |
c6a7ab1f | 804 | str = skip_space (str + 1); |
adde6300 AM |
805 | op_mask = 0x1002; |
806 | } | |
3882b010 | 807 | c = TOLOWER (*str); |
adde6300 AM |
808 | if (c == 'x') |
809 | op_mask |= 0x100c; | |
810 | else if (c == 'y') | |
811 | op_mask |= 0x8; | |
812 | else if (c != 'z') | |
00d2865b | 813 | as_bad (_("pointer register (X, Y or Z) required")); |
adde6300 | 814 | |
c6a7ab1f | 815 | str = skip_space (str + 1); |
adde6300 AM |
816 | if (*str == '+') |
817 | { | |
818 | ++str; | |
819 | if (op_mask & 2) | |
00d2865b | 820 | as_bad (_("cannot both predecrement and postincrement")); |
adde6300 AM |
821 | op_mask |= 0x1001; |
822 | } | |
e38c9cc2 | 823 | |
1188e082 | 824 | /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer |
e38c9cc2 | 825 | registers, no predecrement, no postincrement. */ |
00d2865b NC |
826 | if (!avr_opt.all_opcodes && (op_mask & 0x100F) |
827 | && !(avr_mcu->isa & AVR_ISA_SRAM)) | |
828 | as_bad (_("addressing mode not supported")); | |
adde6300 AM |
829 | } |
830 | break; | |
831 | ||
b170af93 | 832 | case 'z': |
c6a7ab1f NC |
833 | if (*str == '-') |
834 | as_bad (_("can't predecrement")); | |
1dab94dd | 835 | |
c6a7ab1f NC |
836 | if (! (*str == 'z' || *str == 'Z')) |
837 | as_bad (_("pointer register Z required")); | |
1dab94dd | 838 | |
c6a7ab1f NC |
839 | str = skip_space (str + 1); |
840 | ||
841 | if (*str == '+') | |
842 | { | |
843 | ++str; | |
844 | op_mask |= 1; | |
845 | } | |
d669d37f NC |
846 | |
847 | /* attiny26 can do "lpm" and "lpm r,Z" but not "lpm r,Z+". */ | |
848 | if (!avr_opt.all_opcodes | |
849 | && (op_mask & 0x0001) | |
850 | && !(avr_mcu->isa & AVR_ISA_MOVW)) | |
851 | as_bad (_("postincrement not supported")); | |
b170af93 DC |
852 | break; |
853 | ||
adde6300 AM |
854 | case 'b': |
855 | { | |
3882b010 | 856 | char c = TOLOWER (*str++); |
1dab94dd | 857 | |
adde6300 AM |
858 | if (c == 'y') |
859 | op_mask |= 0x8; | |
860 | else if (c != 'z') | |
00d2865b | 861 | as_bad (_("pointer register (Y or Z) required")); |
adde6300 AM |
862 | str = skip_space (str); |
863 | if (*str++ == '+') | |
864 | { | |
750bce0e NC |
865 | input_line_pointer = str; |
866 | avr_offset_expression (& op_expr); | |
adde6300 | 867 | str = input_line_pointer; |
750bce0e NC |
868 | fix_new_exp (frag_now, where, 3, |
869 | &op_expr, FALSE, BFD_RELOC_AVR_6); | |
adde6300 AM |
870 | } |
871 | } | |
872 | break; | |
873 | ||
874 | case 'h': | |
c6a7ab1f NC |
875 | str = parse_exp (str, &op_expr); |
876 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
b34976b6 | 877 | &op_expr, FALSE, BFD_RELOC_AVR_CALL); |
adde6300 AM |
878 | break; |
879 | ||
880 | case 'L': | |
c6a7ab1f NC |
881 | str = parse_exp (str, &op_expr); |
882 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
b34976b6 | 883 | &op_expr, TRUE, BFD_RELOC_AVR_13_PCREL); |
adde6300 AM |
884 | break; |
885 | ||
886 | case 'l': | |
c6a7ab1f NC |
887 | str = parse_exp (str, &op_expr); |
888 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
b34976b6 | 889 | &op_expr, TRUE, BFD_RELOC_AVR_7_PCREL); |
adde6300 AM |
890 | break; |
891 | ||
892 | case 'i': | |
c6a7ab1f NC |
893 | str = parse_exp (str, &op_expr); |
894 | fix_new_exp (frag_now, where + 2, opcode->insn_size * 2, | |
b34976b6 | 895 | &op_expr, FALSE, BFD_RELOC_16); |
adde6300 AM |
896 | break; |
897 | ||
898 | case 'M': | |
899 | { | |
900 | bfd_reloc_code_real_type r_type; | |
1dab94dd | 901 | |
c6a7ab1f NC |
902 | input_line_pointer = str; |
903 | r_type = avr_ldi_expression (&op_expr); | |
904 | str = input_line_pointer; | |
adde6300 | 905 | fix_new_exp (frag_now, where, 3, |
b34976b6 | 906 | &op_expr, FALSE, r_type); |
adde6300 AM |
907 | } |
908 | break; | |
909 | ||
910 | case 'n': | |
911 | { | |
912 | unsigned int x; | |
1dab94dd | 913 | |
adde6300 AM |
914 | x = ~avr_get_constant (str, 255); |
915 | str = input_line_pointer; | |
916 | op_mask |= (x & 0xf) | ((x << 4) & 0xf00); | |
917 | } | |
918 | break; | |
919 | ||
920 | case 'K': | |
750bce0e NC |
921 | input_line_pointer = str; |
922 | avr_offset_expression (& op_expr); | |
923 | str = input_line_pointer; | |
924 | fix_new_exp (frag_now, where, 3, | |
925 | & op_expr, FALSE, BFD_RELOC_AVR_6_ADIW); | |
adde6300 AM |
926 | break; |
927 | ||
928 | case 'S': | |
929 | case 's': | |
930 | { | |
931 | unsigned int x; | |
1dab94dd | 932 | |
adde6300 AM |
933 | x = avr_get_constant (str, 7); |
934 | str = input_line_pointer; | |
935 | if (*op == 'S') | |
936 | x <<= 4; | |
937 | op_mask |= x; | |
938 | } | |
939 | break; | |
940 | ||
941 | case 'P': | |
942 | { | |
943 | unsigned int x; | |
1dab94dd | 944 | |
adde6300 AM |
945 | x = avr_get_constant (str, 63); |
946 | str = input_line_pointer; | |
947 | op_mask |= (x & 0xf) | ((x & 0x30) << 5); | |
948 | } | |
949 | break; | |
950 | ||
951 | case 'p': | |
952 | { | |
953 | unsigned int x; | |
1dab94dd | 954 | |
adde6300 AM |
955 | x = avr_get_constant (str, 31); |
956 | str = input_line_pointer; | |
957 | op_mask |= x << 3; | |
958 | } | |
959 | break; | |
1dab94dd | 960 | |
1188e082 DC |
961 | case '?': |
962 | break; | |
1dab94dd | 963 | |
adde6300 | 964 | default: |
00d2865b | 965 | as_bad (_("unknown constraint `%c'"), *op); |
adde6300 | 966 | } |
1dab94dd | 967 | |
adde6300 AM |
968 | *line = str; |
969 | return op_mask; | |
970 | } | |
971 | ||
dc191a8f NC |
972 | /* Parse instruction operands. |
973 | Return binary opcode. */ | |
974 | ||
975 | static unsigned int | |
976 | avr_operands (struct avr_opcodes_s *opcode, char **line) | |
977 | { | |
978 | char *op = opcode->constraints; | |
979 | unsigned int bin = opcode->bin_opcode; | |
980 | char *frag = frag_more (opcode->insn_size * 2); | |
981 | char *str = *line; | |
982 | int where = frag - frag_now->fr_literal; | |
983 | static unsigned int prev = 0; /* Previous opcode. */ | |
984 | ||
985 | /* Opcode have operands. */ | |
986 | if (*op) | |
987 | { | |
988 | unsigned int reg1 = 0; | |
989 | unsigned int reg2 = 0; | |
990 | int reg1_present = 0; | |
991 | int reg2_present = 0; | |
992 | ||
993 | /* Parse first operand. */ | |
994 | if (REGISTER_P (*op)) | |
995 | reg1_present = 1; | |
996 | reg1 = avr_operand (opcode, where, op, &str); | |
997 | ++op; | |
998 | ||
999 | /* Parse second operand. */ | |
1000 | if (*op) | |
1001 | { | |
1002 | if (*op == ',') | |
1003 | ++op; | |
1004 | ||
1005 | if (*op == '=') | |
1006 | { | |
1007 | reg2 = reg1; | |
1008 | reg2_present = 1; | |
1009 | } | |
1010 | else | |
1011 | { | |
1012 | if (REGISTER_P (*op)) | |
1013 | reg2_present = 1; | |
1014 | ||
1015 | str = skip_space (str); | |
1016 | if (*str++ != ',') | |
1017 | as_bad (_("`,' required")); | |
1018 | str = skip_space (str); | |
1019 | ||
1020 | reg2 = avr_operand (opcode, where, op, &str); | |
1021 | } | |
1022 | ||
1023 | if (reg1_present && reg2_present) | |
1024 | reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200); | |
1025 | else if (reg2_present) | |
1026 | reg2 <<= 4; | |
1027 | } | |
1028 | if (reg1_present) | |
1029 | reg1 <<= 4; | |
1030 | bin |= reg1 | reg2; | |
1031 | } | |
1032 | ||
1033 | /* Detect undefined combinations (like ld r31,Z+). */ | |
1034 | if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin)) | |
1035 | as_warn (_("undefined combination of operands")); | |
1036 | ||
1037 | if (opcode->insn_size == 2) | |
1038 | { | |
1039 | /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs | |
1040 | (AVR core bug, fixed in the newer devices). */ | |
1041 | if (!(avr_opt.no_skip_bug || | |
1042 | (avr_mcu->isa & (AVR_ISA_MUL | AVR_ISA_MOVW))) | |
1043 | && AVR_SKIP_P (prev)) | |
1044 | as_warn (_("skipping two-word instruction")); | |
1045 | ||
1046 | bfd_putl32 ((bfd_vma) bin, frag); | |
1047 | } | |
1048 | else | |
1049 | bfd_putl16 ((bfd_vma) bin, frag); | |
1050 | ||
1051 | prev = bin; | |
1052 | *line = str; | |
1053 | return bin; | |
1054 | } | |
1055 | ||
adde6300 AM |
1056 | /* GAS will call this function for each section at the end of the assembly, |
1057 | to permit the CPU backend to adjust the alignment of a section. */ | |
c6a7ab1f | 1058 | |
adde6300 | 1059 | valueT |
dc191a8f | 1060 | md_section_align (asection *seg, valueT addr) |
adde6300 AM |
1061 | { |
1062 | int align = bfd_get_section_alignment (stdoutput, seg); | |
1063 | return ((addr + (1 << align) - 1) & (-1 << align)); | |
1064 | } | |
1065 | ||
1066 | /* If you define this macro, it should return the offset between the | |
1067 | address of a PC relative fixup and the position from which the PC | |
1068 | relative adjustment should be made. On many processors, the base | |
1069 | of a PC relative instruction is the next instruction, so this | |
1070 | macro would return the length of an instruction. */ | |
c6a7ab1f | 1071 | |
adde6300 | 1072 | long |
dc191a8f | 1073 | md_pcrel_from_section (fixS *fixp, segT sec) |
adde6300 | 1074 | { |
c6a7ab1f | 1075 | if (fixp->fx_addsy != (symbolS *) NULL |
adde6300 AM |
1076 | && (!S_IS_DEFINED (fixp->fx_addsy) |
1077 | || (S_GET_SEGMENT (fixp->fx_addsy) != sec))) | |
1078 | return 0; | |
1dab94dd | 1079 | |
adde6300 AM |
1080 | return fixp->fx_frag->fr_address + fixp->fx_where; |
1081 | } | |
1082 | ||
1083 | /* GAS will call this for each fixup. It should store the correct | |
c6a7ab1f NC |
1084 | value in the object file. */ |
1085 | ||
94f592af | 1086 | void |
dc191a8f | 1087 | md_apply_fix (fixS *fixP, valueT * valP, segT seg) |
adde6300 AM |
1088 | { |
1089 | unsigned char *where; | |
1090 | unsigned long insn; | |
a161fe53 | 1091 | long value = *valP; |
adde6300 | 1092 | |
94f592af NC |
1093 | if (fixP->fx_addsy == (symbolS *) NULL) |
1094 | fixP->fx_done = 1; | |
1095 | ||
87733541 AM |
1096 | else if (fixP->fx_pcrel) |
1097 | { | |
1098 | segT s = S_GET_SEGMENT (fixP->fx_addsy); | |
1099 | ||
1100 | if (s == seg || s == absolute_section) | |
1101 | { | |
1102 | value += S_GET_VALUE (fixP->fx_addsy); | |
1103 | fixP->fx_done = 1; | |
1104 | } | |
1105 | } | |
1106 | ||
a161fe53 AM |
1107 | /* We don't actually support subtracting a symbol. */ |
1108 | if (fixP->fx_subsy != (symbolS *) NULL) | |
1109 | as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex")); | |
1dab94dd | 1110 | |
94f592af | 1111 | switch (fixP->fx_r_type) |
adde6300 AM |
1112 | { |
1113 | default: | |
94f592af | 1114 | fixP->fx_no_overflow = 1; |
adde6300 AM |
1115 | break; |
1116 | case BFD_RELOC_AVR_7_PCREL: | |
1117 | case BFD_RELOC_AVR_13_PCREL: | |
1118 | case BFD_RELOC_32: | |
1119 | case BFD_RELOC_16: | |
1120 | case BFD_RELOC_AVR_CALL: | |
1121 | break; | |
1122 | } | |
1123 | ||
94f592af | 1124 | if (fixP->fx_done) |
adde6300 AM |
1125 | { |
1126 | /* Fetch the instruction, insert the fully resolved operand | |
1127 | value, and stuff the instruction back again. */ | |
2132e3a3 | 1128 | where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where; |
adde6300 AM |
1129 | insn = bfd_getl16 (where); |
1130 | ||
94f592af | 1131 | switch (fixP->fx_r_type) |
adde6300 AM |
1132 | { |
1133 | case BFD_RELOC_AVR_7_PCREL: | |
1134 | if (value & 1) | |
94f592af | 1135 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 1136 | _("odd address operand: %ld"), value); |
1dab94dd | 1137 | |
adde6300 AM |
1138 | /* Instruction addresses are always right-shifted by 1. */ |
1139 | value >>= 1; | |
1140 | --value; /* Correct PC. */ | |
1dab94dd | 1141 | |
adde6300 | 1142 | if (value < -64 || value > 63) |
94f592af | 1143 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
1144 | _("operand out of range: %ld"), value); |
1145 | value = (value << 3) & 0x3f8; | |
1146 | bfd_putl16 ((bfd_vma) (value | insn), where); | |
1147 | break; | |
1148 | ||
1149 | case BFD_RELOC_AVR_13_PCREL: | |
1150 | if (value & 1) | |
94f592af | 1151 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 1152 | _("odd address operand: %ld"), value); |
1dab94dd | 1153 | |
adde6300 AM |
1154 | /* Instruction addresses are always right-shifted by 1. */ |
1155 | value >>= 1; | |
1156 | --value; /* Correct PC. */ | |
adde6300 AM |
1157 | |
1158 | if (value < -2048 || value > 2047) | |
1159 | { | |
65aa24b6 | 1160 | /* No wrap for devices with >8K of program memory. */ |
00d2865b | 1161 | if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap) |
94f592af | 1162 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
1163 | _("operand out of range: %ld"), value); |
1164 | } | |
1165 | ||
1166 | value &= 0xfff; | |
1167 | bfd_putl16 ((bfd_vma) (value | insn), where); | |
1168 | break; | |
1169 | ||
1170 | case BFD_RELOC_32: | |
1171 | bfd_putl16 ((bfd_vma) value, where); | |
1172 | break; | |
1173 | ||
1174 | case BFD_RELOC_16: | |
1175 | bfd_putl16 ((bfd_vma) value, where); | |
1176 | break; | |
1177 | ||
17e57237 NC |
1178 | case BFD_RELOC_8: |
1179 | if (value > 255 || value < -128) | |
1180 | as_warn_where (fixP->fx_file, fixP->fx_line, | |
1181 | _("operand out of range: %ld"), value); | |
1182 | *where = value; | |
1183 | break; | |
1184 | ||
adde6300 | 1185 | case BFD_RELOC_AVR_16_PM: |
c6a7ab1f | 1186 | bfd_putl16 ((bfd_vma) (value >> 1), where); |
adde6300 AM |
1187 | break; |
1188 | ||
750bce0e NC |
1189 | case BFD_RELOC_AVR_LDI: |
1190 | if (value > 255) | |
1191 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1192 | _("operand out of range: %ld"), value); | |
1193 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where); | |
1194 | break; | |
1195 | ||
1196 | case BFD_RELOC_AVR_6: | |
1197 | if ((value > 63) || (value < 0)) | |
1198 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1199 | _("operand out of range: %ld"), value); | |
1200 | bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) | ((value & (1 << 5)) << 8)), where); | |
1201 | break; | |
1202 | ||
1203 | case BFD_RELOC_AVR_6_ADIW: | |
1204 | if ((value > 63) || (value < 0)) | |
1205 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1206 | _("operand out of range: %ld"), value); | |
1207 | bfd_putl16 ((bfd_vma) insn | (value & 0xf) | ((value & 0x30) << 2), where); | |
1208 | break; | |
1209 | ||
adde6300 AM |
1210 | case BFD_RELOC_AVR_LO8_LDI: |
1211 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where); | |
1212 | break; | |
1213 | ||
adde6300 AM |
1214 | case BFD_RELOC_AVR_HI8_LDI: |
1215 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where); | |
1216 | break; | |
1217 | ||
df406460 | 1218 | case BFD_RELOC_AVR_MS8_LDI: |
adde6300 AM |
1219 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where); |
1220 | break; | |
1221 | ||
1222 | case BFD_RELOC_AVR_HH8_LDI: | |
1223 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where); | |
1224 | break; | |
1225 | ||
1226 | case BFD_RELOC_AVR_LO8_LDI_NEG: | |
1227 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where); | |
1228 | break; | |
1229 | ||
adde6300 AM |
1230 | case BFD_RELOC_AVR_HI8_LDI_NEG: |
1231 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where); | |
1232 | break; | |
1233 | ||
df406460 | 1234 | case BFD_RELOC_AVR_MS8_LDI_NEG: |
adde6300 AM |
1235 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where); |
1236 | break; | |
1237 | ||
1238 | case BFD_RELOC_AVR_HH8_LDI_NEG: | |
1239 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where); | |
1240 | break; | |
1241 | ||
1242 | case BFD_RELOC_AVR_LO8_LDI_PM: | |
1243 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where); | |
1244 | break; | |
1245 | ||
1246 | case BFD_RELOC_AVR_HI8_LDI_PM: | |
1247 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where); | |
1248 | break; | |
1249 | ||
1250 | case BFD_RELOC_AVR_HH8_LDI_PM: | |
1251 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where); | |
1252 | break; | |
1253 | ||
1254 | case BFD_RELOC_AVR_LO8_LDI_PM_NEG: | |
1255 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where); | |
1256 | break; | |
1257 | ||
1258 | case BFD_RELOC_AVR_HI8_LDI_PM_NEG: | |
1259 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where); | |
1260 | break; | |
1261 | ||
1262 | case BFD_RELOC_AVR_HH8_LDI_PM_NEG: | |
1263 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where); | |
1264 | break; | |
1265 | ||
1266 | case BFD_RELOC_AVR_CALL: | |
1267 | { | |
1268 | unsigned long x; | |
1dab94dd | 1269 | |
adde6300 AM |
1270 | x = bfd_getl16 (where); |
1271 | if (value & 1) | |
94f592af | 1272 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
1273 | _("odd address operand: %ld"), value); |
1274 | value >>= 1; | |
1275 | x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16; | |
1276 | bfd_putl16 ((bfd_vma) x, where); | |
c6a7ab1f | 1277 | bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2); |
adde6300 AM |
1278 | } |
1279 | break; | |
1280 | ||
1281 | default: | |
c6a7ab1f | 1282 | as_fatal (_("line %d: unknown relocation type: 0x%x"), |
94f592af | 1283 | fixP->fx_line, fixP->fx_r_type); |
adde6300 AM |
1284 | break; |
1285 | } | |
1286 | } | |
1287 | else | |
1288 | { | |
a61a9fbc | 1289 | switch ((int) fixP->fx_r_type) |
adde6300 AM |
1290 | { |
1291 | case -BFD_RELOC_AVR_HI8_LDI_NEG: | |
1292 | case -BFD_RELOC_AVR_HI8_LDI: | |
1293 | case -BFD_RELOC_AVR_LO8_LDI_NEG: | |
1294 | case -BFD_RELOC_AVR_LO8_LDI: | |
94f592af | 1295 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 1296 | _("only constant expression allowed")); |
94f592af | 1297 | fixP->fx_done = 1; |
adde6300 AM |
1298 | break; |
1299 | default: | |
1300 | break; | |
1301 | } | |
adde6300 | 1302 | } |
adde6300 AM |
1303 | } |
1304 | ||
7be1c489 AM |
1305 | /* GAS will call this to generate a reloc, passing the resulting reloc |
1306 | to `bfd_install_relocation'. This currently works poorly, as | |
1307 | `bfd_install_relocation' often does the wrong thing, and instances of | |
1308 | `tc_gen_reloc' have been written to work around the problems, which | |
1309 | in turns makes it difficult to fix `bfd_install_relocation'. */ | |
adde6300 AM |
1310 | |
1311 | /* If while processing a fixup, a reloc really needs to be created | |
1312 | then it is done here. */ | |
1313 | ||
1314 | arelent * | |
dc191a8f NC |
1315 | tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, |
1316 | fixS *fixp) | |
adde6300 AM |
1317 | { |
1318 | arelent *reloc; | |
1319 | ||
df406460 NC |
1320 | if (fixp->fx_addsy && fixp->fx_subsy) |
1321 | { | |
1322 | long value = 0; | |
1323 | ||
1324 | if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy)) | |
1325 | || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section) | |
1326 | { | |
1327 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
1328 | "Difference of symbols in different sections is not supported"); | |
1329 | return NULL; | |
1330 | } | |
1331 | ||
28c9d252 | 1332 | /* We are dealing with two symbols defined in the same section. |
df406460 NC |
1333 | Let us fix-up them here. */ |
1334 | value += S_GET_VALUE (fixp->fx_addsy); | |
1335 | value -= S_GET_VALUE (fixp->fx_subsy); | |
1336 | ||
1337 | /* When fx_addsy and fx_subsy both are zero, md_apply_fix | |
1338 | only takes it's second operands for the fixup value. */ | |
1339 | fixp->fx_addsy = NULL; | |
1340 | fixp->fx_subsy = NULL; | |
1341 | md_apply_fix (fixp, (valueT *) &value, NULL); | |
1342 | ||
1343 | return NULL; | |
1344 | } | |
1345 | ||
dc191a8f | 1346 | reloc = xmalloc (sizeof (arelent)); |
adde6300 | 1347 | |
dc191a8f | 1348 | reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *)); |
adde6300 AM |
1349 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); |
1350 | ||
1351 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
1352 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
1353 | if (reloc->howto == (reloc_howto_type *) NULL) | |
1354 | { | |
1355 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
c6a7ab1f NC |
1356 | _("reloc %d not supported by object file format"), |
1357 | (int) fixp->fx_r_type); | |
adde6300 AM |
1358 | return NULL; |
1359 | } | |
1360 | ||
1361 | if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
1362 | || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
1363 | reloc->address = fixp->fx_offset; | |
1364 | ||
1365 | reloc->addend = fixp->fx_offset; | |
1366 | ||
1367 | return reloc; | |
1368 | } | |
1369 | ||
adde6300 | 1370 | void |
dc191a8f | 1371 | md_assemble (char *str) |
adde6300 | 1372 | { |
c6a7ab1f | 1373 | struct avr_opcodes_s *opcode; |
adde6300 AM |
1374 | char op[11]; |
1375 | ||
c6a7ab1f | 1376 | str = skip_space (extract_word (str, op, sizeof (op))); |
adde6300 AM |
1377 | |
1378 | if (!op[0]) | |
00d2865b | 1379 | as_bad (_("can't find opcode ")); |
adde6300 AM |
1380 | |
1381 | opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op); | |
1382 | ||
1383 | if (opcode == NULL) | |
1384 | { | |
00d2865b | 1385 | as_bad (_("unknown opcode `%s'"), op); |
adde6300 AM |
1386 | return; |
1387 | } | |
1388 | ||
b170af93 | 1389 | /* Special case for opcodes with optional operands (lpm, elpm) - |
1188e082 | 1390 | version with operands exists in avr_opcodes[] in the next entry. */ |
c6a7ab1f | 1391 | |
1188e082 DC |
1392 | if (*str && *opcode->constraints == '?') |
1393 | ++opcode; | |
b170af93 | 1394 | |
00d2865b NC |
1395 | if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa) |
1396 | as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name); | |
adde6300 | 1397 | |
d4f4f3fb AM |
1398 | dwarf2_emit_insn (0); |
1399 | ||
adde6300 AM |
1400 | /* We used to set input_line_pointer to the result of get_operands, |
1401 | but that is wrong. Our caller assumes we don't change it. */ | |
1402 | { | |
1403 | char *t = input_line_pointer; | |
dc191a8f | 1404 | |
adde6300 | 1405 | avr_operands (opcode, &str); |
b170af93 | 1406 | if (*skip_space (str)) |
00d2865b | 1407 | as_bad (_("garbage at end of line")); |
adde6300 AM |
1408 | input_line_pointer = t; |
1409 | } | |
1410 | } | |
1411 | ||
adde6300 | 1412 | /* Flag to pass `pm' mode between `avr_parse_cons_expression' and |
c6a7ab1f | 1413 | `avr_cons_fix_new'. */ |
adde6300 AM |
1414 | static int exp_mod_pm = 0; |
1415 | ||
1416 | /* Parse special CONS expression: pm (expression) | |
28c9d252 NC |
1417 | or alternatively: gs (expression). |
1418 | These are used for addressing program memory. | |
c6a7ab1f NC |
1419 | Relocation: BFD_RELOC_AVR_16_PM. */ |
1420 | ||
adde6300 | 1421 | void |
dc191a8f | 1422 | avr_parse_cons_expression (expressionS *exp, int nbytes) |
adde6300 | 1423 | { |
c6a7ab1f | 1424 | char *tmp; |
adde6300 AM |
1425 | |
1426 | exp_mod_pm = 0; | |
1427 | ||
1428 | tmp = input_line_pointer = skip_space (input_line_pointer); | |
1429 | ||
1430 | if (nbytes == 2) | |
1431 | { | |
28c9d252 NC |
1432 | char *pm_name1 = "pm"; |
1433 | char *pm_name2 = "gs"; | |
1434 | int len = strlen (pm_name1); | |
1435 | /* len must be the same for both pm identifiers. */ | |
1dab94dd | 1436 | |
28c9d252 NC |
1437 | if (strncasecmp (input_line_pointer, pm_name1, len) == 0 |
1438 | || strncasecmp (input_line_pointer, pm_name2, len) == 0) | |
adde6300 AM |
1439 | { |
1440 | input_line_pointer = skip_space (input_line_pointer + len); | |
1dab94dd | 1441 | |
adde6300 AM |
1442 | if (*input_line_pointer == '(') |
1443 | { | |
1444 | input_line_pointer = skip_space (input_line_pointer + 1); | |
1445 | exp_mod_pm = 1; | |
1446 | expression (exp); | |
1dab94dd | 1447 | |
adde6300 AM |
1448 | if (*input_line_pointer == ')') |
1449 | ++input_line_pointer; | |
1450 | else | |
1451 | { | |
00d2865b | 1452 | as_bad (_("`)' required")); |
adde6300 AM |
1453 | exp_mod_pm = 0; |
1454 | } | |
1dab94dd | 1455 | |
adde6300 AM |
1456 | return; |
1457 | } | |
1dab94dd | 1458 | |
adde6300 AM |
1459 | input_line_pointer = tmp; |
1460 | } | |
1461 | } | |
1dab94dd | 1462 | |
adde6300 AM |
1463 | expression (exp); |
1464 | } | |
1465 | ||
1466 | void | |
dc191a8f NC |
1467 | avr_cons_fix_new (fragS *frag, |
1468 | int where, | |
1469 | int nbytes, | |
1470 | expressionS *exp) | |
adde6300 AM |
1471 | { |
1472 | if (exp_mod_pm == 0) | |
1473 | { | |
17e57237 NC |
1474 | if (nbytes == 1) |
1475 | fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_8); | |
1476 | else if (nbytes == 2) | |
b34976b6 | 1477 | fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16); |
adde6300 | 1478 | else if (nbytes == 4) |
b34976b6 | 1479 | fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32); |
adde6300 | 1480 | else |
00d2865b | 1481 | as_bad (_("illegal %srelocation size: %d"), "", nbytes); |
adde6300 AM |
1482 | } |
1483 | else | |
1484 | { | |
1485 | if (nbytes == 2) | |
b34976b6 | 1486 | fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_AVR_16_PM); |
adde6300 | 1487 | else |
00d2865b | 1488 | as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes); |
adde6300 AM |
1489 | exp_mod_pm = 0; |
1490 | } | |
1491 | } |