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adde6300 AM |
1 | /* tc-avr.c -- Assembler code for the ATMEL AVR |
2 | ||
3882b010 | 3 | Copyright 1999, 2000, 2001 Free Software Foundation, Inc. |
adde6300 AM |
4 | Contributed by Denis Chertykov <denisc@overta.ru> |
5 | ||
6 | This file is part of GAS, the GNU Assembler. | |
7 | ||
8 | GAS is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2, or (at your option) | |
11 | any later version. | |
12 | ||
13 | GAS is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GAS; see the file COPYING. If not, write to | |
20 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
22 | ||
23 | #include <stdio.h> | |
adde6300 | 24 | #include "as.h" |
3882b010 | 25 | #include "safe-ctype.h" |
adde6300 AM |
26 | #include "subsegs.h" |
27 | ||
1188e082 DC |
28 | struct avr_opcodes_s |
29 | { | |
30 | char *name; | |
31 | char *constraints; | |
c6a7ab1f | 32 | int insn_size; /* In words. */ |
1188e082 DC |
33 | int isa; |
34 | unsigned int bin_opcode; | |
35 | }; | |
36 | ||
37 | #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \ | |
38 | {#NAME, CONSTR, SIZE, ISA, BIN}, | |
39 | ||
40 | struct avr_opcodes_s avr_opcodes[] = | |
41 | { | |
42 | #include "opcode/avr.h" | |
43 | {NULL, NULL, 0, 0, 0} | |
44 | }; | |
45 | ||
adde6300 AM |
46 | const char comment_chars[] = ";"; |
47 | const char line_comment_chars[] = "#"; | |
48 | const char line_separator_chars[] = "$"; | |
49 | ||
adde6300 AM |
50 | const char *md_shortopts = "m:"; |
51 | struct mcu_type_s | |
52 | { | |
53 | char *name; | |
54 | int isa; | |
55 | int mach; | |
56 | }; | |
57 | ||
1f8ae5e6 DC |
58 | /* XXX - devices that don't seem to exist (renamed, replaced with larger |
59 | ones, or planned but never produced), left here for compatibility. | |
60 | TODO: hide them in show_mcu_list output? */ | |
61 | ||
adde6300 AM |
62 | static struct mcu_type_s mcu_types[] = |
63 | { | |
b170af93 | 64 | {"avr1", AVR_ISA_TINY1, bfd_mach_avr1}, |
65aa24b6 | 65 | {"avr2", AVR_ISA_2xxx, bfd_mach_avr2}, |
b170af93 | 66 | {"avr3", AVR_ISA_M103, bfd_mach_avr3}, |
1f8ae5e6 | 67 | {"avr4", AVR_ISA_M8, bfd_mach_avr4}, |
65aa24b6 | 68 | {"avr5", AVR_ISA_ALL, bfd_mach_avr5}, |
adde6300 | 69 | {"at90s1200", AVR_ISA_1200, bfd_mach_avr1}, |
1f8ae5e6 | 70 | {"attiny10", AVR_ISA_TINY1, bfd_mach_avr1}, /* XXX -> tn11 */ |
b170af93 DC |
71 | {"attiny11", AVR_ISA_TINY1, bfd_mach_avr1}, |
72 | {"attiny12", AVR_ISA_TINY1, bfd_mach_avr1}, | |
73 | {"attiny15", AVR_ISA_TINY1, bfd_mach_avr1}, | |
74 | {"attiny28", AVR_ISA_TINY1, bfd_mach_avr1}, | |
adde6300 AM |
75 | {"at90s2313", AVR_ISA_2xxx, bfd_mach_avr2}, |
76 | {"at90s2323", AVR_ISA_2xxx, bfd_mach_avr2}, | |
1f8ae5e6 | 77 | {"at90s2333", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 4433 */ |
adde6300 | 78 | {"at90s2343", AVR_ISA_2xxx, bfd_mach_avr2}, |
bdfdba87 MM |
79 | {"attiny22", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 2343 */ |
80 | {"attiny26", AVR_ISA_2xxx, bfd_mach_avr2}, | |
adde6300 | 81 | {"at90s4433", AVR_ISA_2xxx, bfd_mach_avr2}, |
1f8ae5e6 DC |
82 | {"at90s4414", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 8515 */ |
83 | {"at90s4434", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 8535 */ | |
65aa24b6 NC |
84 | {"at90s8515", AVR_ISA_2xxx, bfd_mach_avr2}, |
85 | {"at90s8535", AVR_ISA_2xxx, bfd_mach_avr2}, | |
86 | {"at90c8534", AVR_ISA_2xxx, bfd_mach_avr2}, | |
1f8ae5e6 | 87 | {"atmega603", AVR_ISA_M603, bfd_mach_avr3}, /* XXX -> m103 */ |
b170af93 | 88 | {"atmega103", AVR_ISA_M103, bfd_mach_avr3}, |
1f8ae5e6 | 89 | {"at43usb320",AVR_ISA_M103, bfd_mach_avr3}, |
bdfdba87 | 90 | {"at43usb355",AVR_ISA_M603, bfd_mach_avr3}, |
1f8ae5e6 DC |
91 | {"at76c711", AVR_ISA_M603, bfd_mach_avr3}, |
92 | {"atmega8", AVR_ISA_M8, bfd_mach_avr4}, | |
93 | {"atmega83", AVR_ISA_M8, bfd_mach_avr4}, /* XXX -> m163 */ | |
94 | {"atmega85", AVR_ISA_M8, bfd_mach_avr4}, /* XXX -> m8 */ | |
bdfdba87 | 95 | {"atmega8515",AVR_ISA_M8, bfd_mach_avr4}, |
1f8ae5e6 | 96 | {"atmega16", AVR_ISA_M323, bfd_mach_avr5}, |
65aa24b6 | 97 | {"atmega161", AVR_ISA_M161, bfd_mach_avr5}, |
bdfdba87 | 98 | {"atmega162", AVR_ISA_M323, bfd_mach_avr5}, |
65aa24b6 | 99 | {"atmega163", AVR_ISA_M161, bfd_mach_avr5}, |
1f8ae5e6 DC |
100 | {"atmega32", AVR_ISA_M323, bfd_mach_avr5}, |
101 | {"atmega323", AVR_ISA_M323, bfd_mach_avr5}, | |
102 | {"atmega64", AVR_ISA_M323, bfd_mach_avr5}, | |
103 | {"atmega128", AVR_ISA_M128, bfd_mach_avr5}, | |
65aa24b6 | 104 | {"at94k", AVR_ISA_94K, bfd_mach_avr5}, |
adde6300 AM |
105 | {NULL, 0, 0} |
106 | }; | |
107 | ||
adde6300 AM |
108 | /* Current MCU type. */ |
109 | static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_2xxx,bfd_mach_avr2}; | |
110 | static struct mcu_type_s *avr_mcu = &default_mcu; | |
111 | ||
00d2865b NC |
112 | /* AVR target-specific switches. */ |
113 | struct avr_opt_s | |
114 | { | |
c6a7ab1f NC |
115 | int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes */ |
116 | int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns */ | |
117 | int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around */ | |
00d2865b NC |
118 | }; |
119 | ||
120 | static struct avr_opt_s avr_opt = { 0, 0, 0 }; | |
121 | ||
adde6300 AM |
122 | const char EXP_CHARS[] = "eE"; |
123 | const char FLT_CHARS[] = "dD"; | |
124 | static void avr_set_arch (int dummy); | |
125 | ||
126 | /* The target specific pseudo-ops which we support. */ | |
127 | const pseudo_typeS md_pseudo_table[] = | |
128 | { | |
129 | {"arch", avr_set_arch, 0}, | |
130 | { NULL, NULL, 0} | |
131 | }; | |
132 | ||
133 | #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00)) | |
adde6300 | 134 | |
65b1d096 DC |
135 | static void show_mcu_list PARAMS ((FILE *)); |
136 | static char *skip_space PARAMS ((char *)); | |
137 | static char *extract_word PARAMS ((char *, char *, int)); | |
138 | static unsigned int avr_operand PARAMS ((struct avr_opcodes_s *, | |
139 | int, char *, char **)); | |
140 | static unsigned int avr_operands PARAMS ((struct avr_opcodes_s *, char **)); | |
141 | static unsigned int avr_get_constant PARAMS ((char *, int)); | |
142 | static char *parse_exp PARAMS ((char *, expressionS *)); | |
143 | static bfd_reloc_code_real_type avr_ldi_expression PARAMS ((expressionS *)); | |
adde6300 | 144 | |
adde6300 AM |
145 | #define EXP_MOD_NAME(i) exp_mod[i].name |
146 | #define EXP_MOD_RELOC(i) exp_mod[i].reloc | |
147 | #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc | |
148 | #define HAVE_PM_P(i) exp_mod[i].have_pm | |
149 | ||
150 | struct exp_mod_s | |
151 | { | |
c6a7ab1f | 152 | char *name; |
adde6300 AM |
153 | bfd_reloc_code_real_type reloc; |
154 | bfd_reloc_code_real_type neg_reloc; | |
155 | int have_pm; | |
156 | }; | |
157 | ||
c6a7ab1f NC |
158 | static struct exp_mod_s exp_mod[] = |
159 | { | |
adde6300 AM |
160 | {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1}, |
161 | {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0}, | |
162 | {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1}, | |
163 | {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0}, | |
164 | {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1}, | |
165 | {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0}, | |
166 | {"hlo8", -BFD_RELOC_AVR_LO8_LDI, -BFD_RELOC_AVR_LO8_LDI_NEG, 0}, | |
167 | {"hhi8", -BFD_RELOC_AVR_HI8_LDI, -BFD_RELOC_AVR_HI8_LDI_NEG, 0}, | |
168 | }; | |
169 | ||
170 | /* Opcode hash table. */ | |
171 | static struct hash_control *avr_hash; | |
172 | ||
173 | /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */ | |
174 | static struct hash_control *avr_mod_hash; | |
175 | ||
00d2865b NC |
176 | #define OPTION_MMCU 'm' |
177 | #define OPTION_ALL_OPCODES (OPTION_MD_BASE + 1) | |
178 | #define OPTION_NO_SKIP_BUG (OPTION_MD_BASE + 2) | |
179 | #define OPTION_NO_WRAP (OPTION_MD_BASE + 3) | |
adde6300 | 180 | |
c6a7ab1f NC |
181 | struct option md_longopts[] = |
182 | { | |
00d2865b NC |
183 | { "mmcu", required_argument, NULL, OPTION_MMCU }, |
184 | { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES }, | |
185 | { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG }, | |
186 | { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP }, | |
187 | { NULL, no_argument, NULL, 0 } | |
adde6300 | 188 | }; |
adde6300 | 189 | |
c6a7ab1f | 190 | size_t md_longopts_size = sizeof (md_longopts); |
00d2865b NC |
191 | |
192 | /* Display nicely formatted list of known MCU names. */ | |
c6a7ab1f | 193 | |
00d2865b | 194 | static void |
c6a7ab1f NC |
195 | show_mcu_list (stream) |
196 | FILE *stream; | |
00d2865b NC |
197 | { |
198 | int i, x; | |
199 | ||
200 | fprintf (stream, _("Known MCU names:")); | |
201 | x = 1000; | |
1dab94dd | 202 | |
00d2865b NC |
203 | for (i = 0; mcu_types[i].name; i++) |
204 | { | |
205 | int len = strlen (mcu_types[i].name); | |
1dab94dd | 206 | |
00d2865b | 207 | x += len + 1; |
1dab94dd | 208 | |
00d2865b | 209 | if (x < 75) |
c6a7ab1f | 210 | fprintf (stream, " %s", mcu_types[i].name); |
00d2865b NC |
211 | else |
212 | { | |
213 | fprintf (stream, "\n %s", mcu_types[i].name); | |
214 | x = len + 2; | |
215 | } | |
216 | } | |
1dab94dd | 217 | |
c6a7ab1f | 218 | fprintf (stream, "\n"); |
00d2865b NC |
219 | } |
220 | ||
adde6300 AM |
221 | static inline char * |
222 | skip_space (s) | |
c6a7ab1f | 223 | char *s; |
adde6300 AM |
224 | { |
225 | while (*s == ' ' || *s == '\t') | |
226 | ++s; | |
227 | return s; | |
228 | } | |
229 | ||
230 | /* Extract one word from FROM and copy it to TO. */ | |
c6a7ab1f | 231 | |
adde6300 AM |
232 | static char * |
233 | extract_word (char *from, char *to, int limit) | |
234 | { | |
235 | char *op_start; | |
236 | char *op_end; | |
237 | int size = 0; | |
238 | ||
239 | /* Drop leading whitespace. */ | |
240 | from = skip_space (from); | |
241 | *to = 0; | |
c6a7ab1f | 242 | |
adde6300 | 243 | /* Find the op code end. */ |
c6a7ab1f | 244 | for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);) |
adde6300 AM |
245 | { |
246 | to[size++] = *op_end++; | |
247 | if (size + 1 >= limit) | |
248 | break; | |
249 | } | |
1dab94dd | 250 | |
adde6300 AM |
251 | to[size] = 0; |
252 | return op_end; | |
253 | } | |
254 | ||
255 | int | |
256 | md_estimate_size_before_relax (fragp, seg) | |
df136245 DC |
257 | fragS *fragp ATTRIBUTE_UNUSED; |
258 | asection *seg ATTRIBUTE_UNUSED; | |
adde6300 AM |
259 | { |
260 | abort (); | |
261 | return 0; | |
262 | } | |
263 | ||
264 | void | |
265 | md_show_usage (stream) | |
c6a7ab1f | 266 | FILE *stream; |
adde6300 | 267 | { |
00d2865b NC |
268 | fprintf (stream, |
269 | _("AVR options:\n" | |
adde6300 AM |
270 | " -mmcu=[avr-name] select microcontroller variant\n" |
271 | " [avr-name] can be:\n" | |
65aa24b6 NC |
272 | " avr1 - AT90S1200, ATtiny1x, ATtiny28\n" |
273 | " avr2 - AT90S2xxx, AT90S4xxx, AT90S8xxx, ATtiny22\n" | |
274 | " avr3 - ATmega103, ATmega603\n" | |
275 | " avr4 - ATmega83, ATmega85\n" | |
276 | " avr5 - ATmega161, ATmega163, ATmega32, AT94K\n" | |
adde6300 | 277 | " or immediate microcontroller name.\n")); |
00d2865b NC |
278 | fprintf (stream, |
279 | _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n" | |
280 | " -mno-skip-bug disable warnings for skipping two-word instructions\n" | |
281 | " (default for avr4, avr5)\n" | |
282 | " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n" | |
283 | " (default for avr3, avr5)\n")); | |
284 | show_mcu_list (stream); | |
adde6300 AM |
285 | } |
286 | ||
287 | static void | |
288 | avr_set_arch (dummy) | |
df136245 | 289 | int dummy ATTRIBUTE_UNUSED; |
adde6300 | 290 | { |
c6a7ab1f | 291 | char *str; |
1dab94dd | 292 | |
c6a7ab1f | 293 | str = (char *) alloca (20); |
adde6300 | 294 | input_line_pointer = extract_word (input_line_pointer, str, 20); |
00d2865b | 295 | md_parse_option (OPTION_MMCU, str); |
adde6300 AM |
296 | bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach); |
297 | } | |
298 | ||
299 | int | |
300 | md_parse_option (c, arg) | |
301 | int c; | |
302 | char *arg; | |
303 | { | |
00d2865b | 304 | switch (c) |
adde6300 | 305 | { |
00d2865b NC |
306 | case OPTION_MMCU: |
307 | { | |
308 | int i; | |
309 | char *s = alloca (strlen (arg) + 1); | |
adde6300 | 310 | |
00d2865b NC |
311 | { |
312 | char *t = s; | |
313 | char *arg1 = arg; | |
314 | ||
315 | do | |
3882b010 | 316 | *t = TOLOWER (*arg1++); |
00d2865b NC |
317 | while (*t++); |
318 | } | |
319 | ||
320 | for (i = 0; mcu_types[i].name; ++i) | |
321 | if (strcmp (mcu_types[i].name, s) == 0) | |
322 | break; | |
adde6300 | 323 | |
00d2865b NC |
324 | if (!mcu_types[i].name) |
325 | { | |
326 | show_mcu_list (stderr); | |
327 | as_fatal (_("unknown MCU: %s\n"), arg); | |
328 | } | |
65aa24b6 | 329 | |
00d2865b NC |
330 | /* It is OK to redefine mcu type within the same avr[1-5] bfd machine |
331 | type - this for allows passing -mmcu=... via gcc ASM_SPEC as well | |
332 | as .arch ... in the asm output at the same time. */ | |
00d2865b NC |
333 | if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach) |
334 | avr_mcu = &mcu_types[i]; | |
335 | else | |
336 | as_fatal (_("redefinition of mcu type `%s' to `%s'"), | |
337 | avr_mcu->name, mcu_types[i].name); | |
338 | return 1; | |
339 | } | |
340 | case OPTION_ALL_OPCODES: | |
341 | avr_opt.all_opcodes = 1; | |
342 | return 1; | |
343 | case OPTION_NO_SKIP_BUG: | |
344 | avr_opt.no_skip_bug = 1; | |
345 | return 1; | |
346 | case OPTION_NO_WRAP: | |
347 | avr_opt.no_wrap = 1; | |
adde6300 AM |
348 | return 1; |
349 | } | |
1dab94dd | 350 | |
adde6300 AM |
351 | return 0; |
352 | } | |
353 | ||
354 | symbolS * | |
c6a7ab1f | 355 | md_undefined_symbol (name) |
df136245 | 356 | char *name ATTRIBUTE_UNUSED; |
adde6300 AM |
357 | { |
358 | return 0; | |
359 | } | |
360 | ||
c6a7ab1f NC |
361 | /* Turn a string in input_line_pointer into a floating point constant |
362 | of type TYPE, and store the appropriate bytes in *LITP. The number | |
363 | of LITTLENUMS emitted is stored in *SIZEP. An error message is | |
364 | returned, or NULL on OK. */ | |
365 | ||
adde6300 AM |
366 | char * |
367 | md_atof (type, litP, sizeP) | |
368 | int type; | |
369 | char *litP; | |
370 | int *sizeP; | |
371 | { | |
372 | int prec; | |
373 | LITTLENUM_TYPE words[4]; | |
374 | LITTLENUM_TYPE *wordP; | |
375 | char *t; | |
376 | ||
377 | switch (type) | |
378 | { | |
379 | case 'f': | |
380 | prec = 2; | |
381 | break; | |
382 | case 'd': | |
383 | prec = 4; | |
384 | break; | |
385 | default: | |
386 | *sizeP = 0; | |
387 | return _("bad call to md_atof"); | |
388 | } | |
389 | ||
390 | t = atof_ieee (input_line_pointer, type, words); | |
391 | if (t) | |
392 | input_line_pointer = t; | |
393 | ||
394 | *sizeP = prec * sizeof (LITTLENUM_TYPE); | |
1dab94dd | 395 | |
adde6300 AM |
396 | /* This loop outputs the LITTLENUMs in REVERSE order. */ |
397 | for (wordP = words + prec - 1; prec--;) | |
398 | { | |
399 | md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE)); | |
400 | litP += sizeof (LITTLENUM_TYPE); | |
401 | } | |
1dab94dd | 402 | |
adde6300 AM |
403 | return NULL; |
404 | } | |
405 | ||
406 | void | |
407 | md_convert_frag (abfd, sec, fragP) | |
c6a7ab1f NC |
408 | bfd *abfd ATTRIBUTE_UNUSED; |
409 | asection *sec ATTRIBUTE_UNUSED; | |
410 | fragS *fragP ATTRIBUTE_UNUSED; | |
adde6300 AM |
411 | { |
412 | abort (); | |
413 | } | |
414 | ||
adde6300 AM |
415 | void |
416 | md_begin () | |
417 | { | |
df136245 | 418 | unsigned int i; |
adde6300 | 419 | struct avr_opcodes_s *opcode; |
c6a7ab1f | 420 | avr_hash = hash_new (); |
adde6300 AM |
421 | |
422 | /* Insert unique names into hash table. This hash table then provides a | |
423 | quick index to the first opcode with a particular name in the opcode | |
424 | table. */ | |
adde6300 AM |
425 | for (opcode = avr_opcodes; opcode->name; opcode++) |
426 | hash_insert (avr_hash, opcode->name, (char *) opcode); | |
427 | ||
428 | avr_mod_hash = hash_new (); | |
429 | ||
430 | for (i = 0; i < sizeof (exp_mod) / sizeof (exp_mod[0]); ++i) | |
c6a7ab1f NC |
431 | hash_insert (avr_mod_hash, EXP_MOD_NAME (i), (void *) (i + 10)); |
432 | ||
adde6300 AM |
433 | bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach); |
434 | } | |
435 | ||
df136245 | 436 | /* Resolve STR as a constant expression and return the result. |
c6a7ab1f | 437 | If result greater than MAX then error. */ |
df136245 DC |
438 | |
439 | static unsigned int | |
440 | avr_get_constant (str, max) | |
c6a7ab1f | 441 | char *str; |
df136245 DC |
442 | int max; |
443 | { | |
444 | expressionS ex; | |
445 | str = skip_space (str); | |
446 | input_line_pointer = str; | |
447 | expression (&ex); | |
448 | ||
449 | if (ex.X_op != O_constant) | |
450 | as_bad (_("constant value required")); | |
451 | ||
452 | if (ex.X_add_number > max || ex.X_add_number < 0) | |
c6a7ab1f | 453 | as_bad (_("number must be less than %d"), max + 1); |
1dab94dd | 454 | |
df136245 DC |
455 | return ex.X_add_number; |
456 | } | |
457 | ||
df136245 | 458 | /* Parse instruction operands. |
c6a7ab1f | 459 | Return binary opcode. */ |
df136245 | 460 | |
adde6300 AM |
461 | static unsigned int |
462 | avr_operands (opcode, line) | |
463 | struct avr_opcodes_s *opcode; | |
464 | char **line; | |
465 | { | |
466 | char *op = opcode->constraints; | |
467 | unsigned int bin = opcode->bin_opcode; | |
468 | char *frag = frag_more (opcode->insn_size * 2); | |
469 | char *str = *line; | |
470 | int where = frag - frag_now->fr_literal; | |
c6a7ab1f | 471 | static unsigned int prev = 0; /* Previous opcode. */ |
adde6300 AM |
472 | |
473 | /* Opcode have operands. */ | |
474 | if (*op) | |
475 | { | |
476 | unsigned int reg1 = 0; | |
477 | unsigned int reg2 = 0; | |
478 | int reg1_present = 0; | |
479 | int reg2_present = 0; | |
480 | ||
481 | /* Parse first operand. */ | |
482 | if (REGISTER_P (*op)) | |
483 | reg1_present = 1; | |
484 | reg1 = avr_operand (opcode, where, op, &str); | |
485 | ++op; | |
486 | ||
487 | /* Parse second operand. */ | |
488 | if (*op) | |
489 | { | |
490 | if (*op == ',') | |
491 | ++op; | |
1dab94dd | 492 | |
adde6300 AM |
493 | if (*op == '=') |
494 | { | |
495 | reg2 = reg1; | |
496 | reg2_present = 1; | |
497 | } | |
498 | else | |
499 | { | |
500 | if (REGISTER_P (*op)) | |
501 | reg2_present = 1; | |
502 | ||
503 | str = skip_space (str); | |
504 | if (*str++ != ',') | |
00d2865b | 505 | as_bad (_("`,' required")); |
adde6300 AM |
506 | str = skip_space (str); |
507 | ||
508 | reg2 = avr_operand (opcode, where, op, &str); | |
509 | ||
510 | } | |
1dab94dd | 511 | |
adde6300 AM |
512 | if (reg1_present && reg2_present) |
513 | reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200); | |
514 | else if (reg2_present) | |
515 | reg2 <<= 4; | |
516 | } | |
517 | if (reg1_present) | |
518 | reg1 <<= 4; | |
519 | bin |= reg1 | reg2; | |
520 | } | |
b170af93 | 521 | |
65b1d096 DC |
522 | /* Detect undefined combinations (like ld r31,Z+). */ |
523 | if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin)) | |
524 | as_warn (_("undefined combination of operands")); | |
00d2865b | 525 | |
adde6300 AM |
526 | if (opcode->insn_size == 2) |
527 | { | |
00d2865b NC |
528 | /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs |
529 | (AVR core bug, fixed in the newer devices). */ | |
530 | ||
65b1d096 DC |
531 | if (!(avr_opt.no_skip_bug || (avr_mcu->isa & AVR_ISA_MUL)) |
532 | && AVR_SKIP_P (prev)) | |
533 | as_warn (_("skipping two-word instruction")); | |
00d2865b | 534 | |
c6a7ab1f | 535 | bfd_putl32 ((bfd_vma) bin, frag); |
adde6300 AM |
536 | } |
537 | else | |
c6a7ab1f | 538 | bfd_putl16 ((bfd_vma) bin, frag); |
b170af93 DC |
539 | |
540 | prev = bin; | |
adde6300 AM |
541 | *line = str; |
542 | return bin; | |
543 | } | |
544 | ||
df136245 | 545 | /* Parse one instruction operand. |
c6a7ab1f NC |
546 | Return operand bitmask. Also fixups can be generated. */ |
547 | ||
adde6300 AM |
548 | static unsigned int |
549 | avr_operand (opcode, where, op, line) | |
550 | struct avr_opcodes_s *opcode; | |
551 | int where; | |
552 | char *op; | |
553 | char **line; | |
554 | { | |
adde6300 | 555 | expressionS op_expr; |
df136245 DC |
556 | unsigned int op_mask = 0; |
557 | char *str = skip_space (*line); | |
adde6300 | 558 | |
adde6300 AM |
559 | switch (*op) |
560 | { | |
561 | /* Any register operand. */ | |
562 | case 'w': | |
563 | case 'd': | |
564 | case 'r': | |
b170af93 DC |
565 | case 'a': |
566 | case 'v': | |
c6a7ab1f NC |
567 | if (*str == 'r' || *str == 'R') |
568 | { | |
569 | char r_name[20]; | |
1dab94dd | 570 | |
c6a7ab1f | 571 | str = extract_word (str, r_name, sizeof (r_name)); |
65b1d096 | 572 | op_mask = 0xff; |
3882b010 | 573 | if (ISDIGIT (r_name[1])) |
c6a7ab1f NC |
574 | { |
575 | if (r_name[2] == '\0') | |
576 | op_mask = r_name[1] - '0'; | |
577 | else if (r_name[1] != '0' | |
3882b010 | 578 | && ISDIGIT (r_name[2]) |
c6a7ab1f NC |
579 | && r_name[3] == '\0') |
580 | op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0'; | |
581 | } | |
582 | } | |
583 | else | |
584 | { | |
585 | op_mask = avr_get_constant (str, 31); | |
586 | str = input_line_pointer; | |
587 | } | |
1dab94dd | 588 | |
c6a7ab1f NC |
589 | if (op_mask <= 31) |
590 | { | |
591 | switch (*op) | |
592 | { | |
593 | case 'a': | |
594 | if (op_mask < 16 || op_mask > 23) | |
595 | as_bad (_("register r16-r23 required")); | |
596 | op_mask -= 16; | |
597 | break; | |
1dab94dd | 598 | |
c6a7ab1f NC |
599 | case 'd': |
600 | if (op_mask < 16) | |
601 | as_bad (_("register number above 15 required")); | |
602 | op_mask -= 16; | |
603 | break; | |
1dab94dd | 604 | |
c6a7ab1f NC |
605 | case 'v': |
606 | if (op_mask & 1) | |
607 | as_bad (_("even register number required")); | |
608 | op_mask >>= 1; | |
609 | break; | |
1dab94dd | 610 | |
c6a7ab1f | 611 | case 'w': |
65b1d096 | 612 | if ((op_mask & 1) || op_mask < 24) |
c6a7ab1f | 613 | as_bad (_("register r24, r26, r28 or r30 required")); |
65b1d096 | 614 | op_mask = (op_mask - 24) >> 1; |
c6a7ab1f NC |
615 | break; |
616 | } | |
617 | break; | |
618 | } | |
619 | as_bad (_("register name or number from 0 to 31 required")); | |
adde6300 AM |
620 | break; |
621 | ||
622 | case 'e': | |
623 | { | |
624 | char c; | |
1dab94dd | 625 | |
adde6300 AM |
626 | if (*str == '-') |
627 | { | |
c6a7ab1f | 628 | str = skip_space (str + 1); |
adde6300 AM |
629 | op_mask = 0x1002; |
630 | } | |
3882b010 | 631 | c = TOLOWER (*str); |
adde6300 AM |
632 | if (c == 'x') |
633 | op_mask |= 0x100c; | |
634 | else if (c == 'y') | |
635 | op_mask |= 0x8; | |
636 | else if (c != 'z') | |
00d2865b | 637 | as_bad (_("pointer register (X, Y or Z) required")); |
adde6300 | 638 | |
c6a7ab1f | 639 | str = skip_space (str + 1); |
adde6300 AM |
640 | if (*str == '+') |
641 | { | |
642 | ++str; | |
643 | if (op_mask & 2) | |
00d2865b | 644 | as_bad (_("cannot both predecrement and postincrement")); |
adde6300 AM |
645 | op_mask |= 0x1001; |
646 | } | |
e38c9cc2 | 647 | |
1188e082 | 648 | /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer |
e38c9cc2 | 649 | registers, no predecrement, no postincrement. */ |
00d2865b NC |
650 | if (!avr_opt.all_opcodes && (op_mask & 0x100F) |
651 | && !(avr_mcu->isa & AVR_ISA_SRAM)) | |
652 | as_bad (_("addressing mode not supported")); | |
adde6300 AM |
653 | } |
654 | break; | |
655 | ||
b170af93 | 656 | case 'z': |
c6a7ab1f NC |
657 | if (*str == '-') |
658 | as_bad (_("can't predecrement")); | |
1dab94dd | 659 | |
c6a7ab1f NC |
660 | if (! (*str == 'z' || *str == 'Z')) |
661 | as_bad (_("pointer register Z required")); | |
1dab94dd | 662 | |
c6a7ab1f NC |
663 | str = skip_space (str + 1); |
664 | ||
665 | if (*str == '+') | |
666 | { | |
667 | ++str; | |
668 | op_mask |= 1; | |
669 | } | |
b170af93 DC |
670 | break; |
671 | ||
adde6300 AM |
672 | case 'b': |
673 | { | |
3882b010 | 674 | char c = TOLOWER (*str++); |
1dab94dd | 675 | |
adde6300 AM |
676 | if (c == 'y') |
677 | op_mask |= 0x8; | |
678 | else if (c != 'z') | |
00d2865b | 679 | as_bad (_("pointer register (Y or Z) required")); |
adde6300 AM |
680 | str = skip_space (str); |
681 | if (*str++ == '+') | |
682 | { | |
683 | unsigned int x; | |
684 | x = avr_get_constant (str, 63); | |
685 | str = input_line_pointer; | |
686 | op_mask |= (x & 7) | ((x & (3 << 3)) << 7) | ((x & (1 << 5)) << 8); | |
687 | } | |
688 | } | |
689 | break; | |
690 | ||
691 | case 'h': | |
c6a7ab1f NC |
692 | str = parse_exp (str, &op_expr); |
693 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
694 | &op_expr, false, BFD_RELOC_AVR_CALL); | |
adde6300 AM |
695 | break; |
696 | ||
697 | case 'L': | |
c6a7ab1f NC |
698 | str = parse_exp (str, &op_expr); |
699 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
700 | &op_expr, true, BFD_RELOC_AVR_13_PCREL); | |
adde6300 AM |
701 | break; |
702 | ||
703 | case 'l': | |
c6a7ab1f NC |
704 | str = parse_exp (str, &op_expr); |
705 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
706 | &op_expr, true, BFD_RELOC_AVR_7_PCREL); | |
adde6300 AM |
707 | break; |
708 | ||
709 | case 'i': | |
c6a7ab1f NC |
710 | str = parse_exp (str, &op_expr); |
711 | fix_new_exp (frag_now, where + 2, opcode->insn_size * 2, | |
712 | &op_expr, false, BFD_RELOC_16); | |
adde6300 AM |
713 | break; |
714 | ||
715 | case 'M': | |
716 | { | |
717 | bfd_reloc_code_real_type r_type; | |
1dab94dd | 718 | |
c6a7ab1f NC |
719 | input_line_pointer = str; |
720 | r_type = avr_ldi_expression (&op_expr); | |
721 | str = input_line_pointer; | |
adde6300 AM |
722 | fix_new_exp (frag_now, where, 3, |
723 | &op_expr, false, r_type); | |
724 | } | |
725 | break; | |
726 | ||
727 | case 'n': | |
728 | { | |
729 | unsigned int x; | |
1dab94dd | 730 | |
adde6300 AM |
731 | x = ~avr_get_constant (str, 255); |
732 | str = input_line_pointer; | |
733 | op_mask |= (x & 0xf) | ((x << 4) & 0xf00); | |
734 | } | |
735 | break; | |
736 | ||
737 | case 'K': | |
738 | { | |
739 | unsigned int x; | |
1dab94dd | 740 | |
adde6300 AM |
741 | x = avr_get_constant (str, 63); |
742 | str = input_line_pointer; | |
743 | op_mask |= (x & 0xf) | ((x & 0x30) << 2); | |
744 | } | |
745 | break; | |
746 | ||
747 | case 'S': | |
748 | case 's': | |
749 | { | |
750 | unsigned int x; | |
1dab94dd | 751 | |
adde6300 AM |
752 | x = avr_get_constant (str, 7); |
753 | str = input_line_pointer; | |
754 | if (*op == 'S') | |
755 | x <<= 4; | |
756 | op_mask |= x; | |
757 | } | |
758 | break; | |
759 | ||
760 | case 'P': | |
761 | { | |
762 | unsigned int x; | |
1dab94dd | 763 | |
adde6300 AM |
764 | x = avr_get_constant (str, 63); |
765 | str = input_line_pointer; | |
766 | op_mask |= (x & 0xf) | ((x & 0x30) << 5); | |
767 | } | |
768 | break; | |
769 | ||
770 | case 'p': | |
771 | { | |
772 | unsigned int x; | |
1dab94dd | 773 | |
adde6300 AM |
774 | x = avr_get_constant (str, 31); |
775 | str = input_line_pointer; | |
776 | op_mask |= x << 3; | |
777 | } | |
778 | break; | |
1dab94dd | 779 | |
1188e082 DC |
780 | case '?': |
781 | break; | |
1dab94dd | 782 | |
adde6300 | 783 | default: |
00d2865b | 784 | as_bad (_("unknown constraint `%c'"), *op); |
adde6300 | 785 | } |
1dab94dd | 786 | |
adde6300 AM |
787 | *line = str; |
788 | return op_mask; | |
789 | } | |
790 | ||
791 | /* GAS will call this function for each section at the end of the assembly, | |
792 | to permit the CPU backend to adjust the alignment of a section. */ | |
c6a7ab1f | 793 | |
adde6300 AM |
794 | valueT |
795 | md_section_align (seg, addr) | |
796 | asection *seg; | |
797 | valueT addr; | |
798 | { | |
799 | int align = bfd_get_section_alignment (stdoutput, seg); | |
800 | return ((addr + (1 << align) - 1) & (-1 << align)); | |
801 | } | |
802 | ||
803 | /* If you define this macro, it should return the offset between the | |
804 | address of a PC relative fixup and the position from which the PC | |
805 | relative adjustment should be made. On many processors, the base | |
806 | of a PC relative instruction is the next instruction, so this | |
807 | macro would return the length of an instruction. */ | |
c6a7ab1f | 808 | |
adde6300 AM |
809 | long |
810 | md_pcrel_from_section (fixp, sec) | |
811 | fixS *fixp; | |
812 | segT sec; | |
813 | { | |
c6a7ab1f | 814 | if (fixp->fx_addsy != (symbolS *) NULL |
adde6300 AM |
815 | && (!S_IS_DEFINED (fixp->fx_addsy) |
816 | || (S_GET_SEGMENT (fixp->fx_addsy) != sec))) | |
817 | return 0; | |
1dab94dd | 818 | |
adde6300 AM |
819 | return fixp->fx_frag->fr_address + fixp->fx_where; |
820 | } | |
821 | ||
822 | /* GAS will call this for each fixup. It should store the correct | |
c6a7ab1f NC |
823 | value in the object file. */ |
824 | ||
94f592af NC |
825 | void |
826 | md_apply_fix3 (fixP, valP, seg) | |
827 | fixS *fixP; | |
828 | valueT * valP; | |
adde6300 AM |
829 | segT seg; |
830 | { | |
831 | unsigned char *where; | |
832 | unsigned long insn; | |
94f592af | 833 | long value = * (long *) valP; |
adde6300 | 834 | |
94f592af NC |
835 | if (fixP->fx_addsy == (symbolS *) NULL) |
836 | fixP->fx_done = 1; | |
837 | ||
838 | else if (fixP->fx_pcrel) | |
adde6300 | 839 | { |
94f592af | 840 | segT s = S_GET_SEGMENT (fixP->fx_addsy); |
1dab94dd | 841 | |
94f592af | 842 | if (fixP->fx_addsy && (s == seg || s == absolute_section)) |
adde6300 | 843 | { |
a6567fe0 | 844 | value += S_GET_VALUE (fixP->fx_addsy); |
94f592af | 845 | fixP->fx_done = 1; |
adde6300 | 846 | } |
adde6300 AM |
847 | } |
848 | else | |
849 | { | |
94f592af | 850 | value = fixP->fx_offset; |
1dab94dd | 851 | |
94f592af | 852 | if (fixP->fx_subsy != (symbolS *) NULL) |
adde6300 | 853 | { |
94f592af | 854 | if (S_GET_SEGMENT (fixP->fx_subsy) == absolute_section) |
adde6300 | 855 | { |
94f592af NC |
856 | value -= S_GET_VALUE (fixP->fx_subsy); |
857 | fixP->fx_done = 1; | |
adde6300 AM |
858 | } |
859 | else | |
860 | { | |
861 | /* We don't actually support subtracting a symbol. */ | |
94f592af | 862 | as_bad_where (fixP->fx_file, fixP->fx_line, |
00d2865b | 863 | _("expression too complex")); |
adde6300 AM |
864 | } |
865 | } | |
866 | } | |
1dab94dd | 867 | |
94f592af | 868 | switch (fixP->fx_r_type) |
adde6300 AM |
869 | { |
870 | default: | |
94f592af | 871 | fixP->fx_no_overflow = 1; |
adde6300 AM |
872 | break; |
873 | case BFD_RELOC_AVR_7_PCREL: | |
874 | case BFD_RELOC_AVR_13_PCREL: | |
875 | case BFD_RELOC_32: | |
876 | case BFD_RELOC_16: | |
877 | case BFD_RELOC_AVR_CALL: | |
878 | break; | |
879 | } | |
880 | ||
94f592af | 881 | if (fixP->fx_done) |
adde6300 AM |
882 | { |
883 | /* Fetch the instruction, insert the fully resolved operand | |
884 | value, and stuff the instruction back again. */ | |
94f592af | 885 | where = fixP->fx_frag->fr_literal + fixP->fx_where; |
adde6300 AM |
886 | insn = bfd_getl16 (where); |
887 | ||
94f592af | 888 | switch (fixP->fx_r_type) |
adde6300 AM |
889 | { |
890 | case BFD_RELOC_AVR_7_PCREL: | |
891 | if (value & 1) | |
94f592af | 892 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 893 | _("odd address operand: %ld"), value); |
1dab94dd | 894 | |
adde6300 AM |
895 | /* Instruction addresses are always right-shifted by 1. */ |
896 | value >>= 1; | |
897 | --value; /* Correct PC. */ | |
1dab94dd | 898 | |
adde6300 | 899 | if (value < -64 || value > 63) |
94f592af | 900 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
901 | _("operand out of range: %ld"), value); |
902 | value = (value << 3) & 0x3f8; | |
903 | bfd_putl16 ((bfd_vma) (value | insn), where); | |
904 | break; | |
905 | ||
906 | case BFD_RELOC_AVR_13_PCREL: | |
907 | if (value & 1) | |
94f592af | 908 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 909 | _("odd address operand: %ld"), value); |
1dab94dd | 910 | |
adde6300 AM |
911 | /* Instruction addresses are always right-shifted by 1. */ |
912 | value >>= 1; | |
913 | --value; /* Correct PC. */ | |
adde6300 AM |
914 | |
915 | if (value < -2048 || value > 2047) | |
916 | { | |
65aa24b6 | 917 | /* No wrap for devices with >8K of program memory. */ |
00d2865b | 918 | if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap) |
94f592af | 919 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
920 | _("operand out of range: %ld"), value); |
921 | } | |
922 | ||
923 | value &= 0xfff; | |
924 | bfd_putl16 ((bfd_vma) (value | insn), where); | |
925 | break; | |
926 | ||
927 | case BFD_RELOC_32: | |
928 | bfd_putl16 ((bfd_vma) value, where); | |
929 | break; | |
930 | ||
931 | case BFD_RELOC_16: | |
932 | bfd_putl16 ((bfd_vma) value, where); | |
933 | break; | |
934 | ||
935 | case BFD_RELOC_AVR_16_PM: | |
c6a7ab1f | 936 | bfd_putl16 ((bfd_vma) (value >> 1), where); |
adde6300 AM |
937 | break; |
938 | ||
939 | case BFD_RELOC_AVR_LO8_LDI: | |
940 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where); | |
941 | break; | |
942 | ||
943 | case -BFD_RELOC_AVR_LO8_LDI: | |
944 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where); | |
945 | break; | |
946 | ||
947 | case BFD_RELOC_AVR_HI8_LDI: | |
948 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where); | |
949 | break; | |
950 | ||
951 | case -BFD_RELOC_AVR_HI8_LDI: | |
952 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where); | |
953 | break; | |
954 | ||
955 | case BFD_RELOC_AVR_HH8_LDI: | |
956 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where); | |
957 | break; | |
958 | ||
959 | case BFD_RELOC_AVR_LO8_LDI_NEG: | |
960 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where); | |
961 | break; | |
962 | ||
963 | case -BFD_RELOC_AVR_LO8_LDI_NEG: | |
964 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where); | |
965 | break; | |
966 | ||
967 | case BFD_RELOC_AVR_HI8_LDI_NEG: | |
968 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where); | |
969 | break; | |
970 | ||
971 | case -BFD_RELOC_AVR_HI8_LDI_NEG: | |
972 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where); | |
973 | break; | |
974 | ||
975 | case BFD_RELOC_AVR_HH8_LDI_NEG: | |
976 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where); | |
977 | break; | |
978 | ||
979 | case BFD_RELOC_AVR_LO8_LDI_PM: | |
980 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where); | |
981 | break; | |
982 | ||
983 | case BFD_RELOC_AVR_HI8_LDI_PM: | |
984 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where); | |
985 | break; | |
986 | ||
987 | case BFD_RELOC_AVR_HH8_LDI_PM: | |
988 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where); | |
989 | break; | |
990 | ||
991 | case BFD_RELOC_AVR_LO8_LDI_PM_NEG: | |
992 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where); | |
993 | break; | |
994 | ||
995 | case BFD_RELOC_AVR_HI8_LDI_PM_NEG: | |
996 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where); | |
997 | break; | |
998 | ||
999 | case BFD_RELOC_AVR_HH8_LDI_PM_NEG: | |
1000 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where); | |
1001 | break; | |
1002 | ||
1003 | case BFD_RELOC_AVR_CALL: | |
1004 | { | |
1005 | unsigned long x; | |
1dab94dd | 1006 | |
adde6300 AM |
1007 | x = bfd_getl16 (where); |
1008 | if (value & 1) | |
94f592af | 1009 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
1010 | _("odd address operand: %ld"), value); |
1011 | value >>= 1; | |
1012 | x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16; | |
1013 | bfd_putl16 ((bfd_vma) x, where); | |
c6a7ab1f | 1014 | bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2); |
adde6300 AM |
1015 | } |
1016 | break; | |
1017 | ||
1018 | default: | |
c6a7ab1f | 1019 | as_fatal (_("line %d: unknown relocation type: 0x%x"), |
94f592af | 1020 | fixP->fx_line, fixP->fx_r_type); |
adde6300 AM |
1021 | break; |
1022 | } | |
1023 | } | |
1024 | else | |
1025 | { | |
94f592af | 1026 | switch (fixP->fx_r_type) |
adde6300 AM |
1027 | { |
1028 | case -BFD_RELOC_AVR_HI8_LDI_NEG: | |
1029 | case -BFD_RELOC_AVR_HI8_LDI: | |
1030 | case -BFD_RELOC_AVR_LO8_LDI_NEG: | |
1031 | case -BFD_RELOC_AVR_LO8_LDI: | |
94f592af | 1032 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 1033 | _("only constant expression allowed")); |
94f592af | 1034 | fixP->fx_done = 1; |
adde6300 AM |
1035 | break; |
1036 | default: | |
1037 | break; | |
1038 | } | |
94f592af | 1039 | fixP->fx_addnumber = value; |
adde6300 | 1040 | } |
adde6300 AM |
1041 | } |
1042 | ||
adde6300 AM |
1043 | /* A `BFD_ASSEMBLER' GAS will call this to generate a reloc. GAS |
1044 | will pass the resulting reloc to `bfd_install_relocation'. This | |
1045 | currently works poorly, as `bfd_install_relocation' often does the | |
1046 | wrong thing, and instances of `tc_gen_reloc' have been written to | |
1047 | work around the problems, which in turns makes it difficult to fix | |
c6a7ab1f | 1048 | `bfd_install_relocation'. */ |
adde6300 AM |
1049 | |
1050 | /* If while processing a fixup, a reloc really needs to be created | |
1051 | then it is done here. */ | |
1052 | ||
1053 | arelent * | |
1054 | tc_gen_reloc (seg, fixp) | |
df136245 | 1055 | asection *seg ATTRIBUTE_UNUSED; |
adde6300 AM |
1056 | fixS *fixp; |
1057 | { | |
1058 | arelent *reloc; | |
1059 | ||
1060 | reloc = (arelent *) xmalloc (sizeof (arelent)); | |
1061 | ||
1062 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); | |
1063 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
1064 | ||
1065 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
1066 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
1067 | if (reloc->howto == (reloc_howto_type *) NULL) | |
1068 | { | |
1069 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
c6a7ab1f NC |
1070 | _("reloc %d not supported by object file format"), |
1071 | (int) fixp->fx_r_type); | |
adde6300 AM |
1072 | return NULL; |
1073 | } | |
1074 | ||
1075 | if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
1076 | || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
1077 | reloc->address = fixp->fx_offset; | |
1078 | ||
1079 | reloc->addend = fixp->fx_offset; | |
1080 | ||
1081 | return reloc; | |
1082 | } | |
1083 | ||
adde6300 AM |
1084 | void |
1085 | md_assemble (str) | |
1086 | char *str; | |
1087 | { | |
c6a7ab1f | 1088 | struct avr_opcodes_s *opcode; |
adde6300 AM |
1089 | char op[11]; |
1090 | ||
c6a7ab1f | 1091 | str = skip_space (extract_word (str, op, sizeof (op))); |
adde6300 AM |
1092 | |
1093 | if (!op[0]) | |
00d2865b | 1094 | as_bad (_("can't find opcode ")); |
adde6300 AM |
1095 | |
1096 | opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op); | |
1097 | ||
1098 | if (opcode == NULL) | |
1099 | { | |
00d2865b | 1100 | as_bad (_("unknown opcode `%s'"), op); |
adde6300 AM |
1101 | return; |
1102 | } | |
1103 | ||
b170af93 | 1104 | /* Special case for opcodes with optional operands (lpm, elpm) - |
1188e082 | 1105 | version with operands exists in avr_opcodes[] in the next entry. */ |
c6a7ab1f | 1106 | |
1188e082 DC |
1107 | if (*str && *opcode->constraints == '?') |
1108 | ++opcode; | |
b170af93 | 1109 | |
00d2865b NC |
1110 | if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa) |
1111 | as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name); | |
adde6300 AM |
1112 | |
1113 | /* We used to set input_line_pointer to the result of get_operands, | |
1114 | but that is wrong. Our caller assumes we don't change it. */ | |
1115 | { | |
1116 | char *t = input_line_pointer; | |
1117 | avr_operands (opcode, &str); | |
b170af93 | 1118 | if (*skip_space (str)) |
00d2865b | 1119 | as_bad (_("garbage at end of line")); |
adde6300 AM |
1120 | input_line_pointer = t; |
1121 | } | |
1122 | } | |
1123 | ||
1124 | /* Parse ordinary expression. */ | |
c6a7ab1f | 1125 | |
adde6300 AM |
1126 | static char * |
1127 | parse_exp (s, op) | |
1128 | char *s; | |
c6a7ab1f | 1129 | expressionS *op; |
adde6300 AM |
1130 | { |
1131 | input_line_pointer = s; | |
1132 | expression (op); | |
1133 | if (op->X_op == O_absent) | |
1134 | as_bad (_("missing operand")); | |
1135 | return input_line_pointer; | |
1136 | } | |
1137 | ||
adde6300 AM |
1138 | /* Parse special expressions (needed for LDI command): |
1139 | xx8 (address) | |
1140 | xx8 (-address) | |
1141 | pm_xx8 (address) | |
1142 | pm_xx8 (-address) | |
c6a7ab1f NC |
1143 | where xx is: hh, hi, lo. */ |
1144 | ||
adde6300 AM |
1145 | static bfd_reloc_code_real_type |
1146 | avr_ldi_expression (exp) | |
1147 | expressionS *exp; | |
1148 | { | |
1149 | char *str = input_line_pointer; | |
1150 | char *tmp; | |
1151 | char op[8]; | |
1152 | int mod; | |
1153 | tmp = str; | |
1154 | ||
1155 | str = extract_word (str, op, sizeof (op)); | |
1dab94dd | 1156 | |
adde6300 AM |
1157 | if (op[0]) |
1158 | { | |
1159 | mod = (int) hash_find (avr_mod_hash, op); | |
1dab94dd | 1160 | |
adde6300 AM |
1161 | if (mod) |
1162 | { | |
1163 | int closes = 0; | |
1dab94dd | 1164 | |
adde6300 AM |
1165 | mod -= 10; |
1166 | str = skip_space (str); | |
1dab94dd | 1167 | |
adde6300 AM |
1168 | if (*str == '(') |
1169 | { | |
1170 | int neg_p = 0; | |
1dab94dd | 1171 | |
adde6300 | 1172 | ++str; |
1dab94dd | 1173 | |
adde6300 AM |
1174 | if (strncmp ("pm(", str, 3) == 0 |
1175 | || strncmp ("-(pm(", str, 5) == 0) | |
1176 | { | |
c6a7ab1f | 1177 | if (HAVE_PM_P (mod)) |
adde6300 AM |
1178 | { |
1179 | ++mod; | |
1180 | ++closes; | |
1181 | } | |
1182 | else | |
00d2865b | 1183 | as_bad (_("illegal expression")); |
1dab94dd | 1184 | |
adde6300 AM |
1185 | if (*str == '-') |
1186 | { | |
1187 | neg_p = 1; | |
1188 | ++closes; | |
1189 | str += 5; | |
1190 | } | |
1191 | else | |
1192 | str += 3; | |
1193 | } | |
1dab94dd | 1194 | |
adde6300 AM |
1195 | if (*str == '-' && *(str + 1) == '(') |
1196 | { | |
1197 | neg_p ^= 1; | |
1198 | ++closes; | |
1199 | str += 2; | |
1200 | } | |
1dab94dd | 1201 | |
adde6300 AM |
1202 | input_line_pointer = str; |
1203 | expression (exp); | |
1dab94dd | 1204 | |
adde6300 AM |
1205 | do |
1206 | { | |
1207 | if (*input_line_pointer != ')') | |
1208 | { | |
00d2865b | 1209 | as_bad (_("`)' required")); |
adde6300 AM |
1210 | break; |
1211 | } | |
1212 | input_line_pointer++; | |
1213 | } | |
1214 | while (closes--); | |
1dab94dd | 1215 | |
adde6300 AM |
1216 | return neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod); |
1217 | } | |
1218 | } | |
1219 | } | |
1dab94dd | 1220 | |
adde6300 AM |
1221 | input_line_pointer = tmp; |
1222 | expression (exp); | |
00d2865b | 1223 | |
c6a7ab1f | 1224 | /* Warn about expressions that fail to use lo8 (). */ |
00d2865b NC |
1225 | if (exp->X_op == O_constant) |
1226 | { | |
1227 | int x = exp->X_add_number; | |
1228 | if (x < -255 || x > 255) | |
1229 | as_warn (_("constant out of 8-bit range: %d"), x); | |
1230 | } | |
1231 | else | |
1232 | as_warn (_("expression possibly out of 8-bit range")); | |
1233 | ||
adde6300 AM |
1234 | return BFD_RELOC_AVR_LO8_LDI; |
1235 | } | |
1236 | ||
1237 | /* Flag to pass `pm' mode between `avr_parse_cons_expression' and | |
c6a7ab1f | 1238 | `avr_cons_fix_new'. */ |
adde6300 AM |
1239 | static int exp_mod_pm = 0; |
1240 | ||
1241 | /* Parse special CONS expression: pm (expression) | |
1242 | which is used for addressing to a program memory. | |
c6a7ab1f NC |
1243 | Relocation: BFD_RELOC_AVR_16_PM. */ |
1244 | ||
adde6300 AM |
1245 | void |
1246 | avr_parse_cons_expression (exp, nbytes) | |
1247 | expressionS *exp; | |
1248 | int nbytes; | |
1249 | { | |
c6a7ab1f | 1250 | char *tmp; |
adde6300 AM |
1251 | |
1252 | exp_mod_pm = 0; | |
1253 | ||
1254 | tmp = input_line_pointer = skip_space (input_line_pointer); | |
1255 | ||
1256 | if (nbytes == 2) | |
1257 | { | |
c6a7ab1f | 1258 | char *pm_name = "pm"; |
adde6300 | 1259 | int len = strlen (pm_name); |
1dab94dd | 1260 | |
adde6300 AM |
1261 | if (strncasecmp (input_line_pointer, pm_name, len) == 0) |
1262 | { | |
1263 | input_line_pointer = skip_space (input_line_pointer + len); | |
1dab94dd | 1264 | |
adde6300 AM |
1265 | if (*input_line_pointer == '(') |
1266 | { | |
1267 | input_line_pointer = skip_space (input_line_pointer + 1); | |
1268 | exp_mod_pm = 1; | |
1269 | expression (exp); | |
1dab94dd | 1270 | |
adde6300 AM |
1271 | if (*input_line_pointer == ')') |
1272 | ++input_line_pointer; | |
1273 | else | |
1274 | { | |
00d2865b | 1275 | as_bad (_("`)' required")); |
adde6300 AM |
1276 | exp_mod_pm = 0; |
1277 | } | |
1dab94dd | 1278 | |
adde6300 AM |
1279 | return; |
1280 | } | |
1dab94dd | 1281 | |
adde6300 AM |
1282 | input_line_pointer = tmp; |
1283 | } | |
1284 | } | |
1dab94dd | 1285 | |
adde6300 AM |
1286 | expression (exp); |
1287 | } | |
1288 | ||
1289 | void | |
c6a7ab1f | 1290 | avr_cons_fix_new (frag, where, nbytes, exp) |
adde6300 AM |
1291 | fragS *frag; |
1292 | int where; | |
1293 | int nbytes; | |
1294 | expressionS *exp; | |
1295 | { | |
1296 | if (exp_mod_pm == 0) | |
1297 | { | |
1298 | if (nbytes == 2) | |
1299 | fix_new_exp (frag, where, nbytes, exp, false, BFD_RELOC_16); | |
1300 | else if (nbytes == 4) | |
1301 | fix_new_exp (frag, where, nbytes, exp, false, BFD_RELOC_32); | |
1302 | else | |
00d2865b | 1303 | as_bad (_("illegal %srelocation size: %d"), "", nbytes); |
adde6300 AM |
1304 | } |
1305 | else | |
1306 | { | |
1307 | if (nbytes == 2) | |
1308 | fix_new_exp (frag, where, nbytes, exp, false, BFD_RELOC_AVR_16_PM); | |
1309 | else | |
00d2865b | 1310 | as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes); |
adde6300 AM |
1311 | exp_mod_pm = 0; |
1312 | } | |
1313 | } |