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ee86248c 1/* tc-i386.c -- Assemble Intel syntax code for ix86/x86-64
fd67aa11 2 Copyright (C) 2009-2024 Free Software Foundation, Inc.
ee86248c
JB
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to the Free
18 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
19 02110-1301, USA. */
20
21static struct
22 {
23 operatorT op_modifier; /* Operand modifier. */
24 int is_mem; /* 1 if operand is memory reference. */
25303607 25 int is_indirect; /* 1 if operand is indirect reference. */
6cee4cda 26 int has_offset; /* 1 if operand has offset. */
ee86248c
JB
27 unsigned int in_offset; /* >=1 if processing operand of offset. */
28 unsigned int in_bracket; /* >=1 if processing operand in brackets. */
33eaf5de 29 unsigned int in_scale; /* >=1 if processing multiplication operand
ee86248c
JB
30 * in brackets. */
31 i386_operand_type reloc_types; /* Value obtained from lex_got(). */
32 const reg_entry *base; /* Base register (if any). */
33 const reg_entry *index; /* Index register (if any). */
34 offsetT scale_factor; /* Accumulated scale factor. */
35 symbolS *seg;
36 }
37intel_state;
38
39/* offset X_add_symbol */
40#define O_offset O_md32
7ac3eb25
L
41/* offset X_add_symbol */
42#define O_short O_md31
43/* near ptr X_add_symbol */
44#define O_near_ptr O_md30
45/* far ptr X_add_symbol */
46#define O_far_ptr O_md29
ee86248c 47/* byte ptr X_add_symbol */
7ac3eb25 48#define O_byte_ptr O_md28
ee86248c 49/* word ptr X_add_symbol */
7ac3eb25 50#define O_word_ptr O_md27
ee86248c 51/* dword ptr X_add_symbol */
7ac3eb25 52#define O_dword_ptr O_md26
ee86248c 53/* qword ptr X_add_symbol */
7ac3eb25 54#define O_qword_ptr O_md25
f2f5811f
JB
55/* mmword ptr X_add_symbol */
56#define O_mmword_ptr O_qword_ptr
ee86248c 57/* fword ptr X_add_symbol */
7456d03d 58#define O_fword_ptr O_md24
ee86248c 59/* tbyte ptr X_add_symbol */
7456d03d
JB
60#define O_tbyte_ptr O_md23
61/* oword ptr X_add_symbol */
62#define O_oword_ptr O_md22
ee86248c 63/* xmmword ptr X_add_symbol */
7456d03d 64#define O_xmmword_ptr O_oword_ptr
ee86248c 65/* ymmword ptr X_add_symbol */
7456d03d 66#define O_ymmword_ptr O_md21
43234a1e 67/* zmmword ptr X_add_symbol */
7456d03d 68#define O_zmmword_ptr O_md20
ee86248c
JB
69
70static struct
71 {
72 const char *name;
1e9cc1c2 73 operatorT op;
ee86248c
JB
74 unsigned int operands;
75 }
76const i386_operators[] =
77 {
78 { "and", O_bit_and, 2 },
79 { "eq", O_eq, 2 },
80 { "ge", O_ge, 2 },
81 { "gt", O_gt, 2 },
82 { "le", O_le, 2 },
83 { "lt", O_lt, 2 },
84 { "mod", O_modulus, 2 },
85 { "ne", O_ne, 2 },
86 { "not", O_bit_not, 1 },
87 { "offset", O_offset, 1 },
88 { "or", O_bit_inclusive_or, 2 },
89 { "shl", O_left_shift, 2 },
90 { "short", O_short, 1 },
91 { "shr", O_right_shift, 2 },
92 { "xor", O_bit_exclusive_or, 2 },
93 { NULL, O_illegal, 0 }
94 };
95
96static struct
97 {
98 const char *name;
1e9cc1c2 99 operatorT op;
ee86248c
JB
100 unsigned short sz[3];
101 }
102const i386_types[] =
103 {
104#define I386_TYPE(t, n) { #t, O_##t##_ptr, { n, n, n } }
105 I386_TYPE(byte, 1),
106 I386_TYPE(word, 2),
107 I386_TYPE(dword, 4),
108 I386_TYPE(fword, 6),
109 I386_TYPE(qword, 8),
f2f5811f 110 I386_TYPE(mmword, 8),
ee86248c
JB
111 I386_TYPE(tbyte, 10),
112 I386_TYPE(oword, 16),
113 I386_TYPE(xmmword, 16),
114 I386_TYPE(ymmword, 32),
43234a1e 115 I386_TYPE(zmmword, 64),
ee86248c
JB
116#undef I386_TYPE
117 { "near", O_near_ptr, { 0xff04, 0xff02, 0xff08 } },
118 { "far", O_far_ptr, { 0xff06, 0xff05, 0xff06 } },
119 { NULL, O_illegal, { 0, 0, 0 } }
120 };
121
122operatorT i386_operator (const char *name, unsigned int operands, char *pc)
123{
124 unsigned int j;
125
b3983e5f
JB
126#ifdef SVR4_COMMENT_CHARS
127 if (!name && operands == 2 && *input_line_pointer == '\\')
128 switch (input_line_pointer[1])
129 {
130 case '/': input_line_pointer += 2; return O_divide;
131 case '%': input_line_pointer += 2; return O_modulus;
132 case '*': input_line_pointer += 2; return O_multiply;
133 }
134#endif
135
ee86248c
JB
136 if (!intel_syntax)
137 return O_absent;
138
139 if (!name)
140 {
141 if (operands != 2)
142 return O_illegal;
143 switch (*input_line_pointer)
144 {
145 case ':':
146 ++input_line_pointer;
147 return O_full_ptr;
148 case '[':
149 ++input_line_pointer;
150 return O_index;
151 case '@':
152 if (this_operand >= 0 && i.reloc[this_operand] == NO_RELOC)
153 {
154 int adjust = 0;
155 char *gotfree_input_line = lex_got (&i.reloc[this_operand],
156 &adjust,
d258b828 157 &intel_state.reloc_types);
ee86248c
JB
158
159 if (!gotfree_input_line)
160 break;
161 free (gotfree_input_line);
162 *input_line_pointer++ = '+';
163 memset (input_line_pointer, '0', adjust - 1);
164 input_line_pointer[adjust - 1] = ' ';
165 return O_add;
166 }
167 break;
168 }
169 return O_illegal;
170 }
171
6acf9130
JB
172 /* See the quotation related comment in i386_parse_name(). */
173 if (*pc == '"')
174 return O_absent;
175
ee86248c 176 for (j = 0; i386_operators[j].name; ++j)
91d6fa6a 177 if (strcasecmp (i386_operators[j].name, name) == 0)
ee86248c
JB
178 {
179 if (i386_operators[j].operands
180 && i386_operators[j].operands != operands)
181 return O_illegal;
1e9cc1c2 182 return i386_operators[j].op;
ee86248c
JB
183 }
184
185 for (j = 0; i386_types[j].name; ++j)
91d6fa6a 186 if (strcasecmp (i386_types[j].name, name) == 0)
ee86248c 187 break;
d02603dc 188
ee86248c
JB
189 if (i386_types[j].name && *pc == ' ')
190 {
a4f8c177 191 const char *start = ++input_line_pointer;
d02603dc 192 char *pname;
a4f8c177 193 char c = get_symbol_name (&pname);
d02603dc 194
a4f8c177 195 if (strcasecmp (pname, "ptr") == 0 && (c != '"' || pname == start))
ee86248c 196 {
91d6fa6a 197 pname[-1] = *pc;
ee86248c
JB
198 *pc = c;
199 if (intel_syntax > 0 || operands != 1)
200 return O_illegal;
1e9cc1c2 201 return i386_types[j].op;
ee86248c
JB
202 }
203
a4f8c177 204 if (strcasecmp (pname, "bcst") == 0 && (c != '"' || pname == start))
a5748e0d 205 {
a5748e0d
JB
206 pname[-1] = *pc;
207 *pc = c;
208 if (intel_syntax > 0 || operands != 1
209 || i386_types[j].sz[0] > 8
210 || (i386_types[j].sz[0] & (i386_types[j].sz[0] - 1)))
211 return O_illegal;
e346d50a
JB
212 if (i.encoding == encoding_default)
213 i.encoding = encoding_evex;
214 else if (i.encoding != encoding_evex
215 && i.encoding != encoding_evex512)
a6f3add0 216 return O_illegal;
a5748e0d
JB
217 if (!i.broadcast.bytes && !i.broadcast.type)
218 {
219 i.broadcast.bytes = i386_types[j].sz[0];
220 i.broadcast.operand = this_operand;
221 }
222 return i386_types[j].op;
223 }
224
d02603dc 225 (void) restore_line_pointer (c);
91d6fa6a 226 input_line_pointer = pname - 1;
ee86248c
JB
227 }
228
229 return O_absent;
230}
231
232static int i386_intel_parse_name (const char *name, expressionS *e)
233{
91d6fa6a 234 unsigned int j;
ee86248c 235
b7adb16d
JB
236 if (! strcmp (name, "$"))
237 {
238 current_location (e);
239 return 1;
240 }
241
91d6fa6a
NC
242 for (j = 0; i386_types[j].name; ++j)
243 if (strcasecmp(i386_types[j].name, name) == 0)
ee86248c
JB
244 {
245 e->X_op = O_constant;
91d6fa6a 246 e->X_add_number = i386_types[j].sz[flag_code];
ee86248c
JB
247 e->X_add_symbol = NULL;
248 e->X_op_symbol = NULL;
249 return 1;
250 }
251
252 return 0;
253}
254
91d6fa6a 255static INLINE int i386_intel_check (const reg_entry *rreg,
ee86248c 256 const reg_entry *base,
91d6fa6a 257 const reg_entry *iindex)
ee86248c 258{
f09c1772
L
259 if ((this_operand >= 0
260 && rreg != i.op[this_operand].regs)
261 || base != intel_state.base
262 || iindex != intel_state.index)
ee86248c
JB
263 {
264 as_bad (_("invalid use of register"));
265 return 0;
266 }
267 return 1;
268}
269
270static INLINE void i386_intel_fold (expressionS *e, symbolS *sym)
271{
27dee630 272 expressionS *exp = symbol_get_value_expression (sym);
ee86248c
JB
273 if (S_GET_SEGMENT (sym) == absolute_section)
274 {
275 offsetT val = e->X_add_number;
276
27dee630 277 *e = *exp;
ee86248c
JB
278 e->X_add_number += val;
279 }
280 else
281 {
27dee630
L
282 if (exp->X_op == O_symbol
283 && strcmp (S_GET_NAME (exp->X_add_symbol),
284 GLOBAL_OFFSET_TABLE_NAME) == 0)
285 sym = exp->X_add_symbol;
ee86248c
JB
286 e->X_add_symbol = sym;
287 e->X_op_symbol = NULL;
288 e->X_op = O_symbol;
289 }
290}
291
3c7b9c2c
L
292static int
293i386_intel_simplify_register (expressionS *e)
294{
295 int reg_num;
296
297 if (this_operand < 0 || intel_state.in_offset)
298 {
299 as_bad (_("invalid use of register"));
300 return 0;
301 }
302
303 if (e->X_op == O_register)
304 reg_num = e->X_add_number;
305 else
306 reg_num = e->X_md - 1;
307
35015cd1
NC
308 if (reg_num < 0 || reg_num >= (int) i386_regtab_size)
309 {
310 as_bad (_("invalid register number"));
311 return 0;
312 }
313
4faaa10f
JB
314 if (!check_register (&i386_regtab[reg_num]))
315 {
316 as_bad (_("register '%s%s' cannot be used here"),
317 register_prefix, i386_regtab[reg_num].reg_name);
318 return 0;
319 }
320
3c7b9c2c
L
321 if (!intel_state.in_bracket)
322 {
323 if (i.op[this_operand].regs)
324 {
325 as_bad (_("invalid use of register"));
326 return 0;
327 }
0ff3b7d0
JB
328 if ((i386_regtab[reg_num].reg_type.bitfield.class == SReg
329 && i386_regtab[reg_num].reg_num == RegFlat)
330 || (dot_insn ()
331 && i386_regtab[reg_num].reg_type.bitfield.class == ClassNone))
3c7b9c2c
L
332 {
333 as_bad (_("invalid use of pseudo-register"));
334 return 0;
335 }
336 i.op[this_operand].regs = i386_regtab + reg_num;
337 }
9e2934f7 338 else if (!intel_state.index
1b54b8d7
JB
339 && (i386_regtab[reg_num].reg_type.bitfield.xmmword
340 || i386_regtab[reg_num].reg_type.bitfield.ymmword
341 || i386_regtab[reg_num].reg_type.bitfield.zmmword
e968fc9b 342 || i386_regtab[reg_num].reg_num == RegIZ))
9e2934f7 343 intel_state.index = i386_regtab + reg_num;
3c7b9c2c
L
344 else if (!intel_state.base && !intel_state.in_scale)
345 intel_state.base = i386_regtab + reg_num;
346 else if (!intel_state.index)
9e2934f7 347 {
d3b01414 348 const insn_template *t = current_templates.start;
a152332d 349
9e2934f7 350 if (intel_state.in_scale
c47b4d71 351 || i386_regtab[reg_num].reg_type.bitfield.baseindex
0ff3b7d0 352 || dot_insn ()
c47b4d71
JB
353 || t->mnem_off == MN_bndmk
354 || t->mnem_off == MN_bndldx
355 || t->mnem_off == MN_bndstx)
9e2934f7
JB
356 intel_state.index = i386_regtab + reg_num;
357 else
358 {
359 /* Convert base to index and make ESP/RSP the base. */
360 intel_state.index = intel_state.base;
361 intel_state.base = i386_regtab + reg_num;
362 }
363 }
3c7b9c2c
L
364 else
365 {
366 /* esp is invalid as index */
34684862 367 intel_state.index = reg_eax + ESP_REG_NUM;
3c7b9c2c
L
368 }
369 return 2;
370}
371
2fbbadc2
AM
372static int
373i386_intel_simplify_symbol (symbolS *sym)
ee86248c 374{
2fbbadc2
AM
375 if (symbol_resolving_p (sym))
376 return 1;
ee86248c 377
2fbbadc2
AM
378 symbol_mark_resolving (sym);
379 int ret = i386_intel_simplify (symbol_get_value_expression (sym));
ee86248c 380 if (ret == 2)
2fbbadc2
AM
381 {
382 S_SET_SEGMENT (sym, absolute_section);
383 ret = 1;
384 }
385 symbol_clear_resolving (sym);
ee86248c
JB
386 return ret;
387}
388
2fbbadc2
AM
389static int
390i386_intel_simplify (expressionS *e)
ee86248c 391{
f09c1772
L
392 const reg_entry *the_reg = (this_operand >= 0
393 ? i.op[this_operand].regs : NULL);
ee86248c 394 const reg_entry *base = intel_state.base;
91d6fa6a 395 const reg_entry *state_index = intel_state.index;
ee86248c
JB
396 int ret;
397
398 if (!intel_syntax)
399 return 1;
400
401 switch (e->X_op)
402 {
403 case O_index:
404 if (e->X_add_symbol)
405 {
406 if (!i386_intel_simplify_symbol (e->X_add_symbol)
f09c1772
L
407 || !i386_intel_check(the_reg, intel_state.base,
408 intel_state.index))
5bb3703f 409 return 0;
ee86248c
JB
410 }
411 if (!intel_state.in_offset)
412 ++intel_state.in_bracket;
413 ret = i386_intel_simplify_symbol (e->X_op_symbol);
414 if (!intel_state.in_offset)
415 --intel_state.in_bracket;
416 if (!ret)
417 return 0;
418 if (e->X_add_symbol)
419 e->X_op = O_add;
420 else
421 i386_intel_fold (e, e->X_op_symbol);
422 break;
423
424 case O_offset:
6cee4cda 425 intel_state.has_offset = 1;
ee86248c
JB
426 ++intel_state.in_offset;
427 ret = i386_intel_simplify_symbol (e->X_add_symbol);
428 --intel_state.in_offset;
91d6fa6a 429 if (!ret || !i386_intel_check(the_reg, base, state_index))
ee86248c
JB
430 return 0;
431 i386_intel_fold (e, e->X_add_symbol);
432 return ret;
433
434 case O_byte_ptr:
435 case O_word_ptr:
436 case O_dword_ptr:
437 case O_fword_ptr:
f2f5811f 438 case O_qword_ptr: /* O_mmword_ptr */
ee86248c 439 case O_tbyte_ptr:
7456d03d 440 case O_oword_ptr: /* O_xmmword_ptr */
ee86248c 441 case O_ymmword_ptr:
43234a1e 442 case O_zmmword_ptr:
ee86248c
JB
443 case O_near_ptr:
444 case O_far_ptr:
445 if (intel_state.op_modifier == O_absent)
446 intel_state.op_modifier = e->X_op;
447 /* FALLTHROUGH */
448 case O_short:
f09c1772
L
449 if (symbol_get_value_expression (e->X_add_symbol)->X_op
450 == O_register)
ee86248c
JB
451 {
452 as_bad (_("invalid use of register"));
453 return 0;
454 }
455 if (!i386_intel_simplify_symbol (e->X_add_symbol))
456 return 0;
457 i386_intel_fold (e, e->X_add_symbol);
458 break;
459
460 case O_full_ptr:
f09c1772
L
461 if (symbol_get_value_expression (e->X_op_symbol)->X_op
462 == O_register)
ee86248c
JB
463 {
464 as_bad (_("invalid use of register"));
465 return 0;
466 }
467 if (!i386_intel_simplify_symbol (e->X_op_symbol)
f09c1772
L
468 || !i386_intel_check(the_reg, intel_state.base,
469 intel_state.index))
ee86248c
JB
470 return 0;
471 if (!intel_state.in_offset)
fd4e0347
JB
472 {
473 if (!intel_state.seg)
474 intel_state.seg = e->X_add_symbol;
475 else
476 {
477 expressionS exp;
478
479 exp.X_op = O_full_ptr;
480 exp.X_add_symbol = e->X_add_symbol;
481 exp.X_op_symbol = intel_state.seg;
482 intel_state.seg = make_expr_symbol (&exp);
483 }
484 }
ee86248c
JB
485 i386_intel_fold (e, e->X_op_symbol);
486 break;
487
ee86248c
JB
488 case O_multiply:
489 if (this_operand >= 0 && intel_state.in_bracket)
490 {
491 expressionS *scale = NULL;
c2a5914e 492 int has_index = (intel_state.index != NULL);
ee86248c
JB
493
494 if (!intel_state.in_scale++)
495 intel_state.scale_factor = 1;
496
497 ret = i386_intel_simplify_symbol (e->X_add_symbol);
c2a5914e 498 if (ret && !has_index && intel_state.index)
ee86248c
JB
499 scale = symbol_get_value_expression (e->X_op_symbol);
500
501 if (ret)
502 ret = i386_intel_simplify_symbol (e->X_op_symbol);
c2a5914e 503 if (ret && !scale && !has_index && intel_state.index)
ee86248c
JB
504 scale = symbol_get_value_expression (e->X_add_symbol);
505
c2a5914e 506 if (ret && scale)
ee86248c
JB
507 {
508 resolve_expression (scale);
509 if (scale->X_op != O_constant
dc821c5f 510 || intel_state.index->reg_type.bitfield.word)
ee86248c
JB
511 scale->X_add_number = 0;
512 intel_state.scale_factor *= scale->X_add_number;
513 }
514
515 --intel_state.in_scale;
516 if (!ret)
517 return 0;
518
519 if (!intel_state.in_scale)
520 switch (intel_state.scale_factor)
521 {
522 case 1:
523 i.log2_scale_factor = 0;
524 break;
525 case 2:
526 i.log2_scale_factor = 1;
527 break;
528 case 4:
529 i.log2_scale_factor = 2;
530 break;
531 case 8:
532 i.log2_scale_factor = 3;
533 break;
534 default:
535 /* esp is invalid as index */
34684862 536 intel_state.index = reg_eax + ESP_REG_NUM;
ee86248c
JB
537 break;
538 }
539
540 break;
541 }
92b4f90c 542 goto fallthrough;
3c7b9c2c
L
543
544 case O_register:
545 ret = i386_intel_simplify_register (e);
546 if (ret == 2)
547 {
548 gas_assert (e->X_add_number < (unsigned short) -1);
549 e->X_md = (unsigned short) e->X_add_number + 1;
550 e->X_op = O_constant;
551 e->X_add_number = 0;
552 }
553 return ret;
554
555 case O_constant:
556 if (e->X_md)
557 return i386_intel_simplify_register (e);
558
ee86248c
JB
559 /* FALLTHROUGH */
560 default:
dc1e8a47 561 fallthrough:
f09c1772
L
562 if (e->X_add_symbol
563 && !i386_intel_simplify_symbol (e->X_add_symbol))
ee86248c 564 return 0;
64d23078
JB
565 if (!the_reg && this_operand >= 0
566 && e->X_op == O_symbol && !e->X_add_number)
567 the_reg = i.op[this_operand].regs;
ee86248c
JB
568 if (e->X_op == O_add || e->X_op == O_subtract)
569 {
570 base = intel_state.base;
91d6fa6a 571 state_index = intel_state.index;
ee86248c 572 }
91d6fa6a 573 if (!i386_intel_check (the_reg, base, state_index)
f09c1772
L
574 || (e->X_op_symbol
575 && !i386_intel_simplify_symbol (e->X_op_symbol))
91d6fa6a 576 || !i386_intel_check (the_reg,
f09c1772
L
577 (e->X_op != O_add
578 ? base : intel_state.base),
579 (e->X_op != O_add
580 ? state_index : intel_state.index)))
ee86248c
JB
581 return 0;
582 break;
583 }
584
f09c1772
L
585 if (this_operand >= 0
586 && e->X_op == O_symbol
587 && !intel_state.in_offset)
ee86248c
JB
588 {
589 segT seg = S_GET_SEGMENT (e->X_add_symbol);
590
591 if (seg != absolute_section
592 && seg != reg_section
593 && seg != expr_section)
594 intel_state.is_mem |= 2 - !intel_state.in_bracket;
595 }
596
597 return 1;
598}
599
600int i386_need_index_operator (void)
601{
602 return intel_syntax < 0;
603}
604
605static int
606i386_intel_operand (char *operand_string, int got_a_float)
607{
608 char *saved_input_line_pointer, *buf;
609 segT exp_seg;
610 expressionS exp, *expP;
611 char suffix = 0;
7063667e 612 bool rc_sae_modifier = i.rounding.type != rc_none && i.rounding.modifier;
ee86248c
JB
613 int ret;
614
43234a1e
L
615 /* Handle vector immediates. */
616 if (RC_SAE_immediate (operand_string))
cf665fee
JB
617 {
618 if (i.imm_operands)
619 {
620 as_bad (_("`%s': RC/SAE operand must precede immediate operands"),
d3b01414 621 insn_name (current_templates.start));
cf665fee
JB
622 return 0;
623 }
624
625 return 1;
626 }
43234a1e 627
ee86248c
JB
628 /* Initialize state structure. */
629 intel_state.op_modifier = O_absent;
630 intel_state.is_mem = 0;
25303607 631 intel_state.is_indirect = 0;
1acf546e 632 intel_state.has_offset = 0;
ee86248c
JB
633 intel_state.base = NULL;
634 intel_state.index = NULL;
635 intel_state.seg = NULL;
636 operand_type_set (&intel_state.reloc_types, ~0);
9c2799c2
NC
637 gas_assert (!intel_state.in_offset);
638 gas_assert (!intel_state.in_bracket);
639 gas_assert (!intel_state.in_scale);
ee86248c
JB
640
641 saved_input_line_pointer = input_line_pointer;
642 input_line_pointer = buf = xstrdup (operand_string);
643
644 intel_syntax = -1;
5cc00775 645 expr_mode = expr_operator_none;
ee86248c
JB
646 memset (&exp, 0, sizeof(exp));
647 exp_seg = expression (&exp);
648 ret = i386_intel_simplify (&exp);
649 intel_syntax = 1;
650
651 SKIP_WHITESPACE ();
43234a1e
L
652
653 /* Handle vector operations. */
654 if (*input_line_pointer == '{')
655 {
f70c6814 656 char *end = check_VecOperations (input_line_pointer);
43234a1e
L
657 if (end)
658 input_line_pointer = end;
659 else
660 ret = 0;
661 }
662
ee86248c
JB
663 if (!is_end_of_line[(unsigned char) *input_line_pointer])
664 {
38bf5113
JB
665 if (ret)
666 as_bad (_("junk `%s' after expression"), input_line_pointer);
ee86248c
JB
667 ret = 0;
668 }
669 else if (exp.X_op == O_illegal || exp.X_op == O_absent)
670 {
38bf5113
JB
671 if (ret)
672 as_bad (_("invalid expression"));
ee86248c
JB
673 ret = 0;
674 }
6cee4cda
L
675 else if (!intel_state.has_offset
676 && input_line_pointer > buf
677 && *(input_line_pointer - 1) == ']')
25303607
L
678 {
679 intel_state.is_mem |= 1;
680 intel_state.is_indirect = 1;
681 }
ee86248c
JB
682
683 input_line_pointer = saved_input_line_pointer;
684 free (buf);
685
9c2799c2
NC
686 gas_assert (!intel_state.in_offset);
687 gas_assert (!intel_state.in_bracket);
688 gas_assert (!intel_state.in_scale);
ee86248c
JB
689
690 if (!ret)
691 return 0;
692
693 if (intel_state.op_modifier != O_absent
d3b01414 694 && current_templates.start->mnem_off != MN_lea)
ee86248c
JB
695 {
696 i.types[this_operand].bitfield.unspecified = 0;
697
698 switch (intel_state.op_modifier)
699 {
700 case O_byte_ptr:
701 i.types[this_operand].bitfield.byte = 1;
702 suffix = BYTE_MNEM_SUFFIX;
703 break;
704
705 case O_word_ptr:
706 i.types[this_operand].bitfield.word = 1;
37404387 707 if (got_a_float == 2) /* "fi..." */
ee86248c 708 suffix = SHORT_MNEM_SUFFIX;
d3b01414
JB
709 else if (current_templates.start->mnem_off != MN_lar
710 && current_templates.start->mnem_off != MN_lsl
711 && current_templates.start->mnem_off != MN_arpl)
ee86248c
JB
712 suffix = WORD_MNEM_SUFFIX;
713 break;
714
715 case O_dword_ptr:
716 i.types[this_operand].bitfield.dword = 1;
d3b01414
JB
717 if ((insn_name (current_templates.start)[0] == 'l'
718 && insn_name (current_templates.start)[2] == 's'
719 && insn_name (current_templates.start)[3] == 0)
720 || current_templates.start->mnem_off == MN_bound)
ee86248c 721 suffix = WORD_MNEM_SUFFIX;
d488367a 722 else if (flag_code != CODE_32BIT
d3b01414
JB
723 && (current_templates.start->opcode_modifier.jump == JUMP
724 || current_templates.start->opcode_modifier.jump
0cfa3eb3 725 == JUMP_DWORD))
a4d3acd2
JB
726 {
727 i.far_branch = true;
728 suffix = WORD_MNEM_SUFFIX;
729 }
ee86248c
JB
730 else if (got_a_float == 1) /* "f..." */
731 suffix = SHORT_MNEM_SUFFIX;
732 else
733 suffix = LONG_MNEM_SUFFIX;
734 break;
735
736 case O_fword_ptr:
737 i.types[this_operand].bitfield.fword = 1;
d3b01414
JB
738 if (current_templates.start->mnem_off == MN_les
739 || current_templates.start->mnem_off == MN_lds
740 || current_templates.start->mnem_off == MN_lss
741 || current_templates.start->mnem_off == MN_lfs
742 || current_templates.start->mnem_off == MN_lgs)
ee86248c
JB
743 suffix = LONG_MNEM_SUFFIX;
744 else if (!got_a_float)
745 {
746 if (flag_code == CODE_16BIT)
747 add_prefix (DATA_PREFIX_OPCODE);
a4d3acd2 748 i.far_branch = true;
ee86248c 749 }
ee86248c
JB
750 break;
751
f2f5811f 752 case O_qword_ptr: /* O_mmword_ptr */
ee86248c 753 i.types[this_operand].bitfield.qword = 1;
d3b01414 754 if (current_templates.start->mnem_off == MN_bound
ee86248c
JB
755 || got_a_float == 1) /* "f..." */
756 suffix = LONG_MNEM_SUFFIX;
757 else
758 suffix = QWORD_MNEM_SUFFIX;
759 break;
760
761 case O_tbyte_ptr:
762 i.types[this_operand].bitfield.tbyte = 1;
f210f0a0
JB
763 if (got_a_float)
764 break;
765 if (flag_code == CODE_64BIT
d3b01414
JB
766 && (current_templates.start->operand_types[0].bitfield.fword
767 || current_templates.start->operand_types[0].bitfield.tbyte
768 || current_templates.start->opcode_modifier.jump == JUMP_DWORD
769 || current_templates.start->opcode_modifier.jump == JUMP))
5990e377 770 suffix = QWORD_MNEM_SUFFIX; /* l[fgs]s, [ls][gi]dt, call, jmp */
ee86248c 771 else
a8f4f6b9 772 i.types[this_operand].bitfield.byte = 1; /* cause an error */
ee86248c
JB
773 break;
774
7456d03d 775 case O_oword_ptr: /* O_xmmword_ptr */
ee86248c 776 i.types[this_operand].bitfield.xmmword = 1;
ee86248c
JB
777 break;
778
779 case O_ymmword_ptr:
4fc85f37
JB
780 if (vector_size < VSZ256)
781 {
782 as_bad (_("256-bit operands disabled"));
783 return 0;
784 }
ee86248c 785 i.types[this_operand].bitfield.ymmword = 1;
ee86248c
JB
786 break;
787
43234a1e 788 case O_zmmword_ptr:
4fc85f37
JB
789 if (vector_size < VSZ512)
790 {
791 as_bad (_("512-bit operands disabled"));
792 return 0;
793 }
43234a1e 794 i.types[this_operand].bitfield.zmmword = 1;
43234a1e
L
795 break;
796
ee86248c 797 case O_far_ptr:
a4d3acd2 798 i.far_branch = true;
ee86248c
JB
799 /* FALLTHROUGH */
800 case O_near_ptr:
d3b01414
JB
801 if (current_templates.start->opcode_modifier.jump != JUMP
802 && current_templates.start->opcode_modifier.jump != JUMP_DWORD)
164d49cb
JB
803 {
804 /* cause an error */
805 i.types[this_operand].bitfield.byte = 1;
806 i.types[this_operand].bitfield.tbyte = 1;
807 suffix = i.suffix;
808 }
ee86248c
JB
809 break;
810
811 default:
812 BAD_CASE (intel_state.op_modifier);
813 break;
814 }
815
1cb0ab18
JB
816 /* Now check whether we actually want to infer an AT&T-like suffix.
817 We really only need to do this when operand size determination (incl.
818 REX.W) is going to be derived from it. For this we check whether the
819 given suffix is valid for any of the candidate templates. */
820 if (suffix && suffix != i.suffix
d3b01414 821 && current_templates.start->mnem_off != MN_bound)
1cb0ab18
JB
822 {
823 const insn_template *t;
824
d3b01414 825 for (t = current_templates.start; t < current_templates.end; ++t)
1cb0ab18
JB
826 {
827 /* Operands haven't been swapped yet. */
828 unsigned int op = t->operands - 1 - this_operand;
829
830 /* Easy checks to skip templates which won't match anyway. */
7d3182d6 831 if (this_operand >= t->operands
35266cb1 832 || t->opcode_modifier.dialect >= ATT_SYNTAX)
1cb0ab18
JB
833 continue;
834
835 switch (suffix)
836 {
837 case BYTE_MNEM_SUFFIX:
838 if (t->opcode_modifier.no_bsuf)
839 continue;
840 break;
841 case WORD_MNEM_SUFFIX:
842 if (t->opcode_modifier.no_wsuf)
843 continue;
844 break;
845 case LONG_MNEM_SUFFIX:
846 if (t->opcode_modifier.no_lsuf)
847 continue;
848 break;
849 case QWORD_MNEM_SUFFIX:
9db83a32 850 if (t->opcode_modifier.no_qsuf || !q_suffix_allowed (t))
1cb0ab18
JB
851 continue;
852 break;
853 case SHORT_MNEM_SUFFIX:
854 if (t->opcode_modifier.no_ssuf)
855 continue;
856 break;
1cb0ab18
JB
857 default:
858 abort ();
859 }
860
fcaf78fe
JB
861 /* We can skip templates with swappable operands here, as one
862 operand will be a register, which operand size can be
863 determined from. */
864 if (t->opcode_modifier.d)
865 continue;
866
1cb0ab18
JB
867 /* In a few cases suffixes are permitted, but we can nevertheless
868 derive that these aren't going to be needed. This is only of
fcaf78fe
JB
869 interest for insns using ModR/M. */
870 if (!t->opcode_modifier.modrm)
1cb0ab18
JB
871 break;
872
873 if (!t->operand_types[op].bitfield.baseindex)
874 continue;
875
876 switch (t->operand_types[op].bitfield.class)
877 {
878 case RegMMX:
879 case RegSIMD:
880 case RegMask:
881 continue;
882 }
883
884 break;
885 }
886
d3b01414 887 if (t == current_templates.end)
1cb0ab18
JB
888 suffix = 0;
889 }
890
ee86248c
JB
891 if (!i.suffix)
892 i.suffix = suffix;
1cb0ab18 893 else if (suffix && i.suffix != suffix)
ee86248c
JB
894 {
895 as_bad (_("conflicting operand size modifiers"));
896 return 0;
897 }
898 }
899
900 /* Operands for jump/call need special consideration. */
d3b01414
JB
901 if (current_templates.start->opcode_modifier.jump == JUMP
902 || current_templates.start->opcode_modifier.jump == JUMP_DWORD
903 || current_templates.start->opcode_modifier.jump == JUMP_INTERSEGMENT)
ee86248c 904 {
5b7c81bd 905 bool jumpabsolute = false;
6f2f06be 906
f09c1772
L
907 if (i.op[this_operand].regs
908 || intel_state.base
909 || intel_state.index
ee86248c 910 || intel_state.is_mem > 1)
5b7c81bd 911 jumpabsolute = true;
ee86248c
JB
912 else
913 switch (intel_state.op_modifier)
914 {
915 case O_near_ptr:
916 if (intel_state.seg)
5b7c81bd 917 jumpabsolute = true;
ee86248c
JB
918 else
919 intel_state.is_mem = 1;
920 break;
921 case O_far_ptr:
922 case O_absent:
923 if (!intel_state.seg)
924 {
925 intel_state.is_mem = 1;
926 if (intel_state.op_modifier == O_absent)
25303607
L
927 {
928 if (intel_state.is_indirect == 1)
5b7c81bd 929 jumpabsolute = true;
25303607
L
930 break;
931 }
ee86248c
JB
932 as_bad (_("cannot infer the segment part of the operand"));
933 return 0;
934 }
935 else if (S_GET_SEGMENT (intel_state.seg) == reg_section)
a4d3acd2
JB
936 {
937 jumpabsolute = true;
938 if (intel_state.op_modifier == O_far_ptr)
939 i.far_branch = true;
940 }
ee86248c
JB
941 else
942 {
943 i386_operand_type types;
944
945 if (i.imm_operands >= MAX_IMMEDIATE_OPERANDS)
946 {
947 as_bad (_("at most %d immediate operands are allowed"),
948 MAX_IMMEDIATE_OPERANDS);
949 return 0;
950 }
951 expP = &im_expressions[i.imm_operands++];
952 memset (expP, 0, sizeof(*expP));
953 expP->X_op = O_symbol;
954 expP->X_add_symbol = intel_state.seg;
955 i.op[this_operand].imms = expP;
956
957 resolve_expression (expP);
958 operand_type_set (&types, ~0);
959 if (!i386_finalize_immediate (S_GET_SEGMENT (intel_state.seg),
960 expP, types, operand_string))
961 return 0;
962 if (i.operands < MAX_OPERANDS)
963 {
964 this_operand = i.operands++;
965 i.types[this_operand].bitfield.unspecified = 1;
966 }
ee86248c
JB
967 intel_state.seg = NULL;
968 intel_state.is_mem = 0;
969 }
970 break;
971 default:
5b7c81bd 972 jumpabsolute = true;
ee86248c
JB
973 break;
974 }
6f2f06be
JB
975 if (jumpabsolute)
976 {
5b7c81bd 977 i.jumpabsolute = true;
6f2f06be
JB
978 intel_state.is_mem |= 1;
979 }
ee86248c
JB
980 }
981 else if (intel_state.seg)
982 intel_state.is_mem |= 1;
983
984 if (i.op[this_operand].regs)
985 {
986 i386_operand_type temp;
987
988 /* Register operand. */
c032bc4f
JB
989 if (intel_state.base || intel_state.index || intel_state.seg
990 || i.imm_bits[this_operand])
ee86248c
JB
991 {
992 as_bad (_("invalid operand"));
993 return 0;
994 }
995
996 temp = i.op[this_operand].regs->reg_type;
997 temp.bitfield.baseindex = 0;
f09c1772
L
998 i.types[this_operand] = operand_type_or (i.types[this_operand],
999 temp);
ee86248c
JB
1000 i.types[this_operand].bitfield.unspecified = 0;
1001 ++i.reg_operands;
cf665fee 1002
7063667e
JB
1003 if ((i.rounding.type != rc_none && !i.rounding.modifier
1004 && temp.bitfield.class != Reg)
1005 || rc_sae_modifier)
cf665fee
JB
1006 {
1007 unsigned int j;
1008
1009 for (j = 0; j < ARRAY_SIZE (RC_NamesTable); ++j)
1010 if (i.rounding.type == RC_NamesTable[j].type)
1011 break;
1012 as_bad (_("`%s': misplaced `{%s}'"),
d3b01414 1013 insn_name (current_templates.start), RC_NamesTable[j].name);
cf665fee
JB
1014 return 0;
1015 }
ee86248c 1016 }
f09c1772
L
1017 else if (intel_state.base
1018 || intel_state.index
1019 || intel_state.seg
ee86248c
JB
1020 || intel_state.is_mem)
1021 {
1022 /* Memory operand. */
c032bc4f
JB
1023 if (i.imm_bits[this_operand])
1024 {
1025 as_bad (_("invalid operand"));
1026 return 0;
1027 }
1028
04784e33 1029 if (i.mem_operands)
ee86248c 1030 {
313c53d1
L
1031 /* Handle
1032
1033 call 0x9090,0x90909090
1034 lcall 0x9090,0x90909090
1035 jmp 0x9090,0x90909090
1036 ljmp 0x9090,0x90909090
1037 */
1038
d3b01414
JB
1039 if ((current_templates.start->opcode_modifier.jump == JUMP_INTERSEGMENT
1040 || current_templates.start->opcode_modifier.jump == JUMP_DWORD
1041 || current_templates.start->opcode_modifier.jump == JUMP)
313c53d1
L
1042 && this_operand == 1
1043 && intel_state.seg == NULL
1044 && i.mem_operands == 1
1045 && i.disp_operands == 1
1046 && intel_state.op_modifier == O_absent)
1047 {
1048 /* Try to process the first operand as immediate, */
1049 this_operand = 0;
1050 if (i386_finalize_immediate (exp_seg, i.op[0].imms,
1051 intel_state.reloc_types,
1052 NULL))
1053 {
1054 this_operand = 1;
1055 expP = &im_expressions[0];
1056 i.op[this_operand].imms = expP;
1057 *expP = exp;
1058
1059 /* Try to process the second operand as immediate, */
1060 if (i386_finalize_immediate (exp_seg, expP,
1061 intel_state.reloc_types,
1062 NULL))
1063 {
1064 i.mem_operands = 0;
1065 i.disp_operands = 0;
1066 i.imm_operands = 2;
c48dadc9 1067 i.flags[0] &= ~Operand_Mem;
313c53d1
L
1068 i.types[0].bitfield.disp16 = 0;
1069 i.types[0].bitfield.disp32 = 0;
313c53d1
L
1070 return 1;
1071 }
1072 }
1073 }
ee86248c
JB
1074 }
1075
2abc2bec
JB
1076 /* Swap base and index in 16-bit memory operands like
1077 [si+bx]. Since i386_index_check is also used in AT&T
1078 mode we have to do this here. */
1079 if (intel_state.base
1080 && intel_state.index
dc821c5f
JB
1081 && intel_state.base->reg_type.bitfield.word
1082 && intel_state.index->reg_type.bitfield.word
2abc2bec
JB
1083 && intel_state.base->reg_num >= 6
1084 && intel_state.index->reg_num < 6)
1085 {
1086 i.base_reg = intel_state.index;
1087 i.index_reg = intel_state.base;
1088 }
1089 else
1090 {
1091 i.base_reg = intel_state.base;
1092 i.index_reg = intel_state.index;
1093 }
1094
1095 if (i.base_reg || i.index_reg)
1096 i.types[this_operand].bitfield.baseindex = 1;
1097
ee86248c
JB
1098 expP = &disp_expressions[i.disp_operands];
1099 memcpy (expP, &exp, sizeof(exp));
1100 resolve_expression (expP);
1101
f09c1772
L
1102 if (expP->X_op != O_constant
1103 || expP->X_add_number
2abc2bec 1104 || !i.types[this_operand].bitfield.baseindex)
ee86248c
JB
1105 {
1106 i.op[this_operand].disps = expP;
1107 i.disp_operands++;
1108
2abc2bec
JB
1109 i386_addressing_mode ();
1110
ee86248c
JB
1111 if (flag_code == CODE_64BIT)
1112 {
a775efc8 1113 i.types[this_operand].bitfield.disp32 = 1;
ee86248c 1114 if (!i.prefix[ADDR_PREFIX])
a775efc8 1115 i.types[this_operand].bitfield.disp64 = 1;
ee86248c
JB
1116 }
1117 else if (!i.prefix[ADDR_PREFIX] ^ (flag_code == CODE_16BIT))
1118 i.types[this_operand].bitfield.disp32 = 1;
1119 else
1120 i.types[this_operand].bitfield.disp16 = 1;
1121
1122#if defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT)
1123 /*
1124 * exp_seg is used only for verification in
1125 * i386_finalize_displacement, and we can end up seeing reg_section
1126 * here - but we know we removed all registers from the expression
1127 * (or error-ed on any remaining ones) in i386_intel_simplify. I
1128 * consider the check in i386_finalize_displacement bogus anyway, in
1129 * particular because it doesn't allow for expr_section, so I'd
1130 * rather see that check (and the similar one in
1131 * i386_finalize_immediate) use SEG_NORMAL(), but not being an a.out
1132 * expert I can't really say whether that would have other bad side
1133 * effects.
1134 */
1135 if (OUTPUT_FLAVOR == bfd_target_aout_flavour
1136 && exp_seg == reg_section)
1137 exp_seg = expP->X_op != O_constant ? undefined_section
1138 : absolute_section;
1139#endif
1140
1141 if (!i386_finalize_displacement (exp_seg, expP,
1142 intel_state.reloc_types,
1143 operand_string))
1144 return 0;
1145 }
1146
ee86248c
JB
1147 if (intel_state.seg)
1148 {
fd4e0347 1149 for (ret = check_none; ; ret = operand_check)
e21440ba
JB
1150 {
1151 expP = symbol_get_value_expression (intel_state.seg);
fd4e0347
JB
1152 if (expP->X_op != O_full_ptr
1153 || symbol_get_value_expression (expP->X_op_symbol)->X_op
1154 != O_register)
e21440ba
JB
1155 break;
1156 intel_state.seg = expP->X_add_symbol;
1157 }
0398aac5 1158 if (expP->X_op != O_register)
ee86248c
JB
1159 {
1160 as_bad (_("segment register name expected"));
1161 return 0;
1162 }
00cee14f 1163 if (i386_regtab[expP->X_add_number].reg_type.bitfield.class != SReg)
ee86248c
JB
1164 {
1165 as_bad (_("invalid use of register"));
1166 return 0;
1167 }
fd4e0347
JB
1168 switch (ret)
1169 {
1170 case check_error:
1171 as_bad (_("redundant segment overrides"));
1172 return 0;
1173 case check_warning:
1174 as_warn (_("redundant segment overrides"));
1175 break;
1176 }
5e042380
JB
1177 if (i386_regtab[expP->X_add_number].reg_num == RegFlat)
1178 i.seg[i.mem_operands] = NULL;
1179 else
1180 i.seg[i.mem_operands] = &i386_regtab[expP->X_add_number];
ee86248c
JB
1181 }
1182
ee86248c
JB
1183 if (!i386_index_check (operand_string))
1184 return 0;
1185
c48dadc9 1186 i.flags[this_operand] |= Operand_Mem;
ee86248c
JB
1187 ++i.mem_operands;
1188 }
1189 else
1190 {
1191 /* Immediate. */
1192 if (i.imm_operands >= MAX_IMMEDIATE_OPERANDS)
1193 {
1194 as_bad (_("at most %d immediate operands are allowed"),
1195 MAX_IMMEDIATE_OPERANDS);
1196 return 0;
1197 }
1198
1199 expP = &im_expressions[i.imm_operands++];
1200 i.op[this_operand].imms = expP;
1201 *expP = exp;
1202
1203 return i386_finalize_immediate (exp_seg, expP, intel_state.reloc_types,
1204 operand_string);
1205 }
1206
1207 return 1;
1208}