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ee86248c 1/* tc-i386.c -- Assemble Intel syntax code for ix86/x86-64
6f2750fe 2 Copyright (C) 2009-2016 Free Software Foundation, Inc.
ee86248c
JB
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to the Free
18 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
19 02110-1301, USA. */
20
21static struct
22 {
23 operatorT op_modifier; /* Operand modifier. */
24 int is_mem; /* 1 if operand is memory reference. */
25303607 25 int is_indirect; /* 1 if operand is indirect reference. */
6cee4cda 26 int has_offset; /* 1 if operand has offset. */
ee86248c
JB
27 unsigned int in_offset; /* >=1 if processing operand of offset. */
28 unsigned int in_bracket; /* >=1 if processing operand in brackets. */
29 unsigned int in_scale; /* >=1 if processing multipication operand
30 * in brackets. */
31 i386_operand_type reloc_types; /* Value obtained from lex_got(). */
32 const reg_entry *base; /* Base register (if any). */
33 const reg_entry *index; /* Index register (if any). */
34 offsetT scale_factor; /* Accumulated scale factor. */
35 symbolS *seg;
36 }
37intel_state;
38
39/* offset X_add_symbol */
40#define O_offset O_md32
7ac3eb25
L
41/* offset X_add_symbol */
42#define O_short O_md31
43/* near ptr X_add_symbol */
44#define O_near_ptr O_md30
45/* far ptr X_add_symbol */
46#define O_far_ptr O_md29
ee86248c 47/* byte ptr X_add_symbol */
7ac3eb25 48#define O_byte_ptr O_md28
ee86248c 49/* word ptr X_add_symbol */
7ac3eb25 50#define O_word_ptr O_md27
ee86248c 51/* dword ptr X_add_symbol */
7ac3eb25 52#define O_dword_ptr O_md26
ee86248c 53/* qword ptr X_add_symbol */
7ac3eb25 54#define O_qword_ptr O_md25
ee86248c 55/* oword ptr X_add_symbol */
7ac3eb25 56#define O_oword_ptr O_md24
ee86248c 57/* fword ptr X_add_symbol */
7ac3eb25 58#define O_fword_ptr O_md23
ee86248c 59/* tbyte ptr X_add_symbol */
7ac3eb25 60#define O_tbyte_ptr O_md22
ee86248c 61/* xmmword ptr X_add_symbol */
7ac3eb25 62#define O_xmmword_ptr O_md21
ee86248c 63/* ymmword ptr X_add_symbol */
7ac3eb25 64#define O_ymmword_ptr O_md20
43234a1e
L
65/* zmmword ptr X_add_symbol */
66#define O_zmmword_ptr O_md19
ee86248c
JB
67
68static struct
69 {
70 const char *name;
1e9cc1c2 71 operatorT op;
ee86248c
JB
72 unsigned int operands;
73 }
74const i386_operators[] =
75 {
76 { "and", O_bit_and, 2 },
77 { "eq", O_eq, 2 },
78 { "ge", O_ge, 2 },
79 { "gt", O_gt, 2 },
80 { "le", O_le, 2 },
81 { "lt", O_lt, 2 },
82 { "mod", O_modulus, 2 },
83 { "ne", O_ne, 2 },
84 { "not", O_bit_not, 1 },
85 { "offset", O_offset, 1 },
86 { "or", O_bit_inclusive_or, 2 },
87 { "shl", O_left_shift, 2 },
88 { "short", O_short, 1 },
89 { "shr", O_right_shift, 2 },
90 { "xor", O_bit_exclusive_or, 2 },
91 { NULL, O_illegal, 0 }
92 };
93
94static struct
95 {
96 const char *name;
1e9cc1c2 97 operatorT op;
ee86248c
JB
98 unsigned short sz[3];
99 }
100const i386_types[] =
101 {
102#define I386_TYPE(t, n) { #t, O_##t##_ptr, { n, n, n } }
103 I386_TYPE(byte, 1),
104 I386_TYPE(word, 2),
105 I386_TYPE(dword, 4),
106 I386_TYPE(fword, 6),
107 I386_TYPE(qword, 8),
108 I386_TYPE(tbyte, 10),
109 I386_TYPE(oword, 16),
110 I386_TYPE(xmmword, 16),
111 I386_TYPE(ymmword, 32),
43234a1e 112 I386_TYPE(zmmword, 64),
ee86248c
JB
113#undef I386_TYPE
114 { "near", O_near_ptr, { 0xff04, 0xff02, 0xff08 } },
115 { "far", O_far_ptr, { 0xff06, 0xff05, 0xff06 } },
116 { NULL, O_illegal, { 0, 0, 0 } }
117 };
118
119operatorT i386_operator (const char *name, unsigned int operands, char *pc)
120{
121 unsigned int j;
122
123 if (!intel_syntax)
124 return O_absent;
125
126 if (!name)
127 {
128 if (operands != 2)
129 return O_illegal;
130 switch (*input_line_pointer)
131 {
132 case ':':
133 ++input_line_pointer;
134 return O_full_ptr;
135 case '[':
136 ++input_line_pointer;
137 return O_index;
138 case '@':
139 if (this_operand >= 0 && i.reloc[this_operand] == NO_RELOC)
140 {
141 int adjust = 0;
142 char *gotfree_input_line = lex_got (&i.reloc[this_operand],
143 &adjust,
d258b828 144 &intel_state.reloc_types);
ee86248c
JB
145
146 if (!gotfree_input_line)
147 break;
148 free (gotfree_input_line);
149 *input_line_pointer++ = '+';
150 memset (input_line_pointer, '0', adjust - 1);
151 input_line_pointer[adjust - 1] = ' ';
152 return O_add;
153 }
154 break;
155 }
156 return O_illegal;
157 }
158
159 for (j = 0; i386_operators[j].name; ++j)
91d6fa6a 160 if (strcasecmp (i386_operators[j].name, name) == 0)
ee86248c
JB
161 {
162 if (i386_operators[j].operands
163 && i386_operators[j].operands != operands)
164 return O_illegal;
1e9cc1c2 165 return i386_operators[j].op;
ee86248c
JB
166 }
167
168 for (j = 0; i386_types[j].name; ++j)
91d6fa6a 169 if (strcasecmp (i386_types[j].name, name) == 0)
ee86248c 170 break;
d02603dc 171
ee86248c
JB
172 if (i386_types[j].name && *pc == ' ')
173 {
d02603dc
NC
174 char *pname;
175 char c;
176
177 ++input_line_pointer;
178 c = get_symbol_name (&pname);
ee86248c 179
91d6fa6a 180 if (strcasecmp (pname, "ptr") == 0)
ee86248c 181 {
d02603dc 182 /* FIXME: What if c == '"' ? */
91d6fa6a 183 pname[-1] = *pc;
ee86248c
JB
184 *pc = c;
185 if (intel_syntax > 0 || operands != 1)
186 return O_illegal;
1e9cc1c2 187 return i386_types[j].op;
ee86248c
JB
188 }
189
d02603dc 190 (void) restore_line_pointer (c);
91d6fa6a 191 input_line_pointer = pname - 1;
ee86248c
JB
192 }
193
194 return O_absent;
195}
196
197static int i386_intel_parse_name (const char *name, expressionS *e)
198{
91d6fa6a 199 unsigned int j;
ee86248c 200
b7adb16d
JB
201 if (! strcmp (name, "$"))
202 {
203 current_location (e);
204 return 1;
205 }
206
91d6fa6a
NC
207 for (j = 0; i386_types[j].name; ++j)
208 if (strcasecmp(i386_types[j].name, name) == 0)
ee86248c
JB
209 {
210 e->X_op = O_constant;
91d6fa6a 211 e->X_add_number = i386_types[j].sz[flag_code];
ee86248c
JB
212 e->X_add_symbol = NULL;
213 e->X_op_symbol = NULL;
214 return 1;
215 }
216
217 return 0;
218}
219
91d6fa6a 220static INLINE int i386_intel_check (const reg_entry *rreg,
ee86248c 221 const reg_entry *base,
91d6fa6a 222 const reg_entry *iindex)
ee86248c 223{
f09c1772
L
224 if ((this_operand >= 0
225 && rreg != i.op[this_operand].regs)
226 || base != intel_state.base
227 || iindex != intel_state.index)
ee86248c
JB
228 {
229 as_bad (_("invalid use of register"));
230 return 0;
231 }
232 return 1;
233}
234
235static INLINE void i386_intel_fold (expressionS *e, symbolS *sym)
236{
27dee630 237 expressionS *exp = symbol_get_value_expression (sym);
ee86248c
JB
238 if (S_GET_SEGMENT (sym) == absolute_section)
239 {
240 offsetT val = e->X_add_number;
241
27dee630 242 *e = *exp;
ee86248c
JB
243 e->X_add_number += val;
244 }
245 else
246 {
27dee630
L
247 if (exp->X_op == O_symbol
248 && strcmp (S_GET_NAME (exp->X_add_symbol),
249 GLOBAL_OFFSET_TABLE_NAME) == 0)
250 sym = exp->X_add_symbol;
ee86248c
JB
251 e->X_add_symbol = sym;
252 e->X_op_symbol = NULL;
253 e->X_op = O_symbol;
254 }
255}
256
3c7b9c2c
L
257static int
258i386_intel_simplify_register (expressionS *e)
259{
260 int reg_num;
261
262 if (this_operand < 0 || intel_state.in_offset)
263 {
264 as_bad (_("invalid use of register"));
265 return 0;
266 }
267
268 if (e->X_op == O_register)
269 reg_num = e->X_add_number;
270 else
271 reg_num = e->X_md - 1;
272
273 if (!intel_state.in_bracket)
274 {
275 if (i.op[this_operand].regs)
276 {
277 as_bad (_("invalid use of register"));
278 return 0;
279 }
280 if (i386_regtab[reg_num].reg_type.bitfield.sreg3
281 && i386_regtab[reg_num].reg_num == RegFlat)
282 {
283 as_bad (_("invalid use of pseudo-register"));
284 return 0;
285 }
286 i.op[this_operand].regs = i386_regtab + reg_num;
287 }
9e2934f7
JB
288 else if (!intel_state.index
289 && (i386_regtab[reg_num].reg_type.bitfield.regxmm
43234a1e
L
290 || i386_regtab[reg_num].reg_type.bitfield.regymm
291 || i386_regtab[reg_num].reg_type.bitfield.regzmm))
9e2934f7 292 intel_state.index = i386_regtab + reg_num;
3c7b9c2c
L
293 else if (!intel_state.base && !intel_state.in_scale)
294 intel_state.base = i386_regtab + reg_num;
295 else if (!intel_state.index)
9e2934f7
JB
296 {
297 if (intel_state.in_scale
47cd3fa7
JB
298 || current_templates->start->base_opcode == 0xf30f1b /* bndmk */
299 || (current_templates->start->base_opcode & ~1) == 0x0f1a /* bnd{ld,st}x */
9e2934f7
JB
300 || i386_regtab[reg_num].reg_type.bitfield.baseindex)
301 intel_state.index = i386_regtab + reg_num;
302 else
303 {
304 /* Convert base to index and make ESP/RSP the base. */
305 intel_state.index = intel_state.base;
306 intel_state.base = i386_regtab + reg_num;
307 }
308 }
3c7b9c2c
L
309 else
310 {
311 /* esp is invalid as index */
8280f326 312 intel_state.index = i386_regtab + REGNAM_EAX + ESP_REG_NUM;
3c7b9c2c
L
313 }
314 return 2;
315}
316
ee86248c
JB
317static int i386_intel_simplify (expressionS *);
318
319static INLINE int i386_intel_simplify_symbol(symbolS *sym)
320{
321 int ret = i386_intel_simplify (symbol_get_value_expression (sym));
322
323 if (ret == 2)
324 {
325 S_SET_SEGMENT(sym, absolute_section);
326 ret = 1;
327 }
328 return ret;
329}
330
331static int i386_intel_simplify (expressionS *e)
332{
f09c1772
L
333 const reg_entry *the_reg = (this_operand >= 0
334 ? i.op[this_operand].regs : NULL);
ee86248c 335 const reg_entry *base = intel_state.base;
91d6fa6a 336 const reg_entry *state_index = intel_state.index;
ee86248c
JB
337 int ret;
338
339 if (!intel_syntax)
340 return 1;
341
342 switch (e->X_op)
343 {
344 case O_index:
345 if (e->X_add_symbol)
346 {
347 if (!i386_intel_simplify_symbol (e->X_add_symbol)
f09c1772
L
348 || !i386_intel_check(the_reg, intel_state.base,
349 intel_state.index))
5bb3703f 350 return 0;
ee86248c
JB
351 }
352 if (!intel_state.in_offset)
353 ++intel_state.in_bracket;
354 ret = i386_intel_simplify_symbol (e->X_op_symbol);
355 if (!intel_state.in_offset)
356 --intel_state.in_bracket;
357 if (!ret)
358 return 0;
359 if (e->X_add_symbol)
360 e->X_op = O_add;
361 else
362 i386_intel_fold (e, e->X_op_symbol);
363 break;
364
365 case O_offset:
6cee4cda 366 intel_state.has_offset = 1;
ee86248c
JB
367 ++intel_state.in_offset;
368 ret = i386_intel_simplify_symbol (e->X_add_symbol);
369 --intel_state.in_offset;
91d6fa6a 370 if (!ret || !i386_intel_check(the_reg, base, state_index))
ee86248c
JB
371 return 0;
372 i386_intel_fold (e, e->X_add_symbol);
373 return ret;
374
375 case O_byte_ptr:
376 case O_word_ptr:
377 case O_dword_ptr:
378 case O_fword_ptr:
379 case O_qword_ptr:
380 case O_tbyte_ptr:
381 case O_oword_ptr:
382 case O_xmmword_ptr:
383 case O_ymmword_ptr:
43234a1e 384 case O_zmmword_ptr:
ee86248c
JB
385 case O_near_ptr:
386 case O_far_ptr:
387 if (intel_state.op_modifier == O_absent)
388 intel_state.op_modifier = e->X_op;
389 /* FALLTHROUGH */
390 case O_short:
f09c1772
L
391 if (symbol_get_value_expression (e->X_add_symbol)->X_op
392 == O_register)
ee86248c
JB
393 {
394 as_bad (_("invalid use of register"));
395 return 0;
396 }
397 if (!i386_intel_simplify_symbol (e->X_add_symbol))
398 return 0;
399 i386_intel_fold (e, e->X_add_symbol);
400 break;
401
402 case O_full_ptr:
f09c1772
L
403 if (symbol_get_value_expression (e->X_op_symbol)->X_op
404 == O_register)
ee86248c
JB
405 {
406 as_bad (_("invalid use of register"));
407 return 0;
408 }
409 if (!i386_intel_simplify_symbol (e->X_op_symbol)
f09c1772
L
410 || !i386_intel_check(the_reg, intel_state.base,
411 intel_state.index))
ee86248c
JB
412 return 0;
413 if (!intel_state.in_offset)
414 intel_state.seg = e->X_add_symbol;
415 i386_intel_fold (e, e->X_op_symbol);
416 break;
417
ee86248c
JB
418 case O_multiply:
419 if (this_operand >= 0 && intel_state.in_bracket)
420 {
421 expressionS *scale = NULL;
c2a5914e 422 int has_index = (intel_state.index != NULL);
ee86248c
JB
423
424 if (!intel_state.in_scale++)
425 intel_state.scale_factor = 1;
426
427 ret = i386_intel_simplify_symbol (e->X_add_symbol);
c2a5914e 428 if (ret && !has_index && intel_state.index)
ee86248c
JB
429 scale = symbol_get_value_expression (e->X_op_symbol);
430
431 if (ret)
432 ret = i386_intel_simplify_symbol (e->X_op_symbol);
c2a5914e 433 if (ret && !scale && !has_index && intel_state.index)
ee86248c
JB
434 scale = symbol_get_value_expression (e->X_add_symbol);
435
c2a5914e 436 if (ret && scale)
ee86248c
JB
437 {
438 resolve_expression (scale);
439 if (scale->X_op != O_constant
440 || intel_state.index->reg_type.bitfield.reg16)
441 scale->X_add_number = 0;
442 intel_state.scale_factor *= scale->X_add_number;
443 }
444
445 --intel_state.in_scale;
446 if (!ret)
447 return 0;
448
449 if (!intel_state.in_scale)
450 switch (intel_state.scale_factor)
451 {
452 case 1:
453 i.log2_scale_factor = 0;
454 break;
455 case 2:
456 i.log2_scale_factor = 1;
457 break;
458 case 4:
459 i.log2_scale_factor = 2;
460 break;
461 case 8:
462 i.log2_scale_factor = 3;
463 break;
464 default:
465 /* esp is invalid as index */
8280f326 466 intel_state.index = i386_regtab + REGNAM_EAX + ESP_REG_NUM;
ee86248c
JB
467 break;
468 }
469
470 break;
471 }
92b4f90c 472 goto fallthrough;
3c7b9c2c
L
473
474 case O_register:
475 ret = i386_intel_simplify_register (e);
476 if (ret == 2)
477 {
478 gas_assert (e->X_add_number < (unsigned short) -1);
479 e->X_md = (unsigned short) e->X_add_number + 1;
480 e->X_op = O_constant;
481 e->X_add_number = 0;
482 }
483 return ret;
484
485 case O_constant:
486 if (e->X_md)
487 return i386_intel_simplify_register (e);
488
ee86248c
JB
489 /* FALLTHROUGH */
490 default:
92b4f90c 491fallthrough:
f09c1772
L
492 if (e->X_add_symbol
493 && !i386_intel_simplify_symbol (e->X_add_symbol))
ee86248c
JB
494 return 0;
495 if (e->X_op == O_add || e->X_op == O_subtract)
496 {
497 base = intel_state.base;
91d6fa6a 498 state_index = intel_state.index;
ee86248c 499 }
91d6fa6a 500 if (!i386_intel_check (the_reg, base, state_index)
f09c1772
L
501 || (e->X_op_symbol
502 && !i386_intel_simplify_symbol (e->X_op_symbol))
91d6fa6a 503 || !i386_intel_check (the_reg,
f09c1772
L
504 (e->X_op != O_add
505 ? base : intel_state.base),
506 (e->X_op != O_add
507 ? state_index : intel_state.index)))
ee86248c
JB
508 return 0;
509 break;
510 }
511
f09c1772
L
512 if (this_operand >= 0
513 && e->X_op == O_symbol
514 && !intel_state.in_offset)
ee86248c
JB
515 {
516 segT seg = S_GET_SEGMENT (e->X_add_symbol);
517
518 if (seg != absolute_section
519 && seg != reg_section
520 && seg != expr_section)
521 intel_state.is_mem |= 2 - !intel_state.in_bracket;
522 }
523
524 return 1;
525}
526
527int i386_need_index_operator (void)
528{
529 return intel_syntax < 0;
530}
531
532static int
533i386_intel_operand (char *operand_string, int got_a_float)
534{
535 char *saved_input_line_pointer, *buf;
536 segT exp_seg;
537 expressionS exp, *expP;
538 char suffix = 0;
539 int ret;
540
43234a1e
L
541 /* Handle vector immediates. */
542 if (RC_SAE_immediate (operand_string))
543 return 1;
544
ee86248c
JB
545 /* Initialize state structure. */
546 intel_state.op_modifier = O_absent;
547 intel_state.is_mem = 0;
25303607 548 intel_state.is_indirect = 0;
1acf546e 549 intel_state.has_offset = 0;
ee86248c
JB
550 intel_state.base = NULL;
551 intel_state.index = NULL;
552 intel_state.seg = NULL;
553 operand_type_set (&intel_state.reloc_types, ~0);
9c2799c2
NC
554 gas_assert (!intel_state.in_offset);
555 gas_assert (!intel_state.in_bracket);
556 gas_assert (!intel_state.in_scale);
ee86248c
JB
557
558 saved_input_line_pointer = input_line_pointer;
559 input_line_pointer = buf = xstrdup (operand_string);
560
561 intel_syntax = -1;
562 memset (&exp, 0, sizeof(exp));
563 exp_seg = expression (&exp);
564 ret = i386_intel_simplify (&exp);
565 intel_syntax = 1;
566
567 SKIP_WHITESPACE ();
43234a1e
L
568
569 /* Handle vector operations. */
570 if (*input_line_pointer == '{')
571 {
572 char *end = check_VecOperations (input_line_pointer, NULL);
573 if (end)
574 input_line_pointer = end;
575 else
576 ret = 0;
577 }
578
ee86248c
JB
579 if (!is_end_of_line[(unsigned char) *input_line_pointer])
580 {
581 as_bad (_("junk `%s' after expression"), input_line_pointer);
582 ret = 0;
583 }
584 else if (exp.X_op == O_illegal || exp.X_op == O_absent)
585 {
586 as_bad (_("invalid expression"));
587 ret = 0;
588 }
6cee4cda
L
589 else if (!intel_state.has_offset
590 && input_line_pointer > buf
591 && *(input_line_pointer - 1) == ']')
25303607
L
592 {
593 intel_state.is_mem |= 1;
594 intel_state.is_indirect = 1;
595 }
ee86248c
JB
596
597 input_line_pointer = saved_input_line_pointer;
598 free (buf);
599
9c2799c2
NC
600 gas_assert (!intel_state.in_offset);
601 gas_assert (!intel_state.in_bracket);
602 gas_assert (!intel_state.in_scale);
ee86248c
JB
603
604 if (!ret)
605 return 0;
606
607 if (intel_state.op_modifier != O_absent
608 && current_templates->start->base_opcode != 0x8d /* lea */)
609 {
610 i.types[this_operand].bitfield.unspecified = 0;
611
612 switch (intel_state.op_modifier)
613 {
614 case O_byte_ptr:
615 i.types[this_operand].bitfield.byte = 1;
616 suffix = BYTE_MNEM_SUFFIX;
617 break;
618
619 case O_word_ptr:
620 i.types[this_operand].bitfield.word = 1;
621 if ((current_templates->start->name[0] == 'l'
622 && current_templates->start->name[2] == 's'
623 && current_templates->start->name[3] == 0)
624 || current_templates->start->base_opcode == 0x62 /* bound */)
625 suffix = BYTE_MNEM_SUFFIX; /* so it will cause an error */
626 else if (got_a_float == 2) /* "fi..." */
627 suffix = SHORT_MNEM_SUFFIX;
628 else
629 suffix = WORD_MNEM_SUFFIX;
630 break;
631
632 case O_dword_ptr:
633 i.types[this_operand].bitfield.dword = 1;
634 if ((current_templates->start->name[0] == 'l'
635 && current_templates->start->name[2] == 's'
636 && current_templates->start->name[3] == 0)
637 || current_templates->start->base_opcode == 0x62 /* bound */)
638 suffix = WORD_MNEM_SUFFIX;
639 else if (flag_code == CODE_16BIT
640 && (current_templates->start->opcode_modifier.jump
641 || current_templates->start->opcode_modifier.jumpdword))
642 suffix = LONG_DOUBLE_MNEM_SUFFIX;
643 else if (got_a_float == 1) /* "f..." */
644 suffix = SHORT_MNEM_SUFFIX;
645 else
646 suffix = LONG_MNEM_SUFFIX;
647 break;
648
649 case O_fword_ptr:
650 i.types[this_operand].bitfield.fword = 1;
651 if (current_templates->start->name[0] == 'l'
652 && current_templates->start->name[2] == 's'
653 && current_templates->start->name[3] == 0)
654 suffix = LONG_MNEM_SUFFIX;
655 else if (!got_a_float)
656 {
657 if (flag_code == CODE_16BIT)
658 add_prefix (DATA_PREFIX_OPCODE);
659 suffix = LONG_DOUBLE_MNEM_SUFFIX;
660 }
661 else
662 suffix = BYTE_MNEM_SUFFIX; /* so it will cause an error */
663 break;
664
665 case O_qword_ptr:
666 i.types[this_operand].bitfield.qword = 1;
667 if (current_templates->start->base_opcode == 0x62 /* bound */
668 || got_a_float == 1) /* "f..." */
669 suffix = LONG_MNEM_SUFFIX;
670 else
671 suffix = QWORD_MNEM_SUFFIX;
672 break;
673
674 case O_tbyte_ptr:
675 i.types[this_operand].bitfield.tbyte = 1;
676 if (got_a_float == 1)
677 suffix = LONG_DOUBLE_MNEM_SUFFIX;
678 else
679 suffix = BYTE_MNEM_SUFFIX; /* so it will cause an error */
680 break;
681
682 case O_oword_ptr:
683 case O_xmmword_ptr:
684 i.types[this_operand].bitfield.xmmword = 1;
685 suffix = XMMWORD_MNEM_SUFFIX;
686 break;
687
688 case O_ymmword_ptr:
689 i.types[this_operand].bitfield.ymmword = 1;
690 suffix = YMMWORD_MNEM_SUFFIX;
691 break;
692
43234a1e
L
693 case O_zmmword_ptr:
694 i.types[this_operand].bitfield.zmmword = 1;
695 suffix = ZMMWORD_MNEM_SUFFIX;
696 break;
697
ee86248c
JB
698 case O_far_ptr:
699 suffix = LONG_DOUBLE_MNEM_SUFFIX;
700 /* FALLTHROUGH */
701 case O_near_ptr:
702 if (!current_templates->start->opcode_modifier.jump
703 && !current_templates->start->opcode_modifier.jumpdword)
704 suffix = got_a_float /* so it will cause an error */
705 ? BYTE_MNEM_SUFFIX
706 : LONG_DOUBLE_MNEM_SUFFIX;
707 break;
708
709 default:
710 BAD_CASE (intel_state.op_modifier);
711 break;
712 }
713
714 if (!i.suffix)
715 i.suffix = suffix;
716 else if (i.suffix != suffix)
717 {
718 as_bad (_("conflicting operand size modifiers"));
719 return 0;
720 }
721 }
722
723 /* Operands for jump/call need special consideration. */
724 if (current_templates->start->opcode_modifier.jump
725 || current_templates->start->opcode_modifier.jumpdword
726 || current_templates->start->opcode_modifier.jumpintersegment)
727 {
f09c1772
L
728 if (i.op[this_operand].regs
729 || intel_state.base
730 || intel_state.index
ee86248c
JB
731 || intel_state.is_mem > 1)
732 i.types[this_operand].bitfield.jumpabsolute = 1;
733 else
734 switch (intel_state.op_modifier)
735 {
736 case O_near_ptr:
737 if (intel_state.seg)
738 i.types[this_operand].bitfield.jumpabsolute = 1;
739 else
740 intel_state.is_mem = 1;
741 break;
742 case O_far_ptr:
743 case O_absent:
744 if (!intel_state.seg)
745 {
746 intel_state.is_mem = 1;
747 if (intel_state.op_modifier == O_absent)
25303607
L
748 {
749 if (intel_state.is_indirect == 1)
750 i.types[this_operand].bitfield.jumpabsolute = 1;
751 break;
752 }
ee86248c
JB
753 as_bad (_("cannot infer the segment part of the operand"));
754 return 0;
755 }
756 else if (S_GET_SEGMENT (intel_state.seg) == reg_section)
757 i.types[this_operand].bitfield.jumpabsolute = 1;
758 else
759 {
760 i386_operand_type types;
761
762 if (i.imm_operands >= MAX_IMMEDIATE_OPERANDS)
763 {
764 as_bad (_("at most %d immediate operands are allowed"),
765 MAX_IMMEDIATE_OPERANDS);
766 return 0;
767 }
768 expP = &im_expressions[i.imm_operands++];
769 memset (expP, 0, sizeof(*expP));
770 expP->X_op = O_symbol;
771 expP->X_add_symbol = intel_state.seg;
772 i.op[this_operand].imms = expP;
773
774 resolve_expression (expP);
775 operand_type_set (&types, ~0);
776 if (!i386_finalize_immediate (S_GET_SEGMENT (intel_state.seg),
777 expP, types, operand_string))
778 return 0;
779 if (i.operands < MAX_OPERANDS)
780 {
781 this_operand = i.operands++;
782 i.types[this_operand].bitfield.unspecified = 1;
783 }
784 if (suffix == LONG_DOUBLE_MNEM_SUFFIX)
785 i.suffix = 0;
786 intel_state.seg = NULL;
787 intel_state.is_mem = 0;
788 }
789 break;
790 default:
791 i.types[this_operand].bitfield.jumpabsolute = 1;
792 break;
793 }
794 if (i.types[this_operand].bitfield.jumpabsolute)
795 intel_state.is_mem |= 1;
796 }
797 else if (intel_state.seg)
798 intel_state.is_mem |= 1;
799
800 if (i.op[this_operand].regs)
801 {
802 i386_operand_type temp;
803
804 /* Register operand. */
805 if (intel_state.base || intel_state.index || intel_state.seg)
806 {
807 as_bad (_("invalid operand"));
808 return 0;
809 }
810
811 temp = i.op[this_operand].regs->reg_type;
812 temp.bitfield.baseindex = 0;
f09c1772
L
813 i.types[this_operand] = operand_type_or (i.types[this_operand],
814 temp);
ee86248c
JB
815 i.types[this_operand].bitfield.unspecified = 0;
816 ++i.reg_operands;
817 }
f09c1772
L
818 else if (intel_state.base
819 || intel_state.index
820 || intel_state.seg
ee86248c
JB
821 || intel_state.is_mem)
822 {
823 /* Memory operand. */
faf786e6 824 if ((int) i.mem_operands
ee86248c
JB
825 >= 2 - !current_templates->start->opcode_modifier.isstring)
826 {
313c53d1
L
827 /* Handle
828
829 call 0x9090,0x90909090
830 lcall 0x9090,0x90909090
831 jmp 0x9090,0x90909090
832 ljmp 0x9090,0x90909090
833 */
834
835 if ((current_templates->start->opcode_modifier.jumpintersegment
836 || current_templates->start->opcode_modifier.jumpdword
837 || current_templates->start->opcode_modifier.jump)
838 && this_operand == 1
839 && intel_state.seg == NULL
840 && i.mem_operands == 1
841 && i.disp_operands == 1
842 && intel_state.op_modifier == O_absent)
843 {
844 /* Try to process the first operand as immediate, */
845 this_operand = 0;
846 if (i386_finalize_immediate (exp_seg, i.op[0].imms,
847 intel_state.reloc_types,
848 NULL))
849 {
850 this_operand = 1;
851 expP = &im_expressions[0];
852 i.op[this_operand].imms = expP;
853 *expP = exp;
854
855 /* Try to process the second operand as immediate, */
856 if (i386_finalize_immediate (exp_seg, expP,
857 intel_state.reloc_types,
858 NULL))
859 {
860 i.mem_operands = 0;
861 i.disp_operands = 0;
862 i.imm_operands = 2;
863 i.types[0].bitfield.mem = 0;
864 i.types[0].bitfield.disp16 = 0;
865 i.types[0].bitfield.disp32 = 0;
866 i.types[0].bitfield.disp32s = 0;
867 return 1;
868 }
869 }
870 }
871
ee86248c
JB
872 as_bad (_("too many memory references for `%s'"),
873 current_templates->start->name);
874 return 0;
875 }
876
877 expP = &disp_expressions[i.disp_operands];
878 memcpy (expP, &exp, sizeof(exp));
879 resolve_expression (expP);
880
f09c1772
L
881 if (expP->X_op != O_constant
882 || expP->X_add_number
883 || (!intel_state.base
884 && !intel_state.index))
ee86248c
JB
885 {
886 i.op[this_operand].disps = expP;
887 i.disp_operands++;
888
889 if (flag_code == CODE_64BIT)
890 {
891 i.types[this_operand].bitfield.disp32 = 1;
892 if (!i.prefix[ADDR_PREFIX])
893 {
894 i.types[this_operand].bitfield.disp64 = 1;
895 i.types[this_operand].bitfield.disp32s = 1;
896 }
897 }
898 else if (!i.prefix[ADDR_PREFIX] ^ (flag_code == CODE_16BIT))
899 i.types[this_operand].bitfield.disp32 = 1;
900 else
901 i.types[this_operand].bitfield.disp16 = 1;
902
903#if defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT)
904 /*
905 * exp_seg is used only for verification in
906 * i386_finalize_displacement, and we can end up seeing reg_section
907 * here - but we know we removed all registers from the expression
908 * (or error-ed on any remaining ones) in i386_intel_simplify. I
909 * consider the check in i386_finalize_displacement bogus anyway, in
910 * particular because it doesn't allow for expr_section, so I'd
911 * rather see that check (and the similar one in
912 * i386_finalize_immediate) use SEG_NORMAL(), but not being an a.out
913 * expert I can't really say whether that would have other bad side
914 * effects.
915 */
916 if (OUTPUT_FLAVOR == bfd_target_aout_flavour
917 && exp_seg == reg_section)
918 exp_seg = expP->X_op != O_constant ? undefined_section
919 : absolute_section;
920#endif
921
922 if (!i386_finalize_displacement (exp_seg, expP,
923 intel_state.reloc_types,
924 operand_string))
925 return 0;
926 }
927
928 if (intel_state.base || intel_state.index)
929 i.types[this_operand].bitfield.baseindex = 1;
930
931 if (intel_state.seg)
932 {
933 for (;;)
934 {
935 expP = symbol_get_value_expression (intel_state.seg);
936 if (expP->X_op != O_full_ptr)
937 break;
938 intel_state.seg = expP->X_add_symbol;
939 }
0398aac5 940 if (expP->X_op != O_register)
ee86248c
JB
941 {
942 as_bad (_("segment register name expected"));
943 return 0;
944 }
945 if (!i386_regtab[expP->X_add_number].reg_type.bitfield.sreg2
946 && !i386_regtab[expP->X_add_number].reg_type.bitfield.sreg3)
947 {
948 as_bad (_("invalid use of register"));
949 return 0;
950 }
951 switch (i386_regtab[expP->X_add_number].reg_num)
952 {
953 case 0: i.seg[i.mem_operands] = &es; break;
954 case 1: i.seg[i.mem_operands] = &cs; break;
955 case 2: i.seg[i.mem_operands] = &ss; break;
956 case 3: i.seg[i.mem_operands] = &ds; break;
957 case 4: i.seg[i.mem_operands] = &fs; break;
958 case 5: i.seg[i.mem_operands] = &gs; break;
959 case RegFlat: i.seg[i.mem_operands] = NULL; break;
960 }
961 }
962
963 /* Swap base and index in 16-bit memory operands like
964 [si+bx]. Since i386_index_check is also used in AT&T
965 mode we have to do that here. */
966 if (intel_state.base
967 && intel_state.index
968 && intel_state.base->reg_type.bitfield.reg16
969 && intel_state.index->reg_type.bitfield.reg16
970 && intel_state.base->reg_num >= 6
971 && intel_state.index->reg_num < 6)
972 {
973 i.base_reg = intel_state.index;
974 i.index_reg = intel_state.base;
975 }
976 else
977 {
978 i.base_reg = intel_state.base;
979 i.index_reg = intel_state.index;
980 }
981
982 if (!i386_index_check (operand_string))
983 return 0;
984
985 i.types[this_operand].bitfield.mem = 1;
986 ++i.mem_operands;
987 }
988 else
989 {
990 /* Immediate. */
991 if (i.imm_operands >= MAX_IMMEDIATE_OPERANDS)
992 {
993 as_bad (_("at most %d immediate operands are allowed"),
994 MAX_IMMEDIATE_OPERANDS);
995 return 0;
996 }
997
998 expP = &im_expressions[i.imm_operands++];
999 i.op[this_operand].imms = expP;
1000 *expP = exp;
1001
1002 return i386_finalize_immediate (exp_seg, expP, intel_state.reloc_types,
1003 operand_string);
1004 }
1005
1006 return 1;
1007}