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ee86248c 1/* tc-i386.c -- Assemble Intel syntax code for ix86/x86-64
a2c58332 2 Copyright (C) 2009-2022 Free Software Foundation, Inc.
ee86248c
JB
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to the Free
18 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
19 02110-1301, USA. */
20
21static struct
22 {
23 operatorT op_modifier; /* Operand modifier. */
24 int is_mem; /* 1 if operand is memory reference. */
25303607 25 int is_indirect; /* 1 if operand is indirect reference. */
6cee4cda 26 int has_offset; /* 1 if operand has offset. */
ee86248c
JB
27 unsigned int in_offset; /* >=1 if processing operand of offset. */
28 unsigned int in_bracket; /* >=1 if processing operand in brackets. */
33eaf5de 29 unsigned int in_scale; /* >=1 if processing multiplication operand
ee86248c
JB
30 * in brackets. */
31 i386_operand_type reloc_types; /* Value obtained from lex_got(). */
32 const reg_entry *base; /* Base register (if any). */
33 const reg_entry *index; /* Index register (if any). */
34 offsetT scale_factor; /* Accumulated scale factor. */
35 symbolS *seg;
36 }
37intel_state;
38
39/* offset X_add_symbol */
40#define O_offset O_md32
7ac3eb25
L
41/* offset X_add_symbol */
42#define O_short O_md31
43/* near ptr X_add_symbol */
44#define O_near_ptr O_md30
45/* far ptr X_add_symbol */
46#define O_far_ptr O_md29
ee86248c 47/* byte ptr X_add_symbol */
7ac3eb25 48#define O_byte_ptr O_md28
ee86248c 49/* word ptr X_add_symbol */
7ac3eb25 50#define O_word_ptr O_md27
ee86248c 51/* dword ptr X_add_symbol */
7ac3eb25 52#define O_dword_ptr O_md26
ee86248c 53/* qword ptr X_add_symbol */
7ac3eb25 54#define O_qword_ptr O_md25
f2f5811f
JB
55/* mmword ptr X_add_symbol */
56#define O_mmword_ptr O_qword_ptr
ee86248c 57/* fword ptr X_add_symbol */
7456d03d 58#define O_fword_ptr O_md24
ee86248c 59/* tbyte ptr X_add_symbol */
7456d03d
JB
60#define O_tbyte_ptr O_md23
61/* oword ptr X_add_symbol */
62#define O_oword_ptr O_md22
ee86248c 63/* xmmword ptr X_add_symbol */
7456d03d 64#define O_xmmword_ptr O_oword_ptr
ee86248c 65/* ymmword ptr X_add_symbol */
7456d03d 66#define O_ymmword_ptr O_md21
43234a1e 67/* zmmword ptr X_add_symbol */
7456d03d 68#define O_zmmword_ptr O_md20
ee86248c
JB
69
70static struct
71 {
72 const char *name;
1e9cc1c2 73 operatorT op;
ee86248c
JB
74 unsigned int operands;
75 }
76const i386_operators[] =
77 {
78 { "and", O_bit_and, 2 },
79 { "eq", O_eq, 2 },
80 { "ge", O_ge, 2 },
81 { "gt", O_gt, 2 },
82 { "le", O_le, 2 },
83 { "lt", O_lt, 2 },
84 { "mod", O_modulus, 2 },
85 { "ne", O_ne, 2 },
86 { "not", O_bit_not, 1 },
87 { "offset", O_offset, 1 },
88 { "or", O_bit_inclusive_or, 2 },
89 { "shl", O_left_shift, 2 },
90 { "short", O_short, 1 },
91 { "shr", O_right_shift, 2 },
92 { "xor", O_bit_exclusive_or, 2 },
93 { NULL, O_illegal, 0 }
94 };
95
96static struct
97 {
98 const char *name;
1e9cc1c2 99 operatorT op;
ee86248c
JB
100 unsigned short sz[3];
101 }
102const i386_types[] =
103 {
104#define I386_TYPE(t, n) { #t, O_##t##_ptr, { n, n, n } }
105 I386_TYPE(byte, 1),
106 I386_TYPE(word, 2),
107 I386_TYPE(dword, 4),
108 I386_TYPE(fword, 6),
109 I386_TYPE(qword, 8),
f2f5811f 110 I386_TYPE(mmword, 8),
ee86248c
JB
111 I386_TYPE(tbyte, 10),
112 I386_TYPE(oword, 16),
113 I386_TYPE(xmmword, 16),
114 I386_TYPE(ymmword, 32),
43234a1e 115 I386_TYPE(zmmword, 64),
ee86248c
JB
116#undef I386_TYPE
117 { "near", O_near_ptr, { 0xff04, 0xff02, 0xff08 } },
118 { "far", O_far_ptr, { 0xff06, 0xff05, 0xff06 } },
119 { NULL, O_illegal, { 0, 0, 0 } }
120 };
121
122operatorT i386_operator (const char *name, unsigned int operands, char *pc)
123{
124 unsigned int j;
125
b3983e5f
JB
126#ifdef SVR4_COMMENT_CHARS
127 if (!name && operands == 2 && *input_line_pointer == '\\')
128 switch (input_line_pointer[1])
129 {
130 case '/': input_line_pointer += 2; return O_divide;
131 case '%': input_line_pointer += 2; return O_modulus;
132 case '*': input_line_pointer += 2; return O_multiply;
133 }
134#endif
135
ee86248c
JB
136 if (!intel_syntax)
137 return O_absent;
138
139 if (!name)
140 {
141 if (operands != 2)
142 return O_illegal;
143 switch (*input_line_pointer)
144 {
145 case ':':
146 ++input_line_pointer;
147 return O_full_ptr;
148 case '[':
149 ++input_line_pointer;
150 return O_index;
151 case '@':
152 if (this_operand >= 0 && i.reloc[this_operand] == NO_RELOC)
153 {
154 int adjust = 0;
155 char *gotfree_input_line = lex_got (&i.reloc[this_operand],
156 &adjust,
d258b828 157 &intel_state.reloc_types);
ee86248c
JB
158
159 if (!gotfree_input_line)
160 break;
161 free (gotfree_input_line);
162 *input_line_pointer++ = '+';
163 memset (input_line_pointer, '0', adjust - 1);
164 input_line_pointer[adjust - 1] = ' ';
165 return O_add;
166 }
167 break;
168 }
169 return O_illegal;
170 }
171
172 for (j = 0; i386_operators[j].name; ++j)
91d6fa6a 173 if (strcasecmp (i386_operators[j].name, name) == 0)
ee86248c
JB
174 {
175 if (i386_operators[j].operands
176 && i386_operators[j].operands != operands)
177 return O_illegal;
1e9cc1c2 178 return i386_operators[j].op;
ee86248c
JB
179 }
180
181 for (j = 0; i386_types[j].name; ++j)
91d6fa6a 182 if (strcasecmp (i386_types[j].name, name) == 0)
ee86248c 183 break;
d02603dc 184
ee86248c
JB
185 if (i386_types[j].name && *pc == ' ')
186 {
d02603dc
NC
187 char *pname;
188 char c;
189
190 ++input_line_pointer;
191 c = get_symbol_name (&pname);
ee86248c 192
91d6fa6a 193 if (strcasecmp (pname, "ptr") == 0)
ee86248c 194 {
d02603dc 195 /* FIXME: What if c == '"' ? */
91d6fa6a 196 pname[-1] = *pc;
ee86248c
JB
197 *pc = c;
198 if (intel_syntax > 0 || operands != 1)
199 return O_illegal;
1e9cc1c2 200 return i386_types[j].op;
ee86248c
JB
201 }
202
a5748e0d
JB
203 if (strcasecmp (pname, "bcst") == 0)
204 {
205 /* FIXME: Again, what if c == '"' ? */
206 pname[-1] = *pc;
207 *pc = c;
208 if (intel_syntax > 0 || operands != 1
209 || i386_types[j].sz[0] > 8
210 || (i386_types[j].sz[0] & (i386_types[j].sz[0] - 1)))
211 return O_illegal;
212 if (!i.broadcast.bytes && !i.broadcast.type)
213 {
214 i.broadcast.bytes = i386_types[j].sz[0];
215 i.broadcast.operand = this_operand;
216 }
217 return i386_types[j].op;
218 }
219
d02603dc 220 (void) restore_line_pointer (c);
91d6fa6a 221 input_line_pointer = pname - 1;
ee86248c
JB
222 }
223
224 return O_absent;
225}
226
227static int i386_intel_parse_name (const char *name, expressionS *e)
228{
91d6fa6a 229 unsigned int j;
ee86248c 230
b7adb16d
JB
231 if (! strcmp (name, "$"))
232 {
233 current_location (e);
234 return 1;
235 }
236
91d6fa6a
NC
237 for (j = 0; i386_types[j].name; ++j)
238 if (strcasecmp(i386_types[j].name, name) == 0)
ee86248c
JB
239 {
240 e->X_op = O_constant;
91d6fa6a 241 e->X_add_number = i386_types[j].sz[flag_code];
ee86248c
JB
242 e->X_add_symbol = NULL;
243 e->X_op_symbol = NULL;
244 return 1;
245 }
246
247 return 0;
248}
249
91d6fa6a 250static INLINE int i386_intel_check (const reg_entry *rreg,
ee86248c 251 const reg_entry *base,
91d6fa6a 252 const reg_entry *iindex)
ee86248c 253{
f09c1772
L
254 if ((this_operand >= 0
255 && rreg != i.op[this_operand].regs)
256 || base != intel_state.base
257 || iindex != intel_state.index)
ee86248c
JB
258 {
259 as_bad (_("invalid use of register"));
260 return 0;
261 }
262 return 1;
263}
264
265static INLINE void i386_intel_fold (expressionS *e, symbolS *sym)
266{
27dee630 267 expressionS *exp = symbol_get_value_expression (sym);
ee86248c
JB
268 if (S_GET_SEGMENT (sym) == absolute_section)
269 {
270 offsetT val = e->X_add_number;
271
27dee630 272 *e = *exp;
ee86248c
JB
273 e->X_add_number += val;
274 }
275 else
276 {
27dee630
L
277 if (exp->X_op == O_symbol
278 && strcmp (S_GET_NAME (exp->X_add_symbol),
279 GLOBAL_OFFSET_TABLE_NAME) == 0)
280 sym = exp->X_add_symbol;
ee86248c
JB
281 e->X_add_symbol = sym;
282 e->X_op_symbol = NULL;
283 e->X_op = O_symbol;
284 }
285}
286
3c7b9c2c
L
287static int
288i386_intel_simplify_register (expressionS *e)
289{
290 int reg_num;
291
292 if (this_operand < 0 || intel_state.in_offset)
293 {
294 as_bad (_("invalid use of register"));
295 return 0;
296 }
297
298 if (e->X_op == O_register)
299 reg_num = e->X_add_number;
300 else
301 reg_num = e->X_md - 1;
302
35015cd1
NC
303 if (reg_num < 0 || reg_num >= (int) i386_regtab_size)
304 {
305 as_bad (_("invalid register number"));
306 return 0;
307 }
308
4faaa10f
JB
309 if (!check_register (&i386_regtab[reg_num]))
310 {
311 as_bad (_("register '%s%s' cannot be used here"),
312 register_prefix, i386_regtab[reg_num].reg_name);
313 return 0;
314 }
315
3c7b9c2c
L
316 if (!intel_state.in_bracket)
317 {
318 if (i.op[this_operand].regs)
319 {
320 as_bad (_("invalid use of register"));
321 return 0;
322 }
00cee14f 323 if (i386_regtab[reg_num].reg_type.bitfield.class == SReg
3c7b9c2c
L
324 && i386_regtab[reg_num].reg_num == RegFlat)
325 {
326 as_bad (_("invalid use of pseudo-register"));
327 return 0;
328 }
329 i.op[this_operand].regs = i386_regtab + reg_num;
330 }
9e2934f7 331 else if (!intel_state.index
1b54b8d7
JB
332 && (i386_regtab[reg_num].reg_type.bitfield.xmmword
333 || i386_regtab[reg_num].reg_type.bitfield.ymmword
334 || i386_regtab[reg_num].reg_type.bitfield.zmmword
e968fc9b 335 || i386_regtab[reg_num].reg_num == RegIZ))
9e2934f7 336 intel_state.index = i386_regtab + reg_num;
3c7b9c2c
L
337 else if (!intel_state.base && !intel_state.in_scale)
338 intel_state.base = i386_regtab + reg_num;
339 else if (!intel_state.index)
9e2934f7 340 {
a152332d
JB
341 const insn_template *t = current_templates->start;
342
9e2934f7 343 if (intel_state.in_scale
a152332d 344 || (t->opcode_modifier.opcodeprefix == PREFIX_0XF3
389d00a5
JB
345 && t->opcode_modifier.opcodespace == SPACE_0F
346 && t->base_opcode == 0x1b /* bndmk */)
a152332d 347 || (t->opcode_modifier.opcodeprefix == PREFIX_NONE
389d00a5
JB
348 && t->opcode_modifier.opcodespace == SPACE_0F
349 && (t->base_opcode & ~1) == 0x1a /* bnd{ld,st}x */)
9e2934f7
JB
350 || i386_regtab[reg_num].reg_type.bitfield.baseindex)
351 intel_state.index = i386_regtab + reg_num;
352 else
353 {
354 /* Convert base to index and make ESP/RSP the base. */
355 intel_state.index = intel_state.base;
356 intel_state.base = i386_regtab + reg_num;
357 }
358 }
3c7b9c2c
L
359 else
360 {
361 /* esp is invalid as index */
34684862 362 intel_state.index = reg_eax + ESP_REG_NUM;
3c7b9c2c
L
363 }
364 return 2;
365}
366
ee86248c
JB
367static int i386_intel_simplify (expressionS *);
368
369static INLINE int i386_intel_simplify_symbol(symbolS *sym)
370{
371 int ret = i386_intel_simplify (symbol_get_value_expression (sym));
372
373 if (ret == 2)
374 {
375 S_SET_SEGMENT(sym, absolute_section);
376 ret = 1;
377 }
378 return ret;
379}
380
381static int i386_intel_simplify (expressionS *e)
382{
f09c1772
L
383 const reg_entry *the_reg = (this_operand >= 0
384 ? i.op[this_operand].regs : NULL);
ee86248c 385 const reg_entry *base = intel_state.base;
91d6fa6a 386 const reg_entry *state_index = intel_state.index;
ee86248c
JB
387 int ret;
388
389 if (!intel_syntax)
390 return 1;
391
392 switch (e->X_op)
393 {
394 case O_index:
395 if (e->X_add_symbol)
396 {
397 if (!i386_intel_simplify_symbol (e->X_add_symbol)
f09c1772
L
398 || !i386_intel_check(the_reg, intel_state.base,
399 intel_state.index))
5bb3703f 400 return 0;
ee86248c
JB
401 }
402 if (!intel_state.in_offset)
403 ++intel_state.in_bracket;
404 ret = i386_intel_simplify_symbol (e->X_op_symbol);
405 if (!intel_state.in_offset)
406 --intel_state.in_bracket;
407 if (!ret)
408 return 0;
409 if (e->X_add_symbol)
410 e->X_op = O_add;
411 else
412 i386_intel_fold (e, e->X_op_symbol);
413 break;
414
415 case O_offset:
6cee4cda 416 intel_state.has_offset = 1;
ee86248c
JB
417 ++intel_state.in_offset;
418 ret = i386_intel_simplify_symbol (e->X_add_symbol);
419 --intel_state.in_offset;
91d6fa6a 420 if (!ret || !i386_intel_check(the_reg, base, state_index))
ee86248c
JB
421 return 0;
422 i386_intel_fold (e, e->X_add_symbol);
423 return ret;
424
425 case O_byte_ptr:
426 case O_word_ptr:
427 case O_dword_ptr:
428 case O_fword_ptr:
f2f5811f 429 case O_qword_ptr: /* O_mmword_ptr */
ee86248c 430 case O_tbyte_ptr:
7456d03d 431 case O_oword_ptr: /* O_xmmword_ptr */
ee86248c 432 case O_ymmword_ptr:
43234a1e 433 case O_zmmword_ptr:
ee86248c
JB
434 case O_near_ptr:
435 case O_far_ptr:
436 if (intel_state.op_modifier == O_absent)
437 intel_state.op_modifier = e->X_op;
438 /* FALLTHROUGH */
439 case O_short:
f09c1772
L
440 if (symbol_get_value_expression (e->X_add_symbol)->X_op
441 == O_register)
ee86248c
JB
442 {
443 as_bad (_("invalid use of register"));
444 return 0;
445 }
446 if (!i386_intel_simplify_symbol (e->X_add_symbol))
447 return 0;
448 i386_intel_fold (e, e->X_add_symbol);
449 break;
450
451 case O_full_ptr:
f09c1772
L
452 if (symbol_get_value_expression (e->X_op_symbol)->X_op
453 == O_register)
ee86248c
JB
454 {
455 as_bad (_("invalid use of register"));
456 return 0;
457 }
458 if (!i386_intel_simplify_symbol (e->X_op_symbol)
f09c1772
L
459 || !i386_intel_check(the_reg, intel_state.base,
460 intel_state.index))
ee86248c
JB
461 return 0;
462 if (!intel_state.in_offset)
fd4e0347
JB
463 {
464 if (!intel_state.seg)
465 intel_state.seg = e->X_add_symbol;
466 else
467 {
468 expressionS exp;
469
470 exp.X_op = O_full_ptr;
471 exp.X_add_symbol = e->X_add_symbol;
472 exp.X_op_symbol = intel_state.seg;
473 intel_state.seg = make_expr_symbol (&exp);
474 }
475 }
ee86248c
JB
476 i386_intel_fold (e, e->X_op_symbol);
477 break;
478
ee86248c
JB
479 case O_multiply:
480 if (this_operand >= 0 && intel_state.in_bracket)
481 {
482 expressionS *scale = NULL;
c2a5914e 483 int has_index = (intel_state.index != NULL);
ee86248c
JB
484
485 if (!intel_state.in_scale++)
486 intel_state.scale_factor = 1;
487
488 ret = i386_intel_simplify_symbol (e->X_add_symbol);
c2a5914e 489 if (ret && !has_index && intel_state.index)
ee86248c
JB
490 scale = symbol_get_value_expression (e->X_op_symbol);
491
492 if (ret)
493 ret = i386_intel_simplify_symbol (e->X_op_symbol);
c2a5914e 494 if (ret && !scale && !has_index && intel_state.index)
ee86248c
JB
495 scale = symbol_get_value_expression (e->X_add_symbol);
496
c2a5914e 497 if (ret && scale)
ee86248c
JB
498 {
499 resolve_expression (scale);
500 if (scale->X_op != O_constant
dc821c5f 501 || intel_state.index->reg_type.bitfield.word)
ee86248c
JB
502 scale->X_add_number = 0;
503 intel_state.scale_factor *= scale->X_add_number;
504 }
505
506 --intel_state.in_scale;
507 if (!ret)
508 return 0;
509
510 if (!intel_state.in_scale)
511 switch (intel_state.scale_factor)
512 {
513 case 1:
514 i.log2_scale_factor = 0;
515 break;
516 case 2:
517 i.log2_scale_factor = 1;
518 break;
519 case 4:
520 i.log2_scale_factor = 2;
521 break;
522 case 8:
523 i.log2_scale_factor = 3;
524 break;
525 default:
526 /* esp is invalid as index */
34684862 527 intel_state.index = reg_eax + ESP_REG_NUM;
ee86248c
JB
528 break;
529 }
530
531 break;
532 }
92b4f90c 533 goto fallthrough;
3c7b9c2c
L
534
535 case O_register:
536 ret = i386_intel_simplify_register (e);
537 if (ret == 2)
538 {
539 gas_assert (e->X_add_number < (unsigned short) -1);
540 e->X_md = (unsigned short) e->X_add_number + 1;
541 e->X_op = O_constant;
542 e->X_add_number = 0;
543 }
544 return ret;
545
546 case O_constant:
547 if (e->X_md)
548 return i386_intel_simplify_register (e);
549
ee86248c
JB
550 /* FALLTHROUGH */
551 default:
dc1e8a47 552 fallthrough:
f09c1772
L
553 if (e->X_add_symbol
554 && !i386_intel_simplify_symbol (e->X_add_symbol))
ee86248c 555 return 0;
64d23078
JB
556 if (!the_reg && this_operand >= 0
557 && e->X_op == O_symbol && !e->X_add_number)
558 the_reg = i.op[this_operand].regs;
ee86248c
JB
559 if (e->X_op == O_add || e->X_op == O_subtract)
560 {
561 base = intel_state.base;
91d6fa6a 562 state_index = intel_state.index;
ee86248c 563 }
91d6fa6a 564 if (!i386_intel_check (the_reg, base, state_index)
f09c1772
L
565 || (e->X_op_symbol
566 && !i386_intel_simplify_symbol (e->X_op_symbol))
91d6fa6a 567 || !i386_intel_check (the_reg,
f09c1772
L
568 (e->X_op != O_add
569 ? base : intel_state.base),
570 (e->X_op != O_add
571 ? state_index : intel_state.index)))
ee86248c
JB
572 return 0;
573 break;
574 }
575
f09c1772
L
576 if (this_operand >= 0
577 && e->X_op == O_symbol
578 && !intel_state.in_offset)
ee86248c
JB
579 {
580 segT seg = S_GET_SEGMENT (e->X_add_symbol);
581
582 if (seg != absolute_section
583 && seg != reg_section
584 && seg != expr_section)
585 intel_state.is_mem |= 2 - !intel_state.in_bracket;
586 }
587
588 return 1;
589}
590
591int i386_need_index_operator (void)
592{
593 return intel_syntax < 0;
594}
595
596static int
597i386_intel_operand (char *operand_string, int got_a_float)
598{
599 char *saved_input_line_pointer, *buf;
600 segT exp_seg;
601 expressionS exp, *expP;
602 char suffix = 0;
7063667e 603 bool rc_sae_modifier = i.rounding.type != rc_none && i.rounding.modifier;
ee86248c
JB
604 int ret;
605
43234a1e
L
606 /* Handle vector immediates. */
607 if (RC_SAE_immediate (operand_string))
cf665fee
JB
608 {
609 if (i.imm_operands)
610 {
611 as_bad (_("`%s': RC/SAE operand must precede immediate operands"),
612 current_templates->start->name);
613 return 0;
614 }
615
616 return 1;
617 }
43234a1e 618
ee86248c
JB
619 /* Initialize state structure. */
620 intel_state.op_modifier = O_absent;
621 intel_state.is_mem = 0;
25303607 622 intel_state.is_indirect = 0;
1acf546e 623 intel_state.has_offset = 0;
ee86248c
JB
624 intel_state.base = NULL;
625 intel_state.index = NULL;
626 intel_state.seg = NULL;
627 operand_type_set (&intel_state.reloc_types, ~0);
9c2799c2
NC
628 gas_assert (!intel_state.in_offset);
629 gas_assert (!intel_state.in_bracket);
630 gas_assert (!intel_state.in_scale);
ee86248c
JB
631
632 saved_input_line_pointer = input_line_pointer;
633 input_line_pointer = buf = xstrdup (operand_string);
634
635 intel_syntax = -1;
636 memset (&exp, 0, sizeof(exp));
637 exp_seg = expression (&exp);
638 ret = i386_intel_simplify (&exp);
639 intel_syntax = 1;
640
641 SKIP_WHITESPACE ();
43234a1e
L
642
643 /* Handle vector operations. */
644 if (*input_line_pointer == '{')
645 {
f70c6814 646 char *end = check_VecOperations (input_line_pointer);
43234a1e
L
647 if (end)
648 input_line_pointer = end;
649 else
650 ret = 0;
651 }
652
ee86248c
JB
653 if (!is_end_of_line[(unsigned char) *input_line_pointer])
654 {
38bf5113
JB
655 if (ret)
656 as_bad (_("junk `%s' after expression"), input_line_pointer);
ee86248c
JB
657 ret = 0;
658 }
659 else if (exp.X_op == O_illegal || exp.X_op == O_absent)
660 {
38bf5113
JB
661 if (ret)
662 as_bad (_("invalid expression"));
ee86248c
JB
663 ret = 0;
664 }
6cee4cda
L
665 else if (!intel_state.has_offset
666 && input_line_pointer > buf
667 && *(input_line_pointer - 1) == ']')
25303607
L
668 {
669 intel_state.is_mem |= 1;
670 intel_state.is_indirect = 1;
671 }
ee86248c
JB
672
673 input_line_pointer = saved_input_line_pointer;
674 free (buf);
675
9c2799c2
NC
676 gas_assert (!intel_state.in_offset);
677 gas_assert (!intel_state.in_bracket);
678 gas_assert (!intel_state.in_scale);
ee86248c
JB
679
680 if (!ret)
681 return 0;
682
683 if (intel_state.op_modifier != O_absent
35648716
JB
684 && (current_templates->start->opcode_modifier.opcodespace != SPACE_BASE
685 || current_templates->start->base_opcode != 0x8d /* lea */))
ee86248c
JB
686 {
687 i.types[this_operand].bitfield.unspecified = 0;
688
689 switch (intel_state.op_modifier)
690 {
691 case O_byte_ptr:
692 i.types[this_operand].bitfield.byte = 1;
693 suffix = BYTE_MNEM_SUFFIX;
694 break;
695
696 case O_word_ptr:
697 i.types[this_operand].bitfield.word = 1;
37404387 698 if (got_a_float == 2) /* "fi..." */
ee86248c 699 suffix = SHORT_MNEM_SUFFIX;
c9f5b96b
JB
700 else if ((current_templates->start->base_opcode | 1) != 0x03
701 || (current_templates->start->opcode_modifier.opcodespace
702 != SPACE_0F)) /* lar, lsl */
ee86248c
JB
703 suffix = WORD_MNEM_SUFFIX;
704 break;
705
706 case O_dword_ptr:
707 i.types[this_operand].bitfield.dword = 1;
708 if ((current_templates->start->name[0] == 'l'
709 && current_templates->start->name[2] == 's'
710 && current_templates->start->name[3] == 0)
35648716
JB
711 || (current_templates->start->opcode_modifier.opcodespace == SPACE_BASE
712 && current_templates->start->base_opcode == 0x62 /* bound */))
ee86248c 713 suffix = WORD_MNEM_SUFFIX;
d488367a 714 else if (flag_code != CODE_32BIT
0cfa3eb3
JB
715 && (current_templates->start->opcode_modifier.jump == JUMP
716 || current_templates->start->opcode_modifier.jump
717 == JUMP_DWORD))
d488367a
JB
718 suffix = flag_code == CODE_16BIT ? LONG_DOUBLE_MNEM_SUFFIX
719 : WORD_MNEM_SUFFIX;
ee86248c
JB
720 else if (got_a_float == 1) /* "f..." */
721 suffix = SHORT_MNEM_SUFFIX;
722 else
723 suffix = LONG_MNEM_SUFFIX;
724 break;
725
726 case O_fword_ptr:
727 i.types[this_operand].bitfield.fword = 1;
728 if (current_templates->start->name[0] == 'l'
729 && current_templates->start->name[2] == 's'
730 && current_templates->start->name[3] == 0)
731 suffix = LONG_MNEM_SUFFIX;
732 else if (!got_a_float)
733 {
734 if (flag_code == CODE_16BIT)
735 add_prefix (DATA_PREFIX_OPCODE);
736 suffix = LONG_DOUBLE_MNEM_SUFFIX;
737 }
ee86248c
JB
738 break;
739
f2f5811f 740 case O_qword_ptr: /* O_mmword_ptr */
ee86248c 741 i.types[this_operand].bitfield.qword = 1;
35648716
JB
742 if ((current_templates->start->opcode_modifier.opcodespace == SPACE_BASE
743 && current_templates->start->base_opcode == 0x62 /* bound */)
ee86248c
JB
744 || got_a_float == 1) /* "f..." */
745 suffix = LONG_MNEM_SUFFIX;
746 else
747 suffix = QWORD_MNEM_SUFFIX;
748 break;
749
750 case O_tbyte_ptr:
751 i.types[this_operand].bitfield.tbyte = 1;
f210f0a0
JB
752 if (got_a_float)
753 break;
754 if (flag_code == CODE_64BIT
755 && (current_templates->start->operand_types[0].bitfield.fword
756 || current_templates->start->operand_types[0].bitfield.tbyte
757 || current_templates->start->opcode_modifier.jump == JUMP_DWORD
758 || current_templates->start->opcode_modifier.jump == JUMP))
5990e377 759 suffix = QWORD_MNEM_SUFFIX; /* l[fgs]s, [ls][gi]dt, call, jmp */
ee86248c 760 else
a8f4f6b9 761 i.types[this_operand].bitfield.byte = 1; /* cause an error */
ee86248c
JB
762 break;
763
7456d03d 764 case O_oword_ptr: /* O_xmmword_ptr */
ee86248c 765 i.types[this_operand].bitfield.xmmword = 1;
ee86248c
JB
766 break;
767
768 case O_ymmword_ptr:
769 i.types[this_operand].bitfield.ymmword = 1;
ee86248c
JB
770 break;
771
43234a1e
L
772 case O_zmmword_ptr:
773 i.types[this_operand].bitfield.zmmword = 1;
43234a1e
L
774 break;
775
ee86248c
JB
776 case O_far_ptr:
777 suffix = LONG_DOUBLE_MNEM_SUFFIX;
778 /* FALLTHROUGH */
779 case O_near_ptr:
0cfa3eb3
JB
780 if (current_templates->start->opcode_modifier.jump != JUMP
781 && current_templates->start->opcode_modifier.jump != JUMP_DWORD)
164d49cb
JB
782 {
783 /* cause an error */
784 i.types[this_operand].bitfield.byte = 1;
785 i.types[this_operand].bitfield.tbyte = 1;
786 suffix = i.suffix;
787 }
ee86248c
JB
788 break;
789
790 default:
791 BAD_CASE (intel_state.op_modifier);
792 break;
793 }
794
1cb0ab18
JB
795 /* Now check whether we actually want to infer an AT&T-like suffix.
796 We really only need to do this when operand size determination (incl.
797 REX.W) is going to be derived from it. For this we check whether the
798 given suffix is valid for any of the candidate templates. */
799 if (suffix && suffix != i.suffix
800 && (current_templates->start->opcode_modifier.opcodespace != SPACE_BASE
801 || current_templates->start->base_opcode != 0x62 /* bound */))
802 {
803 const insn_template *t;
804
805 for (t = current_templates->start; t < current_templates->end; ++t)
806 {
807 /* Operands haven't been swapped yet. */
808 unsigned int op = t->operands - 1 - this_operand;
809
810 /* Easy checks to skip templates which won't match anyway. */
811 if (this_operand >= t->operands || t->opcode_modifier.attsyntax)
812 continue;
813
814 switch (suffix)
815 {
816 case BYTE_MNEM_SUFFIX:
817 if (t->opcode_modifier.no_bsuf)
818 continue;
819 break;
820 case WORD_MNEM_SUFFIX:
821 if (t->opcode_modifier.no_wsuf)
822 continue;
823 break;
824 case LONG_MNEM_SUFFIX:
825 if (t->opcode_modifier.no_lsuf)
826 continue;
827 break;
828 case QWORD_MNEM_SUFFIX:
829 if (t->opcode_modifier.no_qsuf)
830 continue;
831 break;
832 case SHORT_MNEM_SUFFIX:
833 if (t->opcode_modifier.no_ssuf)
834 continue;
835 break;
836 case LONG_DOUBLE_MNEM_SUFFIX:
837 if (t->opcode_modifier.no_ldsuf)
838 continue;
839 break;
840 default:
841 abort ();
842 }
843
fcaf78fe
JB
844 /* We can skip templates with swappable operands here, as one
845 operand will be a register, which operand size can be
846 determined from. */
847 if (t->opcode_modifier.d)
848 continue;
849
1cb0ab18
JB
850 /* In a few cases suffixes are permitted, but we can nevertheless
851 derive that these aren't going to be needed. This is only of
fcaf78fe
JB
852 interest for insns using ModR/M. */
853 if (!t->opcode_modifier.modrm)
1cb0ab18
JB
854 break;
855
856 if (!t->operand_types[op].bitfield.baseindex)
857 continue;
858
859 switch (t->operand_types[op].bitfield.class)
860 {
861 case RegMMX:
862 case RegSIMD:
863 case RegMask:
864 continue;
865 }
866
867 break;
868 }
869
870 if (t == current_templates->end)
871 suffix = 0;
872 }
873
ee86248c
JB
874 if (!i.suffix)
875 i.suffix = suffix;
1cb0ab18 876 else if (suffix && i.suffix != suffix)
ee86248c
JB
877 {
878 as_bad (_("conflicting operand size modifiers"));
879 return 0;
880 }
881 }
882
883 /* Operands for jump/call need special consideration. */
0cfa3eb3
JB
884 if (current_templates->start->opcode_modifier.jump == JUMP
885 || current_templates->start->opcode_modifier.jump == JUMP_DWORD
886 || current_templates->start->opcode_modifier.jump == JUMP_INTERSEGMENT)
ee86248c 887 {
5b7c81bd 888 bool jumpabsolute = false;
6f2f06be 889
f09c1772
L
890 if (i.op[this_operand].regs
891 || intel_state.base
892 || intel_state.index
ee86248c 893 || intel_state.is_mem > 1)
5b7c81bd 894 jumpabsolute = true;
ee86248c
JB
895 else
896 switch (intel_state.op_modifier)
897 {
898 case O_near_ptr:
899 if (intel_state.seg)
5b7c81bd 900 jumpabsolute = true;
ee86248c
JB
901 else
902 intel_state.is_mem = 1;
903 break;
904 case O_far_ptr:
905 case O_absent:
906 if (!intel_state.seg)
907 {
908 intel_state.is_mem = 1;
909 if (intel_state.op_modifier == O_absent)
25303607
L
910 {
911 if (intel_state.is_indirect == 1)
5b7c81bd 912 jumpabsolute = true;
25303607
L
913 break;
914 }
ee86248c
JB
915 as_bad (_("cannot infer the segment part of the operand"));
916 return 0;
917 }
918 else if (S_GET_SEGMENT (intel_state.seg) == reg_section)
5b7c81bd 919 jumpabsolute = true;
ee86248c
JB
920 else
921 {
922 i386_operand_type types;
923
924 if (i.imm_operands >= MAX_IMMEDIATE_OPERANDS)
925 {
926 as_bad (_("at most %d immediate operands are allowed"),
927 MAX_IMMEDIATE_OPERANDS);
928 return 0;
929 }
930 expP = &im_expressions[i.imm_operands++];
931 memset (expP, 0, sizeof(*expP));
932 expP->X_op = O_symbol;
933 expP->X_add_symbol = intel_state.seg;
934 i.op[this_operand].imms = expP;
935
936 resolve_expression (expP);
937 operand_type_set (&types, ~0);
938 if (!i386_finalize_immediate (S_GET_SEGMENT (intel_state.seg),
939 expP, types, operand_string))
940 return 0;
941 if (i.operands < MAX_OPERANDS)
942 {
943 this_operand = i.operands++;
944 i.types[this_operand].bitfield.unspecified = 1;
945 }
946 if (suffix == LONG_DOUBLE_MNEM_SUFFIX)
947 i.suffix = 0;
948 intel_state.seg = NULL;
949 intel_state.is_mem = 0;
950 }
951 break;
952 default:
5b7c81bd 953 jumpabsolute = true;
ee86248c
JB
954 break;
955 }
6f2f06be
JB
956 if (jumpabsolute)
957 {
5b7c81bd 958 i.jumpabsolute = true;
6f2f06be
JB
959 intel_state.is_mem |= 1;
960 }
ee86248c
JB
961 }
962 else if (intel_state.seg)
963 intel_state.is_mem |= 1;
964
965 if (i.op[this_operand].regs)
966 {
967 i386_operand_type temp;
968
969 /* Register operand. */
970 if (intel_state.base || intel_state.index || intel_state.seg)
971 {
972 as_bad (_("invalid operand"));
973 return 0;
974 }
975
976 temp = i.op[this_operand].regs->reg_type;
977 temp.bitfield.baseindex = 0;
f09c1772
L
978 i.types[this_operand] = operand_type_or (i.types[this_operand],
979 temp);
ee86248c
JB
980 i.types[this_operand].bitfield.unspecified = 0;
981 ++i.reg_operands;
cf665fee 982
7063667e
JB
983 if ((i.rounding.type != rc_none && !i.rounding.modifier
984 && temp.bitfield.class != Reg)
985 || rc_sae_modifier)
cf665fee
JB
986 {
987 unsigned int j;
988
989 for (j = 0; j < ARRAY_SIZE (RC_NamesTable); ++j)
990 if (i.rounding.type == RC_NamesTable[j].type)
991 break;
992 as_bad (_("`%s': misplaced `{%s}'"),
993 current_templates->start->name, RC_NamesTable[j].name);
994 return 0;
995 }
ee86248c 996 }
f09c1772
L
997 else if (intel_state.base
998 || intel_state.index
999 || intel_state.seg
ee86248c
JB
1000 || intel_state.is_mem)
1001 {
1002 /* Memory operand. */
8325cc63
JB
1003 if (i.mem_operands == 1 && !maybe_adjust_templates ())
1004 return 0;
faf786e6 1005 if ((int) i.mem_operands
ee86248c
JB
1006 >= 2 - !current_templates->start->opcode_modifier.isstring)
1007 {
313c53d1
L
1008 /* Handle
1009
1010 call 0x9090,0x90909090
1011 lcall 0x9090,0x90909090
1012 jmp 0x9090,0x90909090
1013 ljmp 0x9090,0x90909090
1014 */
1015
0cfa3eb3
JB
1016 if ((current_templates->start->opcode_modifier.jump == JUMP_INTERSEGMENT
1017 || current_templates->start->opcode_modifier.jump == JUMP_DWORD
1018 || current_templates->start->opcode_modifier.jump == JUMP)
313c53d1
L
1019 && this_operand == 1
1020 && intel_state.seg == NULL
1021 && i.mem_operands == 1
1022 && i.disp_operands == 1
1023 && intel_state.op_modifier == O_absent)
1024 {
1025 /* Try to process the first operand as immediate, */
1026 this_operand = 0;
1027 if (i386_finalize_immediate (exp_seg, i.op[0].imms,
1028 intel_state.reloc_types,
1029 NULL))
1030 {
1031 this_operand = 1;
1032 expP = &im_expressions[0];
1033 i.op[this_operand].imms = expP;
1034 *expP = exp;
1035
1036 /* Try to process the second operand as immediate, */
1037 if (i386_finalize_immediate (exp_seg, expP,
1038 intel_state.reloc_types,
1039 NULL))
1040 {
1041 i.mem_operands = 0;
1042 i.disp_operands = 0;
1043 i.imm_operands = 2;
c48dadc9 1044 i.flags[0] &= ~Operand_Mem;
313c53d1
L
1045 i.types[0].bitfield.disp16 = 0;
1046 i.types[0].bitfield.disp32 = 0;
313c53d1
L
1047 return 1;
1048 }
1049 }
1050 }
1051
ee86248c
JB
1052 as_bad (_("too many memory references for `%s'"),
1053 current_templates->start->name);
1054 return 0;
1055 }
1056
2abc2bec
JB
1057 /* Swap base and index in 16-bit memory operands like
1058 [si+bx]. Since i386_index_check is also used in AT&T
1059 mode we have to do this here. */
1060 if (intel_state.base
1061 && intel_state.index
dc821c5f
JB
1062 && intel_state.base->reg_type.bitfield.word
1063 && intel_state.index->reg_type.bitfield.word
2abc2bec
JB
1064 && intel_state.base->reg_num >= 6
1065 && intel_state.index->reg_num < 6)
1066 {
1067 i.base_reg = intel_state.index;
1068 i.index_reg = intel_state.base;
1069 }
1070 else
1071 {
1072 i.base_reg = intel_state.base;
1073 i.index_reg = intel_state.index;
1074 }
1075
1076 if (i.base_reg || i.index_reg)
1077 i.types[this_operand].bitfield.baseindex = 1;
1078
ee86248c
JB
1079 expP = &disp_expressions[i.disp_operands];
1080 memcpy (expP, &exp, sizeof(exp));
1081 resolve_expression (expP);
1082
f09c1772
L
1083 if (expP->X_op != O_constant
1084 || expP->X_add_number
2abc2bec 1085 || !i.types[this_operand].bitfield.baseindex)
ee86248c
JB
1086 {
1087 i.op[this_operand].disps = expP;
1088 i.disp_operands++;
1089
2abc2bec
JB
1090 i386_addressing_mode ();
1091
ee86248c
JB
1092 if (flag_code == CODE_64BIT)
1093 {
a775efc8 1094 i.types[this_operand].bitfield.disp32 = 1;
ee86248c 1095 if (!i.prefix[ADDR_PREFIX])
a775efc8 1096 i.types[this_operand].bitfield.disp64 = 1;
ee86248c
JB
1097 }
1098 else if (!i.prefix[ADDR_PREFIX] ^ (flag_code == CODE_16BIT))
1099 i.types[this_operand].bitfield.disp32 = 1;
1100 else
1101 i.types[this_operand].bitfield.disp16 = 1;
1102
1103#if defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT)
1104 /*
1105 * exp_seg is used only for verification in
1106 * i386_finalize_displacement, and we can end up seeing reg_section
1107 * here - but we know we removed all registers from the expression
1108 * (or error-ed on any remaining ones) in i386_intel_simplify. I
1109 * consider the check in i386_finalize_displacement bogus anyway, in
1110 * particular because it doesn't allow for expr_section, so I'd
1111 * rather see that check (and the similar one in
1112 * i386_finalize_immediate) use SEG_NORMAL(), but not being an a.out
1113 * expert I can't really say whether that would have other bad side
1114 * effects.
1115 */
1116 if (OUTPUT_FLAVOR == bfd_target_aout_flavour
1117 && exp_seg == reg_section)
1118 exp_seg = expP->X_op != O_constant ? undefined_section
1119 : absolute_section;
1120#endif
1121
1122 if (!i386_finalize_displacement (exp_seg, expP,
1123 intel_state.reloc_types,
1124 operand_string))
1125 return 0;
1126 }
1127
ee86248c
JB
1128 if (intel_state.seg)
1129 {
fd4e0347 1130 for (ret = check_none; ; ret = operand_check)
e21440ba
JB
1131 {
1132 expP = symbol_get_value_expression (intel_state.seg);
fd4e0347
JB
1133 if (expP->X_op != O_full_ptr
1134 || symbol_get_value_expression (expP->X_op_symbol)->X_op
1135 != O_register)
e21440ba
JB
1136 break;
1137 intel_state.seg = expP->X_add_symbol;
1138 }
0398aac5 1139 if (expP->X_op != O_register)
ee86248c
JB
1140 {
1141 as_bad (_("segment register name expected"));
1142 return 0;
1143 }
00cee14f 1144 if (i386_regtab[expP->X_add_number].reg_type.bitfield.class != SReg)
ee86248c
JB
1145 {
1146 as_bad (_("invalid use of register"));
1147 return 0;
1148 }
fd4e0347
JB
1149 switch (ret)
1150 {
1151 case check_error:
1152 as_bad (_("redundant segment overrides"));
1153 return 0;
1154 case check_warning:
1155 as_warn (_("redundant segment overrides"));
1156 break;
1157 }
5e042380
JB
1158 if (i386_regtab[expP->X_add_number].reg_num == RegFlat)
1159 i.seg[i.mem_operands] = NULL;
1160 else
1161 i.seg[i.mem_operands] = &i386_regtab[expP->X_add_number];
ee86248c
JB
1162 }
1163
ee86248c
JB
1164 if (!i386_index_check (operand_string))
1165 return 0;
1166
c48dadc9 1167 i.flags[this_operand] |= Operand_Mem;
8325cc63
JB
1168 if (i.mem_operands == 0)
1169 i.memop1_string = xstrdup (operand_string);
ee86248c
JB
1170 ++i.mem_operands;
1171 }
1172 else
1173 {
1174 /* Immediate. */
1175 if (i.imm_operands >= MAX_IMMEDIATE_OPERANDS)
1176 {
1177 as_bad (_("at most %d immediate operands are allowed"),
1178 MAX_IMMEDIATE_OPERANDS);
1179 return 0;
1180 }
1181
1182 expP = &im_expressions[i.imm_operands++];
1183 i.op[this_operand].imms = expP;
1184 *expP = exp;
1185
1186 return i386_finalize_immediate (exp_seg, expP, intel_state.reloc_types,
1187 operand_string);
1188 }
1189
1190 return 1;
1191}