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fecd2382 RP |
1 | /* i386.c -- Assemble code for the Intel 80386 |
2 | Copyright (C) 1989, 1991 Free Software Foundation. | |
a39116f1 RP |
3 | |
4 | This file is part of GAS, the GNU Assembler. | |
5 | ||
6 | GAS is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GAS is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GAS; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
fecd2382 RP |
19 | |
20 | /* $Id$ */ | |
21 | ||
22 | /* | |
23 | Intel 80386 machine specific gas. | |
24 | Written by Eliot Dresselhaus (eliot@mgm.mit.edu). | |
25 | Bugs & suggestions are completely welcome. This is free software. | |
26 | Please help us make it better. | |
a39116f1 | 27 | */ |
fecd2382 RP |
28 | |
29 | #include "as.h" | |
30 | ||
31 | #include "obstack.h" | |
a39116f1 | 32 | #include "opcode/i386.h" |
fecd2382 RP |
33 | |
34 | /* 'md_assemble ()' gathers together information and puts it into a | |
35 | i386_insn. */ | |
36 | ||
37 | typedef struct { | |
a39116f1 RP |
38 | /* TM holds the template for the insn were currently assembling. */ |
39 | template tm; | |
40 | /* SUFFIX holds the opcode suffix (e.g. 'l' for 'movl') if given. */ | |
41 | char suffix; | |
42 | /* Operands are coded with OPERANDS, TYPES, DISPS, IMMS, and REGS. */ | |
43 | ||
44 | /* OPERANDS gives the number of given operands. */ | |
45 | unsigned int operands; | |
46 | ||
47 | /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number of | |
48 | given register, displacement, memory operands and immediate operands. */ | |
49 | unsigned int reg_operands, disp_operands, mem_operands, imm_operands; | |
50 | ||
51 | /* TYPES [i] is the type (see above #defines) which tells us how to | |
52 | search through DISPS [i] & IMMS [i] & REGS [i] for the required | |
53 | operand. */ | |
54 | unsigned int types [MAX_OPERANDS]; | |
55 | ||
56 | /* Displacements (if given) for each operand. */ | |
57 | expressionS * disps [MAX_OPERANDS]; | |
58 | ||
59 | /* Immediate operands (if given) for each operand. */ | |
60 | expressionS * imms [MAX_OPERANDS]; | |
61 | ||
62 | /* Register operands (if given) for each operand. */ | |
63 | reg_entry * regs [MAX_OPERANDS]; | |
64 | ||
65 | /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode | |
66 | the base index byte below. */ | |
67 | reg_entry * base_reg; | |
68 | reg_entry * index_reg; | |
69 | unsigned int log2_scale_factor; | |
70 | ||
71 | /* SEG gives the seg_entry of this insn. It is equal to zero unless | |
72 | an explicit segment override is given. */ | |
73 | seg_entry * seg; /* segment for memory operands (if given) */ | |
74 | ||
75 | /* PREFIX holds all the given prefix opcodes (usually null). | |
76 | PREFIXES is the size of PREFIX. */ | |
77 | char prefix [MAX_PREFIXES]; | |
78 | unsigned int prefixes; | |
79 | ||
80 | /* RM and IB are the modrm byte and the base index byte where the addressing | |
81 | modes of this insn are encoded. */ | |
82 | ||
83 | modrm_byte rm; | |
84 | base_index_byte bi; | |
85 | } i386_insn; | |
fecd2382 | 86 | |
a39116f1 RP |
87 | /* This array holds the chars that always start a comment. If the |
88 | pre-processor is disabled, these aren't very useful */ | |
89 | const char comment_chars[] = "#"; | |
fecd2382 | 90 | |
a39116f1 RP |
91 | /* This array holds the chars that only start a comment at the beginning of |
92 | a line. If the line seems to have the form '# 123 filename' | |
93 | .line and .file directives will appear in the pre-processed output */ | |
94 | /* Note that input_file.c hand checks for '#' at the beginning of the | |
95 | first line of the input file. This is because the compiler outputs | |
96 | #NO_APP at the beginning of its output. */ | |
97 | /* Also note that comments started like this one will always work if | |
98 | '/' isn't otherwise defined. */ | |
99 | const char line_comment_chars[] = "/"; /* removed '#' xoxorich. */ | |
fecd2382 | 100 | |
a39116f1 RP |
101 | /* Chars that can be used to separate mant from exp in floating point nums */ |
102 | const char EXP_CHARS[] = "eE"; | |
fecd2382 | 103 | |
a39116f1 RP |
104 | /* Chars that mean this number is a floating point constant */ |
105 | /* As in 0f12.456 */ | |
106 | /* or 0d1.2345e12 */ | |
107 | const char FLT_CHARS[] = "fFdDxX"; | |
fecd2382 RP |
108 | |
109 | /* tables for lexical analysis */ | |
110 | static char opcode_chars[256]; | |
111 | static char register_chars[256]; | |
112 | static char operand_chars[256]; | |
113 | static char space_chars[256]; | |
114 | static char identifier_chars[256]; | |
115 | static char digit_chars[256]; | |
116 | ||
117 | /* lexical macros */ | |
118 | #define is_opcode_char(x) (opcode_chars[(unsigned char) x]) | |
119 | #define is_operand_char(x) (operand_chars[(unsigned char) x]) | |
120 | #define is_register_char(x) (register_chars[(unsigned char) x]) | |
121 | #define is_space_char(x) (space_chars[(unsigned char) x]) | |
122 | #define is_identifier_char(x) (identifier_chars[(unsigned char) x]) | |
123 | #define is_digit_char(x) (digit_chars[(unsigned char) x]) | |
124 | ||
125 | /* put here all non-digit non-letter charcters that may occur in an operand */ | |
126 | static char operand_special_chars[] = "%$-+(,)*._~/<>|&^!:"; | |
127 | ||
128 | static char *ordinal_names[] = { "first", "second", "third" }; /* for printfs */ | |
129 | ||
130 | /* md_assemble() always leaves the strings it's passed unaltered. To | |
131 | effect this we maintain a stack of saved characters that we've smashed | |
132 | with '\0's (indicating end of strings for various sub-fields of the | |
133 | assembler instruction). */ | |
134 | static char save_stack[32]; | |
135 | static char *save_stack_p; /* stack pointer */ | |
136 | #define END_STRING_AND_SAVE(s) *save_stack_p++ = *s; *s = '\0' | |
137 | #define RESTORE_END_STRING(s) *s = *--save_stack_p | |
a39116f1 RP |
138 | |
139 | /* The instruction we're assembling. */ | |
140 | static i386_insn i; | |
fecd2382 RP |
141 | |
142 | /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */ | |
143 | static expressionS disp_expressions[2], im_expressions[2]; | |
144 | ||
145 | /* pointers to ebp & esp entries in reg_hash hash table */ | |
146 | static reg_entry *ebp, *esp; | |
147 | ||
148 | static int this_operand; /* current operand we are working on */ | |
149 | ||
150 | /* | |
a39116f1 RP |
151 | Interface to relax_segment. |
152 | There are 2 relax states for 386 jump insns: one for conditional & one | |
153 | for unconditional jumps. This is because the these two types of jumps | |
154 | add different sizes to frags when we're figuring out what sort of jump | |
155 | to choose to reach a given label. */ | |
fecd2382 RP |
156 | |
157 | /* types */ | |
158 | #define COND_JUMP 1 /* conditional jump */ | |
159 | #define UNCOND_JUMP 2 /* unconditional jump */ | |
160 | /* sizes */ | |
161 | #define BYTE 0 | |
162 | #define WORD 1 | |
163 | #define DWORD 2 | |
164 | #define UNKNOWN_SIZE 3 | |
165 | ||
166 | #define ENCODE_RELAX_STATE(type,size) ((type<<2) | (size)) | |
167 | #define SIZE_FROM_RELAX_STATE(s) \ | |
a39116f1 | 168 | ( (((s) & 0x3) == BYTE ? 1 : (((s) & 0x3) == WORD ? 2 : 4)) ) |
fecd2382 RP |
169 | |
170 | const relax_typeS md_relax_table[] = { | |
a39116f1 RP |
171 | /* |
172 | The fields are: | |
173 | 1) most positive reach of this state, | |
174 | 2) most negative reach of this state, | |
175 | 3) how many bytes this mode will add to the size of the current frag | |
176 | 4) which index into the table to try if we can't fit into this one. | |
177 | */ | |
178 | {1, 1, 0, 0}, | |
179 | {1, 1, 0, 0}, | |
180 | {1, 1, 0, 0}, | |
181 | {1, 1, 0, 0}, | |
182 | ||
183 | /* For now we don't use word displacement jumps: they may be | |
184 | untrustworthy. */ | |
185 | {127+1, -128+1, 0, ENCODE_RELAX_STATE(COND_JUMP,DWORD) }, | |
186 | /* word conditionals add 3 bytes to frag: | |
187 | 2 opcode prefix; 1 displacement bytes */ | |
188 | {32767+2, -32768+2, 3, ENCODE_RELAX_STATE(COND_JUMP,DWORD) }, | |
189 | /* dword conditionals adds 4 bytes to frag: | |
190 | 1 opcode prefix; 3 displacement bytes */ | |
191 | {0, 0, 4, 0}, | |
192 | {1, 1, 0, 0}, | |
193 | ||
194 | {127+1, -128+1, 0, ENCODE_RELAX_STATE(UNCOND_JUMP,DWORD) }, | |
195 | /* word jmp adds 2 bytes to frag: | |
196 | 1 opcode prefix; 1 displacement bytes */ | |
197 | {32767+2, -32768+2, 2, ENCODE_RELAX_STATE(UNCOND_JUMP,DWORD) }, | |
198 | /* dword jmp adds 3 bytes to frag: | |
199 | 0 opcode prefix; 3 displacement bytes */ | |
200 | {0, 0, 3, 0}, | |
201 | {1, 1, 0, 0}, | |
202 | ||
fecd2382 RP |
203 | }; |
204 | ||
205 | #ifdef __STDC__ | |
206 | ||
207 | static char *output_invalid(int c); | |
208 | static int i386_operand(char *operand_string); | |
209 | static reg_entry *parse_register(char *reg_string); | |
210 | ||
211 | #else /* __STDC__ */ | |
212 | ||
213 | static char *output_invalid(); | |
214 | static int i386_operand(); | |
215 | static reg_entry *parse_register(); | |
216 | ||
217 | #endif /* __STDC__ */ | |
218 | ||
219 | ||
220 | /* Ignore certain directives generated by gcc. This probably should | |
221 | not be here. */ | |
222 | void dummy () | |
223 | { | |
a39116f1 RP |
224 | while (*input_line_pointer && *input_line_pointer != '\n') |
225 | input_line_pointer++; | |
fecd2382 RP |
226 | } |
227 | ||
228 | const pseudo_typeS md_pseudo_table[] = { | |
229 | { "ffloat", float_cons, 'f' }, | |
230 | { "dfloat", float_cons, 'd' }, | |
231 | { "tfloat", float_cons, 'x' }, | |
232 | { "value", cons, 2 }, | |
fecd2382 RP |
233 | { 0, 0, 0 } |
234 | }; | |
235 | ||
236 | /* for interface with expression () */ | |
237 | extern char * input_line_pointer; | |
238 | ||
239 | /* obstack for constructing various things in md_begin */ | |
240 | struct obstack o; | |
241 | ||
242 | /* hash table for opcode lookup */ | |
243 | static struct hash_control *op_hash = (struct hash_control *) 0; | |
244 | /* hash table for register lookup */ | |
245 | static struct hash_control *reg_hash = (struct hash_control *) 0; | |
246 | /* hash table for prefix lookup */ | |
247 | static struct hash_control *prefix_hash = (struct hash_control *) 0; | |
248 | ||
249 | \f | |
250 | void md_begin () | |
251 | { | |
a39116f1 RP |
252 | char * hash_err; |
253 | ||
254 | obstack_begin (&o,4096); | |
255 | ||
256 | /* initialize op_hash hash table */ | |
257 | op_hash = hash_new(); /* xmalloc handles error */ | |
258 | ||
259 | { | |
260 | register const template *optab; | |
261 | register templates *core_optab; | |
262 | char *prev_name; | |
263 | ||
264 | optab = i386_optab; /* setup for loop */ | |
265 | prev_name = optab->name; | |
266 | obstack_grow (&o, optab, sizeof(template)); | |
267 | core_optab = (templates *) xmalloc (sizeof (templates)); | |
268 | ||
269 | for (optab++; optab < i386_optab_end; optab++) { | |
270 | if (! strcmp (optab->name, prev_name)) { | |
271 | /* same name as before --> append to current template list */ | |
272 | obstack_grow (&o, optab, sizeof(template)); | |
273 | } else { | |
274 | /* different name --> ship out current template list; | |
275 | add to hash table; & begin anew */ | |
276 | /* Note: end must be set before start! since obstack_next_free changes | |
277 | upon opstack_finish */ | |
278 | core_optab->end = (template *) obstack_next_free(&o); | |
279 | core_optab->start = (template *) obstack_finish(&o); | |
280 | hash_err = hash_insert (op_hash, prev_name, (char *) core_optab); | |
281 | if (hash_err && *hash_err) { | |
282 | hash_error: | |
283 | as_fatal("Internal Error: Can't hash %s: %s", prev_name, hash_err); | |
284 | } | |
285 | prev_name = optab->name; | |
286 | core_optab = (templates *) xmalloc (sizeof(templates)); | |
287 | obstack_grow (&o, optab, sizeof(template)); | |
288 | } | |
289 | } | |
290 | } | |
291 | ||
292 | /* initialize reg_hash hash table */ | |
293 | reg_hash = hash_new(); | |
294 | { | |
295 | register const reg_entry *regtab; | |
296 | ||
297 | for (regtab = i386_regtab; regtab < i386_regtab_end; regtab++) { | |
298 | hash_err = hash_insert (reg_hash, regtab->reg_name, regtab); | |
299 | if (hash_err && *hash_err) goto hash_error; | |
300 | } | |
301 | } | |
302 | ||
303 | esp = (reg_entry *) hash_find (reg_hash, "esp"); | |
304 | ebp = (reg_entry *) hash_find (reg_hash, "ebp"); | |
305 | ||
306 | /* initialize reg_hash hash table */ | |
307 | prefix_hash = hash_new(); | |
308 | { | |
309 | register const prefix_entry *prefixtab; | |
310 | ||
311 | for (prefixtab = i386_prefixtab; | |
312 | prefixtab < i386_prefixtab_end; prefixtab++) { | |
313 | hash_err = hash_insert (prefix_hash, prefixtab->prefix_name, prefixtab); | |
314 | if (hash_err && *hash_err) goto hash_error; | |
315 | } | |
316 | } | |
317 | ||
318 | /* fill in lexical tables: opcode_chars, operand_chars, space_chars */ | |
319 | { | |
320 | register unsigned int c; | |
321 | ||
322 | bzero (opcode_chars, sizeof(opcode_chars)); | |
323 | bzero (operand_chars, sizeof(operand_chars)); | |
324 | bzero (space_chars, sizeof(space_chars)); | |
325 | bzero (identifier_chars, sizeof(identifier_chars)); | |
326 | bzero (digit_chars, sizeof(digit_chars)); | |
327 | ||
328 | for (c = 0; c < 256; c++) { | |
329 | if (islower(c) || isdigit(c)) { | |
330 | opcode_chars[c] = c; | |
331 | register_chars[c] = c; | |
332 | } else if (isupper(c)) { | |
333 | opcode_chars[c] = tolower(c); | |
334 | register_chars[c] = opcode_chars[c]; | |
335 | } else if (c == PREFIX_SEPERATOR) { | |
336 | opcode_chars[c] = c; | |
337 | } else if (c == ')' || c == '(') { | |
338 | register_chars[c] = c; | |
339 | } | |
340 | ||
341 | if (isupper(c) || islower(c) || isdigit(c)) | |
342 | operand_chars[c] = c; | |
343 | else if (c && strchr(operand_special_chars, c)) | |
344 | operand_chars[c] = c; | |
345 | ||
346 | if (isdigit(c) || c == '-') digit_chars[c] = c; | |
347 | ||
348 | if (isalpha(c) || c == '_' || c == '.' || isdigit(c)) | |
349 | identifier_chars[c] = c; | |
350 | ||
351 | if (c == ' ' || c == '\t') space_chars[c] = c; | |
352 | } | |
fecd2382 | 353 | } |
fecd2382 RP |
354 | } |
355 | ||
356 | void md_end() {} /* not much to do here. */ | |
357 | ||
358 | \f | |
359 | #ifdef DEBUG386 | |
360 | ||
361 | /* debugging routines for md_assemble */ | |
362 | /* static void pi (), pte (), pt (), pe (), ps (); */ | |
363 | ||
364 | static void pi (line, x) | |
a39116f1 RP |
365 | char * line; |
366 | i386_insn *x; | |
fecd2382 | 367 | { |
a39116f1 RP |
368 | register template *p; |
369 | int i; | |
370 | ||
371 | fprintf (stdout, "%s: template ", line); | |
372 | pte (&x->tm); | |
373 | fprintf (stdout, " modrm: mode %x reg %x reg/mem %x", | |
374 | x->rm.mode, x->rm.reg, x->rm.regmem); | |
375 | fprintf (stdout, " base %x index %x scale %x\n", | |
376 | x->bi.base, x->bi.index, x->bi.scale); | |
377 | for (i = 0; i < x->operands; i++) { | |
378 | fprintf (stdout, " #%d: ", i+1); | |
379 | pt (x->types[i]); | |
380 | fprintf (stdout, "\n"); | |
381 | if (x->types[i] & Reg) fprintf (stdout, "%s\n", x->regs[i]->reg_name); | |
382 | if (x->types[i] & Imm) pe (x->imms[i]); | |
383 | if (x->types[i] & (Disp|Abs)) pe (x->disps[i]); | |
384 | } | |
fecd2382 RP |
385 | } |
386 | ||
387 | static void pte (t) | |
a39116f1 | 388 | template *t; |
fecd2382 | 389 | { |
a39116f1 RP |
390 | int i; |
391 | fprintf (stdout, " %d operands ", t->operands); | |
392 | fprintf (stdout, "opcode %x ", | |
393 | t->base_opcode); | |
394 | if (t->extension_opcode != None) | |
395 | fprintf (stdout, "ext %x ", t->extension_opcode); | |
396 | if (t->opcode_modifier&D) | |
397 | fprintf (stdout, "D"); | |
398 | if (t->opcode_modifier&W) | |
399 | fprintf (stdout, "W"); | |
400 | fprintf (stdout, "\n"); | |
401 | for (i = 0; i < t->operands; i++) { | |
402 | fprintf (stdout, " #%d type ", i+1); | |
403 | pt (t->operand_types[i]); | |
404 | fprintf (stdout, "\n"); | |
405 | } | |
fecd2382 RP |
406 | } |
407 | ||
408 | static void pe (e) | |
a39116f1 | 409 | expressionS *e; |
fecd2382 | 410 | { |
a39116f1 RP |
411 | fprintf (stdout, " segment %s\n", segment_name (e->X_seg)); |
412 | fprintf (stdout, " add_number %d (%x)\n", | |
413 | e->X_add_number, e->X_add_number); | |
414 | if (e->X_add_symbol) { | |
415 | fprintf (stdout, " add_symbol "); | |
416 | ps (e->X_add_symbol); | |
417 | fprintf (stdout, "\n"); | |
418 | } | |
419 | if (e->X_subtract_symbol) { | |
420 | fprintf (stdout, " sub_symbol "); | |
421 | ps (e->X_subtract_symbol); | |
422 | fprintf (stdout, "\n"); | |
423 | } | |
fecd2382 RP |
424 | } |
425 | ||
426 | static void ps (s) | |
a39116f1 | 427 | symbolS *s; |
fecd2382 | 428 | { |
a39116f1 RP |
429 | fprintf (stdout, "%s type %s%s", |
430 | S_GET_NAME(s), | |
431 | S_IS_EXTERNAL(s) ? "EXTERNAL " : "", | |
432 | segment_name(S_GET_SEGMENT(s))); | |
fecd2382 RP |
433 | } |
434 | ||
435 | struct type_name { | |
a39116f1 RP |
436 | unsigned int mask; |
437 | char *tname; | |
fecd2382 | 438 | } type_names[] = { |
a39116f1 RP |
439 | { Reg8, "r8" }, { Reg16, "r16" }, { Reg32, "r32" }, { Imm8, "i8" }, |
440 | { Imm8S, "i8s" }, | |
441 | { Imm16, "i16" }, { Imm32, "i32" }, { Mem8, "Mem8"}, { Mem16, "Mem16"}, | |
442 | { Mem32, "Mem32"}, { BaseIndex, "BaseIndex" }, | |
443 | { Abs8, "Abs8" }, { Abs16, "Abs16" }, { Abs32, "Abs32" }, | |
444 | { Disp8, "d8" }, { Disp16, "d16" }, | |
445 | { Disp32, "d32" }, { SReg2, "SReg2" }, { SReg3, "SReg3" }, { Acc, "Acc" }, | |
446 | { InOutPortReg, "InOutPortReg" }, { ShiftCount, "ShiftCount" }, | |
447 | { Imm1, "i1" }, { Control, "control reg" }, {Test, "test reg"}, | |
448 | { FloatReg, "FReg"}, {FloatAcc, "FAcc"}, | |
449 | { JumpAbsolute, "Jump Absolute"}, | |
450 | { 0, "" } | |
fecd2382 RP |
451 | }; |
452 | ||
453 | static void pt (t) | |
a39116f1 | 454 | unsigned int t; |
fecd2382 | 455 | { |
a39116f1 RP |
456 | register struct type_name *ty; |
457 | ||
458 | if (t == Unknown) { | |
459 | fprintf (stdout, "Unknown"); | |
460 | } else { | |
461 | for (ty = type_names; ty->mask; ty++) | |
462 | if (t & ty->mask) fprintf (stdout, "%s, ", ty->tname); | |
463 | } | |
464 | fflush (stdout); | |
fecd2382 RP |
465 | } |
466 | ||
467 | #endif /* DEBUG386 */ | |
468 | \f | |
469 | /* | |
470 | This is the guts of the machine-dependent assembler. LINE points to a | |
471 | machine dependent instruction. This funciton is supposed to emit | |
472 | the frags/bytes it assembles to. | |
a39116f1 | 473 | */ |
fecd2382 | 474 | void md_assemble (line) |
a39116f1 | 475 | char *line; |
fecd2382 | 476 | { |
a39116f1 RP |
477 | /* Holds temlate once we've found it. */ |
478 | register template * t; | |
479 | ||
480 | /* Possible templates for current insn */ | |
481 | templates *current_templates = (templates *) 0; | |
482 | ||
483 | /* Initialize globals. */ | |
484 | bzero (&i, sizeof(i)); | |
485 | bzero (disp_expressions, sizeof(disp_expressions)); | |
486 | bzero (im_expressions, sizeof(im_expressions)); | |
487 | save_stack_p = save_stack; /* reset stack pointer */ | |
488 | ||
489 | /* Fist parse an opcode & call i386_operand for the operands. | |
490 | We assume that the scrubber has arranged it so that line[0] is the valid | |
491 | start of a (possibly prefixed) opcode. */ | |
492 | { | |
493 | register char *l = line; /* Fast place to put LINE. */ | |
494 | ||
495 | /* 1 if operand is pending after ','. */ | |
496 | unsigned int expecting_operand = 0; | |
497 | /* 1 if we found a prefix only acceptable with string insns. */ | |
498 | unsigned int expecting_string_instruction = 0; | |
499 | /* Non-zero if operand parens not balenced. */ | |
500 | unsigned int paren_not_balenced; | |
501 | char * token_start = l; | |
502 | ||
503 | while (! is_space_char(*l) && *l != END_OF_INSN) { | |
504 | if (! is_opcode_char(*l)) { | |
505 | as_bad("invalid character %s in opcode", output_invalid(*l)); | |
506 | return; | |
507 | } else if (*l != PREFIX_SEPERATOR) { | |
508 | *l = opcode_chars[(unsigned char) *l]; /* fold case of opcodes */ | |
509 | l++; | |
510 | } else { /* this opcode's got a prefix */ | |
511 | register unsigned int q; | |
512 | register prefix_entry * prefix; | |
513 | ||
514 | if (l == token_start) { | |
515 | as_bad("expecting prefix; got nothing"); | |
516 | return; | |
517 | } | |
518 | END_STRING_AND_SAVE (l); | |
519 | prefix = (prefix_entry *) hash_find (prefix_hash, token_start); | |
520 | if (! prefix) { | |
521 | as_bad("no such opcode prefix ('%s')", token_start); | |
522 | return; | |
523 | } | |
524 | RESTORE_END_STRING (l); | |
525 | /* check for repeated prefix */ | |
526 | for (q = 0; q < i.prefixes; q++) | |
527 | if (i.prefix[q] == prefix->prefix_code) { | |
528 | as_bad("same prefix used twice; you don't really want this!"); | |
529 | return; | |
530 | } | |
531 | if (i.prefixes == MAX_PREFIXES) { | |
532 | as_bad("too many opcode prefixes"); | |
533 | return; | |
534 | } | |
535 | i.prefix[i.prefixes++] = prefix->prefix_code; | |
536 | if (prefix->prefix_code == REPE || prefix->prefix_code == REPNE) | |
537 | expecting_string_instruction = 1; | |
538 | /* skip past PREFIX_SEPERATOR and reset token_start */ | |
539 | token_start = ++l; | |
540 | } | |
541 | } | |
542 | END_STRING_AND_SAVE (l); | |
543 | if (token_start == l) { | |
544 | as_bad("expecting opcode; got nothing"); | |
545 | return; | |
546 | } | |
547 | ||
548 | /* Lookup insn in hash; try intel & att naming conventions if appropriate; | |
549 | that is: we only use the opcode suffix 'b' 'w' or 'l' if we need to. */ | |
550 | current_templates = (templates *) hash_find (op_hash, token_start); | |
551 | if (! current_templates) { | |
552 | int last_index = strlen(token_start) - 1; | |
553 | char last_char = token_start[last_index]; | |
554 | switch (last_char) { | |
555 | case DWORD_OPCODE_SUFFIX: | |
556 | case WORD_OPCODE_SUFFIX: | |
557 | case BYTE_OPCODE_SUFFIX: | |
558 | token_start[last_index] = '\0'; | |
559 | current_templates = (templates *) hash_find (op_hash, token_start); | |
560 | token_start[last_index] = last_char; | |
561 | i.suffix = last_char; | |
562 | } | |
563 | if (!current_templates) { | |
564 | as_bad("no such 386 instruction: `%s'", token_start); return; | |
565 | } | |
566 | } | |
567 | RESTORE_END_STRING (l); | |
568 | ||
569 | /* check for rep/repne without a string instruction */ | |
570 | if (expecting_string_instruction && | |
571 | ! IS_STRING_INSTRUCTION (current_templates-> | |
572 | start->base_opcode)) { | |
573 | as_bad("expecting string instruction after rep/repne"); | |
574 | return; | |
575 | } | |
576 | ||
577 | /* There may be operands to parse. */ | |
578 | if (*l != END_OF_INSN && | |
579 | /* For string instructions, we ignore any operands if given. This | |
580 | kludges, for example, 'rep/movsb %ds:(%esi), %es:(%edi)' where | |
581 | the operands are always going to be the same, and are not really | |
582 | encoded in machine code. */ | |
583 | ! IS_STRING_INSTRUCTION (current_templates-> | |
584 | start->base_opcode)) { | |
585 | /* parse operands */ | |
586 | do { | |
587 | /* skip optional white space before operand */ | |
588 | while (! is_operand_char(*l) && *l != END_OF_INSN) { | |
589 | if (! is_space_char(*l)) { | |
590 | as_bad("invalid character %s before %s operand", | |
591 | output_invalid(*l), | |
592 | ordinal_names[i.operands]); | |
593 | return; | |
594 | } | |
595 | l++; | |
596 | } | |
597 | token_start = l; /* after white space */ | |
598 | paren_not_balenced = 0; | |
599 | while (paren_not_balenced || *l != ',') { | |
600 | if (*l == END_OF_INSN) { | |
601 | if (paren_not_balenced) { | |
602 | as_bad("unbalenced parenthesis in %s operand.", | |
603 | ordinal_names[i.operands]); | |
604 | return; | |
605 | } else break; /* we are done */ | |
606 | } else if (! is_operand_char(*l)) { | |
607 | as_bad("invalid character %s in %s operand", | |
608 | output_invalid(*l), | |
609 | ordinal_names[i.operands]); | |
610 | return; | |
611 | } | |
612 | if (*l == '(') ++paren_not_balenced; | |
613 | if (*l == ')') --paren_not_balenced; | |
614 | l++; | |
615 | } | |
616 | if (l != token_start) { /* yes, we've read in another operand */ | |
617 | unsigned int operand_ok; | |
618 | this_operand = i.operands++; | |
619 | if (i.operands > MAX_OPERANDS) { | |
620 | as_bad("spurious operands; (%d operands/instruction max)", | |
621 | MAX_OPERANDS); | |
622 | return; | |
623 | } | |
624 | /* now parse operand adding info to 'i' as we go along */ | |
625 | END_STRING_AND_SAVE (l); | |
626 | operand_ok = i386_operand (token_start); | |
627 | RESTORE_END_STRING (l); /* restore old contents */ | |
628 | if (!operand_ok) return; | |
629 | } else { | |
630 | if (expecting_operand) { | |
631 | expecting_operand_after_comma: | |
632 | as_bad("expecting operand after ','; got nothing"); | |
633 | return; | |
634 | } | |
635 | if (*l == ',') { | |
636 | as_bad("expecting operand before ','; got nothing"); | |
637 | return; | |
638 | } | |
639 | } | |
640 | ||
641 | /* now *l must be either ',' or END_OF_INSN */ | |
642 | if (*l == ',') { | |
643 | if (*++l == END_OF_INSN) { /* just skip it, if it's \n complain */ | |
644 | goto expecting_operand_after_comma; | |
645 | } | |
646 | expecting_operand = 1; | |
647 | } | |
648 | } while (*l != END_OF_INSN); /* until we get end of insn */ | |
649 | } | |
fecd2382 | 650 | } |
a39116f1 RP |
651 | |
652 | /* Now we've parsed the opcode into a set of templates, and have the | |
653 | operands at hand. | |
654 | Next, we find a template that matches the given insn, | |
655 | making sure the overlap of the given operands types is consistent | |
656 | with the template operand types. */ | |
657 | ||
fecd2382 | 658 | #define MATCH(overlap,given_type) \ |
a39116f1 RP |
659 | (overlap && \ |
660 | (overlap & (JumpAbsolute|BaseIndex|Mem8)) \ | |
661 | == (given_type & (JumpAbsolute|BaseIndex|Mem8))) | |
fecd2382 | 662 | |
a39116f1 RP |
663 | /* If m0 and m1 are register matches they must be consistent |
664 | with the expected operand types t0 and t1. | |
665 | That is, if both m0 & m1 are register matches | |
666 | i.e. ( ((m0 & (Reg)) && (m1 & (Reg)) ) ? | |
667 | then, either 1. or 2. must be true: | |
668 | 1. the expected operand type register overlap is null: | |
669 | (t0 & t1 & Reg) == 0 | |
670 | AND | |
671 | the given register overlap is null: | |
672 | (m0 & m1 & Reg) == 0 | |
673 | 2. the expected operand type register overlap == the given | |
674 | operand type overlap: (t0 & t1 & m0 & m1 & Reg). | |
675 | */ | |
676 | #define CONSISTENT_REGISTER_MATCH(m0, m1, t0, t1) \ | |
677 | ( ((m0 & (Reg)) && (m1 & (Reg))) ? \ | |
678 | ( ((t0 & t1 & (Reg)) == 0 && (m0 & m1 & (Reg)) == 0) || \ | |
679 | ((t0 & t1) & (m0 & m1) & (Reg)) \ | |
680 | ) : 1) | |
681 | { | |
682 | register unsigned int overlap0, overlap1; | |
683 | expressionS * exp; | |
684 | unsigned int overlap2; | |
685 | unsigned int found_reverse_match; | |
686 | ||
687 | overlap0 = overlap1 = overlap2 = found_reverse_match = 0; | |
688 | for (t = current_templates->start; | |
689 | t < current_templates->end; | |
690 | t++) { | |
691 | ||
692 | /* must have right number of operands */ | |
693 | if (i.operands != t->operands) continue; | |
694 | else if (!t->operands) break; /* 0 operands always matches */ | |
695 | ||
696 | overlap0 = i.types[0] & t->operand_types[0]; | |
697 | switch (t->operands) { | |
698 | case 1: | |
699 | if (! MATCH (overlap0,i.types[0])) continue; | |
700 | break; | |
701 | case 2: case 3: | |
702 | overlap1 = i.types[1] & t->operand_types[1]; | |
703 | if (! MATCH (overlap0,i.types[0]) || | |
704 | ! MATCH (overlap1,i.types[1]) || | |
705 | ! CONSISTENT_REGISTER_MATCH(overlap0, overlap1, | |
706 | t->operand_types[0], | |
707 | t->operand_types[1])) { | |
708 | ||
709 | /* check if other direction is valid ... */ | |
710 | if (! (t->opcode_modifier & COMES_IN_BOTH_DIRECTIONS)) | |
711 | continue; | |
712 | ||
713 | /* try reversing direction of operands */ | |
714 | overlap0 = i.types[0] & t->operand_types[1]; | |
715 | overlap1 = i.types[1] & t->operand_types[0]; | |
716 | if (! MATCH (overlap0,i.types[0]) || | |
717 | ! MATCH (overlap1,i.types[1]) || | |
718 | ! CONSISTENT_REGISTER_MATCH (overlap0, overlap1, | |
719 | t->operand_types[0], | |
720 | t->operand_types[1])) { | |
721 | /* does not match either direction */ | |
722 | continue; | |
723 | } | |
724 | /* found a reverse match here -- slip through */ | |
725 | /* found_reverse_match holds which of D or FloatD we've found */ | |
726 | found_reverse_match = t->opcode_modifier & COMES_IN_BOTH_DIRECTIONS; | |
727 | } /* endif: not forward match */ | |
728 | /* found either forward/reverse 2 operand match here */ | |
729 | if (t->operands == 3) { | |
730 | overlap2 = i.types[2] & t->operand_types[2]; | |
731 | if (! MATCH (overlap2,i.types[2]) || | |
732 | ! CONSISTENT_REGISTER_MATCH (overlap0, overlap2, | |
733 | t->operand_types[0], | |
734 | t->operand_types[2]) || | |
735 | ! CONSISTENT_REGISTER_MATCH (overlap1, overlap2, | |
736 | t->operand_types[1], | |
737 | t->operand_types[2])) | |
738 | continue; | |
739 | } | |
740 | /* found either forward/reverse 2 or 3 operand match here: | |
741 | slip through to break */ | |
742 | } | |
743 | break; /* we've found a match; break out of loop */ | |
744 | } /* for (t = ... */ | |
745 | if (t == current_templates->end) { /* we found no match */ | |
746 | as_bad("operands given don't match any known 386 instruction"); | |
747 | return; | |
748 | } | |
749 | ||
750 | /* Copy the template we found (we may change it!). */ | |
751 | bcopy (t, &i.tm, sizeof (template)); | |
752 | t = &i.tm; /* alter new copy of template */ | |
753 | ||
754 | /* If there's no opcode suffix we try to invent one based on register | |
755 | operands. */ | |
756 | if (! i.suffix && i.reg_operands) { | |
757 | /* We take i.suffix from the LAST register operand specified. This | |
758 | assumes that the last register operands is the destination register | |
759 | operand. */ | |
760 | int o; | |
761 | for (o = 0; o < MAX_OPERANDS; o++) | |
762 | if (i.types[o] & Reg) { | |
763 | i.suffix = (i.types[o] == Reg8) ? BYTE_OPCODE_SUFFIX : | |
764 | (i.types[o] == Reg16) ? WORD_OPCODE_SUFFIX : | |
765 | DWORD_OPCODE_SUFFIX; | |
766 | } | |
767 | } | |
768 | ||
769 | /* Make still unresolved immediate matches conform to size of immediate | |
770 | given in i.suffix. Note: overlap2 cannot be an immediate! | |
771 | We assume this. */ | |
772 | if ((overlap0 & (Imm8|Imm8S|Imm16|Imm32)) | |
773 | && overlap0 != Imm8 && overlap0 != Imm8S | |
774 | && overlap0 != Imm16 && overlap0 != Imm32) { | |
775 | if (! i.suffix) { | |
776 | as_bad("no opcode suffix given; can't determine immediate size"); | |
777 | return; | |
778 | } | |
779 | overlap0 &= (i.suffix == BYTE_OPCODE_SUFFIX ? (Imm8|Imm8S) : | |
780 | (i.suffix == WORD_OPCODE_SUFFIX ? Imm16 : Imm32)); | |
781 | } | |
782 | if ((overlap1 & (Imm8|Imm8S|Imm16|Imm32)) | |
783 | && overlap1 != Imm8 && overlap1 != Imm8S | |
784 | && overlap1 != Imm16 && overlap1 != Imm32) { | |
785 | if (! i.suffix) { | |
786 | as_bad("no opcode suffix given; can't determine immediate size"); | |
787 | return; | |
788 | } | |
789 | overlap1 &= (i.suffix == BYTE_OPCODE_SUFFIX ? (Imm8|Imm8S) : | |
790 | (i.suffix == WORD_OPCODE_SUFFIX ? Imm16 : Imm32)); | |
791 | } | |
792 | ||
793 | i.types[0] = overlap0; | |
794 | i.types[1] = overlap1; | |
795 | i.types[2] = overlap2; | |
796 | ||
797 | if (overlap0 & ImplicitRegister) i.reg_operands--; | |
798 | if (overlap1 & ImplicitRegister) i.reg_operands--; | |
799 | if (overlap2 & ImplicitRegister) i.reg_operands--; | |
800 | if (overlap0 & Imm1) i.imm_operands = 0; /* kludge for shift insns */ | |
801 | ||
802 | if (found_reverse_match) { | |
803 | unsigned int save; | |
804 | save = t->operand_types[0]; | |
805 | t->operand_types[0] = t->operand_types[1]; | |
806 | t->operand_types[1] = save; | |
807 | } | |
808 | ||
809 | /* Finalize opcode. First, we change the opcode based on the operand | |
810 | size given by i.suffix: we never have to change things for byte insns, | |
811 | or when no opcode suffix is need to size the operands. */ | |
812 | ||
813 | if (! i.suffix && (t->opcode_modifier & W)) { | |
814 | as_bad("no opcode suffix given and no register operands; can't size instruction"); | |
815 | return; | |
816 | } | |
817 | ||
818 | if (i.suffix && i.suffix != BYTE_OPCODE_SUFFIX) { | |
819 | /* Select between byte and word/dword operations. */ | |
820 | if (t->opcode_modifier & W) | |
821 | t->base_opcode |= W; | |
822 | /* Now select between word & dword operations via the | |
823 | operand size prefix. */ | |
824 | if (i.suffix == WORD_OPCODE_SUFFIX) { | |
825 | if (i.prefixes == MAX_PREFIXES) { | |
826 | as_bad("%d prefixes given and 'w' opcode suffix gives too many prefixes", | |
827 | MAX_PREFIXES); | |
828 | return; | |
829 | } | |
830 | i.prefix[i.prefixes++] = WORD_PREFIX_OPCODE; | |
831 | } | |
832 | } | |
833 | ||
834 | /* For insns with operands there are more diddles to do to the opcode. */ | |
835 | if (i.operands) { | |
836 | /* If we found a reverse match we must alter the opcode direction bit | |
837 | found_reverse_match holds bit to set (different for int & | |
838 | float insns). */ | |
839 | ||
840 | if (found_reverse_match) { | |
841 | t->base_opcode |= found_reverse_match; | |
842 | } | |
843 | ||
844 | /* | |
845 | The imul $imm, %reg instruction is converted into | |
846 | imul $imm, %reg, %reg. */ | |
847 | if (t->opcode_modifier & imulKludge) { | |
848 | i.regs[2] = i.regs[1]; /* Pretend we saw the 3 operand case. */ | |
849 | i.reg_operands = 2; | |
850 | } | |
851 | ||
852 | /* Certain instructions expect the destination to be in the i.rm.reg | |
853 | field. This is by far the exceptional case. For these instructions, | |
854 | if the source operand is a register, we must reverse the i.rm.reg | |
855 | and i.rm.regmem fields. We accomplish this by faking that the | |
856 | two register operands were given in the reverse order. */ | |
857 | if ((t->opcode_modifier & ReverseRegRegmem) && i.reg_operands == 2) { | |
858 | unsigned int first_reg_operand = (i.types[0] & Reg) ? 0 : 1; | |
859 | unsigned int second_reg_operand = first_reg_operand + 1; | |
860 | reg_entry *tmp = i.regs[first_reg_operand]; | |
861 | i.regs[first_reg_operand] = i.regs[second_reg_operand]; | |
862 | i.regs[second_reg_operand] = tmp; | |
863 | } | |
864 | ||
865 | if (t->opcode_modifier & ShortForm) { | |
866 | /* The register or float register operand is in operand 0 or 1. */ | |
867 | unsigned int o = (i.types[0] & (Reg|FloatReg)) ? 0 : 1; | |
868 | /* Register goes in low 3 bits of opcode. */ | |
869 | t->base_opcode |= i.regs[o]->reg_num; | |
870 | } else if (t->opcode_modifier & ShortFormW) { | |
871 | /* Short form with 0x8 width bit. Register is always dest. operand */ | |
872 | t->base_opcode |= i.regs[1]->reg_num; | |
873 | if (i.suffix == WORD_OPCODE_SUFFIX || | |
874 | i.suffix == DWORD_OPCODE_SUFFIX) | |
875 | t->base_opcode |= 0x8; | |
876 | } else if (t->opcode_modifier & Seg2ShortForm) { | |
877 | if (t->base_opcode == POP_SEG_SHORT && i.regs[0]->reg_num == 1) { | |
878 | as_bad("you can't 'pop cs' on the 386."); | |
879 | return; | |
880 | } | |
881 | t->base_opcode |= (i.regs[0]->reg_num << 3); | |
882 | } else if (t->opcode_modifier & Seg3ShortForm) { | |
883 | /* 'push %fs' is 0x0fa0; 'pop %fs' is 0x0fa1. | |
884 | 'push %gs' is 0x0fa8; 'pop %fs' is 0x0fa9. | |
885 | So, only if i.regs[0]->reg_num == 5 (%gs) do we need | |
886 | to change the opcode. */ | |
887 | if (i.regs[0]->reg_num == 5) | |
888 | t->base_opcode |= 0x08; | |
889 | } else if (t->opcode_modifier & Modrm) { | |
890 | /* The opcode is completed (modulo t->extension_opcode which must | |
891 | be put into the modrm byte. | |
892 | Now, we make the modrm & index base bytes based on all the info | |
893 | we've collected. */ | |
894 | ||
895 | /* i.reg_operands MUST be the number of real register operands; | |
896 | implicit registers do not count. */ | |
897 | if (i.reg_operands == 2) { | |
898 | unsigned int source, dest; | |
899 | source = (i.types[0] & (Reg|SReg2|SReg3|Control|Debug|Test)) ? 0 : 1; | |
900 | dest = source + 1; | |
901 | i.rm.mode = 3; | |
902 | /* We must be careful to make sure that all segment/control/test/ | |
903 | debug registers go into the i.rm.reg field (despite the whether | |
904 | they are source or destination operands). */ | |
905 | if (i.regs[dest]->reg_type & (SReg2|SReg3|Control|Debug|Test)) { | |
906 | i.rm.reg = i.regs[dest]->reg_num; | |
907 | i.rm.regmem = i.regs[source]->reg_num; | |
908 | } else { | |
909 | i.rm.reg = i.regs[source]->reg_num; | |
910 | i.rm.regmem = i.regs[dest]->reg_num; | |
911 | } | |
912 | } else { /* if it's not 2 reg operands... */ | |
913 | if (i.mem_operands) { | |
914 | unsigned int fake_zero_displacement = 0; | |
915 | unsigned int o = (i.types[0] & Mem) ? 0 : ((i.types[1] & Mem) ? 1 : 2); | |
916 | ||
917 | /* Encode memory operand into modrm byte and base index byte. */ | |
918 | ||
919 | if (i.base_reg == esp && ! i.index_reg) { | |
920 | /* <disp>(%esp) becomes two byte modrm with no index register. */ | |
921 | i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING; | |
922 | i.rm.mode = MODE_FROM_DISP_SIZE (i.types[o]); | |
923 | i.bi.base = ESP_REG_NUM; | |
924 | i.bi.index = NO_INDEX_REGISTER; | |
925 | i.bi.scale = 0; /* Must be zero! */ | |
926 | } else if (i.base_reg == ebp && !i.index_reg) { | |
927 | if (! (i.types[o] & Disp)) { | |
928 | /* Must fake a zero byte displacement. | |
929 | There is no direct way to code '(%ebp)' directly. */ | |
930 | fake_zero_displacement = 1; | |
931 | /* fake_zero_displacement code does not set this. */ | |
932 | i.types[o] |= Disp8; | |
933 | } | |
934 | i.rm.mode = MODE_FROM_DISP_SIZE (i.types[o]); | |
935 | i.rm.regmem = EBP_REG_NUM; | |
936 | } else if (! i.base_reg && (i.types[o] & BaseIndex)) { | |
937 | /* There are three cases here. | |
938 | Case 1: '<32bit disp>(,1)' -- indirect absolute. | |
939 | (Same as cases 2 & 3 with NO index register) | |
940 | Case 2: <32bit disp> (,<index>) -- no base register with disp | |
941 | Case 3: (, <index>) --- no base register; | |
942 | no disp (must add 32bit 0 disp). */ | |
943 | i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING; | |
944 | i.rm.mode = 0; /* 32bit mode */ | |
945 | i.bi.base = NO_BASE_REGISTER; | |
946 | i.types[o] &= ~Disp; | |
947 | i.types[o] |= Disp32; /* Must be 32bit! */ | |
948 | if (i.index_reg) { /* case 2 or case 3 */ | |
949 | i.bi.index = i.index_reg->reg_num; | |
950 | i.bi.scale = i.log2_scale_factor; | |
951 | if (i.disp_operands == 0) | |
952 | fake_zero_displacement = 1; /* case 3 */ | |
953 | } else { | |
954 | i.bi.index = NO_INDEX_REGISTER; | |
955 | i.bi.scale = 0; | |
956 | } | |
957 | } else if (i.disp_operands && !i.base_reg && !i.index_reg) { | |
958 | /* Operand is just <32bit disp> */ | |
959 | i.rm.regmem = EBP_REG_NUM; | |
960 | i.rm.mode = 0; | |
961 | i.types[o] &= ~Disp; | |
962 | i.types[o] |= Disp32; | |
963 | } else { | |
964 | /* It's not a special case; rev'em up. */ | |
965 | i.rm.regmem = i.base_reg->reg_num; | |
966 | i.rm.mode = MODE_FROM_DISP_SIZE (i.types[o]); | |
967 | if (i.index_reg) { | |
968 | i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING; | |
969 | i.bi.base = i.base_reg->reg_num; | |
970 | i.bi.index = i.index_reg->reg_num; | |
971 | i.bi.scale = i.log2_scale_factor; | |
972 | if (i.base_reg == ebp && i.disp_operands == 0) { /* pace */ | |
973 | fake_zero_displacement = 1; | |
974 | i.types[o] |= Disp8; | |
975 | i.rm.mode = MODE_FROM_DISP_SIZE (i.types[o]); | |
976 | } | |
977 | } | |
978 | } | |
979 | if (fake_zero_displacement) { | |
980 | /* Fakes a zero displacement assuming that i.types[o] holds | |
981 | the correct displacement size. */ | |
982 | exp = &disp_expressions[i.disp_operands++]; | |
983 | i.disps[o] = exp; | |
984 | exp->X_seg = SEG_ABSOLUTE; | |
985 | exp->X_add_number = 0; | |
986 | exp->X_add_symbol = (symbolS *) 0; | |
987 | exp->X_subtract_symbol = (symbolS *) 0; | |
988 | } | |
989 | ||
990 | /* Select the correct segment for the memory operand. */ | |
991 | if (i.seg) { | |
992 | const unsigned int seg_index; | |
993 | const seg_entry * default_seg; | |
994 | ||
995 | if (i.rm.regmem == ESCAPE_TO_TWO_BYTE_ADDRESSING) { | |
996 | seg_index = (i.rm.mode<<3) | i.bi.base; | |
997 | default_seg = two_byte_segment_defaults [seg_index]; | |
998 | } else { | |
999 | seg_index = (i.rm.mode<<3) | i.rm.regmem; | |
1000 | default_seg = one_byte_segment_defaults [seg_index]; | |
1001 | } | |
1002 | /* If the specified segment is not the default, use an | |
1003 | opcode prefix to select it */ | |
1004 | if (i.seg != default_seg) { | |
1005 | if (i.prefixes == MAX_PREFIXES) { | |
1006 | as_bad("%d prefixes given and %s segment override gives too many prefixes", | |
1007 | MAX_PREFIXES, i.seg->seg_name); | |
1008 | return; | |
1009 | } | |
1010 | i.prefix[i.prefixes++] = i.seg->seg_prefix; | |
1011 | } | |
1012 | } | |
1013 | } | |
1014 | ||
1015 | /* Fill in i.rm.reg or i.rm.regmem field with register operand | |
1016 | (if any) based on t->extension_opcode. Again, we must be careful | |
1017 | to make sure that segment/control/debug/test registers are coded | |
1018 | into the i.rm.reg field. */ | |
1019 | if (i.reg_operands) { | |
1020 | unsigned int o = | |
1021 | (i.types[0] & (Reg|SReg2|SReg3|Control|Debug|Test)) ? 0 : | |
1022 | (i.types[1] & (Reg|SReg2|SReg3|Control|Debug|Test)) ? 1 : 2; | |
1023 | /* If there is an extension opcode to put here, the register number | |
1024 | must be put into the regmem field. */ | |
1025 | if (t->extension_opcode != None) | |
1026 | i.rm.regmem = i.regs[o]->reg_num; | |
1027 | else i.rm.reg = i.regs[o]->reg_num; | |
1028 | ||
1029 | /* Now, if no memory operand has set i.rm.mode = 0, 1, 2 | |
1030 | we must set it to 3 to indicate this is a register operand | |
1031 | int the regmem field */ | |
1032 | if (! i.mem_operands) i.rm.mode = 3; | |
1033 | } | |
1034 | ||
1035 | /* Fill in i.rm.reg field with extension opcode (if any). */ | |
1036 | if (t->extension_opcode != None) | |
1037 | i.rm.reg = t->extension_opcode; | |
1038 | } | |
1039 | } | |
1040 | } | |
fecd2382 | 1041 | } |
fecd2382 | 1042 | |
a39116f1 RP |
1043 | /* Handle conversion of 'int $3' --> special int3 insn. */ |
1044 | if (t->base_opcode == INT_OPCODE && i.imms[0]->X_add_number == 3) { | |
1045 | t->base_opcode = INT3_OPCODE; | |
1046 | i.imm_operands = 0; | |
fecd2382 | 1047 | } |
fecd2382 | 1048 | |
a39116f1 RP |
1049 | /* We are ready to output the insn. */ |
1050 | { | |
1051 | register char * p; | |
1052 | ||
1053 | /* Output jumps. */ | |
1054 | if (t->opcode_modifier & Jump) { | |
1055 | int n = i.disps[0]->X_add_number; | |
1056 | ||
1057 | switch (i.disps[0]->X_seg) { | |
1058 | case SEG_ABSOLUTE: | |
1059 | if (FITS_IN_SIGNED_BYTE (n)) { | |
1060 | p = frag_more (2); | |
1061 | p[0] = t->base_opcode; | |
1062 | p[1] = n; | |
1063 | #if 0 /* leave out 16 bit jumps - pace */ | |
1064 | } else if (FITS_IN_SIGNED_WORD (n)) { | |
1065 | p = frag_more (4); | |
1066 | p[0] = WORD_PREFIX_OPCODE; | |
1067 | p[1] = t->base_opcode; | |
1068 | md_number_to_chars (&p[2], n, 2); | |
1069 | #endif | |
1070 | } else { /* It's an absolute dword displacement. */ | |
1071 | if (t->base_opcode == JUMP_PC_RELATIVE) { /* pace */ | |
1072 | /* unconditional jump */ | |
1073 | p = frag_more (5); | |
1074 | p[0] = 0xe9; | |
1075 | md_number_to_chars (&p[1], n, 4); | |
1076 | } else { | |
1077 | /* conditional jump */ | |
1078 | p = frag_more (6); | |
1079 | p[0] = TWO_BYTE_OPCODE_ESCAPE; | |
1080 | p[1] = t->base_opcode + 0x10; | |
1081 | md_number_to_chars (&p[2], n, 4); | |
1082 | } | |
1083 | } | |
1084 | break; | |
1085 | default: | |
1086 | /* It's a symbol; end frag & setup for relax. | |
1087 | Make sure there are 6 chars left in the current frag; if not | |
1088 | we'll have to start a new one. */ | |
1089 | /* I caught it failing with obstack_room == 6, | |
1090 | so I changed to <= pace */ | |
1091 | if (obstack_room (&frags) <= 6) { | |
1092 | frag_wane(frag_now); | |
1093 | frag_new (0); | |
1094 | } | |
1095 | p = frag_more (1); | |
1096 | p[0] = t->base_opcode; | |
1097 | frag_var (rs_machine_dependent, | |
1098 | 6, /* 2 opcode/prefix + 4 displacement */ | |
1099 | 1, | |
1100 | ((unsigned char) *p == JUMP_PC_RELATIVE | |
1101 | ? ENCODE_RELAX_STATE (UNCOND_JUMP, BYTE) | |
1102 | : ENCODE_RELAX_STATE (COND_JUMP, BYTE)), | |
1103 | i.disps[0]->X_add_symbol, | |
1104 | n, p); | |
1105 | break; | |
1106 | } | |
1107 | } else if (t->opcode_modifier & (JumpByte|JumpDword)) { | |
1108 | int size = (t->opcode_modifier & JumpByte) ? 1 : 4; | |
1109 | int n = i.disps[0]->X_add_number; | |
1110 | ||
1111 | if (FITS_IN_UNSIGNED_BYTE(t->base_opcode)) { | |
1112 | FRAG_APPEND_1_CHAR (t->base_opcode); | |
1113 | } else { | |
1114 | p = frag_more (2); /* opcode can be at most two bytes */ | |
1115 | /* put out high byte first: can't use md_number_to_chars! */ | |
1116 | *p++ = (t->base_opcode >> 8) & 0xff; | |
1117 | *p = t->base_opcode & 0xff; | |
1118 | } | |
1119 | ||
1120 | p = frag_more (size); | |
1121 | switch (i.disps[0]->X_seg) { | |
1122 | case SEG_ABSOLUTE: | |
1123 | md_number_to_chars (p, n, size); | |
1124 | if (size == 1 && ! FITS_IN_SIGNED_BYTE (n)) { | |
1125 | as_bad("loop/jecx only takes byte displacement; %d shortened to %d", | |
1126 | n, *p); | |
1127 | } | |
1128 | break; | |
1129 | default: | |
1130 | fix_new (frag_now, p - frag_now->fr_literal, size, | |
1131 | i.disps[0]->X_add_symbol, i.disps[0]->X_subtract_symbol, | |
1132 | i.disps[0]->X_add_number, 1, NO_RELOC); | |
1133 | break; | |
1134 | } | |
1135 | } else if (t->opcode_modifier & JumpInterSegment) { | |
1136 | p = frag_more (1 + 2 + 4); /* 1 opcode; 2 segment; 4 offset */ | |
1137 | p[0] = t->base_opcode; | |
1138 | if (i.imms[1]->X_seg == SEG_ABSOLUTE) | |
1139 | md_number_to_chars (p + 1, i.imms[1]->X_add_number, 4); | |
1140 | else | |
1141 | fix_new (frag_now, p + 1 - frag_now->fr_literal, 4, | |
1142 | i.imms[1]->X_add_symbol, | |
1143 | i.imms[1]->X_subtract_symbol, | |
1144 | i.imms[1]->X_add_number, 0, NO_RELOC); | |
1145 | if (i.imms[0]->X_seg != SEG_ABSOLUTE) | |
1146 | as_bad("can't handle non absolute segment in long call/jmp"); | |
1147 | md_number_to_chars (p + 5, i.imms[0]->X_add_number, 2); | |
1148 | } else { | |
1149 | /* Output normal instructions here. */ | |
1150 | register char *q; | |
1151 | ||
1152 | /* First the prefix bytes. */ | |
1153 | for (q = i.prefix; q < i.prefix + i.prefixes; q++) { | |
1154 | p = frag_more (1); | |
1155 | md_number_to_chars (p, (unsigned int) *q, 1); | |
1156 | } | |
1157 | ||
1158 | /* Now the opcode; be careful about word order here! */ | |
1159 | if (FITS_IN_UNSIGNED_BYTE(t->base_opcode)) { | |
1160 | FRAG_APPEND_1_CHAR (t->base_opcode); | |
1161 | } else if (FITS_IN_UNSIGNED_WORD(t->base_opcode)) { | |
1162 | p = frag_more (2); | |
1163 | /* put out high byte first: can't use md_number_to_chars! */ | |
1164 | *p++ = (t->base_opcode >> 8) & 0xff; | |
1165 | *p = t->base_opcode & 0xff; | |
1166 | } else { /* opcode is either 3 or 4 bytes */ | |
1167 | if (t->base_opcode & 0xff000000) { | |
1168 | p = frag_more (4); | |
1169 | *p++ = (t->base_opcode >> 24) & 0xff; | |
1170 | } else p = frag_more (3); | |
1171 | *p++ = (t->base_opcode >> 16) & 0xff; | |
1172 | *p++ = (t->base_opcode >> 8) & 0xff; | |
1173 | *p = (t->base_opcode ) & 0xff; | |
1174 | } | |
1175 | ||
1176 | /* Now the modrm byte and base index byte (if present). */ | |
1177 | if (t->opcode_modifier & Modrm) { | |
1178 | p = frag_more (1); | |
1179 | /* md_number_to_chars (p, i.rm, 1); */ | |
1180 | md_number_to_chars (p, (i.rm.regmem<<0 | i.rm.reg<<3 | i.rm.mode<<6), 1); | |
1181 | /* If i.rm.regmem == ESP (4) && i.rm.mode != Mode 3 (Register mode) | |
1182 | ==> need second modrm byte. */ | |
1183 | if (i.rm.regmem == ESCAPE_TO_TWO_BYTE_ADDRESSING && i.rm.mode != 3) { | |
1184 | p = frag_more (1); | |
1185 | /* md_number_to_chars (p, i.bi, 1); */ | |
1186 | md_number_to_chars (p,(i.bi.base<<0 | i.bi.index<<3 | i.bi.scale<<6), 1); | |
1187 | } | |
1188 | } | |
1189 | ||
1190 | if (i.disp_operands) { | |
1191 | register unsigned int n; | |
1192 | ||
1193 | for (n = 0; n < i.operands; n++) { | |
1194 | if (i.disps[n]) { | |
1195 | if (i.disps[n]->X_seg == SEG_ABSOLUTE) { | |
1196 | if (i.types[n] & (Disp8|Abs8)) { | |
1197 | p = frag_more (1); | |
1198 | md_number_to_chars (p, i.disps[n]->X_add_number, 1); | |
1199 | } else if (i.types[n] & (Disp16|Abs16)) { | |
1200 | p = frag_more (2); | |
1201 | md_number_to_chars (p, i.disps[n]->X_add_number, 2); | |
1202 | } else { /* Disp32|Abs32 */ | |
1203 | p = frag_more (4); | |
1204 | md_number_to_chars (p, i.disps[n]->X_add_number, 4); | |
1205 | } | |
1206 | } else { /* not SEG_ABSOLUTE */ | |
1207 | /* need a 32-bit fixup (don't support 8bit non-absolute disps) */ | |
1208 | p = frag_more (4); | |
1209 | fix_new (frag_now, p - frag_now->fr_literal, 4, | |
1210 | i.disps[n]->X_add_symbol, i.disps[n]->X_subtract_symbol, | |
1211 | i.disps[n]->X_add_number, 0, NO_RELOC); | |
1212 | } | |
1213 | } | |
1214 | } | |
1215 | } /* end displacement output */ | |
1216 | ||
1217 | /* output immediate */ | |
1218 | if (i.imm_operands) { | |
1219 | register unsigned int n; | |
1220 | ||
1221 | for (n = 0; n < i.operands; n++) { | |
1222 | if (i.imms[n]) { | |
1223 | if (i.imms[n]->X_seg == SEG_ABSOLUTE) { | |
1224 | if (i.types[n] & (Imm8|Imm8S)) { | |
1225 | p = frag_more (1); | |
1226 | md_number_to_chars (p, i.imms[n]->X_add_number, 1); | |
1227 | } else if (i.types[n] & Imm16) { | |
1228 | p = frag_more (2); | |
1229 | md_number_to_chars (p, i.imms[n]->X_add_number, 2); | |
1230 | } else { | |
1231 | p = frag_more (4); | |
1232 | md_number_to_chars (p, i.imms[n]->X_add_number, 4); | |
1233 | } | |
1234 | } else { /* not SEG_ABSOLUTE */ | |
1235 | /* need a 32-bit fixup (don't support 8bit non-absolute ims) */ | |
1236 | /* try to support other sizes ... */ | |
1237 | int size; | |
1238 | if (i.types[n] & (Imm8|Imm8S)) | |
1239 | size = 1; | |
1240 | else if (i.types[n] & Imm16) | |
1241 | size = 2; | |
1242 | else | |
1243 | size = 4; | |
1244 | p = frag_more (size); | |
1245 | fix_new (frag_now, p - frag_now->fr_literal, size, | |
1246 | i.imms[n]->X_add_symbol, i.imms[n]->X_subtract_symbol, | |
1247 | i.imms[n]->X_add_number, 0, NO_RELOC); | |
1248 | } | |
1249 | } | |
1250 | } | |
1251 | } /* end immediate output */ | |
1252 | } | |
1253 | ||
fecd2382 | 1254 | #ifdef DEBUG386 |
a39116f1 RP |
1255 | if (flagseen ['D']) { |
1256 | pi (line, &i); | |
1257 | } | |
fecd2382 | 1258 | #endif /* DEBUG386 */ |
a39116f1 RP |
1259 | |
1260 | } | |
1261 | return; | |
fecd2382 RP |
1262 | } |
1263 | \f | |
1264 | /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero | |
1265 | on error. */ | |
1266 | ||
1267 | static int i386_operand (operand_string) | |
a39116f1 | 1268 | char *operand_string; |
fecd2382 | 1269 | { |
a39116f1 RP |
1270 | register char *op_string = operand_string; |
1271 | ||
1272 | /* Address of '\0' at end of operand_string. */ | |
1273 | char * end_of_operand_string = operand_string + strlen(operand_string); | |
1274 | ||
1275 | /* Start and end of displacement string expression (if found). */ | |
1276 | char * displacement_string_start = 0; | |
1277 | char * displacement_string_end; | |
1278 | ||
1279 | /* We check for an absolute prefix (differentiating, | |
1280 | for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */ | |
1281 | if (*op_string == ABSOLUTE_PREFIX) { | |
1282 | op_string++; | |
1283 | i.types[this_operand] |= JumpAbsolute; | |
fecd2382 | 1284 | } |
a39116f1 RP |
1285 | |
1286 | /* Check if operand is a register. */ | |
1287 | if (*op_string == REGISTER_PREFIX) { | |
1288 | register reg_entry * r; | |
1289 | if (! (r = parse_register (op_string))) { | |
1290 | as_bad("bad register name ('%s')", op_string); | |
1291 | return 0; | |
1292 | } | |
1293 | /* Check for segment override, rather than segment register by | |
1294 | searching for ':' after %<x>s where <x> = s, c, d, e, f, g. */ | |
1295 | if ((r->reg_type & (SReg2|SReg3)) && op_string[3] == ':') { | |
1296 | switch (r->reg_num) { | |
1297 | case 0: | |
1298 | i.seg = &es; break; | |
1299 | case 1: | |
1300 | i.seg = &cs; break; | |
1301 | case 2: | |
1302 | i.seg = &ss; break; | |
1303 | case 3: | |
1304 | i.seg = &ds; break; | |
1305 | case 4: | |
1306 | i.seg = &fs; break; | |
1307 | case 5: | |
1308 | i.seg = &gs; break; | |
1309 | } | |
1310 | op_string += 4; /* skip % <x> s : */ | |
1311 | operand_string = op_string; /* Pretend given string starts here. */ | |
1312 | if (!is_digit_char(*op_string) && !is_identifier_char(*op_string) | |
1313 | && *op_string != '(' && *op_string != ABSOLUTE_PREFIX) { | |
1314 | as_bad("bad memory operand after segment override"); | |
1315 | return 0; | |
1316 | } | |
1317 | /* Handle case of %es:*foo. */ | |
1318 | if (*op_string == ABSOLUTE_PREFIX) { | |
1319 | op_string++; | |
1320 | i.types[this_operand] |= JumpAbsolute; | |
1321 | } | |
1322 | goto do_memory_reference; | |
1323 | } | |
1324 | i.types[this_operand] |= r->reg_type; | |
1325 | i.regs[this_operand] = r; | |
1326 | i.reg_operands++; | |
1327 | } else if (*op_string == IMMEDIATE_PREFIX) { /* ... or an immediate */ | |
1328 | char * save_input_line_pointer; | |
1329 | register expressionS *exp; | |
1330 | segT exp_seg; | |
1331 | if (i.imm_operands == MAX_IMMEDIATE_OPERANDS) { | |
1332 | as_bad("only 1 or 2 immediate operands are allowed"); | |
1333 | return 0; | |
1334 | } | |
1335 | exp = &im_expressions[i.imm_operands++]; | |
1336 | i.imms [this_operand] = exp; | |
1337 | save_input_line_pointer = input_line_pointer; | |
1338 | input_line_pointer = ++op_string; /* must advance op_string! */ | |
1339 | exp_seg = expression (exp); | |
1340 | input_line_pointer = save_input_line_pointer; | |
1341 | switch (exp_seg) { | |
1342 | case SEG_ABSENT: /* missing or bad expr becomes absolute 0 */ | |
1343 | as_bad("missing or invalid immediate expression '%s' taken as 0", | |
1344 | operand_string); | |
1345 | exp->X_seg = SEG_ABSOLUTE; | |
1346 | exp->X_add_number = 0; | |
1347 | exp->X_add_symbol = (symbolS *) 0; | |
1348 | exp->X_subtract_symbol = (symbolS *) 0; | |
1349 | i.types[this_operand] |= Imm; | |
1350 | break; | |
1351 | case SEG_ABSOLUTE: | |
1352 | i.types[this_operand] |= SMALLEST_IMM_TYPE (exp->X_add_number); | |
1353 | break; | |
1354 | case SEG_TEXT: case SEG_DATA: case SEG_BSS: case SEG_UNKNOWN: | |
1355 | i.types[this_operand] |= Imm32; /* this is an address ==> 32bit */ | |
1356 | break; | |
1357 | default: | |
1358 | seg_unimplemented: | |
1359 | as_bad("Unimplemented segment type %d in parse_operand", exp_seg); | |
1360 | return 0; | |
1361 | } | |
1362 | /* shorten this type of this operand if the instruction wants | |
1363 | * fewer bits than are present in the immediate. The bit field | |
1364 | * code can put out 'andb $0xffffff, %al', for example. pace | |
1365 | * also 'movw $foo,(%eax)' | |
1366 | */ | |
1367 | switch (i.suffix) { | |
1368 | case WORD_OPCODE_SUFFIX: | |
1369 | i.types[this_operand] |= Imm16; | |
1370 | break; | |
1371 | case BYTE_OPCODE_SUFFIX: | |
1372 | i.types[this_operand] |= Imm16 | Imm8 | Imm8S; | |
1373 | break; | |
1374 | } | |
1375 | } else if (is_digit_char(*op_string) || is_identifier_char(*op_string) | |
1376 | || *op_string == '(') { | |
1377 | /* This is a memory reference of some sort. */ | |
1378 | register char * base_string; | |
1379 | unsigned int found_base_index_form; | |
1380 | ||
1381 | do_memory_reference: | |
1382 | if (i.mem_operands == MAX_MEMORY_OPERANDS) { | |
1383 | as_bad("more than 1 memory reference in instruction"); | |
1384 | return 0; | |
1385 | } | |
1386 | i.mem_operands++; | |
1387 | ||
1388 | /* Determine type of memory operand from opcode_suffix; | |
1389 | no opcode suffix implies general memory references. */ | |
1390 | switch (i.suffix) { | |
1391 | case BYTE_OPCODE_SUFFIX: | |
1392 | i.types[this_operand] |= Mem8; | |
1393 | break; | |
1394 | case WORD_OPCODE_SUFFIX: | |
1395 | i.types[this_operand] |= Mem16; | |
1396 | break; | |
1397 | case DWORD_OPCODE_SUFFIX: | |
1398 | default: | |
1399 | i.types[this_operand] |= Mem32; | |
1400 | } | |
1401 | ||
1402 | /* Check for base index form. We detect the base index form by | |
1403 | looking for an ')' at the end of the operand, searching | |
1404 | for the '(' matching it, and finding a REGISTER_PREFIX or ',' | |
1405 | after it. */ | |
1406 | base_string = end_of_operand_string - 1; | |
1407 | found_base_index_form = 0; | |
1408 | if (*base_string == ')') { | |
1409 | unsigned int parens_balenced = 1; | |
1410 | /* We've already checked that the number of left & right ()'s are equal, | |
1411 | so this loop will not be infinite. */ | |
1412 | do { | |
1413 | base_string--; | |
1414 | if (*base_string == ')') parens_balenced++; | |
1415 | if (*base_string == '(') parens_balenced--; | |
1416 | } while (parens_balenced); | |
1417 | base_string++; /* Skip past '('. */ | |
1418 | if (*base_string == REGISTER_PREFIX || *base_string == ',') | |
1419 | found_base_index_form = 1; | |
1420 | } | |
1421 | ||
1422 | /* If we can't parse a base index register expression, we've found | |
1423 | a pure displacement expression. We set up displacement_string_start | |
1424 | and displacement_string_end for the code below. */ | |
1425 | if (! found_base_index_form) { | |
1426 | displacement_string_start = op_string; | |
1427 | displacement_string_end = end_of_operand_string; | |
1428 | } else { | |
1429 | char *base_reg_name, *index_reg_name, *num_string; | |
1430 | int num; | |
1431 | ||
1432 | i.types[this_operand] |= BaseIndex; | |
1433 | ||
1434 | /* If there is a displacement set-up for it to be parsed later. */ | |
1435 | if (base_string != op_string + 1) { | |
1436 | displacement_string_start = op_string; | |
1437 | displacement_string_end = base_string - 1; | |
1438 | } | |
1439 | ||
1440 | /* Find base register (if any). */ | |
1441 | if (*base_string != ',') { | |
1442 | base_reg_name = base_string++; | |
1443 | /* skip past register name & parse it */ | |
1444 | while (isalpha(*base_string)) base_string++; | |
1445 | if (base_string == base_reg_name+1) { | |
1446 | as_bad("can't find base register name after '(%c'", | |
1447 | REGISTER_PREFIX); | |
1448 | return 0; | |
1449 | } | |
1450 | END_STRING_AND_SAVE (base_string); | |
1451 | if (! (i.base_reg = parse_register (base_reg_name))) { | |
1452 | as_bad("bad base register name ('%s')", base_reg_name); | |
1453 | return 0; | |
1454 | } | |
1455 | RESTORE_END_STRING (base_string); | |
1456 | } | |
1457 | ||
1458 | /* Now check seperator; must be ',' ==> index reg | |
1459 | OR num ==> no index reg. just scale factor | |
1460 | OR ')' ==> end. (scale factor = 1) */ | |
1461 | if (*base_string != ',' && *base_string != ')') { | |
1462 | as_bad("expecting ',' or ')' after base register in `%s'", | |
1463 | operand_string); | |
1464 | return 0; | |
1465 | } | |
1466 | ||
1467 | /* There may index reg here; and there may be a scale factor. */ | |
1468 | if (*base_string == ',' && *(base_string+1) == REGISTER_PREFIX) { | |
1469 | index_reg_name = ++base_string; | |
1470 | while (isalpha(*++base_string)); | |
1471 | END_STRING_AND_SAVE (base_string); | |
1472 | if (! (i.index_reg = parse_register(index_reg_name))) { | |
1473 | as_bad("bad index register name ('%s')", index_reg_name); | |
1474 | return 0; | |
1475 | } | |
1476 | RESTORE_END_STRING (base_string); | |
1477 | } | |
1478 | ||
1479 | /* Check for scale factor. */ | |
1480 | if (*base_string == ',' && isdigit(*(base_string+1))) { | |
1481 | num_string = ++base_string; | |
1482 | while (is_digit_char(*base_string)) base_string++; | |
1483 | if (base_string == num_string) { | |
1484 | as_bad("can't find a scale factor after ','"); | |
1485 | return 0; | |
1486 | } | |
1487 | END_STRING_AND_SAVE (base_string); | |
1488 | /* We've got a scale factor. */ | |
1489 | if (! sscanf (num_string, "%d", &num)) { | |
1490 | as_bad("can't parse scale factor from '%s'", num_string); | |
1491 | return 0; | |
1492 | } | |
1493 | RESTORE_END_STRING (base_string); | |
1494 | switch (num) { /* must be 1 digit scale */ | |
1495 | case 1: i.log2_scale_factor = 0; break; | |
1496 | case 2: i.log2_scale_factor = 1; break; | |
1497 | case 4: i.log2_scale_factor = 2; break; | |
1498 | case 8: i.log2_scale_factor = 3; break; | |
1499 | default: | |
1500 | as_bad("expecting scale factor of 1, 2, 4, 8; got %d", num); | |
1501 | return 0; | |
1502 | } | |
1503 | } else { | |
1504 | if (! i.index_reg && *base_string == ',') { | |
1505 | as_bad("expecting index register or scale factor after ','; got '%c'", | |
1506 | *(base_string+1)); | |
1507 | return 0; | |
1508 | } | |
1509 | } | |
1510 | } | |
1511 | ||
1512 | /* If there's an expression begining the operand, parse it, | |
1513 | assuming displacement_string_start and displacement_string_end | |
1514 | are meaningful. */ | |
1515 | if (displacement_string_start) { | |
1516 | register expressionS * exp; | |
1517 | segT exp_seg; | |
1518 | char * save_input_line_pointer; | |
1519 | exp = &disp_expressions[i.disp_operands]; | |
1520 | i.disps [this_operand] = exp; | |
1521 | i.disp_operands++; | |
1522 | save_input_line_pointer = input_line_pointer; | |
1523 | input_line_pointer = displacement_string_start; | |
1524 | END_STRING_AND_SAVE (displacement_string_end); | |
1525 | exp_seg = expression (exp); | |
1526 | if(*input_line_pointer) | |
1527 | as_bad("Ignoring junk '%s' after expression",input_line_pointer); | |
1528 | RESTORE_END_STRING (displacement_string_end); | |
1529 | input_line_pointer = save_input_line_pointer; | |
1530 | switch (exp_seg) { | |
1531 | case SEG_ABSENT: | |
1532 | /* missing expr becomes absolute 0 */ | |
1533 | as_bad("missing or invalid displacement '%s' taken as 0", | |
1534 | operand_string); | |
1535 | i.types[this_operand] |= (Disp|Abs); | |
1536 | exp->X_seg = SEG_ABSOLUTE; | |
1537 | exp->X_add_number = 0; | |
1538 | exp->X_add_symbol = (symbolS *) 0; | |
1539 | exp->X_subtract_symbol = (symbolS *) 0; | |
1540 | break; | |
1541 | case SEG_ABSOLUTE: | |
1542 | i.types[this_operand] |= SMALLEST_DISP_TYPE (exp->X_add_number); | |
1543 | break; | |
1544 | case SEG_TEXT: case SEG_DATA: case SEG_BSS: | |
1545 | case SEG_UNKNOWN: /* must be 32 bit displacement (i.e. address) */ | |
1546 | i.types[this_operand] |= Disp32; | |
1547 | break; | |
1548 | default: | |
1549 | goto seg_unimplemented; | |
1550 | } | |
1551 | } | |
1552 | ||
1553 | /* Make sure the memory operand we've been dealt is valid. */ | |
1554 | if (i.base_reg && i.index_reg && | |
1555 | ! (i.base_reg->reg_type & i.index_reg->reg_type & Reg)) { | |
1556 | as_bad("register size mismatch in (base,index,scale) expression"); | |
1557 | return 0; | |
1558 | } | |
1559 | if ((i.base_reg && (i.base_reg->reg_type & Reg32) == 0) || | |
1560 | (i.index_reg && (i.index_reg->reg_type & Reg32) == 0)) { | |
1561 | as_bad("base/index register must be 32 bit register"); | |
1562 | return 0; | |
1563 | } | |
1564 | if (i.index_reg && i.index_reg == esp) { | |
1565 | as_bad("%s may not be used as an index register", esp->reg_name); | |
1566 | return 0; | |
1567 | } | |
1568 | } else { /* it's not a memory operand; argh! */ | |
1569 | as_bad("invalid char %s begining %s operand '%s'", | |
1570 | output_invalid(*op_string), ordinal_names[this_operand], | |
1571 | op_string); | |
1572 | return 0; | |
fecd2382 | 1573 | } |
a39116f1 | 1574 | return 1; /* normal return */ |
fecd2382 RP |
1575 | } |
1576 | \f | |
1577 | /* | |
1578 | * md_estimate_size_before_relax() | |
1579 | * | |
1580 | * Called just before relax(). | |
1581 | * Any symbol that is now undefined will not become defined. | |
1582 | * Return the correct fr_subtype in the frag. | |
1583 | * Return the initial "guess for fr_var" to caller. | |
1584 | * The guess for fr_var is ACTUALLY the growth beyond fr_fix. | |
1585 | * Whatever we do to grow fr_fix or fr_var contributes to our returned value. | |
1586 | * Although it may not be explicit in the frag, pretend fr_var starts with a | |
1587 | * 0 value. | |
1588 | */ | |
1589 | int | |
a39116f1 RP |
1590 | md_estimate_size_before_relax (fragP, segment) |
1591 | register fragS * fragP; | |
1592 | register segT segment; | |
fecd2382 | 1593 | { |
a39116f1 RP |
1594 | register unsigned char * opcode; |
1595 | register int old_fr_fix; | |
1596 | ||
1597 | old_fr_fix = fragP -> fr_fix; | |
1598 | opcode = (unsigned char *) fragP -> fr_opcode; | |
1599 | /* We've already got fragP->fr_subtype right; all we have to do is check | |
1600 | for un-relaxable symbols. */ | |
1601 | if (S_GET_SEGMENT(fragP -> fr_symbol) != segment) { | |
1602 | /* symbol is undefined in this segment */ | |
1603 | switch (opcode[0]) { | |
1604 | case JUMP_PC_RELATIVE: /* make jmp (0xeb) a dword displacement jump */ | |
1605 | opcode[0] = 0xe9; /* dword disp jmp */ | |
1606 | fragP -> fr_fix += 4; | |
1607 | fix_new (fragP, old_fr_fix, 4, | |
1608 | fragP -> fr_symbol, | |
1609 | (symbolS *) 0, | |
1610 | fragP -> fr_offset, 1, NO_RELOC); | |
1611 | break; | |
1612 | ||
1613 | default: | |
1614 | /* This changes the byte-displacement jump 0x7N --> | |
1615 | the dword-displacement jump 0x0f8N */ | |
1616 | opcode[1] = opcode[0] + 0x10; | |
1617 | opcode[0] = TWO_BYTE_OPCODE_ESCAPE; /* two-byte escape */ | |
1618 | fragP -> fr_fix += 1 + 4; /* we've added an opcode byte */ | |
1619 | fix_new (fragP, old_fr_fix + 1, 4, | |
1620 | fragP -> fr_symbol, | |
1621 | (symbolS *) 0, | |
1622 | fragP -> fr_offset, 1, NO_RELOC); | |
1623 | break; | |
1624 | } | |
1625 | frag_wane (fragP); | |
1626 | } | |
1627 | return (fragP -> fr_var + fragP -> fr_fix - old_fr_fix); | |
fecd2382 RP |
1628 | } /* md_estimate_size_before_relax() */ |
1629 | \f | |
1630 | /* | |
1631 | * md_convert_frag(); | |
1632 | * | |
1633 | * Called after relax() is finished. | |
1634 | * In: Address of frag. | |
1635 | * fr_type == rs_machine_dependent. | |
1636 | * fr_subtype is what the address relaxed to. | |
1637 | * | |
1638 | * Out: Any fixSs and constants are set up. | |
1639 | * Caller will turn frag into a ".space 0". | |
1640 | */ | |
1641 | void | |
a39116f1 RP |
1642 | md_convert_frag (headers, fragP) |
1643 | object_headers *headers; | |
1644 | register fragS * fragP; | |
fecd2382 | 1645 | { |
a39116f1 RP |
1646 | register unsigned char * opcode; |
1647 | unsigned char * where_to_put_displacement; | |
1648 | unsigned int target_address, opcode_address; | |
1649 | unsigned int extension; | |
1650 | int displacement_from_opcode_start; | |
1651 | ||
1652 | opcode = (unsigned char *) fragP -> fr_opcode; | |
1653 | ||
1654 | /* Address we want to reach in file space. */ | |
1655 | target_address = S_GET_VALUE(fragP->fr_symbol) + fragP->fr_offset; | |
1656 | ||
1657 | /* Address opcode resides at in file space. */ | |
1658 | opcode_address = fragP->fr_address + fragP->fr_fix; | |
1659 | ||
1660 | /* Displacement from opcode start to fill into instruction. */ | |
1661 | displacement_from_opcode_start = target_address - opcode_address; | |
1662 | ||
1663 | switch (fragP->fr_subtype) { | |
1664 | case ENCODE_RELAX_STATE (COND_JUMP, BYTE): | |
1665 | case ENCODE_RELAX_STATE (UNCOND_JUMP, BYTE): | |
1666 | /* don't have to change opcode */ | |
1667 | extension = 1; /* 1 opcode + 1 displacement */ | |
1668 | where_to_put_displacement = &opcode[1]; | |
1669 | break; | |
1670 | ||
1671 | case ENCODE_RELAX_STATE (COND_JUMP, WORD): | |
1672 | opcode[1] = TWO_BYTE_OPCODE_ESCAPE; | |
1673 | opcode[2] = opcode[0] + 0x10; | |
1674 | opcode[0] = WORD_PREFIX_OPCODE; | |
1675 | extension = 4; /* 3 opcode + 2 displacement */ | |
1676 | where_to_put_displacement = &opcode[3]; | |
1677 | break; | |
1678 | ||
1679 | case ENCODE_RELAX_STATE (UNCOND_JUMP, WORD): | |
1680 | opcode[1] = 0xe9; | |
1681 | opcode[0] = WORD_PREFIX_OPCODE; | |
1682 | extension = 3; /* 2 opcode + 2 displacement */ | |
1683 | where_to_put_displacement = &opcode[2]; | |
1684 | break; | |
1685 | ||
1686 | case ENCODE_RELAX_STATE (COND_JUMP, DWORD): | |
1687 | opcode[1] = opcode[0] + 0x10; | |
1688 | opcode[0] = TWO_BYTE_OPCODE_ESCAPE; | |
1689 | extension = 5; /* 2 opcode + 4 displacement */ | |
1690 | where_to_put_displacement = &opcode[2]; | |
1691 | break; | |
1692 | ||
1693 | case ENCODE_RELAX_STATE (UNCOND_JUMP, DWORD): | |
1694 | opcode[0] = 0xe9; | |
1695 | extension = 4; /* 1 opcode + 4 displacement */ | |
1696 | where_to_put_displacement = &opcode[1]; | |
1697 | break; | |
1698 | ||
1699 | default: | |
1700 | BAD_CASE(fragP -> fr_subtype); | |
1701 | break; | |
1702 | } | |
1703 | /* now put displacement after opcode */ | |
1704 | md_number_to_chars (where_to_put_displacement, | |
1705 | displacement_from_opcode_start - extension, | |
1706 | SIZE_FROM_RELAX_STATE (fragP->fr_subtype)); | |
1707 | fragP -> fr_fix += extension; | |
fecd2382 RP |
1708 | } |
1709 | ||
1710 | \f | |
1711 | int md_short_jump_size = 2; /* size of byte displacement jmp */ | |
1712 | int md_long_jump_size = 5; /* size of dword displacement jmp */ | |
1713 | int md_reloc_size = 8; /* Size of relocation record */ | |
1714 | ||
1715 | void md_create_short_jump(ptr, from_addr, to_addr, frag, to_symbol) | |
a39116f1 RP |
1716 | char *ptr; |
1717 | long from_addr, to_addr; | |
fecd2382 RP |
1718 | fragS *frag; |
1719 | symbolS *to_symbol; | |
1720 | { | |
a39116f1 RP |
1721 | long offset; |
1722 | ||
1723 | offset = to_addr - (from_addr + 2); | |
1724 | md_number_to_chars (ptr, (long) 0xeb, 1); /* opcode for byte-disp jump */ | |
1725 | md_number_to_chars (ptr + 1, offset, 1); | |
fecd2382 RP |
1726 | } |
1727 | ||
1728 | void md_create_long_jump (ptr, from_addr, to_addr, frag, to_symbol) | |
a39116f1 RP |
1729 | char *ptr; |
1730 | long from_addr, to_addr; | |
1731 | fragS *frag; | |
1732 | symbolS *to_symbol; | |
fecd2382 | 1733 | { |
a39116f1 RP |
1734 | long offset; |
1735 | ||
1736 | if (flagseen['m']) { | |
1737 | offset = to_addr - S_GET_VALUE(to_symbol); | |
1738 | md_number_to_chars (ptr, 0xe9, 1); /* opcode for long jmp */ | |
1739 | md_number_to_chars (ptr + 1, offset, 4); | |
1740 | fix_new (frag, (ptr+1) - frag->fr_literal, 4, | |
1741 | to_symbol, (symbolS *) 0, (long) 0, 0, NO_RELOC); | |
1742 | } else { | |
1743 | offset = to_addr - (from_addr + 5); | |
1744 | md_number_to_chars(ptr, (long) 0xe9, 1); | |
1745 | md_number_to_chars(ptr + 1, offset, 4); | |
1746 | } | |
fecd2382 RP |
1747 | } |
1748 | \f | |
1749 | int | |
a39116f1 | 1750 | md_parse_option(argP,cntP,vecP) |
fecd2382 RP |
1751 | char **argP; |
1752 | int *cntP; | |
1753 | char ***vecP; | |
1754 | { | |
1755 | return 1; | |
1756 | } | |
1757 | \f | |
1758 | void /* Knows about order of bytes in address. */ | |
a39116f1 RP |
1759 | md_number_to_chars (con, value, nbytes) |
1760 | char con []; /* Return 'nbytes' of chars here. */ | |
1761 | long value; /* The value of the bits. */ | |
1762 | int nbytes; /* Number of bytes in the output. */ | |
fecd2382 | 1763 | { |
a39116f1 RP |
1764 | register char * p = con; |
1765 | ||
1766 | switch (nbytes) { | |
1767 | case 1: | |
1768 | p[0] = value & 0xff; | |
1769 | break; | |
1770 | case 2: | |
1771 | p[0] = value & 0xff; | |
1772 | p[1] = (value >> 8) & 0xff; | |
1773 | break; | |
1774 | case 4: | |
1775 | p[0] = value & 0xff; | |
1776 | p[1] = (value>>8) & 0xff; | |
1777 | p[2] = (value>>16) & 0xff; | |
1778 | p[3] = (value>>24) & 0xff; | |
1779 | break; | |
1780 | default: | |
1781 | BAD_CASE (nbytes); | |
1782 | } | |
fecd2382 RP |
1783 | } |
1784 | ||
1785 | ||
1786 | /* Apply a fixup (fixS) to segment data, once it has been determined | |
1787 | by our caller that we have all the info we need to fix it up. | |
a39116f1 | 1788 | |
fecd2382 RP |
1789 | On the 386, immediates, displacements, and data pointers are all in |
1790 | the same (little-endian) format, so we don't need to care about which | |
1791 | we are handling. */ | |
1792 | ||
1793 | void | |
a39116f1 RP |
1794 | md_apply_fix (fixP, value) |
1795 | fixS * fixP; /* The fix we're to put in */ | |
1796 | long value; /* The value of the bits. */ | |
fecd2382 | 1797 | { |
a39116f1 RP |
1798 | register char * p = fixP->fx_where + fixP->fx_frag->fr_literal; |
1799 | ||
1800 | switch (fixP->fx_size) { | |
1801 | case 1: | |
1802 | *p = value; | |
1803 | break; | |
1804 | case 2: | |
1805 | *p++ = value; | |
1806 | *p = (value>>8); | |
1807 | break; | |
1808 | case 4: | |
1809 | *p++ = value; | |
1810 | *p++ = (value>>8); | |
1811 | *p++ = (value>>16); | |
1812 | *p = (value>>24); | |
1813 | break; | |
1814 | default: | |
1815 | BAD_CASE (fixP->fx_size); | |
1816 | } | |
fecd2382 RP |
1817 | } |
1818 | ||
1819 | long /* Knows about the byte order in a word. */ | |
a39116f1 | 1820 | md_chars_to_number (con, nbytes) |
fecd2382 | 1821 | unsigned char con[]; /* Low order byte 1st. */ |
a39116f1 | 1822 | int nbytes; /* Number of bytes in the input. */ |
fecd2382 | 1823 | { |
a39116f1 RP |
1824 | long retval; |
1825 | for (retval=0, con+=nbytes-1; nbytes--; con--) | |
1826 | { | |
1827 | retval <<= BITS_PER_CHAR; | |
1828 | retval |= *con; | |
1829 | } | |
1830 | return retval; | |
fecd2382 RP |
1831 | } |
1832 | ||
1833 | /* Not needed for coff since relocation structure does not | |
1834 | contain bitfields. */ | |
1835 | #if defined(OBJ_AOUT) | defined(OBJ_BOUT) | |
a39116f1 | 1836 | #ifdef comment |
fecd2382 RP |
1837 | /* Output relocation information in the target's format. */ |
1838 | void | |
a39116f1 RP |
1839 | md_ri_to_chars(the_bytes, ri) |
1840 | char *the_bytes; | |
1841 | struct reloc_info_generic *ri; | |
fecd2382 | 1842 | { |
a39116f1 RP |
1843 | /* this is easy */ |
1844 | md_number_to_chars(the_bytes, ri->r_address, 4); | |
1845 | /* now the fun stuff */ | |
1846 | the_bytes[6] = (ri->r_symbolnum >> 16) & 0x0ff; | |
1847 | the_bytes[5] = (ri->r_symbolnum >> 8) & 0x0ff; | |
1848 | the_bytes[4] = ri->r_symbolnum & 0x0ff; | |
1849 | the_bytes[7] = (((ri->r_extern << 3) & 0x08) | ((ri->r_length << 1) & 0x06) | | |
1850 | ((ri->r_pcrel << 0) & 0x01)) & 0x0F; | |
fecd2382 | 1851 | } |
a39116f1 RP |
1852 | #endif /* comment */ |
1853 | ||
1854 | void tc_aout_fix_to_chars(where, fixP, segment_address_in_file) | |
1855 | char *where; | |
1856 | fixS *fixP; | |
1857 | relax_addressT segment_address_in_file; | |
1858 | { | |
1859 | /* | |
1860 | * In: length of relocation (or of address) in chars: 1, 2 or 4. | |
1861 | * Out: GNU LD relocation length code: 0, 1, or 2. | |
1862 | */ | |
1863 | ||
1864 | static unsigned char nbytes_r_length [] = { 42, 0, 1, 42, 2 }; | |
1865 | long r_index; | |
1866 | ||
1867 | know(fixP->fx_addsy != NULL); | |
1868 | ||
1869 | r_index = (S_IS_DEFINED(fixP->fx_addsy) | |
1870 | ? S_GET_TYPE(fixP->fx_addsy) | |
1871 | : fixP->fx_addsy->sy_number); | |
1872 | ||
1873 | /* this is easy */ | |
1874 | md_number_to_chars(where, | |
1875 | fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file, | |
1876 | 4); | |
1877 | ||
1878 | /* now the fun stuff */ | |
1879 | where[4] = r_index & 0x0ff; | |
1880 | where[5] = (r_index >> 8) & 0x0ff; | |
1881 | where[6] = (r_index >> 16) & 0x0ff; | |
1882 | where[7] = ((((!S_IS_DEFINED(fixP->fx_addsy)) << 3) & 0x08) | |
1883 | | ((nbytes_r_length[fixP->fx_size] << 1) & 0x06) | |
1884 | | ((fixP->fx_pcrel << 0) & 0x01) & 0x0f); | |
1885 | ||
1886 | return; | |
1887 | } /* tc_aout_fix_to_chars() */ | |
1888 | ||
1889 | #endif /* OBJ_AOUT or OBJ_BOUT */ | |
fecd2382 RP |
1890 | |
1891 | \f | |
1892 | #define MAX_LITTLENUMS 6 | |
1893 | ||
1894 | /* Turn the string pointed to by litP into a floating point constant of type | |
1895 | type, and emit the appropriate bytes. The number of LITTLENUMS emitted | |
1896 | is stored in *sizeP . An error message is returned, or NULL on OK. | |
a39116f1 | 1897 | */ |
fecd2382 | 1898 | char * |
a39116f1 RP |
1899 | md_atof(type,litP,sizeP) |
1900 | char type; | |
1901 | char *litP; | |
1902 | int *sizeP; | |
fecd2382 | 1903 | { |
a39116f1 RP |
1904 | int prec; |
1905 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
1906 | LITTLENUM_TYPE *wordP; | |
1907 | char *t; | |
1908 | ||
1909 | switch(type) { | |
1910 | case 'f': | |
1911 | case 'F': | |
1912 | prec = 2; | |
1913 | break; | |
1914 | ||
1915 | case 'd': | |
1916 | case 'D': | |
1917 | prec = 4; | |
1918 | break; | |
1919 | ||
1920 | case 'x': | |
1921 | case 'X': | |
1922 | prec = 5; | |
1923 | break; | |
1924 | ||
1925 | default: | |
1926 | *sizeP=0; | |
1927 | return "Bad call to md_atof ()"; | |
1928 | } | |
1929 | t = atof_ieee (input_line_pointer,type,words); | |
1930 | if(t) | |
1931 | input_line_pointer=t; | |
1932 | ||
1933 | *sizeP = prec * sizeof(LITTLENUM_TYPE); | |
1934 | /* this loops outputs the LITTLENUMs in REVERSE order; in accord with | |
1935 | the bigendian 386 */ | |
1936 | for(wordP = words + prec - 1;prec--;) { | |
1937 | md_number_to_chars (litP, (long) (*wordP--), sizeof(LITTLENUM_TYPE)); | |
1938 | litP += sizeof(LITTLENUM_TYPE); | |
1939 | } | |
1940 | return ""; /* Someone should teach Dean about null pointers */ | |
fecd2382 RP |
1941 | } |
1942 | \f | |
1943 | char output_invalid_buf[8]; | |
1944 | ||
1945 | static char * output_invalid (c) | |
a39116f1 | 1946 | char c; |
fecd2382 | 1947 | { |
a39116f1 RP |
1948 | if (isprint(c)) sprintf (output_invalid_buf, "'%c'", c); |
1949 | else sprintf (output_invalid_buf, "(0x%x)", (unsigned) c); | |
1950 | return output_invalid_buf; | |
fecd2382 RP |
1951 | } |
1952 | ||
1953 | static reg_entry *parse_register (reg_string) | |
a39116f1 | 1954 | char *reg_string; /* reg_string starts *before* REGISTER_PREFIX */ |
fecd2382 | 1955 | { |
a39116f1 RP |
1956 | register char *s = reg_string; |
1957 | register char *p; | |
1958 | char reg_name_given[MAX_REG_NAME_SIZE]; | |
1959 | ||
1960 | s++; /* skip REGISTER_PREFIX */ | |
1961 | for (p = reg_name_given; is_register_char (*s); p++, s++) { | |
1962 | *p = register_chars [*s]; | |
1963 | if (p >= reg_name_given + MAX_REG_NAME_SIZE) | |
1964 | return (reg_entry *) 0; | |
1965 | } | |
1966 | *p = '\0'; | |
1967 | return (reg_entry *) hash_find (reg_hash, reg_name_given); | |
fecd2382 RP |
1968 | } |
1969 | ||
1970 | ||
1971 | /* We have no need to default values of symbols. */ | |
1972 | ||
1973 | /* ARGSUSED */ | |
1974 | symbolS * | |
a39116f1 RP |
1975 | md_undefined_symbol (name) |
1976 | char *name; | |
fecd2382 | 1977 | { |
a39116f1 | 1978 | return 0; |
fecd2382 RP |
1979 | } |
1980 | ||
1981 | /* Parse an operand that is machine-specific. | |
1982 | We just return without modifying the expression if we have nothing | |
1983 | to do. */ | |
1984 | ||
1985 | /* ARGSUSED */ | |
1986 | void | |
a39116f1 RP |
1987 | md_operand (expressionP) |
1988 | expressionS *expressionP; | |
fecd2382 RP |
1989 | { |
1990 | } | |
1991 | ||
1992 | /* Round up a section size to the appropriate boundary. */ | |
1993 | long | |
a39116f1 RP |
1994 | md_section_align (segment, size) |
1995 | segT segment; | |
1996 | long size; | |
fecd2382 | 1997 | { |
a39116f1 | 1998 | return size; /* Byte alignment is fine */ |
fecd2382 RP |
1999 | } |
2000 | ||
2001 | /* Exactly what point is a PC-relative offset relative TO? | |
2002 | On the i386, they're relative to the address of the offset, plus | |
2003 | its size. (??? Is this right? FIXME-SOON!) */ | |
2004 | long | |
a39116f1 RP |
2005 | md_pcrel_from (fixP) |
2006 | fixS *fixP; | |
fecd2382 | 2007 | { |
a39116f1 | 2008 | return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address; |
fecd2382 RP |
2009 | } |
2010 | ||
2011 | /* | |
2012 | * $Log$ | |
a39116f1 RP |
2013 | * Revision 1.9 1992/02/13 08:32:36 rich |
2014 | * White space and comments only. The devo tree prior to this delta is | |
2015 | * tagged as "vanilla" for your convenience. | |
2016 | * | |
2017 | * There are also some comment changes. | |
2018 | * | |
2019 | * Revision 1.8 1991/12/01 07:11:28 sac | |
2020 | * More filename renaming. | |
2021 | * | |
2022 | * Revision 1.7 1991/11/04 00:54:41 steve | |
2023 | * Change from bub kukara - puits the index into the right place for a | |
2024 | * reloc | |
2025 | * | |
2026 | * Revision 1.6 1991/08/14 00:25:52 rich | |
2027 | * * no more relocation_info structures. We now squirt directly from | |
2028 | * fixS's. | |
2029 | * | |
2030 | * * i960-bout and i960-coff "tested" against their predecessors. | |
2031 | * | |
2032 | * Revision 1.5 1991/07/27 02:32:37 rich | |
2033 | * Polishing m68k support. | |
2034 | * | |
2035 | * Revision 1.4 1991/06/14 14:02:17 rich | |
2036 | * Version 2 GPL. | |
2037 | * | |
2038 | * Revision 1.3 1991/04/12 05:32:42 rich | |
2039 | * Fixed a comment problem. | |
2040 | * | |
2041 | * Revision 1.2 1991/04/08 15:49:45 rich | |
2042 | * CROSS_ASSEMBLE becomes CROSS_COMPILE to make config simpler. i386 | |
2043 | * support for aout now tested against an installed customers sun4 cross. | |
2044 | * Added REVERSE_SORT_RELOCS. | |
2045 | * | |
2046 | * Revision 1.1.1.1 1991/04/04 18:16:44 rich | |
2047 | * new gas main line | |
2048 | * | |
2049 | * Revision 1.1 1991/04/04 18:16:41 rich | |
fecd2382 RP |
2050 | * Initial revision |
2051 | * | |
2052 | * Revision 1.2 1991/03/30 17:11:30 rich | |
2053 | * Updated md_create_short_jump calling protocol. | |
2054 | * | |
2055 | * | |
2056 | */ | |
2057 | ||
2058 | /* | |
2059 | * Local Variables: | |
2060 | * comment-column: 0 | |
2061 | * End: | |
2062 | */ | |
2063 | ||
2064 | /* end of tc-i386.c */ |