[thirdparty/binutils-gdb.git] / gas / config / tc-ip2k.c

/* tc-ip2k.c -- Assembler for the Scenix IP2xxx.
   Copyright (C) 2000-2019 Free Software Foundation, Inc.

   This file is part of GAS, the GNU Assembler.

   GAS is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3, or (at your option)
   any later version.

   GAS is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with GAS; see the file COPYING.  If not, write to
   the Free Software Foundation, 51 Franklin Street - Fifth Floor,
   Boston, MA 02110-1301, USA.  */

#include "as.h"
#include "subsegs.h"
#include "symcat.h"
#include "opcodes/ip2k-desc.h"
#include "opcodes/ip2k-opc.h"
#include "cgen.h"
#include "elf/common.h"
#include "elf/ip2k.h"

/* Structure to hold all of the different components describing
   an individual instruction.  */
typedef struct
{
  const CGEN_INSN *	insn;
  const CGEN_INSN *	orig_insn;
  CGEN_FIELDS		fields;
#if CGEN_INT_INSN_P
  CGEN_INSN_INT         buffer [1];
#define INSN_VALUE(buf) (*(buf))
#else
  unsigned char         buffer [CGEN_MAX_INSN_SIZE];
#define INSN_VALUE(buf) (buf)
#endif
  char *		addr;
  fragS *		frag;
  int                   num_fixups;
  fixS *                fixups [GAS_CGEN_MAX_FIXUPS];
  int                   indices [MAX_OPERAND_INSTANCES];
}
ip2k_insn;

const char comment_chars[]        = ";";
const char line_comment_chars[]   = "#";
const char line_separator_chars[] = "";
const char EXP_CHARS[]            = "eE";
const char FLT_CHARS[]            = "dD";

/* Flag to detect when switching to code section where insn alignment is
   implied.  */
static int force_code_align = 0;

/* Mach selected from command line.  */
static int ip2k_mach = 0;
static unsigned ip2k_mach_bitmask = 0;


static void
ip2k_elf_section_rtn (int i)
{
  obj_elf_section(i);

  if (force_code_align)
    {
      do_align (1, NULL, 0, 0);
      force_code_align = 0;
    }
}

static void
ip2k_elf_section_text (int i)
{
  obj_elf_text(i);

  do_align (1, NULL, 0, 0);
  force_code_align = 0;
}

/* The target specific pseudo-ops which we support.  */
const pseudo_typeS md_pseudo_table[] =
{
    { "text",   ip2k_elf_section_text,  0 },
    { "sect",   ip2k_elf_section_rtn,   0 },
    { NULL, 	NULL,			0 }
};

\f

enum options
{
  OPTION_CPU_IP2022 = OPTION_MD_BASE,
  OPTION_CPU_IP2022EXT
};

struct option md_longopts[] =
{
  { "mip2022",     no_argument, NULL, OPTION_CPU_IP2022 },
  { "mip2022ext",  no_argument, NULL, OPTION_CPU_IP2022EXT },
  { NULL,           no_argument, NULL, 0 },
};
size_t md_longopts_size = sizeof (md_longopts);

const char * md_shortopts = "";

int
md_parse_option (int c ATTRIBUTE_UNUSED, const char * arg ATTRIBUTE_UNUSED)
{
  switch (c)
    {
    case OPTION_CPU_IP2022:
      ip2k_mach = bfd_mach_ip2022;
      ip2k_mach_bitmask = 1 << MACH_IP2022;
      break;

    case OPTION_CPU_IP2022EXT:
      ip2k_mach = bfd_mach_ip2022ext;
      ip2k_mach_bitmask = 1 << MACH_IP2022EXT;
      break;

    default:
      return 0;
    }

  return 1;
}

void
md_show_usage (FILE * stream)
{
  fprintf (stream, _("IP2K specific command line options:\n"));
  fprintf (stream, _("  -mip2022               restrict to IP2022 insns \n"));
  fprintf (stream, _("  -mip2022ext            permit extended IP2022 insn\n"));
}

\f
void
md_begin (void)
{
  /* Initialize the `cgen' interface.  */

  /* Set the machine number and endian.  */
  gas_cgen_cpu_desc = ip2k_cgen_cpu_open (CGEN_CPU_OPEN_MACHS,
					  ip2k_mach_bitmask,
					  CGEN_CPU_OPEN_ENDIAN,
					  CGEN_ENDIAN_BIG,
					  CGEN_CPU_OPEN_END);
  ip2k_cgen_init_asm (gas_cgen_cpu_desc);

  /* This is a callback from cgen to gas to parse operands.  */
  cgen_set_parse_operand_fn (gas_cgen_cpu_desc, gas_cgen_parse_operand);

  /* Set the machine type.  */
  bfd_default_set_arch_mach (stdoutput, bfd_arch_ip2k, ip2k_mach);
}


void
md_assemble (char * str)
{
  ip2k_insn insn;
  char * errmsg;

  /* Initialize GAS's cgen interface for a new instruction.  */
  gas_cgen_init_parse ();

  insn.insn = ip2k_cgen_assemble_insn
      (gas_cgen_cpu_desc, str, & insn.fields, insn.buffer, & errmsg);

  if (!insn.insn)
    {
      as_bad ("%s", errmsg);
      return;
    }

  /* Check for special relocation required by SKIP instructions.  */
  if (CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_SKIPA))
    /* Unconditional skip has a 1-bit relocation of the current pc, so
       that we emit either sb pcl.0 or snb pcl.0 depending on whether
       the PCL (pc + 2) >> 1 is odd or even.  */
    {
      enum cgen_parse_operand_result result_type;
      bfd_vma value;
      const char *curpc_plus_2 = ".+2";
      const char *err;

      err = cgen_parse_address (gas_cgen_cpu_desc, & curpc_plus_2,
				IP2K_OPERAND_ADDR16CJP,
				BFD_RELOC_IP2K_PC_SKIP,
				& result_type, & value);
      if (err)
	{
	  as_bad ("%s", err);
	  return;
	}
    }

  /* Doesn't really matter what we pass for RELAX_P here.  */
  gas_cgen_finish_insn (insn.insn, insn.buffer,
			CGEN_FIELDS_BITSIZE (& insn.fields), 1, NULL);
}

valueT
md_section_align (segT segment, valueT size)
{
  int align = bfd_get_section_alignment (stdoutput, segment);

  return ((size + (1 << align) - 1) & -(1 << align));
}


symbolS *
md_undefined_symbol (char * name ATTRIBUTE_UNUSED)
{
    return 0;
}
\f
int
md_estimate_size_before_relax (fragS * fragP ATTRIBUTE_UNUSED,
			       segT    segment ATTRIBUTE_UNUSED)
{
  as_fatal (_("relaxation not supported\n"));
  return 1;
}


/* *fragP has been relaxed to its final size, and now needs to have
   the bytes inside it modified to conform to the new size.

   Called after relaxation is finished.
   fragP->fr_type == rs_machine_dependent.
   fragP->fr_subtype is the subtype of what the address relaxed to.  */

void
md_convert_frag (bfd   * abfd  ATTRIBUTE_UNUSED,
		 segT    sec   ATTRIBUTE_UNUSED,
		 fragS * fragP ATTRIBUTE_UNUSED)
{
}

\f
/* Functions concerning relocs.  */

long
md_pcrel_from (fixS *fixP ATTRIBUTE_UNUSED)
{
  abort ();
}


/* Return the bfd reloc type for OPERAND of INSN at fixup FIXP.
   Returns BFD_RELOC_NONE if no reloc type can be found.
   *FIXP may be modified if desired.  */

bfd_reloc_code_real_type
md_cgen_lookup_reloc (const CGEN_INSN *    insn     ATTRIBUTE_UNUSED,
		      const CGEN_OPERAND * operand,
		      fixS *               fixP     ATTRIBUTE_UNUSED)
{
  bfd_reloc_code_real_type result;

  result = BFD_RELOC_NONE;

  switch (operand->type)
    {
    case IP2K_OPERAND_FR:
    case IP2K_OPERAND_ADDR16L:
    case IP2K_OPERAND_ADDR16H:
    case IP2K_OPERAND_LIT8:
      /* These may have been processed at parse time.  */
      if (fixP->fx_cgen.opinfo != 0)
	result = fixP->fx_cgen.opinfo;
      fixP->fx_no_overflow = 1;
      break;

    case IP2K_OPERAND_ADDR16CJP:
      result = fixP->fx_cgen.opinfo;
      if (result == 0 || result == BFD_RELOC_NONE)
	result = BFD_RELOC_IP2K_ADDR16CJP;
      fixP->fx_no_overflow = 1;
      break;

    case IP2K_OPERAND_ADDR16P:
      result = BFD_RELOC_IP2K_PAGE3;
      fixP->fx_no_overflow = 1;
      break;

    default:
      result = BFD_RELOC_NONE;
      break;
    }

  return result;
}


/* Write a value out to the object file, using the appropriate endianness.  */

void
md_number_to_chars (char * buf, valueT val, int n)
{
  number_to_chars_bigendian (buf, val, n);
}

const char *
md_atof (int type, char * litP, int *  sizeP)
{
  return ieee_md_atof (type, litP, sizeP, TRUE);
}


/* See whether we need to force a relocation into the output file.
   Force most of them, since the linker's bfd relocation engine
   understands range limits better than gas' cgen fixup engine.
   Consider the case of a fixup intermediate value being larger than
   the instruction it will be eventually encoded within.  */

int
ip2k_force_relocation (fixS * fix)
{
  switch (fix->fx_r_type)
    {
    case BFD_RELOC_IP2K_FR9:
    case BFD_RELOC_IP2K_FR_OFFSET:
    case BFD_RELOC_IP2K_BANK:
    case BFD_RELOC_IP2K_ADDR16CJP:
    case BFD_RELOC_IP2K_PAGE3:
    case BFD_RELOC_IP2K_LO8DATA:
    case BFD_RELOC_IP2K_HI8DATA:
    case BFD_RELOC_IP2K_EX8DATA:
    case BFD_RELOC_IP2K_LO8INSN:
    case BFD_RELOC_IP2K_HI8INSN:
    case BFD_RELOC_IP2K_PC_SKIP:
    case BFD_RELOC_IP2K_TEXT:
      return 1;

    case BFD_RELOC_16:
      if (fix->fx_subsy && S_IS_DEFINED (fix->fx_subsy)
	  && fix->fx_addsy && S_IS_DEFINED (fix->fx_addsy)
	  && (S_GET_SEGMENT (fix->fx_addsy)->flags & SEC_CODE))
	{
	  fix->fx_r_type = BFD_RELOC_IP2K_TEXT;
	  return 0;
	}
      break;

    default:
      break;
    }

  return generic_force_reloc (fix);
}

void
ip2k_apply_fix (fixS *fixP, valueT *valueP, segT seg)
{
  if (fixP->fx_r_type == BFD_RELOC_IP2K_TEXT
      && ! fixP->fx_addsy
      && ! fixP->fx_subsy)
    {
      *valueP = ((int)(* valueP)) / 2;
      fixP->fx_r_type = BFD_RELOC_16;
    }
  else if (fixP->fx_r_type == BFD_RELOC_UNUSED + IP2K_OPERAND_FR)
    {
      /* Must be careful when we are fixing up an FR.  We could be
	 fixing up an offset to (SP) or (DP) in which case we don't
	 want to step on the top 2 bits of the FR operand.  The
	 gas_cgen_md_apply_fix doesn't know any better and overwrites
	 the entire operand.  We counter this by adding the bits
	 to the new value.  */
      char *where = fixP->fx_frag->fr_literal + fixP->fx_where;

      /* Canonical name, since used a lot.  */
      CGEN_CPU_DESC cd = gas_cgen_cpu_desc;
      CGEN_INSN_INT insn_value
	= cgen_get_insn_value (cd, (unsigned char *) where,
			       CGEN_INSN_BITSIZE (fixP->fx_cgen.insn));
      /* Preserve (DP) or (SP) specification.  */
      *valueP += (insn_value & 0x180);
    }

  gas_cgen_md_apply_fix (fixP, valueP, seg);
}

int
ip2k_elf_section_flags (flagword flags,
			bfd_vma attr ATTRIBUTE_UNUSED,
			int type ATTRIBUTE_UNUSED)
{
  /* This is used to detect when the section changes to an executable section.
     This function is called by the elf section processing.  When we note an
     executable section specifier we set an internal flag to denote when
     word alignment should be forced.  */
  if (flags & SEC_CODE)
    force_code_align = 1;

  return flags;
}
Commit	Line	Data
a40cbfa3	1	/* tc-ip2k.c -- Assembler for the Scenix IP2xxx.
82704155	2	Copyright (C) 2000-2019 Free Software Foundation, Inc.
a40cbfa3 NC	3
	4	This file is part of GAS, the GNU Assembler.
	5
	6	GAS is free software; you can redistribute it and/or modify
	7	it under the terms of the GNU General Public License as published by
ec2655a6	8	the Free Software Foundation; either version 3, or (at your option)
a40cbfa3 NC	9	any later version.
	10
	11	GAS is distributed in the hope that it will be useful,
	12	but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	GNU General Public License for more details.
	15
	16	You should have received a copy of the GNU General Public License
	17	along with GAS; see the file COPYING. If not, write to
4b4da160 NC	18	the Free Software Foundation, 51 Franklin Street - Fifth Floor,
4b4da160 NC	19	Boston, MA 02110-1301, USA. */
a40cbfa3	20
a40cbfa3	21	#include "as.h"
3739860c	22	#include "subsegs.h"
a40cbfa3 NC	23	#include "symcat.h"
	24	#include "opcodes/ip2k-desc.h"
	25	#include "opcodes/ip2k-opc.h"
	26	#include "cgen.h"
	27	#include "elf/common.h"
	28	#include "elf/ip2k.h"
a40cbfa3 NC	29
	30	/* Structure to hold all of the different components describing
	31	an individual instruction. */
	32	typedef struct
	33	{
	34	const CGEN_INSN * insn;
	35	const CGEN_INSN * orig_insn;
	36	CGEN_FIELDS fields;
	37	#if CGEN_INT_INSN_P
	38	CGEN_INSN_INT buffer [1];
	39	#define INSN_VALUE(buf) (*(buf))
	40	#else
	41	unsigned char buffer [CGEN_MAX_INSN_SIZE];
	42	#define INSN_VALUE(buf) (buf)
	43	#endif
	44	char * addr;
	45	fragS * frag;
	46	int num_fixups;
	47	fixS * fixups [GAS_CGEN_MAX_FIXUPS];
	48	int indices [MAX_OPERAND_INSTANCES];
	49	}
	50	ip2k_insn;
	51
	52	const char comment_chars[] = ";";
	53	const char line_comment_chars[] = "#";
3739860c	54	const char line_separator_chars[] = "";
a40cbfa3 NC	55	const char EXP_CHARS[] = "eE";
	56	const char FLT_CHARS[] = "dD";
	57
ea1562b3 NC	58	/* Flag to detect when switching to code section where insn alignment is
	59	implied. */
	60	static int force_code_align = 0;
	61
	62	/* Mach selected from command line. */
	63	static int ip2k_mach = 0;
	64	static unsigned ip2k_mach_bitmask = 0;
	65
	66
	67	static void
	68	ip2k_elf_section_rtn (int i)
	69	{
	70	obj_elf_section(i);
	71
	72	if (force_code_align)
	73	{
f86f5863	74	do_align (1, NULL, 0, 0);
ea1562b3	75	force_code_align = 0;
ea1562b3 NC	76	}
	77	}
	78
	79	static void
	80	ip2k_elf_section_text (int i)
	81	{
ea1562b3 NC	82	obj_elf_text(i);
ea1562b3 NC	83
f86f5863	84	do_align (1, NULL, 0, 0);
ea1562b3	85	force_code_align = 0;
ea1562b3	86	}
a40cbfa3 NC	87
	88	/* The target specific pseudo-ops which we support. */
	89	const pseudo_typeS md_pseudo_table[] =
	90	{
a40cbfa3 NC	91	{ "text", ip2k_elf_section_text, 0 },
	92	{ "sect", ip2k_elf_section_rtn, 0 },
	93	{ NULL, NULL, 0 }
	94	};
	95
	96	\f
	97
ea1562b3 NC	98	enum options
	99	{
	100	OPTION_CPU_IP2022 = OPTION_MD_BASE,
	101	OPTION_CPU_IP2022EXT
	102	};
a40cbfa3	103
3739860c	104	struct option md_longopts[] =
a40cbfa3 NC	105	{
	106	{ "mip2022", no_argument, NULL, OPTION_CPU_IP2022 },
	107	{ "mip2022ext", no_argument, NULL, OPTION_CPU_IP2022EXT },
	108	{ NULL, no_argument, NULL, 0 },
	109	};
	110	size_t md_longopts_size = sizeof (md_longopts);
	111
	112	const char * md_shortopts = "";
	113
a40cbfa3	114	int
17b9d67d	115	md_parse_option (int c ATTRIBUTE_UNUSED, const char * arg ATTRIBUTE_UNUSED)
a40cbfa3 NC	116	{
	117	switch (c)
	118	{
	119	case OPTION_CPU_IP2022:
	120	ip2k_mach = bfd_mach_ip2022;
	121	ip2k_mach_bitmask = 1 << MACH_IP2022;
	122	break;
	123
	124	case OPTION_CPU_IP2022EXT:
	125	ip2k_mach = bfd_mach_ip2022ext;
	126	ip2k_mach_bitmask = 1 << MACH_IP2022EXT;
	127	break;
	128
	129	default:
	130	return 0;
	131	}
	132
	133	return 1;
	134	}
	135
a40cbfa3	136	void
ea1562b3	137	md_show_usage (FILE * stream)
a40cbfa3 NC	138	{
	139	fprintf (stream, _("IP2K specific command line options:\n"));
	140	fprintf (stream, _(" -mip2022 restrict to IP2022 insns \n"));
	141	fprintf (stream, _(" -mip2022ext permit extended IP2022 insn\n"));
	142	}
	143
	144	\f
	145	void
ea1562b3	146	md_begin (void)
a40cbfa3 NC	147	{
a40cbfa3 NC	148	/* Initialize the `cgen' interface. */
3739860c	149
a40cbfa3 NC	150	/* Set the machine number and endian. */
	151	gas_cgen_cpu_desc = ip2k_cgen_cpu_open (CGEN_CPU_OPEN_MACHS,
	152	ip2k_mach_bitmask,
	153	CGEN_CPU_OPEN_ENDIAN,
	154	CGEN_ENDIAN_BIG,
	155	CGEN_CPU_OPEN_END);
	156	ip2k_cgen_init_asm (gas_cgen_cpu_desc);
	157
	158	/* This is a callback from cgen to gas to parse operands. */
	159	cgen_set_parse_operand_fn (gas_cgen_cpu_desc, gas_cgen_parse_operand);
	160
	161	/* Set the machine type. */
	162	bfd_default_set_arch_mach (stdoutput, bfd_arch_ip2k, ip2k_mach);
	163	}
	164
	165
	166	void
ea1562b3	167	md_assemble (char * str)
a40cbfa3 NC	168	{
	169	ip2k_insn insn;
	170	char * errmsg;
	171
	172	/* Initialize GAS's cgen interface for a new instruction. */
	173	gas_cgen_init_parse ();
	174
	175	insn.insn = ip2k_cgen_assemble_insn
	176	(gas_cgen_cpu_desc, str, & insn.fields, insn.buffer, & errmsg);
	177
	178	if (!insn.insn)
	179	{
	180	as_bad ("%s", errmsg);
	181	return;
	182	}
	183
	184	/* Check for special relocation required by SKIP instructions. */
	185	if (CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_SKIPA))
	186	/* Unconditional skip has a 1-bit relocation of the current pc, so
	187	that we emit either sb pcl.0 or snb pcl.0 depending on whether
	188	the PCL (pc + 2) >> 1 is odd or even. */
	189	{
	190	enum cgen_parse_operand_result result_type;
2132e3a3	191	bfd_vma value;
a40cbfa3	192	const char *curpc_plus_2 = ".+2";
64384dfd	193	const char *err;
a40cbfa3	194
64384dfd AM	195	err = cgen_parse_address (gas_cgen_cpu_desc, & curpc_plus_2,
	196	IP2K_OPERAND_ADDR16CJP,
	197	BFD_RELOC_IP2K_PC_SKIP,
	198	& result_type, & value);
	199	if (err)
a40cbfa3	200	{
64384dfd	201	as_bad ("%s", err);
a40cbfa3 NC	202	return;
	203	}
	204	}
	205
	206	/* Doesn't really matter what we pass for RELAX_P here. */
	207	gas_cgen_finish_insn (insn.insn, insn.buffer,
	208	CGEN_FIELDS_BITSIZE (& insn.fields), 1, NULL);
	209	}
	210
	211	valueT
ea1562b3	212	md_section_align (segT segment, valueT size)
a40cbfa3 NC	213	{
	214	int align = bfd_get_section_alignment (stdoutput, segment);
	215
8d3842cd	216	return ((size + (1 << align) - 1) & -(1 << align));
a40cbfa3 NC	217	}
	218
	219
	220	symbolS *
ea1562b3	221	md_undefined_symbol (char * name ATTRIBUTE_UNUSED)
a40cbfa3 NC	222	{
	223	return 0;
	224	}
	225	\f
	226	int
ea1562b3 NC	227	md_estimate_size_before_relax (fragS * fragP ATTRIBUTE_UNUSED,
ea1562b3 NC	228	segT segment ATTRIBUTE_UNUSED)
a40cbfa3	229	{
b2f58c0c	230	as_fatal (_("relaxation not supported\n"));
a40cbfa3	231	return 1;
3739860c	232	}
a40cbfa3 NC	233
	234
	235	/* *fragP has been relaxed to its final size, and now needs to have
	236	the bytes inside it modified to conform to the new size.
	237
	238	Called after relaxation is finished.
	239	fragP->fr_type == rs_machine_dependent.
	240	fragP->fr_subtype is the subtype of what the address relaxed to. */
	241
	242	void
ea1562b3 NC	243	md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
	244	segT sec ATTRIBUTE_UNUSED,
	245	fragS * fragP ATTRIBUTE_UNUSED)
a40cbfa3 NC	246	{
	247	}
	248
	249	\f
	250	/* Functions concerning relocs. */
	251
	252	long
b2f58c0c	253	md_pcrel_from (fixS *fixP ATTRIBUTE_UNUSED)
a40cbfa3	254	{
b2f58c0c	255	abort ();
a40cbfa3 NC	256	}
	257
	258
	259	/* Return the bfd reloc type for OPERAND of INSN at fixup FIXP.
	260	Returns BFD_RELOC_NONE if no reloc type can be found.
	261	FIXP may be modified if desired. /
	262
	263	bfd_reloc_code_real_type
ea1562b3 NC	264	md_cgen_lookup_reloc (const CGEN_INSN * insn ATTRIBUTE_UNUSED,
	265	const CGEN_OPERAND * operand,
	266	fixS * fixP ATTRIBUTE_UNUSED)
a40cbfa3 NC	267	{
	268	bfd_reloc_code_real_type result;
	269
	270	result = BFD_RELOC_NONE;
	271
	272	switch (operand->type)
	273	{
	274	case IP2K_OPERAND_FR:
	275	case IP2K_OPERAND_ADDR16L:
	276	case IP2K_OPERAND_ADDR16H:
	277	case IP2K_OPERAND_LIT8:
	278	/* These may have been processed at parse time. */
	279	if (fixP->fx_cgen.opinfo != 0)
	280	result = fixP->fx_cgen.opinfo;
	281	fixP->fx_no_overflow = 1;
	282	break;
	283
	284	case IP2K_OPERAND_ADDR16CJP:
	285	result = fixP->fx_cgen.opinfo;
	286	if (result == 0 \|\| result == BFD_RELOC_NONE)
	287	result = BFD_RELOC_IP2K_ADDR16CJP;
	288	fixP->fx_no_overflow = 1;
	289	break;
	290
	291	case IP2K_OPERAND_ADDR16P:
	292	result = BFD_RELOC_IP2K_PAGE3;
	293	fixP->fx_no_overflow = 1;
	294	break;
	295
	296	default:
	297	result = BFD_RELOC_NONE;
	298	break;
	299	}
	300
	301	return result;
	302	}
	303
	304
	305	/* Write a value out to the object file, using the appropriate endianness. */
	306
	307	void
ea1562b3	308	md_number_to_chars (char * buf, valueT val, int n)
a40cbfa3 NC	309	{
	310	number_to_chars_bigendian (buf, val, n);
	311	}
	312
6d4af3c2	313	const char *
ea1562b3	314	md_atof (int type, char * litP, int * sizeP)
a40cbfa3	315	{
499ac353	316	return ieee_md_atof (type, litP, sizeP, TRUE);
a40cbfa3 NC	317	}
	318
	319
	320	/* See whether we need to force a relocation into the output file.
	321	Force most of them, since the linker's bfd relocation engine
	322	understands range limits better than gas' cgen fixup engine.
	323	Consider the case of a fixup intermediate value being larger than
	324	the instruction it will be eventually encoded within. */
	325
	326	int
ea1562b3	327	ip2k_force_relocation (fixS * fix)
a40cbfa3 NC	328	{
	329	switch (fix->fx_r_type)
	330	{
a40cbfa3 NC	331	case BFD_RELOC_IP2K_FR9:
	332	case BFD_RELOC_IP2K_FR_OFFSET:
	333	case BFD_RELOC_IP2K_BANK:
	334	case BFD_RELOC_IP2K_ADDR16CJP:
	335	case BFD_RELOC_IP2K_PAGE3:
	336	case BFD_RELOC_IP2K_LO8DATA:
	337	case BFD_RELOC_IP2K_HI8DATA:
	338	case BFD_RELOC_IP2K_EX8DATA:
	339	case BFD_RELOC_IP2K_LO8INSN:
	340	case BFD_RELOC_IP2K_HI8INSN:
	341	case BFD_RELOC_IP2K_PC_SKIP:
	342	case BFD_RELOC_IP2K_TEXT:
	343	return 1;
	344
	345	case BFD_RELOC_16:
a161fe53	346	if (fix->fx_subsy && S_IS_DEFINED (fix->fx_subsy)
a40cbfa3 NC	347	&& fix->fx_addsy && S_IS_DEFINED (fix->fx_addsy)
	348	&& (S_GET_SEGMENT (fix->fx_addsy)->flags & SEC_CODE))
	349	{
	350	fix->fx_r_type = BFD_RELOC_IP2K_TEXT;
	351	return 0;
	352	}
a161fe53	353	break;
a40cbfa3 NC	354
a40cbfa3 NC	355	default:
a161fe53	356	break;
a40cbfa3	357	}
a161fe53	358
ae6063d4	359	return generic_force_reloc (fix);
a40cbfa3 NC	360	}
	361
	362	void
55cf6793	363	ip2k_apply_fix (fixS fixP, valueT valueP, segT seg)
a40cbfa3 NC	364	{
	365	if (fixP->fx_r_type == BFD_RELOC_IP2K_TEXT
	366	&& ! fixP->fx_addsy
	367	&& ! fixP->fx_subsy)
	368	{
ea1562b3	369	valueP = ((int)( valueP)) / 2;
a40cbfa3 NC	370	fixP->fx_r_type = BFD_RELOC_16;
	371	}
	372	else if (fixP->fx_r_type == BFD_RELOC_UNUSED + IP2K_OPERAND_FR)
	373	{
	374	/* Must be careful when we are fixing up an FR. We could be
	375	fixing up an offset to (SP) or (DP) in which case we don't
	376	want to step on the top 2 bits of the FR operand. The
55cf6793	377	gas_cgen_md_apply_fix doesn't know any better and overwrites
a40cbfa3 NC	378	the entire operand. We counter this by adding the bits
	379	to the new value. */
	380	char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
	381
	382	/* Canonical name, since used a lot. */
	383	CGEN_CPU_DESC cd = gas_cgen_cpu_desc;
	384	CGEN_INSN_INT insn_value
2132e3a3	385	= cgen_get_insn_value (cd, (unsigned char *) where,
a40cbfa3 NC	386	CGEN_INSN_BITSIZE (fixP->fx_cgen.insn));
	387	/* Preserve (DP) or (SP) specification. */
	388	*valueP += (insn_value & 0x180);
	389	}
	390
55cf6793	391	gas_cgen_md_apply_fix (fixP, valueP, seg);
a40cbfa3 NC	392	}
	393
	394	int
01e1a5bc NC	395	ip2k_elf_section_flags (flagword flags,
01e1a5bc NC	396	bfd_vma attr ATTRIBUTE_UNUSED,
ea1562b3	397	int type ATTRIBUTE_UNUSED)
a40cbfa3 NC	398	{
	399	/* This is used to detect when the section changes to an executable section.
	400	This function is called by the elf section processing. When we note an
	401	executable section specifier we set an internal flag to denote when
	402	word alignment should be forced. */
	403	if (flags & SEC_CODE)
	404	force_code_align = 1;
3739860c	405
a40cbfa3 NC	406	return flags;
	407	}
	408