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From Craig Silverstein: support local GOT relocs for i386.
[thirdparty/binutils-gdb.git] / gas / config / tc-ppc.c
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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
b84bf58a 3 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
ec2655a6 10 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 52#endif
53#endif
54
0baf16f2
AM		 55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
98027b10
AM		 87static void ppc_macro (char *, const struct powerpc_macro *);
88static void ppc_byte (int);
0baf16f2
AM		 89
90#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 91static void ppc_tc (int);
92static void ppc_machine (int);
0baf16f2 93#endif
252b5132
RH		 94
95#ifdef OBJ_XCOFF
98027b10
AM		 96static void ppc_comm (int);
97static void ppc_bb (int);
98static void ppc_bc (int);
99static void ppc_bf (int);
100static void ppc_biei (int);
101static void ppc_bs (int);
102static void ppc_eb (int);
103static void ppc_ec (int);
104static void ppc_ef (int);
105static void ppc_es (int);
106static void ppc_csect (int);
107static void ppc_change_csect (symbolS *, offsetT);
108static void ppc_function (int);
109static void ppc_extern (int);
110static void ppc_lglobl (int);
111static void ppc_section (int);
112static void ppc_named_section (int);
113static void ppc_stabx (int);
114static void ppc_rename (int);
115static void ppc_toc (int);
116static void ppc_xcoff_cons (int);
117static void ppc_vbyte (int);
252b5132
RH		 118#endif
119
120#ifdef OBJ_ELF
98027b10
AM		 121static void ppc_elf_cons (int);
122static void ppc_elf_rdata (int);
123static void ppc_elf_lcomm (int);
252b5132
RH		 124#endif
125
126#ifdef TE_PE
98027b10
AM		 127static void ppc_previous (int);
128static void ppc_pdata (int);
129static void ppc_ydata (int);
130static void ppc_reldata (int);
131static void ppc_rdata (int);
132static void ppc_ualong (int);
133static void ppc_znop (int);
134static void ppc_pe_comm (int);
135static void ppc_pe_section (int);
136static void ppc_pe_function (int);
137static void ppc_pe_tocd (int);
252b5132
RH		 138#endif
139\f
140/* Generic assembler global variables which must be defined by all
141 targets. */
142
143#ifdef OBJ_ELF
144/* This string holds the chars that always start a comment. If the
145 pre-processor is disabled, these aren't very useful. The macro
146 tc_comment_chars points to this. We use this, rather than the
147 usual comment_chars, so that we can switch for Solaris conventions. */
148static const char ppc_solaris_comment_chars[] = "#!";
149static const char ppc_eabi_comment_chars[] = "#";
150
151#ifdef TARGET_SOLARIS_COMMENT
152const char *ppc_comment_chars = ppc_solaris_comment_chars;
153#else
154const char *ppc_comment_chars = ppc_eabi_comment_chars;
155#endif
156#else
157const char comment_chars[] = "#";
158#endif
159
160/* Characters which start a comment at the beginning of a line. */
161const char line_comment_chars[] = "#";
162
163/* Characters which may be used to separate multiple commands on a
164 single line. */
165const char line_separator_chars[] = ";";
166
167/* Characters which are used to indicate an exponent in a floating
168 point number. */
169const char EXP_CHARS[] = "eE";
170
171/* Characters which mean that a number is a floating point constant,
172 as in 0d1.0. */
173const char FLT_CHARS[] = "dD";
5ce8663f 174
5e02f92e 175/* Anything that can start an operand needs to be mentioned here,
ac805826 176 to stop the input scrubber eating whitespace. */
5e02f92e 177const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 178
179/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
180int ppc_cie_data_alignment;
252b5132
RH		 181\f
182/* The target specific pseudo-ops which we support. */
183
184const pseudo_typeS md_pseudo_table[] =
185{
186 /* Pseudo-ops which must be overridden. */
187 { "byte", ppc_byte, 0 },
188
189#ifdef OBJ_XCOFF
190 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
191 legitimately belong in the obj-*.c file. However, XCOFF is based
192 on COFF, and is only implemented for the RS/6000. We just use
193 obj-coff.c, and add what we need here. */
194 { "comm", ppc_comm, 0 },
195 { "lcomm", ppc_comm, 1 },
196 { "bb", ppc_bb, 0 },
197 { "bc", ppc_bc, 0 },
198 { "bf", ppc_bf, 0 },
199 { "bi", ppc_biei, 0 },
200 { "bs", ppc_bs, 0 },
201 { "csect", ppc_csect, 0 },
202 { "data", ppc_section, 'd' },
203 { "eb", ppc_eb, 0 },
204 { "ec", ppc_ec, 0 },
205 { "ef", ppc_ef, 0 },
206 { "ei", ppc_biei, 1 },
207 { "es", ppc_es, 0 },
208 { "extern", ppc_extern, 0 },
209 { "function", ppc_function, 0 },
210 { "lglobl", ppc_lglobl, 0 },
211 { "rename", ppc_rename, 0 },
212 { "section", ppc_named_section, 0 },
213 { "stabx", ppc_stabx, 0 },
214 { "text", ppc_section, 't' },
215 { "toc", ppc_toc, 0 },
216 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 217 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 218 { "word", ppc_xcoff_cons, 1 },
219 { "short", ppc_xcoff_cons, 1 },
220 { "vbyte", ppc_vbyte, 0 },
221#endif
222
223#ifdef OBJ_ELF
0baf16f2
AM		 224 { "llong", ppc_elf_cons, 8 },
225 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 226 { "long", ppc_elf_cons, 4 },
227 { "word", ppc_elf_cons, 2 },
228 { "short", ppc_elf_cons, 2 },
229 { "rdata", ppc_elf_rdata, 0 },
230 { "rodata", ppc_elf_rdata, 0 },
231 { "lcomm", ppc_elf_lcomm, 0 },
232#endif
233
234#ifdef TE_PE
99a814a1 235 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 236 { "previous", ppc_previous, 0 },
237 { "pdata", ppc_pdata, 0 },
238 { "ydata", ppc_ydata, 0 },
239 { "reldata", ppc_reldata, 0 },
240 { "rdata", ppc_rdata, 0 },
241 { "ualong", ppc_ualong, 0 },
242 { "znop", ppc_znop, 0 },
243 { "comm", ppc_pe_comm, 0 },
244 { "lcomm", ppc_pe_comm, 1 },
245 { "section", ppc_pe_section, 0 },
246 { "function", ppc_pe_function,0 },
247 { "tocd", ppc_pe_tocd, 0 },
248#endif
249
0baf16f2 250#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 251 { "tc", ppc_tc, 0 },
0baf16f2
AM		 252 { "machine", ppc_machine, 0 },
253#endif
252b5132
RH		 254
255 { NULL, NULL, 0 }
256};
257
258\f
99a814a1
AM		 259/* Predefined register names if -mregnames (or default for Windows NT).
260 In general, there are lots of them, in an attempt to be compatible
261 with a number of other Windows NT assemblers. */
252b5132
RH		 262
263/* Structure to hold information about predefined registers. */
264struct pd_reg
265 {
266 char *name;
267 int value;
268 };
269
270/* List of registers that are pre-defined:
271
272 Each general register has predefined names of the form:
273 1. r<reg_num> which has the value <reg_num>.
274 2. r.<reg_num> which has the value <reg_num>.
275
252b5132
RH		 276 Each floating point register has predefined names of the form:
277 1. f<reg_num> which has the value <reg_num>.
278 2. f.<reg_num> which has the value <reg_num>.
279
7a899fff
C		 280 Each vector unit register has predefined names of the form:
281 1. v<reg_num> which has the value <reg_num>.
282 2. v.<reg_num> which has the value <reg_num>.
283
252b5132
RH		 284 Each condition register has predefined names of the form:
285 1. cr<reg_num> which has the value <reg_num>.
286 2. cr.<reg_num> which has the value <reg_num>.
287
288 There are individual registers as well:
289 sp or r.sp has the value 1
290 rtoc or r.toc has the value 2
291 fpscr has the value 0
292 xer has the value 1
293 lr has the value 8
294 ctr has the value 9
295 pmr has the value 0
296 dar has the value 19
297 dsisr has the value 18
298 dec has the value 22
299 sdr1 has the value 25
300 srr0 has the value 26
301 srr1 has the value 27
302
81d4177b 303 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 304
305static const struct pd_reg pre_defined_registers[] =
306{
307 { "cr.0", 0 }, /* Condition Registers */
308 { "cr.1", 1 },
309 { "cr.2", 2 },
310 { "cr.3", 3 },
311 { "cr.4", 4 },
312 { "cr.5", 5 },
313 { "cr.6", 6 },
314 { "cr.7", 7 },
315
316 { "cr0", 0 },
317 { "cr1", 1 },
318 { "cr2", 2 },
319 { "cr3", 3 },
320 { "cr4", 4 },
321 { "cr5", 5 },
322 { "cr6", 6 },
323 { "cr7", 7 },
324
325 { "ctr", 9 },
326
327 { "dar", 19 }, /* Data Access Register */
328 { "dec", 22 }, /* Decrementer */
329 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
330
331 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 332 { "f.1", 1 },
333 { "f.10", 10 },
334 { "f.11", 11 },
335 { "f.12", 12 },
336 { "f.13", 13 },
337 { "f.14", 14 },
338 { "f.15", 15 },
339 { "f.16", 16 },
340 { "f.17", 17 },
341 { "f.18", 18 },
342 { "f.19", 19 },
343 { "f.2", 2 },
344 { "f.20", 20 },
345 { "f.21", 21 },
346 { "f.22", 22 },
347 { "f.23", 23 },
348 { "f.24", 24 },
349 { "f.25", 25 },
350 { "f.26", 26 },
351 { "f.27", 27 },
352 { "f.28", 28 },
353 { "f.29", 29 },
354 { "f.3", 3 },
252b5132
RH		 355 { "f.30", 30 },
356 { "f.31", 31 },
81d4177b
KH		 357 { "f.4", 4 },
358 { "f.5", 5 },
359 { "f.6", 6 },
360 { "f.7", 7 },
361 { "f.8", 8 },
362 { "f.9", 9 },
363
364 { "f0", 0 },
365 { "f1", 1 },
366 { "f10", 10 },
367 { "f11", 11 },
368 { "f12", 12 },
369 { "f13", 13 },
370 { "f14", 14 },
371 { "f15", 15 },
372 { "f16", 16 },
373 { "f17", 17 },
374 { "f18", 18 },
375 { "f19", 19 },
376 { "f2", 2 },
377 { "f20", 20 },
378 { "f21", 21 },
379 { "f22", 22 },
380 { "f23", 23 },
381 { "f24", 24 },
382 { "f25", 25 },
383 { "f26", 26 },
384 { "f27", 27 },
385 { "f28", 28 },
386 { "f29", 29 },
387 { "f3", 3 },
252b5132
RH		 388 { "f30", 30 },
389 { "f31", 31 },
81d4177b
KH		 390 { "f4", 4 },
391 { "f5", 5 },
392 { "f6", 6 },
393 { "f7", 7 },
394 { "f8", 8 },
395 { "f9", 9 },
252b5132
RH		 396
397 { "fpscr", 0 },
398
c3d65c1c
BE		 399 /* Quantization registers used with pair single instructions. */
400 { "gqr.0", 0 },
401 { "gqr.1", 1 },
402 { "gqr.2", 2 },
403 { "gqr.3", 3 },
404 { "gqr.4", 4 },
405 { "gqr.5", 5 },
406 { "gqr.6", 6 },
407 { "gqr.7", 7 },
408 { "gqr0", 0 },
409 { "gqr1", 1 },
410 { "gqr2", 2 },
411 { "gqr3", 3 },
412 { "gqr4", 4 },
413 { "gqr5", 5 },
414 { "gqr6", 6 },
415 { "gqr7", 7 },
416
252b5132
RH		 417 { "lr", 8 }, /* Link Register */
418
419 { "pmr", 0 },
420
421 { "r.0", 0 }, /* General Purpose Registers */
422 { "r.1", 1 },
423 { "r.10", 10 },
424 { "r.11", 11 },
425 { "r.12", 12 },
426 { "r.13", 13 },
427 { "r.14", 14 },
428 { "r.15", 15 },
429 { "r.16", 16 },
430 { "r.17", 17 },
431 { "r.18", 18 },
432 { "r.19", 19 },
433 { "r.2", 2 },
434 { "r.20", 20 },
435 { "r.21", 21 },
436 { "r.22", 22 },
437 { "r.23", 23 },
438 { "r.24", 24 },
439 { "r.25", 25 },
440 { "r.26", 26 },
441 { "r.27", 27 },
442 { "r.28", 28 },
443 { "r.29", 29 },
444 { "r.3", 3 },
445 { "r.30", 30 },
446 { "r.31", 31 },
447 { "r.4", 4 },
448 { "r.5", 5 },
449 { "r.6", 6 },
450 { "r.7", 7 },
451 { "r.8", 8 },
452 { "r.9", 9 },
453
454 { "r.sp", 1 }, /* Stack Pointer */
455
456 { "r.toc", 2 }, /* Pointer to the table of contents */
457
458 { "r0", 0 }, /* More general purpose registers */
459 { "r1", 1 },
460 { "r10", 10 },
461 { "r11", 11 },
462 { "r12", 12 },
463 { "r13", 13 },
464 { "r14", 14 },
465 { "r15", 15 },
466 { "r16", 16 },
467 { "r17", 17 },
468 { "r18", 18 },
469 { "r19", 19 },
470 { "r2", 2 },
471 { "r20", 20 },
472 { "r21", 21 },
473 { "r22", 22 },
474 { "r23", 23 },
475 { "r24", 24 },
476 { "r25", 25 },
477 { "r26", 26 },
478 { "r27", 27 },
479 { "r28", 28 },
480 { "r29", 29 },
481 { "r3", 3 },
482 { "r30", 30 },
483 { "r31", 31 },
484 { "r4", 4 },
485 { "r5", 5 },
486 { "r6", 6 },
487 { "r7", 7 },
488 { "r8", 8 },
489 { "r9", 9 },
490
491 { "rtoc", 2 }, /* Table of contents */
492
493 { "sdr1", 25 }, /* Storage Description Register 1 */
494
495 { "sp", 1 },
496
497 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
498 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 499
7a899fff 500 { "v.0", 0 }, /* Vector registers */
81d4177b
KH		 501 { "v.1", 1 },
502 { "v.10", 10 },
503 { "v.11", 11 },
504 { "v.12", 12 },
505 { "v.13", 13 },
506 { "v.14", 14 },
507 { "v.15", 15 },
508 { "v.16", 16 },
509 { "v.17", 17 },
510 { "v.18", 18 },
511 { "v.19", 19 },
512 { "v.2", 2 },
513 { "v.20", 20 },
514 { "v.21", 21 },
515 { "v.22", 22 },
516 { "v.23", 23 },
517 { "v.24", 24 },
518 { "v.25", 25 },
519 { "v.26", 26 },
520 { "v.27", 27 },
521 { "v.28", 28 },
522 { "v.29", 29 },
523 { "v.3", 3 },
7a899fff
C		 524 { "v.30", 30 },
525 { "v.31", 31 },
81d4177b
KH		 526 { "v.4", 4 },
527 { "v.5", 5 },
528 { "v.6", 6 },
529 { "v.7", 7 },
530 { "v.8", 8 },
531 { "v.9", 9 },
7a899fff
C		 532
533 { "v0", 0 },
81d4177b
KH		 534 { "v1", 1 },
535 { "v10", 10 },
536 { "v11", 11 },
537 { "v12", 12 },
538 { "v13", 13 },
539 { "v14", 14 },
540 { "v15", 15 },
541 { "v16", 16 },
542 { "v17", 17 },
543 { "v18", 18 },
544 { "v19", 19 },
545 { "v2", 2 },
546 { "v20", 20 },
547 { "v21", 21 },
548 { "v22", 22 },
549 { "v23", 23 },
550 { "v24", 24 },
551 { "v25", 25 },
552 { "v26", 26 },
553 { "v27", 27 },
554 { "v28", 28 },
555 { "v29", 29 },
556 { "v3", 3 },
7a899fff
C		 557 { "v30", 30 },
558 { "v31", 31 },
81d4177b
KH		 559 { "v4", 4 },
560 { "v5", 5 },
561 { "v6", 6 },
562 { "v7", 7 },
563 { "v8", 8 },
7a899fff 564 { "v9", 9 },
252b5132
RH		 565
566 { "xer", 1 },
567
568};
569
bc805888 570#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 571
572/* Given NAME, find the register number associated with that name, return
573 the integer value associated with the given name or -1 on failure. */
574
252b5132 575static int
98027b10 576reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 577{
578 int middle, low, high;
579 int cmp;
580
581 low = 0;
582 high = regcount - 1;
583
584 do
585 {
586 middle = (low + high) / 2;
587 cmp = strcasecmp (name, regs[middle].name);
588 if (cmp < 0)
589 high = middle - 1;
590 else if (cmp > 0)
591 low = middle + 1;
592 else
593 return regs[middle].value;
594 }
595 while (low <= high);
596
597 return -1;
598}
599
600/*
99a814a1 601 * Summary of register_name.
252b5132
RH		 602 *
603 * in: Input_line_pointer points to 1st char of operand.
604 *
605 * out: A expressionS.
606 * The operand may have been a register: in this case, X_op == O_register,
607 * X_add_number is set to the register number, and truth is returned.
608 * Input_line_pointer->(next non-blank) char after operand, or is in its
609 * original state.
610 */
611
b34976b6 612static bfd_boolean
98027b10 613register_name (expressionS *expressionP)
252b5132
RH		 614{
615 int reg_number;
616 char *name;
617 char *start;
618 char c;
619
99a814a1 620 /* Find the spelling of the operand. */
252b5132 621 start = name = input_line_pointer;
3882b010 622 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 623 name = ++input_line_pointer;
624
3882b010 625 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 626 return FALSE;
252b5132
RH		 627
628 c = get_symbol_end ();
629 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
630
468cced8
AM		 631 /* Put back the delimiting char. */
632 *input_line_pointer = c;
633
99a814a1 634 /* Look to see if it's in the register table. */
81d4177b 635 if (reg_number >= 0)
252b5132
RH		 636 {
637 expressionP->X_op = O_register;
638 expressionP->X_add_number = reg_number;
81d4177b 639
99a814a1 640 /* Make the rest nice. */
252b5132
RH		 641 expressionP->X_add_symbol = NULL;
642 expressionP->X_op_symbol = NULL;
b34976b6 643 return TRUE;
252b5132 644 }
468cced8
AM		 645
646 /* Reset the line as if we had not done anything. */
647 input_line_pointer = start;
b34976b6 648 return FALSE;
252b5132
RH		 649}
650\f
651/* This function is called for each symbol seen in an expression. It
652 handles the special parsing which PowerPC assemblers are supposed
653 to use for condition codes. */
654
655/* Whether to do the special parsing. */
b34976b6 656static bfd_boolean cr_operand;
252b5132
RH		 657
658/* Names to recognize in a condition code. This table is sorted. */
659static const struct pd_reg cr_names[] =
660{
661 { "cr0", 0 },
662 { "cr1", 1 },
663 { "cr2", 2 },
664 { "cr3", 3 },
665 { "cr4", 4 },
666 { "cr5", 5 },
667 { "cr6", 6 },
668 { "cr7", 7 },
669 { "eq", 2 },
670 { "gt", 1 },
671 { "lt", 0 },
672 { "so", 3 },
673 { "un", 3 }
674};
675
676/* Parsing function. This returns non-zero if it recognized an
677 expression. */
678
679int
98027b10 680ppc_parse_name (const char *name, expressionS *expr)
252b5132
RH		 681{
682 int val;
683
684 if (! cr_operand)
685 return 0;
686
687 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
688 name);
689 if (val < 0)
690 return 0;
691
692 expr->X_op = O_constant;
693 expr->X_add_number = val;
694
695 return 1;
696}
697\f
698/* Local variables. */
699
700/* The type of processor we are assembling for. This is one or more
701 of the PPC_OPCODE flags defined in opcode/ppc.h. */
2b3c4602 702static unsigned long ppc_cpu = 0;
252b5132 703
2b3c4602
AM		 704/* Whether to target xcoff64/elf64. */
705static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 706
252b5132
RH		 707/* Opcode hash table. */
708static struct hash_control *ppc_hash;
709
710/* Macro hash table. */
711static struct hash_control *ppc_macro_hash;
712
713#ifdef OBJ_ELF
99a814a1 714/* What type of shared library support to use. */
5d6f4f16 715static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 716
99a814a1 717/* Flags to set in the elf header. */
252b5132
RH		 718static flagword ppc_flags = 0;
719
720/* Whether this is Solaris or not. */
721#ifdef TARGET_SOLARIS_COMMENT
b34976b6 722#define SOLARIS_P TRUE
252b5132 723#else
b34976b6 724#define SOLARIS_P FALSE
252b5132
RH		 725#endif
726
b34976b6 727static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 728#endif
729
730#ifdef OBJ_XCOFF
731
732/* The RS/6000 assembler uses the .csect pseudo-op to generate code
733 using a bunch of different sections. These assembler sections,
734 however, are all encompassed within the .text or .data sections of
735 the final output file. We handle this by using different
736 subsegments within these main segments. */
737
738/* Next subsegment to allocate within the .text segment. */
739static subsegT ppc_text_subsegment = 2;
740
741/* Linked list of csects in the text section. */
742static symbolS *ppc_text_csects;
743
744/* Next subsegment to allocate within the .data segment. */
745static subsegT ppc_data_subsegment = 2;
746
747/* Linked list of csects in the data section. */
748static symbolS *ppc_data_csects;
749
750/* The current csect. */
751static symbolS *ppc_current_csect;
752
753/* The RS/6000 assembler uses a TOC which holds addresses of functions
754 and variables. Symbols are put in the TOC with the .tc pseudo-op.
755 A special relocation is used when accessing TOC entries. We handle
756 the TOC as a subsegment within the .data segment. We set it up if
757 we see a .toc pseudo-op, and save the csect symbol here. */
758static symbolS *ppc_toc_csect;
759
760/* The first frag in the TOC subsegment. */
761static fragS *ppc_toc_frag;
762
763/* The first frag in the first subsegment after the TOC in the .data
764 segment. NULL if there are no subsegments after the TOC. */
765static fragS *ppc_after_toc_frag;
766
767/* The current static block. */
768static symbolS *ppc_current_block;
769
770/* The COFF debugging section; set by md_begin. This is not the
771 .debug section, but is instead the secret BFD section which will
772 cause BFD to set the section number of a symbol to N_DEBUG. */
773static asection *ppc_coff_debug_section;
774
775#endif /* OBJ_XCOFF */
776
777#ifdef TE_PE
778
779/* Various sections that we need for PE coff support. */
780static segT ydata_section;
781static segT pdata_section;
782static segT reldata_section;
783static segT rdata_section;
784static segT tocdata_section;
785
81d4177b 786/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 787static segT ppc_previous_section;
788static segT ppc_current_section;
789
790#endif /* TE_PE */
791
792#ifdef OBJ_ELF
793symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 794#define PPC_APUINFO_ISEL 0x40
795#define PPC_APUINFO_PMR 0x41
796#define PPC_APUINFO_RFMCI 0x42
797#define PPC_APUINFO_CACHELCK 0x43
798#define PPC_APUINFO_SPE 0x100
799#define PPC_APUINFO_EFS 0x101
800#define PPC_APUINFO_BRLOCK 0x102
801
b34976b6
AM		 802/*
803 * We keep a list of APUinfo
6a0c61b7
EZ		 804 */
805unsigned long *ppc_apuinfo_list;
806unsigned int ppc_apuinfo_num;
807unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 808#endif /* OBJ_ELF */
809\f
810#ifdef OBJ_ELF
15c1449b 811const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 812#else
15c1449b 813const char *const md_shortopts = "um:";
252b5132 814#endif
15c1449b 815const struct option md_longopts[] = {
252b5132
RH		 816 {NULL, no_argument, NULL, 0}
817};
15c1449b 818const size_t md_longopts_size = sizeof (md_longopts);
252b5132 819
69c040df
AM		 820
821/* Handle -m options that set cpu type, and .machine arg. */
822
823static int
824parse_cpu (const char *arg)
825{
826 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
827 (RIOS2). */
828 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
829 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
830 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
831 else if (strcmp (arg, "pwr") == 0)
832 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
833 /* -m601 means to assemble for the PowerPC 601, which includes
834 instructions that are holdovers from the Power. */
835 else if (strcmp (arg, "601") == 0)
836 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
837 | PPC_OPCODE_601 | PPC_OPCODE_32);
838 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
839 PowerPC 603/604. */
840 else if (strcmp (arg, "ppc") == 0
841 || strcmp (arg, "ppc32") == 0
842 || strcmp (arg, "603") == 0
843 || strcmp (arg, "604") == 0)
844 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
c3d65c1c
BE		 845 /* Do all PPC750s have paired single ops? */
846 else if (strcmp (arg, "750cl") == 0)
847 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_PPCPS;
69c040df
AM		 848 /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
849 else if (strcmp (arg, "403") == 0
850 || strcmp (arg, "405") == 0)
851 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
852 | PPC_OPCODE_403 | PPC_OPCODE_32);
853 else if (strcmp (arg, "440") == 0)
854 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
855 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
856 else if (strcmp (arg, "7400") == 0
857 || strcmp (arg, "7410") == 0
858 || strcmp (arg, "7450") == 0
859 || strcmp (arg, "7455") == 0)
860 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
861 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
36ae0db3
DJ		 862 else if (strcmp (arg, "e300") == 0)
863 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32
864 | PPC_OPCODE_E300);
69c040df
AM		 865 else if (strcmp (arg, "altivec") == 0)
866 {
867 if (ppc_cpu == 0)
868 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
869 else
870 ppc_cpu |= PPC_OPCODE_ALTIVEC;
871 }
872 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
873 {
874 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
875 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
876 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
877 | PPC_OPCODE_RFMCI);
878 }
879 else if (strcmp (arg, "spe") == 0)
880 {
881 if (ppc_cpu == 0)
882 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
883 else
884 ppc_cpu |= PPC_OPCODE_SPE;
885 }
886 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
887 620. */
888 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
889 {
890 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
891 }
892 else if (strcmp (arg, "ppc64bridge") == 0)
893 {
894 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
895 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
896 }
897 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
898 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
899 {
900 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
901 }
902 /* -mbooke64 means enable 64-bit BookE support. */
903 else if (strcmp (arg, "booke64") == 0)
904 {
905 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
906 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
907 }
908 else if (strcmp (arg, "power4") == 0)
909 {
910 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
911 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
912 }
b0648eec
AM		 913 else if (strcmp (arg, "power5") == 0)
914 {
915 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
916 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
917 | PPC_OPCODE_POWER5);
918 }
9622b051
AM		 919 else if (strcmp (arg, "power6") == 0)
920 {
921 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
922 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
923 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6);
924 }
ede602d7
AM		 925 else if (strcmp (arg, "cell") == 0)
926 {
927 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
928 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
929 | PPC_OPCODE_CELL);
930 }
69c040df
AM		 931 /* -mcom means assemble for the common intersection between Power
932 and PowerPC. At present, we just allow the union, rather
933 than the intersection. */
934 else if (strcmp (arg, "com") == 0)
935 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
936 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
937 else if (strcmp (arg, "any") == 0)
938 ppc_cpu |= PPC_OPCODE_ANY;
939 else
940 return 0;
941
942 return 1;
943}
944
252b5132 945int
98027b10 946md_parse_option (int c, char *arg)
252b5132
RH		 947{
948 switch (c)
949 {
950 case 'u':
951 /* -u means that any undefined symbols should be treated as
952 external, which is the default for gas anyhow. */
953 break;
954
955#ifdef OBJ_ELF
956 case 'l':
957 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 958 sake, recognize -be also. */
252b5132
RH		 959 if (strcmp (arg, "e") == 0)
960 {
961 target_big_endian = 0;
962 set_target_endian = 1;
963 }
964 else
965 return 0;
966
967 break;
968
969 case 'b':
970 if (strcmp (arg, "e") == 0)
971 {
972 target_big_endian = 1;
973 set_target_endian = 1;
974 }
975 else
976 return 0;
977
978 break;
979
980 case 'K':
99a814a1 981 /* Recognize -K PIC. */
252b5132
RH		 982 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
983 {
984 shlib = SHLIB_PIC;
985 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
986 }
987 else
988 return 0;
989
990 break;
991#endif
992
7f6d05e8
CP		 993 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
994 case 'a':
995 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 996 {
997#ifdef BFD64
998 ppc_obj64 = 1;
999#else
1000 as_fatal (_("%s unsupported"), "-a64");
1001#endif
1002 }
7f6d05e8 1003 else if (strcmp (arg, "32") == 0)
2b3c4602 1004 ppc_obj64 = 0;
7f6d05e8
CP		 1005 else
1006 return 0;
1007 break;
81d4177b 1008
252b5132 1009 case 'm':
69c040df
AM		 1010 if (parse_cpu (arg))
1011 ;
252b5132
RH		 1012
1013 else if (strcmp (arg, "regnames") == 0)
b34976b6 1014 reg_names_p = TRUE;
252b5132
RH		 1015
1016 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1017 reg_names_p = FALSE;
252b5132
RH		 1018
1019#ifdef OBJ_ELF
99a814a1
AM		 1020 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1021 that require relocation. */
252b5132
RH		 1022 else if (strcmp (arg, "relocatable") == 0)
1023 {
5d6f4f16 1024 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1025 ppc_flags |= EF_PPC_RELOCATABLE;
1026 }
1027
1028 else if (strcmp (arg, "relocatable-lib") == 0)
1029 {
5d6f4f16 1030 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1031 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1032 }
1033
99a814a1 1034 /* -memb, set embedded bit. */
252b5132
RH		 1035 else if (strcmp (arg, "emb") == 0)
1036 ppc_flags |= EF_PPC_EMB;
1037
99a814a1
AM		 1038 /* -mlittle/-mbig set the endianess. */
1039 else if (strcmp (arg, "little") == 0
1040 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1041 {
1042 target_big_endian = 0;
1043 set_target_endian = 1;
1044 }
1045
1046 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1047 {
1048 target_big_endian = 1;
1049 set_target_endian = 1;
1050 }
1051
1052 else if (strcmp (arg, "solaris") == 0)
1053 {
b34976b6 1054 msolaris = TRUE;
252b5132
RH		 1055 ppc_comment_chars = ppc_solaris_comment_chars;
1056 }
1057
1058 else if (strcmp (arg, "no-solaris") == 0)
1059 {
b34976b6 1060 msolaris = FALSE;
252b5132
RH		 1061 ppc_comment_chars = ppc_eabi_comment_chars;
1062 }
1063#endif
1064 else
1065 {
1066 as_bad (_("invalid switch -m%s"), arg);
1067 return 0;
1068 }
1069 break;
1070
1071#ifdef OBJ_ELF
1072 /* -V: SVR4 argument to print version ID. */
1073 case 'V':
1074 print_version_id ();
1075 break;
1076
1077 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1078 should be emitted or not. FIXME: Not implemented. */
1079 case 'Q':
1080 break;
1081
1082 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1083 rather than .stabs.excl, which is ignored by the linker.
1084 FIXME: Not implemented. */
1085 case 's':
1086 if (arg)
1087 return 0;
1088
1089 break;
1090#endif
1091
1092 default:
1093 return 0;
1094 }
1095
1096 return 1;
1097}
1098
1099void
98027b10 1100md_show_usage (FILE *stream)
252b5132 1101{
bc805888 1102 fprintf (stream, _("\
252b5132 1103PowerPC options:\n\
df12615d
AM		 1104-a32 generate ELF32/XCOFF32\n\
1105-a64 generate ELF64/XCOFF64\n\
252b5132 1106-u ignored\n\
23e1d84c
AM		 1107-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1108-mpwr generate code for POWER (RIOS1)\n\
1109-m601 generate code for PowerPC 601\n\
418c1742 1110-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1111 generate code for PowerPC 603/604\n\
df12615d 1112-m403, -m405 generate code for PowerPC 403/405\n\
3d8aea2f 1113-m440 generate code for PowerPC 440\n\
f5c120c5 1114-m7400, -m7410, -m7450, -m7455\n\
c3d65c1c
BE		 1115 generate code for PowerPC 7400/7410/7450/7455\n\
1116-m750cl generate code for PowerPC 750cl\n"));
df12615d 1117 fprintf (stream, _("\
23e1d84c 1118-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1119-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG		 1120-mbooke64 generate code for 64-bit PowerPC BookE\n\
1121-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1122-mpower4 generate code for Power4 architecture\n\
b0648eec 1123-mpower5 generate code for Power5 architecture\n\
9622b051 1124-mpower6 generate code for Power6 architecture\n\
ede602d7 1125-mcell generate code for Cell Broadband Engine architecture\n\
252b5132 1126-mcom generate code Power/PowerPC common instructions\n\
df12615d 1127-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1128 fprintf (stream, _("\
df12615d 1129-maltivec generate code for AltiVec\n\
36ae0db3 1130-me300 generate code for PowerPC e300 family\n\
6a0c61b7 1131-me500, -me500x2 generate code for Motorola e500 core complex\n\
df12615d
AM		 1132-mspe generate code for Motorola SPE instructions\n\
1133-mregnames Allow symbolic names for registers\n\
1134-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1135#ifdef OBJ_ELF
bc805888 1136 fprintf (stream, _("\
252b5132
RH		 1137-mrelocatable support for GCC's -mrelocatble option\n\
1138-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1139-memb set PPC_EMB bit in ELF flags\n\
df12615d 1140-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1141 generate code for a little endian machine\n\
df12615d
AM		 1142-mbig, -mbig-endian, -b, -be\n\
1143 generate code for a big endian machine\n\
252b5132
RH		 1144-msolaris generate code for Solaris\n\
1145-mno-solaris do not generate code for Solaris\n\
1146-V print assembler version number\n\
1147-Qy, -Qn ignored\n"));
1148#endif
1149}
1150\f
1151/* Set ppc_cpu if it is not already set. */
1152
1153static void
98027b10 1154ppc_set_cpu (void)
252b5132
RH		 1155{
1156 const char *default_os = TARGET_OS;
1157 const char *default_cpu = TARGET_CPU;
1158
3c9030c1 1159 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1160 {
2a98c3a6 1161 if (ppc_obj64)
3c9030c1 1162 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1163 else if (strncmp (default_os, "aix", 3) == 0
1164 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1165 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1166 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1167 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1168 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1169 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1170 else if (strncmp (default_cpu, "powerpc", 7) == 0)
23d36e92 1171 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
252b5132 1172 else
99a814a1
AM		 1173 as_fatal (_("Unknown default cpu = %s, os = %s"),
1174 default_cpu, default_os);
252b5132
RH		 1175 }
1176}
1177
9232bbb0
AM		 1178/* Figure out the BFD architecture to use. This function and ppc_mach
1179 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1180
1181enum bfd_architecture
98027b10 1182ppc_arch (void)
252b5132
RH		 1183{
1184 const char *default_cpu = TARGET_CPU;
1185 ppc_set_cpu ();
1186
1187 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1188 return bfd_arch_powerpc;
1189 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1190 return bfd_arch_rs6000;
1191 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1192 {
1193 if (strcmp (default_cpu, "rs6000") == 0)
1194 return bfd_arch_rs6000;
0baf16f2 1195 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1196 return bfd_arch_powerpc;
1197 }
1198
1199 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1200 return bfd_arch_unknown;
1201}
1202
7f6d05e8 1203unsigned long
98027b10 1204ppc_mach (void)
7f6d05e8 1205{
2a98c3a6
AM		 1206 if (ppc_obj64)
1207 return bfd_mach_ppc64;
1208 else if (ppc_arch () == bfd_arch_rs6000)
1209 return bfd_mach_rs6k;
1210 else
1211 return bfd_mach_ppc;
7f6d05e8
CP		 1212}
1213
81d4177b 1214extern char*
98027b10 1215ppc_target_format (void)
7f6d05e8
CP		 1216{
1217#ifdef OBJ_COFF
1218#ifdef TE_PE
99a814a1 1219 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1220#elif TE_POWERMAC
0baf16f2 1221 return "xcoff-powermac";
7f6d05e8 1222#else
eb1e0e80 1223# ifdef TE_AIX5
2b3c4602 1224 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1225# else
2b3c4602 1226 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1227# endif
7f6d05e8 1228#endif
7f6d05e8
CP		 1229#endif
1230#ifdef OBJ_ELF
9d8504b1
PB		 1231# ifdef TE_VXWORKS
1232 return "elf32-powerpc-vxworks";
1233# else
0baf16f2 1234 return (target_big_endian
2b3c4602
AM		 1235 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1236 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1237# endif
7f6d05e8
CP		 1238#endif
1239}
1240
69c040df
AM		 1241/* Insert opcodes and macros into hash tables. Called at startup and
1242 for .cpu pseudo. */
252b5132 1243
69c040df
AM		 1244static void
1245ppc_setup_opcodes (void)
252b5132 1246{
98027b10 1247 const struct powerpc_opcode *op;
252b5132
RH		 1248 const struct powerpc_opcode *op_end;
1249 const struct powerpc_macro *macro;
1250 const struct powerpc_macro *macro_end;
b84bf58a 1251 bfd_boolean bad_insn = FALSE;
252b5132 1252
69c040df
AM		 1253 if (ppc_hash != NULL)
1254 hash_die (ppc_hash);
1255 if (ppc_macro_hash != NULL)
1256 hash_die (ppc_macro_hash);
252b5132
RH		 1257
1258 /* Insert the opcodes into a hash table. */
1259 ppc_hash = hash_new ();
1260
c43a438d 1261 if (ENABLE_CHECKING)
b84bf58a 1262 {
c43a438d 1263 unsigned int i;
b84bf58a 1264
c43a438d
AM		 1265 /* Check operand masks. Code here and in the disassembler assumes
1266 all the 1's in the mask are contiguous. */
1267 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1268 {
c43a438d
AM		 1269 unsigned long mask = powerpc_operands[i].bitm;
1270 unsigned long right_bit;
1271 unsigned int j;
1272
1273 right_bit = mask & -mask;
1274 mask += right_bit;
1275 right_bit = mask & -mask;
1276 if (mask != right_bit)
1277 {
1278 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1279 bad_insn = TRUE;
1280 }
1281 for (j = i + 1; j < num_powerpc_operands; ++j)
1282 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1283 sizeof (powerpc_operands[0])) == 0)
1284 {
1285 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1286 j, i);
1287 bad_insn = TRUE;
1288 }
b84bf58a
AM		 1289 }
1290 }
1291
252b5132
RH		 1292 op_end = powerpc_opcodes + powerpc_num_opcodes;
1293 for (op = powerpc_opcodes; op < op_end; op++)
1294 {
c43a438d 1295 if (ENABLE_CHECKING)
b84bf58a 1296 {
c43a438d
AM		 1297 const unsigned char *o;
1298 unsigned long omask = op->mask;
1299
1300 /* The mask had better not trim off opcode bits. */
1301 if ((op->opcode & omask) != op->opcode)
1302 {
1303 as_bad (_("mask trims opcode bits for %s"),
1304 op->name);
1305 bad_insn = TRUE;
1306 }
1307
1308 /* The operands must not overlap the opcode or each other. */
1309 for (o = op->operands; *o; ++o)
1310 if (*o >= num_powerpc_operands)
1311 {
1312 as_bad (_("operand index error for %s"),
1313 op->name);
1314 bad_insn = TRUE;
1315 }
1316 else
b84bf58a 1317 {
c43a438d
AM		 1318 const struct powerpc_operand *operand = &powerpc_operands[*o];
1319 if (operand->shift >= 0)
b84bf58a 1320 {
c43a438d
AM		 1321 unsigned long mask = operand->bitm << operand->shift;
1322 if (omask & mask)
1323 {
1324 as_bad (_("operand %d overlap in %s"),
1325 (int) (o - op->operands), op->name);
1326 bad_insn = TRUE;
1327 }
1328 omask |= mask;
b84bf58a 1329 }
b84bf58a 1330 }
c43a438d 1331 }
252b5132 1332
2b3c4602 1333 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1334 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1335 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1336 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1337 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC		 1338 /* Certain instructions (eg: extsw) do not exist in the
1339 32-bit BookE instruction set, but they do exist in the
1340 64-bit BookE instruction set, and other PPC instruction
1341 sets. Check to see if the opcode has the BOOKE64 flag set.
1342 If it does make sure that the target CPU is not the BookE32. */
1343 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1344 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1345 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
23e1d84c
AM		 1346 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1347 || ((op->flags & PPC_OPCODE_POWER4)
b0648eec
AM		 1348 == (ppc_cpu & PPC_OPCODE_POWER4)))
1349 && ((op->flags & PPC_OPCODE_POWER5) == 0
1350 || ((op->flags & PPC_OPCODE_POWER5)
9622b051
AM		 1351 == (ppc_cpu & PPC_OPCODE_POWER5)))
1352 && ((op->flags & PPC_OPCODE_POWER6) == 0
1353 || ((op->flags & PPC_OPCODE_POWER6)
1354 == (ppc_cpu & PPC_OPCODE_POWER6))))
252b5132
RH		 1355 {
1356 const char *retval;
1357
98027b10 1358 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1359 if (retval != NULL)
252b5132 1360 {
99a814a1 1361 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1362 if ((ppc_cpu & PPC_OPCODE_601) != 0
1363 && (op->flags & PPC_OPCODE_POWER) != 0)
1364 continue;
1365
b84bf58a 1366 as_bad (_("duplicate instruction %s"),
99a814a1 1367 op->name);
b84bf58a 1368 bad_insn = TRUE;
252b5132
RH		 1369 }
1370 }
1371 }
1372
3c9030c1
AM		 1373 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1374 for (op = powerpc_opcodes; op < op_end; op++)
98027b10 1375 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1376
252b5132
RH		 1377 /* Insert the macros into a hash table. */
1378 ppc_macro_hash = hash_new ();
1379
1380 macro_end = powerpc_macros + powerpc_num_macros;
1381 for (macro = powerpc_macros; macro < macro_end; macro++)
1382 {
1383 if ((macro->flags & ppc_cpu) != 0)
1384 {
1385 const char *retval;
1386
98027b10 1387 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1388 if (retval != (const char *) NULL)
1389 {
b84bf58a
AM		 1390 as_bad (_("duplicate macro %s"), macro->name);
1391 bad_insn = TRUE;
252b5132
RH		 1392 }
1393 }
1394 }
1395
b84bf58a 1396 if (bad_insn)
252b5132 1397 abort ();
69c040df
AM		 1398}
1399
1400/* This function is called when the assembler starts up. It is called
1401 after the options have been parsed and the output file has been
1402 opened. */
1403
1404void
98027b10 1405md_begin (void)
69c040df
AM		 1406{
1407 ppc_set_cpu ();
1408
1409 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1410
1411#ifdef OBJ_ELF
1412 /* Set the ELF flags if desired. */
1413 if (ppc_flags && !msolaris)
1414 bfd_set_private_flags (stdoutput, ppc_flags);
1415#endif
1416
1417 ppc_setup_opcodes ();
252b5132 1418
67c1ffbe 1419 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1420 by the user. */
252b5132
RH		 1421 if (!set_target_endian)
1422 {
1423 set_target_endian = 1;
1424 target_big_endian = PPC_BIG_ENDIAN;
1425 }
1426
1427#ifdef OBJ_XCOFF
1428 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1429
1430 /* Create dummy symbols to serve as initial csects. This forces the
1431 text csects to precede the data csects. These symbols will not
1432 be output. */
1433 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1434 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1435 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1436 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1437#endif
1438
1439#ifdef TE_PE
1440
1441 ppc_current_section = text_section;
81d4177b 1442 ppc_previous_section = 0;
252b5132
RH		 1443
1444#endif
1445}
1446
6a0c61b7 1447void
98027b10 1448ppc_cleanup (void)
6a0c61b7 1449{
dc1d03fc 1450#ifdef OBJ_ELF
6a0c61b7
EZ		 1451 if (ppc_apuinfo_list == NULL)
1452 return;
1453
1454 /* Ok, so write the section info out. We have this layout:
1455
1456 byte data what
1457 ---- ---- ----
1458 0 8 length of "APUinfo\0"
1459 4 (n*4) number of APU's (4 bytes each)
1460 8 2 note type 2
1461 12 "APUinfo\0" name
1462 20 APU#1 first APU's info
1463 24 APU#2 second APU's info
1464 ... ...
1465 */
1466 {
1467 char *p;
1468 asection *seg = now_seg;
1469 subsegT subseg = now_subseg;
1470 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1471 unsigned int i;
6a0c61b7
EZ		 1472
1473 /* Create the .PPC.EMB.apuinfo section. */
1474 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1475 bfd_set_section_flags (stdoutput,
1476 apuinfo_secp,
e1a9cb8e 1477 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1478
1479 p = frag_more (4);
1480 md_number_to_chars (p, (valueT) 8, 4);
1481
1482 p = frag_more (4);
e98d298c 1483 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1484
1485 p = frag_more (4);
1486 md_number_to_chars (p, (valueT) 2, 4);
1487
1488 p = frag_more (8);
1489 strcpy (p, "APUinfo");
1490
1491 for (i = 0; i < ppc_apuinfo_num; i++)
1492 {
b34976b6
AM		 1493 p = frag_more (4);
1494 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1495 }
1496
1497 frag_align (2, 0, 0);
1498
1499 /* We probably can't restore the current segment, for there likely
1500 isn't one yet... */
1501 if (seg && subseg)
1502 subseg_set (seg, subseg);
1503 }
dc1d03fc 1504#endif
6a0c61b7
EZ		 1505}
1506
252b5132
RH		 1507/* Insert an operand value into an instruction. */
1508
1509static unsigned long
a1867a27
AM		 1510ppc_insert_operand (unsigned long insn,
1511 const struct powerpc_operand *operand,
1512 offsetT val,
1513 char *file,
1514 unsigned int line)
252b5132 1515{
b84bf58a 1516 long min, max, right;
eb42fac1 1517
b84bf58a
AM		 1518 max = operand->bitm;
1519 right = max & -max;
1520 min = 0;
1521
1522 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1523 {
b84bf58a 1524 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1525 max = (max >> 1) & -right;
1526 min = ~max & -right;
b84bf58a 1527 }
252b5132 1528
b84bf58a 1529 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1530 max++;
252b5132 1531
b84bf58a 1532 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1533 {
1534 long tmp = min;
1535 min = -max;
1536 max = -tmp;
1537 }
b84bf58a 1538
a1867a27
AM		 1539 if (min <= max)
1540 {
1541 /* Some people write constants with the sign extension done by
1542 hand but only up to 32 bits. This shouldn't really be valid,
1543 but, to permit this code to assemble on a 64-bit host, we
1544 sign extend the 32-bit value to 64 bits if so doing makes the
1545 value valid. */
1546 if (val > max
1547 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1548 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1549 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1550 val = val - 0x80000000 - 0x80000000;
1551
1552 /* Similarly, people write expressions like ~(1<<15), and expect
1553 this to be OK for a 32-bit unsigned value. */
1554 else if (val < min
1555 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1556 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1557 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1558 val = val + 0x80000000 + 0x80000000;
1559
1560 else if (val < min
1561 || val > max
1562 || (val & (right - 1)) != 0)
1563 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1564 }
b84bf58a 1565
252b5132
RH		 1566 if (operand->insert)
1567 {
1568 const char *errmsg;
1569
1570 errmsg = NULL;
2b3c4602 1571 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1572 if (errmsg != (const char *) NULL)
0baf16f2 1573 as_bad_where (file, line, errmsg);
252b5132
RH		 1574 }
1575 else
b84bf58a 1576 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1577
1578 return insn;
1579}
1580
1581\f
1582#ifdef OBJ_ELF
1583/* Parse @got, etc. and return the desired relocation. */
1584static bfd_reloc_code_real_type
98027b10 1585ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1586{
1587 struct map_bfd {
1588 char *string;
b7d7dc63
AM		 1589 unsigned int length : 8;
1590 unsigned int valid32 : 1;
1591 unsigned int valid64 : 1;
1592 unsigned int reloc;
252b5132
RH		 1593 };
1594
1595 char ident[20];
1596 char *str = *str_p;
1597 char *str2;
1598 int ch;
1599 int len;
15c1449b 1600 const struct map_bfd *ptr;
252b5132 1601
b7d7dc63
AM		 1602#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1603#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1604#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1605
15c1449b 1606 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1607 MAP ("l", BFD_RELOC_LO16),
1608 MAP ("h", BFD_RELOC_HI16),
1609 MAP ("ha", BFD_RELOC_HI16_S),
1610 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1611 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1612 MAP ("got", BFD_RELOC_16_GOTOFF),
1613 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1614 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1615 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1616 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1617 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1618 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1619 MAP ("copy", BFD_RELOC_PPC_COPY),
1620 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1621 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1622 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1623 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1624 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1625 MAP ("tls", BFD_RELOC_PPC_TLS),
1626 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1627 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1628 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1629 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1630 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1631 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1632 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1633 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1634 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1635 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1636 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1637 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1638 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1639 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1640 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1641 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1642 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1643 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1644 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1645 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1646 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1647 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1648 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1649 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1650 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1651 MAP32 ("fixup", BFD_RELOC_CTOR),
1652 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1653 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1654 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1655 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1656 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1657 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1658 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1659 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1660 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1661 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1662 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1663 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1664 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1665 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1666 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1667 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1668 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1669 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1670 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1671 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1672 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1673 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1674 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1675 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1676 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1677 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1678 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1679 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1680 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1681 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1682 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1683 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1684 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1685 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1686 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1687 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1688 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1689 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1690 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1691 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1692 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1693 };
1694
1695 if (*str++ != '@')
1696 return BFD_RELOC_UNUSED;
1697
1698 for (ch = *str, str2 = ident;
1699 (str2 < ident + sizeof (ident) - 1
3882b010 1700 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1701 ch = *++str)
1702 {
3882b010 1703 *str2++ = TOLOWER (ch);
252b5132
RH		 1704 }
1705
1706 *str2 = '\0';
1707 len = str2 - ident;
1708
1709 ch = ident[0];
1710 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1711 if (ch == ptr->string[0]
1712 && len == ptr->length
b7d7dc63
AM		 1713 && memcmp (ident, ptr->string, ptr->length) == 0
1714 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1715 {
15c1449b
AM		 1716 int reloc = ptr->reloc;
1717
cdba85ec 1718 if (!ppc_obj64)
5f6db75a
AM		 1719 if (exp_p->X_add_number != 0
1720 && (reloc == (int) BFD_RELOC_16_GOTOFF
1721 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1722 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1723 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1724 as_warn (_("identifier+constant@got means identifier@got+constant"));
1725
1726 /* Now check for identifier@suffix+constant. */
1727 if (*str == '-' || *str == '+')
252b5132 1728 {
5f6db75a
AM		 1729 char *orig_line = input_line_pointer;
1730 expressionS new_exp;
1731
1732 input_line_pointer = str;
1733 expression (&new_exp);
1734 if (new_exp.X_op == O_constant)
252b5132 1735 {
5f6db75a
AM		 1736 exp_p->X_add_number += new_exp.X_add_number;
1737 str = input_line_pointer;
252b5132 1738 }
5f6db75a
AM		 1739
1740 if (&input_line_pointer != str_p)
1741 input_line_pointer = orig_line;
252b5132 1742 }
252b5132 1743 *str_p = str;
0baf16f2 1744
2b3c4602 1745 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1746 && exp_p->X_op == O_symbol
1747 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1748 {
9f2b53d7
AM		 1749 /* Change the symbol so that the dummy .TOC. symbol can be
1750 omitted from the object file. */
0baf16f2
AM		 1751 exp_p->X_add_symbol = &abs_symbol;
1752 }
1753
15c1449b 1754 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1755 }
1756
1757 return BFD_RELOC_UNUSED;
1758}
1759
99a814a1
AM		 1760/* Like normal .long/.short/.word, except support @got, etc.
1761 Clobbers input_line_pointer, checks end-of-line. */
252b5132 1762static void
98027b10 1763ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 1764{
1765 expressionS exp;
1766 bfd_reloc_code_real_type reloc;
1767
1768 if (is_it_end_of_statement ())
1769 {
1770 demand_empty_rest_of_line ();
1771 return;
1772 }
1773
1774 do
1775 {
1776 expression (&exp);
1777 if (exp.X_op == O_symbol
1778 && *input_line_pointer == '@'
99a814a1
AM		 1779 && (reloc = ppc_elf_suffix (&input_line_pointer,
1780 &exp)) != BFD_RELOC_UNUSED)
252b5132 1781 {
99a814a1
AM		 1782 reloc_howto_type *reloc_howto;
1783 int size;
1784
1785 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1786 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1787
1788 if (size > nbytes)
0baf16f2
AM		 1789 {
1790 as_bad (_("%s relocations do not fit in %d bytes\n"),
1791 reloc_howto->name, nbytes);
1792 }
252b5132
RH		 1793 else
1794 {
0baf16f2
AM		 1795 char *p;
1796 int offset;
252b5132 1797
0baf16f2
AM		 1798 p = frag_more (nbytes);
1799 offset = 0;
1800 if (target_big_endian)
1801 offset = nbytes - size;
99a814a1
AM		 1802 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1803 &exp, 0, reloc);
252b5132
RH		 1804 }
1805 }
1806 else
1807 emit_expr (&exp, (unsigned int) nbytes);
1808 }
1809 while (*input_line_pointer++ == ',');
1810
99a814a1
AM		 1811 /* Put terminator back into stream. */
1812 input_line_pointer--;
252b5132
RH		 1813 demand_empty_rest_of_line ();
1814}
1815
1816/* Solaris pseduo op to change to the .rodata section. */
1817static void
98027b10 1818ppc_elf_rdata (int xxx)
252b5132
RH		 1819{
1820 char *save_line = input_line_pointer;
1821 static char section[] = ".rodata\n";
1822
99a814a1 1823 /* Just pretend this is .section .rodata */
252b5132
RH		 1824 input_line_pointer = section;
1825 obj_elf_section (xxx);
1826
1827 input_line_pointer = save_line;
1828}
1829
99a814a1 1830/* Pseudo op to make file scope bss items. */
252b5132 1831static void
98027b10 1832ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 1833{
98027b10
AM		 1834 char *name;
1835 char c;
1836 char *p;
252b5132 1837 offsetT size;
98027b10 1838 symbolS *symbolP;
252b5132
RH		 1839 offsetT align;
1840 segT old_sec;
1841 int old_subsec;
1842 char *pfrag;
1843 int align2;
1844
1845 name = input_line_pointer;
1846 c = get_symbol_end ();
1847
99a814a1 1848 /* just after name is now '\0'. */
252b5132
RH		 1849 p = input_line_pointer;
1850 *p = c;
1851 SKIP_WHITESPACE ();
1852 if (*input_line_pointer != ',')
1853 {
1854 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1855 ignore_rest_of_line ();
1856 return;
1857 }
1858
1859 input_line_pointer++; /* skip ',' */
1860 if ((size = get_absolute_expression ()) < 0)
1861 {
1862 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1863 ignore_rest_of_line ();
1864 return;
1865 }
1866
1867 /* The third argument to .lcomm is the alignment. */
1868 if (*input_line_pointer != ',')
1869 align = 8;
1870 else
1871 {
1872 ++input_line_pointer;
1873 align = get_absolute_expression ();
1874 if (align <= 0)
1875 {
1876 as_warn (_("ignoring bad alignment"));
1877 align = 8;
1878 }
1879 }
1880
1881 *p = 0;
1882 symbolP = symbol_find_or_make (name);
1883 *p = c;
1884
1885 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1886 {
1887 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1888 S_GET_NAME (symbolP));
1889 ignore_rest_of_line ();
1890 return;
1891 }
1892
1893 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1894 {
1895 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1896 S_GET_NAME (symbolP),
1897 (long) S_GET_VALUE (symbolP),
1898 (long) size);
1899
1900 ignore_rest_of_line ();
1901 return;
1902 }
1903
99a814a1 1904 /* Allocate_bss. */
252b5132
RH		 1905 old_sec = now_seg;
1906 old_subsec = now_subseg;
1907 if (align)
1908 {
99a814a1 1909 /* Convert to a power of 2 alignment. */
252b5132
RH		 1910 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1911 if (align != 1)
1912 {
1913 as_bad (_("Common alignment not a power of 2"));
1914 ignore_rest_of_line ();
1915 return;
1916 }
1917 }
1918 else
1919 align2 = 0;
1920
1921 record_alignment (bss_section, align2);
1922 subseg_set (bss_section, 0);
1923 if (align2)
1924 frag_align (align2, 0, 0);
1925 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 1926 symbol_get_frag (symbolP)->fr_symbol = 0;
1927 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 1928 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1929 (char *) 0);
1930 *pfrag = 0;
1931 S_SET_SIZE (symbolP, size);
1932 S_SET_SEGMENT (symbolP, bss_section);
1933 subseg_set (old_sec, old_subsec);
1934 demand_empty_rest_of_line ();
1935}
1936
1937/* Validate any relocations emitted for -mrelocatable, possibly adding
1938 fixups for word relocations in writable segments, so we can adjust
1939 them at runtime. */
1940static void
98027b10 1941ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 1942{
1943 if (fixp->fx_done || fixp->fx_pcrel)
1944 return;
1945
1946 switch (shlib)
1947 {
1948 case SHLIB_NONE:
1949 case SHLIB_PIC:
1950 return;
1951
5d6f4f16 1952 case SHLIB_MRELOCATABLE:
252b5132
RH		 1953 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
1954 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
1955 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
1956 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
1957 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 1958 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 1959 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
1960 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
1961 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 1962 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 1963 && strcmp (segment_name (seg), ".got2") != 0
1964 && strcmp (segment_name (seg), ".dtors") != 0
1965 && strcmp (segment_name (seg), ".ctors") != 0
1966 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 1967 && strcmp (segment_name (seg), ".gcc_except_table") != 0
1968 && strcmp (segment_name (seg), ".eh_frame") != 0
1969 && strcmp (segment_name (seg), ".ex_shared") != 0)
1970 {
1971 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
1972 || fixp->fx_r_type != BFD_RELOC_CTOR)
1973 {
1974 as_bad_where (fixp->fx_file, fixp->fx_line,
1975 _("Relocation cannot be done when using -mrelocatable"));
1976 }
1977 }
1978 return;
1979 }
1980}
0baf16f2 1981
7e8d4ab4
AM		 1982/* Prevent elf_frob_file_before_adjust removing a weak undefined
1983 function descriptor sym if the corresponding code sym is used. */
1984
1985void
98027b10 1986ppc_frob_file_before_adjust (void)
0baf16f2 1987{
7e8d4ab4 1988 symbolS *symp;
9232bbb0 1989 asection *toc;
0baf16f2 1990
7e8d4ab4
AM		 1991 if (!ppc_obj64)
1992 return;
1993
1994 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 1995 {
7e8d4ab4
AM		 1996 const char *name;
1997 char *dotname;
1998 symbolS *dotsym;
1999 size_t len;
2000
2001 name = S_GET_NAME (symp);
2002 if (name[0] == '.')
2003 continue;
2004
2005 if (! S_IS_WEAK (symp)
2006 || S_IS_DEFINED (symp))
2007 continue;
2008
2009 len = strlen (name) + 1;
2010 dotname = xmalloc (len + 1);
2011 dotname[0] = '.';
2012 memcpy (dotname + 1, name, len);
461b725f 2013 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2014 free (dotname);
2015 if (dotsym != NULL && (symbol_used_p (dotsym)
2016 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2017 symbol_mark_used (symp);
2018
0baf16f2
AM		 2019 }
2020
9232bbb0
AM		 2021 toc = bfd_get_section_by_name (stdoutput, ".toc");
2022 if (toc != NULL
2023 && bfd_section_size (stdoutput, toc) > 0x10000)
2024 as_warn (_("TOC section size exceeds 64k"));
2025
7e8d4ab4
AM		 2026 /* Don't emit .TOC. symbol. */
2027 symp = symbol_find (".TOC.");
2028 if (symp != NULL)
2029 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2030}
252b5132
RH		 2031#endif /* OBJ_ELF */
2032\f
2033#ifdef TE_PE
2034
2035/*
99a814a1 2036 * Summary of parse_toc_entry.
252b5132
RH		 2037 *
2038 * in: Input_line_pointer points to the '[' in one of:
2039 *
2040 * [toc] [tocv] [toc32] [toc64]
2041 *
2042 * Anything else is an error of one kind or another.
2043 *
81d4177b 2044 * out:
252b5132
RH		 2045 * return value: success or failure
2046 * toc_kind: kind of toc reference
2047 * input_line_pointer:
2048 * success: first char after the ']'
2049 * failure: unchanged
2050 *
2051 * settings:
2052 *
2053 * [toc] - rv == success, toc_kind = default_toc
2054 * [tocv] - rv == success, toc_kind = data_in_toc
2055 * [toc32] - rv == success, toc_kind = must_be_32
2056 * [toc64] - rv == success, toc_kind = must_be_64
2057 *
2058 */
2059
81d4177b
KH		 2060enum toc_size_qualifier
2061{
252b5132
RH		 2062 default_toc, /* The toc cell constructed should be the system default size */
2063 data_in_toc, /* This is a direct reference to a toc cell */
2064 must_be_32, /* The toc cell constructed must be 32 bits wide */
2065 must_be_64 /* The toc cell constructed must be 64 bits wide */
2066};
2067
2068static int
98027b10 2069parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2070{
2071 char *start;
2072 char *toc_spec;
2073 char c;
2074 enum toc_size_qualifier t;
2075
99a814a1 2076 /* Save the input_line_pointer. */
252b5132
RH		 2077 start = input_line_pointer;
2078
99a814a1 2079 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2080 ++input_line_pointer;
2081 SKIP_WHITESPACE ();
81d4177b 2082
99a814a1 2083 /* Find the spelling of the operand. */
252b5132
RH		 2084 toc_spec = input_line_pointer;
2085 c = get_symbol_end ();
2086
99a814a1 2087 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2088 {
2089 t = default_toc;
2090 }
99a814a1 2091 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2092 {
2093 t = data_in_toc;
2094 }
99a814a1 2095 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2096 {
2097 t = must_be_32;
2098 }
99a814a1 2099 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2100 {
2101 t = must_be_64;
2102 }
2103 else
2104 {
2105 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2106 *input_line_pointer = c;
2107 input_line_pointer = start;
252b5132
RH		 2108 return 0;
2109 }
2110
99a814a1
AM		 2111 /* Now find the ']'. */
2112 *input_line_pointer = c;
252b5132 2113
81d4177b
KH		 2114 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2115 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2116
2117 if (c != ']')
2118 {
2119 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2120 input_line_pointer = start;
252b5132
RH		 2121 return 0;
2122 }
2123
99a814a1 2124 *toc_kind = t;
252b5132
RH		 2125 return 1;
2126}
2127#endif
2128\f
2129
dc1d03fc 2130#ifdef OBJ_ELF
6a0c61b7
EZ		 2131#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2132static void
98027b10 2133ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2134{
2135 unsigned int i;
2136
2137 /* Check we don't already exist. */
2138 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2139 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2140 return;
b34976b6 2141
6a0c61b7
EZ		 2142 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2143 {
2144 if (ppc_apuinfo_num_alloc == 0)
2145 {
2146 ppc_apuinfo_num_alloc = 4;
2147 ppc_apuinfo_list = (unsigned long *)
2148 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2149 }
2150 else
2151 {
2152 ppc_apuinfo_num_alloc += 4;
2153 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2154 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2155 }
2156 }
dc1d03fc 2157 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2158}
2159#undef APUID
dc1d03fc 2160#endif
6a0c61b7
EZ		 2161\f
2162
252b5132
RH		 2163/* We need to keep a list of fixups. We can't simply generate them as
2164 we go, because that would require us to first create the frag, and
2165 that would screw up references to ``.''. */
2166
2167struct ppc_fixup
2168{
2169 expressionS exp;
2170 int opindex;
2171 bfd_reloc_code_real_type reloc;
2172};
2173
2174#define MAX_INSN_FIXUPS (5)
2175
2176/* This routine is called for each instruction to be assembled. */
2177
2178void
98027b10 2179md_assemble (char *str)
252b5132
RH		 2180{
2181 char *s;
2182 const struct powerpc_opcode *opcode;
2183 unsigned long insn;
2184 const unsigned char *opindex_ptr;
2185 int skip_optional;
2186 int need_paren;
2187 int next_opindex;
2188 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2189 int fc;
2190 char *f;
09b935ac 2191 int addr_mod;
252b5132
RH		 2192 int i;
2193#ifdef OBJ_ELF
2194 bfd_reloc_code_real_type reloc;
2195#endif
2196
2197 /* Get the opcode. */
3882b010 2198 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2199 ;
2200 if (*s != '\0')
2201 *s++ = '\0';
2202
2203 /* Look up the opcode in the hash table. */
2204 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2205 if (opcode == (const struct powerpc_opcode *) NULL)
2206 {
2207 const struct powerpc_macro *macro;
2208
2209 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2210 if (macro == (const struct powerpc_macro *) NULL)
2211 as_bad (_("Unrecognized opcode: `%s'"), str);
2212 else
2213 ppc_macro (s, macro);
2214
2215 return;
2216 }
2217
2218 insn = opcode->opcode;
2219
2220 str = s;
3882b010 2221 while (ISSPACE (*str))
252b5132
RH		 2222 ++str;
2223
2224 /* PowerPC operands are just expressions. The only real issue is
2225 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2226 an optional operand separate the operands only with commas (in some
2227 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2228 have optional operands). Most instructions with optional operands
2229 have only one. Those that have more than one optional operand can
2230 take either all their operands or none. So, before we start seriously
2231 parsing the operands, we check to see if we have optional operands,
2232 and if we do, we count the number of commas to see which operands
2233 have been omitted. */
252b5132
RH		 2234 skip_optional = 0;
2235 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2236 {
2237 const struct powerpc_operand *operand;
2238
2239 operand = &powerpc_operands[*opindex_ptr];
2240 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2241 {
2242 unsigned int opcount;
7fe9cf6b
NC		 2243 unsigned int num_operands_expected;
2244 unsigned int i;
252b5132
RH		 2245
2246 /* There is an optional operand. Count the number of
2247 commas in the input line. */
2248 if (*str == '\0')
2249 opcount = 0;
2250 else
2251 {
2252 opcount = 1;
2253 s = str;
2254 while ((s = strchr (s, ',')) != (char *) NULL)
2255 {
2256 ++opcount;
2257 ++s;
2258 }
2259 }
2260
7fe9cf6b
NC		 2261 /* Compute the number of expected operands.
2262 Do not count fake operands. */
2263 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2264 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2265 ++ num_operands_expected;
2266
252b5132
RH		 2267 /* If there are fewer operands in the line then are called
2268 for by the instruction, we want to skip the optional
1f6c9eb0 2269 operands. */
7fe9cf6b 2270 if (opcount < num_operands_expected)
252b5132
RH		 2271 skip_optional = 1;
2272
2273 break;
2274 }
2275 }
2276
2277 /* Gather the operands. */
2278 need_paren = 0;
2279 next_opindex = 0;
2280 fc = 0;
2281 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2282 {
2283 const struct powerpc_operand *operand;
2284 const char *errmsg;
2285 char *hold;
2286 expressionS ex;
2287 char endc;
2288
2289 if (next_opindex == 0)
2290 operand = &powerpc_operands[*opindex_ptr];
2291 else
2292 {
2293 operand = &powerpc_operands[next_opindex];
2294 next_opindex = 0;
2295 }
252b5132
RH		 2296 errmsg = NULL;
2297
2298 /* If this is a fake operand, then we do not expect anything
2299 from the input. */
2300 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2301 {
2b3c4602 2302 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2303 if (errmsg != (const char *) NULL)
2304 as_bad (errmsg);
2305 continue;
2306 }
2307
2308 /* If this is an optional operand, and we are skipping it, just
2309 insert a zero. */
2310 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2311 && skip_optional)
2312 {
2313 if (operand->insert)
2314 {
2b3c4602 2315 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2316 if (errmsg != (const char *) NULL)
2317 as_bad (errmsg);
2318 }
2319 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2320 next_opindex = *opindex_ptr + 1;
2321 continue;
2322 }
2323
2324 /* Gather the operand. */
2325 hold = input_line_pointer;
2326 input_line_pointer = str;
2327
2328#ifdef TE_PE
81d4177b 2329 if (*input_line_pointer == '[')
252b5132
RH		 2330 {
2331 /* We are expecting something like the second argument here:
99a814a1
AM		 2332 *
2333 * lwz r4,[toc].GS.0.static_int(rtoc)
2334 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2335 * The argument following the `]' must be a symbol name, and the
2336 * register must be the toc register: 'rtoc' or '2'
2337 *
2338 * The effect is to 0 as the displacement field
2339 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2340 * the appropriate variation) reloc against it based on the symbol.
2341 * The linker will build the toc, and insert the resolved toc offset.
2342 *
2343 * Note:
2344 * o The size of the toc entry is currently assumed to be
2345 * 32 bits. This should not be assumed to be a hard coded
2346 * number.
2347 * o In an effort to cope with a change from 32 to 64 bits,
2348 * there are also toc entries that are specified to be
2349 * either 32 or 64 bits:
2350 * lwz r4,[toc32].GS.0.static_int(rtoc)
2351 * lwz r4,[toc64].GS.0.static_int(rtoc)
2352 * These demand toc entries of the specified size, and the
2353 * instruction probably requires it.
2354 */
252b5132
RH		 2355
2356 int valid_toc;
2357 enum toc_size_qualifier toc_kind;
2358 bfd_reloc_code_real_type toc_reloc;
2359
99a814a1
AM		 2360 /* Go parse off the [tocXX] part. */
2361 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2362
81d4177b 2363 if (!valid_toc)
252b5132 2364 {
99a814a1
AM		 2365 /* Note: message has already been issued.
2366 FIXME: what sort of recovery should we do?
2367 demand_rest_of_line (); return; ? */
252b5132
RH		 2368 }
2369
99a814a1
AM		 2370 /* Now get the symbol following the ']'. */
2371 expression (&ex);
252b5132
RH		 2372
2373 switch (toc_kind)
2374 {
2375 case default_toc:
99a814a1
AM		 2376 /* In this case, we may not have seen the symbol yet,
2377 since it is allowed to appear on a .extern or .globl
2378 or just be a label in the .data section. */
252b5132
RH		 2379 toc_reloc = BFD_RELOC_PPC_TOC16;
2380 break;
2381 case data_in_toc:
99a814a1
AM		 2382 /* 1. The symbol must be defined and either in the toc
2383 section, or a global.
2384 2. The reloc generated must have the TOCDEFN flag set
2385 in upper bit mess of the reloc type.
2386 FIXME: It's a little confusing what the tocv
2387 qualifier can be used for. At the very least, I've
2388 seen three uses, only one of which I'm sure I can
2389 explain. */
81d4177b
KH		 2390 if (ex.X_op == O_symbol)
2391 {
252b5132 2392 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2393 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2394 != tocdata_section)
252b5132 2395 {
99a814a1 2396 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2397 }
2398 }
2399
2400 toc_reloc = BFD_RELOC_PPC_TOC16;
2401 break;
2402 case must_be_32:
99a814a1
AM		 2403 /* FIXME: these next two specifically specify 32/64 bit
2404 toc entries. We don't support them today. Is this
2405 the right way to say that? */
252b5132
RH		 2406 toc_reloc = BFD_RELOC_UNUSED;
2407 as_bad (_("Unimplemented toc32 expression modifier"));
2408 break;
2409 case must_be_64:
99a814a1 2410 /* FIXME: see above. */
252b5132
RH		 2411 toc_reloc = BFD_RELOC_UNUSED;
2412 as_bad (_("Unimplemented toc64 expression modifier"));
2413 break;
2414 default:
bc805888 2415 fprintf (stderr,
99a814a1
AM		 2416 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2417 toc_kind);
bc805888 2418 abort ();
252b5132
RH		 2419 break;
2420 }
2421
2422 /* We need to generate a fixup for this expression. */
2423 if (fc >= MAX_INSN_FIXUPS)
2424 as_fatal (_("too many fixups"));
2425
2426 fixups[fc].reloc = toc_reloc;
2427 fixups[fc].exp = ex;
2428 fixups[fc].opindex = *opindex_ptr;
2429 ++fc;
2430
99a814a1
AM		 2431 /* Ok. We've set up the fixup for the instruction. Now make it
2432 look like the constant 0 was found here. */
252b5132
RH		 2433 ex.X_unsigned = 1;
2434 ex.X_op = O_constant;
2435 ex.X_add_number = 0;
2436 ex.X_add_symbol = NULL;
2437 ex.X_op_symbol = NULL;
2438 }
2439
2440 else
2441#endif /* TE_PE */
2442 {
2443 if (! register_name (&ex))
2444 {
2445 if ((operand->flags & PPC_OPERAND_CR) != 0)
b34976b6 2446 cr_operand = TRUE;
252b5132 2447 expression (&ex);
b34976b6 2448 cr_operand = FALSE;
252b5132
RH		 2449 }
2450 }
2451
2452 str = input_line_pointer;
2453 input_line_pointer = hold;
2454
2455 if (ex.X_op == O_illegal)
2456 as_bad (_("illegal operand"));
2457 else if (ex.X_op == O_absent)
2458 as_bad (_("missing operand"));
2459 else if (ex.X_op == O_register)
2460 {
2461 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2462 (char *) NULL, 0);
2463 }
2464 else if (ex.X_op == O_constant)
2465 {
2466#ifdef OBJ_ELF
81d4177b 2467 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2468 char *orig_str = str;
2469
2470 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2471 switch (reloc)
2472 {
2473 default:
2474 str = orig_str;
2475 break;
2476
2477 case BFD_RELOC_LO16:
2478 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2479 something which cleared it, we always produce a
2480 signed value. */
2481 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2482 ex.X_add_number &= 0xffff;
2483 else
0baf16f2 2484 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2485 break;
2486
2487 case BFD_RELOC_HI16:
0baf16f2
AM		 2488 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2489 ex.X_add_number = PPC_HI (ex.X_add_number);
2490 else
2491 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2492 break;
2493
2494 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2495 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2496 ex.X_add_number = PPC_HA (ex.X_add_number);
2497 else
2498 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2499 break;
2500
0baf16f2
AM		 2501 case BFD_RELOC_PPC64_HIGHER:
2502 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2503 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2504 else
2505 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2506 break;
2507
2508 case BFD_RELOC_PPC64_HIGHER_S:
2509 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2510 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2511 else
2512 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2513 break;
0baf16f2
AM		 2514
2515 case BFD_RELOC_PPC64_HIGHEST:
2516 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2517 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2518 else
2519 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2520 break;
2521
2522 case BFD_RELOC_PPC64_HIGHEST_S:
2523 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2524 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2525 else
2526 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2527 break;
252b5132 2528 }
0baf16f2 2529#endif /* OBJ_ELF */
252b5132
RH		 2530 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2531 (char *) NULL, 0);
2532 }
2533#ifdef OBJ_ELF
2534 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2535 {
cdba85ec
AM		 2536 /* Some TLS tweaks. */
2537 switch (reloc)
2538 {
2539 default:
2540 break;
2541 case BFD_RELOC_PPC_TLS:
2542 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2543 (char *) NULL, 0);
2544 break;
2545 /* We'll only use the 32 (or 64) bit form of these relocations
2546 in constants. Instructions get the 16 bit form. */
2547 case BFD_RELOC_PPC_DTPREL:
2548 reloc = BFD_RELOC_PPC_DTPREL16;
2549 break;
2550 case BFD_RELOC_PPC_TPREL:
2551 reloc = BFD_RELOC_PPC_TPREL16;
2552 break;
2553 }
2554
99a814a1
AM		 2555 /* For the absolute forms of branches, convert the PC
2556 relative form back into the absolute. */
252b5132
RH		 2557 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2558 {
2559 switch (reloc)
2560 {
2561 case BFD_RELOC_PPC_B26:
2562 reloc = BFD_RELOC_PPC_BA26;
2563 break;
2564 case BFD_RELOC_PPC_B16:
2565 reloc = BFD_RELOC_PPC_BA16;
2566 break;
2567 case BFD_RELOC_PPC_B16_BRTAKEN:
2568 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2569 break;
2570 case BFD_RELOC_PPC_B16_BRNTAKEN:
2571 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2572 break;
2573 default:
2574 break;
2575 }
2576 }
2577
2b3c4602 2578 if (ppc_obj64
adadcc0c 2579 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
0baf16f2
AM		 2580 {
2581 switch (reloc)
2582 {
2583 case BFD_RELOC_16:
2584 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2585 break;
2586 case BFD_RELOC_LO16:
2587 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2588 break;
2589 case BFD_RELOC_16_GOTOFF:
2590 reloc = BFD_RELOC_PPC64_GOT16_DS;
2591 break;
2592 case BFD_RELOC_LO16_GOTOFF:
2593 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2594 break;
2595 case BFD_RELOC_LO16_PLTOFF:
2596 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2597 break;
1cfc59d5 2598 case BFD_RELOC_16_BASEREL:
0baf16f2
AM		 2599 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2600 break;
2601 case BFD_RELOC_LO16_BASEREL:
2602 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2603 break;
2604 case BFD_RELOC_PPC_TOC16:
2605 reloc = BFD_RELOC_PPC64_TOC16_DS;
2606 break;
2607 case BFD_RELOC_PPC64_TOC16_LO:
2608 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2609 break;
2610 case BFD_RELOC_PPC64_PLTGOT16:
2611 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2612 break;
2613 case BFD_RELOC_PPC64_PLTGOT16_LO:
2614 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2615 break;
cdba85ec
AM		 2616 case BFD_RELOC_PPC_DTPREL16:
2617 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2618 break;
2619 case BFD_RELOC_PPC_DTPREL16_LO:
2620 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2621 break;
2622 case BFD_RELOC_PPC_TPREL16:
2623 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2624 break;
2625 case BFD_RELOC_PPC_TPREL16_LO:
2626 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2627 break;
2628 case BFD_RELOC_PPC_GOT_DTPREL16:
2629 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2630 case BFD_RELOC_PPC_GOT_TPREL16:
2631 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2632 break;
0baf16f2
AM		 2633 default:
2634 as_bad (_("unsupported relocation for DS offset field"));
2635 break;
2636 }
2637 }
2638
252b5132
RH		 2639 /* We need to generate a fixup for this expression. */
2640 if (fc >= MAX_INSN_FIXUPS)
2641 as_fatal (_("too many fixups"));
2642 fixups[fc].exp = ex;
2643 fixups[fc].opindex = 0;
2644 fixups[fc].reloc = reloc;
2645 ++fc;
2646 }
2647#endif /* OBJ_ELF */
2648
2649 else
2650 {
2651 /* We need to generate a fixup for this expression. */
2652 if (fc >= MAX_INSN_FIXUPS)
2653 as_fatal (_("too many fixups"));
2654 fixups[fc].exp = ex;
2655 fixups[fc].opindex = *opindex_ptr;
2656 fixups[fc].reloc = BFD_RELOC_UNUSED;
2657 ++fc;
2658 }
2659
2660 if (need_paren)
2661 {
2662 endc = ')';
2663 need_paren = 0;
c3d65c1c
BE		 2664 /* If expecting more operands, then we want to see "),". */
2665 if (*str == endc && opindex_ptr[1] != 0)
2666 {
2667 do
2668 ++str;
2669 while (ISSPACE (*str));
2670 endc = ',';
2671 }
252b5132
RH		 2672 }
2673 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2674 {
2675 endc = '(';
2676 need_paren = 1;
2677 }
2678 else
2679 endc = ',';
2680
2681 /* The call to expression should have advanced str past any
2682 whitespace. */
2683 if (*str != endc
2684 && (endc != ',' || *str != '\0'))
2685 {
2686 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2687 break;
2688 }
2689
2690 if (*str != '\0')
2691 ++str;
2692 }
2693
3882b010 2694 while (ISSPACE (*str))
252b5132
RH		 2695 ++str;
2696
2697 if (*str != '\0')
2698 as_bad (_("junk at end of line: `%s'"), str);
2699
dc1d03fc 2700#ifdef OBJ_ELF
6a0c61b7
EZ		 2701 /* Do we need/want a APUinfo section? */
2702 if (ppc_cpu & (PPC_OPCODE_SPE
2703 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2704 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2705 | PPC_OPCODE_RFMCI))
2706 {
2707 /* These are all version "1". */
2708 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2709 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2710 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2711 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2712 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2713 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2714 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2715 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2716 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2717 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2718 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2719 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2720 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2721 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2722 }
dc1d03fc 2723#endif
6a0c61b7 2724
252b5132
RH		 2725 /* Write out the instruction. */
2726 f = frag_more (4);
09b935ac
AM		 2727 addr_mod = frag_now_fix () & 3;
2728 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2729 as_bad (_("instruction address is not a multiple of 4"));
2730 frag_now->insn_addr = addr_mod;
2731 frag_now->has_code = 1;
252b5132
RH		 2732 md_number_to_chars (f, insn, 4);
2733
5d6f4f16
GK		 2734#ifdef OBJ_ELF
2735 dwarf2_emit_insn (4);
2736#endif
2737
252b5132
RH		 2738 /* Create any fixups. At this point we do not use a
2739 bfd_reloc_code_real_type, but instead just use the
2740 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2741 handle fixups for any operand type, although that is admittedly
2742 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2743 md_apply_fix. */
252b5132
RH		 2744 for (i = 0; i < fc; i++)
2745 {
2746 const struct powerpc_operand *operand;
2747
2748 operand = &powerpc_operands[fixups[i].opindex];
2749 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2750 {
99a814a1 2751 reloc_howto_type *reloc_howto;
252b5132
RH		 2752 int size;
2753 int offset;
2754 fixS *fixP;
2755
99a814a1 2756 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2757 if (!reloc_howto)
2758 abort ();
2759
2760 size = bfd_get_reloc_size (reloc_howto);
2761 offset = target_big_endian ? (4 - size) : 0;
2762
2763 if (size < 1 || size > 4)
bc805888 2764 abort ();
252b5132 2765
99a814a1
AM		 2766 fixP = fix_new_exp (frag_now,
2767 f - frag_now->fr_literal + offset,
2768 size,
2769 &fixups[i].exp,
2770 reloc_howto->pc_relative,
252b5132
RH		 2771 fixups[i].reloc);
2772
2773 /* Turn off complaints that the addend is too large for things like
2774 foo+100000@ha. */
2775 switch (fixups[i].reloc)
2776 {
2777 case BFD_RELOC_16_GOTOFF:
2778 case BFD_RELOC_PPC_TOC16:
2779 case BFD_RELOC_LO16:
2780 case BFD_RELOC_HI16:
2781 case BFD_RELOC_HI16_S:
0baf16f2 2782#ifdef OBJ_ELF
0baf16f2
AM		 2783 case BFD_RELOC_PPC64_HIGHER:
2784 case BFD_RELOC_PPC64_HIGHER_S:
2785 case BFD_RELOC_PPC64_HIGHEST:
2786 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2787#endif
252b5132
RH		 2788 fixP->fx_no_overflow = 1;
2789 break;
2790 default:
2791 break;
2792 }
2793 }
2794 else
99a814a1
AM		 2795 fix_new_exp (frag_now,
2796 f - frag_now->fr_literal,
2797 4,
252b5132
RH		 2798 &fixups[i].exp,
2799 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2800 ((bfd_reloc_code_real_type)
99a814a1 2801 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH		 2802 }
2803}
2804
2805/* Handle a macro. Gather all the operands, transform them as
2806 described by the macro, and call md_assemble recursively. All the
2807 operands are separated by commas; we don't accept parentheses
2808 around operands here. */
2809
2810static void
98027b10 2811ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 2812{
2813 char *operands[10];
2814 unsigned int count;
2815 char *s;
2816 unsigned int len;
2817 const char *format;
db557034 2818 unsigned int arg;
252b5132
RH		 2819 char *send;
2820 char *complete;
2821
2822 /* Gather the users operands into the operands array. */
2823 count = 0;
2824 s = str;
2825 while (1)
2826 {
2827 if (count >= sizeof operands / sizeof operands[0])
2828 break;
2829 operands[count++] = s;
2830 s = strchr (s, ',');
2831 if (s == (char *) NULL)
2832 break;
2833 *s++ = '\0';
81d4177b 2834 }
252b5132
RH		 2835
2836 if (count != macro->operands)
2837 {
2838 as_bad (_("wrong number of operands"));
2839 return;
2840 }
2841
2842 /* Work out how large the string must be (the size is unbounded
2843 because it includes user input). */
2844 len = 0;
2845 format = macro->format;
2846 while (*format != '\0')
2847 {
2848 if (*format != '%')
2849 {
2850 ++len;
2851 ++format;
2852 }
2853 else
2854 {
2855 arg = strtol (format + 1, &send, 10);
db557034 2856 know (send != format && arg < count);
252b5132
RH		 2857 len += strlen (operands[arg]);
2858 format = send;
2859 }
2860 }
2861
2862 /* Put the string together. */
2863 complete = s = (char *) alloca (len + 1);
2864 format = macro->format;
2865 while (*format != '\0')
2866 {
2867 if (*format != '%')
2868 *s++ = *format++;
2869 else
2870 {
2871 arg = strtol (format + 1, &send, 10);
2872 strcpy (s, operands[arg]);
2873 s += strlen (s);
2874 format = send;
2875 }
2876 }
2877 *s = '\0';
2878
2879 /* Assemble the constructed instruction. */
2880 md_assemble (complete);
81d4177b 2881}
252b5132
RH		 2882\f
2883#ifdef OBJ_ELF
99a814a1 2884/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH		 2885
2886int
98027b10 2887ppc_section_letter (int letter, char **ptr_msg)
252b5132
RH		 2888{
2889 if (letter == 'e')
2890 return SHF_EXCLUDE;
2891
13ae64f3 2892 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 2893 return -1;
252b5132
RH		 2894}
2895
2896int
98027b10 2897ppc_section_word (char *str, size_t len)
252b5132 2898{
9de8d8f1
RH		 2899 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2900 return SHF_EXCLUDE;
252b5132 2901
9de8d8f1 2902 return -1;
252b5132
RH		 2903}
2904
2905int
98027b10 2906ppc_section_type (char *str, size_t len)
252b5132 2907{
9de8d8f1
RH		 2908 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2909 return SHT_ORDERED;
252b5132 2910
9de8d8f1 2911 return -1;
252b5132
RH		 2912}
2913
2914int
98027b10 2915ppc_section_flags (int flags, int attr, int type)
252b5132
RH		 2916{
2917 if (type == SHT_ORDERED)
2918 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2919
2920 if (attr & SHF_EXCLUDE)
2921 flags |= SEC_EXCLUDE;
2922
2923 return flags;
2924}
2925#endif /* OBJ_ELF */
2926
2927\f
2928/* Pseudo-op handling. */
2929
2930/* The .byte pseudo-op. This is similar to the normal .byte
2931 pseudo-op, but it can also take a single ASCII string. */
2932
2933static void
98027b10 2934ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 2935{
2936 if (*input_line_pointer != '\"')
2937 {
2938 cons (1);
2939 return;
2940 }
2941
2942 /* Gather characters. A real double quote is doubled. Unusual
2943 characters are not permitted. */
2944 ++input_line_pointer;
2945 while (1)
2946 {
2947 char c;
2948
2949 c = *input_line_pointer++;
2950
2951 if (c == '\"')
2952 {
2953 if (*input_line_pointer != '\"')
2954 break;
2955 ++input_line_pointer;
2956 }
2957
2958 FRAG_APPEND_1_CHAR (c);
2959 }
2960
2961 demand_empty_rest_of_line ();
2962}
2963\f
2964#ifdef OBJ_XCOFF
2965
2966/* XCOFF specific pseudo-op handling. */
2967
2968/* This is set if we are creating a .stabx symbol, since we don't want
2969 to handle symbol suffixes for such symbols. */
b34976b6 2970static bfd_boolean ppc_stab_symbol;
252b5132
RH		 2971
2972/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
2973 symbols in the .bss segment as though they were local common
67c1ffbe 2974 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 2975 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 2976
2977static void
98027b10 2978ppc_comm (int lcomm)
252b5132
RH		 2979{
2980 asection *current_seg = now_seg;
2981 subsegT current_subseg = now_subseg;
2982 char *name;
2983 char endc;
2984 char *end_name;
2985 offsetT size;
2986 offsetT align;
2987 symbolS *lcomm_sym = NULL;
2988 symbolS *sym;
2989 char *pfrag;
2990
2991 name = input_line_pointer;
2992 endc = get_symbol_end ();
2993 end_name = input_line_pointer;
2994 *end_name = endc;
2995
2996 if (*input_line_pointer != ',')
2997 {
2998 as_bad (_("missing size"));
2999 ignore_rest_of_line ();
3000 return;
3001 }
3002 ++input_line_pointer;
3003
3004 size = get_absolute_expression ();
3005 if (size < 0)
3006 {
3007 as_bad (_("negative size"));
3008 ignore_rest_of_line ();
3009 return;
3010 }
3011
3012 if (! lcomm)
3013 {
3014 /* The third argument to .comm is the alignment. */
3015 if (*input_line_pointer != ',')
1ad63b2f 3016 align = 2;
252b5132
RH		 3017 else
3018 {
3019 ++input_line_pointer;
3020 align = get_absolute_expression ();
3021 if (align <= 0)
3022 {
3023 as_warn (_("ignoring bad alignment"));
1ad63b2f 3024 align = 2;
252b5132
RH		 3025 }
3026 }
3027 }
3028 else
3029 {
3030 char *lcomm_name;
3031 char lcomm_endc;
3032
1ad63b2f 3033 if (size <= 4)
252b5132
RH		 3034 align = 2;
3035 else
3036 align = 3;
3037
3038 /* The third argument to .lcomm appears to be the real local
3039 common symbol to create. References to the symbol named in
3040 the first argument are turned into references to the third
3041 argument. */
3042 if (*input_line_pointer != ',')
3043 {
3044 as_bad (_("missing real symbol name"));
3045 ignore_rest_of_line ();
3046 return;
3047 }
3048 ++input_line_pointer;
3049
3050 lcomm_name = input_line_pointer;
3051 lcomm_endc = get_symbol_end ();
81d4177b 3052
252b5132
RH		 3053 lcomm_sym = symbol_find_or_make (lcomm_name);
3054
3055 *input_line_pointer = lcomm_endc;
3056 }
3057
3058 *end_name = '\0';
3059 sym = symbol_find_or_make (name);
3060 *end_name = endc;
3061
3062 if (S_IS_DEFINED (sym)
3063 || S_GET_VALUE (sym) != 0)
3064 {
3065 as_bad (_("attempt to redefine symbol"));
3066 ignore_rest_of_line ();
3067 return;
3068 }
81d4177b 3069
252b5132 3070 record_alignment (bss_section, align);
81d4177b 3071
252b5132
RH		 3072 if (! lcomm
3073 || ! S_IS_DEFINED (lcomm_sym))
3074 {
3075 symbolS *def_sym;
3076 offsetT def_size;
3077
3078 if (! lcomm)
3079 {
3080 def_sym = sym;
3081 def_size = size;
3082 S_SET_EXTERNAL (sym);
3083 }
3084 else
3085 {
809ffe0d 3086 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3087 def_sym = lcomm_sym;
3088 def_size = 0;
3089 }
3090
3091 subseg_set (bss_section, 1);
3092 frag_align (align, 0, 0);
81d4177b 3093
809ffe0d 3094 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3095 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3096 def_size, (char *) NULL);
3097 *pfrag = 0;
3098 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3099 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3100 }
3101 else if (lcomm)
3102 {
3103 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3104 symbol_get_frag (lcomm_sym)->fr_offset =
3105 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3106 &~ ((1 << align) - 1));
809ffe0d
ILT		 3107 if (align > symbol_get_tc (lcomm_sym)->align)
3108 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3109 }
3110
3111 if (lcomm)
3112 {
3113 /* Make sym an offset from lcomm_sym. */
3114 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3115 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3116 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3117 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3118 }
3119
3120 subseg_set (current_seg, current_subseg);
3121
3122 demand_empty_rest_of_line ();
3123}
3124
3125/* The .csect pseudo-op. This switches us into a different
3126 subsegment. The first argument is a symbol whose value is the
3127 start of the .csect. In COFF, csect symbols get special aux
3128 entries defined by the x_csect field of union internal_auxent. The
3129 optional second argument is the alignment (the default is 2). */
3130
3131static void
98027b10 3132ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3133{
3134 char *name;
3135 char endc;
3136 symbolS *sym;
931e13a6 3137 offsetT align;
252b5132
RH		 3138
3139 name = input_line_pointer;
3140 endc = get_symbol_end ();
81d4177b 3141
252b5132
RH		 3142 sym = symbol_find_or_make (name);
3143
3144 *input_line_pointer = endc;
3145
3146 if (S_GET_NAME (sym)[0] == '\0')
3147 {
3148 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3149 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH		 3150 }
3151
931e13a6 3152 align = 2;
252b5132
RH		 3153 if (*input_line_pointer == ',')
3154 {
3155 ++input_line_pointer;
931e13a6 3156 align = get_absolute_expression ();
252b5132
RH		 3157 }
3158
931e13a6
AM		 3159 ppc_change_csect (sym, align);
3160
252b5132
RH		 3161 demand_empty_rest_of_line ();
3162}
3163
3164/* Change to a different csect. */
3165
3166static void
98027b10 3167ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3168{
3169 if (S_IS_DEFINED (sym))
809ffe0d 3170 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3171 else
3172 {
3173 symbolS **list_ptr;
3174 int after_toc;
3175 int hold_chunksize;
3176 symbolS *list;
931e13a6
AM		 3177 int is_code;
3178 segT sec;
252b5132
RH		 3179
3180 /* This is a new csect. We need to look at the symbol class to
3181 figure out whether it should go in the text section or the
3182 data section. */
3183 after_toc = 0;
931e13a6 3184 is_code = 0;
809ffe0d 3185 switch (symbol_get_tc (sym)->class)
252b5132
RH		 3186 {
3187 case XMC_PR:
3188 case XMC_RO:
3189 case XMC_DB:
3190 case XMC_GL:
3191 case XMC_XO:
3192 case XMC_SV:
3193 case XMC_TI:
3194 case XMC_TB:
3195 S_SET_SEGMENT (sym, text_section);
809ffe0d 3196 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3197 ++ppc_text_subsegment;
3198 list_ptr = &ppc_text_csects;
931e13a6 3199 is_code = 1;
252b5132
RH		 3200 break;
3201 case XMC_RW:
3202 case XMC_TC0:
3203 case XMC_TC:
3204 case XMC_DS:
3205 case XMC_UA:
3206 case XMC_BS:
3207 case XMC_UC:
3208 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3209 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3210 == ppc_data_subsegment))
252b5132
RH		 3211 after_toc = 1;
3212 S_SET_SEGMENT (sym, data_section);
809ffe0d 3213 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3214 ++ppc_data_subsegment;
3215 list_ptr = &ppc_data_csects;
3216 break;
3217 default:
3218 abort ();
3219 }
3220
3221 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3222 changing subsegments, so that we don't use a lot of memory
3223 space for what may be a small section. */
252b5132
RH		 3224 hold_chunksize = chunksize;
3225 chunksize = 64;
3226
931e13a6
AM		 3227 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3228 symbol_get_tc (sym)->subseg);
252b5132
RH		 3229
3230 chunksize = hold_chunksize;
3231
3232 if (after_toc)
3233 ppc_after_toc_frag = frag_now;
3234
931e13a6
AM		 3235 record_alignment (sec, align);
3236 if (is_code)
3237 frag_align_code (align, 0);
3238 else
3239 frag_align (align, 0, 0);
3240
809ffe0d 3241 symbol_set_frag (sym, frag_now);
252b5132
RH		 3242 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3243
931e13a6 3244 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3245 symbol_get_tc (sym)->output = 1;
3246 symbol_get_tc (sym)->within = sym;
81d4177b 3247
252b5132 3248 for (list = *list_ptr;
809ffe0d
ILT		 3249 symbol_get_tc (list)->next != (symbolS *) NULL;
3250 list = symbol_get_tc (list)->next)
252b5132 3251 ;
809ffe0d 3252 symbol_get_tc (list)->next = sym;
81d4177b 3253
252b5132 3254 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3255 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3256 &symbol_lastP);
252b5132
RH		 3257 }
3258
3259 ppc_current_csect = sym;
3260}
3261
3262/* This function handles the .text and .data pseudo-ops. These
3263 pseudo-ops aren't really used by XCOFF; we implement them for the
3264 convenience of people who aren't used to XCOFF. */
3265
3266static void
98027b10 3267ppc_section (int type)
252b5132
RH		 3268{
3269 const char *name;
3270 symbolS *sym;
3271
3272 if (type == 't')
3273 name = ".text[PR]";
3274 else if (type == 'd')
3275 name = ".data[RW]";
3276 else
3277 abort ();
3278
3279 sym = symbol_find_or_make (name);
3280
931e13a6 3281 ppc_change_csect (sym, 2);
252b5132
RH		 3282
3283 demand_empty_rest_of_line ();
3284}
3285
3286/* This function handles the .section pseudo-op. This is mostly to
3287 give an error, since XCOFF only supports .text, .data and .bss, but
3288 we do permit the user to name the text or data section. */
3289
3290static void
98027b10 3291ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3292{
3293 char *user_name;
3294 const char *real_name;
3295 char c;
3296 symbolS *sym;
3297
3298 user_name = input_line_pointer;
3299 c = get_symbol_end ();
3300
3301 if (strcmp (user_name, ".text") == 0)
3302 real_name = ".text[PR]";
3303 else if (strcmp (user_name, ".data") == 0)
3304 real_name = ".data[RW]";
3305 else
3306 {
3307 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3308 *input_line_pointer = c;
3309 ignore_rest_of_line ();
3310 return;
3311 }
3312
3313 *input_line_pointer = c;
3314
3315 sym = symbol_find_or_make (real_name);
3316
931e13a6 3317 ppc_change_csect (sym, 2);
252b5132
RH		 3318
3319 demand_empty_rest_of_line ();
3320}
3321
3322/* The .extern pseudo-op. We create an undefined symbol. */
3323
3324static void
98027b10 3325ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3326{
3327 char *name;
3328 char endc;
3329
3330 name = input_line_pointer;
3331 endc = get_symbol_end ();
3332
3333 (void) symbol_find_or_make (name);
3334
3335 *input_line_pointer = endc;
3336
3337 demand_empty_rest_of_line ();
3338}
3339
3340/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3341
3342static void
98027b10 3343ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3344{
3345 char *name;
3346 char endc;
3347 symbolS *sym;
3348
3349 name = input_line_pointer;
3350 endc = get_symbol_end ();
3351
3352 sym = symbol_find_or_make (name);
3353
3354 *input_line_pointer = endc;
3355
809ffe0d 3356 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3357
3358 demand_empty_rest_of_line ();
3359}
3360
3361/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3362 although I don't know why it bothers. */
3363
3364static void
98027b10 3365ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3366{
3367 char *name;
3368 char endc;
3369 symbolS *sym;
3370 int len;
3371
3372 name = input_line_pointer;
3373 endc = get_symbol_end ();
3374
3375 sym = symbol_find_or_make (name);
3376
3377 *input_line_pointer = endc;
3378
3379 if (*input_line_pointer != ',')
3380 {
3381 as_bad (_("missing rename string"));
3382 ignore_rest_of_line ();
3383 return;
3384 }
3385 ++input_line_pointer;
3386
809ffe0d 3387 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3388
3389 demand_empty_rest_of_line ();
3390}
3391
3392/* The .stabx pseudo-op. This is similar to a normal .stabs
3393 pseudo-op, but slightly different. A sample is
3394 .stabx "main:F-1",.main,142,0
3395 The first argument is the symbol name to create. The second is the
3396 value, and the third is the storage class. The fourth seems to be
3397 always zero, and I am assuming it is the type. */
3398
3399static void
98027b10 3400ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3401{
3402 char *name;
3403 int len;
3404 symbolS *sym;
3405 expressionS exp;
3406
3407 name = demand_copy_C_string (&len);
3408
3409 if (*input_line_pointer != ',')
3410 {
3411 as_bad (_("missing value"));
3412 return;
3413 }
3414 ++input_line_pointer;
3415
b34976b6 3416 ppc_stab_symbol = TRUE;
252b5132 3417 sym = symbol_make (name);
b34976b6 3418 ppc_stab_symbol = FALSE;
252b5132 3419
809ffe0d 3420 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3421
3422 (void) expression (&exp);
3423
3424 switch (exp.X_op)
3425 {
3426 case O_illegal:
3427 case O_absent:
3428 case O_big:
3429 as_bad (_("illegal .stabx expression; zero assumed"));
3430 exp.X_add_number = 0;
3431 /* Fall through. */
3432 case O_constant:
3433 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3434 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3435 break;
3436
3437 case O_symbol:
3438 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3439 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3440 else
3441 {
3442 S_SET_VALUE (sym,
3443 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3444 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3445 }
3446 break;
3447
3448 default:
3449 /* The value is some complex expression. This will probably
99a814a1
AM		 3450 fail at some later point, but this is probably the right
3451 thing to do here. */
809ffe0d 3452 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3453 break;
3454 }
3455
3456 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3457 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3458
3459 if (*input_line_pointer != ',')
3460 {
3461 as_bad (_("missing class"));
3462 return;
3463 }
3464 ++input_line_pointer;
3465
3466 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3467
3468 if (*input_line_pointer != ',')
3469 {
3470 as_bad (_("missing type"));
3471 return;
3472 }
3473 ++input_line_pointer;
3474
3475 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3476
809ffe0d 3477 symbol_get_tc (sym)->output = 1;
252b5132 3478
6877bb43 3479 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3480
809ffe0d 3481 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3482
41ea10b1 3483 /* In this case :
99a814a1 3484
41ea10b1
TR		 3485 .bs name
3486 .stabx "z",arrays_,133,0
3487 .es
99a814a1 3488
41ea10b1 3489 .comm arrays_,13768,3
99a814a1 3490
41ea10b1
TR		 3491 resolve_symbol_value will copy the exp's "within" into sym's when the
3492 offset is 0. Since this seems to be corner case problem,
3493 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3494 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3495
3496 if (exp.X_op == O_symbol)
41ea10b1
TR		 3497 {
3498 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3499 }
6877bb43 3500 }
99a814a1 3501
252b5132
RH		 3502 if (exp.X_op != O_symbol
3503 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3504 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3505 ppc_frob_label (sym);
3506 else
3507 {
3508 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3509 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3510 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3511 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3512 }
3513
3514 demand_empty_rest_of_line ();
3515}
3516
3517/* The .function pseudo-op. This takes several arguments. The first
3518 argument seems to be the external name of the symbol. The second
67c1ffbe 3519 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3520 uses the same name for both. I have no idea what the third and
3521 fourth arguments are meant to be. The optional fifth argument is
3522 an expression for the size of the function. In COFF this symbol
3523 gets an aux entry like that used for a csect. */
3524
3525static void
98027b10 3526ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3527{
3528 char *name;
3529 char endc;
3530 char *s;
3531 symbolS *ext_sym;
3532 symbolS *lab_sym;
3533
3534 name = input_line_pointer;
3535 endc = get_symbol_end ();
3536
3537 /* Ignore any [PR] suffix. */
3538 name = ppc_canonicalize_symbol_name (name);
3539 s = strchr (name, '[');
3540 if (s != (char *) NULL
3541 && strcmp (s + 1, "PR]") == 0)
3542 *s = '\0';
3543
3544 ext_sym = symbol_find_or_make (name);
3545
3546 *input_line_pointer = endc;
3547
3548 if (*input_line_pointer != ',')
3549 {
3550 as_bad (_("missing symbol name"));
3551 ignore_rest_of_line ();
3552 return;
3553 }
3554 ++input_line_pointer;
3555
3556 name = input_line_pointer;
3557 endc = get_symbol_end ();
3558
3559 lab_sym = symbol_find_or_make (name);
3560
3561 *input_line_pointer = endc;
3562
3563 if (ext_sym != lab_sym)
3564 {
809ffe0d
ILT		 3565 expressionS exp;
3566
3567 exp.X_op = O_symbol;
3568 exp.X_add_symbol = lab_sym;
3569 exp.X_op_symbol = NULL;
3570 exp.X_add_number = 0;
3571 exp.X_unsigned = 0;
3572 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3573 }
3574
809ffe0d
ILT		 3575 if (symbol_get_tc (ext_sym)->class == -1)
3576 symbol_get_tc (ext_sym)->class = XMC_PR;
3577 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3578
3579 if (*input_line_pointer == ',')
3580 {
3581 expressionS ignore;
3582
3583 /* Ignore the third argument. */
3584 ++input_line_pointer;
3585 expression (&ignore);
3586 if (*input_line_pointer == ',')
3587 {
3588 /* Ignore the fourth argument. */
3589 ++input_line_pointer;
3590 expression (&ignore);
3591 if (*input_line_pointer == ',')
3592 {
3593 /* The fifth argument is the function size. */
3594 ++input_line_pointer;
809ffe0d
ILT		 3595 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3596 absolute_section,
3597 (valueT) 0,
3598 &zero_address_frag);
3599 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3600 }
3601 }
3602 }
3603
3604 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3605 SF_SET_FUNCTION (ext_sym);
3606 SF_SET_PROCESS (ext_sym);
3607 coff_add_linesym (ext_sym);
3608
3609 demand_empty_rest_of_line ();
3610}
3611
3612/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3613 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3614 with the correct line number */
5d6255fe 3615
8642cce8 3616static symbolS *saved_bi_sym = 0;
252b5132
RH		 3617
3618static void
98027b10 3619ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3620{
3621 symbolS *sym;
3622
3623 sym = symbol_make (".bf");
3624 S_SET_SEGMENT (sym, text_section);
809ffe0d 3625 symbol_set_frag (sym, frag_now);
252b5132
RH		 3626 S_SET_VALUE (sym, frag_now_fix ());
3627 S_SET_STORAGE_CLASS (sym, C_FCN);
3628
3629 coff_line_base = get_absolute_expression ();
3630
3631 S_SET_NUMBER_AUXILIARY (sym, 1);
3632 SA_SET_SYM_LNNO (sym, coff_line_base);
3633
8642cce8 3634 /* Line number for bi. */
5d6255fe 3635 if (saved_bi_sym)
8642cce8
TR		 3636 {
3637 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3638 saved_bi_sym = 0;
3639 }
5d6255fe 3640
8642cce8 3641
809ffe0d 3642 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3643
3644 ppc_frob_label (sym);
3645
3646 demand_empty_rest_of_line ();
3647}
3648
3649/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3650 ".ef", except that the line number is absolute, not relative to the
3651 most recent ".bf" symbol. */
3652
3653static void
98027b10 3654ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3655{
3656 symbolS *sym;
3657
3658 sym = symbol_make (".ef");
3659 S_SET_SEGMENT (sym, text_section);
809ffe0d 3660 symbol_set_frag (sym, frag_now);
252b5132
RH		 3661 S_SET_VALUE (sym, frag_now_fix ());
3662 S_SET_STORAGE_CLASS (sym, C_FCN);
3663 S_SET_NUMBER_AUXILIARY (sym, 1);
3664 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3665 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3666
3667 ppc_frob_label (sym);
3668
3669 demand_empty_rest_of_line ();
3670}
3671
3672/* The .bi and .ei pseudo-ops. These take a string argument and
3673 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3674 the symbol list. The value of .bi will be know when the next .bf
3675 is encountered. */
252b5132
RH		 3676
3677static void
98027b10 3678ppc_biei (int ei)
252b5132
RH		 3679{
3680 static symbolS *last_biei;
3681
3682 char *name;
3683 int len;
3684 symbolS *sym;
3685 symbolS *look;
3686
3687 name = demand_copy_C_string (&len);
3688
3689 /* The value of these symbols is actually file offset. Here we set
3690 the value to the index into the line number entries. In
3691 ppc_frob_symbols we set the fix_line field, which will cause BFD
3692 to do the right thing. */
3693
3694 sym = symbol_make (name);
3695 /* obj-coff.c currently only handles line numbers correctly in the
3696 .text section. */
3697 S_SET_SEGMENT (sym, text_section);
3698 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3699 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3700
3701 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3702 symbol_get_tc (sym)->output = 1;
81d4177b 3703
8642cce8 3704 /* Save bi. */
5d6255fe 3705 if (ei)
8642cce8
TR		 3706 saved_bi_sym = 0;
3707 else
3708 saved_bi_sym = sym;
3709
252b5132
RH		 3710 for (look = last_biei ? last_biei : symbol_rootP;
3711 (look != (symbolS *) NULL
3712 && (S_GET_STORAGE_CLASS (look) == C_FILE
3713 || S_GET_STORAGE_CLASS (look) == C_BINCL
3714 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3715 look = symbol_next (look))
3716 ;
3717 if (look != (symbolS *) NULL)
3718 {
3719 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3720 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3721 last_biei = sym;
3722 }
3723
3724 demand_empty_rest_of_line ();
3725}
3726
3727/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3728 There is one argument, which is a csect symbol. The value of the
3729 .bs symbol is the index of this csect symbol. */
3730
3731static void
98027b10 3732ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3733{
3734 char *name;
3735 char endc;
3736 symbolS *csect;
3737 symbolS *sym;
3738
3739 if (ppc_current_block != NULL)
3740 as_bad (_("nested .bs blocks"));
3741
3742 name = input_line_pointer;
3743 endc = get_symbol_end ();
3744
3745 csect = symbol_find_or_make (name);
3746
3747 *input_line_pointer = endc;
3748
3749 sym = symbol_make (".bs");
3750 S_SET_SEGMENT (sym, now_seg);
3751 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3752 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3753 symbol_get_tc (sym)->output = 1;
252b5132 3754
809ffe0d 3755 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3756
3757 ppc_frob_label (sym);
3758
3759 ppc_current_block = sym;
3760
3761 demand_empty_rest_of_line ();
3762}
3763
3764/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3765
3766static void
98027b10 3767ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3768{
3769 symbolS *sym;
3770
3771 if (ppc_current_block == NULL)
3772 as_bad (_(".es without preceding .bs"));
3773
3774 sym = symbol_make (".es");
3775 S_SET_SEGMENT (sym, now_seg);
3776 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3777 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3778 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3779
3780 ppc_frob_label (sym);
3781
3782 ppc_current_block = NULL;
3783
3784 demand_empty_rest_of_line ();
3785}
3786
3787/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3788 line number. */
3789
3790static void
98027b10 3791ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3792{
3793 symbolS *sym;
3794
3795 sym = symbol_make (".bb");
3796 S_SET_SEGMENT (sym, text_section);
809ffe0d 3797 symbol_set_frag (sym, frag_now);
252b5132
RH		 3798 S_SET_VALUE (sym, frag_now_fix ());
3799 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3800
3801 S_SET_NUMBER_AUXILIARY (sym, 1);
3802 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3803
809ffe0d 3804 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3805
3806 SF_SET_PROCESS (sym);
3807
3808 ppc_frob_label (sym);
3809
3810 demand_empty_rest_of_line ();
3811}
3812
3813/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3814 line number. */
3815
3816static void
98027b10 3817ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3818{
3819 symbolS *sym;
3820
3821 sym = symbol_make (".eb");
3822 S_SET_SEGMENT (sym, text_section);
809ffe0d 3823 symbol_set_frag (sym, frag_now);
252b5132
RH		 3824 S_SET_VALUE (sym, frag_now_fix ());
3825 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3826 S_SET_NUMBER_AUXILIARY (sym, 1);
3827 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3828 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3829
3830 SF_SET_PROCESS (sym);
3831
3832 ppc_frob_label (sym);
3833
3834 demand_empty_rest_of_line ();
3835}
3836
3837/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3838 specified name. */
3839
3840static void
98027b10 3841ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3842{
3843 char *name;
3844 int len;
3845 symbolS *sym;
3846
3847 name = demand_copy_C_string (&len);
3848 sym = symbol_make (name);
3849 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3850 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3851 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3852 S_SET_VALUE (sym, 0);
809ffe0d 3853 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3854
3855 ppc_frob_label (sym);
3856
3857 demand_empty_rest_of_line ();
3858}
3859
3860/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3861
3862static void
98027b10 3863ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3864{
3865 symbolS *sym;
3866
3867 sym = symbol_make (".ec");
3868 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3869 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3870 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3871 S_SET_VALUE (sym, 0);
809ffe0d 3872 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3873
3874 ppc_frob_label (sym);
3875
3876 demand_empty_rest_of_line ();
3877}
3878
3879/* The .toc pseudo-op. Switch to the .toc subsegment. */
3880
3881static void
98027b10 3882ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3883{
3884 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3885 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 3886 else
3887 {
3888 subsegT subseg;
3889 symbolS *sym;
3890 symbolS *list;
81d4177b 3891
252b5132
RH		 3892 subseg = ppc_data_subsegment;
3893 ++ppc_data_subsegment;
3894
3895 subseg_new (segment_name (data_section), subseg);
3896 ppc_toc_frag = frag_now;
3897
3898 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3899 symbol_set_frag (sym, frag_now);
252b5132
RH		 3900 S_SET_SEGMENT (sym, data_section);
3901 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3902 symbol_get_tc (sym)->subseg = subseg;
3903 symbol_get_tc (sym)->output = 1;
3904 symbol_get_tc (sym)->within = sym;
252b5132
RH		 3905
3906 ppc_toc_csect = sym;
81d4177b 3907
252b5132 3908 for (list = ppc_data_csects;
809ffe0d
ILT		 3909 symbol_get_tc (list)->next != (symbolS *) NULL;
3910 list = symbol_get_tc (list)->next)
252b5132 3911 ;
809ffe0d 3912 symbol_get_tc (list)->next = sym;
252b5132
RH		 3913
3914 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3915 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3916 &symbol_lastP);
252b5132
RH		 3917 }
3918
3919 ppc_current_csect = ppc_toc_csect;
3920
3921 demand_empty_rest_of_line ();
3922}
3923
3924/* The AIX assembler automatically aligns the operands of a .long or
3925 .short pseudo-op, and we want to be compatible. */
3926
3927static void
98027b10 3928ppc_xcoff_cons (int log_size)
252b5132
RH		 3929{
3930 frag_align (log_size, 0, 0);
3931 record_alignment (now_seg, log_size);
3932 cons (1 << log_size);
3933}
3934
3935static void
98027b10 3936ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 3937{
3938 expressionS exp;
3939 int byte_count;
3940
3941 (void) expression (&exp);
3942
3943 if (exp.X_op != O_constant)
3944 {
3945 as_bad (_("non-constant byte count"));
3946 return;
3947 }
3948
3949 byte_count = exp.X_add_number;
3950
3951 if (*input_line_pointer != ',')
3952 {
3953 as_bad (_("missing value"));
3954 return;
3955 }
3956
3957 ++input_line_pointer;
3958 cons (byte_count);
3959}
3960
3961#endif /* OBJ_XCOFF */
0baf16f2 3962#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 3963\f
3964/* The .tc pseudo-op. This is used when generating either XCOFF or
3965 ELF. This takes two or more arguments.
3966
3967 When generating XCOFF output, the first argument is the name to
3968 give to this location in the toc; this will be a symbol with class
0baf16f2 3969 TC. The rest of the arguments are N-byte values to actually put at
252b5132 3970 this location in the TOC; often there is just one more argument, a
1049f94e 3971 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 3972 depends on target word size. A 32-bit target uses 4-byte values, a
3973 64-bit target uses 8-byte values.
252b5132
RH		 3974
3975 When not generating XCOFF output, the arguments are the same, but
3976 the first argument is simply ignored. */
3977
3978static void
98027b10 3979ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3980{
3981#ifdef OBJ_XCOFF
3982
3983 /* Define the TOC symbol name. */
3984 {
3985 char *name;
3986 char endc;
3987 symbolS *sym;
3988
3989 if (ppc_toc_csect == (symbolS *) NULL
3990 || ppc_toc_csect != ppc_current_csect)
3991 {
3992 as_bad (_(".tc not in .toc section"));
3993 ignore_rest_of_line ();
3994 return;
3995 }
3996
3997 name = input_line_pointer;
3998 endc = get_symbol_end ();
3999
4000 sym = symbol_find_or_make (name);
4001
4002 *input_line_pointer = endc;
4003
4004 if (S_IS_DEFINED (sym))
4005 {
4006 symbolS *label;
4007
809ffe0d
ILT		 4008 label = symbol_get_tc (ppc_current_csect)->within;
4009 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH		 4010 {
4011 as_bad (_(".tc with no label"));
4012 ignore_rest_of_line ();
4013 return;
4014 }
4015
4016 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4017 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4018 S_SET_VALUE (label, S_GET_VALUE (sym));
4019
4020 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4021 ++input_line_pointer;
4022
4023 return;
4024 }
4025
4026 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4027 symbol_set_frag (sym, frag_now);
252b5132 4028 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4029 symbol_get_tc (sym)->class = XMC_TC;
4030 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4031
4032 ppc_frob_label (sym);
4033 }
4034
0baf16f2
AM		 4035#endif /* OBJ_XCOFF */
4036#ifdef OBJ_ELF
9c7977b3 4037 int align;
252b5132
RH		 4038
4039 /* Skip the TOC symbol name. */
4040 while (is_part_of_name (*input_line_pointer)
4041 || *input_line_pointer == '['
4042 || *input_line_pointer == ']'
4043 || *input_line_pointer == '{'
4044 || *input_line_pointer == '}')
4045 ++input_line_pointer;
4046
0baf16f2 4047 /* Align to a four/eight byte boundary. */
2b3c4602 4048 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4049 frag_align (align, 0, 0);
4050 record_alignment (now_seg, align);
0baf16f2 4051#endif /* OBJ_ELF */
252b5132
RH		 4052
4053 if (*input_line_pointer != ',')
4054 demand_empty_rest_of_line ();
4055 else
4056 {
4057 ++input_line_pointer;
2b3c4602 4058 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4059 }
4060}
0baf16f2
AM		 4061
4062/* Pseudo-op .machine. */
0baf16f2
AM		 4063
4064static void
98027b10 4065ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4066{
69c040df
AM		 4067 char *cpu_string;
4068#define MAX_HISTORY 100
4069 static unsigned long *cpu_history;
4070 static int curr_hist;
4071
4072 SKIP_WHITESPACE ();
4073
4074 if (*input_line_pointer == '"')
4075 {
4076 int len;
4077 cpu_string = demand_copy_C_string (&len);
4078 }
4079 else
4080 {
4081 char c;
4082 cpu_string = input_line_pointer;
4083 c = get_symbol_end ();
4084 cpu_string = xstrdup (cpu_string);
4085 *input_line_pointer = c;
4086 }
4087
4088 if (cpu_string != NULL)
4089 {
4090 unsigned long old_cpu = ppc_cpu;
4091 char *p;
4092
4093 for (p = cpu_string; *p != 0; p++)
4094 *p = TOLOWER (*p);
4095
4096 if (strcmp (cpu_string, "push") == 0)
4097 {
4098 if (cpu_history == NULL)
4099 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4100
4101 if (curr_hist >= MAX_HISTORY)
4102 as_bad (_(".machine stack overflow"));
4103 else
4104 cpu_history[curr_hist++] = ppc_cpu;
4105 }
4106 else if (strcmp (cpu_string, "pop") == 0)
4107 {
4108 if (curr_hist <= 0)
4109 as_bad (_(".machine stack underflow"));
4110 else
4111 ppc_cpu = cpu_history[--curr_hist];
4112 }
4113 else if (parse_cpu (cpu_string))
4114 ;
4115 else
4116 as_bad (_("invalid machine `%s'"), cpu_string);
4117
4118 if (ppc_cpu != old_cpu)
4119 ppc_setup_opcodes ();
4120 }
4121
4122 demand_empty_rest_of_line ();
0baf16f2
AM		 4123}
4124
4125/* See whether a symbol is in the TOC section. */
4126
4127static int
98027b10 4128ppc_is_toc_sym (symbolS *sym)
0baf16f2
AM		 4129{
4130#ifdef OBJ_XCOFF
4131 return symbol_get_tc (sym)->class == XMC_TC;
4132#endif
4133#ifdef OBJ_ELF
4134 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4135 if (ppc_obj64)
0baf16f2
AM		 4136 return strcmp (sname, ".toc") == 0;
4137 else
4138 return strcmp (sname, ".got") == 0;
4139#endif
4140}
4141#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4142\f
4143#ifdef TE_PE
4144
99a814a1 4145/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4146
4147/* Set the current section. */
4148static void
98027b10 4149ppc_set_current_section (segT new)
252b5132
RH		 4150{
4151 ppc_previous_section = ppc_current_section;
4152 ppc_current_section = new;
4153}
4154
4155/* pseudo-op: .previous
4156 behaviour: toggles the current section with the previous section.
4157 errors: None
99a814a1
AM		 4158 warnings: "No previous section" */
4159
252b5132 4160static void
98027b10 4161ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4162{
4163 symbolS *tmp;
4164
81d4177b 4165 if (ppc_previous_section == NULL)
252b5132 4166 {
99a814a1 4167 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4168 return;
4169 }
4170
99a814a1 4171 subseg_set (ppc_previous_section, 0);
252b5132 4172
99a814a1 4173 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4174}
4175
4176/* pseudo-op: .pdata
4177 behaviour: predefined read only data section
b34976b6 4178 double word aligned
252b5132
RH		 4179 errors: None
4180 warnings: None
4181 initial: .section .pdata "adr3"
b34976b6 4182 a - don't know -- maybe a misprint
252b5132
RH		 4183 d - initialized data
4184 r - readable
4185 3 - double word aligned (that would be 4 byte boundary)
4186
4187 commentary:
4188 Tag index tables (also known as the function table) for exception
99a814a1 4189 handling, debugging, etc. */
252b5132 4190
252b5132 4191static void
98027b10 4192ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4193{
81d4177b 4194 if (pdata_section == 0)
252b5132
RH		 4195 {
4196 pdata_section = subseg_new (".pdata", 0);
81d4177b 4197
252b5132
RH		 4198 bfd_set_section_flags (stdoutput, pdata_section,
4199 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4200 | SEC_READONLY | SEC_DATA ));
81d4177b 4201
252b5132
RH		 4202 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4203 }
4204 else
4205 {
99a814a1 4206 pdata_section = subseg_new (".pdata", 0);
252b5132 4207 }
99a814a1 4208 ppc_set_current_section (pdata_section);
252b5132
RH		 4209}
4210
4211/* pseudo-op: .ydata
4212 behaviour: predefined read only data section
b34976b6 4213 double word aligned
252b5132
RH		 4214 errors: None
4215 warnings: None
4216 initial: .section .ydata "drw3"
b34976b6 4217 a - don't know -- maybe a misprint
252b5132
RH		 4218 d - initialized data
4219 r - readable
4220 3 - double word aligned (that would be 4 byte boundary)
4221 commentary:
4222 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4223 debugging, etc. */
4224
252b5132 4225static void
98027b10 4226ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4227{
81d4177b 4228 if (ydata_section == 0)
252b5132
RH		 4229 {
4230 ydata_section = subseg_new (".ydata", 0);
4231 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4232 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4233 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4234
4235 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4236 }
4237 else
4238 {
4239 ydata_section = subseg_new (".ydata", 0);
4240 }
99a814a1 4241 ppc_set_current_section (ydata_section);
252b5132
RH		 4242}
4243
4244/* pseudo-op: .reldata
4245 behaviour: predefined read write data section
b34976b6 4246 double word aligned (4-byte)
252b5132
RH		 4247 FIXME: relocation is applied to it
4248 FIXME: what's the difference between this and .data?
4249 errors: None
4250 warnings: None
4251 initial: .section .reldata "drw3"
4252 d - initialized data
4253 r - readable
4254 w - writeable
4255 3 - double word aligned (that would be 8 byte boundary)
4256
4257 commentary:
4258 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4259 function descriptors, etc. */
4260
252b5132 4261static void
98027b10 4262ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4263{
4264 if (reldata_section == 0)
4265 {
4266 reldata_section = subseg_new (".reldata", 0);
4267
4268 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4269 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4270 | SEC_DATA));
252b5132
RH		 4271
4272 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4273 }
4274 else
4275 {
4276 reldata_section = subseg_new (".reldata", 0);
4277 }
99a814a1 4278 ppc_set_current_section (reldata_section);
252b5132
RH		 4279}
4280
4281/* pseudo-op: .rdata
4282 behaviour: predefined read only data section
b34976b6 4283 double word aligned
252b5132
RH		 4284 errors: None
4285 warnings: None
4286 initial: .section .rdata "dr3"
4287 d - initialized data
4288 r - readable
99a814a1
AM		 4289 3 - double word aligned (that would be 4 byte boundary) */
4290
252b5132 4291static void
98027b10 4292ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4293{
4294 if (rdata_section == 0)
4295 {
4296 rdata_section = subseg_new (".rdata", 0);
4297 bfd_set_section_flags (stdoutput, rdata_section,
4298 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4299 | SEC_READONLY | SEC_DATA ));
4300
4301 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4302 }
4303 else
4304 {
4305 rdata_section = subseg_new (".rdata", 0);
4306 }
99a814a1 4307 ppc_set_current_section (rdata_section);
252b5132
RH		 4308}
4309
4310/* pseudo-op: .ualong
81d4177b 4311 behaviour: much like .int, with the exception that no alignment is
b34976b6 4312 performed.
252b5132
RH		 4313 FIXME: test the alignment statement
4314 errors: None
99a814a1
AM		 4315 warnings: None */
4316
252b5132 4317static void
98027b10 4318ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 4319{
99a814a1
AM		 4320 /* Try for long. */
4321 cons (4);
252b5132
RH		 4322}
4323
4324/* pseudo-op: .znop <symbol name>
4325 behaviour: Issue a nop instruction
b34976b6 4326 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4327 the supplied symbol name.
4328 errors: None
99a814a1
AM		 4329 warnings: Missing symbol name */
4330
252b5132 4331static void
98027b10 4332ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4333{
4334 unsigned long insn;
4335 const struct powerpc_opcode *opcode;
4336 expressionS ex;
4337 char *f;
252b5132 4338 symbolS *sym;
252b5132
RH		 4339 char *symbol_name;
4340 char c;
4341 char *name;
4342 unsigned int exp;
4343 flagword flags;
4344 asection *sec;
4345
99a814a1 4346 /* Strip out the symbol name. */
252b5132
RH		 4347 symbol_name = input_line_pointer;
4348 c = get_symbol_end ();
4349
4350 name = xmalloc (input_line_pointer - symbol_name + 1);
4351 strcpy (name, symbol_name);
4352
4353 sym = symbol_find_or_make (name);
4354
4355 *input_line_pointer = c;
4356
4357 SKIP_WHITESPACE ();
4358
4359 /* Look up the opcode in the hash table. */
4360 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4361
99a814a1 4362 /* Stick in the nop. */
252b5132
RH		 4363 insn = opcode->opcode;
4364
4365 /* Write out the instruction. */
4366 f = frag_more (4);
4367 md_number_to_chars (f, insn, 4);
4368 fix_new (frag_now,
4369 f - frag_now->fr_literal,
4370 4,
4371 sym,
4372 0,
4373 0,
4374 BFD_RELOC_16_GOT_PCREL);
4375
4376}
4377
81d4177b
KH		 4378/* pseudo-op:
4379 behaviour:
4380 errors:
99a814a1
AM		 4381 warnings: */
4382
252b5132 4383static void
98027b10 4384ppc_pe_comm (int lcomm)
252b5132 4385{
98027b10
AM		 4386 char *name;
4387 char c;
4388 char *p;
252b5132 4389 offsetT temp;
98027b10 4390 symbolS *symbolP;
252b5132
RH		 4391 offsetT align;
4392
4393 name = input_line_pointer;
4394 c = get_symbol_end ();
4395
99a814a1 4396 /* just after name is now '\0'. */
252b5132
RH		 4397 p = input_line_pointer;
4398 *p = c;
4399 SKIP_WHITESPACE ();
4400 if (*input_line_pointer != ',')
4401 {
4402 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4403 ignore_rest_of_line ();
4404 return;
4405 }
4406
4407 input_line_pointer++; /* skip ',' */
4408 if ((temp = get_absolute_expression ()) < 0)
4409 {
4410 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4411 ignore_rest_of_line ();
4412 return;
4413 }
4414
4415 if (! lcomm)
4416 {
4417 /* The third argument to .comm is the alignment. */
4418 if (*input_line_pointer != ',')
4419 align = 3;
4420 else
4421 {
4422 ++input_line_pointer;
4423 align = get_absolute_expression ();
4424 if (align <= 0)
4425 {
4426 as_warn (_("ignoring bad alignment"));
4427 align = 3;
4428 }
4429 }
4430 }
4431
4432 *p = 0;
4433 symbolP = symbol_find_or_make (name);
4434
4435 *p = c;
4436 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4437 {
4438 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4439 S_GET_NAME (symbolP));
4440 ignore_rest_of_line ();
4441 return;
4442 }
4443
4444 if (S_GET_VALUE (symbolP))
4445 {
4446 if (S_GET_VALUE (symbolP) != (valueT) temp)
4447 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4448 S_GET_NAME (symbolP),
4449 (long) S_GET_VALUE (symbolP),
4450 (long) temp);
4451 }
4452 else
4453 {
4454 S_SET_VALUE (symbolP, (valueT) temp);
4455 S_SET_EXTERNAL (symbolP);
86ebace2 4456 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4457 }
4458
4459 demand_empty_rest_of_line ();
4460}
4461
4462/*
4463 * implement the .section pseudo op:
4464 * .section name {, "flags"}
4465 * ^ ^
4466 * | +--- optional flags: 'b' for bss
4467 * | 'i' for info
4468 * +-- section name 'l' for lib
4469 * 'n' for noload
4470 * 'o' for over
4471 * 'w' for data
4472 * 'd' (apparently m88k for data)
4473 * 'x' for text
4474 * But if the argument is not a quoted string, treat it as a
4475 * subsegment number.
4476 *
4477 * FIXME: this is a copy of the section processing from obj-coff.c, with
4478 * additions/changes for the moto-pas assembler support. There are three
4479 * categories:
4480 *
81d4177b 4481 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4482 * setting bits that bfd probably neither understands or uses. The
4483 * correct approach (?) will have to incorporate extra fields attached
4484 * to the section to hold the system specific stuff. (krk)
4485 *
4486 * Section Contents:
4487 * 'a' - unknown - referred to in documentation, but no definition supplied
4488 * 'c' - section has code
4489 * 'd' - section has initialized data
4490 * 'u' - section has uninitialized data
4491 * 'i' - section contains directives (info)
4492 * 'n' - section can be discarded
4493 * 'R' - remove section at link time
4494 *
4495 * Section Protection:
4496 * 'r' - section is readable
4497 * 'w' - section is writeable
4498 * 'x' - section is executable
4499 * 's' - section is sharable
4500 *
4501 * Section Alignment:
4502 * '0' - align to byte boundary
4503 * '1' - align to halfword undary
4504 * '2' - align to word boundary
4505 * '3' - align to doubleword boundary
4506 * '4' - align to quadword boundary
4507 * '5' - align to 32 byte boundary
4508 * '6' - align to 64 byte boundary
4509 *
4510 */
4511
4512void
98027b10 4513ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 4514{
99a814a1 4515 /* Strip out the section name. */
252b5132
RH		 4516 char *section_name;
4517 char c;
4518 char *name;
4519 unsigned int exp;
4520 flagword flags;
4521 segT sec;
4522 int align;
4523
4524 section_name = input_line_pointer;
4525 c = get_symbol_end ();
4526
4527 name = xmalloc (input_line_pointer - section_name + 1);
4528 strcpy (name, section_name);
4529
4530 *input_line_pointer = c;
4531
4532 SKIP_WHITESPACE ();
4533
4534 exp = 0;
4535 flags = SEC_NO_FLAGS;
4536
4537 if (strcmp (name, ".idata$2") == 0)
4538 {
4539 align = 0;
4540 }
4541 else if (strcmp (name, ".idata$3") == 0)
4542 {
4543 align = 0;
4544 }
4545 else if (strcmp (name, ".idata$4") == 0)
4546 {
4547 align = 2;
4548 }
4549 else if (strcmp (name, ".idata$5") == 0)
4550 {
4551 align = 2;
4552 }
4553 else if (strcmp (name, ".idata$6") == 0)
4554 {
4555 align = 1;
4556 }
4557 else
99a814a1
AM		 4558 /* Default alignment to 16 byte boundary. */
4559 align = 4;
252b5132
RH		 4560
4561 if (*input_line_pointer == ',')
4562 {
4563 ++input_line_pointer;
4564 SKIP_WHITESPACE ();
4565 if (*input_line_pointer != '"')
4566 exp = get_absolute_expression ();
4567 else
4568 {
4569 ++input_line_pointer;
4570 while (*input_line_pointer != '"'
4571 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4572 {
4573 switch (*input_line_pointer)
4574 {
4575 /* Section Contents */
4576 case 'a': /* unknown */
4577 as_bad (_("Unsupported section attribute -- 'a'"));
4578 break;
4579 case 'c': /* code section */
81d4177b 4580 flags |= SEC_CODE;
252b5132
RH		 4581 break;
4582 case 'd': /* section has initialized data */
4583 flags |= SEC_DATA;
4584 break;
4585 case 'u': /* section has uninitialized data */
4586 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4587 in winnt.h */
4588 flags |= SEC_ROM;
4589 break;
4590 case 'i': /* section contains directives (info) */
4591 /* FIXME: This is IMAGE_SCN_LNK_INFO
4592 in winnt.h */
4593 flags |= SEC_HAS_CONTENTS;
4594 break;
4595 case 'n': /* section can be discarded */
81d4177b 4596 flags &=~ SEC_LOAD;
252b5132
RH		 4597 break;
4598 case 'R': /* Remove section at link time */
4599 flags |= SEC_NEVER_LOAD;
4600 break;
8d452c78 4601#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 4602 /* Section Protection */
4603 case 'r': /* section is readable */
4604 flags |= IMAGE_SCN_MEM_READ;
4605 break;
4606 case 'w': /* section is writeable */
4607 flags |= IMAGE_SCN_MEM_WRITE;
4608 break;
4609 case 'x': /* section is executable */
4610 flags |= IMAGE_SCN_MEM_EXECUTE;
4611 break;
4612 case 's': /* section is sharable */
4613 flags |= IMAGE_SCN_MEM_SHARED;
4614 break;
4615
4616 /* Section Alignment */
4617 case '0': /* align to byte boundary */
4618 flags |= IMAGE_SCN_ALIGN_1BYTES;
4619 align = 0;
4620 break;
4621 case '1': /* align to halfword boundary */
4622 flags |= IMAGE_SCN_ALIGN_2BYTES;
4623 align = 1;
4624 break;
4625 case '2': /* align to word boundary */
4626 flags |= IMAGE_SCN_ALIGN_4BYTES;
4627 align = 2;
4628 break;
4629 case '3': /* align to doubleword boundary */
4630 flags |= IMAGE_SCN_ALIGN_8BYTES;
4631 align = 3;
4632 break;
4633 case '4': /* align to quadword boundary */
4634 flags |= IMAGE_SCN_ALIGN_16BYTES;
4635 align = 4;
4636 break;
4637 case '5': /* align to 32 byte boundary */
4638 flags |= IMAGE_SCN_ALIGN_32BYTES;
4639 align = 5;
4640 break;
4641 case '6': /* align to 64 byte boundary */
4642 flags |= IMAGE_SCN_ALIGN_64BYTES;
4643 align = 6;
4644 break;
8d452c78 4645#endif
252b5132 4646 default:
99a814a1
AM		 4647 as_bad (_("unknown section attribute '%c'"),
4648 *input_line_pointer);
252b5132
RH		 4649 break;
4650 }
4651 ++input_line_pointer;
4652 }
4653 if (*input_line_pointer == '"')
4654 ++input_line_pointer;
4655 }
4656 }
4657
4658 sec = subseg_new (name, (subsegT) exp);
4659
99a814a1 4660 ppc_set_current_section (sec);
252b5132
RH		 4661
4662 if (flags != SEC_NO_FLAGS)
4663 {
4664 if (! bfd_set_section_flags (stdoutput, sec, flags))
4665 as_bad (_("error setting flags for \"%s\": %s"),
4666 bfd_section_name (stdoutput, sec),
4667 bfd_errmsg (bfd_get_error ()));
4668 }
4669
99a814a1 4670 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4671}
4672
4673static void
98027b10 4674ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4675{
4676 char *name;
4677 char endc;
4678 symbolS *ext_sym;
4679
4680 name = input_line_pointer;
4681 endc = get_symbol_end ();
4682
4683 ext_sym = symbol_find_or_make (name);
4684
4685 *input_line_pointer = endc;
4686
4687 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4688 SF_SET_FUNCTION (ext_sym);
4689 SF_SET_PROCESS (ext_sym);
4690 coff_add_linesym (ext_sym);
4691
4692 demand_empty_rest_of_line ();
4693}
4694
4695static void
98027b10 4696ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4697{
4698 if (tocdata_section == 0)
4699 {
4700 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4701 /* FIXME: section flags won't work. */
252b5132
RH		 4702 bfd_set_section_flags (stdoutput, tocdata_section,
4703 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4704 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4705
4706 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4707 }
4708 else
4709 {
4710 rdata_section = subseg_new (".tocd", 0);
4711 }
4712
99a814a1 4713 ppc_set_current_section (tocdata_section);
252b5132
RH		 4714
4715 demand_empty_rest_of_line ();
4716}
4717
4718/* Don't adjust TOC relocs to use the section symbol. */
4719
4720int
98027b10 4721ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 4722{
4723 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4724}
4725
4726#endif
4727\f
4728#ifdef OBJ_XCOFF
4729
4730/* XCOFF specific symbol and file handling. */
4731
4732/* Canonicalize the symbol name. We use the to force the suffix, if
4733 any, to use square brackets, and to be in upper case. */
4734
4735char *
98027b10 4736ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 4737{
4738 char *s;
4739
4740 if (ppc_stab_symbol)
4741 return name;
4742
4743 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4744 ;
4745 if (*s != '\0')
4746 {
4747 char brac;
4748
4749 if (*s == '[')
4750 brac = ']';
4751 else
4752 {
4753 *s = '[';
4754 brac = '}';
4755 }
4756
4757 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4758 *s = TOUPPER (*s);
252b5132
RH		 4759
4760 if (*s == '\0' || s[1] != '\0')
4761 as_bad (_("bad symbol suffix"));
4762
4763 *s = ']';
4764 }
4765
4766 return name;
4767}
4768
4769/* Set the class of a symbol based on the suffix, if any. This is
4770 called whenever a new symbol is created. */
4771
4772void
98027b10 4773ppc_symbol_new_hook (symbolS *sym)
252b5132 4774{
809ffe0d 4775 struct ppc_tc_sy *tc;
252b5132
RH		 4776 const char *s;
4777
809ffe0d
ILT		 4778 tc = symbol_get_tc (sym);
4779 tc->next = NULL;
4780 tc->output = 0;
4781 tc->class = -1;
4782 tc->real_name = NULL;
4783 tc->subseg = 0;
4784 tc->align = 0;
4785 tc->size = NULL;
4786 tc->within = NULL;
252b5132
RH		 4787
4788 if (ppc_stab_symbol)
4789 return;
4790
4791 s = strchr (S_GET_NAME (sym), '[');
4792 if (s == (const char *) NULL)
4793 {
4794 /* There is no suffix. */
4795 return;
4796 }
4797
4798 ++s;
4799
4800 switch (s[0])
4801 {
4802 case 'B':
4803 if (strcmp (s, "BS]") == 0)
809ffe0d 4804 tc->class = XMC_BS;
252b5132
RH		 4805 break;
4806 case 'D':
4807 if (strcmp (s, "DB]") == 0)
809ffe0d 4808 tc->class = XMC_DB;
252b5132 4809 else if (strcmp (s, "DS]") == 0)
809ffe0d 4810 tc->class = XMC_DS;
252b5132
RH		 4811 break;
4812 case 'G':
4813 if (strcmp (s, "GL]") == 0)
809ffe0d 4814 tc->class = XMC_GL;
252b5132
RH		 4815 break;
4816 case 'P':
4817 if (strcmp (s, "PR]") == 0)
809ffe0d 4818 tc->class = XMC_PR;
252b5132
RH		 4819 break;
4820 case 'R':
4821 if (strcmp (s, "RO]") == 0)
809ffe0d 4822 tc->class = XMC_RO;
252b5132 4823 else if (strcmp (s, "RW]") == 0)
809ffe0d 4824 tc->class = XMC_RW;
252b5132
RH		 4825 break;
4826 case 'S':
4827 if (strcmp (s, "SV]") == 0)
809ffe0d 4828 tc->class = XMC_SV;
252b5132
RH		 4829 break;
4830 case 'T':
4831 if (strcmp (s, "TC]") == 0)
809ffe0d 4832 tc->class = XMC_TC;
252b5132 4833 else if (strcmp (s, "TI]") == 0)
809ffe0d 4834 tc->class = XMC_TI;
252b5132 4835 else if (strcmp (s, "TB]") == 0)
809ffe0d 4836 tc->class = XMC_TB;
252b5132 4837 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4838 tc->class = XMC_TC0;
252b5132
RH		 4839 break;
4840 case 'U':
4841 if (strcmp (s, "UA]") == 0)
809ffe0d 4842 tc->class = XMC_UA;
252b5132 4843 else if (strcmp (s, "UC]") == 0)
809ffe0d 4844 tc->class = XMC_UC;
252b5132
RH		 4845 break;
4846 case 'X':
4847 if (strcmp (s, "XO]") == 0)
809ffe0d 4848 tc->class = XMC_XO;
252b5132
RH		 4849 break;
4850 }
4851
809ffe0d 4852 if (tc->class == -1)
252b5132
RH		 4853 as_bad (_("Unrecognized symbol suffix"));
4854}
4855
4856/* Set the class of a label based on where it is defined. This
4857 handles symbols without suffixes. Also, move the symbol so that it
4858 follows the csect symbol. */
4859
4860void
98027b10 4861ppc_frob_label (symbolS *sym)
252b5132
RH		 4862{
4863 if (ppc_current_csect != (symbolS *) NULL)
4864 {
809ffe0d
ILT		 4865 if (symbol_get_tc (sym)->class == -1)
4866 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH		 4867
4868 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4869 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4870 &symbol_rootP, &symbol_lastP);
4871 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 4872 }
07a53e5c
RH		 4873
4874#ifdef OBJ_ELF
4875 dwarf2_emit_label (sym);
4876#endif
252b5132
RH		 4877}
4878
4879/* This variable is set by ppc_frob_symbol if any absolute symbols are
4880 seen. It tells ppc_adjust_symtab whether it needs to look through
4881 the symbols. */
4882
b34976b6 4883static bfd_boolean ppc_saw_abs;
252b5132
RH		 4884
4885/* Change the name of a symbol just before writing it out. Set the
4886 real name if the .rename pseudo-op was used. Otherwise, remove any
4887 class suffix. Return 1 if the symbol should not be included in the
4888 symbol table. */
4889
4890int
98027b10 4891ppc_frob_symbol (symbolS *sym)
252b5132
RH		 4892{
4893 static symbolS *ppc_last_function;
4894 static symbolS *set_end;
4895
4896 /* Discard symbols that should not be included in the output symbol
4897 table. */
809ffe0d
ILT		 4898 if (! symbol_used_in_reloc_p (sym)
4899 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 4900 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4901 && ! symbol_get_tc (sym)->output
252b5132
RH		 4902 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4903 return 1;
4904
a161fe53
AM		 4905 /* This one will disappear anyway. Don't make a csect sym for it. */
4906 if (sym == abs_section_sym)
4907 return 1;
4908
809ffe0d
ILT		 4909 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4910 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 4911 else
4912 {
4913 const char *name;
4914 const char *s;
4915
4916 name = S_GET_NAME (sym);
4917 s = strchr (name, '[');
4918 if (s != (char *) NULL)
4919 {
4920 unsigned int len;
4921 char *snew;
4922
4923 len = s - name;
4924 snew = xmalloc (len + 1);
4925 memcpy (snew, name, len);
4926 snew[len] = '\0';
4927
4928 S_SET_NAME (sym, snew);
4929 }
4930 }
4931
4932 if (set_end != (symbolS *) NULL)
4933 {
4934 SA_SET_SYM_ENDNDX (set_end, sym);
4935 set_end = NULL;
4936 }
4937
4938 if (SF_GET_FUNCTION (sym))
4939 {
4940 if (ppc_last_function != (symbolS *) NULL)
4941 as_bad (_("two .function pseudo-ops with no intervening .ef"));
4942 ppc_last_function = sym;
809ffe0d 4943 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 4944 {
6386f3a7 4945 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 4946 SA_SET_SYM_FSIZE (sym,
4947 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 4948 }
4949 }
4950 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
4951 && strcmp (S_GET_NAME (sym), ".ef") == 0)
4952 {
4953 if (ppc_last_function == (symbolS *) NULL)
4954 as_bad (_(".ef with no preceding .function"));
4955 else
4956 {
4957 set_end = ppc_last_function;
4958 ppc_last_function = NULL;
4959
4960 /* We don't have a C_EFCN symbol, but we need to force the
4961 COFF backend to believe that it has seen one. */
4962 coff_last_function = NULL;
4963 }
4964 }
4965
670ec21d 4966 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4967 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 4968 && S_GET_STORAGE_CLASS (sym) != C_FILE
4969 && S_GET_STORAGE_CLASS (sym) != C_FCN
4970 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
4971 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
4972 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
4973 && S_GET_STORAGE_CLASS (sym) != C_BINCL
4974 && S_GET_STORAGE_CLASS (sym) != C_EINCL
4975 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
4976 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
4977
4978 if (S_GET_STORAGE_CLASS (sym) == C_EXT
4979 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
4980 {
4981 int i;
4982 union internal_auxent *a;
4983
4984 /* Create a csect aux. */
4985 i = S_GET_NUMBER_AUXILIARY (sym);
4986 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT		 4987 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
4988 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH		 4989 {
4990 /* This is the TOC table. */
4991 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
4992 a->x_csect.x_scnlen.l = 0;
4993 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
4994 }
809ffe0d 4995 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 4996 {
4997 /* This is a csect symbol. x_scnlen is the size of the
4998 csect. */
809ffe0d 4999 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5000 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5001 S_GET_SEGMENT (sym))
5002 - S_GET_VALUE (sym));
5003 else
5004 {
6386f3a7 5005 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5006 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5007 - S_GET_VALUE (sym));
5008 }
809ffe0d 5009 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5010 }
5011 else if (S_GET_SEGMENT (sym) == bss_section)
5012 {
5013 /* This is a common symbol. */
809ffe0d
ILT		 5014 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5015 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5016 if (S_IS_EXTERNAL (sym))
809ffe0d 5017 symbol_get_tc (sym)->class = XMC_RW;
252b5132 5018 else
809ffe0d 5019 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH		 5020 }
5021 else if (S_GET_SEGMENT (sym) == absolute_section)
5022 {
5023 /* This is an absolute symbol. The csect will be created by
99a814a1 5024 ppc_adjust_symtab. */
b34976b6 5025 ppc_saw_abs = TRUE;
252b5132 5026 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT		 5027 if (symbol_get_tc (sym)->class == -1)
5028 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH		 5029 }
5030 else if (! S_IS_DEFINED (sym))
5031 {
5032 /* This is an external symbol. */
5033 a->x_csect.x_scnlen.l = 0;
5034 a->x_csect.x_smtyp = XTY_ER;
5035 }
809ffe0d 5036 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH		 5037 {
5038 symbolS *next;
5039
5040 /* This is a TOC definition. x_scnlen is the size of the
5041 TOC entry. */
5042 next = symbol_next (sym);
809ffe0d 5043 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH		 5044 next = symbol_next (next);
5045 if (next == (symbolS *) NULL
809ffe0d 5046 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH		 5047 {
5048 if (ppc_after_toc_frag == (fragS *) NULL)
5049 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5050 data_section)
5051 - S_GET_VALUE (sym));
5052 else
5053 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5054 - S_GET_VALUE (sym));
5055 }
5056 else
5057 {
6386f3a7 5058 resolve_symbol_value (next);
252b5132
RH		 5059 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5060 - S_GET_VALUE (sym));
5061 }
5062 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5063 }
5064 else
5065 {
5066 symbolS *csect;
5067
5068 /* This is a normal symbol definition. x_scnlen is the
5069 symbol index of the containing csect. */
5070 if (S_GET_SEGMENT (sym) == text_section)
5071 csect = ppc_text_csects;
5072 else if (S_GET_SEGMENT (sym) == data_section)
5073 csect = ppc_data_csects;
5074 else
5075 abort ();
5076
5077 /* Skip the initial dummy symbol. */
809ffe0d 5078 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5079
5080 if (csect == (symbolS *) NULL)
5081 {
5082 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5083 a->x_csect.x_scnlen.l = 0;
5084 }
5085 else
5086 {
809ffe0d 5087 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5088 {
6386f3a7 5089 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5090 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5091 > S_GET_VALUE (sym))
252b5132 5092 break;
809ffe0d 5093 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5094 }
5095
809ffe0d
ILT		 5096 a->x_csect.x_scnlen.p =
5097 coffsymbol (symbol_get_bfdsym (csect))->native;
5098 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5099 1;
252b5132
RH		 5100 }
5101 a->x_csect.x_smtyp = XTY_LD;
5102 }
81d4177b 5103
252b5132
RH		 5104 a->x_csect.x_parmhash = 0;
5105 a->x_csect.x_snhash = 0;
809ffe0d 5106 if (symbol_get_tc (sym)->class == -1)
252b5132
RH		 5107 a->x_csect.x_smclas = XMC_PR;
5108 else
809ffe0d 5109 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH		 5110 a->x_csect.x_stab = 0;
5111 a->x_csect.x_snstab = 0;
5112
5113 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5114 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5115 }
5116 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5117 {
5118 /* We want the value to be the symbol index of the referenced
5119 csect symbol. BFD will do that for us if we set the right
5120 flags. */
b782de16
AM		 5121 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5122 combined_entry_type *c = coffsymbol (bsym)->native;
5123
5124 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5125 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5126 }
5127 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5128 {
5129 symbolS *block;
5130 symbolS *csect;
5131
5132 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5133 block = symbol_get_tc (sym)->within;
5134 csect = symbol_get_tc (block)->within;
6386f3a7 5135 resolve_symbol_value (csect);
252b5132
RH		 5136 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5137 }
5138 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5139 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5140 {
5141 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5142 BFD will do that for us if we set the right flags. We have
5143 already set the value correctly. */
809ffe0d 5144 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5145 }
5146
5147 return 0;
5148}
5149
5150/* Adjust the symbol table. This creates csect symbols for all
5151 absolute symbols. */
5152
5153void
98027b10 5154ppc_adjust_symtab (void)
252b5132
RH		 5155{
5156 symbolS *sym;
5157
5158 if (! ppc_saw_abs)
5159 return;
5160
5161 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5162 {
5163 symbolS *csect;
5164 int i;
5165 union internal_auxent *a;
5166
5167 if (S_GET_SEGMENT (sym) != absolute_section)
5168 continue;
5169
5170 csect = symbol_create (".abs[XO]", absolute_section,
5171 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5172 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5173 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5174 i = S_GET_NUMBER_AUXILIARY (csect);
5175 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5176 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5177 a->x_csect.x_scnlen.l = 0;
5178 a->x_csect.x_smtyp = XTY_SD;
5179 a->x_csect.x_parmhash = 0;
5180 a->x_csect.x_snhash = 0;
5181 a->x_csect.x_smclas = XMC_XO;
5182 a->x_csect.x_stab = 0;
5183 a->x_csect.x_snstab = 0;
5184
5185 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5186
5187 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5188 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5189 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5190 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5191 }
5192
b34976b6 5193 ppc_saw_abs = FALSE;
252b5132
RH		 5194}
5195
5196/* Set the VMA for a section. This is called on all the sections in
5197 turn. */
5198
5199void
98027b10 5200ppc_frob_section (asection *sec)
252b5132 5201{
931e13a6 5202 static bfd_vma vma = 0;
252b5132 5203
931e13a6 5204 vma = md_section_align (sec, vma);
252b5132
RH		 5205 bfd_set_section_vma (stdoutput, sec, vma);
5206 vma += bfd_section_size (stdoutput, sec);
5207}
5208
5209#endif /* OBJ_XCOFF */
5210\f
5211/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC		 5212 of type TYPE, and store the appropriate bytes in *LITP. The number
5213 of LITTLENUMS emitted is stored in *SIZEP. An error message is
252b5132
RH		 5214 returned, or NULL on OK. */
5215
5216char *
98027b10 5217md_atof (int type, char *litp, int *sizep)
252b5132
RH		 5218{
5219 int prec;
5220 LITTLENUM_TYPE words[4];
5221 char *t;
5222 int i;
5223
5224 switch (type)
5225 {
5226 case 'f':
5227 prec = 2;
5228 break;
5229
5230 case 'd':
5231 prec = 4;
5232 break;
5233
5234 default:
5235 *sizep = 0;
5236 return _("bad call to md_atof");
5237 }
5238
5239 t = atof_ieee (input_line_pointer, type, words);
5240 if (t)
5241 input_line_pointer = t;
5242
5243 *sizep = prec * 2;
5244
5245 if (target_big_endian)
5246 {
5247 for (i = 0; i < prec; i++)
5248 {
5249 md_number_to_chars (litp, (valueT) words[i], 2);
5250 litp += 2;
5251 }
5252 }
5253 else
5254 {
5255 for (i = prec - 1; i >= 0; i--)
5256 {
5257 md_number_to_chars (litp, (valueT) words[i], 2);
5258 litp += 2;
5259 }
5260 }
81d4177b 5261
252b5132
RH		 5262 return NULL;
5263}
5264
5265/* Write a value out to the object file, using the appropriate
5266 endianness. */
5267
5268void
98027b10 5269md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5270{
5271 if (target_big_endian)
5272 number_to_chars_bigendian (buf, val, n);
5273 else
5274 number_to_chars_littleendian (buf, val, n);
5275}
5276
5277/* Align a section (I don't know why this is machine dependent). */
5278
5279valueT
3aeeedbb 5280md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5281{
3aeeedbb
AM		 5282#ifdef OBJ_ELF
5283 return addr;
5284#else
252b5132
RH		 5285 int align = bfd_get_section_alignment (stdoutput, seg);
5286
5287 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5288#endif
252b5132
RH		 5289}
5290
5291/* We don't have any form of relaxing. */
5292
5293int
98027b10
AM		 5294md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5295 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5296{
5297 abort ();
5298 return 0;
5299}
5300
5301/* Convert a machine dependent frag. We never generate these. */
5302
5303void
98027b10
AM		 5304md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5305 asection *sec ATTRIBUTE_UNUSED,
5306 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 5307{
5308 abort ();
5309}
5310
5311/* We have no need to default values of symbols. */
5312
252b5132 5313symbolS *
98027b10 5314md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 5315{
5316 return 0;
5317}
5318\f
5319/* Functions concerning relocs. */
5320
5321/* The location from which a PC relative jump should be calculated,
5322 given a PC relative reloc. */
5323
5324long
98027b10 5325md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 5326{
5327 return fixp->fx_frag->fr_address + fixp->fx_where;
5328}
5329
5330#ifdef OBJ_XCOFF
5331
5332/* This is called to see whether a fixup should be adjusted to use a
5333 section symbol. We take the opportunity to change a fixup against
5334 a symbol in the TOC subsegment into a reloc against the
5335 corresponding .tc symbol. */
5336
5337int
98027b10 5338ppc_fix_adjustable (fixS *fix)
252b5132 5339{
b782de16
AM		 5340 valueT val = resolve_symbol_value (fix->fx_addsy);
5341 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5342 TC_SYMFIELD_TYPE *tc;
5343
5344 if (symseg == absolute_section)
5345 return 0;
252b5132 5346
252b5132 5347 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5348 && fix->fx_addsy != ppc_toc_csect
b782de16 5349 && symseg == data_section
252b5132
RH		 5350 && val >= ppc_toc_frag->fr_address
5351 && (ppc_after_toc_frag == (fragS *) NULL
5352 || val < ppc_after_toc_frag->fr_address))
5353 {
5354 symbolS *sy;
5355
5356 for (sy = symbol_next (ppc_toc_csect);
5357 sy != (symbolS *) NULL;
5358 sy = symbol_next (sy))
5359 {
b782de16
AM		 5360 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5361
5362 if (sy_tc->class == XMC_TC0)
252b5132 5363 continue;
b782de16 5364 if (sy_tc->class != XMC_TC)
252b5132 5365 break;
b782de16 5366 if (val == resolve_symbol_value (sy))
252b5132
RH		 5367 {
5368 fix->fx_addsy = sy;
5369 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5370 return 0;
5371 }
5372 }
5373
5374 as_bad_where (fix->fx_file, fix->fx_line,
5375 _("symbol in .toc does not match any .tc"));
5376 }
5377
5378 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5379 tc = symbol_get_tc (fix->fx_addsy);
5380 if (tc->subseg == 0
5381 && tc->class != XMC_TC0
5382 && tc->class != XMC_TC
5383 && symseg != bss_section
252b5132 5384 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5385 && (symseg != data_section
252b5132
RH		 5386 || ppc_toc_csect == NULL
5387 || val < ppc_toc_frag->fr_address
5388 || (ppc_after_toc_frag != NULL
5389 && val >= ppc_after_toc_frag->fr_address)))
5390 {
5391 symbolS *csect;
b782de16 5392 symbolS *next_csect;
252b5132 5393
b782de16 5394 if (symseg == text_section)
252b5132 5395 csect = ppc_text_csects;
b782de16 5396 else if (symseg == data_section)
252b5132
RH		 5397 csect = ppc_data_csects;
5398 else
5399 abort ();
5400
5401 /* Skip the initial dummy symbol. */
809ffe0d 5402 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5403
5404 if (csect != (symbolS *) NULL)
5405 {
b782de16
AM		 5406 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5407 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5408 {
5409 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5410 have to look through the full symbol table to see
5411 whether this is the csect we want. Note that we will
5412 only get here if the csect has zero length. */
b782de16
AM		 5413 if (symbol_get_frag (csect)->fr_address == val
5414 && S_GET_VALUE (csect) == val)
252b5132
RH		 5415 {
5416 symbolS *scan;
5417
809ffe0d 5418 for (scan = symbol_next (csect);
252b5132 5419 scan != NULL;
809ffe0d 5420 scan = symbol_next (scan))
252b5132 5421 {
809ffe0d 5422 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5423 break;
5424 if (scan == fix->fx_addsy)
5425 break;
5426 }
5427
5428 /* If we found the symbol before the next csect
99a814a1 5429 symbol, then this is the csect we want. */
252b5132
RH		 5430 if (scan == fix->fx_addsy)
5431 break;
5432 }
5433
b782de16 5434 csect = next_csect;
252b5132
RH		 5435 }
5436
b782de16 5437 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5438 fix->fx_addsy = csect;
5439 }
b782de16 5440 return 0;
252b5132
RH		 5441 }
5442
5443 /* Adjust a reloc against a .lcomm symbol to be against the base
5444 .lcomm. */
b782de16 5445 if (symseg == bss_section
252b5132
RH		 5446 && ! S_IS_EXTERNAL (fix->fx_addsy))
5447 {
b782de16
AM		 5448 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5449
5450 fix->fx_offset += val - resolve_symbol_value (sy);
5451 fix->fx_addsy = sy;
252b5132
RH		 5452 }
5453
5454 return 0;
5455}
5456
5457/* A reloc from one csect to another must be kept. The assembler
5458 will, of course, keep relocs between sections, and it will keep
5459 absolute relocs, but we need to force it to keep PC relative relocs
5460 between two csects in the same section. */
5461
5462int
98027b10 5463ppc_force_relocation (fixS *fix)
252b5132
RH		 5464{
5465 /* At this point fix->fx_addsy should already have been converted to
5466 a csect symbol. If the csect does not include the fragment, then
5467 we need to force the relocation. */
5468 if (fix->fx_pcrel
5469 && fix->fx_addsy != NULL
809ffe0d
ILT		 5470 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5471 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5472 > fix->fx_frag->fr_address)
5473 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5474 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5475 <= fix->fx_frag->fr_address))))
5476 return 1;
5477
ae6063d4 5478 return generic_force_reloc (fix);
252b5132
RH		 5479}
5480
5481#endif /* OBJ_XCOFF */
5482
0baf16f2 5483#ifdef OBJ_ELF
a161fe53
AM		 5484/* If this function returns non-zero, it guarantees that a relocation
5485 will be emitted for a fixup. */
5486
5487int
98027b10 5488ppc_force_relocation (fixS *fix)
a161fe53
AM		 5489{
5490 /* Branch prediction relocations must force a relocation, as must
5491 the vtable description relocs. */
5492 switch (fix->fx_r_type)
5493 {
5494 case BFD_RELOC_PPC_B16_BRTAKEN:
5495 case BFD_RELOC_PPC_B16_BRNTAKEN:
5496 case BFD_RELOC_PPC_BA16_BRTAKEN:
5497 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5498 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5499 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5500 return 1;
5501 default:
5502 break;
5503 }
5504
cdba85ec
AM		 5505 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5506 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5507 return 1;
5508
ae6063d4 5509 return generic_force_reloc (fix);
a161fe53
AM		 5510}
5511
0baf16f2 5512int
98027b10 5513ppc_fix_adjustable (fixS *fix)
252b5132 5514{
0baf16f2
AM		 5515 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5516 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5517 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5518 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5519 && fix->fx_r_type != BFD_RELOC_GPREL16
5520 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5521 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5522 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5523 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5524}
0baf16f2 5525#endif
252b5132 5526
3aeeedbb
AM		 5527/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5528 rs_align_code frag. */
5529
5530void
5531ppc_handle_align (struct frag *fragP)
5532{
5533 valueT count = (fragP->fr_next->fr_address
5534 - (fragP->fr_address + fragP->fr_fix));
5535
5536 if (count != 0 && (count & 3) == 0)
5537 {
5538 char *dest = fragP->fr_literal + fragP->fr_fix;
5539
5540 fragP->fr_var = 4;
5541 md_number_to_chars (dest, 0x60000000, 4);
5542
5543 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0)
5544 {
5545 /* For power6, we want the last nop to be a group terminating
5546 one, "ori 1,1,0". Do this by inserting an rs_fill frag
5547 immediately after this one, with its address set to the last
5548 nop location. This will automatically reduce the number of
5549 nops in the current frag by one. */
5550 if (count > 4)
5551 {
5552 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5553
5554 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5555 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5556 group_nop->fr_fix = 0;
5557 group_nop->fr_offset = 1;
5558 group_nop->fr_type = rs_fill;
5559 fragP->fr_next = group_nop;
5560 dest = group_nop->fr_literal;
5561 }
5562
5563 md_number_to_chars (dest, 0x60210000, 4);
5564 }
5565 }
5566}
5567
252b5132
RH		 5568/* Apply a fixup to the object code. This is called for all the
5569 fixups we generated by the call to fix_new_exp, above. In the call
5570 above we used a reloc code which was the largest legal reloc code
5571 plus the operand index. Here we undo that to recover the operand
5572 index. At this point all symbol values should be fully resolved,
5573 and we attempt to completely resolve the reloc. If we can not do
5574 that, we determine the correct reloc code and put it back in the
5575 fixup. */
5576
94f592af 5577void
98027b10 5578md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 5579{
94f592af 5580 valueT value = * valP;
252b5132
RH		 5581
5582#ifdef OBJ_ELF
94f592af 5583 if (fixP->fx_addsy != NULL)
252b5132 5584 {
a161fe53 5585 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5586 if (fixP->fx_pcrel)
5587 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5588 }
5589 else
94f592af 5590 fixP->fx_done = 1;
252b5132 5591#else
a161fe53 5592 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5593 the symbol values. If we are doing this relocation the code in
5594 write.c is going to call bfd_install_relocation, which is also
5595 going to use the symbol value. That means that if the reloc is
5596 fully resolved we want to use *valP since bfd_install_relocation is
5597 not being used.
252b5132 5598 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM		 5599 *valP, and must use fx_offset instead. However, if the reloc
5600 is PC relative, we do want to use *valP since it includes the
252b5132 5601 result of md_pcrel_from. This is confusing. */
94f592af
NC		 5602 if (fixP->fx_addsy == (symbolS *) NULL)
5603 fixP->fx_done = 1;
5604
5605 else if (fixP->fx_pcrel)
5606 ;
5607
252b5132 5608 else
a161fe53
AM		 5609 value = fixP->fx_offset;
5610#endif
5611
5612 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5613 {
a161fe53
AM		 5614 /* We can't actually support subtracting a symbol. */
5615 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5616 }
252b5132 5617
94f592af 5618 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5619 {
5620 int opindex;
5621 const struct powerpc_operand *operand;
5622 char *where;
5623 unsigned long insn;
5624
94f592af 5625 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5626
5627 operand = &powerpc_operands[opindex];
5628
5629#ifdef OBJ_XCOFF
0baf16f2
AM		 5630 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5631 does not generate a reloc. It uses the offset of `sym' within its
5632 csect. Other usages, such as `.long sym', generate relocs. This
5633 is the documented behaviour of non-TOC symbols. */
252b5132 5634 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5635 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 5636 && operand->shift == 0
2b3c4602 5637 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5638 && fixP->fx_addsy != NULL
5639 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5640 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5641 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5642 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5643 {
94f592af
NC		 5644 value = fixP->fx_offset;
5645 fixP->fx_done = 1;
252b5132
RH		 5646 }
5647#endif
5648
5649 /* Fetch the instruction, insert the fully resolved operand
5650 value, and stuff the instruction back again. */
94f592af 5651 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5652 if (target_big_endian)
5653 insn = bfd_getb32 ((unsigned char *) where);
5654 else
5655 insn = bfd_getl32 ((unsigned char *) where);
5656 insn = ppc_insert_operand (insn, operand, (offsetT) value,
94f592af 5657 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5658 if (target_big_endian)
5659 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5660 else
5661 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5662
94f592af
NC		 5663 if (fixP->fx_done)
5664 /* Nothing else to do here. */
5665 return;
252b5132 5666
94f592af 5667 assert (fixP->fx_addsy != NULL);
0baf16f2 5668
252b5132
RH		 5669 /* Determine a BFD reloc value based on the operand information.
5670 We are only prepared to turn a few of the operands into
0baf16f2 5671 relocs. */
11b37b7b 5672 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5673 && operand->bitm == 0x3fffffc
11b37b7b 5674 && operand->shift == 0)
94f592af 5675 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 5676 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5677 && operand->bitm == 0xfffc
11b37b7b 5678 && operand->shift == 0)
95210096
AM		 5679 {
5680 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5681#ifdef OBJ_XCOFF
5682 fixP->fx_size = 2;
5683 if (target_big_endian)
5684 fixP->fx_where += 2;
5685#endif
5686 }
11b37b7b 5687 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5688 && operand->bitm == 0x3fffffc
11b37b7b 5689 && operand->shift == 0)
94f592af 5690 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 5691 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5692 && operand->bitm == 0xfffc
11b37b7b 5693 && operand->shift == 0)
95210096
AM		 5694 {
5695 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5696#ifdef OBJ_XCOFF
5697 fixP->fx_size = 2;
5698 if (target_big_endian)
5699 fixP->fx_where += 2;
5700#endif
5701 }
0baf16f2 5702#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 5703 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5704 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 5705 && operand->shift == 0)
11b37b7b 5706 {
a7fc733f
AM		 5707 if (ppc_is_toc_sym (fixP->fx_addsy))
5708 {
5709 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5710#ifdef OBJ_ELF
a7fc733f
AM		 5711 if (ppc_obj64
5712 && (operand->flags & PPC_OPERAND_DS) != 0)
5713 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5714#endif
5715 }
5716 else
5717 {
5718 fixP->fx_r_type = BFD_RELOC_16;
5719#ifdef OBJ_ELF
5720 if (ppc_obj64
5721 && (operand->flags & PPC_OPERAND_DS) != 0)
5722 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5723#endif
a7fc733f 5724 }
94f592af 5725 fixP->fx_size = 2;
11b37b7b 5726 if (target_big_endian)
94f592af 5727 fixP->fx_where += 2;
11b37b7b 5728 }
0baf16f2 5729#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5730 else
252b5132
RH		 5731 {
5732 char *sfile;
5733 unsigned int sline;
5734
5735 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5736 symbol. */
94f592af
NC		 5737 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5738 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5739 _("unresolved expression that must be resolved"));
5740 else
94f592af 5741 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5742 _("unsupported relocation against %s"),
94f592af
NC		 5743 S_GET_NAME (fixP->fx_addsy));
5744 fixP->fx_done = 1;
5745 return;
252b5132
RH		 5746 }
5747 }
5748 else
5749 {
5750#ifdef OBJ_ELF
94f592af 5751 ppc_elf_validate_fix (fixP, seg);
252b5132 5752#endif
94f592af 5753 switch (fixP->fx_r_type)
252b5132 5754 {
252b5132 5755 case BFD_RELOC_CTOR:
2b3c4602 5756 if (ppc_obj64)
9c7977b3
AM		 5757 goto ctor64;
5758 /* fall through */
5759
0baf16f2 5760 case BFD_RELOC_32:
94f592af
NC		 5761 if (fixP->fx_pcrel)
5762 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5763 /* fall through */
252b5132
RH		 5764
5765 case BFD_RELOC_RVA:
5766 case BFD_RELOC_32_PCREL:
252b5132 5767 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5768 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5769 value, 4);
5770 break;
5771
7f6d05e8 5772 case BFD_RELOC_64:
9c7977b3 5773 ctor64:
94f592af
NC		 5774 if (fixP->fx_pcrel)
5775 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5776 /* fall through */
0baf16f2 5777
7f6d05e8 5778 case BFD_RELOC_64_PCREL:
94f592af 5779 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5780 value, 8);
81d4177b 5781 break;
0baf16f2 5782
252b5132
RH		 5783 case BFD_RELOC_GPREL16:
5784 case BFD_RELOC_16_GOT_PCREL:
5785 case BFD_RELOC_16_GOTOFF:
5786 case BFD_RELOC_LO16_GOTOFF:
5787 case BFD_RELOC_HI16_GOTOFF:
5788 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5789 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5790 case BFD_RELOC_LO16_BASEREL:
5791 case BFD_RELOC_HI16_BASEREL:
5792 case BFD_RELOC_HI16_S_BASEREL:
5793 case BFD_RELOC_PPC_EMB_NADDR16:
5794 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5795 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5796 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5797 case BFD_RELOC_PPC_EMB_SDAI16:
5798 case BFD_RELOC_PPC_EMB_SDA2REL:
5799 case BFD_RELOC_PPC_EMB_SDA2I16:
5800 case BFD_RELOC_PPC_EMB_RELSEC16:
5801 case BFD_RELOC_PPC_EMB_RELST_LO:
5802 case BFD_RELOC_PPC_EMB_RELST_HI:
5803 case BFD_RELOC_PPC_EMB_RELST_HA:
5804 case BFD_RELOC_PPC_EMB_RELSDA:
5805 case BFD_RELOC_PPC_TOC16:
0baf16f2 5806#ifdef OBJ_ELF
0baf16f2
AM		 5807 case BFD_RELOC_PPC64_TOC16_LO:
5808 case BFD_RELOC_PPC64_TOC16_HI:
5809 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5810#endif
94f592af 5811 if (fixP->fx_pcrel)
252b5132 5812 {
94f592af
NC		 5813 if (fixP->fx_addsy != NULL)
5814 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5815 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5816 bfd_get_reloc_code_name (fixP->fx_r_type),
5817 S_GET_NAME (fixP->fx_addsy));
252b5132 5818 else
94f592af 5819 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5820 _("cannot emit PC relative %s relocation"),
94f592af 5821 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5822 }
5823
94f592af 5824 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5825 value, 2);
5826 break;
5827
3c9d25f4
AM		 5828 case BFD_RELOC_16:
5829 if (fixP->fx_pcrel)
5830 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5831 /* fall through */
5832
5833 case BFD_RELOC_16_PCREL:
5834 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5835 value, 2);
5836 break;
5837
5838 case BFD_RELOC_LO16:
5839 if (fixP->fx_pcrel)
5840 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
5841 /* fall through */
5842
5843 case BFD_RELOC_LO16_PCREL:
5844 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5845 value, 2);
5846 break;
5847
252b5132
RH		 5848 /* This case happens when you write, for example,
5849 lis %r3,(L1-L2)@ha
5850 where L1 and L2 are defined later. */
5851 case BFD_RELOC_HI16:
94f592af 5852 if (fixP->fx_pcrel)
3c9d25f4
AM		 5853 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
5854 /* fall through */
5855
5856 case BFD_RELOC_HI16_PCREL:
94f592af 5857 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5858 PPC_HI (value), 2);
252b5132 5859 break;
0baf16f2 5860
252b5132 5861 case BFD_RELOC_HI16_S:
94f592af 5862 if (fixP->fx_pcrel)
3c9d25f4
AM		 5863 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
5864 /* fall through */
5865
5866 case BFD_RELOC_HI16_S_PCREL:
94f592af 5867 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5868 PPC_HA (value), 2);
5869 break;
5870
5871#ifdef OBJ_ELF
0baf16f2 5872 case BFD_RELOC_PPC64_HIGHER:
94f592af 5873 if (fixP->fx_pcrel)
0baf16f2 5874 abort ();
94f592af 5875 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5876 PPC_HIGHER (value), 2);
252b5132
RH		 5877 break;
5878
0baf16f2 5879 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5880 if (fixP->fx_pcrel)
0baf16f2 5881 abort ();
94f592af 5882 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5883 PPC_HIGHERA (value), 2);
5884 break;
5885
5886 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5887 if (fixP->fx_pcrel)
0baf16f2 5888 abort ();
94f592af 5889 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5890 PPC_HIGHEST (value), 2);
5891 break;
5892
5893 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5894 if (fixP->fx_pcrel)
0baf16f2 5895 abort ();
94f592af 5896 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5897 PPC_HIGHESTA (value), 2);
5898 break;
5899
5900 case BFD_RELOC_PPC64_ADDR16_DS:
5901 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5902 case BFD_RELOC_PPC64_GOT16_DS:
5903 case BFD_RELOC_PPC64_GOT16_LO_DS:
5904 case BFD_RELOC_PPC64_PLT16_LO_DS:
5905 case BFD_RELOC_PPC64_SECTOFF_DS:
5906 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5907 case BFD_RELOC_PPC64_TOC16_DS:
5908 case BFD_RELOC_PPC64_TOC16_LO_DS:
5909 case BFD_RELOC_PPC64_PLTGOT16_DS:
5910 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5911 if (fixP->fx_pcrel)
0baf16f2
AM		 5912 abort ();
5913 {
2132e3a3 5914 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 5915 unsigned long val, mask;
0baf16f2
AM		 5916
5917 if (target_big_endian)
adadcc0c 5918 val = bfd_getb32 (where - 2);
0baf16f2 5919 else
adadcc0c
AM		 5920 val = bfd_getl32 (where);
5921 mask = 0xfffc;
5922 /* lq insns reserve the four lsbs. */
5923 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 5924 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 5925 mask = 0xfff0;
5926 val |= value & mask;
0baf16f2
AM		 5927 if (target_big_endian)
5928 bfd_putb16 ((bfd_vma) val, where);
5929 else
5930 bfd_putl16 ((bfd_vma) val, where);
5931 }
5932 break;
cdba85ec 5933
ba0b2174
AM		 5934 case BFD_RELOC_PPC_B16_BRTAKEN:
5935 case BFD_RELOC_PPC_B16_BRNTAKEN:
5936 case BFD_RELOC_PPC_BA16_BRTAKEN:
5937 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5938 break;
5939
cdba85ec 5940 case BFD_RELOC_PPC_TLS:
7c1d0959
L		 5941 break;
5942
cdba85ec
AM		 5943 case BFD_RELOC_PPC_DTPMOD:
5944 case BFD_RELOC_PPC_TPREL16:
5945 case BFD_RELOC_PPC_TPREL16_LO:
5946 case BFD_RELOC_PPC_TPREL16_HI:
5947 case BFD_RELOC_PPC_TPREL16_HA:
5948 case BFD_RELOC_PPC_TPREL:
5949 case BFD_RELOC_PPC_DTPREL16:
5950 case BFD_RELOC_PPC_DTPREL16_LO:
5951 case BFD_RELOC_PPC_DTPREL16_HI:
5952 case BFD_RELOC_PPC_DTPREL16_HA:
5953 case BFD_RELOC_PPC_DTPREL:
5954 case BFD_RELOC_PPC_GOT_TLSGD16:
5955 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5956 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5957 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5958 case BFD_RELOC_PPC_GOT_TLSLD16:
5959 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5960 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5961 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5962 case BFD_RELOC_PPC_GOT_TPREL16:
5963 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5964 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5965 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5966 case BFD_RELOC_PPC_GOT_DTPREL16:
5967 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5968 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5969 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
5970 case BFD_RELOC_PPC64_TPREL16_DS:
5971 case BFD_RELOC_PPC64_TPREL16_LO_DS:
5972 case BFD_RELOC_PPC64_TPREL16_HIGHER:
5973 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
5974 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
5975 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
5976 case BFD_RELOC_PPC64_DTPREL16_DS:
5977 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
5978 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
5979 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
5980 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
5981 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 5982 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 5983 break;
0baf16f2 5984#endif
252b5132 5985 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 5986 bytes, rather than 2, so offset it here appropriately. */
252b5132 5987 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 5988 if (fixP->fx_pcrel)
252b5132
RH		 5989 abort ();
5990
94f592af 5991 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 5992 + ((target_big_endian) ? 2 : 0),
5993 value, 2);
5994 break;
5995
5996 case BFD_RELOC_8:
94f592af 5997 if (fixP->fx_pcrel)
31a91399
NC		 5998 {
5999 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 6000 ".byte <undefined_symbol> - ." */
31a91399
NC		 6001 if (fixP->fx_addsy)
6002 as_bad (_("Unable to handle reference to symbol %s"),
6003 S_GET_NAME (fixP->fx_addsy));
6004 else
6005 as_bad (_("Unable to resolve expression"));
6006 fixP->fx_done = 1;
6007 }
6008 else
6009 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6010 value, 1);
252b5132
RH		 6011 break;
6012
6013 case BFD_RELOC_24_PLT_PCREL:
6014 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 6015 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 6016 abort ();
6017
94f592af 6018 if (fixP->fx_done)
99a814a1
AM		 6019 {
6020 char *where;
6021 unsigned long insn;
6022
6023 /* Fetch the instruction, insert the fully resolved operand
6024 value, and stuff the instruction back again. */
94f592af 6025 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6026 if (target_big_endian)
6027 insn = bfd_getb32 ((unsigned char *) where);
6028 else
6029 insn = bfd_getl32 ((unsigned char *) where);
6030 if ((value & 3) != 0)
94f592af 6031 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6032 _("must branch to an address a multiple of 4"));
6033 if ((offsetT) value < -0x40000000
6034 || (offsetT) value >= 0x40000000)
94f592af 6035 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6036 _("@local or @plt branch destination is too far away, %ld bytes"),
6037 (long) value);
6038 insn = insn | (value & 0x03fffffc);
6039 if (target_big_endian)
6040 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6041 else
6042 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6043 }
252b5132
RH		 6044 break;
6045
6046 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6047 fixP->fx_done = 0;
6048 if (fixP->fx_addsy
6049 && !S_IS_DEFINED (fixP->fx_addsy)
6050 && !S_IS_WEAK (fixP->fx_addsy))
6051 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6052 break;
6053
6054 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6055 fixP->fx_done = 0;
252b5132
RH		 6056 break;
6057
0baf16f2 6058#ifdef OBJ_ELF
0baf16f2
AM		 6059 /* Generated by reference to `sym@tocbase'. The sym is
6060 ignored by the linker. */
6061 case BFD_RELOC_PPC64_TOC:
94f592af 6062 fixP->fx_done = 0;
0baf16f2 6063 break;
0baf16f2 6064#endif
252b5132 6065 default:
bc805888 6066 fprintf (stderr,
94f592af 6067 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6068 fflush (stderr);
252b5132
RH		 6069 abort ();
6070 }
6071 }
6072
6073#ifdef OBJ_ELF
94f592af 6074 fixP->fx_addnumber = value;
4e6935a6
AM		 6075
6076 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6077 from the section contents. If we are going to be emitting a reloc
6078 then the section contents are immaterial, so don't warn if they
6079 happen to overflow. Leave such warnings to ld. */
6080 if (!fixP->fx_done)
6081 fixP->fx_no_overflow = 1;
252b5132 6082#else
94f592af
NC		 6083 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6084 fixP->fx_addnumber = 0;
252b5132
RH		 6085 else
6086 {
6087#ifdef TE_PE
94f592af 6088 fixP->fx_addnumber = 0;
252b5132
RH		 6089#else
6090 /* We want to use the offset within the data segment of the
6091 symbol, not the actual VMA of the symbol. */
94f592af
NC		 6092 fixP->fx_addnumber =
6093 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy));
252b5132
RH		 6094#endif
6095 }
6096#endif
252b5132
RH		 6097}
6098
6099/* Generate a reloc for a fixup. */
6100
6101arelent *
98027b10 6102tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6103{
6104 arelent *reloc;
6105
6106 reloc = (arelent *) xmalloc (sizeof (arelent));
6107
49309057
ILT		 6108 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6109 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6110 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6111 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6112 if (reloc->howto == (reloc_howto_type *) NULL)
6113 {
6114 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6115 _("reloc %d not supported by object file format"),
6116 (int) fixp->fx_r_type);
252b5132
RH		 6117 return NULL;
6118 }
6119 reloc->addend = fixp->fx_addnumber;
6120
6121 return reloc;
6122}
75e21f08
JJ		 6123
6124void
98027b10 6125ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6126{
6127 cfi_add_CFA_def_cfa (1, 0);
6128}
6129
6130int
1df69f4f 6131tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6132{
6133 unsigned int regnum = -1;
6134 unsigned int i;
6135 const char *p;
6136 char *q;
6137 static struct { char *name; int dw2regnum; } regnames[] =
6138 {
6139 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6140 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6141 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6142 { "spe_acc", 111 }, { "spefscr", 112 }
6143 };
6144
6145 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6146 if (strcmp (regnames[i].name, regname) == 0)
6147 return regnames[i].dw2regnum;
6148
6149 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6150 {
6151 p = regname + 1 + (regname[1] == '.');
6152 regnum = strtoul (p, &q, 10);
6153 if (p == q || *q || regnum >= 32)
6154 return -1;
6155 if (regname[0] == 'f')
b7d7dc63 6156 regnum += 32;
75e21f08 6157 else if (regname[0] == 'v')
b7d7dc63 6158 regnum += 77;
75e21f08
JJ		 6159 }
6160 else if (regname[0] == 'c' && regname[1] == 'r')
6161 {
6162 p = regname + 2 + (regname[2] == '.');
6163 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6164 return -1;
75e21f08
JJ		 6165 regnum = p[0] - '0' + 68;
6166 }
6167 return regnum;
6168}
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