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252b5132 | 1 | /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000) |
b7d7dc63 | 2 | Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, |
aea77599 | 3 | 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012 |
cc643b88 | 4 | Free Software Foundation, Inc. |
252b5132 RH |
5 | Written by Ian Lance Taylor, Cygnus Support. |
6 | ||
7 | This file is part of GAS, the GNU Assembler. | |
8 | ||
9 | GAS is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
ec2655a6 | 11 | the Free Software Foundation; either version 3, or (at your option) |
252b5132 RH |
12 | any later version. |
13 | ||
14 | GAS is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
20 | along with GAS; see the file COPYING. If not, write to the Free | |
4b4da160 NC |
21 | Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA |
22 | 02110-1301, USA. */ | |
252b5132 | 23 | |
252b5132 | 24 | #include "as.h" |
3882b010 | 25 | #include "safe-ctype.h" |
252b5132 | 26 | #include "subsegs.h" |
75e21f08 | 27 | #include "dw2gencfi.h" |
252b5132 RH |
28 | #include "opcode/ppc.h" |
29 | ||
30 | #ifdef OBJ_ELF | |
31 | #include "elf/ppc.h" | |
5d6f4f16 | 32 | #include "dwarf2dbg.h" |
252b5132 RH |
33 | #endif |
34 | ||
35 | #ifdef TE_PE | |
36 | #include "coff/pe.h" | |
37 | #endif | |
38 | ||
85645aed TG |
39 | #ifdef OBJ_XCOFF |
40 | #include "coff/xcoff.h" | |
41 | #include "libxcoff.h" | |
42 | #endif | |
43 | ||
252b5132 RH |
44 | /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */ |
45 | ||
46 | /* Tell the main code what the endianness is. */ | |
47 | extern int target_big_endian; | |
48 | ||
49 | /* Whether or not, we've set target_big_endian. */ | |
50 | static int set_target_endian = 0; | |
51 | ||
52 | /* Whether to use user friendly register names. */ | |
53 | #ifndef TARGET_REG_NAMES_P | |
54 | #ifdef TE_PE | |
b34976b6 | 55 | #define TARGET_REG_NAMES_P TRUE |
252b5132 | 56 | #else |
b34976b6 | 57 | #define TARGET_REG_NAMES_P FALSE |
252b5132 RH |
58 | #endif |
59 | #endif | |
60 | ||
0baf16f2 AM |
61 | /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST, |
62 | HIGHESTA. */ | |
63 | ||
64 | /* #lo(value) denotes the least significant 16 bits of the indicated. */ | |
65 | #define PPC_LO(v) ((v) & 0xffff) | |
66 | ||
67 | /* #hi(value) denotes bits 16 through 31 of the indicated value. */ | |
68 | #define PPC_HI(v) (((v) >> 16) & 0xffff) | |
69 | ||
70 | /* #ha(value) denotes the high adjusted value: bits 16 through 31 of | |
71 | the indicated value, compensating for #lo() being treated as a | |
72 | signed number. */ | |
15c1449b | 73 | #define PPC_HA(v) PPC_HI ((v) + 0x8000) |
0baf16f2 AM |
74 | |
75 | /* #higher(value) denotes bits 32 through 47 of the indicated value. */ | |
2a98c3a6 | 76 | #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff) |
0baf16f2 AM |
77 | |
78 | /* #highera(value) denotes bits 32 through 47 of the indicated value, | |
79 | compensating for #lo() being treated as a signed number. */ | |
15c1449b | 80 | #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000) |
0baf16f2 AM |
81 | |
82 | /* #highest(value) denotes bits 48 through 63 of the indicated value. */ | |
2a98c3a6 | 83 | #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff) |
0baf16f2 AM |
84 | |
85 | /* #highesta(value) denotes bits 48 through 63 of the indicated value, | |
15c1449b AM |
86 | compensating for #lo being treated as a signed number. */ |
87 | #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000) | |
0baf16f2 AM |
88 | |
89 | #define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000) | |
90 | ||
b34976b6 | 91 | static bfd_boolean reg_names_p = TARGET_REG_NAMES_P; |
252b5132 | 92 | |
98027b10 AM |
93 | static void ppc_macro (char *, const struct powerpc_macro *); |
94 | static void ppc_byte (int); | |
0baf16f2 AM |
95 | |
96 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) | |
98027b10 AM |
97 | static void ppc_tc (int); |
98 | static void ppc_machine (int); | |
0baf16f2 | 99 | #endif |
252b5132 RH |
100 | |
101 | #ifdef OBJ_XCOFF | |
98027b10 AM |
102 | static void ppc_comm (int); |
103 | static void ppc_bb (int); | |
104 | static void ppc_bc (int); | |
105 | static void ppc_bf (int); | |
106 | static void ppc_biei (int); | |
107 | static void ppc_bs (int); | |
108 | static void ppc_eb (int); | |
109 | static void ppc_ec (int); | |
110 | static void ppc_ef (int); | |
111 | static void ppc_es (int); | |
112 | static void ppc_csect (int); | |
85645aed | 113 | static void ppc_dwsect (int); |
98027b10 AM |
114 | static void ppc_change_csect (symbolS *, offsetT); |
115 | static void ppc_function (int); | |
116 | static void ppc_extern (int); | |
117 | static void ppc_lglobl (int); | |
c865e45b | 118 | static void ppc_ref (int); |
98027b10 AM |
119 | static void ppc_section (int); |
120 | static void ppc_named_section (int); | |
121 | static void ppc_stabx (int); | |
122 | static void ppc_rename (int); | |
123 | static void ppc_toc (int); | |
124 | static void ppc_xcoff_cons (int); | |
125 | static void ppc_vbyte (int); | |
252b5132 RH |
126 | #endif |
127 | ||
128 | #ifdef OBJ_ELF | |
98027b10 AM |
129 | static void ppc_elf_cons (int); |
130 | static void ppc_elf_rdata (int); | |
131 | static void ppc_elf_lcomm (int); | |
252b5132 RH |
132 | #endif |
133 | ||
134 | #ifdef TE_PE | |
98027b10 AM |
135 | static void ppc_previous (int); |
136 | static void ppc_pdata (int); | |
137 | static void ppc_ydata (int); | |
138 | static void ppc_reldata (int); | |
139 | static void ppc_rdata (int); | |
140 | static void ppc_ualong (int); | |
141 | static void ppc_znop (int); | |
142 | static void ppc_pe_comm (int); | |
143 | static void ppc_pe_section (int); | |
144 | static void ppc_pe_function (int); | |
145 | static void ppc_pe_tocd (int); | |
252b5132 RH |
146 | #endif |
147 | \f | |
148 | /* Generic assembler global variables which must be defined by all | |
149 | targets. */ | |
150 | ||
151 | #ifdef OBJ_ELF | |
152 | /* This string holds the chars that always start a comment. If the | |
153 | pre-processor is disabled, these aren't very useful. The macro | |
154 | tc_comment_chars points to this. We use this, rather than the | |
155 | usual comment_chars, so that we can switch for Solaris conventions. */ | |
156 | static const char ppc_solaris_comment_chars[] = "#!"; | |
157 | static const char ppc_eabi_comment_chars[] = "#"; | |
158 | ||
159 | #ifdef TARGET_SOLARIS_COMMENT | |
160 | const char *ppc_comment_chars = ppc_solaris_comment_chars; | |
161 | #else | |
162 | const char *ppc_comment_chars = ppc_eabi_comment_chars; | |
163 | #endif | |
164 | #else | |
165 | const char comment_chars[] = "#"; | |
166 | #endif | |
167 | ||
168 | /* Characters which start a comment at the beginning of a line. */ | |
169 | const char line_comment_chars[] = "#"; | |
170 | ||
171 | /* Characters which may be used to separate multiple commands on a | |
172 | single line. */ | |
173 | const char line_separator_chars[] = ";"; | |
174 | ||
175 | /* Characters which are used to indicate an exponent in a floating | |
176 | point number. */ | |
177 | const char EXP_CHARS[] = "eE"; | |
178 | ||
179 | /* Characters which mean that a number is a floating point constant, | |
180 | as in 0d1.0. */ | |
181 | const char FLT_CHARS[] = "dD"; | |
5ce8663f | 182 | |
5e02f92e | 183 | /* Anything that can start an operand needs to be mentioned here, |
ac805826 | 184 | to stop the input scrubber eating whitespace. */ |
5e02f92e | 185 | const char ppc_symbol_chars[] = "%["; |
75e21f08 JJ |
186 | |
187 | /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */ | |
188 | int ppc_cie_data_alignment; | |
783de163 | 189 | |
8fbf7334 JL |
190 | /* The dwarf2 minimum instruction length. */ |
191 | int ppc_dwarf2_line_min_insn_length; | |
192 | ||
cef4f754 AM |
193 | /* More than this number of nops in an alignment op gets a branch |
194 | instead. */ | |
195 | unsigned long nop_limit = 4; | |
196 | ||
783de163 AM |
197 | /* The type of processor we are assembling for. This is one or more |
198 | of the PPC_OPCODE flags defined in opcode/ppc.h. */ | |
fa452fa6 | 199 | ppc_cpu_t ppc_cpu = 0; |
776fc418 | 200 | ppc_cpu_t sticky = 0; |
01efc3af AM |
201 | |
202 | /* Flags set on encountering toc relocs. */ | |
203 | enum { | |
204 | has_large_toc_reloc = 1, | |
205 | has_small_toc_reloc = 2 | |
206 | } toc_reloc_types; | |
252b5132 RH |
207 | \f |
208 | /* The target specific pseudo-ops which we support. */ | |
209 | ||
210 | const pseudo_typeS md_pseudo_table[] = | |
211 | { | |
212 | /* Pseudo-ops which must be overridden. */ | |
213 | { "byte", ppc_byte, 0 }, | |
214 | ||
215 | #ifdef OBJ_XCOFF | |
216 | /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these | |
217 | legitimately belong in the obj-*.c file. However, XCOFF is based | |
218 | on COFF, and is only implemented for the RS/6000. We just use | |
219 | obj-coff.c, and add what we need here. */ | |
220 | { "comm", ppc_comm, 0 }, | |
221 | { "lcomm", ppc_comm, 1 }, | |
222 | { "bb", ppc_bb, 0 }, | |
223 | { "bc", ppc_bc, 0 }, | |
224 | { "bf", ppc_bf, 0 }, | |
225 | { "bi", ppc_biei, 0 }, | |
226 | { "bs", ppc_bs, 0 }, | |
227 | { "csect", ppc_csect, 0 }, | |
85645aed | 228 | { "dwsect", ppc_dwsect, 0 }, |
252b5132 RH |
229 | { "data", ppc_section, 'd' }, |
230 | { "eb", ppc_eb, 0 }, | |
231 | { "ec", ppc_ec, 0 }, | |
232 | { "ef", ppc_ef, 0 }, | |
233 | { "ei", ppc_biei, 1 }, | |
234 | { "es", ppc_es, 0 }, | |
235 | { "extern", ppc_extern, 0 }, | |
236 | { "function", ppc_function, 0 }, | |
237 | { "lglobl", ppc_lglobl, 0 }, | |
c865e45b | 238 | { "ref", ppc_ref, 0 }, |
252b5132 RH |
239 | { "rename", ppc_rename, 0 }, |
240 | { "section", ppc_named_section, 0 }, | |
241 | { "stabx", ppc_stabx, 0 }, | |
242 | { "text", ppc_section, 't' }, | |
243 | { "toc", ppc_toc, 0 }, | |
244 | { "long", ppc_xcoff_cons, 2 }, | |
7f6d05e8 | 245 | { "llong", ppc_xcoff_cons, 3 }, |
252b5132 RH |
246 | { "word", ppc_xcoff_cons, 1 }, |
247 | { "short", ppc_xcoff_cons, 1 }, | |
248 | { "vbyte", ppc_vbyte, 0 }, | |
249 | #endif | |
250 | ||
251 | #ifdef OBJ_ELF | |
0baf16f2 AM |
252 | { "llong", ppc_elf_cons, 8 }, |
253 | { "quad", ppc_elf_cons, 8 }, | |
252b5132 RH |
254 | { "long", ppc_elf_cons, 4 }, |
255 | { "word", ppc_elf_cons, 2 }, | |
256 | { "short", ppc_elf_cons, 2 }, | |
257 | { "rdata", ppc_elf_rdata, 0 }, | |
258 | { "rodata", ppc_elf_rdata, 0 }, | |
259 | { "lcomm", ppc_elf_lcomm, 0 }, | |
260 | #endif | |
261 | ||
262 | #ifdef TE_PE | |
99a814a1 | 263 | /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */ |
252b5132 RH |
264 | { "previous", ppc_previous, 0 }, |
265 | { "pdata", ppc_pdata, 0 }, | |
266 | { "ydata", ppc_ydata, 0 }, | |
267 | { "reldata", ppc_reldata, 0 }, | |
268 | { "rdata", ppc_rdata, 0 }, | |
269 | { "ualong", ppc_ualong, 0 }, | |
270 | { "znop", ppc_znop, 0 }, | |
271 | { "comm", ppc_pe_comm, 0 }, | |
272 | { "lcomm", ppc_pe_comm, 1 }, | |
273 | { "section", ppc_pe_section, 0 }, | |
274 | { "function", ppc_pe_function,0 }, | |
275 | { "tocd", ppc_pe_tocd, 0 }, | |
276 | #endif | |
277 | ||
0baf16f2 | 278 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) |
252b5132 | 279 | { "tc", ppc_tc, 0 }, |
0baf16f2 AM |
280 | { "machine", ppc_machine, 0 }, |
281 | #endif | |
252b5132 RH |
282 | |
283 | { NULL, NULL, 0 } | |
284 | }; | |
285 | ||
286 | \f | |
99a814a1 AM |
287 | /* Predefined register names if -mregnames (or default for Windows NT). |
288 | In general, there are lots of them, in an attempt to be compatible | |
289 | with a number of other Windows NT assemblers. */ | |
252b5132 RH |
290 | |
291 | /* Structure to hold information about predefined registers. */ | |
292 | struct pd_reg | |
293 | { | |
294 | char *name; | |
295 | int value; | |
296 | }; | |
297 | ||
298 | /* List of registers that are pre-defined: | |
299 | ||
300 | Each general register has predefined names of the form: | |
301 | 1. r<reg_num> which has the value <reg_num>. | |
302 | 2. r.<reg_num> which has the value <reg_num>. | |
303 | ||
252b5132 RH |
304 | Each floating point register has predefined names of the form: |
305 | 1. f<reg_num> which has the value <reg_num>. | |
306 | 2. f.<reg_num> which has the value <reg_num>. | |
307 | ||
7a899fff C |
308 | Each vector unit register has predefined names of the form: |
309 | 1. v<reg_num> which has the value <reg_num>. | |
310 | 2. v.<reg_num> which has the value <reg_num>. | |
311 | ||
252b5132 RH |
312 | Each condition register has predefined names of the form: |
313 | 1. cr<reg_num> which has the value <reg_num>. | |
314 | 2. cr.<reg_num> which has the value <reg_num>. | |
315 | ||
316 | There are individual registers as well: | |
317 | sp or r.sp has the value 1 | |
318 | rtoc or r.toc has the value 2 | |
319 | fpscr has the value 0 | |
320 | xer has the value 1 | |
321 | lr has the value 8 | |
322 | ctr has the value 9 | |
323 | pmr has the value 0 | |
324 | dar has the value 19 | |
325 | dsisr has the value 18 | |
326 | dec has the value 22 | |
327 | sdr1 has the value 25 | |
328 | srr0 has the value 26 | |
329 | srr1 has the value 27 | |
330 | ||
81d4177b | 331 | The table is sorted. Suitable for searching by a binary search. */ |
252b5132 RH |
332 | |
333 | static const struct pd_reg pre_defined_registers[] = | |
334 | { | |
335 | { "cr.0", 0 }, /* Condition Registers */ | |
336 | { "cr.1", 1 }, | |
337 | { "cr.2", 2 }, | |
338 | { "cr.3", 3 }, | |
339 | { "cr.4", 4 }, | |
340 | { "cr.5", 5 }, | |
341 | { "cr.6", 6 }, | |
342 | { "cr.7", 7 }, | |
343 | ||
344 | { "cr0", 0 }, | |
345 | { "cr1", 1 }, | |
346 | { "cr2", 2 }, | |
347 | { "cr3", 3 }, | |
348 | { "cr4", 4 }, | |
349 | { "cr5", 5 }, | |
350 | { "cr6", 6 }, | |
351 | { "cr7", 7 }, | |
352 | ||
353 | { "ctr", 9 }, | |
354 | ||
355 | { "dar", 19 }, /* Data Access Register */ | |
356 | { "dec", 22 }, /* Decrementer */ | |
357 | { "dsisr", 18 }, /* Data Storage Interrupt Status Register */ | |
358 | ||
359 | { "f.0", 0 }, /* Floating point registers */ | |
81d4177b KH |
360 | { "f.1", 1 }, |
361 | { "f.10", 10 }, | |
362 | { "f.11", 11 }, | |
363 | { "f.12", 12 }, | |
364 | { "f.13", 13 }, | |
365 | { "f.14", 14 }, | |
366 | { "f.15", 15 }, | |
367 | { "f.16", 16 }, | |
368 | { "f.17", 17 }, | |
369 | { "f.18", 18 }, | |
370 | { "f.19", 19 }, | |
371 | { "f.2", 2 }, | |
372 | { "f.20", 20 }, | |
373 | { "f.21", 21 }, | |
374 | { "f.22", 22 }, | |
375 | { "f.23", 23 }, | |
376 | { "f.24", 24 }, | |
377 | { "f.25", 25 }, | |
378 | { "f.26", 26 }, | |
379 | { "f.27", 27 }, | |
380 | { "f.28", 28 }, | |
381 | { "f.29", 29 }, | |
382 | { "f.3", 3 }, | |
252b5132 RH |
383 | { "f.30", 30 }, |
384 | { "f.31", 31 }, | |
066be9f7 PB |
385 | |
386 | { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */ | |
387 | { "f.33", 33 }, | |
388 | { "f.34", 34 }, | |
389 | { "f.35", 35 }, | |
390 | { "f.36", 36 }, | |
391 | { "f.37", 37 }, | |
392 | { "f.38", 38 }, | |
393 | { "f.39", 39 }, | |
81d4177b | 394 | { "f.4", 4 }, |
066be9f7 PB |
395 | { "f.40", 40 }, |
396 | { "f.41", 41 }, | |
397 | { "f.42", 42 }, | |
398 | { "f.43", 43 }, | |
399 | { "f.44", 44 }, | |
400 | { "f.45", 45 }, | |
401 | { "f.46", 46 }, | |
402 | { "f.47", 47 }, | |
403 | { "f.48", 48 }, | |
404 | { "f.49", 49 }, | |
81d4177b | 405 | { "f.5", 5 }, |
066be9f7 PB |
406 | { "f.50", 50 }, |
407 | { "f.51", 51 }, | |
408 | { "f.52", 52 }, | |
409 | { "f.53", 53 }, | |
410 | { "f.54", 54 }, | |
411 | { "f.55", 55 }, | |
412 | { "f.56", 56 }, | |
413 | { "f.57", 57 }, | |
414 | { "f.58", 58 }, | |
415 | { "f.59", 59 }, | |
81d4177b | 416 | { "f.6", 6 }, |
066be9f7 PB |
417 | { "f.60", 60 }, |
418 | { "f.61", 61 }, | |
419 | { "f.62", 62 }, | |
420 | { "f.63", 63 }, | |
81d4177b KH |
421 | { "f.7", 7 }, |
422 | { "f.8", 8 }, | |
423 | { "f.9", 9 }, | |
424 | ||
425 | { "f0", 0 }, | |
426 | { "f1", 1 }, | |
427 | { "f10", 10 }, | |
428 | { "f11", 11 }, | |
429 | { "f12", 12 }, | |
430 | { "f13", 13 }, | |
431 | { "f14", 14 }, | |
432 | { "f15", 15 }, | |
433 | { "f16", 16 }, | |
434 | { "f17", 17 }, | |
435 | { "f18", 18 }, | |
436 | { "f19", 19 }, | |
437 | { "f2", 2 }, | |
438 | { "f20", 20 }, | |
439 | { "f21", 21 }, | |
440 | { "f22", 22 }, | |
441 | { "f23", 23 }, | |
442 | { "f24", 24 }, | |
443 | { "f25", 25 }, | |
444 | { "f26", 26 }, | |
445 | { "f27", 27 }, | |
446 | { "f28", 28 }, | |
447 | { "f29", 29 }, | |
448 | { "f3", 3 }, | |
252b5132 RH |
449 | { "f30", 30 }, |
450 | { "f31", 31 }, | |
066be9f7 PB |
451 | |
452 | { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */ | |
453 | { "f33", 33 }, | |
454 | { "f34", 34 }, | |
455 | { "f35", 35 }, | |
456 | { "f36", 36 }, | |
457 | { "f37", 37 }, | |
458 | { "f38", 38 }, | |
459 | { "f39", 39 }, | |
81d4177b | 460 | { "f4", 4 }, |
066be9f7 PB |
461 | { "f40", 40 }, |
462 | { "f41", 41 }, | |
463 | { "f42", 42 }, | |
464 | { "f43", 43 }, | |
465 | { "f44", 44 }, | |
466 | { "f45", 45 }, | |
467 | { "f46", 46 }, | |
468 | { "f47", 47 }, | |
469 | { "f48", 48 }, | |
470 | { "f49", 49 }, | |
81d4177b | 471 | { "f5", 5 }, |
066be9f7 PB |
472 | { "f50", 50 }, |
473 | { "f51", 51 }, | |
474 | { "f52", 52 }, | |
475 | { "f53", 53 }, | |
476 | { "f54", 54 }, | |
477 | { "f55", 55 }, | |
478 | { "f56", 56 }, | |
479 | { "f57", 57 }, | |
480 | { "f58", 58 }, | |
481 | { "f59", 59 }, | |
81d4177b | 482 | { "f6", 6 }, |
066be9f7 PB |
483 | { "f60", 60 }, |
484 | { "f61", 61 }, | |
485 | { "f62", 62 }, | |
486 | { "f63", 63 }, | |
81d4177b KH |
487 | { "f7", 7 }, |
488 | { "f8", 8 }, | |
489 | { "f9", 9 }, | |
252b5132 RH |
490 | |
491 | { "fpscr", 0 }, | |
492 | ||
c3d65c1c BE |
493 | /* Quantization registers used with pair single instructions. */ |
494 | { "gqr.0", 0 }, | |
495 | { "gqr.1", 1 }, | |
496 | { "gqr.2", 2 }, | |
497 | { "gqr.3", 3 }, | |
498 | { "gqr.4", 4 }, | |
499 | { "gqr.5", 5 }, | |
500 | { "gqr.6", 6 }, | |
501 | { "gqr.7", 7 }, | |
502 | { "gqr0", 0 }, | |
503 | { "gqr1", 1 }, | |
504 | { "gqr2", 2 }, | |
505 | { "gqr3", 3 }, | |
506 | { "gqr4", 4 }, | |
507 | { "gqr5", 5 }, | |
508 | { "gqr6", 6 }, | |
509 | { "gqr7", 7 }, | |
510 | ||
252b5132 RH |
511 | { "lr", 8 }, /* Link Register */ |
512 | ||
513 | { "pmr", 0 }, | |
514 | ||
515 | { "r.0", 0 }, /* General Purpose Registers */ | |
516 | { "r.1", 1 }, | |
517 | { "r.10", 10 }, | |
518 | { "r.11", 11 }, | |
519 | { "r.12", 12 }, | |
520 | { "r.13", 13 }, | |
521 | { "r.14", 14 }, | |
522 | { "r.15", 15 }, | |
523 | { "r.16", 16 }, | |
524 | { "r.17", 17 }, | |
525 | { "r.18", 18 }, | |
526 | { "r.19", 19 }, | |
527 | { "r.2", 2 }, | |
528 | { "r.20", 20 }, | |
529 | { "r.21", 21 }, | |
530 | { "r.22", 22 }, | |
531 | { "r.23", 23 }, | |
532 | { "r.24", 24 }, | |
533 | { "r.25", 25 }, | |
534 | { "r.26", 26 }, | |
535 | { "r.27", 27 }, | |
536 | { "r.28", 28 }, | |
537 | { "r.29", 29 }, | |
538 | { "r.3", 3 }, | |
539 | { "r.30", 30 }, | |
540 | { "r.31", 31 }, | |
541 | { "r.4", 4 }, | |
542 | { "r.5", 5 }, | |
543 | { "r.6", 6 }, | |
544 | { "r.7", 7 }, | |
545 | { "r.8", 8 }, | |
546 | { "r.9", 9 }, | |
547 | ||
548 | { "r.sp", 1 }, /* Stack Pointer */ | |
549 | ||
550 | { "r.toc", 2 }, /* Pointer to the table of contents */ | |
551 | ||
552 | { "r0", 0 }, /* More general purpose registers */ | |
553 | { "r1", 1 }, | |
554 | { "r10", 10 }, | |
555 | { "r11", 11 }, | |
556 | { "r12", 12 }, | |
557 | { "r13", 13 }, | |
558 | { "r14", 14 }, | |
559 | { "r15", 15 }, | |
560 | { "r16", 16 }, | |
561 | { "r17", 17 }, | |
562 | { "r18", 18 }, | |
563 | { "r19", 19 }, | |
564 | { "r2", 2 }, | |
565 | { "r20", 20 }, | |
566 | { "r21", 21 }, | |
567 | { "r22", 22 }, | |
568 | { "r23", 23 }, | |
569 | { "r24", 24 }, | |
570 | { "r25", 25 }, | |
571 | { "r26", 26 }, | |
572 | { "r27", 27 }, | |
573 | { "r28", 28 }, | |
574 | { "r29", 29 }, | |
575 | { "r3", 3 }, | |
576 | { "r30", 30 }, | |
577 | { "r31", 31 }, | |
578 | { "r4", 4 }, | |
579 | { "r5", 5 }, | |
580 | { "r6", 6 }, | |
581 | { "r7", 7 }, | |
582 | { "r8", 8 }, | |
583 | { "r9", 9 }, | |
584 | ||
585 | { "rtoc", 2 }, /* Table of contents */ | |
586 | ||
587 | { "sdr1", 25 }, /* Storage Description Register 1 */ | |
588 | ||
589 | { "sp", 1 }, | |
590 | ||
591 | { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */ | |
592 | { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */ | |
81d4177b | 593 | |
066be9f7 | 594 | { "v.0", 0 }, /* Vector (Altivec/VMX) registers */ |
81d4177b KH |
595 | { "v.1", 1 }, |
596 | { "v.10", 10 }, | |
597 | { "v.11", 11 }, | |
598 | { "v.12", 12 }, | |
599 | { "v.13", 13 }, | |
600 | { "v.14", 14 }, | |
601 | { "v.15", 15 }, | |
602 | { "v.16", 16 }, | |
603 | { "v.17", 17 }, | |
604 | { "v.18", 18 }, | |
605 | { "v.19", 19 }, | |
606 | { "v.2", 2 }, | |
607 | { "v.20", 20 }, | |
608 | { "v.21", 21 }, | |
609 | { "v.22", 22 }, | |
610 | { "v.23", 23 }, | |
611 | { "v.24", 24 }, | |
612 | { "v.25", 25 }, | |
613 | { "v.26", 26 }, | |
614 | { "v.27", 27 }, | |
615 | { "v.28", 28 }, | |
616 | { "v.29", 29 }, | |
617 | { "v.3", 3 }, | |
7a899fff C |
618 | { "v.30", 30 }, |
619 | { "v.31", 31 }, | |
81d4177b KH |
620 | { "v.4", 4 }, |
621 | { "v.5", 5 }, | |
622 | { "v.6", 6 }, | |
623 | { "v.7", 7 }, | |
624 | { "v.8", 8 }, | |
625 | { "v.9", 9 }, | |
7a899fff C |
626 | |
627 | { "v0", 0 }, | |
81d4177b KH |
628 | { "v1", 1 }, |
629 | { "v10", 10 }, | |
630 | { "v11", 11 }, | |
631 | { "v12", 12 }, | |
632 | { "v13", 13 }, | |
633 | { "v14", 14 }, | |
634 | { "v15", 15 }, | |
635 | { "v16", 16 }, | |
636 | { "v17", 17 }, | |
637 | { "v18", 18 }, | |
638 | { "v19", 19 }, | |
639 | { "v2", 2 }, | |
640 | { "v20", 20 }, | |
641 | { "v21", 21 }, | |
642 | { "v22", 22 }, | |
643 | { "v23", 23 }, | |
644 | { "v24", 24 }, | |
645 | { "v25", 25 }, | |
646 | { "v26", 26 }, | |
647 | { "v27", 27 }, | |
648 | { "v28", 28 }, | |
649 | { "v29", 29 }, | |
650 | { "v3", 3 }, | |
7a899fff C |
651 | { "v30", 30 }, |
652 | { "v31", 31 }, | |
81d4177b KH |
653 | { "v4", 4 }, |
654 | { "v5", 5 }, | |
655 | { "v6", 6 }, | |
656 | { "v7", 7 }, | |
657 | { "v8", 8 }, | |
7a899fff | 658 | { "v9", 9 }, |
252b5132 | 659 | |
066be9f7 PB |
660 | { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */ |
661 | { "vs.1", 1 }, | |
662 | { "vs.10", 10 }, | |
663 | { "vs.11", 11 }, | |
664 | { "vs.12", 12 }, | |
665 | { "vs.13", 13 }, | |
666 | { "vs.14", 14 }, | |
667 | { "vs.15", 15 }, | |
668 | { "vs.16", 16 }, | |
669 | { "vs.17", 17 }, | |
670 | { "vs.18", 18 }, | |
671 | { "vs.19", 19 }, | |
672 | { "vs.2", 2 }, | |
673 | { "vs.20", 20 }, | |
674 | { "vs.21", 21 }, | |
675 | { "vs.22", 22 }, | |
676 | { "vs.23", 23 }, | |
677 | { "vs.24", 24 }, | |
678 | { "vs.25", 25 }, | |
679 | { "vs.26", 26 }, | |
680 | { "vs.27", 27 }, | |
681 | { "vs.28", 28 }, | |
682 | { "vs.29", 29 }, | |
683 | { "vs.3", 3 }, | |
684 | { "vs.30", 30 }, | |
685 | { "vs.31", 31 }, | |
686 | { "vs.32", 32 }, | |
687 | { "vs.33", 33 }, | |
688 | { "vs.34", 34 }, | |
689 | { "vs.35", 35 }, | |
690 | { "vs.36", 36 }, | |
691 | { "vs.37", 37 }, | |
692 | { "vs.38", 38 }, | |
693 | { "vs.39", 39 }, | |
694 | { "vs.4", 4 }, | |
695 | { "vs.40", 40 }, | |
696 | { "vs.41", 41 }, | |
697 | { "vs.42", 42 }, | |
698 | { "vs.43", 43 }, | |
699 | { "vs.44", 44 }, | |
700 | { "vs.45", 45 }, | |
701 | { "vs.46", 46 }, | |
702 | { "vs.47", 47 }, | |
703 | { "vs.48", 48 }, | |
704 | { "vs.49", 49 }, | |
705 | { "vs.5", 5 }, | |
706 | { "vs.50", 50 }, | |
707 | { "vs.51", 51 }, | |
708 | { "vs.52", 52 }, | |
709 | { "vs.53", 53 }, | |
710 | { "vs.54", 54 }, | |
711 | { "vs.55", 55 }, | |
712 | { "vs.56", 56 }, | |
713 | { "vs.57", 57 }, | |
714 | { "vs.58", 58 }, | |
715 | { "vs.59", 59 }, | |
716 | { "vs.6", 6 }, | |
717 | { "vs.60", 60 }, | |
718 | { "vs.61", 61 }, | |
719 | { "vs.62", 62 }, | |
720 | { "vs.63", 63 }, | |
721 | { "vs.7", 7 }, | |
722 | { "vs.8", 8 }, | |
723 | { "vs.9", 9 }, | |
724 | ||
725 | { "vs0", 0 }, | |
726 | { "vs1", 1 }, | |
727 | { "vs10", 10 }, | |
728 | { "vs11", 11 }, | |
729 | { "vs12", 12 }, | |
730 | { "vs13", 13 }, | |
731 | { "vs14", 14 }, | |
732 | { "vs15", 15 }, | |
733 | { "vs16", 16 }, | |
734 | { "vs17", 17 }, | |
735 | { "vs18", 18 }, | |
736 | { "vs19", 19 }, | |
737 | { "vs2", 2 }, | |
738 | { "vs20", 20 }, | |
739 | { "vs21", 21 }, | |
740 | { "vs22", 22 }, | |
741 | { "vs23", 23 }, | |
742 | { "vs24", 24 }, | |
743 | { "vs25", 25 }, | |
744 | { "vs26", 26 }, | |
745 | { "vs27", 27 }, | |
746 | { "vs28", 28 }, | |
747 | { "vs29", 29 }, | |
748 | { "vs3", 3 }, | |
749 | { "vs30", 30 }, | |
750 | { "vs31", 31 }, | |
751 | { "vs32", 32 }, | |
752 | { "vs33", 33 }, | |
753 | { "vs34", 34 }, | |
754 | { "vs35", 35 }, | |
755 | { "vs36", 36 }, | |
756 | { "vs37", 37 }, | |
757 | { "vs38", 38 }, | |
758 | { "vs39", 39 }, | |
759 | { "vs4", 4 }, | |
760 | { "vs40", 40 }, | |
761 | { "vs41", 41 }, | |
762 | { "vs42", 42 }, | |
763 | { "vs43", 43 }, | |
764 | { "vs44", 44 }, | |
765 | { "vs45", 45 }, | |
766 | { "vs46", 46 }, | |
767 | { "vs47", 47 }, | |
768 | { "vs48", 48 }, | |
769 | { "vs49", 49 }, | |
770 | { "vs5", 5 }, | |
771 | { "vs50", 50 }, | |
772 | { "vs51", 51 }, | |
773 | { "vs52", 52 }, | |
774 | { "vs53", 53 }, | |
775 | { "vs54", 54 }, | |
776 | { "vs55", 55 }, | |
777 | { "vs56", 56 }, | |
778 | { "vs57", 57 }, | |
779 | { "vs58", 58 }, | |
780 | { "vs59", 59 }, | |
781 | { "vs6", 6 }, | |
782 | { "vs60", 60 }, | |
783 | { "vs61", 61 }, | |
784 | { "vs62", 62 }, | |
785 | { "vs63", 63 }, | |
786 | { "vs7", 7 }, | |
787 | { "vs8", 8 }, | |
788 | { "vs9", 9 }, | |
789 | ||
252b5132 RH |
790 | { "xer", 1 }, |
791 | ||
792 | }; | |
793 | ||
bc805888 | 794 | #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg)) |
252b5132 RH |
795 | |
796 | /* Given NAME, find the register number associated with that name, return | |
797 | the integer value associated with the given name or -1 on failure. */ | |
798 | ||
252b5132 | 799 | static int |
98027b10 | 800 | reg_name_search (const struct pd_reg *regs, int regcount, const char *name) |
252b5132 RH |
801 | { |
802 | int middle, low, high; | |
803 | int cmp; | |
804 | ||
805 | low = 0; | |
806 | high = regcount - 1; | |
807 | ||
808 | do | |
809 | { | |
810 | middle = (low + high) / 2; | |
811 | cmp = strcasecmp (name, regs[middle].name); | |
812 | if (cmp < 0) | |
813 | high = middle - 1; | |
814 | else if (cmp > 0) | |
815 | low = middle + 1; | |
816 | else | |
817 | return regs[middle].value; | |
818 | } | |
819 | while (low <= high); | |
820 | ||
821 | return -1; | |
822 | } | |
823 | ||
824 | /* | |
99a814a1 | 825 | * Summary of register_name. |
252b5132 RH |
826 | * |
827 | * in: Input_line_pointer points to 1st char of operand. | |
828 | * | |
829 | * out: A expressionS. | |
830 | * The operand may have been a register: in this case, X_op == O_register, | |
831 | * X_add_number is set to the register number, and truth is returned. | |
832 | * Input_line_pointer->(next non-blank) char after operand, or is in its | |
833 | * original state. | |
834 | */ | |
835 | ||
b34976b6 | 836 | static bfd_boolean |
98027b10 | 837 | register_name (expressionS *expressionP) |
252b5132 RH |
838 | { |
839 | int reg_number; | |
840 | char *name; | |
841 | char *start; | |
842 | char c; | |
843 | ||
99a814a1 | 844 | /* Find the spelling of the operand. */ |
252b5132 | 845 | start = name = input_line_pointer; |
3882b010 | 846 | if (name[0] == '%' && ISALPHA (name[1])) |
252b5132 RH |
847 | name = ++input_line_pointer; |
848 | ||
3882b010 | 849 | else if (!reg_names_p || !ISALPHA (name[0])) |
b34976b6 | 850 | return FALSE; |
252b5132 RH |
851 | |
852 | c = get_symbol_end (); | |
853 | reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name); | |
854 | ||
468cced8 AM |
855 | /* Put back the delimiting char. */ |
856 | *input_line_pointer = c; | |
857 | ||
99a814a1 | 858 | /* Look to see if it's in the register table. */ |
81d4177b | 859 | if (reg_number >= 0) |
252b5132 RH |
860 | { |
861 | expressionP->X_op = O_register; | |
862 | expressionP->X_add_number = reg_number; | |
81d4177b | 863 | |
99a814a1 | 864 | /* Make the rest nice. */ |
252b5132 RH |
865 | expressionP->X_add_symbol = NULL; |
866 | expressionP->X_op_symbol = NULL; | |
b34976b6 | 867 | return TRUE; |
252b5132 | 868 | } |
468cced8 AM |
869 | |
870 | /* Reset the line as if we had not done anything. */ | |
871 | input_line_pointer = start; | |
b34976b6 | 872 | return FALSE; |
252b5132 RH |
873 | } |
874 | \f | |
875 | /* This function is called for each symbol seen in an expression. It | |
876 | handles the special parsing which PowerPC assemblers are supposed | |
877 | to use for condition codes. */ | |
878 | ||
879 | /* Whether to do the special parsing. */ | |
b34976b6 | 880 | static bfd_boolean cr_operand; |
252b5132 RH |
881 | |
882 | /* Names to recognize in a condition code. This table is sorted. */ | |
883 | static const struct pd_reg cr_names[] = | |
884 | { | |
885 | { "cr0", 0 }, | |
886 | { "cr1", 1 }, | |
887 | { "cr2", 2 }, | |
888 | { "cr3", 3 }, | |
889 | { "cr4", 4 }, | |
890 | { "cr5", 5 }, | |
891 | { "cr6", 6 }, | |
892 | { "cr7", 7 }, | |
893 | { "eq", 2 }, | |
894 | { "gt", 1 }, | |
895 | { "lt", 0 }, | |
896 | { "so", 3 }, | |
897 | { "un", 3 } | |
898 | }; | |
899 | ||
900 | /* Parsing function. This returns non-zero if it recognized an | |
901 | expression. */ | |
902 | ||
903 | int | |
91d6fa6a | 904 | ppc_parse_name (const char *name, expressionS *exp) |
252b5132 RH |
905 | { |
906 | int val; | |
907 | ||
908 | if (! cr_operand) | |
909 | return 0; | |
910 | ||
13abbae3 AM |
911 | if (*name == '%') |
912 | ++name; | |
252b5132 RH |
913 | val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0], |
914 | name); | |
915 | if (val < 0) | |
916 | return 0; | |
917 | ||
91d6fa6a NC |
918 | exp->X_op = O_constant; |
919 | exp->X_add_number = val; | |
252b5132 RH |
920 | |
921 | return 1; | |
922 | } | |
923 | \f | |
924 | /* Local variables. */ | |
925 | ||
2b3c4602 AM |
926 | /* Whether to target xcoff64/elf64. */ |
927 | static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64; | |
7f6d05e8 | 928 | |
252b5132 RH |
929 | /* Opcode hash table. */ |
930 | static struct hash_control *ppc_hash; | |
931 | ||
932 | /* Macro hash table. */ | |
933 | static struct hash_control *ppc_macro_hash; | |
934 | ||
935 | #ifdef OBJ_ELF | |
99a814a1 | 936 | /* What type of shared library support to use. */ |
5d6f4f16 | 937 | static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE; |
252b5132 | 938 | |
99a814a1 | 939 | /* Flags to set in the elf header. */ |
252b5132 RH |
940 | static flagword ppc_flags = 0; |
941 | ||
942 | /* Whether this is Solaris or not. */ | |
943 | #ifdef TARGET_SOLARIS_COMMENT | |
b34976b6 | 944 | #define SOLARIS_P TRUE |
252b5132 | 945 | #else |
b34976b6 | 946 | #define SOLARIS_P FALSE |
252b5132 RH |
947 | #endif |
948 | ||
b34976b6 | 949 | static bfd_boolean msolaris = SOLARIS_P; |
252b5132 RH |
950 | #endif |
951 | ||
952 | #ifdef OBJ_XCOFF | |
953 | ||
954 | /* The RS/6000 assembler uses the .csect pseudo-op to generate code | |
955 | using a bunch of different sections. These assembler sections, | |
956 | however, are all encompassed within the .text or .data sections of | |
957 | the final output file. We handle this by using different | |
958 | subsegments within these main segments. */ | |
959 | ||
960 | /* Next subsegment to allocate within the .text segment. */ | |
961 | static subsegT ppc_text_subsegment = 2; | |
962 | ||
963 | /* Linked list of csects in the text section. */ | |
964 | static symbolS *ppc_text_csects; | |
965 | ||
966 | /* Next subsegment to allocate within the .data segment. */ | |
967 | static subsegT ppc_data_subsegment = 2; | |
968 | ||
969 | /* Linked list of csects in the data section. */ | |
970 | static symbolS *ppc_data_csects; | |
971 | ||
972 | /* The current csect. */ | |
973 | static symbolS *ppc_current_csect; | |
974 | ||
975 | /* The RS/6000 assembler uses a TOC which holds addresses of functions | |
976 | and variables. Symbols are put in the TOC with the .tc pseudo-op. | |
977 | A special relocation is used when accessing TOC entries. We handle | |
978 | the TOC as a subsegment within the .data segment. We set it up if | |
979 | we see a .toc pseudo-op, and save the csect symbol here. */ | |
980 | static symbolS *ppc_toc_csect; | |
981 | ||
982 | /* The first frag in the TOC subsegment. */ | |
983 | static fragS *ppc_toc_frag; | |
984 | ||
985 | /* The first frag in the first subsegment after the TOC in the .data | |
986 | segment. NULL if there are no subsegments after the TOC. */ | |
987 | static fragS *ppc_after_toc_frag; | |
988 | ||
989 | /* The current static block. */ | |
990 | static symbolS *ppc_current_block; | |
991 | ||
992 | /* The COFF debugging section; set by md_begin. This is not the | |
993 | .debug section, but is instead the secret BFD section which will | |
994 | cause BFD to set the section number of a symbol to N_DEBUG. */ | |
995 | static asection *ppc_coff_debug_section; | |
996 | ||
85645aed TG |
997 | /* Structure to set the length field of the dwarf sections. */ |
998 | struct dw_subsection { | |
999 | /* Subsections are simply linked. */ | |
1000 | struct dw_subsection *link; | |
1001 | ||
1002 | /* The subsection number. */ | |
1003 | subsegT subseg; | |
1004 | ||
1005 | /* Expression to compute the length of the section. */ | |
1006 | expressionS end_exp; | |
1007 | }; | |
1008 | ||
1009 | static struct dw_section { | |
1010 | /* Corresponding section. */ | |
1011 | segT sect; | |
1012 | ||
1013 | /* Simply linked list of subsections with a label. */ | |
1014 | struct dw_subsection *list_subseg; | |
1015 | ||
1016 | /* The anonymous subsection. */ | |
1017 | struct dw_subsection *anon_subseg; | |
1018 | } dw_sections[XCOFF_DWSECT_NBR_NAMES]; | |
252b5132 RH |
1019 | #endif /* OBJ_XCOFF */ |
1020 | ||
1021 | #ifdef TE_PE | |
1022 | ||
1023 | /* Various sections that we need for PE coff support. */ | |
1024 | static segT ydata_section; | |
1025 | static segT pdata_section; | |
1026 | static segT reldata_section; | |
1027 | static segT rdata_section; | |
1028 | static segT tocdata_section; | |
1029 | ||
81d4177b | 1030 | /* The current section and the previous section. See ppc_previous. */ |
252b5132 RH |
1031 | static segT ppc_previous_section; |
1032 | static segT ppc_current_section; | |
1033 | ||
1034 | #endif /* TE_PE */ | |
1035 | ||
1036 | #ifdef OBJ_ELF | |
1037 | symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */ | |
6a0c61b7 EZ |
1038 | #define PPC_APUINFO_ISEL 0x40 |
1039 | #define PPC_APUINFO_PMR 0x41 | |
1040 | #define PPC_APUINFO_RFMCI 0x42 | |
1041 | #define PPC_APUINFO_CACHELCK 0x43 | |
1042 | #define PPC_APUINFO_SPE 0x100 | |
1043 | #define PPC_APUINFO_EFS 0x101 | |
1044 | #define PPC_APUINFO_BRLOCK 0x102 | |
b9c361e0 | 1045 | #define PPC_APUINFO_VLE 0x104 |
6a0c61b7 | 1046 | |
b34976b6 AM |
1047 | /* |
1048 | * We keep a list of APUinfo | |
6a0c61b7 EZ |
1049 | */ |
1050 | unsigned long *ppc_apuinfo_list; | |
1051 | unsigned int ppc_apuinfo_num; | |
1052 | unsigned int ppc_apuinfo_num_alloc; | |
252b5132 RH |
1053 | #endif /* OBJ_ELF */ |
1054 | \f | |
1055 | #ifdef OBJ_ELF | |
15c1449b | 1056 | const char *const md_shortopts = "b:l:usm:K:VQ:"; |
252b5132 | 1057 | #else |
15c1449b | 1058 | const char *const md_shortopts = "um:"; |
252b5132 | 1059 | #endif |
cef4f754 | 1060 | #define OPTION_NOPS (OPTION_MD_BASE + 0) |
15c1449b | 1061 | const struct option md_longopts[] = { |
cef4f754 | 1062 | {"nops", required_argument, NULL, OPTION_NOPS}, |
252b5132 RH |
1063 | {NULL, no_argument, NULL, 0} |
1064 | }; | |
15c1449b | 1065 | const size_t md_longopts_size = sizeof (md_longopts); |
252b5132 RH |
1066 | |
1067 | int | |
98027b10 | 1068 | md_parse_option (int c, char *arg) |
252b5132 | 1069 | { |
69fe9ce5 AM |
1070 | ppc_cpu_t new_cpu; |
1071 | ||
252b5132 RH |
1072 | switch (c) |
1073 | { | |
1074 | case 'u': | |
1075 | /* -u means that any undefined symbols should be treated as | |
1076 | external, which is the default for gas anyhow. */ | |
1077 | break; | |
1078 | ||
1079 | #ifdef OBJ_ELF | |
1080 | case 'l': | |
1081 | /* Solaris as takes -le (presumably for little endian). For completeness | |
99a814a1 | 1082 | sake, recognize -be also. */ |
252b5132 RH |
1083 | if (strcmp (arg, "e") == 0) |
1084 | { | |
1085 | target_big_endian = 0; | |
1086 | set_target_endian = 1; | |
b9c361e0 | 1087 | if (ppc_cpu & PPC_OPCODE_VLE) |
d6ed37ed | 1088 | as_bad (_("the use of -mvle requires big endian.")); |
252b5132 RH |
1089 | } |
1090 | else | |
1091 | return 0; | |
1092 | ||
1093 | break; | |
1094 | ||
1095 | case 'b': | |
1096 | if (strcmp (arg, "e") == 0) | |
1097 | { | |
1098 | target_big_endian = 1; | |
1099 | set_target_endian = 1; | |
1100 | } | |
1101 | else | |
1102 | return 0; | |
1103 | ||
1104 | break; | |
1105 | ||
1106 | case 'K': | |
99a814a1 | 1107 | /* Recognize -K PIC. */ |
252b5132 RH |
1108 | if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0) |
1109 | { | |
1110 | shlib = SHLIB_PIC; | |
1111 | ppc_flags |= EF_PPC_RELOCATABLE_LIB; | |
1112 | } | |
1113 | else | |
1114 | return 0; | |
1115 | ||
1116 | break; | |
1117 | #endif | |
1118 | ||
7f6d05e8 CP |
1119 | /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */ |
1120 | case 'a': | |
1121 | if (strcmp (arg, "64") == 0) | |
2a98c3a6 AM |
1122 | { |
1123 | #ifdef BFD64 | |
1124 | ppc_obj64 = 1; | |
d6ed37ed AM |
1125 | if (ppc_cpu & PPC_OPCODE_VLE) |
1126 | as_bad (_("the use of -mvle requires -a32.")); | |
2a98c3a6 AM |
1127 | #else |
1128 | as_fatal (_("%s unsupported"), "-a64"); | |
1129 | #endif | |
1130 | } | |
7f6d05e8 | 1131 | else if (strcmp (arg, "32") == 0) |
2b3c4602 | 1132 | ppc_obj64 = 0; |
7f6d05e8 CP |
1133 | else |
1134 | return 0; | |
1135 | break; | |
81d4177b | 1136 | |
252b5132 | 1137 | case 'm': |
776fc418 | 1138 | new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg); |
b9c361e0 JL |
1139 | if (new_cpu != 0) |
1140 | { | |
1141 | ppc_cpu = new_cpu; | |
d6ed37ed AM |
1142 | if (strcmp (arg, "vle") == 0) |
1143 | { | |
1144 | if (set_target_endian && target_big_endian == 0) | |
1145 | as_bad (_("the use of -mvle requires big endian.")); | |
1146 | if (ppc_obj64) | |
1147 | as_bad (_("the use of -mvle requires -a32.")); | |
1148 | } | |
b9c361e0 | 1149 | } |
252b5132 RH |
1150 | |
1151 | else if (strcmp (arg, "regnames") == 0) | |
b34976b6 | 1152 | reg_names_p = TRUE; |
252b5132 RH |
1153 | |
1154 | else if (strcmp (arg, "no-regnames") == 0) | |
b34976b6 | 1155 | reg_names_p = FALSE; |
252b5132 RH |
1156 | |
1157 | #ifdef OBJ_ELF | |
99a814a1 AM |
1158 | /* -mrelocatable/-mrelocatable-lib -- warn about initializations |
1159 | that require relocation. */ | |
252b5132 RH |
1160 | else if (strcmp (arg, "relocatable") == 0) |
1161 | { | |
5d6f4f16 | 1162 | shlib = SHLIB_MRELOCATABLE; |
252b5132 RH |
1163 | ppc_flags |= EF_PPC_RELOCATABLE; |
1164 | } | |
1165 | ||
1166 | else if (strcmp (arg, "relocatable-lib") == 0) | |
1167 | { | |
5d6f4f16 | 1168 | shlib = SHLIB_MRELOCATABLE; |
252b5132 RH |
1169 | ppc_flags |= EF_PPC_RELOCATABLE_LIB; |
1170 | } | |
1171 | ||
99a814a1 | 1172 | /* -memb, set embedded bit. */ |
252b5132 RH |
1173 | else if (strcmp (arg, "emb") == 0) |
1174 | ppc_flags |= EF_PPC_EMB; | |
1175 | ||
cc643b88 | 1176 | /* -mlittle/-mbig set the endianness. */ |
99a814a1 AM |
1177 | else if (strcmp (arg, "little") == 0 |
1178 | || strcmp (arg, "little-endian") == 0) | |
252b5132 RH |
1179 | { |
1180 | target_big_endian = 0; | |
1181 | set_target_endian = 1; | |
b9c361e0 | 1182 | if (ppc_cpu & PPC_OPCODE_VLE) |
d6ed37ed | 1183 | as_bad (_("the use of -mvle requires big endian.")); |
252b5132 RH |
1184 | } |
1185 | ||
1186 | else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0) | |
1187 | { | |
1188 | target_big_endian = 1; | |
1189 | set_target_endian = 1; | |
1190 | } | |
1191 | ||
1192 | else if (strcmp (arg, "solaris") == 0) | |
1193 | { | |
b34976b6 | 1194 | msolaris = TRUE; |
252b5132 RH |
1195 | ppc_comment_chars = ppc_solaris_comment_chars; |
1196 | } | |
1197 | ||
1198 | else if (strcmp (arg, "no-solaris") == 0) | |
1199 | { | |
b34976b6 | 1200 | msolaris = FALSE; |
252b5132 RH |
1201 | ppc_comment_chars = ppc_eabi_comment_chars; |
1202 | } | |
1203 | #endif | |
1204 | else | |
1205 | { | |
1206 | as_bad (_("invalid switch -m%s"), arg); | |
1207 | return 0; | |
1208 | } | |
1209 | break; | |
1210 | ||
1211 | #ifdef OBJ_ELF | |
1212 | /* -V: SVR4 argument to print version ID. */ | |
1213 | case 'V': | |
1214 | print_version_id (); | |
1215 | break; | |
1216 | ||
1217 | /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section | |
1218 | should be emitted or not. FIXME: Not implemented. */ | |
1219 | case 'Q': | |
1220 | break; | |
1221 | ||
1222 | /* Solaris takes -s to specify that .stabs go in a .stabs section, | |
1223 | rather than .stabs.excl, which is ignored by the linker. | |
1224 | FIXME: Not implemented. */ | |
1225 | case 's': | |
1226 | if (arg) | |
1227 | return 0; | |
1228 | ||
1229 | break; | |
1230 | #endif | |
1231 | ||
cef4f754 AM |
1232 | case OPTION_NOPS: |
1233 | { | |
1234 | char *end; | |
1235 | nop_limit = strtoul (optarg, &end, 0); | |
1236 | if (*end) | |
1237 | as_bad (_("--nops needs a numeric argument")); | |
1238 | } | |
1239 | break; | |
85645aed | 1240 | |
252b5132 RH |
1241 | default: |
1242 | return 0; | |
1243 | } | |
1244 | ||
1245 | return 1; | |
1246 | } | |
1247 | ||
1248 | void | |
98027b10 | 1249 | md_show_usage (FILE *stream) |
252b5132 | 1250 | { |
bc805888 | 1251 | fprintf (stream, _("\ |
252b5132 | 1252 | PowerPC options:\n\ |
ce3d2015 AM |
1253 | -a32 generate ELF32/XCOFF32\n\ |
1254 | -a64 generate ELF64/XCOFF64\n\ | |
1255 | -u ignored\n\ | |
1256 | -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\ | |
1257 | -mpwr generate code for POWER (RIOS1)\n\ | |
1258 | -m601 generate code for PowerPC 601\n\ | |
418c1742 | 1259 | -mppc, -mppc32, -m603, -m604\n\ |
ce3d2015 AM |
1260 | generate code for PowerPC 603/604\n\ |
1261 | -m403 generate code for PowerPC 403\n\ | |
1262 | -m405 generate code for PowerPC 405\n\ | |
1263 | -m440 generate code for PowerPC 440\n\ | |
1264 | -m464 generate code for PowerPC 464\n\ | |
1265 | -m476 generate code for PowerPC 476\n\ | |
f5c120c5 | 1266 | -m7400, -m7410, -m7450, -m7455\n\ |
ce3d2015 AM |
1267 | generate code for PowerPC 7400/7410/7450/7455\n\ |
1268 | -m750cl generate code for PowerPC 750cl\n")); | |
df12615d | 1269 | fprintf (stream, _("\ |
ce3d2015 AM |
1270 | -mppc64, -m620 generate code for PowerPC 620/625/630\n\ |
1271 | -mppc64bridge generate code for PowerPC 64, including bridge insns\n\ | |
1272 | -mbooke generate code for 32-bit PowerPC BookE\n\ | |
1273 | -ma2 generate code for A2 architecture\n\ | |
cdc51b07 RS |
1274 | -mpower4, -mpwr4 generate code for Power4 architecture\n\ |
1275 | -mpower5, -mpwr5, -mpwr5x\n\ | |
1276 | generate code for Power5 architecture\n\ | |
1277 | -mpower6, -mpwr6 generate code for Power6 architecture\n\ | |
1278 | -mpower7, -mpwr7 generate code for Power7 architecture\n\ | |
5817ffd1 | 1279 | -mpower8, -mpwr8 generate code for Power8 architecture\n\ |
ce3d2015 AM |
1280 | -mcell generate code for Cell Broadband Engine architecture\n\ |
1281 | -mcom generate code Power/PowerPC common instructions\n\ | |
1282 | -many generate code for any architecture (PWR/PWRX/PPC)\n")); | |
6a0c61b7 | 1283 | fprintf (stream, _("\ |
ce3d2015 AM |
1284 | -maltivec generate code for AltiVec\n\ |
1285 | -mvsx generate code for Vector-Scalar (VSX) instructions\n\ | |
5817ffd1 | 1286 | -mhtm generate code for Hardware Transactional Memory\n\ |
ce3d2015 AM |
1287 | -me300 generate code for PowerPC e300 family\n\ |
1288 | -me500, -me500x2 generate code for Motorola e500 core complex\n\ | |
1289 | -me500mc, generate code for Freescale e500mc core complex\n\ | |
1290 | -me500mc64, generate code for Freescale e500mc64 core complex\n\ | |
aea77599 AM |
1291 | -me5500, generate code for Freescale e5500 core complex\n\ |
1292 | -me6500, generate code for Freescale e6500 core complex\n\ | |
ce3d2015 | 1293 | -mspe generate code for Motorola SPE instructions\n\ |
b9c361e0 | 1294 | -mvle generate code for Freescale VLE instructions\n\ |
ce3d2015 AM |
1295 | -mtitan generate code for AppliedMicro Titan core complex\n\ |
1296 | -mregnames Allow symbolic names for registers\n\ | |
1297 | -mno-regnames Do not allow symbolic names for registers\n")); | |
252b5132 | 1298 | #ifdef OBJ_ELF |
bc805888 | 1299 | fprintf (stream, _("\ |
ce3d2015 AM |
1300 | -mrelocatable support for GCC's -mrelocatble option\n\ |
1301 | -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\ | |
1302 | -memb set PPC_EMB bit in ELF flags\n\ | |
b8b738ac | 1303 | -mlittle, -mlittle-endian, -le\n\ |
ce3d2015 | 1304 | generate code for a little endian machine\n\ |
b8b738ac | 1305 | -mbig, -mbig-endian, -be\n\ |
ce3d2015 AM |
1306 | generate code for a big endian machine\n\ |
1307 | -msolaris generate code for Solaris\n\ | |
1308 | -mno-solaris do not generate code for Solaris\n\ | |
b8b738ac | 1309 | -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\ |
ce3d2015 AM |
1310 | -V print assembler version number\n\ |
1311 | -Qy, -Qn ignored\n")); | |
252b5132 | 1312 | #endif |
cef4f754 AM |
1313 | fprintf (stream, _("\ |
1314 | -nops=count when aligning, more than COUNT nops uses a branch\n")); | |
252b5132 RH |
1315 | } |
1316 | \f | |
1317 | /* Set ppc_cpu if it is not already set. */ | |
1318 | ||
1319 | static void | |
98027b10 | 1320 | ppc_set_cpu (void) |
252b5132 RH |
1321 | { |
1322 | const char *default_os = TARGET_OS; | |
1323 | const char *default_cpu = TARGET_CPU; | |
1324 | ||
7102e95e | 1325 | if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0) |
252b5132 | 1326 | { |
2a98c3a6 | 1327 | if (ppc_obj64) |
bdc70b4a | 1328 | ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64; |
2a98c3a6 AM |
1329 | else if (strncmp (default_os, "aix", 3) == 0 |
1330 | && default_os[3] >= '4' && default_os[3] <= '9') | |
bdc70b4a | 1331 | ppc_cpu |= PPC_OPCODE_COMMON; |
252b5132 | 1332 | else if (strncmp (default_os, "aix3", 4) == 0) |
bdc70b4a | 1333 | ppc_cpu |= PPC_OPCODE_POWER; |
252b5132 | 1334 | else if (strcmp (default_cpu, "rs6000") == 0) |
bdc70b4a | 1335 | ppc_cpu |= PPC_OPCODE_POWER; |
0baf16f2 | 1336 | else if (strncmp (default_cpu, "powerpc", 7) == 0) |
bdc70b4a | 1337 | ppc_cpu |= PPC_OPCODE_PPC; |
252b5132 | 1338 | else |
d6ed37ed | 1339 | as_fatal (_("unknown default cpu = %s, os = %s"), |
99a814a1 | 1340 | default_cpu, default_os); |
252b5132 RH |
1341 | } |
1342 | } | |
1343 | ||
9232bbb0 AM |
1344 | /* Figure out the BFD architecture to use. This function and ppc_mach |
1345 | are called well before md_begin, when the output file is opened. */ | |
252b5132 RH |
1346 | |
1347 | enum bfd_architecture | |
98027b10 | 1348 | ppc_arch (void) |
252b5132 RH |
1349 | { |
1350 | const char *default_cpu = TARGET_CPU; | |
1351 | ppc_set_cpu (); | |
1352 | ||
1353 | if ((ppc_cpu & PPC_OPCODE_PPC) != 0) | |
1354 | return bfd_arch_powerpc; | |
b9c361e0 JL |
1355 | if ((ppc_cpu & PPC_OPCODE_VLE) != 0) |
1356 | return bfd_arch_powerpc; | |
1357 | if ((ppc_cpu & PPC_OPCODE_POWER) != 0) | |
252b5132 | 1358 | return bfd_arch_rs6000; |
b9c361e0 | 1359 | if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0) |
252b5132 RH |
1360 | { |
1361 | if (strcmp (default_cpu, "rs6000") == 0) | |
1362 | return bfd_arch_rs6000; | |
0baf16f2 | 1363 | else if (strncmp (default_cpu, "powerpc", 7) == 0) |
252b5132 RH |
1364 | return bfd_arch_powerpc; |
1365 | } | |
1366 | ||
d6ed37ed | 1367 | as_fatal (_("neither Power nor PowerPC opcodes were selected.")); |
252b5132 RH |
1368 | return bfd_arch_unknown; |
1369 | } | |
1370 | ||
7f6d05e8 | 1371 | unsigned long |
98027b10 | 1372 | ppc_mach (void) |
7f6d05e8 | 1373 | { |
2a98c3a6 AM |
1374 | if (ppc_obj64) |
1375 | return bfd_mach_ppc64; | |
1376 | else if (ppc_arch () == bfd_arch_rs6000) | |
1377 | return bfd_mach_rs6k; | |
ce3d2015 AM |
1378 | else if (ppc_cpu & PPC_OPCODE_TITAN) |
1379 | return bfd_mach_ppc_titan; | |
b9c361e0 JL |
1380 | else if (ppc_cpu & PPC_OPCODE_VLE) |
1381 | return bfd_mach_ppc_vle; | |
2a98c3a6 AM |
1382 | else |
1383 | return bfd_mach_ppc; | |
7f6d05e8 CP |
1384 | } |
1385 | ||
81d4177b | 1386 | extern char* |
98027b10 | 1387 | ppc_target_format (void) |
7f6d05e8 CP |
1388 | { |
1389 | #ifdef OBJ_COFF | |
1390 | #ifdef TE_PE | |
99a814a1 | 1391 | return target_big_endian ? "pe-powerpc" : "pe-powerpcle"; |
7f6d05e8 | 1392 | #elif TE_POWERMAC |
0baf16f2 | 1393 | return "xcoff-powermac"; |
7f6d05e8 | 1394 | #else |
eb1e0e80 | 1395 | # ifdef TE_AIX5 |
edc1d652 | 1396 | return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000"); |
eb1e0e80 | 1397 | # else |
edc1d652 | 1398 | return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000"); |
eb1e0e80 | 1399 | # endif |
7f6d05e8 | 1400 | #endif |
7f6d05e8 CP |
1401 | #endif |
1402 | #ifdef OBJ_ELF | |
edc1d652 AM |
1403 | # ifdef TE_FreeBSD |
1404 | return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd"); | |
1405 | # elif defined (TE_VXWORKS) | |
9d8504b1 PB |
1406 | return "elf32-powerpc-vxworks"; |
1407 | # else | |
0baf16f2 | 1408 | return (target_big_endian |
2b3c4602 AM |
1409 | ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc") |
1410 | : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle")); | |
9d8504b1 | 1411 | # endif |
7f6d05e8 CP |
1412 | #endif |
1413 | } | |
1414 | ||
b9c361e0 JL |
1415 | /* Validate one entry in powerpc_opcodes[] or vle_opcodes[]. |
1416 | Return TRUE if there's a problem, otherwise FALSE. */ | |
1417 | ||
1418 | static bfd_boolean | |
1419 | insn_validate (const struct powerpc_opcode *op) | |
1420 | { | |
1421 | const unsigned char *o; | |
1422 | unsigned long omask = op->mask; | |
1423 | ||
1424 | /* The mask had better not trim off opcode bits. */ | |
1425 | if ((op->opcode & omask) != op->opcode) | |
1426 | { | |
1427 | as_bad (_("mask trims opcode bits for %s"), op->name); | |
1428 | return TRUE; | |
1429 | } | |
1430 | ||
1431 | /* The operands must not overlap the opcode or each other. */ | |
1432 | for (o = op->operands; *o; ++o) | |
1433 | { | |
1434 | if (*o >= num_powerpc_operands) | |
1435 | { | |
1436 | as_bad (_("operand index error for %s"), op->name); | |
1437 | return TRUE; | |
1438 | } | |
1439 | else | |
1440 | { | |
1441 | const struct powerpc_operand *operand = &powerpc_operands[*o]; | |
1442 | if (operand->shift != PPC_OPSHIFT_INV) | |
1443 | { | |
1444 | unsigned long mask; | |
1445 | ||
1446 | if (operand->shift >= 0) | |
1447 | mask = operand->bitm << operand->shift; | |
1448 | else | |
1449 | mask = operand->bitm >> -operand->shift; | |
1450 | if (omask & mask) | |
1451 | { | |
1452 | as_bad (_("operand %d overlap in %s"), | |
1453 | (int) (o - op->operands), op->name); | |
1454 | return TRUE; | |
1455 | } | |
1456 | omask |= mask; | |
1457 | } | |
1458 | } | |
1459 | } | |
1460 | return FALSE; | |
1461 | } | |
1462 | ||
69c040df | 1463 | /* Insert opcodes and macros into hash tables. Called at startup and |
1fe532cf | 1464 | for .machine pseudo. */ |
252b5132 | 1465 | |
69c040df AM |
1466 | static void |
1467 | ppc_setup_opcodes (void) | |
252b5132 | 1468 | { |
98027b10 | 1469 | const struct powerpc_opcode *op; |
252b5132 RH |
1470 | const struct powerpc_opcode *op_end; |
1471 | const struct powerpc_macro *macro; | |
1472 | const struct powerpc_macro *macro_end; | |
b84bf58a | 1473 | bfd_boolean bad_insn = FALSE; |
252b5132 | 1474 | |
69c040df AM |
1475 | if (ppc_hash != NULL) |
1476 | hash_die (ppc_hash); | |
1477 | if (ppc_macro_hash != NULL) | |
1478 | hash_die (ppc_macro_hash); | |
252b5132 RH |
1479 | |
1480 | /* Insert the opcodes into a hash table. */ | |
1481 | ppc_hash = hash_new (); | |
1482 | ||
c43a438d | 1483 | if (ENABLE_CHECKING) |
b84bf58a | 1484 | { |
c43a438d | 1485 | unsigned int i; |
b84bf58a | 1486 | |
3b8b57a9 AM |
1487 | /* An index into powerpc_operands is stored in struct fix |
1488 | fx_pcrel_adjust which is 8 bits wide. */ | |
1489 | gas_assert (num_powerpc_operands < 256); | |
1490 | ||
c43a438d AM |
1491 | /* Check operand masks. Code here and in the disassembler assumes |
1492 | all the 1's in the mask are contiguous. */ | |
1493 | for (i = 0; i < num_powerpc_operands; ++i) | |
b84bf58a | 1494 | { |
c43a438d AM |
1495 | unsigned long mask = powerpc_operands[i].bitm; |
1496 | unsigned long right_bit; | |
1497 | unsigned int j; | |
1498 | ||
1499 | right_bit = mask & -mask; | |
1500 | mask += right_bit; | |
1501 | right_bit = mask & -mask; | |
1502 | if (mask != right_bit) | |
1503 | { | |
1504 | as_bad (_("powerpc_operands[%d].bitm invalid"), i); | |
1505 | bad_insn = TRUE; | |
1506 | } | |
1507 | for (j = i + 1; j < num_powerpc_operands; ++j) | |
1508 | if (memcmp (&powerpc_operands[i], &powerpc_operands[j], | |
1509 | sizeof (powerpc_operands[0])) == 0) | |
1510 | { | |
1511 | as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"), | |
1512 | j, i); | |
1513 | bad_insn = TRUE; | |
1514 | } | |
b84bf58a AM |
1515 | } |
1516 | } | |
1517 | ||
252b5132 RH |
1518 | op_end = powerpc_opcodes + powerpc_num_opcodes; |
1519 | for (op = powerpc_opcodes; op < op_end; op++) | |
1520 | { | |
c43a438d | 1521 | if (ENABLE_CHECKING) |
b84bf58a | 1522 | { |
d815f1a9 | 1523 | if (op != powerpc_opcodes) |
8dbcd839 | 1524 | { |
b9c361e0 JL |
1525 | int old_opcode = PPC_OP (op[-1].opcode); |
1526 | int new_opcode = PPC_OP (op[0].opcode); | |
1527 | ||
1528 | #ifdef PRINT_OPCODE_TABLE | |
c0637f3a PB |
1529 | printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n", |
1530 | op->name, (unsigned int) (op - powerpc_opcodes), | |
1531 | (unsigned int) new_opcode, (unsigned int) op->opcode, | |
1532 | (unsigned int) op->mask, (unsigned long long) op->flags); | |
b9c361e0 JL |
1533 | #endif |
1534 | ||
d815f1a9 AM |
1535 | /* The major opcodes had better be sorted. Code in the |
1536 | disassembler assumes the insns are sorted according to | |
1537 | major opcode. */ | |
b9c361e0 | 1538 | if (new_opcode < old_opcode) |
d815f1a9 AM |
1539 | { |
1540 | as_bad (_("major opcode is not sorted for %s"), | |
1541 | op->name); | |
1542 | bad_insn = TRUE; | |
1543 | } | |
8dbcd839 | 1544 | } |
b9c361e0 JL |
1545 | bad_insn |= insn_validate (op); |
1546 | } | |
c43a438d | 1547 | |
b9c361e0 JL |
1548 | if ((ppc_cpu & op->flags) != 0 |
1549 | && !(ppc_cpu & op->deprecated)) | |
1550 | { | |
1551 | const char *retval; | |
1552 | ||
1553 | retval = hash_insert (ppc_hash, op->name, (void *) op); | |
1554 | if (retval != NULL) | |
c43a438d | 1555 | { |
b9c361e0 | 1556 | as_bad (_("duplicate instruction %s"), |
c43a438d AM |
1557 | op->name); |
1558 | bad_insn = TRUE; | |
1559 | } | |
b9c361e0 JL |
1560 | } |
1561 | } | |
c43a438d | 1562 | |
b9c361e0 JL |
1563 | if ((ppc_cpu & PPC_OPCODE_ANY) != 0) |
1564 | for (op = powerpc_opcodes; op < op_end; op++) | |
1565 | hash_insert (ppc_hash, op->name, (void *) op); | |
1566 | ||
1567 | op_end = vle_opcodes + vle_num_opcodes; | |
1568 | for (op = vle_opcodes; op < op_end; op++) | |
1569 | { | |
1570 | if (ENABLE_CHECKING) | |
1571 | { | |
1572 | if (op != vle_opcodes) | |
1573 | { | |
1574 | unsigned old_seg, new_seg; | |
1575 | ||
1576 | old_seg = VLE_OP (op[-1].opcode, op[-1].mask); | |
1577 | old_seg = VLE_OP_TO_SEG (old_seg); | |
1578 | new_seg = VLE_OP (op[0].opcode, op[0].mask); | |
1579 | new_seg = VLE_OP_TO_SEG (new_seg); | |
1580 | ||
1581 | #ifdef PRINT_OPCODE_TABLE | |
c0637f3a PB |
1582 | printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n", |
1583 | op->name, (unsigned int) (op - powerpc_opcodes), | |
1584 | (unsigned int) new_seg, (unsigned int) op->opcode, | |
1585 | (unsigned int) op->mask, (unsigned long long) op->flags); | |
b9c361e0 JL |
1586 | #endif |
1587 | /* The major opcodes had better be sorted. Code in the | |
1588 | disassembler assumes the insns are sorted according to | |
1589 | major opcode. */ | |
1590 | if (new_seg < old_seg) | |
1591 | { | |
1592 | as_bad (_("major opcode is not sorted for %s"), | |
1593 | op->name); | |
1594 | bad_insn = TRUE; | |
1595 | } | |
1596 | } | |
1597 | ||
1598 | bad_insn |= insn_validate (op); | |
c43a438d | 1599 | } |
252b5132 | 1600 | |
bdc70b4a | 1601 | if ((ppc_cpu & op->flags) != 0 |
1cb0a767 | 1602 | && !(ppc_cpu & op->deprecated)) |
252b5132 RH |
1603 | { |
1604 | const char *retval; | |
1605 | ||
98027b10 | 1606 | retval = hash_insert (ppc_hash, op->name, (void *) op); |
69c040df | 1607 | if (retval != NULL) |
252b5132 | 1608 | { |
b84bf58a | 1609 | as_bad (_("duplicate instruction %s"), |
99a814a1 | 1610 | op->name); |
b84bf58a | 1611 | bad_insn = TRUE; |
252b5132 RH |
1612 | } |
1613 | } | |
1614 | } | |
1615 | ||
b9c361e0 JL |
1616 | if ((ppc_cpu & PPC_OPCODE_VLE) != 0) |
1617 | for (op = vle_opcodes; op < op_end; op++) | |
98027b10 | 1618 | hash_insert (ppc_hash, op->name, (void *) op); |
3c9030c1 | 1619 | |
252b5132 RH |
1620 | /* Insert the macros into a hash table. */ |
1621 | ppc_macro_hash = hash_new (); | |
1622 | ||
1623 | macro_end = powerpc_macros + powerpc_num_macros; | |
1624 | for (macro = powerpc_macros; macro < macro_end; macro++) | |
1625 | { | |
33740db9 | 1626 | if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0) |
252b5132 RH |
1627 | { |
1628 | const char *retval; | |
1629 | ||
98027b10 | 1630 | retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro); |
252b5132 RH |
1631 | if (retval != (const char *) NULL) |
1632 | { | |
b84bf58a AM |
1633 | as_bad (_("duplicate macro %s"), macro->name); |
1634 | bad_insn = TRUE; | |
252b5132 RH |
1635 | } |
1636 | } | |
1637 | } | |
1638 | ||
b84bf58a | 1639 | if (bad_insn) |
252b5132 | 1640 | abort (); |
69c040df AM |
1641 | } |
1642 | ||
1643 | /* This function is called when the assembler starts up. It is called | |
1644 | after the options have been parsed and the output file has been | |
1645 | opened. */ | |
1646 | ||
1647 | void | |
98027b10 | 1648 | md_begin (void) |
69c040df AM |
1649 | { |
1650 | ppc_set_cpu (); | |
1651 | ||
1652 | ppc_cie_data_alignment = ppc_obj64 ? -8 : -4; | |
8fbf7334 | 1653 | ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4; |
69c040df AM |
1654 | |
1655 | #ifdef OBJ_ELF | |
1656 | /* Set the ELF flags if desired. */ | |
1657 | if (ppc_flags && !msolaris) | |
1658 | bfd_set_private_flags (stdoutput, ppc_flags); | |
1659 | #endif | |
1660 | ||
1661 | ppc_setup_opcodes (); | |
252b5132 | 1662 | |
67c1ffbe | 1663 | /* Tell the main code what the endianness is if it is not overridden |
99a814a1 | 1664 | by the user. */ |
252b5132 RH |
1665 | if (!set_target_endian) |
1666 | { | |
1667 | set_target_endian = 1; | |
1668 | target_big_endian = PPC_BIG_ENDIAN; | |
1669 | } | |
1670 | ||
1671 | #ifdef OBJ_XCOFF | |
1672 | ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG); | |
1673 | ||
1674 | /* Create dummy symbols to serve as initial csects. This forces the | |
1675 | text csects to precede the data csects. These symbols will not | |
1676 | be output. */ | |
1677 | ppc_text_csects = symbol_make ("dummy\001"); | |
809ffe0d | 1678 | symbol_get_tc (ppc_text_csects)->within = ppc_text_csects; |
252b5132 | 1679 | ppc_data_csects = symbol_make ("dummy\001"); |
809ffe0d | 1680 | symbol_get_tc (ppc_data_csects)->within = ppc_data_csects; |
252b5132 RH |
1681 | #endif |
1682 | ||
1683 | #ifdef TE_PE | |
1684 | ||
1685 | ppc_current_section = text_section; | |
81d4177b | 1686 | ppc_previous_section = 0; |
252b5132 RH |
1687 | |
1688 | #endif | |
1689 | } | |
1690 | ||
6a0c61b7 | 1691 | void |
98027b10 | 1692 | ppc_cleanup (void) |
6a0c61b7 | 1693 | { |
dc1d03fc | 1694 | #ifdef OBJ_ELF |
6a0c61b7 EZ |
1695 | if (ppc_apuinfo_list == NULL) |
1696 | return; | |
1697 | ||
1698 | /* Ok, so write the section info out. We have this layout: | |
1699 | ||
1700 | byte data what | |
1701 | ---- ---- ---- | |
1702 | 0 8 length of "APUinfo\0" | |
1703 | 4 (n*4) number of APU's (4 bytes each) | |
1704 | 8 2 note type 2 | |
1705 | 12 "APUinfo\0" name | |
1706 | 20 APU#1 first APU's info | |
1707 | 24 APU#2 second APU's info | |
1708 | ... ... | |
1709 | */ | |
1710 | { | |
1711 | char *p; | |
1712 | asection *seg = now_seg; | |
1713 | subsegT subseg = now_subseg; | |
1714 | asection *apuinfo_secp = (asection *) NULL; | |
49181a6a | 1715 | unsigned int i; |
6a0c61b7 EZ |
1716 | |
1717 | /* Create the .PPC.EMB.apuinfo section. */ | |
1718 | apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0); | |
1719 | bfd_set_section_flags (stdoutput, | |
1720 | apuinfo_secp, | |
e1a9cb8e | 1721 | SEC_HAS_CONTENTS | SEC_READONLY); |
6a0c61b7 EZ |
1722 | |
1723 | p = frag_more (4); | |
1724 | md_number_to_chars (p, (valueT) 8, 4); | |
1725 | ||
1726 | p = frag_more (4); | |
e98d298c | 1727 | md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4); |
6a0c61b7 EZ |
1728 | |
1729 | p = frag_more (4); | |
1730 | md_number_to_chars (p, (valueT) 2, 4); | |
1731 | ||
1732 | p = frag_more (8); | |
1733 | strcpy (p, "APUinfo"); | |
1734 | ||
1735 | for (i = 0; i < ppc_apuinfo_num; i++) | |
1736 | { | |
b34976b6 AM |
1737 | p = frag_more (4); |
1738 | md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4); | |
6a0c61b7 EZ |
1739 | } |
1740 | ||
1741 | frag_align (2, 0, 0); | |
1742 | ||
1743 | /* We probably can't restore the current segment, for there likely | |
1744 | isn't one yet... */ | |
1745 | if (seg && subseg) | |
1746 | subseg_set (seg, subseg); | |
1747 | } | |
dc1d03fc | 1748 | #endif |
6a0c61b7 EZ |
1749 | } |
1750 | ||
252b5132 RH |
1751 | /* Insert an operand value into an instruction. */ |
1752 | ||
1753 | static unsigned long | |
a1867a27 AM |
1754 | ppc_insert_operand (unsigned long insn, |
1755 | const struct powerpc_operand *operand, | |
1756 | offsetT val, | |
91d6fa6a | 1757 | ppc_cpu_t cpu, |
a1867a27 AM |
1758 | char *file, |
1759 | unsigned int line) | |
252b5132 | 1760 | { |
b84bf58a | 1761 | long min, max, right; |
eb42fac1 | 1762 | |
b84bf58a AM |
1763 | max = operand->bitm; |
1764 | right = max & -max; | |
1765 | min = 0; | |
1766 | ||
1767 | if ((operand->flags & PPC_OPERAND_SIGNED) != 0) | |
252b5132 | 1768 | { |
b84bf58a | 1769 | if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0) |
931774a9 AM |
1770 | max = (max >> 1) & -right; |
1771 | min = ~max & -right; | |
b84bf58a | 1772 | } |
252b5132 | 1773 | |
b84bf58a | 1774 | if ((operand->flags & PPC_OPERAND_PLUS1) != 0) |
3896c469 | 1775 | max++; |
252b5132 | 1776 | |
b84bf58a | 1777 | if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0) |
a1867a27 AM |
1778 | { |
1779 | long tmp = min; | |
1780 | min = -max; | |
1781 | max = -tmp; | |
1782 | } | |
b84bf58a | 1783 | |
a1867a27 AM |
1784 | if (min <= max) |
1785 | { | |
1786 | /* Some people write constants with the sign extension done by | |
1787 | hand but only up to 32 bits. This shouldn't really be valid, | |
1788 | but, to permit this code to assemble on a 64-bit host, we | |
1789 | sign extend the 32-bit value to 64 bits if so doing makes the | |
1790 | value valid. */ | |
1791 | if (val > max | |
1792 | && (offsetT) (val - 0x80000000 - 0x80000000) >= min | |
1793 | && (offsetT) (val - 0x80000000 - 0x80000000) <= max | |
1794 | && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0) | |
1795 | val = val - 0x80000000 - 0x80000000; | |
1796 | ||
1797 | /* Similarly, people write expressions like ~(1<<15), and expect | |
1798 | this to be OK for a 32-bit unsigned value. */ | |
1799 | else if (val < min | |
1800 | && (offsetT) (val + 0x80000000 + 0x80000000) >= min | |
1801 | && (offsetT) (val + 0x80000000 + 0x80000000) <= max | |
1802 | && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0) | |
1803 | val = val + 0x80000000 + 0x80000000; | |
1804 | ||
1805 | else if (val < min | |
1806 | || val > max | |
1807 | || (val & (right - 1)) != 0) | |
1808 | as_bad_value_out_of_range (_("operand"), val, min, max, file, line); | |
1809 | } | |
b84bf58a | 1810 | |
252b5132 RH |
1811 | if (operand->insert) |
1812 | { | |
1813 | const char *errmsg; | |
1814 | ||
1815 | errmsg = NULL; | |
91d6fa6a | 1816 | insn = (*operand->insert) (insn, (long) val, cpu, &errmsg); |
252b5132 | 1817 | if (errmsg != (const char *) NULL) |
ee2c9aa9 | 1818 | as_bad_where (file, line, "%s", errmsg); |
252b5132 | 1819 | } |
b9c361e0 | 1820 | else if (operand->shift >= 0) |
b84bf58a | 1821 | insn |= ((long) val & operand->bitm) << operand->shift; |
b9c361e0 JL |
1822 | else |
1823 | insn |= ((long) val & operand->bitm) >> -operand->shift; | |
252b5132 RH |
1824 | |
1825 | return insn; | |
1826 | } | |
1827 | ||
1828 | \f | |
1829 | #ifdef OBJ_ELF | |
1830 | /* Parse @got, etc. and return the desired relocation. */ | |
1831 | static bfd_reloc_code_real_type | |
98027b10 | 1832 | ppc_elf_suffix (char **str_p, expressionS *exp_p) |
252b5132 RH |
1833 | { |
1834 | struct map_bfd { | |
1835 | char *string; | |
b7d7dc63 AM |
1836 | unsigned int length : 8; |
1837 | unsigned int valid32 : 1; | |
1838 | unsigned int valid64 : 1; | |
1839 | unsigned int reloc; | |
252b5132 RH |
1840 | }; |
1841 | ||
1842 | char ident[20]; | |
1843 | char *str = *str_p; | |
1844 | char *str2; | |
1845 | int ch; | |
1846 | int len; | |
15c1449b | 1847 | const struct map_bfd *ptr; |
252b5132 | 1848 | |
b7d7dc63 AM |
1849 | #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc } |
1850 | #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc } | |
1851 | #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc } | |
252b5132 | 1852 | |
15c1449b | 1853 | static const struct map_bfd mapping[] = { |
b7d7dc63 AM |
1854 | MAP ("l", BFD_RELOC_LO16), |
1855 | MAP ("h", BFD_RELOC_HI16), | |
1856 | MAP ("ha", BFD_RELOC_HI16_S), | |
1857 | MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN), | |
1858 | MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN), | |
1859 | MAP ("got", BFD_RELOC_16_GOTOFF), | |
1860 | MAP ("got@l", BFD_RELOC_LO16_GOTOFF), | |
1861 | MAP ("got@h", BFD_RELOC_HI16_GOTOFF), | |
1862 | MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF), | |
1863 | MAP ("plt@l", BFD_RELOC_LO16_PLTOFF), | |
1864 | MAP ("plt@h", BFD_RELOC_HI16_PLTOFF), | |
1865 | MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF), | |
1866 | MAP ("copy", BFD_RELOC_PPC_COPY), | |
1867 | MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT), | |
1868 | MAP ("sectoff", BFD_RELOC_16_BASEREL), | |
1869 | MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL), | |
1870 | MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL), | |
1871 | MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL), | |
1872 | MAP ("tls", BFD_RELOC_PPC_TLS), | |
1873 | MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD), | |
1874 | MAP ("dtprel", BFD_RELOC_PPC_DTPREL), | |
1875 | MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO), | |
1876 | MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI), | |
1877 | MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA), | |
1878 | MAP ("tprel", BFD_RELOC_PPC_TPREL), | |
1879 | MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO), | |
1880 | MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI), | |
1881 | MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA), | |
1882 | MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16), | |
1883 | MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO), | |
1884 | MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI), | |
1885 | MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA), | |
1886 | MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16), | |
1887 | MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO), | |
1888 | MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI), | |
1889 | MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA), | |
1890 | MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16), | |
1891 | MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO), | |
1892 | MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI), | |
1893 | MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA), | |
1894 | MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16), | |
1895 | MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO), | |
1896 | MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI), | |
1897 | MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA), | |
1898 | MAP32 ("fixup", BFD_RELOC_CTOR), | |
1899 | MAP32 ("plt", BFD_RELOC_24_PLT_PCREL), | |
1900 | MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL), | |
1901 | MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC), | |
1902 | MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC), | |
1903 | MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL), | |
1904 | MAP32 ("sdarel", BFD_RELOC_GPREL16), | |
b9c361e0 JL |
1905 | MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A), |
1906 | MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A), | |
1907 | MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A), | |
b7d7dc63 AM |
1908 | MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32), |
1909 | MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16), | |
1910 | MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO), | |
1911 | MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI), | |
1912 | MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA), | |
1913 | MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16), | |
1914 | MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL), | |
1915 | MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16), | |
1916 | MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21), | |
b9c361e0 | 1917 | MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO), |
b7d7dc63 AM |
1918 | MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF), |
1919 | MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16), | |
1920 | MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO), | |
1921 | MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI), | |
1922 | MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA), | |
1923 | MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD), | |
1924 | MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA), | |
1925 | MAP32 ("xgot", BFD_RELOC_PPC_TOC16), | |
1926 | MAP64 ("higher", BFD_RELOC_PPC64_HIGHER), | |
1927 | MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S), | |
1928 | MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST), | |
1929 | MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S), | |
1930 | MAP64 ("tocbase", BFD_RELOC_PPC64_TOC), | |
1931 | MAP64 ("toc", BFD_RELOC_PPC_TOC16), | |
1932 | MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO), | |
1933 | MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI), | |
1934 | MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA), | |
1935 | MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER), | |
1936 | MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA), | |
1937 | MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST), | |
1938 | MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA), | |
1939 | MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER), | |
1940 | MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA), | |
1941 | MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST), | |
1942 | MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA), | |
1943 | { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED } | |
252b5132 RH |
1944 | }; |
1945 | ||
1946 | if (*str++ != '@') | |
1947 | return BFD_RELOC_UNUSED; | |
1948 | ||
1949 | for (ch = *str, str2 = ident; | |
1950 | (str2 < ident + sizeof (ident) - 1 | |
3882b010 | 1951 | && (ISALNUM (ch) || ch == '@')); |
252b5132 RH |
1952 | ch = *++str) |
1953 | { | |
3882b010 | 1954 | *str2++ = TOLOWER (ch); |
252b5132 RH |
1955 | } |
1956 | ||
1957 | *str2 = '\0'; | |
1958 | len = str2 - ident; | |
1959 | ||
1960 | ch = ident[0]; | |
1961 | for (ptr = &mapping[0]; ptr->length > 0; ptr++) | |
1962 | if (ch == ptr->string[0] | |
1963 | && len == ptr->length | |
b7d7dc63 AM |
1964 | && memcmp (ident, ptr->string, ptr->length) == 0 |
1965 | && (ppc_obj64 ? ptr->valid64 : ptr->valid32)) | |
252b5132 | 1966 | { |
15c1449b AM |
1967 | int reloc = ptr->reloc; |
1968 | ||
727fc41e AM |
1969 | if (!ppc_obj64 && exp_p->X_add_number != 0) |
1970 | { | |
1971 | switch (reloc) | |
1972 | { | |
1973 | case BFD_RELOC_16_GOTOFF: | |
1974 | case BFD_RELOC_LO16_GOTOFF: | |
1975 | case BFD_RELOC_HI16_GOTOFF: | |
1976 | case BFD_RELOC_HI16_S_GOTOFF: | |
1977 | as_warn (_("identifier+constant@got means " | |
1978 | "identifier@got+constant")); | |
1979 | break; | |
1980 | ||
1981 | case BFD_RELOC_PPC_GOT_TLSGD16: | |
1982 | case BFD_RELOC_PPC_GOT_TLSGD16_LO: | |
1983 | case BFD_RELOC_PPC_GOT_TLSGD16_HI: | |
1984 | case BFD_RELOC_PPC_GOT_TLSGD16_HA: | |
1985 | case BFD_RELOC_PPC_GOT_TLSLD16: | |
1986 | case BFD_RELOC_PPC_GOT_TLSLD16_LO: | |
1987 | case BFD_RELOC_PPC_GOT_TLSLD16_HI: | |
1988 | case BFD_RELOC_PPC_GOT_TLSLD16_HA: | |
1989 | case BFD_RELOC_PPC_GOT_DTPREL16: | |
1990 | case BFD_RELOC_PPC_GOT_DTPREL16_LO: | |
1991 | case BFD_RELOC_PPC_GOT_DTPREL16_HI: | |
1992 | case BFD_RELOC_PPC_GOT_DTPREL16_HA: | |
1993 | case BFD_RELOC_PPC_GOT_TPREL16: | |
1994 | case BFD_RELOC_PPC_GOT_TPREL16_LO: | |
1995 | case BFD_RELOC_PPC_GOT_TPREL16_HI: | |
1996 | case BFD_RELOC_PPC_GOT_TPREL16_HA: | |
1997 | as_bad (_("symbol+offset not supported for got tls")); | |
1998 | break; | |
1999 | } | |
2000 | } | |
5f6db75a AM |
2001 | |
2002 | /* Now check for identifier@suffix+constant. */ | |
2003 | if (*str == '-' || *str == '+') | |
252b5132 | 2004 | { |
5f6db75a AM |
2005 | char *orig_line = input_line_pointer; |
2006 | expressionS new_exp; | |
2007 | ||
2008 | input_line_pointer = str; | |
2009 | expression (&new_exp); | |
2010 | if (new_exp.X_op == O_constant) | |
252b5132 | 2011 | { |
5f6db75a AM |
2012 | exp_p->X_add_number += new_exp.X_add_number; |
2013 | str = input_line_pointer; | |
252b5132 | 2014 | } |
5f6db75a AM |
2015 | |
2016 | if (&input_line_pointer != str_p) | |
2017 | input_line_pointer = orig_line; | |
252b5132 | 2018 | } |
252b5132 | 2019 | *str_p = str; |
0baf16f2 | 2020 | |
2b3c4602 | 2021 | if (reloc == (int) BFD_RELOC_PPC64_TOC |
9f2b53d7 AM |
2022 | && exp_p->X_op == O_symbol |
2023 | && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0) | |
0baf16f2 | 2024 | { |
9f2b53d7 AM |
2025 | /* Change the symbol so that the dummy .TOC. symbol can be |
2026 | omitted from the object file. */ | |
0baf16f2 AM |
2027 | exp_p->X_add_symbol = &abs_symbol; |
2028 | } | |
2029 | ||
15c1449b | 2030 | return (bfd_reloc_code_real_type) reloc; |
252b5132 RH |
2031 | } |
2032 | ||
2033 | return BFD_RELOC_UNUSED; | |
2034 | } | |
2035 | ||
99a814a1 AM |
2036 | /* Like normal .long/.short/.word, except support @got, etc. |
2037 | Clobbers input_line_pointer, checks end-of-line. */ | |
252b5132 | 2038 | static void |
98027b10 | 2039 | ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */) |
252b5132 RH |
2040 | { |
2041 | expressionS exp; | |
2042 | bfd_reloc_code_real_type reloc; | |
2043 | ||
2044 | if (is_it_end_of_statement ()) | |
2045 | { | |
2046 | demand_empty_rest_of_line (); | |
2047 | return; | |
2048 | } | |
2049 | ||
2050 | do | |
2051 | { | |
2052 | expression (&exp); | |
27285eed | 2053 | if (*input_line_pointer == '@' |
99a814a1 AM |
2054 | && (reloc = ppc_elf_suffix (&input_line_pointer, |
2055 | &exp)) != BFD_RELOC_UNUSED) | |
252b5132 | 2056 | { |
99a814a1 AM |
2057 | reloc_howto_type *reloc_howto; |
2058 | int size; | |
2059 | ||
2060 | reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc); | |
2061 | size = bfd_get_reloc_size (reloc_howto); | |
252b5132 RH |
2062 | |
2063 | if (size > nbytes) | |
0baf16f2 AM |
2064 | { |
2065 | as_bad (_("%s relocations do not fit in %d bytes\n"), | |
2066 | reloc_howto->name, nbytes); | |
2067 | } | |
252b5132 RH |
2068 | else |
2069 | { | |
0baf16f2 AM |
2070 | char *p; |
2071 | int offset; | |
252b5132 | 2072 | |
0baf16f2 | 2073 | p = frag_more (nbytes); |
aa0c8c1a | 2074 | memset (p, 0, nbytes); |
0baf16f2 AM |
2075 | offset = 0; |
2076 | if (target_big_endian) | |
2077 | offset = nbytes - size; | |
99a814a1 AM |
2078 | fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size, |
2079 | &exp, 0, reloc); | |
252b5132 RH |
2080 | } |
2081 | } | |
2082 | else | |
2083 | emit_expr (&exp, (unsigned int) nbytes); | |
2084 | } | |
2085 | while (*input_line_pointer++ == ','); | |
2086 | ||
99a814a1 AM |
2087 | /* Put terminator back into stream. */ |
2088 | input_line_pointer--; | |
252b5132 RH |
2089 | demand_empty_rest_of_line (); |
2090 | } | |
2091 | ||
2092 | /* Solaris pseduo op to change to the .rodata section. */ | |
2093 | static void | |
98027b10 | 2094 | ppc_elf_rdata (int xxx) |
252b5132 RH |
2095 | { |
2096 | char *save_line = input_line_pointer; | |
2097 | static char section[] = ".rodata\n"; | |
2098 | ||
99a814a1 | 2099 | /* Just pretend this is .section .rodata */ |
252b5132 RH |
2100 | input_line_pointer = section; |
2101 | obj_elf_section (xxx); | |
2102 | ||
2103 | input_line_pointer = save_line; | |
2104 | } | |
2105 | ||
99a814a1 | 2106 | /* Pseudo op to make file scope bss items. */ |
252b5132 | 2107 | static void |
98027b10 | 2108 | ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED) |
252b5132 | 2109 | { |
98027b10 AM |
2110 | char *name; |
2111 | char c; | |
2112 | char *p; | |
252b5132 | 2113 | offsetT size; |
98027b10 | 2114 | symbolS *symbolP; |
252b5132 RH |
2115 | offsetT align; |
2116 | segT old_sec; | |
2117 | int old_subsec; | |
2118 | char *pfrag; | |
2119 | int align2; | |
2120 | ||
2121 | name = input_line_pointer; | |
2122 | c = get_symbol_end (); | |
2123 | ||
99a814a1 | 2124 | /* just after name is now '\0'. */ |
252b5132 RH |
2125 | p = input_line_pointer; |
2126 | *p = c; | |
2127 | SKIP_WHITESPACE (); | |
2128 | if (*input_line_pointer != ',') | |
2129 | { | |
d6ed37ed | 2130 | as_bad (_("expected comma after symbol-name: rest of line ignored.")); |
252b5132 RH |
2131 | ignore_rest_of_line (); |
2132 | return; | |
2133 | } | |
2134 | ||
2135 | input_line_pointer++; /* skip ',' */ | |
2136 | if ((size = get_absolute_expression ()) < 0) | |
2137 | { | |
2138 | as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size); | |
2139 | ignore_rest_of_line (); | |
2140 | return; | |
2141 | } | |
2142 | ||
2143 | /* The third argument to .lcomm is the alignment. */ | |
2144 | if (*input_line_pointer != ',') | |
2145 | align = 8; | |
2146 | else | |
2147 | { | |
2148 | ++input_line_pointer; | |
2149 | align = get_absolute_expression (); | |
2150 | if (align <= 0) | |
2151 | { | |
2152 | as_warn (_("ignoring bad alignment")); | |
2153 | align = 8; | |
2154 | } | |
2155 | } | |
2156 | ||
2157 | *p = 0; | |
2158 | symbolP = symbol_find_or_make (name); | |
2159 | *p = c; | |
2160 | ||
2161 | if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) | |
2162 | { | |
d6ed37ed | 2163 | as_bad (_("ignoring attempt to re-define symbol `%s'."), |
252b5132 RH |
2164 | S_GET_NAME (symbolP)); |
2165 | ignore_rest_of_line (); | |
2166 | return; | |
2167 | } | |
2168 | ||
2169 | if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size) | |
2170 | { | |
d6ed37ed | 2171 | as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."), |
252b5132 RH |
2172 | S_GET_NAME (symbolP), |
2173 | (long) S_GET_VALUE (symbolP), | |
2174 | (long) size); | |
2175 | ||
2176 | ignore_rest_of_line (); | |
2177 | return; | |
2178 | } | |
2179 | ||
99a814a1 | 2180 | /* Allocate_bss. */ |
252b5132 RH |
2181 | old_sec = now_seg; |
2182 | old_subsec = now_subseg; | |
2183 | if (align) | |
2184 | { | |
99a814a1 | 2185 | /* Convert to a power of 2 alignment. */ |
252b5132 RH |
2186 | for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2); |
2187 | if (align != 1) | |
2188 | { | |
d6ed37ed | 2189 | as_bad (_("common alignment not a power of 2")); |
252b5132 RH |
2190 | ignore_rest_of_line (); |
2191 | return; | |
2192 | } | |
2193 | } | |
2194 | else | |
2195 | align2 = 0; | |
2196 | ||
2197 | record_alignment (bss_section, align2); | |
cbe02d4f | 2198 | subseg_set (bss_section, 1); |
252b5132 RH |
2199 | if (align2) |
2200 | frag_align (align2, 0, 0); | |
2201 | if (S_GET_SEGMENT (symbolP) == bss_section) | |
49309057 ILT |
2202 | symbol_get_frag (symbolP)->fr_symbol = 0; |
2203 | symbol_set_frag (symbolP, frag_now); | |
252b5132 RH |
2204 | pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size, |
2205 | (char *) 0); | |
2206 | *pfrag = 0; | |
2207 | S_SET_SIZE (symbolP, size); | |
2208 | S_SET_SEGMENT (symbolP, bss_section); | |
2209 | subseg_set (old_sec, old_subsec); | |
2210 | demand_empty_rest_of_line (); | |
2211 | } | |
2212 | ||
2213 | /* Validate any relocations emitted for -mrelocatable, possibly adding | |
2214 | fixups for word relocations in writable segments, so we can adjust | |
2215 | them at runtime. */ | |
2216 | static void | |
98027b10 | 2217 | ppc_elf_validate_fix (fixS *fixp, segT seg) |
252b5132 RH |
2218 | { |
2219 | if (fixp->fx_done || fixp->fx_pcrel) | |
2220 | return; | |
2221 | ||
2222 | switch (shlib) | |
2223 | { | |
2224 | case SHLIB_NONE: | |
2225 | case SHLIB_PIC: | |
2226 | return; | |
2227 | ||
5d6f4f16 | 2228 | case SHLIB_MRELOCATABLE: |
252b5132 RH |
2229 | if (fixp->fx_r_type <= BFD_RELOC_UNUSED |
2230 | && fixp->fx_r_type != BFD_RELOC_16_GOTOFF | |
2231 | && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF | |
2232 | && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF | |
2233 | && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF | |
1cfc59d5 | 2234 | && fixp->fx_r_type != BFD_RELOC_16_BASEREL |
252b5132 RH |
2235 | && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL |
2236 | && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL | |
2237 | && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL | |
e138127a | 2238 | && (seg->flags & SEC_LOAD) != 0 |
252b5132 RH |
2239 | && strcmp (segment_name (seg), ".got2") != 0 |
2240 | && strcmp (segment_name (seg), ".dtors") != 0 | |
2241 | && strcmp (segment_name (seg), ".ctors") != 0 | |
2242 | && strcmp (segment_name (seg), ".fixup") != 0 | |
252b5132 RH |
2243 | && strcmp (segment_name (seg), ".gcc_except_table") != 0 |
2244 | && strcmp (segment_name (seg), ".eh_frame") != 0 | |
2245 | && strcmp (segment_name (seg), ".ex_shared") != 0) | |
2246 | { | |
2247 | if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0 | |
2248 | || fixp->fx_r_type != BFD_RELOC_CTOR) | |
2249 | { | |
2250 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
d6ed37ed | 2251 | _("relocation cannot be done when using -mrelocatable")); |
252b5132 RH |
2252 | } |
2253 | } | |
2254 | return; | |
2255 | } | |
2256 | } | |
0baf16f2 | 2257 | |
7e8d4ab4 AM |
2258 | /* Prevent elf_frob_file_before_adjust removing a weak undefined |
2259 | function descriptor sym if the corresponding code sym is used. */ | |
2260 | ||
2261 | void | |
98027b10 | 2262 | ppc_frob_file_before_adjust (void) |
0baf16f2 | 2263 | { |
7e8d4ab4 | 2264 | symbolS *symp; |
9232bbb0 | 2265 | asection *toc; |
0baf16f2 | 2266 | |
7e8d4ab4 AM |
2267 | if (!ppc_obj64) |
2268 | return; | |
2269 | ||
2270 | for (symp = symbol_rootP; symp; symp = symbol_next (symp)) | |
0baf16f2 | 2271 | { |
7e8d4ab4 AM |
2272 | const char *name; |
2273 | char *dotname; | |
2274 | symbolS *dotsym; | |
2275 | size_t len; | |
2276 | ||
2277 | name = S_GET_NAME (symp); | |
2278 | if (name[0] == '.') | |
2279 | continue; | |
2280 | ||
2281 | if (! S_IS_WEAK (symp) | |
2282 | || S_IS_DEFINED (symp)) | |
2283 | continue; | |
2284 | ||
2285 | len = strlen (name) + 1; | |
2286 | dotname = xmalloc (len + 1); | |
2287 | dotname[0] = '.'; | |
2288 | memcpy (dotname + 1, name, len); | |
461b725f | 2289 | dotsym = symbol_find_noref (dotname, 1); |
7e8d4ab4 AM |
2290 | free (dotname); |
2291 | if (dotsym != NULL && (symbol_used_p (dotsym) | |
2292 | || symbol_used_in_reloc_p (dotsym))) | |
670ec21d NC |
2293 | symbol_mark_used (symp); |
2294 | ||
0baf16f2 AM |
2295 | } |
2296 | ||
9232bbb0 AM |
2297 | toc = bfd_get_section_by_name (stdoutput, ".toc"); |
2298 | if (toc != NULL | |
01efc3af | 2299 | && toc_reloc_types != has_large_toc_reloc |
9232bbb0 AM |
2300 | && bfd_section_size (stdoutput, toc) > 0x10000) |
2301 | as_warn (_("TOC section size exceeds 64k")); | |
a38a07e0 AM |
2302 | } |
2303 | ||
2304 | /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be | |
2305 | emitted. Other uses of .TOC. will cause the symbol to be marked | |
2306 | with BSF_KEEP in md_apply_fix. */ | |
9232bbb0 | 2307 | |
a38a07e0 AM |
2308 | void |
2309 | ppc_elf_adjust_symtab (void) | |
2310 | { | |
2311 | if (ppc_obj64) | |
2312 | { | |
2313 | symbolS *symp; | |
2314 | symp = symbol_find (".TOC."); | |
2315 | if (symp != NULL) | |
2316 | { | |
2317 | asymbol *bsym = symbol_get_bfdsym (symp); | |
2318 | if ((bsym->flags & BSF_KEEP) == 0) | |
2319 | symbol_remove (symp, &symbol_rootP, &symbol_lastP); | |
a38a07e0 AM |
2320 | } |
2321 | } | |
0baf16f2 | 2322 | } |
252b5132 RH |
2323 | #endif /* OBJ_ELF */ |
2324 | \f | |
2325 | #ifdef TE_PE | |
2326 | ||
2327 | /* | |
99a814a1 | 2328 | * Summary of parse_toc_entry. |
252b5132 RH |
2329 | * |
2330 | * in: Input_line_pointer points to the '[' in one of: | |
2331 | * | |
2332 | * [toc] [tocv] [toc32] [toc64] | |
2333 | * | |
2334 | * Anything else is an error of one kind or another. | |
2335 | * | |
81d4177b | 2336 | * out: |
252b5132 RH |
2337 | * return value: success or failure |
2338 | * toc_kind: kind of toc reference | |
2339 | * input_line_pointer: | |
2340 | * success: first char after the ']' | |
2341 | * failure: unchanged | |
2342 | * | |
2343 | * settings: | |
2344 | * | |
2345 | * [toc] - rv == success, toc_kind = default_toc | |
2346 | * [tocv] - rv == success, toc_kind = data_in_toc | |
2347 | * [toc32] - rv == success, toc_kind = must_be_32 | |
2348 | * [toc64] - rv == success, toc_kind = must_be_64 | |
2349 | * | |
2350 | */ | |
2351 | ||
81d4177b KH |
2352 | enum toc_size_qualifier |
2353 | { | |
252b5132 RH |
2354 | default_toc, /* The toc cell constructed should be the system default size */ |
2355 | data_in_toc, /* This is a direct reference to a toc cell */ | |
2356 | must_be_32, /* The toc cell constructed must be 32 bits wide */ | |
2357 | must_be_64 /* The toc cell constructed must be 64 bits wide */ | |
2358 | }; | |
2359 | ||
2360 | static int | |
98027b10 | 2361 | parse_toc_entry (enum toc_size_qualifier *toc_kind) |
252b5132 RH |
2362 | { |
2363 | char *start; | |
2364 | char *toc_spec; | |
2365 | char c; | |
2366 | enum toc_size_qualifier t; | |
2367 | ||
99a814a1 | 2368 | /* Save the input_line_pointer. */ |
252b5132 RH |
2369 | start = input_line_pointer; |
2370 | ||
99a814a1 | 2371 | /* Skip over the '[' , and whitespace. */ |
252b5132 RH |
2372 | ++input_line_pointer; |
2373 | SKIP_WHITESPACE (); | |
81d4177b | 2374 | |
99a814a1 | 2375 | /* Find the spelling of the operand. */ |
252b5132 RH |
2376 | toc_spec = input_line_pointer; |
2377 | c = get_symbol_end (); | |
2378 | ||
99a814a1 | 2379 | if (strcmp (toc_spec, "toc") == 0) |
252b5132 RH |
2380 | { |
2381 | t = default_toc; | |
2382 | } | |
99a814a1 | 2383 | else if (strcmp (toc_spec, "tocv") == 0) |
252b5132 RH |
2384 | { |
2385 | t = data_in_toc; | |
2386 | } | |
99a814a1 | 2387 | else if (strcmp (toc_spec, "toc32") == 0) |
252b5132 RH |
2388 | { |
2389 | t = must_be_32; | |
2390 | } | |
99a814a1 | 2391 | else if (strcmp (toc_spec, "toc64") == 0) |
252b5132 RH |
2392 | { |
2393 | t = must_be_64; | |
2394 | } | |
2395 | else | |
2396 | { | |
2397 | as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec); | |
99a814a1 AM |
2398 | *input_line_pointer = c; |
2399 | input_line_pointer = start; | |
252b5132 RH |
2400 | return 0; |
2401 | } | |
2402 | ||
99a814a1 AM |
2403 | /* Now find the ']'. */ |
2404 | *input_line_pointer = c; | |
252b5132 | 2405 | |
81d4177b KH |
2406 | SKIP_WHITESPACE (); /* leading whitespace could be there. */ |
2407 | c = *input_line_pointer++; /* input_line_pointer->past char in c. */ | |
252b5132 RH |
2408 | |
2409 | if (c != ']') | |
2410 | { | |
2411 | as_bad (_("syntax error: expected `]', found `%c'"), c); | |
99a814a1 | 2412 | input_line_pointer = start; |
252b5132 RH |
2413 | return 0; |
2414 | } | |
2415 | ||
99a814a1 | 2416 | *toc_kind = t; |
252b5132 RH |
2417 | return 1; |
2418 | } | |
2419 | #endif | |
3b8b57a9 AM |
2420 | |
2421 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) | |
2422 | /* See whether a symbol is in the TOC section. */ | |
2423 | ||
2424 | static int | |
2425 | ppc_is_toc_sym (symbolS *sym) | |
2426 | { | |
2427 | #ifdef OBJ_XCOFF | |
9f6e76f4 TG |
2428 | return (symbol_get_tc (sym)->symbol_class == XMC_TC |
2429 | || symbol_get_tc (sym)->symbol_class == XMC_TC0); | |
3b8b57a9 AM |
2430 | #endif |
2431 | #ifdef OBJ_ELF | |
2432 | const char *sname = segment_name (S_GET_SEGMENT (sym)); | |
2433 | if (ppc_obj64) | |
2434 | return strcmp (sname, ".toc") == 0; | |
2435 | else | |
2436 | return strcmp (sname, ".got") == 0; | |
2437 | #endif | |
2438 | } | |
2439 | #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ | |
252b5132 RH |
2440 | \f |
2441 | ||
dc1d03fc | 2442 | #ifdef OBJ_ELF |
6a0c61b7 EZ |
2443 | #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff)) |
2444 | static void | |
98027b10 | 2445 | ppc_apuinfo_section_add (unsigned int apu, unsigned int version) |
6a0c61b7 EZ |
2446 | { |
2447 | unsigned int i; | |
2448 | ||
2449 | /* Check we don't already exist. */ | |
2450 | for (i = 0; i < ppc_apuinfo_num; i++) | |
dc1d03fc | 2451 | if (ppc_apuinfo_list[i] == APUID (apu, version)) |
6a0c61b7 | 2452 | return; |
b34976b6 | 2453 | |
6a0c61b7 EZ |
2454 | if (ppc_apuinfo_num == ppc_apuinfo_num_alloc) |
2455 | { | |
2456 | if (ppc_apuinfo_num_alloc == 0) | |
2457 | { | |
2458 | ppc_apuinfo_num_alloc = 4; | |
2459 | ppc_apuinfo_list = (unsigned long *) | |
2460 | xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc); | |
2461 | } | |
2462 | else | |
2463 | { | |
2464 | ppc_apuinfo_num_alloc += 4; | |
2465 | ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list, | |
2466 | sizeof (unsigned long) * ppc_apuinfo_num_alloc); | |
2467 | } | |
2468 | } | |
dc1d03fc | 2469 | ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version); |
6a0c61b7 EZ |
2470 | } |
2471 | #undef APUID | |
dc1d03fc | 2472 | #endif |
6a0c61b7 EZ |
2473 | \f |
2474 | ||
252b5132 RH |
2475 | /* We need to keep a list of fixups. We can't simply generate them as |
2476 | we go, because that would require us to first create the frag, and | |
2477 | that would screw up references to ``.''. */ | |
2478 | ||
2479 | struct ppc_fixup | |
2480 | { | |
2481 | expressionS exp; | |
2482 | int opindex; | |
2483 | bfd_reloc_code_real_type reloc; | |
2484 | }; | |
2485 | ||
2486 | #define MAX_INSN_FIXUPS (5) | |
2487 | ||
b9c361e0 JL |
2488 | /* Form I16L. */ |
2489 | #define E_OR2I_INSN 0x7000C000 | |
2490 | #define E_AND2I_DOT_INSN 0x7000C800 | |
2491 | #define E_OR2IS_INSN 0x7000D000 | |
2492 | #define E_LIS_INSN 0x7000E000 | |
2493 | #define E_AND2IS_DOT_INSN 0x7000E800 | |
2494 | ||
2495 | /* Form I16A. */ | |
2496 | #define E_ADD2I_DOT_INSN 0x70008800 | |
2497 | #define E_ADD2IS_INSN 0x70009000 | |
2498 | #define E_CMP16I_INSN 0x70009800 | |
2499 | #define E_MULL2I_INSN 0x7000A000 | |
2500 | #define E_CMPL16I_INSN 0x7000A800 | |
2501 | #define E_CMPH16I_INSN 0x7000B000 | |
2502 | #define E_CMPHL16I_INSN 0x7000B800 | |
2503 | ||
252b5132 RH |
2504 | /* This routine is called for each instruction to be assembled. */ |
2505 | ||
2506 | void | |
98027b10 | 2507 | md_assemble (char *str) |
252b5132 RH |
2508 | { |
2509 | char *s; | |
2510 | const struct powerpc_opcode *opcode; | |
2511 | unsigned long insn; | |
2512 | const unsigned char *opindex_ptr; | |
2513 | int skip_optional; | |
2514 | int need_paren; | |
2515 | int next_opindex; | |
2516 | struct ppc_fixup fixups[MAX_INSN_FIXUPS]; | |
2517 | int fc; | |
2518 | char *f; | |
09b935ac | 2519 | int addr_mod; |
252b5132 | 2520 | int i; |
b9c361e0 | 2521 | unsigned int insn_length; |
252b5132 RH |
2522 | |
2523 | /* Get the opcode. */ | |
3882b010 | 2524 | for (s = str; *s != '\0' && ! ISSPACE (*s); s++) |
252b5132 RH |
2525 | ; |
2526 | if (*s != '\0') | |
2527 | *s++ = '\0'; | |
2528 | ||
2529 | /* Look up the opcode in the hash table. */ | |
2530 | opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str); | |
2531 | if (opcode == (const struct powerpc_opcode *) NULL) | |
2532 | { | |
2533 | const struct powerpc_macro *macro; | |
2534 | ||
2535 | macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str); | |
2536 | if (macro == (const struct powerpc_macro *) NULL) | |
d6ed37ed | 2537 | as_bad (_("unrecognized opcode: `%s'"), str); |
252b5132 RH |
2538 | else |
2539 | ppc_macro (s, macro); | |
2540 | ||
2541 | return; | |
2542 | } | |
2543 | ||
2544 | insn = opcode->opcode; | |
2545 | ||
2546 | str = s; | |
3882b010 | 2547 | while (ISSPACE (*str)) |
252b5132 RH |
2548 | ++str; |
2549 | ||
2550 | /* PowerPC operands are just expressions. The only real issue is | |
2551 | that a few operand types are optional. All cases which might use | |
1f6c9eb0 ZW |
2552 | an optional operand separate the operands only with commas (in some |
2553 | cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never | |
2554 | have optional operands). Most instructions with optional operands | |
2555 | have only one. Those that have more than one optional operand can | |
2556 | take either all their operands or none. So, before we start seriously | |
2557 | parsing the operands, we check to see if we have optional operands, | |
2558 | and if we do, we count the number of commas to see which operands | |
2559 | have been omitted. */ | |
252b5132 RH |
2560 | skip_optional = 0; |
2561 | for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++) | |
2562 | { | |
2563 | const struct powerpc_operand *operand; | |
2564 | ||
2565 | operand = &powerpc_operands[*opindex_ptr]; | |
2566 | if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0) | |
2567 | { | |
2568 | unsigned int opcount; | |
7fe9cf6b | 2569 | unsigned int num_operands_expected; |
252b5132 RH |
2570 | |
2571 | /* There is an optional operand. Count the number of | |
2572 | commas in the input line. */ | |
2573 | if (*str == '\0') | |
2574 | opcount = 0; | |
2575 | else | |
2576 | { | |
2577 | opcount = 1; | |
2578 | s = str; | |
2579 | while ((s = strchr (s, ',')) != (char *) NULL) | |
2580 | { | |
2581 | ++opcount; | |
2582 | ++s; | |
2583 | } | |
2584 | } | |
2585 | ||
7fe9cf6b NC |
2586 | /* Compute the number of expected operands. |
2587 | Do not count fake operands. */ | |
2588 | for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++) | |
2589 | if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0) | |
2590 | ++ num_operands_expected; | |
2591 | ||
252b5132 RH |
2592 | /* If there are fewer operands in the line then are called |
2593 | for by the instruction, we want to skip the optional | |
1f6c9eb0 | 2594 | operands. */ |
7fe9cf6b | 2595 | if (opcount < num_operands_expected) |
252b5132 RH |
2596 | skip_optional = 1; |
2597 | ||
2598 | break; | |
2599 | } | |
2600 | } | |
2601 | ||
2602 | /* Gather the operands. */ | |
2603 | need_paren = 0; | |
2604 | next_opindex = 0; | |
2605 | fc = 0; | |
2606 | for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++) | |
2607 | { | |
2608 | const struct powerpc_operand *operand; | |
2609 | const char *errmsg; | |
2610 | char *hold; | |
2611 | expressionS ex; | |
2612 | char endc; | |
2613 | ||
2614 | if (next_opindex == 0) | |
2615 | operand = &powerpc_operands[*opindex_ptr]; | |
2616 | else | |
2617 | { | |
2618 | operand = &powerpc_operands[next_opindex]; | |
2619 | next_opindex = 0; | |
2620 | } | |
252b5132 RH |
2621 | errmsg = NULL; |
2622 | ||
2623 | /* If this is a fake operand, then we do not expect anything | |
2624 | from the input. */ | |
2625 | if ((operand->flags & PPC_OPERAND_FAKE) != 0) | |
2626 | { | |
2b3c4602 | 2627 | insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg); |
252b5132 | 2628 | if (errmsg != (const char *) NULL) |
ee2c9aa9 | 2629 | as_bad ("%s", errmsg); |
252b5132 RH |
2630 | continue; |
2631 | } | |
2632 | ||
2633 | /* If this is an optional operand, and we are skipping it, just | |
2634 | insert a zero. */ | |
2635 | if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0 | |
2636 | && skip_optional) | |
2637 | { | |
2638 | if (operand->insert) | |
2639 | { | |
2b3c4602 | 2640 | insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg); |
252b5132 | 2641 | if (errmsg != (const char *) NULL) |
ee2c9aa9 | 2642 | as_bad ("%s", errmsg); |
252b5132 RH |
2643 | } |
2644 | if ((operand->flags & PPC_OPERAND_NEXT) != 0) | |
2645 | next_opindex = *opindex_ptr + 1; | |
2646 | continue; | |
2647 | } | |
2648 | ||
2649 | /* Gather the operand. */ | |
2650 | hold = input_line_pointer; | |
2651 | input_line_pointer = str; | |
2652 | ||
2653 | #ifdef TE_PE | |
81d4177b | 2654 | if (*input_line_pointer == '[') |
252b5132 RH |
2655 | { |
2656 | /* We are expecting something like the second argument here: | |
99a814a1 AM |
2657 | * |
2658 | * lwz r4,[toc].GS.0.static_int(rtoc) | |
2659 | * ^^^^^^^^^^^^^^^^^^^^^^^^^^^ | |
2660 | * The argument following the `]' must be a symbol name, and the | |
2661 | * register must be the toc register: 'rtoc' or '2' | |
2662 | * | |
2663 | * The effect is to 0 as the displacement field | |
2664 | * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or | |
2665 | * the appropriate variation) reloc against it based on the symbol. | |
2666 | * The linker will build the toc, and insert the resolved toc offset. | |
2667 | * | |
2668 | * Note: | |
2669 | * o The size of the toc entry is currently assumed to be | |
2670 | * 32 bits. This should not be assumed to be a hard coded | |
2671 | * number. | |
2672 | * o In an effort to cope with a change from 32 to 64 bits, | |
2673 | * there are also toc entries that are specified to be | |
2674 | * either 32 or 64 bits: | |
2675 | * lwz r4,[toc32].GS.0.static_int(rtoc) | |
2676 | * lwz r4,[toc64].GS.0.static_int(rtoc) | |
2677 | * These demand toc entries of the specified size, and the | |
2678 | * instruction probably requires it. | |
2679 | */ | |
252b5132 RH |
2680 | |
2681 | int valid_toc; | |
2682 | enum toc_size_qualifier toc_kind; | |
2683 | bfd_reloc_code_real_type toc_reloc; | |
2684 | ||
99a814a1 AM |
2685 | /* Go parse off the [tocXX] part. */ |
2686 | valid_toc = parse_toc_entry (&toc_kind); | |
252b5132 | 2687 | |
81d4177b | 2688 | if (!valid_toc) |
252b5132 | 2689 | { |
a5840dce AM |
2690 | ignore_rest_of_line (); |
2691 | break; | |
252b5132 RH |
2692 | } |
2693 | ||
99a814a1 AM |
2694 | /* Now get the symbol following the ']'. */ |
2695 | expression (&ex); | |
252b5132 RH |
2696 | |
2697 | switch (toc_kind) | |
2698 | { | |
2699 | case default_toc: | |
99a814a1 AM |
2700 | /* In this case, we may not have seen the symbol yet, |
2701 | since it is allowed to appear on a .extern or .globl | |
2702 | or just be a label in the .data section. */ | |
252b5132 RH |
2703 | toc_reloc = BFD_RELOC_PPC_TOC16; |
2704 | break; | |
2705 | case data_in_toc: | |
99a814a1 AM |
2706 | /* 1. The symbol must be defined and either in the toc |
2707 | section, or a global. | |
2708 | 2. The reloc generated must have the TOCDEFN flag set | |
2709 | in upper bit mess of the reloc type. | |
2710 | FIXME: It's a little confusing what the tocv | |
2711 | qualifier can be used for. At the very least, I've | |
2712 | seen three uses, only one of which I'm sure I can | |
2713 | explain. */ | |
81d4177b KH |
2714 | if (ex.X_op == O_symbol) |
2715 | { | |
9c2799c2 | 2716 | gas_assert (ex.X_add_symbol != NULL); |
fed9b18a ILT |
2717 | if (symbol_get_bfdsym (ex.X_add_symbol)->section |
2718 | != tocdata_section) | |
252b5132 | 2719 | { |
99a814a1 | 2720 | as_bad (_("[tocv] symbol is not a toc symbol")); |
252b5132 RH |
2721 | } |
2722 | } | |
2723 | ||
2724 | toc_reloc = BFD_RELOC_PPC_TOC16; | |
2725 | break; | |
2726 | case must_be_32: | |
99a814a1 AM |
2727 | /* FIXME: these next two specifically specify 32/64 bit |
2728 | toc entries. We don't support them today. Is this | |
2729 | the right way to say that? */ | |
252b5132 | 2730 | toc_reloc = BFD_RELOC_UNUSED; |
d6ed37ed | 2731 | as_bad (_("unimplemented toc32 expression modifier")); |
252b5132 RH |
2732 | break; |
2733 | case must_be_64: | |
99a814a1 | 2734 | /* FIXME: see above. */ |
252b5132 | 2735 | toc_reloc = BFD_RELOC_UNUSED; |
d6ed37ed | 2736 | as_bad (_("unimplemented toc64 expression modifier")); |
252b5132 RH |
2737 | break; |
2738 | default: | |
bc805888 | 2739 | fprintf (stderr, |
99a814a1 AM |
2740 | _("Unexpected return value [%d] from parse_toc_entry!\n"), |
2741 | toc_kind); | |
bc805888 | 2742 | abort (); |
252b5132 RH |
2743 | break; |
2744 | } | |
2745 | ||
2746 | /* We need to generate a fixup for this expression. */ | |
2747 | if (fc >= MAX_INSN_FIXUPS) | |
2748 | as_fatal (_("too many fixups")); | |
2749 | ||
2750 | fixups[fc].reloc = toc_reloc; | |
2751 | fixups[fc].exp = ex; | |
2752 | fixups[fc].opindex = *opindex_ptr; | |
2753 | ++fc; | |
2754 | ||
99a814a1 AM |
2755 | /* Ok. We've set up the fixup for the instruction. Now make it |
2756 | look like the constant 0 was found here. */ | |
252b5132 RH |
2757 | ex.X_unsigned = 1; |
2758 | ex.X_op = O_constant; | |
2759 | ex.X_add_number = 0; | |
2760 | ex.X_add_symbol = NULL; | |
2761 | ex.X_op_symbol = NULL; | |
2762 | } | |
2763 | ||
2764 | else | |
2765 | #endif /* TE_PE */ | |
2766 | { | |
b9c361e0 JL |
2767 | if ((reg_names_p |
2768 | && (((operand->flags & PPC_OPERAND_CR_BIT) != 0) | |
2769 | || ((operand->flags & PPC_OPERAND_CR_REG) != 0))) | |
2ad068be | 2770 | || !register_name (&ex)) |
252b5132 | 2771 | { |
13abbae3 AM |
2772 | char save_lex = lex_type['%']; |
2773 | ||
b9c361e0 JL |
2774 | if (((operand->flags & PPC_OPERAND_CR_REG) != 0) |
2775 | || (operand->flags & PPC_OPERAND_CR_BIT) != 0) | |
13abbae3 AM |
2776 | { |
2777 | cr_operand = TRUE; | |
2778 | lex_type['%'] |= LEX_BEGIN_NAME; | |
2779 | } | |
252b5132 | 2780 | expression (&ex); |
b34976b6 | 2781 | cr_operand = FALSE; |
13abbae3 | 2782 | lex_type['%'] = save_lex; |
252b5132 RH |
2783 | } |
2784 | } | |
2785 | ||
2786 | str = input_line_pointer; | |
2787 | input_line_pointer = hold; | |
2788 | ||
2789 | if (ex.X_op == O_illegal) | |
2790 | as_bad (_("illegal operand")); | |
2791 | else if (ex.X_op == O_absent) | |
2792 | as_bad (_("missing operand")); | |
2793 | else if (ex.X_op == O_register) | |
2794 | { | |
2795 | insn = ppc_insert_operand (insn, operand, ex.X_add_number, | |
783de163 | 2796 | ppc_cpu, (char *) NULL, 0); |
252b5132 RH |
2797 | } |
2798 | else if (ex.X_op == O_constant) | |
2799 | { | |
2800 | #ifdef OBJ_ELF | |
81d4177b | 2801 | /* Allow @HA, @L, @H on constants. */ |
3b8b57a9 | 2802 | bfd_reloc_code_real_type reloc; |
252b5132 RH |
2803 | char *orig_str = str; |
2804 | ||
2805 | if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED) | |
2806 | switch (reloc) | |
2807 | { | |
2808 | default: | |
2809 | str = orig_str; | |
2810 | break; | |
2811 | ||
2812 | case BFD_RELOC_LO16: | |
2813 | /* X_unsigned is the default, so if the user has done | |
0baf16f2 AM |
2814 | something which cleared it, we always produce a |
2815 | signed value. */ | |
2816 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) | |
252b5132 RH |
2817 | ex.X_add_number &= 0xffff; |
2818 | else | |
0baf16f2 | 2819 | ex.X_add_number = SEX16 (ex.X_add_number); |
252b5132 RH |
2820 | break; |
2821 | ||
2822 | case BFD_RELOC_HI16: | |
0baf16f2 AM |
2823 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) |
2824 | ex.X_add_number = PPC_HI (ex.X_add_number); | |
2825 | else | |
2826 | ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number)); | |
252b5132 RH |
2827 | break; |
2828 | ||
2829 | case BFD_RELOC_HI16_S: | |
0baf16f2 AM |
2830 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) |
2831 | ex.X_add_number = PPC_HA (ex.X_add_number); | |
2832 | else | |
2833 | ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number)); | |
2834 | break; | |
2835 | ||
0baf16f2 AM |
2836 | case BFD_RELOC_PPC64_HIGHER: |
2837 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) | |
2838 | ex.X_add_number = PPC_HIGHER (ex.X_add_number); | |
2839 | else | |
2840 | ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number)); | |
2841 | break; | |
2842 | ||
2843 | case BFD_RELOC_PPC64_HIGHER_S: | |
2844 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) | |
2845 | ex.X_add_number = PPC_HIGHERA (ex.X_add_number); | |
2846 | else | |
2847 | ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number)); | |
252b5132 | 2848 | break; |
0baf16f2 AM |
2849 | |
2850 | case BFD_RELOC_PPC64_HIGHEST: | |
2851 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) | |
2852 | ex.X_add_number = PPC_HIGHEST (ex.X_add_number); | |
2853 | else | |
2854 | ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number)); | |
2855 | break; | |
2856 | ||
2857 | case BFD_RELOC_PPC64_HIGHEST_S: | |
2858 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) | |
2859 | ex.X_add_number = PPC_HIGHESTA (ex.X_add_number); | |
2860 | else | |
2861 | ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number)); | |
2862 | break; | |
252b5132 | 2863 | } |
0baf16f2 | 2864 | #endif /* OBJ_ELF */ |
252b5132 | 2865 | insn = ppc_insert_operand (insn, operand, ex.X_add_number, |
783de163 | 2866 | ppc_cpu, (char *) NULL, 0); |
252b5132 | 2867 | } |
727fc41e | 2868 | else |
252b5132 | 2869 | { |
3b8b57a9 AM |
2870 | bfd_reloc_code_real_type reloc = BFD_RELOC_UNUSED; |
2871 | #ifdef OBJ_ELF | |
727fc41e | 2872 | if (ex.X_op == O_symbol && str[0] == '(') |
cdba85ec | 2873 | { |
727fc41e AM |
2874 | const char *sym_name = S_GET_NAME (ex.X_add_symbol); |
2875 | if (sym_name[0] == '.') | |
2876 | ++sym_name; | |
cdba85ec | 2877 | |
727fc41e | 2878 | if (strcasecmp (sym_name, "__tls_get_addr") == 0) |
252b5132 | 2879 | { |
727fc41e AM |
2880 | expressionS tls_exp; |
2881 | ||
2882 | hold = input_line_pointer; | |
2883 | input_line_pointer = str + 1; | |
2884 | expression (&tls_exp); | |
2885 | if (tls_exp.X_op == O_symbol) | |
2886 | { | |
2887 | reloc = BFD_RELOC_UNUSED; | |
2888 | if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0) | |
2889 | { | |
2890 | reloc = BFD_RELOC_PPC_TLSGD; | |
2891 | input_line_pointer += 7; | |
2892 | } | |
2893 | else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0) | |
2894 | { | |
2895 | reloc = BFD_RELOC_PPC_TLSLD; | |
2896 | input_line_pointer += 7; | |
2897 | } | |
2898 | if (reloc != BFD_RELOC_UNUSED) | |
2899 | { | |
2900 | SKIP_WHITESPACE (); | |
2901 | str = input_line_pointer; | |
2902 | ||
2903 | if (fc >= MAX_INSN_FIXUPS) | |
2904 | as_fatal (_("too many fixups")); | |
2905 | fixups[fc].exp = tls_exp; | |
2906 | fixups[fc].opindex = *opindex_ptr; | |
2907 | fixups[fc].reloc = reloc; | |
2908 | ++fc; | |
2909 | } | |
2910 | } | |
2911 | input_line_pointer = hold; | |
252b5132 RH |
2912 | } |
2913 | } | |
2914 | ||
727fc41e | 2915 | if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED) |
0baf16f2 | 2916 | { |
727fc41e | 2917 | /* Some TLS tweaks. */ |
0baf16f2 AM |
2918 | switch (reloc) |
2919 | { | |
727fc41e | 2920 | default: |
cdba85ec | 2921 | break; |
727fc41e AM |
2922 | |
2923 | case BFD_RELOC_PPC_TLS: | |
2d0f3896 AM |
2924 | if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0)) |
2925 | as_bad (_("@tls may not be used with \"%s\" operands"), | |
2926 | opcode->name); | |
2927 | else if (operand->shift != 11) | |
2928 | as_bad (_("@tls may only be used in last operand")); | |
2929 | else | |
2930 | insn = ppc_insert_operand (insn, operand, | |
2931 | ppc_obj64 ? 13 : 2, | |
2932 | ppc_cpu, (char *) NULL, 0); | |
cdba85ec | 2933 | break; |
727fc41e AM |
2934 | |
2935 | /* We'll only use the 32 (or 64) bit form of these relocations | |
2936 | in constants. Instructions get the 16 bit form. */ | |
2937 | case BFD_RELOC_PPC_DTPREL: | |
2938 | reloc = BFD_RELOC_PPC_DTPREL16; | |
cdba85ec | 2939 | break; |
727fc41e AM |
2940 | case BFD_RELOC_PPC_TPREL: |
2941 | reloc = BFD_RELOC_PPC_TPREL16; | |
0baf16f2 AM |
2942 | break; |
2943 | } | |
727fc41e | 2944 | |
b9c361e0 JL |
2945 | /* If VLE-mode convert LO/HI/HA relocations. */ |
2946 | if (opcode->flags & PPC_OPCODE_VLE) | |
2947 | { | |
2948 | int tmp_insn = insn & opcode->mask; | |
2949 | ||
2950 | int use_d_reloc = (tmp_insn == E_OR2I_INSN | |
2951 | || tmp_insn == E_AND2I_DOT_INSN | |
2952 | || tmp_insn == E_OR2IS_INSN | |
2953 | || tmp_insn == E_LIS_INSN | |
2954 | || tmp_insn == E_AND2IS_DOT_INSN); | |
2955 | ||
2956 | ||
2957 | int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN | |
2958 | || tmp_insn == E_ADD2IS_INSN | |
2959 | || tmp_insn == E_CMP16I_INSN | |
2960 | || tmp_insn == E_MULL2I_INSN | |
2961 | || tmp_insn == E_CMPL16I_INSN | |
2962 | || tmp_insn == E_CMPH16I_INSN | |
2963 | || tmp_insn == E_CMPHL16I_INSN); | |
2964 | ||
2965 | switch (reloc) | |
2966 | { | |
2967 | default: | |
2968 | break; | |
2969 | ||
2970 | case BFD_RELOC_PPC_EMB_SDA21: | |
2971 | reloc = BFD_RELOC_PPC_VLE_SDA21; | |
2972 | break; | |
2973 | ||
2974 | case BFD_RELOC_LO16: | |
2975 | if (use_d_reloc) | |
2976 | reloc = BFD_RELOC_PPC_VLE_LO16D; | |
2977 | else if (use_a_reloc) | |
2978 | reloc = BFD_RELOC_PPC_VLE_LO16A; | |
2979 | break; | |
2980 | ||
2981 | case BFD_RELOC_HI16: | |
2982 | if (use_d_reloc) | |
2983 | reloc = BFD_RELOC_PPC_VLE_HI16D; | |
2984 | else if (use_a_reloc) | |
2985 | reloc = BFD_RELOC_PPC_VLE_HI16A; | |
2986 | break; | |
2987 | ||
2988 | case BFD_RELOC_HI16_S: | |
2989 | if (use_d_reloc) | |
2990 | reloc = BFD_RELOC_PPC_VLE_HA16D; | |
2991 | else if (use_a_reloc) | |
2992 | reloc = BFD_RELOC_PPC_VLE_HA16A; | |
2993 | break; | |
2994 | ||
2995 | case BFD_RELOC_PPC_VLE_SDAREL_LO16A: | |
2996 | if (use_d_reloc) | |
2997 | reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D; | |
2998 | break; | |
2999 | ||
3000 | case BFD_RELOC_PPC_VLE_SDAREL_HI16A: | |
3001 | if (use_d_reloc) | |
3002 | reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D; | |
3003 | break; | |
3004 | ||
3005 | case BFD_RELOC_PPC_VLE_SDAREL_HA16A: | |
3006 | if (use_d_reloc) | |
3007 | reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D; | |
3008 | break; | |
3009 | } | |
3010 | } | |
3011 | ||
727fc41e AM |
3012 | /* For the absolute forms of branches, convert the PC |
3013 | relative form back into the absolute. */ | |
3014 | if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0) | |
3015 | { | |
3016 | switch (reloc) | |
3017 | { | |
3018 | case BFD_RELOC_PPC_B26: | |
3019 | reloc = BFD_RELOC_PPC_BA26; | |
3020 | break; | |
3021 | case BFD_RELOC_PPC_B16: | |
3022 | reloc = BFD_RELOC_PPC_BA16; | |
3023 | break; | |
3024 | case BFD_RELOC_PPC_B16_BRTAKEN: | |
3025 | reloc = BFD_RELOC_PPC_BA16_BRTAKEN; | |
3026 | break; | |
3027 | case BFD_RELOC_PPC_B16_BRNTAKEN: | |
3028 | reloc = BFD_RELOC_PPC_BA16_BRNTAKEN; | |
3029 | break; | |
3030 | default: | |
3031 | break; | |
3032 | } | |
3033 | } | |
3034 | ||
01efc3af AM |
3035 | switch (reloc) |
3036 | { | |
3037 | case BFD_RELOC_PPC_TOC16: | |
3038 | toc_reloc_types |= has_small_toc_reloc; | |
3039 | break; | |
3040 | case BFD_RELOC_PPC64_TOC16_LO: | |
3041 | case BFD_RELOC_PPC64_TOC16_HI: | |
3042 | case BFD_RELOC_PPC64_TOC16_HA: | |
3043 | toc_reloc_types |= has_large_toc_reloc; | |
3044 | break; | |
3045 | default: | |
3046 | break; | |
3047 | } | |
3048 | ||
1fe532cf | 3049 | if ((operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0) |
727fc41e AM |
3050 | { |
3051 | switch (reloc) | |
3052 | { | |
3053 | case BFD_RELOC_16: | |
3054 | reloc = BFD_RELOC_PPC64_ADDR16_DS; | |
3055 | break; | |
3056 | case BFD_RELOC_LO16: | |
3057 | reloc = BFD_RELOC_PPC64_ADDR16_LO_DS; | |
3058 | break; | |
3059 | case BFD_RELOC_16_GOTOFF: | |
3060 | reloc = BFD_RELOC_PPC64_GOT16_DS; | |
3061 | break; | |
3062 | case BFD_RELOC_LO16_GOTOFF: | |
3063 | reloc = BFD_RELOC_PPC64_GOT16_LO_DS; | |
3064 | break; | |
3065 | case BFD_RELOC_LO16_PLTOFF: | |
3066 | reloc = BFD_RELOC_PPC64_PLT16_LO_DS; | |
3067 | break; | |
3068 | case BFD_RELOC_16_BASEREL: | |
3069 | reloc = BFD_RELOC_PPC64_SECTOFF_DS; | |
3070 | break; | |
3071 | case BFD_RELOC_LO16_BASEREL: | |
3072 | reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS; | |
3073 | break; | |
3074 | case BFD_RELOC_PPC_TOC16: | |
3075 | reloc = BFD_RELOC_PPC64_TOC16_DS; | |
3076 | break; | |
3077 | case BFD_RELOC_PPC64_TOC16_LO: | |
3078 | reloc = BFD_RELOC_PPC64_TOC16_LO_DS; | |
3079 | break; | |
3080 | case BFD_RELOC_PPC64_PLTGOT16: | |
3081 | reloc = BFD_RELOC_PPC64_PLTGOT16_DS; | |
3082 | break; | |
3083 | case BFD_RELOC_PPC64_PLTGOT16_LO: | |
3084 | reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS; | |
3085 | break; | |
3086 | case BFD_RELOC_PPC_DTPREL16: | |
3087 | reloc = BFD_RELOC_PPC64_DTPREL16_DS; | |
3088 | break; | |
3089 | case BFD_RELOC_PPC_DTPREL16_LO: | |
3090 | reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS; | |
3091 | break; | |
3092 | case BFD_RELOC_PPC_TPREL16: | |
3093 | reloc = BFD_RELOC_PPC64_TPREL16_DS; | |
3094 | break; | |
3095 | case BFD_RELOC_PPC_TPREL16_LO: | |
3096 | reloc = BFD_RELOC_PPC64_TPREL16_LO_DS; | |
3097 | break; | |
3098 | case BFD_RELOC_PPC_GOT_DTPREL16: | |
3099 | case BFD_RELOC_PPC_GOT_DTPREL16_LO: | |
3100 | case BFD_RELOC_PPC_GOT_TPREL16: | |
3101 | case BFD_RELOC_PPC_GOT_TPREL16_LO: | |
3102 | break; | |
3103 | default: | |
3104 | as_bad (_("unsupported relocation for DS offset field")); | |
3105 | break; | |
3106 | } | |
3107 | } | |
0baf16f2 | 3108 | } |
3b8b57a9 AM |
3109 | #endif /* OBJ_ELF */ |
3110 | ||
3111 | if (reloc != BFD_RELOC_UNUSED) | |
3112 | ; | |
3113 | /* Determine a BFD reloc value based on the operand information. | |
3114 | We are only prepared to turn a few of the operands into | |
3115 | relocs. */ | |
3116 | else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 | |
3117 | && operand->bitm == 0x3fffffc | |
3118 | && operand->shift == 0) | |
3119 | reloc = BFD_RELOC_PPC_B26; | |
3120 | else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 | |
3121 | && operand->bitm == 0xfffc | |
3122 | && operand->shift == 0) | |
3123 | reloc = BFD_RELOC_PPC_B16; | |
3124 | else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 | |
3125 | && operand->bitm == 0x1fe | |
3126 | && operand->shift == -1) | |
3127 | reloc = BFD_RELOC_PPC_VLE_REL8; | |
3128 | else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 | |
3129 | && operand->bitm == 0xfffe | |
3130 | && operand->shift == 0) | |
3131 | reloc = BFD_RELOC_PPC_VLE_REL15; | |
3132 | else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 | |
3133 | && operand->bitm == 0x1fffffe | |
3134 | && operand->shift == 0) | |
3135 | reloc = BFD_RELOC_PPC_VLE_REL24; | |
3136 | else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0 | |
3137 | && operand->bitm == 0x3fffffc | |
3138 | && operand->shift == 0) | |
3139 | reloc = BFD_RELOC_PPC_BA26; | |
3140 | else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0 | |
3141 | && operand->bitm == 0xfffc | |
3142 | && operand->shift == 0) | |
3143 | reloc = BFD_RELOC_PPC_BA16; | |
3144 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) | |
3145 | else if ((operand->flags & PPC_OPERAND_PARENS) != 0 | |
3146 | && (operand->bitm & 0xfff0) == 0xfff0 | |
3147 | && operand->shift == 0) | |
3148 | { | |
3149 | if (ppc_is_toc_sym (ex.X_add_symbol)) | |
3150 | { | |
3151 | reloc = BFD_RELOC_PPC_TOC16; | |
3152 | #ifdef OBJ_ELF | |
3153 | if (ppc_obj64 | |
3154 | && (operand->flags & PPC_OPERAND_DS) != 0) | |
3155 | reloc = BFD_RELOC_PPC64_TOC16_DS; | |
3156 | #endif | |
3157 | } | |
3158 | else | |
3159 | { | |
3160 | reloc = BFD_RELOC_16; | |
3161 | #ifdef OBJ_ELF | |
3162 | if (ppc_obj64 | |
3163 | && (operand->flags & PPC_OPERAND_DS) != 0) | |
3164 | reloc = BFD_RELOC_PPC64_ADDR16_DS; | |
3165 | #endif | |
3166 | } | |
3167 | } | |
3168 | #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ | |
0baf16f2 | 3169 | |
252b5132 RH |
3170 | /* We need to generate a fixup for this expression. */ |
3171 | if (fc >= MAX_INSN_FIXUPS) | |
3172 | as_fatal (_("too many fixups")); | |
3173 | fixups[fc].exp = ex; | |
727fc41e | 3174 | fixups[fc].opindex = *opindex_ptr; |
252b5132 RH |
3175 | fixups[fc].reloc = reloc; |
3176 | ++fc; | |
3177 | } | |
252b5132 RH |
3178 | |
3179 | if (need_paren) | |
3180 | { | |
3181 | endc = ')'; | |
3182 | need_paren = 0; | |
c3d65c1c BE |
3183 | /* If expecting more operands, then we want to see "),". */ |
3184 | if (*str == endc && opindex_ptr[1] != 0) | |
3185 | { | |
3186 | do | |
3187 | ++str; | |
3188 | while (ISSPACE (*str)); | |
3189 | endc = ','; | |
3190 | } | |
252b5132 RH |
3191 | } |
3192 | else if ((operand->flags & PPC_OPERAND_PARENS) != 0) | |
3193 | { | |
3194 | endc = '('; | |
3195 | need_paren = 1; | |
3196 | } | |
3197 | else | |
3198 | endc = ','; | |
3199 | ||
3200 | /* The call to expression should have advanced str past any | |
3201 | whitespace. */ | |
3202 | if (*str != endc | |
3203 | && (endc != ',' || *str != '\0')) | |
3204 | { | |
5a938047 AM |
3205 | if (*str == '\0') |
3206 | as_bad (_("syntax error; end of line, expected `%c'"), endc); | |
3207 | else | |
3208 | as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc); | |
252b5132 RH |
3209 | break; |
3210 | } | |
3211 | ||
3212 | if (*str != '\0') | |
3213 | ++str; | |
3214 | } | |
3215 | ||
3882b010 | 3216 | while (ISSPACE (*str)) |
252b5132 RH |
3217 | ++str; |
3218 | ||
3219 | if (*str != '\0') | |
3220 | as_bad (_("junk at end of line: `%s'"), str); | |
3221 | ||
dc1d03fc | 3222 | #ifdef OBJ_ELF |
b9c361e0 | 3223 | /* Do we need/want an APUinfo section? */ |
4faf939a JM |
3224 | if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0 |
3225 | && !ppc_obj64) | |
6a0c61b7 EZ |
3226 | { |
3227 | /* These are all version "1". */ | |
3228 | if (opcode->flags & PPC_OPCODE_SPE) | |
b34976b6 | 3229 | ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1); |
6a0c61b7 | 3230 | if (opcode->flags & PPC_OPCODE_ISEL) |
b34976b6 | 3231 | ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1); |
6a0c61b7 | 3232 | if (opcode->flags & PPC_OPCODE_EFS) |
b34976b6 | 3233 | ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1); |
6a0c61b7 | 3234 | if (opcode->flags & PPC_OPCODE_BRLOCK) |
b34976b6 | 3235 | ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1); |
6a0c61b7 | 3236 | if (opcode->flags & PPC_OPCODE_PMR) |
b34976b6 | 3237 | ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1); |
6a0c61b7 | 3238 | if (opcode->flags & PPC_OPCODE_CACHELCK) |
b34976b6 | 3239 | ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1); |
6a0c61b7 | 3240 | if (opcode->flags & PPC_OPCODE_RFMCI) |
b34976b6 | 3241 | ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1); |
b9c361e0 JL |
3242 | if (opcode->flags & PPC_OPCODE_VLE) |
3243 | ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1); | |
6a0c61b7 | 3244 | } |
dc1d03fc | 3245 | #endif |
6a0c61b7 | 3246 | |
252b5132 | 3247 | /* Write out the instruction. */ |
b9c361e0 JL |
3248 | /* Differentiate between two and four byte insns. */ |
3249 | if (ppc_mach () == bfd_mach_ppc_vle) | |
3250 | { | |
3251 | if (PPC_OP_SE_VLE (insn)) | |
3252 | insn_length = 2; | |
3253 | else | |
3254 | insn_length = 4; | |
3255 | addr_mod = frag_now_fix () & 1; | |
3256 | } | |
3257 | else | |
3258 | { | |
3259 | insn_length = 4; | |
3260 | addr_mod = frag_now_fix () & 3; | |
3261 | } | |
3262 | /* All instructions can start on a 2 byte boundary for VLE. */ | |
3263 | f = frag_more (insn_length); | |
09b935ac | 3264 | if (frag_now->has_code && frag_now->insn_addr != addr_mod) |
b9c361e0 JL |
3265 | { |
3266 | if (ppc_mach() == bfd_mach_ppc_vle) | |
3267 | as_bad (_("instruction address is not a multiple of 2")); | |
3268 | else | |
3269 | as_bad (_("instruction address is not a multiple of 4")); | |
3270 | } | |
09b935ac AM |
3271 | frag_now->insn_addr = addr_mod; |
3272 | frag_now->has_code = 1; | |
b9c361e0 | 3273 | md_number_to_chars (f, insn, insn_length); |
252b5132 | 3274 | |
5d6f4f16 | 3275 | #ifdef OBJ_ELF |
b9c361e0 | 3276 | dwarf2_emit_insn (insn_length); |
5d6f4f16 GK |
3277 | #endif |
3278 | ||
3b8b57a9 | 3279 | /* Create any fixups. */ |
252b5132 RH |
3280 | for (i = 0; i < fc; i++) |
3281 | { | |
3b8b57a9 | 3282 | fixS *fixP; |
252b5132 RH |
3283 | if (fixups[i].reloc != BFD_RELOC_UNUSED) |
3284 | { | |
99a814a1 | 3285 | reloc_howto_type *reloc_howto; |
252b5132 RH |
3286 | int size; |
3287 | int offset; | |
252b5132 | 3288 | |
99a814a1 | 3289 | reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc); |
252b5132 RH |
3290 | if (!reloc_howto) |
3291 | abort (); | |
3292 | ||
3293 | size = bfd_get_reloc_size (reloc_howto); | |
3b8b57a9 | 3294 | offset = target_big_endian ? (insn_length - size) : 0; |
252b5132 RH |
3295 | |
3296 | if (size < 1 || size > 4) | |
bc805888 | 3297 | abort (); |
252b5132 | 3298 | |
99a814a1 AM |
3299 | fixP = fix_new_exp (frag_now, |
3300 | f - frag_now->fr_literal + offset, | |
3301 | size, | |
3302 | &fixups[i].exp, | |
3303 | reloc_howto->pc_relative, | |
252b5132 | 3304 | fixups[i].reloc); |
252b5132 RH |
3305 | } |
3306 | else | |
727fc41e AM |
3307 | { |
3308 | const struct powerpc_operand *operand; | |
3309 | ||
3310 | operand = &powerpc_operands[fixups[i].opindex]; | |
3b8b57a9 AM |
3311 | fixP = fix_new_exp (frag_now, |
3312 | f - frag_now->fr_literal, | |
3313 | insn_length, | |
3314 | &fixups[i].exp, | |
3315 | (operand->flags & PPC_OPERAND_RELATIVE) != 0, | |
3316 | BFD_RELOC_UNUSED); | |
727fc41e | 3317 | } |
3b8b57a9 | 3318 | fixP->fx_pcrel_adjust = fixups[i].opindex; |
252b5132 RH |
3319 | } |
3320 | } | |
3321 | ||
3322 | /* Handle a macro. Gather all the operands, transform them as | |
3323 | described by the macro, and call md_assemble recursively. All the | |
3324 | operands are separated by commas; we don't accept parentheses | |
3325 | around operands here. */ | |
3326 | ||
3327 | static void | |
98027b10 | 3328 | ppc_macro (char *str, const struct powerpc_macro *macro) |
252b5132 RH |
3329 | { |
3330 | char *operands[10]; | |
3331 | unsigned int count; | |
3332 | char *s; | |
3333 | unsigned int len; | |
3334 | const char *format; | |
db557034 | 3335 | unsigned int arg; |
252b5132 RH |
3336 | char *send; |
3337 | char *complete; | |
3338 | ||
3339 | /* Gather the users operands into the operands array. */ | |
3340 | count = 0; | |
3341 | s = str; | |
3342 | while (1) | |
3343 | { | |
3344 | if (count >= sizeof operands / sizeof operands[0]) | |
3345 | break; | |
3346 | operands[count++] = s; | |
3347 | s = strchr (s, ','); | |
3348 | if (s == (char *) NULL) | |
3349 | break; | |
3350 | *s++ = '\0'; | |
81d4177b | 3351 | } |
252b5132 RH |
3352 | |
3353 | if (count != macro->operands) | |
3354 | { | |
3355 | as_bad (_("wrong number of operands")); | |
3356 | return; | |
3357 | } | |
3358 | ||
3359 | /* Work out how large the string must be (the size is unbounded | |
3360 | because it includes user input). */ | |
3361 | len = 0; | |
3362 | format = macro->format; | |
3363 | while (*format != '\0') | |
3364 | { | |
3365 | if (*format != '%') | |
3366 | { | |
3367 | ++len; | |
3368 | ++format; | |
3369 | } | |
3370 | else | |
3371 | { | |
3372 | arg = strtol (format + 1, &send, 10); | |
db557034 | 3373 | know (send != format && arg < count); |
252b5132 RH |
3374 | len += strlen (operands[arg]); |
3375 | format = send; | |
3376 | } | |
3377 | } | |
3378 | ||
3379 | /* Put the string together. */ | |
3380 | complete = s = (char *) alloca (len + 1); | |
3381 | format = macro->format; | |
3382 | while (*format != '\0') | |
3383 | { | |
3384 | if (*format != '%') | |
3385 | *s++ = *format++; | |
3386 | else | |
3387 | { | |
3388 | arg = strtol (format + 1, &send, 10); | |
3389 | strcpy (s, operands[arg]); | |
3390 | s += strlen (s); | |
3391 | format = send; | |
3392 | } | |
3393 | } | |
3394 | *s = '\0'; | |
3395 | ||
3396 | /* Assemble the constructed instruction. */ | |
3397 | md_assemble (complete); | |
81d4177b | 3398 | } |
252b5132 RH |
3399 | \f |
3400 | #ifdef OBJ_ELF | |
18ae9cc1 | 3401 | /* For ELF, add support for SHT_ORDERED. */ |
252b5132 RH |
3402 | |
3403 | int | |
98027b10 | 3404 | ppc_section_type (char *str, size_t len) |
252b5132 | 3405 | { |
9de8d8f1 RH |
3406 | if (len == 7 && strncmp (str, "ordered", 7) == 0) |
3407 | return SHT_ORDERED; | |
252b5132 | 3408 | |
9de8d8f1 | 3409 | return -1; |
252b5132 RH |
3410 | } |
3411 | ||
3412 | int | |
1239de13 | 3413 | ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type) |
252b5132 RH |
3414 | { |
3415 | if (type == SHT_ORDERED) | |
3416 | flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES; | |
3417 | ||
252b5132 RH |
3418 | return flags; |
3419 | } | |
3420 | #endif /* OBJ_ELF */ | |
3421 | ||
3422 | \f | |
3423 | /* Pseudo-op handling. */ | |
3424 | ||
3425 | /* The .byte pseudo-op. This is similar to the normal .byte | |
3426 | pseudo-op, but it can also take a single ASCII string. */ | |
3427 | ||
3428 | static void | |
98027b10 | 3429 | ppc_byte (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3430 | { |
3431 | if (*input_line_pointer != '\"') | |
3432 | { | |
3433 | cons (1); | |
3434 | return; | |
3435 | } | |
3436 | ||
3437 | /* Gather characters. A real double quote is doubled. Unusual | |
3438 | characters are not permitted. */ | |
3439 | ++input_line_pointer; | |
3440 | while (1) | |
3441 | { | |
3442 | char c; | |
3443 | ||
3444 | c = *input_line_pointer++; | |
3445 | ||
3446 | if (c == '\"') | |
3447 | { | |
3448 | if (*input_line_pointer != '\"') | |
3449 | break; | |
3450 | ++input_line_pointer; | |
3451 | } | |
3452 | ||
3453 | FRAG_APPEND_1_CHAR (c); | |
3454 | } | |
3455 | ||
3456 | demand_empty_rest_of_line (); | |
3457 | } | |
3458 | \f | |
3459 | #ifdef OBJ_XCOFF | |
3460 | ||
3461 | /* XCOFF specific pseudo-op handling. */ | |
3462 | ||
3463 | /* This is set if we are creating a .stabx symbol, since we don't want | |
3464 | to handle symbol suffixes for such symbols. */ | |
b34976b6 | 3465 | static bfd_boolean ppc_stab_symbol; |
252b5132 RH |
3466 | |
3467 | /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common | |
3468 | symbols in the .bss segment as though they were local common | |
67c1ffbe | 3469 | symbols, and uses a different smclas. The native Aix 4.3.3 assembler |
1ad63b2f | 3470 | aligns .comm and .lcomm to 4 bytes. */ |
252b5132 RH |
3471 | |
3472 | static void | |
98027b10 | 3473 | ppc_comm (int lcomm) |
252b5132 RH |
3474 | { |
3475 | asection *current_seg = now_seg; | |
3476 | subsegT current_subseg = now_subseg; | |
3477 | char *name; | |
3478 | char endc; | |
3479 | char *end_name; | |
3480 | offsetT size; | |
3481 | offsetT align; | |
3482 | symbolS *lcomm_sym = NULL; | |
3483 | symbolS *sym; | |
3484 | char *pfrag; | |
3485 | ||
3486 | name = input_line_pointer; | |
3487 | endc = get_symbol_end (); | |
3488 | end_name = input_line_pointer; | |
3489 | *end_name = endc; | |
3490 | ||
3491 | if (*input_line_pointer != ',') | |
3492 | { | |
3493 | as_bad (_("missing size")); | |
3494 | ignore_rest_of_line (); | |
3495 | return; | |
3496 | } | |
3497 | ++input_line_pointer; | |
3498 | ||
3499 | size = get_absolute_expression (); | |
3500 | if (size < 0) | |
3501 | { | |
3502 | as_bad (_("negative size")); | |
3503 | ignore_rest_of_line (); | |
3504 | return; | |
3505 | } | |
3506 | ||
3507 | if (! lcomm) | |
3508 | { | |
3509 | /* The third argument to .comm is the alignment. */ | |
3510 | if (*input_line_pointer != ',') | |
1ad63b2f | 3511 | align = 2; |
252b5132 RH |
3512 | else |
3513 | { | |
3514 | ++input_line_pointer; | |
3515 | align = get_absolute_expression (); | |
3516 | if (align <= 0) | |
3517 | { | |
3518 | as_warn (_("ignoring bad alignment")); | |
1ad63b2f | 3519 | align = 2; |
252b5132 RH |
3520 | } |
3521 | } | |
3522 | } | |
3523 | else | |
3524 | { | |
3525 | char *lcomm_name; | |
3526 | char lcomm_endc; | |
3527 | ||
252b5132 RH |
3528 | /* The third argument to .lcomm appears to be the real local |
3529 | common symbol to create. References to the symbol named in | |
3530 | the first argument are turned into references to the third | |
3531 | argument. */ | |
3532 | if (*input_line_pointer != ',') | |
3533 | { | |
3534 | as_bad (_("missing real symbol name")); | |
3535 | ignore_rest_of_line (); | |
3536 | return; | |
3537 | } | |
3538 | ++input_line_pointer; | |
3539 | ||
3540 | lcomm_name = input_line_pointer; | |
3541 | lcomm_endc = get_symbol_end (); | |
81d4177b | 3542 | |
252b5132 RH |
3543 | lcomm_sym = symbol_find_or_make (lcomm_name); |
3544 | ||
3545 | *input_line_pointer = lcomm_endc; | |
3c02c47f DE |
3546 | |
3547 | /* The fourth argument to .lcomm is the alignment. */ | |
3548 | if (*input_line_pointer != ',') | |
3549 | { | |
3550 | if (size <= 4) | |
3551 | align = 2; | |
3552 | else | |
3553 | align = 3; | |
3554 | } | |
3555 | else | |
3556 | { | |
3557 | ++input_line_pointer; | |
3558 | align = get_absolute_expression (); | |
3559 | if (align <= 0) | |
3560 | { | |
3561 | as_warn (_("ignoring bad alignment")); | |
3562 | align = 2; | |
3563 | } | |
3564 | } | |
252b5132 RH |
3565 | } |
3566 | ||
3567 | *end_name = '\0'; | |
3568 | sym = symbol_find_or_make (name); | |
3569 | *end_name = endc; | |
3570 | ||
3571 | if (S_IS_DEFINED (sym) | |
3572 | || S_GET_VALUE (sym) != 0) | |
3573 | { | |
3574 | as_bad (_("attempt to redefine symbol")); | |
3575 | ignore_rest_of_line (); | |
3576 | return; | |
3577 | } | |
81d4177b | 3578 | |
252b5132 | 3579 | record_alignment (bss_section, align); |
81d4177b | 3580 | |
252b5132 RH |
3581 | if (! lcomm |
3582 | || ! S_IS_DEFINED (lcomm_sym)) | |
3583 | { | |
3584 | symbolS *def_sym; | |
3585 | offsetT def_size; | |
3586 | ||
3587 | if (! lcomm) | |
3588 | { | |
3589 | def_sym = sym; | |
3590 | def_size = size; | |
3591 | S_SET_EXTERNAL (sym); | |
3592 | } | |
3593 | else | |
3594 | { | |
809ffe0d | 3595 | symbol_get_tc (lcomm_sym)->output = 1; |
252b5132 RH |
3596 | def_sym = lcomm_sym; |
3597 | def_size = 0; | |
3598 | } | |
3599 | ||
3600 | subseg_set (bss_section, 1); | |
3601 | frag_align (align, 0, 0); | |
81d4177b | 3602 | |
809ffe0d | 3603 | symbol_set_frag (def_sym, frag_now); |
252b5132 RH |
3604 | pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym, |
3605 | def_size, (char *) NULL); | |
3606 | *pfrag = 0; | |
3607 | S_SET_SEGMENT (def_sym, bss_section); | |
809ffe0d | 3608 | symbol_get_tc (def_sym)->align = align; |
252b5132 RH |
3609 | } |
3610 | else if (lcomm) | |
3611 | { | |
3612 | /* Align the size of lcomm_sym. */ | |
809ffe0d ILT |
3613 | symbol_get_frag (lcomm_sym)->fr_offset = |
3614 | ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1) | |
252b5132 | 3615 | &~ ((1 << align) - 1)); |
809ffe0d ILT |
3616 | if (align > symbol_get_tc (lcomm_sym)->align) |
3617 | symbol_get_tc (lcomm_sym)->align = align; | |
252b5132 RH |
3618 | } |
3619 | ||
3620 | if (lcomm) | |
3621 | { | |
3622 | /* Make sym an offset from lcomm_sym. */ | |
3623 | S_SET_SEGMENT (sym, bss_section); | |
809ffe0d ILT |
3624 | symbol_set_frag (sym, symbol_get_frag (lcomm_sym)); |
3625 | S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset); | |
3626 | symbol_get_frag (lcomm_sym)->fr_offset += size; | |
252b5132 RH |
3627 | } |
3628 | ||
3629 | subseg_set (current_seg, current_subseg); | |
3630 | ||
3631 | demand_empty_rest_of_line (); | |
3632 | } | |
3633 | ||
3634 | /* The .csect pseudo-op. This switches us into a different | |
3635 | subsegment. The first argument is a symbol whose value is the | |
3636 | start of the .csect. In COFF, csect symbols get special aux | |
3637 | entries defined by the x_csect field of union internal_auxent. The | |
3638 | optional second argument is the alignment (the default is 2). */ | |
3639 | ||
3640 | static void | |
98027b10 | 3641 | ppc_csect (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3642 | { |
3643 | char *name; | |
3644 | char endc; | |
3645 | symbolS *sym; | |
931e13a6 | 3646 | offsetT align; |
252b5132 RH |
3647 | |
3648 | name = input_line_pointer; | |
3649 | endc = get_symbol_end (); | |
81d4177b | 3650 | |
252b5132 RH |
3651 | sym = symbol_find_or_make (name); |
3652 | ||
3653 | *input_line_pointer = endc; | |
3654 | ||
3655 | if (S_GET_NAME (sym)[0] == '\0') | |
3656 | { | |
3657 | /* An unnamed csect is assumed to be [PR]. */ | |
96d56e9f | 3658 | symbol_get_tc (sym)->symbol_class = XMC_PR; |
252b5132 RH |
3659 | } |
3660 | ||
931e13a6 | 3661 | align = 2; |
252b5132 RH |
3662 | if (*input_line_pointer == ',') |
3663 | { | |
3664 | ++input_line_pointer; | |
931e13a6 | 3665 | align = get_absolute_expression (); |
252b5132 RH |
3666 | } |
3667 | ||
931e13a6 AM |
3668 | ppc_change_csect (sym, align); |
3669 | ||
252b5132 RH |
3670 | demand_empty_rest_of_line (); |
3671 | } | |
3672 | ||
3673 | /* Change to a different csect. */ | |
3674 | ||
3675 | static void | |
98027b10 | 3676 | ppc_change_csect (symbolS *sym, offsetT align) |
252b5132 RH |
3677 | { |
3678 | if (S_IS_DEFINED (sym)) | |
809ffe0d | 3679 | subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg); |
252b5132 RH |
3680 | else |
3681 | { | |
3682 | symbolS **list_ptr; | |
3683 | int after_toc; | |
3684 | int hold_chunksize; | |
3685 | symbolS *list; | |
931e13a6 AM |
3686 | int is_code; |
3687 | segT sec; | |
252b5132 RH |
3688 | |
3689 | /* This is a new csect. We need to look at the symbol class to | |
3690 | figure out whether it should go in the text section or the | |
3691 | data section. */ | |
3692 | after_toc = 0; | |
931e13a6 | 3693 | is_code = 0; |
96d56e9f | 3694 | switch (symbol_get_tc (sym)->symbol_class) |
252b5132 RH |
3695 | { |
3696 | case XMC_PR: | |
3697 | case XMC_RO: | |
3698 | case XMC_DB: | |
3699 | case XMC_GL: | |
3700 | case XMC_XO: | |
3701 | case XMC_SV: | |
3702 | case XMC_TI: | |
3703 | case XMC_TB: | |
3704 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 3705 | symbol_get_tc (sym)->subseg = ppc_text_subsegment; |
252b5132 RH |
3706 | ++ppc_text_subsegment; |
3707 | list_ptr = &ppc_text_csects; | |
931e13a6 | 3708 | is_code = 1; |
252b5132 RH |
3709 | break; |
3710 | case XMC_RW: | |
3711 | case XMC_TC0: | |
3712 | case XMC_TC: | |
3713 | case XMC_DS: | |
3714 | case XMC_UA: | |
3715 | case XMC_BS: | |
3716 | case XMC_UC: | |
3717 | if (ppc_toc_csect != NULL | |
809ffe0d ILT |
3718 | && (symbol_get_tc (ppc_toc_csect)->subseg + 1 |
3719 | == ppc_data_subsegment)) | |
252b5132 RH |
3720 | after_toc = 1; |
3721 | S_SET_SEGMENT (sym, data_section); | |
809ffe0d | 3722 | symbol_get_tc (sym)->subseg = ppc_data_subsegment; |
252b5132 RH |
3723 | ++ppc_data_subsegment; |
3724 | list_ptr = &ppc_data_csects; | |
3725 | break; | |
3726 | default: | |
3727 | abort (); | |
3728 | } | |
3729 | ||
3730 | /* We set the obstack chunk size to a small value before | |
99a814a1 AM |
3731 | changing subsegments, so that we don't use a lot of memory |
3732 | space for what may be a small section. */ | |
252b5132 RH |
3733 | hold_chunksize = chunksize; |
3734 | chunksize = 64; | |
3735 | ||
931e13a6 AM |
3736 | sec = subseg_new (segment_name (S_GET_SEGMENT (sym)), |
3737 | symbol_get_tc (sym)->subseg); | |
252b5132 RH |
3738 | |
3739 | chunksize = hold_chunksize; | |
3740 | ||
3741 | if (after_toc) | |
3742 | ppc_after_toc_frag = frag_now; | |
3743 | ||
931e13a6 AM |
3744 | record_alignment (sec, align); |
3745 | if (is_code) | |
3746 | frag_align_code (align, 0); | |
3747 | else | |
3748 | frag_align (align, 0, 0); | |
3749 | ||
809ffe0d | 3750 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
3751 | S_SET_VALUE (sym, (valueT) frag_now_fix ()); |
3752 | ||
931e13a6 | 3753 | symbol_get_tc (sym)->align = align; |
809ffe0d ILT |
3754 | symbol_get_tc (sym)->output = 1; |
3755 | symbol_get_tc (sym)->within = sym; | |
81d4177b | 3756 | |
252b5132 | 3757 | for (list = *list_ptr; |
809ffe0d ILT |
3758 | symbol_get_tc (list)->next != (symbolS *) NULL; |
3759 | list = symbol_get_tc (list)->next) | |
252b5132 | 3760 | ; |
809ffe0d | 3761 | symbol_get_tc (list)->next = sym; |
81d4177b | 3762 | |
252b5132 | 3763 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); |
809ffe0d ILT |
3764 | symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP, |
3765 | &symbol_lastP); | |
252b5132 RH |
3766 | } |
3767 | ||
3768 | ppc_current_csect = sym; | |
3769 | } | |
3770 | ||
85645aed TG |
3771 | static void |
3772 | ppc_change_debug_section (unsigned int idx, subsegT subseg) | |
3773 | { | |
3774 | segT sec; | |
3775 | flagword oldflags; | |
3776 | const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx]; | |
3777 | ||
3778 | sec = subseg_new (dw->name, subseg); | |
3779 | oldflags = bfd_get_section_flags (stdoutput, sec); | |
3780 | if (oldflags == SEC_NO_FLAGS) | |
3781 | { | |
3782 | /* Just created section. */ | |
3783 | gas_assert (dw_sections[idx].sect == NULL); | |
3784 | ||
3785 | bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING); | |
3786 | bfd_set_section_alignment (stdoutput, sec, 0); | |
3787 | dw_sections[idx].sect = sec; | |
3788 | } | |
3789 | ||
3790 | /* Not anymore in a csect. */ | |
3791 | ppc_current_csect = NULL; | |
3792 | } | |
3793 | ||
3794 | /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is: | |
3795 | .dwsect flag [, opt-label ] | |
3796 | */ | |
3797 | ||
3798 | static void | |
3799 | ppc_dwsect (int ignore ATTRIBUTE_UNUSED) | |
3800 | { | |
3801 | offsetT flag; | |
3802 | symbolS *opt_label; | |
3803 | const struct xcoff_dwsect_name *dw; | |
3804 | struct dw_subsection *subseg; | |
3805 | struct dw_section *dws; | |
3806 | int i; | |
3807 | ||
3808 | /* Find section. */ | |
3809 | flag = get_absolute_expression (); | |
3810 | dw = NULL; | |
3811 | for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++) | |
3812 | if (xcoff_dwsect_names[i].flag == flag) | |
3813 | { | |
3814 | dw = &xcoff_dwsect_names[i]; | |
3815 | break; | |
3816 | } | |
3817 | ||
3818 | /* Parse opt-label. */ | |
3819 | if (*input_line_pointer == ',') | |
3820 | { | |
3821 | const char *label; | |
3822 | char c; | |
3823 | ||
3824 | ++input_line_pointer; | |
3825 | ||
3826 | label = input_line_pointer; | |
3827 | c = get_symbol_end (); | |
3828 | opt_label = symbol_find_or_make (label); | |
3829 | *input_line_pointer = c; | |
3830 | } | |
3831 | else | |
3832 | opt_label = NULL; | |
3833 | ||
3834 | demand_empty_rest_of_line (); | |
3835 | ||
3836 | /* Return now in case of unknown subsection. */ | |
3837 | if (dw == NULL) | |
3838 | { | |
d6ed37ed | 3839 | as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"), |
85645aed TG |
3840 | (unsigned)flag); |
3841 | return; | |
3842 | } | |
3843 | ||
3844 | /* Find the subsection. */ | |
3845 | dws = &dw_sections[i]; | |
3846 | subseg = NULL; | |
3847 | if (opt_label != NULL && S_IS_DEFINED (opt_label)) | |
3848 | { | |
3849 | /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */ | |
3850 | if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect) | |
3851 | { | |
3852 | as_bad (_("label %s was not defined in this dwarf section"), | |
3853 | S_GET_NAME (opt_label)); | |
3854 | subseg = dws->anon_subseg; | |
3855 | opt_label = NULL; | |
3856 | } | |
3857 | else | |
3858 | subseg = symbol_get_tc (opt_label)->u.dw; | |
3859 | } | |
3860 | ||
3861 | if (subseg != NULL) | |
3862 | { | |
3863 | /* Switch to the subsection. */ | |
3864 | ppc_change_debug_section (i, subseg->subseg); | |
3865 | } | |
3866 | else | |
3867 | { | |
3868 | /* Create a new dw subsection. */ | |
3869 | subseg = (struct dw_subsection *) | |
3870 | xmalloc (sizeof (struct dw_subsection)); | |
3871 | ||
3872 | if (opt_label == NULL) | |
3873 | { | |
3874 | /* The anonymous one. */ | |
3875 | subseg->subseg = 0; | |
3876 | subseg->link = NULL; | |
3877 | dws->anon_subseg = subseg; | |
3878 | } | |
3879 | else | |
3880 | { | |
3881 | /* A named one. */ | |
3882 | if (dws->list_subseg != NULL) | |
3883 | subseg->subseg = dws->list_subseg->subseg + 1; | |
3884 | else | |
3885 | subseg->subseg = 1; | |
3886 | ||
3887 | subseg->link = dws->list_subseg; | |
3888 | dws->list_subseg = subseg; | |
3889 | symbol_get_tc (opt_label)->u.dw = subseg; | |
3890 | } | |
3891 | ||
3892 | ppc_change_debug_section (i, subseg->subseg); | |
3893 | ||
3894 | if (dw->def_size) | |
3895 | { | |
3896 | /* Add the length field. */ | |
3897 | expressionS *exp = &subseg->end_exp; | |
3898 | int sz; | |
3899 | ||
3900 | if (opt_label != NULL) | |
3901 | symbol_set_value_now (opt_label); | |
3902 | ||
3903 | /* Add the length field. Note that according to the AIX assembler | |
3904 | manual, the size of the length field is 4 for powerpc32 but | |
3905 | 12 for powerpc64. */ | |
3906 | if (ppc_obj64) | |
3907 | { | |
3908 | /* Write the 64bit marker. */ | |
3909 | md_number_to_chars (frag_more (4), -1, 4); | |
3910 | } | |
3911 | ||
3912 | exp->X_op = O_subtract; | |
3913 | exp->X_op_symbol = symbol_temp_new_now (); | |
3914 | exp->X_add_symbol = symbol_temp_make (); | |
3915 | ||
3916 | sz = ppc_obj64 ? 8 : 4; | |
3917 | exp->X_add_number = -sz; | |
3918 | emit_expr (exp, sz); | |
3919 | } | |
3920 | } | |
3921 | } | |
3922 | ||
252b5132 RH |
3923 | /* This function handles the .text and .data pseudo-ops. These |
3924 | pseudo-ops aren't really used by XCOFF; we implement them for the | |
3925 | convenience of people who aren't used to XCOFF. */ | |
3926 | ||
3927 | static void | |
98027b10 | 3928 | ppc_section (int type) |
252b5132 RH |
3929 | { |
3930 | const char *name; | |
3931 | symbolS *sym; | |
3932 | ||
3933 | if (type == 't') | |
3934 | name = ".text[PR]"; | |
3935 | else if (type == 'd') | |
3936 | name = ".data[RW]"; | |
3937 | else | |
3938 | abort (); | |
3939 | ||
3940 | sym = symbol_find_or_make (name); | |
3941 | ||
931e13a6 | 3942 | ppc_change_csect (sym, 2); |
252b5132 RH |
3943 | |
3944 | demand_empty_rest_of_line (); | |
3945 | } | |
3946 | ||
3947 | /* This function handles the .section pseudo-op. This is mostly to | |
3948 | give an error, since XCOFF only supports .text, .data and .bss, but | |
3949 | we do permit the user to name the text or data section. */ | |
3950 | ||
3951 | static void | |
98027b10 | 3952 | ppc_named_section (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3953 | { |
3954 | char *user_name; | |
3955 | const char *real_name; | |
3956 | char c; | |
3957 | symbolS *sym; | |
3958 | ||
3959 | user_name = input_line_pointer; | |
3960 | c = get_symbol_end (); | |
3961 | ||
3962 | if (strcmp (user_name, ".text") == 0) | |
3963 | real_name = ".text[PR]"; | |
3964 | else if (strcmp (user_name, ".data") == 0) | |
3965 | real_name = ".data[RW]"; | |
3966 | else | |
3967 | { | |
d6ed37ed | 3968 | as_bad (_("the XCOFF file format does not support arbitrary sections")); |
252b5132 RH |
3969 | *input_line_pointer = c; |
3970 | ignore_rest_of_line (); | |
3971 | return; | |
3972 | } | |
3973 | ||
3974 | *input_line_pointer = c; | |
3975 | ||
3976 | sym = symbol_find_or_make (real_name); | |
3977 | ||
931e13a6 | 3978 | ppc_change_csect (sym, 2); |
252b5132 RH |
3979 | |
3980 | demand_empty_rest_of_line (); | |
3981 | } | |
3982 | ||
3983 | /* The .extern pseudo-op. We create an undefined symbol. */ | |
3984 | ||
3985 | static void | |
98027b10 | 3986 | ppc_extern (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3987 | { |
3988 | char *name; | |
3989 | char endc; | |
3990 | ||
3991 | name = input_line_pointer; | |
3992 | endc = get_symbol_end (); | |
3993 | ||
3994 | (void) symbol_find_or_make (name); | |
3995 | ||
3996 | *input_line_pointer = endc; | |
3997 | ||
3998 | demand_empty_rest_of_line (); | |
3999 | } | |
4000 | ||
4001 | /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */ | |
4002 | ||
4003 | static void | |
98027b10 | 4004 | ppc_lglobl (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4005 | { |
4006 | char *name; | |
4007 | char endc; | |
4008 | symbolS *sym; | |
4009 | ||
4010 | name = input_line_pointer; | |
4011 | endc = get_symbol_end (); | |
4012 | ||
4013 | sym = symbol_find_or_make (name); | |
4014 | ||
4015 | *input_line_pointer = endc; | |
4016 | ||
809ffe0d | 4017 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4018 | |
4019 | demand_empty_rest_of_line (); | |
4020 | } | |
4021 | ||
c865e45b RS |
4022 | /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF |
4023 | relocations at the beginning of the current csect. | |
4024 | ||
4025 | (In principle, there's no reason why the relocations _have_ to be at | |
4026 | the beginning. Anywhere in the csect would do. However, inserting | |
4027 | at the beginning is what the native assmebler does, and it helps to | |
4028 | deal with cases where the .ref statements follow the section contents.) | |
4029 | ||
4030 | ??? .refs don't work for empty .csects. However, the native assembler | |
4031 | doesn't report an error in this case, and neither yet do we. */ | |
4032 | ||
4033 | static void | |
4034 | ppc_ref (int ignore ATTRIBUTE_UNUSED) | |
4035 | { | |
4036 | char *name; | |
4037 | char c; | |
4038 | ||
4039 | if (ppc_current_csect == NULL) | |
4040 | { | |
4041 | as_bad (_(".ref outside .csect")); | |
4042 | ignore_rest_of_line (); | |
4043 | return; | |
4044 | } | |
4045 | ||
4046 | do | |
4047 | { | |
4048 | name = input_line_pointer; | |
4049 | c = get_symbol_end (); | |
4050 | ||
4051 | fix_at_start (symbol_get_frag (ppc_current_csect), 0, | |
4052 | symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE); | |
4053 | ||
4054 | *input_line_pointer = c; | |
4055 | SKIP_WHITESPACE (); | |
4056 | c = *input_line_pointer; | |
4057 | if (c == ',') | |
4058 | { | |
4059 | input_line_pointer++; | |
4060 | SKIP_WHITESPACE (); | |
4061 | if (is_end_of_line[(unsigned char) *input_line_pointer]) | |
4062 | { | |
4063 | as_bad (_("missing symbol name")); | |
4064 | ignore_rest_of_line (); | |
4065 | return; | |
4066 | } | |
4067 | } | |
4068 | } | |
4069 | while (c == ','); | |
4070 | ||
4071 | demand_empty_rest_of_line (); | |
4072 | } | |
4073 | ||
252b5132 RH |
4074 | /* The .rename pseudo-op. The RS/6000 assembler can rename symbols, |
4075 | although I don't know why it bothers. */ | |
4076 | ||
4077 | static void | |
98027b10 | 4078 | ppc_rename (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4079 | { |
4080 | char *name; | |
4081 | char endc; | |
4082 | symbolS *sym; | |
4083 | int len; | |
4084 | ||
4085 | name = input_line_pointer; | |
4086 | endc = get_symbol_end (); | |
4087 | ||
4088 | sym = symbol_find_or_make (name); | |
4089 | ||
4090 | *input_line_pointer = endc; | |
4091 | ||
4092 | if (*input_line_pointer != ',') | |
4093 | { | |
4094 | as_bad (_("missing rename string")); | |
4095 | ignore_rest_of_line (); | |
4096 | return; | |
4097 | } | |
4098 | ++input_line_pointer; | |
4099 | ||
809ffe0d | 4100 | symbol_get_tc (sym)->real_name = demand_copy_C_string (&len); |
252b5132 RH |
4101 | |
4102 | demand_empty_rest_of_line (); | |
4103 | } | |
4104 | ||
4105 | /* The .stabx pseudo-op. This is similar to a normal .stabs | |
4106 | pseudo-op, but slightly different. A sample is | |
4107 | .stabx "main:F-1",.main,142,0 | |
4108 | The first argument is the symbol name to create. The second is the | |
4109 | value, and the third is the storage class. The fourth seems to be | |
4110 | always zero, and I am assuming it is the type. */ | |
4111 | ||
4112 | static void | |
98027b10 | 4113 | ppc_stabx (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4114 | { |
4115 | char *name; | |
4116 | int len; | |
4117 | symbolS *sym; | |
4118 | expressionS exp; | |
4119 | ||
4120 | name = demand_copy_C_string (&len); | |
4121 | ||
4122 | if (*input_line_pointer != ',') | |
4123 | { | |
4124 | as_bad (_("missing value")); | |
4125 | return; | |
4126 | } | |
4127 | ++input_line_pointer; | |
4128 | ||
b34976b6 | 4129 | ppc_stab_symbol = TRUE; |
252b5132 | 4130 | sym = symbol_make (name); |
b34976b6 | 4131 | ppc_stab_symbol = FALSE; |
252b5132 | 4132 | |
809ffe0d | 4133 | symbol_get_tc (sym)->real_name = name; |
252b5132 RH |
4134 | |
4135 | (void) expression (&exp); | |
4136 | ||
4137 | switch (exp.X_op) | |
4138 | { | |
4139 | case O_illegal: | |
4140 | case O_absent: | |
4141 | case O_big: | |
4142 | as_bad (_("illegal .stabx expression; zero assumed")); | |
4143 | exp.X_add_number = 0; | |
4144 | /* Fall through. */ | |
4145 | case O_constant: | |
4146 | S_SET_VALUE (sym, (valueT) exp.X_add_number); | |
809ffe0d | 4147 | symbol_set_frag (sym, &zero_address_frag); |
252b5132 RH |
4148 | break; |
4149 | ||
4150 | case O_symbol: | |
4151 | if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section) | |
809ffe0d | 4152 | symbol_set_value_expression (sym, &exp); |
252b5132 RH |
4153 | else |
4154 | { | |
4155 | S_SET_VALUE (sym, | |
4156 | exp.X_add_number + S_GET_VALUE (exp.X_add_symbol)); | |
809ffe0d | 4157 | symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol)); |
252b5132 RH |
4158 | } |
4159 | break; | |
4160 | ||
4161 | default: | |
4162 | /* The value is some complex expression. This will probably | |
99a814a1 AM |
4163 | fail at some later point, but this is probably the right |
4164 | thing to do here. */ | |
809ffe0d | 4165 | symbol_set_value_expression (sym, &exp); |
252b5132 RH |
4166 | break; |
4167 | } | |
4168 | ||
4169 | S_SET_SEGMENT (sym, ppc_coff_debug_section); | |
809ffe0d | 4170 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
4171 | |
4172 | if (*input_line_pointer != ',') | |
4173 | { | |
4174 | as_bad (_("missing class")); | |
4175 | return; | |
4176 | } | |
4177 | ++input_line_pointer; | |
4178 | ||
4179 | S_SET_STORAGE_CLASS (sym, get_absolute_expression ()); | |
4180 | ||
4181 | if (*input_line_pointer != ',') | |
4182 | { | |
4183 | as_bad (_("missing type")); | |
4184 | return; | |
4185 | } | |
4186 | ++input_line_pointer; | |
4187 | ||
4188 | S_SET_DATA_TYPE (sym, get_absolute_expression ()); | |
4189 | ||
809ffe0d | 4190 | symbol_get_tc (sym)->output = 1; |
252b5132 | 4191 | |
c734e7e3 TG |
4192 | if (S_GET_STORAGE_CLASS (sym) == C_STSYM) |
4193 | { | |
4194 | /* In this case : | |
252b5132 | 4195 | |
c734e7e3 TG |
4196 | .bs name |
4197 | .stabx "z",arrays_,133,0 | |
4198 | .es | |
99a814a1 | 4199 | |
c734e7e3 | 4200 | .comm arrays_,13768,3 |
99a814a1 | 4201 | |
c734e7e3 TG |
4202 | resolve_symbol_value will copy the exp's "within" into sym's when the |
4203 | offset is 0. Since this seems to be corner case problem, | |
4204 | only do the correction for storage class C_STSYM. A better solution | |
4205 | would be to have the tc field updated in ppc_symbol_new_hook. */ | |
99a814a1 | 4206 | |
c734e7e3 TG |
4207 | if (exp.X_op == O_symbol) |
4208 | { | |
4209 | if (ppc_current_block == NULL) | |
4210 | as_bad (_(".stabx of storage class stsym must be within .bs/.es")); | |
99a814a1 | 4211 | |
c734e7e3 TG |
4212 | symbol_get_tc (sym)->within = ppc_current_block; |
4213 | symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block; | |
4214 | } | |
4215 | } | |
99a814a1 | 4216 | |
252b5132 RH |
4217 | if (exp.X_op != O_symbol |
4218 | || ! S_IS_EXTERNAL (exp.X_add_symbol) | |
4219 | || S_GET_SEGMENT (exp.X_add_symbol) != bss_section) | |
4220 | ppc_frob_label (sym); | |
4221 | else | |
4222 | { | |
4223 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
4224 | symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP); | |
809ffe0d ILT |
4225 | if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol) |
4226 | symbol_get_tc (ppc_current_csect)->within = sym; | |
252b5132 RH |
4227 | } |
4228 | ||
4229 | demand_empty_rest_of_line (); | |
4230 | } | |
4231 | ||
4232 | /* The .function pseudo-op. This takes several arguments. The first | |
4233 | argument seems to be the external name of the symbol. The second | |
67c1ffbe | 4234 | argument seems to be the label for the start of the function. gcc |
252b5132 RH |
4235 | uses the same name for both. I have no idea what the third and |
4236 | fourth arguments are meant to be. The optional fifth argument is | |
4237 | an expression for the size of the function. In COFF this symbol | |
4238 | gets an aux entry like that used for a csect. */ | |
4239 | ||
4240 | static void | |
98027b10 | 4241 | ppc_function (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4242 | { |
4243 | char *name; | |
4244 | char endc; | |
4245 | char *s; | |
4246 | symbolS *ext_sym; | |
4247 | symbolS *lab_sym; | |
4248 | ||
4249 | name = input_line_pointer; | |
4250 | endc = get_symbol_end (); | |
4251 | ||
4252 | /* Ignore any [PR] suffix. */ | |
4253 | name = ppc_canonicalize_symbol_name (name); | |
4254 | s = strchr (name, '['); | |
4255 | if (s != (char *) NULL | |
4256 | && strcmp (s + 1, "PR]") == 0) | |
4257 | *s = '\0'; | |
4258 | ||
4259 | ext_sym = symbol_find_or_make (name); | |
4260 | ||
4261 | *input_line_pointer = endc; | |
4262 | ||
4263 | if (*input_line_pointer != ',') | |
4264 | { | |
4265 | as_bad (_("missing symbol name")); | |
4266 | ignore_rest_of_line (); | |
4267 | return; | |
4268 | } | |
4269 | ++input_line_pointer; | |
4270 | ||
4271 | name = input_line_pointer; | |
4272 | endc = get_symbol_end (); | |
4273 | ||
4274 | lab_sym = symbol_find_or_make (name); | |
4275 | ||
4276 | *input_line_pointer = endc; | |
4277 | ||
4278 | if (ext_sym != lab_sym) | |
4279 | { | |
809ffe0d ILT |
4280 | expressionS exp; |
4281 | ||
4282 | exp.X_op = O_symbol; | |
4283 | exp.X_add_symbol = lab_sym; | |
4284 | exp.X_op_symbol = NULL; | |
4285 | exp.X_add_number = 0; | |
4286 | exp.X_unsigned = 0; | |
4287 | symbol_set_value_expression (ext_sym, &exp); | |
252b5132 RH |
4288 | } |
4289 | ||
96d56e9f NC |
4290 | if (symbol_get_tc (ext_sym)->symbol_class == -1) |
4291 | symbol_get_tc (ext_sym)->symbol_class = XMC_PR; | |
809ffe0d | 4292 | symbol_get_tc (ext_sym)->output = 1; |
252b5132 RH |
4293 | |
4294 | if (*input_line_pointer == ',') | |
4295 | { | |
91d6fa6a | 4296 | expressionS exp; |
252b5132 RH |
4297 | |
4298 | /* Ignore the third argument. */ | |
4299 | ++input_line_pointer; | |
91d6fa6a | 4300 | expression (& exp); |
252b5132 RH |
4301 | if (*input_line_pointer == ',') |
4302 | { | |
4303 | /* Ignore the fourth argument. */ | |
4304 | ++input_line_pointer; | |
91d6fa6a | 4305 | expression (& exp); |
252b5132 RH |
4306 | if (*input_line_pointer == ',') |
4307 | { | |
4308 | /* The fifth argument is the function size. */ | |
4309 | ++input_line_pointer; | |
85645aed TG |
4310 | symbol_get_tc (ext_sym)->u.size = symbol_new |
4311 | ("L0\001", absolute_section,(valueT) 0, &zero_address_frag); | |
4312 | pseudo_set (symbol_get_tc (ext_sym)->u.size); | |
252b5132 RH |
4313 | } |
4314 | } | |
4315 | } | |
4316 | ||
4317 | S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT); | |
4318 | SF_SET_FUNCTION (ext_sym); | |
4319 | SF_SET_PROCESS (ext_sym); | |
4320 | coff_add_linesym (ext_sym); | |
4321 | ||
4322 | demand_empty_rest_of_line (); | |
4323 | } | |
4324 | ||
4325 | /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named | |
8642cce8 TR |
4326 | ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym |
4327 | with the correct line number */ | |
5d6255fe | 4328 | |
8642cce8 | 4329 | static symbolS *saved_bi_sym = 0; |
252b5132 RH |
4330 | |
4331 | static void | |
98027b10 | 4332 | ppc_bf (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4333 | { |
4334 | symbolS *sym; | |
4335 | ||
4336 | sym = symbol_make (".bf"); | |
4337 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 4338 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
4339 | S_SET_VALUE (sym, frag_now_fix ()); |
4340 | S_SET_STORAGE_CLASS (sym, C_FCN); | |
4341 | ||
4342 | coff_line_base = get_absolute_expression (); | |
4343 | ||
4344 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
4345 | SA_SET_SYM_LNNO (sym, coff_line_base); | |
4346 | ||
8642cce8 | 4347 | /* Line number for bi. */ |
5d6255fe | 4348 | if (saved_bi_sym) |
8642cce8 TR |
4349 | { |
4350 | S_SET_VALUE (saved_bi_sym, coff_n_line_nos); | |
4351 | saved_bi_sym = 0; | |
4352 | } | |
5d6255fe | 4353 | |
8642cce8 | 4354 | |
809ffe0d | 4355 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4356 | |
4357 | ppc_frob_label (sym); | |
4358 | ||
4359 | demand_empty_rest_of_line (); | |
4360 | } | |
4361 | ||
4362 | /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named | |
4363 | ".ef", except that the line number is absolute, not relative to the | |
4364 | most recent ".bf" symbol. */ | |
4365 | ||
4366 | static void | |
98027b10 | 4367 | ppc_ef (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4368 | { |
4369 | symbolS *sym; | |
4370 | ||
4371 | sym = symbol_make (".ef"); | |
4372 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 4373 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
4374 | S_SET_VALUE (sym, frag_now_fix ()); |
4375 | S_SET_STORAGE_CLASS (sym, C_FCN); | |
4376 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
4377 | SA_SET_SYM_LNNO (sym, get_absolute_expression ()); | |
809ffe0d | 4378 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4379 | |
4380 | ppc_frob_label (sym); | |
4381 | ||
4382 | demand_empty_rest_of_line (); | |
4383 | } | |
4384 | ||
4385 | /* The .bi and .ei pseudo-ops. These take a string argument and | |
4386 | generates a C_BINCL or C_EINCL symbol, which goes at the start of | |
8642cce8 TR |
4387 | the symbol list. The value of .bi will be know when the next .bf |
4388 | is encountered. */ | |
252b5132 RH |
4389 | |
4390 | static void | |
98027b10 | 4391 | ppc_biei (int ei) |
252b5132 RH |
4392 | { |
4393 | static symbolS *last_biei; | |
4394 | ||
4395 | char *name; | |
4396 | int len; | |
4397 | symbolS *sym; | |
4398 | symbolS *look; | |
4399 | ||
4400 | name = demand_copy_C_string (&len); | |
4401 | ||
4402 | /* The value of these symbols is actually file offset. Here we set | |
4403 | the value to the index into the line number entries. In | |
4404 | ppc_frob_symbols we set the fix_line field, which will cause BFD | |
4405 | to do the right thing. */ | |
4406 | ||
4407 | sym = symbol_make (name); | |
4408 | /* obj-coff.c currently only handles line numbers correctly in the | |
4409 | .text section. */ | |
4410 | S_SET_SEGMENT (sym, text_section); | |
4411 | S_SET_VALUE (sym, coff_n_line_nos); | |
809ffe0d | 4412 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
4413 | |
4414 | S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL); | |
809ffe0d | 4415 | symbol_get_tc (sym)->output = 1; |
81d4177b | 4416 | |
8642cce8 | 4417 | /* Save bi. */ |
5d6255fe | 4418 | if (ei) |
8642cce8 TR |
4419 | saved_bi_sym = 0; |
4420 | else | |
4421 | saved_bi_sym = sym; | |
4422 | ||
252b5132 RH |
4423 | for (look = last_biei ? last_biei : symbol_rootP; |
4424 | (look != (symbolS *) NULL | |
4425 | && (S_GET_STORAGE_CLASS (look) == C_FILE | |
4426 | || S_GET_STORAGE_CLASS (look) == C_BINCL | |
4427 | || S_GET_STORAGE_CLASS (look) == C_EINCL)); | |
4428 | look = symbol_next (look)) | |
4429 | ; | |
4430 | if (look != (symbolS *) NULL) | |
4431 | { | |
4432 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
4433 | symbol_insert (sym, look, &symbol_rootP, &symbol_lastP); | |
4434 | last_biei = sym; | |
4435 | } | |
4436 | ||
4437 | demand_empty_rest_of_line (); | |
4438 | } | |
4439 | ||
4440 | /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs". | |
4441 | There is one argument, which is a csect symbol. The value of the | |
4442 | .bs symbol is the index of this csect symbol. */ | |
4443 | ||
4444 | static void | |
98027b10 | 4445 | ppc_bs (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4446 | { |
4447 | char *name; | |
4448 | char endc; | |
4449 | symbolS *csect; | |
4450 | symbolS *sym; | |
4451 | ||
4452 | if (ppc_current_block != NULL) | |
4453 | as_bad (_("nested .bs blocks")); | |
4454 | ||
4455 | name = input_line_pointer; | |
4456 | endc = get_symbol_end (); | |
4457 | ||
4458 | csect = symbol_find_or_make (name); | |
4459 | ||
4460 | *input_line_pointer = endc; | |
4461 | ||
4462 | sym = symbol_make (".bs"); | |
4463 | S_SET_SEGMENT (sym, now_seg); | |
4464 | S_SET_STORAGE_CLASS (sym, C_BSTAT); | |
809ffe0d ILT |
4465 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
4466 | symbol_get_tc (sym)->output = 1; | |
252b5132 | 4467 | |
809ffe0d | 4468 | symbol_get_tc (sym)->within = csect; |
252b5132 RH |
4469 | |
4470 | ppc_frob_label (sym); | |
4471 | ||
4472 | ppc_current_block = sym; | |
4473 | ||
4474 | demand_empty_rest_of_line (); | |
4475 | } | |
4476 | ||
4477 | /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */ | |
4478 | ||
4479 | static void | |
98027b10 | 4480 | ppc_es (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4481 | { |
4482 | symbolS *sym; | |
4483 | ||
4484 | if (ppc_current_block == NULL) | |
4485 | as_bad (_(".es without preceding .bs")); | |
4486 | ||
4487 | sym = symbol_make (".es"); | |
4488 | S_SET_SEGMENT (sym, now_seg); | |
4489 | S_SET_STORAGE_CLASS (sym, C_ESTAT); | |
809ffe0d ILT |
4490 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
4491 | symbol_get_tc (sym)->output = 1; | |
252b5132 RH |
4492 | |
4493 | ppc_frob_label (sym); | |
4494 | ||
4495 | ppc_current_block = NULL; | |
4496 | ||
4497 | demand_empty_rest_of_line (); | |
4498 | } | |
4499 | ||
4500 | /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a | |
4501 | line number. */ | |
4502 | ||
4503 | static void | |
98027b10 | 4504 | ppc_bb (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4505 | { |
4506 | symbolS *sym; | |
4507 | ||
4508 | sym = symbol_make (".bb"); | |
4509 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 4510 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
4511 | S_SET_VALUE (sym, frag_now_fix ()); |
4512 | S_SET_STORAGE_CLASS (sym, C_BLOCK); | |
4513 | ||
4514 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
4515 | SA_SET_SYM_LNNO (sym, get_absolute_expression ()); | |
4516 | ||
809ffe0d | 4517 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4518 | |
4519 | SF_SET_PROCESS (sym); | |
4520 | ||
4521 | ppc_frob_label (sym); | |
4522 | ||
4523 | demand_empty_rest_of_line (); | |
4524 | } | |
4525 | ||
4526 | /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a | |
4527 | line number. */ | |
4528 | ||
4529 | static void | |
98027b10 | 4530 | ppc_eb (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4531 | { |
4532 | symbolS *sym; | |
4533 | ||
4534 | sym = symbol_make (".eb"); | |
4535 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 4536 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
4537 | S_SET_VALUE (sym, frag_now_fix ()); |
4538 | S_SET_STORAGE_CLASS (sym, C_BLOCK); | |
4539 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
4540 | SA_SET_SYM_LNNO (sym, get_absolute_expression ()); | |
809ffe0d | 4541 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4542 | |
4543 | SF_SET_PROCESS (sym); | |
4544 | ||
4545 | ppc_frob_label (sym); | |
4546 | ||
4547 | demand_empty_rest_of_line (); | |
4548 | } | |
4549 | ||
4550 | /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a | |
4551 | specified name. */ | |
4552 | ||
4553 | static void | |
98027b10 | 4554 | ppc_bc (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4555 | { |
4556 | char *name; | |
4557 | int len; | |
4558 | symbolS *sym; | |
4559 | ||
4560 | name = demand_copy_C_string (&len); | |
4561 | sym = symbol_make (name); | |
4562 | S_SET_SEGMENT (sym, ppc_coff_debug_section); | |
809ffe0d | 4563 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
4564 | S_SET_STORAGE_CLASS (sym, C_BCOMM); |
4565 | S_SET_VALUE (sym, 0); | |
809ffe0d | 4566 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4567 | |
4568 | ppc_frob_label (sym); | |
4569 | ||
4570 | demand_empty_rest_of_line (); | |
4571 | } | |
4572 | ||
4573 | /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */ | |
4574 | ||
4575 | static void | |
98027b10 | 4576 | ppc_ec (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4577 | { |
4578 | symbolS *sym; | |
4579 | ||
4580 | sym = symbol_make (".ec"); | |
4581 | S_SET_SEGMENT (sym, ppc_coff_debug_section); | |
809ffe0d | 4582 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
4583 | S_SET_STORAGE_CLASS (sym, C_ECOMM); |
4584 | S_SET_VALUE (sym, 0); | |
809ffe0d | 4585 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4586 | |
4587 | ppc_frob_label (sym); | |
4588 | ||
4589 | demand_empty_rest_of_line (); | |
4590 | } | |
4591 | ||
4592 | /* The .toc pseudo-op. Switch to the .toc subsegment. */ | |
4593 | ||
4594 | static void | |
98027b10 | 4595 | ppc_toc (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4596 | { |
4597 | if (ppc_toc_csect != (symbolS *) NULL) | |
809ffe0d | 4598 | subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg); |
252b5132 RH |
4599 | else |
4600 | { | |
4601 | subsegT subseg; | |
4602 | symbolS *sym; | |
4603 | symbolS *list; | |
81d4177b | 4604 | |
252b5132 RH |
4605 | subseg = ppc_data_subsegment; |
4606 | ++ppc_data_subsegment; | |
4607 | ||
4608 | subseg_new (segment_name (data_section), subseg); | |
4609 | ppc_toc_frag = frag_now; | |
4610 | ||
4611 | sym = symbol_find_or_make ("TOC[TC0]"); | |
809ffe0d | 4612 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
4613 | S_SET_SEGMENT (sym, data_section); |
4614 | S_SET_VALUE (sym, (valueT) frag_now_fix ()); | |
809ffe0d ILT |
4615 | symbol_get_tc (sym)->subseg = subseg; |
4616 | symbol_get_tc (sym)->output = 1; | |
4617 | symbol_get_tc (sym)->within = sym; | |
252b5132 RH |
4618 | |
4619 | ppc_toc_csect = sym; | |
81d4177b | 4620 | |
252b5132 | 4621 | for (list = ppc_data_csects; |
809ffe0d ILT |
4622 | symbol_get_tc (list)->next != (symbolS *) NULL; |
4623 | list = symbol_get_tc (list)->next) | |
252b5132 | 4624 | ; |
809ffe0d | 4625 | symbol_get_tc (list)->next = sym; |
252b5132 RH |
4626 | |
4627 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
809ffe0d ILT |
4628 | symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP, |
4629 | &symbol_lastP); | |
252b5132 RH |
4630 | } |
4631 | ||
4632 | ppc_current_csect = ppc_toc_csect; | |
4633 | ||
4634 | demand_empty_rest_of_line (); | |
4635 | } | |
4636 | ||
4637 | /* The AIX assembler automatically aligns the operands of a .long or | |
4638 | .short pseudo-op, and we want to be compatible. */ | |
4639 | ||
4640 | static void | |
98027b10 | 4641 | ppc_xcoff_cons (int log_size) |
252b5132 RH |
4642 | { |
4643 | frag_align (log_size, 0, 0); | |
4644 | record_alignment (now_seg, log_size); | |
4645 | cons (1 << log_size); | |
4646 | } | |
4647 | ||
4648 | static void | |
98027b10 | 4649 | ppc_vbyte (int dummy ATTRIBUTE_UNUSED) |
252b5132 RH |
4650 | { |
4651 | expressionS exp; | |
4652 | int byte_count; | |
4653 | ||
4654 | (void) expression (&exp); | |
4655 | ||
4656 | if (exp.X_op != O_constant) | |
4657 | { | |
4658 | as_bad (_("non-constant byte count")); | |
4659 | return; | |
4660 | } | |
4661 | ||
4662 | byte_count = exp.X_add_number; | |
4663 | ||
4664 | if (*input_line_pointer != ',') | |
4665 | { | |
4666 | as_bad (_("missing value")); | |
4667 | return; | |
4668 | } | |
4669 | ||
4670 | ++input_line_pointer; | |
4671 | cons (byte_count); | |
4672 | } | |
4673 | ||
85645aed TG |
4674 | void |
4675 | ppc_xcoff_end (void) | |
4676 | { | |
4677 | int i; | |
4678 | ||
4679 | for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++) | |
4680 | { | |
4681 | struct dw_section *dws = &dw_sections[i]; | |
4682 | struct dw_subsection *dwss; | |
4683 | ||
4684 | if (dws->anon_subseg) | |
4685 | { | |
4686 | dwss = dws->anon_subseg; | |
4687 | dwss->link = dws->list_subseg; | |
4688 | } | |
4689 | else | |
4690 | dwss = dws->list_subseg; | |
4691 | ||
4692 | for (; dwss != NULL; dwss = dwss->link) | |
4693 | if (dwss->end_exp.X_add_symbol != NULL) | |
4694 | { | |
4695 | subseg_set (dws->sect, dwss->subseg); | |
4696 | symbol_set_value_now (dwss->end_exp.X_add_symbol); | |
4697 | } | |
4698 | } | |
4699 | } | |
4700 | ||
252b5132 | 4701 | #endif /* OBJ_XCOFF */ |
0baf16f2 | 4702 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) |
252b5132 RH |
4703 | \f |
4704 | /* The .tc pseudo-op. This is used when generating either XCOFF or | |
4705 | ELF. This takes two or more arguments. | |
4706 | ||
4707 | When generating XCOFF output, the first argument is the name to | |
4708 | give to this location in the toc; this will be a symbol with class | |
0baf16f2 | 4709 | TC. The rest of the arguments are N-byte values to actually put at |
252b5132 | 4710 | this location in the TOC; often there is just one more argument, a |
1049f94e | 4711 | relocatable symbol reference. The size of the value to store |
0baf16f2 AM |
4712 | depends on target word size. A 32-bit target uses 4-byte values, a |
4713 | 64-bit target uses 8-byte values. | |
252b5132 RH |
4714 | |
4715 | When not generating XCOFF output, the arguments are the same, but | |
4716 | the first argument is simply ignored. */ | |
4717 | ||
4718 | static void | |
98027b10 | 4719 | ppc_tc (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4720 | { |
4721 | #ifdef OBJ_XCOFF | |
4722 | ||
4723 | /* Define the TOC symbol name. */ | |
4724 | { | |
4725 | char *name; | |
4726 | char endc; | |
4727 | symbolS *sym; | |
4728 | ||
4729 | if (ppc_toc_csect == (symbolS *) NULL | |
4730 | || ppc_toc_csect != ppc_current_csect) | |
4731 | { | |
4732 | as_bad (_(".tc not in .toc section")); | |
4733 | ignore_rest_of_line (); | |
4734 | return; | |
4735 | } | |
4736 | ||
4737 | name = input_line_pointer; | |
4738 | endc = get_symbol_end (); | |
4739 | ||
4740 | sym = symbol_find_or_make (name); | |
4741 | ||
4742 | *input_line_pointer = endc; | |
4743 | ||
4744 | if (S_IS_DEFINED (sym)) | |
4745 | { | |
4746 | symbolS *label; | |
4747 | ||
809ffe0d | 4748 | label = symbol_get_tc (ppc_current_csect)->within; |
96d56e9f | 4749 | if (symbol_get_tc (label)->symbol_class != XMC_TC0) |
252b5132 RH |
4750 | { |
4751 | as_bad (_(".tc with no label")); | |
4752 | ignore_rest_of_line (); | |
4753 | return; | |
4754 | } | |
4755 | ||
4756 | S_SET_SEGMENT (label, S_GET_SEGMENT (sym)); | |
809ffe0d | 4757 | symbol_set_frag (label, symbol_get_frag (sym)); |
252b5132 RH |
4758 | S_SET_VALUE (label, S_GET_VALUE (sym)); |
4759 | ||
4760 | while (! is_end_of_line[(unsigned char) *input_line_pointer]) | |
4761 | ++input_line_pointer; | |
4762 | ||
4763 | return; | |
4764 | } | |
4765 | ||
4766 | S_SET_SEGMENT (sym, now_seg); | |
809ffe0d | 4767 | symbol_set_frag (sym, frag_now); |
252b5132 | 4768 | S_SET_VALUE (sym, (valueT) frag_now_fix ()); |
96d56e9f | 4769 | symbol_get_tc (sym)->symbol_class = XMC_TC; |
809ffe0d | 4770 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4771 | |
4772 | ppc_frob_label (sym); | |
4773 | } | |
4774 | ||
0baf16f2 AM |
4775 | #endif /* OBJ_XCOFF */ |
4776 | #ifdef OBJ_ELF | |
9c7977b3 | 4777 | int align; |
252b5132 RH |
4778 | |
4779 | /* Skip the TOC symbol name. */ | |
4780 | while (is_part_of_name (*input_line_pointer) | |
d13d4015 | 4781 | || *input_line_pointer == ' ' |
252b5132 RH |
4782 | || *input_line_pointer == '[' |
4783 | || *input_line_pointer == ']' | |
4784 | || *input_line_pointer == '{' | |
4785 | || *input_line_pointer == '}') | |
4786 | ++input_line_pointer; | |
4787 | ||
0baf16f2 | 4788 | /* Align to a four/eight byte boundary. */ |
2b3c4602 | 4789 | align = ppc_obj64 ? 3 : 2; |
9c7977b3 AM |
4790 | frag_align (align, 0, 0); |
4791 | record_alignment (now_seg, align); | |
0baf16f2 | 4792 | #endif /* OBJ_ELF */ |
252b5132 RH |
4793 | |
4794 | if (*input_line_pointer != ',') | |
4795 | demand_empty_rest_of_line (); | |
4796 | else | |
4797 | { | |
4798 | ++input_line_pointer; | |
2b3c4602 | 4799 | cons (ppc_obj64 ? 8 : 4); |
252b5132 RH |
4800 | } |
4801 | } | |
0baf16f2 AM |
4802 | |
4803 | /* Pseudo-op .machine. */ | |
0baf16f2 AM |
4804 | |
4805 | static void | |
98027b10 | 4806 | ppc_machine (int ignore ATTRIBUTE_UNUSED) |
0baf16f2 | 4807 | { |
69c040df AM |
4808 | char *cpu_string; |
4809 | #define MAX_HISTORY 100 | |
fa452fa6 | 4810 | static ppc_cpu_t *cpu_history; |
69c040df AM |
4811 | static int curr_hist; |
4812 | ||
4813 | SKIP_WHITESPACE (); | |
4814 | ||
4815 | if (*input_line_pointer == '"') | |
4816 | { | |
4817 | int len; | |
4818 | cpu_string = demand_copy_C_string (&len); | |
4819 | } | |
4820 | else | |
4821 | { | |
4822 | char c; | |
4823 | cpu_string = input_line_pointer; | |
4824 | c = get_symbol_end (); | |
4825 | cpu_string = xstrdup (cpu_string); | |
4826 | *input_line_pointer = c; | |
4827 | } | |
4828 | ||
4829 | if (cpu_string != NULL) | |
4830 | { | |
fa452fa6 | 4831 | ppc_cpu_t old_cpu = ppc_cpu; |
69fe9ce5 | 4832 | ppc_cpu_t new_cpu; |
69c040df AM |
4833 | char *p; |
4834 | ||
4835 | for (p = cpu_string; *p != 0; p++) | |
4836 | *p = TOLOWER (*p); | |
4837 | ||
4838 | if (strcmp (cpu_string, "push") == 0) | |
4839 | { | |
4840 | if (cpu_history == NULL) | |
4841 | cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history)); | |
4842 | ||
4843 | if (curr_hist >= MAX_HISTORY) | |
4844 | as_bad (_(".machine stack overflow")); | |
4845 | else | |
4846 | cpu_history[curr_hist++] = ppc_cpu; | |
4847 | } | |
4848 | else if (strcmp (cpu_string, "pop") == 0) | |
4849 | { | |
4850 | if (curr_hist <= 0) | |
4851 | as_bad (_(".machine stack underflow")); | |
4852 | else | |
4853 | ppc_cpu = cpu_history[--curr_hist]; | |
4854 | } | |
776fc418 | 4855 | else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0) |
69fe9ce5 | 4856 | ppc_cpu = new_cpu; |
69c040df AM |
4857 | else |
4858 | as_bad (_("invalid machine `%s'"), cpu_string); | |
4859 | ||
4860 | if (ppc_cpu != old_cpu) | |
4861 | ppc_setup_opcodes (); | |
4862 | } | |
4863 | ||
4864 | demand_empty_rest_of_line (); | |
0baf16f2 | 4865 | } |
0baf16f2 | 4866 | #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ |
252b5132 RH |
4867 | \f |
4868 | #ifdef TE_PE | |
4869 | ||
99a814a1 | 4870 | /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */ |
252b5132 RH |
4871 | |
4872 | /* Set the current section. */ | |
4873 | static void | |
98027b10 | 4874 | ppc_set_current_section (segT new) |
252b5132 RH |
4875 | { |
4876 | ppc_previous_section = ppc_current_section; | |
4877 | ppc_current_section = new; | |
4878 | } | |
4879 | ||
4880 | /* pseudo-op: .previous | |
4881 | behaviour: toggles the current section with the previous section. | |
4882 | errors: None | |
99a814a1 AM |
4883 | warnings: "No previous section" */ |
4884 | ||
252b5132 | 4885 | static void |
98027b10 | 4886 | ppc_previous (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 4887 | { |
81d4177b | 4888 | if (ppc_previous_section == NULL) |
252b5132 | 4889 | { |
d6ed37ed | 4890 | as_warn (_("no previous section to return to, ignored.")); |
252b5132 RH |
4891 | return; |
4892 | } | |
4893 | ||
99a814a1 | 4894 | subseg_set (ppc_previous_section, 0); |
252b5132 | 4895 | |
99a814a1 | 4896 | ppc_set_current_section (ppc_previous_section); |
252b5132 RH |
4897 | } |
4898 | ||
4899 | /* pseudo-op: .pdata | |
4900 | behaviour: predefined read only data section | |
b34976b6 | 4901 | double word aligned |
252b5132 RH |
4902 | errors: None |
4903 | warnings: None | |
4904 | initial: .section .pdata "adr3" | |
b34976b6 | 4905 | a - don't know -- maybe a misprint |
252b5132 RH |
4906 | d - initialized data |
4907 | r - readable | |
4908 | 3 - double word aligned (that would be 4 byte boundary) | |
4909 | ||
4910 | commentary: | |
4911 | Tag index tables (also known as the function table) for exception | |
99a814a1 | 4912 | handling, debugging, etc. */ |
252b5132 | 4913 | |
252b5132 | 4914 | static void |
98027b10 | 4915 | ppc_pdata (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 4916 | { |
81d4177b | 4917 | if (pdata_section == 0) |
252b5132 RH |
4918 | { |
4919 | pdata_section = subseg_new (".pdata", 0); | |
81d4177b | 4920 | |
252b5132 RH |
4921 | bfd_set_section_flags (stdoutput, pdata_section, |
4922 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC | |
4923 | | SEC_READONLY | SEC_DATA )); | |
81d4177b | 4924 | |
252b5132 RH |
4925 | bfd_set_section_alignment (stdoutput, pdata_section, 2); |
4926 | } | |
4927 | else | |
4928 | { | |
99a814a1 | 4929 | pdata_section = subseg_new (".pdata", 0); |
252b5132 | 4930 | } |
99a814a1 | 4931 | ppc_set_current_section (pdata_section); |
252b5132 RH |
4932 | } |
4933 | ||
4934 | /* pseudo-op: .ydata | |
4935 | behaviour: predefined read only data section | |
b34976b6 | 4936 | double word aligned |
252b5132 RH |
4937 | errors: None |
4938 | warnings: None | |
4939 | initial: .section .ydata "drw3" | |
b34976b6 | 4940 | a - don't know -- maybe a misprint |
252b5132 RH |
4941 | d - initialized data |
4942 | r - readable | |
4943 | 3 - double word aligned (that would be 4 byte boundary) | |
4944 | commentary: | |
4945 | Tag tables (also known as the scope table) for exception handling, | |
99a814a1 AM |
4946 | debugging, etc. */ |
4947 | ||
252b5132 | 4948 | static void |
98027b10 | 4949 | ppc_ydata (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 4950 | { |
81d4177b | 4951 | if (ydata_section == 0) |
252b5132 RH |
4952 | { |
4953 | ydata_section = subseg_new (".ydata", 0); | |
4954 | bfd_set_section_flags (stdoutput, ydata_section, | |
99a814a1 AM |
4955 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC |
4956 | | SEC_READONLY | SEC_DATA )); | |
252b5132 RH |
4957 | |
4958 | bfd_set_section_alignment (stdoutput, ydata_section, 3); | |
4959 | } | |
4960 | else | |
4961 | { | |
4962 | ydata_section = subseg_new (".ydata", 0); | |
4963 | } | |
99a814a1 | 4964 | ppc_set_current_section (ydata_section); |
252b5132 RH |
4965 | } |
4966 | ||
4967 | /* pseudo-op: .reldata | |
4968 | behaviour: predefined read write data section | |
b34976b6 | 4969 | double word aligned (4-byte) |
252b5132 RH |
4970 | FIXME: relocation is applied to it |
4971 | FIXME: what's the difference between this and .data? | |
4972 | errors: None | |
4973 | warnings: None | |
4974 | initial: .section .reldata "drw3" | |
4975 | d - initialized data | |
4976 | r - readable | |
4977 | w - writeable | |
4978 | 3 - double word aligned (that would be 8 byte boundary) | |
4979 | ||
4980 | commentary: | |
4981 | Like .data, but intended to hold data subject to relocation, such as | |
99a814a1 AM |
4982 | function descriptors, etc. */ |
4983 | ||
252b5132 | 4984 | static void |
98027b10 | 4985 | ppc_reldata (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4986 | { |
4987 | if (reldata_section == 0) | |
4988 | { | |
4989 | reldata_section = subseg_new (".reldata", 0); | |
4990 | ||
4991 | bfd_set_section_flags (stdoutput, reldata_section, | |
99a814a1 AM |
4992 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC |
4993 | | SEC_DATA)); | |
252b5132 RH |
4994 | |
4995 | bfd_set_section_alignment (stdoutput, reldata_section, 2); | |
4996 | } | |
4997 | else | |
4998 | { | |
4999 | reldata_section = subseg_new (".reldata", 0); | |
5000 | } | |
99a814a1 | 5001 | ppc_set_current_section (reldata_section); |
252b5132 RH |
5002 | } |
5003 | ||
5004 | /* pseudo-op: .rdata | |
5005 | behaviour: predefined read only data section | |
b34976b6 | 5006 | double word aligned |
252b5132 RH |
5007 | errors: None |
5008 | warnings: None | |
5009 | initial: .section .rdata "dr3" | |
5010 | d - initialized data | |
5011 | r - readable | |
99a814a1 AM |
5012 | 3 - double word aligned (that would be 4 byte boundary) */ |
5013 | ||
252b5132 | 5014 | static void |
98027b10 | 5015 | ppc_rdata (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5016 | { |
5017 | if (rdata_section == 0) | |
5018 | { | |
5019 | rdata_section = subseg_new (".rdata", 0); | |
5020 | bfd_set_section_flags (stdoutput, rdata_section, | |
5021 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC | |
5022 | | SEC_READONLY | SEC_DATA )); | |
5023 | ||
5024 | bfd_set_section_alignment (stdoutput, rdata_section, 2); | |
5025 | } | |
5026 | else | |
5027 | { | |
5028 | rdata_section = subseg_new (".rdata", 0); | |
5029 | } | |
99a814a1 | 5030 | ppc_set_current_section (rdata_section); |
252b5132 RH |
5031 | } |
5032 | ||
5033 | /* pseudo-op: .ualong | |
81d4177b | 5034 | behaviour: much like .int, with the exception that no alignment is |
b34976b6 | 5035 | performed. |
252b5132 RH |
5036 | FIXME: test the alignment statement |
5037 | errors: None | |
99a814a1 AM |
5038 | warnings: None */ |
5039 | ||
252b5132 | 5040 | static void |
98027b10 | 5041 | ppc_ualong (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 5042 | { |
99a814a1 AM |
5043 | /* Try for long. */ |
5044 | cons (4); | |
252b5132 RH |
5045 | } |
5046 | ||
5047 | /* pseudo-op: .znop <symbol name> | |
5048 | behaviour: Issue a nop instruction | |
b34976b6 | 5049 | Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using |
252b5132 RH |
5050 | the supplied symbol name. |
5051 | errors: None | |
99a814a1 AM |
5052 | warnings: Missing symbol name */ |
5053 | ||
252b5132 | 5054 | static void |
98027b10 | 5055 | ppc_znop (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5056 | { |
5057 | unsigned long insn; | |
5058 | const struct powerpc_opcode *opcode; | |
252b5132 | 5059 | char *f; |
252b5132 | 5060 | symbolS *sym; |
252b5132 RH |
5061 | char *symbol_name; |
5062 | char c; | |
5063 | char *name; | |
252b5132 | 5064 | |
99a814a1 | 5065 | /* Strip out the symbol name. */ |
252b5132 RH |
5066 | symbol_name = input_line_pointer; |
5067 | c = get_symbol_end (); | |
5068 | ||
5069 | name = xmalloc (input_line_pointer - symbol_name + 1); | |
5070 | strcpy (name, symbol_name); | |
5071 | ||
5072 | sym = symbol_find_or_make (name); | |
5073 | ||
5074 | *input_line_pointer = c; | |
5075 | ||
5076 | SKIP_WHITESPACE (); | |
5077 | ||
5078 | /* Look up the opcode in the hash table. */ | |
5079 | opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop"); | |
5080 | ||
99a814a1 | 5081 | /* Stick in the nop. */ |
252b5132 RH |
5082 | insn = opcode->opcode; |
5083 | ||
5084 | /* Write out the instruction. */ | |
5085 | f = frag_more (4); | |
5086 | md_number_to_chars (f, insn, 4); | |
5087 | fix_new (frag_now, | |
5088 | f - frag_now->fr_literal, | |
5089 | 4, | |
5090 | sym, | |
5091 | 0, | |
5092 | 0, | |
5093 | BFD_RELOC_16_GOT_PCREL); | |
5094 | ||
5095 | } | |
5096 | ||
81d4177b KH |
5097 | /* pseudo-op: |
5098 | behaviour: | |
5099 | errors: | |
99a814a1 AM |
5100 | warnings: */ |
5101 | ||
252b5132 | 5102 | static void |
98027b10 | 5103 | ppc_pe_comm (int lcomm) |
252b5132 | 5104 | { |
98027b10 AM |
5105 | char *name; |
5106 | char c; | |
5107 | char *p; | |
252b5132 | 5108 | offsetT temp; |
98027b10 | 5109 | symbolS *symbolP; |
252b5132 RH |
5110 | offsetT align; |
5111 | ||
5112 | name = input_line_pointer; | |
5113 | c = get_symbol_end (); | |
5114 | ||
99a814a1 | 5115 | /* just after name is now '\0'. */ |
252b5132 RH |
5116 | p = input_line_pointer; |
5117 | *p = c; | |
5118 | SKIP_WHITESPACE (); | |
5119 | if (*input_line_pointer != ',') | |
5120 | { | |
d6ed37ed | 5121 | as_bad (_("expected comma after symbol-name: rest of line ignored.")); |
252b5132 RH |
5122 | ignore_rest_of_line (); |
5123 | return; | |
5124 | } | |
5125 | ||
5126 | input_line_pointer++; /* skip ',' */ | |
5127 | if ((temp = get_absolute_expression ()) < 0) | |
5128 | { | |
5129 | as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp); | |
5130 | ignore_rest_of_line (); | |
5131 | return; | |
5132 | } | |
5133 | ||
5134 | if (! lcomm) | |
5135 | { | |
5136 | /* The third argument to .comm is the alignment. */ | |
5137 | if (*input_line_pointer != ',') | |
5138 | align = 3; | |
5139 | else | |
5140 | { | |
5141 | ++input_line_pointer; | |
5142 | align = get_absolute_expression (); | |
5143 | if (align <= 0) | |
5144 | { | |
5145 | as_warn (_("ignoring bad alignment")); | |
5146 | align = 3; | |
5147 | } | |
5148 | } | |
5149 | } | |
5150 | ||
5151 | *p = 0; | |
5152 | symbolP = symbol_find_or_make (name); | |
5153 | ||
5154 | *p = c; | |
5155 | if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) | |
5156 | { | |
d6ed37ed | 5157 | as_bad (_("ignoring attempt to re-define symbol `%s'."), |
252b5132 RH |
5158 | S_GET_NAME (symbolP)); |
5159 | ignore_rest_of_line (); | |
5160 | return; | |
5161 | } | |
5162 | ||
5163 | if (S_GET_VALUE (symbolP)) | |
5164 | { | |
5165 | if (S_GET_VALUE (symbolP) != (valueT) temp) | |
d6ed37ed | 5166 | as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."), |
252b5132 RH |
5167 | S_GET_NAME (symbolP), |
5168 | (long) S_GET_VALUE (symbolP), | |
5169 | (long) temp); | |
5170 | } | |
5171 | else | |
5172 | { | |
5173 | S_SET_VALUE (symbolP, (valueT) temp); | |
5174 | S_SET_EXTERNAL (symbolP); | |
86ebace2 | 5175 | S_SET_SEGMENT (symbolP, bfd_com_section_ptr); |
252b5132 RH |
5176 | } |
5177 | ||
5178 | demand_empty_rest_of_line (); | |
5179 | } | |
5180 | ||
5181 | /* | |
5182 | * implement the .section pseudo op: | |
5183 | * .section name {, "flags"} | |
5184 | * ^ ^ | |
5185 | * | +--- optional flags: 'b' for bss | |
5186 | * | 'i' for info | |
5187 | * +-- section name 'l' for lib | |
5188 | * 'n' for noload | |
5189 | * 'o' for over | |
5190 | * 'w' for data | |
5191 | * 'd' (apparently m88k for data) | |
5192 | * 'x' for text | |
5193 | * But if the argument is not a quoted string, treat it as a | |
5194 | * subsegment number. | |
5195 | * | |
5196 | * FIXME: this is a copy of the section processing from obj-coff.c, with | |
5197 | * additions/changes for the moto-pas assembler support. There are three | |
5198 | * categories: | |
5199 | * | |
81d4177b | 5200 | * FIXME: I just noticed this. This doesn't work at all really. It it |
252b5132 RH |
5201 | * setting bits that bfd probably neither understands or uses. The |
5202 | * correct approach (?) will have to incorporate extra fields attached | |
5203 | * to the section to hold the system specific stuff. (krk) | |
5204 | * | |
5205 | * Section Contents: | |
5206 | * 'a' - unknown - referred to in documentation, but no definition supplied | |
5207 | * 'c' - section has code | |
5208 | * 'd' - section has initialized data | |
5209 | * 'u' - section has uninitialized data | |
5210 | * 'i' - section contains directives (info) | |
5211 | * 'n' - section can be discarded | |
5212 | * 'R' - remove section at link time | |
5213 | * | |
5214 | * Section Protection: | |
5215 | * 'r' - section is readable | |
5216 | * 'w' - section is writeable | |
5217 | * 'x' - section is executable | |
5218 | * 's' - section is sharable | |
5219 | * | |
5220 | * Section Alignment: | |
5221 | * '0' - align to byte boundary | |
5222 | * '1' - align to halfword undary | |
5223 | * '2' - align to word boundary | |
5224 | * '3' - align to doubleword boundary | |
5225 | * '4' - align to quadword boundary | |
5226 | * '5' - align to 32 byte boundary | |
5227 | * '6' - align to 64 byte boundary | |
5228 | * | |
5229 | */ | |
5230 | ||
5231 | void | |
98027b10 | 5232 | ppc_pe_section (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 5233 | { |
99a814a1 | 5234 | /* Strip out the section name. */ |
252b5132 RH |
5235 | char *section_name; |
5236 | char c; | |
5237 | char *name; | |
5238 | unsigned int exp; | |
5239 | flagword flags; | |
5240 | segT sec; | |
5241 | int align; | |
5242 | ||
5243 | section_name = input_line_pointer; | |
5244 | c = get_symbol_end (); | |
5245 | ||
5246 | name = xmalloc (input_line_pointer - section_name + 1); | |
5247 | strcpy (name, section_name); | |
5248 | ||
5249 | *input_line_pointer = c; | |
5250 | ||
5251 | SKIP_WHITESPACE (); | |
5252 | ||
5253 | exp = 0; | |
5254 | flags = SEC_NO_FLAGS; | |
5255 | ||
5256 | if (strcmp (name, ".idata$2") == 0) | |
5257 | { | |
5258 | align = 0; | |
5259 | } | |
5260 | else if (strcmp (name, ".idata$3") == 0) | |
5261 | { | |
5262 | align = 0; | |
5263 | } | |
5264 | else if (strcmp (name, ".idata$4") == 0) | |
5265 | { | |
5266 | align = 2; | |
5267 | } | |
5268 | else if (strcmp (name, ".idata$5") == 0) | |
5269 | { | |
5270 | align = 2; | |
5271 | } | |
5272 | else if (strcmp (name, ".idata$6") == 0) | |
5273 | { | |
5274 | align = 1; | |
5275 | } | |
5276 | else | |
99a814a1 AM |
5277 | /* Default alignment to 16 byte boundary. */ |
5278 | align = 4; | |
252b5132 RH |
5279 | |
5280 | if (*input_line_pointer == ',') | |
5281 | { | |
5282 | ++input_line_pointer; | |
5283 | SKIP_WHITESPACE (); | |
5284 | if (*input_line_pointer != '"') | |
5285 | exp = get_absolute_expression (); | |
5286 | else | |
5287 | { | |
5288 | ++input_line_pointer; | |
5289 | while (*input_line_pointer != '"' | |
5290 | && ! is_end_of_line[(unsigned char) *input_line_pointer]) | |
5291 | { | |
5292 | switch (*input_line_pointer) | |
5293 | { | |
5294 | /* Section Contents */ | |
5295 | case 'a': /* unknown */ | |
d6ed37ed | 5296 | as_bad (_("unsupported section attribute -- 'a'")); |
252b5132 RH |
5297 | break; |
5298 | case 'c': /* code section */ | |
81d4177b | 5299 | flags |= SEC_CODE; |
252b5132 RH |
5300 | break; |
5301 | case 'd': /* section has initialized data */ | |
5302 | flags |= SEC_DATA; | |
5303 | break; | |
5304 | case 'u': /* section has uninitialized data */ | |
5305 | /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA | |
5306 | in winnt.h */ | |
5307 | flags |= SEC_ROM; | |
5308 | break; | |
5309 | case 'i': /* section contains directives (info) */ | |
5310 | /* FIXME: This is IMAGE_SCN_LNK_INFO | |
5311 | in winnt.h */ | |
5312 | flags |= SEC_HAS_CONTENTS; | |
5313 | break; | |
5314 | case 'n': /* section can be discarded */ | |
81d4177b | 5315 | flags &=~ SEC_LOAD; |
252b5132 RH |
5316 | break; |
5317 | case 'R': /* Remove section at link time */ | |
5318 | flags |= SEC_NEVER_LOAD; | |
5319 | break; | |
8d452c78 | 5320 | #if IFLICT_BRAIN_DAMAGE |
252b5132 RH |
5321 | /* Section Protection */ |
5322 | case 'r': /* section is readable */ | |
5323 | flags |= IMAGE_SCN_MEM_READ; | |
5324 | break; | |
5325 | case 'w': /* section is writeable */ | |
5326 | flags |= IMAGE_SCN_MEM_WRITE; | |
5327 | break; | |
5328 | case 'x': /* section is executable */ | |
5329 | flags |= IMAGE_SCN_MEM_EXECUTE; | |
5330 | break; | |
5331 | case 's': /* section is sharable */ | |
5332 | flags |= IMAGE_SCN_MEM_SHARED; | |
5333 | break; | |
5334 | ||
5335 | /* Section Alignment */ | |
5336 | case '0': /* align to byte boundary */ | |
5337 | flags |= IMAGE_SCN_ALIGN_1BYTES; | |
5338 | align = 0; | |
5339 | break; | |
5340 | case '1': /* align to halfword boundary */ | |
5341 | flags |= IMAGE_SCN_ALIGN_2BYTES; | |
5342 | align = 1; | |
5343 | break; | |
5344 | case '2': /* align to word boundary */ | |
5345 | flags |= IMAGE_SCN_ALIGN_4BYTES; | |
5346 | align = 2; | |
5347 | break; | |
5348 | case '3': /* align to doubleword boundary */ | |
5349 | flags |= IMAGE_SCN_ALIGN_8BYTES; | |
5350 | align = 3; | |
5351 | break; | |
5352 | case '4': /* align to quadword boundary */ | |
5353 | flags |= IMAGE_SCN_ALIGN_16BYTES; | |
5354 | align = 4; | |
5355 | break; | |
5356 | case '5': /* align to 32 byte boundary */ | |
5357 | flags |= IMAGE_SCN_ALIGN_32BYTES; | |
5358 | align = 5; | |
5359 | break; | |
5360 | case '6': /* align to 64 byte boundary */ | |
5361 | flags |= IMAGE_SCN_ALIGN_64BYTES; | |
5362 | align = 6; | |
5363 | break; | |
8d452c78 | 5364 | #endif |
252b5132 | 5365 | default: |
99a814a1 AM |
5366 | as_bad (_("unknown section attribute '%c'"), |
5367 | *input_line_pointer); | |
252b5132 RH |
5368 | break; |
5369 | } | |
5370 | ++input_line_pointer; | |
5371 | } | |
5372 | if (*input_line_pointer == '"') | |
5373 | ++input_line_pointer; | |
5374 | } | |
5375 | } | |
5376 | ||
5377 | sec = subseg_new (name, (subsegT) exp); | |
5378 | ||
99a814a1 | 5379 | ppc_set_current_section (sec); |
252b5132 RH |
5380 | |
5381 | if (flags != SEC_NO_FLAGS) | |
5382 | { | |
5383 | if (! bfd_set_section_flags (stdoutput, sec, flags)) | |
5384 | as_bad (_("error setting flags for \"%s\": %s"), | |
5385 | bfd_section_name (stdoutput, sec), | |
5386 | bfd_errmsg (bfd_get_error ())); | |
5387 | } | |
5388 | ||
99a814a1 | 5389 | bfd_set_section_alignment (stdoutput, sec, align); |
252b5132 RH |
5390 | } |
5391 | ||
5392 | static void | |
98027b10 | 5393 | ppc_pe_function (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5394 | { |
5395 | char *name; | |
5396 | char endc; | |
5397 | symbolS *ext_sym; | |
5398 | ||
5399 | name = input_line_pointer; | |
5400 | endc = get_symbol_end (); | |
5401 | ||
5402 | ext_sym = symbol_find_or_make (name); | |
5403 | ||
5404 | *input_line_pointer = endc; | |
5405 | ||
5406 | S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT); | |
5407 | SF_SET_FUNCTION (ext_sym); | |
5408 | SF_SET_PROCESS (ext_sym); | |
5409 | coff_add_linesym (ext_sym); | |
5410 | ||
5411 | demand_empty_rest_of_line (); | |
5412 | } | |
5413 | ||
5414 | static void | |
98027b10 | 5415 | ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5416 | { |
5417 | if (tocdata_section == 0) | |
5418 | { | |
5419 | tocdata_section = subseg_new (".tocd", 0); | |
99a814a1 | 5420 | /* FIXME: section flags won't work. */ |
252b5132 RH |
5421 | bfd_set_section_flags (stdoutput, tocdata_section, |
5422 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC | |
99a814a1 | 5423 | | SEC_READONLY | SEC_DATA)); |
252b5132 RH |
5424 | |
5425 | bfd_set_section_alignment (stdoutput, tocdata_section, 2); | |
5426 | } | |
5427 | else | |
5428 | { | |
5429 | rdata_section = subseg_new (".tocd", 0); | |
5430 | } | |
5431 | ||
99a814a1 | 5432 | ppc_set_current_section (tocdata_section); |
252b5132 RH |
5433 | |
5434 | demand_empty_rest_of_line (); | |
5435 | } | |
5436 | ||
5437 | /* Don't adjust TOC relocs to use the section symbol. */ | |
5438 | ||
5439 | int | |
98027b10 | 5440 | ppc_pe_fix_adjustable (fixS *fix) |
252b5132 RH |
5441 | { |
5442 | return fix->fx_r_type != BFD_RELOC_PPC_TOC16; | |
5443 | } | |
5444 | ||
5445 | #endif | |
5446 | \f | |
5447 | #ifdef OBJ_XCOFF | |
5448 | ||
5449 | /* XCOFF specific symbol and file handling. */ | |
5450 | ||
5451 | /* Canonicalize the symbol name. We use the to force the suffix, if | |
5452 | any, to use square brackets, and to be in upper case. */ | |
5453 | ||
5454 | char * | |
98027b10 | 5455 | ppc_canonicalize_symbol_name (char *name) |
252b5132 RH |
5456 | { |
5457 | char *s; | |
5458 | ||
5459 | if (ppc_stab_symbol) | |
5460 | return name; | |
5461 | ||
5462 | for (s = name; *s != '\0' && *s != '{' && *s != '['; s++) | |
5463 | ; | |
5464 | if (*s != '\0') | |
5465 | { | |
5466 | char brac; | |
5467 | ||
5468 | if (*s == '[') | |
5469 | brac = ']'; | |
5470 | else | |
5471 | { | |
5472 | *s = '['; | |
5473 | brac = '}'; | |
5474 | } | |
5475 | ||
5476 | for (s++; *s != '\0' && *s != brac; s++) | |
3882b010 | 5477 | *s = TOUPPER (*s); |
252b5132 RH |
5478 | |
5479 | if (*s == '\0' || s[1] != '\0') | |
5480 | as_bad (_("bad symbol suffix")); | |
5481 | ||
5482 | *s = ']'; | |
5483 | } | |
5484 | ||
5485 | return name; | |
5486 | } | |
5487 | ||
5488 | /* Set the class of a symbol based on the suffix, if any. This is | |
5489 | called whenever a new symbol is created. */ | |
5490 | ||
5491 | void | |
98027b10 | 5492 | ppc_symbol_new_hook (symbolS *sym) |
252b5132 | 5493 | { |
809ffe0d | 5494 | struct ppc_tc_sy *tc; |
252b5132 RH |
5495 | const char *s; |
5496 | ||
809ffe0d ILT |
5497 | tc = symbol_get_tc (sym); |
5498 | tc->next = NULL; | |
5499 | tc->output = 0; | |
96d56e9f | 5500 | tc->symbol_class = -1; |
809ffe0d ILT |
5501 | tc->real_name = NULL; |
5502 | tc->subseg = 0; | |
5503 | tc->align = 0; | |
85645aed TG |
5504 | tc->u.size = NULL; |
5505 | tc->u.dw = NULL; | |
809ffe0d | 5506 | tc->within = NULL; |
252b5132 RH |
5507 | |
5508 | if (ppc_stab_symbol) | |
5509 | return; | |
5510 | ||
5511 | s = strchr (S_GET_NAME (sym), '['); | |
5512 | if (s == (const char *) NULL) | |
5513 | { | |
5514 | /* There is no suffix. */ | |
5515 | return; | |
5516 | } | |
5517 | ||
5518 | ++s; | |
5519 | ||
5520 | switch (s[0]) | |
5521 | { | |
5522 | case 'B': | |
5523 | if (strcmp (s, "BS]") == 0) | |
96d56e9f | 5524 | tc->symbol_class = XMC_BS; |
252b5132 RH |
5525 | break; |
5526 | case 'D': | |
5527 | if (strcmp (s, "DB]") == 0) | |
96d56e9f | 5528 | tc->symbol_class = XMC_DB; |
252b5132 | 5529 | else if (strcmp (s, "DS]") == 0) |
96d56e9f | 5530 | tc->symbol_class = XMC_DS; |
252b5132 RH |
5531 | break; |
5532 | case 'G': | |
5533 | if (strcmp (s, "GL]") == 0) | |
96d56e9f | 5534 | tc->symbol_class = XMC_GL; |
252b5132 RH |
5535 | break; |
5536 | case 'P': | |
5537 | if (strcmp (s, "PR]") == 0) | |
96d56e9f | 5538 | tc->symbol_class = XMC_PR; |
252b5132 RH |
5539 | break; |
5540 | case 'R': | |
5541 | if (strcmp (s, "RO]") == 0) | |
96d56e9f | 5542 | tc->symbol_class = XMC_RO; |
252b5132 | 5543 | else if (strcmp (s, "RW]") == 0) |
96d56e9f | 5544 | tc->symbol_class = XMC_RW; |
252b5132 RH |
5545 | break; |
5546 | case 'S': | |
5547 | if (strcmp (s, "SV]") == 0) | |
96d56e9f | 5548 | tc->symbol_class = XMC_SV; |
252b5132 RH |
5549 | break; |
5550 | case 'T': | |
5551 | if (strcmp (s, "TC]") == 0) | |
96d56e9f | 5552 | tc->symbol_class = XMC_TC; |
252b5132 | 5553 | else if (strcmp (s, "TI]") == 0) |
96d56e9f | 5554 | tc->symbol_class = XMC_TI; |
252b5132 | 5555 | else if (strcmp (s, "TB]") == 0) |
96d56e9f | 5556 | tc->symbol_class = XMC_TB; |
252b5132 | 5557 | else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0) |
96d56e9f | 5558 | tc->symbol_class = XMC_TC0; |
252b5132 RH |
5559 | break; |
5560 | case 'U': | |
5561 | if (strcmp (s, "UA]") == 0) | |
96d56e9f | 5562 | tc->symbol_class = XMC_UA; |
252b5132 | 5563 | else if (strcmp (s, "UC]") == 0) |
96d56e9f | 5564 | tc->symbol_class = XMC_UC; |
252b5132 RH |
5565 | break; |
5566 | case 'X': | |
5567 | if (strcmp (s, "XO]") == 0) | |
96d56e9f | 5568 | tc->symbol_class = XMC_XO; |
252b5132 RH |
5569 | break; |
5570 | } | |
5571 | ||
96d56e9f | 5572 | if (tc->symbol_class == -1) |
d6ed37ed | 5573 | as_bad (_("unrecognized symbol suffix")); |
252b5132 RH |
5574 | } |
5575 | ||
5576 | /* Set the class of a label based on where it is defined. This | |
5577 | handles symbols without suffixes. Also, move the symbol so that it | |
5578 | follows the csect symbol. */ | |
5579 | ||
5580 | void | |
98027b10 | 5581 | ppc_frob_label (symbolS *sym) |
252b5132 RH |
5582 | { |
5583 | if (ppc_current_csect != (symbolS *) NULL) | |
5584 | { | |
96d56e9f NC |
5585 | if (symbol_get_tc (sym)->symbol_class == -1) |
5586 | symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class; | |
252b5132 RH |
5587 | |
5588 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
809ffe0d ILT |
5589 | symbol_append (sym, symbol_get_tc (ppc_current_csect)->within, |
5590 | &symbol_rootP, &symbol_lastP); | |
5591 | symbol_get_tc (ppc_current_csect)->within = sym; | |
2fb4b302 | 5592 | symbol_get_tc (sym)->within = ppc_current_csect; |
252b5132 | 5593 | } |
07a53e5c RH |
5594 | |
5595 | #ifdef OBJ_ELF | |
5596 | dwarf2_emit_label (sym); | |
5597 | #endif | |
252b5132 RH |
5598 | } |
5599 | ||
5600 | /* This variable is set by ppc_frob_symbol if any absolute symbols are | |
5601 | seen. It tells ppc_adjust_symtab whether it needs to look through | |
5602 | the symbols. */ | |
5603 | ||
b34976b6 | 5604 | static bfd_boolean ppc_saw_abs; |
252b5132 RH |
5605 | |
5606 | /* Change the name of a symbol just before writing it out. Set the | |
5607 | real name if the .rename pseudo-op was used. Otherwise, remove any | |
5608 | class suffix. Return 1 if the symbol should not be included in the | |
5609 | symbol table. */ | |
5610 | ||
5611 | int | |
98027b10 | 5612 | ppc_frob_symbol (symbolS *sym) |
252b5132 RH |
5613 | { |
5614 | static symbolS *ppc_last_function; | |
5615 | static symbolS *set_end; | |
5616 | ||
5617 | /* Discard symbols that should not be included in the output symbol | |
5618 | table. */ | |
809ffe0d ILT |
5619 | if (! symbol_used_in_reloc_p (sym) |
5620 | && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0 | |
670ec21d | 5621 | || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym)) |
809ffe0d | 5622 | && ! symbol_get_tc (sym)->output |
252b5132 RH |
5623 | && S_GET_STORAGE_CLASS (sym) != C_FILE))) |
5624 | return 1; | |
5625 | ||
a161fe53 AM |
5626 | /* This one will disappear anyway. Don't make a csect sym for it. */ |
5627 | if (sym == abs_section_sym) | |
5628 | return 1; | |
5629 | ||
809ffe0d ILT |
5630 | if (symbol_get_tc (sym)->real_name != (char *) NULL) |
5631 | S_SET_NAME (sym, symbol_get_tc (sym)->real_name); | |
252b5132 RH |
5632 | else |
5633 | { | |
5634 | const char *name; | |
5635 | const char *s; | |
5636 | ||
5637 | name = S_GET_NAME (sym); | |
5638 | s = strchr (name, '['); | |
5639 | if (s != (char *) NULL) | |
5640 | { | |
5641 | unsigned int len; | |
5642 | char *snew; | |
5643 | ||
5644 | len = s - name; | |
5645 | snew = xmalloc (len + 1); | |
5646 | memcpy (snew, name, len); | |
5647 | snew[len] = '\0'; | |
5648 | ||
5649 | S_SET_NAME (sym, snew); | |
5650 | } | |
5651 | } | |
5652 | ||
5653 | if (set_end != (symbolS *) NULL) | |
5654 | { | |
5655 | SA_SET_SYM_ENDNDX (set_end, sym); | |
5656 | set_end = NULL; | |
5657 | } | |
5658 | ||
5659 | if (SF_GET_FUNCTION (sym)) | |
5660 | { | |
5661 | if (ppc_last_function != (symbolS *) NULL) | |
5662 | as_bad (_("two .function pseudo-ops with no intervening .ef")); | |
5663 | ppc_last_function = sym; | |
85645aed | 5664 | if (symbol_get_tc (sym)->u.size != (symbolS *) NULL) |
252b5132 | 5665 | { |
85645aed | 5666 | resolve_symbol_value (symbol_get_tc (sym)->u.size); |
809ffe0d | 5667 | SA_SET_SYM_FSIZE (sym, |
85645aed | 5668 | (long) S_GET_VALUE (symbol_get_tc (sym)->u.size)); |
252b5132 RH |
5669 | } |
5670 | } | |
5671 | else if (S_GET_STORAGE_CLASS (sym) == C_FCN | |
5672 | && strcmp (S_GET_NAME (sym), ".ef") == 0) | |
5673 | { | |
5674 | if (ppc_last_function == (symbolS *) NULL) | |
5675 | as_bad (_(".ef with no preceding .function")); | |
5676 | else | |
5677 | { | |
5678 | set_end = ppc_last_function; | |
5679 | ppc_last_function = NULL; | |
5680 | ||
5681 | /* We don't have a C_EFCN symbol, but we need to force the | |
5682 | COFF backend to believe that it has seen one. */ | |
5683 | coff_last_function = NULL; | |
5684 | } | |
5685 | } | |
5686 | ||
670ec21d | 5687 | if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym)) |
809ffe0d | 5688 | && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0 |
252b5132 RH |
5689 | && S_GET_STORAGE_CLASS (sym) != C_FILE |
5690 | && S_GET_STORAGE_CLASS (sym) != C_FCN | |
5691 | && S_GET_STORAGE_CLASS (sym) != C_BLOCK | |
5692 | && S_GET_STORAGE_CLASS (sym) != C_BSTAT | |
5693 | && S_GET_STORAGE_CLASS (sym) != C_ESTAT | |
5694 | && S_GET_STORAGE_CLASS (sym) != C_BINCL | |
5695 | && S_GET_STORAGE_CLASS (sym) != C_EINCL | |
5696 | && S_GET_SEGMENT (sym) != ppc_coff_debug_section) | |
5697 | S_SET_STORAGE_CLASS (sym, C_HIDEXT); | |
5698 | ||
5699 | if (S_GET_STORAGE_CLASS (sym) == C_EXT | |
8602d4fe | 5700 | || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT |
252b5132 RH |
5701 | || S_GET_STORAGE_CLASS (sym) == C_HIDEXT) |
5702 | { | |
5703 | int i; | |
5704 | union internal_auxent *a; | |
5705 | ||
5706 | /* Create a csect aux. */ | |
5707 | i = S_GET_NUMBER_AUXILIARY (sym); | |
5708 | S_SET_NUMBER_AUXILIARY (sym, i + 1); | |
809ffe0d | 5709 | a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent; |
96d56e9f | 5710 | if (symbol_get_tc (sym)->symbol_class == XMC_TC0) |
252b5132 RH |
5711 | { |
5712 | /* This is the TOC table. */ | |
5713 | know (strcmp (S_GET_NAME (sym), "TOC") == 0); | |
5714 | a->x_csect.x_scnlen.l = 0; | |
5715 | a->x_csect.x_smtyp = (2 << 3) | XTY_SD; | |
5716 | } | |
809ffe0d | 5717 | else if (symbol_get_tc (sym)->subseg != 0) |
252b5132 RH |
5718 | { |
5719 | /* This is a csect symbol. x_scnlen is the size of the | |
5720 | csect. */ | |
809ffe0d | 5721 | if (symbol_get_tc (sym)->next == (symbolS *) NULL) |
252b5132 RH |
5722 | a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput, |
5723 | S_GET_SEGMENT (sym)) | |
5724 | - S_GET_VALUE (sym)); | |
5725 | else | |
5726 | { | |
6386f3a7 | 5727 | resolve_symbol_value (symbol_get_tc (sym)->next); |
809ffe0d | 5728 | a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next) |
252b5132 RH |
5729 | - S_GET_VALUE (sym)); |
5730 | } | |
809ffe0d | 5731 | a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD; |
252b5132 RH |
5732 | } |
5733 | else if (S_GET_SEGMENT (sym) == bss_section) | |
5734 | { | |
5735 | /* This is a common symbol. */ | |
809ffe0d ILT |
5736 | a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset; |
5737 | a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM; | |
252b5132 | 5738 | if (S_IS_EXTERNAL (sym)) |
96d56e9f | 5739 | symbol_get_tc (sym)->symbol_class = XMC_RW; |
252b5132 | 5740 | else |
96d56e9f | 5741 | symbol_get_tc (sym)->symbol_class = XMC_BS; |
252b5132 RH |
5742 | } |
5743 | else if (S_GET_SEGMENT (sym) == absolute_section) | |
5744 | { | |
5745 | /* This is an absolute symbol. The csect will be created by | |
99a814a1 | 5746 | ppc_adjust_symtab. */ |
b34976b6 | 5747 | ppc_saw_abs = TRUE; |
252b5132 | 5748 | a->x_csect.x_smtyp = XTY_LD; |
96d56e9f NC |
5749 | if (symbol_get_tc (sym)->symbol_class == -1) |
5750 | symbol_get_tc (sym)->symbol_class = XMC_XO; | |
252b5132 RH |
5751 | } |
5752 | else if (! S_IS_DEFINED (sym)) | |
5753 | { | |
5754 | /* This is an external symbol. */ | |
5755 | a->x_csect.x_scnlen.l = 0; | |
5756 | a->x_csect.x_smtyp = XTY_ER; | |
5757 | } | |
96d56e9f | 5758 | else if (symbol_get_tc (sym)->symbol_class == XMC_TC) |
252b5132 RH |
5759 | { |
5760 | symbolS *next; | |
5761 | ||
5762 | /* This is a TOC definition. x_scnlen is the size of the | |
5763 | TOC entry. */ | |
5764 | next = symbol_next (sym); | |
96d56e9f | 5765 | while (symbol_get_tc (next)->symbol_class == XMC_TC0) |
252b5132 RH |
5766 | next = symbol_next (next); |
5767 | if (next == (symbolS *) NULL | |
96d56e9f | 5768 | || symbol_get_tc (next)->symbol_class != XMC_TC) |
252b5132 RH |
5769 | { |
5770 | if (ppc_after_toc_frag == (fragS *) NULL) | |
5771 | a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput, | |
5772 | data_section) | |
5773 | - S_GET_VALUE (sym)); | |
5774 | else | |
5775 | a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address | |
5776 | - S_GET_VALUE (sym)); | |
5777 | } | |
5778 | else | |
5779 | { | |
6386f3a7 | 5780 | resolve_symbol_value (next); |
252b5132 RH |
5781 | a->x_csect.x_scnlen.l = (S_GET_VALUE (next) |
5782 | - S_GET_VALUE (sym)); | |
5783 | } | |
5784 | a->x_csect.x_smtyp = (2 << 3) | XTY_SD; | |
5785 | } | |
5786 | else | |
5787 | { | |
5788 | symbolS *csect; | |
5789 | ||
5790 | /* This is a normal symbol definition. x_scnlen is the | |
5791 | symbol index of the containing csect. */ | |
5792 | if (S_GET_SEGMENT (sym) == text_section) | |
5793 | csect = ppc_text_csects; | |
5794 | else if (S_GET_SEGMENT (sym) == data_section) | |
5795 | csect = ppc_data_csects; | |
5796 | else | |
5797 | abort (); | |
5798 | ||
5799 | /* Skip the initial dummy symbol. */ | |
809ffe0d | 5800 | csect = symbol_get_tc (csect)->next; |
252b5132 RH |
5801 | |
5802 | if (csect == (symbolS *) NULL) | |
5803 | { | |
5804 | as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym)); | |
5805 | a->x_csect.x_scnlen.l = 0; | |
5806 | } | |
5807 | else | |
5808 | { | |
809ffe0d | 5809 | while (symbol_get_tc (csect)->next != (symbolS *) NULL) |
252b5132 | 5810 | { |
6386f3a7 | 5811 | resolve_symbol_value (symbol_get_tc (csect)->next); |
809ffe0d ILT |
5812 | if (S_GET_VALUE (symbol_get_tc (csect)->next) |
5813 | > S_GET_VALUE (sym)) | |
252b5132 | 5814 | break; |
809ffe0d | 5815 | csect = symbol_get_tc (csect)->next; |
252b5132 RH |
5816 | } |
5817 | ||
809ffe0d ILT |
5818 | a->x_csect.x_scnlen.p = |
5819 | coffsymbol (symbol_get_bfdsym (csect))->native; | |
5820 | coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen = | |
5821 | 1; | |
252b5132 RH |
5822 | } |
5823 | a->x_csect.x_smtyp = XTY_LD; | |
5824 | } | |
81d4177b | 5825 | |
252b5132 RH |
5826 | a->x_csect.x_parmhash = 0; |
5827 | a->x_csect.x_snhash = 0; | |
96d56e9f | 5828 | if (symbol_get_tc (sym)->symbol_class == -1) |
252b5132 RH |
5829 | a->x_csect.x_smclas = XMC_PR; |
5830 | else | |
96d56e9f | 5831 | a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class; |
252b5132 RH |
5832 | a->x_csect.x_stab = 0; |
5833 | a->x_csect.x_snstab = 0; | |
5834 | ||
5835 | /* Don't let the COFF backend resort these symbols. */ | |
809ffe0d | 5836 | symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END; |
252b5132 RH |
5837 | } |
5838 | else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT) | |
5839 | { | |
5840 | /* We want the value to be the symbol index of the referenced | |
5841 | csect symbol. BFD will do that for us if we set the right | |
5842 | flags. */ | |
b782de16 AM |
5843 | asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within); |
5844 | combined_entry_type *c = coffsymbol (bsym)->native; | |
5845 | ||
5846 | S_SET_VALUE (sym, (valueT) (size_t) c); | |
809ffe0d | 5847 | coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1; |
252b5132 RH |
5848 | } |
5849 | else if (S_GET_STORAGE_CLASS (sym) == C_STSYM) | |
5850 | { | |
5851 | symbolS *block; | |
c734e7e3 | 5852 | valueT base; |
252b5132 | 5853 | |
809ffe0d | 5854 | block = symbol_get_tc (sym)->within; |
c734e7e3 TG |
5855 | if (block) |
5856 | { | |
5857 | /* The value is the offset from the enclosing csect. */ | |
5858 | symbolS *csect; | |
5859 | ||
5860 | csect = symbol_get_tc (block)->within; | |
5861 | resolve_symbol_value (csect); | |
5862 | base = S_GET_VALUE (csect); | |
5863 | } | |
5864 | else | |
5865 | base = 0; | |
5866 | ||
5867 | S_SET_VALUE (sym, S_GET_VALUE (sym) - base); | |
252b5132 RH |
5868 | } |
5869 | else if (S_GET_STORAGE_CLASS (sym) == C_BINCL | |
5870 | || S_GET_STORAGE_CLASS (sym) == C_EINCL) | |
5871 | { | |
5872 | /* We want the value to be a file offset into the line numbers. | |
99a814a1 AM |
5873 | BFD will do that for us if we set the right flags. We have |
5874 | already set the value correctly. */ | |
809ffe0d | 5875 | coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1; |
252b5132 RH |
5876 | } |
5877 | ||
5878 | return 0; | |
5879 | } | |
5880 | ||
5881 | /* Adjust the symbol table. This creates csect symbols for all | |
5882 | absolute symbols. */ | |
5883 | ||
5884 | void | |
98027b10 | 5885 | ppc_adjust_symtab (void) |
252b5132 RH |
5886 | { |
5887 | symbolS *sym; | |
5888 | ||
5889 | if (! ppc_saw_abs) | |
5890 | return; | |
5891 | ||
5892 | for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym)) | |
5893 | { | |
5894 | symbolS *csect; | |
5895 | int i; | |
5896 | union internal_auxent *a; | |
5897 | ||
5898 | if (S_GET_SEGMENT (sym) != absolute_section) | |
5899 | continue; | |
5900 | ||
5901 | csect = symbol_create (".abs[XO]", absolute_section, | |
5902 | S_GET_VALUE (sym), &zero_address_frag); | |
809ffe0d | 5903 | symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym); |
252b5132 RH |
5904 | S_SET_STORAGE_CLASS (csect, C_HIDEXT); |
5905 | i = S_GET_NUMBER_AUXILIARY (csect); | |
5906 | S_SET_NUMBER_AUXILIARY (csect, i + 1); | |
809ffe0d | 5907 | a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent; |
252b5132 RH |
5908 | a->x_csect.x_scnlen.l = 0; |
5909 | a->x_csect.x_smtyp = XTY_SD; | |
5910 | a->x_csect.x_parmhash = 0; | |
5911 | a->x_csect.x_snhash = 0; | |
5912 | a->x_csect.x_smclas = XMC_XO; | |
5913 | a->x_csect.x_stab = 0; | |
5914 | a->x_csect.x_snstab = 0; | |
5915 | ||
5916 | symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP); | |
5917 | ||
5918 | i = S_GET_NUMBER_AUXILIARY (sym); | |
809ffe0d ILT |
5919 | a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent; |
5920 | a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native; | |
5921 | coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1; | |
252b5132 RH |
5922 | } |
5923 | ||
b34976b6 | 5924 | ppc_saw_abs = FALSE; |
252b5132 RH |
5925 | } |
5926 | ||
5927 | /* Set the VMA for a section. This is called on all the sections in | |
5928 | turn. */ | |
5929 | ||
5930 | void | |
98027b10 | 5931 | ppc_frob_section (asection *sec) |
252b5132 | 5932 | { |
931e13a6 | 5933 | static bfd_vma vma = 0; |
252b5132 | 5934 | |
85645aed TG |
5935 | /* Dwarf sections start at 0. */ |
5936 | if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING) | |
5937 | return; | |
5938 | ||
931e13a6 | 5939 | vma = md_section_align (sec, vma); |
252b5132 RH |
5940 | bfd_set_section_vma (stdoutput, sec, vma); |
5941 | vma += bfd_section_size (stdoutput, sec); | |
5942 | } | |
5943 | ||
5944 | #endif /* OBJ_XCOFF */ | |
5945 | \f | |
252b5132 | 5946 | char * |
98027b10 | 5947 | md_atof (int type, char *litp, int *sizep) |
252b5132 | 5948 | { |
499ac353 | 5949 | return ieee_md_atof (type, litp, sizep, target_big_endian); |
252b5132 RH |
5950 | } |
5951 | ||
5952 | /* Write a value out to the object file, using the appropriate | |
5953 | endianness. */ | |
5954 | ||
5955 | void | |
98027b10 | 5956 | md_number_to_chars (char *buf, valueT val, int n) |
252b5132 RH |
5957 | { |
5958 | if (target_big_endian) | |
5959 | number_to_chars_bigendian (buf, val, n); | |
5960 | else | |
5961 | number_to_chars_littleendian (buf, val, n); | |
5962 | } | |
5963 | ||
5964 | /* Align a section (I don't know why this is machine dependent). */ | |
5965 | ||
5966 | valueT | |
3aeeedbb | 5967 | md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr) |
252b5132 | 5968 | { |
3aeeedbb AM |
5969 | #ifdef OBJ_ELF |
5970 | return addr; | |
5971 | #else | |
252b5132 RH |
5972 | int align = bfd_get_section_alignment (stdoutput, seg); |
5973 | ||
5974 | return ((addr + (1 << align) - 1) & (-1 << align)); | |
3aeeedbb | 5975 | #endif |
252b5132 RH |
5976 | } |
5977 | ||
5978 | /* We don't have any form of relaxing. */ | |
5979 | ||
5980 | int | |
98027b10 AM |
5981 | md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED, |
5982 | asection *seg ATTRIBUTE_UNUSED) | |
252b5132 RH |
5983 | { |
5984 | abort (); | |
5985 | return 0; | |
5986 | } | |
5987 | ||
5988 | /* Convert a machine dependent frag. We never generate these. */ | |
5989 | ||
5990 | void | |
98027b10 AM |
5991 | md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, |
5992 | asection *sec ATTRIBUTE_UNUSED, | |
5993 | fragS *fragp ATTRIBUTE_UNUSED) | |
252b5132 RH |
5994 | { |
5995 | abort (); | |
5996 | } | |
5997 | ||
5998 | /* We have no need to default values of symbols. */ | |
5999 | ||
252b5132 | 6000 | symbolS * |
98027b10 | 6001 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
252b5132 RH |
6002 | { |
6003 | return 0; | |
6004 | } | |
6005 | \f | |
6006 | /* Functions concerning relocs. */ | |
6007 | ||
6008 | /* The location from which a PC relative jump should be calculated, | |
6009 | given a PC relative reloc. */ | |
6010 | ||
6011 | long | |
98027b10 | 6012 | md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED) |
252b5132 RH |
6013 | { |
6014 | return fixp->fx_frag->fr_address + fixp->fx_where; | |
6015 | } | |
6016 | ||
6017 | #ifdef OBJ_XCOFF | |
6018 | ||
6019 | /* This is called to see whether a fixup should be adjusted to use a | |
6020 | section symbol. We take the opportunity to change a fixup against | |
6021 | a symbol in the TOC subsegment into a reloc against the | |
6022 | corresponding .tc symbol. */ | |
6023 | ||
6024 | int | |
98027b10 | 6025 | ppc_fix_adjustable (fixS *fix) |
252b5132 | 6026 | { |
b782de16 AM |
6027 | valueT val = resolve_symbol_value (fix->fx_addsy); |
6028 | segT symseg = S_GET_SEGMENT (fix->fx_addsy); | |
6029 | TC_SYMFIELD_TYPE *tc; | |
6030 | ||
6031 | if (symseg == absolute_section) | |
6032 | return 0; | |
252b5132 | 6033 | |
85645aed TG |
6034 | /* Always adjust symbols in debugging sections. */ |
6035 | if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING) | |
6036 | return 1; | |
6037 | ||
252b5132 | 6038 | if (ppc_toc_csect != (symbolS *) NULL |
252b5132 | 6039 | && fix->fx_addsy != ppc_toc_csect |
b782de16 | 6040 | && symseg == data_section |
252b5132 RH |
6041 | && val >= ppc_toc_frag->fr_address |
6042 | && (ppc_after_toc_frag == (fragS *) NULL | |
6043 | || val < ppc_after_toc_frag->fr_address)) | |
6044 | { | |
6045 | symbolS *sy; | |
6046 | ||
6047 | for (sy = symbol_next (ppc_toc_csect); | |
6048 | sy != (symbolS *) NULL; | |
6049 | sy = symbol_next (sy)) | |
6050 | { | |
b782de16 AM |
6051 | TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy); |
6052 | ||
96d56e9f | 6053 | if (sy_tc->symbol_class == XMC_TC0) |
252b5132 | 6054 | continue; |
96d56e9f | 6055 | if (sy_tc->symbol_class != XMC_TC) |
252b5132 | 6056 | break; |
b782de16 | 6057 | if (val == resolve_symbol_value (sy)) |
252b5132 RH |
6058 | { |
6059 | fix->fx_addsy = sy; | |
6060 | fix->fx_addnumber = val - ppc_toc_frag->fr_address; | |
6061 | return 0; | |
6062 | } | |
6063 | } | |
6064 | ||
6065 | as_bad_where (fix->fx_file, fix->fx_line, | |
6066 | _("symbol in .toc does not match any .tc")); | |
6067 | } | |
6068 | ||
6069 | /* Possibly adjust the reloc to be against the csect. */ | |
b782de16 AM |
6070 | tc = symbol_get_tc (fix->fx_addsy); |
6071 | if (tc->subseg == 0 | |
96d56e9f NC |
6072 | && tc->symbol_class != XMC_TC0 |
6073 | && tc->symbol_class != XMC_TC | |
b782de16 | 6074 | && symseg != bss_section |
252b5132 | 6075 | /* Don't adjust if this is a reloc in the toc section. */ |
b782de16 | 6076 | && (symseg != data_section |
252b5132 RH |
6077 | || ppc_toc_csect == NULL |
6078 | || val < ppc_toc_frag->fr_address | |
6079 | || (ppc_after_toc_frag != NULL | |
6080 | && val >= ppc_after_toc_frag->fr_address))) | |
6081 | { | |
2fb4b302 | 6082 | symbolS *csect = tc->within; |
252b5132 | 6083 | |
2fb4b302 TG |
6084 | /* If the symbol was not declared by a label (eg: a section symbol), |
6085 | use the section instead of the csect. This doesn't happen in | |
6086 | normal AIX assembly code. */ | |
6087 | if (csect == NULL) | |
6088 | csect = seg_info (symseg)->sym; | |
252b5132 | 6089 | |
2fb4b302 TG |
6090 | fix->fx_offset += val - symbol_get_frag (csect)->fr_address; |
6091 | fix->fx_addsy = csect; | |
252b5132 | 6092 | |
b782de16 | 6093 | return 0; |
252b5132 RH |
6094 | } |
6095 | ||
6096 | /* Adjust a reloc against a .lcomm symbol to be against the base | |
6097 | .lcomm. */ | |
b782de16 | 6098 | if (symseg == bss_section |
252b5132 RH |
6099 | && ! S_IS_EXTERNAL (fix->fx_addsy)) |
6100 | { | |
b782de16 AM |
6101 | symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol; |
6102 | ||
6103 | fix->fx_offset += val - resolve_symbol_value (sy); | |
6104 | fix->fx_addsy = sy; | |
252b5132 RH |
6105 | } |
6106 | ||
6107 | return 0; | |
6108 | } | |
6109 | ||
6110 | /* A reloc from one csect to another must be kept. The assembler | |
6111 | will, of course, keep relocs between sections, and it will keep | |
6112 | absolute relocs, but we need to force it to keep PC relative relocs | |
6113 | between two csects in the same section. */ | |
6114 | ||
6115 | int | |
98027b10 | 6116 | ppc_force_relocation (fixS *fix) |
252b5132 RH |
6117 | { |
6118 | /* At this point fix->fx_addsy should already have been converted to | |
6119 | a csect symbol. If the csect does not include the fragment, then | |
6120 | we need to force the relocation. */ | |
6121 | if (fix->fx_pcrel | |
6122 | && fix->fx_addsy != NULL | |
809ffe0d ILT |
6123 | && symbol_get_tc (fix->fx_addsy)->subseg != 0 |
6124 | && ((symbol_get_frag (fix->fx_addsy)->fr_address | |
6125 | > fix->fx_frag->fr_address) | |
6126 | || (symbol_get_tc (fix->fx_addsy)->next != NULL | |
6127 | && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address | |
252b5132 RH |
6128 | <= fix->fx_frag->fr_address)))) |
6129 | return 1; | |
6130 | ||
ae6063d4 | 6131 | return generic_force_reloc (fix); |
252b5132 RH |
6132 | } |
6133 | ||
2fb4b302 TG |
6134 | void |
6135 | ppc_new_dot_label (symbolS *sym) | |
6136 | { | |
6137 | /* Anchor this label to the current csect for relocations. */ | |
6138 | symbol_get_tc (sym)->within = ppc_current_csect; | |
6139 | } | |
6140 | ||
252b5132 RH |
6141 | #endif /* OBJ_XCOFF */ |
6142 | ||
0baf16f2 | 6143 | #ifdef OBJ_ELF |
a161fe53 AM |
6144 | /* If this function returns non-zero, it guarantees that a relocation |
6145 | will be emitted for a fixup. */ | |
6146 | ||
6147 | int | |
98027b10 | 6148 | ppc_force_relocation (fixS *fix) |
a161fe53 AM |
6149 | { |
6150 | /* Branch prediction relocations must force a relocation, as must | |
6151 | the vtable description relocs. */ | |
6152 | switch (fix->fx_r_type) | |
6153 | { | |
6154 | case BFD_RELOC_PPC_B16_BRTAKEN: | |
6155 | case BFD_RELOC_PPC_B16_BRNTAKEN: | |
6156 | case BFD_RELOC_PPC_BA16_BRTAKEN: | |
6157 | case BFD_RELOC_PPC_BA16_BRNTAKEN: | |
c744ecf2 | 6158 | case BFD_RELOC_24_PLT_PCREL: |
a161fe53 | 6159 | case BFD_RELOC_PPC64_TOC: |
a161fe53 AM |
6160 | return 1; |
6161 | default: | |
6162 | break; | |
6163 | } | |
6164 | ||
cdba85ec AM |
6165 | if (fix->fx_r_type >= BFD_RELOC_PPC_TLS |
6166 | && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA) | |
6167 | return 1; | |
6168 | ||
ae6063d4 | 6169 | return generic_force_reloc (fix); |
a161fe53 AM |
6170 | } |
6171 | ||
0baf16f2 | 6172 | int |
98027b10 | 6173 | ppc_fix_adjustable (fixS *fix) |
252b5132 | 6174 | { |
0baf16f2 AM |
6175 | return (fix->fx_r_type != BFD_RELOC_16_GOTOFF |
6176 | && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF | |
6177 | && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF | |
6178 | && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF | |
cc9edbf3 AM |
6179 | && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS |
6180 | && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS | |
0baf16f2 AM |
6181 | && fix->fx_r_type != BFD_RELOC_GPREL16 |
6182 | && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT | |
6183 | && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY | |
cdba85ec | 6184 | && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS |
ab1e9ef7 | 6185 | && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)); |
252b5132 | 6186 | } |
0baf16f2 | 6187 | #endif |
252b5132 | 6188 | |
b9c361e0 JL |
6189 | void |
6190 | ppc_frag_check (struct frag *fragP) | |
6191 | { | |
6192 | if (!fragP->has_code) | |
6193 | return; | |
6194 | ||
6195 | if (ppc_mach() == bfd_mach_ppc_vle) | |
6196 | { | |
6197 | if (((fragP->fr_address + fragP->insn_addr) & 1) != 0) | |
6198 | as_bad (_("instruction address is not a multiple of 2")); | |
6199 | } | |
6200 | else | |
6201 | { | |
6202 | if (((fragP->fr_address + fragP->insn_addr) & 3) != 0) | |
6203 | as_bad (_("instruction address is not a multiple of 4")); | |
6204 | } | |
6205 | } | |
6206 | ||
3aeeedbb AM |
6207 | /* Implement HANDLE_ALIGN. This writes the NOP pattern into an |
6208 | rs_align_code frag. */ | |
6209 | ||
6210 | void | |
6211 | ppc_handle_align (struct frag *fragP) | |
6212 | { | |
6213 | valueT count = (fragP->fr_next->fr_address | |
6214 | - (fragP->fr_address + fragP->fr_fix)); | |
6215 | ||
b9c361e0 JL |
6216 | if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0) |
6217 | { | |
6218 | char *dest = fragP->fr_literal + fragP->fr_fix; | |
6219 | ||
6220 | fragP->fr_var = 2; | |
6221 | md_number_to_chars (dest, 0x4400, 2); | |
6222 | } | |
6223 | else if (count != 0 && (count & 3) == 0) | |
3aeeedbb AM |
6224 | { |
6225 | char *dest = fragP->fr_literal + fragP->fr_fix; | |
6226 | ||
6227 | fragP->fr_var = 4; | |
cef4f754 AM |
6228 | |
6229 | if (count > 4 * nop_limit && count < 0x2000000) | |
6230 | { | |
6231 | struct frag *rest; | |
6232 | ||
6233 | /* Make a branch, then follow with nops. Insert another | |
6234 | frag to handle the nops. */ | |
6235 | md_number_to_chars (dest, 0x48000000 + count, 4); | |
6236 | count -= 4; | |
6237 | if (count == 0) | |
6238 | return; | |
6239 | ||
6240 | rest = xmalloc (SIZEOF_STRUCT_FRAG + 4); | |
6241 | memcpy (rest, fragP, SIZEOF_STRUCT_FRAG); | |
6242 | fragP->fr_next = rest; | |
6243 | fragP = rest; | |
6244 | rest->fr_address += rest->fr_fix + 4; | |
6245 | rest->fr_fix = 0; | |
6246 | /* If we leave the next frag as rs_align_code we'll come here | |
6247 | again, resulting in a bunch of branches rather than a | |
6248 | branch followed by nops. */ | |
6249 | rest->fr_type = rs_align; | |
6250 | dest = rest->fr_literal; | |
6251 | } | |
6252 | ||
3aeeedbb AM |
6253 | md_number_to_chars (dest, 0x60000000, 4); |
6254 | ||
42240548 | 6255 | if ((ppc_cpu & PPC_OPCODE_POWER6) != 0 |
5817ffd1 PB |
6256 | || (ppc_cpu & PPC_OPCODE_POWER7) != 0 |
6257 | || (ppc_cpu & PPC_OPCODE_POWER8) != 0) | |
3aeeedbb | 6258 | { |
5817ffd1 | 6259 | /* For power6, power7 and power8, we want the last nop to be a group |
42240548 PB |
6260 | terminating one. Do this by inserting an rs_fill frag immediately |
6261 | after this one, with its address set to the last nop location. | |
6262 | This will automatically reduce the number of nops in the current | |
6263 | frag by one. */ | |
3aeeedbb AM |
6264 | if (count > 4) |
6265 | { | |
6266 | struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4); | |
6267 | ||
6268 | memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG); | |
6269 | group_nop->fr_address = group_nop->fr_next->fr_address - 4; | |
6270 | group_nop->fr_fix = 0; | |
6271 | group_nop->fr_offset = 1; | |
6272 | group_nop->fr_type = rs_fill; | |
6273 | fragP->fr_next = group_nop; | |
6274 | dest = group_nop->fr_literal; | |
6275 | } | |
6276 | ||
5817ffd1 PB |
6277 | if ((ppc_cpu & PPC_OPCODE_POWER7) != 0 |
6278 | || (ppc_cpu & PPC_OPCODE_POWER8) != 0) | |
aea77599 AM |
6279 | { |
6280 | if (ppc_cpu & PPC_OPCODE_E500MC) | |
6281 | /* e500mc group terminating nop: "ori 0,0,0". */ | |
6282 | md_number_to_chars (dest, 0x60000000, 4); | |
6283 | else | |
5817ffd1 | 6284 | /* power7/power8 group terminating nop: "ori 2,2,0". */ |
aea77599 AM |
6285 | md_number_to_chars (dest, 0x60420000, 4); |
6286 | } | |
42240548 PB |
6287 | else |
6288 | /* power6 group terminating nop: "ori 1,1,0". */ | |
6289 | md_number_to_chars (dest, 0x60210000, 4); | |
3aeeedbb AM |
6290 | } |
6291 | } | |
6292 | } | |
6293 | ||
252b5132 | 6294 | /* Apply a fixup to the object code. This is called for all the |
3b8b57a9 | 6295 | fixups we generated by the calls to fix_new_exp, above. */ |
252b5132 | 6296 | |
94f592af | 6297 | void |
98027b10 | 6298 | md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) |
252b5132 | 6299 | { |
94f592af | 6300 | valueT value = * valP; |
5656a981 AM |
6301 | offsetT fieldval; |
6302 | const struct powerpc_operand *operand; | |
252b5132 RH |
6303 | |
6304 | #ifdef OBJ_ELF | |
94f592af | 6305 | if (fixP->fx_addsy != NULL) |
252b5132 | 6306 | { |
a161fe53 | 6307 | /* Hack around bfd_install_relocation brain damage. */ |
94f592af NC |
6308 | if (fixP->fx_pcrel) |
6309 | value += fixP->fx_frag->fr_address + fixP->fx_where; | |
252b5132 RH |
6310 | } |
6311 | else | |
94f592af | 6312 | fixP->fx_done = 1; |
252b5132 | 6313 | #else |
a161fe53 | 6314 | /* FIXME FIXME FIXME: The value we are passed in *valP includes |
7be1c489 AM |
6315 | the symbol values. If we are doing this relocation the code in |
6316 | write.c is going to call bfd_install_relocation, which is also | |
6317 | going to use the symbol value. That means that if the reloc is | |
6318 | fully resolved we want to use *valP since bfd_install_relocation is | |
6319 | not being used. | |
9f0eb232 RS |
6320 | However, if the reloc is not fully resolved we do not want to |
6321 | use *valP, and must use fx_offset instead. If the relocation | |
6322 | is PC-relative, we then need to re-apply md_pcrel_from_section | |
6323 | to this new relocation value. */ | |
94f592af NC |
6324 | if (fixP->fx_addsy == (symbolS *) NULL) |
6325 | fixP->fx_done = 1; | |
6326 | ||
252b5132 | 6327 | else |
9f0eb232 RS |
6328 | { |
6329 | value = fixP->fx_offset; | |
6330 | if (fixP->fx_pcrel) | |
6331 | value -= md_pcrel_from_section (fixP, seg); | |
6332 | } | |
a161fe53 AM |
6333 | #endif |
6334 | ||
6335 | if (fixP->fx_subsy != (symbolS *) NULL) | |
252b5132 | 6336 | { |
a161fe53 AM |
6337 | /* We can't actually support subtracting a symbol. */ |
6338 | as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex")); | |
252b5132 | 6339 | } |
252b5132 | 6340 | |
5656a981 | 6341 | operand = NULL; |
3b8b57a9 | 6342 | if (fixP->fx_pcrel_adjust != 0) |
252b5132 | 6343 | { |
5656a981 | 6344 | /* This is a fixup on an instruction. */ |
3b8b57a9 | 6345 | int opindex = fixP->fx_pcrel_adjust & 0xff; |
252b5132 | 6346 | |
5656a981 | 6347 | operand = &powerpc_operands[opindex]; |
252b5132 | 6348 | #ifdef OBJ_XCOFF |
0baf16f2 AM |
6349 | /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol |
6350 | does not generate a reloc. It uses the offset of `sym' within its | |
6351 | csect. Other usages, such as `.long sym', generate relocs. This | |
6352 | is the documented behaviour of non-TOC symbols. */ | |
252b5132 | 6353 | if ((operand->flags & PPC_OPERAND_PARENS) != 0 |
b84bf58a | 6354 | && (operand->bitm & 0xfff0) == 0xfff0 |
252b5132 | 6355 | && operand->shift == 0 |
2b3c4602 | 6356 | && (operand->insert == NULL || ppc_obj64) |
94f592af NC |
6357 | && fixP->fx_addsy != NULL |
6358 | && symbol_get_tc (fixP->fx_addsy)->subseg != 0 | |
96d56e9f NC |
6359 | && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC |
6360 | && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0 | |
94f592af | 6361 | && S_GET_SEGMENT (fixP->fx_addsy) != bss_section) |
252b5132 | 6362 | { |
94f592af NC |
6363 | value = fixP->fx_offset; |
6364 | fixP->fx_done = 1; | |
252b5132 RH |
6365 | } |
6366 | #endif | |
5656a981 AM |
6367 | } |
6368 | ||
6369 | /* Calculate value to be stored in field. */ | |
6370 | fieldval = value; | |
6371 | switch (fixP->fx_r_type) | |
6372 | { | |
1ec2d25e | 6373 | #ifdef OBJ_ELF |
5656a981 AM |
6374 | case BFD_RELOC_PPC64_ADDR16_LO_DS: |
6375 | case BFD_RELOC_PPC_VLE_LO16A: | |
6376 | case BFD_RELOC_PPC_VLE_LO16D: | |
1ec2d25e | 6377 | #endif |
5656a981 AM |
6378 | case BFD_RELOC_LO16: |
6379 | case BFD_RELOC_LO16_PCREL: | |
6380 | fieldval = value & 0xffff; | |
6381 | sign_extend_16: | |
6382 | if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0) | |
6383 | fieldval = (fieldval ^ 0x8000) - 0x8000; | |
6384 | fixP->fx_no_overflow = 1; | |
6385 | break; | |
3c9d25f4 | 6386 | |
5656a981 AM |
6387 | #ifdef OBJ_ELF |
6388 | case BFD_RELOC_PPC_VLE_HI16A: | |
6389 | case BFD_RELOC_PPC_VLE_HI16D: | |
6390 | #endif | |
6391 | case BFD_RELOC_HI16: | |
6392 | case BFD_RELOC_HI16_PCREL: | |
6393 | fieldval = PPC_HI (value); | |
6394 | goto sign_extend_16; | |
0baf16f2 | 6395 | |
5656a981 AM |
6396 | #ifdef OBJ_ELF |
6397 | case BFD_RELOC_PPC_VLE_HA16A: | |
6398 | case BFD_RELOC_PPC_VLE_HA16D: | |
6399 | #endif | |
6400 | case BFD_RELOC_HI16_S: | |
6401 | case BFD_RELOC_HI16_S_PCREL: | |
6402 | fieldval = PPC_HA (value); | |
6403 | goto sign_extend_16; | |
0baf16f2 | 6404 | |
3b8b57a9 | 6405 | #ifdef OBJ_ELF |
5656a981 AM |
6406 | case BFD_RELOC_PPC64_HIGHER: |
6407 | fieldval = PPC_HIGHER (value); | |
6408 | goto sign_extend_16; | |
252b5132 | 6409 | |
5656a981 AM |
6410 | case BFD_RELOC_PPC64_HIGHER_S: |
6411 | fieldval = PPC_HIGHERA (value); | |
6412 | goto sign_extend_16; | |
0baf16f2 | 6413 | |
5656a981 AM |
6414 | case BFD_RELOC_PPC64_HIGHEST: |
6415 | fieldval = PPC_HIGHEST (value); | |
6416 | goto sign_extend_16; | |
0baf16f2 | 6417 | |
5656a981 AM |
6418 | case BFD_RELOC_PPC64_HIGHEST_S: |
6419 | fieldval = PPC_HIGHESTA (value); | |
6420 | goto sign_extend_16; | |
6421 | #endif | |
6422 | ||
6423 | default: | |
6424 | break; | |
6425 | } | |
6426 | ||
6427 | if (operand != NULL) | |
6428 | { | |
6429 | /* Handle relocs in an insn. */ | |
6430 | char *where; | |
6431 | unsigned long insn; | |
0baf16f2 | 6432 | |
5656a981 AM |
6433 | switch (fixP->fx_r_type) |
6434 | { | |
7fa9fcb6 | 6435 | #ifdef OBJ_ELF |
3b8b57a9 AM |
6436 | /* The following relocs can't be calculated by the assembler. |
6437 | Leave the field zero. */ | |
cdba85ec AM |
6438 | case BFD_RELOC_PPC_TPREL16: |
6439 | case BFD_RELOC_PPC_TPREL16_LO: | |
6440 | case BFD_RELOC_PPC_TPREL16_HI: | |
6441 | case BFD_RELOC_PPC_TPREL16_HA: | |
cdba85ec AM |
6442 | case BFD_RELOC_PPC_DTPREL16: |
6443 | case BFD_RELOC_PPC_DTPREL16_LO: | |
6444 | case BFD_RELOC_PPC_DTPREL16_HI: | |
6445 | case BFD_RELOC_PPC_DTPREL16_HA: | |
cdba85ec AM |
6446 | case BFD_RELOC_PPC_GOT_TLSGD16: |
6447 | case BFD_RELOC_PPC_GOT_TLSGD16_LO: | |
6448 | case BFD_RELOC_PPC_GOT_TLSGD16_HI: | |
6449 | case BFD_RELOC_PPC_GOT_TLSGD16_HA: | |
6450 | case BFD_RELOC_PPC_GOT_TLSLD16: | |
6451 | case BFD_RELOC_PPC_GOT_TLSLD16_LO: | |
6452 | case BFD_RELOC_PPC_GOT_TLSLD16_HI: | |
6453 | case BFD_RELOC_PPC_GOT_TLSLD16_HA: | |
6454 | case BFD_RELOC_PPC_GOT_TPREL16: | |
6455 | case BFD_RELOC_PPC_GOT_TPREL16_LO: | |
6456 | case BFD_RELOC_PPC_GOT_TPREL16_HI: | |
6457 | case BFD_RELOC_PPC_GOT_TPREL16_HA: | |
6458 | case BFD_RELOC_PPC_GOT_DTPREL16: | |
6459 | case BFD_RELOC_PPC_GOT_DTPREL16_LO: | |
6460 | case BFD_RELOC_PPC_GOT_DTPREL16_HI: | |
6461 | case BFD_RELOC_PPC_GOT_DTPREL16_HA: | |
6462 | case BFD_RELOC_PPC64_TPREL16_DS: | |
6463 | case BFD_RELOC_PPC64_TPREL16_LO_DS: | |
6464 | case BFD_RELOC_PPC64_TPREL16_HIGHER: | |
6465 | case BFD_RELOC_PPC64_TPREL16_HIGHERA: | |
6466 | case BFD_RELOC_PPC64_TPREL16_HIGHEST: | |
6467 | case BFD_RELOC_PPC64_TPREL16_HIGHESTA: | |
6468 | case BFD_RELOC_PPC64_DTPREL16_DS: | |
6469 | case BFD_RELOC_PPC64_DTPREL16_LO_DS: | |
6470 | case BFD_RELOC_PPC64_DTPREL16_HIGHER: | |
6471 | case BFD_RELOC_PPC64_DTPREL16_HIGHERA: | |
6472 | case BFD_RELOC_PPC64_DTPREL16_HIGHEST: | |
6473 | case BFD_RELOC_PPC64_DTPREL16_HIGHESTA: | |
3b8b57a9 | 6474 | gas_assert (fixP->fx_addsy != NULL); |
7c1d0959 | 6475 | S_SET_THREAD_LOCAL (fixP->fx_addsy); |
3b8b57a9 | 6476 | fieldval = 0; |
cdba85ec | 6477 | break; |
3b8b57a9 AM |
6478 | |
6479 | /* These also should leave the field zero for the same | |
6480 | reason. Note that older versions of gas wrote values | |
6481 | here. If we want to go back to the old behaviour, then | |
6482 | all _LO and _LO_DS cases will need to be treated like | |
6483 | BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */ | |
6484 | case BFD_RELOC_16_GOTOFF: | |
6485 | case BFD_RELOC_LO16_GOTOFF: | |
6486 | case BFD_RELOC_HI16_GOTOFF: | |
6487 | case BFD_RELOC_HI16_S_GOTOFF: | |
6488 | case BFD_RELOC_LO16_PLTOFF: | |
6489 | case BFD_RELOC_HI16_PLTOFF: | |
6490 | case BFD_RELOC_HI16_S_PLTOFF: | |
6491 | case BFD_RELOC_GPREL16: | |
6492 | case BFD_RELOC_16_BASEREL: | |
6493 | case BFD_RELOC_LO16_BASEREL: | |
6494 | case BFD_RELOC_HI16_BASEREL: | |
6495 | case BFD_RELOC_HI16_S_BASEREL: | |
6496 | case BFD_RELOC_PPC_TOC16: | |
6497 | case BFD_RELOC_PPC64_TOC16_LO: | |
6498 | case BFD_RELOC_PPC64_TOC16_HI: | |
6499 | case BFD_RELOC_PPC64_TOC16_HA: | |
6500 | case BFD_RELOC_PPC64_PLTGOT16: | |
6501 | case BFD_RELOC_PPC64_PLTGOT16_LO: | |
6502 | case BFD_RELOC_PPC64_PLTGOT16_HI: | |
6503 | case BFD_RELOC_PPC64_PLTGOT16_HA: | |
6504 | case BFD_RELOC_PPC64_GOT16_DS: | |
6505 | case BFD_RELOC_PPC64_GOT16_LO_DS: | |
6506 | case BFD_RELOC_PPC64_PLT16_LO_DS: | |
6507 | case BFD_RELOC_PPC64_SECTOFF_DS: | |
6508 | case BFD_RELOC_PPC64_SECTOFF_LO_DS: | |
6509 | case BFD_RELOC_PPC64_TOC16_DS: | |
6510 | case BFD_RELOC_PPC64_TOC16_LO_DS: | |
6511 | case BFD_RELOC_PPC64_PLTGOT16_DS: | |
6512 | case BFD_RELOC_PPC64_PLTGOT16_LO_DS: | |
6513 | case BFD_RELOC_PPC_EMB_NADDR16: | |
6514 | case BFD_RELOC_PPC_EMB_NADDR16_LO: | |
6515 | case BFD_RELOC_PPC_EMB_NADDR16_HI: | |
6516 | case BFD_RELOC_PPC_EMB_NADDR16_HA: | |
6517 | case BFD_RELOC_PPC_EMB_SDAI16: | |
6518 | case BFD_RELOC_PPC_EMB_SDA2I16: | |
6519 | case BFD_RELOC_PPC_EMB_SDA2REL: | |
252b5132 | 6520 | case BFD_RELOC_PPC_EMB_SDA21: |
3b8b57a9 AM |
6521 | case BFD_RELOC_PPC_EMB_MRKREF: |
6522 | case BFD_RELOC_PPC_EMB_RELSEC16: | |
6523 | case BFD_RELOC_PPC_EMB_RELST_LO: | |
6524 | case BFD_RELOC_PPC_EMB_RELST_HI: | |
6525 | case BFD_RELOC_PPC_EMB_RELST_HA: | |
6526 | case BFD_RELOC_PPC_EMB_BIT_FLD: | |
6527 | case BFD_RELOC_PPC_EMB_RELSDA: | |
6528 | case BFD_RELOC_PPC_VLE_SDA21: | |
6529 | case BFD_RELOC_PPC_VLE_SDA21_LO: | |
6530 | case BFD_RELOC_PPC_VLE_SDAREL_LO16A: | |
6531 | case BFD_RELOC_PPC_VLE_SDAREL_LO16D: | |
6532 | case BFD_RELOC_PPC_VLE_SDAREL_HI16A: | |
6533 | case BFD_RELOC_PPC_VLE_SDAREL_HI16D: | |
6534 | case BFD_RELOC_PPC_VLE_SDAREL_HA16A: | |
6535 | case BFD_RELOC_PPC_VLE_SDAREL_HA16D: | |
6536 | gas_assert (fixP->fx_addsy != NULL); | |
6537 | /* Fall thru */ | |
6538 | ||
6539 | case BFD_RELOC_PPC_TLS: | |
6540 | case BFD_RELOC_PPC_TLSGD: | |
6541 | case BFD_RELOC_PPC_TLSLD: | |
6542 | fieldval = 0; | |
3b8b57a9 | 6543 | break; |
7fa9fcb6 TG |
6544 | #endif |
6545 | ||
6546 | #ifdef OBJ_XCOFF | |
6547 | case BFD_RELOC_PPC_B16: | |
6548 | /* Adjust the offset to the instruction boundary. */ | |
6549 | fieldval += 2; | |
6550 | break; | |
6551 | #endif | |
252b5132 | 6552 | |
3b8b57a9 | 6553 | default: |
252b5132 | 6554 | break; |
3b8b57a9 | 6555 | } |
252b5132 | 6556 | |
3b8b57a9 AM |
6557 | #ifdef OBJ_ELF |
6558 | /* powerpc uses RELA style relocs, so if emitting a reloc the field | |
6559 | contents can stay at zero. */ | |
6560 | #define APPLY_RELOC fixP->fx_done | |
6561 | #else | |
6562 | #define APPLY_RELOC 1 | |
6563 | #endif | |
6564 | if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL) | |
6565 | { | |
6566 | /* Fetch the instruction, insert the fully resolved operand | |
6567 | value, and stuff the instruction back again. */ | |
6568 | where = fixP->fx_frag->fr_literal + fixP->fx_where; | |
6569 | if (target_big_endian) | |
31a91399 | 6570 | { |
3b8b57a9 AM |
6571 | if (fixP->fx_size == 4) |
6572 | insn = bfd_getb32 ((unsigned char *) where); | |
31a91399 | 6573 | else |
3b8b57a9 | 6574 | insn = bfd_getb16 ((unsigned char *) where); |
31a91399 NC |
6575 | } |
6576 | else | |
3b8b57a9 AM |
6577 | { |
6578 | if (fixP->fx_size == 4) | |
6579 | insn = bfd_getl32 ((unsigned char *) where); | |
6580 | else | |
6581 | insn = bfd_getl16 ((unsigned char *) where); | |
6582 | } | |
6583 | insn = ppc_insert_operand (insn, operand, fieldval, | |
6584 | fixP->tc_fix_data.ppc_cpu, | |
6585 | fixP->fx_file, fixP->fx_line); | |
6586 | if (target_big_endian) | |
6587 | { | |
6588 | if (fixP->fx_size == 4) | |
6589 | bfd_putb32 ((bfd_vma) insn, (unsigned char *) where); | |
6590 | else | |
6591 | bfd_putb16 ((bfd_vma) insn, (unsigned char *) where); | |
6592 | } | |
6593 | else | |
6594 | { | |
6595 | if (fixP->fx_size == 4) | |
6596 | bfd_putl32 ((bfd_vma) insn, (unsigned char *) where); | |
6597 | else | |
6598 | bfd_putl16 ((bfd_vma) insn, (unsigned char *) where); | |
6599 | } | |
6600 | } | |
6601 | ||
6602 | if (fixP->fx_done) | |
6603 | /* Nothing else to do here. */ | |
6604 | return; | |
6605 | ||
6606 | gas_assert (fixP->fx_addsy != NULL); | |
6607 | if (fixP->fx_r_type == BFD_RELOC_UNUSED) | |
6608 | { | |
6609 | char *sfile; | |
6610 | unsigned int sline; | |
6611 | ||
6612 | /* Use expr_symbol_where to see if this is an expression | |
6613 | symbol. */ | |
6614 | if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline)) | |
6615 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
6616 | _("unresolved expression that must be resolved")); | |
6617 | else | |
6618 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
6619 | _("unsupported relocation against %s"), | |
6620 | S_GET_NAME (fixP->fx_addsy)); | |
6621 | fixP->fx_done = 1; | |
6622 | return; | |
6623 | } | |
6624 | } | |
6625 | else | |
6626 | { | |
6627 | /* Handle relocs in data. */ | |
6628 | switch (fixP->fx_r_type) | |
6629 | { | |
252b5132 | 6630 | case BFD_RELOC_VTABLE_INHERIT: |
94f592af NC |
6631 | if (fixP->fx_addsy |
6632 | && !S_IS_DEFINED (fixP->fx_addsy) | |
6633 | && !S_IS_WEAK (fixP->fx_addsy)) | |
6634 | S_SET_WEAK (fixP->fx_addsy); | |
3b8b57a9 | 6635 | /* Fall thru */ |
252b5132 RH |
6636 | |
6637 | case BFD_RELOC_VTABLE_ENTRY: | |
94f592af | 6638 | fixP->fx_done = 0; |
252b5132 RH |
6639 | break; |
6640 | ||
0baf16f2 | 6641 | #ifdef OBJ_ELF |
3b8b57a9 AM |
6642 | /* These can appear with @l etc. in data. */ |
6643 | case BFD_RELOC_LO16: | |
3b8b57a9 | 6644 | case BFD_RELOC_LO16_PCREL: |
3b8b57a9 | 6645 | case BFD_RELOC_HI16: |
3b8b57a9 | 6646 | case BFD_RELOC_HI16_PCREL: |
3b8b57a9 | 6647 | case BFD_RELOC_HI16_S: |
3b8b57a9 | 6648 | case BFD_RELOC_HI16_S_PCREL: |
3b8b57a9 | 6649 | case BFD_RELOC_PPC64_HIGHER: |
3b8b57a9 | 6650 | case BFD_RELOC_PPC64_HIGHER_S: |
3b8b57a9 | 6651 | case BFD_RELOC_PPC64_HIGHEST: |
3b8b57a9 | 6652 | case BFD_RELOC_PPC64_HIGHEST_S: |
3b8b57a9 AM |
6653 | break; |
6654 | ||
6655 | case BFD_RELOC_PPC_DTPMOD: | |
6656 | case BFD_RELOC_PPC_TPREL: | |
6657 | case BFD_RELOC_PPC_DTPREL: | |
6658 | S_SET_THREAD_LOCAL (fixP->fx_addsy); | |
6659 | break; | |
6660 | ||
6661 | /* Just punt all of these to the linker. */ | |
6662 | case BFD_RELOC_PPC_B16_BRTAKEN: | |
6663 | case BFD_RELOC_PPC_B16_BRNTAKEN: | |
6664 | case BFD_RELOC_16_GOTOFF: | |
6665 | case BFD_RELOC_LO16_GOTOFF: | |
6666 | case BFD_RELOC_HI16_GOTOFF: | |
6667 | case BFD_RELOC_HI16_S_GOTOFF: | |
6668 | case BFD_RELOC_LO16_PLTOFF: | |
6669 | case BFD_RELOC_HI16_PLTOFF: | |
6670 | case BFD_RELOC_HI16_S_PLTOFF: | |
6671 | case BFD_RELOC_PPC_COPY: | |
6672 | case BFD_RELOC_PPC_GLOB_DAT: | |
6673 | case BFD_RELOC_16_BASEREL: | |
6674 | case BFD_RELOC_LO16_BASEREL: | |
6675 | case BFD_RELOC_HI16_BASEREL: | |
6676 | case BFD_RELOC_HI16_S_BASEREL: | |
6677 | case BFD_RELOC_PPC_TLS: | |
6678 | case BFD_RELOC_PPC_DTPREL16_LO: | |
6679 | case BFD_RELOC_PPC_DTPREL16_HI: | |
6680 | case BFD_RELOC_PPC_DTPREL16_HA: | |
6681 | case BFD_RELOC_PPC_TPREL16_LO: | |
6682 | case BFD_RELOC_PPC_TPREL16_HI: | |
6683 | case BFD_RELOC_PPC_TPREL16_HA: | |
6684 | case BFD_RELOC_PPC_GOT_TLSGD16: | |
6685 | case BFD_RELOC_PPC_GOT_TLSGD16_LO: | |
6686 | case BFD_RELOC_PPC_GOT_TLSGD16_HI: | |
6687 | case BFD_RELOC_PPC_GOT_TLSGD16_HA: | |
6688 | case BFD_RELOC_PPC_GOT_TLSLD16: | |
6689 | case BFD_RELOC_PPC_GOT_TLSLD16_LO: | |
6690 | case BFD_RELOC_PPC_GOT_TLSLD16_HI: | |
6691 | case BFD_RELOC_PPC_GOT_TLSLD16_HA: | |
6692 | case BFD_RELOC_PPC_GOT_DTPREL16: | |
6693 | case BFD_RELOC_PPC_GOT_DTPREL16_LO: | |
6694 | case BFD_RELOC_PPC_GOT_DTPREL16_HI: | |
6695 | case BFD_RELOC_PPC_GOT_DTPREL16_HA: | |
6696 | case BFD_RELOC_PPC_GOT_TPREL16: | |
6697 | case BFD_RELOC_PPC_GOT_TPREL16_LO: | |
6698 | case BFD_RELOC_PPC_GOT_TPREL16_HI: | |
6699 | case BFD_RELOC_PPC_GOT_TPREL16_HA: | |
6700 | case BFD_RELOC_24_PLT_PCREL: | |
6701 | case BFD_RELOC_PPC_LOCAL24PC: | |
6702 | case BFD_RELOC_32_PLT_PCREL: | |
6703 | case BFD_RELOC_GPREL16: | |
6704 | case BFD_RELOC_PPC_VLE_SDAREL_LO16A: | |
6705 | case BFD_RELOC_PPC_VLE_SDAREL_HI16A: | |
6706 | case BFD_RELOC_PPC_VLE_SDAREL_HA16A: | |
6707 | case BFD_RELOC_PPC_EMB_NADDR32: | |
6708 | case BFD_RELOC_PPC_EMB_NADDR16: | |
6709 | case BFD_RELOC_PPC_EMB_NADDR16_LO: | |
6710 | case BFD_RELOC_PPC_EMB_NADDR16_HI: | |
6711 | case BFD_RELOC_PPC_EMB_NADDR16_HA: | |
6712 | case BFD_RELOC_PPC_EMB_SDAI16: | |
6713 | case BFD_RELOC_PPC_EMB_SDA2REL: | |
6714 | case BFD_RELOC_PPC_EMB_SDA2I16: | |
6715 | case BFD_RELOC_PPC_EMB_SDA21: | |
6716 | case BFD_RELOC_PPC_VLE_SDA21_LO: | |
6717 | case BFD_RELOC_PPC_EMB_MRKREF: | |
6718 | case BFD_RELOC_PPC_EMB_RELSEC16: | |
6719 | case BFD_RELOC_PPC_EMB_RELST_LO: | |
6720 | case BFD_RELOC_PPC_EMB_RELST_HI: | |
6721 | case BFD_RELOC_PPC_EMB_RELST_HA: | |
6722 | case BFD_RELOC_PPC_EMB_BIT_FLD: | |
6723 | case BFD_RELOC_PPC_EMB_RELSDA: | |
0baf16f2 | 6724 | case BFD_RELOC_PPC64_TOC: |
3b8b57a9 AM |
6725 | case BFD_RELOC_PPC_TOC16: |
6726 | case BFD_RELOC_PPC64_TOC16_LO: | |
6727 | case BFD_RELOC_PPC64_TOC16_HI: | |
6728 | case BFD_RELOC_PPC64_TOC16_HA: | |
6729 | case BFD_RELOC_PPC64_DTPREL16_HIGHER: | |
6730 | case BFD_RELOC_PPC64_DTPREL16_HIGHERA: | |
6731 | case BFD_RELOC_PPC64_DTPREL16_HIGHEST: | |
6732 | case BFD_RELOC_PPC64_DTPREL16_HIGHESTA: | |
6733 | case BFD_RELOC_PPC64_TPREL16_HIGHER: | |
6734 | case BFD_RELOC_PPC64_TPREL16_HIGHERA: | |
6735 | case BFD_RELOC_PPC64_TPREL16_HIGHEST: | |
6736 | case BFD_RELOC_PPC64_TPREL16_HIGHESTA: | |
94f592af | 6737 | fixP->fx_done = 0; |
0baf16f2 | 6738 | break; |
0baf16f2 | 6739 | #endif |
3b8b57a9 AM |
6740 | |
6741 | #ifdef OBJ_XCOFF | |
6742 | case BFD_RELOC_NONE: | |
3b8b57a9 | 6743 | #endif |
5656a981 AM |
6744 | case BFD_RELOC_CTOR: |
6745 | case BFD_RELOC_32: | |
6746 | case BFD_RELOC_32_PCREL: | |
6747 | case BFD_RELOC_RVA: | |
6748 | case BFD_RELOC_64: | |
6749 | case BFD_RELOC_64_PCREL: | |
6750 | case BFD_RELOC_16: | |
6751 | case BFD_RELOC_16_PCREL: | |
6752 | case BFD_RELOC_8: | |
6753 | break; | |
3b8b57a9 | 6754 | |
252b5132 | 6755 | default: |
bc805888 | 6756 | fprintf (stderr, |
94f592af | 6757 | _("Gas failure, reloc value %d\n"), fixP->fx_r_type); |
99a814a1 | 6758 | fflush (stderr); |
252b5132 RH |
6759 | abort (); |
6760 | } | |
46b596ff | 6761 | |
5656a981 | 6762 | if (fixP->fx_size && APPLY_RELOC) |
46b596ff | 6763 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
5656a981 AM |
6764 | fieldval, fixP->fx_size); |
6765 | } | |
6766 | ||
6767 | /* We are only able to convert some relocs to pc-relative. */ | |
6768 | if (!fixP->fx_done && fixP->fx_pcrel) | |
6769 | { | |
6770 | switch (fixP->fx_r_type) | |
6771 | { | |
6772 | case BFD_RELOC_LO16: | |
6773 | fixP->fx_r_type = BFD_RELOC_LO16_PCREL; | |
6774 | break; | |
6775 | ||
6776 | case BFD_RELOC_HI16: | |
6777 | fixP->fx_r_type = BFD_RELOC_HI16_PCREL; | |
6778 | break; | |
6779 | ||
6780 | case BFD_RELOC_HI16_S: | |
6781 | fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL; | |
6782 | break; | |
6783 | ||
6784 | case BFD_RELOC_64: | |
6785 | fixP->fx_r_type = BFD_RELOC_64_PCREL; | |
6786 | break; | |
6787 | ||
6788 | case BFD_RELOC_32: | |
6789 | fixP->fx_r_type = BFD_RELOC_32_PCREL; | |
6790 | break; | |
6791 | ||
6792 | case BFD_RELOC_16: | |
6793 | fixP->fx_r_type = BFD_RELOC_16_PCREL; | |
6794 | break; | |
6795 | ||
6796 | /* Some of course are already pc-relative. */ | |
6797 | case BFD_RELOC_LO16_PCREL: | |
6798 | case BFD_RELOC_HI16_PCREL: | |
6799 | case BFD_RELOC_HI16_S_PCREL: | |
6800 | case BFD_RELOC_64_PCREL: | |
6801 | case BFD_RELOC_32_PCREL: | |
6802 | case BFD_RELOC_16_PCREL: | |
6803 | case BFD_RELOC_PPC_B16: | |
6804 | case BFD_RELOC_PPC_B16_BRTAKEN: | |
6805 | case BFD_RELOC_PPC_B16_BRNTAKEN: | |
6806 | case BFD_RELOC_PPC_B26: | |
6807 | case BFD_RELOC_PPC_LOCAL24PC: | |
6808 | case BFD_RELOC_24_PLT_PCREL: | |
6809 | case BFD_RELOC_32_PLT_PCREL: | |
6810 | case BFD_RELOC_64_PLT_PCREL: | |
6811 | case BFD_RELOC_PPC_VLE_REL8: | |
6812 | case BFD_RELOC_PPC_VLE_REL15: | |
6813 | case BFD_RELOC_PPC_VLE_REL24: | |
6814 | break; | |
6815 | ||
6816 | default: | |
6817 | if (fixP->fx_addsy) | |
6818 | { | |
6819 | char *sfile; | |
6820 | unsigned int sline; | |
6821 | ||
6822 | /* Use expr_symbol_where to see if this is an | |
6823 | expression symbol. */ | |
6824 | if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline)) | |
6825 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
6826 | _("unresolved expression that must" | |
6827 | " be resolved")); | |
6828 | else | |
6829 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
6830 | _("cannot emit PC relative %s relocation" | |
6831 | " against %s"), | |
6832 | bfd_get_reloc_code_name (fixP->fx_r_type), | |
6833 | S_GET_NAME (fixP->fx_addsy)); | |
6834 | } | |
6835 | else | |
6836 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
6837 | _("unable to resolve expression")); | |
6838 | fixP->fx_done = 1; | |
6839 | break; | |
6840 | } | |
252b5132 RH |
6841 | } |
6842 | ||
6843 | #ifdef OBJ_ELF | |
3b8b57a9 | 6844 | ppc_elf_validate_fix (fixP, seg); |
94f592af | 6845 | fixP->fx_addnumber = value; |
4e6935a6 AM |
6846 | |
6847 | /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately | |
6848 | from the section contents. If we are going to be emitting a reloc | |
6849 | then the section contents are immaterial, so don't warn if they | |
6850 | happen to overflow. Leave such warnings to ld. */ | |
6851 | if (!fixP->fx_done) | |
a38a07e0 AM |
6852 | { |
6853 | fixP->fx_no_overflow = 1; | |
6854 | ||
6855 | /* Arrange to emit .TOC. as a normal symbol if used in anything | |
6856 | but .TOC.@tocbase. */ | |
6857 | if (ppc_obj64 | |
6858 | && fixP->fx_r_type != BFD_RELOC_PPC64_TOC | |
6859 | && fixP->fx_addsy != NULL | |
6860 | && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0) | |
6861 | symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP; | |
6862 | } | |
252b5132 | 6863 | #else |
94f592af NC |
6864 | if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16) |
6865 | fixP->fx_addnumber = 0; | |
252b5132 RH |
6866 | else |
6867 | { | |
6868 | #ifdef TE_PE | |
94f592af | 6869 | fixP->fx_addnumber = 0; |
252b5132 | 6870 | #else |
8edcbfcd TG |
6871 | /* We want to use the offset within the toc, not the actual VMA |
6872 | of the symbol. */ | |
94f592af | 6873 | fixP->fx_addnumber = |
8edcbfcd TG |
6874 | - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy)) |
6875 | - S_GET_VALUE (ppc_toc_csect); | |
252b5132 RH |
6876 | #endif |
6877 | } | |
6878 | #endif | |
252b5132 RH |
6879 | } |
6880 | ||
6881 | /* Generate a reloc for a fixup. */ | |
6882 | ||
6883 | arelent * | |
98027b10 | 6884 | tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp) |
252b5132 RH |
6885 | { |
6886 | arelent *reloc; | |
6887 | ||
6888 | reloc = (arelent *) xmalloc (sizeof (arelent)); | |
6889 | ||
49309057 ILT |
6890 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); |
6891 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
252b5132 RH |
6892 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; |
6893 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
6894 | if (reloc->howto == (reloc_howto_type *) NULL) | |
6895 | { | |
6896 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
99a814a1 AM |
6897 | _("reloc %d not supported by object file format"), |
6898 | (int) fixp->fx_r_type); | |
252b5132 RH |
6899 | return NULL; |
6900 | } | |
6901 | reloc->addend = fixp->fx_addnumber; | |
6902 | ||
6903 | return reloc; | |
6904 | } | |
75e21f08 JJ |
6905 | |
6906 | void | |
98027b10 | 6907 | ppc_cfi_frame_initial_instructions (void) |
75e21f08 JJ |
6908 | { |
6909 | cfi_add_CFA_def_cfa (1, 0); | |
6910 | } | |
6911 | ||
6912 | int | |
1df69f4f | 6913 | tc_ppc_regname_to_dw2regnum (char *regname) |
75e21f08 JJ |
6914 | { |
6915 | unsigned int regnum = -1; | |
6916 | unsigned int i; | |
6917 | const char *p; | |
6918 | char *q; | |
6919 | static struct { char *name; int dw2regnum; } regnames[] = | |
6920 | { | |
6921 | { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 }, | |
6922 | { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 }, | |
80f846b6 | 6923 | { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 }, |
75e21f08 JJ |
6924 | { "spe_acc", 111 }, { "spefscr", 112 } |
6925 | }; | |
6926 | ||
6927 | for (i = 0; i < ARRAY_SIZE (regnames); ++i) | |
6928 | if (strcmp (regnames[i].name, regname) == 0) | |
6929 | return regnames[i].dw2regnum; | |
6930 | ||
6931 | if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v') | |
6932 | { | |
6933 | p = regname + 1 + (regname[1] == '.'); | |
6934 | regnum = strtoul (p, &q, 10); | |
6935 | if (p == q || *q || regnum >= 32) | |
6936 | return -1; | |
6937 | if (regname[0] == 'f') | |
b7d7dc63 | 6938 | regnum += 32; |
75e21f08 | 6939 | else if (regname[0] == 'v') |
b7d7dc63 | 6940 | regnum += 77; |
75e21f08 JJ |
6941 | } |
6942 | else if (regname[0] == 'c' && regname[1] == 'r') | |
6943 | { | |
6944 | p = regname + 2 + (regname[2] == '.'); | |
6945 | if (p[0] < '0' || p[0] > '7' || p[1]) | |
b7d7dc63 | 6946 | return -1; |
75e21f08 JJ |
6947 | regnum = p[0] - '0' + 68; |
6948 | } | |
6949 | return regnum; | |
6950 | } |