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2010-05-18 Hui Zhu <teawater@gmail.com>
[thirdparty/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
0dc93057 3 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
ec2655a6 10 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 52#endif
53#endif
54
0baf16f2
AM		 55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
98027b10
AM		 87static void ppc_macro (char *, const struct powerpc_macro *);
88static void ppc_byte (int);
0baf16f2
AM		 89
90#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 91static void ppc_tc (int);
92static void ppc_machine (int);
0baf16f2 93#endif
252b5132
RH		 94
95#ifdef OBJ_XCOFF
98027b10
AM		 96static void ppc_comm (int);
97static void ppc_bb (int);
98static void ppc_bc (int);
99static void ppc_bf (int);
100static void ppc_biei (int);
101static void ppc_bs (int);
102static void ppc_eb (int);
103static void ppc_ec (int);
104static void ppc_ef (int);
105static void ppc_es (int);
106static void ppc_csect (int);
107static void ppc_change_csect (symbolS *, offsetT);
108static void ppc_function (int);
109static void ppc_extern (int);
110static void ppc_lglobl (int);
c865e45b 111static void ppc_ref (int);
98027b10
AM		 112static void ppc_section (int);
113static void ppc_named_section (int);
114static void ppc_stabx (int);
115static void ppc_rename (int);
116static void ppc_toc (int);
117static void ppc_xcoff_cons (int);
118static void ppc_vbyte (int);
252b5132
RH		 119#endif
120
121#ifdef OBJ_ELF
98027b10
AM		 122static void ppc_elf_cons (int);
123static void ppc_elf_rdata (int);
124static void ppc_elf_lcomm (int);
252b5132
RH		 125#endif
126
127#ifdef TE_PE
98027b10
AM		 128static void ppc_previous (int);
129static void ppc_pdata (int);
130static void ppc_ydata (int);
131static void ppc_reldata (int);
132static void ppc_rdata (int);
133static void ppc_ualong (int);
134static void ppc_znop (int);
135static void ppc_pe_comm (int);
136static void ppc_pe_section (int);
137static void ppc_pe_function (int);
138static void ppc_pe_tocd (int);
252b5132
RH		 139#endif
140\f
141/* Generic assembler global variables which must be defined by all
142 targets. */
143
144#ifdef OBJ_ELF
145/* This string holds the chars that always start a comment. If the
146 pre-processor is disabled, these aren't very useful. The macro
147 tc_comment_chars points to this. We use this, rather than the
148 usual comment_chars, so that we can switch for Solaris conventions. */
149static const char ppc_solaris_comment_chars[] = "#!";
150static const char ppc_eabi_comment_chars[] = "#";
151
152#ifdef TARGET_SOLARIS_COMMENT
153const char *ppc_comment_chars = ppc_solaris_comment_chars;
154#else
155const char *ppc_comment_chars = ppc_eabi_comment_chars;
156#endif
157#else
158const char comment_chars[] = "#";
159#endif
160
161/* Characters which start a comment at the beginning of a line. */
162const char line_comment_chars[] = "#";
163
164/* Characters which may be used to separate multiple commands on a
165 single line. */
166const char line_separator_chars[] = ";";
167
168/* Characters which are used to indicate an exponent in a floating
169 point number. */
170const char EXP_CHARS[] = "eE";
171
172/* Characters which mean that a number is a floating point constant,
173 as in 0d1.0. */
174const char FLT_CHARS[] = "dD";
5ce8663f 175
5e02f92e 176/* Anything that can start an operand needs to be mentioned here,
ac805826 177 to stop the input scrubber eating whitespace. */
5e02f92e 178const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 179
180/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
181int ppc_cie_data_alignment;
783de163
AM		 182
183/* The type of processor we are assembling for. This is one or more
184 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 185ppc_cpu_t ppc_cpu = 0;
252b5132
RH		 186\f
187/* The target specific pseudo-ops which we support. */
188
189const pseudo_typeS md_pseudo_table[] =
190{
191 /* Pseudo-ops which must be overridden. */
192 { "byte", ppc_byte, 0 },
193
194#ifdef OBJ_XCOFF
195 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
196 legitimately belong in the obj-*.c file. However, XCOFF is based
197 on COFF, and is only implemented for the RS/6000. We just use
198 obj-coff.c, and add what we need here. */
199 { "comm", ppc_comm, 0 },
200 { "lcomm", ppc_comm, 1 },
201 { "bb", ppc_bb, 0 },
202 { "bc", ppc_bc, 0 },
203 { "bf", ppc_bf, 0 },
204 { "bi", ppc_biei, 0 },
205 { "bs", ppc_bs, 0 },
206 { "csect", ppc_csect, 0 },
207 { "data", ppc_section, 'd' },
208 { "eb", ppc_eb, 0 },
209 { "ec", ppc_ec, 0 },
210 { "ef", ppc_ef, 0 },
211 { "ei", ppc_biei, 1 },
212 { "es", ppc_es, 0 },
213 { "extern", ppc_extern, 0 },
214 { "function", ppc_function, 0 },
215 { "lglobl", ppc_lglobl, 0 },
c865e45b 216 { "ref", ppc_ref, 0 },
252b5132
RH		 217 { "rename", ppc_rename, 0 },
218 { "section", ppc_named_section, 0 },
219 { "stabx", ppc_stabx, 0 },
220 { "text", ppc_section, 't' },
221 { "toc", ppc_toc, 0 },
222 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 223 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 224 { "word", ppc_xcoff_cons, 1 },
225 { "short", ppc_xcoff_cons, 1 },
226 { "vbyte", ppc_vbyte, 0 },
227#endif
228
229#ifdef OBJ_ELF
0baf16f2
AM		 230 { "llong", ppc_elf_cons, 8 },
231 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 232 { "long", ppc_elf_cons, 4 },
233 { "word", ppc_elf_cons, 2 },
234 { "short", ppc_elf_cons, 2 },
235 { "rdata", ppc_elf_rdata, 0 },
236 { "rodata", ppc_elf_rdata, 0 },
237 { "lcomm", ppc_elf_lcomm, 0 },
238#endif
239
240#ifdef TE_PE
99a814a1 241 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 242 { "previous", ppc_previous, 0 },
243 { "pdata", ppc_pdata, 0 },
244 { "ydata", ppc_ydata, 0 },
245 { "reldata", ppc_reldata, 0 },
246 { "rdata", ppc_rdata, 0 },
247 { "ualong", ppc_ualong, 0 },
248 { "znop", ppc_znop, 0 },
249 { "comm", ppc_pe_comm, 0 },
250 { "lcomm", ppc_pe_comm, 1 },
251 { "section", ppc_pe_section, 0 },
252 { "function", ppc_pe_function,0 },
253 { "tocd", ppc_pe_tocd, 0 },
254#endif
255
0baf16f2 256#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 257 { "tc", ppc_tc, 0 },
0baf16f2
AM		 258 { "machine", ppc_machine, 0 },
259#endif
252b5132
RH		 260
261 { NULL, NULL, 0 }
262};
263
264\f
99a814a1
AM		 265/* Predefined register names if -mregnames (or default for Windows NT).
266 In general, there are lots of them, in an attempt to be compatible
267 with a number of other Windows NT assemblers. */
252b5132
RH		 268
269/* Structure to hold information about predefined registers. */
270struct pd_reg
271 {
272 char *name;
273 int value;
274 };
275
276/* List of registers that are pre-defined:
277
278 Each general register has predefined names of the form:
279 1. r<reg_num> which has the value <reg_num>.
280 2. r.<reg_num> which has the value <reg_num>.
281
252b5132
RH		 282 Each floating point register has predefined names of the form:
283 1. f<reg_num> which has the value <reg_num>.
284 2. f.<reg_num> which has the value <reg_num>.
285
7a899fff
C		 286 Each vector unit register has predefined names of the form:
287 1. v<reg_num> which has the value <reg_num>.
288 2. v.<reg_num> which has the value <reg_num>.
289
252b5132
RH		 290 Each condition register has predefined names of the form:
291 1. cr<reg_num> which has the value <reg_num>.
292 2. cr.<reg_num> which has the value <reg_num>.
293
294 There are individual registers as well:
295 sp or r.sp has the value 1
296 rtoc or r.toc has the value 2
297 fpscr has the value 0
298 xer has the value 1
299 lr has the value 8
300 ctr has the value 9
301 pmr has the value 0
302 dar has the value 19
303 dsisr has the value 18
304 dec has the value 22
305 sdr1 has the value 25
306 srr0 has the value 26
307 srr1 has the value 27
308
81d4177b 309 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 310
311static const struct pd_reg pre_defined_registers[] =
312{
313 { "cr.0", 0 }, /* Condition Registers */
314 { "cr.1", 1 },
315 { "cr.2", 2 },
316 { "cr.3", 3 },
317 { "cr.4", 4 },
318 { "cr.5", 5 },
319 { "cr.6", 6 },
320 { "cr.7", 7 },
321
322 { "cr0", 0 },
323 { "cr1", 1 },
324 { "cr2", 2 },
325 { "cr3", 3 },
326 { "cr4", 4 },
327 { "cr5", 5 },
328 { "cr6", 6 },
329 { "cr7", 7 },
330
331 { "ctr", 9 },
332
333 { "dar", 19 }, /* Data Access Register */
334 { "dec", 22 }, /* Decrementer */
335 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
336
337 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 338 { "f.1", 1 },
339 { "f.10", 10 },
340 { "f.11", 11 },
341 { "f.12", 12 },
342 { "f.13", 13 },
343 { "f.14", 14 },
344 { "f.15", 15 },
345 { "f.16", 16 },
346 { "f.17", 17 },
347 { "f.18", 18 },
348 { "f.19", 19 },
349 { "f.2", 2 },
350 { "f.20", 20 },
351 { "f.21", 21 },
352 { "f.22", 22 },
353 { "f.23", 23 },
354 { "f.24", 24 },
355 { "f.25", 25 },
356 { "f.26", 26 },
357 { "f.27", 27 },
358 { "f.28", 28 },
359 { "f.29", 29 },
360 { "f.3", 3 },
252b5132
RH		 361 { "f.30", 30 },
362 { "f.31", 31 },
066be9f7
PB		 363
364 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
365 { "f.33", 33 },
366 { "f.34", 34 },
367 { "f.35", 35 },
368 { "f.36", 36 },
369 { "f.37", 37 },
370 { "f.38", 38 },
371 { "f.39", 39 },
81d4177b 372 { "f.4", 4 },
066be9f7
PB		 373 { "f.40", 40 },
374 { "f.41", 41 },
375 { "f.42", 42 },
376 { "f.43", 43 },
377 { "f.44", 44 },
378 { "f.45", 45 },
379 { "f.46", 46 },
380 { "f.47", 47 },
381 { "f.48", 48 },
382 { "f.49", 49 },
81d4177b 383 { "f.5", 5 },
066be9f7
PB		 384 { "f.50", 50 },
385 { "f.51", 51 },
386 { "f.52", 52 },
387 { "f.53", 53 },
388 { "f.54", 54 },
389 { "f.55", 55 },
390 { "f.56", 56 },
391 { "f.57", 57 },
392 { "f.58", 58 },
393 { "f.59", 59 },
81d4177b 394 { "f.6", 6 },
066be9f7
PB		 395 { "f.60", 60 },
396 { "f.61", 61 },
397 { "f.62", 62 },
398 { "f.63", 63 },
81d4177b
KH		 399 { "f.7", 7 },
400 { "f.8", 8 },
401 { "f.9", 9 },
402
403 { "f0", 0 },
404 { "f1", 1 },
405 { "f10", 10 },
406 { "f11", 11 },
407 { "f12", 12 },
408 { "f13", 13 },
409 { "f14", 14 },
410 { "f15", 15 },
411 { "f16", 16 },
412 { "f17", 17 },
413 { "f18", 18 },
414 { "f19", 19 },
415 { "f2", 2 },
416 { "f20", 20 },
417 { "f21", 21 },
418 { "f22", 22 },
419 { "f23", 23 },
420 { "f24", 24 },
421 { "f25", 25 },
422 { "f26", 26 },
423 { "f27", 27 },
424 { "f28", 28 },
425 { "f29", 29 },
426 { "f3", 3 },
252b5132
RH		 427 { "f30", 30 },
428 { "f31", 31 },
066be9f7
PB		 429
430 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
431 { "f33", 33 },
432 { "f34", 34 },
433 { "f35", 35 },
434 { "f36", 36 },
435 { "f37", 37 },
436 { "f38", 38 },
437 { "f39", 39 },
81d4177b 438 { "f4", 4 },
066be9f7
PB		 439 { "f40", 40 },
440 { "f41", 41 },
441 { "f42", 42 },
442 { "f43", 43 },
443 { "f44", 44 },
444 { "f45", 45 },
445 { "f46", 46 },
446 { "f47", 47 },
447 { "f48", 48 },
448 { "f49", 49 },
81d4177b 449 { "f5", 5 },
066be9f7
PB		 450 { "f50", 50 },
451 { "f51", 51 },
452 { "f52", 52 },
453 { "f53", 53 },
454 { "f54", 54 },
455 { "f55", 55 },
456 { "f56", 56 },
457 { "f57", 57 },
458 { "f58", 58 },
459 { "f59", 59 },
81d4177b 460 { "f6", 6 },
066be9f7
PB		 461 { "f60", 60 },
462 { "f61", 61 },
463 { "f62", 62 },
464 { "f63", 63 },
81d4177b
KH		 465 { "f7", 7 },
466 { "f8", 8 },
467 { "f9", 9 },
252b5132
RH		 468
469 { "fpscr", 0 },
470
c3d65c1c
BE		 471 /* Quantization registers used with pair single instructions. */
472 { "gqr.0", 0 },
473 { "gqr.1", 1 },
474 { "gqr.2", 2 },
475 { "gqr.3", 3 },
476 { "gqr.4", 4 },
477 { "gqr.5", 5 },
478 { "gqr.6", 6 },
479 { "gqr.7", 7 },
480 { "gqr0", 0 },
481 { "gqr1", 1 },
482 { "gqr2", 2 },
483 { "gqr3", 3 },
484 { "gqr4", 4 },
485 { "gqr5", 5 },
486 { "gqr6", 6 },
487 { "gqr7", 7 },
488
252b5132
RH		 489 { "lr", 8 }, /* Link Register */
490
491 { "pmr", 0 },
492
493 { "r.0", 0 }, /* General Purpose Registers */
494 { "r.1", 1 },
495 { "r.10", 10 },
496 { "r.11", 11 },
497 { "r.12", 12 },
498 { "r.13", 13 },
499 { "r.14", 14 },
500 { "r.15", 15 },
501 { "r.16", 16 },
502 { "r.17", 17 },
503 { "r.18", 18 },
504 { "r.19", 19 },
505 { "r.2", 2 },
506 { "r.20", 20 },
507 { "r.21", 21 },
508 { "r.22", 22 },
509 { "r.23", 23 },
510 { "r.24", 24 },
511 { "r.25", 25 },
512 { "r.26", 26 },
513 { "r.27", 27 },
514 { "r.28", 28 },
515 { "r.29", 29 },
516 { "r.3", 3 },
517 { "r.30", 30 },
518 { "r.31", 31 },
519 { "r.4", 4 },
520 { "r.5", 5 },
521 { "r.6", 6 },
522 { "r.7", 7 },
523 { "r.8", 8 },
524 { "r.9", 9 },
525
526 { "r.sp", 1 }, /* Stack Pointer */
527
528 { "r.toc", 2 }, /* Pointer to the table of contents */
529
530 { "r0", 0 }, /* More general purpose registers */
531 { "r1", 1 },
532 { "r10", 10 },
533 { "r11", 11 },
534 { "r12", 12 },
535 { "r13", 13 },
536 { "r14", 14 },
537 { "r15", 15 },
538 { "r16", 16 },
539 { "r17", 17 },
540 { "r18", 18 },
541 { "r19", 19 },
542 { "r2", 2 },
543 { "r20", 20 },
544 { "r21", 21 },
545 { "r22", 22 },
546 { "r23", 23 },
547 { "r24", 24 },
548 { "r25", 25 },
549 { "r26", 26 },
550 { "r27", 27 },
551 { "r28", 28 },
552 { "r29", 29 },
553 { "r3", 3 },
554 { "r30", 30 },
555 { "r31", 31 },
556 { "r4", 4 },
557 { "r5", 5 },
558 { "r6", 6 },
559 { "r7", 7 },
560 { "r8", 8 },
561 { "r9", 9 },
562
563 { "rtoc", 2 }, /* Table of contents */
564
565 { "sdr1", 25 }, /* Storage Description Register 1 */
566
567 { "sp", 1 },
568
569 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
570 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 571
066be9f7 572 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 573 { "v.1", 1 },
574 { "v.10", 10 },
575 { "v.11", 11 },
576 { "v.12", 12 },
577 { "v.13", 13 },
578 { "v.14", 14 },
579 { "v.15", 15 },
580 { "v.16", 16 },
581 { "v.17", 17 },
582 { "v.18", 18 },
583 { "v.19", 19 },
584 { "v.2", 2 },
585 { "v.20", 20 },
586 { "v.21", 21 },
587 { "v.22", 22 },
588 { "v.23", 23 },
589 { "v.24", 24 },
590 { "v.25", 25 },
591 { "v.26", 26 },
592 { "v.27", 27 },
593 { "v.28", 28 },
594 { "v.29", 29 },
595 { "v.3", 3 },
7a899fff
C		 596 { "v.30", 30 },
597 { "v.31", 31 },
81d4177b
KH		 598 { "v.4", 4 },
599 { "v.5", 5 },
600 { "v.6", 6 },
601 { "v.7", 7 },
602 { "v.8", 8 },
603 { "v.9", 9 },
7a899fff
C		 604
605 { "v0", 0 },
81d4177b
KH		 606 { "v1", 1 },
607 { "v10", 10 },
608 { "v11", 11 },
609 { "v12", 12 },
610 { "v13", 13 },
611 { "v14", 14 },
612 { "v15", 15 },
613 { "v16", 16 },
614 { "v17", 17 },
615 { "v18", 18 },
616 { "v19", 19 },
617 { "v2", 2 },
618 { "v20", 20 },
619 { "v21", 21 },
620 { "v22", 22 },
621 { "v23", 23 },
622 { "v24", 24 },
623 { "v25", 25 },
624 { "v26", 26 },
625 { "v27", 27 },
626 { "v28", 28 },
627 { "v29", 29 },
628 { "v3", 3 },
7a899fff
C		 629 { "v30", 30 },
630 { "v31", 31 },
81d4177b
KH		 631 { "v4", 4 },
632 { "v5", 5 },
633 { "v6", 6 },
634 { "v7", 7 },
635 { "v8", 8 },
7a899fff 636 { "v9", 9 },
252b5132 637
066be9f7
PB		 638 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
639 { "vs.1", 1 },
640 { "vs.10", 10 },
641 { "vs.11", 11 },
642 { "vs.12", 12 },
643 { "vs.13", 13 },
644 { "vs.14", 14 },
645 { "vs.15", 15 },
646 { "vs.16", 16 },
647 { "vs.17", 17 },
648 { "vs.18", 18 },
649 { "vs.19", 19 },
650 { "vs.2", 2 },
651 { "vs.20", 20 },
652 { "vs.21", 21 },
653 { "vs.22", 22 },
654 { "vs.23", 23 },
655 { "vs.24", 24 },
656 { "vs.25", 25 },
657 { "vs.26", 26 },
658 { "vs.27", 27 },
659 { "vs.28", 28 },
660 { "vs.29", 29 },
661 { "vs.3", 3 },
662 { "vs.30", 30 },
663 { "vs.31", 31 },
664 { "vs.32", 32 },
665 { "vs.33", 33 },
666 { "vs.34", 34 },
667 { "vs.35", 35 },
668 { "vs.36", 36 },
669 { "vs.37", 37 },
670 { "vs.38", 38 },
671 { "vs.39", 39 },
672 { "vs.4", 4 },
673 { "vs.40", 40 },
674 { "vs.41", 41 },
675 { "vs.42", 42 },
676 { "vs.43", 43 },
677 { "vs.44", 44 },
678 { "vs.45", 45 },
679 { "vs.46", 46 },
680 { "vs.47", 47 },
681 { "vs.48", 48 },
682 { "vs.49", 49 },
683 { "vs.5", 5 },
684 { "vs.50", 50 },
685 { "vs.51", 51 },
686 { "vs.52", 52 },
687 { "vs.53", 53 },
688 { "vs.54", 54 },
689 { "vs.55", 55 },
690 { "vs.56", 56 },
691 { "vs.57", 57 },
692 { "vs.58", 58 },
693 { "vs.59", 59 },
694 { "vs.6", 6 },
695 { "vs.60", 60 },
696 { "vs.61", 61 },
697 { "vs.62", 62 },
698 { "vs.63", 63 },
699 { "vs.7", 7 },
700 { "vs.8", 8 },
701 { "vs.9", 9 },
702
703 { "vs0", 0 },
704 { "vs1", 1 },
705 { "vs10", 10 },
706 { "vs11", 11 },
707 { "vs12", 12 },
708 { "vs13", 13 },
709 { "vs14", 14 },
710 { "vs15", 15 },
711 { "vs16", 16 },
712 { "vs17", 17 },
713 { "vs18", 18 },
714 { "vs19", 19 },
715 { "vs2", 2 },
716 { "vs20", 20 },
717 { "vs21", 21 },
718 { "vs22", 22 },
719 { "vs23", 23 },
720 { "vs24", 24 },
721 { "vs25", 25 },
722 { "vs26", 26 },
723 { "vs27", 27 },
724 { "vs28", 28 },
725 { "vs29", 29 },
726 { "vs3", 3 },
727 { "vs30", 30 },
728 { "vs31", 31 },
729 { "vs32", 32 },
730 { "vs33", 33 },
731 { "vs34", 34 },
732 { "vs35", 35 },
733 { "vs36", 36 },
734 { "vs37", 37 },
735 { "vs38", 38 },
736 { "vs39", 39 },
737 { "vs4", 4 },
738 { "vs40", 40 },
739 { "vs41", 41 },
740 { "vs42", 42 },
741 { "vs43", 43 },
742 { "vs44", 44 },
743 { "vs45", 45 },
744 { "vs46", 46 },
745 { "vs47", 47 },
746 { "vs48", 48 },
747 { "vs49", 49 },
748 { "vs5", 5 },
749 { "vs50", 50 },
750 { "vs51", 51 },
751 { "vs52", 52 },
752 { "vs53", 53 },
753 { "vs54", 54 },
754 { "vs55", 55 },
755 { "vs56", 56 },
756 { "vs57", 57 },
757 { "vs58", 58 },
758 { "vs59", 59 },
759 { "vs6", 6 },
760 { "vs60", 60 },
761 { "vs61", 61 },
762 { "vs62", 62 },
763 { "vs63", 63 },
764 { "vs7", 7 },
765 { "vs8", 8 },
766 { "vs9", 9 },
767
252b5132
RH		 768 { "xer", 1 },
769
770};
771
bc805888 772#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 773
774/* Given NAME, find the register number associated with that name, return
775 the integer value associated with the given name or -1 on failure. */
776
252b5132 777static int
98027b10 778reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 779{
780 int middle, low, high;
781 int cmp;
782
783 low = 0;
784 high = regcount - 1;
785
786 do
787 {
788 middle = (low + high) / 2;
789 cmp = strcasecmp (name, regs[middle].name);
790 if (cmp < 0)
791 high = middle - 1;
792 else if (cmp > 0)
793 low = middle + 1;
794 else
795 return regs[middle].value;
796 }
797 while (low <= high);
798
799 return -1;
800}
801
802/*
99a814a1 803 * Summary of register_name.
252b5132
RH		 804 *
805 * in: Input_line_pointer points to 1st char of operand.
806 *
807 * out: A expressionS.
808 * The operand may have been a register: in this case, X_op == O_register,
809 * X_add_number is set to the register number, and truth is returned.
810 * Input_line_pointer->(next non-blank) char after operand, or is in its
811 * original state.
812 */
813
b34976b6 814static bfd_boolean
98027b10 815register_name (expressionS *expressionP)
252b5132
RH		 816{
817 int reg_number;
818 char *name;
819 char *start;
820 char c;
821
99a814a1 822 /* Find the spelling of the operand. */
252b5132 823 start = name = input_line_pointer;
3882b010 824 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 825 name = ++input_line_pointer;
826
3882b010 827 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 828 return FALSE;
252b5132
RH		 829
830 c = get_symbol_end ();
831 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
832
468cced8
AM		 833 /* Put back the delimiting char. */
834 *input_line_pointer = c;
835
99a814a1 836 /* Look to see if it's in the register table. */
81d4177b 837 if (reg_number >= 0)
252b5132
RH		 838 {
839 expressionP->X_op = O_register;
840 expressionP->X_add_number = reg_number;
81d4177b 841
99a814a1 842 /* Make the rest nice. */
252b5132
RH		 843 expressionP->X_add_symbol = NULL;
844 expressionP->X_op_symbol = NULL;
b34976b6 845 return TRUE;
252b5132 846 }
468cced8
AM		 847
848 /* Reset the line as if we had not done anything. */
849 input_line_pointer = start;
b34976b6 850 return FALSE;
252b5132
RH		 851}
852\f
853/* This function is called for each symbol seen in an expression. It
854 handles the special parsing which PowerPC assemblers are supposed
855 to use for condition codes. */
856
857/* Whether to do the special parsing. */
b34976b6 858static bfd_boolean cr_operand;
252b5132
RH		 859
860/* Names to recognize in a condition code. This table is sorted. */
861static const struct pd_reg cr_names[] =
862{
863 { "cr0", 0 },
864 { "cr1", 1 },
865 { "cr2", 2 },
866 { "cr3", 3 },
867 { "cr4", 4 },
868 { "cr5", 5 },
869 { "cr6", 6 },
870 { "cr7", 7 },
871 { "eq", 2 },
872 { "gt", 1 },
873 { "lt", 0 },
874 { "so", 3 },
875 { "un", 3 }
876};
877
878/* Parsing function. This returns non-zero if it recognized an
879 expression. */
880
881int
91d6fa6a 882ppc_parse_name (const char *name, expressionS *exp)
252b5132
RH		 883{
884 int val;
885
886 if (! cr_operand)
887 return 0;
888
13abbae3
AM		 889 if (*name == '%')
890 ++name;
252b5132
RH		 891 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
892 name);
893 if (val < 0)
894 return 0;
895
91d6fa6a
NC		 896 exp->X_op = O_constant;
897 exp->X_add_number = val;
252b5132
RH		 898
899 return 1;
900}
901\f
902/* Local variables. */
903
2b3c4602
AM		 904/* Whether to target xcoff64/elf64. */
905static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 906
252b5132
RH		 907/* Opcode hash table. */
908static struct hash_control *ppc_hash;
909
910/* Macro hash table. */
911static struct hash_control *ppc_macro_hash;
912
913#ifdef OBJ_ELF
99a814a1 914/* What type of shared library support to use. */
5d6f4f16 915static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 916
99a814a1 917/* Flags to set in the elf header. */
252b5132
RH		 918static flagword ppc_flags = 0;
919
920/* Whether this is Solaris or not. */
921#ifdef TARGET_SOLARIS_COMMENT
b34976b6 922#define SOLARIS_P TRUE
252b5132 923#else
b34976b6 924#define SOLARIS_P FALSE
252b5132
RH		 925#endif
926
b34976b6 927static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 928#endif
929
930#ifdef OBJ_XCOFF
931
932/* The RS/6000 assembler uses the .csect pseudo-op to generate code
933 using a bunch of different sections. These assembler sections,
934 however, are all encompassed within the .text or .data sections of
935 the final output file. We handle this by using different
936 subsegments within these main segments. */
937
938/* Next subsegment to allocate within the .text segment. */
939static subsegT ppc_text_subsegment = 2;
940
941/* Linked list of csects in the text section. */
942static symbolS *ppc_text_csects;
943
944/* Next subsegment to allocate within the .data segment. */
945static subsegT ppc_data_subsegment = 2;
946
947/* Linked list of csects in the data section. */
948static symbolS *ppc_data_csects;
949
950/* The current csect. */
951static symbolS *ppc_current_csect;
952
953/* The RS/6000 assembler uses a TOC which holds addresses of functions
954 and variables. Symbols are put in the TOC with the .tc pseudo-op.
955 A special relocation is used when accessing TOC entries. We handle
956 the TOC as a subsegment within the .data segment. We set it up if
957 we see a .toc pseudo-op, and save the csect symbol here. */
958static symbolS *ppc_toc_csect;
959
960/* The first frag in the TOC subsegment. */
961static fragS *ppc_toc_frag;
962
963/* The first frag in the first subsegment after the TOC in the .data
964 segment. NULL if there are no subsegments after the TOC. */
965static fragS *ppc_after_toc_frag;
966
967/* The current static block. */
968static symbolS *ppc_current_block;
969
970/* The COFF debugging section; set by md_begin. This is not the
971 .debug section, but is instead the secret BFD section which will
972 cause BFD to set the section number of a symbol to N_DEBUG. */
973static asection *ppc_coff_debug_section;
974
975#endif /* OBJ_XCOFF */
976
977#ifdef TE_PE
978
979/* Various sections that we need for PE coff support. */
980static segT ydata_section;
981static segT pdata_section;
982static segT reldata_section;
983static segT rdata_section;
984static segT tocdata_section;
985
81d4177b 986/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 987static segT ppc_previous_section;
988static segT ppc_current_section;
989
990#endif /* TE_PE */
991
992#ifdef OBJ_ELF
993symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 994#define PPC_APUINFO_ISEL 0x40
995#define PPC_APUINFO_PMR 0x41
996#define PPC_APUINFO_RFMCI 0x42
997#define PPC_APUINFO_CACHELCK 0x43
998#define PPC_APUINFO_SPE 0x100
999#define PPC_APUINFO_EFS 0x101
1000#define PPC_APUINFO_BRLOCK 0x102
1001
b34976b6
AM		 1002/*
1003 * We keep a list of APUinfo
6a0c61b7
EZ		 1004 */
1005unsigned long *ppc_apuinfo_list;
1006unsigned int ppc_apuinfo_num;
1007unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1008#endif /* OBJ_ELF */
1009\f
1010#ifdef OBJ_ELF
15c1449b 1011const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1012#else
15c1449b 1013const char *const md_shortopts = "um:";
252b5132 1014#endif
15c1449b 1015const struct option md_longopts[] = {
252b5132
RH		 1016 {NULL, no_argument, NULL, 0}
1017};
15c1449b 1018const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 1019
1020int
98027b10 1021md_parse_option (int c, char *arg)
252b5132 1022{
69fe9ce5
AM		 1023 ppc_cpu_t new_cpu;
1024
252b5132
RH		 1025 switch (c)
1026 {
1027 case 'u':
1028 /* -u means that any undefined symbols should be treated as
1029 external, which is the default for gas anyhow. */
1030 break;
1031
1032#ifdef OBJ_ELF
1033 case 'l':
1034 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1035 sake, recognize -be also. */
252b5132
RH		 1036 if (strcmp (arg, "e") == 0)
1037 {
1038 target_big_endian = 0;
1039 set_target_endian = 1;
1040 }
1041 else
1042 return 0;
1043
1044 break;
1045
1046 case 'b':
1047 if (strcmp (arg, "e") == 0)
1048 {
1049 target_big_endian = 1;
1050 set_target_endian = 1;
1051 }
1052 else
1053 return 0;
1054
1055 break;
1056
1057 case 'K':
99a814a1 1058 /* Recognize -K PIC. */
252b5132
RH		 1059 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1060 {
1061 shlib = SHLIB_PIC;
1062 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1063 }
1064 else
1065 return 0;
1066
1067 break;
1068#endif
1069
7f6d05e8
CP		 1070 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1071 case 'a':
1072 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1073 {
1074#ifdef BFD64
1075 ppc_obj64 = 1;
1076#else
1077 as_fatal (_("%s unsupported"), "-a64");
1078#endif
1079 }
7f6d05e8 1080 else if (strcmp (arg, "32") == 0)
2b3c4602 1081 ppc_obj64 = 0;
7f6d05e8
CP		 1082 else
1083 return 0;
1084 break;
81d4177b 1085
252b5132 1086 case 'm':
69fe9ce5
AM		 1087 if ((new_cpu = ppc_parse_cpu (ppc_cpu, arg)) != 0)
1088 ppc_cpu = new_cpu;
252b5132
RH		 1089
1090 else if (strcmp (arg, "regnames") == 0)
b34976b6 1091 reg_names_p = TRUE;
252b5132
RH		 1092
1093 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1094 reg_names_p = FALSE;
252b5132
RH		 1095
1096#ifdef OBJ_ELF
99a814a1
AM		 1097 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1098 that require relocation. */
252b5132
RH		 1099 else if (strcmp (arg, "relocatable") == 0)
1100 {
5d6f4f16 1101 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1102 ppc_flags |= EF_PPC_RELOCATABLE;
1103 }
1104
1105 else if (strcmp (arg, "relocatable-lib") == 0)
1106 {
5d6f4f16 1107 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1108 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1109 }
1110
99a814a1 1111 /* -memb, set embedded bit. */
252b5132
RH		 1112 else if (strcmp (arg, "emb") == 0)
1113 ppc_flags |= EF_PPC_EMB;
1114
99a814a1
AM		 1115 /* -mlittle/-mbig set the endianess. */
1116 else if (strcmp (arg, "little") == 0
1117 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1118 {
1119 target_big_endian = 0;
1120 set_target_endian = 1;
1121 }
1122
1123 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1124 {
1125 target_big_endian = 1;
1126 set_target_endian = 1;
1127 }
1128
1129 else if (strcmp (arg, "solaris") == 0)
1130 {
b34976b6 1131 msolaris = TRUE;
252b5132
RH		 1132 ppc_comment_chars = ppc_solaris_comment_chars;
1133 }
1134
1135 else if (strcmp (arg, "no-solaris") == 0)
1136 {
b34976b6 1137 msolaris = FALSE;
252b5132
RH		 1138 ppc_comment_chars = ppc_eabi_comment_chars;
1139 }
1140#endif
1141 else
1142 {
1143 as_bad (_("invalid switch -m%s"), arg);
1144 return 0;
1145 }
1146 break;
1147
1148#ifdef OBJ_ELF
1149 /* -V: SVR4 argument to print version ID. */
1150 case 'V':
1151 print_version_id ();
1152 break;
1153
1154 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1155 should be emitted or not. FIXME: Not implemented. */
1156 case 'Q':
1157 break;
1158
1159 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1160 rather than .stabs.excl, which is ignored by the linker.
1161 FIXME: Not implemented. */
1162 case 's':
1163 if (arg)
1164 return 0;
1165
1166 break;
1167#endif
1168
1169 default:
1170 return 0;
1171 }
1172
1173 return 1;
1174}
1175
1176void
98027b10 1177md_show_usage (FILE *stream)
252b5132 1178{
bc805888 1179 fprintf (stream, _("\
252b5132 1180PowerPC options:\n\
ce3d2015
AM		 1181-a32 generate ELF32/XCOFF32\n\
1182-a64 generate ELF64/XCOFF64\n\
1183-u ignored\n\
1184-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1185-mpwr generate code for POWER (RIOS1)\n\
1186-m601 generate code for PowerPC 601\n\
418c1742 1187-mppc, -mppc32, -m603, -m604\n\
ce3d2015
AM		 1188 generate code for PowerPC 603/604\n\
1189-m403 generate code for PowerPC 403\n\
1190-m405 generate code for PowerPC 405\n\
1191-m440 generate code for PowerPC 440\n\
1192-m464 generate code for PowerPC 464\n\
1193-m476 generate code for PowerPC 476\n\
f5c120c5 1194-m7400, -m7410, -m7450, -m7455\n\
ce3d2015
AM		 1195 generate code for PowerPC 7400/7410/7450/7455\n\
1196-m750cl generate code for PowerPC 750cl\n"));
df12615d 1197 fprintf (stream, _("\
ce3d2015
AM		 1198-mppc64, -m620 generate code for PowerPC 620/625/630\n\
1199-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1200-mbooke generate code for 32-bit PowerPC BookE\n\
1201-ma2 generate code for A2 architecture\n\
cdc51b07
RS		 1202-mpower4, -mpwr4 generate code for Power4 architecture\n\
1203-mpower5, -mpwr5, -mpwr5x\n\
1204 generate code for Power5 architecture\n\
1205-mpower6, -mpwr6 generate code for Power6 architecture\n\
1206-mpower7, -mpwr7 generate code for Power7 architecture\n\
ce3d2015
AM		 1207-mcell generate code for Cell Broadband Engine architecture\n\
1208-mcom generate code Power/PowerPC common instructions\n\
1209-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1210 fprintf (stream, _("\
ce3d2015
AM		 1211-maltivec generate code for AltiVec\n\
1212-mvsx generate code for Vector-Scalar (VSX) instructions\n\
1213-me300 generate code for PowerPC e300 family\n\
1214-me500, -me500x2 generate code for Motorola e500 core complex\n\
1215-me500mc, generate code for Freescale e500mc core complex\n\
1216-me500mc64, generate code for Freescale e500mc64 core complex\n\
1217-mspe generate code for Motorola SPE instructions\n\
1218-mtitan generate code for AppliedMicro Titan core complex\n\
1219-mregnames Allow symbolic names for registers\n\
1220-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1221#ifdef OBJ_ELF
bc805888 1222 fprintf (stream, _("\
ce3d2015
AM		 1223-mrelocatable support for GCC's -mrelocatble option\n\
1224-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1225-memb set PPC_EMB bit in ELF flags\n\
df12615d 1226-mlittle, -mlittle-endian, -l, -le\n\
ce3d2015 1227 generate code for a little endian machine\n\
df12615d 1228-mbig, -mbig-endian, -b, -be\n\
ce3d2015
AM		 1229 generate code for a big endian machine\n\
1230-msolaris generate code for Solaris\n\
1231-mno-solaris do not generate code for Solaris\n\
1232-V print assembler version number\n\
1233-Qy, -Qn ignored\n"));
252b5132
RH		 1234#endif
1235}
1236\f
1237/* Set ppc_cpu if it is not already set. */
1238
1239static void
98027b10 1240ppc_set_cpu (void)
252b5132
RH		 1241{
1242 const char *default_os = TARGET_OS;
1243 const char *default_cpu = TARGET_CPU;
1244
3c9030c1 1245 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1246 {
2a98c3a6 1247 if (ppc_obj64)
3c9030c1 1248 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1249 else if (strncmp (default_os, "aix", 3) == 0
1250 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1251 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1252 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1253 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1254 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1255 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1256 else if (strncmp (default_cpu, "powerpc", 7) == 0)
23d36e92 1257 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
252b5132 1258 else
99a814a1
AM		 1259 as_fatal (_("Unknown default cpu = %s, os = %s"),
1260 default_cpu, default_os);
252b5132
RH		 1261 }
1262}
1263
9232bbb0
AM		 1264/* Figure out the BFD architecture to use. This function and ppc_mach
1265 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1266
1267enum bfd_architecture
98027b10 1268ppc_arch (void)
252b5132
RH		 1269{
1270 const char *default_cpu = TARGET_CPU;
1271 ppc_set_cpu ();
1272
1273 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1274 return bfd_arch_powerpc;
1275 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1276 return bfd_arch_rs6000;
1277 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1278 {
1279 if (strcmp (default_cpu, "rs6000") == 0)
1280 return bfd_arch_rs6000;
0baf16f2 1281 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1282 return bfd_arch_powerpc;
1283 }
1284
1285 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1286 return bfd_arch_unknown;
1287}
1288
7f6d05e8 1289unsigned long
98027b10 1290ppc_mach (void)
7f6d05e8 1291{
2a98c3a6
AM		 1292 if (ppc_obj64)
1293 return bfd_mach_ppc64;
1294 else if (ppc_arch () == bfd_arch_rs6000)
1295 return bfd_mach_rs6k;
ce3d2015
AM		 1296 else if (ppc_cpu & PPC_OPCODE_TITAN)
1297 return bfd_mach_ppc_titan;
2a98c3a6
AM		 1298 else
1299 return bfd_mach_ppc;
7f6d05e8
CP		 1300}
1301
81d4177b 1302extern char*
98027b10 1303ppc_target_format (void)
7f6d05e8
CP		 1304{
1305#ifdef OBJ_COFF
1306#ifdef TE_PE
99a814a1 1307 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1308#elif TE_POWERMAC
0baf16f2 1309 return "xcoff-powermac";
7f6d05e8 1310#else
eb1e0e80 1311# ifdef TE_AIX5
2b3c4602 1312 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1313# else
2b3c4602 1314 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1315# endif
7f6d05e8 1316#endif
7f6d05e8
CP		 1317#endif
1318#ifdef OBJ_ELF
9d8504b1
PB		 1319# ifdef TE_VXWORKS
1320 return "elf32-powerpc-vxworks";
1321# else
0baf16f2 1322 return (target_big_endian
2b3c4602
AM		 1323 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1324 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1325# endif
7f6d05e8
CP		 1326#endif
1327}
1328
69c040df
AM		 1329/* Insert opcodes and macros into hash tables. Called at startup and
1330 for .cpu pseudo. */
252b5132 1331
69c040df
AM		 1332static void
1333ppc_setup_opcodes (void)
252b5132 1334{
98027b10 1335 const struct powerpc_opcode *op;
252b5132
RH		 1336 const struct powerpc_opcode *op_end;
1337 const struct powerpc_macro *macro;
1338 const struct powerpc_macro *macro_end;
b84bf58a 1339 bfd_boolean bad_insn = FALSE;
252b5132 1340
69c040df
AM		 1341 if (ppc_hash != NULL)
1342 hash_die (ppc_hash);
1343 if (ppc_macro_hash != NULL)
1344 hash_die (ppc_macro_hash);
252b5132
RH		 1345
1346 /* Insert the opcodes into a hash table. */
1347 ppc_hash = hash_new ();
1348
c43a438d 1349 if (ENABLE_CHECKING)
b84bf58a 1350 {
c43a438d 1351 unsigned int i;
b84bf58a 1352
c43a438d
AM		 1353 /* Check operand masks. Code here and in the disassembler assumes
1354 all the 1's in the mask are contiguous. */
1355 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1356 {
c43a438d
AM		 1357 unsigned long mask = powerpc_operands[i].bitm;
1358 unsigned long right_bit;
1359 unsigned int j;
1360
1361 right_bit = mask & -mask;
1362 mask += right_bit;
1363 right_bit = mask & -mask;
1364 if (mask != right_bit)
1365 {
1366 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1367 bad_insn = TRUE;
1368 }
1369 for (j = i + 1; j < num_powerpc_operands; ++j)
1370 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1371 sizeof (powerpc_operands[0])) == 0)
1372 {
1373 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1374 j, i);
1375 bad_insn = TRUE;
1376 }
b84bf58a
AM		 1377 }
1378 }
1379
252b5132
RH		 1380 op_end = powerpc_opcodes + powerpc_num_opcodes;
1381 for (op = powerpc_opcodes; op < op_end; op++)
1382 {
c43a438d 1383 if (ENABLE_CHECKING)
b84bf58a 1384 {
c43a438d
AM		 1385 const unsigned char *o;
1386 unsigned long omask = op->mask;
8dbcd839 1387
d815f1a9 1388 if (op != powerpc_opcodes)
8dbcd839 1389 {
d815f1a9
AM		 1390 /* The major opcodes had better be sorted. Code in the
1391 disassembler assumes the insns are sorted according to
1392 major opcode. */
1393 if (PPC_OP (op[0].opcode) < PPC_OP (op[-1].opcode))
1394 {
1395 as_bad (_("major opcode is not sorted for %s"),
1396 op->name);
1397 bad_insn = TRUE;
1398 }
1399
1400 /* Warn if the table isn't more strictly ordered.
1401 Unfortunately it doesn't seem possible to order the
1402 table on much more than the major opcode, which makes
1403 it difficult to implement a binary search in the
1404 disassembler. The problem is that we have multiple
1405 ways to disassemble instructions, and we usually want
1406 to choose a more specific form (with more bits set in
1407 the opcode) than a more general form. eg. all of the
1408 following are equivalent:
1409 bne label # opcode = 0x40820000, mask = 0xff830003
1410 bf 2,label # opcode = 0x40800000, mask = 0xff800003
1411 bc 4,2,label # opcode = 0x40000000, mask = 0xfc000003
1412
1413 There are also cases where the table needs to be out
1414 of order to disassemble the correct instruction for
2f3bb96a 1415 processor variants. */
d815f1a9
AM		 1416 else if (0)
1417 {
1418 unsigned long t1 = op[0].opcode;
1419 unsigned long t2 = op[-1].opcode;
1420
1421 if (((t1 ^ t2) & 0xfc0007ff) == 0
1422 && (t1 & 0xfc0006df) == 0x7c000286)
1423 {
1424 /* spr field is split. */
1425 t1 = ((t1 & ~0x1ff800)
1426 | ((t1 & 0xf800) << 5) | ((t1 & 0x1f0000) >> 5));
1427 t2 = ((t2 & ~0x1ff800)
1428 | ((t2 & 0xf800) << 5) | ((t2 & 0x1f0000) >> 5));
1429 }
1430 if (t1 < t2)
1431 as_warn (_("%s (%08lx %08lx) after %s (%08lx %08lx)"),
1432 op[0].name, op[0].opcode, op[0].mask,
1433 op[-1].name, op[-1].opcode, op[-1].mask);
1434 }
8dbcd839 1435 }
c43a438d
AM		 1436
1437 /* The mask had better not trim off opcode bits. */
1438 if ((op->opcode & omask) != op->opcode)
1439 {
1440 as_bad (_("mask trims opcode bits for %s"),
1441 op->name);
1442 bad_insn = TRUE;
1443 }
1444
1445 /* The operands must not overlap the opcode or each other. */
1446 for (o = op->operands; *o; ++o)
1447 if (*o >= num_powerpc_operands)
1448 {
1449 as_bad (_("operand index error for %s"),
1450 op->name);
1451 bad_insn = TRUE;
1452 }
1453 else
b84bf58a 1454 {
c43a438d
AM		 1455 const struct powerpc_operand *operand = &powerpc_operands[*o];
1456 if (operand->shift >= 0)
b84bf58a 1457 {
c43a438d
AM		 1458 unsigned long mask = operand->bitm << operand->shift;
1459 if (omask & mask)
1460 {
1461 as_bad (_("operand %d overlap in %s"),
1462 (int) (o - op->operands), op->name);
1463 bad_insn = TRUE;
1464 }
1465 omask |= mask;
b84bf58a 1466 }
b84bf58a 1467 }
c43a438d 1468 }
252b5132 1469
2b3c4602 1470 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1471 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1472 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1473 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1474 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
1cb0a767 1475 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1476 {
1477 const char *retval;
1478
98027b10 1479 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1480 if (retval != NULL)
252b5132 1481 {
99a814a1 1482 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1483 if ((ppc_cpu & PPC_OPCODE_601) != 0
1484 && (op->flags & PPC_OPCODE_POWER) != 0)
1485 continue;
1486
b84bf58a 1487 as_bad (_("duplicate instruction %s"),
99a814a1 1488 op->name);
b84bf58a 1489 bad_insn = TRUE;
252b5132
RH		 1490 }
1491 }
1492 }
1493
3c9030c1
AM		 1494 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1495 for (op = powerpc_opcodes; op < op_end; op++)
98027b10 1496 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1497
252b5132
RH		 1498 /* Insert the macros into a hash table. */
1499 ppc_macro_hash = hash_new ();
1500
1501 macro_end = powerpc_macros + powerpc_num_macros;
1502 for (macro = powerpc_macros; macro < macro_end; macro++)
1503 {
1504 if ((macro->flags & ppc_cpu) != 0)
1505 {
1506 const char *retval;
1507
98027b10 1508 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1509 if (retval != (const char *) NULL)
1510 {
b84bf58a
AM		 1511 as_bad (_("duplicate macro %s"), macro->name);
1512 bad_insn = TRUE;
252b5132
RH		 1513 }
1514 }
1515 }
1516
b84bf58a 1517 if (bad_insn)
252b5132 1518 abort ();
69c040df
AM		 1519}
1520
1521/* This function is called when the assembler starts up. It is called
1522 after the options have been parsed and the output file has been
1523 opened. */
1524
1525void
98027b10 1526md_begin (void)
69c040df
AM		 1527{
1528 ppc_set_cpu ();
1529
1530 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1531
1532#ifdef OBJ_ELF
1533 /* Set the ELF flags if desired. */
1534 if (ppc_flags && !msolaris)
1535 bfd_set_private_flags (stdoutput, ppc_flags);
1536#endif
1537
1538 ppc_setup_opcodes ();
252b5132 1539
67c1ffbe 1540 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1541 by the user. */
252b5132
RH		 1542 if (!set_target_endian)
1543 {
1544 set_target_endian = 1;
1545 target_big_endian = PPC_BIG_ENDIAN;
1546 }
1547
1548#ifdef OBJ_XCOFF
1549 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1550
1551 /* Create dummy symbols to serve as initial csects. This forces the
1552 text csects to precede the data csects. These symbols will not
1553 be output. */
1554 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1555 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1556 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1557 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1558#endif
1559
1560#ifdef TE_PE
1561
1562 ppc_current_section = text_section;
81d4177b 1563 ppc_previous_section = 0;
252b5132
RH		 1564
1565#endif
1566}
1567
6a0c61b7 1568void
98027b10 1569ppc_cleanup (void)
6a0c61b7 1570{
dc1d03fc 1571#ifdef OBJ_ELF
6a0c61b7
EZ		 1572 if (ppc_apuinfo_list == NULL)
1573 return;
1574
1575 /* Ok, so write the section info out. We have this layout:
1576
1577 byte data what
1578 ---- ---- ----
1579 0 8 length of "APUinfo\0"
1580 4 (n*4) number of APU's (4 bytes each)
1581 8 2 note type 2
1582 12 "APUinfo\0" name
1583 20 APU#1 first APU's info
1584 24 APU#2 second APU's info
1585 ... ...
1586 */
1587 {
1588 char *p;
1589 asection *seg = now_seg;
1590 subsegT subseg = now_subseg;
1591 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1592 unsigned int i;
6a0c61b7
EZ		 1593
1594 /* Create the .PPC.EMB.apuinfo section. */
1595 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1596 bfd_set_section_flags (stdoutput,
1597 apuinfo_secp,
e1a9cb8e 1598 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1599
1600 p = frag_more (4);
1601 md_number_to_chars (p, (valueT) 8, 4);
1602
1603 p = frag_more (4);
e98d298c 1604 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1605
1606 p = frag_more (4);
1607 md_number_to_chars (p, (valueT) 2, 4);
1608
1609 p = frag_more (8);
1610 strcpy (p, "APUinfo");
1611
1612 for (i = 0; i < ppc_apuinfo_num; i++)
1613 {
b34976b6
AM		 1614 p = frag_more (4);
1615 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1616 }
1617
1618 frag_align (2, 0, 0);
1619
1620 /* We probably can't restore the current segment, for there likely
1621 isn't one yet... */
1622 if (seg && subseg)
1623 subseg_set (seg, subseg);
1624 }
dc1d03fc 1625#endif
6a0c61b7
EZ		 1626}
1627
252b5132
RH		 1628/* Insert an operand value into an instruction. */
1629
1630static unsigned long
a1867a27
AM		 1631ppc_insert_operand (unsigned long insn,
1632 const struct powerpc_operand *operand,
1633 offsetT val,
91d6fa6a 1634 ppc_cpu_t cpu,
a1867a27
AM		 1635 char *file,
1636 unsigned int line)
252b5132 1637{
b84bf58a 1638 long min, max, right;
eb42fac1 1639
b84bf58a
AM		 1640 max = operand->bitm;
1641 right = max & -max;
1642 min = 0;
1643
1644 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1645 {
b84bf58a 1646 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1647 max = (max >> 1) & -right;
1648 min = ~max & -right;
b84bf58a 1649 }
252b5132 1650
b84bf58a 1651 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1652 max++;
252b5132 1653
b84bf58a 1654 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1655 {
1656 long tmp = min;
1657 min = -max;
1658 max = -tmp;
1659 }
b84bf58a 1660
a1867a27
AM		 1661 if (min <= max)
1662 {
1663 /* Some people write constants with the sign extension done by
1664 hand but only up to 32 bits. This shouldn't really be valid,
1665 but, to permit this code to assemble on a 64-bit host, we
1666 sign extend the 32-bit value to 64 bits if so doing makes the
1667 value valid. */
1668 if (val > max
1669 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1670 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1671 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1672 val = val - 0x80000000 - 0x80000000;
1673
1674 /* Similarly, people write expressions like ~(1<<15), and expect
1675 this to be OK for a 32-bit unsigned value. */
1676 else if (val < min
1677 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1678 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1679 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1680 val = val + 0x80000000 + 0x80000000;
1681
1682 else if (val < min
1683 || val > max
1684 || (val & (right - 1)) != 0)
1685 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1686 }
b84bf58a 1687
252b5132
RH		 1688 if (operand->insert)
1689 {
1690 const char *errmsg;
1691
1692 errmsg = NULL;
91d6fa6a 1693 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
252b5132 1694 if (errmsg != (const char *) NULL)
ee2c9aa9 1695 as_bad_where (file, line, "%s", errmsg);
252b5132
RH		 1696 }
1697 else
b84bf58a 1698 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1699
1700 return insn;
1701}
1702
1703\f
1704#ifdef OBJ_ELF
1705/* Parse @got, etc. and return the desired relocation. */
1706static bfd_reloc_code_real_type
98027b10 1707ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1708{
1709 struct map_bfd {
1710 char *string;
b7d7dc63
AM		 1711 unsigned int length : 8;
1712 unsigned int valid32 : 1;
1713 unsigned int valid64 : 1;
1714 unsigned int reloc;
252b5132
RH		 1715 };
1716
1717 char ident[20];
1718 char *str = *str_p;
1719 char *str2;
1720 int ch;
1721 int len;
15c1449b 1722 const struct map_bfd *ptr;
252b5132 1723
b7d7dc63
AM		 1724#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1725#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1726#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1727
15c1449b 1728 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1729 MAP ("l", BFD_RELOC_LO16),
1730 MAP ("h", BFD_RELOC_HI16),
1731 MAP ("ha", BFD_RELOC_HI16_S),
1732 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1733 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1734 MAP ("got", BFD_RELOC_16_GOTOFF),
1735 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1736 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1737 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1738 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1739 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1740 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1741 MAP ("copy", BFD_RELOC_PPC_COPY),
1742 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1743 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1744 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1745 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1746 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1747 MAP ("tls", BFD_RELOC_PPC_TLS),
1748 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1749 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1750 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1751 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1752 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1753 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1754 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1755 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1756 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1757 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1758 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1759 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1760 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1761 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1762 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1763 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1764 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1765 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1766 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1767 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1768 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1769 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1770 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1771 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1772 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1773 MAP32 ("fixup", BFD_RELOC_CTOR),
1774 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1775 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1776 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1777 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1778 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1779 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1780 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1781 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1782 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1783 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1784 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1785 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1786 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1787 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1788 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1789 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1790 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1791 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1792 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1793 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1794 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1795 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1796 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1797 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1798 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1799 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1800 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1801 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1802 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1803 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1804 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1805 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1806 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1807 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1808 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1809 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1810 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1811 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1812 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1813 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1814 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1815 };
1816
1817 if (*str++ != '@')
1818 return BFD_RELOC_UNUSED;
1819
1820 for (ch = *str, str2 = ident;
1821 (str2 < ident + sizeof (ident) - 1
3882b010 1822 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1823 ch = *++str)
1824 {
3882b010 1825 *str2++ = TOLOWER (ch);
252b5132
RH		 1826 }
1827
1828 *str2 = '\0';
1829 len = str2 - ident;
1830
1831 ch = ident[0];
1832 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1833 if (ch == ptr->string[0]
1834 && len == ptr->length
b7d7dc63
AM		 1835 && memcmp (ident, ptr->string, ptr->length) == 0
1836 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1837 {
15c1449b
AM		 1838 int reloc = ptr->reloc;
1839
727fc41e
AM		 1840 if (!ppc_obj64 && exp_p->X_add_number != 0)
1841 {
1842 switch (reloc)
1843 {
1844 case BFD_RELOC_16_GOTOFF:
1845 case BFD_RELOC_LO16_GOTOFF:
1846 case BFD_RELOC_HI16_GOTOFF:
1847 case BFD_RELOC_HI16_S_GOTOFF:
1848 as_warn (_("identifier+constant@got means "
1849 "identifier@got+constant"));
1850 break;
1851
1852 case BFD_RELOC_PPC_GOT_TLSGD16:
1853 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
1854 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
1855 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
1856 case BFD_RELOC_PPC_GOT_TLSLD16:
1857 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
1858 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
1859 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
1860 case BFD_RELOC_PPC_GOT_DTPREL16:
1861 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
1862 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
1863 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
1864 case BFD_RELOC_PPC_GOT_TPREL16:
1865 case BFD_RELOC_PPC_GOT_TPREL16_LO:
1866 case BFD_RELOC_PPC_GOT_TPREL16_HI:
1867 case BFD_RELOC_PPC_GOT_TPREL16_HA:
1868 as_bad (_("symbol+offset not supported for got tls"));
1869 break;
1870 }
1871 }
5f6db75a
AM		 1872
1873 /* Now check for identifier@suffix+constant. */
1874 if (*str == '-' || *str == '+')
252b5132 1875 {
5f6db75a
AM		 1876 char *orig_line = input_line_pointer;
1877 expressionS new_exp;
1878
1879 input_line_pointer = str;
1880 expression (&new_exp);
1881 if (new_exp.X_op == O_constant)
252b5132 1882 {
5f6db75a
AM		 1883 exp_p->X_add_number += new_exp.X_add_number;
1884 str = input_line_pointer;
252b5132 1885 }
5f6db75a
AM		 1886
1887 if (&input_line_pointer != str_p)
1888 input_line_pointer = orig_line;
252b5132 1889 }
252b5132 1890 *str_p = str;
0baf16f2 1891
2b3c4602 1892 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1893 && exp_p->X_op == O_symbol
1894 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1895 {
9f2b53d7
AM		 1896 /* Change the symbol so that the dummy .TOC. symbol can be
1897 omitted from the object file. */
0baf16f2
AM		 1898 exp_p->X_add_symbol = &abs_symbol;
1899 }
1900
15c1449b 1901 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1902 }
1903
1904 return BFD_RELOC_UNUSED;
1905}
1906
99a814a1
AM		 1907/* Like normal .long/.short/.word, except support @got, etc.
1908 Clobbers input_line_pointer, checks end-of-line. */
252b5132 1909static void
98027b10 1910ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 1911{
1912 expressionS exp;
1913 bfd_reloc_code_real_type reloc;
1914
1915 if (is_it_end_of_statement ())
1916 {
1917 demand_empty_rest_of_line ();
1918 return;
1919 }
1920
1921 do
1922 {
1923 expression (&exp);
1924 if (exp.X_op == O_symbol
1925 && *input_line_pointer == '@'
99a814a1
AM		 1926 && (reloc = ppc_elf_suffix (&input_line_pointer,
1927 &exp)) != BFD_RELOC_UNUSED)
252b5132 1928 {
99a814a1
AM		 1929 reloc_howto_type *reloc_howto;
1930 int size;
1931
1932 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1933 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1934
1935 if (size > nbytes)
0baf16f2
AM		 1936 {
1937 as_bad (_("%s relocations do not fit in %d bytes\n"),
1938 reloc_howto->name, nbytes);
1939 }
252b5132
RH		 1940 else
1941 {
0baf16f2
AM		 1942 char *p;
1943 int offset;
252b5132 1944
0baf16f2 1945 p = frag_more (nbytes);
aa0c8c1a 1946 memset (p, 0, nbytes);
0baf16f2
AM		 1947 offset = 0;
1948 if (target_big_endian)
1949 offset = nbytes - size;
99a814a1
AM		 1950 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1951 &exp, 0, reloc);
252b5132
RH		 1952 }
1953 }
1954 else
1955 emit_expr (&exp, (unsigned int) nbytes);
1956 }
1957 while (*input_line_pointer++ == ',');
1958
99a814a1
AM		 1959 /* Put terminator back into stream. */
1960 input_line_pointer--;
252b5132
RH		 1961 demand_empty_rest_of_line ();
1962}
1963
1964/* Solaris pseduo op to change to the .rodata section. */
1965static void
98027b10 1966ppc_elf_rdata (int xxx)
252b5132
RH		 1967{
1968 char *save_line = input_line_pointer;
1969 static char section[] = ".rodata\n";
1970
99a814a1 1971 /* Just pretend this is .section .rodata */
252b5132
RH		 1972 input_line_pointer = section;
1973 obj_elf_section (xxx);
1974
1975 input_line_pointer = save_line;
1976}
1977
99a814a1 1978/* Pseudo op to make file scope bss items. */
252b5132 1979static void
98027b10 1980ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 1981{
98027b10
AM		 1982 char *name;
1983 char c;
1984 char *p;
252b5132 1985 offsetT size;
98027b10 1986 symbolS *symbolP;
252b5132
RH		 1987 offsetT align;
1988 segT old_sec;
1989 int old_subsec;
1990 char *pfrag;
1991 int align2;
1992
1993 name = input_line_pointer;
1994 c = get_symbol_end ();
1995
99a814a1 1996 /* just after name is now '\0'. */
252b5132
RH		 1997 p = input_line_pointer;
1998 *p = c;
1999 SKIP_WHITESPACE ();
2000 if (*input_line_pointer != ',')
2001 {
2002 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
2003 ignore_rest_of_line ();
2004 return;
2005 }
2006
2007 input_line_pointer++; /* skip ',' */
2008 if ((size = get_absolute_expression ()) < 0)
2009 {
2010 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2011 ignore_rest_of_line ();
2012 return;
2013 }
2014
2015 /* The third argument to .lcomm is the alignment. */
2016 if (*input_line_pointer != ',')
2017 align = 8;
2018 else
2019 {
2020 ++input_line_pointer;
2021 align = get_absolute_expression ();
2022 if (align <= 0)
2023 {
2024 as_warn (_("ignoring bad alignment"));
2025 align = 8;
2026 }
2027 }
2028
2029 *p = 0;
2030 symbolP = symbol_find_or_make (name);
2031 *p = c;
2032
2033 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2034 {
2035 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
2036 S_GET_NAME (symbolP));
2037 ignore_rest_of_line ();
2038 return;
2039 }
2040
2041 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2042 {
2043 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2044 S_GET_NAME (symbolP),
2045 (long) S_GET_VALUE (symbolP),
2046 (long) size);
2047
2048 ignore_rest_of_line ();
2049 return;
2050 }
2051
99a814a1 2052 /* Allocate_bss. */
252b5132
RH		 2053 old_sec = now_seg;
2054 old_subsec = now_subseg;
2055 if (align)
2056 {
99a814a1 2057 /* Convert to a power of 2 alignment. */
252b5132
RH		 2058 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2059 if (align != 1)
2060 {
2061 as_bad (_("Common alignment not a power of 2"));
2062 ignore_rest_of_line ();
2063 return;
2064 }
2065 }
2066 else
2067 align2 = 0;
2068
2069 record_alignment (bss_section, align2);
2070 subseg_set (bss_section, 0);
2071 if (align2)
2072 frag_align (align2, 0, 0);
2073 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2074 symbol_get_frag (symbolP)->fr_symbol = 0;
2075 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2076 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2077 (char *) 0);
2078 *pfrag = 0;
2079 S_SET_SIZE (symbolP, size);
2080 S_SET_SEGMENT (symbolP, bss_section);
2081 subseg_set (old_sec, old_subsec);
2082 demand_empty_rest_of_line ();
2083}
2084
2085/* Validate any relocations emitted for -mrelocatable, possibly adding
2086 fixups for word relocations in writable segments, so we can adjust
2087 them at runtime. */
2088static void
98027b10 2089ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2090{
2091 if (fixp->fx_done || fixp->fx_pcrel)
2092 return;
2093
2094 switch (shlib)
2095 {
2096 case SHLIB_NONE:
2097 case SHLIB_PIC:
2098 return;
2099
5d6f4f16 2100 case SHLIB_MRELOCATABLE:
252b5132
RH		 2101 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2102 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2103 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2104 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2105 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2106 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2107 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2108 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2109 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2110 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2111 && strcmp (segment_name (seg), ".got2") != 0
2112 && strcmp (segment_name (seg), ".dtors") != 0
2113 && strcmp (segment_name (seg), ".ctors") != 0
2114 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2115 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2116 && strcmp (segment_name (seg), ".eh_frame") != 0
2117 && strcmp (segment_name (seg), ".ex_shared") != 0)
2118 {
2119 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2120 || fixp->fx_r_type != BFD_RELOC_CTOR)
2121 {
2122 as_bad_where (fixp->fx_file, fixp->fx_line,
2123 _("Relocation cannot be done when using -mrelocatable"));
2124 }
2125 }
2126 return;
2127 }
2128}
0baf16f2 2129
7e8d4ab4
AM		 2130/* Prevent elf_frob_file_before_adjust removing a weak undefined
2131 function descriptor sym if the corresponding code sym is used. */
2132
2133void
98027b10 2134ppc_frob_file_before_adjust (void)
0baf16f2 2135{
7e8d4ab4 2136 symbolS *symp;
9232bbb0 2137 asection *toc;
0baf16f2 2138
7e8d4ab4
AM		 2139 if (!ppc_obj64)
2140 return;
2141
2142 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2143 {
7e8d4ab4
AM		 2144 const char *name;
2145 char *dotname;
2146 symbolS *dotsym;
2147 size_t len;
2148
2149 name = S_GET_NAME (symp);
2150 if (name[0] == '.')
2151 continue;
2152
2153 if (! S_IS_WEAK (symp)
2154 || S_IS_DEFINED (symp))
2155 continue;
2156
2157 len = strlen (name) + 1;
2158 dotname = xmalloc (len + 1);
2159 dotname[0] = '.';
2160 memcpy (dotname + 1, name, len);
461b725f 2161 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2162 free (dotname);
2163 if (dotsym != NULL && (symbol_used_p (dotsym)
2164 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2165 symbol_mark_used (symp);
2166
0baf16f2
AM		 2167 }
2168
9232bbb0
AM		 2169 toc = bfd_get_section_by_name (stdoutput, ".toc");
2170 if (toc != NULL
2171 && bfd_section_size (stdoutput, toc) > 0x10000)
2172 as_warn (_("TOC section size exceeds 64k"));
2173
7e8d4ab4
AM		 2174 /* Don't emit .TOC. symbol. */
2175 symp = symbol_find (".TOC.");
2176 if (symp != NULL)
2177 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2178}
252b5132
RH		 2179#endif /* OBJ_ELF */
2180\f
2181#ifdef TE_PE
2182
2183/*
99a814a1 2184 * Summary of parse_toc_entry.
252b5132
RH		 2185 *
2186 * in: Input_line_pointer points to the '[' in one of:
2187 *
2188 * [toc] [tocv] [toc32] [toc64]
2189 *
2190 * Anything else is an error of one kind or another.
2191 *
81d4177b 2192 * out:
252b5132
RH		 2193 * return value: success or failure
2194 * toc_kind: kind of toc reference
2195 * input_line_pointer:
2196 * success: first char after the ']'
2197 * failure: unchanged
2198 *
2199 * settings:
2200 *
2201 * [toc] - rv == success, toc_kind = default_toc
2202 * [tocv] - rv == success, toc_kind = data_in_toc
2203 * [toc32] - rv == success, toc_kind = must_be_32
2204 * [toc64] - rv == success, toc_kind = must_be_64
2205 *
2206 */
2207
81d4177b
KH		 2208enum toc_size_qualifier
2209{
252b5132
RH		 2210 default_toc, /* The toc cell constructed should be the system default size */
2211 data_in_toc, /* This is a direct reference to a toc cell */
2212 must_be_32, /* The toc cell constructed must be 32 bits wide */
2213 must_be_64 /* The toc cell constructed must be 64 bits wide */
2214};
2215
2216static int
98027b10 2217parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2218{
2219 char *start;
2220 char *toc_spec;
2221 char c;
2222 enum toc_size_qualifier t;
2223
99a814a1 2224 /* Save the input_line_pointer. */
252b5132
RH		 2225 start = input_line_pointer;
2226
99a814a1 2227 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2228 ++input_line_pointer;
2229 SKIP_WHITESPACE ();
81d4177b 2230
99a814a1 2231 /* Find the spelling of the operand. */
252b5132
RH		 2232 toc_spec = input_line_pointer;
2233 c = get_symbol_end ();
2234
99a814a1 2235 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2236 {
2237 t = default_toc;
2238 }
99a814a1 2239 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2240 {
2241 t = data_in_toc;
2242 }
99a814a1 2243 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2244 {
2245 t = must_be_32;
2246 }
99a814a1 2247 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2248 {
2249 t = must_be_64;
2250 }
2251 else
2252 {
2253 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2254 *input_line_pointer = c;
2255 input_line_pointer = start;
252b5132
RH		 2256 return 0;
2257 }
2258
99a814a1
AM		 2259 /* Now find the ']'. */
2260 *input_line_pointer = c;
252b5132 2261
81d4177b
KH		 2262 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2263 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2264
2265 if (c != ']')
2266 {
2267 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2268 input_line_pointer = start;
252b5132
RH		 2269 return 0;
2270 }
2271
99a814a1 2272 *toc_kind = t;
252b5132
RH		 2273 return 1;
2274}
2275#endif
2276\f
2277
dc1d03fc 2278#ifdef OBJ_ELF
6a0c61b7
EZ		 2279#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2280static void
98027b10 2281ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2282{
2283 unsigned int i;
2284
2285 /* Check we don't already exist. */
2286 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2287 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2288 return;
b34976b6 2289
6a0c61b7
EZ		 2290 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2291 {
2292 if (ppc_apuinfo_num_alloc == 0)
2293 {
2294 ppc_apuinfo_num_alloc = 4;
2295 ppc_apuinfo_list = (unsigned long *)
2296 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2297 }
2298 else
2299 {
2300 ppc_apuinfo_num_alloc += 4;
2301 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2302 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2303 }
2304 }
dc1d03fc 2305 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2306}
2307#undef APUID
dc1d03fc 2308#endif
6a0c61b7
EZ		 2309\f
2310
252b5132
RH		 2311/* We need to keep a list of fixups. We can't simply generate them as
2312 we go, because that would require us to first create the frag, and
2313 that would screw up references to ``.''. */
2314
2315struct ppc_fixup
2316{
2317 expressionS exp;
2318 int opindex;
2319 bfd_reloc_code_real_type reloc;
2320};
2321
2322#define MAX_INSN_FIXUPS (5)
2323
2324/* This routine is called for each instruction to be assembled. */
2325
2326void
98027b10 2327md_assemble (char *str)
252b5132
RH		 2328{
2329 char *s;
2330 const struct powerpc_opcode *opcode;
2331 unsigned long insn;
2332 const unsigned char *opindex_ptr;
2333 int skip_optional;
2334 int need_paren;
2335 int next_opindex;
2336 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2337 int fc;
2338 char *f;
09b935ac 2339 int addr_mod;
252b5132
RH		 2340 int i;
2341#ifdef OBJ_ELF
2342 bfd_reloc_code_real_type reloc;
2343#endif
2344
2345 /* Get the opcode. */
3882b010 2346 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2347 ;
2348 if (*s != '\0')
2349 *s++ = '\0';
2350
2351 /* Look up the opcode in the hash table. */
2352 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2353 if (opcode == (const struct powerpc_opcode *) NULL)
2354 {
2355 const struct powerpc_macro *macro;
2356
2357 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2358 if (macro == (const struct powerpc_macro *) NULL)
2359 as_bad (_("Unrecognized opcode: `%s'"), str);
2360 else
2361 ppc_macro (s, macro);
2362
2363 return;
2364 }
2365
2366 insn = opcode->opcode;
2367
2368 str = s;
3882b010 2369 while (ISSPACE (*str))
252b5132
RH		 2370 ++str;
2371
2372 /* PowerPC operands are just expressions. The only real issue is
2373 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2374 an optional operand separate the operands only with commas (in some
2375 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2376 have optional operands). Most instructions with optional operands
2377 have only one. Those that have more than one optional operand can
2378 take either all their operands or none. So, before we start seriously
2379 parsing the operands, we check to see if we have optional operands,
2380 and if we do, we count the number of commas to see which operands
2381 have been omitted. */
252b5132
RH		 2382 skip_optional = 0;
2383 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2384 {
2385 const struct powerpc_operand *operand;
2386
2387 operand = &powerpc_operands[*opindex_ptr];
2388 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2389 {
2390 unsigned int opcount;
7fe9cf6b 2391 unsigned int num_operands_expected;
252b5132
RH		 2392
2393 /* There is an optional operand. Count the number of
2394 commas in the input line. */
2395 if (*str == '\0')
2396 opcount = 0;
2397 else
2398 {
2399 opcount = 1;
2400 s = str;
2401 while ((s = strchr (s, ',')) != (char *) NULL)
2402 {
2403 ++opcount;
2404 ++s;
2405 }
2406 }
2407
7fe9cf6b
NC		 2408 /* Compute the number of expected operands.
2409 Do not count fake operands. */
2410 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2411 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2412 ++ num_operands_expected;
2413
252b5132
RH		 2414 /* If there are fewer operands in the line then are called
2415 for by the instruction, we want to skip the optional
1f6c9eb0 2416 operands. */
7fe9cf6b 2417 if (opcount < num_operands_expected)
252b5132
RH		 2418 skip_optional = 1;
2419
2420 break;
2421 }
2422 }
2423
2424 /* Gather the operands. */
2425 need_paren = 0;
2426 next_opindex = 0;
2427 fc = 0;
2428 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2429 {
2430 const struct powerpc_operand *operand;
2431 const char *errmsg;
2432 char *hold;
2433 expressionS ex;
2434 char endc;
2435
2436 if (next_opindex == 0)
2437 operand = &powerpc_operands[*opindex_ptr];
2438 else
2439 {
2440 operand = &powerpc_operands[next_opindex];
2441 next_opindex = 0;
2442 }
252b5132
RH		 2443 errmsg = NULL;
2444
2445 /* If this is a fake operand, then we do not expect anything
2446 from the input. */
2447 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2448 {
2b3c4602 2449 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2450 if (errmsg != (const char *) NULL)
ee2c9aa9 2451 as_bad ("%s", errmsg);
252b5132
RH		 2452 continue;
2453 }
2454
2455 /* If this is an optional operand, and we are skipping it, just
2456 insert a zero. */
2457 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2458 && skip_optional)
2459 {
2460 if (operand->insert)
2461 {
2b3c4602 2462 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2463 if (errmsg != (const char *) NULL)
ee2c9aa9 2464 as_bad ("%s", errmsg);
252b5132
RH		 2465 }
2466 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2467 next_opindex = *opindex_ptr + 1;
2468 continue;
2469 }
2470
2471 /* Gather the operand. */
2472 hold = input_line_pointer;
2473 input_line_pointer = str;
2474
2475#ifdef TE_PE
81d4177b 2476 if (*input_line_pointer == '[')
252b5132
RH		 2477 {
2478 /* We are expecting something like the second argument here:
99a814a1
AM		 2479 *
2480 * lwz r4,[toc].GS.0.static_int(rtoc)
2481 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2482 * The argument following the `]' must be a symbol name, and the
2483 * register must be the toc register: 'rtoc' or '2'
2484 *
2485 * The effect is to 0 as the displacement field
2486 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2487 * the appropriate variation) reloc against it based on the symbol.
2488 * The linker will build the toc, and insert the resolved toc offset.
2489 *
2490 * Note:
2491 * o The size of the toc entry is currently assumed to be
2492 * 32 bits. This should not be assumed to be a hard coded
2493 * number.
2494 * o In an effort to cope with a change from 32 to 64 bits,
2495 * there are also toc entries that are specified to be
2496 * either 32 or 64 bits:
2497 * lwz r4,[toc32].GS.0.static_int(rtoc)
2498 * lwz r4,[toc64].GS.0.static_int(rtoc)
2499 * These demand toc entries of the specified size, and the
2500 * instruction probably requires it.
2501 */
252b5132
RH		 2502
2503 int valid_toc;
2504 enum toc_size_qualifier toc_kind;
2505 bfd_reloc_code_real_type toc_reloc;
2506
99a814a1
AM		 2507 /* Go parse off the [tocXX] part. */
2508 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2509
81d4177b 2510 if (!valid_toc)
252b5132 2511 {
99a814a1
AM		 2512 /* Note: message has already been issued.
2513 FIXME: what sort of recovery should we do?
2514 demand_rest_of_line (); return; ? */
252b5132
RH		 2515 }
2516
99a814a1
AM		 2517 /* Now get the symbol following the ']'. */
2518 expression (&ex);
252b5132
RH		 2519
2520 switch (toc_kind)
2521 {
2522 case default_toc:
99a814a1
AM		 2523 /* In this case, we may not have seen the symbol yet,
2524 since it is allowed to appear on a .extern or .globl
2525 or just be a label in the .data section. */
252b5132
RH		 2526 toc_reloc = BFD_RELOC_PPC_TOC16;
2527 break;
2528 case data_in_toc:
99a814a1
AM		 2529 /* 1. The symbol must be defined and either in the toc
2530 section, or a global.
2531 2. The reloc generated must have the TOCDEFN flag set
2532 in upper bit mess of the reloc type.
2533 FIXME: It's a little confusing what the tocv
2534 qualifier can be used for. At the very least, I've
2535 seen three uses, only one of which I'm sure I can
2536 explain. */
81d4177b
KH		 2537 if (ex.X_op == O_symbol)
2538 {
9c2799c2 2539 gas_assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2540 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2541 != tocdata_section)
252b5132 2542 {
99a814a1 2543 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2544 }
2545 }
2546
2547 toc_reloc = BFD_RELOC_PPC_TOC16;
2548 break;
2549 case must_be_32:
99a814a1
AM		 2550 /* FIXME: these next two specifically specify 32/64 bit
2551 toc entries. We don't support them today. Is this
2552 the right way to say that? */
252b5132
RH		 2553 toc_reloc = BFD_RELOC_UNUSED;
2554 as_bad (_("Unimplemented toc32 expression modifier"));
2555 break;
2556 case must_be_64:
99a814a1 2557 /* FIXME: see above. */
252b5132
RH		 2558 toc_reloc = BFD_RELOC_UNUSED;
2559 as_bad (_("Unimplemented toc64 expression modifier"));
2560 break;
2561 default:
bc805888 2562 fprintf (stderr,
99a814a1
AM		 2563 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2564 toc_kind);
bc805888 2565 abort ();
252b5132
RH		 2566 break;
2567 }
2568
2569 /* We need to generate a fixup for this expression. */
2570 if (fc >= MAX_INSN_FIXUPS)
2571 as_fatal (_("too many fixups"));
2572
2573 fixups[fc].reloc = toc_reloc;
2574 fixups[fc].exp = ex;
2575 fixups[fc].opindex = *opindex_ptr;
2576 ++fc;
2577
99a814a1
AM		 2578 /* Ok. We've set up the fixup for the instruction. Now make it
2579 look like the constant 0 was found here. */
252b5132
RH		 2580 ex.X_unsigned = 1;
2581 ex.X_op = O_constant;
2582 ex.X_add_number = 0;
2583 ex.X_add_symbol = NULL;
2584 ex.X_op_symbol = NULL;
2585 }
2586
2587 else
2588#endif /* TE_PE */
2589 {
2ad068be
AM		 2590 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
2591 || !register_name (&ex))
252b5132 2592 {
13abbae3
AM		 2593 char save_lex = lex_type['%'];
2594
252b5132 2595 if ((operand->flags & PPC_OPERAND_CR) != 0)
13abbae3
AM		 2596 {
2597 cr_operand = TRUE;
2598 lex_type['%'] |= LEX_BEGIN_NAME;
2599 }
252b5132 2600 expression (&ex);
b34976b6 2601 cr_operand = FALSE;
13abbae3 2602 lex_type['%'] = save_lex;
252b5132
RH		 2603 }
2604 }
2605
2606 str = input_line_pointer;
2607 input_line_pointer = hold;
2608
2609 if (ex.X_op == O_illegal)
2610 as_bad (_("illegal operand"));
2611 else if (ex.X_op == O_absent)
2612 as_bad (_("missing operand"));
2613 else if (ex.X_op == O_register)
2614 {
2615 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2616 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2617 }
2618 else if (ex.X_op == O_constant)
2619 {
2620#ifdef OBJ_ELF
81d4177b 2621 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2622 char *orig_str = str;
2623
2624 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2625 switch (reloc)
2626 {
2627 default:
2628 str = orig_str;
2629 break;
2630
2631 case BFD_RELOC_LO16:
2632 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2633 something which cleared it, we always produce a
2634 signed value. */
2635 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2636 ex.X_add_number &= 0xffff;
2637 else
0baf16f2 2638 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2639 break;
2640
2641 case BFD_RELOC_HI16:
0baf16f2
AM		 2642 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2643 ex.X_add_number = PPC_HI (ex.X_add_number);
2644 else
2645 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2646 break;
2647
2648 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2649 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2650 ex.X_add_number = PPC_HA (ex.X_add_number);
2651 else
2652 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2653 break;
2654
0baf16f2
AM		 2655 case BFD_RELOC_PPC64_HIGHER:
2656 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2657 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2658 else
2659 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2660 break;
2661
2662 case BFD_RELOC_PPC64_HIGHER_S:
2663 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2664 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2665 else
2666 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2667 break;
0baf16f2
AM		 2668
2669 case BFD_RELOC_PPC64_HIGHEST:
2670 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2671 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2672 else
2673 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2674 break;
2675
2676 case BFD_RELOC_PPC64_HIGHEST_S:
2677 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2678 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2679 else
2680 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2681 break;
252b5132 2682 }
0baf16f2 2683#endif /* OBJ_ELF */
252b5132 2684 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2685 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2686 }
2687#ifdef OBJ_ELF
727fc41e 2688 else
252b5132 2689 {
727fc41e 2690 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 2691 {
727fc41e
AM		 2692 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
2693 if (sym_name[0] == '.')
2694 ++sym_name;
cdba85ec 2695
727fc41e 2696 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 2697 {
727fc41e
AM		 2698 expressionS tls_exp;
2699
2700 hold = input_line_pointer;
2701 input_line_pointer = str + 1;
2702 expression (&tls_exp);
2703 if (tls_exp.X_op == O_symbol)
2704 {
2705 reloc = BFD_RELOC_UNUSED;
2706 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
2707 {
2708 reloc = BFD_RELOC_PPC_TLSGD;
2709 input_line_pointer += 7;
2710 }
2711 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
2712 {
2713 reloc = BFD_RELOC_PPC_TLSLD;
2714 input_line_pointer += 7;
2715 }
2716 if (reloc != BFD_RELOC_UNUSED)
2717 {
2718 SKIP_WHITESPACE ();
2719 str = input_line_pointer;
2720
2721 if (fc >= MAX_INSN_FIXUPS)
2722 as_fatal (_("too many fixups"));
2723 fixups[fc].exp = tls_exp;
2724 fixups[fc].opindex = *opindex_ptr;
2725 fixups[fc].reloc = reloc;
2726 ++fc;
2727 }
2728 }
2729 input_line_pointer = hold;
252b5132
RH		 2730 }
2731 }
2732
727fc41e 2733 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
0baf16f2 2734 {
727fc41e 2735 /* Some TLS tweaks. */
0baf16f2
AM		 2736 switch (reloc)
2737 {
727fc41e 2738 default:
cdba85ec 2739 break;
727fc41e
AM		 2740
2741 case BFD_RELOC_PPC_TLS:
2d0f3896
AM		 2742 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
2743 as_bad (_("@tls may not be used with \"%s\" operands"),
2744 opcode->name);
2745 else if (operand->shift != 11)
2746 as_bad (_("@tls may only be used in last operand"));
2747 else
2748 insn = ppc_insert_operand (insn, operand,
2749 ppc_obj64 ? 13 : 2,
2750 ppc_cpu, (char *) NULL, 0);
cdba85ec 2751 break;
727fc41e
AM		 2752
2753 /* We'll only use the 32 (or 64) bit form of these relocations
2754 in constants. Instructions get the 16 bit form. */
2755 case BFD_RELOC_PPC_DTPREL:
2756 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 2757 break;
727fc41e
AM		 2758 case BFD_RELOC_PPC_TPREL:
2759 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 2760 break;
2761 }
727fc41e
AM		 2762
2763 /* For the absolute forms of branches, convert the PC
2764 relative form back into the absolute. */
2765 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2766 {
2767 switch (reloc)
2768 {
2769 case BFD_RELOC_PPC_B26:
2770 reloc = BFD_RELOC_PPC_BA26;
2771 break;
2772 case BFD_RELOC_PPC_B16:
2773 reloc = BFD_RELOC_PPC_BA16;
2774 break;
2775 case BFD_RELOC_PPC_B16_BRTAKEN:
2776 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2777 break;
2778 case BFD_RELOC_PPC_B16_BRNTAKEN:
2779 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2780 break;
2781 default:
2782 break;
2783 }
2784 }
2785
2786 if (ppc_obj64
2787 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
2788 {
2789 switch (reloc)
2790 {
2791 case BFD_RELOC_16:
2792 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2793 break;
2794 case BFD_RELOC_LO16:
2795 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2796 break;
2797 case BFD_RELOC_16_GOTOFF:
2798 reloc = BFD_RELOC_PPC64_GOT16_DS;
2799 break;
2800 case BFD_RELOC_LO16_GOTOFF:
2801 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2802 break;
2803 case BFD_RELOC_LO16_PLTOFF:
2804 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2805 break;
2806 case BFD_RELOC_16_BASEREL:
2807 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2808 break;
2809 case BFD_RELOC_LO16_BASEREL:
2810 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2811 break;
2812 case BFD_RELOC_PPC_TOC16:
2813 reloc = BFD_RELOC_PPC64_TOC16_DS;
2814 break;
2815 case BFD_RELOC_PPC64_TOC16_LO:
2816 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2817 break;
2818 case BFD_RELOC_PPC64_PLTGOT16:
2819 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2820 break;
2821 case BFD_RELOC_PPC64_PLTGOT16_LO:
2822 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2823 break;
2824 case BFD_RELOC_PPC_DTPREL16:
2825 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2826 break;
2827 case BFD_RELOC_PPC_DTPREL16_LO:
2828 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2829 break;
2830 case BFD_RELOC_PPC_TPREL16:
2831 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2832 break;
2833 case BFD_RELOC_PPC_TPREL16_LO:
2834 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2835 break;
2836 case BFD_RELOC_PPC_GOT_DTPREL16:
2837 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2838 case BFD_RELOC_PPC_GOT_TPREL16:
2839 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2840 break;
2841 default:
2842 as_bad (_("unsupported relocation for DS offset field"));
2843 break;
2844 }
2845 }
0baf16f2
AM		 2846 }
2847
252b5132
RH		 2848 /* We need to generate a fixup for this expression. */
2849 if (fc >= MAX_INSN_FIXUPS)
2850 as_fatal (_("too many fixups"));
2851 fixups[fc].exp = ex;
727fc41e 2852 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 2853 fixups[fc].reloc = reloc;
2854 ++fc;
2855 }
727fc41e 2856#else /* OBJ_ELF */
252b5132
RH		 2857 else
2858 {
2859 /* We need to generate a fixup for this expression. */
2860 if (fc >= MAX_INSN_FIXUPS)
2861 as_fatal (_("too many fixups"));
2862 fixups[fc].exp = ex;
2863 fixups[fc].opindex = *opindex_ptr;
2864 fixups[fc].reloc = BFD_RELOC_UNUSED;
2865 ++fc;
2866 }
727fc41e 2867#endif /* OBJ_ELF */
252b5132
RH		 2868
2869 if (need_paren)
2870 {
2871 endc = ')';
2872 need_paren = 0;
c3d65c1c
BE		 2873 /* If expecting more operands, then we want to see "),". */
2874 if (*str == endc && opindex_ptr[1] != 0)
2875 {
2876 do
2877 ++str;
2878 while (ISSPACE (*str));
2879 endc = ',';
2880 }
252b5132
RH		 2881 }
2882 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2883 {
2884 endc = '(';
2885 need_paren = 1;
2886 }
2887 else
2888 endc = ',';
2889
2890 /* The call to expression should have advanced str past any
2891 whitespace. */
2892 if (*str != endc
2893 && (endc != ',' || *str != '\0'))
2894 {
2895 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2896 break;
2897 }
2898
2899 if (*str != '\0')
2900 ++str;
2901 }
2902
3882b010 2903 while (ISSPACE (*str))
252b5132
RH		 2904 ++str;
2905
2906 if (*str != '\0')
2907 as_bad (_("junk at end of line: `%s'"), str);
2908
dc1d03fc 2909#ifdef OBJ_ELF
6a0c61b7 2910 /* Do we need/want a APUinfo section? */
ed84b57b 2911 if ((ppc_cpu & PPC_OPCODE_E500MC) != 0)
6a0c61b7
EZ		 2912 {
2913 /* These are all version "1". */
2914 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2915 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2916 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2917 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2918 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2919 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2920 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2921 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2922 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2923 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2924 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2925 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2926 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2927 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2928 }
dc1d03fc 2929#endif
6a0c61b7 2930
252b5132
RH		 2931 /* Write out the instruction. */
2932 f = frag_more (4);
09b935ac
AM		 2933 addr_mod = frag_now_fix () & 3;
2934 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2935 as_bad (_("instruction address is not a multiple of 4"));
2936 frag_now->insn_addr = addr_mod;
2937 frag_now->has_code = 1;
252b5132
RH		 2938 md_number_to_chars (f, insn, 4);
2939
5d6f4f16
GK		 2940#ifdef OBJ_ELF
2941 dwarf2_emit_insn (4);
2942#endif
2943
252b5132
RH		 2944 /* Create any fixups. At this point we do not use a
2945 bfd_reloc_code_real_type, but instead just use the
2946 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2947 handle fixups for any operand type, although that is admittedly
2948 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2949 md_apply_fix. */
252b5132
RH		 2950 for (i = 0; i < fc; i++)
2951 {
252b5132
RH		 2952 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2953 {
99a814a1 2954 reloc_howto_type *reloc_howto;
252b5132
RH		 2955 int size;
2956 int offset;
2957 fixS *fixP;
2958
99a814a1 2959 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2960 if (!reloc_howto)
2961 abort ();
2962
2963 size = bfd_get_reloc_size (reloc_howto);
2964 offset = target_big_endian ? (4 - size) : 0;
2965
2966 if (size < 1 || size > 4)
bc805888 2967 abort ();
252b5132 2968
99a814a1
AM		 2969 fixP = fix_new_exp (frag_now,
2970 f - frag_now->fr_literal + offset,
2971 size,
2972 &fixups[i].exp,
2973 reloc_howto->pc_relative,
252b5132
RH		 2974 fixups[i].reloc);
2975
2976 /* Turn off complaints that the addend is too large for things like
2977 foo+100000@ha. */
2978 switch (fixups[i].reloc)
2979 {
2980 case BFD_RELOC_16_GOTOFF:
2981 case BFD_RELOC_PPC_TOC16:
2982 case BFD_RELOC_LO16:
2983 case BFD_RELOC_HI16:
2984 case BFD_RELOC_HI16_S:
0baf16f2 2985#ifdef OBJ_ELF
0baf16f2
AM		 2986 case BFD_RELOC_PPC64_HIGHER:
2987 case BFD_RELOC_PPC64_HIGHER_S:
2988 case BFD_RELOC_PPC64_HIGHEST:
2989 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2990#endif
252b5132
RH		 2991 fixP->fx_no_overflow = 1;
2992 break;
2993 default:
2994 break;
2995 }
2996 }
2997 else
727fc41e
AM		 2998 {
2999 const struct powerpc_operand *operand;
3000
3001 operand = &powerpc_operands[fixups[i].opindex];
3002 fix_new_exp (frag_now,
3003 f - frag_now->fr_literal,
3004 4,
3005 &fixups[i].exp,
3006 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3007 ((bfd_reloc_code_real_type)
3008 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
3009 }
252b5132
RH		 3010 }
3011}
3012
3013/* Handle a macro. Gather all the operands, transform them as
3014 described by the macro, and call md_assemble recursively. All the
3015 operands are separated by commas; we don't accept parentheses
3016 around operands here. */
3017
3018static void
98027b10 3019ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3020{
3021 char *operands[10];
3022 unsigned int count;
3023 char *s;
3024 unsigned int len;
3025 const char *format;
db557034 3026 unsigned int arg;
252b5132
RH		 3027 char *send;
3028 char *complete;
3029
3030 /* Gather the users operands into the operands array. */
3031 count = 0;
3032 s = str;
3033 while (1)
3034 {
3035 if (count >= sizeof operands / sizeof operands[0])
3036 break;
3037 operands[count++] = s;
3038 s = strchr (s, ',');
3039 if (s == (char *) NULL)
3040 break;
3041 *s++ = '\0';
81d4177b 3042 }
252b5132
RH		 3043
3044 if (count != macro->operands)
3045 {
3046 as_bad (_("wrong number of operands"));
3047 return;
3048 }
3049
3050 /* Work out how large the string must be (the size is unbounded
3051 because it includes user input). */
3052 len = 0;
3053 format = macro->format;
3054 while (*format != '\0')
3055 {
3056 if (*format != '%')
3057 {
3058 ++len;
3059 ++format;
3060 }
3061 else
3062 {
3063 arg = strtol (format + 1, &send, 10);
db557034 3064 know (send != format && arg < count);
252b5132
RH		 3065 len += strlen (operands[arg]);
3066 format = send;
3067 }
3068 }
3069
3070 /* Put the string together. */
3071 complete = s = (char *) alloca (len + 1);
3072 format = macro->format;
3073 while (*format != '\0')
3074 {
3075 if (*format != '%')
3076 *s++ = *format++;
3077 else
3078 {
3079 arg = strtol (format + 1, &send, 10);
3080 strcpy (s, operands[arg]);
3081 s += strlen (s);
3082 format = send;
3083 }
3084 }
3085 *s = '\0';
3086
3087 /* Assemble the constructed instruction. */
3088 md_assemble (complete);
81d4177b 3089}
252b5132
RH		 3090\f
3091#ifdef OBJ_ELF
99a814a1 3092/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132 3093
01e1a5bc 3094bfd_vma
98027b10 3095ppc_section_letter (int letter, char **ptr_msg)
252b5132
RH		 3096{
3097 if (letter == 'e')
3098 return SHF_EXCLUDE;
3099
13ae64f3 3100 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 3101 return -1;
252b5132
RH		 3102}
3103
01e1a5bc 3104bfd_vma
98027b10 3105ppc_section_word (char *str, size_t len)
252b5132 3106{
9de8d8f1
RH		 3107 if (len == 7 && strncmp (str, "exclude", 7) == 0)
3108 return SHF_EXCLUDE;
252b5132 3109
9de8d8f1 3110 return -1;
252b5132
RH		 3111}
3112
3113int
98027b10 3114ppc_section_type (char *str, size_t len)
252b5132 3115{
9de8d8f1
RH		 3116 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3117 return SHT_ORDERED;
252b5132 3118
9de8d8f1 3119 return -1;
252b5132
RH		 3120}
3121
3122int
01e1a5bc 3123ppc_section_flags (flagword flags, bfd_vma attr, int type)
252b5132
RH		 3124{
3125 if (type == SHT_ORDERED)
3126 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3127
3128 if (attr & SHF_EXCLUDE)
3129 flags |= SEC_EXCLUDE;
3130
3131 return flags;
3132}
3133#endif /* OBJ_ELF */
3134
3135\f
3136/* Pseudo-op handling. */
3137
3138/* The .byte pseudo-op. This is similar to the normal .byte
3139 pseudo-op, but it can also take a single ASCII string. */
3140
3141static void
98027b10 3142ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3143{
3144 if (*input_line_pointer != '\"')
3145 {
3146 cons (1);
3147 return;
3148 }
3149
3150 /* Gather characters. A real double quote is doubled. Unusual
3151 characters are not permitted. */
3152 ++input_line_pointer;
3153 while (1)
3154 {
3155 char c;
3156
3157 c = *input_line_pointer++;
3158
3159 if (c == '\"')
3160 {
3161 if (*input_line_pointer != '\"')
3162 break;
3163 ++input_line_pointer;
3164 }
3165
3166 FRAG_APPEND_1_CHAR (c);
3167 }
3168
3169 demand_empty_rest_of_line ();
3170}
3171\f
3172#ifdef OBJ_XCOFF
3173
3174/* XCOFF specific pseudo-op handling. */
3175
3176/* This is set if we are creating a .stabx symbol, since we don't want
3177 to handle symbol suffixes for such symbols. */
b34976b6 3178static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3179
3180/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3181 symbols in the .bss segment as though they were local common
67c1ffbe 3182 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3183 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3184
3185static void
98027b10 3186ppc_comm (int lcomm)
252b5132
RH		 3187{
3188 asection *current_seg = now_seg;
3189 subsegT current_subseg = now_subseg;
3190 char *name;
3191 char endc;
3192 char *end_name;
3193 offsetT size;
3194 offsetT align;
3195 symbolS *lcomm_sym = NULL;
3196 symbolS *sym;
3197 char *pfrag;
3198
3199 name = input_line_pointer;
3200 endc = get_symbol_end ();
3201 end_name = input_line_pointer;
3202 *end_name = endc;
3203
3204 if (*input_line_pointer != ',')
3205 {
3206 as_bad (_("missing size"));
3207 ignore_rest_of_line ();
3208 return;
3209 }
3210 ++input_line_pointer;
3211
3212 size = get_absolute_expression ();
3213 if (size < 0)
3214 {
3215 as_bad (_("negative size"));
3216 ignore_rest_of_line ();
3217 return;
3218 }
3219
3220 if (! lcomm)
3221 {
3222 /* The third argument to .comm is the alignment. */
3223 if (*input_line_pointer != ',')
1ad63b2f 3224 align = 2;
252b5132
RH		 3225 else
3226 {
3227 ++input_line_pointer;
3228 align = get_absolute_expression ();
3229 if (align <= 0)
3230 {
3231 as_warn (_("ignoring bad alignment"));
1ad63b2f 3232 align = 2;
252b5132
RH		 3233 }
3234 }
3235 }
3236 else
3237 {
3238 char *lcomm_name;
3239 char lcomm_endc;
3240
1ad63b2f 3241 if (size <= 4)
252b5132
RH		 3242 align = 2;
3243 else
3244 align = 3;
3245
3246 /* The third argument to .lcomm appears to be the real local
3247 common symbol to create. References to the symbol named in
3248 the first argument are turned into references to the third
3249 argument. */
3250 if (*input_line_pointer != ',')
3251 {
3252 as_bad (_("missing real symbol name"));
3253 ignore_rest_of_line ();
3254 return;
3255 }
3256 ++input_line_pointer;
3257
3258 lcomm_name = input_line_pointer;
3259 lcomm_endc = get_symbol_end ();
81d4177b 3260
252b5132
RH		 3261 lcomm_sym = symbol_find_or_make (lcomm_name);
3262
3263 *input_line_pointer = lcomm_endc;
3264 }
3265
3266 *end_name = '\0';
3267 sym = symbol_find_or_make (name);
3268 *end_name = endc;
3269
3270 if (S_IS_DEFINED (sym)
3271 || S_GET_VALUE (sym) != 0)
3272 {
3273 as_bad (_("attempt to redefine symbol"));
3274 ignore_rest_of_line ();
3275 return;
3276 }
81d4177b 3277
252b5132 3278 record_alignment (bss_section, align);
81d4177b 3279
252b5132
RH		 3280 if (! lcomm
3281 || ! S_IS_DEFINED (lcomm_sym))
3282 {
3283 symbolS *def_sym;
3284 offsetT def_size;
3285
3286 if (! lcomm)
3287 {
3288 def_sym = sym;
3289 def_size = size;
3290 S_SET_EXTERNAL (sym);
3291 }
3292 else
3293 {
809ffe0d 3294 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3295 def_sym = lcomm_sym;
3296 def_size = 0;
3297 }
3298
3299 subseg_set (bss_section, 1);
3300 frag_align (align, 0, 0);
81d4177b 3301
809ffe0d 3302 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3303 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3304 def_size, (char *) NULL);
3305 *pfrag = 0;
3306 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3307 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3308 }
3309 else if (lcomm)
3310 {
3311 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3312 symbol_get_frag (lcomm_sym)->fr_offset =
3313 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3314 &~ ((1 << align) - 1));
809ffe0d
ILT		 3315 if (align > symbol_get_tc (lcomm_sym)->align)
3316 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3317 }
3318
3319 if (lcomm)
3320 {
3321 /* Make sym an offset from lcomm_sym. */
3322 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3323 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3324 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3325 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3326 }
3327
3328 subseg_set (current_seg, current_subseg);
3329
3330 demand_empty_rest_of_line ();
3331}
3332
3333/* The .csect pseudo-op. This switches us into a different
3334 subsegment. The first argument is a symbol whose value is the
3335 start of the .csect. In COFF, csect symbols get special aux
3336 entries defined by the x_csect field of union internal_auxent. The
3337 optional second argument is the alignment (the default is 2). */
3338
3339static void
98027b10 3340ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3341{
3342 char *name;
3343 char endc;
3344 symbolS *sym;
931e13a6 3345 offsetT align;
252b5132
RH		 3346
3347 name = input_line_pointer;
3348 endc = get_symbol_end ();
81d4177b 3349
252b5132
RH		 3350 sym = symbol_find_or_make (name);
3351
3352 *input_line_pointer = endc;
3353
3354 if (S_GET_NAME (sym)[0] == '\0')
3355 {
3356 /* An unnamed csect is assumed to be [PR]. */
96d56e9f 3357 symbol_get_tc (sym)->symbol_class = XMC_PR;
252b5132
RH		 3358 }
3359
931e13a6 3360 align = 2;
252b5132
RH		 3361 if (*input_line_pointer == ',')
3362 {
3363 ++input_line_pointer;
931e13a6 3364 align = get_absolute_expression ();
252b5132
RH		 3365 }
3366
931e13a6
AM		 3367 ppc_change_csect (sym, align);
3368
252b5132
RH		 3369 demand_empty_rest_of_line ();
3370}
3371
3372/* Change to a different csect. */
3373
3374static void
98027b10 3375ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3376{
3377 if (S_IS_DEFINED (sym))
809ffe0d 3378 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3379 else
3380 {
3381 symbolS **list_ptr;
3382 int after_toc;
3383 int hold_chunksize;
3384 symbolS *list;
931e13a6
AM		 3385 int is_code;
3386 segT sec;
252b5132
RH		 3387
3388 /* This is a new csect. We need to look at the symbol class to
3389 figure out whether it should go in the text section or the
3390 data section. */
3391 after_toc = 0;
931e13a6 3392 is_code = 0;
96d56e9f 3393 switch (symbol_get_tc (sym)->symbol_class)
252b5132
RH		 3394 {
3395 case XMC_PR:
3396 case XMC_RO:
3397 case XMC_DB:
3398 case XMC_GL:
3399 case XMC_XO:
3400 case XMC_SV:
3401 case XMC_TI:
3402 case XMC_TB:
3403 S_SET_SEGMENT (sym, text_section);
809ffe0d 3404 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3405 ++ppc_text_subsegment;
3406 list_ptr = &ppc_text_csects;
931e13a6 3407 is_code = 1;
252b5132
RH		 3408 break;
3409 case XMC_RW:
3410 case XMC_TC0:
3411 case XMC_TC:
3412 case XMC_DS:
3413 case XMC_UA:
3414 case XMC_BS:
3415 case XMC_UC:
3416 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3417 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3418 == ppc_data_subsegment))
252b5132
RH		 3419 after_toc = 1;
3420 S_SET_SEGMENT (sym, data_section);
809ffe0d 3421 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3422 ++ppc_data_subsegment;
3423 list_ptr = &ppc_data_csects;
3424 break;
3425 default:
3426 abort ();
3427 }
3428
3429 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3430 changing subsegments, so that we don't use a lot of memory
3431 space for what may be a small section. */
252b5132
RH		 3432 hold_chunksize = chunksize;
3433 chunksize = 64;
3434
931e13a6
AM		 3435 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3436 symbol_get_tc (sym)->subseg);
252b5132
RH		 3437
3438 chunksize = hold_chunksize;
3439
3440 if (after_toc)
3441 ppc_after_toc_frag = frag_now;
3442
931e13a6
AM		 3443 record_alignment (sec, align);
3444 if (is_code)
3445 frag_align_code (align, 0);
3446 else
3447 frag_align (align, 0, 0);
3448
809ffe0d 3449 symbol_set_frag (sym, frag_now);
252b5132
RH		 3450 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3451
931e13a6 3452 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3453 symbol_get_tc (sym)->output = 1;
3454 symbol_get_tc (sym)->within = sym;
81d4177b 3455
252b5132 3456 for (list = *list_ptr;
809ffe0d
ILT		 3457 symbol_get_tc (list)->next != (symbolS *) NULL;
3458 list = symbol_get_tc (list)->next)
252b5132 3459 ;
809ffe0d 3460 symbol_get_tc (list)->next = sym;
81d4177b 3461
252b5132 3462 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3463 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3464 &symbol_lastP);
252b5132
RH		 3465 }
3466
3467 ppc_current_csect = sym;
3468}
3469
3470/* This function handles the .text and .data pseudo-ops. These
3471 pseudo-ops aren't really used by XCOFF; we implement them for the
3472 convenience of people who aren't used to XCOFF. */
3473
3474static void
98027b10 3475ppc_section (int type)
252b5132
RH		 3476{
3477 const char *name;
3478 symbolS *sym;
3479
3480 if (type == 't')
3481 name = ".text[PR]";
3482 else if (type == 'd')
3483 name = ".data[RW]";
3484 else
3485 abort ();
3486
3487 sym = symbol_find_or_make (name);
3488
931e13a6 3489 ppc_change_csect (sym, 2);
252b5132
RH		 3490
3491 demand_empty_rest_of_line ();
3492}
3493
3494/* This function handles the .section pseudo-op. This is mostly to
3495 give an error, since XCOFF only supports .text, .data and .bss, but
3496 we do permit the user to name the text or data section. */
3497
3498static void
98027b10 3499ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3500{
3501 char *user_name;
3502 const char *real_name;
3503 char c;
3504 symbolS *sym;
3505
3506 user_name = input_line_pointer;
3507 c = get_symbol_end ();
3508
3509 if (strcmp (user_name, ".text") == 0)
3510 real_name = ".text[PR]";
3511 else if (strcmp (user_name, ".data") == 0)
3512 real_name = ".data[RW]";
3513 else
3514 {
3515 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3516 *input_line_pointer = c;
3517 ignore_rest_of_line ();
3518 return;
3519 }
3520
3521 *input_line_pointer = c;
3522
3523 sym = symbol_find_or_make (real_name);
3524
931e13a6 3525 ppc_change_csect (sym, 2);
252b5132
RH		 3526
3527 demand_empty_rest_of_line ();
3528}
3529
3530/* The .extern pseudo-op. We create an undefined symbol. */
3531
3532static void
98027b10 3533ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3534{
3535 char *name;
3536 char endc;
3537
3538 name = input_line_pointer;
3539 endc = get_symbol_end ();
3540
3541 (void) symbol_find_or_make (name);
3542
3543 *input_line_pointer = endc;
3544
3545 demand_empty_rest_of_line ();
3546}
3547
3548/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3549
3550static void
98027b10 3551ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3552{
3553 char *name;
3554 char endc;
3555 symbolS *sym;
3556
3557 name = input_line_pointer;
3558 endc = get_symbol_end ();
3559
3560 sym = symbol_find_or_make (name);
3561
3562 *input_line_pointer = endc;
3563
809ffe0d 3564 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3565
3566 demand_empty_rest_of_line ();
3567}
3568
c865e45b
RS		 3569/* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
3570 relocations at the beginning of the current csect.
3571
3572 (In principle, there's no reason why the relocations _have_ to be at
3573 the beginning. Anywhere in the csect would do. However, inserting
3574 at the beginning is what the native assmebler does, and it helps to
3575 deal with cases where the .ref statements follow the section contents.)
3576
3577 ??? .refs don't work for empty .csects. However, the native assembler
3578 doesn't report an error in this case, and neither yet do we. */
3579
3580static void
3581ppc_ref (int ignore ATTRIBUTE_UNUSED)
3582{
3583 char *name;
3584 char c;
3585
3586 if (ppc_current_csect == NULL)
3587 {
3588 as_bad (_(".ref outside .csect"));
3589 ignore_rest_of_line ();
3590 return;
3591 }
3592
3593 do
3594 {
3595 name = input_line_pointer;
3596 c = get_symbol_end ();
3597
3598 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
3599 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
3600
3601 *input_line_pointer = c;
3602 SKIP_WHITESPACE ();
3603 c = *input_line_pointer;
3604 if (c == ',')
3605 {
3606 input_line_pointer++;
3607 SKIP_WHITESPACE ();
3608 if (is_end_of_line[(unsigned char) *input_line_pointer])
3609 {
3610 as_bad (_("missing symbol name"));
3611 ignore_rest_of_line ();
3612 return;
3613 }
3614 }
3615 }
3616 while (c == ',');
3617
3618 demand_empty_rest_of_line ();
3619}
3620
252b5132
RH		 3621/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3622 although I don't know why it bothers. */
3623
3624static void
98027b10 3625ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3626{
3627 char *name;
3628 char endc;
3629 symbolS *sym;
3630 int len;
3631
3632 name = input_line_pointer;
3633 endc = get_symbol_end ();
3634
3635 sym = symbol_find_or_make (name);
3636
3637 *input_line_pointer = endc;
3638
3639 if (*input_line_pointer != ',')
3640 {
3641 as_bad (_("missing rename string"));
3642 ignore_rest_of_line ();
3643 return;
3644 }
3645 ++input_line_pointer;
3646
809ffe0d 3647 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3648
3649 demand_empty_rest_of_line ();
3650}
3651
3652/* The .stabx pseudo-op. This is similar to a normal .stabs
3653 pseudo-op, but slightly different. A sample is
3654 .stabx "main:F-1",.main,142,0
3655 The first argument is the symbol name to create. The second is the
3656 value, and the third is the storage class. The fourth seems to be
3657 always zero, and I am assuming it is the type. */
3658
3659static void
98027b10 3660ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3661{
3662 char *name;
3663 int len;
3664 symbolS *sym;
3665 expressionS exp;
3666
3667 name = demand_copy_C_string (&len);
3668
3669 if (*input_line_pointer != ',')
3670 {
3671 as_bad (_("missing value"));
3672 return;
3673 }
3674 ++input_line_pointer;
3675
b34976b6 3676 ppc_stab_symbol = TRUE;
252b5132 3677 sym = symbol_make (name);
b34976b6 3678 ppc_stab_symbol = FALSE;
252b5132 3679
809ffe0d 3680 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3681
3682 (void) expression (&exp);
3683
3684 switch (exp.X_op)
3685 {
3686 case O_illegal:
3687 case O_absent:
3688 case O_big:
3689 as_bad (_("illegal .stabx expression; zero assumed"));
3690 exp.X_add_number = 0;
3691 /* Fall through. */
3692 case O_constant:
3693 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3694 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3695 break;
3696
3697 case O_symbol:
3698 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3699 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3700 else
3701 {
3702 S_SET_VALUE (sym,
3703 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3704 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3705 }
3706 break;
3707
3708 default:
3709 /* The value is some complex expression. This will probably
99a814a1
AM		 3710 fail at some later point, but this is probably the right
3711 thing to do here. */
809ffe0d 3712 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3713 break;
3714 }
3715
3716 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3717 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3718
3719 if (*input_line_pointer != ',')
3720 {
3721 as_bad (_("missing class"));
3722 return;
3723 }
3724 ++input_line_pointer;
3725
3726 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3727
3728 if (*input_line_pointer != ',')
3729 {
3730 as_bad (_("missing type"));
3731 return;
3732 }
3733 ++input_line_pointer;
3734
3735 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3736
809ffe0d 3737 symbol_get_tc (sym)->output = 1;
252b5132 3738
6877bb43 3739 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3740
809ffe0d 3741 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3742
41ea10b1 3743 /* In this case :
99a814a1 3744
41ea10b1
TR		 3745 .bs name
3746 .stabx "z",arrays_,133,0
3747 .es
99a814a1 3748
41ea10b1 3749 .comm arrays_,13768,3
99a814a1 3750
41ea10b1
TR		 3751 resolve_symbol_value will copy the exp's "within" into sym's when the
3752 offset is 0. Since this seems to be corner case problem,
3753 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3754 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3755
3756 if (exp.X_op == O_symbol)
41ea10b1
TR		 3757 {
3758 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3759 }
6877bb43 3760 }
99a814a1 3761
252b5132
RH		 3762 if (exp.X_op != O_symbol
3763 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3764 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3765 ppc_frob_label (sym);
3766 else
3767 {
3768 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3769 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3770 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3771 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3772 }
3773
3774 demand_empty_rest_of_line ();
3775}
3776
3777/* The .function pseudo-op. This takes several arguments. The first
3778 argument seems to be the external name of the symbol. The second
67c1ffbe 3779 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3780 uses the same name for both. I have no idea what the third and
3781 fourth arguments are meant to be. The optional fifth argument is
3782 an expression for the size of the function. In COFF this symbol
3783 gets an aux entry like that used for a csect. */
3784
3785static void
98027b10 3786ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3787{
3788 char *name;
3789 char endc;
3790 char *s;
3791 symbolS *ext_sym;
3792 symbolS *lab_sym;
3793
3794 name = input_line_pointer;
3795 endc = get_symbol_end ();
3796
3797 /* Ignore any [PR] suffix. */
3798 name = ppc_canonicalize_symbol_name (name);
3799 s = strchr (name, '[');
3800 if (s != (char *) NULL
3801 && strcmp (s + 1, "PR]") == 0)
3802 *s = '\0';
3803
3804 ext_sym = symbol_find_or_make (name);
3805
3806 *input_line_pointer = endc;
3807
3808 if (*input_line_pointer != ',')
3809 {
3810 as_bad (_("missing symbol name"));
3811 ignore_rest_of_line ();
3812 return;
3813 }
3814 ++input_line_pointer;
3815
3816 name = input_line_pointer;
3817 endc = get_symbol_end ();
3818
3819 lab_sym = symbol_find_or_make (name);
3820
3821 *input_line_pointer = endc;
3822
3823 if (ext_sym != lab_sym)
3824 {
809ffe0d
ILT		 3825 expressionS exp;
3826
3827 exp.X_op = O_symbol;
3828 exp.X_add_symbol = lab_sym;
3829 exp.X_op_symbol = NULL;
3830 exp.X_add_number = 0;
3831 exp.X_unsigned = 0;
3832 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3833 }
3834
96d56e9f
NC		 3835 if (symbol_get_tc (ext_sym)->symbol_class == -1)
3836 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
809ffe0d 3837 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3838
3839 if (*input_line_pointer == ',')
3840 {
91d6fa6a 3841 expressionS exp;
252b5132
RH		 3842
3843 /* Ignore the third argument. */
3844 ++input_line_pointer;
91d6fa6a 3845 expression (& exp);
252b5132
RH		 3846 if (*input_line_pointer == ',')
3847 {
3848 /* Ignore the fourth argument. */
3849 ++input_line_pointer;
91d6fa6a 3850 expression (& exp);
252b5132
RH		 3851 if (*input_line_pointer == ',')
3852 {
3853 /* The fifth argument is the function size. */
3854 ++input_line_pointer;
809ffe0d
ILT		 3855 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3856 absolute_section,
3857 (valueT) 0,
3858 &zero_address_frag);
3859 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3860 }
3861 }
3862 }
3863
3864 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3865 SF_SET_FUNCTION (ext_sym);
3866 SF_SET_PROCESS (ext_sym);
3867 coff_add_linesym (ext_sym);
3868
3869 demand_empty_rest_of_line ();
3870}
3871
3872/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3873 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3874 with the correct line number */
5d6255fe 3875
8642cce8 3876static symbolS *saved_bi_sym = 0;
252b5132
RH		 3877
3878static void
98027b10 3879ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3880{
3881 symbolS *sym;
3882
3883 sym = symbol_make (".bf");
3884 S_SET_SEGMENT (sym, text_section);
809ffe0d 3885 symbol_set_frag (sym, frag_now);
252b5132
RH		 3886 S_SET_VALUE (sym, frag_now_fix ());
3887 S_SET_STORAGE_CLASS (sym, C_FCN);
3888
3889 coff_line_base = get_absolute_expression ();
3890
3891 S_SET_NUMBER_AUXILIARY (sym, 1);
3892 SA_SET_SYM_LNNO (sym, coff_line_base);
3893
8642cce8 3894 /* Line number for bi. */
5d6255fe 3895 if (saved_bi_sym)
8642cce8
TR		 3896 {
3897 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3898 saved_bi_sym = 0;
3899 }
5d6255fe 3900
8642cce8 3901
809ffe0d 3902 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3903
3904 ppc_frob_label (sym);
3905
3906 demand_empty_rest_of_line ();
3907}
3908
3909/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3910 ".ef", except that the line number is absolute, not relative to the
3911 most recent ".bf" symbol. */
3912
3913static void
98027b10 3914ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3915{
3916 symbolS *sym;
3917
3918 sym = symbol_make (".ef");
3919 S_SET_SEGMENT (sym, text_section);
809ffe0d 3920 symbol_set_frag (sym, frag_now);
252b5132
RH		 3921 S_SET_VALUE (sym, frag_now_fix ());
3922 S_SET_STORAGE_CLASS (sym, C_FCN);
3923 S_SET_NUMBER_AUXILIARY (sym, 1);
3924 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3925 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3926
3927 ppc_frob_label (sym);
3928
3929 demand_empty_rest_of_line ();
3930}
3931
3932/* The .bi and .ei pseudo-ops. These take a string argument and
3933 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3934 the symbol list. The value of .bi will be know when the next .bf
3935 is encountered. */
252b5132
RH		 3936
3937static void
98027b10 3938ppc_biei (int ei)
252b5132
RH		 3939{
3940 static symbolS *last_biei;
3941
3942 char *name;
3943 int len;
3944 symbolS *sym;
3945 symbolS *look;
3946
3947 name = demand_copy_C_string (&len);
3948
3949 /* The value of these symbols is actually file offset. Here we set
3950 the value to the index into the line number entries. In
3951 ppc_frob_symbols we set the fix_line field, which will cause BFD
3952 to do the right thing. */
3953
3954 sym = symbol_make (name);
3955 /* obj-coff.c currently only handles line numbers correctly in the
3956 .text section. */
3957 S_SET_SEGMENT (sym, text_section);
3958 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3959 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3960
3961 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3962 symbol_get_tc (sym)->output = 1;
81d4177b 3963
8642cce8 3964 /* Save bi. */
5d6255fe 3965 if (ei)
8642cce8
TR		 3966 saved_bi_sym = 0;
3967 else
3968 saved_bi_sym = sym;
3969
252b5132
RH		 3970 for (look = last_biei ? last_biei : symbol_rootP;
3971 (look != (symbolS *) NULL
3972 && (S_GET_STORAGE_CLASS (look) == C_FILE
3973 || S_GET_STORAGE_CLASS (look) == C_BINCL
3974 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3975 look = symbol_next (look))
3976 ;
3977 if (look != (symbolS *) NULL)
3978 {
3979 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3980 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3981 last_biei = sym;
3982 }
3983
3984 demand_empty_rest_of_line ();
3985}
3986
3987/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3988 There is one argument, which is a csect symbol. The value of the
3989 .bs symbol is the index of this csect symbol. */
3990
3991static void
98027b10 3992ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3993{
3994 char *name;
3995 char endc;
3996 symbolS *csect;
3997 symbolS *sym;
3998
3999 if (ppc_current_block != NULL)
4000 as_bad (_("nested .bs blocks"));
4001
4002 name = input_line_pointer;
4003 endc = get_symbol_end ();
4004
4005 csect = symbol_find_or_make (name);
4006
4007 *input_line_pointer = endc;
4008
4009 sym = symbol_make (".bs");
4010 S_SET_SEGMENT (sym, now_seg);
4011 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 4012 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4013 symbol_get_tc (sym)->output = 1;
252b5132 4014
809ffe0d 4015 symbol_get_tc (sym)->within = csect;
252b5132
RH		 4016
4017 ppc_frob_label (sym);
4018
4019 ppc_current_block = sym;
4020
4021 demand_empty_rest_of_line ();
4022}
4023
4024/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4025
4026static void
98027b10 4027ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4028{
4029 symbolS *sym;
4030
4031 if (ppc_current_block == NULL)
4032 as_bad (_(".es without preceding .bs"));
4033
4034 sym = symbol_make (".es");
4035 S_SET_SEGMENT (sym, now_seg);
4036 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 4037 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4038 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4039
4040 ppc_frob_label (sym);
4041
4042 ppc_current_block = NULL;
4043
4044 demand_empty_rest_of_line ();
4045}
4046
4047/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4048 line number. */
4049
4050static void
98027b10 4051ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4052{
4053 symbolS *sym;
4054
4055 sym = symbol_make (".bb");
4056 S_SET_SEGMENT (sym, text_section);
809ffe0d 4057 symbol_set_frag (sym, frag_now);
252b5132
RH		 4058 S_SET_VALUE (sym, frag_now_fix ());
4059 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4060
4061 S_SET_NUMBER_AUXILIARY (sym, 1);
4062 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4063
809ffe0d 4064 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4065
4066 SF_SET_PROCESS (sym);
4067
4068 ppc_frob_label (sym);
4069
4070 demand_empty_rest_of_line ();
4071}
4072
4073/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4074 line number. */
4075
4076static void
98027b10 4077ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4078{
4079 symbolS *sym;
4080
4081 sym = symbol_make (".eb");
4082 S_SET_SEGMENT (sym, text_section);
809ffe0d 4083 symbol_set_frag (sym, frag_now);
252b5132
RH		 4084 S_SET_VALUE (sym, frag_now_fix ());
4085 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4086 S_SET_NUMBER_AUXILIARY (sym, 1);
4087 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4088 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4089
4090 SF_SET_PROCESS (sym);
4091
4092 ppc_frob_label (sym);
4093
4094 demand_empty_rest_of_line ();
4095}
4096
4097/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4098 specified name. */
4099
4100static void
98027b10 4101ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4102{
4103 char *name;
4104 int len;
4105 symbolS *sym;
4106
4107 name = demand_copy_C_string (&len);
4108 sym = symbol_make (name);
4109 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4110 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4111 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4112 S_SET_VALUE (sym, 0);
809ffe0d 4113 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4114
4115 ppc_frob_label (sym);
4116
4117 demand_empty_rest_of_line ();
4118}
4119
4120/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4121
4122static void
98027b10 4123ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4124{
4125 symbolS *sym;
4126
4127 sym = symbol_make (".ec");
4128 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4129 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4130 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4131 S_SET_VALUE (sym, 0);
809ffe0d 4132 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4133
4134 ppc_frob_label (sym);
4135
4136 demand_empty_rest_of_line ();
4137}
4138
4139/* The .toc pseudo-op. Switch to the .toc subsegment. */
4140
4141static void
98027b10 4142ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4143{
4144 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4145 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4146 else
4147 {
4148 subsegT subseg;
4149 symbolS *sym;
4150 symbolS *list;
81d4177b 4151
252b5132
RH		 4152 subseg = ppc_data_subsegment;
4153 ++ppc_data_subsegment;
4154
4155 subseg_new (segment_name (data_section), subseg);
4156 ppc_toc_frag = frag_now;
4157
4158 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4159 symbol_set_frag (sym, frag_now);
252b5132
RH		 4160 S_SET_SEGMENT (sym, data_section);
4161 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4162 symbol_get_tc (sym)->subseg = subseg;
4163 symbol_get_tc (sym)->output = 1;
4164 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4165
4166 ppc_toc_csect = sym;
81d4177b 4167
252b5132 4168 for (list = ppc_data_csects;
809ffe0d
ILT		 4169 symbol_get_tc (list)->next != (symbolS *) NULL;
4170 list = symbol_get_tc (list)->next)
252b5132 4171 ;
809ffe0d 4172 symbol_get_tc (list)->next = sym;
252b5132
RH		 4173
4174 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4175 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4176 &symbol_lastP);
252b5132
RH		 4177 }
4178
4179 ppc_current_csect = ppc_toc_csect;
4180
4181 demand_empty_rest_of_line ();
4182}
4183
4184/* The AIX assembler automatically aligns the operands of a .long or
4185 .short pseudo-op, and we want to be compatible. */
4186
4187static void
98027b10 4188ppc_xcoff_cons (int log_size)
252b5132
RH		 4189{
4190 frag_align (log_size, 0, 0);
4191 record_alignment (now_seg, log_size);
4192 cons (1 << log_size);
4193}
4194
4195static void
98027b10 4196ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4197{
4198 expressionS exp;
4199 int byte_count;
4200
4201 (void) expression (&exp);
4202
4203 if (exp.X_op != O_constant)
4204 {
4205 as_bad (_("non-constant byte count"));
4206 return;
4207 }
4208
4209 byte_count = exp.X_add_number;
4210
4211 if (*input_line_pointer != ',')
4212 {
4213 as_bad (_("missing value"));
4214 return;
4215 }
4216
4217 ++input_line_pointer;
4218 cons (byte_count);
4219}
4220
4221#endif /* OBJ_XCOFF */
0baf16f2 4222#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4223\f
4224/* The .tc pseudo-op. This is used when generating either XCOFF or
4225 ELF. This takes two or more arguments.
4226
4227 When generating XCOFF output, the first argument is the name to
4228 give to this location in the toc; this will be a symbol with class
0baf16f2 4229 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4230 this location in the TOC; often there is just one more argument, a
1049f94e 4231 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4232 depends on target word size. A 32-bit target uses 4-byte values, a
4233 64-bit target uses 8-byte values.
252b5132
RH		 4234
4235 When not generating XCOFF output, the arguments are the same, but
4236 the first argument is simply ignored. */
4237
4238static void
98027b10 4239ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4240{
4241#ifdef OBJ_XCOFF
4242
4243 /* Define the TOC symbol name. */
4244 {
4245 char *name;
4246 char endc;
4247 symbolS *sym;
4248
4249 if (ppc_toc_csect == (symbolS *) NULL
4250 || ppc_toc_csect != ppc_current_csect)
4251 {
4252 as_bad (_(".tc not in .toc section"));
4253 ignore_rest_of_line ();
4254 return;
4255 }
4256
4257 name = input_line_pointer;
4258 endc = get_symbol_end ();
4259
4260 sym = symbol_find_or_make (name);
4261
4262 *input_line_pointer = endc;
4263
4264 if (S_IS_DEFINED (sym))
4265 {
4266 symbolS *label;
4267
809ffe0d 4268 label = symbol_get_tc (ppc_current_csect)->within;
96d56e9f 4269 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
252b5132
RH		 4270 {
4271 as_bad (_(".tc with no label"));
4272 ignore_rest_of_line ();
4273 return;
4274 }
4275
4276 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4277 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4278 S_SET_VALUE (label, S_GET_VALUE (sym));
4279
4280 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4281 ++input_line_pointer;
4282
4283 return;
4284 }
4285
4286 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4287 symbol_set_frag (sym, frag_now);
252b5132 4288 S_SET_VALUE (sym, (valueT) frag_now_fix ());
96d56e9f 4289 symbol_get_tc (sym)->symbol_class = XMC_TC;
809ffe0d 4290 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4291
4292 ppc_frob_label (sym);
4293 }
4294
0baf16f2
AM		 4295#endif /* OBJ_XCOFF */
4296#ifdef OBJ_ELF
9c7977b3 4297 int align;
252b5132
RH		 4298
4299 /* Skip the TOC symbol name. */
4300 while (is_part_of_name (*input_line_pointer)
d13d4015 4301 || *input_line_pointer == ' '
252b5132
RH		 4302 || *input_line_pointer == '['
4303 || *input_line_pointer == ']'
4304 || *input_line_pointer == '{'
4305 || *input_line_pointer == '}')
4306 ++input_line_pointer;
4307
0baf16f2 4308 /* Align to a four/eight byte boundary. */
2b3c4602 4309 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4310 frag_align (align, 0, 0);
4311 record_alignment (now_seg, align);
0baf16f2 4312#endif /* OBJ_ELF */
252b5132
RH		 4313
4314 if (*input_line_pointer != ',')
4315 demand_empty_rest_of_line ();
4316 else
4317 {
4318 ++input_line_pointer;
2b3c4602 4319 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4320 }
4321}
0baf16f2
AM		 4322
4323/* Pseudo-op .machine. */
0baf16f2
AM		 4324
4325static void
98027b10 4326ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4327{
69c040df
AM		 4328 char *cpu_string;
4329#define MAX_HISTORY 100
fa452fa6 4330 static ppc_cpu_t *cpu_history;
69c040df
AM		 4331 static int curr_hist;
4332
4333 SKIP_WHITESPACE ();
4334
4335 if (*input_line_pointer == '"')
4336 {
4337 int len;
4338 cpu_string = demand_copy_C_string (&len);
4339 }
4340 else
4341 {
4342 char c;
4343 cpu_string = input_line_pointer;
4344 c = get_symbol_end ();
4345 cpu_string = xstrdup (cpu_string);
4346 *input_line_pointer = c;
4347 }
4348
4349 if (cpu_string != NULL)
4350 {
fa452fa6 4351 ppc_cpu_t old_cpu = ppc_cpu;
69fe9ce5 4352 ppc_cpu_t new_cpu;
69c040df
AM		 4353 char *p;
4354
4355 for (p = cpu_string; *p != 0; p++)
4356 *p = TOLOWER (*p);
4357
4358 if (strcmp (cpu_string, "push") == 0)
4359 {
4360 if (cpu_history == NULL)
4361 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4362
4363 if (curr_hist >= MAX_HISTORY)
4364 as_bad (_(".machine stack overflow"));
4365 else
4366 cpu_history[curr_hist++] = ppc_cpu;
4367 }
4368 else if (strcmp (cpu_string, "pop") == 0)
4369 {
4370 if (curr_hist <= 0)
4371 as_bad (_(".machine stack underflow"));
4372 else
4373 ppc_cpu = cpu_history[--curr_hist];
4374 }
69fe9ce5
AM		 4375 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, cpu_string)) != 0)
4376 ppc_cpu = new_cpu;
69c040df
AM		 4377 else
4378 as_bad (_("invalid machine `%s'"), cpu_string);
4379
4380 if (ppc_cpu != old_cpu)
4381 ppc_setup_opcodes ();
4382 }
4383
4384 demand_empty_rest_of_line ();
0baf16f2
AM		 4385}
4386
4387/* See whether a symbol is in the TOC section. */
4388
4389static int
98027b10 4390ppc_is_toc_sym (symbolS *sym)
0baf16f2
AM		 4391{
4392#ifdef OBJ_XCOFF
96d56e9f 4393 return symbol_get_tc (sym)->symbol_class == XMC_TC;
0baf16f2
AM		 4394#endif
4395#ifdef OBJ_ELF
4396 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4397 if (ppc_obj64)
0baf16f2
AM		 4398 return strcmp (sname, ".toc") == 0;
4399 else
4400 return strcmp (sname, ".got") == 0;
4401#endif
4402}
4403#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4404\f
4405#ifdef TE_PE
4406
99a814a1 4407/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4408
4409/* Set the current section. */
4410static void
98027b10 4411ppc_set_current_section (segT new)
252b5132
RH		 4412{
4413 ppc_previous_section = ppc_current_section;
4414 ppc_current_section = new;
4415}
4416
4417/* pseudo-op: .previous
4418 behaviour: toggles the current section with the previous section.
4419 errors: None
99a814a1
AM		 4420 warnings: "No previous section" */
4421
252b5132 4422static void
98027b10 4423ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4424{
4425 symbolS *tmp;
4426
81d4177b 4427 if (ppc_previous_section == NULL)
252b5132 4428 {
99a814a1 4429 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4430 return;
4431 }
4432
99a814a1 4433 subseg_set (ppc_previous_section, 0);
252b5132 4434
99a814a1 4435 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4436}
4437
4438/* pseudo-op: .pdata
4439 behaviour: predefined read only data section
b34976b6 4440 double word aligned
252b5132
RH		 4441 errors: None
4442 warnings: None
4443 initial: .section .pdata "adr3"
b34976b6 4444 a - don't know -- maybe a misprint
252b5132
RH		 4445 d - initialized data
4446 r - readable
4447 3 - double word aligned (that would be 4 byte boundary)
4448
4449 commentary:
4450 Tag index tables (also known as the function table) for exception
99a814a1 4451 handling, debugging, etc. */
252b5132 4452
252b5132 4453static void
98027b10 4454ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4455{
81d4177b 4456 if (pdata_section == 0)
252b5132
RH		 4457 {
4458 pdata_section = subseg_new (".pdata", 0);
81d4177b 4459
252b5132
RH		 4460 bfd_set_section_flags (stdoutput, pdata_section,
4461 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4462 | SEC_READONLY | SEC_DATA ));
81d4177b 4463
252b5132
RH		 4464 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4465 }
4466 else
4467 {
99a814a1 4468 pdata_section = subseg_new (".pdata", 0);
252b5132 4469 }
99a814a1 4470 ppc_set_current_section (pdata_section);
252b5132
RH		 4471}
4472
4473/* pseudo-op: .ydata
4474 behaviour: predefined read only data section
b34976b6 4475 double word aligned
252b5132
RH		 4476 errors: None
4477 warnings: None
4478 initial: .section .ydata "drw3"
b34976b6 4479 a - don't know -- maybe a misprint
252b5132
RH		 4480 d - initialized data
4481 r - readable
4482 3 - double word aligned (that would be 4 byte boundary)
4483 commentary:
4484 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4485 debugging, etc. */
4486
252b5132 4487static void
98027b10 4488ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4489{
81d4177b 4490 if (ydata_section == 0)
252b5132
RH		 4491 {
4492 ydata_section = subseg_new (".ydata", 0);
4493 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4494 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4495 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4496
4497 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4498 }
4499 else
4500 {
4501 ydata_section = subseg_new (".ydata", 0);
4502 }
99a814a1 4503 ppc_set_current_section (ydata_section);
252b5132
RH		 4504}
4505
4506/* pseudo-op: .reldata
4507 behaviour: predefined read write data section
b34976b6 4508 double word aligned (4-byte)
252b5132
RH		 4509 FIXME: relocation is applied to it
4510 FIXME: what's the difference between this and .data?
4511 errors: None
4512 warnings: None
4513 initial: .section .reldata "drw3"
4514 d - initialized data
4515 r - readable
4516 w - writeable
4517 3 - double word aligned (that would be 8 byte boundary)
4518
4519 commentary:
4520 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4521 function descriptors, etc. */
4522
252b5132 4523static void
98027b10 4524ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4525{
4526 if (reldata_section == 0)
4527 {
4528 reldata_section = subseg_new (".reldata", 0);
4529
4530 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4531 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4532 | SEC_DATA));
252b5132
RH		 4533
4534 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4535 }
4536 else
4537 {
4538 reldata_section = subseg_new (".reldata", 0);
4539 }
99a814a1 4540 ppc_set_current_section (reldata_section);
252b5132
RH		 4541}
4542
4543/* pseudo-op: .rdata
4544 behaviour: predefined read only data section
b34976b6 4545 double word aligned
252b5132
RH		 4546 errors: None
4547 warnings: None
4548 initial: .section .rdata "dr3"
4549 d - initialized data
4550 r - readable
99a814a1
AM		 4551 3 - double word aligned (that would be 4 byte boundary) */
4552
252b5132 4553static void
98027b10 4554ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4555{
4556 if (rdata_section == 0)
4557 {
4558 rdata_section = subseg_new (".rdata", 0);
4559 bfd_set_section_flags (stdoutput, rdata_section,
4560 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4561 | SEC_READONLY | SEC_DATA ));
4562
4563 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4564 }
4565 else
4566 {
4567 rdata_section = subseg_new (".rdata", 0);
4568 }
99a814a1 4569 ppc_set_current_section (rdata_section);
252b5132
RH		 4570}
4571
4572/* pseudo-op: .ualong
81d4177b 4573 behaviour: much like .int, with the exception that no alignment is
b34976b6 4574 performed.
252b5132
RH		 4575 FIXME: test the alignment statement
4576 errors: None
99a814a1
AM		 4577 warnings: None */
4578
252b5132 4579static void
98027b10 4580ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 4581{
99a814a1
AM		 4582 /* Try for long. */
4583 cons (4);
252b5132
RH		 4584}
4585
4586/* pseudo-op: .znop <symbol name>
4587 behaviour: Issue a nop instruction
b34976b6 4588 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4589 the supplied symbol name.
4590 errors: None
99a814a1
AM		 4591 warnings: Missing symbol name */
4592
252b5132 4593static void
98027b10 4594ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4595{
4596 unsigned long insn;
4597 const struct powerpc_opcode *opcode;
4598 expressionS ex;
4599 char *f;
252b5132 4600 symbolS *sym;
252b5132
RH		 4601 char *symbol_name;
4602 char c;
4603 char *name;
4604 unsigned int exp;
4605 flagword flags;
4606 asection *sec;
4607
99a814a1 4608 /* Strip out the symbol name. */
252b5132
RH		 4609 symbol_name = input_line_pointer;
4610 c = get_symbol_end ();
4611
4612 name = xmalloc (input_line_pointer - symbol_name + 1);
4613 strcpy (name, symbol_name);
4614
4615 sym = symbol_find_or_make (name);
4616
4617 *input_line_pointer = c;
4618
4619 SKIP_WHITESPACE ();
4620
4621 /* Look up the opcode in the hash table. */
4622 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4623
99a814a1 4624 /* Stick in the nop. */
252b5132
RH		 4625 insn = opcode->opcode;
4626
4627 /* Write out the instruction. */
4628 f = frag_more (4);
4629 md_number_to_chars (f, insn, 4);
4630 fix_new (frag_now,
4631 f - frag_now->fr_literal,
4632 4,
4633 sym,
4634 0,
4635 0,
4636 BFD_RELOC_16_GOT_PCREL);
4637
4638}
4639
81d4177b
KH		 4640/* pseudo-op:
4641 behaviour:
4642 errors:
99a814a1
AM		 4643 warnings: */
4644
252b5132 4645static void
98027b10 4646ppc_pe_comm (int lcomm)
252b5132 4647{
98027b10
AM		 4648 char *name;
4649 char c;
4650 char *p;
252b5132 4651 offsetT temp;
98027b10 4652 symbolS *symbolP;
252b5132
RH		 4653 offsetT align;
4654
4655 name = input_line_pointer;
4656 c = get_symbol_end ();
4657
99a814a1 4658 /* just after name is now '\0'. */
252b5132
RH		 4659 p = input_line_pointer;
4660 *p = c;
4661 SKIP_WHITESPACE ();
4662 if (*input_line_pointer != ',')
4663 {
4664 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4665 ignore_rest_of_line ();
4666 return;
4667 }
4668
4669 input_line_pointer++; /* skip ',' */
4670 if ((temp = get_absolute_expression ()) < 0)
4671 {
4672 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4673 ignore_rest_of_line ();
4674 return;
4675 }
4676
4677 if (! lcomm)
4678 {
4679 /* The third argument to .comm is the alignment. */
4680 if (*input_line_pointer != ',')
4681 align = 3;
4682 else
4683 {
4684 ++input_line_pointer;
4685 align = get_absolute_expression ();
4686 if (align <= 0)
4687 {
4688 as_warn (_("ignoring bad alignment"));
4689 align = 3;
4690 }
4691 }
4692 }
4693
4694 *p = 0;
4695 symbolP = symbol_find_or_make (name);
4696
4697 *p = c;
4698 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4699 {
4700 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4701 S_GET_NAME (symbolP));
4702 ignore_rest_of_line ();
4703 return;
4704 }
4705
4706 if (S_GET_VALUE (symbolP))
4707 {
4708 if (S_GET_VALUE (symbolP) != (valueT) temp)
4709 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4710 S_GET_NAME (symbolP),
4711 (long) S_GET_VALUE (symbolP),
4712 (long) temp);
4713 }
4714 else
4715 {
4716 S_SET_VALUE (symbolP, (valueT) temp);
4717 S_SET_EXTERNAL (symbolP);
86ebace2 4718 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4719 }
4720
4721 demand_empty_rest_of_line ();
4722}
4723
4724/*
4725 * implement the .section pseudo op:
4726 * .section name {, "flags"}
4727 * ^ ^
4728 * | +--- optional flags: 'b' for bss
4729 * | 'i' for info
4730 * +-- section name 'l' for lib
4731 * 'n' for noload
4732 * 'o' for over
4733 * 'w' for data
4734 * 'd' (apparently m88k for data)
4735 * 'x' for text
4736 * But if the argument is not a quoted string, treat it as a
4737 * subsegment number.
4738 *
4739 * FIXME: this is a copy of the section processing from obj-coff.c, with
4740 * additions/changes for the moto-pas assembler support. There are three
4741 * categories:
4742 *
81d4177b 4743 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4744 * setting bits that bfd probably neither understands or uses. The
4745 * correct approach (?) will have to incorporate extra fields attached
4746 * to the section to hold the system specific stuff. (krk)
4747 *
4748 * Section Contents:
4749 * 'a' - unknown - referred to in documentation, but no definition supplied
4750 * 'c' - section has code
4751 * 'd' - section has initialized data
4752 * 'u' - section has uninitialized data
4753 * 'i' - section contains directives (info)
4754 * 'n' - section can be discarded
4755 * 'R' - remove section at link time
4756 *
4757 * Section Protection:
4758 * 'r' - section is readable
4759 * 'w' - section is writeable
4760 * 'x' - section is executable
4761 * 's' - section is sharable
4762 *
4763 * Section Alignment:
4764 * '0' - align to byte boundary
4765 * '1' - align to halfword undary
4766 * '2' - align to word boundary
4767 * '3' - align to doubleword boundary
4768 * '4' - align to quadword boundary
4769 * '5' - align to 32 byte boundary
4770 * '6' - align to 64 byte boundary
4771 *
4772 */
4773
4774void
98027b10 4775ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 4776{
99a814a1 4777 /* Strip out the section name. */
252b5132
RH		 4778 char *section_name;
4779 char c;
4780 char *name;
4781 unsigned int exp;
4782 flagword flags;
4783 segT sec;
4784 int align;
4785
4786 section_name = input_line_pointer;
4787 c = get_symbol_end ();
4788
4789 name = xmalloc (input_line_pointer - section_name + 1);
4790 strcpy (name, section_name);
4791
4792 *input_line_pointer = c;
4793
4794 SKIP_WHITESPACE ();
4795
4796 exp = 0;
4797 flags = SEC_NO_FLAGS;
4798
4799 if (strcmp (name, ".idata$2") == 0)
4800 {
4801 align = 0;
4802 }
4803 else if (strcmp (name, ".idata$3") == 0)
4804 {
4805 align = 0;
4806 }
4807 else if (strcmp (name, ".idata$4") == 0)
4808 {
4809 align = 2;
4810 }
4811 else if (strcmp (name, ".idata$5") == 0)
4812 {
4813 align = 2;
4814 }
4815 else if (strcmp (name, ".idata$6") == 0)
4816 {
4817 align = 1;
4818 }
4819 else
99a814a1
AM		 4820 /* Default alignment to 16 byte boundary. */
4821 align = 4;
252b5132
RH		 4822
4823 if (*input_line_pointer == ',')
4824 {
4825 ++input_line_pointer;
4826 SKIP_WHITESPACE ();
4827 if (*input_line_pointer != '"')
4828 exp = get_absolute_expression ();
4829 else
4830 {
4831 ++input_line_pointer;
4832 while (*input_line_pointer != '"'
4833 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4834 {
4835 switch (*input_line_pointer)
4836 {
4837 /* Section Contents */
4838 case 'a': /* unknown */
4839 as_bad (_("Unsupported section attribute -- 'a'"));
4840 break;
4841 case 'c': /* code section */
81d4177b 4842 flags |= SEC_CODE;
252b5132
RH		 4843 break;
4844 case 'd': /* section has initialized data */
4845 flags |= SEC_DATA;
4846 break;
4847 case 'u': /* section has uninitialized data */
4848 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4849 in winnt.h */
4850 flags |= SEC_ROM;
4851 break;
4852 case 'i': /* section contains directives (info) */
4853 /* FIXME: This is IMAGE_SCN_LNK_INFO
4854 in winnt.h */
4855 flags |= SEC_HAS_CONTENTS;
4856 break;
4857 case 'n': /* section can be discarded */
81d4177b 4858 flags &=~ SEC_LOAD;
252b5132
RH		 4859 break;
4860 case 'R': /* Remove section at link time */
4861 flags |= SEC_NEVER_LOAD;
4862 break;
8d452c78 4863#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 4864 /* Section Protection */
4865 case 'r': /* section is readable */
4866 flags |= IMAGE_SCN_MEM_READ;
4867 break;
4868 case 'w': /* section is writeable */
4869 flags |= IMAGE_SCN_MEM_WRITE;
4870 break;
4871 case 'x': /* section is executable */
4872 flags |= IMAGE_SCN_MEM_EXECUTE;
4873 break;
4874 case 's': /* section is sharable */
4875 flags |= IMAGE_SCN_MEM_SHARED;
4876 break;
4877
4878 /* Section Alignment */
4879 case '0': /* align to byte boundary */
4880 flags |= IMAGE_SCN_ALIGN_1BYTES;
4881 align = 0;
4882 break;
4883 case '1': /* align to halfword boundary */
4884 flags |= IMAGE_SCN_ALIGN_2BYTES;
4885 align = 1;
4886 break;
4887 case '2': /* align to word boundary */
4888 flags |= IMAGE_SCN_ALIGN_4BYTES;
4889 align = 2;
4890 break;
4891 case '3': /* align to doubleword boundary */
4892 flags |= IMAGE_SCN_ALIGN_8BYTES;
4893 align = 3;
4894 break;
4895 case '4': /* align to quadword boundary */
4896 flags |= IMAGE_SCN_ALIGN_16BYTES;
4897 align = 4;
4898 break;
4899 case '5': /* align to 32 byte boundary */
4900 flags |= IMAGE_SCN_ALIGN_32BYTES;
4901 align = 5;
4902 break;
4903 case '6': /* align to 64 byte boundary */
4904 flags |= IMAGE_SCN_ALIGN_64BYTES;
4905 align = 6;
4906 break;
8d452c78 4907#endif
252b5132 4908 default:
99a814a1
AM		 4909 as_bad (_("unknown section attribute '%c'"),
4910 *input_line_pointer);
252b5132
RH		 4911 break;
4912 }
4913 ++input_line_pointer;
4914 }
4915 if (*input_line_pointer == '"')
4916 ++input_line_pointer;
4917 }
4918 }
4919
4920 sec = subseg_new (name, (subsegT) exp);
4921
99a814a1 4922 ppc_set_current_section (sec);
252b5132
RH		 4923
4924 if (flags != SEC_NO_FLAGS)
4925 {
4926 if (! bfd_set_section_flags (stdoutput, sec, flags))
4927 as_bad (_("error setting flags for \"%s\": %s"),
4928 bfd_section_name (stdoutput, sec),
4929 bfd_errmsg (bfd_get_error ()));
4930 }
4931
99a814a1 4932 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4933}
4934
4935static void
98027b10 4936ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4937{
4938 char *name;
4939 char endc;
4940 symbolS *ext_sym;
4941
4942 name = input_line_pointer;
4943 endc = get_symbol_end ();
4944
4945 ext_sym = symbol_find_or_make (name);
4946
4947 *input_line_pointer = endc;
4948
4949 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4950 SF_SET_FUNCTION (ext_sym);
4951 SF_SET_PROCESS (ext_sym);
4952 coff_add_linesym (ext_sym);
4953
4954 demand_empty_rest_of_line ();
4955}
4956
4957static void
98027b10 4958ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4959{
4960 if (tocdata_section == 0)
4961 {
4962 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4963 /* FIXME: section flags won't work. */
252b5132
RH		 4964 bfd_set_section_flags (stdoutput, tocdata_section,
4965 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4966 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4967
4968 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4969 }
4970 else
4971 {
4972 rdata_section = subseg_new (".tocd", 0);
4973 }
4974
99a814a1 4975 ppc_set_current_section (tocdata_section);
252b5132
RH		 4976
4977 demand_empty_rest_of_line ();
4978}
4979
4980/* Don't adjust TOC relocs to use the section symbol. */
4981
4982int
98027b10 4983ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 4984{
4985 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4986}
4987
4988#endif
4989\f
4990#ifdef OBJ_XCOFF
4991
4992/* XCOFF specific symbol and file handling. */
4993
4994/* Canonicalize the symbol name. We use the to force the suffix, if
4995 any, to use square brackets, and to be in upper case. */
4996
4997char *
98027b10 4998ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 4999{
5000 char *s;
5001
5002 if (ppc_stab_symbol)
5003 return name;
5004
5005 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5006 ;
5007 if (*s != '\0')
5008 {
5009 char brac;
5010
5011 if (*s == '[')
5012 brac = ']';
5013 else
5014 {
5015 *s = '[';
5016 brac = '}';
5017 }
5018
5019 for (s++; *s != '\0' && *s != brac; s++)
3882b010 5020 *s = TOUPPER (*s);
252b5132
RH		 5021
5022 if (*s == '\0' || s[1] != '\0')
5023 as_bad (_("bad symbol suffix"));
5024
5025 *s = ']';
5026 }
5027
5028 return name;
5029}
5030
5031/* Set the class of a symbol based on the suffix, if any. This is
5032 called whenever a new symbol is created. */
5033
5034void
98027b10 5035ppc_symbol_new_hook (symbolS *sym)
252b5132 5036{
809ffe0d 5037 struct ppc_tc_sy *tc;
252b5132
RH		 5038 const char *s;
5039
809ffe0d
ILT		 5040 tc = symbol_get_tc (sym);
5041 tc->next = NULL;
5042 tc->output = 0;
96d56e9f 5043 tc->symbol_class = -1;
809ffe0d
ILT		 5044 tc->real_name = NULL;
5045 tc->subseg = 0;
5046 tc->align = 0;
5047 tc->size = NULL;
5048 tc->within = NULL;
252b5132
RH		 5049
5050 if (ppc_stab_symbol)
5051 return;
5052
5053 s = strchr (S_GET_NAME (sym), '[');
5054 if (s == (const char *) NULL)
5055 {
5056 /* There is no suffix. */
5057 return;
5058 }
5059
5060 ++s;
5061
5062 switch (s[0])
5063 {
5064 case 'B':
5065 if (strcmp (s, "BS]") == 0)
96d56e9f 5066 tc->symbol_class = XMC_BS;
252b5132
RH		 5067 break;
5068 case 'D':
5069 if (strcmp (s, "DB]") == 0)
96d56e9f 5070 tc->symbol_class = XMC_DB;
252b5132 5071 else if (strcmp (s, "DS]") == 0)
96d56e9f 5072 tc->symbol_class = XMC_DS;
252b5132
RH		 5073 break;
5074 case 'G':
5075 if (strcmp (s, "GL]") == 0)
96d56e9f 5076 tc->symbol_class = XMC_GL;
252b5132
RH		 5077 break;
5078 case 'P':
5079 if (strcmp (s, "PR]") == 0)
96d56e9f 5080 tc->symbol_class = XMC_PR;
252b5132
RH		 5081 break;
5082 case 'R':
5083 if (strcmp (s, "RO]") == 0)
96d56e9f 5084 tc->symbol_class = XMC_RO;
252b5132 5085 else if (strcmp (s, "RW]") == 0)
96d56e9f 5086 tc->symbol_class = XMC_RW;
252b5132
RH		 5087 break;
5088 case 'S':
5089 if (strcmp (s, "SV]") == 0)
96d56e9f 5090 tc->symbol_class = XMC_SV;
252b5132
RH		 5091 break;
5092 case 'T':
5093 if (strcmp (s, "TC]") == 0)
96d56e9f 5094 tc->symbol_class = XMC_TC;
252b5132 5095 else if (strcmp (s, "TI]") == 0)
96d56e9f 5096 tc->symbol_class = XMC_TI;
252b5132 5097 else if (strcmp (s, "TB]") == 0)
96d56e9f 5098 tc->symbol_class = XMC_TB;
252b5132 5099 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
96d56e9f 5100 tc->symbol_class = XMC_TC0;
252b5132
RH		 5101 break;
5102 case 'U':
5103 if (strcmp (s, "UA]") == 0)
96d56e9f 5104 tc->symbol_class = XMC_UA;
252b5132 5105 else if (strcmp (s, "UC]") == 0)
96d56e9f 5106 tc->symbol_class = XMC_UC;
252b5132
RH		 5107 break;
5108 case 'X':
5109 if (strcmp (s, "XO]") == 0)
96d56e9f 5110 tc->symbol_class = XMC_XO;
252b5132
RH		 5111 break;
5112 }
5113
96d56e9f 5114 if (tc->symbol_class == -1)
252b5132
RH		 5115 as_bad (_("Unrecognized symbol suffix"));
5116}
5117
5118/* Set the class of a label based on where it is defined. This
5119 handles symbols without suffixes. Also, move the symbol so that it
5120 follows the csect symbol. */
5121
5122void
98027b10 5123ppc_frob_label (symbolS *sym)
252b5132
RH		 5124{
5125 if (ppc_current_csect != (symbolS *) NULL)
5126 {
96d56e9f
NC		 5127 if (symbol_get_tc (sym)->symbol_class == -1)
5128 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
252b5132
RH		 5129
5130 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5131 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5132 &symbol_rootP, &symbol_lastP);
5133 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 5134 }
07a53e5c
RH		 5135
5136#ifdef OBJ_ELF
5137 dwarf2_emit_label (sym);
5138#endif
252b5132
RH		 5139}
5140
5141/* This variable is set by ppc_frob_symbol if any absolute symbols are
5142 seen. It tells ppc_adjust_symtab whether it needs to look through
5143 the symbols. */
5144
b34976b6 5145static bfd_boolean ppc_saw_abs;
252b5132
RH		 5146
5147/* Change the name of a symbol just before writing it out. Set the
5148 real name if the .rename pseudo-op was used. Otherwise, remove any
5149 class suffix. Return 1 if the symbol should not be included in the
5150 symbol table. */
5151
5152int
98027b10 5153ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5154{
5155 static symbolS *ppc_last_function;
5156 static symbolS *set_end;
5157
5158 /* Discard symbols that should not be included in the output symbol
5159 table. */
809ffe0d
ILT		 5160 if (! symbol_used_in_reloc_p (sym)
5161 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5162 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5163 && ! symbol_get_tc (sym)->output
252b5132
RH		 5164 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5165 return 1;
5166
a161fe53
AM		 5167 /* This one will disappear anyway. Don't make a csect sym for it. */
5168 if (sym == abs_section_sym)
5169 return 1;
5170
809ffe0d
ILT		 5171 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5172 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5173 else
5174 {
5175 const char *name;
5176 const char *s;
5177
5178 name = S_GET_NAME (sym);
5179 s = strchr (name, '[');
5180 if (s != (char *) NULL)
5181 {
5182 unsigned int len;
5183 char *snew;
5184
5185 len = s - name;
5186 snew = xmalloc (len + 1);
5187 memcpy (snew, name, len);
5188 snew[len] = '\0';
5189
5190 S_SET_NAME (sym, snew);
5191 }
5192 }
5193
5194 if (set_end != (symbolS *) NULL)
5195 {
5196 SA_SET_SYM_ENDNDX (set_end, sym);
5197 set_end = NULL;
5198 }
5199
5200 if (SF_GET_FUNCTION (sym))
5201 {
5202 if (ppc_last_function != (symbolS *) NULL)
5203 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5204 ppc_last_function = sym;
809ffe0d 5205 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 5206 {
6386f3a7 5207 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 5208 SA_SET_SYM_FSIZE (sym,
5209 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 5210 }
5211 }
5212 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5213 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5214 {
5215 if (ppc_last_function == (symbolS *) NULL)
5216 as_bad (_(".ef with no preceding .function"));
5217 else
5218 {
5219 set_end = ppc_last_function;
5220 ppc_last_function = NULL;
5221
5222 /* We don't have a C_EFCN symbol, but we need to force the
5223 COFF backend to believe that it has seen one. */
5224 coff_last_function = NULL;
5225 }
5226 }
5227
670ec21d 5228 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5229 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5230 && S_GET_STORAGE_CLASS (sym) != C_FILE
5231 && S_GET_STORAGE_CLASS (sym) != C_FCN
5232 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5233 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5234 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5235 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5236 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5237 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5238 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5239
5240 if (S_GET_STORAGE_CLASS (sym) == C_EXT
8602d4fe 5241 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
252b5132
RH		 5242 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5243 {
5244 int i;
5245 union internal_auxent *a;
5246
5247 /* Create a csect aux. */
5248 i = S_GET_NUMBER_AUXILIARY (sym);
5249 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d 5250 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
96d56e9f 5251 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
252b5132
RH		 5252 {
5253 /* This is the TOC table. */
5254 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5255 a->x_csect.x_scnlen.l = 0;
5256 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5257 }
809ffe0d 5258 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5259 {
5260 /* This is a csect symbol. x_scnlen is the size of the
5261 csect. */
809ffe0d 5262 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5263 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5264 S_GET_SEGMENT (sym))
5265 - S_GET_VALUE (sym));
5266 else
5267 {
6386f3a7 5268 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5269 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5270 - S_GET_VALUE (sym));
5271 }
809ffe0d 5272 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5273 }
5274 else if (S_GET_SEGMENT (sym) == bss_section)
5275 {
5276 /* This is a common symbol. */
809ffe0d
ILT		 5277 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5278 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5279 if (S_IS_EXTERNAL (sym))
96d56e9f 5280 symbol_get_tc (sym)->symbol_class = XMC_RW;
252b5132 5281 else
96d56e9f 5282 symbol_get_tc (sym)->symbol_class = XMC_BS;
252b5132
RH		 5283 }
5284 else if (S_GET_SEGMENT (sym) == absolute_section)
5285 {
5286 /* This is an absolute symbol. The csect will be created by
99a814a1 5287 ppc_adjust_symtab. */
b34976b6 5288 ppc_saw_abs = TRUE;
252b5132 5289 a->x_csect.x_smtyp = XTY_LD;
96d56e9f
NC		 5290 if (symbol_get_tc (sym)->symbol_class == -1)
5291 symbol_get_tc (sym)->symbol_class = XMC_XO;
252b5132
RH		 5292 }
5293 else if (! S_IS_DEFINED (sym))
5294 {
5295 /* This is an external symbol. */
5296 a->x_csect.x_scnlen.l = 0;
5297 a->x_csect.x_smtyp = XTY_ER;
5298 }
96d56e9f 5299 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
252b5132
RH		 5300 {
5301 symbolS *next;
5302
5303 /* This is a TOC definition. x_scnlen is the size of the
5304 TOC entry. */
5305 next = symbol_next (sym);
96d56e9f 5306 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
252b5132
RH		 5307 next = symbol_next (next);
5308 if (next == (symbolS *) NULL
96d56e9f 5309 || symbol_get_tc (next)->symbol_class != XMC_TC)
252b5132
RH		 5310 {
5311 if (ppc_after_toc_frag == (fragS *) NULL)
5312 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5313 data_section)
5314 - S_GET_VALUE (sym));
5315 else
5316 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5317 - S_GET_VALUE (sym));
5318 }
5319 else
5320 {
6386f3a7 5321 resolve_symbol_value (next);
252b5132
RH		 5322 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5323 - S_GET_VALUE (sym));
5324 }
5325 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5326 }
5327 else
5328 {
5329 symbolS *csect;
5330
5331 /* This is a normal symbol definition. x_scnlen is the
5332 symbol index of the containing csect. */
5333 if (S_GET_SEGMENT (sym) == text_section)
5334 csect = ppc_text_csects;
5335 else if (S_GET_SEGMENT (sym) == data_section)
5336 csect = ppc_data_csects;
5337 else
5338 abort ();
5339
5340 /* Skip the initial dummy symbol. */
809ffe0d 5341 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5342
5343 if (csect == (symbolS *) NULL)
5344 {
5345 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5346 a->x_csect.x_scnlen.l = 0;
5347 }
5348 else
5349 {
809ffe0d 5350 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5351 {
6386f3a7 5352 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5353 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5354 > S_GET_VALUE (sym))
252b5132 5355 break;
809ffe0d 5356 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5357 }
5358
809ffe0d
ILT		 5359 a->x_csect.x_scnlen.p =
5360 coffsymbol (symbol_get_bfdsym (csect))->native;
5361 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5362 1;
252b5132
RH		 5363 }
5364 a->x_csect.x_smtyp = XTY_LD;
5365 }
81d4177b 5366
252b5132
RH		 5367 a->x_csect.x_parmhash = 0;
5368 a->x_csect.x_snhash = 0;
96d56e9f 5369 if (symbol_get_tc (sym)->symbol_class == -1)
252b5132
RH		 5370 a->x_csect.x_smclas = XMC_PR;
5371 else
96d56e9f 5372 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
252b5132
RH		 5373 a->x_csect.x_stab = 0;
5374 a->x_csect.x_snstab = 0;
5375
5376 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5377 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5378 }
5379 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5380 {
5381 /* We want the value to be the symbol index of the referenced
5382 csect symbol. BFD will do that for us if we set the right
5383 flags. */
b782de16
AM		 5384 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5385 combined_entry_type *c = coffsymbol (bsym)->native;
5386
5387 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5388 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5389 }
5390 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5391 {
5392 symbolS *block;
5393 symbolS *csect;
5394
5395 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5396 block = symbol_get_tc (sym)->within;
5397 csect = symbol_get_tc (block)->within;
6386f3a7 5398 resolve_symbol_value (csect);
252b5132
RH		 5399 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5400 }
5401 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5402 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5403 {
5404 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5405 BFD will do that for us if we set the right flags. We have
5406 already set the value correctly. */
809ffe0d 5407 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5408 }
5409
5410 return 0;
5411}
5412
5413/* Adjust the symbol table. This creates csect symbols for all
5414 absolute symbols. */
5415
5416void
98027b10 5417ppc_adjust_symtab (void)
252b5132
RH		 5418{
5419 symbolS *sym;
5420
5421 if (! ppc_saw_abs)
5422 return;
5423
5424 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5425 {
5426 symbolS *csect;
5427 int i;
5428 union internal_auxent *a;
5429
5430 if (S_GET_SEGMENT (sym) != absolute_section)
5431 continue;
5432
5433 csect = symbol_create (".abs[XO]", absolute_section,
5434 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5435 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5436 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5437 i = S_GET_NUMBER_AUXILIARY (csect);
5438 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5439 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5440 a->x_csect.x_scnlen.l = 0;
5441 a->x_csect.x_smtyp = XTY_SD;
5442 a->x_csect.x_parmhash = 0;
5443 a->x_csect.x_snhash = 0;
5444 a->x_csect.x_smclas = XMC_XO;
5445 a->x_csect.x_stab = 0;
5446 a->x_csect.x_snstab = 0;
5447
5448 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5449
5450 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5451 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5452 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5453 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5454 }
5455
b34976b6 5456 ppc_saw_abs = FALSE;
252b5132
RH		 5457}
5458
5459/* Set the VMA for a section. This is called on all the sections in
5460 turn. */
5461
5462void
98027b10 5463ppc_frob_section (asection *sec)
252b5132 5464{
931e13a6 5465 static bfd_vma vma = 0;
252b5132 5466
931e13a6 5467 vma = md_section_align (sec, vma);
252b5132
RH		 5468 bfd_set_section_vma (stdoutput, sec, vma);
5469 vma += bfd_section_size (stdoutput, sec);
5470}
5471
5472#endif /* OBJ_XCOFF */
5473\f
252b5132 5474char *
98027b10 5475md_atof (int type, char *litp, int *sizep)
252b5132 5476{
499ac353 5477 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 5478}
5479
5480/* Write a value out to the object file, using the appropriate
5481 endianness. */
5482
5483void
98027b10 5484md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5485{
5486 if (target_big_endian)
5487 number_to_chars_bigendian (buf, val, n);
5488 else
5489 number_to_chars_littleendian (buf, val, n);
5490}
5491
5492/* Align a section (I don't know why this is machine dependent). */
5493
5494valueT
3aeeedbb 5495md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5496{
3aeeedbb
AM		 5497#ifdef OBJ_ELF
5498 return addr;
5499#else
252b5132
RH		 5500 int align = bfd_get_section_alignment (stdoutput, seg);
5501
5502 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5503#endif
252b5132
RH		 5504}
5505
5506/* We don't have any form of relaxing. */
5507
5508int
98027b10
AM		 5509md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5510 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5511{
5512 abort ();
5513 return 0;
5514}
5515
5516/* Convert a machine dependent frag. We never generate these. */
5517
5518void
98027b10
AM		 5519md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5520 asection *sec ATTRIBUTE_UNUSED,
5521 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 5522{
5523 abort ();
5524}
5525
5526/* We have no need to default values of symbols. */
5527
252b5132 5528symbolS *
98027b10 5529md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 5530{
5531 return 0;
5532}
5533\f
5534/* Functions concerning relocs. */
5535
5536/* The location from which a PC relative jump should be calculated,
5537 given a PC relative reloc. */
5538
5539long
98027b10 5540md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 5541{
5542 return fixp->fx_frag->fr_address + fixp->fx_where;
5543}
5544
5545#ifdef OBJ_XCOFF
5546
5547/* This is called to see whether a fixup should be adjusted to use a
5548 section symbol. We take the opportunity to change a fixup against
5549 a symbol in the TOC subsegment into a reloc against the
5550 corresponding .tc symbol. */
5551
5552int
98027b10 5553ppc_fix_adjustable (fixS *fix)
252b5132 5554{
b782de16
AM		 5555 valueT val = resolve_symbol_value (fix->fx_addsy);
5556 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5557 TC_SYMFIELD_TYPE *tc;
5558
5559 if (symseg == absolute_section)
5560 return 0;
252b5132 5561
252b5132 5562 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5563 && fix->fx_addsy != ppc_toc_csect
b782de16 5564 && symseg == data_section
252b5132
RH		 5565 && val >= ppc_toc_frag->fr_address
5566 && (ppc_after_toc_frag == (fragS *) NULL
5567 || val < ppc_after_toc_frag->fr_address))
5568 {
5569 symbolS *sy;
5570
5571 for (sy = symbol_next (ppc_toc_csect);
5572 sy != (symbolS *) NULL;
5573 sy = symbol_next (sy))
5574 {
b782de16
AM		 5575 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5576
96d56e9f 5577 if (sy_tc->symbol_class == XMC_TC0)
252b5132 5578 continue;
96d56e9f 5579 if (sy_tc->symbol_class != XMC_TC)
252b5132 5580 break;
b782de16 5581 if (val == resolve_symbol_value (sy))
252b5132
RH		 5582 {
5583 fix->fx_addsy = sy;
5584 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5585 return 0;
5586 }
5587 }
5588
5589 as_bad_where (fix->fx_file, fix->fx_line,
5590 _("symbol in .toc does not match any .tc"));
5591 }
5592
5593 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5594 tc = symbol_get_tc (fix->fx_addsy);
5595 if (tc->subseg == 0
96d56e9f
NC		 5596 && tc->symbol_class != XMC_TC0
5597 && tc->symbol_class != XMC_TC
b782de16 5598 && symseg != bss_section
252b5132 5599 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5600 && (symseg != data_section
252b5132
RH		 5601 || ppc_toc_csect == NULL
5602 || val < ppc_toc_frag->fr_address
5603 || (ppc_after_toc_frag != NULL
5604 && val >= ppc_after_toc_frag->fr_address)))
5605 {
5606 symbolS *csect;
b782de16 5607 symbolS *next_csect;
252b5132 5608
b782de16 5609 if (symseg == text_section)
252b5132 5610 csect = ppc_text_csects;
b782de16 5611 else if (symseg == data_section)
252b5132
RH		 5612 csect = ppc_data_csects;
5613 else
5614 abort ();
5615
5616 /* Skip the initial dummy symbol. */
809ffe0d 5617 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5618
5619 if (csect != (symbolS *) NULL)
5620 {
b782de16
AM		 5621 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5622 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5623 {
5624 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5625 have to look through the full symbol table to see
5626 whether this is the csect we want. Note that we will
5627 only get here if the csect has zero length. */
b782de16
AM		 5628 if (symbol_get_frag (csect)->fr_address == val
5629 && S_GET_VALUE (csect) == val)
252b5132
RH		 5630 {
5631 symbolS *scan;
5632
809ffe0d 5633 for (scan = symbol_next (csect);
252b5132 5634 scan != NULL;
809ffe0d 5635 scan = symbol_next (scan))
252b5132 5636 {
809ffe0d 5637 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5638 break;
5639 if (scan == fix->fx_addsy)
5640 break;
5641 }
5642
5643 /* If we found the symbol before the next csect
99a814a1 5644 symbol, then this is the csect we want. */
252b5132
RH		 5645 if (scan == fix->fx_addsy)
5646 break;
5647 }
5648
b782de16 5649 csect = next_csect;
252b5132
RH		 5650 }
5651
b782de16 5652 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5653 fix->fx_addsy = csect;
5654 }
b782de16 5655 return 0;
252b5132
RH		 5656 }
5657
5658 /* Adjust a reloc against a .lcomm symbol to be against the base
5659 .lcomm. */
b782de16 5660 if (symseg == bss_section
252b5132
RH		 5661 && ! S_IS_EXTERNAL (fix->fx_addsy))
5662 {
b782de16
AM		 5663 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5664
5665 fix->fx_offset += val - resolve_symbol_value (sy);
5666 fix->fx_addsy = sy;
252b5132
RH		 5667 }
5668
5669 return 0;
5670}
5671
5672/* A reloc from one csect to another must be kept. The assembler
5673 will, of course, keep relocs between sections, and it will keep
5674 absolute relocs, but we need to force it to keep PC relative relocs
5675 between two csects in the same section. */
5676
5677int
98027b10 5678ppc_force_relocation (fixS *fix)
252b5132
RH		 5679{
5680 /* At this point fix->fx_addsy should already have been converted to
5681 a csect symbol. If the csect does not include the fragment, then
5682 we need to force the relocation. */
5683 if (fix->fx_pcrel
5684 && fix->fx_addsy != NULL
809ffe0d
ILT		 5685 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5686 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5687 > fix->fx_frag->fr_address)
5688 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5689 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5690 <= fix->fx_frag->fr_address))))
5691 return 1;
5692
ae6063d4 5693 return generic_force_reloc (fix);
252b5132
RH		 5694}
5695
5696#endif /* OBJ_XCOFF */
5697
0baf16f2 5698#ifdef OBJ_ELF
a161fe53
AM		 5699/* If this function returns non-zero, it guarantees that a relocation
5700 will be emitted for a fixup. */
5701
5702int
98027b10 5703ppc_force_relocation (fixS *fix)
a161fe53
AM		 5704{
5705 /* Branch prediction relocations must force a relocation, as must
5706 the vtable description relocs. */
5707 switch (fix->fx_r_type)
5708 {
5709 case BFD_RELOC_PPC_B16_BRTAKEN:
5710 case BFD_RELOC_PPC_B16_BRNTAKEN:
5711 case BFD_RELOC_PPC_BA16_BRTAKEN:
5712 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5713 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5714 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5715 return 1;
5716 default:
5717 break;
5718 }
5719
cdba85ec
AM		 5720 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5721 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5722 return 1;
5723
ae6063d4 5724 return generic_force_reloc (fix);
a161fe53
AM		 5725}
5726
0baf16f2 5727int
98027b10 5728ppc_fix_adjustable (fixS *fix)
252b5132 5729{
0baf16f2
AM		 5730 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5731 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5732 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5733 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5734 && fix->fx_r_type != BFD_RELOC_GPREL16
5735 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5736 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5737 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5738 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5739}
0baf16f2 5740#endif
252b5132 5741
3aeeedbb
AM		 5742/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5743 rs_align_code frag. */
5744
5745void
5746ppc_handle_align (struct frag *fragP)
5747{
5748 valueT count = (fragP->fr_next->fr_address
5749 - (fragP->fr_address + fragP->fr_fix));
5750
5751 if (count != 0 && (count & 3) == 0)
5752 {
5753 char *dest = fragP->fr_literal + fragP->fr_fix;
5754
5755 fragP->fr_var = 4;
5756 md_number_to_chars (dest, 0x60000000, 4);
5757
42240548
PB		 5758 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
5759 || (ppc_cpu & PPC_OPCODE_POWER7) != 0)
3aeeedbb 5760 {
42240548
PB		 5761 /* For power6 and power7, we want the last nop to be a group
5762 terminating one. Do this by inserting an rs_fill frag immediately
5763 after this one, with its address set to the last nop location.
5764 This will automatically reduce the number of nops in the current
5765 frag by one. */
3aeeedbb
AM		 5766 if (count > 4)
5767 {
5768 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5769
5770 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5771 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5772 group_nop->fr_fix = 0;
5773 group_nop->fr_offset = 1;
5774 group_nop->fr_type = rs_fill;
5775 fragP->fr_next = group_nop;
5776 dest = group_nop->fr_literal;
5777 }
5778
42240548
PB		 5779 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0)
5780 /* power7 group terminating nop: "ori 2,2,0". */
5781 md_number_to_chars (dest, 0x60420000, 4);
5782 else
5783 /* power6 group terminating nop: "ori 1,1,0". */
5784 md_number_to_chars (dest, 0x60210000, 4);
3aeeedbb
AM		 5785 }
5786 }
5787}
5788
252b5132
RH		 5789/* Apply a fixup to the object code. This is called for all the
5790 fixups we generated by the call to fix_new_exp, above. In the call
5791 above we used a reloc code which was the largest legal reloc code
5792 plus the operand index. Here we undo that to recover the operand
5793 index. At this point all symbol values should be fully resolved,
5794 and we attempt to completely resolve the reloc. If we can not do
5795 that, we determine the correct reloc code and put it back in the
5796 fixup. */
5797
94f592af 5798void
98027b10 5799md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 5800{
94f592af 5801 valueT value = * valP;
252b5132
RH		 5802
5803#ifdef OBJ_ELF
94f592af 5804 if (fixP->fx_addsy != NULL)
252b5132 5805 {
a161fe53 5806 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5807 if (fixP->fx_pcrel)
5808 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5809 }
5810 else
94f592af 5811 fixP->fx_done = 1;
252b5132 5812#else
a161fe53 5813 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5814 the symbol values. If we are doing this relocation the code in
5815 write.c is going to call bfd_install_relocation, which is also
5816 going to use the symbol value. That means that if the reloc is
5817 fully resolved we want to use *valP since bfd_install_relocation is
5818 not being used.
9f0eb232
RS		 5819 However, if the reloc is not fully resolved we do not want to
5820 use *valP, and must use fx_offset instead. If the relocation
5821 is PC-relative, we then need to re-apply md_pcrel_from_section
5822 to this new relocation value. */
94f592af
NC		 5823 if (fixP->fx_addsy == (symbolS *) NULL)
5824 fixP->fx_done = 1;
5825
252b5132 5826 else
9f0eb232
RS		 5827 {
5828 value = fixP->fx_offset;
5829 if (fixP->fx_pcrel)
5830 value -= md_pcrel_from_section (fixP, seg);
5831 }
a161fe53
AM		 5832#endif
5833
5834 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5835 {
a161fe53
AM		 5836 /* We can't actually support subtracting a symbol. */
5837 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5838 }
252b5132 5839
94f592af 5840 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5841 {
5842 int opindex;
5843 const struct powerpc_operand *operand;
5844 char *where;
5845 unsigned long insn;
5846
94f592af 5847 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5848
5849 operand = &powerpc_operands[opindex];
5850
5851#ifdef OBJ_XCOFF
0baf16f2
AM		 5852 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5853 does not generate a reloc. It uses the offset of `sym' within its
5854 csect. Other usages, such as `.long sym', generate relocs. This
5855 is the documented behaviour of non-TOC symbols. */
252b5132 5856 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5857 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 5858 && operand->shift == 0
2b3c4602 5859 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5860 && fixP->fx_addsy != NULL
5861 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
96d56e9f
NC		 5862 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
5863 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
94f592af 5864 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5865 {
94f592af
NC		 5866 value = fixP->fx_offset;
5867 fixP->fx_done = 1;
252b5132
RH		 5868 }
5869#endif
5870
5871 /* Fetch the instruction, insert the fully resolved operand
5872 value, and stuff the instruction back again. */
94f592af 5873 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5874 if (target_big_endian)
5875 insn = bfd_getb32 ((unsigned char *) where);
5876 else
5877 insn = bfd_getl32 ((unsigned char *) where);
5878 insn = ppc_insert_operand (insn, operand, (offsetT) value,
783de163 5879 fixP->tc_fix_data.ppc_cpu,
94f592af 5880 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5881 if (target_big_endian)
5882 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5883 else
5884 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5885
94f592af
NC		 5886 if (fixP->fx_done)
5887 /* Nothing else to do here. */
5888 return;
252b5132 5889
9c2799c2 5890 gas_assert (fixP->fx_addsy != NULL);
0baf16f2 5891
252b5132
RH		 5892 /* Determine a BFD reloc value based on the operand information.
5893 We are only prepared to turn a few of the operands into
0baf16f2 5894 relocs. */
11b37b7b 5895 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5896 && operand->bitm == 0x3fffffc
11b37b7b 5897 && operand->shift == 0)
94f592af 5898 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 5899 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5900 && operand->bitm == 0xfffc
11b37b7b 5901 && operand->shift == 0)
95210096
AM		 5902 {
5903 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5904#ifdef OBJ_XCOFF
5905 fixP->fx_size = 2;
5906 if (target_big_endian)
5907 fixP->fx_where += 2;
5908#endif
5909 }
11b37b7b 5910 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5911 && operand->bitm == 0x3fffffc
11b37b7b 5912 && operand->shift == 0)
94f592af 5913 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 5914 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5915 && operand->bitm == 0xfffc
11b37b7b 5916 && operand->shift == 0)
95210096
AM		 5917 {
5918 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5919#ifdef OBJ_XCOFF
5920 fixP->fx_size = 2;
5921 if (target_big_endian)
5922 fixP->fx_where += 2;
5923#endif
5924 }
0baf16f2 5925#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 5926 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5927 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 5928 && operand->shift == 0)
11b37b7b 5929 {
a7fc733f
AM		 5930 if (ppc_is_toc_sym (fixP->fx_addsy))
5931 {
5932 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5933#ifdef OBJ_ELF
a7fc733f
AM		 5934 if (ppc_obj64
5935 && (operand->flags & PPC_OPERAND_DS) != 0)
5936 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5937#endif
5938 }
5939 else
5940 {
5941 fixP->fx_r_type = BFD_RELOC_16;
5942#ifdef OBJ_ELF
5943 if (ppc_obj64
5944 && (operand->flags & PPC_OPERAND_DS) != 0)
5945 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5946#endif
a7fc733f 5947 }
94f592af 5948 fixP->fx_size = 2;
11b37b7b 5949 if (target_big_endian)
94f592af 5950 fixP->fx_where += 2;
11b37b7b 5951 }
0baf16f2 5952#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5953 else
252b5132
RH		 5954 {
5955 char *sfile;
5956 unsigned int sline;
5957
5958 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5959 symbol. */
94f592af
NC		 5960 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5961 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5962 _("unresolved expression that must be resolved"));
5963 else
94f592af 5964 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5965 _("unsupported relocation against %s"),
94f592af
NC		 5966 S_GET_NAME (fixP->fx_addsy));
5967 fixP->fx_done = 1;
5968 return;
252b5132
RH		 5969 }
5970 }
5971 else
5972 {
5973#ifdef OBJ_ELF
94f592af 5974 ppc_elf_validate_fix (fixP, seg);
252b5132 5975#endif
94f592af 5976 switch (fixP->fx_r_type)
252b5132 5977 {
252b5132 5978 case BFD_RELOC_CTOR:
2b3c4602 5979 if (ppc_obj64)
9c7977b3
AM		 5980 goto ctor64;
5981 /* fall through */
5982
0baf16f2 5983 case BFD_RELOC_32:
94f592af
NC		 5984 if (fixP->fx_pcrel)
5985 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5986 /* fall through */
252b5132
RH		 5987
5988 case BFD_RELOC_RVA:
5989 case BFD_RELOC_32_PCREL:
252b5132 5990 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5991 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5992 value, 4);
5993 break;
5994
7f6d05e8 5995 case BFD_RELOC_64:
9c7977b3 5996 ctor64:
94f592af
NC		 5997 if (fixP->fx_pcrel)
5998 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5999 /* fall through */
0baf16f2 6000
7f6d05e8 6001 case BFD_RELOC_64_PCREL:
94f592af 6002 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 6003 value, 8);
81d4177b 6004 break;
0baf16f2 6005
252b5132
RH		 6006 case BFD_RELOC_GPREL16:
6007 case BFD_RELOC_16_GOT_PCREL:
6008 case BFD_RELOC_16_GOTOFF:
6009 case BFD_RELOC_LO16_GOTOFF:
6010 case BFD_RELOC_HI16_GOTOFF:
6011 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 6012 case BFD_RELOC_16_BASEREL:
252b5132
RH		 6013 case BFD_RELOC_LO16_BASEREL:
6014 case BFD_RELOC_HI16_BASEREL:
6015 case BFD_RELOC_HI16_S_BASEREL:
6016 case BFD_RELOC_PPC_EMB_NADDR16:
6017 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6018 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6019 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6020 case BFD_RELOC_PPC_EMB_SDAI16:
6021 case BFD_RELOC_PPC_EMB_SDA2REL:
6022 case BFD_RELOC_PPC_EMB_SDA2I16:
6023 case BFD_RELOC_PPC_EMB_RELSEC16:
6024 case BFD_RELOC_PPC_EMB_RELST_LO:
6025 case BFD_RELOC_PPC_EMB_RELST_HI:
6026 case BFD_RELOC_PPC_EMB_RELST_HA:
6027 case BFD_RELOC_PPC_EMB_RELSDA:
6028 case BFD_RELOC_PPC_TOC16:
0baf16f2 6029#ifdef OBJ_ELF
0baf16f2
AM		 6030 case BFD_RELOC_PPC64_TOC16_LO:
6031 case BFD_RELOC_PPC64_TOC16_HI:
6032 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 6033#endif
94f592af 6034 if (fixP->fx_pcrel)
252b5132 6035 {
94f592af
NC		 6036 if (fixP->fx_addsy != NULL)
6037 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 6038 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 6039 bfd_get_reloc_code_name (fixP->fx_r_type),
6040 S_GET_NAME (fixP->fx_addsy));
252b5132 6041 else
94f592af 6042 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 6043 _("cannot emit PC relative %s relocation"),
94f592af 6044 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 6045 }
6046
94f592af 6047 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 6048 value, 2);
6049 break;
6050
3c9d25f4
AM		 6051 case BFD_RELOC_16:
6052 if (fixP->fx_pcrel)
6053 fixP->fx_r_type = BFD_RELOC_16_PCREL;
6054 /* fall through */
6055
6056 case BFD_RELOC_16_PCREL:
6057 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6058 value, 2);
6059 break;
6060
6061 case BFD_RELOC_LO16:
6062 if (fixP->fx_pcrel)
6063 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6064 /* fall through */
6065
6066 case BFD_RELOC_LO16_PCREL:
6067 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6068 value, 2);
6069 break;
6070
252b5132
RH		 6071 /* This case happens when you write, for example,
6072 lis %r3,(L1-L2)@ha
6073 where L1 and L2 are defined later. */
6074 case BFD_RELOC_HI16:
94f592af 6075 if (fixP->fx_pcrel)
3c9d25f4
AM		 6076 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6077 /* fall through */
6078
6079 case BFD_RELOC_HI16_PCREL:
94f592af 6080 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6081 PPC_HI (value), 2);
252b5132 6082 break;
0baf16f2 6083
252b5132 6084 case BFD_RELOC_HI16_S:
94f592af 6085 if (fixP->fx_pcrel)
3c9d25f4
AM		 6086 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6087 /* fall through */
6088
6089 case BFD_RELOC_HI16_S_PCREL:
94f592af 6090 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6091 PPC_HA (value), 2);
6092 break;
6093
c865e45b
RS		 6094#ifdef OBJ_XCOFF
6095 case BFD_RELOC_NONE:
6096 break;
6097#endif
6098
0baf16f2 6099#ifdef OBJ_ELF
0baf16f2 6100 case BFD_RELOC_PPC64_HIGHER:
94f592af 6101 if (fixP->fx_pcrel)
0baf16f2 6102 abort ();
94f592af 6103 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6104 PPC_HIGHER (value), 2);
252b5132
RH		 6105 break;
6106
0baf16f2 6107 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 6108 if (fixP->fx_pcrel)
0baf16f2 6109 abort ();
94f592af 6110 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6111 PPC_HIGHERA (value), 2);
6112 break;
6113
6114 case BFD_RELOC_PPC64_HIGHEST:
94f592af 6115 if (fixP->fx_pcrel)
0baf16f2 6116 abort ();
94f592af 6117 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6118 PPC_HIGHEST (value), 2);
6119 break;
6120
6121 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 6122 if (fixP->fx_pcrel)
0baf16f2 6123 abort ();
94f592af 6124 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6125 PPC_HIGHESTA (value), 2);
6126 break;
6127
6128 case BFD_RELOC_PPC64_ADDR16_DS:
6129 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6130 case BFD_RELOC_PPC64_GOT16_DS:
6131 case BFD_RELOC_PPC64_GOT16_LO_DS:
6132 case BFD_RELOC_PPC64_PLT16_LO_DS:
6133 case BFD_RELOC_PPC64_SECTOFF_DS:
6134 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6135 case BFD_RELOC_PPC64_TOC16_DS:
6136 case BFD_RELOC_PPC64_TOC16_LO_DS:
6137 case BFD_RELOC_PPC64_PLTGOT16_DS:
6138 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 6139 if (fixP->fx_pcrel)
0baf16f2
AM		 6140 abort ();
6141 {
2132e3a3 6142 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 6143 unsigned long val, mask;
0baf16f2
AM		 6144
6145 if (target_big_endian)
adadcc0c 6146 val = bfd_getb32 (where - 2);
0baf16f2 6147 else
adadcc0c
AM		 6148 val = bfd_getl32 (where);
6149 mask = 0xfffc;
6150 /* lq insns reserve the four lsbs. */
6151 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 6152 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 6153 mask = 0xfff0;
6154 val |= value & mask;
0baf16f2
AM		 6155 if (target_big_endian)
6156 bfd_putb16 ((bfd_vma) val, where);
6157 else
6158 bfd_putl16 ((bfd_vma) val, where);
6159 }
6160 break;
cdba85ec 6161
ba0b2174
AM		 6162 case BFD_RELOC_PPC_B16_BRTAKEN:
6163 case BFD_RELOC_PPC_B16_BRNTAKEN:
6164 case BFD_RELOC_PPC_BA16_BRTAKEN:
6165 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6166 break;
6167
cdba85ec 6168 case BFD_RELOC_PPC_TLS:
727fc41e
AM		 6169 case BFD_RELOC_PPC_TLSGD:
6170 case BFD_RELOC_PPC_TLSLD:
7c1d0959
L		 6171 break;
6172
cdba85ec
AM		 6173 case BFD_RELOC_PPC_DTPMOD:
6174 case BFD_RELOC_PPC_TPREL16:
6175 case BFD_RELOC_PPC_TPREL16_LO:
6176 case BFD_RELOC_PPC_TPREL16_HI:
6177 case BFD_RELOC_PPC_TPREL16_HA:
6178 case BFD_RELOC_PPC_TPREL:
6179 case BFD_RELOC_PPC_DTPREL16:
6180 case BFD_RELOC_PPC_DTPREL16_LO:
6181 case BFD_RELOC_PPC_DTPREL16_HI:
6182 case BFD_RELOC_PPC_DTPREL16_HA:
6183 case BFD_RELOC_PPC_DTPREL:
6184 case BFD_RELOC_PPC_GOT_TLSGD16:
6185 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6186 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6187 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6188 case BFD_RELOC_PPC_GOT_TLSLD16:
6189 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6190 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6191 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6192 case BFD_RELOC_PPC_GOT_TPREL16:
6193 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6194 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6195 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6196 case BFD_RELOC_PPC_GOT_DTPREL16:
6197 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6198 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6199 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6200 case BFD_RELOC_PPC64_TPREL16_DS:
6201 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6202 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6203 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6204 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6205 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6206 case BFD_RELOC_PPC64_DTPREL16_DS:
6207 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6208 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6209 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6210 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6211 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 6212 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 6213 break;
0baf16f2 6214#endif
252b5132 6215 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 6216 bytes, rather than 2, so offset it here appropriately. */
252b5132 6217 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 6218 if (fixP->fx_pcrel)
252b5132
RH		 6219 abort ();
6220
94f592af 6221 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 6222 + ((target_big_endian) ? 2 : 0),
6223 value, 2);
6224 break;
6225
6226 case BFD_RELOC_8:
94f592af 6227 if (fixP->fx_pcrel)
31a91399
NC		 6228 {
6229 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 6230 ".byte <undefined_symbol> - ." */
31a91399
NC		 6231 if (fixP->fx_addsy)
6232 as_bad (_("Unable to handle reference to symbol %s"),
6233 S_GET_NAME (fixP->fx_addsy));
6234 else
6235 as_bad (_("Unable to resolve expression"));
6236 fixP->fx_done = 1;
6237 }
6238 else
6239 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6240 value, 1);
252b5132
RH		 6241 break;
6242
6243 case BFD_RELOC_24_PLT_PCREL:
6244 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 6245 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 6246 abort ();
6247
94f592af 6248 if (fixP->fx_done)
99a814a1
AM		 6249 {
6250 char *where;
6251 unsigned long insn;
6252
6253 /* Fetch the instruction, insert the fully resolved operand
6254 value, and stuff the instruction back again. */
94f592af 6255 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6256 if (target_big_endian)
6257 insn = bfd_getb32 ((unsigned char *) where);
6258 else
6259 insn = bfd_getl32 ((unsigned char *) where);
6260 if ((value & 3) != 0)
94f592af 6261 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6262 _("must branch to an address a multiple of 4"));
6263 if ((offsetT) value < -0x40000000
6264 || (offsetT) value >= 0x40000000)
94f592af 6265 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6266 _("@local or @plt branch destination is too far away, %ld bytes"),
6267 (long) value);
6268 insn = insn | (value & 0x03fffffc);
6269 if (target_big_endian)
6270 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6271 else
6272 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6273 }
252b5132
RH		 6274 break;
6275
6276 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6277 fixP->fx_done = 0;
6278 if (fixP->fx_addsy
6279 && !S_IS_DEFINED (fixP->fx_addsy)
6280 && !S_IS_WEAK (fixP->fx_addsy))
6281 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6282 break;
6283
6284 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6285 fixP->fx_done = 0;
252b5132
RH		 6286 break;
6287
0baf16f2 6288#ifdef OBJ_ELF
0baf16f2
AM		 6289 /* Generated by reference to `sym@tocbase'. The sym is
6290 ignored by the linker. */
6291 case BFD_RELOC_PPC64_TOC:
94f592af 6292 fixP->fx_done = 0;
0baf16f2 6293 break;
0baf16f2 6294#endif
252b5132 6295 default:
bc805888 6296 fprintf (stderr,
94f592af 6297 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6298 fflush (stderr);
252b5132
RH		 6299 abort ();
6300 }
6301 }
6302
6303#ifdef OBJ_ELF
94f592af 6304 fixP->fx_addnumber = value;
4e6935a6
AM		 6305
6306 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6307 from the section contents. If we are going to be emitting a reloc
6308 then the section contents are immaterial, so don't warn if they
6309 happen to overflow. Leave such warnings to ld. */
6310 if (!fixP->fx_done)
6311 fixP->fx_no_overflow = 1;
252b5132 6312#else
94f592af
NC		 6313 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6314 fixP->fx_addnumber = 0;
252b5132
RH		 6315 else
6316 {
6317#ifdef TE_PE
94f592af 6318 fixP->fx_addnumber = 0;
252b5132 6319#else
8edcbfcd
TG		 6320 /* We want to use the offset within the toc, not the actual VMA
6321 of the symbol. */
94f592af 6322 fixP->fx_addnumber =
8edcbfcd
TG		 6323 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6324 - S_GET_VALUE (ppc_toc_csect);
252b5132
RH		 6325#endif
6326 }
6327#endif
252b5132
RH		 6328}
6329
6330/* Generate a reloc for a fixup. */
6331
6332arelent *
98027b10 6333tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6334{
6335 arelent *reloc;
6336
6337 reloc = (arelent *) xmalloc (sizeof (arelent));
6338
49309057
ILT		 6339 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6340 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6341 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6342 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6343 if (reloc->howto == (reloc_howto_type *) NULL)
6344 {
6345 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6346 _("reloc %d not supported by object file format"),
6347 (int) fixp->fx_r_type);
252b5132
RH		 6348 return NULL;
6349 }
6350 reloc->addend = fixp->fx_addnumber;
6351
6352 return reloc;
6353}
75e21f08
JJ		 6354
6355void
98027b10 6356ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6357{
6358 cfi_add_CFA_def_cfa (1, 0);
6359}
6360
6361int
1df69f4f 6362tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6363{
6364 unsigned int regnum = -1;
6365 unsigned int i;
6366 const char *p;
6367 char *q;
6368 static struct { char *name; int dw2regnum; } regnames[] =
6369 {
6370 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6371 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6372 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6373 { "spe_acc", 111 }, { "spefscr", 112 }
6374 };
6375
6376 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6377 if (strcmp (regnames[i].name, regname) == 0)
6378 return regnames[i].dw2regnum;
6379
6380 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6381 {
6382 p = regname + 1 + (regname[1] == '.');
6383 regnum = strtoul (p, &q, 10);
6384 if (p == q || *q || regnum >= 32)
6385 return -1;
6386 if (regname[0] == 'f')
b7d7dc63 6387 regnum += 32;
75e21f08 6388 else if (regname[0] == 'v')
b7d7dc63 6389 regnum += 77;
75e21f08
JJ		 6390 }
6391 else if (regname[0] == 'c' && regname[1] == 'r')
6392 {
6393 p = regname + 2 + (regname[2] == '.');
6394 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6395 return -1;
75e21f08
JJ		 6396 regnum = p[0] - '0' + 68;
6397 }
6398 return regnum;
6399}
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