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Commit | Line | Data |
---|---|---|
831b02f6 NC |
1 | .text |
2 | # Prefixes | |
3 | # O16 A32 OV REX OPCODE ; NOTES | |
4 | ||
5 | # CALL | |
6 | CALLq *(%r8) # -- -- -- 41 FF 10 ; REX to access upper reg. | |
7 | CALLq *(%rax) # -- -- -- -- FF 10 | |
8 | CALLq *(%r8) # -- -- -- 41 FF 10 ; REX to access upper reg. | |
9 | CALLq *(%rax) # -- -- -- -- FF 10 | |
858bc62d AJ |
10 | |
11 | # RET | |
873494c8 JB |
12 | lretl # -- -- -- -- CB |
13 | lretq # -- -- -- 48 CB | |
831b02f6 | 14 | retq # -- -- -- -- C3 |
858bc62d AJ |
15 | |
16 | # IRET | |
873494c8 | 17 | IRETL # -- -- -- -- CF ; 32-bit operand size |
831b02f6 NC |
18 | IRETW # 66 -- -- -- CF ; O16 for 16-bit operand size |
19 | IRETQ # -- -- -- 48 CF ; REX for 64-bit operand size | |
858bc62d AJ |
20 | |
21 | # CMP | |
22 | ||
23 | # MOV | |
4cc91dba L |
24 | MOVw %cs,(%r8) # -- -- -- 41 8C 08 ; REX to access upper reg. |
25 | MOVw %cs,(%rax) # -- -- -- -- 8C 08 | |
26 | MOVw %ss,(%r8) # -- -- -- 41 8C 10 ; REX to access upper reg. | |
27 | MOVw %ss,(%rax) # -- -- -- -- 8C 10 | |
28 | MOVw %fs,(%r8) # -- -- -- 41 8C 20 ; REX to access upper reg. | |
29 | MOVw %fs,(%rax) # -- -- -- -- 8C 20 | |
30 | MOVw (%r8),%ss # -- -- -- 41 8E 10 ; REX to access upper reg. | |
31 | MOVw (%rax),%ss # -- -- -- -- 8E 10 | |
32 | MOVw (%r8),%fs # -- -- -- 41 8E 20 ; REX to access upper reg. | |
33 | MOVw (%rax),%fs # -- -- -- -- 8E 20 | |
831b02f6 NC |
34 | MOVb $0,(%r8) # -- -- -- 41 C6 00 00 ; REX to access upper reg. |
35 | MOVb $0,(%rax) # -- -- -- -- C6 00 00 | |
858bc62d AJ |
36 | MOVw $0x7000,(%r8) # 66 -- -- 41 C7 00 00 70 ; REX to access upper reg. O16 for 16-bit operand size |
37 | MOVw $0x7000,(%rax) # 66 -- -- -- C7 00 00 70 ; O16 for 16-bit operand size | |
38 | MOVl $0x70000000,(%r8) # -- -- -- 41 C7 00 00 00 00 70 ; REX to access upper reg. | |
39 | MOVl $0x70000000,(%rax) # -- -- -- -- C7 00 00 00 00 70 | |
40 | MOVb $0,(%r8) # -- -- -- 41 C6 00 00 ; REX to access upper reg. | |
41 | MOVb $0,(%rax) # -- -- -- -- C6 00 00 | |
831b02f6 NC |
42 | MOVw $0x7000,(%r8) # 66 -- -- -- 41 C7 00 00 70 ; O16 for 16-bit operand size |
43 | MOVw $0x7000,(%rax) # 66 -- -- -- C7 00 00 70 ; O16 for 16-bit operand size | |
44 | MOVl $0x70000000,(%rax) # -- -- -- -- C7 00 00 00 00 70 | |
45 | MOVb $0,(%r8) # -- -- -- 41 C6 00 00 ; REX to access upper reg. | |
46 | MOVb $0,(%rax) # -- -- -- -- C6 00 00 | |
47 | MOVw $0x7000,(%r8) # 66 -- -- 41 C7 00 00 70 ; REX to access upper reg. O16 for 16-bit operand size | |
48 | MOVw $0x7000,(%rax) # 66 -- -- -- C7 00 00 70 ; O16 for 16-bit operand size | |
49 | MOVl $0x70000000,(%r8) # -- -- -- 41 C7 00 00 00 00 70 ; REX to access upper reg. | |
50 | MOVl $0x70000000,(%rax) # -- -- -- -- C7 00 00 00 00 70 | |
858bc62d AJ |
51 | MOVq $0x70000000,(%r8) # -- -- -- 49 C7 00 00 00 00 70 ; REX for 64-bit operand size. REX to access upper reg. |
52 | MOVq $0x70000000,(%rax) # -- -- -- 48 C7 00 00 00 00 70 ; REX for 64-bit operand size | |
53 | ||
0ba59a29 JB |
54 | # LFS etc |
55 | LFS (%rax), %ecx # -- -- -- -- 0F B4 .. | |
56 | LFSl (%rcx), %eax # -- -- -- -- 0F B4 .. | |
57 | LFS (%rax), %cx # 66 -- -- -- 0F B4 .. | |
58 | LFSw (%rcx), %ax # 66 -- -- -- 0F B4 .. | |
59 | LGS (%rcx), %edx # -- -- -- -- 0F B5 .. | |
60 | LGSl (%rdx), %ecx # -- -- -- -- 0F B5 .. | |
61 | LGS (%rcx), %dx # 66 -- -- -- 0F B5 .. | |
62 | LGSw (%rdx), %cx # 66 -- -- -- 0F B5 .. | |
63 | LSS (%rdx), %ebx # -- -- -- -- 0F B2 .. | |
64 | LSSl (%rbx), %edx # -- -- -- -- 0F B2 .. | |
65 | LSS (%rdx), %bx # 66 -- -- -- 0F B2 .. | |
66 | LSSw (%rbx), %dx # 66 -- -- -- 0F B2 .. | |
67 | ||
858bc62d | 68 | # MOVNTI |
831b02f6 NC |
69 | MOVNTI %eax,(%r8) # -- -- -- 41 0f c3 00 ; REX to access upper reg. |
70 | MOVNTI %eax,(%rax) # -- -- -- -- 0f c3 00 | |
71 | MOVNTI %rax,(%r8) # -- -- -- 49 0F C3 00 ; REX to access upper reg. REX for 64-bit operand size | |
72 | MOVNTI %rax,(%rax) # -- -- -- 48 0F C3 00 ; REX for 64-bit operand size. REX to access upper reg. | |
73 | MOVNTI %r8,(%r8) # -- -- -- 4D 0F C3 00 ; REX to access upper reg. REX for 64-bit operand size | |
74 | MOVNTI %r8,(%rax) # -- -- -- 4C 0F C3 00 ; REX to access upper reg. REX for 64-bit operand size | |
75 | ||
76 | # Conditionals | |
77 | ||
78 | # LOOP | |
5f77db52 JB |
79 | LOOP . # -- -- -- -- E2 FE ; RCX used as counter. |
80 | LOOPq . # -- -- -- -- E2 FE ; RCX used as counter. | |
81 | LOOPl . # -- 67 -- -- E2 FD ; ECX used as counter. | |
831b02f6 NC |
82 | |
83 | ||
84 | # Jcc | |
5f77db52 JB |
85 | # 66 -- -- -- 77 FD ; O16 override: (Addr64) = ZEXT(Addr16) |
86 | # 66 -- -- -- 0F 87 F9 FF FF FF ; O16 override: (Addr64) = ZEXT(Addr16) | |
831b02f6 NC |
87 | |
88 | # J*CXZ | |
5f77db52 JB |
89 | JRCXZ . # -- -- -- -- E3 FE ; RCX used as counter. |
90 | JECXZ . # -- 67 -- -- E3 FD ; ECX used as counter. | |
831b02f6 NC |
91 | |
92 | ||
93 | ||
94 | # Integer | |
95 | ||
96 | # IDIV | |
97 | ||
98 | IDIVb (%r8) # -- -- -- 41 F6 38 ; Sign extended result. REX to access upper reg. | |
99 | IDIVb (%rax) # -- -- -- -- F6 38 ; Sign extended result | |
100 | IDIVw (%r8) # 66 -- -- 41 F7 38 ; Sign extended result. REX to access upper reg. O16 for 16-bit | |
101 | IDIVw (%rax) # 66 -- -- -- F7 38 ; Sign extended result. O16 for 16-bit operand size | |
102 | IDIVl (%r8) # -- -- -- 41 F7 38 ; Sign extended result. REX to access upper reg | |
103 | IDIVl (%rax) # -- -- -- -- F7 38 ; Sign extended result | |
104 | IDIVq (%r8) # -- -- -- 49 F7 38 ; Sign extended result. REX for 64-bit operand size. REX to access u | |
105 | IDIVq (%rax) # -- -- -- 48 F7 38 ; Sign extended result. REX for 64-bit operand size | |
106 | ||
107 | # IMUL | |
108 | IMULb (%r8) # -- -- -- 41 F6 28 ; Sign extended result. REX to access upper reg | |
109 | IMULb (%rax) # -- -- -- -- F6 28 ; Sign extended result | |
110 | IMULw (%r8) # 66 -- -- 41 F7 28 ; Sign extended result. O16 for 16-bit operand size. REX to access | |
111 | IMULw (%rax) # 66 -- -- -- F7 28 ; Sign extended result. O16 for 16-bit operand size | |
112 | IMULl (%r8) # -- -- -- 41 F7 28 ; Sign extended result. REX to access upper reg | |
113 | IMULl (%rax) # -- -- -- -- F7 28 ; Sign extended result | |
114 | IMULq (%r8) # -- -- -- 49 F7 28 ; Sign extended result. REX for 64-bit operand size. REX to access u | |
115 | IMULq (%rax) # -- -- -- 48 F7 28 ; Sign extended result. REX for 64-bit operand size | |
116 | ||
117 | ||
118 | ||
119 | # SIMD/SSE | |
120 | ||
121 | # ADDPD | |
122 | ADDPD (%r8),%xmm0 # -- -- 66 41 0F 58 00 ; REX to access upper reg. OVR 128bit MMinstr. | |
123 | ADDPD (%rax),%xmm0 # -- -- 66 -- 0F 58 00 ; OVR 128bit MMinstr. | |
124 | ADDPD (%r8),%xmm15 # -- -- 66 45 0F 58 38 ; REX to access upper XMM reg. REX to access upper reg. OVR 128bit MMinstr. | |
125 | ADDPD (%rax),%xmm15 # -- -- 66 44 0F 58 38 ; REX to access upper XMM reg. OVR 128bit MMinstr. | |
126 | ADDPD (%r8),%xmm8 # -- -- 66 45 0F 58 00 ; REX to access upper XMM reg. REX to access upper reg. OVR 128bit MMinstr. | |
127 | ADDPD (%rax),%xmm8 # -- -- 66 44 0F 58 00 ; REX to access upper XMM reg. OVR 128bit MMinstr. | |
128 | ADDPD (%r8),%xmm7 # -- -- 66 41 0F 58 38 ; REX to access upper reg. OVR 128bit MMinstr. | |
129 | ADDPD (%rax),%xmm7 # -- -- 66 -- 0F 58 38 ; OVR 128bit MMinstr. | |
130 | ADDPD %xmm0,%xmm0 # -- -- 66 -- 0F 58 C0 ; OVR 128bit MMinstr. | |
131 | ADDPD %xmm15,%xmm15 # -- -- 66 45 0F 58 FF ; REX to access upper XMM reg. OVR 128bit MMinstr. | |
132 | ADDPD %xmm15,%xmm8 # -- -- 66 45 0F 58 C7 ; REX to access upper XMM reg. OVR 128bit MMinstr. | |
133 | ||
134 | # CMPPD | |
858bc62d AJ |
135 | |
136 | # CVTSD2SI | |
137 | CVTSD2SIq (%r8),%rax # -- -- F2 49 0f 2d 00 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper reg. | |
138 | CVTSD2SIq (%rax),%rax # -- -- F2 48 0f 2d 00 ; OVR 128-bit media instruction override REX for 64-bit operand size | |
139 | CVTSD2SIq (%r8),%r8 # -- -- F2 4D 0f 2d 00 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper reg. | |
140 | CVTSD2SIq (%rax),%r8 # -- -- F2 4C 0f 2d 00 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper reg. | |
141 | CVTSD2SIq %xmm0,%rax # -- -- F2 48 0f 2d c0 ; OVR 128-bit media instruction override REX for 64-bit operand size | |
142 | CVTSD2SIq %xmm15,%r8 # -- -- F2 4D 0f 2d c7 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper XMM reg REX to access upper reg. | |
143 | CVTSD2SIq %xmm15,%rax # -- -- F2 49 0f 2d c7 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper XMM reg | |
144 | CVTSD2SIq %xmm8,%r8 # -- -- F2 4D 0f 2d c0 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper XMM reg REX to access upper reg. | |
145 | CVTSD2SIq %xmm8,%rax # -- -- F2 49 0f 2d c0 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper XMM reg | |
146 | CVTSD2SIq %xmm7,%r8 # -- -- F2 4C 0f 2d c7 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper reg. | |
147 | CVTSD2SIq %xmm7,%rax # -- -- F2 48 0f 2d c7 ; OVR 128-bit media instruction override REX for 64-bit operand size | |
148 | CVTSD2SIq %xmm0,%r8 # -- -- F2 4C 0f 2d c0 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper reg. | |
149 | ||
150 | # CVTTSD2SI | |
151 | CVTTSD2SIq (%r8),%rax # -- -- F2 49 0f 2c 00 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper reg. | |
152 | CVTTSD2SIq (%rax),%rax # -- -- F2 48 0f 2c 00 ; OVR 128-bit media instruction override REX for 64-bit operand size | |
153 | CVTTSD2SIq (%r8),%r8 # -- -- F2 4D 0f 2c 00 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper reg. | |
154 | CVTTSD2SIq (%rax),%r8 # -- -- F2 4C 0f 2c 00 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper reg. | |
155 | CVTTSD2SIq %xmm0,%rax # -- -- F2 48 0f 2c c0 ; OVR 128-bit media instruction override REX for 64-bit operand size | |
156 | CVTTSD2SIq %xmm15,%r8 # -- -- F2 4D 0f 2c c7 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper XMM reg REX to access upper reg. | |
157 | CVTTSD2SIq %xmm15,%rax # -- -- F2 49 0f 2c c7 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper XMM reg | |
158 | CVTTSD2SIq %xmm8,%r8 # -- -- F2 4D 0f 2c c0 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper XMM reg REX to access upper reg. | |
159 | CVTTSD2SIq %xmm8,%rax # -- -- F2 49 0f 2c c0 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper XMM reg | |
160 | CVTTSD2SIq %xmm7,%r8 # -- -- F2 4C 0f 2c c7 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper reg. | |
161 | CVTTSD2SIq %xmm7,%rax # -- -- F2 48 0f 2c c7 ; OVR 128-bit media instruction override REX for 64-bit operand size | |
162 | CVTTSD2SIq %xmm0,%r8 # -- -- F2 4C 0f 2c c0 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper reg. | |
163 | ||
164 | # CVTSS2SI | |
165 | CVTSS2SIq (%r8),%rax # -- -- F3 49 0f 2d 00 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper reg. | |
166 | CVTSS2SIq (%rax),%rax # -- -- F3 48 0f 2d 00 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size | |
167 | CVTSS2SIq (%r8),%r8 # -- -- F3 4D 0f 2d 00 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper reg. | |
168 | CVTSS2SIq (%rax),%r8 # -- -- F3 4C 0f 2d 00 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper reg. | |
169 | CVTSS2SIq %xmm0,%rax # -- -- F3 48 0f 2d c0 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size | |
170 | CVTSS2SIq %xmm15,%r8 # -- -- F3 4D 0f 2d c7 ; OVR 128-bit media instruction override Result is sign extended REX to access upper XMM reg REX to access upper reg. | |
171 | CVTSS2SIq %xmm15,%rax # -- -- F3 49 0f 2d c7 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper XMM reg | |
172 | CVTSS2SIq %xmm8,%r8 # -- -- F3 4D 0f 2d c0 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper XMM reg REX to access upper reg. | |
173 | CVTSS2SIq %xmm8,%rax # -- -- F3 49 0f 2d c0 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size | |
174 | CVTSS2SIq %xmm7,%r8 # -- -- F3 4C 0f 2d c7 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper reg. | |
175 | CVTSS2SIq %xmm7,%rax # -- -- F3 48 0f 2d c7 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size | |
176 | CVTSS2SIq %xmm0,%r8 # -- -- F3 4C 0f 2d c0 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper reg. | |
177 | ||
178 | # CVTTSS2SI | |
179 | CVTTSS2SIq (%r8),%rax # -- -- F3 49 0f 2c 00 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper reg. | |
180 | CVTTSS2SIq (%rax),%rax # -- -- F3 48 0f 2c 00 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size | |
181 | CVTTSS2SIq (%r8),%r8 # -- -- F3 4D 0f 2c 00 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper reg. | |
182 | CVTTSS2SIq (%rax),%r8 # -- -- F3 4C 0f 2c 00 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper reg. | |
183 | CVTTSS2SIq %xmm0,%rax # -- -- F3 48 0f 2c c0 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size | |
184 | CVTTSS2SIq %xmm15,%r8 # -- -- F3 4D 0f 2c c7 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper XMM reg REX to access upper reg. | |
185 | CVTTSS2SIq %xmm15,%rax # -- -- F3 49 0f 2c c7 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper XMM reg | |
186 | CVTTSS2SIq %xmm8,%r8 # -- -- F3 4D 0f 2c c0 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper XMM reg REX to access upper reg. | |
187 | CVTTSS2SIq %xmm8,%rax # -- -- F3 49 0f 2c c0 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size | |
188 | CVTTSS2SIq %xmm7,%r8 # -- -- F3 4C 0f 2c c7 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper reg. | |
189 | CVTTSS2SIq %xmm7,%rax # -- -- F3 48 0f 2c c7 ; OVR 128-bit media instruction override Result is sign extended | |
190 | CVTTSS2SIq %xmm0,%r8 # -- -- F3 4C 0f 2c c0 ; OVR 128-bit media instruction override Result is sign extended REX for 64-bit operand size REX to access upper reg. | |
191 | ||
192 | # CVTSI2SS | |
c006a730 JB |
193 | CVTSI2SSl (%r8),%xmm0 # -- -- F3 41 0f 2a 00 ; OVR 128-bit media instruction override REX to access upper reg. |
194 | CVTSI2SSl (%rax),%xmm0 # -- -- F3 -- 0f 2a 00 ; OVR 128-bit media instruction override | |
195 | CVTSI2SSl (%r8),%xmm15 # -- -- F3 45 0f 2a 38 ; OVR 128-bit media instruction override REX to access upper XMM reg REX to access upper reg. | |
196 | CVTSI2SSl (%rax),%xmm15 # -- -- F3 44 0f 2a 38 ; OVR 128-bit media instruction override REX to access upper XMM reg | |
197 | CVTSI2SSl (%r8),%xmm8 # -- -- F3 45 0f 2a 00 ; OVR 128-bit media instruction override REX to access upper XMM reg REX to access upper reg. | |
198 | CVTSI2SSl (%rax),%xmm8 # -- -- F3 44 0f 2a 00 ; OVR 128-bit media instruction override REX to access upper XMM reg | |
199 | CVTSI2SSl (%r8),%xmm7 # -- -- F3 41 0f 2a 38 ; OVR 128-bit media instruction override REX to access upper reg. | |
200 | CVTSI2SSl (%rax),%xmm7 # -- -- F3 -- 0f 2a 38 ; OVR 128-bit media instruction override | |
858bc62d AJ |
201 | CVTSI2SS %eax,%xmm0 # -- -- F3 -- 0f 2a c0 ; OVR 128-bit media instruction override |
202 | CVTSI2SS %eax,%xmm15 # -- -- F3 44 0f 2a f8 ; OVR 128-bit media instruction override REX to access upper XMM reg | |
203 | CVTSI2SS %eax,%xmm8 # -- -- F3 44 0f 2a c0 ; OVR 128-bit media instruction override REX to access upper XMM reg | |
204 | CVTSI2SS %eax,%xmm7 # -- -- F3 -- 0f 2a f8 ; OVR 128-bit media instruction override | |
c006a730 JB |
205 | CVTSI2SSl (%r8),%xmm0 # -- -- F3 41 0f 2a 00 ; OVR 128-bit media instruction override REX to access upper reg. |
206 | CVTSI2SSl (%rax),%xmm0 # -- -- F3 -- 0f 2a 00 ; OVR 128-bit media instruction override | |
207 | CVTSI2SSl (%r8),%xmm15 # -- -- F3 45 0f 2a 38 ; OVR 128-bit media instruction override REX to access upper XMM reg REX to access upper reg. | |
208 | CVTSI2SSl (%rax),%xmm15 # -- -- F3 44 0f 2a 38 ; OVR 128-bit media instruction override REX to access upper XMM reg | |
209 | CVTSI2SSl (%r8),%xmm8 # -- -- F3 45 0f 2a 00 ; OVR 128-bit media instruction override REX to access upper XMM reg REX to access upper reg. | |
210 | CVTSI2SSl (%rax),%xmm8 # -- -- F3 44 0f 2a 00 ; OVR 128-bit media instruction override REX to access upper XMM reg | |
211 | CVTSI2SSl (%r8),%xmm7 # -- -- F3 41 0f 2a 38 ; OVR 128-bit media instruction override REX to access upper reg. | |
212 | CVTSI2SSl (%rax),%xmm7 # -- -- F3 -- 0f 2a 38 ; OVR 128-bit media instruction override | |
858bc62d | 213 | |
831b02f6 | 214 | # CVTSI2SD |
c006a730 JB |
215 | CVTSI2SDl (%r8),%xmm0 # -- -- F2 41 0F 2A 00 ; REX to access upper reg. OVR 128bit MMinstr. |
216 | CVTSI2SDl (%rax),%xmm0 # -- -- F2 -- 0F 2A 00 ; OVR 128bit MMinstr. | |
217 | CVTSI2SDl (%r8),%xmm15 # -- -- F2 45 0F 2A 38 ; REX to access upper XMM reg. REX to access upper reg. OVR 128bit MMinstr. | |
218 | CVTSI2SDl (%rax),%xmm15 # -- -- F2 44 0F 2A 38 ; REX to access upper XMM reg. OVR 128bit MMinstr. | |
219 | CVTSI2SDl (%r8),%xmm8 # -- -- F2 45 0F 2A 00 ; REX to access upper XMM reg. REX to access upper reg. OVR 128bit MMinstr. | |
220 | CVTSI2SDl (%rax),%xmm8 # -- -- F2 44 0F 2A 00 ; REX to access upper XMM reg. OVR 128bit MMinstr. | |
221 | CVTSI2SDl (%r8),%xmm7 # -- -- F2 41 0F 2A 38 ; REX to access upper reg. OVR 128bit MMinstr. | |
222 | CVTSI2SDl (%rax),%xmm7 # -- -- F2 -- 0F 2A 38 ; OVR 128bit MMinstr. | |
831b02f6 NC |
223 | CVTSI2SD %eax,%xmm0 # -- -- F2 -- 0F 2A C0 ; OVR 128bit MMinstr. |
224 | CVTSI2SD %eax,%xmm15 # -- -- F2 44 0F 2A F8 ; REX to access upper XMM reg. OVR 128bit MMinstr. | |
225 | CVTSI2SD %eax,%xmm8 # -- -- F2 44 0F 2A C0 ; REX to access upper XMM reg. OVR 128bit MMinstr. | |
226 | CVTSI2SD %eax,%xmm7 # -- -- F2 -- 0F 2A F8 ; OVR 128bit MMinstr. | |
c006a730 JB |
227 | CVTSI2SDl (%r8),%xmm0 # -- -- F2 41 0F 2A 00 ; REX to access upper reg. OVR 128bit MMinstr. |
228 | CVTSI2SDl (%rax),%xmm0 # -- -- F2 -- 0F 2A 00 ; OVR 128bit MMinstr. | |
229 | CVTSI2SDl (%r8),%xmm15 # -- -- F2 45 0F 2A 38 ; REX to access upper XMM reg. REX to access upper reg. OVR 128bit MMinstr. | |
230 | CVTSI2SDl (%rax),%xmm15 # -- -- F2 44 0F 2A 38 ; REX to access upper XMM reg. OVR 128bit MMinstr. | |
231 | CVTSI2SDl (%r8),%xmm8 # -- -- F2 45 0F 2A 00 ; REX to access upper XMM reg. REX to access upper reg. OVR 128bit MMinstr. | |
232 | CVTSI2SDl (%rax),%xmm8 # -- -- F2 44 0F 2A 00 ; REX to access upper XMM reg. OVR 128bit MMinstr. | |
233 | CVTSI2SDl (%r8),%xmm7 # -- -- F2 41 0F 2A 38 ; REX to access upper reg. OVR 128bit MMinstr. | |
234 | CVTSI2SDl (%rax),%xmm7 # -- -- F2 -- 0F 2A 38 ; OVR 128bit MMinstr. | |
831b02f6 NC |
235 | |
236 | # MOVD | |
237 | MOVD (%r8),%xmm0 # -- -- 66 41 0F 6E 00 ; REX to access upper reg. Data128 = ZEXT(Data32). OVR 128bit MMinstr. | |
238 | MOVD (%rax),%xmm0 # -- -- 66 -- 0F 6E 00 ; Data128 = ZEXT(Data32). OVR 128bit MMinstr. | |
239 | MOVD (%r8),%xmm15 # -- -- 66 45 0F 6E 38 ; REX to access upper XMM reg. REX to access upper reg. Data128 = ZEXT(Data32) | |
240 | MOVD (%rax),%xmm15 # -- -- 66 44 0F 6E 38 ; REX to access upper XMM reg. OVR 128bit MMinstr. | |
241 | MOVD (%r8),%xmm8 # -- -- 66 45 0F 6E 00 ; REX to access upper XMM reg. REX to access upper reg. Data128 = ZEXT(Data32) | |
242 | MOVD (%rax),%xmm8 # -- -- 66 44 0F 6E 00 ; REX to access upper XMM reg. Data128 = ZEXT(Data32). OVR 128bit MMinstr. | |
243 | MOVD (%r8),%xmm7 # -- -- 66 41 0F 6E 38 ; REX to access upper reg. Data128 = ZEXT(Data32). OVR 128bit MMinstr. | |
244 | MOVD (%rax),%xmm7 # -- -- 66 -- 0F 6E 38 ; Data128 = ZEXT(Data32). OVR 128bit MMinstr. | |
245 | MOVD %eax,%xmm0 # -- -- 66 -- 0F 6E C0 ; Data128 = ZEXT(Data32). OVR 128bit MMinstr. | |
246 | MOVD %eax,%xmm15 # -- -- 66 44 0F 6E F8 ; REX to access upper XMM reg. Data128 = ZEXT(Data32). OVR 128bit MMinstr. | |
247 | MOVD %eax,%xmm8 # -- -- 66 44 0F 6E C0 ; REX to access upper XMM reg. Data128 = ZEXT(Data32). OVR 128bit MMinstr. | |
248 | MOVD %eax,%xmm7 # -- -- 66 -- 0F 6E F8 ; Data128 = ZEXT(Data32). OVR 128bit MMinstr. | |
249 | MOVD %xmm0,(%r8) # -- -- 66 41 0F 7E 00 ; REX to access upper reg. OVR 128bit MMinstr. | |
250 | MOVD %xmm0,(%rax) # -- -- 66 -- 0F 7E 00 ; OVR 128bit MMinstr. | |
251 | MOVD %xmm15,(%r8) # -- -- 66 45 0F 7E 38 ; REX to access upper XMM reg. REX to access upper reg. OVR 128bit MMinstr. | |
252 | MOVD %xmm15,(%rax) # -- -- 66 44 0F 7E 38 ; REX to access upper XMM reg. OVR 128bit MMinstr. | |
253 | MOVD %xmm8,(%r8) # -- -- 66 45 0F 7E 00 ; REX to access upper XMM reg. REX to access upper reg. OVR 128bit MMinstr. | |
254 | MOVD %xmm8,(%rax) # -- -- 66 44 0F 7E 00 ; REX to access upper XMM reg. OVR 128bit MMinstr. | |
255 | MOVD %xmm7,(%r8) # -- -- 66 41 0F 7E 38 ; REX to access upper reg. OVR 128bit MMinstr. | |
256 | MOVD %xmm7,(%rax) # -- -- 66 -- 0F 7E 38 ; OVR 128bit MMinstr. | |
257 | MOVD %xmm0,%eax # -- -- 66 -- 0F 7E C0 ; OVR 128bit MMinstr. | |
258 | MOVD %xmm15,%eax # -- -- 66 44 0F 7E F8 ; REX to access upper XMM reg. OVR 128bit MMinstr. | |
259 | MOVD %xmm8,%eax # -- -- 66 44 0F 7E C0 ; REX to access upper XMM reg. OVR 128bit MMinstr. | |
260 | MOVD %xmm7,%eax # -- -- 66 -- 0F 7E F8 ; OVR 128bit MMinstr. | |
43e9b450 AM |
261 | MOVD %rax,%xmm0 # -- -- 66 48 0F 6E C0 ; Data128 = ZEXT(Data64). OVR 128bit MMinstr. REX for 64-bit operand size. |
262 | MOVD %r8,%xmm0 # -- -- 66 49 0F 6E C0 ; REX to access upper reg. Data128 = ZEXT(Data64). OVR 128bit MMinstr. REX for 64-bit operand size. | |
263 | MOVD %r8,%xmm15 # -- -- 66 4D 0F 6E F8 ; REX to access upper reg. Data128 = ZEXT(Data64). OVR 128bit MMinstr. REX for 64-bit operand size. | |
264 | MOVD %xmm0,%rax # -- -- 66 48 0F 7E C0 ; OVR 128bit MMinstr. REX for 64-bit operand size. | |
265 | MOVD %xmm0,%r8 # -- -- 66 49 0F 7E C0 ; OVR 128bit MMinstr. REX for 64-bit operand size. | |
266 | MOVD %xmm7,%r8 # -- -- 66 49 0F 7E F8 ; OVR 128bit MMinstr. REX for 64-bit operand size. | |
831b02f6 NC |
267 | |
268 | # MOVQ | |
269 | MOVQ (%r8),%xmm0 # -- -- F3 41 0F 7E 00 ; REX to access upper reg. Data128 = ZEXT(Data64). OVR 128bit MMinstr. | |
270 | MOVQ (%rax),%xmm0 # -- -- F3 -- 0F 7E 00 ; Data128 = ZEXT(Data64). OVR 128bit MMinstr. | |
271 | MOVQ (%r8),%xmm15 # -- -- F3 45 0F 7E 38 ; REX to access upper XMM reg. REX to access upper reg. Data128 = ZEXT(Data64) | |
272 | MOVQ (%rax),%xmm15 # -- -- F3 44 0F 7E 38 ; REX to access upper XMM reg. Data128 = ZEXT(Data64). OVR 128bit MMinstr. | |
273 | MOVQ (%r8),%xmm8 # -- -- F3 45 0F 7E 00 ; REX to access upper XMM reg. REX to access upper reg. Data128 = ZEXT(Data64) | |
274 | MOVQ (%rax),%xmm8 # -- -- F3 44 0F 7E 00 ; REX to access upper XMM reg. Data128 = ZEXT(Data64). OVR 128bit MMinstr. | |
275 | MOVQ (%r8),%xmm7 # -- -- F3 41 0F 7E 38 ; REX to access upper reg. Data128 = ZEXT(Data64). OVR 128bit MMinstr. | |
276 | MOVQ (%rax),%xmm7 # -- -- F3 -- 0F 7E 38 ; Data128 = ZEXT(Data64). OVR 128bit MMinstr. | |
277 | MOVQ %xmm0,%xmm0 # -- -- F3 -- 0F 7E C0 ; OVR 128bit MMinstr. | |
278 | MOVQ %xmm15,%xmm15 # -- -- F3 45 0F 7E FF ; REX to access upper XMM reg. OVR 128bit MMinstr. | |
279 | MOVQ %xmm15,%xmm8 # -- -- F3 45 0F 7E C7 ; REX to access upper XMM reg. OVR 128bit MMinstr. | |
280 | MOVQ %xmm15,%xmm7 # -- -- F3 41 0F 7E FF ; REX to access upper XMM reg. OVR 128bit MMinstr. | |
281 | MOVQ %xmm15,%xmm0 # -- -- F3 41 0F 7E C7 ; REX to access upper XMM reg. OVR 128bit MMinstr. | |
282 | MOVQ %xmm8,%xmm15 # -- -- F3 45 0F 7E F8 ; REX to access upper XMM reg. OVR 128bit MMinstr. | |
283 | MOVQ %xmm8,%xmm8 # -- -- F3 45 0F 7E C0 ; REX to access upper XMM reg. OVR 128bit MMinstr. | |
284 | MOVQ %xmm8,%xmm7 # -- -- F3 41 0F 7E F8 ; REX to access upper XMM reg. OVR 128bit MMinstr. | |
285 | MOVQ %xmm8,%xmm0 # -- -- F3 41 0F 7E C0 ; REX to access upper XMM reg. OVR 128bit MMinstr. | |
286 | MOVQ %xmm7,%xmm15 # -- -- F3 44 0F 7E FF ; REX to access upper XMM reg. OVR 128bit MMinstr. | |
287 | MOVQ %xmm7,%xmm8 # -- -- F3 44 0F 7E C7 ; REX to access upper XMM reg. OVR 128bit MMinstr. | |
288 | MOVQ %xmm7,%xmm7 # -- -- F3 -- 0F 7E FF ; OVR 128bit MMinstr. | |
289 | MOVQ %xmm7,%xmm0 # -- -- F3 -- 0F 7E C7 ; OVR 128bit MMinstr. | |
290 | MOVQ %xmm0,%xmm15 # -- -- F3 44 0F 7E F8 ; REX to access upper XMM reg. OVR 128bit MMinstr. | |
291 | MOVQ %xmm0,%xmm8 # -- -- F3 44 0F 7E C0 ; REX to access upper XMM reg. OVR 128bit MMinstr. | |
292 | MOVQ %xmm0,%xmm7 # -- -- F3 -- 0F 7E F8 ; OVR 128bit MMinstr. | |
293 | MOVQ %xmm0,(%r8) # -- -- 66 41 0F D6 00 ; REX to access upper reg. OVR 128bit MMinstr. | |
294 | MOVQ %xmm0,(%rax) # -- -- 66 -- 0F D6 00 ; OVR 128bit MMinstr. | |
295 | MOVQ %xmm15,(%r8) # -- -- 66 45 0F D6 38 ; REX to access upper reg. OVR 128bit MMinstr. | |
296 | MOVQ %xmm15,(%rax) # -- -- 66 44 0F D6 38 ; REX to access upper XMM reg. OVR 128bit MMinstr. | |
297 | MOVQ %xmm8,(%r8) # -- -- 66 45 0F D6 00 ; REX to access upper XMM reg. REX to access upper reg. OVR 128bit MMinstr. | |
298 | MOVQ %xmm8,(%rax) # -- -- 66 44 0F D6 00 ; REX to access upper XMM reg. OVR 128bit MMinstr. | |
299 | MOVQ %xmm7,(%r8) # -- -- 66 41 0F D6 38 ; REX to access upper reg. OVR 128bit MMinstr. | |
300 | ||
301 | # 64-bit MMX | |
302 | ||
303 | # CVTPD2PI | |
304 | ||
305 | # MOVD | |
306 | MOVD (%r8),%mm0 # -- -- -- 41 0F 6E 00 ; REX to access upper reg. Data64 = ZEXT(Data32) | |
307 | MOVD (%rax),%mm0 # -- -- -- -- 0F 6E 00 ; Data64 = ZEXT(Data32) | |
308 | MOVD (%r8),%mm7 # -- -- -- 41 0F 6E 38 ; REX to access upper reg. Data64 = ZEXT(Data32) | |
309 | MOVD (%rax),%mm7 # -- -- -- -- 0F 6E 38 ; Data64 = ZEXT(Data32) | |
310 | MOVD %eax,%mm0 # -- -- -- -- 0F 6E C0 ; Data64 = ZEXT(Data32) | |
311 | MOVD %eax,%mm7 # -- -- -- -- 0F 6E F8 ; Data64 = ZEXT(Data32) | |
312 | MOVD %mm0,(%r8) # -- -- -- 41 0F 7E 00 ; REX to access upper reg. | |
313 | MOVD %mm0,(%rax) # -- -- -- -- 0F 7E 00 | |
314 | MOVD %mm7,(%r8) # -- -- -- 41 0F 7E 38 ; REX to access upper reg. | |
315 | MOVD %mm7,(%rax) # -- -- -- -- 0F 7E 38 | |
316 | MOVD %mm0,%eax # -- -- -- -- 0F 7E C0 | |
317 | MOVD %mm7,%eax # -- -- -- -- 0F 7E F8 | |
318 | ||
319 | # MOVQ | |
320 | MOVQ (%r8),%mm0 # -- -- -- 41 0F 6F 00 ; REX to access upper reg. | |
321 | MOVQ (%rax),%mm0 # -- -- -- -- 0F 6F 00 | |
322 | MOVQ (%r8),%mm7 # -- -- -- 41 0F 6F 38 ; REX to access upper reg. | |
323 | MOVQ (%rax),%mm7 # -- -- -- -- 0F 6F 38 | |
324 | MOVQ %mm0,(%r8) # -- -- -- 41 0F 7F 00 ; REX to access upper reg. | |
325 | MOVQ %mm0,(%rax) # -- -- -- -- 0F 7F 00 | |
326 | MOVQ %mm7,(%r8) # -- -- -- 41 0F 7F 38 ; REX to access upper reg. | |
327 | MOVQ %mm7,(%rax) # -- -- -- -- 0F 7F 38 | |
328 | ||
329 | # X87 | |
330 | # FADDP | |
331 | ||
332 | ||
333 | # FDIV | |
334 | ||
335 | # Stack Operations | |
336 | ||
337 | # POP | |
338 | POPq (%r8) # -- -- -- 41 8F 00 ; REX to access upper reg. | |
339 | POPq (%rax) # -- -- -- -- 8F 00 | |
21df382b | 340 | POP %fs # -- -- -- -- 0F A1 |
3f9aad11 | 341 | POPq %fs # -- -- -- -- 0F A1 |
21df382b | 342 | POP %gs # -- -- -- -- 0F A9 |
3f9aad11 JB |
343 | POPq %gs # -- -- -- -- 0F A9 |
344 | POPF # -- -- -- -- 9D | |
345 | POPFq # -- -- -- -- 9D | |
831b02f6 NC |
346 | |
347 | # PUSH | |
348 | PUSHq (%r8) # -- -- -- 41 FF 30 ; REX to access upper reg. | |
349 | PUSHq (%rax) # -- -- -- -- FF 30 | |
21df382b | 350 | PUSH %fs # -- -- -- -- 0F A0 |
3f9aad11 | 351 | PUSHq %fs # -- -- -- -- 0F A0 |
21df382b | 352 | PUSH %gs # -- -- -- -- 0F A8 |
3f9aad11 JB |
353 | PUSHq %gs # -- -- -- -- 0F A8 |
354 | PUSHF # -- -- -- -- 9C | |
355 | PUSHFq # -- -- -- -- 9C | |
831b02f6 NC |
356 | |
357 | ||
358 | ||
359 | ||
360 | ||
361 | # MMX/XMM/x87 State | |
362 | # FNSAVE | |
363 | # FRSTOR | |
364 | # FSAVE | |
365 | # FXRSTOR | |
366 | # FXSAVE | |
367 | # EMMS | |
368 | EMMS # -- -- -- -- 0F 77 | |
369 | # FEMMS | |
370 | FEMMS # -- -- -- -- 0F 0E | |
371 | ||
372 | # LEA calculation | |
373 | ||
374 | # MISC System Instructions | |
375 | # CLFLUSH | |
376 | ||
377 | # INVD | |
378 | INVD # -- -- -- -- 0F 08 | |
379 | ||
380 | # INVLPG | |
381 | INVLPG (%r8) # -- -- -- 41 0F 01 38 ; REX to access upper reg. | |
382 | INVLPG (%rax) # -- -- -- -- 0F 01 38 | |
383 | INVLPG (%r8) # -- -- -- 41 0F 01 38 ; REX to access upper reg. | |
384 | INVLPG (%rax) # -- -- -- -- 0F 01 38 | |
385 | INVLPG (%r8) # -- -- -- 41 0F 01 38 ; REX to access upper reg. | |
386 | INVLPG (%rax) # -- -- -- -- 0F 01 38 | |
387 | ||
388 | # LAR | |
389 | ||
390 | # LGDT | |
391 | ||
392 | # LIDT | |
393 | ||
394 | ||
395 | # LLDT | |
396 | ||
397 | # SGDT | |
398 | ||
399 | # SIDT | |
400 | ||
401 | # SLDT | |
858bc62d AJ |
402 | # SLDT (%eax) # -- 67 -- -- 0F 00 00 ; A32 override: (Addr64) = ZEXT(Addr32 ) |
403 | SLDT %eax # -- -- -- -- 0F 00 C0 | |
2b516b72 L |
404 | SLDT %rax # -- -- -- 48 0F 00 C0 |
405 | SLDT %ax # 66 -- -- -- 0F 00 C0 | |
406 | SLDT (%rax) # -- -- -- -- 0F 00 00 | |
831b02f6 NC |
407 | |
408 | # SWAPGS | |
409 | ||
410 | ||
411 | ||
412 | # IO | |
413 | ||
414 | # OUT | |
415 | OUT %al,$0 # -- -- -- -- E6 00 | |
416 | OUT %ax,$0 # 66 -- -- -- E7 00 ; O16 for 16-bit operand size | |
417 | OUT %eax,$0 # -- -- -- -- E7 00 | |
418 | ||
419 | # IN | |
6fb63971 | 420 | |
46e883c5 L |
421 | |
422 | ||
423 | xchg %ax,%ax # 66 -- -- -- 90 | |
424 | xchg %eax,%eax # -- -- -- -- 87 C0 | |
425 | xchg %rax,%rax # -- -- -- -- 90 | |
2b516b72 | 426 | rex64 xchg %rax,%rax # -- -- -- 48 90 |
46e883c5 | 427 | xchg %rax,%r8 # -- -- -- 49 90 |
8b38ad71 L |
428 | xchg %eax,%r8d # -- -- -- 41 90 |
429 | xchg %r8d,%eax # -- -- -- 41 90 | |
430 | xchg %eax,%r9d # -- -- -- 41 91 | |
431 | xchg %r9d,%eax # -- -- -- 41 91 | |
432 | xchg %ebx,%eax # -- -- -- 93 | |
433 | xchg %eax,%ebx # -- -- -- 93 | |
434 | xchg %ax,%r8w # -- -- -- 66 41 90 | |
435 | xchg %r8w,%ax # -- -- -- 66 41 90 | |
436 | xchg %ax,%r9w # -- -- -- 66 41 91 | |
437 | xchg %r9w,%ax # -- -- -- 66 41 91 | |
46e883c5 | 438 | |
2b516b72 L |
439 | smsw %rax # -- -- -- 48 0F 01 e0 |
440 | smsw %eax # -- -- -- -- 0F 01 e0 | |
441 | smsw %ax # 66 -- -- -- 0F 01 e0 | |
442 | smsw (%rax) # -- -- -- -- 0F 01 20 | |
443 | ||
444 | str %rax # -- -- -- 48 0F 00 c8 | |
445 | str %eax # -- -- -- -- 0F 00 c8 | |
446 | str %ax # 66 -- -- -- 0F 00 c8 | |
447 | str (%rax) # -- -- -- -- 0F 00 08 | |
448 | ||
dfb07592 | 449 | syscall # -- -- -- -- 0F 05 |
c006a730 JB |
450 | sysretl # -- -- -- -- 0F 07 |
451 | sysretq # -- -- -- 48 0F 07 | |
dfb07592 | 452 | |
bbedc832 L |
453 | swapgs # -- -- -- -- 0F 01 f8 |
454 | ||
d9e3625e | 455 | pushw $0x2222 |
7db2c588 | 456 | |
154b353f L |
457 | int1 |
458 | int3 | |
459 | int $0x90 | |
460 | ||
6967633c JB |
461 | .insn 0xf6/1, $1, %cl |
462 | .insn 0xf7/1, $2{:u16}, %cx | |
463 | .insn 0xf7/1, $4{:u32}, %ecx | |
464 | .insn 0xf7/1, $8{:s32}, %rcx | |
465 | .insn 0xc0/6, $2, %al | |
466 | .insn 0xc1/6, $1, %eax | |
467 | .insn 0xc1/6, $1, %rax | |
468 | .insn 0xd0/6, %al | |
469 | .insn 0xd1/6, %eax | |
470 | .insn 0xd1/6, %rax | |
471 | .insn 0xd2/6, %al | |
472 | .insn 0xd3/6, %eax | |
473 | .insn 0xd3/6, %rax |