[thirdparty/binutils-gdb.git] / gas / testsuite / gas / ia64 / dv-raw-err.s

//	
// Detect RAW violations.  Cases taken from DV tables.
// This test is by no means complete but tries to hit the things that are 
// likely to be missed.
//	
.text
	.explicit
// AR[BSP]
	mov	ar.bspstore = r0
	mov	r1 = ar.bsp
	;;

// AR[BSPSTORE]	
	mov	ar.bspstore = r2
	mov	r3 = ar.bspstore
	;;
	
// AR[CCV]
	mov	ar.ccv = r4
	cmpxchg8.acq r5 = [r6],r7,ar.ccv
	;;
	
// AR[EC]	
	br.wtop.sptk	L
	mov	r8 = ar.ec
	;;

// AR[FPSR].sf0.controls 
	fsetc.s0	0x7f, 0x0f
	fpcmp.eq.s0	f2 = f3, f4
	;;

// AR[FPSR].sf1.controls
	fsetc.s1	0x7f, 0x0f
	fpcmp.eq.s1	f2 = f3, f4
	;;

// AR[FPSR].sf2.controls
	fsetc.s2	0x7f, 0x0f
	fpcmp.eq.s2	f2 = f3, f4
	;;

// AR[FPSR].sf3.controls
	fsetc.s3	0x7f, 0x0f
	fpcmp.eq.s3	f2 = f3, f4
	;;

// AR[FPSR].sf0.flags
	fpcmp.eq.s0	f2 = f3, f4
	fchkf.s0	L
	;;

// AR[FPSR].sf1.flags
	fpcmp.eq.s1	f2 = f3, f4
	fchkf.s1	L
	;;

// AR[FPSR].sf2.flags
	fpcmp.eq.s2	f2 = f3, f4
	fchkf.s2	L
	;;

// AR[FPSR].sf3.flags
	fpcmp.eq.s3	f2 = f3, f4
	fchkf.s3	L
	;;

// AR[FPSR].traps/rv
	mov	ar.fpsr = r0
	fcmp.eq.s3	p1, p2 = f5, f6
	;;

// AR[ITC]
	mov	ar.itc = r1
	mov	r2 = ar.itc
	;;

// AR[RUC]
	mov	ar.ruc = r1
	mov	r2 = ar.ruc
	;;

// AR[K]
	mov	ar.k1 = r3
	br.ia.sptk	b0
	;;
	
// AR[LC]
	br.cloop.sptk	L
	mov	r4 = ar.lc
	;;
	
// AR[PFS]
	mov	ar.pfs = r5
	epc

// AR[RNAT]	
	mov	ar.bspstore = r8
	mov	r9 = ar.rnat	
	;;
	
// AR[RSC]
	mov	ar.rsc = r10
	mov	r11 = ar.rnat
	;;	
	
// AR[UNAT]	
	mov	ar.unat = r12
	ld8.fill r13 = [r14]
	;;
	
// AR%

// BR%
	mov	b0 = r0
	mov	r2 = b0
	;;
	
// CFM	
	br.wtop.sptk	L
	fadd	f2 = f1, f32	// read from rotating register region
	;;
	
// CR[CMCV]
	mov	cr.cmcv = r1
	mov	r2 = cr.cmcv	
	;;

// CR[DCR]
	mov	cr.dcr = r3
	ld8.s	r4 = [r5]
	;;

// CR[EOI]
	
// CR[GPTA]
	mov	cr.gpta = r6
	thash	r7 = r8
	;;
	srlz.d

// CR[IFA]
	mov	cr.ifa = r9
	itc.i	r10
	;;

// CR[IFS]
	mov	cr.ifs = r11
	mov	r12 = cr.ifs
	;;

// CR[IHA]
	mov	cr.iha = r13
	mov	r14 = cr.iha
	;;

// CR[IIM]
	mov	cr.iim = r15
	mov	r16 = cr.iim
	;;

// CR[IIP] 
	mov	cr.iip = r17
	rfi
	;;

// CR[IIPA]
	mov	cr.iipa = r19
	mov	r20 = cr.iipa
	;;

// CR[IPSR]
	mov	cr.ipsr = r21
	rfi
	;;

// CR[IRR%]
	mov	r22 = cr.ivr
	mov	r23 = cr.irr0
	;;
	
// CR[ISR]
	mov	cr.isr = r24
	mov	r25 = cr.isr
	;;	
	
// CR[ITIR]
	mov	cr.itir = r26
	itc.d	r27
	;;	
	
// CR[ITM]
	mov	cr.itm = r28
	mov	r29 = cr.itm
	;;	
	
// CR[ITV]
	mov	cr.itv = r0
	mov	r1 = cr.itv
	;;	
	
// CR[IVR] (all writes are implicit in other resource usage)
	
// CR[IVA]
	mov	cr.iva = r0
	mov	r1 = cr.iva
	;;	
	
// CR[LID]
	mov	cr.lid = r0
	mov	r1 = cr.lid
	;;	
	srlz.d
	
// CR[LRR%]
	mov	cr.lrr0 = r0
	mov	r1 = cr.lrr0
	;;
	
// CR[PMV]
	mov	cr.pmv = r0
	mov	r1 = cr.pmv
	;;
	
// CR[PTA]
	mov	cr.pta = r0
	thash	r1 = r2
	;;
	
// CR[TPR]
	mov	cr.tpr = r0
	mov	r1 = cr.ivr	// data
	;;
	srlz.d
	mov	cr.tpr = r2
	mov	psr.l = r3	// other
	;;
	srlz.d
	
// DBR# 
	mov	dbr[r0] = r1
	mov	r2 = dbr[r3]
	;;	
	srlz.d
	mov	dbr[r4] = r5
	probe.r	r6 = r7, r8
	;;
	srlz.d
	
// DTC
	ptc.e	r0
	fc	r1
	;;
	srlz.d
	itr.i	itr[r2] = r3
	ptc.e	r4
	;;
	
// DTC_LIMIT/ITC_LIMIT 
	ptc.g	r0, r1		// NOTE: GAS automatically emits stops after 
	ptc.ga	r2, r3		//  ptc.g/ptc.ga, so this conflict is no     
	;;			//  longer possible in GAS-generated assembly
	srlz.d

// DTR
	itr.d	dtr[r0] = r1
	tak	r2 = r3
	;;
	srlz.d
	ptr.d	r4, r5
	tpa	r6 = r7
	;;
	srlz.d
	
// FR%
	ldfs.c.clr	f2 = [r1]
	mov		f3 = f2		// no DV here
	;;
	mov		f4 = f5
	mov		f6 = f4
	;;

// GR%
	ld8.c.clr	r1 = [r1]	// no DV here
	mov		r2 = r0		
	;;
	mov		r3 = r4
	mov		r5 = r3
	;;

// IBR#
	mov	ibr[r0] = r1
	mov	r2 = ibr[r3]
	;;

// InService		
	mov	cr.eoi = r0
	mov	r1 = cr.ivr
	;;
	srlz.d
	mov	r2 = cr.ivr
	mov	r3 = cr.ivr	// several DVs
	;;
	mov	cr.eoi = r4
	mov	cr.eoi = r5
	;;
	
// ITC		
	ptc.e	r0
	epc
	;;
	srlz.i
	;;
	
// ITC_LIMIT (see DTC_LIMIT)
	
// ITR	
	itr.i	itr[r0] = r1
	epc
	;;
	srlz.i
	;;
	
// PKR#
	mov	pkr[r0] = r1
	probe.r	r2 = r3, r4
	;;
	srlz.d
	mov	pkr[r5] = r6
	mov	r7 = pkr[r8]
	;;
	srlz.d
	
// PMC#
	mov	pmc[r0] = r1
	mov	r2 = pmc[r3]
	;;
	srlz.d
	mov	pmc[r4] = r5
	mov	r6 = pmd[r7]
	;;
	srlz.d
	
// PMD#
	mov	pmd[r0] = r1
	mov	r2 = pmd[r3]
	;;
	
// PR%, 1 - 15
	cmp.eq	p1, p2 = r0, r1	// pr-writer/pr-reader-nobr-nomovpr
(p1)	add	r2 = r3, r4	
	;;
	mov	pr = r5, 0xffff // mov-to-pr-allreg/pr-reader-nobr-nomovpr
(p2)	add	r6 = r7, r8	
	;;
	fcmp.eq p5, p6 = f2, f3 // pr-writer-fp/pr-reader-br
(p5)	br.cond.sptk	b0
	;;
	cmp.eq	p7, p8 = r11, r12
(p7)	br.cond.sptk	b1	// no DV here
	;;
	
// PR63
	br.wtop.sptk	L
(p63)	add	r3 = r1, r2
	;;
	fcmp.eq p62, p63 = f2, f3
(p63)	add	r3 = r4, r5	
	;;
	cmp.eq p62, p63 = r6, r7 // no DV here
(p63)	br.cond.sptk	b0
	;;	

// PSR.ac
	rum	(1<<3)
	ld8	r2 = [r1]
	;;

// PSR.be
	rum	(1<<1)
	ld8	r2 = [r1]
	;;
	
// PSR.bn
	bsw.0
	mov	r1 = r15	// no DV here, since gr < 16
	;;
	bsw.1			// GAS automatically emits a stop after bsw.n
	mov	r1 = r16	// so this conflict is avoided               
	;;
	
// PSR.cpl
	epc
	st8	[r0] = r1
	;;
	epc
	mov	r2 = ar.itc
	;;
	epc
	mov	ar.itc = r3
	;;
	epc
	mov	r2 = ar.ruc
	;;
	epc
	mov	ar.ruc = r3
	;;
	epc
	mov	ar.rsc = r4
	;;
	epc
	mov	ar.k0 = r5
	;;
	epc
	mov	r6 = pmd[r7]
	;;
	epc
	mov	ar.bsp = r8	// no DV here
	;;
	epc
	mov	r9 = ar.bsp	// no DV here
	;;
	epc
	mov	cr.ifa = r10	// any mov-to/from-cr is a DV
	;;
	epc
	mov	r11 = cr.eoi	// any mov-to/from-cr is a DV
	;;

// PSR.da (rfi is the only writer)
// PSR.db (also ac,be,dt,pk)
	mov	psr.l = r0
	ld8	r1 = [r2]
	;;
	srlz.d

// PSR.dd (rfi is the only writer)
	
// PSR.dfh
	mov	psr.l = r0
	mov	f64 = f65
	;;
	srlz.d

// PSR.dfl
	mov	psr.l = r0
	mov	f3 = f4	
	;;
	srlz.d
	
// PSR.di
	rsm	(1<<22)
	mov	r1 = psr
	;;

// PSR.dt
	rsm	(1<<17)
	ld8	r1 = [r1]
	;;
	
// PSR.ed (rfi is the only writer)
// PSR.i
	ssm	(1<<14)
	mov	r1 = psr
	;;
	
// PSR.ia (no DV semantics)
// PSR.ic
	ssm	(1<<13)
	mov	r1 = psr
	;;
	srlz.d
	rsm	(1<<13)
	mov	r1 = cr.itir
	;;
	srlz.d
	rsm	(1<<13)
	mov	r1 = cr.irr0	// no DV here
	;;
	srlz.d

// PSR.id (rfi is the only writer)
// PSR.is (br.ia and rfi are the only writers)
// PSR.it (rfi is the only writer)
// PSR.lp
	mov	psr.l = r0
	br.ret.sptk	b0
	;;

// PSR.mc (rfi is the only writer)
// PSR.mfh
	mov	f32 = f33
	mov	r1 = psr
	;;

// PSR.mfl
	mov	f2 = f3
	mov	r1 = psr
	;;

// PSR.pk
	rsm	(1<<15)
	ld8	r1 = [r1]
	;;
	rsm	(1<<15)
	mov	r2 = psr
	;;

// PSR.pp
	rsm	(1<<21)
	mov	r1 = psr
	;;

// PSR.ri (no DV semantics)
// PSR.rt
	mov	psr.l = r0
	flushrs
	;;
	srlz.d

// PSR.si
	rsm	(1<<23)
	mov	r1 = ar.itc
	;;
	rsm	(1<<23)
	mov	r1 = ar.ruc
	;;
	ssm	(1<<23)
	mov	r1 = ar.ec	// no DV here
	;;

// PSR.sp
	ssm	(1<<20)
	mov	r1 = pmd[r1]
	;;
	ssm	(1<<20)
	rum	0xff
	;;
	ssm	(1<<20)
	mov	r1 = rr[r1]
	;;

// PSR.ss (rfi is the only writer)
// PSR.tb
	mov	psr.l = r0
	chk.s	r0, L
	;;

// PSR.up
	rsm	(1<<2)
	mov	r1 = psr.um
	;;
	srlz.d

// RR#
	mov	rr[r0] = r1
	ld8	r2 = [r0]	// data
	;;
	mov	rr[r4] = r5
	mov	r6 = rr[r7]	// impliedf
	;;
	srlz.d
	;;
// RSE
	
// GR%, additional cases
// addl
	mov	r2 = r32
	addl	r3 = 12345, r2	// impliedf, IA64_OPND_R3_2
	;;
// postinc
	ld8	r2 = [r32], 8
	mov	r8 = r32	// impliedf
	;;

// PR%, 16 - 62
	cmp.eq	p21, p22 = r0, r1 // pr-writer/pr-reader-nobr-nomovpr
(p21)	add	r2 = r3, r4	
	;;
	mov	pr = r5, 0x1ffff // mov-to-pr-allreg/pr-reader-nobr-nomovpr
(p22)	add	r6 = r7, r8	
	;;
	mov	pr.rot = 0xffff0000 // mov-to-pr-rotreg/pr-reader-nobr-nomovpr
(p23)	add	r9 = r10, r11
	;;
	fcmp.eq p25, p26 = f2, f3 // pr-writer-fp/pr-reader-br
(p25)	br.cond.sptk	b0
	;;
	cmp.eq	p27, p28 = r11, r12
(p27)	br.cond.sptk	b1	// no DV here
	;;
	
// postinc
	st8	[r6] = r8, 16
	add	r7 = 8, r6	// impliedf
	;;
	ldfd	f14 = [r6], 16
	add	r7 = 8, r6	// impliedf
	;;
	stfd	[r6] = f14, 16
	add	r7 = r8, r6
	;;
	add	r6 = 8, r7
	ld8	r8 = [r6], 16	// impliedf, WAW
	;;
	add	r6 = 8, r7
	ldfd	f14 = [r6], 16	// impliedf, WAW
	;;

L:
	br.ret.sptk     rp

// PSR.vm. New in SDM 2.2
	vmsw.0
	ld8	r2 = [r1]
	;;
Commit	Line	Data
800eeca4 JW	1	//
	2	// Detect RAW violations. Cases taken from DV tables.
	3	// This test is by no means complete but tries to hit the things that are
	4	// likely to be missed.
	5	//
	6	.text
	7	.explicit
	8	// AR[BSP]
4b09e828 JB	9	mov ar.bspstore = r0
4b09e828 JB	10	mov r1 = ar.bsp
800eeca4 JW	11	;;
	12
	13	// AR[BSPSTORE]
	14	mov ar.bspstore = r2
	15	mov r3 = ar.bspstore
	16	;;
	17
	18	// AR[CCV]
	19	mov ar.ccv = r4
	20	cmpxchg8.acq r5 = [r6],r7,ar.ccv
	21	;;
	22
	23	// AR[EC]
	24	br.wtop.sptk L
	25	mov r8 = ar.ec
	26	;;
	27
	28	// AR[FPSR].sf0.controls
	29	fsetc.s0 0x7f, 0x0f
	30	fpcmp.eq.s0 f2 = f3, f4
	31	;;
	32
	33	// AR[FPSR].sf1.controls
	34	fsetc.s1 0x7f, 0x0f
	35	fpcmp.eq.s1 f2 = f3, f4
	36	;;
	37
	38	// AR[FPSR].sf2.controls
	39	fsetc.s2 0x7f, 0x0f
	40	fpcmp.eq.s2 f2 = f3, f4
	41	;;
	42
	43	// AR[FPSR].sf3.controls
	44	fsetc.s3 0x7f, 0x0f
	45	fpcmp.eq.s3 f2 = f3, f4
	46	;;
	47
	48	// AR[FPSR].sf0.flags
	49	fpcmp.eq.s0 f2 = f3, f4
	50	fchkf.s0 L
	51	;;
	52
	53	// AR[FPSR].sf1.flags
	54	fpcmp.eq.s1 f2 = f3, f4
	55	fchkf.s1 L
	56	;;
	57
	58	// AR[FPSR].sf2.flags
	59	fpcmp.eq.s2 f2 = f3, f4
	60	fchkf.s2 L
	61	;;
	62
	63	// AR[FPSR].sf3.flags
	64	fpcmp.eq.s3 f2 = f3, f4
	65	fchkf.s3 L
	66	;;
	67
	68	// AR[FPSR].traps/rv
	69	mov ar.fpsr = r0
	70	fcmp.eq.s3 p1, p2 = f5, f6
	71	;;
	72
	73	// AR[ITC]
	74	mov ar.itc = r1
75	mov r2 = ar.itc
76	;;
77
4f8631b1 L	78	// AR[RUC]
	79	mov ar.ruc = r1
	80	mov r2 = ar.ruc
	81	;;
	82
800eeca4 JW	83	// AR[K]
	84	mov ar.k1 = r3
	85	br.ia.sptk b0
	86	;;
	87
	88	// AR[LC]
	89	br.cloop.sptk L
	90	mov r4 = ar.lc
	91	;;
	92
	93	// AR[PFS]
	94	mov ar.pfs = r5
	95	epc
	96
	97	// AR[RNAT]
	98	mov ar.bspstore = r8
	99	mov r9 = ar.rnat
	100	;;
	101
	102	// AR[RSC]
	103	mov ar.rsc = r10
	104	mov r11 = ar.rnat
	105	;;
	106
	107	// AR[UNAT]
	108	mov ar.unat = r12
	109	ld8.fill r13 = [r14]
	110	;;
	111
	112	// AR%
	113
	114	// BR%
	115	mov b0 = r0
4b09e828	116	mov r2 = b0
800eeca4 JW	117	;;
	118
	119	// CFM
	120	br.wtop.sptk L
4b09e828	121	fadd f2 = f1, f32 // read from rotating register region
800eeca4 JW	122	;;
	123
	124	// CR[CMCV]
	125	mov cr.cmcv = r1
	126	mov r2 = cr.cmcv
	127	;;
	128
	129	// CR[DCR]
	130	mov cr.dcr = r3
	131	ld8.s r4 = [r5]
	132	;;
	133
	134	// CR[EOI]
	135
	136	// CR[GPTA]
	137	mov cr.gpta = r6
	138	thash r7 = r8
	139	;;
	140	srlz.d
	141
	142	// CR[IFA]
	143	mov cr.ifa = r9
	144	itc.i r10
	145	;;
	146
	147	// CR[IFS]
	148	mov cr.ifs = r11
	149	mov r12 = cr.ifs
	150	;;
	151
	152	// CR[IHA]
	153	mov cr.iha = r13
	154	mov r14 = cr.iha
	155	;;
	156
	157	// CR[IIM]
	158	mov cr.iim = r15
	159	mov r16 = cr.iim
	160	;;
	161
	162	// CR[IIP]
	163	mov cr.iip = r17
	164	rfi
	165	;;
	166
	167	// CR[IIPA]
	168	mov cr.iipa = r19
	169	mov r20 = cr.iipa
	170	;;
	171
	172	// CR[IPSR]
	173	mov cr.ipsr = r21
	174	rfi
	175	;;
	176
	177	// CR[IRR%]
	178	mov r22 = cr.ivr
	179	mov r23 = cr.irr0
	180	;;
	181
	182	// CR[ISR]
	183	mov cr.isr = r24
	184	mov r25 = cr.isr
	185	;;
186
187	// CR[ITIR]
188	mov cr.itir = r26
189	itc.d r27
190	;;
191
192	// CR[ITM]
193	mov cr.itm = r28
194	mov r29 = cr.itm
195	;;
196
197	// CR[ITV]
198	mov cr.itv = r0
199	mov r1 = cr.itv
200	;;
201
202	// CR[IVR] (all writes are implicit in other resource usage)
203
204	// CR[IVA]
205	mov cr.iva = r0
206	mov r1 = cr.iva
207	;;
208
209	// CR[LID]
210	mov cr.lid = r0
211	mov r1 = cr.lid
212	;;
213	srlz.d
214
215	// CR[LRR%]
216	mov cr.lrr0 = r0
217	mov r1 = cr.lrr0
218	;;
219
220	// CR[PMV]
221	mov cr.pmv = r0
222	mov r1 = cr.pmv
223	;;
224
225	// CR[PTA]
226	mov cr.pta = r0
227	thash r1 = r2
228	;;
229
230	// CR[TPR]
231	mov cr.tpr = r0
232	mov r1 = cr.ivr // data
233	;;
234	srlz.d
235	mov cr.tpr = r2
236	mov psr.l = r3 // other
237	;;
238	srlz.d
239
240	// DBR#
241	mov dbr[r0] = r1
242	mov r2 = dbr[r3]
243	;;
244	srlz.d
245	mov dbr[r4] = r5
246	probe.r r6 = r7, r8
247	;;
248	srlz.d
249
250	// DTC
251	ptc.e r0
252	fc r1
253	;;
254	srlz.d
255	itr.i itr[r2] = r3
256	ptc.e r4
257	;;
258
259	// DTC_LIMIT/ITC_LIMIT
260	ptc.g r0, r1 // NOTE: GAS automatically emits stops after
261	ptc.ga r2, r3 // ptc.g/ptc.ga, so this conflict is no
262	;; // longer possible in GAS-generated assembly
263	srlz.d
264
265	// DTR
266	itr.d dtr[r0] = r1
267	tak r2 = r3
268	;;
269	srlz.d
270	ptr.d r4, r5
271	tpa r6 = r7
272	;;
273	srlz.d
274
275	// FR%
276	ldfs.c.clr f2 = [r1]
277	mov f3 = f2 // no DV here
278	;;
279	mov f4 = f5
280	mov f6 = f4
281	;;
282
283	// GR%
4b09e828	284	ld8.c.clr r1 = [r1] // no DV here
800eeca4 JW	285	mov r2 = r0
	286	;;
	287	mov r3 = r4
	288	mov r5 = r3
	289	;;
	290
	291	// IBR#
	292	mov ibr[r0] = r1
	293	mov r2 = ibr[r3]
	294	;;
	295
	296	// InService
	297	mov cr.eoi = r0
	298	mov r1 = cr.ivr
	299	;;
	300	srlz.d
	301	mov r2 = cr.ivr
	302	mov r3 = cr.ivr // several DVs
	303	;;
	304	mov cr.eoi = r4
	305	mov cr.eoi = r5
	306	;;
	307
	308	// ITC
	309	ptc.e r0
	310	epc
	311	;;
	312	srlz.i
	313	;;
	314
	315	// ITC_LIMIT (see DTC_LIMIT)
	316
	317	// ITR
	318	itr.i itr[r0] = r1
	319	epc
	320	;;
	321	srlz.i
	322	;;
	323
	324	// PKR#
	325	mov pkr[r0] = r1
	326	probe.r r2 = r3, r4
	327	;;
	328	srlz.d
	329	mov pkr[r5] = r6
	330	mov r7 = pkr[r8]
	331	;;
	332	srlz.d
	333
	334	// PMC#
	335	mov pmc[r0] = r1
	336	mov r2 = pmc[r3]
	337	;;
	338	srlz.d
	339	mov pmc[r4] = r5
	340	mov r6 = pmd[r7]
	341	;;
	342	srlz.d
	343
	344	// PMD#
	345	mov pmd[r0] = r1
	346	mov r2 = pmd[r3]
	347	;;
	348
139368c9	349	// PR%, 1 - 15
800eeca4 JW	350	cmp.eq p1, p2 = r0, r1 // pr-writer/pr-reader-nobr-nomovpr
	351	(p1) add r2 = r3, r4
	352	;;
	353	mov pr = r5, 0xffff // mov-to-pr-allreg/pr-reader-nobr-nomovpr
	354	(p2) add r6 = r7, r8
	355	;;
	356	fcmp.eq p5, p6 = f2, f3 // pr-writer-fp/pr-reader-br
	357	(p5) br.cond.sptk b0
	358	;;
	359	cmp.eq p7, p8 = r11, r12
	360	(p7) br.cond.sptk b1 // no DV here
	361	;;
	362
	363	// PR63
	364	br.wtop.sptk L
4b09e828	365	(p63) add r3 = r1, r2
800eeca4 JW	366	;;
	367	fcmp.eq p62, p63 = f2, f3
	368	(p63) add r3 = r4, r5
	369	;;
	370	cmp.eq p62, p63 = r6, r7 // no DV here
	371	(p63) br.cond.sptk b0
	372	;;
	373
	374	// PSR.ac
	375	rum (1<<3)
4b09e828	376	ld8 r2 = [r1]
800eeca4 JW	377	;;
	378
	379	// PSR.be
	380	rum (1<<1)
4b09e828	381	ld8 r2 = [r1]
800eeca4 JW	382	;;
	383
	384	// PSR.bn
	385	bsw.0
4b09e828	386	mov r1 = r15 // no DV here, since gr < 16
800eeca4 JW	387	;;
	388	bsw.1 // GAS automatically emits a stop after bsw.n
	389	mov r1 = r16 // so this conflict is avoided
	390	;;
	391
	392	// PSR.cpl
	393	epc
	394	st8 [r0] = r1
	395	;;
	396	epc
	397	mov r2 = ar.itc
	398	;;
	399	epc
	400	mov ar.itc = r3
	401	;;
	402	epc
4f8631b1 L	403	mov r2 = ar.ruc
	404	;;
	405	epc
	406	mov ar.ruc = r3
	407	;;
	408	epc
800eeca4 JW	409	mov ar.rsc = r4
	410	;;
	411	epc
	412	mov ar.k0 = r5
	413	;;
	414	epc
	415	mov r6 = pmd[r7]
	416	;;
	417	epc
	418	mov ar.bsp = r8 // no DV here
	419	;;
	420	epc
	421	mov r9 = ar.bsp // no DV here
	422	;;
	423	epc
	424	mov cr.ifa = r10 // any mov-to/from-cr is a DV
	425	;;
	426	epc
	427	mov r11 = cr.eoi // any mov-to/from-cr is a DV
	428	;;
	429
	430	// PSR.da (rfi is the only writer)
	431	// PSR.db (also ac,be,dt,pk)
	432	mov psr.l = r0
	433	ld8 r1 = [r2]
	434	;;
	435	srlz.d
	436
	437	// PSR.dd (rfi is the only writer)
	438
	439	// PSR.dfh
	440	mov psr.l = r0
	441	mov f64 = f65
	442	;;
	443	srlz.d
	444
	445	// PSR.dfl
	446	mov psr.l = r0
	447	mov f3 = f4
	448	;;
	449	srlz.d
	450
	451	// PSR.di
	452	rsm (1<<22)
4b09e828	453	mov r1 = psr
800eeca4 JW	454	;;
	455
	456	// PSR.dt
	457	rsm (1<<17)
4b09e828	458	ld8 r1 = [r1]
800eeca4 JW	459	;;
	460
	461	// PSR.ed (rfi is the only writer)
	462	// PSR.i
	463	ssm (1<<14)
4b09e828	464	mov r1 = psr
800eeca4 JW	465	;;
	466
	467	// PSR.ia (no DV semantics)
	468	// PSR.ic
	469	ssm (1<<13)
4b09e828	470	mov r1 = psr
800eeca4 JW	471	;;
	472	srlz.d
	473	rsm (1<<13)
	474	mov r1 = cr.itir
	475	;;
	476	srlz.d
	477	rsm (1<<13)
	478	mov r1 = cr.irr0 // no DV here
	479	;;
	480	srlz.d
	481
	482	// PSR.id (rfi is the only writer)
	483	// PSR.is (br.ia and rfi are the only writers)
	484	// PSR.it (rfi is the only writer)
	485	// PSR.lp
	486	mov psr.l = r0
	487	br.ret.sptk b0
	488	;;
	489
	490	// PSR.mc (rfi is the only writer)
	491	// PSR.mfh
	492	mov f32 = f33
4b09e828	493	mov r1 = psr
800eeca4 JW	494	;;
	495
	496	// PSR.mfl
	497	mov f2 = f3
4b09e828	498	mov r1 = psr
800eeca4 JW	499	;;
	500
	501	// PSR.pk
	502	rsm (1<<15)
4b09e828	503	ld8 r1 = [r1]
800eeca4 JW	504	;;
	505	rsm (1<<15)
	506	mov r2 = psr
	507	;;
	508
	509	// PSR.pp
	510	rsm (1<<21)
4b09e828	511	mov r1 = psr
800eeca4 JW	512	;;
	513
	514	// PSR.ri (no DV semantics)
	515	// PSR.rt
	516	mov psr.l = r0
	517	flushrs
	518	;;
	519	srlz.d
	520
	521	// PSR.si
	522	rsm (1<<23)
4b09e828	523	mov r1 = ar.itc
800eeca4	524	;;
4f8631b1 L	525	rsm (1<<23)
	526	mov r1 = ar.ruc
	527	;;
800eeca4 JW	528	ssm (1<<23)
	529	mov r1 = ar.ec // no DV here
	530	;;
	531
	532	// PSR.sp
	533	ssm (1<<20)
4b09e828	534	mov r1 = pmd[r1]
800eeca4 JW	535	;;
	536	ssm (1<<20)
	537	rum 0xff
	538	;;
	539	ssm (1<<20)
4b09e828	540	mov r1 = rr[r1]
800eeca4 JW	541	;;
	542
	543	// PSR.ss (rfi is the only writer)
	544	// PSR.tb
	545	mov psr.l = r0
	546	chk.s r0, L
	547	;;
	548
	549	// PSR.up
	550	rsm (1<<2)
4b09e828	551	mov r1 = psr.um
800eeca4 JW	552	;;
	553	srlz.d
	554
	555	// RR#
	556	mov rr[r0] = r1
	557	ld8 r2 = [r0] // data
	558	;;
	559	mov rr[r4] = r5
	560	mov r6 = rr[r7] // impliedf
	561	;;
50b81f19 JW	562	srlz.d
50b81f19 JW	563	;;
800eeca4	564	// RSE
50b81f19 JW	565
	566	// GR%, additional cases
	567	// addl
	568	mov r2 = r32
	569	addl r3 = 12345, r2 // impliedf, IA64_OPND_R3_2
	570	;;
	571	// postinc
	572	ld8 r2 = [r32], 8
	573	mov r8 = r32 // impliedf
	574	;;
139368c9 JW	575
	576	// PR%, 16 - 62
	577	cmp.eq p21, p22 = r0, r1 // pr-writer/pr-reader-nobr-nomovpr
	578	(p21) add r2 = r3, r4
	579	;;
	580	mov pr = r5, 0x1ffff // mov-to-pr-allreg/pr-reader-nobr-nomovpr
	581	(p22) add r6 = r7, r8
	582	;;
	583	mov pr.rot = 0xffff0000 // mov-to-pr-rotreg/pr-reader-nobr-nomovpr
	584	(p23) add r9 = r10, r11
	585	;;
	586	fcmp.eq p25, p26 = f2, f3 // pr-writer-fp/pr-reader-br
	587	(p25) br.cond.sptk b0
	588	;;
	589	cmp.eq p27, p28 = r11, r12
	590	(p27) br.cond.sptk b1 // no DV here
	591	;;
	592
bad9ceea JJ	593	// postinc
	594	st8 [r6] = r8, 16
	595	add r7 = 8, r6 // impliedf
	596	;;
	597	ldfd f14 = [r6], 16
	598	add r7 = 8, r6 // impliedf
	599	;;
	600	stfd [r6] = f14, 16
	601	add r7 = r8, r6
	602	;;
	603	add r6 = 8, r7
	604	ld8 r8 = [r6], 16 // impliedf, WAW
	605	;;
	606	add r6 = 8, r7
	607	ldfd f14 = [r6], 16 // impliedf, WAW
	608	;;
	609
	610	L:
7f3dfb9c L	611	br.ret.sptk rp
	612
	613	// PSR.vm. New in SDM 2.2
	614	vmsw.0
	615	ld8 r2 = [r1]
	616	;;