projects / thirdparty / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| 07b287a0 MS |
1 | /* Common target dependent code for GDB on AArch64 systems. |
| 2 | ||
| 61baf725 | 3 | Copyright (C) 2009-2017 Free Software Foundation, Inc. |
| 07b287a0 MS |
4 | Contributed by ARM Ltd. |
| 5 | ||
| 6 | This file is part of GDB. | |
| 7 | ||
| 8 | This program is free software; you can redistribute it and/or modify | |
| 9 | it under the terms of the GNU General Public License as published by | |
| 10 | the Free Software Foundation; either version 3 of the License, or | |
| 11 | (at your option) any later version. | |
| 12 | ||
| 13 | This program is distributed in the hope that it will be useful, | |
| 14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 16 | GNU General Public License for more details. | |
| 17 | ||
| 18 | You should have received a copy of the GNU General Public License | |
| 19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
| 20 | ||
| 21 | ||
| 22 | #ifndef AARCH64_TDEP_H | |
| 23 | #define AARCH64_TDEP_H | |
| 24 | ||
| cc628f3d AH |
25 | #include "arch/aarch64.h" |
| 26 | ||
| 07b287a0 MS |
27 | /* Forward declarations. */ |
| 28 | struct gdbarch; | |
| 29 | struct regset; | |
| 30 | ||
| 31 | /* AArch64 Dwarf register numbering. */ | |
| 32 | #define AARCH64_DWARF_X0 0 | |
| 33 | #define AARCH64_DWARF_SP 31 | |
| 34 | #define AARCH64_DWARF_V0 64 | |
| 35 | ||
| 07b287a0 MS |
36 | /* Size of integer registers. */ |
| 37 | #define X_REGISTER_SIZE 8 | |
| 38 | #define B_REGISTER_SIZE 1 | |
| 39 | #define H_REGISTER_SIZE 2 | |
| 40 | #define S_REGISTER_SIZE 4 | |
| 41 | #define D_REGISTER_SIZE 8 | |
| 42 | #define V_REGISTER_SIZE 16 | |
| 43 | #define Q_REGISTER_SIZE 16 | |
| 44 | ||
| 45 | /* Total number of general (X) registers. */ | |
| 46 | #define AARCH64_X_REGISTER_COUNT 32 | |
| 187f5d00 YQ |
47 | /* Total number of D registers. */ |
| 48 | #define AARCH64_D_REGISTER_COUNT 32 | |
| 07b287a0 | 49 | |
| b6542f81 YQ |
50 | /* The maximum number of modified instructions generated for one |
| 51 | single-stepped instruction. */ | |
| 52 | #define DISPLACED_MODIFIED_INSNS 1 | |
| 53 | ||
| 07b287a0 MS |
54 | /* Target-dependent structure in gdbarch. */ |
| 55 | struct gdbarch_tdep | |
| 56 | { | |
| 57 | /* Lowest address at which instructions will appear. */ | |
| 58 | CORE_ADDR lowest_pc; | |
| 59 | ||
| 60 | /* Offset to PC value in jump buffer. If this is negative, longjmp | |
| 61 | support will be disabled. */ | |
| 62 | int jb_pc; | |
| 63 | ||
| 64 | /* And the size of each entry in the buf. */ | |
| 65 | size_t jb_elt_size; | |
| 66 | ||
| 67 | /* Types for AdvSISD registers. */ | |
| 68 | struct type *vnq_type; | |
| 69 | struct type *vnd_type; | |
| 70 | struct type *vns_type; | |
| 71 | struct type *vnh_type; | |
| 72 | struct type *vnb_type; | |
| 99afc88b OJ |
73 | |
| 74 | /* syscall record. */ | |
| 75 | int (*aarch64_syscall_record) (struct regcache *regcache, unsigned long svc_number); | |
| 07b287a0 MS |
76 | }; |
| 77 | ||
| 9f2e0721 MO |
78 | extern struct target_desc *tdesc_aarch64; |
| 79 | ||
| 99afc88b OJ |
80 | extern int aarch64_process_record (struct gdbarch *gdbarch, |
| 81 | struct regcache *regcache, CORE_ADDR addr); | |
| 82 | ||
| b6542f81 YQ |
83 | struct displaced_step_closure * |
| 84 | aarch64_displaced_step_copy_insn (struct gdbarch *gdbarch, | |
| 85 | CORE_ADDR from, CORE_ADDR to, | |
| 86 | struct regcache *regs); | |
| 87 | ||
| 88 | void aarch64_displaced_step_fixup (struct gdbarch *gdbarch, | |
| 89 | struct displaced_step_closure *dsc, | |
| 90 | CORE_ADDR from, CORE_ADDR to, | |
| 91 | struct regcache *regs); | |
| 92 | ||
| 93 | int aarch64_displaced_step_hw_singlestep (struct gdbarch *gdbarch, | |
| 94 | struct displaced_step_closure *closure); | |
| 95 | ||
| 07b287a0 | 96 | #endif /* aarch64-tdep.h */ |