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8818c391 | 1 | /* Target-dependent code for Atmel AVR, for GDB. |
0fd88904 | 2 | |
4a94e368 | 3 | Copyright (C) 1996-2022 Free Software Foundation, Inc. |
8818c391 TR |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 9 | the Free Software Foundation; either version 3 of the License, or |
8818c391 TR |
10 | (at your option) any later version. |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
8818c391 | 19 | |
de18ac1f | 20 | /* Contributed by Theodore A. Roth, troth@openavr.org */ |
8818c391 TR |
21 | |
22 | /* Portions of this file were taken from the original gdb-4.18 patch developed | |
23 | by Denis Chertykov, denisc@overta.ru */ | |
24 | ||
25 | #include "defs.h" | |
d55e5aa6 | 26 | #include "frame.h" |
4de283e4 TT |
27 | #include "frame-unwind.h" |
28 | #include "frame-base.h" | |
29 | #include "trad-frame.h" | |
8818c391 TR |
30 | #include "gdbcmd.h" |
31 | #include "gdbcore.h" | |
e6bb342a | 32 | #include "gdbtypes.h" |
8818c391 | 33 | #include "inferior.h" |
d55e5aa6 | 34 | #include "symfile.h" |
4de283e4 TT |
35 | #include "arch-utils.h" |
36 | #include "regcache.h" | |
37 | #include "dis-asm.h" | |
38 | #include "objfiles.h" | |
39 | #include <algorithm> | |
76eb8ef1 | 40 | #include "gdbarch.h" |
8818c391 TR |
41 | |
42 | /* AVR Background: | |
43 | ||
44 | (AVR micros are pure Harvard Architecture processors.) | |
45 | ||
46 | The AVR family of microcontrollers have three distinctly different memory | |
0963b4bd MS |
47 | spaces: flash, sram and eeprom. The flash is 16 bits wide and is used for |
48 | the most part to store program instructions. The sram is 8 bits wide and is | |
49 | used for the stack and the heap. Some devices lack sram and some can have | |
8818c391 TR |
50 | an additional external sram added on as a peripheral. |
51 | ||
52 | The eeprom is 8 bits wide and is used to store data when the device is | |
0963b4bd MS |
53 | powered down. Eeprom is not directly accessible, it can only be accessed |
54 | via io-registers using a special algorithm. Accessing eeprom via gdb's | |
8818c391 TR |
55 | remote serial protocol ('m' or 'M' packets) looks difficult to do and is |
56 | not included at this time. | |
57 | ||
58 | [The eeprom could be read manually via ``x/b <eaddr + AVR_EMEM_START>'' or | |
59 | written using ``set {unsigned char}<eaddr + AVR_EMEM_START>''. For this to | |
60 | work, the remote target must be able to handle eeprom accesses and perform | |
61 | the address translation.] | |
62 | ||
0963b4bd | 63 | All three memory spaces have physical addresses beginning at 0x0. In |
8818c391 TR |
64 | addition, the flash is addressed by gcc/binutils/gdb with respect to 8 bit |
65 | bytes instead of the 16 bit wide words used by the real device for the | |
66 | Program Counter. | |
67 | ||
68 | In order for remote targets to work correctly, extra bits must be added to | |
69 | addresses before they are send to the target or received from the target | |
0963b4bd MS |
70 | via the remote serial protocol. The extra bits are the MSBs and are used to |
71 | decode which memory space the address is referring to. */ | |
8818c391 | 72 | |
8818c391 TR |
73 | /* Constants: prefixed with AVR_ to avoid name space clashes */ |
74 | ||
487d9753 PL |
75 | /* Address space flags */ |
76 | ||
77 | /* We are assigning the TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1 to the flash address | |
78 | space. */ | |
79 | ||
80 | #define AVR_TYPE_ADDRESS_CLASS_FLASH TYPE_ADDRESS_CLASS_1 | |
81 | #define AVR_TYPE_INSTANCE_FLAG_ADDRESS_CLASS_FLASH \ | |
82 | TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1 | |
83 | ||
84 | ||
8818c391 | 85 | enum |
2e5ff58c TR |
86 | { |
87 | AVR_REG_W = 24, | |
88 | AVR_REG_X = 26, | |
89 | AVR_REG_Y = 28, | |
90 | AVR_FP_REGNUM = 28, | |
91 | AVR_REG_Z = 30, | |
92 | ||
93 | AVR_SREG_REGNUM = 32, | |
94 | AVR_SP_REGNUM = 33, | |
95 | AVR_PC_REGNUM = 34, | |
96 | ||
97 | AVR_NUM_REGS = 32 + 1 /*SREG*/ + 1 /*SP*/ + 1 /*PC*/, | |
98 | AVR_NUM_REG_BYTES = 32 + 1 /*SREG*/ + 2 /*SP*/ + 4 /*PC*/, | |
99 | ||
7d2552b4 TG |
100 | /* Pseudo registers. */ |
101 | AVR_PSEUDO_PC_REGNUM = 35, | |
102 | AVR_NUM_PSEUDO_REGS = 1, | |
103 | ||
2e5ff58c TR |
104 | AVR_PC_REG_INDEX = 35, /* index into array of registers */ |
105 | ||
4add8633 | 106 | AVR_MAX_PROLOGUE_SIZE = 64, /* bytes */ |
2e5ff58c | 107 | |
0963b4bd | 108 | /* Count of pushed registers. From r2 to r17 (inclusively), r28, r29 */ |
2e5ff58c TR |
109 | AVR_MAX_PUSHES = 18, |
110 | ||
0963b4bd | 111 | /* Number of the last pushed register. r17 for current avr-gcc */ |
2e5ff58c TR |
112 | AVR_LAST_PUSHED_REGNUM = 17, |
113 | ||
4add8633 TR |
114 | AVR_ARG1_REGNUM = 24, /* Single byte argument */ |
115 | AVR_ARGN_REGNUM = 25, /* Multi byte argments */ | |
cb86f388 | 116 | AVR_LAST_ARG_REGNUM = 8, /* Last argument register */ |
4add8633 TR |
117 | |
118 | AVR_RET1_REGNUM = 24, /* Single byte return value */ | |
119 | AVR_RETN_REGNUM = 25, /* Multi byte return value */ | |
120 | ||
2e5ff58c | 121 | /* FIXME: TRoth/2002-01-??: Can we shift all these memory masks left 8 |
0963b4bd | 122 | bits? Do these have to match the bfd vma values? It sure would make |
2e5ff58c TR |
123 | things easier in the future if they didn't need to match. |
124 | ||
125 | Note: I chose these values so as to be consistent with bfd vma | |
126 | addresses. | |
127 | ||
128 | TRoth/2002-04-08: There is already a conflict with very large programs | |
0963b4bd | 129 | in the mega128. The mega128 has 128K instruction bytes (64K words), |
2e5ff58c TR |
130 | thus the Most Significant Bit is 0x10000 which gets masked off my |
131 | AVR_MEM_MASK. | |
132 | ||
133 | The problem manifests itself when trying to set a breakpoint in a | |
134 | function which resides in the upper half of the instruction space and | |
135 | thus requires a 17-bit address. | |
136 | ||
137 | For now, I've just removed the EEPROM mask and changed AVR_MEM_MASK | |
0963b4bd | 138 | from 0x00ff0000 to 0x00f00000. Eeprom is not accessible from gdb yet, |
2e5ff58c TR |
139 | but could be for some remote targets by just adding the correct offset |
140 | to the address and letting the remote target handle the low-level | |
0963b4bd | 141 | details of actually accessing the eeprom. */ |
2e5ff58c TR |
142 | |
143 | AVR_IMEM_START = 0x00000000, /* INSN memory */ | |
144 | AVR_SMEM_START = 0x00800000, /* SRAM memory */ | |
8818c391 | 145 | #if 1 |
2e5ff58c TR |
146 | /* No eeprom mask defined */ |
147 | AVR_MEM_MASK = 0x00f00000, /* mask to determine memory space */ | |
8818c391 | 148 | #else |
2e5ff58c TR |
149 | AVR_EMEM_START = 0x00810000, /* EEPROM memory */ |
150 | AVR_MEM_MASK = 0x00ff0000, /* mask to determine memory space */ | |
8818c391 | 151 | #endif |
2e5ff58c | 152 | }; |
8818c391 | 153 | |
4add8633 TR |
154 | /* Prologue types: |
155 | ||
156 | NORMAL and CALL are the typical types (the -mcall-prologues gcc option | |
157 | causes the generation of the CALL type prologues). */ | |
158 | ||
159 | enum { | |
160 | AVR_PROLOGUE_NONE, /* No prologue */ | |
161 | AVR_PROLOGUE_NORMAL, | |
162 | AVR_PROLOGUE_CALL, /* -mcall-prologues */ | |
163 | AVR_PROLOGUE_MAIN, | |
164 | AVR_PROLOGUE_INTR, /* interrupt handler */ | |
165 | AVR_PROLOGUE_SIG, /* signal handler */ | |
166 | }; | |
167 | ||
8818c391 TR |
168 | /* Any function with a frame looks like this |
169 | ....... <-SP POINTS HERE | |
170 | LOCALS1 <-FP POINTS HERE | |
171 | LOCALS0 | |
172 | SAVED FP | |
173 | SAVED R3 | |
174 | SAVED R2 | |
175 | RET PC | |
176 | FIRST ARG | |
177 | SECOND ARG */ | |
178 | ||
4add8633 | 179 | struct avr_unwind_cache |
2e5ff58c | 180 | { |
4add8633 TR |
181 | /* The previous frame's inner most stack address. Used as this |
182 | frame ID's stack_addr. */ | |
183 | CORE_ADDR prev_sp; | |
184 | /* The frame's base, optionally used by the high-level debug info. */ | |
185 | CORE_ADDR base; | |
186 | int size; | |
187 | int prologue_type; | |
188 | /* Table indicating the location of each and every register. */ | |
098caef4 | 189 | trad_frame_saved_reg *saved_regs; |
2e5ff58c | 190 | }; |
8818c391 | 191 | |
ab25d9bb | 192 | struct avr_gdbarch_tdep : gdbarch_tdep_base |
2e5ff58c | 193 | { |
4e99ad69 | 194 | /* Number of bytes stored to the stack by call instructions. |
9c97a070 | 195 | 2 bytes for avr1-5 and avrxmega1-5, 3 bytes for avr6 and avrxmega6-7. */ |
345bd07c | 196 | int call_length = 0; |
7d2552b4 TG |
197 | |
198 | /* Type for void. */ | |
345bd07c | 199 | struct type *void_type = nullptr; |
7d2552b4 | 200 | /* Type for a function returning void. */ |
345bd07c | 201 | struct type *func_void_type = nullptr; |
7d2552b4 | 202 | /* Type for a pointer to a function. Used for the type of PC. */ |
345bd07c | 203 | struct type *pc_type = nullptr; |
2e5ff58c | 204 | }; |
8818c391 | 205 | |
0963b4bd | 206 | /* Lookup the name of a register given it's number. */ |
8818c391 | 207 | |
fa88f677 | 208 | static const char * |
d93859e2 | 209 | avr_register_name (struct gdbarch *gdbarch, int regnum) |
8818c391 | 210 | { |
4e99ad69 | 211 | static const char * const register_names[] = { |
2e5ff58c TR |
212 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", |
213 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
8818c391 TR |
214 | "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", |
215 | "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", | |
7d2552b4 TG |
216 | "SREG", "SP", "PC2", |
217 | "pc" | |
8818c391 | 218 | }; |
9b9e61c7 AB |
219 | gdb_static_assert (ARRAY_SIZE (register_names) |
220 | == (AVR_NUM_REGS + AVR_NUM_PSEUDO_REGS)); | |
8818c391 TR |
221 | return register_names[regnum]; |
222 | } | |
223 | ||
8818c391 TR |
224 | /* Return the GDB type object for the "standard" data type |
225 | of data in register N. */ | |
226 | ||
227 | static struct type * | |
866b76ea | 228 | avr_register_type (struct gdbarch *gdbarch, int reg_nr) |
8818c391 | 229 | { |
866b76ea | 230 | if (reg_nr == AVR_PC_REGNUM) |
df4df182 | 231 | return builtin_type (gdbarch)->builtin_uint32; |
345bd07c | 232 | |
08106042 | 233 | avr_gdbarch_tdep *tdep = gdbarch_tdep<avr_gdbarch_tdep> (gdbarch); |
7d2552b4 | 234 | if (reg_nr == AVR_PSEUDO_PC_REGNUM) |
345bd07c SM |
235 | return tdep->pc_type; |
236 | ||
866b76ea | 237 | if (reg_nr == AVR_SP_REGNUM) |
0dfff4cb | 238 | return builtin_type (gdbarch)->builtin_data_ptr; |
345bd07c | 239 | |
7d2552b4 | 240 | return builtin_type (gdbarch)->builtin_uint8; |
8818c391 TR |
241 | } |
242 | ||
0963b4bd | 243 | /* Instruction address checks and convertions. */ |
8818c391 TR |
244 | |
245 | static CORE_ADDR | |
246 | avr_make_iaddr (CORE_ADDR x) | |
247 | { | |
248 | return ((x) | AVR_IMEM_START); | |
249 | } | |
250 | ||
0963b4bd | 251 | /* FIXME: TRoth: Really need to use a larger mask for instructions. Some |
8818c391 TR |
252 | devices are already up to 128KBytes of flash space. |
253 | ||
0963b4bd | 254 | TRoth/2002-04-8: See comment above where AVR_IMEM_START is defined. */ |
8818c391 TR |
255 | |
256 | static CORE_ADDR | |
257 | avr_convert_iaddr_to_raw (CORE_ADDR x) | |
258 | { | |
259 | return ((x) & 0xffffffff); | |
260 | } | |
261 | ||
0963b4bd | 262 | /* SRAM address checks and convertions. */ |
8818c391 TR |
263 | |
264 | static CORE_ADDR | |
265 | avr_make_saddr (CORE_ADDR x) | |
266 | { | |
ee143e81 TG |
267 | /* Return 0 for NULL. */ |
268 | if (x == 0) | |
269 | return 0; | |
270 | ||
8818c391 TR |
271 | return ((x) | AVR_SMEM_START); |
272 | } | |
273 | ||
8818c391 TR |
274 | static CORE_ADDR |
275 | avr_convert_saddr_to_raw (CORE_ADDR x) | |
276 | { | |
277 | return ((x) & 0xffffffff); | |
278 | } | |
279 | ||
0963b4bd MS |
280 | /* EEPROM address checks and convertions. I don't know if these will ever |
281 | actually be used, but I've added them just the same. TRoth */ | |
8818c391 TR |
282 | |
283 | /* TRoth/2002-04-08: Commented out for now to allow fix for problem with large | |
0963b4bd | 284 | programs in the mega128. */ |
8818c391 TR |
285 | |
286 | /* static CORE_ADDR */ | |
287 | /* avr_make_eaddr (CORE_ADDR x) */ | |
288 | /* { */ | |
289 | /* return ((x) | AVR_EMEM_START); */ | |
290 | /* } */ | |
291 | ||
292 | /* static int */ | |
293 | /* avr_eaddr_p (CORE_ADDR x) */ | |
294 | /* { */ | |
295 | /* return (((x) & AVR_MEM_MASK) == AVR_EMEM_START); */ | |
296 | /* } */ | |
297 | ||
298 | /* static CORE_ADDR */ | |
299 | /* avr_convert_eaddr_to_raw (CORE_ADDR x) */ | |
300 | /* { */ | |
301 | /* return ((x) & 0xffffffff); */ | |
302 | /* } */ | |
303 | ||
0963b4bd | 304 | /* Convert from address to pointer and vice-versa. */ |
8818c391 TR |
305 | |
306 | static void | |
9898f801 UW |
307 | avr_address_to_pointer (struct gdbarch *gdbarch, |
308 | struct type *type, gdb_byte *buf, CORE_ADDR addr) | |
8818c391 | 309 | { |
e17a4113 UW |
310 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
311 | ||
487d9753 PL |
312 | /* Is it a data address in flash? */ |
313 | if (AVR_TYPE_ADDRESS_CLASS_FLASH (type)) | |
314 | { | |
7d0d9d2b | 315 | /* A data pointer in flash is byte addressed. */ |
df86565b | 316 | store_unsigned_integer (buf, type->length (), byte_order, |
487d9753 PL |
317 | avr_convert_iaddr_to_raw (addr)); |
318 | } | |
8818c391 | 319 | /* Is it a code address? */ |
27710edb SM |
320 | else if (type->target_type ()->code () == TYPE_CODE_FUNC |
321 | || type->target_type ()->code () == TYPE_CODE_METHOD) | |
8818c391 | 322 | { |
7d0d9d2b PL |
323 | /* A code pointer is word (16 bits) addressed. We shift the address down |
324 | by 1 bit to convert it to a pointer. */ | |
df86565b | 325 | store_unsigned_integer (buf, type->length (), byte_order, |
4ea2465e | 326 | avr_convert_iaddr_to_raw (addr >> 1)); |
8818c391 TR |
327 | } |
328 | else | |
329 | { | |
330 | /* Strip off any upper segment bits. */ | |
df86565b | 331 | store_unsigned_integer (buf, type->length (), byte_order, |
2e5ff58c | 332 | avr_convert_saddr_to_raw (addr)); |
8818c391 TR |
333 | } |
334 | } | |
335 | ||
336 | static CORE_ADDR | |
9898f801 UW |
337 | avr_pointer_to_address (struct gdbarch *gdbarch, |
338 | struct type *type, const gdb_byte *buf) | |
8818c391 | 339 | { |
e17a4113 UW |
340 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
341 | CORE_ADDR addr | |
df86565b | 342 | = extract_unsigned_integer (buf, type->length (), byte_order); |
8818c391 | 343 | |
487d9753 PL |
344 | /* Is it a data address in flash? */ |
345 | if (AVR_TYPE_ADDRESS_CLASS_FLASH (type)) | |
7d0d9d2b PL |
346 | { |
347 | /* A data pointer in flash is already byte addressed. */ | |
348 | return avr_make_iaddr (addr); | |
349 | } | |
8818c391 | 350 | /* Is it a code address? */ |
27710edb SM |
351 | else if (type->target_type ()->code () == TYPE_CODE_FUNC |
352 | || type->target_type ()->code () == TYPE_CODE_METHOD | |
353 | || TYPE_CODE_SPACE (type->target_type ())) | |
7d0d9d2b PL |
354 | { |
355 | /* A code pointer is word (16 bits) addressed so we shift it up | |
356 | by 1 bit to convert it to an address. */ | |
357 | return avr_make_iaddr (addr << 1); | |
358 | } | |
8818c391 TR |
359 | else |
360 | return avr_make_saddr (addr); | |
361 | } | |
362 | ||
8a1d23b2 TG |
363 | static CORE_ADDR |
364 | avr_integer_to_address (struct gdbarch *gdbarch, | |
365 | struct type *type, const gdb_byte *buf) | |
366 | { | |
367 | ULONGEST addr = unpack_long (type, buf); | |
368 | ||
1218a4bf CDA |
369 | if (TYPE_DATA_SPACE (type)) |
370 | return avr_make_saddr (addr); | |
371 | else | |
372 | return avr_make_iaddr (addr); | |
8a1d23b2 TG |
373 | } |
374 | ||
8818c391 | 375 | static CORE_ADDR |
c113ed0c | 376 | avr_read_pc (readable_regcache *regcache) |
8818c391 | 377 | { |
8619218d | 378 | ULONGEST pc; |
c113ed0c YQ |
379 | |
380 | regcache->cooked_read (AVR_PC_REGNUM, &pc); | |
61a1198a | 381 | return avr_make_iaddr (pc); |
8818c391 TR |
382 | } |
383 | ||
384 | static void | |
61a1198a | 385 | avr_write_pc (struct regcache *regcache, CORE_ADDR val) |
8818c391 | 386 | { |
61a1198a | 387 | regcache_cooked_write_unsigned (regcache, AVR_PC_REGNUM, |
dda83cd7 | 388 | avr_convert_iaddr_to_raw (val)); |
7d2552b4 TG |
389 | } |
390 | ||
05d1431c | 391 | static enum register_status |
849d0ba8 | 392 | avr_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache, |
dda83cd7 | 393 | int regnum, gdb_byte *buf) |
7d2552b4 TG |
394 | { |
395 | ULONGEST val; | |
05d1431c | 396 | enum register_status status; |
7d2552b4 TG |
397 | |
398 | switch (regnum) | |
399 | { | |
400 | case AVR_PSEUDO_PC_REGNUM: | |
03f50fc8 | 401 | status = regcache->raw_read (AVR_PC_REGNUM, &val); |
05d1431c PA |
402 | if (status != REG_VALID) |
403 | return status; | |
7d2552b4 TG |
404 | val >>= 1; |
405 | store_unsigned_integer (buf, 4, gdbarch_byte_order (gdbarch), val); | |
05d1431c | 406 | return status; |
7d2552b4 | 407 | default: |
f34652de | 408 | internal_error (_("invalid regnum")); |
7d2552b4 TG |
409 | } |
410 | } | |
411 | ||
412 | static void | |
413 | avr_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, | |
dda83cd7 | 414 | int regnum, const gdb_byte *buf) |
7d2552b4 TG |
415 | { |
416 | ULONGEST val; | |
417 | ||
418 | switch (regnum) | |
419 | { | |
420 | case AVR_PSEUDO_PC_REGNUM: | |
421 | val = extract_unsigned_integer (buf, 4, gdbarch_byte_order (gdbarch)); | |
422 | val <<= 1; | |
423 | regcache_raw_write_unsigned (regcache, AVR_PC_REGNUM, val); | |
424 | break; | |
425 | default: | |
f34652de | 426 | internal_error (_("invalid regnum")); |
7d2552b4 | 427 | } |
8818c391 TR |
428 | } |
429 | ||
4add8633 | 430 | /* Function: avr_scan_prologue |
8818c391 | 431 | |
4add8633 | 432 | This function decodes an AVR function prologue to determine: |
8818c391 TR |
433 | 1) the size of the stack frame |
434 | 2) which registers are saved on it | |
435 | 3) the offsets of saved regs | |
4add8633 | 436 | This information is stored in the avr_unwind_cache structure. |
8818c391 | 437 | |
e3d8b004 | 438 | Some devices lack the sbiw instruction, so on those replace this: |
dda83cd7 | 439 | sbiw r28, XX |
e3d8b004 | 440 | with this: |
dda83cd7 SM |
441 | subi r28,lo8(XX) |
442 | sbci r29,hi8(XX) | |
e3d8b004 TR |
443 | |
444 | A typical AVR function prologue with a frame pointer might look like this: | |
dda83cd7 SM |
445 | push rXX ; saved regs |
446 | ... | |
447 | push r28 | |
448 | push r29 | |
449 | in r28,__SP_L__ | |
450 | in r29,__SP_H__ | |
451 | sbiw r28,<LOCALS_SIZE> | |
452 | in __tmp_reg__,__SREG__ | |
453 | cli | |
454 | out __SP_H__,r29 | |
455 | out __SREG__,__tmp_reg__ | |
456 | out __SP_L__,r28 | |
e3d8b004 TR |
457 | |
458 | A typical AVR function prologue without a frame pointer might look like | |
459 | this: | |
dda83cd7 SM |
460 | push rXX ; saved regs |
461 | ... | |
e3d8b004 TR |
462 | |
463 | A main function prologue looks like this: | |
dda83cd7 SM |
464 | ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) |
465 | ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) | |
466 | out __SP_H__,r29 | |
467 | out __SP_L__,r28 | |
e3d8b004 TR |
468 | |
469 | A signal handler prologue looks like this: | |
dda83cd7 SM |
470 | push __zero_reg__ |
471 | push __tmp_reg__ | |
472 | in __tmp_reg__, __SREG__ | |
473 | push __tmp_reg__ | |
474 | clr __zero_reg__ | |
475 | push rXX ; save registers r18:r27, r30:r31 | |
476 | ... | |
477 | push r28 ; save frame pointer | |
478 | push r29 | |
479 | in r28, __SP_L__ | |
480 | in r29, __SP_H__ | |
481 | sbiw r28, <LOCALS_SIZE> | |
482 | out __SP_H__, r29 | |
483 | out __SP_L__, r28 | |
484 | ||
e3d8b004 | 485 | A interrupt handler prologue looks like this: |
dda83cd7 SM |
486 | sei |
487 | push __zero_reg__ | |
488 | push __tmp_reg__ | |
489 | in __tmp_reg__, __SREG__ | |
490 | push __tmp_reg__ | |
491 | clr __zero_reg__ | |
492 | push rXX ; save registers r18:r27, r30:r31 | |
493 | ... | |
494 | push r28 ; save frame pointer | |
495 | push r29 | |
496 | in r28, __SP_L__ | |
497 | in r29, __SP_H__ | |
498 | sbiw r28, <LOCALS_SIZE> | |
499 | cli | |
500 | out __SP_H__, r29 | |
501 | sei | |
502 | out __SP_L__, r28 | |
e3d8b004 TR |
503 | |
504 | A `-mcall-prologues' prologue looks like this (Note that the megas use a | |
505 | jmp instead of a rjmp, thus the prologue is one word larger since jmp is a | |
506 | 32 bit insn and rjmp is a 16 bit insn): | |
dda83cd7 SM |
507 | ldi r26,lo8(<LOCALS_SIZE>) |
508 | ldi r27,hi8(<LOCALS_SIZE>) | |
509 | ldi r30,pm_lo8(.L_foo_body) | |
510 | ldi r31,pm_hi8(.L_foo_body) | |
511 | rjmp __prologue_saves__+RRR | |
512 | .L_foo_body: */ | |
8818c391 | 513 | |
4add8633 TR |
514 | /* Not really part of a prologue, but still need to scan for it, is when a |
515 | function prologue moves values passed via registers as arguments to new | |
0963b4bd MS |
516 | registers. In this case, all local variables live in registers, so there |
517 | may be some register saves. This is what it looks like: | |
dda83cd7 SM |
518 | movw rMM, rNN |
519 | ... | |
4add8633 | 520 | |
0963b4bd MS |
521 | There could be multiple movw's. If the target doesn't have a movw insn, it |
522 | will use two mov insns. This could be done after any of the above prologue | |
4add8633 TR |
523 | types. */ |
524 | ||
525 | static CORE_ADDR | |
e17a4113 | 526 | avr_scan_prologue (struct gdbarch *gdbarch, CORE_ADDR pc_beg, CORE_ADDR pc_end, |
4e99ad69 | 527 | struct avr_unwind_cache *info) |
8818c391 | 528 | { |
e17a4113 | 529 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
2e5ff58c TR |
530 | int i; |
531 | unsigned short insn; | |
2e5ff58c | 532 | int scan_stage = 0; |
3b7344d5 | 533 | struct bound_minimal_symbol msymbol; |
8818c391 TR |
534 | unsigned char prologue[AVR_MAX_PROLOGUE_SIZE]; |
535 | int vpc = 0; | |
4e99ad69 TG |
536 | int len; |
537 | ||
538 | len = pc_end - pc_beg; | |
539 | if (len > AVR_MAX_PROLOGUE_SIZE) | |
540 | len = AVR_MAX_PROLOGUE_SIZE; | |
8818c391 | 541 | |
4add8633 | 542 | /* FIXME: TRoth/2003-06-11: This could be made more efficient by only |
0963b4bd MS |
543 | reading in the bytes of the prologue. The problem is that the figuring |
544 | out where the end of the prologue is is a bit difficult. The old code | |
4add8633 | 545 | tried to do that, but failed quite often. */ |
4e99ad69 | 546 | read_memory (pc_beg, prologue, len); |
8818c391 TR |
547 | |
548 | /* Scanning main()'s prologue | |
549 | ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) | |
550 | ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) | |
551 | out __SP_H__,r29 | |
552 | out __SP_L__,r28 */ | |
553 | ||
4e99ad69 | 554 | if (len >= 4) |
8818c391 TR |
555 | { |
556 | CORE_ADDR locals; | |
4e99ad69 | 557 | static const unsigned char img[] = { |
2e5ff58c TR |
558 | 0xde, 0xbf, /* out __SP_H__,r29 */ |
559 | 0xcd, 0xbf /* out __SP_L__,r28 */ | |
8818c391 TR |
560 | }; |
561 | ||
e17a4113 | 562 | insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order); |
8818c391 | 563 | /* ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) */ |
2e5ff58c TR |
564 | if ((insn & 0xf0f0) == 0xe0c0) |
565 | { | |
566 | locals = (insn & 0xf) | ((insn & 0x0f00) >> 4); | |
e17a4113 | 567 | insn = extract_unsigned_integer (&prologue[vpc + 2], 2, byte_order); |
2e5ff58c TR |
568 | /* ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) */ |
569 | if ((insn & 0xf0f0) == 0xe0d0) | |
570 | { | |
571 | locals |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8; | |
4e99ad69 TG |
572 | if (vpc + 4 + sizeof (img) < len |
573 | && memcmp (prologue + vpc + 4, img, sizeof (img)) == 0) | |
2e5ff58c | 574 | { |
dda83cd7 SM |
575 | info->prologue_type = AVR_PROLOGUE_MAIN; |
576 | info->base = locals; | |
577 | return pc_beg + 4; | |
2e5ff58c TR |
578 | } |
579 | } | |
580 | } | |
8818c391 | 581 | } |
2e5ff58c | 582 | |
4add8633 TR |
583 | /* Scanning `-mcall-prologues' prologue |
584 | Classic prologue is 10 bytes, mega prologue is a 12 bytes long */ | |
8818c391 | 585 | |
e3d8b004 | 586 | while (1) /* Using a while to avoid many goto's */ |
8818c391 TR |
587 | { |
588 | int loc_size; | |
589 | int body_addr; | |
590 | unsigned num_pushes; | |
4add8633 | 591 | int pc_offset = 0; |
2e5ff58c | 592 | |
4e99ad69 TG |
593 | /* At least the fifth instruction must have been executed to |
594 | modify frame shape. */ | |
595 | if (len < 10) | |
596 | break; | |
597 | ||
e17a4113 | 598 | insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order); |
8818c391 | 599 | /* ldi r26,<LOCALS_SIZE> */ |
2e5ff58c TR |
600 | if ((insn & 0xf0f0) != 0xe0a0) |
601 | break; | |
8818c391 | 602 | loc_size = (insn & 0xf) | ((insn & 0x0f00) >> 4); |
4add8633 | 603 | pc_offset += 2; |
2e5ff58c | 604 | |
e17a4113 | 605 | insn = extract_unsigned_integer (&prologue[vpc + 2], 2, byte_order); |
8818c391 TR |
606 | /* ldi r27,<LOCALS_SIZE> / 256 */ |
607 | if ((insn & 0xf0f0) != 0xe0b0) | |
2e5ff58c | 608 | break; |
8818c391 | 609 | loc_size |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8; |
4add8633 | 610 | pc_offset += 2; |
2e5ff58c | 611 | |
e17a4113 | 612 | insn = extract_unsigned_integer (&prologue[vpc + 4], 2, byte_order); |
8818c391 TR |
613 | /* ldi r30,pm_lo8(.L_foo_body) */ |
614 | if ((insn & 0xf0f0) != 0xe0e0) | |
2e5ff58c | 615 | break; |
8818c391 | 616 | body_addr = (insn & 0xf) | ((insn & 0x0f00) >> 4); |
4add8633 | 617 | pc_offset += 2; |
8818c391 | 618 | |
e17a4113 | 619 | insn = extract_unsigned_integer (&prologue[vpc + 6], 2, byte_order); |
8818c391 TR |
620 | /* ldi r31,pm_hi8(.L_foo_body) */ |
621 | if ((insn & 0xf0f0) != 0xe0f0) | |
2e5ff58c | 622 | break; |
8818c391 | 623 | body_addr |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8; |
4add8633 | 624 | pc_offset += 2; |
8818c391 | 625 | |
8818c391 | 626 | msymbol = lookup_minimal_symbol ("__prologue_saves__", NULL, NULL); |
3b7344d5 | 627 | if (!msymbol.minsym) |
2e5ff58c | 628 | break; |
8818c391 | 629 | |
e17a4113 | 630 | insn = extract_unsigned_integer (&prologue[vpc + 8], 2, byte_order); |
8818c391 | 631 | /* rjmp __prologue_saves__+RRR */ |
e3d8b004 | 632 | if ((insn & 0xf000) == 0xc000) |
dda83cd7 SM |
633 | { |
634 | /* Extract PC relative offset from RJMP */ | |
635 | i = (insn & 0xfff) | (insn & 0x800 ? (-1 ^ 0xfff) : 0); | |
636 | /* Convert offset to byte addressable mode */ | |
637 | i *= 2; | |
638 | /* Destination address */ | |
639 | i += pc_beg + 10; | |
640 | ||
641 | if (body_addr != (pc_beg + 10)/2) | |
642 | break; | |
643 | ||
644 | pc_offset += 2; | |
645 | } | |
e3d8b004 | 646 | else if ((insn & 0xfe0e) == 0x940c) |
dda83cd7 SM |
647 | { |
648 | /* Extract absolute PC address from JMP */ | |
649 | i = (((insn & 0x1) | ((insn & 0x1f0) >> 3) << 16) | |
e17a4113 UW |
650 | | (extract_unsigned_integer (&prologue[vpc + 10], 2, byte_order) |
651 | & 0xffff)); | |
dda83cd7 SM |
652 | /* Convert address to byte addressable mode */ |
653 | i *= 2; | |
e3d8b004 | 654 | |
dda83cd7 SM |
655 | if (body_addr != (pc_beg + 12)/2) |
656 | break; | |
4add8633 | 657 | |
dda83cd7 SM |
658 | pc_offset += 4; |
659 | } | |
e3d8b004 | 660 | else |
dda83cd7 | 661 | break; |
2e5ff58c | 662 | |
4add8633 | 663 | /* Resolve offset (in words) from __prologue_saves__ symbol. |
dda83cd7 | 664 | Which is a pushes count in `-mcall-prologues' mode */ |
4aeddc50 | 665 | num_pushes = AVR_MAX_PUSHES - (i - msymbol.value_address ()) / 2; |
8818c391 TR |
666 | |
667 | if (num_pushes > AVR_MAX_PUSHES) | |
dda83cd7 | 668 | { |
6cb06a8c TT |
669 | gdb_printf (gdb_stderr, _("Num pushes too large: %d\n"), |
670 | num_pushes); | |
dda83cd7 SM |
671 | num_pushes = 0; |
672 | } | |
2e5ff58c | 673 | |
8818c391 | 674 | if (num_pushes) |
2e5ff58c TR |
675 | { |
676 | int from; | |
4add8633 | 677 | |
098caef4 | 678 | info->saved_regs[AVR_FP_REGNUM + 1].set_addr (num_pushes); |
2e5ff58c | 679 | if (num_pushes >= 2) |
098caef4 | 680 | info->saved_regs[AVR_FP_REGNUM].set_addr (num_pushes - 1); |
4add8633 | 681 | |
2e5ff58c TR |
682 | i = 0; |
683 | for (from = AVR_LAST_PUSHED_REGNUM + 1 - (num_pushes - 2); | |
684 | from <= AVR_LAST_PUSHED_REGNUM; ++from) | |
098caef4 | 685 | info->saved_regs [from].set_addr (++i); |
2e5ff58c | 686 | } |
4add8633 TR |
687 | info->size = loc_size + num_pushes; |
688 | info->prologue_type = AVR_PROLOGUE_CALL; | |
689 | ||
4e99ad69 | 690 | return pc_beg + pc_offset; |
8818c391 TR |
691 | } |
692 | ||
4add8633 TR |
693 | /* Scan for the beginning of the prologue for an interrupt or signal |
694 | function. Note that we have to set the prologue type here since the | |
695 | third stage of the prologue may not be present (e.g. no saved registered | |
696 | or changing of the SP register). */ | |
8818c391 | 697 | |
4add8633 | 698 | if (1) |
8818c391 | 699 | { |
4e99ad69 | 700 | static const unsigned char img[] = { |
2e5ff58c TR |
701 | 0x78, 0x94, /* sei */ |
702 | 0x1f, 0x92, /* push r1 */ | |
703 | 0x0f, 0x92, /* push r0 */ | |
704 | 0x0f, 0xb6, /* in r0,0x3f SREG */ | |
705 | 0x0f, 0x92, /* push r0 */ | |
706 | 0x11, 0x24 /* clr r1 */ | |
8818c391 | 707 | }; |
4e99ad69 TG |
708 | if (len >= sizeof (img) |
709 | && memcmp (prologue, img, sizeof (img)) == 0) | |
2e5ff58c | 710 | { |
dda83cd7 | 711 | info->prologue_type = AVR_PROLOGUE_INTR; |
2e5ff58c | 712 | vpc += sizeof (img); |
098caef4 LM |
713 | info->saved_regs[AVR_SREG_REGNUM].set_addr (3); |
714 | info->saved_regs[0].set_addr (2); | |
715 | info->saved_regs[1].set_addr (1); | |
dda83cd7 | 716 | info->size += 3; |
2e5ff58c | 717 | } |
4e99ad69 TG |
718 | else if (len >= sizeof (img) - 2 |
719 | && memcmp (img + 2, prologue, sizeof (img) - 2) == 0) | |
2e5ff58c | 720 | { |
dda83cd7 SM |
721 | info->prologue_type = AVR_PROLOGUE_SIG; |
722 | vpc += sizeof (img) - 2; | |
098caef4 LM |
723 | info->saved_regs[AVR_SREG_REGNUM].set_addr (3); |
724 | info->saved_regs[0].set_addr (2); | |
725 | info->saved_regs[1].set_addr (1); | |
dda83cd7 | 726 | info->size += 2; |
2e5ff58c | 727 | } |
8818c391 TR |
728 | } |
729 | ||
730 | /* First stage of the prologue scanning. | |
4add8633 | 731 | Scan pushes (saved registers) */ |
8818c391 | 732 | |
4e99ad69 | 733 | for (; vpc < len; vpc += 2) |
8818c391 | 734 | { |
e17a4113 | 735 | insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order); |
2e5ff58c TR |
736 | if ((insn & 0xfe0f) == 0x920f) /* push rXX */ |
737 | { | |
0963b4bd | 738 | /* Bits 4-9 contain a mask for registers R0-R32. */ |
4add8633 TR |
739 | int regno = (insn & 0x1f0) >> 4; |
740 | info->size++; | |
098caef4 | 741 | info->saved_regs[regno].set_addr (info->size); |
2e5ff58c TR |
742 | scan_stage = 1; |
743 | } | |
8818c391 | 744 | else |
2e5ff58c | 745 | break; |
8818c391 TR |
746 | } |
747 | ||
243e2c5d | 748 | gdb_assert (vpc < AVR_MAX_PROLOGUE_SIZE); |
4add8633 | 749 | |
1bd0bb72 | 750 | /* Handle static small stack allocation using rcall or push. */ |
08106042 | 751 | avr_gdbarch_tdep *tdep = gdbarch_tdep<avr_gdbarch_tdep> (gdbarch); |
1bd0bb72 TG |
752 | while (scan_stage == 1 && vpc < len) |
753 | { | |
754 | insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order); | |
755 | if (insn == 0xd000) /* rcall .+0 */ | |
dda83cd7 | 756 | { |
345bd07c | 757 | info->size += tdep->call_length; |
dda83cd7 SM |
758 | vpc += 2; |
759 | } | |
7588d2ec | 760 | else if (insn == 0x920f || insn == 0x921f) /* push r0 or push r1 */ |
dda83cd7 SM |
761 | { |
762 | info->size += 1; | |
763 | vpc += 2; | |
764 | } | |
1bd0bb72 | 765 | else |
dda83cd7 | 766 | break; |
1bd0bb72 TG |
767 | } |
768 | ||
8818c391 TR |
769 | /* Second stage of the prologue scanning. |
770 | Scan: | |
771 | in r28,__SP_L__ | |
772 | in r29,__SP_H__ */ | |
773 | ||
4e99ad69 | 774 | if (scan_stage == 1 && vpc < len) |
8818c391 | 775 | { |
4e99ad69 | 776 | static const unsigned char img[] = { |
2e5ff58c TR |
777 | 0xcd, 0xb7, /* in r28,__SP_L__ */ |
778 | 0xde, 0xb7 /* in r29,__SP_H__ */ | |
8818c391 | 779 | }; |
2e5ff58c | 780 | |
4e99ad69 TG |
781 | if (vpc + sizeof (img) < len |
782 | && memcmp (prologue + vpc, img, sizeof (img)) == 0) | |
2e5ff58c TR |
783 | { |
784 | vpc += 4; | |
2e5ff58c TR |
785 | scan_stage = 2; |
786 | } | |
8818c391 TR |
787 | } |
788 | ||
0963b4bd | 789 | /* Third stage of the prologue scanning. (Really two stages). |
8818c391 TR |
790 | Scan for: |
791 | sbiw r28,XX or subi r28,lo8(XX) | |
dda83cd7 | 792 | sbci r29,hi8(XX) |
8818c391 TR |
793 | in __tmp_reg__,__SREG__ |
794 | cli | |
e3d8b004 | 795 | out __SP_H__,r29 |
8818c391 | 796 | out __SREG__,__tmp_reg__ |
e3d8b004 | 797 | out __SP_L__,r28 */ |
8818c391 | 798 | |
4e99ad69 | 799 | if (scan_stage == 2 && vpc < len) |
8818c391 TR |
800 | { |
801 | int locals_size = 0; | |
4e99ad69 | 802 | static const unsigned char img[] = { |
2e5ff58c TR |
803 | 0x0f, 0xb6, /* in r0,0x3f */ |
804 | 0xf8, 0x94, /* cli */ | |
e3d8b004 | 805 | 0xde, 0xbf, /* out 0x3e,r29 ; SPH */ |
2e5ff58c | 806 | 0x0f, 0xbe, /* out 0x3f,r0 ; SREG */ |
e3d8b004 | 807 | 0xcd, 0xbf /* out 0x3d,r28 ; SPL */ |
8818c391 | 808 | }; |
4e99ad69 | 809 | static const unsigned char img_sig[] = { |
e3d8b004 TR |
810 | 0xde, 0xbf, /* out 0x3e,r29 ; SPH */ |
811 | 0xcd, 0xbf /* out 0x3d,r28 ; SPL */ | |
8818c391 | 812 | }; |
4e99ad69 | 813 | static const unsigned char img_int[] = { |
2e5ff58c | 814 | 0xf8, 0x94, /* cli */ |
e3d8b004 | 815 | 0xde, 0xbf, /* out 0x3e,r29 ; SPH */ |
2e5ff58c | 816 | 0x78, 0x94, /* sei */ |
e3d8b004 | 817 | 0xcd, 0xbf /* out 0x3d,r28 ; SPL */ |
8818c391 | 818 | }; |
2e5ff58c | 819 | |
e17a4113 | 820 | insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order); |
2e5ff58c | 821 | if ((insn & 0xff30) == 0x9720) /* sbiw r28,XXX */ |
dda83cd7 SM |
822 | { |
823 | locals_size = (insn & 0xf) | ((insn & 0xc0) >> 2); | |
824 | vpc += 2; | |
825 | } | |
2e5ff58c TR |
826 | else if ((insn & 0xf0f0) == 0x50c0) /* subi r28,lo8(XX) */ |
827 | { | |
828 | locals_size = (insn & 0xf) | ((insn & 0xf00) >> 4); | |
1bd0bb72 | 829 | vpc += 2; |
e17a4113 | 830 | insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order); |
2e5ff58c | 831 | vpc += 2; |
1bd0bb72 | 832 | locals_size += ((insn & 0xf) | ((insn & 0xf00) >> 4)) << 8; |
2e5ff58c | 833 | } |
8818c391 | 834 | else |
dda83cd7 | 835 | return pc_beg + vpc; |
4add8633 | 836 | |
0963b4bd | 837 | /* Scan the last part of the prologue. May not be present for interrupt |
dda83cd7 SM |
838 | or signal handler functions, which is why we set the prologue type |
839 | when we saw the beginning of the prologue previously. */ | |
4add8633 | 840 | |
4e99ad69 TG |
841 | if (vpc + sizeof (img_sig) < len |
842 | && memcmp (prologue + vpc, img_sig, sizeof (img_sig)) == 0) | |
dda83cd7 SM |
843 | { |
844 | vpc += sizeof (img_sig); | |
845 | } | |
4e99ad69 TG |
846 | else if (vpc + sizeof (img_int) < len |
847 | && memcmp (prologue + vpc, img_int, sizeof (img_int)) == 0) | |
dda83cd7 SM |
848 | { |
849 | vpc += sizeof (img_int); | |
850 | } | |
4e99ad69 TG |
851 | if (vpc + sizeof (img) < len |
852 | && memcmp (prologue + vpc, img, sizeof (img)) == 0) | |
dda83cd7 SM |
853 | { |
854 | info->prologue_type = AVR_PROLOGUE_NORMAL; | |
855 | vpc += sizeof (img); | |
856 | } | |
4add8633 TR |
857 | |
858 | info->size += locals_size; | |
859 | ||
4e99ad69 | 860 | /* Fall through. */ |
8818c391 | 861 | } |
4add8633 TR |
862 | |
863 | /* If we got this far, we could not scan the prologue, so just return the pc | |
864 | of the frame plus an adjustment for argument move insns. */ | |
865 | ||
4e99ad69 TG |
866 | for (; vpc < len; vpc += 2) |
867 | { | |
e17a4113 | 868 | insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order); |
4e99ad69 | 869 | if ((insn & 0xff00) == 0x0100) /* movw rXX, rYY */ |
dda83cd7 | 870 | continue; |
4e99ad69 | 871 | else if ((insn & 0xfc00) == 0x2c00) /* mov rXX, rYY */ |
dda83cd7 | 872 | continue; |
4e99ad69 | 873 | else |
dda83cd7 | 874 | break; |
4e99ad69 TG |
875 | } |
876 | ||
877 | return pc_beg + vpc; | |
8818c391 TR |
878 | } |
879 | ||
4add8633 | 880 | static CORE_ADDR |
6093d2eb | 881 | avr_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) |
4add8633 TR |
882 | { |
883 | CORE_ADDR func_addr, func_end; | |
8c201e54 | 884 | CORE_ADDR post_prologue_pc; |
8818c391 | 885 | |
4add8633 | 886 | /* See what the symbol table says */ |
8818c391 | 887 | |
8c201e54 TG |
888 | if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end)) |
889 | return pc; | |
2e5ff58c | 890 | |
8c201e54 TG |
891 | post_prologue_pc = skip_prologue_using_sal (gdbarch, func_addr); |
892 | if (post_prologue_pc != 0) | |
325fac50 | 893 | return std::max (pc, post_prologue_pc); |
8818c391 | 894 | |
8c201e54 TG |
895 | { |
896 | CORE_ADDR prologue_end = pc; | |
897 | struct avr_unwind_cache info = {0}; | |
098caef4 | 898 | trad_frame_saved_reg saved_regs[AVR_NUM_REGS]; |
8818c391 | 899 | |
8c201e54 TG |
900 | info.saved_regs = saved_regs; |
901 | ||
902 | /* Need to run the prologue scanner to figure out if the function has a | |
903 | prologue and possibly skip over moving arguments passed via registers | |
904 | to other registers. */ | |
905 | ||
906 | prologue_end = avr_scan_prologue (gdbarch, func_addr, func_end, &info); | |
907 | ||
908 | if (info.prologue_type != AVR_PROLOGUE_NONE) | |
909 | return prologue_end; | |
910 | } | |
2e5ff58c | 911 | |
4e99ad69 TG |
912 | /* Either we didn't find the start of this function (nothing we can do), |
913 | or there's no line info, or the line after the prologue is after | |
0963b4bd | 914 | the end of the function (there probably isn't a prologue). */ |
2e5ff58c | 915 | |
8c201e54 | 916 | return pc; |
4add8633 | 917 | } |
8818c391 | 918 | |
0963b4bd MS |
919 | /* Not all avr devices support the BREAK insn. Those that don't should treat |
920 | it as a NOP. Thus, it should be ok. Since the avr is currently a remote | |
921 | only target, this shouldn't be a problem (I hope). TRoth/2003-05-14 */ | |
8818c391 | 922 | |
04180708 | 923 | constexpr gdb_byte avr_break_insn [] = { 0x98, 0x95 }; |
598cc9dc | 924 | |
04180708 | 925 | typedef BP_MANIPULATION (avr_break_insn) avr_breakpoint; |
8818c391 | 926 | |
4c8b6ae0 UW |
927 | /* Determine, for architecture GDBARCH, how a return value of TYPE |
928 | should be returned. If it is supposed to be returned in registers, | |
929 | and READBUF is non-zero, read the appropriate value from REGCACHE, | |
930 | and copy it into READBUF. If WRITEBUF is non-zero, write the value | |
931 | from WRITEBUF into REGCACHE. */ | |
932 | ||
63807e1d | 933 | static enum return_value_convention |
6a3a010b | 934 | avr_return_value (struct gdbarch *gdbarch, struct value *function, |
c055b101 CV |
935 | struct type *valtype, struct regcache *regcache, |
936 | gdb_byte *readbuf, const gdb_byte *writebuf) | |
4c8b6ae0 | 937 | { |
1bd0bb72 TG |
938 | int i; |
939 | /* Single byte are returned in r24. | |
940 | Otherwise, the MSB of the return value is always in r25, calculate which | |
941 | register holds the LSB. */ | |
942 | int lsb_reg; | |
943 | ||
78134374 SM |
944 | if ((valtype->code () == TYPE_CODE_STRUCT |
945 | || valtype->code () == TYPE_CODE_UNION | |
946 | || valtype->code () == TYPE_CODE_ARRAY) | |
df86565b | 947 | && valtype->length () > 8) |
1bd0bb72 TG |
948 | return RETURN_VALUE_STRUCT_CONVENTION; |
949 | ||
df86565b | 950 | if (valtype->length () <= 2) |
1bd0bb72 | 951 | lsb_reg = 24; |
df86565b | 952 | else if (valtype->length () <= 4) |
1bd0bb72 | 953 | lsb_reg = 22; |
df86565b | 954 | else if (valtype->length () <= 8) |
1bd0bb72 TG |
955 | lsb_reg = 18; |
956 | else | |
f3574227 | 957 | gdb_assert_not_reached ("unexpected type length"); |
4c8b6ae0 UW |
958 | |
959 | if (writebuf != NULL) | |
960 | { | |
df86565b | 961 | for (i = 0; i < valtype->length (); i++) |
b66f5587 | 962 | regcache->cooked_write (lsb_reg + i, writebuf + i); |
4c8b6ae0 UW |
963 | } |
964 | ||
965 | if (readbuf != NULL) | |
966 | { | |
df86565b | 967 | for (i = 0; i < valtype->length (); i++) |
dca08e1f | 968 | regcache->cooked_read (lsb_reg + i, readbuf + i); |
4c8b6ae0 UW |
969 | } |
970 | ||
1bd0bb72 | 971 | return RETURN_VALUE_REGISTER_CONVENTION; |
4c8b6ae0 UW |
972 | } |
973 | ||
974 | ||
4add8633 TR |
975 | /* Put here the code to store, into fi->saved_regs, the addresses of |
976 | the saved registers of frame described by FRAME_INFO. This | |
977 | includes special registers such as pc and fp saved in special ways | |
978 | in the stack frame. sp is even more special: the address we return | |
0963b4bd | 979 | for it IS the sp for the next frame. */ |
8818c391 | 980 | |
63807e1d | 981 | static struct avr_unwind_cache * |
bd2b40ac | 982 | avr_frame_unwind_cache (frame_info_ptr this_frame, |
dda83cd7 | 983 | void **this_prologue_cache) |
8818c391 | 984 | { |
4e99ad69 | 985 | CORE_ADDR start_pc, current_pc; |
4add8633 TR |
986 | ULONGEST prev_sp; |
987 | ULONGEST this_base; | |
988 | struct avr_unwind_cache *info; | |
4e99ad69 | 989 | struct gdbarch *gdbarch; |
4add8633 TR |
990 | int i; |
991 | ||
4e99ad69 | 992 | if (*this_prologue_cache) |
9a3c8263 | 993 | return (struct avr_unwind_cache *) *this_prologue_cache; |
4add8633 TR |
994 | |
995 | info = FRAME_OBSTACK_ZALLOC (struct avr_unwind_cache); | |
4e99ad69 | 996 | *this_prologue_cache = info; |
94afd7a6 | 997 | info->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
4add8633 TR |
998 | |
999 | info->size = 0; | |
1000 | info->prologue_type = AVR_PROLOGUE_NONE; | |
1001 | ||
4e99ad69 TG |
1002 | start_pc = get_frame_func (this_frame); |
1003 | current_pc = get_frame_pc (this_frame); | |
1004 | if ((start_pc > 0) && (start_pc <= current_pc)) | |
e17a4113 UW |
1005 | avr_scan_prologue (get_frame_arch (this_frame), |
1006 | start_pc, current_pc, info); | |
4add8633 | 1007 | |
3b85b0f1 TR |
1008 | if ((info->prologue_type != AVR_PROLOGUE_NONE) |
1009 | && (info->prologue_type != AVR_PROLOGUE_MAIN)) | |
4add8633 TR |
1010 | { |
1011 | ULONGEST high_base; /* High byte of FP */ | |
1012 | ||
1013 | /* The SP was moved to the FP. This indicates that a new frame | |
dda83cd7 SM |
1014 | was created. Get THIS frame's FP value by unwinding it from |
1015 | the next frame. */ | |
94afd7a6 | 1016 | this_base = get_frame_register_unsigned (this_frame, AVR_FP_REGNUM); |
4e99ad69 | 1017 | high_base = get_frame_register_unsigned (this_frame, AVR_FP_REGNUM + 1); |
4add8633 TR |
1018 | this_base += (high_base << 8); |
1019 | ||
1020 | /* The FP points at the last saved register. Adjust the FP back | |
dda83cd7 | 1021 | to before the first saved register giving the SP. */ |
4add8633 TR |
1022 | prev_sp = this_base + info->size; |
1023 | } | |
8818c391 | 1024 | else |
4add8633 TR |
1025 | { |
1026 | /* Assume that the FP is this frame's SP but with that pushed | |
dda83cd7 | 1027 | stack space added back. */ |
94afd7a6 | 1028 | this_base = get_frame_register_unsigned (this_frame, AVR_SP_REGNUM); |
4add8633 TR |
1029 | prev_sp = this_base + info->size; |
1030 | } | |
1031 | ||
1032 | /* Add 1 here to adjust for the post-decrement nature of the push | |
1033 | instruction.*/ | |
4e99ad69 | 1034 | info->prev_sp = avr_make_saddr (prev_sp + 1); |
4add8633 TR |
1035 | info->base = avr_make_saddr (this_base); |
1036 | ||
4e99ad69 TG |
1037 | gdbarch = get_frame_arch (this_frame); |
1038 | ||
4add8633 | 1039 | /* Adjust all the saved registers so that they contain addresses and not |
3b85b0f1 | 1040 | offsets. */ |
4e99ad69 | 1041 | for (i = 0; i < gdbarch_num_regs (gdbarch) - 1; i++) |
306b445a | 1042 | if (info->saved_regs[i].is_addr ()) |
098caef4 LM |
1043 | info->saved_regs[i].set_addr (info->prev_sp |
1044 | - info->saved_regs[i].addr ()); | |
4add8633 TR |
1045 | |
1046 | /* Except for the main and startup code, the return PC is always saved on | |
0963b4bd | 1047 | the stack and is at the base of the frame. */ |
4add8633 TR |
1048 | |
1049 | if (info->prologue_type != AVR_PROLOGUE_MAIN) | |
098caef4 | 1050 | info->saved_regs[AVR_PC_REGNUM].set_addr (info->prev_sp); |
4add8633 | 1051 | |
3b85b0f1 TR |
1052 | /* The previous frame's SP needed to be computed. Save the computed |
1053 | value. */ | |
08106042 | 1054 | avr_gdbarch_tdep *tdep = gdbarch_tdep<avr_gdbarch_tdep> (gdbarch); |
a9a87d35 LM |
1055 | info->saved_regs[AVR_SP_REGNUM].set_value (info->prev_sp |
1056 | - 1 + tdep->call_length); | |
3b85b0f1 | 1057 | |
4add8633 | 1058 | return info; |
8818c391 TR |
1059 | } |
1060 | ||
1061 | static CORE_ADDR | |
bd2b40ac | 1062 | avr_unwind_pc (struct gdbarch *gdbarch, frame_info_ptr next_frame) |
8818c391 | 1063 | { |
4add8633 TR |
1064 | ULONGEST pc; |
1065 | ||
11411de3 | 1066 | pc = frame_unwind_register_unsigned (next_frame, AVR_PC_REGNUM); |
4add8633 TR |
1067 | |
1068 | return avr_make_iaddr (pc); | |
8818c391 TR |
1069 | } |
1070 | ||
30244cd8 | 1071 | static CORE_ADDR |
bd2b40ac | 1072 | avr_unwind_sp (struct gdbarch *gdbarch, frame_info_ptr next_frame) |
30244cd8 UW |
1073 | { |
1074 | ULONGEST sp; | |
1075 | ||
11411de3 | 1076 | sp = frame_unwind_register_unsigned (next_frame, AVR_SP_REGNUM); |
30244cd8 UW |
1077 | |
1078 | return avr_make_saddr (sp); | |
1079 | } | |
1080 | ||
4add8633 TR |
1081 | /* Given a GDB frame, determine the address of the calling function's |
1082 | frame. This will be used to create a new GDB frame struct. */ | |
8818c391 | 1083 | |
4add8633 | 1084 | static void |
bd2b40ac | 1085 | avr_frame_this_id (frame_info_ptr this_frame, |
dda83cd7 SM |
1086 | void **this_prologue_cache, |
1087 | struct frame_id *this_id) | |
8818c391 | 1088 | { |
4add8633 | 1089 | struct avr_unwind_cache *info |
94afd7a6 | 1090 | = avr_frame_unwind_cache (this_frame, this_prologue_cache); |
4add8633 TR |
1091 | CORE_ADDR base; |
1092 | CORE_ADDR func; | |
1093 | struct frame_id id; | |
1094 | ||
1095 | /* The FUNC is easy. */ | |
94afd7a6 | 1096 | func = get_frame_func (this_frame); |
4add8633 | 1097 | |
4add8633 TR |
1098 | /* Hopefully the prologue analysis either correctly determined the |
1099 | frame's base (which is the SP from the previous frame), or set | |
1100 | that base to "NULL". */ | |
1101 | base = info->prev_sp; | |
1102 | if (base == 0) | |
1103 | return; | |
1104 | ||
1105 | id = frame_id_build (base, func); | |
4add8633 | 1106 | (*this_id) = id; |
8818c391 TR |
1107 | } |
1108 | ||
94afd7a6 | 1109 | static struct value * |
bd2b40ac | 1110 | avr_frame_prev_register (frame_info_ptr this_frame, |
4e99ad69 | 1111 | void **this_prologue_cache, int regnum) |
8818c391 | 1112 | { |
4add8633 | 1113 | struct avr_unwind_cache *info |
94afd7a6 | 1114 | = avr_frame_unwind_cache (this_frame, this_prologue_cache); |
8818c391 | 1115 | |
7d2552b4 | 1116 | if (regnum == AVR_PC_REGNUM || regnum == AVR_PSEUDO_PC_REGNUM) |
3b85b0f1 | 1117 | { |
a9a87d35 | 1118 | if (info->saved_regs[AVR_PC_REGNUM].is_addr ()) |
dda83cd7 | 1119 | { |
94afd7a6 UW |
1120 | /* Reading the return PC from the PC register is slightly |
1121 | abnormal. register_size(AVR_PC_REGNUM) says it is 4 bytes, | |
1122 | but in reality, only two bytes (3 in upcoming mega256) are | |
1123 | stored on the stack. | |
1124 | ||
1125 | Also, note that the value on the stack is an addr to a word | |
1126 | not a byte, so we will need to multiply it by two at some | |
1127 | point. | |
1128 | ||
1129 | And to confuse matters even more, the return address stored | |
1130 | on the stack is in big endian byte order, even though most | |
0963b4bd | 1131 | everything else about the avr is little endian. Ick! */ |
94afd7a6 | 1132 | ULONGEST pc; |
4e99ad69 | 1133 | int i; |
e362b510 | 1134 | gdb_byte buf[3]; |
4e99ad69 | 1135 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
08106042 | 1136 | avr_gdbarch_tdep *tdep = gdbarch_tdep<avr_gdbarch_tdep> (gdbarch); |
94afd7a6 | 1137 | |
098caef4 | 1138 | read_memory (info->saved_regs[AVR_PC_REGNUM].addr (), |
dda83cd7 | 1139 | buf, tdep->call_length); |
94afd7a6 | 1140 | |
4e99ad69 TG |
1141 | /* Extract the PC read from memory as a big-endian. */ |
1142 | pc = 0; | |
1143 | for (i = 0; i < tdep->call_length; i++) | |
1144 | pc = (pc << 8) | buf[i]; | |
94afd7a6 | 1145 | |
dda83cd7 SM |
1146 | if (regnum == AVR_PC_REGNUM) |
1147 | pc <<= 1; | |
7d2552b4 TG |
1148 | |
1149 | return frame_unwind_got_constant (this_frame, regnum, pc); | |
dda83cd7 | 1150 | } |
94afd7a6 UW |
1151 | |
1152 | return frame_unwind_got_optimized (this_frame, regnum); | |
3b85b0f1 | 1153 | } |
94afd7a6 UW |
1154 | |
1155 | return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum); | |
4add8633 | 1156 | } |
8818c391 | 1157 | |
4add8633 | 1158 | static const struct frame_unwind avr_frame_unwind = { |
a154d838 | 1159 | "avr prologue", |
4add8633 | 1160 | NORMAL_FRAME, |
8fbca658 | 1161 | default_frame_unwind_stop_reason, |
4add8633 | 1162 | avr_frame_this_id, |
94afd7a6 UW |
1163 | avr_frame_prev_register, |
1164 | NULL, | |
1165 | default_frame_sniffer | |
4add8633 TR |
1166 | }; |
1167 | ||
8818c391 | 1168 | static CORE_ADDR |
bd2b40ac | 1169 | avr_frame_base_address (frame_info_ptr this_frame, void **this_cache) |
8818c391 | 1170 | { |
4add8633 | 1171 | struct avr_unwind_cache *info |
94afd7a6 | 1172 | = avr_frame_unwind_cache (this_frame, this_cache); |
8818c391 | 1173 | |
4add8633 TR |
1174 | return info->base; |
1175 | } | |
8818c391 | 1176 | |
4add8633 TR |
1177 | static const struct frame_base avr_frame_base = { |
1178 | &avr_frame_unwind, | |
1179 | avr_frame_base_address, | |
1180 | avr_frame_base_address, | |
1181 | avr_frame_base_address | |
1182 | }; | |
ced15480 | 1183 | |
94afd7a6 UW |
1184 | /* Assuming THIS_FRAME is a dummy, return the frame ID of that dummy |
1185 | frame. The frame ID's base needs to match the TOS value saved by | |
1186 | save_dummy_frame_tos(), and the PC match the dummy frame's breakpoint. */ | |
8818c391 | 1187 | |
4add8633 | 1188 | static struct frame_id |
bd2b40ac | 1189 | avr_dummy_id (struct gdbarch *gdbarch, frame_info_ptr this_frame) |
4add8633 TR |
1190 | { |
1191 | ULONGEST base; | |
8818c391 | 1192 | |
94afd7a6 UW |
1193 | base = get_frame_register_unsigned (this_frame, AVR_SP_REGNUM); |
1194 | return frame_id_build (avr_make_saddr (base), get_frame_pc (this_frame)); | |
8818c391 TR |
1195 | } |
1196 | ||
4add8633 | 1197 | /* When arguments must be pushed onto the stack, they go on in reverse |
0963b4bd | 1198 | order. The below implements a FILO (stack) to do this. */ |
8818c391 | 1199 | |
0fecb1a7 | 1200 | struct avr_stack_item |
4add8633 TR |
1201 | { |
1202 | int len; | |
0fecb1a7 | 1203 | struct avr_stack_item *prev; |
7c543f7b | 1204 | gdb_byte *data; |
4add8633 | 1205 | }; |
8818c391 | 1206 | |
0fecb1a7 TT |
1207 | static struct avr_stack_item * |
1208 | push_stack_item (struct avr_stack_item *prev, const bfd_byte *contents, | |
1209 | int len) | |
8818c391 | 1210 | { |
0fecb1a7 TT |
1211 | struct avr_stack_item *si; |
1212 | si = XNEW (struct avr_stack_item); | |
7c543f7b | 1213 | si->data = (gdb_byte *) xmalloc (len); |
4add8633 TR |
1214 | si->len = len; |
1215 | si->prev = prev; | |
1216 | memcpy (si->data, contents, len); | |
1217 | return si; | |
8818c391 TR |
1218 | } |
1219 | ||
0fecb1a7 TT |
1220 | static struct avr_stack_item * |
1221 | pop_stack_item (struct avr_stack_item *si) | |
8818c391 | 1222 | { |
0fecb1a7 | 1223 | struct avr_stack_item *dead = si; |
4add8633 TR |
1224 | si = si->prev; |
1225 | xfree (dead->data); | |
1226 | xfree (dead); | |
1227 | return si; | |
8818c391 TR |
1228 | } |
1229 | ||
8818c391 TR |
1230 | /* Setup the function arguments for calling a function in the inferior. |
1231 | ||
1232 | On the AVR architecture, there are 18 registers (R25 to R8) which are | |
1233 | dedicated for passing function arguments. Up to the first 18 arguments | |
1234 | (depending on size) may go into these registers. The rest go on the stack. | |
1235 | ||
4add8633 | 1236 | All arguments are aligned to start in even-numbered registers (odd-sized |
0963b4bd | 1237 | arguments, including char, have one free register above them). For example, |
4add8633 TR |
1238 | an int in arg1 and a char in arg2 would be passed as such: |
1239 | ||
1240 | arg1 -> r25:r24 | |
1241 | arg2 -> r22 | |
1242 | ||
1243 | Arguments that are larger than 2 bytes will be split between two or more | |
1244 | registers as available, but will NOT be split between a register and the | |
0963b4bd | 1245 | stack. Arguments that go onto the stack are pushed last arg first (this is |
4add8633 TR |
1246 | similar to the d10v). */ |
1247 | ||
1248 | /* NOTE: TRoth/2003-06-17: The rest of this comment is old looks to be | |
1249 | inaccurate. | |
8818c391 TR |
1250 | |
1251 | An exceptional case exists for struct arguments (and possibly other | |
1252 | aggregates such as arrays) -- if the size is larger than WORDSIZE bytes but | |
1253 | not a multiple of WORDSIZE bytes. In this case the argument is never split | |
1254 | between the registers and the stack, but instead is copied in its entirety | |
1255 | onto the stack, AND also copied into as many registers as there is room | |
1256 | for. In other words, space in registers permitting, two copies of the same | |
1257 | argument are passed in. As far as I can tell, only the one on the stack is | |
1258 | used, although that may be a function of the level of compiler | |
1259 | optimization. I suspect this is a compiler bug. Arguments of these odd | |
1260 | sizes are left-justified within the word (as opposed to arguments smaller | |
1261 | than WORDSIZE bytes, which are right-justified). | |
1262 | ||
1263 | If the function is to return an aggregate type such as a struct, the caller | |
1264 | must allocate space into which the callee will copy the return value. In | |
1265 | this case, a pointer to the return value location is passed into the callee | |
1266 | in register R0, which displaces one of the other arguments passed in via | |
0963b4bd | 1267 | registers R0 to R2. */ |
8818c391 TR |
1268 | |
1269 | static CORE_ADDR | |
7d9b040b | 1270 | avr_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
dda83cd7 SM |
1271 | struct regcache *regcache, CORE_ADDR bp_addr, |
1272 | int nargs, struct value **args, CORE_ADDR sp, | |
cf84fa6b AH |
1273 | function_call_return_method return_method, |
1274 | CORE_ADDR struct_addr) | |
8818c391 | 1275 | { |
4add8633 | 1276 | int i; |
e362b510 | 1277 | gdb_byte buf[3]; |
08106042 | 1278 | avr_gdbarch_tdep *tdep = gdbarch_tdep<avr_gdbarch_tdep> (gdbarch); |
345bd07c | 1279 | int call_length = tdep->call_length; |
4add8633 TR |
1280 | CORE_ADDR return_pc = avr_convert_iaddr_to_raw (bp_addr); |
1281 | int regnum = AVR_ARGN_REGNUM; | |
0fecb1a7 | 1282 | struct avr_stack_item *si = NULL; |
8818c391 | 1283 | |
cf84fa6b | 1284 | if (return_method == return_method_struct) |
8818c391 | 1285 | { |
fd6d6815 | 1286 | regcache_cooked_write_unsigned |
dda83cd7 | 1287 | (regcache, regnum--, (struct_addr >> 8) & 0xff); |
fd6d6815 | 1288 | regcache_cooked_write_unsigned |
dda83cd7 | 1289 | (regcache, regnum--, struct_addr & 0xff); |
fd6d6815 | 1290 | /* SP being post decremented, we need to reserve one byte so that the |
dda83cd7 | 1291 | return address won't overwrite the result (or vice-versa). */ |
fd6d6815 | 1292 | if (sp == struct_addr) |
dda83cd7 | 1293 | sp--; |
8818c391 TR |
1294 | } |
1295 | ||
4add8633 | 1296 | for (i = 0; i < nargs; i++) |
8818c391 | 1297 | { |
4add8633 TR |
1298 | int last_regnum; |
1299 | int j; | |
1300 | struct value *arg = args[i]; | |
4991999e | 1301 | struct type *type = check_typedef (value_type (arg)); |
50888e42 | 1302 | const bfd_byte *contents = value_contents (arg).data (); |
df86565b | 1303 | int len = type->length (); |
4add8633 | 1304 | |
cb86f388 | 1305 | /* Calculate the potential last register needed. |
dda83cd7 SM |
1306 | E.g. For length 2, registers regnum and regnum-1 (say 25 and 24) |
1307 | shall be used. So, last needed register will be regnum-1(24). */ | |
cb86f388 | 1308 | last_regnum = regnum - (len + (len & 1)) + 1; |
4add8633 | 1309 | |
0963b4bd | 1310 | /* If there are registers available, use them. Once we start putting |
dda83cd7 | 1311 | stuff on the stack, all subsequent args go on stack. */ |
cb86f388 | 1312 | if ((si == NULL) && (last_regnum >= AVR_LAST_ARG_REGNUM)) |
dda83cd7 SM |
1313 | { |
1314 | /* Skip a register for odd length args. */ | |
1315 | if (len & 1) | |
1316 | regnum--; | |
1317 | ||
1318 | /* Write MSB of argument into register and subsequent bytes in | |
1319 | decreasing register numbers. */ | |
1320 | for (j = 0; j < len; j++) | |
1321 | regcache_cooked_write_unsigned | |
1322 | (regcache, regnum--, contents[len - j - 1]); | |
1323 | } | |
0963b4bd | 1324 | /* No registers available, push the args onto the stack. */ |
4add8633 | 1325 | else |
dda83cd7 SM |
1326 | { |
1327 | /* From here on, we don't care about regnum. */ | |
1328 | si = push_stack_item (si, contents, len); | |
1329 | } | |
8818c391 | 1330 | } |
909cd28e | 1331 | |
0963b4bd | 1332 | /* Push args onto the stack. */ |
4add8633 TR |
1333 | while (si) |
1334 | { | |
1335 | sp -= si->len; | |
0963b4bd | 1336 | /* Add 1 to sp here to account for post decr nature of pushes. */ |
4e99ad69 | 1337 | write_memory (sp + 1, si->data, si->len); |
4add8633 TR |
1338 | si = pop_stack_item (si); |
1339 | } | |
3605c34a | 1340 | |
4add8633 TR |
1341 | /* Set the return address. For the avr, the return address is the BP_ADDR. |
1342 | Need to push the return address onto the stack noting that it needs to be | |
1343 | in big-endian order on the stack. */ | |
6d1915d4 TG |
1344 | for (i = 1; i <= call_length; i++) |
1345 | { | |
1346 | buf[call_length - i] = return_pc & 0xff; | |
1347 | return_pc >>= 8; | |
1348 | } | |
3605c34a | 1349 | |
6d1915d4 | 1350 | sp -= call_length; |
0963b4bd | 1351 | /* Use 'sp + 1' since pushes are post decr ops. */ |
6d1915d4 | 1352 | write_memory (sp + 1, buf, call_length); |
3605c34a | 1353 | |
0963b4bd | 1354 | /* Finally, update the SP register. */ |
4add8633 TR |
1355 | regcache_cooked_write_unsigned (regcache, AVR_SP_REGNUM, |
1356 | avr_convert_saddr_to_raw (sp)); | |
3605c34a | 1357 | |
6d1915d4 TG |
1358 | /* Return SP value for the dummy frame, where the return address hasn't been |
1359 | pushed. */ | |
1360 | return sp + call_length; | |
3605c34a TR |
1361 | } |
1362 | ||
53f6a2c9 TG |
1363 | /* Unfortunately dwarf2 register for SP is 32. */ |
1364 | ||
1365 | static int | |
1366 | avr_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg) | |
1367 | { | |
1368 | if (reg >= 0 && reg < 32) | |
1369 | return reg; | |
1370 | if (reg == 32) | |
1371 | return AVR_SP_REGNUM; | |
53f6a2c9 TG |
1372 | return -1; |
1373 | } | |
1374 | ||
487d9753 PL |
1375 | /* Implementation of `address_class_type_flags' gdbarch method. |
1376 | ||
1377 | This method maps DW_AT_address_class attributes to a | |
1378 | type_instance_flag_value. */ | |
1379 | ||
314ad88d | 1380 | static type_instance_flags |
487d9753 PL |
1381 | avr_address_class_type_flags (int byte_size, int dwarf2_addr_class) |
1382 | { | |
1383 | /* The value 1 of the DW_AT_address_class attribute corresponds to the | |
1384 | __flash qualifier. Note that this attribute is only valid with | |
1385 | pointer types and therefore the flag is set to the pointer type and | |
1386 | not its target type. */ | |
1387 | if (dwarf2_addr_class == 1 && byte_size == 2) | |
1388 | return AVR_TYPE_INSTANCE_FLAG_ADDRESS_CLASS_FLASH; | |
1389 | return 0; | |
1390 | } | |
1391 | ||
1392 | /* Implementation of `address_class_type_flags_to_name' gdbarch method. | |
1393 | ||
1394 | Convert a type_instance_flag_value to an address space qualifier. */ | |
1395 | ||
1396 | static const char* | |
314ad88d PA |
1397 | avr_address_class_type_flags_to_name (struct gdbarch *gdbarch, |
1398 | type_instance_flags type_flags) | |
487d9753 PL |
1399 | { |
1400 | if (type_flags & AVR_TYPE_INSTANCE_FLAG_ADDRESS_CLASS_FLASH) | |
1401 | return "flash"; | |
1402 | else | |
1403 | return NULL; | |
1404 | } | |
1405 | ||
1406 | /* Implementation of `address_class_name_to_type_flags' gdbarch method. | |
1407 | ||
1408 | Convert an address space qualifier to a type_instance_flag_value. */ | |
1409 | ||
314ad88d | 1410 | static bool |
487d9753 | 1411 | avr_address_class_name_to_type_flags (struct gdbarch *gdbarch, |
314ad88d PA |
1412 | const char* name, |
1413 | type_instance_flags *type_flags_ptr) | |
487d9753 PL |
1414 | { |
1415 | if (strcmp (name, "flash") == 0) | |
1416 | { | |
1417 | *type_flags_ptr = AVR_TYPE_INSTANCE_FLAG_ADDRESS_CLASS_FLASH; | |
314ad88d | 1418 | return true; |
487d9753 PL |
1419 | } |
1420 | else | |
314ad88d | 1421 | return false; |
487d9753 PL |
1422 | } |
1423 | ||
0963b4bd | 1424 | /* Initialize the gdbarch structure for the AVR's. */ |
8818c391 TR |
1425 | |
1426 | static struct gdbarch * | |
2e5ff58c TR |
1427 | avr_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
1428 | { | |
2e5ff58c | 1429 | struct gdbarch *gdbarch; |
4e99ad69 TG |
1430 | struct gdbarch_list *best_arch; |
1431 | int call_length; | |
8818c391 | 1432 | |
4e99ad69 | 1433 | /* Avr-6 call instructions save 3 bytes. */ |
8818c391 TR |
1434 | switch (info.bfd_arch_info->mach) |
1435 | { | |
1436 | case bfd_mach_avr1: | |
9c97a070 | 1437 | case bfd_mach_avrxmega1: |
8818c391 | 1438 | case bfd_mach_avr2: |
9c97a070 | 1439 | case bfd_mach_avrxmega2: |
8818c391 | 1440 | case bfd_mach_avr3: |
9c97a070 | 1441 | case bfd_mach_avrxmega3: |
8818c391 | 1442 | case bfd_mach_avr4: |
9c97a070 | 1443 | case bfd_mach_avrxmega4: |
8818c391 | 1444 | case bfd_mach_avr5: |
9c97a070 | 1445 | case bfd_mach_avrxmega5: |
4e99ad69 TG |
1446 | default: |
1447 | call_length = 2; | |
1448 | break; | |
1449 | case bfd_mach_avr6: | |
9c97a070 PL |
1450 | case bfd_mach_avrxmega6: |
1451 | case bfd_mach_avrxmega7: | |
4e99ad69 | 1452 | call_length = 3; |
8818c391 TR |
1453 | break; |
1454 | } | |
1455 | ||
4e99ad69 TG |
1456 | /* If there is already a candidate, use it. */ |
1457 | for (best_arch = gdbarch_list_lookup_by_info (arches, &info); | |
1458 | best_arch != NULL; | |
1459 | best_arch = gdbarch_list_lookup_by_info (best_arch->next, &info)) | |
1460 | { | |
345bd07c | 1461 | avr_gdbarch_tdep *tdep |
08106042 | 1462 | = gdbarch_tdep<avr_gdbarch_tdep> (best_arch->gdbarch); |
345bd07c SM |
1463 | |
1464 | if (tdep->call_length == call_length) | |
4e99ad69 TG |
1465 | return best_arch->gdbarch; |
1466 | } | |
1467 | ||
0963b4bd | 1468 | /* None found, create a new architecture from the information provided. */ |
345bd07c | 1469 | avr_gdbarch_tdep *tdep = new avr_gdbarch_tdep; |
4e99ad69 TG |
1470 | gdbarch = gdbarch_alloc (&info, tdep); |
1471 | ||
1472 | tdep->call_length = call_length; | |
1473 | ||
7d2552b4 TG |
1474 | /* Create a type for PC. We can't use builtin types here, as they may not |
1475 | be defined. */ | |
77b7c781 UW |
1476 | tdep->void_type = arch_type (gdbarch, TYPE_CODE_VOID, TARGET_CHAR_BIT, |
1477 | "void"); | |
7d2552b4 | 1478 | tdep->func_void_type = make_function_type (tdep->void_type, NULL); |
88dfca6c UW |
1479 | tdep->pc_type = arch_pointer_type (gdbarch, 4 * TARGET_CHAR_BIT, NULL, |
1480 | tdep->func_void_type); | |
7d2552b4 | 1481 | |
8818c391 TR |
1482 | set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT); |
1483 | set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1484 | set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1485 | set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT); | |
1486 | set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1487 | set_gdbarch_addr_bit (gdbarch, 32); | |
8818c391 | 1488 | |
53375380 PA |
1489 | set_gdbarch_wchar_bit (gdbarch, 2 * TARGET_CHAR_BIT); |
1490 | set_gdbarch_wchar_signed (gdbarch, 1); | |
1491 | ||
8818c391 TR |
1492 | set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
1493 | set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1494 | set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1495 | ||
8da61cc4 DJ |
1496 | set_gdbarch_float_format (gdbarch, floatformats_ieee_single); |
1497 | set_gdbarch_double_format (gdbarch, floatformats_ieee_single); | |
1498 | set_gdbarch_long_double_format (gdbarch, floatformats_ieee_single); | |
8818c391 TR |
1499 | |
1500 | set_gdbarch_read_pc (gdbarch, avr_read_pc); | |
1501 | set_gdbarch_write_pc (gdbarch, avr_write_pc); | |
8818c391 TR |
1502 | |
1503 | set_gdbarch_num_regs (gdbarch, AVR_NUM_REGS); | |
1504 | ||
1505 | set_gdbarch_sp_regnum (gdbarch, AVR_SP_REGNUM); | |
8818c391 TR |
1506 | set_gdbarch_pc_regnum (gdbarch, AVR_PC_REGNUM); |
1507 | ||
1508 | set_gdbarch_register_name (gdbarch, avr_register_name); | |
866b76ea | 1509 | set_gdbarch_register_type (gdbarch, avr_register_type); |
8818c391 | 1510 | |
7d2552b4 TG |
1511 | set_gdbarch_num_pseudo_regs (gdbarch, AVR_NUM_PSEUDO_REGS); |
1512 | set_gdbarch_pseudo_register_read (gdbarch, avr_pseudo_register_read); | |
1513 | set_gdbarch_pseudo_register_write (gdbarch, avr_pseudo_register_write); | |
1514 | ||
4c8b6ae0 | 1515 | set_gdbarch_return_value (gdbarch, avr_return_value); |
8818c391 | 1516 | |
4add8633 | 1517 | set_gdbarch_push_dummy_call (gdbarch, avr_push_dummy_call); |
8818c391 | 1518 | |
53f6a2c9 TG |
1519 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, avr_dwarf_reg_to_regnum); |
1520 | ||
8818c391 TR |
1521 | set_gdbarch_address_to_pointer (gdbarch, avr_address_to_pointer); |
1522 | set_gdbarch_pointer_to_address (gdbarch, avr_pointer_to_address); | |
8a1d23b2 | 1523 | set_gdbarch_integer_to_address (gdbarch, avr_integer_to_address); |
8818c391 | 1524 | |
8818c391 | 1525 | set_gdbarch_skip_prologue (gdbarch, avr_skip_prologue); |
8818c391 TR |
1526 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); |
1527 | ||
04180708 YQ |
1528 | set_gdbarch_breakpoint_kind_from_pc (gdbarch, avr_breakpoint::kind_from_pc); |
1529 | set_gdbarch_sw_breakpoint_from_kind (gdbarch, avr_breakpoint::bp_from_kind); | |
8818c391 | 1530 | |
94afd7a6 | 1531 | frame_unwind_append_unwinder (gdbarch, &avr_frame_unwind); |
4add8633 TR |
1532 | frame_base_set_default (gdbarch, &avr_frame_base); |
1533 | ||
94afd7a6 | 1534 | set_gdbarch_dummy_id (gdbarch, avr_dummy_id); |
4add8633 TR |
1535 | |
1536 | set_gdbarch_unwind_pc (gdbarch, avr_unwind_pc); | |
30244cd8 | 1537 | set_gdbarch_unwind_sp (gdbarch, avr_unwind_sp); |
8818c391 | 1538 | |
487d9753 PL |
1539 | set_gdbarch_address_class_type_flags (gdbarch, avr_address_class_type_flags); |
1540 | set_gdbarch_address_class_name_to_type_flags | |
1541 | (gdbarch, avr_address_class_name_to_type_flags); | |
1542 | set_gdbarch_address_class_type_flags_to_name | |
1543 | (gdbarch, avr_address_class_type_flags_to_name); | |
1544 | ||
8818c391 TR |
1545 | return gdbarch; |
1546 | } | |
1547 | ||
1548 | /* Send a query request to the avr remote target asking for values of the io | |
0963b4bd | 1549 | registers. If args parameter is not NULL, then the user has requested info |
8818c391 | 1550 | on a specific io register [This still needs implemented and is ignored for |
0963b4bd | 1551 | now]. The query string should be one of these forms: |
8818c391 TR |
1552 | |
1553 | "Ravr.io_reg" -> reply is "NN" number of io registers | |
1554 | ||
1555 | "Ravr.io_reg:addr,len" where addr is first register and len is number of | |
0963b4bd | 1556 | registers to be read. The reply should be "<NAME>,VV;" for each io register |
8818c391 TR |
1557 | where, <NAME> is a string, and VV is the hex value of the register. |
1558 | ||
0963b4bd | 1559 | All io registers are 8-bit. */ |
8818c391 TR |
1560 | |
1561 | static void | |
1d12d88f | 1562 | avr_io_reg_read_command (const char *args, int from_tty) |
8818c391 | 1563 | { |
2e5ff58c | 1564 | char query[400]; |
2e5ff58c TR |
1565 | unsigned int nreg = 0; |
1566 | unsigned int val; | |
8818c391 | 1567 | |
0963b4bd | 1568 | /* Find out how many io registers the target has. */ |
9018be22 | 1569 | gdb::optional<gdb::byte_vector> buf |
328d42d8 SM |
1570 | = target_read_alloc (current_inferior ()->top_target (), |
1571 | TARGET_OBJECT_AVR, "avr.io_reg"); | |
8818c391 | 1572 | |
9018be22 | 1573 | if (!buf) |
8818c391 | 1574 | { |
6cb06a8c TT |
1575 | gdb_printf (gdb_stderr, |
1576 | _("ERR: info io_registers NOT supported " | |
1577 | "by current target\n")); | |
8818c391 TR |
1578 | return; |
1579 | } | |
1580 | ||
9018be22 SM |
1581 | const char *bufstr = (const char *) buf->data (); |
1582 | ||
001f13d8 | 1583 | if (sscanf (bufstr, "%x", &nreg) != 1) |
8818c391 | 1584 | { |
6cb06a8c TT |
1585 | gdb_printf (gdb_stderr, |
1586 | _("Error fetching number of io registers\n")); | |
8818c391 TR |
1587 | return; |
1588 | } | |
1589 | ||
6cb06a8c | 1590 | gdb_printf (_("Target has %u io registers:\n\n"), nreg); |
8818c391 TR |
1591 | |
1592 | /* only fetch up to 8 registers at a time to keep the buffer small */ | |
9018be22 | 1593 | int step = 8; |
8818c391 | 1594 | |
9018be22 | 1595 | for (int i = 0; i < nreg; i += step) |
8818c391 | 1596 | { |
91ccbfc1 | 1597 | /* how many registers this round? */ |
9018be22 | 1598 | int j = step; |
91ccbfc1 | 1599 | if ((i+j) >= nreg) |
dda83cd7 | 1600 | j = nreg - i; /* last block is less than 8 registers */ |
8818c391 | 1601 | |
2e5ff58c | 1602 | snprintf (query, sizeof (query) - 1, "avr.io_reg:%x,%x", i, j); |
328d42d8 SM |
1603 | buf = target_read_alloc (current_inferior ()->top_target (), |
1604 | TARGET_OBJECT_AVR, query); | |
9018be22 SM |
1605 | |
1606 | if (!buf) | |
dda83cd7 | 1607 | { |
6cb06a8c TT |
1608 | gdb_printf (gdb_stderr, |
1609 | _("ERR: error reading avr.io_reg:%x,%x\n"), | |
1610 | i, j); | |
dda83cd7 SM |
1611 | return; |
1612 | } | |
8818c391 | 1613 | |
9018be22 SM |
1614 | const char *p = (const char *) buf->data (); |
1615 | for (int k = i; k < (i + j); k++) | |
2e5ff58c TR |
1616 | { |
1617 | if (sscanf (p, "%[^,],%x;", query, &val) == 2) | |
1618 | { | |
6cb06a8c | 1619 | gdb_printf ("[%02x] %-15s : %02x\n", k, query, val); |
2e5ff58c TR |
1620 | while ((*p != ';') && (*p != '\0')) |
1621 | p++; | |
1622 | p++; /* skip over ';' */ | |
1623 | if (*p == '\0') | |
1624 | break; | |
1625 | } | |
1626 | } | |
8818c391 TR |
1627 | } |
1628 | } | |
1629 | ||
6c265988 | 1630 | void _initialize_avr_tdep (); |
8818c391 | 1631 | void |
6c265988 | 1632 | _initialize_avr_tdep () |
8818c391 | 1633 | { |
ec29a63c | 1634 | gdbarch_register (bfd_arch_avr, avr_gdbarch_init); |
8818c391 TR |
1635 | |
1636 | /* Add a new command to allow the user to query the avr remote target for | |
1637 | the values of the io space registers in a saner way than just using | |
0963b4bd | 1638 | `x/NNNb ADDR`. */ |
8818c391 TR |
1639 | |
1640 | /* FIXME: TRoth/2002-02-18: This should probably be changed to 'info avr | |
0963b4bd | 1641 | io_registers' to signify it is not available on other platforms. */ |
8818c391 | 1642 | |
5f515954 | 1643 | add_info ("io_registers", avr_io_reg_read_command, |
c6170c2c | 1644 | _("Query remote AVR target for I/O space register values.")); |
8818c391 | 1645 | } |