[thirdparty/binutils-gdb.git] / gdb / config / sparc / tm-sp64.h

/* Target machine sub-parameters for SPARC64, for GDB, the GNU debugger.
   This is included by other tm-*.h files to define SPARC64 cpu-related info.
   Copyright 1994, 1995, 1996, 1998, 1999, 2000
   Free Software Foundation, Inc.
   This is (obviously) based on the SPARC Vn (n<9) port.
   Contributed by Doug Evans (dje@cygnus.com).
   Further modified by Bob Manson (manson@cygnus.com).

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 59 Temple Place - Suite 330,
   Boston, MA 02111-1307, USA.  */

#define GDB_MULTI_ARCH GDB_MULTI_ARCH_PARTIAL

#ifndef GDB_TARGET_IS_SPARC64
#define GDB_TARGET_IS_SPARC64 1
#endif

#include "sparc/tm-sparc.h"

/* Eeeew. Ok, we have to assume (for now) that the processor really is
   in sparc64 mode. While this is the same instruction sequence as
   on the Sparc, the stack frames are offset by +2047 (and the arguments
   are 8 bytes instead of 4). */
/* Instructions are:
   std  %f10, [ %fp + 0x7a7 ]
   std  %f8, [ %fp + 0x79f ]
   std  %f6, [ %fp + 0x797 ]
   std  %f4, [ %fp + 0x78f ]
   std  %f2, [ %fp + 0x787 ]
   std  %f0, [ %fp + 0x77f ]
   std  %g6, [ %fp + 0x777 ]
   std  %g4, [ %fp + 0x76f ]
   std  %g2, [ %fp + 0x767 ]
   std  %g0, [ %fp + 0x75f ]
   std  %fp, [ %fp + 0x757 ]
   std  %i4, [ %fp + 0x74f ]
   std  %i2, [ %fp + 0x747 ]
   std  %i0, [ %fp + 0x73f ]
   nop
   nop
   nop
   nop
   rd  %tbr, %o0
   st  %o0, [ %fp + 0x72b ]
   rd  %tpc, %o0
   st  %o0, [ %fp + 0x727 ]
   rd  %psr, %o0
   st  %o0, [ %fp + 0x723 ]
   rd  %y, %o0
   st  %o0, [ %fp + 0x71f ]
   ldx  [ %sp + 0x8a7 ], %o5
   ldx  [ %sp + 0x89f ], %o4
   ldx  [ %sp + 0x897 ], %o3
   ldx  [ %sp + 0x88f ], %o2
   ldx  [ %sp + 0x887 ], %o1
   call  %g0
   ldx  [ %sp + 0x87f ], %o0
   nop
   ta  1
   nop
   nop
 */

#if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0)
/*
 * The following defines must go away for MULTI_ARCH.
 */

#ifndef DO_CALL_DUMMY_ON_STACK

/*
 * These defines will suffice for the AT_ENTRY_POINT call dummy method.
 */

#undef  CALL_DUMMY
#define CALL_DUMMY {0}
#undef  CALL_DUMMY_LENGTH
#define CALL_DUMMY_LENGTH 0
#undef  CALL_DUMMY_CALL_OFFSET
#define CALL_DUMMY_CALL_OFFSET 0
#undef  CALL_DUMMY_START_OFFSET
#define CALL_DUMMY_START_OFFSET 0
#undef  CALL_DUMMY_BREAKPOINT_OFFSET
#define CALL_DUMMY_BREAKPOINT_OFFSET 0
#undef  CALL_DUMMY_BREAKPOINT_OFFSET_P
#define CALL_DUMMY_BREAKPOINT_OFFSET_P 1
#undef  CALL_DUMMY_LOCATION 
#define CALL_DUMMY_LOCATION AT_ENTRY_POINT
#undef  DEPRECATED_PC_IN_CALL_DUMMY
#define DEPRECATED_PC_IN_CALL_DUMMY(pc, sp, frame_address) deprecated_pc_in_call_dummy_at_entry_point (pc, sp, frame_address)
#undef  DEPRECATED_CALL_DUMMY_STACK_ADJUST
#define DEPRECATED_CALL_DUMMY_STACK_ADJUST 128
#undef  SIZEOF_CALL_DUMMY_WORDS
#define SIZEOF_CALL_DUMMY_WORDS 0
#undef  CALL_DUMMY_ADDRESS
#define CALL_DUMMY_ADDRESS() entry_point_address()
#undef  FIX_CALL_DUMMY
#define FIX_CALL_DUMMY(DUMMYNAME, PC, FUN, NARGS, ARGS, TYPE, GCC_P) 
#undef  PUSH_RETURN_ADDRESS
#define PUSH_RETURN_ADDRESS(PC, SP) sparc_at_entry_push_return_address (PC, SP)
extern CORE_ADDR sparc_at_entry_push_return_address (CORE_ADDR pc,
						     CORE_ADDR sp);

#undef  STORE_STRUCT_RETURN
#define STORE_STRUCT_RETURN(ADDR, SP) \
     sparc_at_entry_store_struct_return (ADDR, SP)
extern void sparc_at_entry_store_struct_return (CORE_ADDR addr, CORE_ADDR sp);


#else
/*
 * Old call dummy method, with CALL_DUMMY on the stack.
 */

#undef  CALL_DUMMY
#define CALL_DUMMY {		 0x9de3bec0fd3fa7f7LL, 0xf93fa7eff53fa7e7LL,\
				 0xf13fa7dfed3fa7d7LL, 0xe93fa7cfe53fa7c7LL,\
				 0xe13fa7bfdd3fa7b7LL, 0xd93fa7afd53fa7a7LL,\
				 0xd13fa79fcd3fa797LL, 0xc93fa78fc53fa787LL,\
				 0xc13fa77fcc3fa777LL, 0xc83fa76fc43fa767LL,\
				 0xc03fa75ffc3fa757LL, 0xf83fa74ff43fa747LL,\
				 0xf03fa73f01000000LL, 0x0100000001000000LL,\
				 0x0100000091580000LL, 0xd027a72b93500000LL,\
				 0xd027a72791480000LL, 0xd027a72391400000LL,\
				 0xd027a71fda5ba8a7LL, 0xd85ba89fd65ba897LL,\
				 0xd45ba88fd25ba887LL, 0x9fc02000d05ba87fLL,\
				 0x0100000091d02001LL, 0x0100000001000000LL }


/* 128 is to reserve space to write the %i/%l registers that will be restored
   when we resume. */
#undef  DEPRECATED_CALL_DUMMY_STACK_ADJUST
#define DEPRECATED_CALL_DUMMY_STACK_ADJUST 128

/* Size of the call dummy in bytes. */
#undef  CALL_DUMMY_LENGTH
#define CALL_DUMMY_LENGTH 192

/* Offset within CALL_DUMMY of the 'call' instruction. */
#undef  CALL_DUMMY_START_OFFSET
#define CALL_DUMMY_START_OFFSET 148

/* Offset within CALL_DUMMY of the 'call' instruction. */
#undef  CALL_DUMMY_CALL_OFFSET
#define CALL_DUMMY_CALL_OFFSET (CALL_DUMMY_START_OFFSET + (5 * 4))

/* Offset within CALL_DUMMY of the 'ta 1' instruction. */
#undef  CALL_DUMMY_BREAKPOINT_OFFSET
#define CALL_DUMMY_BREAKPOINT_OFFSET (CALL_DUMMY_START_OFFSET + (8 * 4))

/* Let's GDB know that it can make a call_dummy breakpoint.  */
#undef  CALL_DUMMY_BREAKPOINT_OFFSET_P
#define CALL_DUMMY_BREAKPOINT_OFFSET_P 1

/* Call dummy will be located on the stack.  */
#undef  CALL_DUMMY_LOCATION
#define CALL_DUMMY_LOCATION ON_STACK
#undef  DEPRECATED_PC_IN_CALL_DUMMY
#define DEPRECATED_PC_IN_CALL_DUMMY(pc, sp, frame_address) deprecated_pc_in_call_dummy_on_stack (pc, sp, frame_address)

/* Insert the function address into the call dummy.  */
#undef  FIX_CALL_DUMMY
#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
 sparc_fix_call_dummy (dummyname, pc, fun, type, gcc_p)
void sparc_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun,
			   struct type *value_type, int using_gcc);


/* The remainder of these will accept the default definition.  */
#undef  SIZEOF_CALL_DUMMY_WORDS
#undef  PUSH_RETURN_ADDRESS
#undef  CALL_DUMMY_ADDRESS
#undef  STORE_STRUCT_RETURN

#endif

/* Does the specified function use the "struct returning" convention
   or the "value returning" convention?  The "value returning" convention
   almost invariably returns the entire value in registers.  The
   "struct returning" convention often returns the entire value in
   memory, and passes a pointer (out of or into the function) saying
   where the value (is or should go).

   Since this sometimes depends on whether it was compiled with GCC,
   this is also an argument.  This is used in call_function to build a
   stack, and in value_being_returned to print return values. 

   On Sparc64, we only pass pointers to structs if they're larger than
   32 bytes. Otherwise they're stored in %o0-%o3 (floating-point
   values go into %fp0-%fp3).  */

#undef  USE_STRUCT_CONVENTION
#define USE_STRUCT_CONVENTION(gcc_p, type) (TYPE_LENGTH (type) > 32)

CORE_ADDR sparc64_push_arguments (int,
				  struct value **, CORE_ADDR, int, CORE_ADDR);
#undef DEPRECATED_PUSH_ARGUMENTS
#define DEPRECATED_PUSH_ARGUMENTS(A,B,C,D,E) \
     (sparc64_push_arguments ((A), (B), (C), (D), (E)))

/* Store the address of the place in which to copy the structure the
   subroutine will return.  This is called from call_function. */
/* FIXME: V9 uses %o0 for this.  */

#undef  STORE_STRUCT_RETURN
#define STORE_STRUCT_RETURN(ADDR, SP) \
  { target_write_memory ((SP)+(16*8), (char *)&(ADDR), 8); }

/* Stack must be aligned on 128-bit boundaries when synthesizing
   function calls. */

#undef  STACK_ALIGN
#define STACK_ALIGN(ADDR) (((ADDR) + 15 ) & -16)

/* Initializer for an array of names of registers.
   There should be NUM_REGS strings in this initializer.  */
/* Some of these registers are only accessible from priviledged mode.
   They are here for kernel debuggers, etc.  */
/* FIXME: icc and xcc are currently considered separate registers.
   This may have to change and consider them as just one (ccr).
   Let's postpone this as long as we can.  It's nice to be able to set
   them individually.  */
/* FIXME: fcc0-3 are currently separate, even though they are also part of
   fsr.  May have to remove them but let's postpone this as long as
   possible.  It's nice to be able to set them individually.  */
/* FIXME: Whether to include f33, f35, etc. here is not clear.
   There are advantages and disadvantages.  */

#undef  REGISTER_NAMES
#define REGISTER_NAMES  \
{ "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",	\
  "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",	\
  "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",	\
  "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",	\
								\
  "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",		\
  "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",		\
  "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",	\
  "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",	\
  "f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46",	\
  "f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62",	\
                                                                \
  "pc", "npc", "ccr", "fsr", "fprs", "y", "asi",		\
  "ver", "tick", "pil", "pstate",				\
  "tstate", "tba", "tl", "tt", "tpc", "tnpc", "wstate",		\
  "cwp", "cansave", "canrestore", "cleanwin", "otherwin",	\
  "asr16", "asr17", "asr18", "asr19", "asr20", "asr21",		\
  "asr22", "asr23", "asr24", "asr25", "asr26", "asr27",		\
  "asr28", "asr29", "asr30", "asr31",				\
  /* These are here at the end to simplify removing them if we have to.  */ \
  "icc", "xcc", "fcc0", "fcc1", "fcc2", "fcc3"			\
}

#undef REG_STRUCT_HAS_ADDR
#define REG_STRUCT_HAS_ADDR(gcc_p,type) (TYPE_LENGTH (type) > 32)

extern CORE_ADDR sparc64_read_sp ();
extern CORE_ADDR sparc64_read_fp ();
extern void sparc64_write_sp (CORE_ADDR);

#define TARGET_READ_SP() (sparc64_read_sp ())
#define TARGET_READ_FP() (sparc64_read_fp ())
#define TARGET_WRITE_SP(X) (sparc64_write_sp (X))

#undef DEPRECATED_EXTRACT_RETURN_VALUE
#define DEPRECATED_EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
     sp64_extract_return_value(TYPE, REGBUF, VALBUF, 0)
extern void sp64_extract_return_value (struct type *, char[], char *, int);

/* Register numbers of various important registers.
   Note that some of these values are "real" register numbers,
   and correspond to the general registers of the machine,
   and some are "phony" register numbers which are too large
   to be actual register numbers as far as the user is concerned
   but do serve to get the desired values when passed to read_register.  */

#if 0				/* defined in tm-sparc.h, replicated
				   for doc purposes */
#define	G0_REGNUM 0		/* %g0 */
#define	G1_REGNUM 1		/* %g1 */
#define O0_REGNUM 8		/* %o0 */
#define	SP_REGNUM 14		/* Contains address of top of stack, \
				   which is also the bottom of the frame.  */
#define	RP_REGNUM 15		/* Contains return address value, *before* \
				   any windows get switched.  */
#define	O7_REGNUM 15		/* Last local reg not saved on stack frame */
#define	L0_REGNUM 16		/* First local reg that's saved on stack frame
				   rather than in machine registers */
#define	I0_REGNUM 24		/* %i0 */
#define	FP_REGNUM 30		/* Contains address of executing stack frame */
#define	I7_REGNUM 31		/* Last local reg saved on stack frame */
#define	FP0_REGNUM 32		/* Floating point register 0 */
#endif

/*#define FP_MAX_REGNUM 80*/	/* 1 + last fp reg number */

/* #undef v8 misc. regs */

#undef Y_REGNUM
#undef PS_REGNUM
#undef WIM_REGNUM
#undef TBR_REGNUM
#undef PC_REGNUM
#undef NPC_REGNUM
#undef FPS_REGNUM
#undef CPS_REGNUM

/* v9 misc. and priv. regs */

#define C0_REGNUM 80			/* Start of control registers */

#define PC_REGNUM (C0_REGNUM + 0)	/* Current PC */
#define NPC_REGNUM (C0_REGNUM + 1)	/* Next PC */
#define CCR_REGNUM (C0_REGNUM + 2)	/* Condition Code Register (%xcc,%icc) */
#define FSR_REGNUM (C0_REGNUM + 3)	/* Floating Point State */
#define FPRS_REGNUM (C0_REGNUM + 4)	/* Floating Point Registers State */
#define	Y_REGNUM (C0_REGNUM + 5)	/* Temp register for multiplication, etc.  */
#define ASI_REGNUM (C0_REGNUM + 6)	/* Alternate Space Identifier */
#define VER_REGNUM (C0_REGNUM + 7)	/* Version register */
#define TICK_REGNUM (C0_REGNUM + 8)	/* Tick register */
#define PIL_REGNUM (C0_REGNUM + 9)	/* Processor Interrupt Level */
#define PSTATE_REGNUM (C0_REGNUM + 10)	/* Processor State */
#define TSTATE_REGNUM (C0_REGNUM + 11)	/* Trap State */
#define TBA_REGNUM (C0_REGNUM + 12)	/* Trap Base Address */
#define TL_REGNUM (C0_REGNUM + 13)	/* Trap Level */
#define TT_REGNUM (C0_REGNUM + 14)	/* Trap Type */
#define TPC_REGNUM (C0_REGNUM + 15)	/* Trap pc */
#define TNPC_REGNUM (C0_REGNUM + 16)	/* Trap npc */
#define WSTATE_REGNUM (C0_REGNUM + 17)	/* Window State */
#define CWP_REGNUM (C0_REGNUM + 18)	/* Current Window Pointer */
#define CANSAVE_REGNUM (C0_REGNUM + 19)		/* Savable Windows */
#define CANRESTORE_REGNUM (C0_REGNUM + 20)	/* Restorable Windows */
#define CLEANWIN_REGNUM (C0_REGNUM + 21)	/* Clean Windows */
#define OTHERWIN_REGNUM (C0_REGNUM + 22)	/* Other Windows */
#define ASR_REGNUM(n) (C0_REGNUM+(23-16)+(n))	/* Ancillary State Register
						   (n = 16...31) */
#define ICC_REGNUM (C0_REGNUM + 39)	/* 32 bit condition codes */
#define XCC_REGNUM (C0_REGNUM + 40)	/* 64 bit condition codes */
#define FCC0_REGNUM (C0_REGNUM + 41)	/* fp cc reg 0 */
#define FCC1_REGNUM (C0_REGNUM + 42)	/* fp cc reg 1 */
#define FCC2_REGNUM (C0_REGNUM + 43)	/* fp cc reg 2 */
#define FCC3_REGNUM (C0_REGNUM + 44)	/* fp cc reg 3 */

/* Number of machine registers.  */

#undef  NUM_REGS
#define NUM_REGS 125

/* Total amount of space needed to store our copies of the machine's
   register state, the array `registers'.
   Some of the registers aren't 64 bits, but it's a lot simpler just to assume
   they all are (since most of them are).  */
#undef  REGISTER_BYTES
#define REGISTER_BYTES (32*8+32*8+45*8)

/* Index within `registers' of the first byte of the space for
   register N.  */
#undef  REGISTER_BYTE
#define REGISTER_BYTE(N) \
  ((N) < 32 ? (N)*8				\
   : (N) < 64 ? 32*8 + ((N)-32)*4		\
   : (N) < C0_REGNUM ? 32*8 + 32*4 + ((N)-64)*8	\
   : 64*8 + ((N)-C0_REGNUM)*8)

/* Say how long (ordinary) registers are.  This is a piece of bogosity
   used in push_word and a few other places; REGISTER_RAW_SIZE is the
   real way to know how big a register is.  */

#undef  REGISTER_SIZE
#define REGISTER_SIZE 8

/* Number of bytes of storage in the actual machine representation
   for register N.  */

#undef  REGISTER_RAW_SIZE
#define REGISTER_RAW_SIZE(N) \
  ((N) < 32 ? 8 : (N) < 64 ? 4 : 8)

/* Number of bytes of storage in the program's representation
   for register N.  */

#undef  REGISTER_VIRTUAL_SIZE
#define REGISTER_VIRTUAL_SIZE(N) \
  ((N) < 32 ? 8 : (N) < 64 ? 4 : 8)

/* Largest value REGISTER_RAW_SIZE can have.  */
/* tm-sparc.h defines this as 8, but play it safe.  */

#undef  DEPRECATED_MAX_REGISTER_RAW_SIZE
#define DEPRECATED_MAX_REGISTER_RAW_SIZE 8

/* Largest value REGISTER_VIRTUAL_SIZE can have.  */
/* tm-sparc.h defines this as 8, but play it safe.  */

#undef  DEPRECATED_MAX_REGISTER_VIRTUAL_SIZE
#define DEPRECATED_MAX_REGISTER_VIRTUAL_SIZE 8

/* Return the GDB type object for the "standard" data type
   of data in register N.  */

#undef  REGISTER_VIRTUAL_TYPE
#define REGISTER_VIRTUAL_TYPE(N) \
 ((N) < 32 ? builtin_type_long_long \
  : (N) < 64 ? builtin_type_float \
  : (N) < 80 ? builtin_type_double \
  : builtin_type_long_long)

/* We use to support both 32 bit and 64 bit pointers.
   We can't anymore because TARGET_PTR_BIT must now be a constant.  */
#undef  TARGET_PTR_BIT
#define TARGET_PTR_BIT 64

/* Longs are 64 bits. */
#undef TARGET_LONG_BIT
#define TARGET_LONG_BIT 64

#undef TARGET_LONG_LONG_BIT
#define TARGET_LONG_LONG_BIT 64

/* Return number of bytes at start of arglist that are not really args.  */

#undef  FRAME_ARGS_SKIP
#define FRAME_ARGS_SKIP 136

#endif /* GDB_MULTI_ARCH */
\f
/* Offsets into jmp_buf.
   FIXME: This was borrowed from the v8 stuff and will probably have to change
   for v9.  */

#define JB_ELEMENT_SIZE 8	/* Size of each element in jmp_buf */

#define JB_ONSSTACK 0
#define JB_SIGMASK 1
#define JB_SP 2
#define JB_PC 3
#define JB_NPC 4
#define JB_PSR 5
#define JB_G1 6
#define JB_O0 7
#define JB_WBCNT 8

/* Figure out where the longjmp will land.  We expect that we have
   just entered longjmp and haven't yet setup the stack frame, so the
   args are still in the output regs.  %o0 (O0_REGNUM) points at the
   jmp_buf structure from which we extract the pc (JB_PC) that we will
   land at.  The pc is copied into ADDR.  This routine returns true on
   success */

extern int get_longjmp_target (CORE_ADDR *);

#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)

#undef TM_PRINT_INSN_MACH
#define TM_PRINT_INSN_MACH bfd_mach_sparc_v9a
Commit	Line	Data
c906108c SS	1	/* Target machine sub-parameters for SPARC64, for GDB, the GNU debugger.
c906108c SS	2	This is included by other tm-*.h files to define SPARC64 cpu-related info.
b6ba6518 KB	3	Copyright 1994, 1995, 1996, 1998, 1999, 2000
b6ba6518 KB	4	Free Software Foundation, Inc.
c906108c SS	5	This is (obviously) based on the SPARC Vn (n<9) port.
	6	Contributed by Doug Evans (dje@cygnus.com).
	7	Further modified by Bob Manson (manson@cygnus.com).
	8
c5aa993b	9	This file is part of GDB.
c906108c	10
c5aa993b JM	11	This program is free software; you can redistribute it and/or modify
	12	it under the terms of the GNU General Public License as published by
	13	the Free Software Foundation; either version 2 of the License, or
	14	(at your option) any later version.
c906108c	15
c5aa993b JM	16	This program is distributed in the hope that it will be useful,
	17	but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	GNU General Public License for more details.
c906108c	20
c5aa993b JM	21	You should have received a copy of the GNU General Public License
	22	along with this program; if not, write to the Free Software
	23	Foundation, Inc., 59 Temple Place - Suite 330,
	24	Boston, MA 02111-1307, USA. */
c906108c	25
64c4637f	26	#define GDB_MULTI_ARCH GDB_MULTI_ARCH_PARTIAL
c906108c	27
5af923b0 MS	28	#ifndef GDB_TARGET_IS_SPARC64
	29	#define GDB_TARGET_IS_SPARC64 1
	30	#endif
	31
	32	#include "sparc/tm-sparc.h"
c906108c SS	33
	34	/* Eeeew. Ok, we have to assume (for now) that the processor really is
	35	in sparc64 mode. While this is the same instruction sequence as
	36	on the Sparc, the stack frames are offset by +2047 (and the arguments
	37	are 8 bytes instead of 4). */
	38	/* Instructions are:
	39	std %f10, [ %fp + 0x7a7 ]
	40	std %f8, [ %fp + 0x79f ]
	41	std %f6, [ %fp + 0x797 ]
	42	std %f4, [ %fp + 0x78f ]
	43	std %f2, [ %fp + 0x787 ]
	44	std %f0, [ %fp + 0x77f ]
	45	std %g6, [ %fp + 0x777 ]
	46	std %g4, [ %fp + 0x76f ]
	47	std %g2, [ %fp + 0x767 ]
	48	std %g0, [ %fp + 0x75f ]
	49	std %fp, [ %fp + 0x757 ]
	50	std %i4, [ %fp + 0x74f ]
	51	std %i2, [ %fp + 0x747 ]
	52	std %i0, [ %fp + 0x73f ]
	53	nop
	54	nop
	55	nop
	56	nop
	57	rd %tbr, %o0
	58	st %o0, [ %fp + 0x72b ]
	59	rd %tpc, %o0
	60	st %o0, [ %fp + 0x727 ]
	61	rd %psr, %o0
	62	st %o0, [ %fp + 0x723 ]
	63	rd %y, %o0
	64	st %o0, [ %fp + 0x71f ]
	65	ldx [ %sp + 0x8a7 ], %o5
	66	ldx [ %sp + 0x89f ], %o4
	67	ldx [ %sp + 0x897 ], %o3
	68	ldx [ %sp + 0x88f ], %o2
	69	ldx [ %sp + 0x887 ], %o1
	70	call %g0
	71	ldx [ %sp + 0x87f ], %o0
	72	nop
	73	ta 1
	74	nop
	75	nop
c5aa993b	76	*/
c906108c	77
5af923b0 MS	78	#if !defined (GDB_MULTI_ARCH) \|\| (GDB_MULTI_ARCH == 0)
	79	/*
	80	* The following defines must go away for MULTI_ARCH.
	81	*/
	82
	83	#ifndef DO_CALL_DUMMY_ON_STACK
	84
	85	/*
	86	* These defines will suffice for the AT_ENTRY_POINT call dummy method.
	87	*/
	88
	89	#undef CALL_DUMMY
	90	#define CALL_DUMMY {0}
	91	#undef CALL_DUMMY_LENGTH
	92	#define CALL_DUMMY_LENGTH 0
	93	#undef CALL_DUMMY_CALL_OFFSET
	94	#define CALL_DUMMY_CALL_OFFSET 0
	95	#undef CALL_DUMMY_START_OFFSET
	96	#define CALL_DUMMY_START_OFFSET 0
	97	#undef CALL_DUMMY_BREAKPOINT_OFFSET
	98	#define CALL_DUMMY_BREAKPOINT_OFFSET 0
	99	#undef CALL_DUMMY_BREAKPOINT_OFFSET_P
	100	#define CALL_DUMMY_BREAKPOINT_OFFSET_P 1
	101	#undef CALL_DUMMY_LOCATION
	102	#define CALL_DUMMY_LOCATION AT_ENTRY_POINT
ae45cd16 AC	103	#undef DEPRECATED_PC_IN_CALL_DUMMY
ae45cd16 AC	104	#define DEPRECATED_PC_IN_CALL_DUMMY(pc, sp, frame_address) deprecated_pc_in_call_dummy_at_entry_point (pc, sp, frame_address)
1bf6d5cc AC	105	#undef DEPRECATED_CALL_DUMMY_STACK_ADJUST
1bf6d5cc AC	106	#define DEPRECATED_CALL_DUMMY_STACK_ADJUST 128
5af923b0 MS	107	#undef SIZEOF_CALL_DUMMY_WORDS
	108	#define SIZEOF_CALL_DUMMY_WORDS 0
	109	#undef CALL_DUMMY_ADDRESS
	110	#define CALL_DUMMY_ADDRESS() entry_point_address()
	111	#undef FIX_CALL_DUMMY
	112	#define FIX_CALL_DUMMY(DUMMYNAME, PC, FUN, NARGS, ARGS, TYPE, GCC_P)
	113	#undef PUSH_RETURN_ADDRESS
	114	#define PUSH_RETURN_ADDRESS(PC, SP) sparc_at_entry_push_return_address (PC, SP)
570b8f7c AC	115	extern CORE_ADDR sparc_at_entry_push_return_address (CORE_ADDR pc,
570b8f7c AC	116	CORE_ADDR sp);
5af923b0 MS	117
	118	#undef STORE_STRUCT_RETURN
	119	#define STORE_STRUCT_RETURN(ADDR, SP) \
	120	sparc_at_entry_store_struct_return (ADDR, SP)
570b8f7c	121	extern void sparc_at_entry_store_struct_return (CORE_ADDR addr, CORE_ADDR sp);
5af923b0 MS	122
	123
	124	#else
	125	/*
	126	* Old call dummy method, with CALL_DUMMY on the stack.
	127	*/
	128
	129	#undef CALL_DUMMY
c906108c SS	130	#define CALL_DUMMY { 0x9de3bec0fd3fa7f7LL, 0xf93fa7eff53fa7e7LL,\
	131	0xf13fa7dfed3fa7d7LL, 0xe93fa7cfe53fa7c7LL,\
	132	0xe13fa7bfdd3fa7b7LL, 0xd93fa7afd53fa7a7LL,\
	133	0xd13fa79fcd3fa797LL, 0xc93fa78fc53fa787LL,\
	134	0xc13fa77fcc3fa777LL, 0xc83fa76fc43fa767LL,\
	135	0xc03fa75ffc3fa757LL, 0xf83fa74ff43fa747LL,\
	136	0xf03fa73f01000000LL, 0x0100000001000000LL,\
	137	0x0100000091580000LL, 0xd027a72b93500000LL,\
	138	0xd027a72791480000LL, 0xd027a72391400000LL,\
	139	0xd027a71fda5ba8a7LL, 0xd85ba89fd65ba897LL,\
	140	0xd45ba88fd25ba887LL, 0x9fc02000d05ba87fLL,\
	141	0x0100000091d02001LL, 0x0100000001000000LL }
	142
	143
	144	/* 128 is to reserve space to write the %i/%l registers that will be restored
	145	when we resume. */
1bf6d5cc AC	146	#undef DEPRECATED_CALL_DUMMY_STACK_ADJUST
1bf6d5cc AC	147	#define DEPRECATED_CALL_DUMMY_STACK_ADJUST 128
c906108c	148
5af923b0 MS	149	/* Size of the call dummy in bytes. */
5af923b0 MS	150	#undef CALL_DUMMY_LENGTH
c906108c SS	151	#define CALL_DUMMY_LENGTH 192
c906108c SS	152
5af923b0 MS	153	/* Offset within CALL_DUMMY of the 'call' instruction. */
5af923b0 MS	154	#undef CALL_DUMMY_START_OFFSET
c906108c SS	155	#define CALL_DUMMY_START_OFFSET 148
c906108c SS	156
5af923b0 MS	157	/* Offset within CALL_DUMMY of the 'call' instruction. */
5af923b0 MS	158	#undef CALL_DUMMY_CALL_OFFSET
c906108c SS	159	#define CALL_DUMMY_CALL_OFFSET (CALL_DUMMY_START_OFFSET + (5 * 4))
c906108c SS	160
5af923b0 MS	161	/* Offset within CALL_DUMMY of the 'ta 1' instruction. */
5af923b0 MS	162	#undef CALL_DUMMY_BREAKPOINT_OFFSET
c906108c SS	163	#define CALL_DUMMY_BREAKPOINT_OFFSET (CALL_DUMMY_START_OFFSET + (8 * 4))
c906108c SS	164
5af923b0 MS	165	/* Let's GDB know that it can make a call_dummy breakpoint. */
	166	#undef CALL_DUMMY_BREAKPOINT_OFFSET_P
	167	#define CALL_DUMMY_BREAKPOINT_OFFSET_P 1
	168
	169	/* Call dummy will be located on the stack. */
	170	#undef CALL_DUMMY_LOCATION
	171	#define CALL_DUMMY_LOCATION ON_STACK
ae45cd16 AC	172	#undef DEPRECATED_PC_IN_CALL_DUMMY
ae45cd16 AC	173	#define DEPRECATED_PC_IN_CALL_DUMMY(pc, sp, frame_address) deprecated_pc_in_call_dummy_on_stack (pc, sp, frame_address)
5af923b0 MS	174
	175	/* Insert the function address into the call dummy. */
	176	#undef FIX_CALL_DUMMY
	177	#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
	178	sparc_fix_call_dummy (dummyname, pc, fun, type, gcc_p)
a14ed312 KB	179	void sparc_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun,
a14ed312 KB	180	struct type *value_type, int using_gcc);
5af923b0 MS	181
	182
	183	/* The remainder of these will accept the default definition. */
	184	#undef SIZEOF_CALL_DUMMY_WORDS
	185	#undef PUSH_RETURN_ADDRESS
	186	#undef CALL_DUMMY_ADDRESS
	187	#undef STORE_STRUCT_RETURN
	188
	189	#endif
	190
	191	/* Does the specified function use the "struct returning" convention
	192	or the "value returning" convention? The "value returning" convention
	193	almost invariably returns the entire value in registers. The
	194	"struct returning" convention often returns the entire value in
	195	memory, and passes a pointer (out of or into the function) saying
	196	where the value (is or should go).
	197
	198	Since this sometimes depends on whether it was compiled with GCC,
	199	this is also an argument. This is used in call_function to build a
	200	stack, and in value_being_returned to print return values.
	201
080fe24b	202	On Sparc64, we only pass pointers to structs if they're larger than
5af923b0 MS	203	32 bytes. Otherwise they're stored in %o0-%o3 (floating-point
	204	values go into %fp0-%fp3). */
	205
	206	#undef USE_STRUCT_CONVENTION
	207	#define USE_STRUCT_CONVENTION(gcc_p, type) (TYPE_LENGTH (type) > 32)
	208
a14ed312 KB	209	CORE_ADDR sparc64_push_arguments (int,
a14ed312 KB	210	struct value **, CORE_ADDR, int, CORE_ADDR);
b81774d8 AC	211	#undef DEPRECATED_PUSH_ARGUMENTS
b81774d8 AC	212	#define DEPRECATED_PUSH_ARGUMENTS(A,B,C,D,E) \
5af923b0 MS	213	(sparc64_push_arguments ((A), (B), (C), (D), (E)))
	214
	215	/* Store the address of the place in which to copy the structure the
	216	subroutine will return. This is called from call_function. */
	217	/* FIXME: V9 uses %o0 for this. */
	218
	219	#undef STORE_STRUCT_RETURN
	220	#define STORE_STRUCT_RETURN(ADDR, SP) \
	221	{ target_write_memory ((SP)+(168), (char )&(ADDR), 8); }
c906108c SS	222
	223	/* Stack must be aligned on 128-bit boundaries when synthesizing
	224	function calls. */
	225
	226	#undef STACK_ALIGN
	227	#define STACK_ALIGN(ADDR) (((ADDR) + 15 ) & -16)
	228
c906108c SS	229	/* Initializer for an array of names of registers.
	230	There should be NUM_REGS strings in this initializer. */
	231	/* Some of these registers are only accessible from priviledged mode.
	232	They are here for kernel debuggers, etc. */
	233	/* FIXME: icc and xcc are currently considered separate registers.
	234	This may have to change and consider them as just one (ccr).
	235	Let's postpone this as long as we can. It's nice to be able to set
	236	them individually. */
	237	/* FIXME: fcc0-3 are currently separate, even though they are also part of
	238	fsr. May have to remove them but let's postpone this as long as
	239	possible. It's nice to be able to set them individually. */
	240	/* FIXME: Whether to include f33, f35, etc. here is not clear.
	241	There are advantages and disadvantages. */
	242
	243	#undef REGISTER_NAMES
	244	#define REGISTER_NAMES \
	245	{ "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", \
	246	"o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7", \
	247	"l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", \
	248	"i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7", \
	249	\
	250	"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
	251	"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
	252	"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", \
	253	"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", \
	254	"f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46", \
	255	"f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62", \
	256	\
	257	"pc", "npc", "ccr", "fsr", "fprs", "y", "asi", \
	258	"ver", "tick", "pil", "pstate", \
	259	"tstate", "tba", "tl", "tt", "tpc", "tnpc", "wstate", \
	260	"cwp", "cansave", "canrestore", "cleanwin", "otherwin", \
	261	"asr16", "asr17", "asr18", "asr19", "asr20", "asr21", \
	262	"asr22", "asr23", "asr24", "asr25", "asr26", "asr27", \
	263	"asr28", "asr29", "asr30", "asr31", \
	264	/* These are here at the end to simplify removing them if we have to. */ \
	265	"icc", "xcc", "fcc0", "fcc1", "fcc2", "fcc3" \
	266	}
	267
5af923b0 MS	268	#undef REG_STRUCT_HAS_ADDR
	269	#define REG_STRUCT_HAS_ADDR(gcc_p,type) (TYPE_LENGTH (type) > 32)
	270
	271	extern CORE_ADDR sparc64_read_sp ();
	272	extern CORE_ADDR sparc64_read_fp ();
a14ed312	273	extern void sparc64_write_sp (CORE_ADDR);
5af923b0 MS	274
	275	#define TARGET_READ_SP() (sparc64_read_sp ())
	276	#define TARGET_READ_FP() (sparc64_read_fp ())
	277	#define TARGET_WRITE_SP(X) (sparc64_write_sp (X))
5af923b0	278
26e9b323 AC	279	#undef DEPRECATED_EXTRACT_RETURN_VALUE
26e9b323 AC	280	#define DEPRECATED_EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
5af923b0	281	sp64_extract_return_value(TYPE, REGBUF, VALBUF, 0)
a14ed312	282	extern void sp64_extract_return_value (struct type , char[], char , int);
5af923b0	283
c906108c SS	284	/* Register numbers of various important registers.
	285	Note that some of these values are "real" register numbers,
	286	and correspond to the general registers of the machine,
	287	and some are "phony" register numbers which are too large
	288	to be actual register numbers as far as the user is concerned
	289	but do serve to get the desired values when passed to read_register. */
	290
5af923b0 MS	291	#if 0 /* defined in tm-sparc.h, replicated
5af923b0 MS	292	for doc purposes */
c5aa993b	293	#define G0_REGNUM 0 /* %g0 */
c906108c SS	294	#define G1_REGNUM 1 /* %g1 */
	295	#define O0_REGNUM 8 /* %o0 */
	296	#define SP_REGNUM 14 /* Contains address of top of stack, \
	297	which is also the bottom of the frame. */
	298	#define RP_REGNUM 15 /* Contains return address value, before \
	299	any windows get switched. */
	300	#define O7_REGNUM 15 /* Last local reg not saved on stack frame */
	301	#define L0_REGNUM 16 /* First local reg that's saved on stack frame
	302	rather than in machine registers */
	303	#define I0_REGNUM 24 /* %i0 */
	304	#define FP_REGNUM 30 /* Contains address of executing stack frame */
	305	#define I7_REGNUM 31 /* Last local reg saved on stack frame */
	306	#define FP0_REGNUM 32 /* Floating point register 0 */
	307	#endif
	308
5af923b0	309	/#define FP_MAX_REGNUM 80/ /* 1 + last fp reg number */
c906108c SS	310
	311	/* #undef v8 misc. regs */
	312
	313	#undef Y_REGNUM
	314	#undef PS_REGNUM
	315	#undef WIM_REGNUM
	316	#undef TBR_REGNUM
	317	#undef PC_REGNUM
	318	#undef NPC_REGNUM
	319	#undef FPS_REGNUM
	320	#undef CPS_REGNUM
	321
	322	/* v9 misc. and priv. regs */
	323
5af923b0 MS	324	#define C0_REGNUM 80 /* Start of control registers */
5af923b0 MS	325
c5aa993b JM	326	#define PC_REGNUM (C0_REGNUM + 0) /* Current PC */
	327	#define NPC_REGNUM (C0_REGNUM + 1) /* Next PC */
	328	#define CCR_REGNUM (C0_REGNUM + 2) /* Condition Code Register (%xcc,%icc) */
	329	#define FSR_REGNUM (C0_REGNUM + 3) /* Floating Point State */
	330	#define FPRS_REGNUM (C0_REGNUM + 4) /* Floating Point Registers State */
	331	#define Y_REGNUM (C0_REGNUM + 5) /* Temp register for multiplication, etc. */
	332	#define ASI_REGNUM (C0_REGNUM + 6) /* Alternate Space Identifier */
	333	#define VER_REGNUM (C0_REGNUM + 7) /* Version register */
	334	#define TICK_REGNUM (C0_REGNUM + 8) /* Tick register */
	335	#define PIL_REGNUM (C0_REGNUM + 9) /* Processor Interrupt Level */
	336	#define PSTATE_REGNUM (C0_REGNUM + 10) /* Processor State */
	337	#define TSTATE_REGNUM (C0_REGNUM + 11) /* Trap State */
	338	#define TBA_REGNUM (C0_REGNUM + 12) /* Trap Base Address */
	339	#define TL_REGNUM (C0_REGNUM + 13) /* Trap Level */
	340	#define TT_REGNUM (C0_REGNUM + 14) /* Trap Type */
	341	#define TPC_REGNUM (C0_REGNUM + 15) /* Trap pc */
	342	#define TNPC_REGNUM (C0_REGNUM + 16) /* Trap npc */
	343	#define WSTATE_REGNUM (C0_REGNUM + 17) /* Window State */
	344	#define CWP_REGNUM (C0_REGNUM + 18) /* Current Window Pointer */
c906108c SS	345	#define CANSAVE_REGNUM (C0_REGNUM + 19) /* Savable Windows */
	346	#define CANRESTORE_REGNUM (C0_REGNUM + 20) /* Restorable Windows */
	347	#define CLEANWIN_REGNUM (C0_REGNUM + 21) /* Clean Windows */
	348	#define OTHERWIN_REGNUM (C0_REGNUM + 22) /* Other Windows */
	349	#define ASR_REGNUM(n) (C0_REGNUM+(23-16)+(n)) /* Ancillary State Register
	350	(n = 16...31) */
c5aa993b JM	351	#define ICC_REGNUM (C0_REGNUM + 39) /* 32 bit condition codes */
	352	#define XCC_REGNUM (C0_REGNUM + 40) /* 64 bit condition codes */
	353	#define FCC0_REGNUM (C0_REGNUM + 41) /* fp cc reg 0 */
	354	#define FCC1_REGNUM (C0_REGNUM + 42) /* fp cc reg 1 */
	355	#define FCC2_REGNUM (C0_REGNUM + 43) /* fp cc reg 2 */
	356	#define FCC3_REGNUM (C0_REGNUM + 44) /* fp cc reg 3 */
c906108c	357
5af923b0 MS	358	/* Number of machine registers. */
	359
	360	#undef NUM_REGS
	361	#define NUM_REGS 125
	362
c906108c SS	363	/* Total amount of space needed to store our copies of the machine's
	364	register state, the array `registers'.
	365	Some of the registers aren't 64 bits, but it's a lot simpler just to assume
	366	they all are (since most of them are). */
	367	#undef REGISTER_BYTES
	368	#define REGISTER_BYTES (328+328+45*8)
	369
	370	/* Index within `registers' of the first byte of the space for
	371	register N. */
	372	#undef REGISTER_BYTE
	373	#define REGISTER_BYTE(N) \
	374	((N) < 32 ? (N)*8 \
	375	: (N) < 64 ? 328 + ((N)-32)4 \
	376	: (N) < C0_REGNUM ? 328 + 324 + ((N)-64)*8 \
	377	: 648 + ((N)-C0_REGNUM)8)
	378
	379	/* Say how long (ordinary) registers are. This is a piece of bogosity
	380	used in push_word and a few other places; REGISTER_RAW_SIZE is the
	381	real way to know how big a register is. */
	382
	383	#undef REGISTER_SIZE
	384	#define REGISTER_SIZE 8
	385
	386	/* Number of bytes of storage in the actual machine representation
	387	for register N. */
	388
	389	#undef REGISTER_RAW_SIZE
	390	#define REGISTER_RAW_SIZE(N) \
	391	((N) < 32 ? 8 : (N) < 64 ? 4 : 8)
	392
	393	/* Number of bytes of storage in the program's representation
	394	for register N. */
	395
	396	#undef REGISTER_VIRTUAL_SIZE
	397	#define REGISTER_VIRTUAL_SIZE(N) \
	398	((N) < 32 ? 8 : (N) < 64 ? 4 : 8)
	399
	400	/* Largest value REGISTER_RAW_SIZE can have. */
	401	/* tm-sparc.h defines this as 8, but play it safe. */
	402
a0ed5532 AC	403	#undef DEPRECATED_MAX_REGISTER_RAW_SIZE
a0ed5532 AC	404	#define DEPRECATED_MAX_REGISTER_RAW_SIZE 8
c906108c SS	405
	406	/* Largest value REGISTER_VIRTUAL_SIZE can have. */
	407	/* tm-sparc.h defines this as 8, but play it safe. */
	408
a0ed5532 AC	409	#undef DEPRECATED_MAX_REGISTER_VIRTUAL_SIZE
a0ed5532 AC	410	#define DEPRECATED_MAX_REGISTER_VIRTUAL_SIZE 8
c906108c SS	411
	412	/* Return the GDB type object for the "standard" data type
	413	of data in register N. */
	414
	415	#undef REGISTER_VIRTUAL_TYPE
	416	#define REGISTER_VIRTUAL_TYPE(N) \
	417	((N) < 32 ? builtin_type_long_long \
	418	: (N) < 64 ? builtin_type_float \
	419	: (N) < 80 ? builtin_type_double \
	420	: builtin_type_long_long)
	421
	422	/* We use to support both 32 bit and 64 bit pointers.
	423	We can't anymore because TARGET_PTR_BIT must now be a constant. */
	424	#undef TARGET_PTR_BIT
	425	#define TARGET_PTR_BIT 64
	426
	427	/* Longs are 64 bits. */
	428	#undef TARGET_LONG_BIT
	429	#define TARGET_LONG_BIT 64
	430
	431	#undef TARGET_LONG_LONG_BIT
	432	#define TARGET_LONG_LONG_BIT 64
	433
c906108c SS	434	/* Return number of bytes at start of arglist that are not really args. */
	435
	436	#undef FRAME_ARGS_SKIP
	437	#define FRAME_ARGS_SKIP 136
5af923b0 MS	438
5af923b0 MS	439	#endif /* GDB_MULTI_ARCH */
c906108c SS	440	\f
	441	/* Offsets into jmp_buf.
	442	FIXME: This was borrowed from the v8 stuff and will probably have to change
	443	for v9. */
	444
	445	#define JB_ELEMENT_SIZE 8 /* Size of each element in jmp_buf */
	446
	447	#define JB_ONSSTACK 0
	448	#define JB_SIGMASK 1
	449	#define JB_SP 2
	450	#define JB_PC 3
	451	#define JB_NPC 4
	452	#define JB_PSR 5
	453	#define JB_G1 6
	454	#define JB_O0 7
	455	#define JB_WBCNT 8
	456
5af923b0 MS	457	/* Figure out where the longjmp will land. We expect that we have
	458	just entered longjmp and haven't yet setup the stack frame, so the
	459	args are still in the output regs. %o0 (O0_REGNUM) points at the
	460	jmp_buf structure from which we extract the pc (JB_PC) that we will
	461	land at. The pc is copied into ADDR. This routine returns true on
	462	success */
c906108c	463
a14ed312	464	extern int get_longjmp_target (CORE_ADDR *);
c906108c SS	465
	466	#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
	467
c906108c SS	468	#undef TM_PRINT_INSN_MACH
	469	#define TM_PRINT_INSN_MACH bfd_mach_sparc_v9a
	470