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c906108c SS |
1 | /* Macro definitions for GDB for a Fujitsu SPARClite. |
2 | Copyright 1993 Free Software Foundation, Inc. | |
3 | ||
c5aa993b | 4 | This file is part of GDB. |
c906108c | 5 | |
c5aa993b JM |
6 | This program is free software; you can redistribute it and/or modify |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
c906108c | 10 | |
c5aa993b JM |
11 | This program is distributed in the hope that it will be useful, |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
c906108c | 15 | |
c5aa993b JM |
16 | You should have received a copy of the GNU General Public License |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 59 Temple Place - Suite 330, | |
19 | Boston, MA 02111-1307, USA. */ | |
c906108c SS |
20 | |
21 | #define TARGET_SPARCLITE 1 | |
22 | ||
23 | #include "sparc/tm-sparc.h" | |
24 | ||
25 | /* overrides of tm-sparc.h */ | |
26 | ||
27 | #undef TARGET_BYTE_ORDER | |
28 | #define TARGET_BYTE_ORDER_SELECTABLE | |
29 | ||
30 | /* Select the sparclite disassembler. Slightly different instruction set from | |
31 | the V8 sparc. */ | |
32 | ||
33 | #undef TM_PRINT_INSN_MACH | |
34 | #define TM_PRINT_INSN_MACH bfd_mach_sparc_sparclite | |
35 | ||
36 | /* Amount PC must be decremented by after a hardware instruction breakpoint. | |
37 | This is often the number of bytes in BREAKPOINT | |
38 | but not always. */ | |
39 | ||
40 | #define DECR_PC_AFTER_HW_BREAK 4 | |
41 | ||
42 | #define FRAME_CHAIN_VALID(fp,fi) alternate_frame_chain_valid (fp, fi) | |
43 | ||
c5aa993b JM |
44 | #undef NUM_REGS |
45 | #define NUM_REGS 80 | |
c906108c SS |
46 | |
47 | #undef REGISTER_BYTES | |
48 | #define REGISTER_BYTES (32*4+32*4+8*4+8*4) | |
49 | ||
50 | #undef REGISTER_NAMES | |
51 | #define REGISTER_NAMES \ | |
52 | { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", \ | |
53 | "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7", \ | |
54 | "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", \ | |
55 | "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7", \ | |
56 | \ | |
57 | "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \ | |
58 | "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \ | |
59 | "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", \ | |
60 | "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", \ | |
61 | \ | |
62 | "y", "psr", "wim", "tbr", "pc", "npc", "fpsr", "cpsr", \ | |
63 | "dia1", "dia2", "dda1", "dda2", "ddv1", "ddv2", "dcr", "dsr" } | |
64 | ||
c5aa993b JM |
65 | #define DIA1_REGNUM 72 /* debug instr address register 1 */ |
66 | #define DIA2_REGNUM 73 /* debug instr address register 2 */ | |
67 | #define DDA1_REGNUM 74 /* debug data address register 1 */ | |
68 | #define DDA2_REGNUM 75 /* debug data address register 2 */ | |
69 | #define DDV1_REGNUM 76 /* debug data value register 1 */ | |
70 | #define DDV2_REGNUM 77 /* debug data value register 2 */ | |
71 | #define DCR_REGNUM 78 /* debug control register */ | |
72 | #define DSR_REGNUM 79 /* debug status regsiter */ | |
c906108c SS |
73 | |
74 | #define TARGET_HW_BREAK_LIMIT 2 | |
75 | #define TARGET_HW_WATCH_LIMIT 2 | |
76 | ||
77 | /* Enable watchpoint macro's */ | |
78 | ||
79 | #define TARGET_HAS_HARDWARE_WATCHPOINTS | |
80 | ||
81 | #define TARGET_CAN_USE_HARDWARE_WATCHPOINT(type, cnt, ot) \ | |
82 | sparclite_check_watch_resources (type, cnt, ot) | |
83 | ||
84 | /* When a hardware watchpoint fires off the PC will be left at the | |
85 | instruction which caused the watchpoint. It will be necessary for | |
86 | GDB to step over the watchpoint. *** | |
87 | ||
c5aa993b JM |
88 | #define STOPPED_BY_WATCHPOINT(W) \ |
89 | ((W).kind == TARGET_WAITKIND_STOPPED \ | |
c906108c SS |
90 | && (W).value.sig == TARGET_SIGNAL_TRAP \ |
91 | && ((int) read_register (IPSW_REGNUM) & 0x00100000)) | |
c5aa993b | 92 | */ |
c906108c SS |
93 | |
94 | /* Use these macros for watchpoint insertion/deletion. */ | |
95 | #define target_insert_watchpoint(addr, len, type) sparclite_insert_watchpoint (addr, len, type) | |
96 | #define target_remove_watchpoint(addr, len, type) sparclite_remove_watchpoint (addr, len, type) | |
97 | #define target_insert_hw_breakpoint(addr, len) sparclite_insert_hw_breakpoint (addr, len) | |
98 | #define target_remove_hw_breakpoint(addr, len) sparclite_remove_hw_breakpoint (addr, len) | |
99 | #define target_stopped_data_address() sparclite_stopped_data_address() |