]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - gdb/frv-tdep.c
2003-06-12 Andrew Cagney <cagney@redhat.com>
[thirdparty/binutils-gdb.git] / gdb / frv-tdep.c
CommitLineData
456f8b9d 1/* Target-dependent code for the Fujitsu FR-V, for GDB, the GNU Debugger.
1e698235 2 Copyright 2002, 2003 Free Software Foundation, Inc.
456f8b9d
DB
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21#include "defs.h"
22#include "inferior.h"
23#include "symfile.h" /* for entry_point_address */
24#include "gdbcore.h"
25#include "arch-utils.h"
26#include "regcache.h"
27
28extern void _initialize_frv_tdep (void);
29
30static gdbarch_init_ftype frv_gdbarch_init;
31
32static gdbarch_register_name_ftype frv_register_name;
33static gdbarch_register_raw_size_ftype frv_register_raw_size;
34static gdbarch_register_virtual_size_ftype frv_register_virtual_size;
35static gdbarch_register_virtual_type_ftype frv_register_virtual_type;
36static gdbarch_register_byte_ftype frv_register_byte;
37static gdbarch_breakpoint_from_pc_ftype frv_breakpoint_from_pc;
456f8b9d 38static gdbarch_skip_prologue_ftype frv_skip_prologue;
456f8b9d
DB
39static gdbarch_deprecated_extract_return_value_ftype frv_extract_return_value;
40static gdbarch_deprecated_extract_struct_value_address_ftype frv_extract_struct_value_address;
41static gdbarch_use_struct_convention_ftype frv_use_struct_convention;
42static gdbarch_frameless_function_invocation_ftype frv_frameless_function_invocation;
43static gdbarch_init_extra_frame_info_ftype stupid_useless_init_extra_frame_info;
456f8b9d 44static gdbarch_push_arguments_ftype frv_push_arguments;
456f8b9d
DB
45static gdbarch_saved_pc_after_call_ftype frv_saved_pc_after_call;
46
47static void frv_pop_frame_regular (struct frame_info *frame);
48
49/* Register numbers. You can change these as needed, but don't forget
50 to update the simulator accordingly. */
51enum {
52 /* The total number of registers we know exist. */
53 frv_num_regs = 147,
54
55 /* Register numbers 0 -- 63 are always reserved for general-purpose
56 registers. The chip at hand may have less. */
57 first_gpr_regnum = 0,
58 sp_regnum = 1,
59 fp_regnum = 2,
60 struct_return_regnum = 3,
61 last_gpr_regnum = 63,
62
63 /* Register numbers 64 -- 127 are always reserved for floating-point
64 registers. The chip at hand may have less. */
65 first_fpr_regnum = 64,
66 last_fpr_regnum = 127,
67
68 /* Register numbers 128 on up are always reserved for special-purpose
69 registers. */
70 first_spr_regnum = 128,
71 pc_regnum = 128,
72 psr_regnum = 129,
73 ccr_regnum = 130,
74 cccr_regnum = 131,
75 tbr_regnum = 135,
76 brr_regnum = 136,
77 dbar0_regnum = 137,
78 dbar1_regnum = 138,
79 dbar2_regnum = 139,
80 dbar3_regnum = 140,
81 lr_regnum = 145,
82 lcr_regnum = 146,
83 last_spr_regnum = 146
84};
85
86static LONGEST frv_call_dummy_words[] =
87{0};
88
89
90/* The contents of this structure can only be trusted after we've
91 frv_frame_init_saved_regs on the frame. */
92struct frame_extra_info
93 {
94 /* The offset from our frame pointer to our caller's stack
95 pointer. */
96 int fp_to_callers_sp_offset;
97
98 /* Non-zero if we've saved our return address on the stack yet.
99 Zero if it's still sitting in the link register. */
100 int lr_saved_on_stack;
101 };
102
103
104/* A structure describing a particular variant of the FRV.
105 We allocate and initialize one of these structures when we create
106 the gdbarch object for a variant.
107
108 At the moment, all the FR variants we support differ only in which
109 registers are present; the portable code of GDB knows that
110 registers whose names are the empty string don't exist, so the
111 `register_names' array captures all the per-variant information we
112 need.
113
114 in the future, if we need to have per-variant maps for raw size,
115 virtual type, etc., we should replace register_names with an array
116 of structures, each of which gives all the necessary info for one
117 register. Don't stick parallel arrays in here --- that's so
118 Fortran. */
119struct gdbarch_tdep
120{
121 /* How many general-purpose registers does this variant have? */
122 int num_gprs;
123
124 /* How many floating-point registers does this variant have? */
125 int num_fprs;
126
127 /* How many hardware watchpoints can it support? */
128 int num_hw_watchpoints;
129
130 /* How many hardware breakpoints can it support? */
131 int num_hw_breakpoints;
132
133 /* Register names. */
134 char **register_names;
135};
136
137#define CURRENT_VARIANT (gdbarch_tdep (current_gdbarch))
138
139
140/* Allocate a new variant structure, and set up default values for all
141 the fields. */
142static struct gdbarch_tdep *
5ae5f592 143new_variant (void)
456f8b9d
DB
144{
145 struct gdbarch_tdep *var;
146 int r;
147 char buf[20];
148
149 var = xmalloc (sizeof (*var));
150 memset (var, 0, sizeof (*var));
151
152 var->num_gprs = 64;
153 var->num_fprs = 64;
154 var->num_hw_watchpoints = 0;
155 var->num_hw_breakpoints = 0;
156
157 /* By default, don't supply any general-purpose or floating-point
158 register names. */
159 var->register_names = (char **) xmalloc (frv_num_regs * sizeof (char *));
160 for (r = 0; r < frv_num_regs; r++)
161 var->register_names[r] = "";
162
163 /* Do, however, supply default names for the special-purpose
164 registers. */
165 for (r = first_spr_regnum; r <= last_spr_regnum; ++r)
166 {
167 sprintf (buf, "x%d", r);
168 var->register_names[r] = xstrdup (buf);
169 }
170
171 var->register_names[pc_regnum] = "pc";
172 var->register_names[lr_regnum] = "lr";
173 var->register_names[lcr_regnum] = "lcr";
174
175 var->register_names[psr_regnum] = "psr";
176 var->register_names[ccr_regnum] = "ccr";
177 var->register_names[cccr_regnum] = "cccr";
178 var->register_names[tbr_regnum] = "tbr";
179
180 /* Debug registers. */
181 var->register_names[brr_regnum] = "brr";
182 var->register_names[dbar0_regnum] = "dbar0";
183 var->register_names[dbar1_regnum] = "dbar1";
184 var->register_names[dbar2_regnum] = "dbar2";
185 var->register_names[dbar3_regnum] = "dbar3";
186
187 return var;
188}
189
190
191/* Indicate that the variant VAR has NUM_GPRS general-purpose
192 registers, and fill in the names array appropriately. */
193static void
194set_variant_num_gprs (struct gdbarch_tdep *var, int num_gprs)
195{
196 int r;
197
198 var->num_gprs = num_gprs;
199
200 for (r = 0; r < num_gprs; ++r)
201 {
202 char buf[20];
203
204 sprintf (buf, "gr%d", r);
205 var->register_names[first_gpr_regnum + r] = xstrdup (buf);
206 }
207}
208
209
210/* Indicate that the variant VAR has NUM_FPRS floating-point
211 registers, and fill in the names array appropriately. */
212static void
213set_variant_num_fprs (struct gdbarch_tdep *var, int num_fprs)
214{
215 int r;
216
217 var->num_fprs = num_fprs;
218
219 for (r = 0; r < num_fprs; ++r)
220 {
221 char buf[20];
222
223 sprintf (buf, "fr%d", r);
224 var->register_names[first_fpr_regnum + r] = xstrdup (buf);
225 }
226}
227
228
229static const char *
230frv_register_name (int reg)
231{
232 if (reg < 0)
233 return "?toosmall?";
234 if (reg >= frv_num_regs)
235 return "?toolarge?";
236
237 return CURRENT_VARIANT->register_names[reg];
238}
239
240
241static int
242frv_register_raw_size (int reg)
243{
244 return 4;
245}
246
247static int
248frv_register_virtual_size (int reg)
249{
250 return 4;
251}
252
253static struct type *
254frv_register_virtual_type (int reg)
255{
256 if (reg >= 64 && reg <= 127)
257 return builtin_type_float;
258 else
259 return builtin_type_int;
260}
261
262static int
263frv_register_byte (int reg)
264{
265 return (reg * 4);
266}
267
268static const unsigned char *
269frv_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenp)
270{
271 static unsigned char breakpoint[] = {0xc0, 0x70, 0x00, 0x01};
272 *lenp = sizeof (breakpoint);
273 return breakpoint;
274}
275
276static CORE_ADDR
277frv_frame_chain (struct frame_info *frame)
278{
279 CORE_ADDR saved_fp_addr;
280
281 if (frame->saved_regs && frame->saved_regs[fp_regnum] != 0)
282 saved_fp_addr = frame->saved_regs[fp_regnum];
283 else
284 /* Just assume it was saved in the usual place. */
285 saved_fp_addr = frame->frame;
286
287 return read_memory_integer (saved_fp_addr, 4);
288}
289
290static CORE_ADDR
291frv_frame_saved_pc (struct frame_info *frame)
292{
293 frv_frame_init_saved_regs (frame);
294
295 /* Perhaps the prologue analyzer recorded where it was stored.
296 (As of 14 Oct 2001, it never does.) */
297 if (frame->saved_regs && frame->saved_regs[pc_regnum] != 0)
298 return read_memory_integer (frame->saved_regs[pc_regnum], 4);
299
300 /* If the prologue analyzer tells us the link register was saved on
301 the stack, get it from there. */
302 if (frame->extra_info->lr_saved_on_stack)
303 return read_memory_integer (frame->frame + 8, 4);
304
305 /* Otherwise, it's still in LR.
306 However, if FRAME isn't the youngest frame, this is kind of
307 suspicious --- if this frame called somebody else, then its LR
308 has certainly been overwritten. */
309 if (! frame->next)
310 return read_register (lr_regnum);
311
312 /* By default, assume it's saved in the standard place, relative to
313 the frame pointer. */
314 return read_memory_integer (frame->frame + 8, 4);
315}
316
317
318/* Return true if REG is a caller-saves ("scratch") register,
319 false otherwise. */
320static int
321is_caller_saves_reg (int reg)
322{
323 return ((4 <= reg && reg <= 7)
324 || (14 <= reg && reg <= 15)
325 || (32 <= reg && reg <= 47));
326}
327
328
329/* Return true if REG is a callee-saves register, false otherwise. */
330static int
331is_callee_saves_reg (int reg)
332{
333 return ((16 <= reg && reg <= 31)
334 || (48 <= reg && reg <= 63));
335}
336
337
338/* Return true if REG is an argument register, false otherwise. */
339static int
340is_argument_reg (int reg)
341{
342 return (8 <= reg && reg <= 13);
343}
344
345
346/* Scan an FR-V prologue, starting at PC, until frame->PC.
347 If FRAME is non-zero, fill in its saved_regs with appropriate addresses.
348 We assume FRAME's saved_regs array has already been allocated and cleared.
349 Return the first PC value after the prologue.
350
351 Note that, for unoptimized code, we almost don't need this function
352 at all; all arguments and locals live on the stack, so we just need
353 the FP to find everything. The catch: structures passed by value
354 have their addresses living in registers; they're never spilled to
355 the stack. So if you ever want to be able to get to these
356 arguments in any frame but the top, you'll need to do this serious
357 prologue analysis. */
358static CORE_ADDR
359frv_analyze_prologue (CORE_ADDR pc, struct frame_info *frame)
360{
361 /* When writing out instruction bitpatterns, we use the following
362 letters to label instruction fields:
363 P - The parallel bit. We don't use this.
364 J - The register number of GRj in the instruction description.
365 K - The register number of GRk in the instruction description.
366 I - The register number of GRi.
367 S - a signed imediate offset.
368 U - an unsigned immediate offset.
369
370 The dots below the numbers indicate where hex digit boundaries
371 fall, to make it easier to check the numbers. */
372
373 /* Non-zero iff we've seen the instruction that initializes the
374 frame pointer for this function's frame. */
375 int fp_set = 0;
376
377 /* If fp_set is non_zero, then this is the distance from
378 the stack pointer to frame pointer: fp = sp + fp_offset. */
379 int fp_offset = 0;
380
381 /* Total size of frame prior to any alloca operations. */
382 int framesize = 0;
383
384 /* The number of the general-purpose register we saved the return
385 address ("link register") in, or -1 if we haven't moved it yet. */
386 int lr_save_reg = -1;
387
388 /* Non-zero iff we've saved the LR onto the stack. */
389 int lr_saved_on_stack = 0;
390
391 /* If gr_saved[i] is non-zero, then we've noticed that general
392 register i has been saved at gr_sp_offset[i] from the stack
393 pointer. */
394 char gr_saved[64];
395 int gr_sp_offset[64];
396
397 memset (gr_saved, 0, sizeof (gr_saved));
398
399 while (! frame || pc < frame->pc)
400 {
401 LONGEST op = read_memory_integer (pc, 4);
402
403 /* The tests in this chain of ifs should be in order of
404 decreasing selectivity, so that more particular patterns get
405 to fire before less particular patterns. */
406
407 /* Setting the FP from the SP:
408 ori sp, 0, fp
409 P 000010 0100010 000001 000000000000 = 0x04881000
410 0 111111 1111111 111111 111111111111 = 0x7fffffff
411 . . . . . . . .
412 We treat this as part of the prologue. */
413 if ((op & 0x7fffffff) == 0x04881000)
414 {
415 fp_set = 1;
416 fp_offset = 0;
417 }
418
419 /* Move the link register to the scratch register grJ, before saving:
420 movsg lr, grJ
421 P 000100 0000011 010000 000111 JJJJJJ = 0x080d01c0
422 0 111111 1111111 111111 111111 000000 = 0x7fffffc0
423 . . . . . . . .
424 We treat this as part of the prologue. */
425 else if ((op & 0x7fffffc0) == 0x080d01c0)
426 {
427 int gr_j = op & 0x3f;
428
429 /* If we're moving it to a scratch register, that's fine. */
430 if (is_caller_saves_reg (gr_j))
431 lr_save_reg = gr_j;
432 /* Otherwise it's not a prologue instruction that we
433 recognize. */
434 else
435 break;
436 }
437
438 /* To save multiple callee-saves registers on the stack, at
439 offset zero:
440
441 std grK,@(sp,gr0)
442 P KKKKKK 0000011 000001 000011 000000 = 0x000c10c0
443 0 000000 1111111 111111 111111 111111 = 0x01ffffff
444
445 stq grK,@(sp,gr0)
446 P KKKKKK 0000011 000001 000100 000000 = 0x000c1100
447 0 000000 1111111 111111 111111 111111 = 0x01ffffff
448 . . . . . . . .
449 We treat this as part of the prologue, and record the register's
450 saved address in the frame structure. */
451 else if ((op & 0x01ffffff) == 0x000c10c0
452 || (op & 0x01ffffff) == 0x000c1100)
453 {
454 int gr_k = ((op >> 25) & 0x3f);
455 int ope = ((op >> 6) & 0x3f);
456 int count;
457 int i;
458
459 /* Is it an std or an stq? */
460 if (ope == 0x03)
461 count = 2;
462 else
463 count = 4;
464
465 /* Is it really a callee-saves register? */
466 if (is_callee_saves_reg (gr_k))
467 {
468 for (i = 0; i < count; i++)
469 {
470 gr_saved[gr_k + i] = 1;
471 gr_sp_offset[gr_k + i] = 4 * i;
472 }
473 }
474 else
475 /* It's not a prologue instruction. */
476 break;
477 }
478
479 /* Adjusting the stack pointer. (The stack pointer is GR1.)
480 addi sp, S, sp
481 P 000001 0010000 000001 SSSSSSSSSSSS = 0x02401000
482 0 111111 1111111 111111 000000000000 = 0x7ffff000
483 . . . . . . . .
484 We treat this as part of the prologue. */
485 else if ((op & 0x7ffff000) == 0x02401000)
486 {
487 /* Sign-extend the twelve-bit field.
488 (Isn't there a better way to do this?) */
489 int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
490
491 framesize -= s;
492 }
493
494 /* Setting the FP to a constant distance from the SP:
495 addi sp, S, fp
496 P 000010 0010000 000001 SSSSSSSSSSSS = 0x04401000
497 0 111111 1111111 111111 000000000000 = 0x7ffff000
498 . . . . . . . .
499 We treat this as part of the prologue. */
500 else if ((op & 0x7ffff000) == 0x04401000)
501 {
502 /* Sign-extend the twelve-bit field.
503 (Isn't there a better way to do this?) */
504 int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
505 fp_set = 1;
506 fp_offset = s;
507 }
508
509 /* To spill an argument register to a scratch register:
510 ori GRi, 0, GRk
511 P KKKKKK 0100010 IIIIII 000000000000 = 0x00880000
512 0 000000 1111111 000000 111111111111 = 0x01fc0fff
513 . . . . . . . .
514 For the time being, we treat this as a prologue instruction,
515 assuming that GRi is an argument register. This one's kind
516 of suspicious, because it seems like it could be part of a
517 legitimate body instruction. But we only come here when the
518 source info wasn't helpful, so we have to do the best we can.
519 Hopefully once GCC and GDB agree on how to emit line number
520 info for prologues, then this code will never come into play. */
521 else if ((op & 0x01fc0fff) == 0x00880000)
522 {
523 int gr_i = ((op >> 12) & 0x3f);
524
525 /* If the source isn't an arg register, then this isn't a
526 prologue instruction. */
527 if (! is_argument_reg (gr_i))
528 break;
529 }
530
531 /* To spill 16-bit values to the stack:
532 sthi GRk, @(fp, s)
533 P KKKKKK 1010001 000010 SSSSSSSSSSSS = 0x01442000
534 0 000000 1111111 111111 000000000000 = 0x01fff000
535 . . . . . . . .
536 And for 8-bit values, we use STB instructions.
537 stbi GRk, @(fp, s)
538 P KKKKKK 1010000 000010 SSSSSSSSSSSS = 0x01402000
539 0 000000 1111111 111111 000000000000 = 0x01fff000
540 . . . . . . . .
541 We check that GRk is really an argument register, and treat
542 all such as part of the prologue. */
543 else if ( (op & 0x01fff000) == 0x01442000
544 || (op & 0x01fff000) == 0x01402000)
545 {
546 int gr_k = ((op >> 25) & 0x3f);
547
548 if (! is_argument_reg (gr_k))
549 break; /* Source isn't an arg register. */
550 }
551
552 /* To save multiple callee-saves register on the stack, at a
553 non-zero offset:
554
555 stdi GRk, @(sp, s)
556 P KKKKKK 1010011 000001 SSSSSSSSSSSS = 0x014c1000
557 0 000000 1111111 111111 000000000000 = 0x01fff000
558 . . . . . . . .
559 stqi GRk, @(sp, s)
560 P KKKKKK 1010100 000001 SSSSSSSSSSSS = 0x01501000
561 0 000000 1111111 111111 000000000000 = 0x01fff000
562 . . . . . . . .
563 We treat this as part of the prologue, and record the register's
564 saved address in the frame structure. */
565 else if ((op & 0x01fff000) == 0x014c1000
566 || (op & 0x01fff000) == 0x01501000)
567 {
568 int gr_k = ((op >> 25) & 0x3f);
569 int count;
570 int i;
571
572 /* Is it a stdi or a stqi? */
573 if ((op & 0x01fff000) == 0x014c1000)
574 count = 2;
575 else
576 count = 4;
577
578 /* Is it really a callee-saves register? */
579 if (is_callee_saves_reg (gr_k))
580 {
581 /* Sign-extend the twelve-bit field.
582 (Isn't there a better way to do this?) */
583 int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
584
585 for (i = 0; i < count; i++)
586 {
587 gr_saved[gr_k + i] = 1;
588 gr_sp_offset[gr_k + i] = s + (4 * i);
589 }
590 }
591 else
592 /* It's not a prologue instruction. */
593 break;
594 }
595
596 /* Storing any kind of integer register at any constant offset
597 from any other register.
598
599 st GRk, @(GRi, gr0)
600 P KKKKKK 0000011 IIIIII 000010 000000 = 0x000c0080
601 0 000000 1111111 000000 111111 111111 = 0x01fc0fff
602 . . . . . . . .
603 sti GRk, @(GRi, d12)
604 P KKKKKK 1010010 IIIIII SSSSSSSSSSSS = 0x01480000
605 0 000000 1111111 000000 000000000000 = 0x01fc0000
606 . . . . . . . .
607 These could be almost anything, but a lot of prologue
608 instructions fall into this pattern, so let's decode the
609 instruction once, and then work at a higher level. */
610 else if (((op & 0x01fc0fff) == 0x000c0080)
611 || ((op & 0x01fc0000) == 0x01480000))
612 {
613 int gr_k = ((op >> 25) & 0x3f);
614 int gr_i = ((op >> 12) & 0x3f);
615 int offset;
616
617 /* Are we storing with gr0 as an offset, or using an
618 immediate value? */
619 if ((op & 0x01fc0fff) == 0x000c0080)
620 offset = 0;
621 else
622 offset = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
623
624 /* If the address isn't relative to the SP or FP, it's not a
625 prologue instruction. */
626 if (gr_i != sp_regnum && gr_i != fp_regnum)
627 break;
628
629 /* Saving the old FP in the new frame (relative to the SP). */
630 if (gr_k == fp_regnum && gr_i == sp_regnum)
631 ;
632
633 /* Saving callee-saves register(s) on the stack, relative to
634 the SP. */
635 else if (gr_i == sp_regnum
636 && is_callee_saves_reg (gr_k))
637 {
638 gr_saved[gr_k] = 1;
639 gr_sp_offset[gr_k] = offset;
640 }
641
642 /* Saving the scratch register holding the return address. */
643 else if (lr_save_reg != -1
644 && gr_k == lr_save_reg)
645 lr_saved_on_stack = 1;
646
647 /* Spilling int-sized arguments to the stack. */
648 else if (is_argument_reg (gr_k))
649 ;
650
651 /* It's not a store instruction we recognize, so this must
652 be the end of the prologue. */
653 else
654 break;
655 }
656
657 /* It's not any instruction we recognize, so this must be the end
658 of the prologue. */
659 else
660 break;
661
662 pc += 4;
663 }
664
665 if (frame)
666 {
667 frame->extra_info->lr_saved_on_stack = lr_saved_on_stack;
668
669 /* If we know the relationship between the stack and frame
670 pointers, record the addresses of the registers we noticed.
671 Note that we have to do this as a separate step at the end,
672 because instructions may save relative to the SP, but we need
673 their addresses relative to the FP. */
674 if (fp_set)
675 {
676 int i;
677
678 for (i = 0; i < 64; i++)
679 if (gr_saved[i])
680 frame->saved_regs[i] = (frame->frame
681 - fp_offset + gr_sp_offset[i]);
682
683 frame->extra_info->fp_to_callers_sp_offset = framesize - fp_offset;
684 }
685 }
686
687 return pc;
688}
689
690
691static CORE_ADDR
692frv_skip_prologue (CORE_ADDR pc)
693{
694 CORE_ADDR func_addr, func_end, new_pc;
695
696 new_pc = pc;
697
698 /* If the line table has entry for a line *within* the function
699 (i.e., not in the prologue, and not past the end), then that's
700 our location. */
701 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
702 {
703 struct symtab_and_line sal;
704
705 sal = find_pc_line (func_addr, 0);
706
707 if (sal.line != 0 && sal.end < func_end)
708 {
709 new_pc = sal.end;
710 }
711 }
712
713 /* The FR-V prologue is at least five instructions long (twenty bytes).
714 If we didn't find a real source location past that, then
715 do a full analysis of the prologue. */
716 if (new_pc < pc + 20)
717 new_pc = frv_analyze_prologue (pc, 0);
718
719 return new_pc;
720}
721
722static void
723frv_frame_init_saved_regs (struct frame_info *frame)
724{
725 if (frame->saved_regs)
726 return;
727
728 frame_saved_regs_zalloc (frame);
729 frame->saved_regs[fp_regnum] = frame->frame;
730
731 /* Find the beginning of this function, so we can analyze its
732 prologue. */
733 {
734 CORE_ADDR func_addr, func_end;
735
736 if (find_pc_partial_function (frame->pc, NULL, &func_addr, &func_end))
737 frv_analyze_prologue (func_addr, frame);
738 }
739}
740
741/* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
742 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
743 and TYPE is the type (which is known to be struct, union or array).
744
745 The frv returns all structs in memory. */
746
747static int
748frv_use_struct_convention (int gcc_p, struct type *type)
749{
750 return 1;
751}
752
753static void
754frv_extract_return_value (struct type *type, char *regbuf, char *valbuf)
755{
756 memcpy (valbuf, (regbuf
757 + frv_register_byte (8)
758 + (TYPE_LENGTH (type) < 4 ? 4 - TYPE_LENGTH (type) : 0)),
759 TYPE_LENGTH (type));
760}
761
762static CORE_ADDR
763frv_extract_struct_value_address (char *regbuf)
764{
7c0b4a20
AC
765 return extract_unsigned_integer (regbuf + frv_register_byte (struct_return_regnum),
766 4);
456f8b9d
DB
767}
768
769static void
770frv_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
771{
772 write_register (struct_return_regnum, addr);
773}
774
775static int
776frv_frameless_function_invocation (struct frame_info *frame)
777{
778 return frameless_look_for_prologue (frame);
779}
780
781static CORE_ADDR
782frv_saved_pc_after_call (struct frame_info *frame)
783{
784 return read_register (lr_regnum);
785}
786
787static void
788frv_init_extra_frame_info (int fromleaf, struct frame_info *frame)
789{
a00a19e9 790 frame_extra_info_zalloc (frame, sizeof (struct frame_extra_info));
456f8b9d
DB
791 frame->extra_info->fp_to_callers_sp_offset = 0;
792 frame->extra_info->lr_saved_on_stack = 0;
793}
794
795#define ROUND_UP(n,a) (((n)+(a)-1) & ~((a)-1))
796#define ROUND_DOWN(n,a) ((n) & ~((a)-1))
797
798static CORE_ADDR
799frv_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
800 int struct_return, CORE_ADDR struct_addr)
801{
802 int argreg;
803 int argnum;
804 char *val;
805 char valbuf[4];
806 struct value *arg;
807 struct type *arg_type;
808 int len;
809 enum type_code typecode;
810 CORE_ADDR regval;
811 int stack_space;
812 int stack_offset;
813
814#if 0
815 printf("Push %d args at sp = %x, struct_return=%d (%x)\n",
816 nargs, (int) sp, struct_return, struct_addr);
817#endif
818
819 stack_space = 0;
820 for (argnum = 0; argnum < nargs; ++argnum)
821 stack_space += ROUND_UP (TYPE_LENGTH (VALUE_TYPE (args[argnum])), 4);
822
823 stack_space -= (6 * 4);
824 if (stack_space > 0)
825 sp -= stack_space;
826
827 /* Make sure stack is dword aligned. */
828 sp = ROUND_DOWN (sp, 8);
829
830 stack_offset = 0;
831
832 argreg = 8;
833
834 if (struct_return)
835 write_register (struct_return_regnum, struct_addr);
836
837 for (argnum = 0; argnum < nargs; ++argnum)
838 {
839 arg = args[argnum];
840 arg_type = check_typedef (VALUE_TYPE (arg));
841 len = TYPE_LENGTH (arg_type);
842 typecode = TYPE_CODE (arg_type);
843
844 if (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION)
845 {
fbd9dcd3 846 store_unsigned_integer (valbuf, 4, VALUE_ADDRESS (arg));
456f8b9d
DB
847 typecode = TYPE_CODE_PTR;
848 len = 4;
849 val = valbuf;
850 }
851 else
852 {
853 val = (char *) VALUE_CONTENTS (arg);
854 }
855
856 while (len > 0)
857 {
858 int partial_len = (len < 4 ? len : 4);
859
860 if (argreg < 14)
861 {
7c0b4a20 862 regval = extract_unsigned_integer (val, partial_len);
456f8b9d
DB
863#if 0
864 printf(" Argnum %d data %x -> reg %d\n",
865 argnum, (int) regval, argreg);
866#endif
867 write_register (argreg, regval);
868 ++argreg;
869 }
870 else
871 {
872#if 0
873 printf(" Argnum %d data %x -> offset %d (%x)\n",
874 argnum, *((int *)val), stack_offset, (int) (sp + stack_offset));
875#endif
876 write_memory (sp + stack_offset, val, partial_len);
877 stack_offset += ROUND_UP(partial_len, 4);
878 }
879 len -= partial_len;
880 val += partial_len;
881 }
882 }
883 return sp;
884}
885
886static CORE_ADDR
887frv_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
888{
889 write_register (lr_regnum, CALL_DUMMY_ADDRESS ());
890 return sp;
891}
892
893static void
894frv_store_return_value (struct type *type, char *valbuf)
895{
896 int length = TYPE_LENGTH (type);
897 int reg8_offset = frv_register_byte (8);
898
899 if (length <= 4)
73937e03
AC
900 deprecated_write_register_bytes (reg8_offset + (4 - length), valbuf,
901 length);
456f8b9d 902 else if (length == 8)
73937e03 903 deprecated_write_register_bytes (reg8_offset, valbuf, length);
456f8b9d
DB
904 else
905 internal_error (__FILE__, __LINE__,
906 "Don't know how to return a %d-byte value.", length);
907}
908
909static void
910frv_pop_frame (void)
911{
912 generic_pop_current_frame (frv_pop_frame_regular);
913}
914
915static void
916frv_pop_frame_regular (struct frame_info *frame)
917{
918 CORE_ADDR fp;
919 int regno;
920
921 fp = frame->frame;
922
923 frv_frame_init_saved_regs (frame);
924
925 write_register (pc_regnum, frv_frame_saved_pc (frame));
926 for (regno = 0; regno < frv_num_regs; ++regno)
927 {
928 if (frame->saved_regs[regno]
929 && regno != pc_regnum
930 && regno != sp_regnum)
931 {
932 write_register (regno,
933 read_memory_integer (frame->saved_regs[regno], 4));
934 }
935 }
936 write_register (sp_regnum, fp + frame->extra_info->fp_to_callers_sp_offset);
937 flush_cached_frames ();
938}
939
940
941static void
942frv_remote_translate_xfer_address (CORE_ADDR memaddr, int nr_bytes,
943 CORE_ADDR *targ_addr, int *targ_len)
944{
945 *targ_addr = memaddr;
946 *targ_len = nr_bytes;
947}
948
949
950/* Hardware watchpoint / breakpoint support for the FR500
951 and FR400. */
952
953int
954frv_check_watch_resources (int type, int cnt, int ot)
955{
956 struct gdbarch_tdep *var = CURRENT_VARIANT;
957
958 /* Watchpoints not supported on simulator. */
959 if (strcmp (target_shortname, "sim") == 0)
960 return 0;
961
962 if (type == bp_hardware_breakpoint)
963 {
964 if (var->num_hw_breakpoints == 0)
965 return 0;
966 else if (cnt <= var->num_hw_breakpoints)
967 return 1;
968 }
969 else
970 {
971 if (var->num_hw_watchpoints == 0)
972 return 0;
973 else if (ot)
974 return -1;
975 else if (cnt <= var->num_hw_watchpoints)
976 return 1;
977 }
978 return -1;
979}
980
981
982CORE_ADDR
5ae5f592 983frv_stopped_data_address (void)
456f8b9d
DB
984{
985 CORE_ADDR brr, dbar0, dbar1, dbar2, dbar3;
986
987 brr = read_register (brr_regnum);
988 dbar0 = read_register (dbar0_regnum);
989 dbar1 = read_register (dbar1_regnum);
990 dbar2 = read_register (dbar2_regnum);
991 dbar3 = read_register (dbar3_regnum);
992
993 if (brr & (1<<11))
994 return dbar0;
995 else if (brr & (1<<10))
996 return dbar1;
997 else if (brr & (1<<9))
998 return dbar2;
999 else if (brr & (1<<8))
1000 return dbar3;
1001 else
1002 return 0;
1003}
1004
1005static struct gdbarch *
1006frv_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1007{
1008 struct gdbarch *gdbarch;
1009 struct gdbarch_tdep *var;
1010
1011 /* Check to see if we've already built an appropriate architecture
1012 object for this executable. */
1013 arches = gdbarch_list_lookup_by_info (arches, &info);
1014 if (arches)
1015 return arches->gdbarch;
1016
1017 /* Select the right tdep structure for this variant. */
1018 var = new_variant ();
1019 switch (info.bfd_arch_info->mach)
1020 {
1021 case bfd_mach_frv:
1022 case bfd_mach_frvsimple:
1023 case bfd_mach_fr500:
1024 case bfd_mach_frvtomcat:
1025 set_variant_num_gprs (var, 64);
1026 set_variant_num_fprs (var, 64);
1027 break;
1028
1029 case bfd_mach_fr400:
1030 set_variant_num_gprs (var, 32);
1031 set_variant_num_fprs (var, 32);
1032 break;
1033
1034 default:
1035 /* Never heard of this variant. */
1036 return 0;
1037 }
1038
1039 gdbarch = gdbarch_alloc (&info, var);
1040
a5afb99f
AC
1041 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
1042 ready to unwind the PC first (see frame.c:get_prev_frame()). */
1043 set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default);
1044
456f8b9d
DB
1045 set_gdbarch_short_bit (gdbarch, 16);
1046 set_gdbarch_int_bit (gdbarch, 32);
1047 set_gdbarch_long_bit (gdbarch, 32);
1048 set_gdbarch_long_long_bit (gdbarch, 64);
1049 set_gdbarch_float_bit (gdbarch, 32);
1050 set_gdbarch_double_bit (gdbarch, 64);
1051 set_gdbarch_long_double_bit (gdbarch, 64);
1052 set_gdbarch_ptr_bit (gdbarch, 32);
1053
1054 set_gdbarch_num_regs (gdbarch, frv_num_regs);
1055 set_gdbarch_sp_regnum (gdbarch, sp_regnum);
0ba6dca9 1056 set_gdbarch_deprecated_fp_regnum (gdbarch, fp_regnum);
456f8b9d
DB
1057 set_gdbarch_pc_regnum (gdbarch, pc_regnum);
1058
1059 set_gdbarch_register_name (gdbarch, frv_register_name);
b1e29e33 1060 set_gdbarch_deprecated_register_size (gdbarch, 4);
b8b527c5 1061 set_gdbarch_deprecated_register_bytes (gdbarch, frv_num_regs * 4);
456f8b9d
DB
1062 set_gdbarch_register_byte (gdbarch, frv_register_byte);
1063 set_gdbarch_register_raw_size (gdbarch, frv_register_raw_size);
a0ed5532 1064 set_gdbarch_deprecated_max_register_raw_size (gdbarch, 4);
456f8b9d 1065 set_gdbarch_register_virtual_size (gdbarch, frv_register_virtual_size);
a0ed5532 1066 set_gdbarch_deprecated_max_register_virtual_size (gdbarch, 4);
456f8b9d
DB
1067 set_gdbarch_register_virtual_type (gdbarch, frv_register_virtual_type);
1068
1069 set_gdbarch_skip_prologue (gdbarch, frv_skip_prologue);
1070 set_gdbarch_breakpoint_from_pc (gdbarch, frv_breakpoint_from_pc);
1071
456f8b9d
DB
1072 set_gdbarch_frame_args_skip (gdbarch, 0);
1073 set_gdbarch_frameless_function_invocation (gdbarch, frv_frameless_function_invocation);
1074
6913c89a 1075 set_gdbarch_deprecated_saved_pc_after_call (gdbarch, frv_saved_pc_after_call);
456f8b9d 1076
618ce49f 1077 set_gdbarch_deprecated_frame_chain (gdbarch, frv_frame_chain);
8bedc050 1078 set_gdbarch_deprecated_frame_saved_pc (gdbarch, frv_frame_saved_pc);
456f8b9d 1079
f30ee0bc 1080 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, frv_frame_init_saved_regs);
456f8b9d
DB
1081
1082 set_gdbarch_use_struct_convention (gdbarch, frv_use_struct_convention);
1083 set_gdbarch_deprecated_extract_return_value (gdbarch, frv_extract_return_value);
1084
4183d812 1085 set_gdbarch_deprecated_store_struct_return (gdbarch, frv_store_struct_return);
ebba8386 1086 set_gdbarch_deprecated_store_return_value (gdbarch, frv_store_return_value);
456f8b9d
DB
1087 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, frv_extract_struct_value_address);
1088
1089 /* Settings for calling functions in the inferior. */
b81774d8 1090 set_gdbarch_deprecated_push_arguments (gdbarch, frv_push_arguments);
28f617b3 1091 set_gdbarch_deprecated_push_return_address (gdbarch, frv_push_return_address);
749b82f6 1092 set_gdbarch_deprecated_pop_frame (gdbarch, frv_pop_frame);
456f8b9d 1093
b1e29e33
AC
1094 set_gdbarch_deprecated_call_dummy_words (gdbarch, frv_call_dummy_words);
1095 set_gdbarch_deprecated_sizeof_call_dummy_words (gdbarch, sizeof (frv_call_dummy_words));
e9582e71 1096 set_gdbarch_deprecated_init_extra_frame_info (gdbarch, frv_init_extra_frame_info);
456f8b9d
DB
1097
1098 /* Settings that should be unnecessary. */
1099 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1100
456f8b9d 1101 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
b46e02f6 1102 set_gdbarch_deprecated_dummy_write_sp (gdbarch, deprecated_write_sp);
456f8b9d 1103
ae45cd16 1104 set_gdbarch_deprecated_pc_in_call_dummy (gdbarch, deprecated_pc_in_call_dummy_at_entry_point);
456f8b9d 1105
456f8b9d
DB
1106 set_gdbarch_decr_pc_after_break (gdbarch, 0);
1107 set_gdbarch_function_start_offset (gdbarch, 0);
456f8b9d
DB
1108
1109 set_gdbarch_remote_translate_xfer_address
1110 (gdbarch, frv_remote_translate_xfer_address);
1111
1112 /* Hardware watchpoint / breakpoint support. */
1113 switch (info.bfd_arch_info->mach)
1114 {
1115 case bfd_mach_frv:
1116 case bfd_mach_frvsimple:
1117 case bfd_mach_fr500:
1118 case bfd_mach_frvtomcat:
1119 /* fr500-style hardware debugging support. */
1120 var->num_hw_watchpoints = 4;
1121 var->num_hw_breakpoints = 4;
1122 break;
1123
1124 case bfd_mach_fr400:
1125 /* fr400-style hardware debugging support. */
1126 var->num_hw_watchpoints = 2;
1127 var->num_hw_breakpoints = 4;
1128 break;
1129
1130 default:
1131 /* Otherwise, assume we don't have hardware debugging support. */
1132 var->num_hw_watchpoints = 0;
1133 var->num_hw_breakpoints = 0;
1134 break;
1135 }
1136
1137 return gdbarch;
1138}
1139
1140void
1141_initialize_frv_tdep (void)
1142{
1143 register_gdbarch_init (bfd_arch_frv, frv_gdbarch_init);
1144
d7a27068 1145 deprecated_tm_print_insn = print_insn_frv;
456f8b9d
DB
1146}
1147
1148\f