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0a30fbc4 1/* GNU/Linux/ARM specific low level interface, for the remote server for GDB.
32d0add0 2 Copyright (C) 1995-2015 Free Software Foundation, Inc.
0a30fbc4
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3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
a9762ec7 8 the Free Software Foundation; either version 3 of the License, or
0a30fbc4
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9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
a9762ec7 17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
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18
19#include "server.h"
58caa3dc 20#include "linux-low.h"
0a30fbc4 21
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22/* Don't include elf.h if linux/elf.h got included by gdb_proc_service.h.
23 On Bionic elf.h and linux/elf.h have conflicting definitions. */
24#ifndef ELFMAG0
58d6951d 25#include <elf.h>
3743bb4f 26#endif
9308fc88 27#include <sys/ptrace.h>
09b4ad9f 28#include <signal.h>
9308fc88 29
58d6951d 30/* Defined in auto-generated files. */
d05b4ac3 31void init_registers_arm (void);
3aee8918
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32extern const struct target_desc *tdesc_arm;
33
d05b4ac3 34void init_registers_arm_with_iwmmxt (void);
3aee8918
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35extern const struct target_desc *tdesc_arm_with_iwmmxt;
36
58d6951d 37void init_registers_arm_with_vfpv2 (void);
3aee8918
PA
38extern const struct target_desc *tdesc_arm_with_vfpv2;
39
58d6951d 40void init_registers_arm_with_vfpv3 (void);
3aee8918
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41extern const struct target_desc *tdesc_arm_with_vfpv3;
42
58d6951d 43void init_registers_arm_with_neon (void);
3aee8918 44extern const struct target_desc *tdesc_arm_with_neon;
d05b4ac3 45
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46#ifndef PTRACE_GET_THREAD_AREA
47#define PTRACE_GET_THREAD_AREA 22
48#endif
49
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50#ifndef PTRACE_GETWMMXREGS
51# define PTRACE_GETWMMXREGS 18
52# define PTRACE_SETWMMXREGS 19
53#endif
54
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55#ifndef PTRACE_GETVFPREGS
56# define PTRACE_GETVFPREGS 27
57# define PTRACE_SETVFPREGS 28
58#endif
59
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60#ifndef PTRACE_GETHBPREGS
61#define PTRACE_GETHBPREGS 29
62#define PTRACE_SETHBPREGS 30
63#endif
64
65/* Information describing the hardware breakpoint capabilities. */
71487fd7 66static struct
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67{
68 unsigned char arch;
69 unsigned char max_wp_length;
70 unsigned char wp_count;
71 unsigned char bp_count;
71487fd7 72} arm_linux_hwbp_cap;
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73
74/* Enum describing the different types of ARM hardware break-/watch-points. */
75typedef enum
76{
77 arm_hwbp_break = 0,
78 arm_hwbp_load = 1,
79 arm_hwbp_store = 2,
80 arm_hwbp_access = 3
81} arm_hwbp_type;
82
83/* Type describing an ARM Hardware Breakpoint Control register value. */
84typedef unsigned int arm_hwbp_control_t;
85
86/* Structure used to keep track of hardware break-/watch-points. */
87struct arm_linux_hw_breakpoint
88{
89 /* Address to break on, or being watched. */
90 unsigned int address;
91 /* Control register for break-/watch- point. */
92 arm_hwbp_control_t control;
93};
94
95/* Since we cannot dynamically allocate subfields of arch_process_info,
96 assume a maximum number of supported break-/watchpoints. */
97#define MAX_BPTS 32
98#define MAX_WPTS 32
99
100/* Per-process arch-specific data we want to keep. */
101struct arch_process_info
102{
103 /* Hardware breakpoints for this process. */
104 struct arm_linux_hw_breakpoint bpts[MAX_BPTS];
105 /* Hardware watchpoints for this process. */
106 struct arm_linux_hw_breakpoint wpts[MAX_WPTS];
107};
108
109/* Per-thread arch-specific data we want to keep. */
110struct arch_lwp_info
111{
112 /* Non-zero if our copy differs from what's recorded in the thread. */
113 char bpts_changed[MAX_BPTS];
114 char wpts_changed[MAX_WPTS];
115 /* Cached stopped data address. */
116 CORE_ADDR stopped_data_address;
117};
118
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119static unsigned long arm_hwcap;
120
121/* These are in <asm/elf.h> in current kernels. */
122#define HWCAP_VFP 64
123#define HWCAP_IWMMXT 512
124#define HWCAP_NEON 4096
125#define HWCAP_VFPv3 8192
126#define HWCAP_VFPv3D16 16384
127
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128#ifdef HAVE_SYS_REG_H
129#include <sys/reg.h>
130#endif
131
23ce3b1c 132#define arm_num_regs 26
0a30fbc4 133
2ec06d2e 134static int arm_regmap[] = {
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135 0, 4, 8, 12, 16, 20, 24, 28,
136 32, 36, 40, 44, 48, 52, 56, 60,
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137 -1, -1, -1, -1, -1, -1, -1, -1, -1,
138 64
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139};
140
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141static int
142arm_cannot_store_register (int regno)
0a30fbc4 143{
2ec06d2e 144 return (regno >= arm_num_regs);
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145}
146
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147static int
148arm_cannot_fetch_register (int regno)
0a30fbc4 149{
2ec06d2e 150 return (regno >= arm_num_regs);
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151}
152
fb1e4ffc 153static void
442ea881 154arm_fill_gregset (struct regcache *regcache, void *buf)
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155{
156 int i;
157
158 for (i = 0; i < arm_num_regs; i++)
159 if (arm_regmap[i] != -1)
442ea881 160 collect_register (regcache, i, ((char *) buf) + arm_regmap[i]);
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161}
162
163static void
442ea881 164arm_store_gregset (struct regcache *regcache, const void *buf)
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165{
166 int i;
167 char zerobuf[8];
168
169 memset (zerobuf, 0, 8);
170 for (i = 0; i < arm_num_regs; i++)
171 if (arm_regmap[i] != -1)
442ea881 172 supply_register (regcache, i, ((char *) buf) + arm_regmap[i]);
fb1e4ffc 173 else
442ea881 174 supply_register (regcache, i, zerobuf);
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175}
176
fb1e4ffc 177static void
442ea881 178arm_fill_wmmxregset (struct regcache *regcache, void *buf)
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179{
180 int i;
181
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182 if (!(arm_hwcap & HWCAP_IWMMXT))
183 return;
184
fb1e4ffc 185 for (i = 0; i < 16; i++)
442ea881 186 collect_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
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187
188 /* We only have access to wcssf, wcasf, and wcgr0-wcgr3. */
189 for (i = 0; i < 6; i++)
442ea881
PA
190 collect_register (regcache, arm_num_regs + i + 16,
191 (char *) buf + 16 * 8 + i * 4);
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192}
193
194static void
442ea881 195arm_store_wmmxregset (struct regcache *regcache, const void *buf)
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196{
197 int i;
198
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199 if (!(arm_hwcap & HWCAP_IWMMXT))
200 return;
201
fb1e4ffc 202 for (i = 0; i < 16; i++)
442ea881 203 supply_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
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204
205 /* We only have access to wcssf, wcasf, and wcgr0-wcgr3. */
206 for (i = 0; i < 6; i++)
442ea881
PA
207 supply_register (regcache, arm_num_regs + i + 16,
208 (char *) buf + 16 * 8 + i * 4);
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209}
210
58d6951d 211static void
442ea881 212arm_fill_vfpregset (struct regcache *regcache, void *buf)
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213{
214 int i, num, base;
215
216 if (!(arm_hwcap & HWCAP_VFP))
217 return;
218
219 if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
220 num = 32;
221 else
222 num = 16;
223
3aee8918 224 base = find_regno (regcache->tdesc, "d0");
58d6951d 225 for (i = 0; i < num; i++)
442ea881 226 collect_register (regcache, base + i, (char *) buf + i * 8);
58d6951d 227
442ea881 228 collect_register_by_name (regcache, "fpscr", (char *) buf + 32 * 8);
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229}
230
231static void
442ea881 232arm_store_vfpregset (struct regcache *regcache, const void *buf)
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233{
234 int i, num, base;
235
236 if (!(arm_hwcap & HWCAP_VFP))
237 return;
238
239 if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
240 num = 32;
241 else
242 num = 16;
243
3aee8918 244 base = find_regno (regcache->tdesc, "d0");
58d6951d 245 for (i = 0; i < num; i++)
442ea881 246 supply_register (regcache, base + i, (char *) buf + i * 8);
58d6951d 247
442ea881 248 supply_register_by_name (regcache, "fpscr", (char *) buf + 32 * 8);
58d6951d 249}
fb1e4ffc 250
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251extern int debug_threads;
252
0d62e5e8 253static CORE_ADDR
442ea881 254arm_get_pc (struct regcache *regcache)
0d62e5e8
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255{
256 unsigned long pc;
442ea881 257 collect_register_by_name (regcache, "pc", &pc);
d677d77d 258 if (debug_threads)
87ce2a04 259 debug_printf ("stop pc is %08lx\n", pc);
0d62e5e8
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260 return pc;
261}
262
263static void
442ea881 264arm_set_pc (struct regcache *regcache, CORE_ADDR pc)
0d62e5e8
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265{
266 unsigned long newpc = pc;
442ea881 267 supply_register_by_name (regcache, "pc", &newpc);
0d62e5e8
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268}
269
aeb75bf5 270/* Correct in either endianness. */
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271static const unsigned long arm_breakpoint = 0xef9f0001;
272#define arm_breakpoint_len 4
aeb75bf5 273static const unsigned short thumb_breakpoint = 0xde01;
177321bd 274static const unsigned short thumb2_breakpoint[] = { 0xf7f0, 0xa000 };
0d62e5e8 275
9d1fb177
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276/* For new EABI binaries. We recognize it regardless of which ABI
277 is used for gdbserver, so single threaded debugging should work
278 OK, but for multi-threaded debugging we only insert the current
279 ABI's breakpoint instruction. For now at least. */
280static const unsigned long arm_eabi_breakpoint = 0xe7f001f0;
281
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282static int
283arm_breakpoint_at (CORE_ADDR where)
284{
0bfdf32f 285 struct regcache *regcache = get_thread_regcache (current_thread, 1);
aeb75bf5 286 unsigned long cpsr;
0d62e5e8 287
442ea881 288 collect_register_by_name (regcache, "cpsr", &cpsr);
0d62e5e8 289
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290 if (cpsr & 0x20)
291 {
292 /* Thumb mode. */
293 unsigned short insn;
9d1fb177 294
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295 (*the_target->read_memory) (where, (unsigned char *) &insn, 2);
296 if (insn == thumb_breakpoint)
297 return 1;
177321bd
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298
299 if (insn == thumb2_breakpoint[0])
300 {
301 (*the_target->read_memory) (where + 2, (unsigned char *) &insn, 2);
302 if (insn == thumb2_breakpoint[1])
303 return 1;
304 }
aeb75bf5
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305 }
306 else
307 {
308 /* ARM mode. */
309 unsigned long insn;
310
311 (*the_target->read_memory) (where, (unsigned char *) &insn, 4);
312 if (insn == arm_breakpoint)
313 return 1;
314
315 if (insn == arm_eabi_breakpoint)
316 return 1;
317 }
9d1fb177 318
0d62e5e8
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319 return 0;
320}
321
3b2fc2ea
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322/* We only place breakpoints in empty marker functions, and thread locking
323 is outside of the function. So rather than importing software single-step,
324 we can just run until exit. */
325static CORE_ADDR
442ea881 326arm_reinsert_addr (void)
3b2fc2ea 327{
0bfdf32f 328 struct regcache *regcache = get_thread_regcache (current_thread, 1);
3b2fc2ea 329 unsigned long pc;
442ea881 330 collect_register_by_name (regcache, "lr", &pc);
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331 return pc;
332}
333
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334/* Fetch the thread-local storage pointer for libthread_db. */
335
336ps_err_e
337ps_get_thread_area (const struct ps_prochandle *ph,
1b3f6016 338 lwpid_t lwpid, int idx, void **base)
9308fc88
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339{
340 if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
341 return PS_ERR;
342
343 /* IDX is the bias from the thread pointer to the beginning of the
344 thread descriptor. It has to be subtracted due to implementation
345 quirks in libthread_db. */
346 *base = (void *) ((char *)*base - idx);
347
348 return PS_OK;
349}
350
09b4ad9f 351
71487fd7
UW
352/* Query Hardware Breakpoint information for the target we are attached to
353 (using PID as ptrace argument) and set up arm_linux_hwbp_cap. */
354static void
355arm_linux_init_hwbp_cap (int pid)
09b4ad9f 356{
71487fd7 357 unsigned int val;
09b4ad9f 358
71487fd7
UW
359 if (ptrace (PTRACE_GETHBPREGS, pid, 0, &val) < 0)
360 return;
09b4ad9f 361
71487fd7
UW
362 arm_linux_hwbp_cap.arch = (unsigned char)((val >> 24) & 0xff);
363 if (arm_linux_hwbp_cap.arch == 0)
364 return;
09b4ad9f 365
71487fd7
UW
366 arm_linux_hwbp_cap.max_wp_length = (unsigned char)((val >> 16) & 0xff);
367 arm_linux_hwbp_cap.wp_count = (unsigned char)((val >> 8) & 0xff);
368 arm_linux_hwbp_cap.bp_count = (unsigned char)(val & 0xff);
09b4ad9f 369
71487fd7
UW
370 if (arm_linux_hwbp_cap.wp_count > MAX_WPTS)
371 internal_error (__FILE__, __LINE__, "Unsupported number of watchpoints");
372 if (arm_linux_hwbp_cap.bp_count > MAX_BPTS)
373 internal_error (__FILE__, __LINE__, "Unsupported number of breakpoints");
09b4ad9f
UW
374}
375
376/* How many hardware breakpoints are available? */
377static int
378arm_linux_get_hw_breakpoint_count (void)
379{
71487fd7 380 return arm_linux_hwbp_cap.bp_count;
09b4ad9f
UW
381}
382
383/* How many hardware watchpoints are available? */
384static int
385arm_linux_get_hw_watchpoint_count (void)
386{
71487fd7 387 return arm_linux_hwbp_cap.wp_count;
09b4ad9f
UW
388}
389
390/* Maximum length of area watched by hardware watchpoint. */
391static int
392arm_linux_get_hw_watchpoint_max_length (void)
393{
71487fd7 394 return arm_linux_hwbp_cap.max_wp_length;
09b4ad9f
UW
395}
396
397/* Initialize an ARM hardware break-/watch-point control register value.
398 BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
399 type of break-/watch-point; ENABLE indicates whether the point is enabled.
400 */
401static arm_hwbp_control_t
402arm_hwbp_control_initialize (unsigned byte_address_select,
403 arm_hwbp_type hwbp_type,
404 int enable)
405{
406 gdb_assert ((byte_address_select & ~0xffU) == 0);
407 gdb_assert (hwbp_type != arm_hwbp_break
408 || ((byte_address_select & 0xfU) != 0));
409
410 return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
411}
412
413/* Does the breakpoint control value CONTROL have the enable bit set? */
414static int
415arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
416{
417 return control & 0x1;
418}
419
420/* Is the breakpoint control value CONTROL initialized? */
421static int
422arm_hwbp_control_is_initialized (arm_hwbp_control_t control)
423{
424 return control != 0;
425}
426
427/* Change a breakpoint control word so that it is in the disabled state. */
428static arm_hwbp_control_t
429arm_hwbp_control_disable (arm_hwbp_control_t control)
430{
431 return control & ~0x1;
432}
433
434/* Are two break-/watch-points equal? */
435static int
436arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
437 const struct arm_linux_hw_breakpoint *p2)
438{
439 return p1->address == p2->address && p1->control == p2->control;
440}
441
802e8e6d
PA
442/* Convert a raw breakpoint type to an enum arm_hwbp_type. */
443
444static int
445raw_bkpt_type_to_arm_hwbp_type (enum raw_bkpt_type raw_type)
446{
447 switch (raw_type)
448 {
449 case raw_bkpt_type_hw:
450 return arm_hwbp_break;
451 case raw_bkpt_type_write_wp:
452 return arm_hwbp_store;
453 case raw_bkpt_type_read_wp:
454 return arm_hwbp_load;
455 case raw_bkpt_type_access_wp:
456 return arm_hwbp_access;
457 default:
458 gdb_assert_not_reached ("unhandled raw type");
459 }
460}
461
09b4ad9f
UW
462/* Initialize the hardware breakpoint structure P for a breakpoint or
463 watchpoint at ADDR to LEN. The type of watchpoint is given in TYPE.
b62e2b27
UW
464 Returns -1 if TYPE is unsupported, or -2 if the particular combination
465 of ADDR and LEN cannot be implemented. Otherwise, returns 0 if TYPE
466 represents a breakpoint and 1 if type represents a watchpoint. */
09b4ad9f 467static int
802e8e6d
PA
468arm_linux_hw_point_initialize (enum raw_bkpt_type raw_type, CORE_ADDR addr,
469 int len, struct arm_linux_hw_breakpoint *p)
09b4ad9f
UW
470{
471 arm_hwbp_type hwbp_type;
472 unsigned mask;
473
802e8e6d 474 hwbp_type = raw_bkpt_type_to_arm_hwbp_type (raw_type);
09b4ad9f
UW
475
476 if (hwbp_type == arm_hwbp_break)
477 {
478 /* For breakpoints, the length field encodes the mode. */
479 switch (len)
480 {
481 case 2: /* 16-bit Thumb mode breakpoint */
482 case 3: /* 32-bit Thumb mode breakpoint */
fcf303ab
UW
483 mask = 0x3;
484 addr &= ~1;
09b4ad9f
UW
485 break;
486 case 4: /* 32-bit ARM mode breakpoint */
487 mask = 0xf;
fcf303ab 488 addr &= ~3;
09b4ad9f
UW
489 break;
490 default:
491 /* Unsupported. */
b62e2b27 492 return -2;
09b4ad9f 493 }
09b4ad9f
UW
494 }
495 else
496 {
497 CORE_ADDR max_wp_length = arm_linux_get_hw_watchpoint_max_length ();
498 CORE_ADDR aligned_addr;
499
500 /* Can not set watchpoints for zero or negative lengths. */
501 if (len <= 0)
b62e2b27 502 return -2;
09b4ad9f
UW
503 /* The current ptrace interface can only handle watchpoints that are a
504 power of 2. */
505 if ((len & (len - 1)) != 0)
b62e2b27 506 return -2;
09b4ad9f
UW
507
508 /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
509 range covered by a watchpoint. */
510 aligned_addr = addr & ~(max_wp_length - 1);
511 if (aligned_addr + max_wp_length < addr + len)
b62e2b27 512 return -2;
09b4ad9f
UW
513
514 mask = (1 << len) - 1;
515 }
516
517 p->address = (unsigned int) addr;
518 p->control = arm_hwbp_control_initialize (mask, hwbp_type, 1);
519
520 return hwbp_type != arm_hwbp_break;
521}
522
523/* Callback to mark a watch-/breakpoint to be updated in all threads of
524 the current process. */
525
526struct update_registers_data
527{
528 int watch;
529 int i;
530};
531
532static int
533update_registers_callback (struct inferior_list_entry *entry, void *arg)
534{
d86d4aaf
DE
535 struct thread_info *thread = (struct thread_info *) entry;
536 struct lwp_info *lwp = get_thread_lwp (thread);
09b4ad9f
UW
537 struct update_registers_data *data = (struct update_registers_data *) arg;
538
539 /* Only update the threads of the current process. */
0bfdf32f 540 if (pid_of (thread) == pid_of (current_thread))
09b4ad9f
UW
541 {
542 /* The actual update is done later just before resuming the lwp,
543 we just mark that the registers need updating. */
544 if (data->watch)
545 lwp->arch_private->wpts_changed[data->i] = 1;
546 else
547 lwp->arch_private->bpts_changed[data->i] = 1;
548
549 /* If the lwp isn't stopped, force it to momentarily pause, so
550 we can update its breakpoint registers. */
551 if (!lwp->stopped)
552 linux_stop_lwp (lwp);
553 }
554
555 return 0;
556}
557
802e8e6d
PA
558static int
559arm_supports_z_point_type (char z_type)
560{
561 switch (z_type)
562 {
563 case Z_PACKET_HW_BP:
564 case Z_PACKET_WRITE_WP:
565 case Z_PACKET_READ_WP:
566 case Z_PACKET_ACCESS_WP:
567 return 1;
568 default:
569 /* Leave the handling of sw breakpoints with the gdb client. */
570 return 0;
571 }
572}
573
09b4ad9f
UW
574/* Insert hardware break-/watchpoint. */
575static int
802e8e6d
PA
576arm_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
577 int len, struct raw_breakpoint *bp)
09b4ad9f
UW
578{
579 struct process_info *proc = current_process ();
580 struct arm_linux_hw_breakpoint p, *pts;
581 int watch, i, count;
582
583 watch = arm_linux_hw_point_initialize (type, addr, len, &p);
584 if (watch < 0)
585 {
586 /* Unsupported. */
b62e2b27 587 return watch == -1 ? 1 : -1;
09b4ad9f
UW
588 }
589
590 if (watch)
591 {
592 count = arm_linux_get_hw_watchpoint_count ();
fe978cb0 593 pts = proc->priv->arch_private->wpts;
09b4ad9f
UW
594 }
595 else
596 {
597 count = arm_linux_get_hw_breakpoint_count ();
fe978cb0 598 pts = proc->priv->arch_private->bpts;
09b4ad9f
UW
599 }
600
601 for (i = 0; i < count; i++)
602 if (!arm_hwbp_control_is_enabled (pts[i].control))
603 {
604 struct update_registers_data data = { watch, i };
605 pts[i] = p;
d86d4aaf 606 find_inferior (&all_threads, update_registers_callback, &data);
09b4ad9f
UW
607 return 0;
608 }
609
610 /* We're out of watchpoints. */
611 return -1;
612}
613
614/* Remove hardware break-/watchpoint. */
615static int
802e8e6d
PA
616arm_remove_point (enum raw_bkpt_type type, CORE_ADDR addr,
617 int len, struct raw_breakpoint *bp)
09b4ad9f
UW
618{
619 struct process_info *proc = current_process ();
620 struct arm_linux_hw_breakpoint p, *pts;
621 int watch, i, count;
622
623 watch = arm_linux_hw_point_initialize (type, addr, len, &p);
624 if (watch < 0)
625 {
626 /* Unsupported. */
627 return -1;
628 }
629
630 if (watch)
631 {
632 count = arm_linux_get_hw_watchpoint_count ();
fe978cb0 633 pts = proc->priv->arch_private->wpts;
09b4ad9f
UW
634 }
635 else
636 {
637 count = arm_linux_get_hw_breakpoint_count ();
fe978cb0 638 pts = proc->priv->arch_private->bpts;
09b4ad9f
UW
639 }
640
641 for (i = 0; i < count; i++)
642 if (arm_linux_hw_breakpoint_equal (&p, pts + i))
643 {
644 struct update_registers_data data = { watch, i };
645 pts[i].control = arm_hwbp_control_disable (pts[i].control);
d86d4aaf 646 find_inferior (&all_threads, update_registers_callback, &data);
09b4ad9f
UW
647 return 0;
648 }
649
650 /* No watchpoint matched. */
651 return -1;
652}
653
654/* Return whether current thread is stopped due to a watchpoint. */
655static int
656arm_stopped_by_watchpoint (void)
657{
0bfdf32f 658 struct lwp_info *lwp = get_thread_lwp (current_thread);
a5362b9a 659 siginfo_t siginfo;
09b4ad9f
UW
660
661 /* We must be able to set hardware watchpoints. */
662 if (arm_linux_get_hw_watchpoint_count () == 0)
663 return 0;
664
665 /* Retrieve siginfo. */
666 errno = 0;
0bfdf32f 667 ptrace (PTRACE_GETSIGINFO, lwpid_of (current_thread), 0, &siginfo);
09b4ad9f
UW
668 if (errno != 0)
669 return 0;
670
671 /* This must be a hardware breakpoint. */
672 if (siginfo.si_signo != SIGTRAP
673 || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
674 return 0;
675
676 /* If we are in a positive slot then we're looking at a breakpoint and not
677 a watchpoint. */
678 if (siginfo.si_errno >= 0)
679 return 0;
680
681 /* Cache stopped data address for use by arm_stopped_data_address. */
682 lwp->arch_private->stopped_data_address
683 = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
684
685 return 1;
686}
687
688/* Return data address that triggered watchpoint. Called only if
689 arm_stopped_by_watchpoint returned true. */
690static CORE_ADDR
691arm_stopped_data_address (void)
692{
0bfdf32f 693 struct lwp_info *lwp = get_thread_lwp (current_thread);
09b4ad9f
UW
694 return lwp->arch_private->stopped_data_address;
695}
696
697/* Called when a new process is created. */
698static struct arch_process_info *
699arm_new_process (void)
700{
701 struct arch_process_info *info = xcalloc (1, sizeof (*info));
702 return info;
703}
704
705/* Called when a new thread is detected. */
34c703da
GB
706static void
707arm_new_thread (struct lwp_info *lwp)
09b4ad9f
UW
708{
709 struct arch_lwp_info *info = xcalloc (1, sizeof (*info));
710 int i;
711
712 for (i = 0; i < MAX_BPTS; i++)
713 info->bpts_changed[i] = 1;
714 for (i = 0; i < MAX_WPTS; i++)
715 info->wpts_changed[i] = 1;
716
34c703da 717 lwp->arch_private = info;
09b4ad9f
UW
718}
719
3a8a0396
DB
720static void
721arm_new_fork (struct process_info *parent, struct process_info *child)
722{
723 struct arch_process_info *parent_proc_info = parent->private->arch_private;
724 struct arch_process_info *child_proc_info = child->private->arch_private;
725 struct lwp_info *child_lwp;
726 struct arch_lwp_info *child_lwp_info;
727 int i;
728
729 /* These are allocated by linux_add_process. */
730 gdb_assert (parent->private != NULL
731 && parent->private->arch_private != NULL);
732 gdb_assert (child->private != NULL
733 && child->private->arch_private != NULL);
734
735 /* Linux kernel before 2.6.33 commit
736 72f674d203cd230426437cdcf7dd6f681dad8b0d
737 will inherit hardware debug registers from parent
738 on fork/vfork/clone. Newer Linux kernels create such tasks with
739 zeroed debug registers.
740
741 GDB core assumes the child inherits the watchpoints/hw
742 breakpoints of the parent, and will remove them all from the
743 forked off process. Copy the debug registers mirrors into the
744 new process so that all breakpoints and watchpoints can be
745 removed together. The debug registers mirror will become zeroed
746 in the end before detaching the forked off process, thus making
747 this compatible with older Linux kernels too. */
748
749 *child_proc_info = *parent_proc_info;
750
751 /* Mark all the hardware breakpoints and watchpoints as changed to
752 make sure that the registers will be updated. */
753 child_lwp = find_lwp_pid (ptid_of (child));
754 child_lwp_info = child_lwp->arch_private;
755 for (i = 0; i < MAX_BPTS; i++)
756 child_lwp_info->bpts_changed[i] = 1;
757 for (i = 0; i < MAX_WPTS; i++)
758 child_lwp_info->wpts_changed[i] = 1;
759}
760
09b4ad9f
UW
761/* Called when resuming a thread.
762 If the debug regs have changed, update the thread's copies. */
763static void
764arm_prepare_to_resume (struct lwp_info *lwp)
765{
d86d4aaf
DE
766 struct thread_info *thread = get_lwp_thread (lwp);
767 int pid = lwpid_of (thread);
768 struct process_info *proc = find_process_pid (pid_of (thread));
fe978cb0 769 struct arch_process_info *proc_info = proc->priv->arch_private;
09b4ad9f
UW
770 struct arch_lwp_info *lwp_info = lwp->arch_private;
771 int i;
772
773 for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
774 if (lwp_info->bpts_changed[i])
775 {
776 errno = 0;
777
778 if (arm_hwbp_control_is_enabled (proc_info->bpts[i].control))
f15f9948 779 if (ptrace (PTRACE_SETHBPREGS, pid,
b8e1b30e 780 (PTRACE_TYPE_ARG3) ((i << 1) + 1),
f15f9948 781 &proc_info->bpts[i].address) < 0)
71487fd7 782 perror_with_name ("Unexpected error setting breakpoint address");
09b4ad9f
UW
783
784 if (arm_hwbp_control_is_initialized (proc_info->bpts[i].control))
f15f9948 785 if (ptrace (PTRACE_SETHBPREGS, pid,
b8e1b30e 786 (PTRACE_TYPE_ARG3) ((i << 1) + 2),
f15f9948 787 &proc_info->bpts[i].control) < 0)
71487fd7 788 perror_with_name ("Unexpected error setting breakpoint");
09b4ad9f
UW
789
790 lwp_info->bpts_changed[i] = 0;
791 }
792
793 for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
794 if (lwp_info->wpts_changed[i])
795 {
796 errno = 0;
797
798 if (arm_hwbp_control_is_enabled (proc_info->wpts[i].control))
f15f9948 799 if (ptrace (PTRACE_SETHBPREGS, pid,
b8e1b30e 800 (PTRACE_TYPE_ARG3) -((i << 1) + 1),
f15f9948 801 &proc_info->wpts[i].address) < 0)
71487fd7 802 perror_with_name ("Unexpected error setting watchpoint address");
09b4ad9f
UW
803
804 if (arm_hwbp_control_is_initialized (proc_info->wpts[i].control))
f15f9948 805 if (ptrace (PTRACE_SETHBPREGS, pid,
b8e1b30e 806 (PTRACE_TYPE_ARG3) -((i << 1) + 2),
f15f9948 807 &proc_info->wpts[i].control) < 0)
71487fd7 808 perror_with_name ("Unexpected error setting watchpoint");
09b4ad9f
UW
809
810 lwp_info->wpts_changed[i] = 0;
811 }
812}
813
814
58d6951d
DJ
815static int
816arm_get_hwcap (unsigned long *valp)
817{
818 unsigned char *data = alloca (8);
819 int offset = 0;
820
821 while ((*the_target->read_auxv) (offset, data, 8) == 8)
822 {
823 unsigned int *data_p = (unsigned int *)data;
824 if (data_p[0] == AT_HWCAP)
825 {
826 *valp = data_p[1];
827 return 1;
828 }
829
830 offset += 8;
831 }
832
833 *valp = 0;
834 return 0;
835}
836
3aee8918
PA
837static const struct target_desc *
838arm_read_description (void)
58d6951d 839{
0bfdf32f 840 int pid = lwpid_of (current_thread);
71487fd7
UW
841
842 /* Query hardware watchpoint/breakpoint capabilities. */
843 arm_linux_init_hwbp_cap (pid);
844
58d6951d
DJ
845 arm_hwcap = 0;
846 if (arm_get_hwcap (&arm_hwcap) == 0)
3aee8918 847 return tdesc_arm;
58d6951d
DJ
848
849 if (arm_hwcap & HWCAP_IWMMXT)
3aee8918 850 return tdesc_arm_with_iwmmxt;
58d6951d
DJ
851
852 if (arm_hwcap & HWCAP_VFP)
853 {
3aee8918 854 const struct target_desc *result;
58d6951d
DJ
855 char *buf;
856
857 /* NEON implies either no VFP, or VFPv3-D32. We only support
858 it with VFP. */
859 if (arm_hwcap & HWCAP_NEON)
3aee8918 860 result = tdesc_arm_with_neon;
58d6951d 861 else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
3aee8918 862 result = tdesc_arm_with_vfpv3;
58d6951d 863 else
3aee8918 864 result = tdesc_arm_with_vfpv2;
58d6951d
DJ
865
866 /* Now make sure that the kernel supports reading these
867 registers. Support was added in 2.6.30. */
58d6951d 868 errno = 0;
c3e8aadd 869 buf = xmalloc (32 * 8 + 4);
58d6951d
DJ
870 if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
871 && errno == EIO)
872 {
873 arm_hwcap = 0;
3aee8918 874 result = tdesc_arm;
58d6951d
DJ
875 }
876 free (buf);
877
3aee8918 878 return result;
58d6951d
DJ
879 }
880
881 /* The default configuration uses legacy FPA registers, probably
882 simulated. */
3aee8918 883 return tdesc_arm;
58d6951d
DJ
884}
885
3aee8918
PA
886static void
887arm_arch_setup (void)
888{
889 current_process ()->tdesc = arm_read_description ();
890}
891
892static struct regset_info arm_regsets[] = {
1570b33e 893 { PTRACE_GETREGS, PTRACE_SETREGS, 0, 18 * 4,
fb1e4ffc
DJ
894 GENERAL_REGS,
895 arm_fill_gregset, arm_store_gregset },
1570b33e 896 { PTRACE_GETWMMXREGS, PTRACE_SETWMMXREGS, 0, 16 * 8 + 6 * 4,
fb1e4ffc
DJ
897 EXTENDED_REGS,
898 arm_fill_wmmxregset, arm_store_wmmxregset },
1570b33e 899 { PTRACE_GETVFPREGS, PTRACE_SETVFPREGS, 0, 32 * 8 + 4,
58d6951d
DJ
900 EXTENDED_REGS,
901 arm_fill_vfpregset, arm_store_vfpregset },
1570b33e 902 { 0, 0, 0, -1, -1, NULL, NULL }
fb1e4ffc
DJ
903};
904
3aee8918
PA
905static struct regsets_info arm_regsets_info =
906 {
907 arm_regsets, /* regsets */
908 0, /* num_regsets */
909 NULL, /* disabled_regsets */
910 };
911
912static struct usrregs_info arm_usrregs_info =
913 {
914 arm_num_regs,
915 arm_regmap,
916 };
917
918static struct regs_info regs_info =
919 {
920 NULL, /* regset_bitmap */
921 &arm_usrregs_info,
922 &arm_regsets_info
923 };
924
925static const struct regs_info *
926arm_regs_info (void)
927{
928 return &regs_info;
929}
930
2ec06d2e 931struct linux_target_ops the_low_target = {
58d6951d 932 arm_arch_setup,
3aee8918 933 arm_regs_info,
2ec06d2e
DJ
934 arm_cannot_fetch_register,
935 arm_cannot_store_register,
c14dfd32 936 NULL, /* fetch_register */
0d62e5e8
DJ
937 arm_get_pc,
938 arm_set_pc,
aeb75bf5
DJ
939
940 /* Define an ARM-mode breakpoint; we only set breakpoints in the C
941 library, which is most likely to be ARM. If the kernel supports
942 clone events, we will never insert a breakpoint, so even a Thumb
943 C library will work; so will mixing EABI/non-EABI gdbserver and
944 application. */
9d1fb177 945#ifndef __ARM_EABI__
f450004a 946 (const unsigned char *) &arm_breakpoint,
9d1fb177
DJ
947#else
948 (const unsigned char *) &arm_eabi_breakpoint,
949#endif
0d62e5e8 950 arm_breakpoint_len,
3b2fc2ea 951 arm_reinsert_addr,
0d62e5e8
DJ
952 0,
953 arm_breakpoint_at,
802e8e6d 954 arm_supports_z_point_type,
09b4ad9f
UW
955 arm_insert_point,
956 arm_remove_point,
957 arm_stopped_by_watchpoint,
958 arm_stopped_data_address,
959 NULL, /* collect_ptrace_register */
960 NULL, /* supply_ptrace_register */
961 NULL, /* siginfo_fixup */
962 arm_new_process,
963 arm_new_thread,
3a8a0396 964 arm_new_fork,
09b4ad9f 965 arm_prepare_to_resume,
2ec06d2e 966};
3aee8918
PA
967
968void
969initialize_low_arch (void)
970{
971 /* Initialize the Linux target descriptions. */
972 init_registers_arm ();
973 init_registers_arm_with_iwmmxt ();
974 init_registers_arm_with_vfpv2 ();
975 init_registers_arm_with_vfpv3 ();
976 init_registers_arm_with_neon ();
977
978 initialize_regsets_info (&arm_regsets_info);
979}