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5716833c MK |
1 | /* Target-dependent code for the i386. |
2 | ||
213516ef | 3 | Copyright (C) 2001-2023 Free Software Foundation, Inc. |
9a82579f JS |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 9 | the Free Software Foundation; either version 3 of the License, or |
9a82579f JS |
10 | (at your option) any later version. |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
9a82579f JS |
19 | |
20 | #ifndef I386_TDEP_H | |
21 | #define I386_TDEP_H | |
22 | ||
0d12e84c | 23 | #include "gdbarch.h" |
cfba9872 | 24 | #include "infrun.h" |
4c5e7a93 | 25 | #include "expression.h" |
a388ab0b | 26 | #include "gdbsupport/x86-xstate.h" |
cfba9872 | 27 | |
bd2b40ac | 28 | class frame_info_ptr; |
5716833c MK |
29 | struct gdbarch; |
30 | struct reggroup; | |
c783cbd6 | 31 | struct regset; |
5439edaa | 32 | struct regcache; |
da3331ec | 33 | |
96297dab MK |
34 | /* GDB's i386 target supports both the 32-bit Intel Architecture |
35 | (IA-32) and the 64-bit AMD x86-64 architecture. Internally it uses | |
36 | a similar register layout for both. | |
37 | ||
38 | - General purpose registers | |
39 | - FPU data registers | |
40 | - FPU control registers | |
41 | - SSE data registers | |
42 | - SSE control register | |
43 | ||
44 | The general purpose registers for the x86-64 architecture are quite | |
3e8c568d | 45 | different from IA-32. Therefore, gdbarch_fp0_regnum |
96297dab MK |
46 | determines the register number at which the FPU data registers |
47 | start. The number of FPU data and control registers is the same | |
48 | for both architectures. The number of SSE registers however, | |
49 | differs and is determined by the num_xmm_regs member of `struct | |
50 | gdbarch_tdep'. */ | |
51 | ||
8201327c | 52 | /* Convention for returning structures. */ |
3ce1502b | 53 | |
8201327c MK |
54 | enum struct_return |
55 | { | |
56 | pcc_struct_return, /* Return "short" structures in memory. */ | |
57 | reg_struct_return /* Return "short" structures in registers. */ | |
3ce1502b MK |
58 | }; |
59 | ||
96297dab | 60 | /* i386 architecture specific information. */ |
ab25d9bb | 61 | struct i386_gdbarch_tdep : gdbarch_tdep_base |
96297dab | 62 | { |
473f17b0 | 63 | /* General-purpose registers. */ |
345bd07c SM |
64 | int *gregset_reg_offset = 0; |
65 | int gregset_num_regs = 0; | |
66 | size_t sizeof_gregset = 0; | |
473f17b0 MK |
67 | |
68 | /* Floating-point registers. */ | |
345bd07c | 69 | size_t sizeof_fpregset = 0; |
473f17b0 | 70 | |
5716833c MK |
71 | /* Register number for %st(0). The register numbers for the other |
72 | registers follow from this one. Set this to -1 to indicate the | |
73 | absence of an FPU. */ | |
345bd07c | 74 | int st0_regnum = 0; |
5716833c | 75 | |
1ba53b71 | 76 | /* Number of MMX registers. */ |
345bd07c | 77 | int num_mmx_regs = 0; |
1ba53b71 | 78 | |
5716833c MK |
79 | /* Register number for %mm0. Set this to -1 to indicate the absence |
80 | of MMX support. */ | |
345bd07c | 81 | int mm0_regnum = 0; |
5716833c | 82 | |
c131fcee | 83 | /* Number of pseudo YMM registers. */ |
345bd07c | 84 | int num_ymm_regs = 0; |
c131fcee L |
85 | |
86 | /* Register number for %ymm0. Set this to -1 to indicate the absence | |
87 | of pseudo YMM register support. */ | |
345bd07c | 88 | int ymm0_regnum = 0; |
c131fcee | 89 | |
01f9f808 | 90 | /* Number of AVX512 OpMask registers (K-registers) */ |
345bd07c | 91 | int num_k_regs = 0; |
01f9f808 MS |
92 | |
93 | /* Register number for %k0. Set this to -1 to indicate the absence | |
94 | of AVX512 OpMask register support. */ | |
345bd07c | 95 | int k0_regnum = 0; |
01f9f808 MS |
96 | |
97 | /* Number of pseudo ZMM registers ($zmm0-$zmm31). */ | |
345bd07c | 98 | int num_zmm_regs = 0; |
01f9f808 MS |
99 | |
100 | /* Register number for %zmm0. Set this to -1 to indicate the absence | |
101 | of pseudo ZMM register support. */ | |
345bd07c | 102 | int zmm0_regnum = 0; |
01f9f808 | 103 | |
1ba53b71 | 104 | /* Number of byte registers. */ |
345bd07c | 105 | int num_byte_regs = 0; |
1ba53b71 L |
106 | |
107 | /* Register pseudo number for %al. */ | |
345bd07c | 108 | int al_regnum = 0; |
1ba53b71 L |
109 | |
110 | /* Number of pseudo word registers. */ | |
345bd07c | 111 | int num_word_regs = 0; |
1ba53b71 L |
112 | |
113 | /* Register number for %ax. */ | |
345bd07c | 114 | int ax_regnum = 0; |
1ba53b71 L |
115 | |
116 | /* Number of pseudo dword registers. */ | |
345bd07c | 117 | int num_dword_regs = 0; |
1ba53b71 L |
118 | |
119 | /* Register number for %eax. Set this to -1 to indicate the absence | |
120 | of pseudo dword register support. */ | |
345bd07c | 121 | int eax_regnum = 0; |
1ba53b71 | 122 | |
90884b2b | 123 | /* Number of core registers. */ |
345bd07c | 124 | int num_core_regs = 0; |
90884b2b | 125 | |
96297dab | 126 | /* Number of SSE registers. */ |
345bd07c | 127 | int num_xmm_regs = 0; |
8201327c | 128 | |
01f9f808 | 129 | /* Number of SSE registers added in AVX512. */ |
345bd07c | 130 | int num_xmm_avx512_regs = 0; |
01f9f808 MS |
131 | |
132 | /* Register number of XMM16, the first XMM register added in AVX512. */ | |
345bd07c | 133 | int xmm16_regnum = 0; |
01f9f808 MS |
134 | |
135 | /* Number of YMM registers added in AVX512. */ | |
345bd07c | 136 | int num_ymm_avx512_regs = 0; |
01f9f808 MS |
137 | |
138 | /* Register number of YMM16, the first YMM register added in AVX512. */ | |
345bd07c | 139 | int ymm16_regnum = 0; |
01f9f808 | 140 | |
c131fcee | 141 | /* Bits of the extended control register 0 (the XFEATURE_ENABLED_MASK |
1777feb0 MS |
142 | register), excluding the x87 bit, which are supported by this GDB. */ |
143 | ||
345bd07c | 144 | uint64_t xcr0 = 0; |
c131fcee L |
145 | |
146 | /* Offset of XCR0 in XSAVE extended state. */ | |
345bd07c | 147 | int xsave_xcr0_offset = 0; |
c131fcee | 148 | |
a388ab0b JB |
149 | /* Layout of the XSAVE area extended region. */ |
150 | x86_xsave_layout xsave_layout; | |
151 | ||
90884b2b | 152 | /* Register names. */ |
345bd07c | 153 | const char * const *register_names = nullptr; |
90884b2b | 154 | |
c131fcee L |
155 | /* Register number for %ymm0h. Set this to -1 to indicate the absence |
156 | of upper YMM register support. */ | |
345bd07c | 157 | int ymm0h_regnum = 0; |
c131fcee L |
158 | |
159 | /* Upper YMM register names. Only used for tdesc_numbered_register. */ | |
345bd07c | 160 | const char * const *ymmh_register_names = nullptr; |
c131fcee | 161 | |
01f9f808 MS |
162 | /* Register number for %ymm16h. Set this to -1 to indicate the absence |
163 | of support for YMM16-31. */ | |
345bd07c | 164 | int ymm16h_regnum = 0; |
01f9f808 MS |
165 | |
166 | /* YMM16-31 register names. Only used for tdesc_numbered_register. */ | |
345bd07c | 167 | const char * const *ymm16h_register_names = nullptr; |
01f9f808 | 168 | |
1dbcd68c WT |
169 | /* Register number for %bnd0r. Set this to -1 to indicate the absence |
170 | bound registers. */ | |
345bd07c | 171 | int bnd0r_regnum = 0; |
1dbcd68c WT |
172 | |
173 | /* Register number for pseudo register %bnd0. Set this to -1 to indicate the absence | |
174 | bound registers. */ | |
345bd07c | 175 | int bnd0_regnum = 0; |
1dbcd68c WT |
176 | |
177 | /* Register number for %bndcfgu. Set this to -1 to indicate the absence | |
178 | bound control registers. */ | |
345bd07c | 179 | int bndcfgu_regnum = 0; |
1dbcd68c WT |
180 | |
181 | /* MPX register names. Only used for tdesc_numbered_register. */ | |
345bd07c | 182 | const char * const *mpx_register_names = nullptr; |
1dbcd68c | 183 | |
01f9f808 MS |
184 | /* Register number for %zmm0h. Set this to -1 to indicate the absence |
185 | of ZMM_HI256 register support. */ | |
345bd07c | 186 | int zmm0h_regnum = 0; |
01f9f808 MS |
187 | |
188 | /* OpMask register names. */ | |
345bd07c | 189 | const char * const *k_register_names = nullptr; |
01f9f808 MS |
190 | |
191 | /* ZMM register names. Only used for tdesc_numbered_register. */ | |
345bd07c | 192 | const char * const *zmmh_register_names = nullptr; |
01f9f808 MS |
193 | |
194 | /* XMM16-31 register names. Only used for tdesc_numbered_register. */ | |
345bd07c | 195 | const char * const *xmm_avx512_register_names = nullptr; |
01f9f808 MS |
196 | |
197 | /* YMM16-31 register names. Only used for tdesc_numbered_register. */ | |
345bd07c | 198 | const char * const *ymm_avx512_register_names = nullptr; |
01f9f808 | 199 | |
51547df6 | 200 | /* Number of PKEYS registers. */ |
345bd07c | 201 | int num_pkeys_regs = 0; |
51547df6 MS |
202 | |
203 | /* Register number for PKRU register. */ | |
345bd07c | 204 | int pkru_regnum = 0; |
51547df6 MS |
205 | |
206 | /* PKEYS register names. */ | |
345bd07c | 207 | const char * const *pkeys_register_names = nullptr; |
51547df6 | 208 | |
1163a4b7 JB |
209 | /* Register number for %fsbase. Set this to -1 to indicate the |
210 | absence of segment base registers. */ | |
345bd07c | 211 | int fsbase_regnum = 0; |
1163a4b7 | 212 | |
90884b2b | 213 | /* Target description. */ |
345bd07c | 214 | const struct target_desc *tdesc = nullptr; |
90884b2b L |
215 | |
216 | /* Register group function. */ | |
345bd07c | 217 | gdbarch_register_reggroup_p_ftype *register_reggroup_p = nullptr; |
90884b2b | 218 | |
8201327c | 219 | /* Offset of saved PC in jmp_buf. */ |
345bd07c | 220 | int jb_pc_offset = 0; |
8201327c MK |
221 | |
222 | /* Convention for returning structures. */ | |
345bd07c | 223 | enum struct_return struct_return {}; |
8201327c | 224 | |
8201327c | 225 | /* Address range where sigtramp lives. */ |
345bd07c SM |
226 | CORE_ADDR sigtramp_start = 0; |
227 | CORE_ADDR sigtramp_end = 0; | |
8201327c | 228 | |
911bc6ee | 229 | /* Detect sigtramp. */ |
9efe17a3 | 230 | int (*sigtramp_p) (frame_info_ptr) = nullptr; |
911bc6ee | 231 | |
21d0e8a4 | 232 | /* Get address of sigcontext for sigtramp. */ |
9efe17a3 | 233 | CORE_ADDR (*sigcontext_addr) (frame_info_ptr) = nullptr; |
21d0e8a4 | 234 | |
a3386186 | 235 | /* Offset of registers in `struct sigcontext'. */ |
345bd07c SM |
236 | int *sc_reg_offset = 0; |
237 | int sc_num_regs = 0; | |
a3386186 MK |
238 | |
239 | /* Offset of saved PC and SP in `struct sigcontext'. Usage of these | |
240 | is deprecated, please use `sc_reg_offset' instead. */ | |
345bd07c SM |
241 | int sc_pc_offset = 0; |
242 | int sc_sp_offset = 0; | |
794ac428 UW |
243 | |
244 | /* ISA-specific data types. */ | |
345bd07c SM |
245 | struct type *i386_mmx_type = nullptr; |
246 | struct type *i386_ymm_type = nullptr; | |
247 | struct type *i386_zmm_type = nullptr; | |
248 | struct type *i387_ext_type = nullptr; | |
249 | struct type *i386_bnd_type = nullptr; | |
7ad10968 HZ |
250 | |
251 | /* Process record/replay target. */ | |
cf648174 HZ |
252 | /* The map for registers because the AMD64's registers order |
253 | in GDB is not same as I386 instructions. */ | |
345bd07c | 254 | const int *record_regmap = nullptr; |
7ad10968 | 255 | /* Parse intx80 args. */ |
345bd07c | 256 | int (*i386_intx80_record) (struct regcache *regcache) = nullptr; |
7ad10968 | 257 | /* Parse sysenter args. */ |
345bd07c | 258 | int (*i386_sysenter_record) (struct regcache *regcache) = nullptr; |
cf648174 | 259 | /* Parse syscall args. */ |
345bd07c | 260 | int (*i386_syscall_record) (struct regcache *regcache) = nullptr; |
8f0435f7 AA |
261 | |
262 | /* Regsets. */ | |
345bd07c | 263 | const struct regset *fpregset = nullptr; |
96297dab MK |
264 | }; |
265 | ||
266 | /* Floating-point registers. */ | |
267 | ||
30baf67b | 268 | /* All FPU control registers (except for FIOFF and FOOFF) are 16-bit |
96297dab MK |
269 | (at most) in the FPU, but are zero-extended to 32 bits in GDB's |
270 | register cache. */ | |
271 | ||
23a34459 AC |
272 | /* Return non-zero if REGNUM matches the FP register and the FP |
273 | register set is active. */ | |
20a6ec49 MD |
274 | extern int i386_fp_regnum_p (struct gdbarch *, int); |
275 | extern int i386_fpc_regnum_p (struct gdbarch *, int); | |
96297dab | 276 | |
a3386186 MK |
277 | /* Register numbers of various important registers. */ |
278 | ||
bcf48cc7 MK |
279 | enum i386_regnum |
280 | { | |
281 | I386_EAX_REGNUM, /* %eax */ | |
282 | I386_ECX_REGNUM, /* %ecx */ | |
283 | I386_EDX_REGNUM, /* %edx */ | |
284 | I386_EBX_REGNUM, /* %ebx */ | |
285 | I386_ESP_REGNUM, /* %esp */ | |
286 | I386_EBP_REGNUM, /* %ebp */ | |
287 | I386_ESI_REGNUM, /* %esi */ | |
288 | I386_EDI_REGNUM, /* %edi */ | |
289 | I386_EIP_REGNUM, /* %eip */ | |
290 | I386_EFLAGS_REGNUM, /* %eflags */ | |
2666fb59 MK |
291 | I386_CS_REGNUM, /* %cs */ |
292 | I386_SS_REGNUM, /* %ss */ | |
e9ff708b AC |
293 | I386_DS_REGNUM, /* %ds */ |
294 | I386_ES_REGNUM, /* %es */ | |
295 | I386_FS_REGNUM, /* %fs */ | |
296 | I386_GS_REGNUM, /* %gs */ | |
90884b2b | 297 | I386_ST0_REGNUM, /* %st(0) */ |
2c1e03b4 | 298 | I386_MXCSR_REGNUM = 40, /* %mxcsr */ |
c131fcee | 299 | I386_YMM0H_REGNUM, /* %ymm0h */ |
1dbcd68c WT |
300 | I386_YMM7H_REGNUM = I386_YMM0H_REGNUM + 7, |
301 | I386_BND0R_REGNUM, | |
302 | I386_BND3R_REGNUM = I386_BND0R_REGNUM + 3, | |
303 | I386_BNDCFGU_REGNUM, | |
01f9f808 MS |
304 | I386_BNDSTATUS_REGNUM, |
305 | I386_K0_REGNUM, /* %k0 */ | |
306 | I386_K7_REGNUM = I386_K0_REGNUM + 7, | |
307 | I386_ZMM0H_REGNUM, /* %zmm0h */ | |
51547df6 | 308 | I386_ZMM7H_REGNUM = I386_ZMM0H_REGNUM + 7, |
1163a4b7 JB |
309 | I386_PKRU_REGNUM, |
310 | I386_FSBASE_REGNUM, | |
311 | I386_GSBASE_REGNUM | |
bcf48cc7 | 312 | }; |
a3386186 | 313 | |
cf648174 HZ |
314 | /* Register numbers of RECORD_REGMAP. */ |
315 | ||
316 | enum record_i386_regnum | |
317 | { | |
318 | X86_RECORD_REAX_REGNUM, | |
319 | X86_RECORD_RECX_REGNUM, | |
320 | X86_RECORD_REDX_REGNUM, | |
321 | X86_RECORD_REBX_REGNUM, | |
322 | X86_RECORD_RESP_REGNUM, | |
323 | X86_RECORD_REBP_REGNUM, | |
324 | X86_RECORD_RESI_REGNUM, | |
325 | X86_RECORD_REDI_REGNUM, | |
326 | X86_RECORD_R8_REGNUM, | |
327 | X86_RECORD_R9_REGNUM, | |
328 | X86_RECORD_R10_REGNUM, | |
329 | X86_RECORD_R11_REGNUM, | |
330 | X86_RECORD_R12_REGNUM, | |
331 | X86_RECORD_R13_REGNUM, | |
332 | X86_RECORD_R14_REGNUM, | |
333 | X86_RECORD_R15_REGNUM, | |
334 | X86_RECORD_REIP_REGNUM, | |
335 | X86_RECORD_EFLAGS_REGNUM, | |
336 | X86_RECORD_CS_REGNUM, | |
337 | X86_RECORD_SS_REGNUM, | |
338 | X86_RECORD_DS_REGNUM, | |
339 | X86_RECORD_ES_REGNUM, | |
340 | X86_RECORD_FS_REGNUM, | |
341 | X86_RECORD_GS_REGNUM, | |
342 | }; | |
343 | ||
8201327c | 344 | #define I386_NUM_GREGS 16 |
8201327c MK |
345 | #define I386_NUM_XREGS 9 |
346 | ||
90884b2b | 347 | #define I386_SSE_NUM_REGS (I386_MXCSR_REGNUM + 1) |
c131fcee | 348 | #define I386_AVX_NUM_REGS (I386_YMM7H_REGNUM + 1) |
1dbcd68c | 349 | #define I386_MPX_NUM_REGS (I386_BNDSTATUS_REGNUM + 1) |
01f9f808 | 350 | #define I386_AVX512_NUM_REGS (I386_ZMM7H_REGNUM + 1) |
51547df6 | 351 | #define I386_PKEYS_NUM_REGS (I386_PKRU_REGNUM + 1) |
1163a4b7 | 352 | #define I386_NUM_REGS (I386_GSBASE_REGNUM + 1) |
8201327c | 353 | |
00f8375e | 354 | /* Size of the largest register. */ |
01f9f808 | 355 | #define I386_MAX_REGISTER_SIZE 64 |
00f8375e | 356 | |
5ae96ec1 | 357 | /* Types for i386-specific registers. */ |
27067745 | 358 | extern struct type *i387_ext_type (struct gdbarch *gdbarch); |
794ac428 | 359 | |
1b2fb35d | 360 | /* Checks of different registers. */ |
1ba53b71 L |
361 | extern int i386_byte_regnum_p (struct gdbarch *gdbarch, int regnum); |
362 | extern int i386_word_regnum_p (struct gdbarch *gdbarch, int regnum); | |
363 | extern int i386_dword_regnum_p (struct gdbarch *gdbarch, int regnum); | |
c131fcee | 364 | extern int i386_xmm_regnum_p (struct gdbarch *gdbarch, int regnum); |
01f9f808 | 365 | extern int i386_xmm_avx512_regnum_p (struct gdbarch * gdbarch, int regnum); |
c131fcee | 366 | extern int i386_ymm_regnum_p (struct gdbarch *gdbarch, int regnum); |
01f9f808 | 367 | extern int i386_ymm_avx512_regnum_p (struct gdbarch *gdbarch, int regnum); |
1dbcd68c | 368 | extern int i386_bnd_regnum_p (struct gdbarch *gdbarch, int regnum); |
01f9f808 MS |
369 | extern int i386_k_regnum_p (struct gdbarch *gdbarch, int regnum); |
370 | extern int i386_zmm_regnum_p (struct gdbarch *gdbarch, int regnum); | |
371 | extern int i386_zmmh_regnum_p (struct gdbarch *gdbarch, int regnum); | |
51547df6 | 372 | extern bool i386_pkru_regnum_p (struct gdbarch *gdbarch, int regnum); |
1ba53b71 L |
373 | |
374 | extern const char *i386_pseudo_register_name (struct gdbarch *gdbarch, | |
375 | int regnum); | |
fff4548b MK |
376 | extern struct type *i386_pseudo_register_type (struct gdbarch *gdbarch, |
377 | int regnum); | |
1ba53b71 | 378 | |
3543a589 | 379 | extern void i386_pseudo_register_read_into_value (struct gdbarch *gdbarch, |
849d0ba8 | 380 | readable_regcache *regcache, |
3543a589 TT |
381 | int regnum, |
382 | struct value *result); | |
383 | ||
1ba53b71 L |
384 | extern void i386_pseudo_register_write (struct gdbarch *gdbarch, |
385 | struct regcache *regcache, | |
386 | int regnum, const gdb_byte *buf); | |
387 | ||
62e5fd57 MK |
388 | extern int i386_ax_pseudo_register_collect (struct gdbarch *gdbarch, |
389 | struct agent_expr *ax, | |
390 | int regnum); | |
391 | ||
508fbfea MK |
392 | /* Segment selectors. */ |
393 | #define I386_SEL_RPL 0x0003 /* Requester's Privilege Level mask. */ | |
33b5899f TV |
394 | #define I386_SEL_UPL 0x0003 /* User Privilege Level. */ |
395 | #define I386_SEL_KPL 0x0000 /* Kernel Privilege Level. */ | |
508fbfea | 396 | |
237fc4c9 PA |
397 | /* The length of the longest i386 instruction (according to |
398 | include/asm-i386/kprobes.h in Linux 2.6. */ | |
399 | #define I386_MAX_INSN_LEN (16) | |
400 | ||
1cce71eb | 401 | /* Functions exported from i386-tdep.c. */ |
bd2b40ac | 402 | extern CORE_ADDR i386_pe_skip_trampoline_code (frame_info_ptr frame, |
e17a4113 | 403 | CORE_ADDR pc, char *name); |
1777feb0 MS |
404 | extern CORE_ADDR i386_skip_main_prologue (struct gdbarch *gdbarch, |
405 | CORE_ADDR pc); | |
1cce71eb | 406 | |
627c7fb8 HD |
407 | /* The "push_dummy_call" gdbarch method, optionally with the thiscall |
408 | calling convention. */ | |
409 | extern CORE_ADDR i386_thiscall_push_dummy_call (struct gdbarch *gdbarch, | |
410 | struct value *function, | |
411 | struct regcache *regcache, | |
412 | CORE_ADDR bp_addr, | |
413 | int nargs, struct value **args, | |
414 | CORE_ADDR sp, | |
415 | function_call_return_method | |
416 | return_method, | |
417 | CORE_ADDR struct_addr, | |
418 | bool thiscall); | |
419 | ||
4bd207ef | 420 | /* Return whether the THIS_FRAME corresponds to a sigtramp routine. */ |
bd2b40ac | 421 | extern int i386_sigtramp_p (frame_info_ptr this_frame); |
4bd207ef | 422 | |
38c968cf AC |
423 | /* Return non-zero if REGNUM is a member of the specified group. */ |
424 | extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum, | |
dbf5d61b | 425 | const struct reggroup *group); |
38c968cf | 426 | |
20187ed5 MK |
427 | /* Supply register REGNUM from the general-purpose register set REGSET |
428 | to register cache REGCACHE. If REGNUM is -1, do this for all | |
429 | registers in REGSET. */ | |
430 | extern void i386_supply_gregset (const struct regset *regset, | |
431 | struct regcache *regcache, int regnum, | |
432 | const void *gregs, size_t len); | |
3d171c85 | 433 | |
ecc37a5a AA |
434 | /* General-purpose register set. */ |
435 | extern const struct regset i386_gregset; | |
20187ed5 | 436 | |
8f0435f7 AA |
437 | /* Floating-point register set. */ |
438 | extern const struct regset i386_fpregset; | |
439 | ||
490496c3 AA |
440 | /* Default iterator over core file register note sections. */ |
441 | extern void | |
442 | i386_iterate_over_regset_sections (struct gdbarch *gdbarch, | |
443 | iterate_over_regset_sections_cb *cb, | |
444 | void *cb_data, | |
445 | const struct regcache *regcache); | |
237fc4c9 | 446 | |
1152d984 SM |
447 | typedef buf_displaced_step_copy_insn_closure |
448 | i386_displaced_step_copy_insn_closure; | |
cfba9872 | 449 | |
1152d984 | 450 | extern displaced_step_copy_insn_closure_up i386_displaced_step_copy_insn |
b55078be DE |
451 | (struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to, |
452 | struct regcache *regs); | |
1152d984 SM |
453 | extern void i386_displaced_step_fixup |
454 | (struct gdbarch *gdbarch, displaced_step_copy_insn_closure *closure, | |
cf141dd8 | 455 | CORE_ADDR from, CORE_ADDR to, regcache *regs, bool completed_p); |
237fc4c9 | 456 | |
8201327c MK |
457 | /* Initialize a basic ELF architecture variant. */ |
458 | extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *); | |
459 | ||
460 | /* Initialize a SVR4 architecture variant. */ | |
461 | extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *); | |
a6b808b4 | 462 | |
8f10c932 PA |
463 | /* Convert SVR4 register number REG to the appropriate register number |
464 | used by GDB. */ | |
465 | extern int i386_svr4_reg_to_regnum (struct gdbarch *gdbarch, int reg); | |
466 | ||
a6b808b4 | 467 | extern int i386_process_record (struct gdbarch *gdbarch, |
dda83cd7 | 468 | struct regcache *regcache, CORE_ADDR addr); |
1163a4b7 JB |
469 | extern const struct target_desc *i386_target_description (uint64_t xcr0, |
470 | bool segments); | |
55aa24fb | 471 | |
012b3a21 WT |
472 | /* Return true iff the current target is MPX enabled. */ |
473 | extern int i386_mpx_enabled (void); | |
de0b6abb | 474 | \f |
8201327c | 475 | |
03b62bbb | 476 | /* Functions and variables exported from i386-bsd-tdep.c. */ |
8201327c | 477 | |
3cac699e | 478 | extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *); |
5d93ae8c MK |
479 | extern CORE_ADDR i386obsd_sigtramp_start_addr; |
480 | extern CORE_ADDR i386obsd_sigtramp_end_addr; | |
de0b6abb MK |
481 | extern int i386obsd_sc_reg_offset[]; |
482 | extern int i386bsd_sc_reg_offset[]; | |
3ce1502b | 483 | |
55aa24fb SDJ |
484 | /* SystemTap related functions. */ |
485 | ||
486 | extern int i386_stap_is_single_operand (struct gdbarch *gdbarch, | |
487 | const char *s); | |
488 | ||
4c5e7a93 TT |
489 | extern expr::operation_up i386_stap_parse_special_token |
490 | (struct gdbarch *gdbarch, struct stap_parse_info *p); | |
55aa24fb | 491 | |
96297dab | 492 | #endif /* i386-tdep.h */ |