[thirdparty/binutils-gdb.git] / gdb / i386-tdep.h

/* Target-dependent code for the i386.

   Copyright (C) 2001-2013 Free Software Foundation, Inc.

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */

#ifndef I386_TDEP_H
#define I386_TDEP_H

struct frame_info;
struct gdbarch;
struct reggroup;
struct regset;
struct regcache;

/* GDB's i386 target supports both the 32-bit Intel Architecture
   (IA-32) and the 64-bit AMD x86-64 architecture.  Internally it uses
   a similar register layout for both.

   - General purpose registers
   - FPU data registers
   - FPU control registers
   - SSE data registers
   - SSE control register

   The general purpose registers for the x86-64 architecture are quite
   different from IA-32.  Therefore, gdbarch_fp0_regnum
   determines the register number at which the FPU data registers
   start.  The number of FPU data and control registers is the same
   for both architectures.  The number of SSE registers however,
   differs and is determined by the num_xmm_regs member of `struct
   gdbarch_tdep'.  */

/* Convention for returning structures.  */

enum struct_return
{
  pcc_struct_return,		/* Return "short" structures in memory.  */
  reg_struct_return		/* Return "short" structures in registers.  */
};

/* i386 architecture specific information.  */
struct gdbarch_tdep
{
  /* General-purpose registers.  */
  struct regset *gregset;
  int *gregset_reg_offset;
  int gregset_num_regs;
  size_t sizeof_gregset;

  /* Floating-point registers.  */
  struct regset *fpregset;
  size_t sizeof_fpregset;

  /* XSAVE extended state.  */
  struct regset *xstateregset;

  /* Register number for %st(0).  The register numbers for the other
     registers follow from this one.  Set this to -1 to indicate the
     absence of an FPU.  */
  int st0_regnum;

  /* Number of MMX registers.  */
  int num_mmx_regs;

  /* Register number for %mm0.  Set this to -1 to indicate the absence
     of MMX support.  */
  int mm0_regnum;

  /* Number of pseudo YMM registers.  */
  int num_ymm_regs;

  /* Register number for %ymm0.  Set this to -1 to indicate the absence
     of pseudo YMM register support.  */
  int ymm0_regnum;

  /* Number of byte registers.  */
  int num_byte_regs;

  /* Register pseudo number for %al.  */
  int al_regnum;

  /* Number of pseudo word registers.  */
  int num_word_regs;

  /* Register number for %ax.  */
  int ax_regnum;

  /* Number of pseudo dword registers.  */
  int num_dword_regs;

  /* Register number for %eax.  Set this to -1 to indicate the absence
     of pseudo dword register support.  */
  int eax_regnum;

  /* Number of core registers.  */
  int num_core_regs;

  /* Number of SSE registers.  */
  int num_xmm_regs;

  /* Bits of the extended control register 0 (the XFEATURE_ENABLED_MASK
     register), excluding the x87 bit, which are supported by this GDB.  */

  uint64_t xcr0;

  /* Offset of XCR0 in XSAVE extended state.  */
  int xsave_xcr0_offset;

  /* Register names.  */
  const char **register_names;

  /* Register number for %ymm0h.  Set this to -1 to indicate the absence
     of upper YMM register support.  */
  int ymm0h_regnum;

  /* Upper YMM register names.  Only used for tdesc_numbered_register.  */
  const char **ymmh_register_names;

  /* Target description.  */
  const struct target_desc *tdesc;

  /* Register group function.  */
  const void *register_reggroup_p;

  /* Offset of saved PC in jmp_buf.  */
  int jb_pc_offset;

  /* Convention for returning structures.  */
  enum struct_return struct_return;

  /* Address range where sigtramp lives.  */
  CORE_ADDR sigtramp_start;
  CORE_ADDR sigtramp_end;

  /* Detect sigtramp.  */
  int (*sigtramp_p) (struct frame_info *);

  /* Get address of sigcontext for sigtramp.  */
  CORE_ADDR (*sigcontext_addr) (struct frame_info *);

  /* Offset of registers in `struct sigcontext'.  */
  int *sc_reg_offset;
  int sc_num_regs;

  /* Offset of saved PC and SP in `struct sigcontext'.  Usage of these
     is deprecated, please use `sc_reg_offset' instead.  */
  int sc_pc_offset;
  int sc_sp_offset;

  /* ISA-specific data types.  */
  struct type *i386_mmx_type;
  struct type *i386_ymm_type;
  struct type *i387_ext_type;

  /* Process record/replay target.  */
  /* The map for registers because the AMD64's registers order
     in GDB is not same as I386 instructions.  */
  const int *record_regmap;
  /* Parse intx80 args.  */
  int (*i386_intx80_record) (struct regcache *regcache);
  /* Parse sysenter args.  */
  int (*i386_sysenter_record) (struct regcache *regcache);
  /* Parse syscall args.  */
  int (*i386_syscall_record) (struct regcache *regcache);
};

/* Floating-point registers.  */

/* All FPU control regusters (except for FIOFF and FOOFF) are 16-bit
   (at most) in the FPU, but are zero-extended to 32 bits in GDB's
   register cache.  */

/* Return non-zero if REGNUM matches the FP register and the FP
   register set is active.  */
extern int i386_fp_regnum_p (struct gdbarch *, int);
extern int i386_fpc_regnum_p (struct gdbarch *, int);

/* Register numbers of various important registers.  */

enum i386_regnum
{
  I386_EAX_REGNUM,		/* %eax */
  I386_ECX_REGNUM,		/* %ecx */
  I386_EDX_REGNUM,		/* %edx */
  I386_EBX_REGNUM,		/* %ebx */
  I386_ESP_REGNUM,		/* %esp */
  I386_EBP_REGNUM,		/* %ebp */
  I386_ESI_REGNUM,		/* %esi */
  I386_EDI_REGNUM,		/* %edi */
  I386_EIP_REGNUM,		/* %eip */
  I386_EFLAGS_REGNUM,		/* %eflags */
  I386_CS_REGNUM,		/* %cs */
  I386_SS_REGNUM,		/* %ss */
  I386_DS_REGNUM,		/* %ds */
  I386_ES_REGNUM,		/* %es */
  I386_FS_REGNUM,		/* %fs */
  I386_GS_REGNUM,		/* %gs */
  I386_ST0_REGNUM,		/* %st(0) */
  I386_MXCSR_REGNUM = 40,	/* %mxcsr */ 
  I386_YMM0H_REGNUM,		/* %ymm0h */
  I386_YMM7H_REGNUM = I386_YMM0H_REGNUM + 7
};

/* Register numbers of RECORD_REGMAP.  */

enum record_i386_regnum
{
  X86_RECORD_REAX_REGNUM,
  X86_RECORD_RECX_REGNUM,
  X86_RECORD_REDX_REGNUM,
  X86_RECORD_REBX_REGNUM,
  X86_RECORD_RESP_REGNUM,
  X86_RECORD_REBP_REGNUM,
  X86_RECORD_RESI_REGNUM,
  X86_RECORD_REDI_REGNUM,
  X86_RECORD_R8_REGNUM,
  X86_RECORD_R9_REGNUM,
  X86_RECORD_R10_REGNUM,
  X86_RECORD_R11_REGNUM,
  X86_RECORD_R12_REGNUM,
  X86_RECORD_R13_REGNUM,
  X86_RECORD_R14_REGNUM,
  X86_RECORD_R15_REGNUM,
  X86_RECORD_REIP_REGNUM,
  X86_RECORD_EFLAGS_REGNUM,
  X86_RECORD_CS_REGNUM,
  X86_RECORD_SS_REGNUM,
  X86_RECORD_DS_REGNUM,
  X86_RECORD_ES_REGNUM,
  X86_RECORD_FS_REGNUM,
  X86_RECORD_GS_REGNUM,
};

#define I386_NUM_GREGS	16
#define I386_NUM_XREGS  9

#define I386_SSE_NUM_REGS	(I386_MXCSR_REGNUM + 1)
#define I386_AVX_NUM_REGS	(I386_YMM7H_REGNUM + 1)

/* Size of the largest register.  */
#define I386_MAX_REGISTER_SIZE	16

/* Types for i386-specific registers.  */
extern struct type *i387_ext_type (struct gdbarch *gdbarch);

/* Checks of different pseudo-registers.  */
extern int i386_byte_regnum_p (struct gdbarch *gdbarch, int regnum);
extern int i386_word_regnum_p (struct gdbarch *gdbarch, int regnum);
extern int i386_dword_regnum_p (struct gdbarch *gdbarch, int regnum);
extern int i386_xmm_regnum_p (struct gdbarch *gdbarch, int regnum);
extern int i386_ymm_regnum_p (struct gdbarch *gdbarch, int regnum);

extern const char *i386_pseudo_register_name (struct gdbarch *gdbarch,
					      int regnum);
extern struct type *i386_pseudo_register_type (struct gdbarch *gdbarch,
					       int regnum);

extern void i386_pseudo_register_read_into_value (struct gdbarch *gdbarch,
						  struct regcache *regcache,
						  int regnum,
						  struct value *result);

extern void i386_pseudo_register_write (struct gdbarch *gdbarch,
					struct regcache *regcache,
					int regnum, const gdb_byte *buf);

/* Segment selectors.  */
#define I386_SEL_RPL	0x0003  /* Requester's Privilege Level mask.  */
#define I386_SEL_UPL	0x0003	/* User Privilige Level.  */
#define I386_SEL_KPL	0x0000	/* Kernel Privilige Level.  */

/* The length of the longest i386 instruction (according to
   include/asm-i386/kprobes.h in Linux 2.6.  */
#define I386_MAX_INSN_LEN (16)

/* Functions exported from i386-tdep.c.  */
extern CORE_ADDR i386_pe_skip_trampoline_code (struct frame_info *frame,
					       CORE_ADDR pc, char *name);
extern CORE_ADDR i386_skip_main_prologue (struct gdbarch *gdbarch,
					  CORE_ADDR pc);

/* Return whether the THIS_FRAME corresponds to a sigtramp routine.  */
extern int i386_sigtramp_p (struct frame_info *this_frame);

/* Return non-zero if REGNUM is a member of the specified group.  */
extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
				     struct reggroup *group);

/* Supply register REGNUM from the general-purpose register set REGSET
   to register cache REGCACHE.  If REGNUM is -1, do this for all
   registers in REGSET.  */
extern void i386_supply_gregset (const struct regset *regset,
				 struct regcache *regcache, int regnum,
				 const void *gregs, size_t len);

/* Collect register REGNUM from the register cache REGCACHE and store
   it in the buffer specified by GREGS and LEN as described by the
   general-purpose register set REGSET.  If REGNUM is -1, do this for
   all registers in REGSET.  */
extern void i386_collect_gregset (const struct regset *regset,
				  const struct regcache *regcache,
				  int regnum, void *gregs, size_t len);

/* Return the appropriate register set for the core section identified
   by SECT_NAME and SECT_SIZE.  */
extern const struct regset *
  i386_regset_from_core_section (struct gdbarch *gdbarch,
				 const char *sect_name, size_t sect_size);


extern struct displaced_step_closure *i386_displaced_step_copy_insn
  (struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to,
   struct regcache *regs);
extern void i386_displaced_step_fixup (struct gdbarch *gdbarch,
				       struct displaced_step_closure *closure,
				       CORE_ADDR from, CORE_ADDR to,
				       struct regcache *regs);

/* Initialize a basic ELF architecture variant.  */
extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *);

/* Initialize a SVR4 architecture variant.  */
extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);

extern int i386_process_record (struct gdbarch *gdbarch,
                                struct regcache *regcache, CORE_ADDR addr);

\f

/* Functions and variables exported from i386bsd-tdep.c.  */

extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
extern CORE_ADDR i386fbsd_sigtramp_start_addr;
extern CORE_ADDR i386fbsd_sigtramp_end_addr;
extern CORE_ADDR i386obsd_sigtramp_start_addr;
extern CORE_ADDR i386obsd_sigtramp_end_addr;
extern int i386fbsd4_sc_reg_offset[];
extern int i386fbsd_sc_reg_offset[];
extern int i386nbsd_sc_reg_offset[];
extern int i386obsd_sc_reg_offset[];
extern int i386bsd_sc_reg_offset[];

/* SystemTap related functions.  */

extern int i386_stap_is_single_operand (struct gdbarch *gdbarch,
					const char *s);

extern int i386_stap_parse_special_token (struct gdbarch *gdbarch,
					  struct stap_parse_info *p);

#endif /* i386-tdep.h */
Commit	Line	Data
5716833c MK	1	/* Target-dependent code for the i386.
5716833c MK	2
28e7fd62	3	Copyright (C) 2001-2013 Free Software Foundation, Inc.
9a82579f JS	4
	5	This file is part of GDB.
	6
	7	This program is free software; you can redistribute it and/or modify
	8	it under the terms of the GNU General Public License as published by
a9762ec7	9	the Free Software Foundation; either version 3 of the License, or
9a82579f JS	10	(at your option) any later version.
	11
	12	This program is distributed in the hope that it will be useful,
	13	but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	GNU General Public License for more details.
	16
	17	You should have received a copy of the GNU General Public License
a9762ec7	18	along with this program. If not, see <http://www.gnu.org/licenses/>. */
9a82579f JS	19
	20	#ifndef I386_TDEP_H
	21	#define I386_TDEP_H
	22
da3331ec	23	struct frame_info;
5716833c MK	24	struct gdbarch;
5716833c MK	25	struct reggroup;
c783cbd6	26	struct regset;
5439edaa	27	struct regcache;
da3331ec	28
96297dab MK	29	/* GDB's i386 target supports both the 32-bit Intel Architecture
	30	(IA-32) and the 64-bit AMD x86-64 architecture. Internally it uses
	31	a similar register layout for both.
	32
	33	- General purpose registers
	34	- FPU data registers
	35	- FPU control registers
	36	- SSE data registers
	37	- SSE control register
	38
	39	The general purpose registers for the x86-64 architecture are quite
3e8c568d	40	different from IA-32. Therefore, gdbarch_fp0_regnum
96297dab MK	41	determines the register number at which the FPU data registers
	42	start. The number of FPU data and control registers is the same
	43	for both architectures. The number of SSE registers however,
	44	differs and is determined by the num_xmm_regs member of `struct
	45	gdbarch_tdep'. */
	46
8201327c	47	/* Convention for returning structures. */
3ce1502b	48
8201327c MK	49	enum struct_return
	50	{
	51	pcc_struct_return, /* Return "short" structures in memory. */
	52	reg_struct_return /* Return "short" structures in registers. */
3ce1502b MK	53	};
3ce1502b MK	54
96297dab MK	55	/* i386 architecture specific information. */
	56	struct gdbarch_tdep
	57	{
473f17b0 MK	58	/* General-purpose registers. */
	59	struct regset *gregset;
	60	int *gregset_reg_offset;
	61	int gregset_num_regs;
	62	size_t sizeof_gregset;
	63
	64	/* Floating-point registers. */
	65	struct regset *fpregset;
	66	size_t sizeof_fpregset;
	67
c131fcee L	68	/* XSAVE extended state. */
	69	struct regset *xstateregset;
	70
5716833c MK	71	/* Register number for %st(0). The register numbers for the other
	72	registers follow from this one. Set this to -1 to indicate the
	73	absence of an FPU. */
	74	int st0_regnum;
	75
1ba53b71 L	76	/* Number of MMX registers. */
	77	int num_mmx_regs;
	78
5716833c MK	79	/* Register number for %mm0. Set this to -1 to indicate the absence
	80	of MMX support. */
	81	int mm0_regnum;
	82
c131fcee L	83	/* Number of pseudo YMM registers. */
	84	int num_ymm_regs;
	85
	86	/* Register number for %ymm0. Set this to -1 to indicate the absence
	87	of pseudo YMM register support. */
	88	int ymm0_regnum;
	89
1ba53b71 L	90	/* Number of byte registers. */
	91	int num_byte_regs;
	92
	93	/* Register pseudo number for %al. */
	94	int al_regnum;
	95
	96	/* Number of pseudo word registers. */
	97	int num_word_regs;
	98
	99	/* Register number for %ax. */
	100	int ax_regnum;
	101
	102	/* Number of pseudo dword registers. */
	103	int num_dword_regs;
	104
	105	/* Register number for %eax. Set this to -1 to indicate the absence
	106	of pseudo dword register support. */
	107	int eax_regnum;
	108
90884b2b L	109	/* Number of core registers. */
	110	int num_core_regs;
	111
96297dab MK	112	/* Number of SSE registers. */
96297dab MK	113	int num_xmm_regs;
8201327c	114
c131fcee	115	/* Bits of the extended control register 0 (the XFEATURE_ENABLED_MASK
1777feb0 MS	116	register), excluding the x87 bit, which are supported by this GDB. */
1777feb0 MS	117
c131fcee L	118	uint64_t xcr0;
	119
	120	/* Offset of XCR0 in XSAVE extended state. */
	121	int xsave_xcr0_offset;
	122
90884b2b L	123	/* Register names. */
	124	const char **register_names;
	125
c131fcee L	126	/* Register number for %ymm0h. Set this to -1 to indicate the absence
	127	of upper YMM register support. */
	128	int ymm0h_regnum;
	129
	130	/* Upper YMM register names. Only used for tdesc_numbered_register. */
	131	const char **ymmh_register_names;
	132
90884b2b L	133	/* Target description. */
	134	const struct target_desc *tdesc;
	135
	136	/* Register group function. */
	137	const void *register_reggroup_p;
	138
8201327c MK	139	/* Offset of saved PC in jmp_buf. */
	140	int jb_pc_offset;
	141
	142	/* Convention for returning structures. */
	143	enum struct_return struct_return;
	144
8201327c MK	145	/* Address range where sigtramp lives. */
	146	CORE_ADDR sigtramp_start;
	147	CORE_ADDR sigtramp_end;
	148
911bc6ee MK	149	/* Detect sigtramp. */
	150	int (sigtramp_p) (struct frame_info );
	151
21d0e8a4 MK	152	/* Get address of sigcontext for sigtramp. */
	153	CORE_ADDR (sigcontext_addr) (struct frame_info );
	154
a3386186 MK	155	/* Offset of registers in `struct sigcontext'. */
	156	int *sc_reg_offset;
	157	int sc_num_regs;
	158
	159	/* Offset of saved PC and SP in `struct sigcontext'. Usage of these
	160	is deprecated, please use `sc_reg_offset' instead. */
8201327c	161	int sc_pc_offset;
21d0e8a4	162	int sc_sp_offset;
794ac428 UW	163
	164	/* ISA-specific data types. */
	165	struct type *i386_mmx_type;
c131fcee	166	struct type *i386_ymm_type;
27067745	167	struct type *i387_ext_type;
7ad10968 HZ	168
7ad10968 HZ	169	/* Process record/replay target. */
cf648174 HZ	170	/* The map for registers because the AMD64's registers order
	171	in GDB is not same as I386 instructions. */
	172	const int *record_regmap;
7ad10968 HZ	173	/* Parse intx80 args. */
	174	int (i386_intx80_record) (struct regcache regcache);
	175	/* Parse sysenter args. */
	176	int (i386_sysenter_record) (struct regcache regcache);
cf648174 HZ	177	/* Parse syscall args. */
cf648174 HZ	178	int (i386_syscall_record) (struct regcache regcache);
96297dab MK	179	};
	180
	181	/* Floating-point registers. */
	182
96297dab MK	183	/* All FPU control regusters (except for FIOFF and FOOFF) are 16-bit
	184	(at most) in the FPU, but are zero-extended to 32 bits in GDB's
	185	register cache. */
	186
23a34459 AC	187	/* Return non-zero if REGNUM matches the FP register and the FP
23a34459 AC	188	register set is active. */
20a6ec49 MD	189	extern int i386_fp_regnum_p (struct gdbarch *, int);
20a6ec49 MD	190	extern int i386_fpc_regnum_p (struct gdbarch *, int);
96297dab	191
a3386186 MK	192	/* Register numbers of various important registers. */
a3386186 MK	193
bcf48cc7 MK	194	enum i386_regnum
	195	{
	196	I386_EAX_REGNUM, /* %eax */
	197	I386_ECX_REGNUM, /* %ecx */
	198	I386_EDX_REGNUM, /* %edx */
	199	I386_EBX_REGNUM, /* %ebx */
	200	I386_ESP_REGNUM, /* %esp */
	201	I386_EBP_REGNUM, /* %ebp */
	202	I386_ESI_REGNUM, /* %esi */
	203	I386_EDI_REGNUM, /* %edi */
	204	I386_EIP_REGNUM, /* %eip */
	205	I386_EFLAGS_REGNUM, /* %eflags */
2666fb59 MK	206	I386_CS_REGNUM, /* %cs */
2666fb59 MK	207	I386_SS_REGNUM, /* %ss */
e9ff708b AC	208	I386_DS_REGNUM, /* %ds */
	209	I386_ES_REGNUM, /* %es */
	210	I386_FS_REGNUM, /* %fs */
	211	I386_GS_REGNUM, /* %gs */
90884b2b	212	I386_ST0_REGNUM, /* %st(0) */
c131fcee L	213	I386_MXCSR_REGNUM = 40, /* %mxcsr */
	214	I386_YMM0H_REGNUM, /* %ymm0h */
	215	I386_YMM7H_REGNUM = I386_YMM0H_REGNUM + 7
bcf48cc7	216	};
a3386186	217
cf648174 HZ	218	/* Register numbers of RECORD_REGMAP. */
	219
	220	enum record_i386_regnum
	221	{
	222	X86_RECORD_REAX_REGNUM,
	223	X86_RECORD_RECX_REGNUM,
	224	X86_RECORD_REDX_REGNUM,
	225	X86_RECORD_REBX_REGNUM,
	226	X86_RECORD_RESP_REGNUM,
	227	X86_RECORD_REBP_REGNUM,
	228	X86_RECORD_RESI_REGNUM,
	229	X86_RECORD_REDI_REGNUM,
	230	X86_RECORD_R8_REGNUM,
	231	X86_RECORD_R9_REGNUM,
	232	X86_RECORD_R10_REGNUM,
	233	X86_RECORD_R11_REGNUM,
	234	X86_RECORD_R12_REGNUM,
	235	X86_RECORD_R13_REGNUM,
	236	X86_RECORD_R14_REGNUM,
	237	X86_RECORD_R15_REGNUM,
	238	X86_RECORD_REIP_REGNUM,
	239	X86_RECORD_EFLAGS_REGNUM,
	240	X86_RECORD_CS_REGNUM,
	241	X86_RECORD_SS_REGNUM,
	242	X86_RECORD_DS_REGNUM,
	243	X86_RECORD_ES_REGNUM,
	244	X86_RECORD_FS_REGNUM,
	245	X86_RECORD_GS_REGNUM,
	246	};
	247
8201327c	248	#define I386_NUM_GREGS 16
8201327c MK	249	#define I386_NUM_XREGS 9
8201327c MK	250
90884b2b	251	#define I386_SSE_NUM_REGS (I386_MXCSR_REGNUM + 1)
c131fcee	252	#define I386_AVX_NUM_REGS (I386_YMM7H_REGNUM + 1)
8201327c	253
00f8375e MK	254	/* Size of the largest register. */
	255	#define I386_MAX_REGISTER_SIZE 16
	256
5ae96ec1	257	/* Types for i386-specific registers. */
27067745	258	extern struct type i387_ext_type (struct gdbarch gdbarch);
794ac428	259
1ba53b71 L	260	/* Checks of different pseudo-registers. */
	261	extern int i386_byte_regnum_p (struct gdbarch *gdbarch, int regnum);
	262	extern int i386_word_regnum_p (struct gdbarch *gdbarch, int regnum);
	263	extern int i386_dword_regnum_p (struct gdbarch *gdbarch, int regnum);
c131fcee L	264	extern int i386_xmm_regnum_p (struct gdbarch *gdbarch, int regnum);
c131fcee L	265	extern int i386_ymm_regnum_p (struct gdbarch *gdbarch, int regnum);
1ba53b71 L	266
	267	extern const char i386_pseudo_register_name (struct gdbarch gdbarch,
	268	int regnum);
fff4548b MK	269	extern struct type i386_pseudo_register_type (struct gdbarch gdbarch,
fff4548b MK	270	int regnum);
1ba53b71	271
3543a589 TT	272	extern void i386_pseudo_register_read_into_value (struct gdbarch *gdbarch,
	273	struct regcache *regcache,
	274	int regnum,
	275	struct value *result);
	276
1ba53b71 L	277	extern void i386_pseudo_register_write (struct gdbarch *gdbarch,
	278	struct regcache *regcache,
	279	int regnum, const gdb_byte *buf);
	280
508fbfea MK	281	/* Segment selectors. */
508fbfea MK	282	#define I386_SEL_RPL 0x0003 /* Requester's Privilege Level mask. */
1777feb0 MS	283	#define I386_SEL_UPL 0x0003 /* User Privilige Level. */
1777feb0 MS	284	#define I386_SEL_KPL 0x0000 /* Kernel Privilige Level. */
508fbfea	285
237fc4c9 PA	286	/* The length of the longest i386 instruction (according to
	287	include/asm-i386/kprobes.h in Linux 2.6. */
	288	#define I386_MAX_INSN_LEN (16)
	289
1cce71eb	290	/* Functions exported from i386-tdep.c. */
e17a4113 UW	291	extern CORE_ADDR i386_pe_skip_trampoline_code (struct frame_info *frame,
e17a4113 UW	292	CORE_ADDR pc, char *name);
1777feb0 MS	293	extern CORE_ADDR i386_skip_main_prologue (struct gdbarch *gdbarch,
1777feb0 MS	294	CORE_ADDR pc);
1cce71eb	295
4bd207ef TG	296	/* Return whether the THIS_FRAME corresponds to a sigtramp routine. */
	297	extern int i386_sigtramp_p (struct frame_info *this_frame);
	298
38c968cf AC	299	/* Return non-zero if REGNUM is a member of the specified group. */
	300	extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
	301	struct reggroup *group);
	302
20187ed5 MK	303	/* Supply register REGNUM from the general-purpose register set REGSET
	304	to register cache REGCACHE. If REGNUM is -1, do this for all
	305	registers in REGSET. */
	306	extern void i386_supply_gregset (const struct regset *regset,
	307	struct regcache *regcache, int regnum,
	308	const void *gregs, size_t len);
3d171c85 MK	309
	310	/* Collect register REGNUM from the register cache REGCACHE and store
	311	it in the buffer specified by GREGS and LEN as described by the
	312	general-purpose register set REGSET. If REGNUM is -1, do this for
	313	all registers in REGSET. */
	314	extern void i386_collect_gregset (const struct regset *regset,
	315	const struct regcache *regcache,
	316	int regnum, void *gregs, size_t len);
20187ed5	317
8446b36a MK	318	/* Return the appropriate register set for the core section identified
	319	by SECT_NAME and SECT_SIZE. */
	320	extern const struct regset *
	321	i386_regset_from_core_section (struct gdbarch *gdbarch,
	322	const char *sect_name, size_t sect_size);
	323
237fc4c9	324
b55078be DE	325	extern struct displaced_step_closure *i386_displaced_step_copy_insn
	326	(struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to,
	327	struct regcache *regs);
237fc4c9 PA	328	extern void i386_displaced_step_fixup (struct gdbarch *gdbarch,
	329	struct displaced_step_closure *closure,
	330	CORE_ADDR from, CORE_ADDR to,
	331	struct regcache *regs);
	332
8201327c MK	333	/* Initialize a basic ELF architecture variant. */
	334	extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *);
	335
	336	/* Initialize a SVR4 architecture variant. */
	337	extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);
a6b808b4 HZ	338
	339	extern int i386_process_record (struct gdbarch *gdbarch,
	340	struct regcache *regcache, CORE_ADDR addr);
55aa24fb	341
de0b6abb	342	\f
8201327c	343
de0b6abb	344	/* Functions and variables exported from i386bsd-tdep.c. */
8201327c	345
3cac699e	346	extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
5d93ae8c MK	347	extern CORE_ADDR i386fbsd_sigtramp_start_addr;
	348	extern CORE_ADDR i386fbsd_sigtramp_end_addr;
	349	extern CORE_ADDR i386obsd_sigtramp_start_addr;
	350	extern CORE_ADDR i386obsd_sigtramp_end_addr;
de0b6abb MK	351	extern int i386fbsd4_sc_reg_offset[];
	352	extern int i386fbsd_sc_reg_offset[];
	353	extern int i386nbsd_sc_reg_offset[];
	354	extern int i386obsd_sc_reg_offset[];
	355	extern int i386bsd_sc_reg_offset[];
3ce1502b	356
55aa24fb SDJ	357	/* SystemTap related functions. */
	358
	359	extern int i386_stap_is_single_operand (struct gdbarch *gdbarch,
	360	const char *s);
	361
	362	extern int i386_stap_parse_special_token (struct gdbarch *gdbarch,
	363	struct stap_parse_info *p);
	364
96297dab	365	#endif /* i386-tdep.h */