[thirdparty/binutils-gdb.git] / gdb / i386nbsd-tdep.c

/* Target-dependent code for NetBSD/i386, for GDB.
   Copyright 1988, 1989, 1991, 1992, 1994, 1996, 2000, 2001, 2002
   Free Software Foundation, Inc.

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 59 Temple Place - Suite 330,
   Boston, MA 02111-1307, USA.  */

#include "defs.h"
#include "gdbtypes.h"
#include "gdbcore.h"
#include "regcache.h"
#include "arch-utils.h"

#include "i386-tdep.h"
#include "i387-tdep.h"
#include "nbsd-tdep.h"

/* Map a GDB register number to an offset in the reg structure.  */
static int regmap[] =
{
  ( 0 * 4),		/* %eax */
  ( 1 * 4),		/* %ecx */
  ( 2 * 4),		/* %edx */
  ( 3 * 4),		/* %ebx */
  ( 4 * 4),		/* %esp */
  ( 5 * 4),		/* %epb */
  ( 6 * 4),		/* %esi */
  ( 7 * 4),		/* %edi */
  ( 8 * 4),		/* %eip */
  ( 9 * 4),		/* %eflags */
  (10 * 4),		/* %cs */
  (11 * 4),		/* %ss */
  (12 * 4),		/* %ds */
  (13 * 4),		/* %es */
  (14 * 4),		/* %fs */
  (15 * 4),		/* %gs */
};

#define SIZEOF_STRUCT_REG	(16 * 4)

static void
i386nbsd_supply_reg (char *regs, int regno)
{
  int i;

  for (i = 0; i <= 15; i++)
    if (regno == i || regno == -1)
      supply_register (i, regs + regmap[i]);
}

static void
fetch_core_registers (char *core_reg_sect, unsigned core_reg_size, int which,
                      CORE_ADDR ignore)
{
  char *regs, *fsave;

  /* We get everything from one section.  */
  if (which != 0)
    return;

  if (core_reg_size < (SIZEOF_STRUCT_REG + 108))
    {
      warning ("Wrong size register set in core file.");
      return;
    }

  regs = core_reg_sect;
  fsave = core_reg_sect + SIZEOF_STRUCT_REG;

  /* Integer registers.  */
  i386nbsd_supply_reg (regs, -1);

  /* Floating point registers.  */
  i387_supply_fsave (fsave);
}

static void
fetch_elfcore_registers (char *core_reg_sect, unsigned core_reg_size,
			 int which, CORE_ADDR ignore)
{
  switch (which)
    {
    case 0:  /* Integer registers.  */
      if (core_reg_size != SIZEOF_STRUCT_REG)
	warning ("Wrong size register set in core file.");
      else
	i386nbsd_supply_reg (core_reg_sect, -1);
      break;

    case 2:  /* Floating point registers.  */
      if (core_reg_size != 108)
	warning ("Wrong size FP register set in core file."); 
      else
	i387_supply_fsave (core_reg_sect);  
      break;

    case 3:  /* "Extended" floating point registers.  This is gdb-speak
		for SSE/SSE2. */
      if (core_reg_size != 512)
	warning ("Wrong size XMM register set in core file.");
      else
	i387_supply_fxsave (core_reg_sect);
      break;

    default:
      /* Don't know what kind of register request this is; just ignore it.  */
      break;
    }
}

static struct core_fns i386nbsd_core_fns =
{
  bfd_target_unknown_flavour,		/* core_flavour */
  default_check_format,			/* check_format */
  default_core_sniffer,			/* core_sniffer */
  fetch_core_registers,			/* core_read_registers */
  NULL					/* next */
};

static struct core_fns i386nbsd_elfcore_fns =
{
  bfd_target_elf_flavour,		/* core_flavour */
  default_check_format,			/* check_format */
  default_core_sniffer,			/* core_sniffer */
  fetch_elfcore_registers,		/* core_read_registers */
  NULL					/* next */
};

/* Under NetBSD/i386, signal handler invocations can be identified by the
   designated code sequence that is used to return from a signal handler.
   In particular, the return address of a signal handler points to the
   following code sequence:

	leal	0x10(%esp), %eax
	pushl	%eax
	pushl	%eax
	movl	$0x127, %eax		# __sigreturn14
	int	$0x80

   Each instruction has a unique encoding, so we simply attempt to match
   the instruction the PC is pointing to with any of the above instructions.
   If there is a hit, we know the offset to the start of the designated
   sequence and can then check whether we really are executing in the
   signal trampoline.  If not, -1 is returned, otherwise the offset from the
   start of the return sequence is returned.  */
#define RETCODE_INSN1		0x8d
#define RETCODE_INSN2		0x50
#define RETCODE_INSN3		0x50
#define RETCODE_INSN4		0xb8
#define RETCODE_INSN5		0xcd

#define RETCODE_INSN2_OFF	4
#define RETCODE_INSN3_OFF	5
#define RETCODE_INSN4_OFF	6
#define RETCODE_INSN5_OFF	11

static const unsigned char sigtramp_retcode[] =
{
  RETCODE_INSN1, 0x44, 0x24, 0x10,
  RETCODE_INSN2,
  RETCODE_INSN3,
  RETCODE_INSN4, 0x27, 0x01, 0x00, 0x00,
  RETCODE_INSN5, 0x80,
};

static LONGEST
i386nbsd_sigtramp_offset (CORE_ADDR pc)
{
  unsigned char ret[sizeof(sigtramp_retcode)], insn;
  LONGEST off;
  int i;

  if (read_memory_nobpt (pc, &insn, 1) != 0)
    return -1;

  switch (insn)
    {
    case RETCODE_INSN1:
      off = 0;
      break;

    case RETCODE_INSN2:
      /* INSN2 and INSN3 are the same.  Read at the location of PC+1
	 to determine if we're actually looking at INSN2 or INSN3.  */
      if (read_memory_nobpt (pc + 1, &insn, 1) != 0)
	return -1;

      if (insn == RETCODE_INSN3)
	off = RETCODE_INSN2_OFF;
      else
	off = RETCODE_INSN3_OFF;
      break;

    case RETCODE_INSN4:
      off = RETCODE_INSN4_OFF;
      break;

    case RETCODE_INSN5:
      off = RETCODE_INSN5_OFF;
      break;

    default:
      return -1;
    }

  pc -= off;

  if (read_memory_nobpt (pc, (char *) ret, sizeof (ret)) != 0)
    return -1;

  if (memcmp (ret, sigtramp_retcode, sizeof (ret)) == 0)
    return off;

  return -1;
}

static int
i386nbsd_pc_in_sigtramp (CORE_ADDR pc, char *name)
{

  return (nbsd_pc_in_sigtramp (pc, name)
	  || i386nbsd_sigtramp_offset (pc) >= 0);
}

/* From <machine/signal.h>.  */
int i386nbsd_sc_pc_offset = 44;
int i386nbsd_sc_sp_offset = 56;

static void 
i386nbsd_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
{
  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);

  /* Obviously NetBSD is BSD-based.  */
  i386bsd_init_abi (info, gdbarch);

  /* NetBSD has different signal trampoline conventions.  */
  set_gdbarch_pc_in_sigtramp (gdbarch, i386nbsd_pc_in_sigtramp);

  /* NetBSD uses -freg-struct-return by default.  */
  tdep->struct_return = reg_struct_return;

  /* NetBSD has a `struct sigcontext' that's different from the
     origional 4.3 BSD.  */
  tdep->sc_pc_offset = i386nbsd_sc_pc_offset;
  tdep->sc_sp_offset = i386nbsd_sc_sp_offset;
}

/* NetBSD ELF.  */
static void
i386nbsdelf_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
{
  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);

  /* It's still NetBSD.  */
  i386nbsd_init_abi (info, gdbarch);

  /* But ELF-based.  */
  i386_elf_init_abi (info, gdbarch);

  /* NetBSD ELF uses SVR4-style shared libraries.  */
  set_gdbarch_in_solib_call_trampoline (gdbarch,
                                        generic_in_solib_call_trampoline);

  /* NetBSD ELF uses -fpcc-struct-return by default.  */
  tdep->struct_return = pcc_struct_return;

  /* We support the SSE registers on NetBSD ELF.  */
  tdep->num_xmm_regs = I386_NUM_XREGS - 1;
  set_gdbarch_num_regs (gdbarch, I386_NUM_GREGS + I386_NUM_FREGS
                        + I386_NUM_XREGS);
}

void
_initialize_i386nbsd_tdep (void)
{
  add_core_fns (&i386nbsd_core_fns);
  add_core_fns (&i386nbsd_elfcore_fns);

  gdbarch_register_osabi (bfd_arch_i386, GDB_OSABI_NETBSD_AOUT,
			  i386nbsd_init_abi);
  gdbarch_register_osabi (bfd_arch_i386, GDB_OSABI_NETBSD_ELF,
			  i386nbsdelf_init_abi);
}
Commit	Line	Data
0fc93e6b	1	/* Target-dependent code for NetBSD/i386, for GDB.
dfe6eb1f	2	Copyright 1988, 1989, 1991, 1992, 1994, 1996, 2000, 2001, 2002
0fc93e6b C	3	Free Software Foundation, Inc.
	4
	5	This file is part of GDB.
	6
	7	This program is free software; you can redistribute it and/or modify
	8	it under the terms of the GNU General Public License as published by
	9	the Free Software Foundation; either version 2 of the License, or
	10	(at your option) any later version.
	11
	12	This program is distributed in the hope that it will be useful,
	13	but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	GNU General Public License for more details.
	16
	17	You should have received a copy of the GNU General Public License
	18	along with this program; if not, write to the Free Software
	19	Foundation, Inc., 59 Temple Place - Suite 330,
	20	Boston, MA 02111-1307, USA. */
	21
	22	#include "defs.h"
	23	#include "gdbtypes.h"
dfe6eb1f JT	24	#include "gdbcore.h"
dfe6eb1f JT	25	#include "regcache.h"
3cac699e	26	#include "arch-utils.h"
0fc93e6b	27
3cac699e	28	#include "i386-tdep.h"
dfe6eb1f	29	#include "i387-tdep.h"
3cac699e	30	#include "nbsd-tdep.h"
dfe6eb1f JT	31
	32	/* Map a GDB register number to an offset in the reg structure. */
	33	static int regmap[] =
	34	{
	35	( 0 * 4), /* %eax */
	36	( 1 * 4), /* %ecx */
	37	( 2 * 4), /* %edx */
	38	( 3 * 4), /* %ebx */
	39	( 4 * 4), /* %esp */
	40	( 5 * 4), /* %epb */
	41	( 6 * 4), /* %esi */
	42	( 7 * 4), /* %edi */
	43	( 8 * 4), /* %eip */
	44	( 9 * 4), /* %eflags */
	45	(10 * 4), /* %cs */
	46	(11 * 4), /* %ss */
	47	(12 * 4), /* %ds */
	48	(13 * 4), /* %es */
	49	(14 * 4), /* %fs */
	50	(15 * 4), /* %gs */
	51	};
	52
	53	#define SIZEOF_STRUCT_REG (16 * 4)
	54
	55	static void
	56	i386nbsd_supply_reg (char *regs, int regno)
	57	{
	58	int i;
	59
	60	for (i = 0; i <= 15; i++)
	61	if (regno == i \|\| regno == -1)
	62	supply_register (i, regs + regmap[i]);
	63	}
	64
	65	static void
	66	fetch_core_registers (char *core_reg_sect, unsigned core_reg_size, int which,
	67	CORE_ADDR ignore)
	68	{
	69	char regs, fsave;
	70
	71	/* We get everything from one section. */
	72	if (which != 0)
	73	return;
	74
	75	if (core_reg_size < (SIZEOF_STRUCT_REG + 108))
	76	{
	77	warning ("Wrong size register set in core file.");
	78	return;
	79	}
	80
	81	regs = core_reg_sect;
	82	fsave = core_reg_sect + SIZEOF_STRUCT_REG;
	83
	84	/* Integer registers. */
	85	i386nbsd_supply_reg (regs, -1);
	86
	87	/* Floating point registers. */
	88	i387_supply_fsave (fsave);
	89	}
	90
	91	static void
6f558d74 MK	92	fetch_elfcore_registers (char *core_reg_sect, unsigned core_reg_size,
6f558d74 MK	93	int which, CORE_ADDR ignore)
dfe6eb1f JT	94	{
	95	switch (which)
	96	{
	97	case 0: /* Integer registers. */
	98	if (core_reg_size != SIZEOF_STRUCT_REG)
	99	warning ("Wrong size register set in core file.");
	100	else
	101	i386nbsd_supply_reg (core_reg_sect, -1);
	102	break;
	103
	104	case 2: /* Floating point registers. */
	105	if (core_reg_size != 108)
	106	warning ("Wrong size FP register set in core file.");
	107	else
	108	i387_supply_fsave (core_reg_sect);
	109	break;
	110
	111	case 3: /* "Extended" floating point registers. This is gdb-speak
	112	for SSE/SSE2. */
	113	if (core_reg_size != 512)
	114	warning ("Wrong size XMM register set in core file.");
	115	else
	116	i387_supply_fxsave (core_reg_sect);
	117	break;
	118
	119	default:
	120	/* Don't know what kind of register request this is; just ignore it. */
	121	break;
	122	}
	123	}
	124
	125	static struct core_fns i386nbsd_core_fns =
	126	{
	127	bfd_target_unknown_flavour, /* core_flavour */
	128	default_check_format, /* check_format */
	129	default_core_sniffer, /* core_sniffer */
	130	fetch_core_registers, /* core_read_registers */
	131	NULL /* next */
	132	};
	133
	134	static struct core_fns i386nbsd_elfcore_fns =
	135	{
	136	bfd_target_elf_flavour, /* core_flavour */
	137	default_check_format, /* check_format */
	138	default_core_sniffer, /* core_sniffer */
	139	fetch_elfcore_registers, /* core_read_registers */
	140	NULL /* next */
	141	};
	142
d66198e1 JT	143	/* Under NetBSD/i386, signal handler invocations can be identified by the
	144	designated code sequence that is used to return from a signal handler.
	145	In particular, the return address of a signal handler points to the
	146	following code sequence:
	147
	148	leal 0x10(%esp), %eax
	149	pushl %eax
	150	pushl %eax
	151	movl $0x127, %eax # __sigreturn14
	152	int $0x80
	153
	154	Each instruction has a unique encoding, so we simply attempt to match
	155	the instruction the PC is pointing to with any of the above instructions.
	156	If there is a hit, we know the offset to the start of the designated
	157	sequence and can then check whether we really are executing in the
	158	signal trampoline. If not, -1 is returned, otherwise the offset from the
	159	start of the return sequence is returned. */
	160	#define RETCODE_INSN1 0x8d
	161	#define RETCODE_INSN2 0x50
	162	#define RETCODE_INSN3 0x50
	163	#define RETCODE_INSN4 0xb8
	164	#define RETCODE_INSN5 0xcd
	165
	166	#define RETCODE_INSN2_OFF 4
	167	#define RETCODE_INSN3_OFF 5
	168	#define RETCODE_INSN4_OFF 6
	169	#define RETCODE_INSN5_OFF 11
	170
	171	static const unsigned char sigtramp_retcode[] =
3cac699e	172	{
d66198e1 JT	173	RETCODE_INSN1, 0x44, 0x24, 0x10,
	174	RETCODE_INSN2,
	175	RETCODE_INSN3,
	176	RETCODE_INSN4, 0x27, 0x01, 0x00, 0x00,
	177	RETCODE_INSN5, 0x80,
	178	};
	179
	180	static LONGEST
	181	i386nbsd_sigtramp_offset (CORE_ADDR pc)
	182	{
	183	unsigned char ret[sizeof(sigtramp_retcode)], insn;
	184	LONGEST off;
	185	int i;
	186
	187	if (read_memory_nobpt (pc, &insn, 1) != 0)
	188	return -1;
	189
	190	switch (insn)
	191	{
	192	case RETCODE_INSN1:
	193	off = 0;
	194	break;
	195
	196	case RETCODE_INSN2:
	197	/* INSN2 and INSN3 are the same. Read at the location of PC+1
	198	to determine if we're actually looking at INSN2 or INSN3. */
	199	if (read_memory_nobpt (pc + 1, &insn, 1) != 0)
	200	return -1;
	201
	202	if (insn == RETCODE_INSN3)
	203	off = RETCODE_INSN2_OFF;
	204	else
	205	off = RETCODE_INSN3_OFF;
	206	break;
3cac699e	207
d66198e1 JT	208	case RETCODE_INSN4:
	209	off = RETCODE_INSN4_OFF;
	210	break;
	211
	212	case RETCODE_INSN5:
	213	off = RETCODE_INSN5_OFF;
	214	break;
	215
	216	default:
	217	return -1;
	218	}
	219
	220	pc -= off;
3cac699e	221
d66198e1 JT	222	if (read_memory_nobpt (pc, (char *) ret, sizeof (ret)) != 0)
d66198e1 JT	223	return -1;
3cac699e	224
d66198e1 JT	225	if (memcmp (ret, sigtramp_retcode, sizeof (ret)) == 0)
	226	return off;
	227
	228	return -1;
3cac699e JT	229	}
3cac699e JT	230
d66198e1 JT	231	static int
	232	i386nbsd_pc_in_sigtramp (CORE_ADDR pc, char *name)
	233	{
	234
	235	return (nbsd_pc_in_sigtramp (pc, name)
	236	\|\| i386nbsd_sigtramp_offset (pc) >= 0);
	237	}
3cac699e JT	238
	239	/* From <machine/signal.h>. */
	240	int i386nbsd_sc_pc_offset = 44;
	241	int i386nbsd_sc_sp_offset = 56;
	242
	243	static void
	244	i386nbsd_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
	245	{
	246	struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
	247
	248	/* Obviously NetBSD is BSD-based. */
	249	i386bsd_init_abi (info, gdbarch);
	250
	251	/* NetBSD has different signal trampoline conventions. */
	252	set_gdbarch_pc_in_sigtramp (gdbarch, i386nbsd_pc_in_sigtramp);
	253
	254	/* NetBSD uses -freg-struct-return by default. */
	255	tdep->struct_return = reg_struct_return;
	256
3cac699e JT	257	/* NetBSD has a `struct sigcontext' that's different from the
	258	origional 4.3 BSD. */
	259	tdep->sc_pc_offset = i386nbsd_sc_pc_offset;
	260	tdep->sc_sp_offset = i386nbsd_sc_sp_offset;
	261	}
	262
	263	/* NetBSD ELF. */
	264	static void
	265	i386nbsdelf_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
	266	{
	267	struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
	268
	269	/* It's still NetBSD. */
	270	i386nbsd_init_abi (info, gdbarch);
	271
	272	/* But ELF-based. */
	273	i386_elf_init_abi (info, gdbarch);
	274
	275	/* NetBSD ELF uses SVR4-style shared libraries. */
	276	set_gdbarch_in_solib_call_trampoline (gdbarch,
	277	generic_in_solib_call_trampoline);
	278
	279	/* NetBSD ELF uses -fpcc-struct-return by default. */
	280	tdep->struct_return = pcc_struct_return;
	281
	282	/* We support the SSE registers on NetBSD ELF. */
	283	tdep->num_xmm_regs = I386_NUM_XREGS - 1;
	284	set_gdbarch_num_regs (gdbarch, I386_NUM_GREGS + I386_NUM_FREGS
	285	+ I386_NUM_XREGS);
	286	}
	287
dfe6eb1f JT	288	void
	289	_initialize_i386nbsd_tdep (void)
	290	{
	291	add_core_fns (&i386nbsd_core_fns);
	292	add_core_fns (&i386nbsd_elfcore_fns);
3cac699e JT	293
	294	gdbarch_register_osabi (bfd_arch_i386, GDB_OSABI_NETBSD_AOUT,
	295	i386nbsd_init_abi);
	296	gdbarch_register_osabi (bfd_arch_i386, GDB_OSABI_NETBSD_ELF,
	297	i386nbsdelf_init_abi);
dfe6eb1f	298	}