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CommitLineData
c906108c 1/* Target dependent code for the Motorola 68000 series.
b6ba6518 2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1999, 2000, 2001
a1de33a8 3 Free Software Foundation, Inc.
c906108c 4
c5aa993b 5 This file is part of GDB.
c906108c 6
c5aa993b
JM
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
c906108c 11
c5aa993b
JM
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
c906108c 16
c5aa993b
JM
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
c906108c
SS
21
22#include "defs.h"
23#include "frame.h"
24#include "symtab.h"
25#include "gdbcore.h"
26#include "value.h"
27#include "gdb_string.h"
7a292a7a 28#include "inferior.h"
4e052eda 29#include "regcache.h"
5d3ed2e3 30#include "arch-utils.h"
c906108c 31\f
c5aa993b 32
89c3b6d3
PDM
33#define P_LINKL_FP 0x480e
34#define P_LINKW_FP 0x4e56
35#define P_PEA_FP 0x4856
36#define P_MOVL_SP_FP 0x2c4f
37#define P_MOVL 0x207c
38#define P_JSR 0x4eb9
39#define P_BSR 0x61ff
40#define P_LEAL 0x43fb
41#define P_MOVML 0x48ef
42#define P_FMOVM 0xf237
43#define P_TRAP 0x4e40
44
7f8e7424
GS
45void m68k_frame_init_saved_regs (struct frame_info *frame_info);
46
942dc0e9
GS
47static int
48m68k_register_bytes_ok (numbytes)
49{
50 return ((numbytes == REGISTER_BYTES_FP)
51 || (numbytes == REGISTER_BYTES_NOFP));
52}
53
5d3ed2e3
GS
54/* Number of bytes of storage in the actual machine representation
55 for register regnum. On the 68000, all regs are 4 bytes
56 except the floating point regs which are 12 bytes. */
57/* Note that the unsigned cast here forces the result of the
58 subtraction to very high positive values if regnum < FP0_REGNUM */
59
60static int
61m68k_register_raw_size (int regnum)
62{
63 return (((unsigned) (regnum) - FP0_REGNUM) < 8 ? 12 : 4);
64}
65
66/* Number of bytes of storage in the program's representation
67 for register regnum. On the 68000, all regs are 4 bytes
68 except the floating point regs which are 12-byte long doubles. */
69
70static int
71m68k_register_virtual_size (int regnum)
72{
73 return (((unsigned) (regnum) - FP0_REGNUM) < 8 ? 12 : 4);
74}
75
76/* Return the GDB type object for the "standard" data type of data
77 in register N. This should be int for D0-D7, long double for FP0-FP7,
78 and void pointer for all others (A0-A7, PC, SR, FPCONTROL etc).
79 Note, for registers which contain addresses return pointer to void,
80 not pointer to char, because we don't want to attempt to print
81 the string after printing the address. */
82
83static struct type *
84m68k_register_virtual_type (int regnum)
85{
86 if ((unsigned) regnum >= FPC_REGNUM)
87 return lookup_pointer_type (builtin_type_void);
88 else if ((unsigned) regnum >= FP0_REGNUM)
89 return builtin_type_long_double;
90 else if ((unsigned) regnum >= A0_REGNUM)
91 return lookup_pointer_type (builtin_type_void);
92 else
93 return builtin_type_int;
94}
95
96/* Function: m68k_register_name
97 Returns the name of the standard m68k register regnum. */
98
99static const char *
100m68k_register_name (int regnum)
101{
102 static char *register_names[] = {
103 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
104 "a0", "a1", "a2", "a3", "a4", "a5", "fp", "sp",
105 "ps", "pc",
106 "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7",
107 "fpcontrol", "fpstatus", "fpiaddr", "fpcode", "fpflags"
108 };
109
110 if (regnum < 0 ||
111 regnum >= sizeof (register_names) / sizeof (register_names[0]))
112 internal_error (__FILE__, __LINE__,
113 "m68k_register_name: illegal register number %d", regnum);
114 else
115 return register_names[regnum];
116}
117
118/* Stack must be kept short aligned when doing function calls. */
119
120static CORE_ADDR
121m68k_stack_align (CORE_ADDR addr)
122{
123 return ((addr + 1) & ~1);
124}
125
126/* Index within `registers' of the first byte of the space for
127 register regnum. */
128
129static int
130m68k_register_byte (int regnum)
131{
132 if (regnum >= FPC_REGNUM)
133 return (((regnum - FPC_REGNUM) * 4) + 168);
134 else if (regnum >= FP0_REGNUM)
135 return (((regnum - FP0_REGNUM) * 12) + 72);
136 else
137 return (regnum * 4);
138}
139
942dc0e9
GS
140/* Store the address of the place in which to copy the structure the
141 subroutine will return. This is called from call_function. */
142
143static void
144m68k_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
145{
146 write_register (A1_REGNUM, addr);
147}
148
149/* Extract from an array regbuf containing the (raw) register state
150 a function return value of type type, and copy that, in virtual format,
151 into valbuf. This is assuming that floating point values are returned
152 as doubles in d0/d1. */
153
154static void
155m68k_deprecated_extract_return_value (struct type *type, char *regbuf,
156 char *valbuf)
157{
158 int offset = 0;
159 int typeLength = TYPE_LENGTH (type);
160
161 if (typeLength < 4)
162 offset = 4 - typeLength;
163
164 memcpy (valbuf, regbuf + offset, typeLength);
165}
166
167static CORE_ADDR
168m68k_deprecated_extract_struct_value_address (char *regbuf)
169{
170 return (*(CORE_ADDR *) (regbuf));
171}
172
173/* Write into appropriate registers a function return value
174 of type TYPE, given in virtual format. Assumes floats are passed
175 in d0/d1. */
176
177static void
178m68k_store_return_value (struct type *type, char *valbuf)
179{
180 write_register_bytes (0, valbuf, TYPE_LENGTH (type));
181}
182
183/* Describe the pointer in each stack frame to the previous stack frame
184 (its caller). */
185
186/* FRAME_CHAIN takes a frame's nominal address and produces the frame's
187 chain-pointer.
188 In the case of the 68000, the frame's nominal address
189 is the address of a 4-byte word containing the calling frame's address. */
190
191/* If we are chaining from sigtramp, then manufacture a sigtramp frame
192 (which isn't really on the stack. I'm not sure this is right for anything
193 but BSD4.3 on an hp300. */
194
195static CORE_ADDR
196m68k_frame_chain (struct frame_info *thisframe)
197{
198 if (thisframe->signal_handler_caller)
199 return thisframe->frame;
200 else if (!inside_entry_file ((thisframe)->pc))
201 return read_memory_integer ((thisframe)->frame, 4);
202 else
203 return 0;
204}
205
206/* A function that tells us whether the function invocation represented
207 by fi does not have a frame on the stack associated with it. If it
208 does not, FRAMELESS is set to 1, else 0. */
209
210static int
211m68k_frameless_function_invocation (struct frame_info *fi)
212{
213 if (fi->signal_handler_caller)
214 return 0;
215 else
216 return frameless_look_for_prologue (fi);
217}
218
219static CORE_ADDR
220m68k_frame_saved_pc (struct frame_info *frame)
221{
222 if (frame->signal_handler_caller)
223 {
224 if (frame->next)
225 return read_memory_integer (frame->next->frame + SIG_PC_FP_OFFSET, 4);
226 else
227 return read_memory_integer (read_register (SP_REGNUM)
228 + SIG_PC_FP_OFFSET - 8, 4);
229 }
230 else
231 return read_memory_integer (frame->frame + 4, 4);
232}
233
234
b83266a0
SS
235/* The only reason this is here is the tm-altos.h reference below. It
236 was moved back here from tm-m68k.h. FIXME? */
237
238extern CORE_ADDR
fba45db2 239altos_skip_prologue (CORE_ADDR pc)
b83266a0
SS
240{
241 register int op = read_memory_integer (pc, 2);
89c3b6d3 242 if (op == P_LINKW_FP)
c5aa993b 243 pc += 4; /* Skip link #word */
89c3b6d3 244 else if (op == P_LINKL_FP)
c5aa993b 245 pc += 6; /* Skip link #long */
b83266a0 246 /* Not sure why branches are here. */
514e603d 247 /* From tm-altos.h */
b83266a0 248 else if (op == 0060000)
c5aa993b 249 pc += 4; /* Skip bra #word */
b83266a0 250 else if (op == 00600377)
c5aa993b 251 pc += 6; /* skip bra #long */
b83266a0 252 else if ((op & 0177400) == 0060000)
c5aa993b 253 pc += 2; /* skip bra #char */
b83266a0
SS
254 return pc;
255}
256
89c3b6d3 257int
fba45db2 258delta68_in_sigtramp (CORE_ADDR pc, char *name)
89c3b6d3 259{
1bd54964
AC
260 if (name != NULL)
261 return strcmp (name, "_sigcode") == 0;
262 else
263 return 0;
89c3b6d3
PDM
264}
265
266CORE_ADDR
fba45db2 267delta68_frame_args_address (struct frame_info *frame_info)
89c3b6d3
PDM
268{
269 /* we assume here that the only frameless functions are the system calls
270 or other functions who do not put anything on the stack. */
271 if (frame_info->signal_handler_caller)
272 return frame_info->frame + 12;
273 else if (frameless_look_for_prologue (frame_info))
274 {
b5d78d39
GS
275 /* Check for an interrupted system call */
276 if (frame_info->next && frame_info->next->signal_handler_caller)
277 return frame_info->next->frame + 16;
278 else
279 return frame_info->frame + 4;
89c3b6d3
PDM
280 }
281 else
282 return frame_info->frame;
283}
284
285CORE_ADDR
fba45db2 286delta68_frame_saved_pc (struct frame_info *frame_info)
89c3b6d3
PDM
287{
288 return read_memory_integer (delta68_frame_args_address (frame_info) + 4, 4);
289}
290
392a587b
JM
291/* Return number of args passed to a frame.
292 Can return -1, meaning no way to tell. */
293
294int
fba45db2 295isi_frame_num_args (struct frame_info *fi)
392a587b
JM
296{
297 int val;
298 CORE_ADDR pc = FRAME_SAVED_PC (fi);
299 int insn = 0177777 & read_memory_integer (pc, 2);
300 val = 0;
c5aa993b 301 if (insn == 0047757 || insn == 0157374) /* lea W(sp),sp or addaw #W,sp */
392a587b 302 val = read_memory_integer (pc + 2, 2);
c5aa993b
JM
303 else if ((insn & 0170777) == 0050217 /* addql #N, sp */
304 || (insn & 0170777) == 0050117) /* addqw */
392a587b
JM
305 {
306 val = (insn >> 9) & 7;
307 if (val == 0)
308 val = 8;
309 }
c5aa993b 310 else if (insn == 0157774) /* addal #WW, sp */
392a587b
JM
311 val = read_memory_integer (pc + 2, 4);
312 val >>= 2;
313 return val;
314}
315
316int
fba45db2 317delta68_frame_num_args (struct frame_info *fi)
392a587b
JM
318{
319 int val;
320 CORE_ADDR pc = FRAME_SAVED_PC (fi);
321 int insn = 0177777 & read_memory_integer (pc, 2);
322 val = 0;
c5aa993b 323 if (insn == 0047757 || insn == 0157374) /* lea W(sp),sp or addaw #W,sp */
392a587b 324 val = read_memory_integer (pc + 2, 2);
c5aa993b
JM
325 else if ((insn & 0170777) == 0050217 /* addql #N, sp */
326 || (insn & 0170777) == 0050117) /* addqw */
392a587b
JM
327 {
328 val = (insn >> 9) & 7;
329 if (val == 0)
330 val = 8;
331 }
c5aa993b 332 else if (insn == 0157774) /* addal #WW, sp */
392a587b
JM
333 val = read_memory_integer (pc + 2, 4);
334 val >>= 2;
335 return val;
336}
337
338int
fba45db2 339news_frame_num_args (struct frame_info *fi)
392a587b
JM
340{
341 int val;
342 CORE_ADDR pc = FRAME_SAVED_PC (fi);
343 int insn = 0177777 & read_memory_integer (pc, 2);
344 val = 0;
c5aa993b 345 if (insn == 0047757 || insn == 0157374) /* lea W(sp),sp or addaw #W,sp */
392a587b 346 val = read_memory_integer (pc + 2, 2);
c5aa993b
JM
347 else if ((insn & 0170777) == 0050217 /* addql #N, sp */
348 || (insn & 0170777) == 0050117) /* addqw */
392a587b
JM
349 {
350 val = (insn >> 9) & 7;
351 if (val == 0)
352 val = 8;
353 }
c5aa993b 354 else if (insn == 0157774) /* addal #WW, sp */
392a587b
JM
355 val = read_memory_integer (pc + 2, 4);
356 val >>= 2;
357 return val;
358}
b83266a0 359
7f8e7424
GS
360/* Insert the specified number of args and function address
361 into a call sequence of the above form stored at DUMMYNAME.
362 We use the BFD routines to store a big-endian value of known size. */
363
364void
a2c6a6d5
GS
365m68k_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun, int nargs,
366 struct value **args, struct type *type, int gcc_p)
7f8e7424 367{
a2c6a6d5
GS
368 bfd_putb32 (fun, (unsigned char *) dummy + CALL_DUMMY_START_OFFSET + 2);
369 bfd_putb32 (nargs * 4,
370 (unsigned char *) dummy + CALL_DUMMY_START_OFFSET + 8);
7f8e7424
GS
371}
372
373
c906108c
SS
374/* Push an empty stack frame, to record the current PC, etc. */
375
376void
fba45db2 377m68k_push_dummy_frame (void)
c906108c
SS
378{
379 register CORE_ADDR sp = read_register (SP_REGNUM);
380 register int regnum;
381 char raw_buffer[12];
382
383 sp = push_word (sp, read_register (PC_REGNUM));
384 sp = push_word (sp, read_register (FP_REGNUM));
385 write_register (FP_REGNUM, sp);
386
387 /* Always save the floating-point registers, whether they exist on
388 this target or not. */
389 for (regnum = FP0_REGNUM + 7; regnum >= FP0_REGNUM; regnum--)
390 {
391 read_register_bytes (REGISTER_BYTE (regnum), raw_buffer, 12);
392 sp = push_bytes (sp, raw_buffer, 12);
393 }
394
395 for (regnum = FP_REGNUM - 1; regnum >= 0; regnum--)
396 {
397 sp = push_word (sp, read_register (regnum));
398 }
399 sp = push_word (sp, read_register (PS_REGNUM));
400 write_register (SP_REGNUM, sp);
401}
402
403/* Discard from the stack the innermost frame,
404 restoring all saved registers. */
405
406void
fba45db2 407m68k_pop_frame (void)
c906108c
SS
408{
409 register struct frame_info *frame = get_current_frame ();
410 register CORE_ADDR fp;
411 register int regnum;
c906108c
SS
412 char raw_buffer[12];
413
414 fp = FRAME_FP (frame);
7f8e7424 415 m68k_frame_init_saved_regs (frame);
c5aa993b 416 for (regnum = FP0_REGNUM + 7; regnum >= FP0_REGNUM; regnum--)
c906108c 417 {
7f8e7424 418 if (frame->saved_regs[regnum])
c906108c 419 {
7f8e7424 420 read_memory (frame->saved_regs[regnum], raw_buffer, 12);
c906108c
SS
421 write_register_bytes (REGISTER_BYTE (regnum), raw_buffer, 12);
422 }
423 }
c5aa993b 424 for (regnum = FP_REGNUM - 1; regnum >= 0; regnum--)
c906108c 425 {
7f8e7424 426 if (frame->saved_regs[regnum])
c906108c 427 {
a2c6a6d5
GS
428 write_register (regnum,
429 read_memory_integer (frame->saved_regs[regnum], 4));
c906108c
SS
430 }
431 }
7f8e7424 432 if (frame->saved_regs[PS_REGNUM])
c906108c 433 {
b5d78d39 434 write_register (PS_REGNUM,
7f8e7424 435 read_memory_integer (frame->saved_regs[PS_REGNUM], 4));
c906108c
SS
436 }
437 write_register (FP_REGNUM, read_memory_integer (fp, 4));
438 write_register (PC_REGNUM, read_memory_integer (fp + 4, 4));
439 write_register (SP_REGNUM, fp + 8);
440 flush_cached_frames ();
441}
c906108c 442\f
c5aa993b 443
c906108c
SS
444/* Given an ip value corresponding to the start of a function,
445 return the ip of the first instruction after the function
446 prologue. This is the generic m68k support. Machines which
447 require something different can override the SKIP_PROLOGUE
448 macro to point elsewhere.
449
450 Some instructions which typically may appear in a function
451 prologue include:
452
453 A link instruction, word form:
454
c5aa993b 455 link.w %a6,&0 4e56 XXXX
c906108c
SS
456
457 A link instruction, long form:
458
c5aa993b 459 link.l %fp,&F%1 480e XXXX XXXX
c906108c
SS
460
461 A movm instruction to preserve integer regs:
462
c5aa993b 463 movm.l &M%1,(4,%sp) 48ef XXXX XXXX
c906108c
SS
464
465 A fmovm instruction to preserve float regs:
466
c5aa993b 467 fmovm &FPM%1,(FPO%1,%sp) f237 XXXX XXXX XXXX XXXX
c906108c
SS
468
469 Some profiling setup code (FIXME, not recognized yet):
470
c5aa993b
JM
471 lea.l (.L3,%pc),%a1 43fb XXXX XXXX XXXX
472 bsr _mcount 61ff XXXX XXXX
c906108c 473
c5aa993b 474 */
c906108c 475
c906108c 476CORE_ADDR
fba45db2 477m68k_skip_prologue (CORE_ADDR ip)
c906108c
SS
478{
479 register CORE_ADDR limit;
480 struct symtab_and_line sal;
481 register int op;
482
483 /* Find out if there is a known limit for the extent of the prologue.
484 If so, ensure we don't go past it. If not, assume "infinity". */
485
486 sal = find_pc_line (ip, 0);
b5d78d39 487 limit = (sal.end) ? sal.end : (CORE_ADDR) ~0;
c906108c
SS
488
489 while (ip < limit)
490 {
491 op = read_memory_integer (ip, 2);
492 op &= 0xFFFF;
c5aa993b 493
89c3b6d3
PDM
494 if (op == P_LINKW_FP)
495 ip += 4; /* Skip link.w */
496 else if (op == P_PEA_FP)
c5aa993b 497 ip += 2; /* Skip pea %fp */
89c3b6d3 498 else if (op == P_MOVL_SP_FP)
c5aa993b 499 ip += 2; /* Skip move.l %sp, %fp */
89c3b6d3
PDM
500 else if (op == P_LINKL_FP)
501 ip += 6; /* Skip link.l */
502 else if (op == P_MOVML)
503 ip += 6; /* Skip movm.l */
c906108c 504 else if (op == P_FMOVM)
89c3b6d3 505 ip += 10; /* Skip fmovm */
c906108c 506 else
b5d78d39 507 break; /* Found unknown code, bail out. */
c906108c
SS
508 }
509 return (ip);
510}
511
7f8e7424
GS
512/* Store the addresses of the saved registers of the frame described by
513 FRAME_INFO in its saved_regs field.
514 This includes special registers such as pc and fp saved in special
515 ways in the stack frame. sp is even more special:
516 the address we return for it IS the sp for the next frame. */
517
c906108c 518void
7f8e7424 519m68k_frame_init_saved_regs (struct frame_info *frame_info)
c906108c 520{
c5aa993b
JM
521 register int regnum;
522 register int regmask;
523 register CORE_ADDR next_addr;
c906108c
SS
524 register CORE_ADDR pc;
525
526 /* First possible address for a pc in a call dummy for this frame. */
527 CORE_ADDR possible_call_dummy_start =
7f8e7424 528 (frame_info)->frame - 28 - FP_REGNUM * 4 - 4 - 8 * 12;
c906108c
SS
529
530 int nextinsn;
7f8e7424
GS
531
532 if (frame_info->saved_regs)
533 return;
534
535 frame_saved_regs_zalloc (frame_info);
536
537 memset (frame_info->saved_regs, 0, SIZEOF_FRAME_SAVED_REGS);
538
c906108c
SS
539 if ((frame_info)->pc >= possible_call_dummy_start
540 && (frame_info)->pc <= (frame_info)->frame)
541 {
542
543 /* It is a call dummy. We could just stop now, since we know
c5aa993b
JM
544 what the call dummy saves and where. But this code proceeds
545 to parse the "prologue" which is part of the call dummy.
546 This is needlessly complex and confusing. FIXME. */
c906108c
SS
547
548 next_addr = (frame_info)->frame;
549 pc = possible_call_dummy_start;
550 }
c5aa993b 551 else
c906108c 552 {
c5aa993b 553 pc = get_pc_function_start ((frame_info)->pc);
c906108c 554
89c3b6d3
PDM
555 nextinsn = read_memory_integer (pc, 2);
556 if (P_PEA_FP == nextinsn
557 && P_MOVL_SP_FP == read_memory_integer (pc + 2, 2))
c906108c 558 {
89c3b6d3 559 /* pea %fp
c5aa993b 560 move.l %sp, %fp */
c906108c 561 next_addr = frame_info->frame;
89c3b6d3 562 pc += 4;
c906108c 563 }
89c3b6d3 564 else if (P_LINKL_FP == nextinsn)
c906108c
SS
565 /* link.l %fp */
566 /* Find the address above the saved
567 regs using the amount of storage from the link instruction. */
89c3b6d3
PDM
568 {
569 next_addr = (frame_info)->frame + read_memory_integer (pc + 2, 4);
570 pc += 6;
571 }
572 else if (P_LINKW_FP == nextinsn)
c906108c
SS
573 /* link.w %fp */
574 /* Find the address above the saved
575 regs using the amount of storage from the link instruction. */
89c3b6d3
PDM
576 {
577 next_addr = (frame_info)->frame + read_memory_integer (pc + 2, 2);
578 pc += 4;
579 }
c5aa993b
JM
580 else
581 goto lose;
582
583 /* If have an addal #-n, sp next, adjust next_addr. */
584 if ((0177777 & read_memory_integer (pc, 2)) == 0157774)
585 next_addr += read_memory_integer (pc += 2, 4), pc += 4;
586 }
c5aa993b 587
b5d78d39 588 for (;;)
c5aa993b 589 {
89c3b6d3 590 nextinsn = 0xffff & read_memory_integer (pc, 2);
c5aa993b 591 regmask = read_memory_integer (pc + 2, 2);
89c3b6d3
PDM
592 /* fmovemx to -(sp) */
593 if (0xf227 == nextinsn && (regmask & 0xff00) == 0xe000)
c906108c 594 {
89c3b6d3
PDM
595 /* Regmask's low bit is for register fp7, the first pushed */
596 for (regnum = FP0_REGNUM + 8; --regnum >= FP0_REGNUM; regmask >>= 1)
597 if (regmask & 1)
7f8e7424 598 frame_info->saved_regs[regnum] = (next_addr -= 12);
89c3b6d3
PDM
599 pc += 4;
600 }
601 /* fmovemx to (fp + displacement) */
602 else if (0171056 == nextinsn && (regmask & 0xff00) == 0xf000)
603 {
604 register CORE_ADDR addr;
605
606 addr = (frame_info)->frame + read_memory_integer (pc + 4, 2);
607 /* Regmask's low bit is for register fp7, the first pushed */
608 for (regnum = FP0_REGNUM + 8; --regnum >= FP0_REGNUM; regmask >>= 1)
609 if (regmask & 1)
610 {
7f8e7424 611 frame_info->saved_regs[regnum] = addr;
89c3b6d3
PDM
612 addr += 12;
613 }
614 pc += 6;
615 }
616 /* moveml to (sp) */
617 else if (0044327 == nextinsn)
618 {
619 /* Regmask's low bit is for register 0, the first written */
620 for (regnum = 0; regnum < 16; regnum++, regmask >>= 1)
621 if (regmask & 1)
622 {
7f8e7424 623 frame_info->saved_regs[regnum] = next_addr;
89c3b6d3
PDM
624 next_addr += 4;
625 }
626 pc += 4;
627 }
628 /* moveml to (fp + displacement) */
629 else if (0044356 == nextinsn)
630 {
631 register CORE_ADDR addr;
632
633 addr = (frame_info)->frame + read_memory_integer (pc + 4, 2);
634 /* Regmask's low bit is for register 0, the first written */
635 for (regnum = 0; regnum < 16; regnum++, regmask >>= 1)
636 if (regmask & 1)
637 {
7f8e7424 638 frame_info->saved_regs[regnum] = addr;
89c3b6d3
PDM
639 addr += 4;
640 }
641 pc += 6;
642 }
643 /* moveml to -(sp) */
644 else if (0044347 == nextinsn)
645 {
646 /* Regmask's low bit is for register 15, the first pushed */
647 for (regnum = 16; --regnum >= 0; regmask >>= 1)
648 if (regmask & 1)
7f8e7424 649 frame_info->saved_regs[regnum] = (next_addr -= 4);
89c3b6d3
PDM
650 pc += 4;
651 }
652 /* movl r,-(sp) */
653 else if (0x2f00 == (0xfff0 & nextinsn))
654 {
655 regnum = 0xf & nextinsn;
7f8e7424 656 frame_info->saved_regs[regnum] = (next_addr -= 4);
89c3b6d3 657 pc += 2;
c906108c 658 }
89c3b6d3
PDM
659 /* fmovemx to index of sp */
660 else if (0xf236 == nextinsn && (regmask & 0xff00) == 0xf000)
661 {
662 /* Regmask's low bit is for register fp0, the first written */
663 for (regnum = FP0_REGNUM + 8; --regnum >= FP0_REGNUM; regmask >>= 1)
664 if (regmask & 1)
665 {
7f8e7424 666 frame_info->saved_regs[regnum] = next_addr;
89c3b6d3
PDM
667 next_addr += 12;
668 }
669 pc += 10;
670 }
671 /* clrw -(sp); movw ccr,-(sp) */
672 else if (0x4267 == nextinsn && 0x42e7 == regmask)
673 {
7f8e7424 674 frame_info->saved_regs[PS_REGNUM] = (next_addr -= 4);
89c3b6d3
PDM
675 pc += 4;
676 }
677 else
678 break;
c906108c 679 }
c5aa993b 680lose:;
7f8e7424
GS
681 frame_info->saved_regs[SP_REGNUM] = (frame_info)->frame + 8;
682 frame_info->saved_regs[FP_REGNUM] = (frame_info)->frame;
683 frame_info->saved_regs[PC_REGNUM] = (frame_info)->frame + 4;
c906108c
SS
684#ifdef SIG_SP_FP_OFFSET
685 /* Adjust saved SP_REGNUM for fake _sigtramp frames. */
686 if (frame_info->signal_handler_caller && frame_info->next)
7f8e7424
GS
687 frame_info->saved_regs[SP_REGNUM] =
688 frame_info->next->frame + SIG_SP_FP_OFFSET;
c906108c
SS
689#endif
690}
691
692
c5aa993b 693#ifdef USE_PROC_FS /* Target dependent support for /proc */
c906108c
SS
694
695#include <sys/procfs.h>
696
c60c0f5f
MS
697/* Prototypes for supply_gregset etc. */
698#include "gregset.h"
699
c906108c 700/* The /proc interface divides the target machine's register set up into
c5aa993b
JM
701 two different sets, the general register set (gregset) and the floating
702 point register set (fpregset). For each set, there is an ioctl to get
703 the current register set and another ioctl to set the current values.
c906108c 704
c5aa993b
JM
705 The actual structure passed through the ioctl interface is, of course,
706 naturally machine dependent, and is different for each set of registers.
707 For the m68k for example, the general register set is typically defined
708 by:
c906108c 709
c5aa993b 710 typedef int gregset_t[18];
c906108c 711
c5aa993b
JM
712 #define R_D0 0
713 ...
714 #define R_PS 17
c906108c 715
c5aa993b 716 and the floating point set by:
c906108c 717
c5aa993b
JM
718 typedef struct fpregset {
719 int f_pcr;
720 int f_psr;
721 int f_fpiaddr;
722 int f_fpregs[8][3]; (8 regs, 96 bits each)
723 } fpregset_t;
c906108c 724
c5aa993b
JM
725 These routines provide the packing and unpacking of gregset_t and
726 fpregset_t formatted data.
c906108c
SS
727
728 */
729
730/* Atari SVR4 has R_SR but not R_PS */
731
732#if !defined (R_PS) && defined (R_SR)
733#define R_PS R_SR
734#endif
735
736/* Given a pointer to a general register set in /proc format (gregset_t *),
c5aa993b
JM
737 unpack the register contents and supply them as gdb's idea of the current
738 register values. */
c906108c
SS
739
740void
fba45db2 741supply_gregset (gregset_t *gregsetp)
c906108c
SS
742{
743 register int regi;
744 register greg_t *regp = (greg_t *) gregsetp;
745
c5aa993b 746 for (regi = 0; regi < R_PC; regi++)
c906108c
SS
747 {
748 supply_register (regi, (char *) (regp + regi));
749 }
750 supply_register (PS_REGNUM, (char *) (regp + R_PS));
751 supply_register (PC_REGNUM, (char *) (regp + R_PC));
752}
753
754void
fba45db2 755fill_gregset (gregset_t *gregsetp, int regno)
c906108c
SS
756{
757 register int regi;
758 register greg_t *regp = (greg_t *) gregsetp;
c906108c 759
c5aa993b 760 for (regi = 0; regi < R_PC; regi++)
c906108c
SS
761 {
762 if ((regno == -1) || (regno == regi))
763 {
764 *(regp + regi) = *(int *) &registers[REGISTER_BYTE (regi)];
765 }
766 }
767 if ((regno == -1) || (regno == PS_REGNUM))
768 {
769 *(regp + R_PS) = *(int *) &registers[REGISTER_BYTE (PS_REGNUM)];
770 }
771 if ((regno == -1) || (regno == PC_REGNUM))
772 {
773 *(regp + R_PC) = *(int *) &registers[REGISTER_BYTE (PC_REGNUM)];
774 }
775}
776
777#if defined (FP0_REGNUM)
778
779/* Given a pointer to a floating point register set in /proc format
c5aa993b
JM
780 (fpregset_t *), unpack the register contents and supply them as gdb's
781 idea of the current floating point register values. */
c906108c 782
c5aa993b 783void
fba45db2 784supply_fpregset (fpregset_t *fpregsetp)
c906108c
SS
785{
786 register int regi;
787 char *from;
c5aa993b
JM
788
789 for (regi = FP0_REGNUM; regi < FPC_REGNUM; regi++)
c906108c 790 {
c5aa993b 791 from = (char *) &(fpregsetp->f_fpregs[regi - FP0_REGNUM][0]);
c906108c
SS
792 supply_register (regi, from);
793 }
c5aa993b
JM
794 supply_register (FPC_REGNUM, (char *) &(fpregsetp->f_pcr));
795 supply_register (FPS_REGNUM, (char *) &(fpregsetp->f_psr));
796 supply_register (FPI_REGNUM, (char *) &(fpregsetp->f_fpiaddr));
c906108c
SS
797}
798
799/* Given a pointer to a floating point register set in /proc format
c5aa993b
JM
800 (fpregset_t *), update the register specified by REGNO from gdb's idea
801 of the current floating point register set. If REGNO is -1, update
802 them all. */
c906108c
SS
803
804void
fba45db2 805fill_fpregset (fpregset_t *fpregsetp, int regno)
c906108c
SS
806{
807 int regi;
808 char *to;
809 char *from;
c906108c 810
c5aa993b 811 for (regi = FP0_REGNUM; regi < FPC_REGNUM; regi++)
c906108c
SS
812 {
813 if ((regno == -1) || (regno == regi))
814 {
815 from = (char *) &registers[REGISTER_BYTE (regi)];
c5aa993b 816 to = (char *) &(fpregsetp->f_fpregs[regi - FP0_REGNUM][0]);
c906108c
SS
817 memcpy (to, from, REGISTER_RAW_SIZE (regi));
818 }
819 }
820 if ((regno == -1) || (regno == FPC_REGNUM))
821 {
c5aa993b 822 fpregsetp->f_pcr = *(int *) &registers[REGISTER_BYTE (FPC_REGNUM)];
c906108c
SS
823 }
824 if ((regno == -1) || (regno == FPS_REGNUM))
825 {
c5aa993b 826 fpregsetp->f_psr = *(int *) &registers[REGISTER_BYTE (FPS_REGNUM)];
c906108c
SS
827 }
828 if ((regno == -1) || (regno == FPI_REGNUM))
829 {
c5aa993b 830 fpregsetp->f_fpiaddr = *(int *) &registers[REGISTER_BYTE (FPI_REGNUM)];
c906108c
SS
831 }
832}
833
c5aa993b 834#endif /* defined (FP0_REGNUM) */
c906108c 835
c5aa993b 836#endif /* USE_PROC_FS */
c906108c 837
c906108c
SS
838/* Figure out where the longjmp will land. Slurp the args out of the stack.
839 We expect the first arg to be a pointer to the jmp_buf structure from which
840 we extract the pc (JB_PC) that we will land at. The pc is copied into PC.
841 This routine returns true on success. */
842
2765b798
AC
843/* NOTE: cagney/2000-11-08: For this function to be fully multi-arched
844 the macro's JB_PC and JB_ELEMENT_SIZE would need to be moved into
845 the ``struct gdbarch_tdep'' object and then set on a target ISA/ABI
846 dependant basis. */
847
c906108c 848int
f4281f55 849m68k_get_longjmp_target (CORE_ADDR *pc)
c906108c 850{
2765b798 851#if defined (JB_PC) && defined (JB_ELEMENT_SIZE)
35fc8285 852 char *buf;
c906108c
SS
853 CORE_ADDR sp, jb_addr;
854
35fc8285 855 buf = alloca (TARGET_PTR_BIT / TARGET_CHAR_BIT);
c5aa993b 856 sp = read_register (SP_REGNUM);
c906108c 857
b5d78d39
GS
858 if (target_read_memory (sp + SP_ARG0, /* Offset of first arg on stack */
859 buf, TARGET_PTR_BIT / TARGET_CHAR_BIT))
c906108c
SS
860 return 0;
861
862 jb_addr = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
863
864 if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
865 TARGET_PTR_BIT / TARGET_CHAR_BIT))
866 return 0;
867
868 *pc = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
869
870 return 1;
2765b798 871#else
8e65ff28
AC
872 internal_error (__FILE__, __LINE__,
873 "m68k_get_longjmp_target: not implemented");
2765b798
AC
874 return 0;
875#endif
c906108c 876}
c906108c
SS
877
878/* Immediately after a function call, return the saved pc before the frame
879 is setup. For sun3's, we check for the common case of being inside of a
880 system call, and if so, we know that Sun pushes the call # on the stack
881 prior to doing the trap. */
882
883CORE_ADDR
fba45db2 884m68k_saved_pc_after_call (struct frame_info *frame)
c906108c
SS
885{
886#ifdef SYSCALL_TRAP
887 int op;
888
889 op = read_memory_integer (frame->pc - SYSCALL_TRAP_OFFSET, 2);
890
891 if (op == SYSCALL_TRAP)
892 return read_memory_integer (read_register (SP_REGNUM) + 4, 4);
893 else
894#endif /* SYSCALL_TRAP */
895 return read_memory_integer (read_register (SP_REGNUM), 4);
896}
897
152d9db6
GS
898/* Function: m68k_gdbarch_init
899 Initializer function for the m68k gdbarch vector.
900 Called by gdbarch. Sets up the gdbarch vector(s) for this target. */
901
902static struct gdbarch *
903m68k_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
904{
a2c6a6d5
GS
905 static LONGEST call_dummy_words[7] = { 0xf227e0ff, 0x48e7fffc, 0x426742e7,
906 0x4eb93232, 0x3232dffc, 0x69696969,
907 (0x4e404e71 | (BPT_VECTOR << 16))
908 };
152d9db6
GS
909 struct gdbarch_tdep *tdep = NULL;
910 struct gdbarch *gdbarch;
911
912 /* find a candidate among the list of pre-declared architectures. */
913 arches = gdbarch_list_lookup_by_info (arches, &info);
914 if (arches != NULL)
915 return (arches->gdbarch);
916
917#if 0
918 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
919#endif
920
921 gdbarch = gdbarch_alloc (&info, 0);
922
5d3ed2e3
GS
923 set_gdbarch_long_double_format (gdbarch, &floatformat_m68881_ext);
924 set_gdbarch_long_double_bit (gdbarch, 96);
925
926 set_gdbarch_function_start_offset (gdbarch, 0);
927
928 set_gdbarch_skip_prologue (gdbarch, m68k_skip_prologue);
929 set_gdbarch_saved_pc_after_call (gdbarch, m68k_saved_pc_after_call);
930
931 /* Stack grows down. */
932 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
933 set_gdbarch_stack_align (gdbarch, m68k_stack_align);
934
942dc0e9
GS
935 set_gdbarch_decr_pc_after_break (gdbarch, 2);
936
937 set_gdbarch_store_struct_return (gdbarch, m68k_store_struct_return);
938 set_gdbarch_deprecated_extract_return_value (gdbarch,
939 m68k_deprecated_extract_return_value);
940 set_gdbarch_store_return_value (gdbarch, m68k_store_return_value);
941
942 set_gdbarch_frame_chain (gdbarch, m68k_frame_chain);
943 set_gdbarch_frame_saved_pc (gdbarch, m68k_frame_saved_pc);
944 set_gdbarch_frame_init_saved_regs (gdbarch, m68k_frame_init_saved_regs);
945 set_gdbarch_frameless_function_invocation (gdbarch,
946 m68k_frameless_function_invocation);
947
5d3ed2e3
GS
948 set_gdbarch_register_raw_size (gdbarch, m68k_register_raw_size);
949 set_gdbarch_register_virtual_size (gdbarch, m68k_register_virtual_size);
950 set_gdbarch_max_register_raw_size (gdbarch, 12);
951 set_gdbarch_max_register_virtual_size (gdbarch, 12);
952 set_gdbarch_register_virtual_type (gdbarch, m68k_register_virtual_type);
953 set_gdbarch_register_name (gdbarch, m68k_register_name);
954 set_gdbarch_register_size (gdbarch, 4);
955 set_gdbarch_register_byte (gdbarch, m68k_register_byte);
942dc0e9
GS
956 set_gdbarch_num_regs (gdbarch, 29);
957 set_gdbarch_register_bytes_ok (gdbarch, m68k_register_bytes_ok);
958 set_gdbarch_register_bytes (gdbarch, (16 * 4 + 8 + 8 * 12 + 3 * 4));
a2c6a6d5 959
7f8e7424
GS
960 set_gdbarch_use_generic_dummy_frames (gdbarch, 0);
961 set_gdbarch_call_dummy_location (gdbarch, ON_STACK);
962 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
a2c6a6d5 963 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 24);
7f8e7424
GS
964 set_gdbarch_pc_in_call_dummy (gdbarch, pc_in_call_dummy_on_stack);
965 set_gdbarch_call_dummy_p (gdbarch, 1);
966 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
967 set_gdbarch_call_dummy_length (gdbarch, 28);
968 set_gdbarch_call_dummy_start_offset (gdbarch, 12);
a2c6a6d5 969
7f8e7424
GS
970 set_gdbarch_call_dummy_words (gdbarch, call_dummy_words);
971 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (call_dummy_words));
972 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
973 set_gdbarch_fix_call_dummy (gdbarch, m68k_fix_call_dummy);
974 set_gdbarch_push_dummy_frame (gdbarch, m68k_push_dummy_frame);
975 set_gdbarch_pop_frame (gdbarch, m68k_pop_frame);
a2c6a6d5 976
152d9db6
GS
977 return gdbarch;
978}
979
980
981static void
982m68k_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file)
983{
984
985}
2acceee2 986
c906108c 987void
fba45db2 988_initialize_m68k_tdep (void)
c906108c 989{
152d9db6 990 gdbarch_register (bfd_arch_m68k, m68k_gdbarch_init, m68k_dump_tdep);
c906108c
SS
991 tm_print_insn = print_insn_m68k;
992}